baber/WOPTO huggingface dataset:
Patent JP-H0270183-A (JP)
Title: Electric field intensity indication circuit for television
Inventor: SAGAWA TAKAHIRO
IPC: H04N5/445
Filed: 1988-09-06
Abstract: PURPOSE:To intend space-saving and cost reduction without using any exclusive level meter by indicating the character video signal of the detected value of an electric field intensity detection circuit on a picture displaying part as superimposing it upon a video signal. CONSTITUTION:When an operating switch 9 is pushed in order to start the indication of electric field intensity, an A/D converter 8 is operated by the instruction of an indication control circuit 10, and reads AGC voltage 15, and outputs an indication instruction signal 17 to show the kind of a character or an indicating position. Next, a character indication circuit 11 accesses a built-in character data memory, and outputs the character video signal 14. The signal 14 is inputted to a video signal superimposition circuit 5, and is inputted to the picture displaying part 6 as being superimposed upon the video signal 13 from TV broadcasting, and the electric field intensity is displayed together with a broadcasting picture. Thus, no exclusive level meter is needed, and the space-saving and the cost reduction can be realized.
Patent JP-S61102139-A (JP)
Title: Slot core type dc motor
Inventor: NAGASAKI YASUMASA
IPC: H02K29/00
Filed: 1984-10-23
Abstract: PURPOSE:To reduce cogging, by magnetizing a magnet for field magnet for magnetic floxdistribution so that the length in the peripheral direction in the maximum magnetic flux density range may be arranged to be 60% or less than a magnetic pole pitch. CONSTITUTION:An armature core 1 is organized with a plurality of tooth sections 3 protruded on the outer periphery of a yoke 2, and each tooth section 3 is wound up with an armature coil 5. A magnet 6 for field magnet magnetized with eight poles organizing a rotor is fitted into a cylindrical rotor yoke 7. The magnet 6 is magnetized so that it may be expressed in l/p<=0.6 when the magnetic pole pitch is (p) and the length in the peripheral direction in the maxi mum magnetic flux density range is l, and a slightly trapezoid corrugated magnetic flux density distribution is shown in the drawing. In this manner, the magnetic density on the magnetic pole boundary sections can be controlled and cogging can be reduced.
Patent JP-H0859685-A (JP)
Title: Phenethyl alcohol glycoside derivative, 5-lipoxygenase inhibitor comprising the same as active ingredient and aldose reductase inhibitor
Inventor: KANETANI HIROTOSHI
IPC: C07H15/18
Filed: 1994-08-25
Abstract: PURPOSE: To obtain a new specific phenethyl alcohol glycoside derivative useful for treating an allergic diseases such as bronchial asthma and pollinosis, having inhibitory action on 5-lipoxygenase and aldose reductase. CONSTITUTION: This new phenethyl alcohol glycoside derivative is shown by the formula (R1 is a 1-6C lower acyl; R2 to R5 are each H or a 1-6C acyl; with the proviso that R2 to R5 are not H at the same time), has inhibitory action on 5-lipoxygenase and aldose reductase and is useful as a medicine such as an antiallergic agent for treating allergic diseases such as bronchial asthma and pollinosis, anti-inflammatory agent and a therapeutic agent for diabetic complication. The compound is obtained by dissolving a completely acylated substance of acteoside in an organic solvent, treating the solution with a hydrolase such a lipase or esterase, filtering the solution, concentrating the filtrate under reduced pressure, dissolving the prepared residue in water, adsorbing the solution in a porous polymer and purifying the eluted substance by column chromatography.
Patent JP-S59112667-A (JP)
Title: Light emitting diode
Inventor: HASEGAWA OSAMU
IPC: H01L33/30
Filed: 1982-12-17
Abstract: PURPOSE:To prevent the radiation of unnecessary peripheral light by providing a light emitting unit in a semiconductor substrate, providing annular electrodes on the light emitting surface, and covering the outside with a light shield. CONSTITUTION:A window layer 1, an active layer 2 and an enclosing layer 3 are superposed on a GaAs substrate, and a P type electrode 4, an SiO2 film 5 and an Au-plated layer 6 are formed. The substrate is removed, and an N type electrode 7 is attached onto the layer 1. An SiO2 film 11 having a thickness of 1/4 of emitting light wavelength is covered on the layer 1 by a sputtering method, a window is opened on the electrode 7, and AuSn of low melting point is deposited. Supersonic cleaning is performed, and an AuSn layer 12 remains in the window. The outside (scribing line) of the electrode 7 and the film 11 on the electrode 7 are removed, cut and separated. The separated element is heated, the layer 12 is molten, the exposed surface of the layer 11 outside the electrode 7 is covered. In this manner, the peripheral light is interrupted by the layer 12 and not externally emitted. According to this structure, an LED can be advantageously coupled with a lens for use.
Patent JP-2000053612-A (JP)
Title: Prevention of polymerization of acrylic acid
Inventor: NAGAI KOICHI
IPC: C07C51/50
Filed: 1998-08-06
Abstract: PROBLEM TO BE SOLVED: To provide a method for preventing the polymerization of acrylic acid, capable of giving an excellent polymerization-inhibiting effect even in an acrylic acid-purifying process including a process in which an acrylic acid aqueous solution is dehydrated and distilled using an azeotropic acid. SOLUTION: This method for preventing the polymerization of acrylic acid comprises adding at least one compound selected from ammonia, ammonium salts, aliphatic primary monoamines, aliphatic primary diamines, aliphatic polyamines, aromatic primary amines, and amino acids, and a polymerization inhibitor preferably comprising (1) at least one of phenothiazine and methylene blue and (2) at least one of dialkyldithiocarbamic acid copper salts consisting of dimethyldithiocarbamic acid copper salt, diethyldithiocarbamic acid copper salt, dipropyldithiocarbamic acid copper salt and dibutyldithiocarbamic acid copper salt to crude acrylic acid or its aqueous solution to be fed for the purification.
Patent JP-S60115218-A (JP)
Title: Vaporization source cell of thin film forming apparatus
Inventor: MURAKAMI SHIYUNICHI
IPC: H01L21/203
Filed: 1983-11-26
Abstract: PURPOSE:To make constant a pattern of vapor radiation and produce a reproducible MBE film, etc. by providing a single cylindrical vapor smoothing part having a depth larger than a longer diameter of aperture and a source substrate housing part having larger aperture area and volume than said smoothing part. CONSTITUTION:In a cell 10, a vapor smoothing part 20 is cylindrical and single, depth L is larger than aperture diameter D1 and aperture area of source substance housing part 30 connected to the vapor smoothing part 20 is larger than the aperture area of smoothing part 20. Namely, an aperture diameter D2 is larger than D1 and a volume of vapor smoothing part 20 is larger than the volume of source substance housing part 30. Thereby, so long as the source substance 40 is housed in the housing part 30, even in case the upper surface is located at the upper part, namely to the position 44 or located at the lower 44a, the pattern of molecular beam is hardly changed. This is also true in such a case that a cell 10 is inclined, upper surface of source substance is inclined like 46 and it is lowered like 46a. It is also possible to give a large volume to the source substance housing part 30.
Patent JP-H1150256-A (JP)
Title: Vacuum treating device and vacuum treating method
Inventor: OZAWA MAKOTO
IPC: C23C16/44
Filed: 1997-08-05
Abstract: PROBLEM TO BE SOLVED: To increase the working ratio of a device by providing either the carry-in part and the take-out part of the object to be treated of a vacuum treating chamber or the carry-in part and the take-out part in one with plural vacuum spare chambers so as to be communicable parallel. SOLUTION: A substrate is taken out from a cassette 82 by a robot 50 and is carried into a load lock chamber 30 under atmospheric pressure, a gate valve 32 is closed, and the load lock chamber 30 is evacuated. A gate valve 34 is opened, the substrate is carried into a transporting chamber 20, the gate valve 34 is closed, and the inside of the load lock chamber 30 is returned to the atmospheric pressure by inert gas. The substrate in the transporting chamber 20 is carried into a primary process chamber 12 of a group 10 of a vacuum treating chambers, a gate valve is 14 closed, and the substrate is subjected to prescribed vacuum treatment. In the meanwhile, similar operation is executed in an another load lock chamber 40, and the substrates are alternately carried into the transporting chamber 20.  The substrate treated in a final process chamber 112 is taken out to a cassette 182 by a stage reverse to the time of the carry-in.
Patent JP-H0778654-A (JP)
Title: Connector
Inventor: TANAKA YASUO
IPC: H01R13/648
Filed: 1993-09-08
Abstract: PURPOSE:To prevent generation of electromagnetic waves and noises certainly and achieve low cost output of connectors and electronic appliance incorporating then, in association with the countermeasure for troubles in electronic appliance caused by electromagnetic waves and noises, by shielding the contact with a housing made of a conductive material. CONSTITUTION:A connector concerned is for use in connecting an interface cable to any electronic appliance, wherein unnecessary electromagnetic waves and noises generated at the interface cable are precluded from being emitted to the space. The connector is composed of conductive contacts 11, 21, insulations 12, 22 surrounding them, and housings 13, 23 surrounding the insulations, wherein the housing 13 is made of a conductive material and fitted in the other 23 so that the unnecessary electromagnetic waves and noises generated between the interface cable and electronic appliance are released to the ground of an electronic circuit board 30 from a ground terminal 25 leading to the housing 23.
Patent JP-S59112324-A (JP)
Title: Controlling circuit of overload
Inventor: KIUCHI YUKIO
IPC: G06F13/362
Filed: 1982-12-20
Abstract: PURPOSE:To prevent a CPU from the increment of jobs at a rapidly accelerating rate and overload state by varying the priority of a common bus using right between plural bus requesting sources by an overload signal from an overload detecting circuit at the detection of overload state. CONSTITUTION:Bus using requests from plural bus requesting sources CPUs and direct memory accessing devices DMACs are collectively controlled by a bus using priority selecting circuit AB2. When bus using signals BUSREQ are simultaneously arrived from the plural DMACs and CPUs, the AB2 decides a bus requesting source to which the using right is to be applied by the operation of an internal controlling circuit CTL21. At the decision of bus priority by the CTL21, the overload state of the CPUs 3 is referred. At that time, the CTL21 assigns the bus priority of the CPU3 to the highest rank. Therefore, the CPU3 has priority at the time of overload and executes memory access, so that the execution speed of a program is improved.
Patent JP-2000051638-A (JP)
Title: Humidity regulator
Inventor: YAMAUCHI SHIRO
IPC: B01D53/26
Filed: 1998-08-06
Abstract: PROBLEM TO BE SOLVED: To obtain a humidity regulator which can obtain high dehumidification performance without accumulating dangerous hydrogen by increasing the bonding capacity between a hydrogen ion and oxygen on the cathode side and controls the deterioration of performance by the passage of time. SOLUTION: A solid electrolyte membrane 10 with cation conductivity, the first cathode catalyst layer 11a which is installed on the cathode 13 side surface of the membrane 10 and in which the amount of a platinum group metal or a platinum group metal oxide is set up to be 0.3-3 mg/cm2 the first porous base material which is formed in contact with the first cathode catalyst layer 11a, the second cathode catalyst layer 11b which is formed on the side of the junction with the first cathode catalyst layer 11a of the first porous base material 12 and in which the amount of the fine particles of a platinum group metal or a platinum group metal oxide is dispersed in 0.3-3 mg/cm2, and the second porous base material 14 which is joined to the anode 16 side surface of the solid electrolyte membrane 10 are provided.
Patent JP-H0273283-A (JP)
Title: Image recorder
Inventor: KUBOKI YOSHIKI
IPC: G03G21/04
Filed: 1988-09-08
Abstract: PURPOSE:To prevent the copying of a part unnecessary to be copied without changing a copying time for an ordinary original by painting out an area on a medium to be recorded in which an image is recorded in advance in the case that the original inhibited to be copied is detected. CONSTITUTION:At first, in an original reading means 1000, the image of the original is read by an image sensor so as to become an electrical image signal. The image signal is recorded in a recording means 2000 and the image recording processing is continued till the original which is inhibited to be copied is detected by a detecting means 3000. At the point of time when the original which is inhibited to be copied is detected by the detecting means 3000, a control means 4000 controls the recording means 2000 and additionally records a specified image, as the area on the medium to be recorded in which the image is recorded in advance is painted out. Then, it does not take a long time because copying is executed to the ordinary original as it is, and the copying of the part unnecessary to be copied can be prevented.
Patent JP-H0778923-A (JP)
Title: Lead frame and semiconductor device
Inventor: OZAKI SUSUMU
IPC: H01L23/50
Filed: 1993-09-08
Abstract: PURPOSE:To provide a lead frame which can be manufactured through the conventional process at the same cost although it has floating lead for a semiconductor device using the lead frame. CONSTITUTION:A lead frame for semiconductor devices in which a die stage 2, a prescribed number of outer leads 4, and at least one floating lead 10, which are electrically insulated from each other after a semiconductor device is completed, are integrally formed on and connected to an outer frame 1 formed for holding them at their positions.
Patent JP-H0275530-A (JP)
Title: Rotary type feeder
Inventor: MIYAMAE SEIJI
IPC: B65G65/48
Filed: 1988-09-08
Abstract: PURPOSE:To improve the processionability, the lightness, the chemical resistance and the self-lubricity and enable the adjustment of the feeding quantity in the wide range by housing a cylindrical rotor in which collecting holes, made of the ultra high polymer polyethylene having the predetermined grading, in the centripetal, direction are dug. CONSTITUTION:A cylindrical body 11 of a rotor 9 is made by machining the solid cylindrical material, and the ultra high polymer polyethylene is used as the material. This material is the ultra high polymer polyethylene defined to have more than 8 of the limiting viscosity in the decalin in 135 c, and is superior in the impactability, the abrasion resistance, the chemical resistance and the self-lubricity. By operating the switching valves 17, 18, the material can be fed to one of the collecting holes 12, 13, 14 or suitable two of them or all of 3. Owing to this structure, the structure of the rotor 9 is simple, the processing is facilitated and while the action is secured, the danger of the abrasion and the fault is reduced, and furthermore, the rotor is light.
Patent JP-S61100766-A (JP)
Title: Electronic recorder
Inventor: INOUE MOTOICHIRO
IPC: G03G21/00
Filed: 1984-10-23
Abstract: PURPOSE:To know exactly the exchange cycles of consumable parts by detecting the degree of consumption of the consumable parts from the operating time of a main driving source such as drive motor of a device and displaying the same. CONSTITUTION:The count of a down-counter 13 is first set to the initial state of using the drive motor 7, for example, '9999'. The information on the rotation of the motor 7 is fed via an input/output circuit 5 to a CPU1 when the drive motor runs. The number of the pulses per time T of the prescribed number of revolutions of the drive motor corresponding to the respective consumable parts is calculated and is fed to counter devices 8-9 corresponding to the respective consumable parts at prescribed timings. The pulses are inputted to the base of a transistor (TR) 12 via the buffers 11 of the counters 8-9, by which the TR12 is turned on and the count is successively subtracted according to the revolution of the motor 7.
Patent JP-H05320587-A (JP)
Title: Adhesive tape for fixing semiconductor wafer
Inventor: NAKAYAMA HIROSHI
IPC: C09J7/02
Filed: 1992-07-31
Abstract: PURPOSE:To provide an adhesive tape used for fixing semiconductor wafers, preventing the generation of fibrous swarfs when diced, capable of performing the wide and uniform expansion of element intervals by the stretch of the adhesive tape after the irradiation of radiations, and reduced in the picking-up miss of element pieces. CONSTITUTION:In the adhesive tape used for fixing semiconductor wafers and produced by disposing a radiation-curable adhesive layer on one side of a substrate film, a laminate film having the film layer of a resin composition comprising a styrene-ethylene-butene or pentene copolymer, an ethylene-acrylic acid copolymer and a polyamide-polyether copolymer as the central layer of the substrate film and having an adhesive agent-coated layer on the side of the radiation-curable adhesive layer of the central layer and a transfer-preventing layer on the other side through adhesive layers or directly, respectively, is used. A prescribed amount of an amorphous poly alpha-olefin may be contained in the resin composition as the central layer.
Patent JP-H0670351-A (JP)
Title: Subscriber contract information management system
Inventor: SHIOZAKI YUKINAGA
IPC: H04Q3/545
Filed: 1992-08-24
Abstract: PURPOSE:To allow the subscriber contract information management system not to notify the change of an accommodation position of the subscriber by providing subscriber contract information of a stored program control exchange corresponding to a logical subscriber accommodation location called a normal ized number and revising the correspondence between the logical subscriber accommodation position and the subscriber accommodation position so as to absorb the deletion/reregistration of huge subscriber contract information. CONSTITUTION:Normalized numbers subjected to logic processing uniquely in an exchange for each subscriber accommodated in the exchange are generated and registered by a normalized number management table 1. An accommodate location/normalizing number table 2 makes the normalizing number correspond to the subscriber accommodated position. Subscriber contract information 4 stored in each subscriber is allocated by a pointer table 3 corresponding to the normalized number.
Patent JP-H0783577-A (JP)
Title: Explosion-proof hood for hydraulic slag-crushing device
Inventor: KANETSUME HISAO
IPC: B02C23/04
Filed: 1993-09-08
Abstract: PURPOSE:To provide an explaction-proof hood for a hydraulic slag-crushing device capable of performing a safe removing of castings and preventing the slag from being adhered to an inner wall surface. CONSTITUTION:An explosion-proof hood 30 is constructed such that a horizontal wall 36 having an inspection hole 36a which can be opened or closed is installed at an upper part of the extremity end of a trough 11 for use in discharging slag C kept in melted state, and a work scaffolding is installed to cause a worker to easily approach the inspection hole 36a, resulting in that a work for removing castings adhered to the lower part of the extremity end of the trough 11 or an inspection work for checking a hydraulic slag-crushing device can be easily and safely carried out form the work scaffolding. In addition, cooling water is continuously injected against an inner wall surface of the explosion-proof hood 30 through a cooling water pipe 41 and flowed down, so that the slag C melted and dispersed through the hydrualic crushing process is not adhered to the inner wall surface of the explosion-proof hood 30.
Patent JP-H0667511-A (JP)
Title: High voltage power circuit
Inventor: MITSUHARA YOICHI
IPC: H02M3/28
Filed: 1992-08-24
Abstract: PURPOSE:To supply a constant load current even when a load has a positive and a negative potential by varying the impedance of a variable impedance element according to the level of a detected load current. CONSTITUTION:A DC component which is inputted to a variable impedance circuit 32 further flows to the load 22 through a resistance 30b, and a diode 38 and a resistance 40 included in a DC voltage generating circuit 28. An operational amplifier 42 compares a voltage developed across the resistance 40 with the reference voltage of a DC voltage source 44 and outputs a current in a magnitude corresponding to their difference. A light emitting diode 46 emits light by the light emitting quantity corresponding to the output current of the operational amplifier 42, i.e., the magnitude of the load current. When the potential of a DC bias 24 rises and the load current becomes large, the quantity of light emission of the light emitting diode 46 increases, so the potential at a point (c) rises and the load current becomes small. When the potential of the DC bias 24 falls and the load current becomes small, the quantity of light emission of the light emitting diode becomes small and the load current becomes large.
Patent JP-S59114665-A (JP)
Title: Parallel computer system
Inventor: MURAMATSU AKIRA
IPC: G06F15/80
Filed: 1982-12-22
Abstract: PURPOSE:To shorten the overall processing time by carrying out a typical matrix calculation by means of a synchronizing signal sent from a central controller instead of a program. CONSTITUTION:An inner product operation (y y+aXx) using no program control is started by an interruption signal which is transmitted from a central controller via a signal line 23. When receiving this interruption signal, a control part 19 clears an accumulator 12, an accumulator latch 13 and registers 14 and 15 respectively and actuates a circuit which works synchronously with the synchronizing signal sent from the central controller via the line 23. The data (y), (x) and (a) are fetched with a signal (r), and (y+aXx) is calculated with a signal (p). Then an arithmetic result (y+aXx) and (x) and (a) are delivered with a signal (s). Each processor works by the synchronizing signal until the input of an interruption signal requesting the discontinuation of operation.
Patent JP-H1070462-A (JP)
Title: High-speed a/d converting device
Inventor: HIWATARI MASAYA
IPC: H03M1/38
Filed: 1996-08-26
Abstract: PROBLEM TO BE SOLVED: To easily accelerate the speed of repeated analog/digital(A/D) conversion by performing parallel pipelined operation while using plural A/D converters. SOLUTION: Two frequency-divided outputs of a flip-flop 30 are fixed to low level signals at a logic circuit 40 according to an 8/10-bit switching signal. Therefore, the logic circuit 40 outputs the output of a ring counter 20, namely, a 10-phase clock. However, the phases of respective 10-phase clocks individually applied to five A/D converters 101 -105 are mutually deviated. An output buffer 50 successively takes out respective 10-bit parallel outputs corresponding to the end of A/D conversion at the respective A/D converters 101 -105 according to the 8/10-bit switching signal and a strobe signal from a ring counter 20. In the case of 8-bit resolution, among these 10 bits, 8 bits are made effective. Thus, an A/D converted value can be provided at the interval of two clocks and acceleration can be easily achieved.