Patent GB-1253674-A (GB)
Title: Improvements in or relating to the processing of digital or digitized analog information for high density data transmission or recording
IPC: G11C21/00
Filed: 1968-11-12
Abstract: 1,253,674. Digital transmission systems. GENERAL DYNAMICS CORP. 12 Nov., 1968 [24 Nov., 1967], No. 53713/68. Heading H4P. [Also in Division G4] A binary data word is represented by a format word having the same number of signals selected from an alphabet of such format words each having a zero average signal level. Input to tape: general.-Analogue inputs are sampled in turn and digitized (see below) then supplied together with digital inputs and frame sync. words by a multiplexer to a set of encoders, one per track of a magnetic tape. Each encoder (see below) converts 4-bit binary words into 4-digit ternary words which, after preemphasis by a whitening filter having an optical response inverse to that of the record/playback system, are recorded on the corresponding tape track together with a reference tone. The frame sync. words are only recorded on the centre track.  Digitization.-Each analogue input is split into a carrier component by a low-pass aliasing filter and an envelope component by an absolute magnitude circuit and a sampling filter. The carrier components are sampled and fed in turn through a gain-controlled amplifier to a linear A-to-D converter to produce a "characteristic" for each. The amplifier gain for the signal from each analogue input channel is controlled by a respective "exponent" in a recirculating shift register. The envelope components are sampled less frequently than the carrier components and fed in turn to a logarithmic A-to-D converter to produce an "exponent" for each. These "exponents" update the shift register and are fed together with the "characteristics" to constitute the digital output. Encoders.-Each encoder receives 4-bit binary words into a 4-bit shift register which supplies each to a means which converts it to binarycoded ternary form which is inserted into a 2 x 4 bit shift register (which can alternatively be loaded with a frame word from a separate generator). The latter shift register is shifted out and each binary-coded ternary digit is converted to a pure ternary digit having positive, negative or zero amplitude (the magnitudes of the positive and negative amplitudes used being equal). The code is chosen so that the sum of the amplitudes in each (pure) ternary word is zero. Two different codings, viz + +- and -+ +, are used, alternately, for the binary word 0000, to preserve bit synchronization during a long string of input zeros. Output from tape: general.-The output from each track, after amplification and filtering, is fed through a variable delay line (for deskewing, see "synchronization" below) and a phase shift equalization network, to both a reference tone reject filter and a reference tone extraction circuit (see "synchronization" below). The ternary words emerging from the reference tone reject filter are detected and decoded to binary form (see "detection and decoding of ternary words" below) and then demultiplexed to digital outputs in the case of the digital input data, and to a D-to-A conversion arrangement (see below) in the case of analogue input data. The reconstituted analogue data is distributed to analogue outputs via sample-hold circuits and low pass filters. Detection and decoding of ternary words.-Each word is fed to a tapped delay line, tap outputs each being added to negatively weighted outputs of the adjacent taps to decorrelate the ternary digits. Each sum voltage, nominally representing a respective ternary digit, is supplied in the form of itself, minus itself, and minus its modulus to resistor summing circuits, the largest output of which sets a respective flip-flop to identify the word. The flip-flop identity is encoded to a 4-bit binary word by a matrix, the word being serialized by a shift register. A similar modification utilizes a further tapped delay line after the first summing.  Synchronization.-Each ternary word from the tape, after use of a tapped delay line and summing with adjacent tap outputs for decorrelation as in the previous section, is fed to a tapped delay line which provides the ternary digits in parallel (when the word is correctly registered) to a summing amplifier which thus provides an output with regular zeros (due to the to the ternary code used, see above), the phases of which are compared with those of clock pulses controlling the whole system to derive an error signal effective at high frequencies (due to a filter) to adjust the delay of the variable delay line for deskewing purposes. A second error signal, effective at low frequencies (due to a filter) is obtained by a phase comparison between the reference tone from the reference tone extraction circuit and the clock pulses, and used for the same purpose. These deskew arrangements are not used in the case of the centre track. In this case, the second error signal is used to adjust tape speed, also controlled by tachometer feedback. The above uses of the error signals also remove the effects of time base jitter. Each frame sync. word read from the tap synchronizes the distribution of the analogue outputs. D-to-A conversion arrangement.-The "characteristic" part of each binary quantity to be converted back to analogue form is fed to a linear D-to-A converter, the output of which goes through an amplifier, the gain of which is controlled in accordance with the relevant "exponent" part loaded into a recirculating shift register. Data transmission is another possible application, instead of magnetic tape recording and reading.