Patent GB-832588-A (GB)
Title: Improvements in or relating to coincidence-testing arrangements
IPC: H03K19/12
Filed: 1958-01-30
Abstract: 832,588. Automatic exchange systems. SIEMENS & HALSKE A.G. Jan. 30, 1958 [Jan. 30, 1957; Oct. 15, 1957], No. 3175/58. Class 40 (4). [Also in Group XL (c)] In an arrangement for detecting the simultaneous presence of voltages from two or more out of a plurality of voltage sources Q1 . . . Q4 each source feeds one input of respective OR gates S1 . . . S4, each of whose outputs is connected to the other input of the next, whilst, each output of the OR gates is connected to one input of an AND gate K1 . . . K3, the other input being connected to the source associated with the succeeding OR gate. Thus, as shown, an input voltage on Q2 produces outputs from S2 and S3 so that one input of both K2 and K3 is energized. If a voltage also exists on Q3 or Q4 the other input of K2 or K3 is also energized to produce an output on terminal A2 or A3. The respective outputs from the AND gates are combined at E for emission on a single terminal As. Amplifiers may be included in the output circuits of the OR gates, Fig. 2b (not shown). Fig. 3 illustrates an arrangement for positive-going signals, applied to Q1 . . . Q10, in which the OR gates each consist of a pair of rectifiers such as G21, G22 and the AND gates consist of a rectifier and resistance combination such as G33 and R2. The output terminals A1 ... A9 are grouped in threes each feeding, via decoupling rectifiers, one of the terminals A13, A46, A79 which in turn feed the output terminal As via further decoupling rectifiers. This arrangement minimizes spurious effects which might otherwise occur due to the considerable reverse admittance of a large number of parallel rectifiers. Additional rectifiers may be arranged to shunt groups of the rectifiers G22 ... G92 to minimize the effective series impedance of this set, Fig. 4 (not shown). In a further embodiment, Fig. 5, the OR gates are replaced by relay contacts. As shown, points Q1 . . . Q4 receive positive potential when valves V1 . . . V4 conduct, which also causes contacts m1 . . . m4 to be opened. Thus operation of any contact, say m2, disconnects earth (at m1 from all points of the chain to its right, so that positive potential at Q3, applied through resistor R2, is no longer shunted by rectifier G2 and is effective at point A2. In the case of a large number of sources, they may be divided into groups, each being provided with a circuit such as that of Fig. 5. In addition, to detect coincidences between voltages in different groups, the terminals P of the different groups may be connected in pairs to AND circuits each comprising a source feeding an output via a resistance, the output being shunted by rectifiers connected to the points P, Fig. 6 (not shown). The circuit may also be arranged to test alternatively for the presence of one voltage only by completing the ring of OR circuits and providing an additional AND circuit fed by the last OR circuit and the first source. The ring may be completed by a gate circuit which is alternatively closed and open so effecting tests for one voltage and two voltages respectively. As shown, Fig. 8, an arrangement for testing (a) for the presence of at least one negative voltage and (b) for coincidences of negative voltages, on terminals Q1 ... Q3, comprises a ring of OR gates e.g. G11, G12, feeding two-stage transistor amplifiers T11, T12. The last amplifier T31, T32 comprises a gate G35, G36. Earth potential applied to G36 completes the ring. Negative potential breaks the ring. In the event of the ring being complete, a negative potential applied, say, at Q1, is transmitted round the ring and reaches the AND gate G33, G34, R37 whose other input is connected to Q1. The resulting output feeds terminal As. If the ring is broken, however, no potential is applied to rectifier G33 and no output is produced. If, however, a voltage is also present on Q2 the AND gate G13, G14, R17 receives voltage on both its inputs and produces an output. Arrangements may be made to provide an alarm if no output occurs from As when S is pulsed. Also an alarm may be provided if an output from As appears when S is not pulsed. This latter alarm may be actuated by a relay connected to As which is so slow-tooperate as not to be affected by the output from As when S is pulsed. The arrangement may be used in a faultindicating circuit for a telecommunication switching system.