Patent GB-940733-A (GB)
Title: Improvements in or relating to pulse generating circuit
IPC: H03K5/04
Filed: 1960-03-01
Abstract: 940,733. Transistor pulse-generating circuits. BURROUGHS CORPORATION. March 1 1960 [March 11, 1959], No. 7236/60. Heading H3T. A mono-stable state circuit which delivers an output pulse of predetermined length at point B in response to the application of a trigger pulse at point 51 comprises two transistors 10, 20 coupled together and associated with a capacitor 32 to operate as a Miller sawtooth generator and a control circuit comprising transistors 30, 40 by which the transistor 10 is normally maintained non-conducting but is rendered conducting on the application of a trigger pulse to initiate the Miller run-down and to produce potential changes at point B which maintain the control circuit operative to hold the transistor 10 conducting until the transistor 10 bottoms, whereupon feedback ceases, the potential at point B rises, the control circuit reverts to its original state and the transistor 10 is switched off so that the circuit as a whole is restored to the quiescent state. In the quiescent state transistors 10 and 40 are cut off, the transistors 20 and 30 conduct, transistor 20 being conducting throughout the whole operation of the circuit and the potential developed at the emitter of transistor 20 being sufficient, in the quiescent state, to maintain the transistor 40 cut off. On the application of a negative trigger pulse at the point 51, transistor 40 is rendered momentarily conducting, whereby the base electrode of transistor 30 is sent negative, thus switching the transistor 30 off and causing the collector potential of transistor 20 to go sufficiently negative to permit the transistor 10 to commence conducting. The fall in potential at the collector of transistor 10 resulting from this is passed through capacitor 32 to the base of transistor 20 and thence to its emitter electrode to cause the potential at the point B to go suddenly negative, thus maintaining the transistor 40 conductive. A Miller run-down now occurs at the point A with the potential at the base electrode of transistor 20 remaining substantially constant until the transistor 10 bottoms, whereupon the Miller feedback ceases and the potential at the base of transistor 20 rises together with the potential at the point B. This causes the transistor 40 to revert to its non-conducting state, whereupon transistor 30 once more becomes conducting and transistor 10 is once more cut off, the circuit now being restored to the quiescent state. The collector potential of the transistor 10 in the quiescent state is determined by the tapping on a potentiometer 41; this determines the length of the Miller run-down and hence the length of the rectangular pulse developed at the output point B. The utilization circuit 65 may include a differentiating circuit to produce a delayed output pulse from the trailing edge of the pulse at B. The circuit may be modified to include an emitter-follower between the capacitor 32 and the base of transistor 20, Fig. 2 (not shown), and to include a further PNP transistor in parallel with the diode 21, Fig. 3 (not shown), this transistor being rendered conducting by a pulse derived from transistor 30 at the end of the active period so enabling the capacitor 32 to recharge rapidly from the potentiometer 41 and hence shorten the period Tc, Fig. 5b. Fig. 4 shows a circuit including both these features, the emitter-follower between capacitor 32 and the base of transistor 50 being constituted by a transistor 50 and the transistor 60 in parallel with diode 21 being switched on during the quiescent period by a pulse derived from a collector load 35 for the transistor 30. In addition the circuit of Fig. 4 provides for sharpening the trailing edge of the pulse produced at point B by means of a further PNP transistor 70 which conducts when the potential at the collector of transistor 10 reaches earth potential during the Miller run-down; this connects the base of transistor 20 to earth and causes saturation therein whereby its emitter potential rises to switch transistor 40 off and restore the quiescent state. This results in a sharp cut-off at the end of the voltage run-down instead of the short constantvoltage portion shown in Fig. 5b. Also temperature compensation may be provided by a temperature-dependent resistor 85; if silicon transistors are used, a silicon resistor with a positive temperature coefficient may be employed.