Patent GB-1354370-A (GB)
Title: Semiconductor devices
IPC: H01L27/07
Filed: 1971-06-17
Abstract: 1354370 Semi-conductor devices PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 17 June 1971 [20 June 1970] 28444/71 Heading H1K A monolithic integrated S/C device has a body 1 comprising N-type substrate 2 overlain by N-type epitaxial layer 3 of larger resistivity in which a group of bipolar transistors T 1 , T 2 , T 3 , T 4  &c. are formed whose emitter zones 4, 5, 6, 7 of, e.g. N-type, base zones 11, 12, 13, 14 of, e.g. P-type and collector zones 8, 9, 10 of, e.g. N type adjoin the surface 18; T 1  and T 2 , &c. forming one and T 5  and T 4  &c. another sub group insulated each from other with a common collector zone for T 3 , T 4 . A P-type buried insulation zone 15 and collector zones 7 of insulation material or P-type material surround collector zones 8, 9 of transistors T 1 , T 2 , while the substrate 2 and N-type zone 20 adjoining insulated zones 8, 9 form part of a common N- type collector zone 10 of transistors T 3 , T 4 . Base and emitter zones 13, 14 and 6, 7 are situate in the N-type zone 20 and transistors T 1 , T 2  are distributed between N-type insulated zones 8, 9 and mutually insulated; these zones comprising N-type buried layers 21, 22 more highly doped than the remainder 23, 24 of the zones adjoining the surface, so that the transistor collector resistance is reduced. The common collector zone 10 of T 3 , T 4  also comprises a N- type lined layer 25 more highly doped than the remainder 26 of the zone adjoining the surface, to reduce the collector resistance thereof. In fabrication, a P-type region 15 is boron diffused into a N-type silicon wafer 2 (Figs. 2, 3, not shown) and in and beside it N-type zones 21, 22, 25 are arsenic diffused. Thereon a N- type epitaxial layer 3 is overlain and boron diffused into surface 18 to provide P-type insulation zones 17, accompanied by diffusion of zones 15, 21, 22, 25. Zones 16 extend into zone 15 to insulate zones 8, 9. P-type base zones 11, 12, 13, 14 are boron indiffused and N-type emitter zones 4, 5, 6, 7 are phosphorus indiffused. The more highly doped zones 27, 28 of T 1  and T 2  are also phosphorus diffused simultaneously. Epitaxial layer 3 is oxidized to a silicon oxide layer 29 which may serve as a mask for diffusion of the zones mentioned above, or may be of silicon nitride, and the insulant layer is apertured to admit, e.g. aluminium conductors extending as a pattern of connections. The common collector zone 10 is connected over 31, e.g. a conductive plate soldered to substrate 2, or may have a N-type connector zone at 26 simular to connection zones 27, 28 receiving conductors through apertures of the insulant layer. The buried layers 21, 22, 25 may be omitted and a thicker epitaxial layer and lower impurity concentration provided in the substrate 2, where layer collector resistance is permissible (Fig. 4, not shown). In a modification (Fig. 5, not shown) the epitaxial N-type layer 3 is split into two layers of similar resistivity and the buried N-type collector layers 21, 22, 25 may extend on either side of the interface therebetween. In a further modification (Fig. 6, not shown) the substrate has a lower resistivity than the epitaxial layer only for a portion of its thickness from its exposed face to the interface with the substrate, so that the remaining thickness has a higher resistivity with a further interface; the buried P-type layer lying in the higher resistivity layer and the buried N-type layers expanding partially therein. The insulation zones may be connected to a potential reverse biasing the PN boundary junction, or left floating to reduce the effective capacity of the junctions. The sub groups may each comprise more than two bipolar transistors and may comprise, e.g. resistors and diodes. The S/C material may be a III-V compound and the conductivity types may be reversed. Numerous minor modifications are described.