Patent GB-1370449-A (GB)
Title: Sensing apparatus and arrays
IPC: H01L27/105
Filed: 1971-10-25
Abstract: 1370449 Television camera RCA CORPORATION 25 Oct 1971 [26 Oct 1970] 49422/71 Heading H4F [Also in Divisions G1 and H1] In a sensing apparatus comprising at least one row of bidirectional transistors formed on a common substrate, each transistor having two regions defining the ends of a conduction path and the paths being connected in series to form a transmission path to an output terminal, storage means is coupled between the control electrode of each transistor and one of the two regions, a first means is connected to the control electrode of every other transistor which with a second means connected to the control electrode of the remaining transistors alternately enable every other transistor and then the remaining transistors and each of a plurality of transducing elements responsive to externally applied stimuli and sharing the said substrate is connected to a different one of the storage means for discharging it in response to the stimuli. The invention is described with reference to columns and rows of photosensitive elements used for developing a video signal for television or for reading out data stored on a card. The transistors may be MOSTs, depletion type insulated gate FETs, bipolar transistors or junction field effect devices, and the charging and read out of the storage devices is clock controlled. Charges on. capacitors C 11-16 , Fig. 1, are leaked according to the light incident on respect reverse bias photo-diodes D 11-16  and read-out is controlled by a vertical scan generator 102 and a source of horizontal clock pulses 112 through bidirectional gate transistors TR 1-3 . Signals corresponding to the reduced charges are read out from terminal 40 under the control of sampling transistors T s1-3  and in response to the restoration of the charge deficit by a negative going H pulse through load resistor R 1 , signals corresponding to the charges being moved to the right, stageby-stage, in response to the H pulses which are bi-polar and three full cycles of which are required for a read-out. The read-out is of the charge deficit of an adjacent pair of capacitors. In a modification, Fig. 5 (not shown), adjacent rows share a common conductor and the arrangement provides for efficient use of silicon chip area, alternate rows being activated by respective ones of a pair of H clock pulse sources in conjunction with a vertical scan generator which includes two transistors for each stage. Formation of the integrated circuit is described and the use of photoconductors as an alternative to photo diodes is suggested. Source and drain arrangements shaped to achieve the desired capacitance 12, 13 (Fig. 2) are diffused in a silicon base and the gate electrodes are formed from a single strip running the length of the row. Oxide insulation is provided and is made thinner in the transistor channels and the drain regions to increase capacitance. The circuit includes the vertical scan generator H clock distributer switches, and the video readout transistors. A cross-section showing sources and drains of N conductivity in P conductivity material is described with reference to Fig. 3 and the actuating light may impinge on the top or bottom. Thicknesses are exemplified. Integrated circuitry for a modification including Schottky diodes for switching in photoconductors is described with reference to Figs. 8, 9 and 10 (not shown) and the Schottky diodes with the photoconductors may be cadmium sulfide or cadmium selenide in contacts of tellurium and indium. High sensitivity photoconductors may be formed by evaporation on glass, sapphire, or spinel. Photo transistors may be used.