Patent GB-718696-A (GB)
Title: Improvements in and relating to electric computers
IPC: H03K23/82
Filed: 1951-03-08
Abstract: 718,696. Electronic counting-apparatus. BRITISH THOMSON-HOUSTON CO., Ltd. March 8. 1951 [March 18, 1950], No. 5635/51. Class 106 (1) An electric counter comprises a chain of binary counting units, a matrix circuit for decoding a count registered therein, a switch for selecting one of a plurality of radices, means whereby a pulse derived from a potential in the matrix circuit is operable to reset the counting units after each count to the value of the selected radix and means for indicating the state of the count. Positive input pulses are supplied via a lead 35 to pentode coincidence gates 32, 33, of which the gate 32 is normally primed (as described below) to produce corresponding negative pulses at its anode which is coupled to a lead 21 forming the input to a binary counter 3 comprising four seriesconnected hard-valve trigger pairs. Each trigger circuit. inc'udes diodes 59, 60 so as to be responsive to negative pu'ses only and may be reset to represent zero by a negative pulse on a reset lead 22 connected to one grid of each trigger pair through a diode 65. The two anodes of each trigger pair are connected via leads 10, 11 to a matrix circuit of resistors 20, having sixteen output leads, corresponding, with the numbers 0-15 respectively to which indicating neon lamps N are connected. At any time, the output lead corresponding with the number registered in the counter is at a higher potential than any other lead and the corresponding neon lamp is alight. A switch 23 is set in accordance with the selected radix, the switch arm contacting the output lead of the matrix corresponding with the number which is one less than the radix chosen. When the counter registers this number, a unidirectional buffer circuit 34 (not described) produces a positive pulse over a condenser 92 at the grid of a triode 81 associated with a second triode 82 to form a flip-flop circuit 27 which produces an inverted and delayed pulse on a lead 78. This negative pulse switches a trigger pair 29 having two stable states from its normal condition to the condition in which the output leads 30, 31 are respectively at low and high potentials. These leads are connected to the control grids of the gates 32, 33 respectively, the suppressor grids of which are supplied with the positive pulses to be counted. The gate 32 is thus closed and the gate 33 is opened to produce, in response to the next input pulse, a negative pulse at its anode which is connected to the reset lead 22. All the triggers of the counter are thus reset to represent zero. The zero output lead of the matrix circuit then produces; over a buffer circuit 26 and the condenser 92, a positive pu'se at the flip-flop circuit 27: which resets the trigger 29 to close the gate 33 and re-open the gate 32 to the next input pulse. The counter may be manually zeorized by momentary depression of a switch button 38. which removes the negative bias from the left-hand grid of each of the counter triggers and of the trigger 29. The reset lead 22 may be connected directly to the input lead 21 of a second denominational circuit having a binary counter and matrix circuit with indicating lamps only. If more than two denominations are required, additional circuits like the circuit shown are used, the reset lead 22 of each being coupled through an inverting circuit to the input lead 35 of the next higher denomination. In a modification, diode coincidence gates, Fig. 5 (not shown), replace the pentode gates 32, 33 and are so arranged as to respond to negative input pu'ses on the lead 35. Thus, inverting circuits are unnecessary when several denominational circuits are couped together. The apparatus may be used to determine the remainder of a division operation. A number of denominational units are used depending on the size of the divisor' and the several radices are selected so that their product is equal to the divisor. A number of input pulses equal to the dividend are then applied after which the numbers indicated in the different denominational circuits may be multiplied by factors appropriate to the radices chosen and added to determine the remainder.