baber/WOPTO huggingface dataset:
Patent JP-H07218842-A (JP)
Title: Microscope image input/output system
Inventor: UCHIUMI MINORU
IPC: H04N5/225
Filed: 1994-02-09
Abstract: PURPOSE:To use no high-power lenses, to facilitate the focusing operation, and to perform the enlargement/reduction processing without the lens replacing operation to output a high definition image. CONSTITUTION:This system consists of a microscope optical system 1 provided with a low-power objective lens, a voltage impressing and exposed image recording device 2 which is exposed through the microscope optical system 1 and consists of an optical sensor having a photoconductive layer formed on at least an electrode and an information recording medium which races the optical sensor in contact or without contacting, a read means 3 which irradiates the information recording medium with read light and detects the transmitted or reflected light to read a microscopic image through an enlarging optical system, a picture processing means 4 which processes read image data, and an output means 5a to which data subjected to picture processing is transferred.
Patent JP-S54108655-A (JP)
Title: Multifrequency selection signal measuring instrument
Inventor: SAWADA SHIGEYA
IPC: H04L1/00
Filed: 1978-02-14
Abstract: PURPOSE: To well monitor the transmission conditions of two sets of frequency signals corresponding to selected figures by driving relays with the earth voltages generated at the reception of signals of different frequencies thereby controlling required displaying.  
     CONSTITUTION: Two sets of frequency signals consisting of the signals of frequencies f 0  and f 7  for selection figure 0 and others whose selection figure is the sum of the suffix numbers of the frequencies f are selected and are transmitted together with the signals of frequencies f 2  and f k , f 1  and f k  for transmission start and end. When these signals are received, earth voltages are generated from the terminals T 0 ... corresponding to the respective frequencies of a multifrequency signal receiver MF-REC and if the selection figures and two sets of the receiving signals are correct via relays OR..., the selection figures are displayed in an optical figure display device DI via relay C, contact circuit TC and the frequencies by the corresponding lamps D 0 ... of a receiving signal frequency display device LS. On the other hand, the lamp LRO, start, end and ready by the relays X, RO which actuate at the false time by a progressive state display device LG are displayed by respective lamps, thus the transmission conditions are well monitored. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H10196812-A (JP)
Title: Vacuum-operated fuel valve
Inventor: NAITO YUJI
IPC: F16K7/16
Filed: 1997-01-13
Abstract: PROBLEM TO BE SOLVED: To establish the opening or closing function of a vacuum-operated fuel valve for an associated fuel passage even during a rise in ambient temperature. SOLUTION: A fuel diaphragm 4 and a vacuum diaphragm 5 both made of rubber material integrally have, in their large-diameter protrusions 4E and 5D of their first and second locking protrusions 4C and 5B, metal cores 9 made of rigid material. A retainer 12 has a large-diameter bore 12C of inside diameters larger than the outside diameter of the large-diameter protrusions 4E and 5D, a first small-diameter bore 12E opening off the large-diameter bore 12C by way of a first annular locking step 12D onto the fuel diaphragm 4 on one side, and a second small-diameter bore 12G opening off the large-diameter bore 12C by way of a second annular locking step 12F onto the vacuum diaphragm 5 on the other side. The retainer 12 is divisible into two rejoined pieces 12A and 12B along its longitudinal axis X-X.  The retainer 12 united receives the large-diameter protrusions 4E and 5D at the large-diameter bore 12C, the small-diameter protrusion 4D of the first locking protrusion 4C at the first small-diameter bore 12E, and the small-diameter protrusion 5C of the second locking protrusion 5B at the second small-diameter bore 12G. The fuel diaphragm 4 and the vacuum diaphragm 5 are thus joined together by means of the retainer 12.
Patent JP-S55109014-A (JP)
Title: Sound quality control unit
Inventor: SUEYOSHI SUSUMU
IPC: H03G5/16
Filed: 1979-02-14
Abstract: PURPOSE:To increase the sufficiency of the low-pitched sound by lowering the interval of the acoustic signal of the music or the like by the fixed degree of octave and then adding it to the original sound. CONSTITUTION:The input signals are supplied to N units of band pass filters 1.1- 1.N featuring the different pass bands to detect the fundamental waves f11-f1N of the music input signals. This detection output is applied each to N units of dividers 2.1-2.N of 1/2<m> comprising the flip-flop to be turned into the rectangular signals featuring the frequencies of f1.1/2<m>, f1.2/2<m>...f1.N/2<m>. And this rectangular wave signal is supplied each to N units of high-band pass filters 3.1-3.N which eliminate the sine wave type signal component. On the other hand, the output levels of filters 1.1-1.N are detected through level detectors 4.1-4.N to generate the control signals. With these control signals, level controllers 5.1-5.N are controlled. And the output received the level control is added to the original sound via mixer 6.
Patent JP-H11214187-A (JP)
Title: Discharge lamp lighting device and lighting system
Inventor: KITAMURA NORIYUKI
IPC: H05B41/24
Filed: 1998-01-28
Abstract: PROBLEM TO BE SOLVED: To provide a discharge lamp lighting device which can detect mounting and dismounting of a discharge lamp by a simple configuration. SOLUTION: The waves of a voltage of commercial alternating current power supply (e) are rectified in a full wave rectifier circuit 14 to reduce the distortion in a low distortion circuit 21, and a self-excited inverter circuit 22 operates a transistor Q1 due to resonance of a series resonance circuit 23 and a return current of a current transformer CT1 and preheats and lights fluorescent lamps FL1, FL2. When either of the fluorescent lamps FL1, FL2 is removed, this discharge lamp lighting device detects a voltage of a capacitor C33 corresponding to a voltage of the transistor Q1 and applies it to a base of a transistor Q7 to increase impedance.  Consequently, a gate voltage of an electric field- effect transistor Q3 is reduced, an apparent capacity of a capacitor C11 is reduced, a resultant capacitance of capacitors C11, C12 is reduced, and a base current of the transistor Q1 is reduced to reduce an output voltage of the self-excited inverter circuit 22.
Patent JP-H11207935-A (JP)
Title: Centralized control processing system for gravure printer
Inventor: KAWANO TAKEYA
IPC: B41F13/12
Filed: 1998-01-28
Abstract: PROBLEM TO BE SOLVED: To suppress a manufacture of a fault printed product by shortening a correcting time of a printing position. SOLUTION: Since a loose amount of a film 52 is changed by a numerical control from a centralized control processor (computer) 2 by driving a compensating motor 62a of an AC servo motor at a position of a compensator roll, a correcting speed of a printing position in a flowing direction of a film is largely early set to 20 mm/min from a conventional 1 mm/min. Thus, at the time of initial registering and automatically registering, a printing deviation can be more rapidly eliminated for the set printing position. And, a manufacturing amount of a fault printed product of its deviated printing position can be remarkably suppressed, and in its cost, it can be largely advantageously manufactured.
Patent JP-H06227332-A (JP)
Title: Mounting structure of bumper face for vehicle
Inventor: YOSHINO HIROSHI
IPC: B60R19/24
Filed: 1993-02-03
Abstract: PURPOSE:To get off without forming a broad, large flange as well as to facilitate a rapping operation after forming a bumper face by installing a stiffener, to be connected to the flange, in an end of this bumper face, and attaching the stiffener to a car body at a position separate from a connecting position to the flange. CONSTITUTION:A stiffener 3 is connected to both first and second flanges 12 and 13 curved both upper and lower parts of a longitudinal parting part 10 at the end of a bumper face 1. In succession, this stiffener 3 is attached to a longitudinal flange 20 of a front fender 2 at a position separate from a connecting position to these first and second flanges 12, 13, and the longitudinal parting part 10 is joined to this flange 20. In consequence, the stiffener 3 serves as a substantial joining flange of the bumper face 1 to the longitudinal flange 20, so that these flanges 12, 13 are sufficient enough to be small things for connection of the stiffener 3, and thereby a rapping operation can be merely done by widening a little open the end of the bumper face 1. In this connection it is also connected to both third and fourth flanges 14 and 16 in the same manner.
Patent JP-S5298923-A (JP)
Title: Brake controlling device of dc motor
Inventor: YOSHIDA SUSUMU
IPC: H02P3/08
Filed: 1976-02-16
Abstract: PURPOSE: To pefform a stabilized plugging control by separating a motor armature circuit and field circuit upon plugging. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-H04263178-A (JP)
Title: Magnetic-head support device
Inventor: TAMURA KIYOSHI
IPC: G11B21/21
Filed: 1991-02-07
Abstract: PURPOSE:To reduce the interval between two magnetic heads at one pair of upper and lower magnetic-head support devices which are attached to a seek mechanism at a magnetic disk apparatus. CONSTITUTION:Mounting holes 7 at a rigid member 6 at the root end of a load beam 2 are made so as to be asymmetric with respect to the central line C-C so that flanges 4 at both side edges of the triangular head beam 2 at one pair of upper and lower magnetic-head support devices can be fitted alternately. Two magnetic-head support devices manufactured in this manner are taken up, the flanges 4 of the load beam 2 are faced with each other, and the mounting holes 7 at the rigid member 6 are matched. Then, the magnetic-head support devices are displaced from each other with reference to their central line C-C and also the faced flanges 4 are displaced from each other.
Patent JP-H08190741-A (JP)
Title: Production of magneto-optical recording medium
Inventor: SHIMOKAWA KENJI
IPC: G11B11/105
Filed: 1995-01-06
Abstract: PURPOSE: To produce a low noise garnet magneto-optical recording medium on a glass substrate. CONSTITUTION: A garnet magneto-optical recording medium consisting of an underlayer and a recording layer is formed on a glass substrate and the recording layer is crystallized by heat treatment. At this time, the rate of temp. rise is set at 3-50 deg.C/sec. A fine-grained garnet film ensuring low medium noise can be uniformly formed on the glass substrate in a short time.
Patent JP-S55107961-A (JP)
Title: Automatic calibration type signal converter
Inventor: SUTEIBUN JIEI ENGERU
IPC: G01D3/02
Filed: 1980-02-13
Abstract: PURPOSE: To convert large dynamic range of signal into an economical signal by correcting the intrinsic base, conversion coefficient and DC offset of an analog-to- logarithm converter to predetermined values with a calibration controller.  
     CONSTITUTION: The input from a signal source 2 is converted to logarithm through a logarithmic converter having an operational amplifier 4 and a feedback transistor Q, then converted to a digital work by an A/D converter 6, then fed through a multiplier 8 or the like for correcting the linearity, and then introduced into an exponentional converter 12. That is, a large dynamic range of signal is first converted to a logarithm on the basis of the base of predetermined value, converted  from analog to digital, and the offset value of the logarithmic converter is corresponded to the base predetermined at the step of digital work to be thus corrected  by a calibration unit 14 or the like, and is again converted, as required, into the  exponentional. Since the several segments of the signal of wide dynamic range are  expressed with less number of bits, the signal may be converted to an economical  signal. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S63184137-A (JP)
Title: Analyzing system for abnormally completion information in information processing system
Inventor: YANAGIHARA KOICHI
IPC: G06F9/48
Filed: 1987-01-26
Abstract: PURPOSE:To prevent an irrelevant process from being affected, by limiting a range completed corresponding to the content of abnormality generated in accessing to a shared resource. CONSTITUTION:A job is processed as a set of processes, and the access to the shared resource by a count type semaphore is performed between each process. When a process 100 accesses to the shared resource, the access to the shared resource is performed by issuing a counter addition request before the issuing of an instruction P, and a counter subtraction request is issued after the issuing of an instruction V, then, the access to the shared resource is completed. A counter adding means 30 and a counter subtracting means 40 perform the addition or subtraction of a system counter 10 when the access to the shared resource is performed on different jobs, and when it is performed on the same job, a job counter 11 is added or subtracted. When an abnormality completing means 50 is started up, a system is completed abnormally if the system counter 10 is not 0, and a job is completed abnormally if the system counter is 0 and the job counter is not 0, and the process is completed abnormally if both of them are 0s.
Patent JP-H03219979-A (JP)
Title: Multicolor image forming device
Inventor: KENMOCHI KAZUHISA
IPC: B41J2/525
Filed: 1990-01-26
Abstract: PURPOSE:To obtain a multicolor image having no possibility of deterioration in image quality even with the occurrence of misregistration or the like in each color image forming by a method wherein with respect to either the first or last color in printing, an image is formed at a screen angle different from that of another color. CONSTITUTION:A multicolor image signal A is converted to an analog signal (a) through a D/A converter 501 for every color content. On the other hand, a reference signal (b) determined for every color content is generated in a pulse pattern generator 502 and inputted to a delay line 506 to be delayed. At every counting action of a counter 505, a delay pattern is sequentially selected by a selector 507 in accordance with a delay pattern written in a pattern generator 504 to be outputted as a reference signal C. The analog signal (a) is compared with the reference signal (c) by a comparator 508 to be outputted as a PWM signal (d). The signal (d) is amplified by an amplifier 509 to be outputted as a processing signal B. By setting the screen angle of the first or last color different from that of another color, the misregistration, shade, and variation of color can be suppressed, and an image quality is constantly stabilized.
Patent JP-2000214936-A (JP)
Title: Power unit
Inventor: TAKEMURA RIKIO
IPC: G05F1/10
Filed: 1999-01-26
Abstract: PROBLEM TO BE SOLVED: To simultaneously output a secondary voltage from plural power panels by turning on all power supply switches without feeding a secondary voltage by a single power panel alone in a device having plural power panels. SOLUTION: This unit is provided with a photocoupler FC1 which makes a primary voltage an input, a switch SW1, a photocoupler FC2 which is subjected to on and off control by the switch SW1, a switching circuit 12 which is subjected to on and off control by the photocoupler FC2 and outputs an output voltage to a remote terminal 13 and the photocoupler FC1 and a secondary voltage control circuit 14 which makes an output signal of the photocoupler FC1 an input, decides a secondary voltage output and outputs a secondary voltage output, and respective power panels are connected to each other with the remote terminals.
Patent JP-S61176172-A (JP)
Title: Balanced type semiconductor light emitting device
Inventor: NITTA KOICHI
IPC: H01S5/00
Filed: 1985-01-31
Abstract: PURPOSE:To satisfy both enclosure of implanted carriers and reduction of a spreading resistance by providing clad layers of a balanced type semiconductor light emitting element which have a forbidden band width larger than an active layer and composing it out of a multilayer structure of different composition ratios. CONSTITUTION:On an N-GaAs substrate 11, an N-GaAs layer 12, N-GaAlAs clad layers 13, 14 and 15, a P-GaAs active layer 16 and a P-GaAlAs clad layer 17 are grown in the above order by an MOCVD method. The mixed crystal ratio of AlGs of the N-type clad layers 13 and 15 is 0.3-0.45, and the ratio of AlAs of the clad layer 14 is 0.1-0.25. In the LED of such constitution, the N-type clad layers 13-15 are larger than the width of a forbidden band of the active layer 16 so that the emitted light of the active layer 16 is not absorbed in the inside and is extracted. By the action of the clad layer 15, enclosure of the implanted carriers can be effected surely and by the action of the clad layer 14, the reduction of a spreading resistance can be contrived. Accordingly the enhancement of the output of light emitting characteristics can be contrived.
Patent JP-H07225700-A (JP)
Title: In-circuit emulator
Inventor: YAMAZAKI MASAYUKI
IPC: G06F11/22
Filed: 1994-02-10
Abstract: PURPOSE:To provide an in-circuit emulator for executing a monitoring program and enabling debugging. CONSTITUTION:This emulator is provided with a comparator 5 for comparing an instruction address 6 outputted by an MPU 1 with a comparison value 15 and outputting coincidence detection signals 10, a memory 2 provided with a function for prohibiting data output by interruption signals 8 for outputting the data of a pertinent address corresponding to the instruction address 6 from the MPU 1, an FIFO memory 3 provided with the function for permitting the data output by the interruption signals 8 for outputting data in synchronism with synchronous signals 9 from a control part 4 and the control part 4 for inputting the coincidence detection signals 10 and outputting the interruption signals 8 and the synchronous signals 9.
Patent JP-H05221444-A (JP)
Title: Paper-made cushioning holder
Inventor: OSAWA HIDEYUKI
IPC: B65D81/03
Filed: 1992-01-31
Abstract: PURPOSE:To obtain a cushioning holder which can be assembled and disassembled without requiring troublesome work such as gluing and stapling and easily disposed of and recycled. CONSTITUTION:A paper-made cushioning holder 1 is produced in such a way that both ends of a paper-made plate 2 are rolled up to form rectangular parallellopiped product holders 3 at both ends, and cushioning joint parts 4 with an L-shaped cross-section are formed at the opposite positions in the product holders 3, so that the sides and bottom of a product come in contact with side contact faces 5a and bottom contact faces 5b of the cushioning joint parts 4. Cut-raised flaps 7 are provided, which are raised from the middle of the paper-made plate 2 and provided with joint grooves that are joined to the opposite rising parts of the product holders 3. This constitution eliminates the need of holding with other materials (glue, staple, etc.) and assembling and disassembling work can be easily done. As a result, assembling and disassembling work is simplified and disposal and recycling of material become easy.
Patent JP-H02197217-A (JP)
Title: System stabilization device
Inventor: NISHIDA SHOGO
IPC: H02J3/24
Filed: 1989-01-26
Abstract: PURPOSE:To obtain highly precise demand and supply balance control by calculating an estimated value of a residual load after the recovery of voltage from the detection data of load active power and load voltage before and immediately after the voltage drop and after the recovery of voltage, by finding an estimated amount of load dropout amount and by deciding the load interruption control amount at the final stage. CONSTITUTION:Current and voltage data detected by sensors 23 and 24 is inputted into a system stabilization device 6, from which active power load-flow Ps and load active power portion are calculated and the data is sent to an arithmetic processing device 63. The load voltage detected by a denser 28 and the information on the circuit breakers 21 and 11 sent through a control cable 26 and a communication channel 12 are also sent to the device 63, with which an estimated value of the residual load after the recovery of voltage is calculated and the total dropout amount of the load is calculated. The load interruption control amount at the final stage can thereby be decided, so that the demand and supply balance control with high precision can be obtained.
Patent JP-H03220793-A (JP)
Title: Wiring-pattern intersecting method for printed board
Inventor: MINAGAWA EIJI
IPC: H05K3/40
Filed: 1990-01-25
Abstract: PURPOSE:To decrease the number of layers in a printed board and to decrease the number of via holes by inserting a connecting member into a connecting hole in the printed board, electrically bonding connecting conductors and lands, and making it possible to intersect wirings on the same layer. CONSTITUTION:A connecting member 15 wherein a plurality of connecting conductors 15-2 are embedded in an insulating body 15-1 is inserted into a connecting hole 13 provided at the intersecting point of wiring patterns 12-1 and 12-2 which are expected to be crossed. The end parts of the connecting conductors 15-2 are electrically bonded to lands 14 which are conducted to the wiring patterns 12-1 and 12-2. At this time, the wiring patterns 12-1 and 12-2 which are broken at the connecting hole 13 are connected without short circuits. Therefore, the patterns are crossed on the same layer. Thus via hole and inner-layer patterns for intersection for crossing the wirings are not required. In this way, the number of the layers in a substrate 11 can be decreased, the number of the via holes can be decreased and the cost of manufacturing can be decreased to a large extent.
Patent JP-H03220636-A (JP)
Title: Memory dumping system
Inventor: OKAZAKI HIDENORI
IPC: G06F11/34
Filed: 1990-01-25
Abstract: PURPOSE:To enable a higher-order user application program to dump a memory without restrictions on a key which can be used by incorporating a dumping routine in a communication module. CONSTITUTION:When the control is transferred to the communication module, the jump destination address of interrupt 2 due to depression of the key preliminarily set by the user application program is saved and the entry address of a dumping routine 4 in the communication module is set to complete the processing. The control is returned to the higher-order user application program after the saved jump destination address of interrupt 2 is set, and the control is transferred to the saved jump destination address of interrupt 2 set by the user application program when the dumping routine 4 terminates the dumping processing. Thus, the higher-order user application program can dump the memory without restrictions on the key which can be used.
Patent JP-S55110310-A (JP)
Title: Analyzing method for operation of process controller
Inventor: MIYANO YASUTAKA
IPC: G05B15/02
Filed: 1979-02-19
Abstract: PURPOSE:To make it possible to investigate the causes of a fault securely and immediately by finding results on the basis of input signals by using a simulation program when the fault occurs and then by detecting a fault point by collating them with real signals. CONSTITUTION:To simulate operations of controllers by using information collected from respective controllers 1, computer 4 is stored with programmed sequences. When a fault occurs, a sequence of operations of controllers 1 is sequentially simulated by using this program and collected data. Then, simulation results are collated with real signals so as to find and display a fault point on display unit 5. Further, computer 4 receives normally the operation states of controllers 1 of every constant period via process input-output device 2 and stores them in a specific memory in computer 4. When the memory is full, the oldest data is invalidated and substituted with up-to-data data by rewriting.