baber/WOPTO huggingface dataset:
Patent TW-492086-B (TW)
Title: Quality improvement method of read only memory tunnel oxide layer
Inventor: LIN YING-JEN
IPC: H01L21/28
Filed: 2001-06-04
Granted: 2002-06-21
Abstract: This invention provides a quality improvement method of read only memory tunnel oxide layer. After a field oxide layer, a nitride layer and a passivation layer are formed on a substrate, part of the nitride layer and the passivation layer are removed to expose part of the substrate. Subsequently, a silicate glass layer with high concentration of dopant ions is formed to cover the substrate and the passivation layer. A doped area on the substrate is formed by heating, which makes the dopant ions in the silicate glass layer diffusing into the substrate. After the removal of the silicate glass layer, the passivation layer and the nitride layer, a sacrificial oxide layer, a tunnel oxide layer and a polysilicon layer are formed to cover the substrate.
Patent TW-511093-B (TW)
Title: Apparatus of repairing memory cell and method therefor
Inventor: PARK CHUL-SUNG
IPC: G11C29/00
Filed: 2001-06-15
Granted: 2002-11-21
Abstract: The present invention provides a semiconductor memory cell repairing apparatus and method that can effectively repair memory cells although a various type of failures in memory cells are generated when a rule in the failure is detected. There is provided a memory cell repairing apparatus includes state fixing parts operable to fix a specific external input address signal out of external input addresses as a constant state, address input receivers operable to receive output signals of the state selecting part and external input signals, address code selecting part operable to receive output address signals of the address input receiver and to convert output address signal path through a control signal which selects address code change to output a changed address signal, and address input buffers operable to receive the changed address signal outputted from the address code selecting part to output a new internal address.
Patent TW-546603-B (TW)
Title: Display, display drive circuit and display drive method
Inventor: NAGAI YOSHIFUMI
IPC: G09G3/32
Filed: 2001-07-27
Granted: 2003-08-11
Abstract: The present invention relates to a display. Each horizontal driving section (3) and a driving control section (4) of a display apparatus have a data communication function. The driving control section (4) includes: a first communication section (5) receiving data from the external data, and a second communication section (6) communicating data with each horizontal driving section (3). The second communication section (6) adds individual identification information (23) for identifying each horizontal driving section (3) to the transferred data, and transfers the data in packet format. The horizontal driving section (3) receives the data packet (20) for it based on the identification information (23), and performs current driving for a display section (1). The driving control section (4) adds the individual identification information (23) to the control data to be transferred to each horizontal driving section (3) corresponding to connecting form of the horizontal driving sections (3), and transfers the control data unrelated to the connecting order of the horizontal driving sections (3). The horizontal driving section (3) side performs a receiving process and lighting operation.
Patent TW-525272-B (TW)
Title: Test methods for semiconductor non-volatile memories
Inventor: YOSHIMURA SATOSHI
IPC: G11C29/12
Filed: 2001-07-27
Granted: 2003-03-21
Abstract: In the test of semiconductor non-volatile memories having floating gates, a plurality of memory cells that are connected to an identical word line are programmed simultaneously. A voltage to complete programming these memory cells is the final voltage. After erasing all of the memory cells, a disturbance stress pulse train having voltages changing in increments are applied up to or before the final voltage. Almost simultaneously, the semiconductor nonvolatile memory is tested by measuring the lowest threshold voltage among the memory cells on each word line.
Patent TW-498413-B (TW)
Title: Bonding apparatus
Inventor: KITAGUCHI TETSUO
IPC: H01L21/52
Filed: 2001-08-03
Granted: 2002-08-11
Abstract: A bonding apparatus has a relay stage for a chip, a bonding head, and a substrate stage. The bonding head and the substrate stage are moved relatively so that the chip is bonded to the substrate. A delivery mechanism having a retention portion for retaining the chip and the substrate is provided movably relatively to the relay stage and the substrate stage. The chip retained by the retention portion is mounted onto the relay stage, while the substrate retained by the retention portion is mounted onto the substrate stage, or while the retention portion retains the substrate mounted on the substrate stage.
Patent TW-522412-B (TW)
Title: Inductance component having a permanent magnet in the vicinity of a magnetic gap
Inventor: ITO TORU
IPC: H01F3/14
Filed: 2001-08-03
Granted: 2003-03-01
Abstract: An inductance component comprises a magnetic core having at least one magnetic gap, means for generating a direct-current biased magnetic field produced by mounting a permanent magnet in the vicinity of a generally closed magnetic circuit which passes through the magnetic gap in the magnetic core or on the outside thereof, and a coil wound around the magnetic core, wherein the permanent magnet is mounted near the magnetic gap at one or more legs of the magnetic core which sandwich the magnetic gap.
Patent TW-497368-B (TW)
Title: Method of reducing plasma-induced damage
Inventor: CAMPANA-SCHMITT FRANCIMAR
IPC: H05H1/46
Filed: 2001-08-09
Granted: 2002-08-01
Abstract: A method of reducing plasma-induced damage in a substrate, comprising providing a post-deposition ramp down of a plasma source power used in generating a plasma for substrate processing. A method of plasma processing, comprising the steps of: (a) positioning a substrate in a chamber; (b) flowing one or more process gases into the chamber; (c) igniting a plasma from the one or more process gases by applying a plasma source power at a first power level; (d) depositing a material layer on the substrate; and (e) ramping down the plasma source power below the first power level.
Patent TW-502296-B (TW)
Title: Cleaning equipment for wafer pod and the cleaning method thereof
Inventor: TSAI WEN-SHAN
IPC: H01L21/00
Filed: 2001-09-05
Granted: 2002-09-11
Abstract: The present invention discloses a cleaning equipment for the wafer pod and the cleaning method thereof, which is to further configure the cleaning equipment on the conveyer of the stocker system adjacent to the port of the conveyer and the stocker, so as to remove the particles attached on the wafer pod, wherein the cleaning equipment comprises at least a reaction chamber, sensors, an inlet and a venting outlet, and further a de-static electricity configured in the cleaning equipment. When the wafer pod is conveyed from the port, nearest to the stocker, to the stocker, it will pass the reaction chamber of the cleaning equipment. Particles on the wafer pod will be blown away by the gas injected from the inlet of the reaction chamber, and the blown particles will be vented out through the venting outlet to reduce the particle pollution.
Patent TW-563177-B (TW)
Title: Method for transforming a pattern
Inventor: HUNG CHI-YUAN
IPC: H01L21/027
Filed: 2001-11-09
Granted: 2003-11-21
Abstract: The present invention relates to a method for transforming a pattern, more particularly, to a method for transforming a pattern from a photo mask to a photoresist layer, which is on a surface of a wafer, by using two phases of a exposure procedure. The first phase of the exposure procedure is to use the first light energy and the first photo mask to shine the photoresist layer which will be transformed the pattern to change characters of the photoresist layer. The first photo mask layer comprises the first pattern. The second phase of the exposure procedure is to use the second light energy and the second photo mask to shine the photoresist layer which will be transformed the pattern. The second photo mask comprises the second pattern which is distributed on the second photo mask uniformly or inuniformly. After proceeding a development procedure, if a positive photoresist layer is used to be the material of the photoresist layer, the partial photoresist layer, which is passed through two phases of the exposure procedure, will be removed to form the needed pattern on the photoresist layer. If a negative photoresist layer is used to be the material of the photoresist layer, the partial photoresist layer, which is passed through two phases of the exposure procedure, will be remained to form the needed pattern on the photoresist layer and to conform to following procedures, such as the etching procedure or the implanting procedure. All of the first light energy and the second light energy are lower than the development critical value. A value, which expresses to add the first light energy and the second light energy together, is higher than the development critical value.
Patent TW-I283265-B (TW)
Title: Polymerizable compound, polymerizable liquid crystal composition containing the same, and optically anisotropic medium made from the composition
Inventor: HASEBE HIROSHI
IPC: C07C261/00
Filed: 2001-11-13
Granted: 2007-07-01
Abstract: A polymerizable compound represented by formula (I), wherein Q1 and Q2 each independently represent a hydrogen atom or a methyl group; p and q each independently represent an integer of 2 to 18; X1 and X2 each independently represent a single bond, -O-, -COO- or -OCO-; L1 represents -COO- or -OCO-; L2 represents -CH2CH2COO- or -CH2CH2OCO-; and Y1, Y2 and Y3 each independently represent a hydrogen atom, an alkyl group having 1 to 7 carbon atoms, an alkoxy group having 1 to 7 carbon atoms, an alkanoyl group having 2 to 7 carbon atoms, a cyano group or a halogen atom. Also disclosed are a polymerizable liquid crystal composition containing the compound, and an optically anisotropic medium produced from the composition.
Patent TW-534860-B (TW)
Title: Process and apparatus for comminuting synthetic plastic waste material
Inventor: BACHER HELMUT
IPC: B02C18/22
Filed: 2002-01-14
Granted: 2003-06-01
Abstract: A process and an apparatus for comminuting waste of synthetic plastic material comprises a housing (1) in which at least one rotor (2) is bearingly supported for rotation around a, preferably horizontal, axis by a motor. The rotor (2) is provided on its periphery with comminuting tools acting onto the supplied material, in particular knives (6), counter tools, in particular counter knives (8), assigned to the knives, being stationarily disposed within the housing (1) forming a supply well (7) of great volume. The material disposed within the supply well (7) is pressed against the rotor (2) by a supply means which comprises at least two slides (17, 18) superimposed above each other and supplying the material to the rotor (2), which slides are independently from each other moveable against the rotor (2) or away from it. The front surface of the lowermost (17) facing the rotor (2) defines with the tangent (44) to the enveloping circle (26) of the comminuting tools (6) carried by the rotor (2) a substantially wedge-shaped intake gap (24) for the material to be comminuted. This intake gap (24) narrows to below up to its lower end.
Patent TW-I231291-B (TW)
Title: Method for reducing an oxygen component and carbon component in fluoride
Inventor: KIKUYAMA HIROHISA
IPC: C30B33/02
Filed: 2002-02-08
Granted: 2005-04-21
Abstract: To provide a method for reducing oxygen and carbon components in high-purity fluoride such as calcium fluoride, barium fluoride (not limited thereto), or in rare-earth fluoride such as ytterbium fluoride and cerium fluoride used for an optical fiber, a coating material and so on. It is characterized that the oxygen and carbon components contained in high purity fluoride are reduced by a fluorine gas treatment.
Patent TW-I250525-B (TW)
Title: Memory with a bit line block and/or a word line block for preventing reverse engineering
Inventor: CLARK WILLIAM M JR
IPC: G06F21/86
Filed: 2002-03-18
Granted: 2006-03-01
Abstract: A method and circuit for blocking unauthorized access to at least one memory cell in a semiconductor memory. The method includes providing. A switch and/or a link which assumes an open state when access to the at least one memory cell is to be blocked; and coupling a data line associated with the at least one memory cell to a constant voltage source in response to the switch or link assuming an open state.
Patent TW-I282732-B (TW)
Title: Device for pivotably connecting parts of an orthopaedic device
Inventor: VAN DE VEN PAUL GERARD
IPC: A61F2/66
Filed: 2002-03-21
Granted: 2007-06-21
Abstract: The invention relates to a device for pivotably connecting parts of an orthopaedic device, such as in particular a prosthetic knee for leg amputees, which device comprises a kinematic multibar mechanism with at least four bars, which bar mechanism allows a movement in the walking direction (L), in which device a first bar can be connected to a first part of the orthopaedic device, such as a thigh socket, a second bar can be rigidly connected to a second part of the orthopaedic device, such as a lower-leg part, a third bar, which is arranged at the front as seen in the walking direction (L), is pivotably connected to the first bar and is pivotably connected to the second bar, a fourth bar, which is arranged behind the third bar as seen in the walking direction, is pivotably connected to the first bar and is pivotably connected to the second bar, in such a manner that the connection between the second bar and the fourth bar can be displaced along an imposed path, and a centre part of the fourth bar, lying between the two ends of the fourth bar, being connected to the third bar, in such a manner that the connection between the third bar and the centre part can be displaced along an imposed path.
Patent TW-I276804-B (TW)
Title: Contact probe
Inventor: HAGA TSUYOSHI
IPC: C22C19/00
Filed: 2002-04-11
Granted: 2007-03-21
Abstract: The contact probe is made by forming on the substrate having conductivity resin molding having a vacant portion, and burying said vacant portion with metal by way of electro-casting, said metal contains cobalt-tungsten alloy. Or it can contain cobalt-molybdenum alloy instead of cobalt-tungsten alloy. It also can enhance the anti-abrasiveness by forming a contact probe with nickel, cobalt, or copper and forming a film of cobalt-tungsten alloy or cobalt-molybdenum alloy thereon. Nickel-molybdenum alloy can be used to replace cobalt-tungsten alloy or cobalt-molybdenum alloy.
Patent TW-533487-B (TW)
Title: The high switching speed of the power MOSFET by changing the poly structure
Inventor: JIAN FENG-TZUO
IPC: H01L21/28
Filed: 2002-05-14
Granted: 2003-05-21
Abstract: This invention provides a method of improving switching speed of the power MOSFET by changing structure of transistor gate, especially the one that, in a wafer manufacturing process, during the formation of the gate oxide layer and the poly gate, a portion of area is removed by hole formation to reduce surface area of the gate oxide layer and the poly gate so that the rising time (Tr=RC time delay) of the switching speed of the power transistor is increased due to the decrease of the gate input capacitance and thus the operation speed of the device is increased. The invention also takes into account of low power consumption and high frequency in the manufacturing process because the switching speed of the power transistor depends on the charge/discharge operation of the gate input capacitor, which requires a driving electric power proportional to the switching frequency. Moreover, the purposes of miniaturization and low power consumption can be achieved without the need of a heat dissipation device since the driving power is small.
Patent TW-I223269-B (TW)
Title: Write pulse limiting for worm storage device
Inventor: TRAN LUNG T
IPC: G11C17/16
Filed: 2002-05-30
Granted: 2004-11-01
Abstract: A method (400) and circuit (300) write a memory cell (210). The method (400) applies a pulse (370, 380) to a write line connected to the memory cell (210). The duration of the pulse (370, 380) is not predetermined. The method (400) compares a value on the input side of the cell (210) to a reference value. The method (400) discontinues the pulse (370, 380) on the write line, in response to the comparing step, preferably if the value on the write line exceeds the reference value. The circuit (300) comprises a pulse generator (310) and a comparator (330). The pulse generator (310) has an output and an enable input. The output is connected to a write line connected to the memory cell (210). The output, when enabled, carries a pulse (370, 380). The comparator (330) has two inputs and an output. One of the inputs is connected to the write line. The other of the inputs is connected to a reference. The output is connected to the write line, whereby the pulse is disabled or enabled on the write line depending upon comparator (330) output.
Patent TW-I268612-B (TW)
Title: Display device and a method for manufacturing the same
Inventor: SHIBA TAKEO
IPC: H01L29/786
Filed: 2002-05-31
Granted: 2006-12-11
Abstract: An image display device driven by thin film transistors formed on a substrate, wherein said thin film transistors are made of a polycrystalline silicon film formed on said substrate, crystal grains of the polycrystalline silicon film are grown in a specific direction within a surface of the silicon film to be long in its growth direction and short in a direction substantially perpendicular thereto, an arrangement direction of a source and drain of the thin film transistors is substantially aligned with a longitudinal direction of said crystal grains, said thin film transistors are divided into blocks each including at least one of the thin film transistor within the surface of the silicon film, at least one of said blocks is present in a periphery of a display pixel array, an arrangement direction of a source and drain of a plurality of thin film transistors included in said block is aligned with a horizontal or vertical direction when viewed from the surface of said silicon film within the same block, and a plurality of said blocks are present when viewed from an identical straight line of the horizontal or vertical direction.
Patent TW-567451-B (TW)
Title: Liquid-crystal display device having an auxiliary plate for mounting a substrate on a backside lid
Inventor: NITTO EIJI
IPC: G02F1/1333
Filed: 2002-06-13
Granted: 2003-12-21
Abstract: This liquid-crystal display device comprises a substrate, a backside lid, an auxiliary plate, a first mounting mechanism, and a second mounting mechanism. A circuit driving a liquid-crystal panel is provided on the substrate. The backside lid is provided at a backside of the liquid-crystal panel. The auxiliary plate is used for mounting the substrate on the backside lid. The first mounting mechanism is provided at a predetermined position on the backside lid so as to mount the auxiliary plate at the predetermined position on the backside lid. The second mounting mechanism is used for mounting the substrate on the auxiliary plate.
Patent TW-I232235-B (TW)
Title: Adhesive sheet for dicing
Inventor: YAMAMOTO SHOUJI
IPC: C09J123/16
Filed: 2002-06-20
Granted: 2005-05-11
Abstract: An adhesive sheet for dicing comprising a base film provided at least one surface thereof with an adhesive layer, wherein the base film comprises an olefinic thermoplastic elastomer comprising propylene and ethylene and/or alpha-olefin including 4 to 8 carbon atoms as polymerization components, and the peak melting temperature of the olefinic thermoplastic elastomer is 120 DEG C or more, is free of economical disadvantages with less reduction in the quality level of products and less generation of fibrous off-cuts during dicing. In particular, fibrous off-cuts occur less during dicing when the base film contains a crystal-nucleating agent. Further, generation of chippings during dicing can be prevented by incorporation of an ethylene series polymer into the base film.
Patent TW-569520-B (TW)
Title: Semiconductor amplifier circuit
Inventor: MIYAZAWA SHIGEMI
IPC: H03F1/30
Filed: 2002-06-25
Granted: 2004-01-01
Abstract: A semiconductor amplifier circuit comprises a transimpedance amplifier for amplifying an input signal; a by-pass transistor connected between an input terminal of the transimpedance amplifier and the ground potential; a first resistor, one end of the first resistor being connected to an output terminal of the transimpedance amplifier; a capacitor connected between the other end of the first resistor and the ground potential; a second resistor connected between the other end of the first resistor and the gate of the by-pass transistor via an inverter; and a differential amplifier having a signal input terminal connected to the output terminal of the transimpedance amplifier and a reference-voltage input terminal connected to the other end of the first resistor.
Patent TW-581716-B (TW)
Title: Material for use in carrier and polishing pads
Inventor: TOLLES ROBERT D
IPC: B24B37/04
Filed: 2002-06-28
Granted: 2004-04-01
Abstract: A material with a mesh of fibers and a binder material holding the fibers in the mesh can be used on a carrier head or a polishing pad. A polishing apparatus can include a pad cleaner with nozzles to direct jets of cleaning fluid onto the polishing pad and a brush to agitate a surface of the polishing pad.
Patent TW-563041-B (TW)
Title: Dynamic recording user behavior system and the method for the same
Inventor: YANG LI-WEI
IPC: G06F17/40
Filed: 2002-07-26
Granted: 2003-11-21
Abstract: The invention relates to a dynamic recording user behavior system, comprising a behavior receiving module, a behavior transforming module, a behavior vector database, a dynamic estimation element, an integration element and an information delivering module. The behavior receiving module receives a behavior that a user performs on the network. The behavior transforming module transforms the behavior into a new behavior vector. The behavior vector database stores at least one past behavior vector. The dynamic estimation element transforms the new behavior vector into a new transformed behavior vector, and transforms the past behavior vector into a past transformed behavior vector. The integration element integrates the new transformed behavior vector and the past transformed behavior vector into an integrated vector. According to the integrated vector, the information delivering module delivers information that the user is interested to the user. The specification also discloses a corresponding method of dynamic recording user behavior.
Patent TW-552688-B (TW)
Title: Structure for flip chip packaging
Inventor: HUANG TAI-CHUN
IPC: H01L23/28
Filed: 2002-07-30
Granted: 2003-09-11
Abstract: A structure for flip chip packaging is disclosed. The present invention is featured in that there's at least one hole or at least one slot in a metal layer, or there's at least one zigzag object on the side wall of the metal layer. Using the present invention, the adhesion between the metal layer and the inter-metal dielectric (IMD) is enhanced; the interlock effect between the metal layer and the IMD is produced; and the stress distribution is changed when the flip chip bumping structure endures the stress whereby the ability of the flip chip bumping structure enduring the stress is increased.