baber/WOPTO huggingface dataset:
Patent JP-S6245299-A (JP)
Title: Network synchronous circuit
Inventor: TOGOSHI TOSHIRO
IPC: H04M3/22
Filed: 1985-08-22
Abstract: PURPOSE:To prevent the secondary failure including a transmission line to a low-order station from a high-order one by detecting the fluctuation of an input frequency and controlling the self-advancing of a phase locked oscillator of high accuracy by the detected result. CONSTITUTION:An input 11 on which frequency information from the high-order station is overlapped, only the frequency information of which is taken out by a clock reproducing circuit 2, is supplied to a high accuracy phase locked oscillator 8 through a gate circuit 7. The output 17 of the oscillator 8, the jitter on the transmission line, etc. of which is fully eliminated, is outputted to a terminal 18 as the reference frequency of the station. When the frequency of receiving information is fluctuated, the phase outputs 14 and 15 of write/read addressing counter circuits 4 and 5 in a buffer memory 1 to adjust the input 11 for a station phase are inputted to a phase comparison circuit 6, and it is decided that the occurrence of two times or more phase shifts within a prescribed time is present or not, the oscillator 8 being separated, when it occurs, by a deciding output 23 through a gate circuit 7.
Patent JP-S6428187-A (JP)
Title: Driving device of elevator for wheelchair
Inventor: HATTORI KAZUO
IPC: B66B1/16
Filed: 1987-07-24
Abstract: PURPOSE: To secure the safe riding/alighting of the handicapped even without any special in-car operation panels by extending a door opening time at the time of arrival at a destination floor when a destination button in a car is operated with the passage of specified time after arrival at a calling floor in response to special landing call. CONSTITUTION: When a general landing button 2A is operated, a call is registered by a general landing call registering means 11 and, by pressing a destination button 6A within a specified time after getting in after a car arrives at a calling floor, the call is registered as a general car call by a cal call registration determining means 12, and control is performed for an elevator for general use by a control means 4 for general use.  On the other hand, when a special landing button 3 is operated, a call is registered by a special landing call registering means 15 and, by pressing the destination button 6A within a specified time after arrival, the call is determined as a special car call by the car call registration determining means 12, registered by a special car call registering means 16, control is performed for the elevator for a wheelchair by a wheelchair control means 17, and a door opening time at the destination floor is extended. Thus, the safe riding/alighting of the handicapped is secured even without installing any operation panels in the special car.
Patent JP-S5972731-A (JP)
Title: Manufacture of semiconductor device
Inventor: SADAMORI MASAAKI
IPC: H01L21/316
Filed: 1982-10-19
Abstract: PURPOSE:To minimize the warping of a wafer due to the difference in the coefficient of thermal expansion by a method wherein, when one main surface is glass-passivated, the other main surface is also coated with glass. CONSTITUTION:The grooves 5 individually dividing semiconductor elements are engraved on one main surface of a diode wafer 4 whereon P<+>N junction is formed by diffusing process to the depth exposing the P<+>N junction while the surface is also coated with lead glass to be printed by heat treatment at approximate 750 deg.C. At the same time, proper number of grooves 7 are engraved on the other surface on the positions not to disturb the formation of semiconductor elements and to print the other lead glass 8. The warping of the wafer 4 due to the difference in the coefficient of thermal expansion may be minimized by the lead glass 6, 8 on the both main surfaces when the wafer 4 is cooled from the glass printing temperature down to the room temperature due to slightly higher coefficient of thermal expansion of the lead glass 6, 8 than that of the wafer 4.
Patent JP-S5985152-A (JP)
Title: Interleaving processing circuit
Inventor: HIRANO YASUHIRO
IPC: G11B20/12
Filed: 1983-10-05
Abstract: PURPOSE:To attain a stable interleaving processing with less number of RAMs by converting a series input signal into parallel and controlling simultaneously the write and readout of plural different memories to two RAM groups alternately. CONSTITUTION:A time series input signal is converted into three parallel signals at a series-parallel converting circuit 11, an address generated at a write address generating circuit 19 is selected by selecting circuits 23-25, used as a write address and stored in the 1st memory group A comprising RAMs 12-13. The 2nd memory group B reads out the data by a readout address formed by readout address generating circuits 20-22 and selecting circuits 26-28 during the write and outputted via a parallel-series converting circuit 18, then the signal is converted into an interleaved parallel signal in the same speed as the input signal. The address is formed so as to be written and read at the same time to plural different memories in each group.
Patent JP-H0529986-A (JP)
Title: Termination detector for transmission line
Inventor: MASUO YASUHISA
IPC: H04B3/02
Filed: 1991-07-25
Abstract: PURPOSE:To easily confirm whether or not a termination resistor is set to a communication unit in the midway in addition to communication units at both ends. CONSTITUTION:A voltage Vx at a point A on a transmission line 1 is compared with a divided voltage Vx1 by resistors R2, R3 at a comparator 7 and with a divided voltage Vx2 by resistors R4, R5, at a comparator 8 respectively. The voltage Vx1 is set to a detection voltage of the transmission line 1 when three termination resistors are set. The voltage Vx2 is set to a detection voltage of the transmission line 1 when one termination resistor is set. When two termination resistors are set normally, outputs of the comparators 7, 8 go to an H level, a discrimination output S of an AND gate 9 goes to an H level and it is discriminated to be normal. When the two termination resistors are not set, either of the comparators 7, 8 goes to an L level and then a fault is discriminated.
Patent JP-S57110618-A (JP)
Title: Preventing device for age cracking of steel bar
Inventor: SETO TSUNEO
IPC: C21D7/00
Filed: 1980-12-27
Abstract: PURPOSE:To prevent age cracking of steel bars by pressing the steel bars to one direction with a bar steel pressing and conveying device while conveying and  giving blows to the end faces of the steel bars with a hammering device installed on the pressing side. CONSTITUTION:When a large number of steel bars A,... conveyed with a conveyance transfer 1 are placed on a steel bar pressing and conveying device 2, and revolving screws 5, 5' are turned, the steel bars A are pressed to a stopper plate 6 side with guidance of screws, by which they are transferred in an arrow direction. During this transfer, blows are given to the center of the end faces by the reciprocation of wire chisels 10,.... While blows are given to the right side end faces of the steel bars A by repeating this operation, they are fed to the next conveyance transfer 1'. There, the steel bars A are placed on the next steel bar pressing and conveying device 2', and while conversely the left side is pressed to a stopper plate 6' by means of revolving screws 5, 5', their left side end faces are hammered with the respective chisels 10' of a hammering device 3'.
Patent JP-S6428951-A (JP)
Title: Semiconductor memory device
Inventor: NAKAJIMA HIDEHARU
IPC: H01L27/10
Filed: 1987-07-24
Abstract: PURPOSE:To reduce a total occupied area and to realize the high density by a method wherein a switching transistor is formed on a top face of a pillar- shaped protruding part and a capacitor for information memory use is formed on the bottom side of a valley part in its circumference. CONSTITUTION:Pillar-shaped protruding parts 22 are arranged and formed on a semiconductor substrate 21 at two or more crossed parts in individual lines X and individual rows Y which are crossed at nearly right angles and which are situated at prescribed intervals. A capacitor C of MIS structure where a capacitor electrode 35 is applied to a lower sidewall of the individual pillar-shaped protruding parts 22 via an insulating film 27 is constituted; a source-drain region 29 composed of a region where an impurity has been introduced into an upper part, i.e. a top part, of the pillar-shaped protruding parts 22 is formed; a switching transistor Q of MIS transistor structure where a gate electrode 32 is applied to an upper sidewall of the pillar-shaped protruding parts 22 via a gate insulating film 30 is formed; individual memory cells M are constituted at the individual pillar-shaped protruding parts 22. After individual gate electrodes 32 have been connected mutually, respective common word lines W are extracted.
Patent JP-S6244826-A (JP)
Title: Electronic memo pad
Inventor: ISHIDA KATSUHIKO
IPC: G06F3/023
Filed: 1985-08-22
Abstract: PURPOSE:To increase the capacity of a memo and to improve the flexibility of the memo by forming a display device in one of plural pages and arranging many key switches in other pages. CONSTITUTION:The body 21 of an electronic memo pad is constituted of a CPU, a ROM, a RAM, a keyboard 23, key switches 24, etc. The key board 23 and the key switch 24 are arranged on both the side of the body 21 to increase the number of key switches, a fitting 25 for loose-leaf is set up on the center of the body 21 and thin boards of several pages are fitted to the fitting. Input contents are displayed on an LCD panel 22 and confirmed. Respective pages are electrically connected to the body 21 through a connector 27 and connection cables 26. Consequently, many kinds of contents such as a month schedule and daily schedule are stored and displayed.
Patent JP-H1129662-A (JP)
Title: Flame retardant resin composition and its molded product
Inventor: HAYASHI HIDEO
IPC: C08L23/12
Filed: 1997-07-10
Abstract: PROBLEM TO BE SOLVED: To obtain the subject resin composition, hardly deteriorating mechanical strength without producing scattered materials such as expanded graphite at the time of combustion and without having any color difficult to carry out the color matching and having a high level of flame retardance, further excellent light resistance and high fluidity by compounding a polyolefin having a melt index within a specific range with a sulfate of an aminotriazine compound. SOLUTION: This resin composition is obtained by compounding (A) 50-90 pts.wt. polyolefin-based resin having 7-100 g/10 min melt index at 230 deg.C temperature under 2.16 kg load (e.g. a polypropylene resin) with (B) 10-50 pts.wt. sulfate of an aminotriazine compound [e.g. a compound represented by formula I or II (R<1> and R<2> are each amino, a 1-5C alkyl, etc.; X is O, S or NH)] (e.g. melamine sulfate). The total amount of the components A and B is 100 pts.wt.
Patent JP-S57112005-A (JP)
Title: Molded coil for induction electric machine
Inventor: AKITAYA MASANORI
IPC: H01F27/32
Filed: 1980-12-29
Abstract: PURPOSE:To obtain a small-sized coil having a small insulation intervals with the adjoining coils which are arranged concentrically by a method wherein a vacant space closed to outside is proviced at the facial region opposing to a split molded coil, and the terminals connected to the end of the wiring circuit of the coil and the lead wire connecting these terminals are placed in the vacant space. CONSTITUTION:When an outer coil 2 and an inner coil 31 are concentrically wound around the circumference of a core 1, the inner coil 31 is consisted of two cylindrical coils 32 and 33 which were split in axial direction. These coils are formed by winding wiring circuits 32A and 33A around them, the circumference of the coils is molded by resin 34 and they are pilled up, their opposing surfaces 35 is conically shaped and fitted each other, and a concaved section 36 which is closed to outside is formed. Then, the terminals 37 and 38, which were connected to the wiring circuits 32A and 33A, are protruded into the concaved  section 36, and these terminals 37 and 38 are interconnected using a flexible conductor 39. Through these procedure, bare connecting sections are not directly opposing to the outside coils, and the insulation intervals of the two coils can be reduced.
Patent JP-H0237570-A (JP)
Title: Medium defect evading method
Inventor: KIMURA OSAMU
IPC: G11B20/10
Filed: 1988-07-27
Abstract: PURPOSE:To surely perform alternate allocation even when an intermittent error is generated and to improve reliability by performing an allocation processing with the same procedure without being conscious of a defective position in a sector by a controller at the time of performing the alternate allocation. CONSTITUTION:A data format control means 7 allocates an information identification area ID part and a specific data part as the alternate area of defective data. When an access request is issued from a host device 1, the means 7 is started up and the retrieval and the readout of a first ID part are performed. When no error is detected as the result of error inspection and flag shows a normal sector, ordinary read/write is performed. Also, when no error exists and the flag shows defective alternate, the specific data part is read out, and when no error is detected, the sector of alternate destination is accessed. When the error is detected for a prescribed number of times, an ordinary error processing is performed.
Patent JP-H0237501-A (JP)
Title: Magnetic recording system and magnetic recording device
Inventor: OTA NORIO
IPC: G11B11/105
Filed: 1988-07-27
Abstract: PURPOSE:To allow recording at a high density even with the medium having high coercive force and high saturation magnetic flux density by increasing the temp. in an information recording part and the peripheral part thereof during recording at the time of subjecting the magnetic recording medium having the high coercive force to recording, erasing and reproducing by using a magnetic head. CONSTITUTION:A recording film 2 consisting of Tb19Fe72Co18 is formed to 0.2mum thickness on an Al substrate 2 to constitute the magnetic recording medium having the high coercive force and high saturation density of 200Oe coercive force, 400emu/cc saturation magnetization and 350 deg.C Curie temp. Information is recorded with a gap length as 0.2mum by using a composite head 6 of a rotary floating type added with a medium heating mechanism at the time of recording the information in such recording film 2. An optical fiber 3 and a condenser 4 from a laser light source are provided to the heating mechanism and the surface of the medium 2 is irradiated with the laser light 5 via said fiber, etc. The high-density recording is enabled in this way and since the gap is made large as well, the generation of a head crash is obviated and two-fold larger output and >=6dB erasing ratio are obtd.
Patent JP-S6078035-A (JP)
Inventor: IWASAKI SHIYUUHEI
IPC: E04B1/24
Filed: 1983-10-04
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0472564-A (JP)
Title: Method for measuring immunity
Inventor: MUNEBAYASHI TAKAAKI
IPC: G01N33/531
Filed: 1990-07-13
Abstract: PURPOSE:To detect a non-singular reaction by making first and second pigment labelling particles both react with a sample liquid containing an antigen or antibody to be measured, and measuring changes in the respective signals of the first and second pigment labelling particles caused by an antigen-antibody reaction and a non-singular reaction, respectively. CONSTITUTION:A first labelling pigment which emits fluorescence or phosphorescence and an antigen or antibody of the same kind as or corresponding to an antigen or antibody to be measured are carried on first labelling carrier particles. A second pigment which is different in emission wavelength, excitation wavelength or emission life from the first pigment and a material which does not contain a part that is singularly bonded to the antigen or antibody to be measured are carried on second labelling carrier particles. The first and second labelling carrier particles are made to react with the antigen or antibody to be measured and changes in the respective signals of the first and second pigment labelling particles caused by respective singular and non-singular immunoreactions are measured from the intensity of the fluorescence.
Patent JP-2000017620-A (JP)
Title: Cloud prevention road reflection mirror
Inventor: YAMANAKA MINORU
IPC: E01F9/623
Filed: 1998-07-01
Abstract: PROBLEM TO BE SOLVED: To provide an inexpensive cloud prevention road reflection mirror capable of preventing the cloud of a mirror due to the adhesion of a contaminant such as dew condensation, dust and exhaust gas over a long period of time without maintenance. SOLUTION: A siliceous ceramic layer 25 comprising polysilazane or its denaturant is formed on the mirror face 22 of a mirror body 23, and an photocatalyst containing layer 26 giving hydrophilic property is formed on the outer face. The siliceous ceramic layer 25 comprising polysilazane or its denaturant protects the mirror face 22 from the oxidation decomposition action of a photocatalyst even if it is a thin film because it is a very fine film, no crack occurs even at the time of baking of the photocatalyst containing layer 26 because its heat resistance is excellent, no crack occurs even when it is curved because its curvature resistance is excellent, and furthermore the mirror face 22 is hardly injured because its durability is excellent and its thin film has high coating hardness.
Patent JP-S6161372-A (JP)
Title: Gas impermeable edge seal for bipolar gas distribution assembly for use in fuel battery
Inventor: AASAA KAUFUMAN
IPC: H01M8/24
Filed: 1985-08-26
Abstract: A bipolar gas reactant distribution assembly for use in a fuel cell is disclosed, the assembly having a solid edge seal to prevent leakage of gaseous reactants wherein a pair of porous plates are provided with peripheral slits generally parallel to, and spaced apart from two edges of the plate, the slit being filled with a solid, fusible, gas impervious edge sealing compound. The plates are assembled with opposite faces adjacent one another with a layer of a fusible sealant material therebetween the slits in the individual plates being approximately perpendicular to one another. The plates are bonded to each other by the simultaneous application of heat and pressure to cause a redistribution of the sealant into the pores of the adjacent plate surfaces and to cause the edge sealing compound to flow and impregnate the region of the plates adjacent the slits and comingle with the sealant layer material to form a continuous layer of sealant along the edges of the assembled plates.
Patent JP-S5975494-A (JP)
Title: Semiconductor storage device
Inventor: MATSUMOTO TETSUO
IPC: G11C11/41
Filed: 1982-10-25
Abstract: PURPOSE:To reduce the manufacturing cost and to improve the memory function, by providing a mode execution circuit and setting selectively the mode to form the memory having plural read/write modes with the same mask pattern. CONSTITUTION:A cell array 1 where plural memory cells are arranged in matrix is provided, a desired data is read out sequentially from the array 1 based on an address signal applied externally so as to write data in the array 1. In this case, mode executing circuits 8-11 execute plural different read/write systems. A mode selecting set circuit 8 transmits a signal selecting and executing one of the read/write systems.
Patent JP-H0850349-A (JP)
Title: Production of mask for photolithography
Inventor: SUDA MASAYUKI
IPC: G03F1/68
Filed: 1994-08-08
Abstract: PURPOSE:To decrease the device cost and to improve the resolution by forming a transparent conductive thin film on a mask substrate and giving electric conductivity thereto. CONSTITUTION:A mask substrate 1 and a electrode 2 for working are dipped in an electrolytic soln. 5 which fills a chamber 7. The mask substrate 1 and the electrode 2 are electrically connected to a current/voltage controlling device 4. The electrode 2 has at least one sharp tip and is wholly covered with an insulating material except the sharp tip. The electrode 2 is held by a stage 3 which can precisely and three-dimensionally move to a desired positions on the mask substrate 1. The stage 3 is controlled by a controlling device 6 for positioning. Voltage is applied between the mask substrate 1 and the electrode 2 so as to precipitate a material having light-shielding property such as metal on the mask substrate 1 or to dissolve a material having light-shielding property on the mask substrate 1.
Patent JP-H1029844-A (JP)
Title: Inorganic hardenable composition, inorganic formed body and its production
Inventor: OKANO TOSHINORI
IPC: C04B28/00
Filed: 1996-07-16
Abstract: PROBLEM TO BE SOLVED: To improve both mechanical properties and surface smoothness of the inorganic formed body by using an inorganic hardenable composition which has high water-filtration properties and enables a high yield of the inorganic formed body produced from it. SOLUTION: This hardenable composition consists of an inorganic hardenable material and reinforcing fiber. In this composition, as the reinforcing fiber, a combination of fiber (A) consisting of finely fibrillation cellulose that has 0.01 to 1μm average fiber diameter, 100 to 1,000μm average fiber length and an average axial ratio (L/D) of 2,000 to 100,000 and fiber (B) which is at least one kind of fiber selected from fiber (B1 ) consisting of fibrillation pulp fiber that has a 5 to 50μm average fiber diameter and a 1 to 5mm average fiber length and fiber (B2 ) consisting of organic synthetic fiber or inorganic fiber, that has 5 to 50μm average fiber diameter and 1 to 10mm average fiber length, is used. A slurry of the hardenable composition is subjected to papermaking and hardening to produce the objective inorganic formed body (cement formed body).
Patent JP-S6246320-A (JP)
Title: Touch panel input device
Inventor: HAMAZAKI TOSHIYA
IPC: G06F3/041
Filed: 1985-08-23
Abstract: PURPOSE:To assume distortion by means of the voltage of the intermediate tap even when the resistor of a conductive sheet is not equal and the distortion occurs at the voltage inclination at voltage application by providing the intermediate tap at the conductive sheet and detecting the voltage of the intermediate tap at the time of the voltage impression. CONSTITUTION:At the center of resistor of the upper side panel and the lower side panel, intermediate taps M and N are provided, the intermediate tap M is connected through a buffer amplifier 7m and a gate 8m to an A/D converting device 3 and the intermediate tap N is connected through a buffer amplifier 7n and a gate 8n to the A/D converting device 3. A CPU 2, when a voltage Vcc is applied to an upper side panel 10, gates 8a and 8b are turned on, the actual voltage between A-B is measured, at such a time, the gate 8m is turned on simultaneously, and the voltage of the center of the upper side panel 10 is also measured. The same operation is executed even when the voltage Vcc is applied to the lower side panel 20. By calculating the contact position based upon the voltage of the intermediate tap in addition to the voltage of the electrode terminal at both edges, the error due to the distortion can be corrected and the correct contact position is detected.