Patent GB-1301195-A (GB)
Title: Secondary radar reception systems
Inventor: OHYAMA TAKASHI
IPC: G01S13/78
Filed: 1970-03-11
Abstract: 1301195 Secondary radar systems TOKYO KEIKI KK 11 March 1970 [11 March 1969 17 April 1969] 11720/70 Heading H4D A radar system, Fig. 1, includes a primary radar 1 having an antenna 2 transmitterreceiver 3, indicator 4 and a secondary radar antenna 7 and receiver 8 for receiving signals returned by a transponder, wherein the secondary radar receiver is connected to a circuit 9 for confirming the secondary radar signals and wherein a common synchronizing control circuit 5 is provided for both radars. The circuit 9, Fig. 2, includes two delay elements D 1 , D 2  whose total delay is equal to the primary radar transmitter period TT. The delay of D 1  equals the time difference T1 between the response pulse and the single identification pulse of the transponder. In a first transmitter pulse cycle, AND gate AIa is opened by signal FR, thus the response pulse from receiver 8 applied to terminal U, passes to delay D 1 . After a time T1 this pulse is applied to AND gate A2a at the same instant as the identification pulse from the receiver is applied to the second gate input. The product is applied to delay D 2  and appears at the output thereof during the next transmitter cycle. Signal FR which is synchronized with the transmitter falls to zero for the next two transmitter cycles and thus the the pulse delayed by TT is applied back to the input of gate A1a where it coincides with the next response pulse from the secondary radar receiver 8. This process is repeated for two further transmitter cycles. At the start of the fourth cycle, signals FR and FR<SP>1</SP> reappear and the process begins again. The thrice multiplied pulse is read out through gate E delayed from the transmitter pulse by an amount proportional to the range of the secondary radar. The terminal U<SP>1</SP> is connected to the radar PPI where the range and azimuth of the secondary radar are displayed. In order to eliminate range errors due to a time delay caused by different pulse rise times, the delay D 2  output to gate E may be taken from an earlier delay element of the total delay and either read out directly or multiplied by the input signal from terminal U, thus ensuring that the output at U<SP>1</SP> coincides exactly with the response pulse. (Fig. 6, not shown). The system may be extended by the addition of extra delays equal to the time delay between further identification pulses (Fig. 4, not shown). If the transmitter period is not constant, the clock Q produces only a limited number of pulses after each transmitter pulse, so that the clock pulses may be resynchronized with every transmission (Figs. 7-8, not shown). In a modification for confirming signals from two secondary radars, each transmitting a response pulse followed by a single identification pulse, Fig. 9, the delay DL comprises n elements and is divided into four sections each section being connected to the next through multipliers G2, H1, H2. The first multiplier G2 multiplies the response pulse by itself and is situated in the delay at a point less than the width of the response pulse. The clock FQ produces n pulses subsequent to every transmitter pulse. The two separate secondary radars are selected by a gauged switch which moves contacts C1, C2, C3 with the contacts in positions a 1 , a 2 , a 3  multiplier H2 is fed with a "1" signal from FC thus effectively removing it. When the switch 11 changed H2 is replaced and H1 removed. The operation is similar to the previous embodiments except that at the end of each  transmitter cycle the multiplied pulse is stored in the delay at a time difference from the end thereof equal to TO, the delay between the transmitted pulse and the response pulse. At the start of the next transmitter cycle this is read out after a delay TO and either fed back to the input or read out to the PPI4.