baber/WOPTO huggingface dataset:
Patent TW-350942-B (TW)
Title: Network card checking method
Inventor: CHEN ZHEN-HUANG
IPC: G06K19/10
Filed: 1997-04-14
Granted: 1999-01-21
Abstract: A sort of network card checking method, including the following steps: (1) inserting a master card and the network cards into the ports on a computer motherboard and between the output/input port of the 2 network cards a transfer wire shall be connected for connection; (2) before testing, inserting on the BOOT ROM of the network card with a memory for individual or simultaneous recording of the network checking method; when the computer network goes on, by means of the BOOT characteristics, performing the network checking of the memories on the BOOT ROM saved in the network card, leading the computer into the checking environment; (3) the computer host performing the tests according to the network checking methods recorded in the memories; (4) after completing all the tests and determinating the cards pending for test, the Node ID of the card pending for test being added 1 for rewriting into the master card or the memory of the computer, for the testing method be recording automatically the Node ID saved in the memory of the master card of the memory of the computer and when testing a network card pending for test, for all the new network cards having a different Node ID value.
Patent TW-381371-B (TW)
Title: Silent start class D amplifier
Inventor: DANZ GEORGE E
IPC: H03F1/30
Filed: 1997-06-12
Granted: 2000-02-01
Abstract: Start up noise in a class D amplifier is corrected by adding an analog switch S1 to the integrator circuit A1. A resistor R3 in the feedback path of A1 prevents A1 from saturating. In an alternate embodiment silent start switch connects a variable resistance to the comparator input. The resistance gradually increases.
Patent TW-367655-B (TW)
Title: Symbol timing recovery circuit for a base band communication system having a plurality of channels
Inventor: KIM BEOM-SUP
IPC: H04L7/02
Filed: 1997-08-09
Granted: 1999-08-21
Abstract: A symbol timing recovery circuit for a base band communication system having a plurality of channels includes a main ADC-STR (analog to digital converter-symbol-timing recovery) unit and a plurality of sub ADC-STR units. The main ADC-STR detects a timing error of a first received signal and uses the detected value as a sampling signal of the first received signal. The plurality of sub-ADC-STR units compares the sampling signal generated from the main ADC-STR unit and a symbol timing signal following the first receive signal. Each of the sub ADC-STR units delays the sampling signal in accordance with the compared value for a predetermined time. The delayed signal is used as a sampling signal. The circuit employs a voltage-controlled oscillator VCO in a main ADC-STR circuit, but a VCO is not used in the sub-ADC-STR circuits, so as to delay an output signal of the main ADC-STR circuit and achieve a phase locked loop. Hence, mutual interference between the voltage-controlled oscillators is avoided.
Patent TW-387112-B (TW)
Title: Method for removing damage layer
Inventor: TSAI MING-HUAN
IPC: H01L21/3065
Filed: 1997-08-11
Granted: 2000-04-11
Abstract: The present invention discloses a method for removing damage layer of semiconductor resulted from high density plasma etching. The method includes (a) provide a CH3F plasma and (b) remove the damage layer by the plasma reacting with the damage layer. Thereafter, an etching layer with low-resistance and good profile is formed.
Patent TW-349152-B (TW)
Title: Device and method for driving at least one capacitive actuator
Inventor: HOFFMANN CHRISTIAN
IPC: H02N2/06
Filed: 1997-08-23
Granted: 1999-01-01
Abstract: A device for driving at least one capacitive actuator (P), which comprises: a charging capacitor (C) disposed between the positive electrode (+V) and the negative electrode (GND) of a power source which can be recharged by an energy source (V) via a switch (X1); a serial circuit installed into parallel to the charging capacitor and comprising an encompassing coil (L) (which is connected to the switch (X1)) and a charging cut-off switch (X3); an actuator circuit (S, S1) installed into parallel to the charging cut-off switch (X3) and characterized in comprising: a discharge switch (X4) connected to one end of the encompassing coil (L) and conducting a current to the coil (L); for each actuator, a serial circuit consisted of charging switches (X2.1 to X2.n) being connected to the encompassing coil (L) while conducting away the current, and actuators (P1 to Pn) per se and diodes (D2.1 to D2.n), the diodes being disposed between the actuators (P1 to Pn) and the other side of the discharging switch (X4), and conducting the current in the discharging direction; a diode (D) connected in parallel to one of the actuators (P1).
Patent TW-399093-B (TW)
Title: Composition for cutting or abrasive working of metal
Inventor: MILBRATH DEAN STANFORD
IPC: C10N40/22
Filed: 1997-08-20
Granted: 2000-07-21
Abstract: A composition for cutting and abrasively treating a metal or ceramic workpiece comprising a hydrofluoroether and a lubricious additive, wherein the amount of the lubricious additive, based on the total weight of the hydrofluoroether and the lubricious additive, ranges from 1.5% to 15% by weight, and wherein the hydrofluoroether is selected according to the formula: wherein: n is a number from 1 to 3 inclusive; R1 contains 1 to 4 carbon atoms and is selected from the group consisting of substituted and unsubstituted alkyl and its derivatives; R2 contains 3 to 10 carbon atoms and is selected from the group consisting of substituted and unsubstituted alkyl, aryl, and alkylaryl groups and their derivatives; with the proviso that at least one of said R1 and R2 contains at least one fluorine atom, and at least one of R1 and R2 contains at least one hydrogen atom; and further wherein one or both of R1 and R2 may contain one or more catenary or noncatenary heteroatoms; may contain one or more functional groups; may be linear, branched, or cyclic; may contain one or more unsaturated carbon-carbon bonds; and may contain one or more chlorine atoms with the proviso that where such chlorine atoms are present there are at least two hydrogen atoms on said R1 and/or R2 group.
Patent TW-359868-B (TW)
Title: DRAM capacitors and production process therefor
Inventor: CHIEN SUN-CHIEH
IPC: H01L21/02
Filed: 1997-08-21
Granted: 1999-06-01
Abstract: A method for producing a DRAM capacitor comprises: forming a transistor on a silicon substrate, the transistor comprising a source/drain region and a gate electrode, sequentially forming a stacked first insulation layer, second insulation layer, third insulation layer and hard mask layer covering the transistor, defining the hard mask layer, etching the hard mask layer, forming an oxide layer on the hard mask layer, forming a capacitance region on the oxide layer and the contact via opening exposing the source/drain region, forming a conductive layer covering the oxide layer, the hard mask layer, the sidewall of the contact via and the exposed source/drain region, removing the conductive layer above the oxide layer by a polishing process, removing the oxide layer thereby forming a lower electrode, forming a dielectric layer covering the lower electrode, and forming an upper electrode covering the dielectric layer thereby completing the production of the capacitor.
Patent TW-352391-B (TW)
Title: Novel cyanine dyes, the intermediates and preparation thereof
Inventor: HU DE
IPC: C09B23/00
Filed: 1997-09-06
Granted: 1999-02-11
Abstract: A cyanine dye having the following formula (I) is synthesized: wherein R1 represents -CH2-COOR2 (in which R2 represents -CyH<2y+1-m>Zm, wherein Z is halogen, y is an integer of 1-3, m is an integer of 1-7 and 2y+1-m >= 0, X^ represents an acid anion, and n represents an integer of 2 or 3.
Patent TW-358957-B (TW)
Title: Method of making color picture tubes having a mix of electron guns
Inventor: VAN RAALTE JOHN A
IPC: H01J29/48
Filed: 1997-09-18
Granted: 1999-05-21
Abstract: Method of making color picture tubes of similar sizes, including at least 2 different electron guns in mixture, having each of which a plurality of electrodes, having each of which an opening for passage of the 3-beam electron, including: selection of electrodes for making of at least 2 different electron guns, for 2 different electron gun focusing sensitivity of minimum tolerance.
Patent TW-345690-B (TW)
Title: Dummy wafer recoverable from ion implantation machine and recovery use method thereof
Inventor: LIN REN-TSORNG
IPC: H01L21/265
Filed: 1997-09-22
Granted: 1998-11-21
Abstract: A method for recovering a dummy wafer from an ion implantation machine, which at comprises: forming a silicon dioxide layer on a bare dummy wafer as a monitor wafer; carrying out at least one ion implantation process using the monitor wafer as a dummy wafer of the ion implantation process; and carrying out an etching process to etch a portion of the silicon dioxide layer on the dummy wafer when the ion concentration of the dummy wafer reaches a preset saturation dosage in the ion implantation process.
Patent TW-405303-B (TW)
Title: Determination of frequency offsets in communication systems
Inventor: KREMM STEVEN A
IPC: H04B7/01
Filed: 1998-03-26
Granted: 2000-09-11
Abstract: A method and apparatus for determining frequency offsets caused by oscillator error or Doppler effects in a user terminal (for example, a mobile wireless telephone) in a communication system. The system (100) includes at least one user terminal (124, 126) and a base station (112), or gateway (120, 122) for communicating with the user terminal (124, 126) through a satellite (116, 118) with predetermined known orbital positions or patterns. A communication signal (130, 132, 146, 148) is precorrected for known Doppler effects, such as between a gateway and a transferring satellite (146, 148), when used, and transmitted to a user terminal. The user terminal (124, 126) determines the signal frequency relative to a reference oscillator (240), and treats any detected difference as resulting completely from Doppler. The frequency difference is either transferred as data in reverse link transmissions (130, 132, 140, 142), or used as a pre-correction factor for such transmissions. The frequency of the reverse link user terminal signals is measured at the gateway (120, 122), again compensating for known Doppler effects, to provide a nominal error measurement. Measured frequency error or offsets are then divided in half to arrive at a Doppler shift error, or divided in half and scaled to the appropriate frequency to arrive at a user terminal oscillator error. The detected error can be transmitted to the user terminal (124, 126) for use in correcting the oscillator output frequency, or for adjusting the timing of, or time tracking for, the user terminal (124, 126). Alternatively, the detected error can be included as data in subsequent signals for use by gateways (120, 122) or base stations (112).
Patent TW-379423-B (TW)
Title: Method of making embedded DRAM
Inventor: LI JIN-YUAN
IPC: H01L21/8242
Filed: 1997-10-07
Granted: 2000-01-11
Abstract: A kind of method of making embedded DRAM by using the ONO capacitor dielectric layer in the memory region as gate dielectric layer in the logic region by not only taking care of the working characteristics under the different working voltages in the memory region and the logic region, but also saving manufacture steps and cost. This invention may also remove the NO structure in the logic region after forming the last 2 NO layers of ONO and keep forming silicon oxide to complete the ONO dielectric layer structure in the capacitor of the memory region. Leaving only a silicon oxide layer in the logic region as gate oxide layer, or removing the ONO etching in the logic region. Forming an oxide layer on the surface of the semiconductor substrate in the logic region can function as the gate oxide layer in order to obtain the same effect.
Patent TW-347363-B (TW)
Title: Method for improving demolding effect of a mold by a low temperature plasma process
Inventor: CHUN BAE-HYEOCK
IPC: B29C33/38
Filed: 1997-11-05
Granted: 1998-12-11
Abstract: A method for improving the demolding effect of a mold by using a low temperature plasma process, which comprises: (a) using one of a reactive gas plasma and an inert gas plasma to treat the surface of a mold; and (b) depositing a plasma polymeric film on the surface of the mold by using a plasma polymerization process.
Patent TW-395074-B (TW)
Title: Electric power conversion apparatus
Inventor: MORI NORIHITO
IPC: H02M7/5387
Filed: 1997-12-05
Granted: 2000-06-21
Abstract: This invention aims to provide an electric power conversion apparatus with a bus positioned at one side of a positive pole of a DC power for providing an highly economic standard power output. The apparatus has a small-sized circuit configuration, while does not need to use a switching modulator. The potential value at point U will be same point P when the switching element T1 of an upper arm is set at ON position. Electric current ic1 will pass through one side of the positive electrode of a power source 21. The power source is used for isolating the driven switching element T1 and diode D7. The capacitor C1 is charged consequently. Therefore, the power source VC of capacitor C1 will take the bus P positioned at one side of the DC power positive electrode as a reference power output.
Patent TW-365731-B (TW)
Title: A redundant switch of dual speed hub and the method
Inventor: CHEN MEI-YI
IPC: H04L12/46
Filed: 1998-03-20
Granted: 1999-08-01
Abstract: The invention deals with the redundant switch of a dual-speed hub with the method by using the CPU of a dual-speed hub (RISC) and through a media access control (MAC) for emission of test package, which is transferred accordingly through a hub, a switch and another hub to another MAC, which is used to check if the received test package is all right or in time, for determination of failure in the switch and in case so, an alarm being issued to the website control system, while turning off the switch and starting the other dual-speed switch in stack with the dual-speed switch as backup switch, for the stacked dual-speed hubs being operated normally and correctly in different transmission rates to accomplish the transmission of package data.
Patent TW-363068-B (TW)
Title: Method for producing polybutylene terephthalate
Inventor: OHME HIROYUKI
IPC: C08G63/85
Filed: 1998-03-27
Granted: 1999-07-01
Abstract: A method for producing polybutylene terephthalate comprising continuously esterifying a dicarboxylic acid component consisting essentially of terephthalic acid with a diol component consisting essentially of 1,4-butanediol followed by polycondensing the resulting oligomer, wherein the esterification is effected in a molar ratio, P, of the diol component to the dicarboxylic acid component to fall between 1.1 and 1.6, in the presence of a combination of an organic titanium compound and an organic tin compound that satisfies the following requirement: amount of organic titanium compound (mo1%) ≤ 0.08xP-0.07, where p= molar ratio of diol component to dicarboxylic acid component, and is followed by the polycondensation.
Patent TW-434871-B (TW)
Title: Antifuse structure and process
Inventor: BHATTACHARYYA ARUP
IPC: H01L23/525
Filed: 1998-04-17
Granted: 2001-05-16
Abstract: According to the preferred embodiment, an antifuse structure and method for personalizing a semiconductor device is provided that overcomes the limitations of the prior art. The preferred embodiment antifuse comprises a two layer transformable insulator core between two electrodes. The transformable core is normally non-conductive but can be transformed into a conductive material by supplying a sufficient voltage across the electrodes. The two layer core preferably comprises an injector layer and a dielectric layer. The injector layer preferably comprises a two phase material such as silicon rich nitride or silicon rich oxide. Initially, the injector layer and dielectric layer are non-conductive. When a sufficient voltage is applied the core fuses together and becomes conductive.
Patent TW-562827-B (TW)
Title: Process for preparing flexible to semi-rigid polyurethane integral foams
Inventor: EISEN NORBERT
IPC: C08J9/14
Filed: 1998-04-21
Granted: 2003-11-21
Abstract: The invention provides a process for preparing flexible to semi-rigid polyurethane moulded items with compacted edge zones with given hardness and a much more flexible cellular core, so-called integral foams, in which physical blowing agents from the set comprising C6 hydrocarbons are used.
Patent TW-379327-B (TW)
Title: Nonvolatile memory device having flash EEPROM cells
Inventor: LEE DONG-GI
IPC: G11C16/10
Filed: 1998-04-21
Granted: 2000-01-11
Abstract: A flash memory of the invention includes an array of memory cells having sources, drains, floating gates and control gates, the array including a conductive late formed over the memory cells to affect a capacitive coupling between the memory cells and the conductive plate, a first voltage source to supply a first voltage to the control gate of a selected one of the memory cells, and a second voltage source to supply a second voltage to the conductive plate after the control gate of the selected one of the memory cells has been charged up to a predetermined voltage level. Additionally, the invention provides a switching circuit to transfer the first and second voltages to the control gate of the selected one of the memory cells and the conductive plate, respectively, in response to a control signal.
Patent TW-593811-B (TW)
Title: Improvement in polyester yarn
Inventor: ALSTON PETER VAN
IPC: D01F6/62
Filed: 1998-05-20
Granted: 2004-06-21
Abstract: Polyester yarns whose polyester fibers are of simple oval peripheral cross-section of aspect ratio at least about 1.85:1 have shown better dye yield in fabrics than polyester staple fibers having lower aspect ratios. Such superior cross-sections for polyester staple fibers have also provided advantages in open-end spinning in providing yarns with fewer spinning failures than fibers of conventional round cross-section.
Patent TW-550243-B (TW)
Title: Water soluble polymer dispersions from vinylamide monomers and method for preparing thereof
Inventor: FONG DODD W
IPC: C08F8/12
Filed: 1998-05-20
Granted: 2003-09-01
Abstract: An aqueous dispersion comprising discrete particles of a water-soluble, polymer formed by the polymerization of monomers, said monomers comprising N-vinylamide monomers of the following formula: H2C=CR2NRC(O)R1, wherein R, R1 and R2 are each selected from the group consisting of hydrogen, C1-C20 alkyl groups, aryl groups and alkylaryl groups.
Patent TW-374974-B (TW)
Title: Method of manufacturing compound wiring substrates, flexible substrates, semiconductor devices and compound wiring substrates
Inventor: TAKUBO CHIAKI
IPC: H05K1/11
Filed: 1998-06-01
Granted: 1999-11-21
Abstract: The present invention provides a sort of compact, slim and highly reliable wiring substrate corresponding to the loading of semiconductor elements of high integrity. Connection of the adapter lane 11a of the wiring layer 11 disposed on the first face of the rigid first insulation layer 21 with the adapter lane 14a of the wiring layer 14 of the second face of the flexible second insulation layer 22 and the third insulation layer 23 between the first insulation layer 21 and the second insulation layer 22, and by means of the adapter lane 11a and the adapter lane 14a as well as the third insulation layer 23 by passing through as disposed as a conductor post for electrical and mechanical connection.
Patent TW-494358-B (TW)
Title: Microcomputer
Inventor: MAEDA SHOHEI
IPC: H01L21/822
Filed: 1998-07-21
Granted: 2002-07-11
Abstract: A kind of microcomputer is disclosed in the present invention. The microcomputer is composed of circuits constructing an input/output portion and the internal circuits such as a logic portion as well as a memory portion, and employs different power supply voltages, it is capable of transferring signals of different voltage levels between the internal circuit and the circuits constructing the input/output portion, and performing slew rate control. An input/output PAD portion 5 is provided with the followings: an input protection circuit 51, which is connected to an external terminal OT; an input/output buffer 52, which is connected to the input protection circuit 51; a TTL input detection circuit 53; a Schmidt type input detection circuit 54; and a voltage conversion portion 55, which enables reception and transmission of signals having different voltage levels among the internal circuits.
Patent TW-467763-B (TW)
Title: Agglomerated zeolitic adsorbents, process for their preparation and process for the recovery of paraxylene from aromatics C8 fractions
Inventor: PLEE DOMINIQUE
IPC: C07C15/08
Filed: 1998-08-21
Granted: 2001-12-11
Abstract: The present invention relates to agglomerated zeolite adsorbents based on faujasite with an Si/Al ratio such that 1 ≤ Si/Al ≤ 1.15, at least 70% exchanged with barium and optionally with potassium, and on a binder, preferably a zeolitizable binder. They are obtained by agglomerating zeolite powder with a binder, followed by exchange of the zeolite ions for barium ions and activation of the adsorbents thus exchanged. These adsorbents are particularly suitable for the adsorption of the para-xylene contained in aromatic C8 hydrocarbon fractions in the liquid phase, in processes of simulated fluid-bed type.
Patent TW-396574-B (TW)
Title: A method for fabricating T-type plug to increase contact area
Inventor: LIN CHING-FU
IPC: H01L23/522
Filed: 1998-12-21
Granted: 2000-07-01
Abstract: A method for fabricating T-type plug on semiconductor substrate comprises the following steps: form the first dielectric layer on a substrate and the second dielectric layer above the first dielectric layer, and define the second dielectric layer and the first dielectric layer to form a contact opening and bare the substrate. Thereafter strip the dielectric layer surrounding the contact opening, deposit a conformal barrier metal layer on the second dielectric layer and in contact opening, and deposit the first conductive layer in said barrier metal layer and conduct opening. After the first conductive layer and said barrier metal layer above the second dielectric layer is removed, the residual of the first conductive layer is the plug therefore.
Patent TW-484168-B (TW)
Title: Semiconductor device and method for manufacturing semiconductor device
Inventor: KITAZAWA MASASHI
IPC: H01L21/762
Filed: 1998-12-29
Granted: 2002-04-21
Abstract: The present invention relates to a kind of semiconductor apparatus and its fabricating method, in which trench isolation regions with different widths and oxide films with different thickness are formed on the same semiconductor substrate so as to eliminate the condition where bad filling is easily occurred due to too narrow trench width. A trench 2 with narrow width is formed in the memory circuit region 4, and the trench 200 with larger width is formed in the logic circuit region 5. A planarization process is then performed after CVD method is used to fill oxide material 3B into the trench Z. Thin oxide film 7 is formed at the active region by using a thermal oxidation method so as to form the gathering silicon layer 15A for gate electrode. An etching process is conducted in the memory circuit region 4, and a gathering silicon layer 15B is remained at the recessed portion 6. After that, CVD method is used to stack oxide film 11 so as to make the oxide film 11 have the first effect of covering the recessed portion 6, and have the second effect of forming a thicker oxide film by cooperating with the oxide film 7.