Patent GB-713476-A (GB)
Title: Improvements in or relating to multichannel electric pulse code modulation signalling system
IPC: G08C15/12
Filed: 1952-01-18
Abstract: 713,476. Electric selective signalling. GENERAL ELECTRIC CO., Ltd., BAYLISS, A. J., and PEDDLE, E. A. R. Jan. 7, 1953 [Jan. 18, 1952], No. 1521/52. Class 40 (1). The invention relates to a multiplex pulsecode-modulation signalling system, particularly for telemetry, in which a simple addition binary pulse code group is transmitted in each channel interval, there being a channel for each value being metered and a further channel for synchronising purposes. Transmitter operation, Figs. 1, 2.-The transmitter comprises a pulse generator P.G. whose output, shown in Fig. 2(a), is fed to a digit distributer DD which distributes the input pulses cyclically to output terminals "Blank, " D0, D1, ... D7. Each "Blank" output pulse Fig. 2(b) defines the starting time of a channel interval, and the succeeding pulses from D0, ... D7 define the times within the channel interval of the possible binary digit pulses. The " Blank " output pulses are fed to a channel distributer CD which produces successively and cyclically at the outputs CS, C1, C2, ... C10, impulses lasting for the duration of one channel interval. Fig. 1(d), 1(e), 1(f), 1(g), show e.g., the outputs from C1, C2, C8 and CS. The values to be transmitted, respectively, during the ten signal channels CH1, ... CH10, Fig. 1(h) are translated by respective coding devices, Fig. 13 (not shown), as described in Specification 703,578, into binary digital form. The values are sampled once per channel interval, sampling being initiated by a pulse from one of the outputs C1-C10 and completed prior to transmission. The coding devices K1-K10, only K4 of which is shown, actuate digital switches S0, S1-S7, through which associated digital gating devices G10-17, G20-27, G30-37, G40-47; ... &c. for the respective channels CH1, CH2, ... &c. are adapted to be actuated when concurrently energised by two pulses. The individual digital gates in each group, for example G40, 41-47, corresponding to channel CH4, are fed, respectively, with the outputs from D0, D1-D7, and in addition, all the individual gates of each channel group are fed in common from a respective one of the channel pulses C1-C10. The outputs of all the gates are applied in common over a line COL and an output.device OU to the transmission line. Thus the gating groups function sequentially to connect the individual coders K1-K10 to line, and the individual gates of each group function sequentially to send a digital pulse to line if the corresponding switch S0, Sl, ... &c., is closed. Fig. 2(h), (k) show examples of signal pulses sent during the successive channel intervals CH1, CH2-CH10. During the next channel interval-the synchronising channel interval-pulses are sent in all the possible digit positions, one lengthened pulse SP corresponding to the last two digit pulses being sent at the end of'the interval. These synchronising pulses are derived from gating circuits GS0, GS1- GS7, pulsed respectively by the outputs D0, D1, ... D6, and pulsed in common by the output CS of the channel distributer. The operation is' similar to that of the signal group gates except that, as pulses are required in each digital position, the input. pulses are applied directly to the gates. Further, both gates GS6, GS7 are pulsed from D6, the output from GS7 being fed to a synchronising pulse generator SPG which controls the output unit OU to produce the lengthened pulse SP. A further synchronising pulse representing zero current is also sent in the first digital position of each signal channel. Transmitter element circuit details.-The pulse generator PG is a standard relaxation oscillator, Fig. 3 (not shown), and the digit and channel distributers DD, CD, Figs. 4, 5 (not shown), both consist of a series of cold cathode triodes connected in a ring circuit and arranged to be fired sequentially by the input pulses, each tube as it fires extinguishing the preceding tube and producing a corresponding output pulse. Each group of signal gating circuits, e.g., G40-47, for channel CH4, consists of cold cathode diodes 50, Fig. 6, each of which fires only when its coder digital switch S0-S7 is closed and when it is pulsed simultaneously by the channel pulse, C4 in this case, and by the corresponding "digital-position-within-the channel " pulse, D0-D7. Each tube, as it fires, applies a positive pulse over line COL Fig. 7, to the output unit OU. The gating circuits GS0-GS6, Fig. 7, for the synchronising channel are similarly connected to the output unit OU but the output from gate GS7 is fed to the synchronising pulse generator SPG. The output unit consists of two cold cathodes triodes 56, 57, Fig. 7, connected in a " flip-flop " circuit having one stable condition in which triode 57 conducts. The input pulses from line COL fire the triode 56 and extinguish triode 57 which through a relay 58 applies positive pulses to line 61 over contact 59 from a +150 volt source 60. The constants of the circuit are so arranged that the unit reverts to its stable condition to end each line impulse after a time equal to one half the time between successive pulses generated at PG, thereby producing a one to one ratio of the mark-space periods of the line pulses. The synchronising pulse generator SPG similarly consists of two triodes 65-66 connected flip-flop fashion. The output pulse from the' digit gate GS7, which coincides with that from GS6 as both GS6, GS7 are pulsed from D6, fires the tube 65, extinguishes 66, and at the same time depresses the potential of the trigger electrode of triode 57 so that the seventh synchronising pulse is prolonged as shown at SP, Fig. 2. Modifications.-The output pulses on line COL may alternatively be used to actuate a radio frequency pulse generator for transmission by radio or H.F. cable. Receiver operation, Figs. 8, 9.-The line pulses received at 70 are fed to a line relay circuit LRC which converts the line pulses into corresponding pulses, Fig. 9(a), having a one to one mark-space ratio and desired amplitude. A portion of the LRC output is differentiated and clipped at DC, the output positive pulses of which, Fig. 9(b), coincident in time with the leading edges of the input line pulses, synchronise a pulse generator PG<SP>1</SP> with the pulse generator PG at the transmitter. The output pulses of generator PG', Fig. 9(c), are fed to a digit distributer DD', similar to that (DD) in the transmitter, the "Blank" output pulses from DD,' Fig. 9(d), operating a channel distributer CD<SP>1</SP> similar to that (CD) in the transmitter. Individual digit-gates DG0-DG7 are pulsed, respectively, by the outputs D0 -D7 of the digit distributer DD,<SP>1</SP> and in common by the line input pulses derived from the line relay circuit LRC. These gates respond only when pulsed simultaneously from both sources, so that during each signal channel interval, the digital signal pulses present in the channel sequentially operate their respective digital gates DG0-DG7 which pass pulses to respective digit present circuits DP0-DP7. Ten meter relay circuits MR1-MR10, corresponding to the ten values being transmitted, only. one of which MR4 is shown, are connected in parallel to the outputs of the digit present circuits. Under control of the channel distributer CD' and a transfer control circuit TC, pulsed from D7, the settings of the digit present circuits, DP0-DP7, are transferred at the end of each signal channel interval to corresponding digital relays in the appropriate meter relay circuit, and the digit present circuits are then zeroised, prior to the receipt of the next code group, by a relay circuit RC pulsed from the "Blank" digit distributer output. The circuit RC also causes the actuated digital relays in each meter relay circuit to lock until receipt of the next code group of the same channel. The actuated digital relays translate the binary value registered thereby into an analogue current which operates a meter. A synchronising relay, circuit SR actuated by the long synchronising pulse SP ensures synchronism of the digit and channel distributers of the transmitter and receiver. Receiver element circuit details.-The line relay circuit, Fig. 10, is similar to the output unit OU, Fig. 7, the line input at 70 producing corresponding 150 volt positive pulses at the output 74. The differentiating circuit DC includes a germanium crystal rectifier 78 which clips the negative pulses so that only the positive pulses corresponding to the leading edges of the input pulses are fed to the grid of the triode 85 of the pulse generator PG.<SP>1</SP> This is connected in a relaxation oscillator circuit similar to PG except that the triode grid is energised as described to synchronise the two pulse generators. The digit and channel distributers DD,' CD,' Fig. 11, consist of cold cathode triodes connected in ring circuits as for the transmitter. Synchronising transmitter and receiver distributers.-The synchronising relay circuit SR, Fig 11, ensures that the triode 110, corresponding to channel number, one, in the channel distributer ring 110-120, fires first after receipt of each long synchronising line pulse SP, and similarly ensures that the first triode, 90, of the digit distributer ring 90-98, is first to fire after receipt of the pulse SP. The line pulses from the line relay circuit LRC are fed to an integrator 131 in the synchronising relay circuit SR, the capacitor 132 of which only charges sufficiently to fire the triode 133 during the long synchronising pulse SP at the end of the synchronising channel interval. The triode 133 is connected in a flip-flop circuit with a triode 134 and is arranged to be fired only for a short but adjustable time to energise momentarily a relay 125 which changes over contacts 124. A normally energised relay 103 is thereby released, its contact 102 in the digit distributer DD' breaking the H.T. supply to all triode anodes therein except the " Blank " triode 98.