Patent GB-1470424-A (GB)
Title: System for measuring the velocity of a moving object
IPC: G01S13/60
Filed: 1974-08-23
Abstract: 1470424 Radar THOMSON-CSF 23 Aug 1974 [24 Aug 1973] 37231/74 Heading H4D A system which uses the Doppler effect to determine the component along a reference axis of the velocity of a moving object with respect to a fixed object comprises aerial means 1, Fig. 1, trained along said axis, transmitting means 2 coupled to the aerial means, and receiving means, also coupled to the aerial means, for receiving waves reflected by the fixed object. The receiving means supplies intermediate frequency sum (#) and difference (#) signals to a demodulating and combining means 4, which supplies #+kj# and #-kj# signals. k is a coefficient which depends on the estimated magnitude of the velocity vector of the moving object, on the angle between the velocity vector and the reference axis and on a pre-determined time duration T. A means 7 measures the phase difference between the # - kj# signal and the # + kj# signal after the latter has been delayed by the duration T, this phase difference being due to the Doppler effect, and being proportional to the required velocity component. The embodiment shown in Fig. 1 may be fitted aboard an aircraft. To determine the velocity vector fully, it is necessary to make measurements along three reference axes and this may be done, for example, by arranging for the aerial 1, which is of monopulse type, to be trainable along each axis in turn. A duplexer means 3 is provided for coupling the transmitter 2, and the sum channel of the receiver, to the aerial. A control circuit 5 supplies the coefficient k to the demodulating and combining means 4. Its value is given by the equation, where q is a system constant, # is the wavelength of the transmitted signal, and g a , s a  are projections on orthogonal planes of the angle between the velocity vector and the reference axis, and may be obtained by means of position detectors. In estimating V use may be made of a conventional speed indicator. The system is applicable to CW as well as pulsed transmitters, and in the latter case, T is made equal to the pulse repetition period. Also supplied to the means 4 is a reference signal for demodulation from an oscillator the phase of which is held coherent with the oscillations of the transmitted signal. A means 6 provides the delay T for the demodulated combined # + kj# signal. The output signal from the measuring means 7 may be applied to a display device on the pilots instrument panel. In another embodiment (Fig. 2, not shown) the output from the measuring means (7) is amplified and integrated before being applied to the display device. The resulting signal is also available as a modulating input to a single sideband frequency modulator, interposed between the coherent reference signal oscillator and the demodulating and combining means (4). The purpose of the control loop formed in this way is to avoid possible measurement errors by reducing the pass-band of the system so cutting down noise and improving dynamic accuracy. An ancillary signal generator is provided which may be switched to the modulating input of the frequency modulator for setting-up purposes. Fig. 3 shows details of the demodulating and combining means 4. The sum signal # and the difference signal # are first demodulated, using the reference signal from the frequency modulator 9. An amplitude and phase detector 401 receives the # signal on the one hand and the reference signal on the other and it supplies the demodulated # signal. A second amplitude and phase detector 402 receives the # signal and the reference signal after its phase has been shifted by 90 degrees in a phase-shifter 403 and supplies a demodulated signal j#. Signal # is demodulated in identical fashion using two amplitude and phase detectors 404 and 405 and a 90 degree phase-shifter 406, so as to obtain demodulated signals # and j#. These latter signals are then applied to two multiplier circuits 410 and 411 which are controllable-gain amplifiers and at the outputs of which appear the signals k# and jk#. Sign-changing circuits 430 and 431 are connected to the outputs of multipliers 410 and 411 respectively. These circuits change the sign of their input signals during one cycle out of two, the sign remaining unchanged in the other cycles. A first adder circuit 420 is connected to the outputs of detector 401 and sign-changer 431. A subtractor circuit 421 is connected to the outputs of detector 402 and sign-changer 430. In the course of a first cycle, circuits 420 and 421 supply signals # + kj# and j(# + kj#) respectively. In the next cycle they therefore supply # - kjA and j(# - kjA). The sign-changing circuits are actuated simultaneously from the overall synchronizing means for the radar system, which are represented by circuit 440. The value of the coefficient k is calculated in a circuit 450. The signals # + kj# and j(# + kj#) from one cycle are filtered in integrators 460 and 461 and then switched by a switch 601 to a first section of a memory 602. In the next cycle signals # - jk# and j(# - jk#) are switched, after being integrated, to the second section of memory 602. Switch 601 is controlled by the synchronizing circuit 440. The measuring circuit proper 7, then measures the difference in phase between the contents of the two sections of the memory. The integrating period of integrators 460 and 461 is of a welldefined duration. The beginning and end of integration are governed by the overall synchronizing apparatus for the radar. The integrators thus perform the functions of range gates. In Fig. 4, the phase-measuring circuits are shown in detail. Each of the two sections of the memory 602 contains two signals which are in quadrature with each other. Signals are recorded in the two sections of the memory by means of switch 601, which selects the section where recording will take place, and by means of the synchronizing circuit 440 which gives instruction for recording. Recording takes place as soon as the period of integration has ended in integrators 460 and 461, as shown by waveform B in Fig. 5 relating to the integration period and waveforms C and D relating to recording. Circuit 440 also gives instructions for the content of the memory to be read out in one cycle out of two, as shown by waveform E in Fig. 5. The two outputs of the first section are connected to two multiplier circuits 701 and 702. The two outputs of the second section are connected to two other multipliers 703 and 704. Each of the multipliers has a second input and this is connected to an oscillator 705 the frequency of which is designated f 0 . This oscillator has two outputs which supply two signals which are in quadrature with each other. The sine output is connected to multipliers 701 and 704 and the cosine output to multipliers 702 and 703. A two-input subtractor 706 is connected to the outputs of multipliers 701 and 702. An adder 707, which likewise has two inputs, is connected to the two multipliers 703 and 704. Circuits 706 and 707 are followed by limiters 708 and 709 respectively. The two inputs of a phase-detector 710 are connected to the outputs of the two limiters and the detector supplies at its output a signal proportional to the phase difference between the input signals, that is to say an indication of the velocity of the moving object when the control loop is open. Any dissymmetry in the two memory channels, or between them and the phase detector causes an undesirable D.C. voltage to appear at the output of detector 710, when the measurement system is operating as a closed loop. This voltage, when integrated, may be considerable and may displace the demodulation reference. To overcome such a defect, the calculating channels along which the signals travel are changed over from one pair of cycles to the next. During the first two cycles signals #+jk# and j(# + kj#) are stored in the first section of the memory and signals # - kj# and j(# - kj#) in the second section. They are then processed by the appropriate circuits. In the course of the next two cycles signals # + kj# and j(# + kj#) are stored in the second section of the memory and signals # - kjA and j(# - kjA) in the first section. To prevent the phase difference being evaluated in the negative direction, a signchanging circuit 711 is placed at the output of detector 710. This being so, the continuity of the phase measurement is preserved while the measurement error is cancelled out every four cycles. The output of the sign-changer is connected to the integrator 10 in the control loop which was described above with reference to Fig. 2. Since integration takes place over a large number of cycles, any error due to dissymmetry is reduced to virtually zero. Switch 601 thus changes position one cycle out of two, as does the sign of sign-changer 711. The invention is also applicable to acoustic waves, e.g., for measuring the velocity of a ship, using the sea-bed as the "fixed object".