Patent GB-866148-A (GB)
Title: Improvements in or relating to switching circuits
IPC: H03K23/76
Filed: 1958-12-30
Abstract: 866,148. Circuits employing bi-stable magnetic elements. COMPAGNIE DES MACHINES BULL. Dec. 30, 1958 [April 4, 1958], No. 42087/58. Class 40 (9). [Also in Group XIX] Each stage of a distributer, ring counter or shift register comprises a magnetic storage core and an associated bi-stable circuit composed of two cross-connected transistors, the output of one transistor when conductive being used to provide a stage output and to switch the associated core from one remanent state to the other, while restoration of the core to its original state by a stepping pulse transfers the conductive state to the other transistor in the stage and at the same time causes the initial bi-stable circuit condition to be set up in the transistors of the next stage. The distributer embodiment, Fig. 3, is intended for use with a magnetic memory matrix, Fig. 1, in which separate read and write windings 12, 13 are associated with the matrix cores 11 in both column and row relationships. The distributer 20 described is associated with the row windings, and produces a unidirectional pulse in a read or a write winding of a single row whenever a common read L or write R contact is closed, depending on the operative stage I-VI of the distributer at that time. Only the first and last stages I and VI of the distributer are shown in Fig. 3, each stage including transistors T1, T2 the bases B1, B2 and collectors C1, C2 of which are cross-connected. Operation is commenced by applying a negative pulse to the bases of all the transistors T1 so that conduction takes place and the transistors T2 are cut off. A pulse is then applied to a winding 52 on all the cores 46 so as to set them in the same " P " state of magnetic polarization. A positive pulse is then applied to the base of transistor T1 in the last stage VI so that transistor T2 in this stage alone becomes conductive. Switch L in the matrix, Fig. 1, is then closed and transistor T2 passes reading current through the lowest row winding of the matrix. As winding 51 on the stage VI core is in the series path, this core reverses its magnetic polarization to state " N." The distributer is now ready for sequential operation stage-by-stage under the control of stepping pulses applied periodically to a common winding 47. The first stepping pulse restores the core of stage VI to state " P " and induces outputs in windings 48 and 50, the voltage in winding 48 being fed back over 27 to the first stage I where it renders transistor T1 non-conductive and T2 conductive, while the voltage in winding 50 reverses the bi-stable state of the transistors in the last stage so that T1 becomes conductive. Reading and writing operations may now be effected in the uppermost row of the matrix by appropriate closure of switches L and R, the necessary current being supplied by the conductive transistor T2 in the first stage. As reading or writing current to the matrix passes through winding 51 on the core of stage I, this core reverses its magnetic polarity to state " N " and remains in this state until such time as the next stepping pulse is received, when it is restored to state " P." Outputs are induced in the windings 48 and 50 and as previously described the bi-stable states of the transistors in the present stage I and the next stage II are both reversed. Stage II is then the next stage to supply read and write pulses to its associated winding and so on. In a modification, Fig. 5, each winding 51 is connected in the circuit between the collector of the associated transistor T2 and the source of collector potential, and a core is then changed from state " P " to stage " N " immediately the transistor T2 in the stage becomes conductive. With this modification the cascaded stages function as a ring counter of stepping pulses. In a further modification the connection between winding 50 and the base of T2 in the Fig. 5 arrangement is omitted, and the cascaded stages operate as a shifting register with paralleled inputs on terminals 25 under the control of spaced stepping pulses applied to the base of transistors B1 and windings 47 respectively. All the arrangements described include an additional winding 49 on each core which is wound in the opposite sense to winding 48. The outputs of all the stages may be switched over together from windings 48 to 49, Fig. 2 (not shown), and in this way the direction of propagation along the cascaded stages is reversed.