baber/WOPTO huggingface dataset:
Patent JP-H07208530-A (JP)
Title: Motion state detecting device for cylindrical damper
Inventor: UCHIYAMA ATSUSHI
IPC: B60G17/00
Filed: 1994-01-21
Abstract: PURPOSE:To dissolve the change with the lapse of time by reducing the dimension of an extension/contraction detecting mechanism, forming the mechanism integrally with a cylindrical damper, and obviating the necessity of a movable part, by installing a calculation part for detecting the relative motion state between a piston and a cylinder on the basis of the output of a magnetic resistance element. CONSTITUTION:A piston rod 16 penetrates through a cap 14, and at the lower end, a piston 18 which slides in an inner cylinder 12 is installed. The piston 18 dividedly forms two oil chambers in the inner cylinder 12. A permanent magnet layer formed on the piston rod 16 forms the alternating magnetic field having a certain pitch lambda in the lengthwise direction, in the peripheral direction of the piston rod 16. Two pairs of magnetic sensors 30a and 30b fix two pairs of magnetic resistance elements 32A and 32B in each, keeping a phase difference of lambda/4 in the axial direction of the piston rod 16. A calculation part 48 consists of A/D converters 50 and 52 and a COU 54, and detects the relative motion state between the piston 18 and the cylinder 12 on the basis of the outputs of the magnetic resistance elements 32A and 32B.
Patent JP-S62179192-A (JP)
Title: Semiconductor light emitting device
Inventor: HINO ISAO
IPC: H01S5/227
Filed: 1986-01-31
Abstract: PURPOSE:To reduce a thermal resistance by a method wherein the side surfaces of a double-hetero structure filled with GaInP or GaP whose composition has a larger energy gap than the energy gap of an active layer and a lattice constant different from the lattice constant of GaAs. CONSTITUTION:An n-type (Al0.6Ga0.4)0.5In0.5P cladding layer 102, an undoped (Al0.17Ga0.83)0.5In0.5P active layer 103, a p-type (Al0.6Ga0.4)0.5In0.5P cladding layer 104 and a p-type GaAs layer 105 are successively formed on an n-type GaAs substrate 101 by epitaxial growth. Parts of the epitaxial layers which are not covered with SiO2 are removed by etching to form a mesa-shape stripe and, successively, iron-doped Ga0.7In0.3P is made to grow again by MOCVD. At that time, Ga0.7In0.3P does not grow on the surface of SiO2 and iron-doped insulating Ga0.7In0.3P108 grows on the parts which are not covered with SiO2 and the mesa-shape stripe is filled to form a buried hetero structure. After that, SiO2 is removed and a Ti/Pt/Au p-type electrode 106 and an Au/Ge n-type electrode 107 are formed to complete a device.
Patent JP-H04258131-A (JP)
Title: Solder bump forming method and solder ball
Inventor: OZAWA TAKASHI
IPC: H01L21/60
Filed: 1991-02-13
Abstract: PURPOSE:To provide for a solder bump forming method for enabling a solder ball to be mounted to an electrode pad with improved wettability for formation of the solder bump for packaging semiconductor parts highly densely. CONSTITUTION:A solder bump is formed by using a solder ball 1 which is provided with a layer 3 for preventing oxidation of a solder 2 on a surface.
Patent JP-H07210423-A (JP)
Title: Computer system
Inventor: SHIOTANI SHIGERU
IPC: G06F9/42
Filed: 1994-01-20
Abstract: PURPOSE:To specify a function when a processor breaks down and a route up to the down by rewriting a return address to a specific code at the time of referring to the address, and at the time of processor down, checking the position of the return address. CONSTITUTION:In the case of restoring a return address to its original position by a stack pointer 40 at the time of ending a function after retracting the return address to a stack 30 and branching the address to the function, the return address is extracted from the stack 30 specified by the value of the stack pointer 40 and the extracted address is set up as a referred address. Then the value of the pointer 40 is changed so as to point out under the return address and the extracted return address is restored to a calling source. For instance, when the processor breaks down during the execution of processing 23 for a function B, a return address 32 to the function B has been referred to at the time of restoration from a function C. At the time of checking return addresses successively from the bottom of the stack 30, only a return address 34 to a function A is a return address not to be referred yet, so that the existence of a down generating position in the function B can be judged.
Patent JP-S53101230-A (JP)
Title: Driving system for matrix panel
Inventor: MIZUKAMI ETSUO
IPC: G09G3/30
Filed: 1978-02-20
Abstract: PURPOSE:To secure a writing and light emission to the optionally selected luminous point, by sending the writing pulse to the horizontal electrode containing the luminous point to perform writing and also sending the pulse to offset the writing pulse to the vertical electrode containing the spot which does not perform writing.
Patent JP-H07229317-A (JP)
Title: Roof of carport and carport using it
Inventor: UEMATSU KATSUYA
IPC: E04H6/02
Filed: 1994-02-17
Abstract: PURPOSE:To dispense with the need of bending work of roofing members by forming a rectangular roof frame by means of girders and main house beams that have been set up in parallel with the longitudinal direction of a garage and beams that have been arranged in the perpendicular direction thereto, and by fitting roofing members so that the longitudinal sides thereof are parallel with the girders. CONSTITUTION:Main house beams 4 are set up between parallel girders 2 so as to be parallel to each other, and beams 3 are arranged so as to be perpendicular thereto for forming a rectangular roof framework 5. Next, inside the frame of the framework 5, roofing members 6 are fitted in the shape of a flat board so that the longitudinal sides thereof are parallel to the girder 2 and the main house beam 4. When a roof 1 is made a curved surface, only the beams 3 are curved, and the roofing members 6 are fitted as they are flat, while changing the fitting positions of the end parts of the roofing members 6 to the girder 2 or to the main house beam 4. In this case, the roofing member 6 becomes discontinuous in the direction of the beam, however, it takes an arc shape as a whole. Further, the roof 1 is fitted to a plurality of supports 8 via supporting members 9 or the like so that the position thereof is adjustable in the longitudinal and width directions. Thus, the number of fitting members can be reduced, and fitting can be efficiently carried out.
Patent JP-S56116624-A (JP)
Title: Manufacture of semiconductor device
Inventor: ISHIHARA TAKESHI
IPC: H01L21/306
Filed: 1980-02-19
Abstract: PURPOSE:To prevent the contamination or damage of an exposed surface by providing blank chip sections on the element-formation face of an Si substrate wherein convex sections are formed in the blank chip sections to contact with exposed masks. CONSTITUTION:Photoetching is applied to a substrate 1 by using a photomask to make chip formation regions 2 and pedestal convex sections 3' are formed in blank chip regions 3. In this composition, a photoresist will equally be applied to the substrate 1 by rotating application. Then, with a normal exposed process by photomask performed, the masks will not contact with the resist but with the blank chip sections only and processes will be proceeded by always maintaining fixed intervals. Therefore, exposure will be possible at high yield with simple operation and without pattern damage caused by mask contact.
Patent JP-S63188355-A (JP)
Title: Preparation of processed oat effective in improving serum lipid level
Inventor: AOE SEIICHIRO
IPC: A23L7/10
Filed: 1987-01-30
Abstract: PURPOSE:To obtain a processed oat having improved availability of water-soluble food fiber and unsaturated fatty acid which are effective components of oat for improving serum lipid content, by expanding oat into an edible state. CONSTITUTION:Oat heated under pressure is quickly depressurized to expand its texture in a manner same as the preparation process of conventional expanded food. The expansion treatment can be effectively carried out especially by the use of an extruder. The oat is preferably defatted prior to the expansion treatment to improve the efficiency of expansion treatment. The defatting treatment is preferably carried out by using e.g. n-hexane, adding 4-10pts. of n- hexane to 1pt. of oat and stirring the mixture for about 15hr.
Patent JP-H06233060-A (JP)
Title: Color image forming device
Inventor: IZAWA TADASHI
IPC: G03G15/01
Filed: 1993-02-08
Abstract: PURPOSE:To uniformize the resolving power of image pickup elements used in the image forming device read system consisting of plural image pickup elements of a multicolor image forming device or the like. CONSTITUTION:The color image forming device where picture data is separated into colors of blue, red, and green based on picture data and each separated color is exposed on an image carrier and respective images are developed with at least yellow, magenta, and cyan color developers to form a color image is characterized by providing a prism 22 for color separation of picture data, a lens 20 which makes picture data incident on the prism 22, and plural image pickup elements 23 to 25 which receive separated colors separated by the prism 22 and emitted from plural light-emitting surfaces and providing one or two crystal plates 29 and 30 between plural light-emitting surfaces and plural image pickup elements.
Patent JP-H01194474-A (JP)
Title: Semiconductor input protecting device
Inventor: MISU KAZUHITO
IPC: H01L27/06
Filed: 1988-01-29
Abstract: PURPOSE:To prevent hot electrons from implanting into a thick field oxide film by facing in parallel at an equal interval a first well layer containing a first impurity diffused layer connected to an input terminal and a second well layer containing a second impurity diffused layer connected to a ground potential under a thick insulating film between the two diffused layers. CONSTITUTION:When an abnormal voltage is applied to a bonding pad 101, an input protecting device has an N-type impurity diffused layer 103A connected to the pad 101, an N-type impurity well layer 115A for enclosing the layer 103A, an N-type impurity diffused layer 103B connected to a ground potential, and an N-type impurity well layer 115B enclosing the layer 103B adjacently at an extremely narrow interval. Since the layers 115A, 115B having deeper impurity regions than those of the layers 103A, 103B are formed, the hot electrons generated by the abnormal voltage applied to the pad 101 flow in a P-type semiconductor substrate 110. Thus, the reduction in the implantation of the hot electrons into a thick field oxide film 107A does not occur, and a semiconductor device having a high strength against abnormal voltage can be formed.
Patent JP-S58149241-A (JP)
Inventor: SAITOU MASAYASU
IPC: B65D1/02
Filed: 1982-02-10
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000222862-A (JP)
Title: Apparatus and method for management of empty capacity
Inventor: OKAYASU GENTARO
IPC: H04N5/222
Filed: 1999-01-28
Abstract: PROBLEM TO BE SOLVED: To select another recording means even when a recording region in an empty capacity fails and to continue a control operation by a method wherein a recording means is provided, a means, to be controlled, which comprises information regarding the empty capacity in the recording means is provided and a control means which acquires information regarding the empty capacity in the recording means from the means to be controlled is provided. SOLUTION: AN OPEN instruction is issued to an SMS/GW part 201 from a host control terminal 101. The SMS/GW part 201 reduces the value of an empty capacity by the portion of the value of a security region (DUR) designated by the OPEN instruction. In an empty-capacity management information part 250, an empty capacity in an empty capacity information part 251 is reduced from 30:00:00:00 to 20:00:00:00. In an empty-capacity information part 551 in an AV Server part 500, an empty capacity is reduced in the same manner. When a recording region fails due to a shortage of an empty capacity in the security of a region, the SMS/SG part 201 synchronizes empty capacity information, an empty capacity which is controlled by the SMS/GW part agrees with an empty capacity which is managed by the AV Server part, and a contradiction is eliminated.
Patent JP-H04238127-A (JP)
Title: Optical recording medium and optical recording system
Inventor: NAKADA MASABUMI
IPC: G11B7/24
Filed: 1991-01-22
Abstract: PURPOSE:To provide the optical recording medium which can record, erase and overwrites information by utilizing a change in the double refractions of a high-polymer thin film and is inexpensive, harmless and highly reliable. CONSTITUTION:A dielectric film 2 having a high refractive index, the high- polymer film 3 having large optical anisotropy and a metallic film 4 having high light absorptivity and small thermal conductivity are successively laminated on a substrate 1. The absorptivity is enhanced by optically optimizing the respective film thicknesses. The power of the condensing laser light to write information is changed to two levels. The high-polymer film attains the temp. extremely higher than a softening point and attains a rapidly cooled state in the case of a high power and, therefore, the orientability of the molecular chains degrades and the double refraction value is small. On the other hand, the film attains the slowly cooled state in the case of a lower power and, therefore, the orientability of the molecular chains increases and the double refraction value increases. The difference between the double refraction values is detected as a difference in the quantity of leak light quantity when the laser beam of the linearly polarized light of the power smaller than the writing power is made incident and the reflected light thereof is passed through an analyzer.
Patent JP-S62178310-A (JP)
Title: Mold
Inventor: NASU SHOJI
IPC: B29C33/42
Filed: 1986-01-31
Abstract: PURPOSE:To obtain a mold through which burrs are not generated at the time of molding of a molded article, by making a small width dimensional range from the whole external fringe of a cavity into a burr-preventing press bonding part where mold clamping pressure is concentrated, in a parting face between to and bottom forces. CONSTITUTION:Beside formation of a recessed part 12, where a cavity 4 is to be formed along with a protrusion 34, on the top of a core 10 a protruded facial part 14 is formed on the same by making a small width dimensional range protrude from the whole external fringe 13 of a recessed part 12. Then a core 10 is fitted in a hole part 21 provided on a main body part 11 of a bottom force so that small gap parts 19, 20 are formed respectively between the bottom 15 of a top force 1 and the top 16 of the main body part 11 of the bottom force and between the bottom 17 of the main body 11 of said bottom force and the top 18 of a bottom hot platen 7. MOld clamping force of a mold clamping device 23 is concentrated on an abutting part between the bottom 15 of the top force 1 and the core 10 and the part becomes burr- preventing a press bonding part 31 under a mold clamping state. That is, burr- preventing press bonding part 31 is pressed each other as per A and B and a gap is not generated between the bottom 15 of the top force 1 and the protruded facial part 14 of the core 10.
Patent JP-H05186272-A (JP)
Title: Sintered boron nitride having composite high-density phase
Inventor: UCHIUMI YOSHIYUKI
IPC: C22C29/16
Filed: 1992-01-09
Abstract: PURPOSE:To enable a sintering process by hot-pressing or a hot hydrostatic treatment without using an ultrahigh-pressure press and to provide a sintered boron nitride containing composite high-density phase, having improved abrasion resistance, chipping resistance, toughness and impact resistance and producible at a low cost. CONSTITUTION:The objective sintered material contains >=10vol.% of a composite hard phase consisting of hard phase particles of cubic boron nitride and/or wurtzite-type boron nitride surface-coated with the 1st layer having mono or multilayer structure of at least one kind of material selected from nitride or boride of Ti, Zr, Hf, Al and Si or their solid solution and the 2nd layer having mono or multilayer structure of at least one kind of material selected from carbide, nitride, carbonate, oxynitride or boride of the group 4a, 5a or 6a metal of the periodic table or their solid solution. Each of the 1st and the 2nd layer has an average layer thickness of >=5Angstrom .
Patent JP-S61181754-A (JP)
Title: Wheel velocity information arithmetic and logic unit
Inventor: TAKAGI KENICHIRO
IPC: B60T8/1761
Filed: 1985-02-07
Abstract: PURPOSE:To make accurate wheel velocity information calculable, by forbidding the input of built-up detection output into an operational part for a period of the specified time when detecting the build-up of a sensor pulse. CONSTITUTION:Antiskid control circuit 110 generates the pseudo-car velocity Vc approximated to a car body velocity in time of braking by the detected wheel velocity based on an output signal out of a wheel velocity sensor 1. With comparative operation between this pseudo-car velocity Vc and the wheel acceleration-deceleration alpha obtained by differentiation of the wheel velocity, a control mode for braking hydraulic pressure is determined whereby EV and AV signals are outputted as a hydraulic pressure control signal. In addition, the antiskid circuit 110 outputs an MR signal to a hydraulic pump 107, and performs pump driving for recovering a liquid from a reservoir tank 106 to a master cylinder 101 over the antiskid control. On-off control by an antiskid circuit of an EV valve 104 and an AV valve 105 takes place with a combination of two signal levels.
Patent JP-2000219991-A (JP)
Title: Electrolytic reducing device
Inventor: ONOE TAKESHI
IPC: C25C3/34
Filed: 1999-01-29
Abstract: PROBLEM TO BE SOLVED: To recover a molten metal low in carbon concentration by suppressing the corrosion of a bottom part of an electrolytic tank in contact with the molten metal. SOLUTION: An electrolytic reducing device 10 is provided with an electrolytic tank 11 which stores a molten salt 18 and has a cathode 13 on a bottom part, and an anode 19 to be held in the molten salt 18 in the electrolytic tank 11, and a reduced molten metal 21 is stored on a bottom part of the electrolytic tank 11 by energizing the cathode 13 and the anode 19 to electrolyze the molten salt 18. A ceramic tile 23 is provided on an inner surface of the bottom part of the electrolytic tank 11 to store the molten metal 21. A plurality of projecting bars across each other are formed on the inner surface of the electrolytic tank 11 in contact with the molten metal 21, and the ceramic tile 23 is embedded in a plurality of recessed parts demarcated by a plurality of projecting bars.  A thin sheet formed of graphite or carbon is preferably installed on the bottom part of the electrolytic tank so as to cover the ceramic tile 23.
Patent JP-H03225343-A (JP)
Title: Photosensitive composition
Inventor: NAKAI HIDEYUKI
IPC: G03F7/022
Filed: 1990-01-31
Abstract: PURPOSE:To enhance printing resistance by incorporating a novolak resin containing <= 5 wt.% phenols and a halomethyloxadiazole compound to be allowed to produce free halogen radicals by irradiation with active rays and a discororing agent. CONSTITUTION:The novolak resin is reduced in the content of the excess phenols used for synthesizing the resin to <= 5 wt.% after the synthesis by heating. The novolak resin has a weight average molecular weight Mw of 2.0X10<3> - 2.0X10<4>, and a number average molecular weight Mn of 7.0X10<2> - 5.0X10<3>, and the novolak resin containing the <= 5 wt.% phenols is contained in an amount of 50 - 90 wt.% of the photosensitive composition, and the halomethyldioxazole compound to be allowed to produce free halogen radicals by irradiation with active rays is contained in the photosensitive composition in an amount of 0.2 - 10 wt.%, and the discororing agent mutually reacting with the halogen free radicals produced by irradiation with the active rays and changing its tone is contained in an amount of 0.02 - 5 wt.% of the photosensitive composition, thus permitting high sensitivity and superior visualizability by exposure to light.
Patent JP-S62178211-A (JP)
Title: Color display device
Inventor: SAKINO MASASHI
IPC: G09F9/35
Filed: 1986-01-31
Abstract: PURPOSE:To attain color display using liquid crystal and having excellent rendering property by forming a circuit for correcting signals relating to respective color display in accordance with the optical characteristics of respective color parts of coloring layers. CONSTITUTION:The difference in transmissivities among the coloring layers for red, green and blue light beams based upon the difference of degree of polarization is corrected by adjustment of a variable resistor 34R or the like. The corrected signals ER', EG', and EB' are inputted to a transistor (TR) 37R or the like and outputted as signals with amplitude determined by a variable resistor 39R or the like. These signals output required color signals to connecting points between a resistor 45R or the like and emitters of a TR 41R or the like through Tr40 or the like. A three-color switching circuit 46 outputs three color signals inputted from the TR 41R or the like alternately to an A/D converter 47 and converted into digital signals, which are sent to a shift register 48 and successively applied to a electrodes formed as a matrix pattern to display the images. Consequently, color display using a liquid crystal and having excellent rendering property can be attained.
Patent JP-H03226135-A (JP)
Title: Correlation device for spread spectrum communication
Inventor: YAMAMOTO MITSUO
IPC: H04B1/707
Filed: 1990-01-31
Abstract: PURPOSE:To attain high speed synchronization with simple structure by generating a same spread code as that at a sender side from a spread code generator, inverting an output signal of a storage device with an inverter in response to a signal of a prescribed level in the spread code and accumulating the output signal of the inverter to obtain a correlation output signal. CONSTITUTION:A spread code generator 103 inputs a spread code Vp to a control terminal of a code inverter 107 in response to a signal Vr. The code inverter 107 applies multiplication by outputting signals from a storage device 106 sequentially with noninversion of the signal when the level of the spread code Vp is 1 and with inversion of the signal when the level is 0. An output signal Vf of the code inverter 107 is inputted to one input terminal of an adder section 108 and the adder 108 and latch circuits 109-111 accumulate the signal Vf. Thus, the constitution is simplified and high speed processing is attained.
Patent JP-2000224016-A (JP)
Title: Signal-switching device
Inventor: MORITA TOMOO
IPC: H03K17/13
Filed: 1999-01-29
Abstract: PROBLEM TO BE SOLVED: To apply a signal-switching device to the switching between signals of any kind and also to perform switching in a short time by detecting the zero cross of 2nd signal with the same polarity within a 2nd period from the zero cross of a 1st signal, detected within a 1st period from the issue of a switching instruction and outputting the 2nd signal instead of the 1st signal. SOLUTION: Signals A and B of a signal-switching device are inputted input terminals 1 and 2, and gain control circuits 3 and 4 control gains within the range of 0 and 1. A processing circuit 5 performs zero cross detection of the signals A and B, the peak detection and holding of the signal A, gain control of the circuits 3 and 4 and other processing operations and outputs them to a signal output terminal 6. In this device, signals A to C are defined as digital signals, and their processing is performed by a digital operation processor such as a DSP. When the signal A is switched to the signal B, the gain of the circuit 3 is controlled to be a maximum 1, the gain of the circuit 4 is controlled to minimum 0, and the signal C appearing at the terminal 6 is the same as the signal A.