Patent GB-1451508-A (GB)
Title: Digital data encoding and decoding apparatus
IPC: G06F11/10
Filed: 1973-12-19
Abstract: 1451508 Data storage systems INTERNATIONAL BUSINESS MACHINES CORP 19 Dec 1973 [26 Dec 1972] 58793/73 Heading G4C An error-correcting system includes a first error check encoder which provides a first check signal in response to a data signal segment fed to it. The data signal and the first check signal pass to a "non- linear" encoder, by which is meant that the number of bits in the encoded signal differs from the number in the corresponding non-encoded signal. The resulting signal is passed to a second error check encoder which provides a second check signal. A group of segments may be passed to a third error check encoder which generates a third check signal which is also passed to the non-linear encoder. The non-linear encoder and the various error encoders are of known form. In the case of storage on multi-track magnetic tape it is arranged that the two outer tracks, which have a relatively high probability of error, and pairs of adjacent tracks, receive non-adjacent bits of the check signals in order to increase the likelihood of correct detection and correction of errors. Further the track-to-bit configuration differs for each of the three check signals and may be varied from segment to segment. In one arrangement of the encoding system Fig. 1 (not shown), the non-linear encoder receives the third check signal, as well as the first check signal and the data segment. The output of the encoder is passed to the magnetic tape, together with the second check signal. In the decoding system, Fig. 2, data and check signals pass to a non-linear decoder 21 which feeds first and third error decoders 22 which supply a corrected data segment to output buffer 23 and also to non-linear encoder 24. The latter supplies encoder 25 which generates a second check signal which is compared with the second check signal read from the tape to confirm that the error correction performed by decoders 22 was correct. In an alternative arrangement Fig. 4, (not shown), the second check bit set is generated directly from the signals received from the buffer 19, so that there is no check on the operation of decoders 22 in this case. In a preferred embodiment of the encoding system, Fig. 7, the data segment passes via OR gate 36 to non-linear encoder 13 and to the first check encoder 12A whose output also passes to encoder 13. The output of encoder 13 passes to the magnetic tape store 27A and to the second check encoder 15 whose output, together with the output of third check encoder 12B, passes via the OR gate to the first encoder 12A. This encoder provides a first check signal for the second and third check signals. All three check signals are non-linearly encoded by encoder 13 and passed to the store 27A. The reverse process is carried out by the decoding system, arranged as indicated in Fig. 7. Non-linear decoder 21 provides the data signal to second and third check encoders 25, 12C, and the data and first check signals to first error decoder 22. The latter provides a corrected data signal to buffer 23 and also provides corrected second and third check signals for comparison at 26, 26A with corresponding check signals provided by encoders 25, 12C, the comparator outputs indicating whether or not the correction performed by decoder 22 was correct.