Patent GB-841498-A (GB)
Title: Improvements in or relating to pulse checking circuits
Inventor: DOUGLAS WILLIAM SHOLTO
Filed: 1958-03-03
Abstract: 841,498. Pulse circuits. ERICSSON TELEPHONES Ltd. Feb. 23, 1959 [March 3, 1958], No. 6798/58. Class 40(6). The invention relates to pulse circuits for checking repeatedly the persistence of each pulse of a train of regularly recurring pulse signals the pulses of each signal being interlaced with one another to form recurring groups having the same repetition period as the pulses of each train. The embodiment shows the application to checking the persistence of ten signals a1-a5, dl-d5, Fig. 2, each consisting of a negative pulse of duration t and repetition period T the pulses in each signal following each other sequentially. For each of the signals a1-a5 signals b1-b5 occur during the same intervals independence upon whether the a signals are present or absent at any given time. Similarly pulse signals cl-c5 are present only when the pulses of the a signal are absent. Pulse sources x1-x10 generate negativegoing pulses of duration T and a pulse source y generates negative-going pulses of duration 10T with a period of 20T. A common input lead ad Fig. 1, feeds the a signals and d signals to each of four gates. Considering, for example, 4-gate G1 this produces an output signal only when pulse trains a1, 1b, x5, y are simultaneously present thus at every 20th a1 interval if pulse al is present. In every a1 interval if pulse a1 is present a pulse is applied to the 1-gate G5 since under these conditions pulse c1 will be present. Gate GD1 is similiar to gate GA1 but derives pulses in dl interval if d1 is absent so that d1 controls the passage of el through gate G4 to gate G5. A is a delay device with feedback via gates G7, G6 so the pulse signal circulates round the loop if G6 is open and no signal is present from G5. B is a delay device similiar to A with feedback via gates G10, G9. There are also ten output 4-gates G11-G20 corresponding to the input gates GA1-5, GD1-5 respectively. To check the persistence of pulses of a if a1, b1, x5, y are all present gate G 1 gives an output which passes via gate G6 to delay device A which has a period T. Its output is fed back via gate G7 unless there is inhibition present on the latter gate. If a pulse of a1 fails a pulse cl appears thus an output is produced from gate G2 then gate G5 which inhibits gate G7 so that the pulse in delay device A stops and does not restart until pulses from a1, b1, x5 and y occur simultaneously. If pulses from a1 persist device A continues to produce an output at intervals T these are applied to gate G8 when coincidence occurs with x3 and y signals to produce an output which is applied to delay device B via gate G9. Thus when pulses of the signal a1 persist the output signal of device A is sampled at 20 T-T(5-3) after the first appearance of the pulse of the signal a1 and an input signal is applied to device B. This also has a delay of T so that should a pulse of signal a1 fail to appear pulse cl appears G10 is inhibited so that the a1 pulse stops circulating in device B. If a1 persists B produces an output pulse at interval T which are applied to gate G11 and on coincidence with xl, y, b1 an output signal is produced at output 01. Thus the output of device B is sampled at 2 x 20T-T (5-1) after the first appearance of a pulse of the signal a1. Thus whenever signal a1 persists for 36 pulses or more from a pulse occurring during the coincidence of pulses from the source x5 and y an output is provided at terminal 01. The persistence of pulses from the signals dl-d5 is also checked in a similar manner. By connecting appropriate pulse sources x1-x10 to the input and output gating circuits the persistence of the pulses of different signals may be tested over different ranges. The pulses of duration T and 10T may be derived for example by frequency dividing circuits.