baber/WOPTO huggingface dataset:
Patent TW-365585-B (TW)
Title: Method and product of wooden sculpture on transparent plant leaves
Inventor: CHEN DE-LUNG
IPC: B44B5/00
Filed: 1998-12-28
Granted: 1999-08-01
Abstract: This invention deals with the method and product of wood sculpture on a transparent plant leaf of chosen and dried wood for sculpture before it is sculptured in patterns such as lotus leaves and flowers of which the lines are properly sculptured before being embedded into the upper surface of the leaf and then the lower surface of the leaf where the lines are properly sketched while a work lamp is used to light the surface of the leaf and, according to the transparency, the lower surface of the leaf is made thinner for even transparency while leaf lines are preserved; the sculptured leaf by the aforementioned means comes in a thickness of 0.5 mm to 0.25 mm, of optimal transparency and 3D forming.
Patent TW-561142-B (TW)
Title: A process for making a photoactive compound and photoresist therefrom
Inventor: OBERLANDER JOSEPH E
IPC: C07C303/28
Filed: 1999-01-13
Granted: 2003-11-11
Abstract: The present invention provides for process of preparing a photoactive ester compound of high purity using a solid base catalyst, preferably an anionic exchange resin. The invention further provides for preparing and imaging a photosensitive composition comprising such a photoactive compound, a film-forming resin and a solvent composition.
Patent TW-466645-B (TW)
Title: Process for making ultra-short channel MOSFET with salicide contact
Inventor: WU SHIE-LIN
IPC: H01L21/336
Filed: 1999-04-23
Granted: 2001-12-01
Abstract: A process for making an ultra-short channel MOSFET with a salicide contact comprises: a gate structure, a side spacer, a source and drain region, a silicide contact, and an extended source and drain region. The gate structure is formed on a substrate. The width of the gate structure is about 0.1 mm to 10 nm. The side spacer is formed on the sidewall of the gate structure. The source and drain region is formed on the substrate. The silicide contact is formed on the gate structure and the source and drain region. The extended source and drain region is formed in the substrate, below the side spacer. In a preferred embodiment, the silicide above the gate structure has a structure that is concave corresponding to the side spacer.
Patent TW-428338-B (TW)
Title: Single ply battery label including varnish with patterned edges
Inventor: WEISS VICTOR H
IPC: G09F3/04
Filed: 1999-07-06
Granted: 2001-04-01
Abstract: A single ply label for use as battery label. The invention includes a polymeric film that has an ink layer or metallized outer surface that may include applied print graphics. A cured varnish is applied as the outermost layer adapted to form a continuous protective surface over the battery. The varnish on the label edges that shrink over the rims of the battery has a geometric pattern to accommodate the greater shrinkage of the film and still provide a substantially continuous surface of varnish protectant.
Patent TW-594009-B (TW)
Title: Diagnostics based on tetrazolium compounds
Inventor: OUYANG TIANMEI
IPC: C12Q1/32
Filed: 1999-06-16
Granted: 2004-06-21
Abstract: A reagent is suitable for measuring the concentration of an analyte in a hemoglobin-containing biological fluid, such as whole blood. The reagent comprises dehydrogenase enzyme that has specificity for the analyte, NAD, an NAD derivative, pyrrolo-quinoline quinone (PQQ), or a PQQ derivative, a tetrazolium dye precursor, a diaphorase enzyme or an analog thereof, and a nitrite salt. The reagent causes dye formation that is a measure of the analyte concentration. The nitrite salt suppresses interfering dye formation caused non-enzymatically by the hemoglobin. Preferably, the reagent is used in a dry strip for measuring ketone bodies, such as beta-hydroxybutyrate.
Patent TW-416226-B (TW)
Title: Screen synchronous doubling processing method
Inventor: SHEN SHIAU-BEN
IPC: H04N5/10
Filed: 1999-07-14
Granted: 2000-12-21
Abstract: A screen synchronous doubling processing method which is to simulate a display area in the memory of VGA display card of personal computer the image of the display area is divided into the upper and lower parts, the upper part is allocated with left (or right) eye image and the lower part is allocated with right (or left) eye image and  kept an appropriate distance between the two images. After the screen synchronous doubling processing, inserting an additional vertical synchronous signal between said two images that forms two vertical synchronous signals with the existed vertical synchronous signal of original VGA display card that the left (or right) eye image of the upper part and the right (or left) eye image of the lower part will alternatively display on the screen with the left/right (or right/left) eye images sequentially on the monitor/(single gun/three-guns) projector. When the user put on the LC shutter glasses, he can view the stereo 3D image with depth of field effect on the monitor/(single gun/three-guns) projector of personal computer; and the said technology can be applied on viewing stereo DVD, VCD film and 3D computer game.
Patent TW-480237-B (TW)
Title: Automatically ascending and descending task ship
Inventor: WU GUO-JR
IPC: B63B17/00
Filed: 1999-08-16
Granted: 2002-03-21
Abstract: This invention relates to an automatic ascending and descending task ship, which can be power operated to ascend and descend the body of the task ship. It is mainly used for all kinds of task ship, such as dredger, piling ship, crane ship, floating dock, float task ship and so on. The task ship is provided with power-operated ascending and descending socle. When the task ship exercises in rivers or harbors, it needs only descend the socle to ascend the body of the task ship away from the waves of the water surface to allow the task ship to operate stably.
Patent TW-423106-B (TW)
Title: Manufacturing method of dual damascene structure
Inventor: CHEN CHAO-CHENG
IPC: H01L21/768
Filed: 1999-08-16
Granted: 2001-02-21
Abstract: The present invention provides a manufacturing method of dual damascene. In the method, a first organic low-k material layer, a first etching stop layer, and a first photoresist pattern having a first opening are sequentially formed on the semiconductor substrate. Then, the first etching stop layer and part of the first organic low-k material layer are selectively etched via the first opening, so as to form a trench. Next, a tantalum nitride or a tantalum film is formed on the bottom and spacer of the trench for being used as a second etching stop layer. Then, a second organic low-k material layer is formed to fill in the trench. Next, a second photoresist pattern with a second opening is formed on the surface of the second organic low-k material layer. Further, the second organic low-k material layer, the tantalum nitride or a tantalum film, the first organic low-k material layer are selectively etched via the second opening, so as to form a contact hole, thereby forming a dual damascene structure. In accordance with the method of the present invention, the parasitic capacitance between interconnects can be reduced, so as to promote the transmission efficiency of the device.
Patent TW-451581-B (TW)
Title: A general image enhancement framework
Inventor: ACHARYA TINKU
IPC: G06T5/00
Filed: 1999-08-16
Granted: 2001-08-21
Abstract: A method comprising forming an approximated image from an original input image, forming a pre-enhancement map by differentiating the approximated image from the input image, enhancing the pre-enhancement map according to an image enhancement technique forming an enhanced map thereby, and combining the enhanced map with the approximated image to generate an enhanced image.
Patent TW-431025-B (TW)
Title: Soft electromagnetic wave absorbent
Inventor: WU YA-WEN
IPC: H01Q17/00
Filed: 1999-09-04
Granted: 2001-04-21
Abstract: The present invention relates to a soft electromagnetic wave absorbent, especially a rolled soft membrane made of ceramics, metallic particles, and rubber resins and cut into shape according to the required size. By means of its characteristic of being able to absorb -5 dB to 30 dB electromagnetic waves, the present invention can be used as a sheet attached onto the receiving part of any mobile phone to restrain electromagnetic waves. Consequently, harms of electromagnetic waves to human body can be reduced and application of mobile phones can become safer and easier.
Patent TW-472437-B (TW)
Title: Controller for car AC generator
Inventor: KOUWA TATSUKI
IPC: H02P9/04
Filed: 1999-09-18
Granted: 2002-01-11
Abstract: A controller for a car AC generator which eliminates the need for a drive signal supplied by a key switch and stabilizes the power generation of an AC generator at the start of an internal combustion engine. The voltage regulator of the controller comprises trigger means for supplying a field current from a battery to a field coil by detecting a drop in battery voltage.
Patent TW-I233038-B (TW)
Title: Scroll assisting apparatus for a computer
Inventor: KUSUDA RIKA
IPC: G06F3/0487
Filed: 1999-10-20
Granted: 2005-05-21
Abstract: To provide an apparatus that facilitates a user's scroll operation within a computer, which uses a pointing device such as a touch screen or an input pad. This invention is directed to a configuration of an apparatus 400 for assisting an input operation into a touch screen 130, which is attached to a computer for use therewith. More particularly, this apparatus 400 includes means 410, 420 for assisting a user's vertical or horizontal scroll operation. When a user puts a stylus pen 105 on a vertical scroll box 320 and moves it along this vertical scroll guiding gutter 410, it is possible to implement a vertical (up-and-down) scroll operation in an easier manner.
Patent TW-429477-B (TW)
Title: Tungsten layer formation method for semiconductor device and semiconductor device using the same
Inventor: OH SEONG-TAE
IPC: H01L21/768
Filed: 1999-10-21
Granted: 2001-04-11
Abstract: There is provided a tungsten layer formation method for a semiconductor device for reducing resistivity of the tungsten layer without alteration of the conventional manufacturing system. The tungsten layer formation method for semiconductor devices comprises the steps of: treating the surface of a barrier metal layer formed over a semiconductor substrate under a pressure of over 40 Torr using SiH4 gas; forming a tungsten seed layer on the treated barrier metal layer using WF6 and SiH4 gases, the mixing ratio of the gases being [WF6]/[SiH4]≦1; and forming a tungsten layer on the barrier metal layer using WF6 gas, the barrier metal layer having the tungsten seed layer formed thereon.
Patent TW-468348-B (TW)
Title: Reduced-memory video decoder for compressed high-definition video data
Inventor: HOANG DZUNG TIEN
IPC: H04N7/50
Filed: 1999-10-26
Granted: 2001-12-11
Abstract: A video decoder (30) for decoding compressed high-definition video data. The video decoder (30) includes compress and decompress circuits (46, 48) placed in the decoder's datapath to reduce the amount of video data that needs to be stored in frame buffer memory (40). Reference frame video data is compressed by the compress circuit (46) for storage in frame buffer memory (40). A rate control circuit (64) is provided to control the rate at which the compress circuit (46) stores reference frame video data in the frame buffer memory (40). The decompress circuit (48) reconstructs the reference frames on-the-fly for use in motion compensated prediction. Methods of decoding compressed high-definition video signals are also disclosed.
Patent TW-446959-B (TW)
Title: Apparatus and method for controlling data strobe signal in DDR SDRAM
Inventor: HAN JONG-HEE
IPC: G06F12/00
Filed: 1999-10-28
Granted: 2001-07-21
Abstract: A method for controlling a data strobe signal having preamble and postamble sections in a double data rate (DDR) synchronous dynamic random access memory (SDRAM), wherein the preamble section is a low signal section of the data strobe signal one clock before data is issued and wherein the postamble section is a low signal section of the data strobe signal half clock before the data issue is complete in a data issue section, includes the steps of; controlling a high impedance status of the data strobe signal at sections, except for the data issue section, the preamble section and the postamble section, in response to a first control signal, wherein the high impedance status is related to a level between high and low signal levels; and controlling a point of time when the preamble section of the data strobe signal begins in response to a second control signal.
Patent TW-460834-B (TW)
Title: Document processing apparatus capable of increasing printing efficiency by forming virtual document
Inventor: TSUTSUMI MASAKI
IPC: G06F15/00
Filed: 1999-12-20
Granted: 2001-10-21
Abstract: When a document is printed and this document contains plural sorts of data such as a document, a presentation material, and a drawing, a virtual document is formed by which these plural data can be printed in a batch mode in a document processing apparatus. A printing operation is carried out in accordance with a print control content of this virtual document. To this end, the document data having various formats and formed by using a plurality of application programs are converted into page document data to be outputted in a common format. This page document data is SPOOL-stored. Such a virtual document file is formed among these output page document data SPOOL-stored. A designation sequence and an output sequence are set to these virtual document files. As a result, the document data can be outputted in accordance with the designated output sequence, which is designated by the SPOOL-stored output page document data, by merely designating this virtual document file.
Patent TW-418299-B (TW)
Title: Liquid delivery system and its use for the delivery of an ultrapure liquid
Inventor: GUARNERI GEORGES
IPC: F17D1/08
Filed: 2000-02-21
Granted: 2001-01-11
Abstract: The liquid to be delivered leaves a container (3A, 3B) maintained at a first overpressure P1, from where it is transferred to an intermediate storage tank (11) maintained at a predetermined intermediate pressure P2>P1. Several small-volume delivery containers (12A, 12B), each of which may be pressurized wither to a delivery pressure P3>P2 or to filling pressure P4<P2, are connected in parallel downstream of this tank. Application to the delivery of ultrapure chemicals intended for the microelectronics industry.
Patent TW-442956-B (TW)
Title: Semiconductor device with dummy interface circuit
Inventor: TANIGUCHI NOBUTAKA
IPC: H03K19/003
Filed: 2000-02-29
Granted: 2001-06-23
Abstract: A semiconductor device comprising a dummy interface circuit approximating to an external interface circuit with high accuracy is disclosed. The device further comprises a dummy interface circuit for internally generating, by simulation, a dummy output signal equivalent ot the level of the output signal of the external interface circuit. The dummy interface circuit includes a dummy signal output circuit for producing a dummy output signal at a dummy output line, a dummy capacitor connected to the dummy output line, and a dummy load circuit connected to the dummy output line for converting the dummy output signal into a signal of a level corresponding to the output signal level of the external interface.
Patent TW-507502-B (TW)
Title: Semiconductor module
Inventor: SAKAMOTO AKIRA
IPC: H05K1/11
Filed: 2000-03-14
Granted: 2002-10-21
Abstract: A semiconductor module includes a chip formed on an integrated circuit, a first external connecting terminal electrically connected to the integrated circuit, a printed wiring board having a second external connecting terminal, and a conductive material electrically connected to the first external connecting terminal with the second external connecting terminal, in which the conductive material is formed so as to cover a sidewall of the second external connecting terminal. Accordingly, the semiconductor module can provide a semiconductor module that can prevent an inferior connection causing by a crack between the lead and the pad.
Patent TW-499318-B (TW)
Title: Game system
Inventor: KUSUDA KAZUHIRO
IPC: A63F13/55
Filed: 2000-03-28
Granted: 2002-08-21
Abstract: The invention relates to a game system which pays out the game value according to advance of a game. The object of the invention is to give the pleasure which raises the candidate for training on a game to a player in the game system which pays out the game value according to advance of a game. To solve the problem, in the game system which pays out the game value according to advance of a game, there are: a training means (201) to raise the candidate for training on a game according to the bed of the game value by the player, a competition advance means (101) to make the competition on a game performed for the candidate for training, and a game value expenditure means (203) which pays out the game value according to the results for training to a player. The training means (201) generates the training result according to the game value paid by the player to the candidate for training, and the candidate for training is characterized by demonstrating the capacity according to the training result in competition.
Patent TW-457690-B (TW)
Title: Liquid crystal display
Inventor: NAGASE YOJI
IPC: G02F1/1362
Filed: 2000-05-04
Granted: 2001-10-01
Abstract: The present invention relates to a liquid crystal display provided with an electrostatic protection element and an object of the present invention is to provide the liquid crystal display provided with superior redundancy and at the same time a sufficient protection function against static electricity in which relatively low voltage generates for a long period of time. Electrostatic protection element sections 28 and 30 are provided with a first TFT 32 having a source electrode (S) and a drain electrode (D) where the source electrode (S) is connected to external output electrodes 16 and 18 and the drain electrode (D) is connected to common wirings 22 and 24, a second TFT 38 having a conductor 42, a source electrode (S), a drain electrode (D) and a gate electrode (G) where the conductor 42 is connected to the gate electrode (G) of the first TFT 32, the source electrode (S) is connected to the external output electrodes 16 and 18, the drain electrode (D) is connected to the conductor 42 and the gate electrode (G) is electrically isolated, and a third TFT 40 having a source electrode (S), a drain electrode (D) and a gate electrode (G) where the source electrode (S) is connected to the common wirings 22 and 24, the drain electrode (D) is connected to the conductor 42 and the gate electrode is electrically isolated.
Patent TW-459376-B (TW)
Title: Semiconductor device
Inventor: KONO TAKASHI
IPC: H01L27/04
Filed: 2000-05-17
Granted: 2001-10-11
Abstract: Change in internal voltage on an internal voltage line is detected as discharging current of a capacitance element via an MOS transistor to change a charged voltage of the capacitance element. According to the charged voltage of the capacitance element, a current drive transistor is driven to supply a current to the internal voltage line. The internal voltage is stably generated with low current consumption and small occupation area.
Patent TW-478117-B (TW)
Title: Semiconductor device and method of forming the same
Inventor: ODA NORIAKI
IPC: H01L21/3065
Filed: 2000-05-19
Granted: 2002-03-01
Abstract: The present invention provides a semiconductor device having a multilevel interconnection structure having at least a plurality of first level interconnections provided under a first inter-layer insulator and at least a plurality of second level interconnections provided over an etching stopper film which is provided over the first inter-layer insulator, and the first and second level interconnections being connected to each other through via contacts which are provided in the first inter-layer insulator, wherein the etching stopper film does not exist over at least a first inter-region between adjacent two ends of the plural second level interconnections.
Patent TW-464664-B (TW)
Title: Polysiloxane surfactants and methods of its manufacture
Inventor: KUO PING-LIN
IPC: C09K23/54
Filed: 2000-05-23
Granted: 2001-11-21
Abstract: The present invention provides novel polysiloxane surfactants with the following structures and methods of their manufacture, where R1 is the hydrogen or phenyl or alkyl group with the number of carbons 1-10; R2 is the hydrogen or alkyl group with the number of carbons 1-10 or alkoxyl group with the number of carbons 1-10; R3 is the hydrogen or alkyl group with the number of carbons 1-10 or alkoxyl group with the number of carbons 2-100; R4 is the hydrogen or alkyl group with the number of carbons 1-10; A is the anionic group, e.g. halide or OH or CH3SO4; x is the structural repeating unit and equal to or bigger than zero rational; y is the structural repeating unit and bigger than zero rational. The abilities of emulsifying, dispersing, defoaming and some special fundamental characteristics could be derived from this new type of polysiloxane copolymers.
Patent TW-561239-B (TW)
Title: Microwave rotary drying machine
Inventor: HORI KEIICHI
IPC: F26B11/04
Filed: 2000-07-21
Granted: 2003-11-11
Abstract: A microwave rotary drying machine, wherein hot air is supplied from a hot air feeding device (30) into a rotary drum (11) and microwave is transmitted from a microwave transmitting device (50) after food-processed saburra has been charged into the rotary drum (11) and while being stirred, because the food-processed saburra in the rotary drum (11) is heated by hot air from the front surface side and simultaneously heated from the inside by microwave induction heating, the entire food-processed saburra is heated uniformly and dried uniformly in a short time so as to produce dried matter and, in addition, because the food-processed saburra can be dried without overheating, the dried matter is not carbonized, and dried up to an optimum moisture content, whereby the dried matter capable of being used as dry food material and livestock feed can be provided.
Patent TW-463308-B (TW)
Title: Method for avoiding short circuit generated in between bit-line contact windows
Inventor: WU JAU-JIUE
IPC: H01L21/768
Filed: 2000-08-14
Granted: 2001-11-11
Abstract: The present invention relates to a kind of method for avoiding short circuit generated in between bit-line contact windows. In this method, a special design of decreasing the word line width in between two adjacent bit-line contact windows is used when the word-line pattern is defined. And, the space in between two adjacent word lines is increased such that the tunnel-like voids will not occur in this gap for the subsequent deposited dielectric layer. In addition, the formed bit-line contact window openings can be isolated through the use of void-free dielectric layer such that the bit-line contact window openings can not conduct with each other.