baber/WOPTO huggingface dataset:
Patent TW-461026-B (TW)
Title: Method for forming a conductor in fluorinated silicate glass (FSG) layer
Inventor: CHUNG CHIA-CHI
IPC: H01L21/316
Filed: 2000-07-21
Granted: 2001-10-21
Abstract: The present invention is to provide a method for forming a conductor in a fluorinated silicate glass (FSG) layer. The FSG layer is disposed over a semiconductor wafer which further comprises a plasma enhanced oxide layer formed on it. An etched trench is formed in the FSG layer to serve as a plug hole or trench. An oxygen or hydrogen-nitrogen mixed plasma cleaning process is performed for the semiconductor wafer to remove the fluorine atoms in a predetermined depth on the etched trench surface. Thereafter, a wet cleaning process is performed. Finally, an oxygen or hydrogen-nitrogen mixed plasma cleaning process is performed to remove the fluorine atoms in a predetermined depth on the etched trench surface and then the etched trench is filled up with a conductive material to finish the inventive process.
Patent TW-494577-B (TW)
Title: Novel metamorphic hetero-junction bipolar transistor
Inventor: JAU PENG-SHENG
IPC: H01L29/737
Filed: 2000-08-28
Granted: 2002-07-11
Abstract: This invention provides a novel metamorphic hetero-junction bipolar transistor (MHBT) with a material structure suitable for low cost production on large dimension GaAs wafer. The material structure includes: a semi-insulative GaAs substrate; an undoped AlGaAsSb, AlInGaAs or other form of metaphoric buffer layer; a highly-doped n-type InGaAs layer used to form ohmic contact of collector of the metamorphic hetero-junction bipolar transistor; a lightly-doped n-type InGaAs, InP or InAlAs layer used to form collector of the metamorphic hetero-junction bipolar transistor; a highly doped p-type InGaAs layer used to form base of the metamorphic hetero-junction bipolar transistor and to function as ohmic contact of the base; an n-type InAlAs, changing AlInGaAs or InP layer used to form the emitter of the metamorphic hetero-junction bipolar transistor; and a highly doped n-type InGaAs layer used to form ohmic contact of the emitter of the metamorphic hetero-junction bipolar transistor. This material structure enables the manufacture of metamorphic hetero-junction bipolar transistor with high In content on six-inch or larger GaAs wafer to achieve lower production cost and higher power and efficiency.
Patent TW-515757-B (TW)
Title: A printer having one or more print cartridges installed during manufacture
Inventor: BAILEY THOMAS ALLEN
IPC: B41J2/175
Filed: 2000-09-13
Granted: 2003-01-01
Abstract: A printer (10) is provided that allows one or more print cartridges (30, 32) to be installed during printer manufacture with little risk of ink evaporation during shipping so as to eliminate assembly problems associated with installation of print cartridges during initial printer setup.
Patent TW-486756-B (TW)
Title: Reactor with remote plasma system and method of processing a semiconductor substrate
Inventor: MAHAWILI IMAD
IPC: C23C16/44
Filed: 2000-09-27
Granted: 2002-05-11
Abstract: A reactor for processing a semiconductor substrate includes a reactor housing which defines a processing chamber, and at least one gas injecting assembly. The processing chamber is adapted to support a semiconductor substrate therein. The gas injection assembly injects at least one gas into the processing chamber and onto the substrate and is adapted to ionize the gas injection into the processing chamber to increase the reactivity of the gas with the substrate to thereby enhance the processing of the semiconductor substrate. In preferred form, the gas is ionized into a gas plasma. For example, the gas injection assembly may include a gas plasma generator which ionizes the gas with an electromagnetic field. Preferably, the gas plasma generator ionizes the gas exteriorly of the processing chamber to isolate the substrate from the plasma generator. The gas injection assembly further includes one or more injection tubes, preferably quartz tubes, with each tube including a plurality of orifices through which the ionized gas is delivered into the processing chamber.
Patent TW-553951-B (TW)
Title: Method of forming immobilized polysaccharide
Inventor: WANG YI-LAN
IPC: C08B37/00
Filed: 2000-11-28
Granted: 2003-09-21
Abstract: This invention discloses a method of forming an immobilized polysaccharide; first, a polysaccharide is provided and aldehyde groups are formed thereon. Subsequently, a bio-compatible polymer film is provided and aminated. The polysaccharide with aldehyde group is placed onto the aminated polymer film. Finally, covalent bonds are formed between the polysaccharide with aldehyde groups and the aminated polymer film.
Patent TW-510986-B (TW)
Title: Cooling unit for cooling circuit component generating heat and electronic apparatus comprising the cooling unit
Inventor: YAMAOKA YOJI
IPC: G06F1/20
Filed: 2000-12-05
Granted: 2002-11-21
Abstract: A cooling unit comprises a heat sink overlapped on a semiconductor package. The semiconductor package has an IC chip mounted on a circuit board. The heat sink has a heat receiving portion for receiving heat of the IC chip. A flexible heat-transfer member such as grease and a heat-transfer sheet is provided between the heat receiving portion and the IC chip. The heat sink is pushed toward the IC chip via a fixing spring and thereby the heat receiving portion and the IC chip are thermally connected while sandwiching the heat-transfer member therebetween. A spacer is provided between the circuit board and the heat sink. The spacer supports the heat sink, at a position remote from the IC chip.
Patent TW-498375-B (TW)
Title: Laterally actuated electrical switch
Inventor: ROCHON SYLVAIN
IPC: H01H13/52
Filed: 2000-12-06
Granted: 2002-08-11
Abstract: The invention provides an electrical switch of the type comprising a support (10, 12) carrying contacts (30, 34), which delimits a housing (22) in the bottom (26) of which are arranged at least two fixed electrical contacts (30, 34) and which receives a tripping member (36) which can deform elastically in a vertical direction (V) substantially perpendicular to the bottom (26) of the housing (22), and of the type comprising an actuating pusher (44) mounted so as to slide (10, 12) in a lateral direction (H), in order to act on the tripping member (36) via mechanical means (48) which convert the actuation force exerted on the pusher (44) into a perpendicular force applied to the tripping member (36), characterized in that it comprises an actuating lever (48) mounted so as to pivot with respect to the support (10, 12) about an axis (X-X) parallel to the bottom (26) of the housing (22) and in that the lever (48) is returned elastically to its rest position.
Patent TW-I256892-B (TW)
Title: Plasminogen activator inhibitor and external preparation for skin comprising the same
Inventor: YOSHIDA YUZO
IPC: A61K8/27
Filed: 2000-12-22
Granted: 2006-06-21
Abstract: Provided is an inhibitor of plasminogenactivator that improves the chapped skin by inorganic compound, and the combination external preparations for skin and the improvement method of the chapped skin by using them. The inhibitor of plasminogenactivator is characterized by adsorbing plasminogenactivator and also by containing one kind or two kinds or more of the zinc oxides that inhibit the activity, and the combination external preparations for skin and the improvement method of the chapped skin by using them are provided.
Patent TW-466332-B (TW)
Title: Measuring instrument and method for measuring features on an substrate
Inventor: RINN KLAUS DR
IPC: H01J37/28
Filed: 2001-01-12
Granted: 2001-12-01
Abstract: A measuring instrument (100) and a method for measuring features (19) on a substrate (9) are described. The measuring instrument (100) has a support element (15) that is provided opposite the substrate (9). Mounted on the support element (15) is a nonoptical measurement device (23) with which a measurement of the features (19) of the substrate (9) is performed under ambient air pressure. The nonoptical measurement device (23) can be configured, for example, as an AFM (24) or an electron beam lens (40). Furthermore, in addition to the nonoptical measurement device (23), an optical lens (10) can be provided that is used for rapid location and determination of the coarse position of features (19) on the substrate (9).
Patent TW-I221303-B (TW)
Title: Heat sensitive switch
Inventor: SATO HIDEAKI
IPC: H01H37/04
Filed: 2001-02-14
Granted: 2004-09-21
Abstract: The purpose of the present invention is to provide a heat sensitive switch, which has a structure that uses a piece of bimetal capable of easily positioning the piece of bimetal on a stationary terminal and preventing deformation of the piece of bimetal on setting it into a housing. The structure of the switch is composed of the followings: a housing 1; a stationary contact 3 disposed on the inner face of the bottom of the housing 1; a piece of bimetal 5 having a bending part 5a bendable according to the temperature, in which a movable contact 6 is fixed to one end so as to contact or depart from the stationary contact 3; and a stationary terminal 4, in which the other end of the piece of bimetal 5 is fixed in a cantilever shape. An extension wrist portion 5b, which extends from the fixing part of the fixed terminal 4 to the opposite side of the position of the bending part 5a, is formed on the piece of bimetal 5. And, the coupling and holding part 1b, which is positioned to engage with the extension arm 5b, is formed on the housing 1.
Patent TW-501969-B (TW)
Title: Double-arm robot
Inventor: YAZAWA TAKAYUKI
IPC: H01L21/677
Filed: 2001-03-08
Granted: 2002-09-11
Abstract: The object of this invention is to reduce the turn radius of a double-arm robot. The solution of the invention is that with respect to the double-arm robot 1 provided with two arms 2 which are rotatably coupled with joints 3, 4 and 5 and make desired actions by transmitting the rotating force of a rotation driving source, the central axis of rotation of the joint 3 at the base end provided for the two arms 2 is placed vertically (or in the direction of the axis).
Patent TW-503378-B (TW)
Title: Activatable/deactivatable security tag with enhanced electrostatic protection for use with an electronic security system
Inventor: DAVIES JOHN EDWIN JR
IPC: G08B13/24
Filed: 2001-04-17
Granted: 2002-09-21
Abstract: A security tag for use with an electronic security system which functions within a second frequency range comprises a substantially planar dielectric substrate having first and second sides. A first conductive pattern is provided on the first side of the substrate, the first conductive pattern comprising at least a first inductive element, a first plate of a first capacitive element and a first plate of a second capacitive element. A second conductive pattern located on the second side of the substrate comprises at least a second inductive element, a second plate of the first capacitive element and a second plate of a second capacitive element with the plates of the capacitive elements being generally aligned. The inductive elements and the capacitive elements form a resonant circuit which resonates at a first frequency within a first frequency range which is outside of the second frequency range. A direct electrical connection extends through the substrate to electrically connect the first conductive pattern to the second conductive pattern to thereby continuously maintain both sides of the substrate at substantially same static charge level.
Patent TW-514950-B (TW)
Title: Compensation method to improve the color saturation and image quality of plasma display panel by adjusting the input image signal intensity
Inventor: GAU SHIU-BIN
IPC: G09G3/28
Filed: 2001-04-03
Granted: 2002-12-21
Abstract: The present invention is a compensation method to improve the color saturation and image quality of plasma display panel (PDP) by adjusting the input image signal intensity, wherein the visible light generated by PDP due to the environmental light is utilized to calculate the light brightness of the corresponding colors generated from the three primary discharge units of each pixel dot on PDP through numerical calculation applying color mixing principles. By increasing or reducing the signal intensity of the input image of each discharging cell, the additional visible light is deducted from the generated light color from the red, green and blue discharge cells, so as to effectively alleviate the bad effect to PDP resulted from the environmental light. Accordingly, it can show the image picture with the best color saturation and image quality, and reduce the cost to improve these problems.
Patent TW-510141-B (TW)
Title: High-frequency current suppressor capable of being readily attached to cable or the like and earphone system using the same
Inventor: ONO HIROSHI
IPC: H04B1/38
Filed: 2001-04-17
Granted: 2002-11-11
Abstract: An earphone system 201 comprises an earphone 211, a microphone 212, a connection plug 213, a signal cable 214 for connecting those, and a hollow cylindrical high-frequency current suppressor 215 attached to the signal cable 214 at a position near the earphone 211 with covering an external circumuferencial surface 216a of the cable housing 216. When used for a terminal equipment for mobile communication, high-frequency current generated by electromagnetic waves produced from the terminal equipment can be reduced. The earphone system 201 can prevent an increase of SAR value in human head.
Patent TW-544643-B (TW)
Title: Method for cropping area of license plate from vehicle image
Inventor: WU KUEN-RUNG
IPC: G08G1/00
Filed: 2001-05-08
Granted: 2003-08-01
Abstract: The present invention provides a method for cropping area of license plate from the vehicle image, which includes the following steps: using the CCD camera with associated lens and the image capturing card to take the vehicle image on the lane; using the vehicle image reading unit to read out the image captured by the image capturing card; next, using the logarithmic gray level operation unit for pixels to calculate the logarithmic gray levels for each pixel in the vehicle image; then, using the horizontal gradient operation unit for logarithmic gray levels to calculate the horizontal gradients of the logarithmic gray levels on each pixel; and, using the binary operation unit for horizontal gradients to convert the real number of the horizontal gradients into binary values, 0 or 1; finally, using the searching unit for the most dense area of binary horizontal gradient to search the area with the highest sum of binary horizontal gradients in the whole vehicle image according to the default length and width values of the license plate, and cropping out the area as the location of the license plate area.
Patent TW-501081-B (TW)
Title: Digital-to-analog converter and active matrix liquid crystal display
Inventor: BROWNLOW MICHAEL JAMES
IPC: G02F1/133
Filed: 2001-05-08
Granted: 2002-09-01
Abstract: A digital-to-analog converter comprises first converter stage 1 for converting the m most significant bits of a k bit input signal to upper and lower voltage limits VL and VH by selecting the appropriate low impedance reference voltages. A second converter stage 2 performs a linear conversion of the n least significant bits of the k bit input within the voltage range defined by the voltage limits VL and VH. A precharging circuit comprising switches SW1 and SW2 disconnects the stage 2 from the load CLOAD, which is charged to the voltage limit VL during a precharge phase. The load is subsequently disconnected from the voltage limit VL and connected to the output of the stage 2 to complete charging of the load CLOAD to the converter output voltage.
Patent TW-I255752-B (TW)
Title: Method and apparatus for polishing a substrate
Inventor: JAE MAN-HO
IPC: B24B53/007
Filed: 2001-06-29
Granted: 2006-06-01
Abstract: There is disclosed an improved method and apparatus for polishing a substrate with polishing pad and slurry. The substrate is polished mechanically by the slurry and the abrasive surface of the polishing pad, and polished chemically by the chemical materials included in the slurry. The washing liquid for removing the pollutants generating from the polishing process and the slurry is flowed onto the polishing pad freely and vertically. Due to free and vertical flow, the washing liquid is not rebounded and flows down on the surface of the polishing pad.
Patent TW-I237946-B (TW)
Title: Clock output circuit free of glitch and method thereof
Inventor: HSI CHEN-HUA
IPC: H03L7/081
Filed: 2001-07-06
Granted: 2005-08-11
Abstract: The circuit and method provided by the present invention utilizes a leading edge or a falling edge of a clock delay line as a switching point of a variable delay clock to eliminate glitch of clock output signal. The DLL clock output circuit in a preferred embodiment of the present invention includes a selection circuit. A plurality of selection signals thereof switches the corresponding clock delay line to an output signal. Each selection signal goes through a respective delay switching circuit to delay the time point when those selection signals switch the delayed clock line to the output signal for generating the variable delay clock signal free of glitch.
Patent TW-507339-B (TW)
Title: Improved bump processing method of flip-chip bonding device
Inventor: CHEN YAN-MING
IPC: H01L23/28
Filed: 2001-07-11
Granted: 2002-10-21
Abstract: The present invention provides a processing method to have high bump height, wherein two layers of photoresist with different responses to wavelength are utilized to develop twice with light sources having different wavelength through the mask having different pattern defined. Thereby, the height of photoresist is increased to obtain a higher bump height, and also avoids the line width limitation of the UBM size. The present invention comprises the following steps: firstly, form metal pad, passivation layer, UBM layer on the chip sequentially; form two layers of photoresist on the barrier layer, utilize two masks to define the bump position and a wider region on top of the bump position, so as to break through the ratio limitation between the photoresist thickness and the pattern linewidth. Then form a conductive layer on the bump position, form a bump on the conductive layer, remove the photoresist, finally, make the bump into a spherical structure by thermal reflow, and remove the barrier layer exposed.
Patent TW-498579-B (TW)
Title: Male connector
Inventor: OE HIRONOBU
IPC: H01R9/00
Filed: 2001-08-08
Granted: 2002-08-11
Abstract: A male connector is hardly damaged by insertion into and removal from a mating female connector. The male connector comprises a main body 1 having a front face from which an engaging portion 2 projects. Side walls 2c, 2c opposite in width direction of an engaging recess 5 are inclined outward in the vicinity of opening of the recess thereby the width of the engaging recess 5 in the vicinity of the opening is larger than the width deep inside the engaging recess 5. Thus, when the male connector P engages with and disengages from the female connector R, inclining the male connector P does not cause interference of the side walls 2c, 2c of the engaging portion 2 in the vicinity of the opening of the recess 5 with a projection 22 of the female connector R and damage to the engaging portion 2 can be hardly caused.
Patent TW-504739-B (TW)
Title: Developing processing apparatus and developing processing method
Inventor: YAMAZAKI TAKESHI
IPC: H01L21/027
Filed: 2001-08-15
Granted: 2002-10-01
Abstract: Developing processing apparatus 24a to 24c comprising a spin chuck 41 which is one of holding means for holding a substrate G and a developing liquid supply mechanism for supplying the predetermined developing liquid to the substrate G held by the spin chuck 41, wherein the developing liquid supply mechanism includes a plurality of developing liquid spurting nozzles for spurting the predetermined developing liquid, for example, the nozzles 80a, 80b for the developing paddle forming, a single nozzle holding arm 51 for holding the plurality of developing liquid spurting nozzles and lift mechanisms 58a, 58b capable of adjusting the height of each of the nozzles 80a, 80b.
Patent TW-518538-B (TW)
Title: Display and image displaying method
Inventor: NAKA KAZUTAKA
IPC: G09G3/28
Filed: 2001-08-15
Granted: 2003-01-21
Abstract: A group of high order subfields and a group of low order subfields are provided, at least one independent control subfield is provided in the group of low order subfields and in other low order subfields, two lines are simultaneously address causing the same data. Hereby, a display and an image displaying method wherein an address control period is reduced, using this surplus time, the luminance is enhanced, multiple gradations are provided or a pseudo contour interference is reduced, the resolution information of a displayed image is limited and synthetic image quality is enhanced are provided.
Patent TW-513903-B (TW)
Title: Wiring pattern formation method and original substrate used for the method, and semiconductor device and manufacturing method of the same
Inventor: ONO YOSHIHIRO
IPC: H05K3/00
Filed: 2001-08-22
Granted: 2002-12-11
Abstract: A wiring pattern formation method for forming a wiring pattern on a wafer by using a transcribing operation includes a transcribing step of thermally pressing and adhering a transcribing original substrate 19 that contains a metallic wiring layer 15 to be transcribed and has a linear expansion coefficient in which a dimensional error from a wafer 10 is within a predetermined range in a heated condition, on the wafer 10, and then adhering and transcribing the metallic wiring layer 15.
Patent TW-512421-B (TW)
Title: Double dual slot load lock for process equipment
Inventor: BLONIGAN WENDELL T
IPC: H01L21/677
Filed: 2001-09-13
Granted: 2002-12-01
Abstract: Provided herein is a substrate processing system, which comprises a cassette load station; a load lock chamber; a centrally located transfer chamber; and one or more process chambers located about the periphery of the transfer chamber. The load lock chamber comprises double dual slot load locks constructed at same location. Such system may be used for processing substrates for semiconductor manufacturing.
Patent TW-I252776-B (TW)
Title: The perforated membrane
Inventor: MURASE KEI
IPC: B01D69/08
Filed: 2001-09-20
Granted: 2006-04-11
Abstract: The invention provides a hollow filament type perforated membrane having an excellent separation performance and a high permeability as well as high mechanical properties. The hollow filament type perforated membrane (5) is provided with a porous material (6) having plural pores penetrating from one surface to the other surface and a reinforcing fiber (7). The aforesaid porous material (6) includes reinforcing fibers linearly continuing in parallel to the direction of axis of the hollow filament type perforated membrane. That is, at different two positions (A, B) in the same section of the porous material perpendicular to the extensional direction of reinforcing fibers, a cross-sectional area including the same surface (A) in one surface position (A) has the reinforcing fiber (7) and another cross-sectional area including the same surface (B) in the other surface position (B) has no reinforcing fiber (7).