Patent GB-769384-A (GB)
Title: Transformer matrix system
IPC: G11C8/02
Filed: 1955-05-17
Abstract: 769,384. Electric selective signalling systems. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 17, 1955 [May 20, 1954], No. 14201/55. Class 40 (1). In a switching matrix for resolving X lines of one co-ordinate and Y discrete pairs of lines of another co-ordinate into a total of X times Y lines, where X and Y are positive integers greater than one, the X lines and the Y discrete pairs of lines are interconnected at each co-ordinate intersection by means comprising a transformer primary winding and a unilateral conducting device serially connected. As shown in Fig. 1, the device is used to select the correct storage positions for information in a magnetic core storage system in a digital computer, according to the input address signal. An address register 10 is connected by output lines 11 to 16 to a matrix 17 which is connected by lines 18 to 25 to a transformer matrix 26. The address register 10 is further connected by lines 30 to 35 to a matrix 36 which is connected by lines 37 to 44 to the matrix 26. The register 10 and matrices 17 and 36 are of any suitable known type. The matrix 26 through one of the sixty-four output lines 50 &c. supplies energy to a selected one of the Y co-ordinate lines of a magnetic memory core array forming 4096 bi-stable magnetic core registers of 33 bits each. Similarly, the X-plane driving circuit for the magnetic memory unit 60 comprises an address register 61, matrices 62, 63 and transformer matrix 65, and by suitably energizing the address registers 10 and 61, any one of 4096 magnetic registers can be selected for reading or writing information therein. Fig. 2 shows a transformer matrix which has its co-ordinate lines connected to the cathodes of valves 90 to 97 respectively, and its Y co-ordinate lines connected to the anodes of valves 110 to 115 respectively, each of the valves being normally biased below cut-off. Output lines 18 to 25 are connected to the control grids of valves 90 to 97 respectively, and each of the lines 37 to 44 is connected as shown to a pair of logical AND circuits 120 to 125. For example, line 37 is connected to AND circuits 120, 121, which are connected to the grids of valves 110, 111, respectively. The AND circuits 120, 122, 124 are each connected to a write generator 126, whereas the AND circuits 121, 123, 125 are connected to a read generator 127, each AND circuit requiring two input signals simultaneously to produce an output signal. The X and Y lines are interconnected by a circuit consisting of a transformer primary winding and a diode in series. For example, transformer primary winding 130A and diode 131 are connected between Y line 100 and X line 80, and transformer primary winding 130B and diode 132 are connected between X line 80 and Y line 101. The primary windings 130A, 130B are mutually coupled to a common secondary winding 136 which supplies bi-directional currents, depending on which primary winding is energized, to one of the co-ordinate drive lines of the memory unit 60. The remaining lines of the transformer matrix are similarly connected. Resistors 140 to 147 maintain a suitable bias on the grids of valves 90 to 97. In operation, assuming that lines 18 and 37 are energized with positive signals and write generator 126 is energized, the valve 90 conducts and line 80 is energized. AND circuit 120 causes valve 110 to conduct via line 80, winding 130A, diode 131 and line 100, to induce a pulse of one polarity in the winding 136. If the read generator 127 is energized valve 111 conducts and a pulse of the opposite polarity is induced in winding 136. The memory unit 60 consists of 33 arrays with each array sixty-four cores wide and sixty-four cores high, but for convenience each array is shown as being 6 cores high and six cores wide, the connections of the X and Y lines between arrays being shown in Fig. 4. Each array has its inhibiting or Z windings connected as shown in Fig. 3c and individually controlled by a suitable energizing circuit, the magnetomotive force produced in the inhibiting winding opposing that produced by the Y winding. Output signals from each array are obtained on sense windings connected as shown in Fig. 3d. In operation, assuming that binary number 101 has previously been written into the cores 140 to 142, of address X 1 , Y 1 , and it is desired to read the binary number, the Y 1  and X 1  lines are energized by signals from address registers 10 and 61 respectively, and the sense winding of each array is sampled by means not shown. A relatively large voltage is produced in the sense winding in the first and third array respectively but since there is negligible change in flux in core 141 the voltage in the sense winding of the second array is negligible and a binary zero is indicated. To rewrite the binary number 101 into the register the X 1  and Y 1  lines are energized in the opposite polarity to that for reading but the Z winding of the second array is energized so that core 141 remains in the stable state representing binary zero.