Patent SG-11201901209V-A (SG)
Title: Redundancy array column decoder for memory
Inventor: VIMERCATI DANIELE
IPC: G11C11/22
Filed: 2017-08-21
Abstract: INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property 111111101111 0 1110101011111 011101 0 0111111111111111111111111111111111111111111 Organization International Bureau (10) International Publication Number (43) International Publication Date .....0\"\" WO 2018/048608 Al 15 March 2018 (15.03.2018) W I PO I PCT (51) International Patent Classification: (72) Inventors: VIMERCATI, Daniele; 8000 S. Federal Way, Gl1C 8/10 (2006.01) Gl1C 11/22 (2006.01) Boise, Idaho 83716-9632 (US). GUO, Xinwei; 8000 S. Fed- (21) International Application Number: eral Way, Boise, Idaho 83716-9632 (US). PCT/US2017/047779 (74) Agent: HARRIS, Philip W.; Holland & Hart LLP, P.O. (22) International Filing Date: Box 11583, Salt Lake City, Idaho 84147 (US). 21 August 2017 (21.08.2017) (81) Designated States (unless otherwise indicated, for every (25) Filing Language: English kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, (26) Publication Language: English CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, (30) Priority Data: DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, 15/258,852 07 September 2016 (07.09.2016) US HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, (71) Applicant: MICRON TECHNOLOGY, INC. [US/US]; MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, 8000 S. Federal Way, Boise, Idaho 83716-9632 (US). OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (54) Title: REDUNDANCY ARRAY COLUMN DECODER FOR MEMORY = 410-b = 410-a 410-c r --- i` -- m 210-3 ,, = 210-b ,10-d 210-1 210-1; 210-i _ 210-a 210-c 210- - e 210-a 13 A 210-k 210-1 D - r-A-- -10-,) 210-p 210-r 2104 210-rn 210-o 210-q 210-s B D F C T1 F 1-20-a u G 11 C H 42' r , = 405- 4111 I I II I I I dk 1 1 E I I IV I I MIENIIILVIII 1 n e. II • • MI 0111111110111 4054 , 1 405-c ^ 161‘11161MI 42 0 - ' 4P•F n 405-d 11164P111611 n 11 1 110110 11.1 = 110-a III 1111111 F :1 1, 41 1 5 = 1111111111111 11111111 4' = 110-b 110-c I N111111111 110-d 11111111111111111 = 110-e 4 111111111111 4 -_n, min Ann 111111111 = 110-f = 110-g iminniiipii = „0_,, . = i 5 a miming iminnihnissim 115-rd - MBOMOU 1- -' NUAL 115-1 IIIMPIMMONI 1154 iMiiMii .= iMiiiMlii = MiiMili M MIOMIN 125-b 12c rd 112-el 125-j 112.5-k 125-1 FIG. 4 j------ 400 Il (57) : Methods, systems, and apparatuses for redundancy in a memory array are described. A memory array may include some GO memory cells that are redundant to other memory cells of the array. Such redundant memory cells may be used if a another memory cell is discovered to be defective in some way; for example, after the array is fabricated and before deployment, defects in portions of pc the array that affect certain memory cells may be identified. Memory cells may be designated as redundant cells for numerous other 7r memory cells of the array so that a total number of redundant cells in the array is relatively small fraction of the total number of cells --.., © of the array. A configuration of switching components may allow redundant cells to be operated in a manner that supports redundancy GC for numerous other cells and may limit or disturbances to neighboring cells when accessing redundancy cells. Il 0 ei O [Continued on next page] WO 2018/048608 Al MIDEDIMOMOIDEIREEMOOMOREIIMMODEVOIS (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Declarations under Rule 4.17: — as to applicant's entitlement to apply for and be granted a patent (Rule 4.17(ii)) — as to the applicant's entitlement to claim the priority of the earlier application (Rule 4.17(iii)) Published: — with international search report (Art. 21(3))