baber/WOPTO huggingface dataset:
Patent JP-H06338192-A (JP)
Title: Semiconductor memory
Inventor: TATSUMI YUICHI
IPC: G11C17/00
Filed: 1993-05-31
Abstract: PURPOSE:To improve the reliability of a semiconductor memory by preventing the overcharging of the memory against bit lines. CONSTITUTION:When memory cell selection is performed by only changing row addresses at the time of making the potential Vin at a bit line BL' coincident with a reference potential Vref, only an input pulse signal ST which only turns on transistors P5 and P6 is turned on. As a result, small-current charging is performed for a prescribed period of time (the period corresponding to the pulse width of the signal ST). When memory cell selection is performed by changing column addresses, input pulse signals ST and ST1 are turned on and the signals ST and ST1 turn on transistors P5, P6, and P8. As a result, large- current charging is performed for a prescribed period of time.
Patent JP-H06340354-A (JP)
Title: Sheet takeout device
Inventor: FUJIMOTO KEIICHI
IPC: B65H7/04
Filed: 1993-05-31
Abstract: PURPOSE:To make the takeout operation of a sheet smoothly performable by installing a first detecting means detecting the sheet before a suction cup comes into contact with the uppermost layer's sheet and a second detecting means projecting as far as the specified length toward a mount by means of the first detecting means, respectively. CONSTITUTION:A first detecting means 34 detecting a sheet 12 on an uppermost layer and a second detecting means 36 detecting the surface of a mount 14 both are installed in a suction cup supporting part 160 supporting three suction cups 168, 170 and 1712 and making them get nearer to the sheet 12 on the uppermost layer. When the suction cup 170 is approximated to the sheet 12 on the uppermost layer on the mount 14 as well as when the first detecting means 34 has detected the sheet 12 earlier than the second detecting means 36, a residual quantity of the sheet 12 is judgeable to be more than the specified quantity. In addition, when the second detecting means 36 has detected the surface of the mount 14 before the first detecting means 34 detects the surface of the sheet 12 on the uppermost layer, a fact that the number of stacking pieces of the sheet 12 on the mount 14 becomes less than the specified number is informed by an informing means.
Patent JP-S62286553-A (JP)
Inventor: HAGIWARA TATSUO
IPC: B02C2/04
Filed: 1986-06-04
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H01300513-A (JP)
Title: Formation of crystal growth nucleus or etching nucleus using photon
Inventor: SENKAWA JUNICHI
IPC: H01L21/302
Filed: 1988-05-28
Abstract: PURPOSE:To make it possible to develop a desired circuit pattern by using a semiconductor material for a substrate, forming an amorphous thin film on the surface of the substrate, projecting ultraviolet rays, X rays or white light having a specified wavelength region with the substrate being cooled, forming a semiconductor circuit pattern in the amorphous thin film, and performing heat treatment or chemical etching. CONSTITUTION:Synchrotron discharge light of ultraviolet rays, X rays or white light (wavelength region of 10<0>-10<5>eV) is projected on an amorphous very fine thin film that is formed on a substrate. For example, characters, graphics, circuit patterns, pictures (variable-density images) or photographs are formed at the desired positions with the photons of the light as latent images. The sensitized parts are selectively crystallized or etched by heat treatment, chemical etching or the like. Thus, characters, graphics, circuit patterns, photographs or pictures are made to be apparent images as variable-density images. Exposure and development are separately performed. In this way, not only the method can be utilized for growing a single crystal film, but also the specified circuit patterns, the graphics, the characters or the like can be formed as the latent images having arbitrary shapes and the development can be performed at any time.
Patent JP-H06338686-A (JP)
Title: Manufacture of multilayer substrate
Inventor: IMOTO AKIRA
IPC: H05K3/46
Filed: 1993-05-31
Abstract: PURPOSE:To provide a manufacturing method of a multilayer substrate having stable capacity temperature characteristic even after diffusion of Ag element by estimating shift of capacity temperature characteristic which is produced by diffusion of Ag element to an insulation layer. CONSTITUTION:A multilayer substrate is manufactured by laminating a glass- ceramic insulation material which is formed to insulation layers 1a to 1e and an Ag inside wiring which is formed to inside wiring patterns 2... and by baking them integrally at a temperature not exceeding a melting point of an Ag conductor. In the manufacturing method of the multilayer substrate, a capacity temperature coefficient of an insulation sheet is made -240 to 20ppm/ deg.C so that a capacity temperature coefficient of the insulation layers 1a to 1e after baked is in a range of -40 to 40ppm/ deg.C.
Patent JP-H02307946-A (JP)
Title: Knitting machine
Inventor: SUGITA YOSHIMORI
IPC: D04B15/36
Filed: 1989-05-23
Abstract: PURPOSE:To manually change into a slip stitch knitting by linking the tuck cam-operating member of a carriage with an auxiliary cam-switching member in a specific state and disposing an operating member for operating the above- mentioned operation member on the outside of the knitting range of a needle bed in a specific state. CONSTITUTION:An operation member 49 for switching a tuck cam through a switching member is linked with a switching member for switching an auxiliary cam so that the position of the auxiliary cam is switched into a position for closing a knitting passageway and opening a non-knitting passageway when the position of the tuck cam is switched into a position for closing the tuck passageway and opening the non-knitting passageway with the operation member 40. An operation means 69 provided with operation members 74, 85 for operating the operation member 49 is disposed on the outside of the knitting range of a needle bed 5 in a state capable of changing at a position acting on the operation member 49 or at a position not acting on the operation member 49, and holding means 79, 89 for holding the operation member at a non-acting position is disposed between the needle bed and the operation means.
Patent JP-H02307029-A (JP)
Title: Torque measuring method
Inventor: MARUYAMA JUNICHI
IPC: G01L25/00
Filed: 1989-05-23
Abstract: PURPOSE:To improve the measurement accuracy by placing a load of torque before measurement and then measuring torque after the load is removed. CONSTITUTION:When a main switch 20 is turned on, the switch 21 of a motor 1 in a braking circuit 16 and the switch 31 of a braking mechanism turns on interlocking each other. Consequently, while a 1st roller 8 is fixed, torque is applied from the motor 1 to a 1st roller 8 to places the load of torque while turning on a torque detection part (which turns on simultaneously with the ON operation of the switch 20). When the torque output reaches a specific value, the switch 21 of the motor 1 and the switch 31 of the braking mechanism turn off. The switch 41 of a zero adjusting circuit, on the other hand, turns on accordingly to make a zero adjustment of the torque output. After the zero adjustment, the switch 51 of a torque display part turns on to display '0'. Then, a torque measurement is taken to reduce the quantity of variation in zero point and the measuring operation is accurately performed.
Patent JP-S5463623-A (JP)
Title: Screen display system
Inventor: SAKURAI HIROSHI
IPC: G06F17/21
Filed: 1977-10-29
Abstract: PURPOSE: To program without regarding address relations by one command, by obtaining a desired position by designating simply X and Y positions on a screen in no consideration of a calculating table.  
     CONSTITUTION: In a CRT display device where input data is inputted to refresh memory 8 and is stored in data register 6 and is displayed on CRT 4, register 5 to accept display data, control part 16 to control the input of input data, and data register 6 to hold display data in register 5 which is subjected to the input control by control part 16 are provided. Further, address counter 9 which converts positions on X and Y axes given from address line 15 to addresses corresponding to memory 8 is provided to input an input/output command from the external to control part 16 through control signal line 20 and obtain addresses corresponding to memory 8, thereby designating an arbitrary position to memory 8. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H0933954-A (JP)
Title: Product containing array circuit
Inventor: BIKUTORU EMU DAKOSUTA
IPC: G02F1/133
Filed: 1996-05-24
Abstract: PROBLEM TO BE SOLVED: To solve problems arising when a data driven signal is supplied to the active matrix array of a circuit formed on a substrate. SOLUTION: An array circuit 84 and a multiplexer circuit 86 are formed on the substrate 82. By this technology, >=1 integrated (IC) structures 96 are fitted to the substrate. Each IC structure includes a single-crystal substrate having a digital-analog circuit having at least 32 analog output leads and, for example, a relatively small number, i.e., 1-3 digital input channels. As the single- crystal substrate, a DAC chip which is put on the market may be used; and digital drive signals are received on a relatively small number of lines an analog drive signals are supplied to a relatively large number of lines.
Patent JP-S5831666-A (JP)
Title: Vertical synchronizing pulse separation circuit
Inventor: WATANABE MASAHIRO
IPC: G01R13/32
Filed: 1981-08-19
Abstract: PURPOSE:To separate a vertical synchronizing pulse only from a composite synchronizing signal, by attenuating other pulses except the vertical synchronizing pulse at a Miller integrator. CONSTITUTION:A composite synchronizing signal is inputted to a terminal 42. The time constant consisting of a resistor 15 and a capacitor 16 is taken smaller than a horizontal synchronizing pulse and an equalizing pulse and larger than a vertical synchronizing pulse. When the integration time constant is sufficiently smaller than the pulse width, an input signal is outputted as it is. Further, when sufficiently larger, no input signal is outputted. Thus, the integrator can sufficiently attenuate components other than a vertical synchronizing signal in the composite synchronizing signal. But the vertical synchronizing signal is also attenuated. Further, through the use of a voltage comparator 18 having a reference voltage source for the purpose of slicing, the vertical synchronizing signal can be accurately picked up.
Patent JP-S61289339-A (JP)
Title: Correcting device for quantity of light of copying machine
Inventor: YAMAGUCHI TAKAO
IPC: G03G15/041
Filed: 1985-06-17
Abstract: PURPOSE:To correct the quantity of light continuously and securely by composing a diaphragm of two diaphragm plates which rotate associatevely with variable power operation and have noncircular openings. CONSTITUTION:Rotary members 5 and 5' for variable power are rotated by operating layers 13 and 13' together with the diaphragm plates 10 and 10' respectively. When the openings of the diaphragm plates 10 and 10' and elliptic, the quantity of transmitted light is maximum with the elliptic openings in the same axial direction. When the two diaphragm plates are rotated relatively, the openings are narrowed down and the quantity of transmitted light varies according to variable power. When a zoom ring is rotated by one turn, moving frames 5 and 5' are moved by positioning pins 6 and 6' along guide grooves 2 and 2' of the zoom ring 1 and cam grooves 4 and 4' of a zoom liner 3. A variable diaphragm is used as this diaphragm 8 to correct the quantity of light by rotating the zoom ring 1 as well as variable power.
Patent JP-S5354945-A (JP)
Title: Waveguide converter
Inventor: HARUYAMA TETSUO
IPC: H01P5/08
Filed: 1976-10-29
Abstract: PURPOSE:To obtain a waveguide converter which is capable of matching the reflection characteristics over a wide range even in case the measurements are varies for a flexible waveguide.
Patent JP-S6110380-A (JP)
Title: Time division multiplex picture display device
Inventor: MORIYAMA SEIJIROU
IPC: H04N7/081
Filed: 1984-06-26
Abstract: PURPOSE:To display simultaneously plural pictures on a display scope by receiving plural picture signals, displaying the signals in time division on the same display scope and extracting selectively a desired picture signal in synchronizing with the time division display timing. CONSTITUTION:A television picture receiver 1 receives a television signal transmitted from a broadcast station, and applies time division to the signal. A picture display device 2 displays plural pictures subject to time division as they are. A selection signal generator 5 generates a selection signal 6 to select one picture synchronously with the picture subject to time division and multiplexly displayed on the picture display device according to the selected information. The picture selecting device 4 selects one picture by switching selectively the time division multiplex picture 3 in response to the selecting signal 6.
Patent JP-2000320632-A (JP)
Title: Planetary roller type power transmission device
Inventor: INOUE MASAHIRO
IPC: F16H13/08
Filed: 1999-05-11
Abstract: PROBLEM TO BE SOLVED: To provide a planetary roller type power transmission device which can bring about satisfactory machinability and assembling performance, and reduction in weight. SOLUTION: Unevenness to be fitted in each other, such as serration teeth 19A, 19B are formed on an outer peripheral surface of an outer ring 3 and an inner peripheral surface of an attaching hole 8a of a support 8 in an axially continuous manner. In such a state, the outer ring 3 is inserted into the attaching hole 8a to the extent that it abuts against a step portion 18 serving as an abutting means provided inside the attaching hole 8a. A caulking part is formed on a connection part between the support 8 and the outer ring 3, for performing turning prevention and axial positioning.
Patent JP-H09310404-A (JP)
Title: Multilayer building
Inventor: TAKAHASHI MASAAKI
IPC: E04B1/04
Filed: 1996-05-24
Abstract: PROBLEM TO BE SOLVED: To provide a multilayer building as a highly aseismatic ultramultistoried building. SOLUTION: A building which is provided with an outer periphery frame 3, a middle frame 4 and an inner periphery frame 5 has an outer periphery floor panel 6 and an inner periphery floor panel 7 formed between the outer periphery frame 3 and the middle frame 4 and between the middle frame 4 and the inner periphery frame 5, respectively. The outer periphery floor panel 6 and the inner periphery floor panel 7 are in mutually step different structures, a floor panel 49 is set up on the inner periphery floor panel 7 at the same level as the outer periphery floor panel 6 and a space 51 and an underfloor storage 52 for an installation piping 50 are made between the floor panel 49 and the inner periphery floor panel 7.
Patent JP-S5556727-A (JP)
Title: Signal converting circuit
Inventor: KAWAKAMI YUUICHI
IPC: H03M1/50
Filed: 1978-10-23
Abstract: PURPOSE: To shorten executive conversion time by varying a voltage by steps from zero to a power voltage by clocks, by applying it to one input terminal of a comparator together with an analog input voltage, and by applying a voltage, rising by a constant potential at fixed intervals of time, to the other input terminal of the comparator.  
     CONSTITUTION: Control circuit CNT, outputting clocks ϕ 1 ...ϕ 3 , ϕS, ϕA, and ϕB, consists of two counters N 1  and N 2 . Here, when power voltage VD is denoted by VD, clocks ϕ 1 ...ϕ 3 , and ϕS are of 0...VDV in amplitude and input voltage V 1  is between reference voltage V ref  and 0V. Then, applying alternate clocks ϕA and ϕB to FETs T 6  and T 7  increase a potential at point A, constant potential by constant potential, and when the potential at point A becomes higher than that at point B, the output of comparator CMP is held high. Next, the number of clocks ϕA while clock ϕ 3  is low and that of clocks ϕA while clock ϕ 1  is low after clock ϕ 3  changes from a low level to a high level are counted by counters N 1  and N 2  to find an unknown voltage, so that the executive conversion time can be shortened. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S5464420-A (JP)
Title: Logic circuit for misoutput prevention
Inventor: TAKEZOE FUMIHIKO
IPC: H03K19/00
Filed: 1977-11-01
Abstract: PURPOSE: To make easy for circuit integration, by adding the misoutput prevention function to the constitution of logic circuit itself and simplifying the constitution of the logic circuit, in the logic circuit preventing the misoutput if the power supply voltage to the logic circuit is not within the operation guarantee range.  
     CONSTITUTION: The misoutput prevention logic circuit is constituted by providing the logic judging section 1 having the transistor Tr1, output rejection section 3 constituted with the zener diode Z inputting the output of the judging section 1, and the output section 2 having the output transistor T2 driven with the output of the rejection section 3. Further, the rejectin section 3 driving the output section 2 is constituted so that is can not be operated until the logical operation of the logic judging section 1 is normal, and if the power supply voltage Vp to the logic circuit is not within the operation guarantee range, the judging output is rejected. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H04331738-A (JP)
Title: Production of rare earth metal-added optical fiber
Inventor: TANAKA TAIICHIRO
IPC: H01S3/07
Filed: 1991-05-02
Abstract: PURPOSE:To provide a method for producing an optical fiber homogeneously mixed with a metal such as a rare earth metal and with Al. CONSTITUTION:A method for producing an optical fiber base material comprises a retaining part-forming process for forming a retaining part for an additive solution in a starting quartz tube, a soot-depositing process for depositing soot in the retaining part, an additive-doping process for doping the soot-deposited part with an additive, and finally a collapsing process. Since the rare earth metal and the Al can be added to the optical fiber base material in high concentrations, the wavelength-gain characteristics of the produced optical fiber are largely improved. Since the Al is also added in a high concentration, a co-operative.up.conversion effect is reduced in a light-amplifier using the optical fiber.
Patent JP-S62286736-A (JP)
Inventor: SEKIGUCHI TOMONOBU
IPC: B32B7/02
Filed: 1986-06-05
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5831161-A (JP)
Inventor: TANAKA SHIYOU
IPC: D06B15/10
Filed: 1981-08-19
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H06342124-A (JP)
Title: Laser beam reflector
Inventor: YOKOZAWA TAKESHI
IPC: G02B17/00
Filed: 1993-06-01
Abstract: PURPOSE:To provide a laser beam reflector capable of coping with a high output laser beam. CONSTITUTION:The reflector is constituted of a reflection mirror supporting shaft 11 rotatably provided in the vicinity of the optical path of the high output laser beam 8, the reflection mirror 12 attached to the shaft 11 and reflecting the high output laser beam 8 in the case the shaft 11 is turned to a fixed position, and a driving device 10 rotating the shaft 11. Thus, the reflection mirror 12 intermittently shielding the high output laser beam 8 is not exposed to the high output laser beam 8 for a long time, so that it is prevented from being deformed and damaged by heat.
Patent JP-S5920854-A (JP)
Title: Measure of soundness for zirconium-based alloy structural member in reactor
Inventor: HIGASHINAKAGAHA EMIKO
IPC: G01N17/00
Filed: 1982-07-27
Abstract: PURPOSE:To permit to accurately measure aging soundness of structural members in a non-destructive manner by a method wherein the surface of the zirconium-based alloy structural member in a reactor is image-processed using an image sensor to measure the area of corrosion products caused on the surface relative to the total surface area. CONSTITUTION:After taking out a zirconium-based alloy structural member and transferring it into a fuel storage pool for cleaning of its surface, corrosion status of the surface is sent to a remote image processing unit in the form of an electrical signal using a TV camera, so that the area ratio of sound black portion to white portion caused by corrosion is determined by a built-in image sensor. The resultant area ratio is compared with a given reference value to judge the soundness and decide whether its continued use is allowable. It may be possible that the film taken by a camera is image-processed using an image sensor, or that an image sensor provided with a photomultiplier is directly mounted in the pool, the signal from each sensor being sent to a remote counter to determine the area ratio. Simple non-destructive measurement is thus made possible.
Patent JP-S5558346-A (JP)
Title: Super heat resistant alloy having high ductility at ordinary temperature
Inventor: IZUMI OSAMU
IPC: C22C19/03
Filed: 1978-10-24
Abstract: PURPOSE: To provide a high ductility at ordinary temp. to a super heat resistant alloy by constituting the alloy compsn. by adding 3% or less of B to a Ni-Al intermetallic cpd. represented by LI 2  type to reduce matrix γ-phase to approximately zero.  
     CONSTITUTION: 3% or less of B is added to a Ni-Al intermetallic cpd. forming a regular lattice called LI 2  type, contg. Ni and Al arranged at the regular positions of a face-centered cubic lattice, and forming principal strengthening phase γ' of a Ni hard alloy. By selecting the amt. of Al to Ni the γ'-phase can be formed suitably, and matrix γ-phase causing remarkable strength lowering at high temps. is reduced as little as possible. The resulting alloy exhibits a higher yield stress (σ0.2) value at a high temp. than a value at ordinary temp., and the values at 1000°C and ordinary temp. are about the same. The alloy has epochal ductility at ordinary temp., and it is a super heat resistant alloy suitable for use as a material for a missile, etc. which will be exposed to a high temp. over a long time. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S5833738-A (JP)
Title: Microprogram controller
Inventor: KAWAGUCHI TOORU
IPC: G06F11/22
Filed: 1981-08-20
Abstract: PURPOSE:To make the generation of a pseudo failure easy for an input and output instruction to the software, by reporting an input and output status word designated as the input and output status word at the end of an input and output instruction execution to a host device. CONSTITUTION:A magnetic tape controller 2 receiving/transmitting an input and output instruction from/to a central processing unit 1 gives a read instruction to a magnetic tape device 3 under the control of a microprogram control section 21 and starts reading. The read information transferred from the magnetic tape device 3 is checked at a read circuit for the guarantee of the read information. If a panel permission designation section A performs panel permission, the switch information in 8-bit indicated with an input and output instruction word designation section (bits 0-7) and an existing read command bit are compared. If they coincide, the bits are replaced with the content (bits 12-19) of a pseudo I/O status byte setting section and the information is reported to a host device.