baber/WOPTO huggingface dataset:
Patent TW-402846-B (TW)
Title: Capacitor-swithched array DAC and control
Inventor: KATO FUMIHIKO
IPC: H03H19/00
Filed: 1998-06-20
Granted: 2000-08-21
Abstract: The DAC includes one unique capacitor array(6) with several priority-added capacitors(Ci),the 1st capacitor(2) is connected with the output of the OP amplifier,and the OP Amp inverse input(-) is connected with the 2nd capacitor(7). One CLK may operate with POL to maintain logic level between ""High"" and ""Low"" and we could also provide a controller(8/9/10/11) with a digital signal as a source.T he controller may turn on the switch unit(12/13/14/15) according to the logic level of digital signal and selectively supply those priority-added capacitors with the 1st reference voltage(V1) and the 2nd reference voltage(V2). Furthermore, as soon as the 3rd reference voltage(V3) assures that the pulse T10 may supply priority-added capacitors as a source, the switch unit may operate with an inverse order of the previously-mentioned pulse to perform switch operation to cause the OP Amp to generate an analog output signal.
Patent TW-393428-B (TW)
Title: Manual pump with free-moving piston fitted with a collar
Inventor: HERMOUET YANNIC
IPC: B05B11/00
Filed: 1998-07-04
Granted: 2000-06-11
Abstract: Manual pump for the distribution of fluids comprising: - a pump body (1) constituting a pump chamber fitted with an inlet valve (5), - a hollow actuating rod (2) capable of being displaced in the pump body (1) between a rest position and a depressed position, the said rod (2) being drawn into the rest position by a return spring (6), the said rod (2) comprising an internal outlet channel (201).  - a free-moving piston (3) capable of sliding inside the pump body (1) and on the actuating rod (2), the piston (3) operating in conjunction with the rod (2) to form an outlet valve that seals the internal outlet channel (201) in the rest position. Characterized by the fact that the friction forces applied between the piston and the pump body are greater than the friction forces applied between the piston and the actuating rod.
Patent TW-486530-B (TW)
Title: Papermachine clothing
Inventor: JEFFERY JOHN
IPC: D21F7/08
Filed: 1998-07-04
Granted: 2002-05-11
Abstract: Papermachine clothing comprises a base fabric comprising at least two superimposed perforated non-woven membranes (11, 12), the upper or paper side one of which (11), has a lower maximum creep modulus and is less hard than the lower or machine side membrane (12).
Patent TW-393542-B (TW)
Title: Machine for the multiple-pass dyeing of cord fabrics
Inventor: CAGNAZZI DANILO
IPC: D06B3/28
Filed: 1998-10-07
Granted: 2000-06-11
Abstract: A machine for the multiple-pass dyeing of cord fabrics, comprising a dyeing vat (11) containing at least two Overflow or Jet units arranged one after the other and associated with at least two reels (12-17) straddling the same number or fabric collecting vats (18-23) and of Overflow or Jet funnels (24-29), so as to pick up the cord fabric (36) contained in the collecting vats and introduce it into the Overflow or Jet funnels, said fabric being tied into a ring, characterized in that for the purposes of passing said cord fabric the collecting vats (18-23) and Overflow or Jet funnels (24-29) are connected to each other in a non-sequential manner and in a number lower than the maximum number of collecting vats and Overflow or Jet funnels present in the machine. Moreover, in machines equipped with at least four compartments, two of the collecting vats and the Overflow or Jet funnels set next to the opposite ends of the dyeing vat are connected in series to each other.
Patent TW-455799-B (TW)
Title: Method and device for parameter setting of enemy character level in computer game
Inventor: ARAI KOJI
IPC: G06F19/00
Filed: 1998-11-11
Granted: 2001-09-21
Abstract: The present invention relates to a computer game played by the operations of the player. Especially, it relates to a method for parameter setting of enemy character level in a computer game of diversified story developed in accordance with multiple scenarios where, in order to set an appropriate enemy character level in the computer game, the enemy character level is calculated based on the player character level at the first encounter between the player character operated by the player and the enemy character.
Patent TW-408239-B (TW)
Title: Optical coupler assembly and method making the same
Inventor: CHANG PETER C
IPC: G02B6/28
Filed: 1998-11-11
Granted: 2000-10-11
Abstract: A coupler (30) includes an enclosure (32) sealing therein a fiber assembly (34) consisting essentially of a pair of fibers (36). The fiber assembly (34) includes a hourglass-like configuration (38) on the middle portion wherein a reinforcement structure (40) is applied to the neck portion (42) of said fiber assembly so as to enhance the strength thereof, so that the whole coupler (30) can own a better mechanical character for convenient and reliable usage.
Patent TW-381031-B (TW)
Title: Slow-release high-viscous liquid composition for a volatile substance
Inventor: YAMAGUCHI TETSUHIKO
IPC: A61Q13/00
Filed: 1998-11-27
Granted: 2000-02-01
Abstract: To provide a slow-release high-viscous liquid composition for a volatile substance, which can contain a surfactant or alcohol for dispersion solubilizing the volatile substance in a high concentration and has excellent light stability. A slow-release high-viscous liquid composition for a volatile substance comprises volatile substance, poly-N-vinylcarboxylic acid amide-base resin soluble in water or hydrous alcohol, a surfactant, water, and if desired an alcohol.
Patent TW-522536-B (TW)
Title: Bumpless flip chip assembly with strips-in-via and plating
Inventor: LIN WEN-CHIANG
IPC: H01L21/60
Filed: 1998-12-17
Granted: 2003-03-01
Abstract: A flip chip assembly, and methods of forming the same, including a single or multi-layer substrate having a plurality of via holes of which the preformed strips or wires inside the via holes serve as the connections between the semiconductor device and substrate circuitry is described. The assembling steps comprise of attaching an integrated circuit (IC) chip or chips to a rigid or flexible substrate circuitry having a plurality of pre-formed strips extended from the patterned circuitry and hanging inside a plurality of through holes. These through holes are aligned and placed on top of the terminal pads so that the respective traces on the substrate can be connected with the respective input/output terminal pads of the IC chip through the leads inside the via holes. After attachment, electrically conductive material is subsequently connect these leads to the IC terminal pads through electrolytic plating, electroless (chemical) plating or solder re-flow processes. The joining material can provide mechanical support as well as electrical continuity between IC chip and the circuitry of the substrate.
Patent TW-390925-B (TW)
Title: Structure of arranging piping unit
Inventor: TANAKA YOSHICHIKA
IPC: E03D11/00
Filed: 1998-12-21
Granted: 2000-05-21
Abstract: The invention provides a structure of arranging a piping unit which can be placed in a built-in manner by adjusting a frontage at work site after completing an interior finish work. In the structure of arranging a piping unit placed in a crossing portion between a wall surface and a floor surface, the piping unit comprises a central ornamental plate arranged at a predetermined interval apart from the wall surface, a sanitary equipment provided on a front surface of the central ornamental plate, pipes provided between the central ornamental plate and the wall surface and supplying and discharging water to and from the sanitary equipment, and a side ornamental plate, the side ornamental plate has an inner end portion fixed on both side end portions of the central ornamental plate and an outer end portion opposing to the inner end portion, and a distance from the outer end portion of the side ornamental plate to the side end portion of the central ornamental plate can be adjusted.
Patent TW-368573-B (TW)
Title: Valve device
Inventor: TAKESHIMA KIKUO
IPC: F16K3/12
Filed: 1999-01-14
Granted: 1999-09-01
Abstract: A kind of valve device that in the valve box and sliding portion of valve body to apply ceramic coating of CrN on the valve base material for the sliding portion of valve body. The sliding portion of valve box employs the base material of valve box as the valve device. The sliding portion of valve body is also applied with the CrN ceramic coating with excellent test result on the base material which can increase the anti-wearing and air-tight properties of the sliding portion of the valve device and also to reduce the cost for increasing the reliability of the valve device.
Patent TW-400654-B (TW)
Title: The manufacture method of semiconductor device and the heat treatment device
Inventor: IKUTA KOOZO
IPC: H01L21/20
Filed: 1999-02-12
Granted: 2000-08-01
Abstract: This invention is to provide a method of producing a semiconductor device stably without causing any harmful effect, such as thermal stress, in an insulating substrate and a semiconductor thin film formed on the insulating substrate and a heat treating apparatus are disclosed. The method for heat-treating a substrate (1) on which an amorphous silicon film (2) is formed comprises a heating step at which the substrate (1) is preheated by irradiating one side of the substrate (1) with intermediate infrared radiation (100) having a wavelength band of 2.5 to 5 mu m, and a heat-treating step at which the amorphous silicon film (2) is annealed and crystallized at above 800 DEG C and below 1000 DEG C by irradiating the other side with near infrared radiation (200) having a wavelength band of below 2.5 mu m.
Patent TW-407364-B (TW)
Title: Memory apparatus, card type memory apparatus, and electronic apparatus
Inventor: IWASAKI HIROSHI
IPC: H01L23/498
Filed: 1999-03-22
Granted: 2000-10-01
Abstract: The topic of this invention is to provide acompact, thin shape, high exchange capability and portable memory apparatus. The solving means of this invention is: said memory apparatus 10, which comprises: for example, the wiring substrate 11 having a first facet and the second facet, and the planar type outer connecting pin 12a located on the first facet of the wiring substrate 11, the second facet of being loaded on the wiring substrate 11, the semiconductor device 14 of the connecting pin 14a connected with the planar type outer connecting pin 12a, and the seal-stop resin 15 located by the way of the semiconductor device 14 with the second facet of the wiring substrate 11, the wiring substrate of the above-mentioned of the semiconductor device of the above-mentioned first facet is exposed to the planar type outer connecting pin, semiconductor device and the card clamping frame embedded on the concave portion or hole portion of the seal-stop resin portion, and the connecting resin to be adhered to said device. Furthermore, said memory apparatus is to combine the clamping means of the clamping cards using the way of exposing one facet with planar type outer connecting pin, and could be used as the card type memory apparatus of which the size is larger than said size.
Patent TW-417130-B (TW)
Title: Method and apparatus for modulating the brightness and contrast of cathode ray tube
Inventor: CHENG KUEI-PI
IPC: H01J29/00
Filed: 1999-04-21
Granted: 2001-01-01
Abstract: The present invention is a method and apparatus for modulating the brightness and contrast of cathode ray tube, in particular a kind of protection apparatus which is to automatically control the brightness and contrast of cathode ray tube while displaying the images of DVD, VCD films or 3D games and improving the dynamic visual effect and preventing the damage of cathode ray tube due to the over current. The method uses a display mode control unit to generate an exciting signal to a signal processing unit for switching the current display mode to an enhanced mode; then, using a detecting unit to detect the working current flowing through the cathode ray tube and conducting judgment on the detected result by the signal processing unit; and, controlling the working current outputted from an image modulating unit based on the result of judgment so as to limit the working current flowing through cathode ray tube in an allowable safety range; therefore, the invention can achieve a high contrast dynamic imaging effect and also protect the cathode ray tube.
Patent TW-483951-B (TW)
Title: Improved lead electrode
Inventor: BROWN JR CARL W
IPC: C25B11/03
Filed: 1999-04-30
Granted: 2002-04-21
Abstract: A compound electrode incorporating a lead substrate utilizes the lead as a support structure. This support structure provides a surface that engages a mesh member, e.g., a valve metal expanded metal mesh. The mesh member has a front and back surface with the back surface facing the lead support structure. At least the front surface of the mesh member is an active surface. Securing of the mesh member to the lead support structure in electrical connection permits the lead support structure to serve as a current distributor for the mesh member. The mesh member may engage the surface of the lead support structure as by pressing or rolling the mesh onto the lead. Other engagement means can include the use of fasteners, or welding and the like. The resulting structure can be particularly useful as an electrode assembly for use in an electrolytic cell that serves for the electrowinning of a metal.
Patent TW-446869-B (TW)
Title: Dynamic monitoring and control method of registered libraries
Inventor: LIN KUANG-SHIN
IPC: G06F11/30
Filed: 1999-05-14
Granted: 2001-07-21
Abstract: The invention relates to a dynamic monitoring and control method of registered libraries, in particular a method with the filtering interface capable of dynamically monitoring and controlling the registered libraries of currently operating OS (such as Windows 95/98). When OS receives a registration request, a DLL is used to allocate a related filter to proceed the check for the monitoring and control conditions of the registration request by means of the pattern analysis result of the registration request. In addition, the flag or initiation of monitoring and control related to the registration is set up when verifying the compliance between the registration request and the monitoring and control conditions. As such the occupied system resources are relatively small and the processing speed is faster so that the real-time monitoring and control functions of OS can be achieved.
Patent TW-522272-B (TW)
Title: Liquid crystal display device
Inventor: MORISHITA SHUNSUKE
IPC: G02F1/13
Filed: 1999-06-16
Granted: 2003-03-01
Abstract: A liquid crystal display device includes a liquid crystal display panel having a liquid crystal layer sandwiched between a pair of upper and lower substrates, an illuminating light source disposed behind the liquid crystal display panel, an upper case made of metal having a sidewall bent back from a periphery of a front portion thereof and a window approximately corresponding to a display area of the liquid crystal display panel, a lower case made of resin for housing the illuminating light source in a recess thereof, and an inner frame made of metal having an opening for allowing light from the illuminating light source to be directed toward the liquid crystal display panel and interposed between the liquid crystal display panel and the lower case, the upper case and the lower case being clamped together after stacking the liquid crystal display panel, the inner frame and the illuminating light source in the order named between the upper case and the lower case.
Patent TW-461912-B (TW)
Title: Microparticles produced from cycloolefin copolymers and their use for controlled active-substance release
Inventor: RUEPPEL DIETHER
IPC: B01J13/18
Filed: 1999-07-26
Granted: 2001-11-01
Abstract: The present invention relates to the preparation of novel microparticles obtainable from at least one cycloolefin copolymer with the aid of formulation auxiliaries, preferably diatomaceous earth, for controlled active-substance release.
Patent TW-434625-B (TW)
Title: Dynamic focus voltage amplitude controller
Inventor: GEORGE JOHN BARRETT
IPC: G09G1/00
Filed: 1999-08-05
Granted: 2001-05-16
Abstract: A resistive voltage divider is responsive to a parabolic voltage developed in an S-shaping capacitor of a deflection circuit operating at a selected deflection frequency. The voltage divider includes a controllable resistive network for automatically selecting an attenuation factor of the voltage divider in accordance with the selected deflection frequency. An amplifier responsive to the attenuated parabolic voltage generates at an output terminal of the amplifier a periodic output voltage that is capacitively coupled to a focus electrode to produce a dynamic focus voltage. In a first embodiment, the controllable resistive network includes a photo-resistor that provides automatic gain control. In an alternative, second embodiment, the voltage divider is switched.
Patent TW-413916-B (TW)
Title: Integrated circuit stack structure
Inventor: HUNG JIA-YU
IPC: H01L23/48
Filed: 1999-08-18
Granted: 2000-12-01
Abstract: An integrated circuit stack structure is provided, which stacks a plurality of integrated circuit packaging body together. Among the stacked integrated circuit leads, a stack substrate is arranged for connection. Both surfaces of the stack substrate has a plurality of contact points for electrically connecting to the corresponding leads. The stack substrate has a plurality of conductive through holes for connecting the corresponding contact points on the two surfaces. In two stacked integrated circuits, the stacked substrate is able to form a hole for receiving the packaging body of one of the integrated circuits. Alternatively, multiple separated substrates can be arranged on the edge of one of the integrated circuit packaging body, thereby reducing the thickness of the integrated circuit stack.
Patent TW-445629-B (TW)
Title: Resettable integrated circuit package
Inventor: WANG BING-LUNG
IPC: H01L23/62
Filed: 1999-09-14
Granted: 2001-07-11
Abstract: The present invention discloses a kind of integrated circuit package that has overvoltage protection circuit. In the output and input route of power source for the integrated circuit product, a resettable fuse is connected in series such that the resettable fuse will automatically cut off the power and then automatically reset the integrated circuit chip when the integrated circuit product is subjected to the overvoltage input. Therefore, the circuit on the integrated circuit chip can be prevented from being destroyed by the overvoltage.
Patent TW-498116-B (TW)
Title: Textile planar structure
Inventor: KALDENHOFF RALF
IPC: D03D/
Filed: 1999-10-27
Granted: 2002-08-11
Abstract: A textile planar structure as or for paper machine cloths (1), transport belts, or filtering means, has at least two textile plies (2, 3) of which at least one textile ply is a fabric ply (2, 2) having first structural yarns (4-14, 23, 24, 35-45) that run in one direction and having second structural yarns (15-22, 25, 26, 27-34) that run transversely thereto, groups of respectively adjacent first structural yarns binding, as first binding structural yarns (23, 24), into at least two textile plies (2, 3) in such a way that in at least one textile ply (2, 3) they alternate when viewed in their extension direction. According to the present invention, groups of respectively adjacent second structural yarns bind, as second binding structural yarns (25, 26), into at least two textile plies in such a way that in these groups, the binding structural yarns (25, 26) alternate in at least one textile ply (2, 3) when viewed in their extension direction.
Patent TW-430932-B (TW)
Title: Trench isolation region
Inventor: WU SHIE-LIN
IPC: H01L21/76
Filed: 1999-11-04
Granted: 2001-04-21
Abstract: In the present invention, the trench isolation structure formed in the semiconductor substrate comprises: recess area, a first insulation layer, and a second insulation layer. The recess area is located in the substrate. The recess area has a round angle on the bottom corner and the place adjacent to the substrate. The first insulation layer is located on the surface of the recess. The first insulation layer covers the edge area of the surface of the active area on the substrate. The second insulation layer is filled on the first insulation layer in the recess area. In a preferred embodiment, the second insulation layer also covers on the first insulation layer at the edge area of the surface of the active area.
Patent TW-434908-B (TW)
Title: Manufacturing method of metal oxide semiconductor transistor
Inventor: LI JENG-HUNG
IPC: H01L21/285
Filed: 1999-12-13
Granted: 2001-05-16
Abstract: This invention is about manufacturing method of metal oxide semiconductor transistor. A layer of plasma enhanced silicon oxide with a low step coverage is formed in between the gate spacer and polysilicon gate. Using the characteristic of plasma enhanced silicon oxide layer for forming the suspending protrusion at the peak corner position of polysilicon gate, an opening with a wide-top and narrow-bottom structure is formed between gate spacer and polysilicon gate after part of plasma enhanced silicon oxide layer is removed. After that, a metal silicide process is performed to form a metal silicide layer on the exposed surface of heavily doped source/drain regions and polysilicon gate.
Patent TW-434833-B (TW)
Title: Structure and manufacturing method for high voltage device
Inventor: YANG SHENG-SHIUNG
IPC: H01L21/8238
Filed: 1999-12-17
Granted: 2001-05-16
Abstract: A high voltage device structure is constructed on the first conductive substrate, and the structure further comprises: a second conductive epoxy silicon layer having a gate and located on the substrate; a first doping area of the second conductive type between the substrate and the epoxy silicon; a second doping area of the second conductive type in the epoxy silicon layer on one side of the gate combining part of the first doping area; a third doping area of the second conductive type in the epoxy silicon underneath the gate; a fourth doping area of the second conductive type in the epoxy layer on the second doping area, a combining part of the fourth doping area and part of the second doping area; a first conductive well region in the epoxy silicon between the third doping area, the fourth doping area and the gate covering part of the well region; a second conductive source region in the well region exposed by the gate; a fifth doping area of the first conductive type in the well region between the source region and the fourth doping area; and, a sixth doping area of the first conductive type underneath the source region.
Patent TW-525391-B (TW)
Title: Method and apparatus for performing motion compensation in a texture mapping engine
Inventor: PIAZZA THOMAS A
IPC: H04N7/36
Filed: 2000-01-15
Granted: 2003-03-21
Abstract: A method and apparatus for motion compensation of digital video data with a texture mapping engine is described. In general, the invention provides motion compensation by reconstructing a picture by predicting pixel colors from one or more reference pictures. The prediction can be forward, backward or bi-directional. The architecture described herein provides for reuse of texture mapping hardware components to accomplish motion compensation of digital video data. Bounding boxes and edge tests are modified such that complete macroblocks are processed for motion compensation. In addition, pixel data is written into a texture palette according to a first order based on inverse discrete cosine transform (IDCT) results and read out according to a second order optimized for locality of reference. A texture palette memory management scheme is provided to maintain current data and avoid overwriting of valid data when motion compensation commands are pipelined.