baber/WOPTO huggingface dataset:
Patent TW-266236-B (TW)
Title: Auxiliary device for underwater embanking
Inventor: KE JONG-YEONG
IPC: E02B7/00
Filed: 1995-05-19
Granted: 1995-12-21
Abstract: An auxiliary device for underwater embanking, which comprises pivotally installing an upper clamping device and a lower clamping piece on a base in which the two clamping pieces are corresponding to each other; pivotally installing a rotating shaft between the two clamping pieces in which the two clamping pieces uses the pivotal shaft as the center to extend forward to form a clamping part with appropriate curvature and extend backward to form an application section in which the application section of the upper clamping piece is installed with a cylinder in which the pressure rod extended from the cylinder is connected to the application section of the lower clamping piece, installing rollers at the bottom of the base, using cables connected to the base from the operation ship to control the auxiliary device, connecting pneumatic and hydraulic pipes to the cylinder and installing sand bags between the upper and lower clamping pieces so that during flood tide the operation can be continued in the sea water.
Patent TW-265300-B (TW)
Title: Cushioning conversion machine
Inventor: JOSEPH J HARDING
IPC: B31B50/36
Filed: 1995-07-21
Granted: 1995-12-11
Abstract: A cushioning conversion machine having a feed apparatus for feeding stock through the machine and converting it to a cushioning product, a cutting assembly for cutting the cushioning product and a controller which includes a plurality of sensing devices for sensing the occurrence of predetermined events, a plurality of output ports for controlling one of a plurality of possible cutting assemblies which may be employed with the cushioning conversion machine, a selector switch for selecting one of a plurality of control options, and a processor for controlling the employed cutting assembly in accordance with events detected by the sensing devices and the control option selected.
Patent TW-276355-B (TW)
Title: Integrated circuit with planar conductive layer structure
Inventor: LIAW ING-RUEY
IPC: H01L21/768
Filed: 1995-09-07
Granted: 1996-05-21
Abstract: An implementing method of planar conductive layer with semiconductor substrate comprises the steps of: one semiconductor substrate with field effect transistor and field oxide area for isolating source/drain of the field effect transistor; patterning the first polysilicon layer, one portion forming gate of the field effect transistor, the other portion forming internal connection conductive layer of field oxide area, in which the first polysilicon layer has one insulating layer and sidewall insulator; depositing the second insulating layer on the first insulating layer and sidewall insulator on the gate, and other area on the substrate; etching contact window of source/drain area on the second insulating layer; depositing the second polysilicon layer and doping impurity, and forming ohm contact with the above source/drain area; depositing and covering the third polysilicon layer with thickness enough to fill up gaps of the above patterned first polysilicon layer; etching back the third polysilicon layer to the second polysilicon layer interface, leaving partial third polysilicon layer in the gap of the first polysilicon layer, therefore achieving surface partial planarization goal on gate area and field oxide area; depositing metal silicide on the second polysilicon layer and portion of the third polysilicon layer, forming planar conductive layer, supplying more planar surface for preventing photoresist pattern from distortion resulting from bad optical exposure and development; etching metal silicide, then patterning the second and the third polysilicon layer until the above second insulating layer, completing electric contact of patterned conductive layer and source/drain area of field effect transistor.
Patent TW-294590-B (TW)
IPC: A61F13/53
Filed: 1995-11-06
Granted: 1997-01-01
Abstract: The present invention relates to absorbent products like baby diapers, adult incontinence products and particularly to sanitary napkins or pantyliners. These absorbent products all have absorbent cores which according to the present invention comprise absorbent gelling materials in granular form or other particles. A problem associated with such cores is that these particles can migrate out of the article along the paths of liquid entry into the product. Therefore a shield positively separating the paths of liquid transport into the product from the particles is provided for absorbent structures according to the invention. <IMAGE>
Patent TW-293931-B (TW)
Title: Manufacturing method of DRAM capacitor
Inventor: HWANG HERNG-SHENG
IPC: H01L21/31
Filed: 1996-02-16
Granted: 1996-12-21
Abstract: A manufacturing method of DRAM capacitor comprises of the following steps: (1) supplying one substrate; (2) on the silicon substrate forming field oxide, gate layer, source/drain region and one first dielectric; (3) forming contact window; (4) forming one first polysilicon layer; (5) forming one second polysilicon layer; (6) on the second polysilicon side wall forming side wall spacer; (7) forming one second dielectric; (8) forming one third polysilicon.
Patent TW-391978-B (TW)
Title: New process for the preparation of precipitated silica, new precipitated silicas containing zinc and their use for the reinforcement of elastomers
Inventor: BOMAL YVES
IPC: C08L21/00
Filed: 1996-03-28
Granted: 2000-06-01
Abstract: The invention relates to a new process for preparation of precipitated silica which has a good dispersibility and very satisfactory reinforcing properties. It also relates to new precipitated silicas which are in the form of powder, of substantially spherical beads or of granules, these silicas being characterized by the fact that they have a CTAB specific surface of between 90 and 250 m<2>/g, a BET specific surface of between 90 and 250 m<2>/g, a DOP oil uptake lower than 300 ml/100 g, a zinc content of between 1 and 5 % by weight, and by the fact that the number N of stearic acid molecules consumed per nm<2> of silica surface, when stearic acid is reacted with this silica in xylene for 2 hours at 120 DEG C, is at least 1. The invention also relates to the use of the said silicas as reinforcing fillers for elastomers, especially for improving their rheological properties.
Patent TW-312073-B (TW)
Title: Direct current(DC) frequency modulation structure and method thereof
Inventor: DENG JYH-YEUAN
IPC: H04L27/32
Filed: 1996-09-09
Granted: 1997-08-01
Abstract: A DC frequency modulation circuit comprises of: (1) one high-pass filter, used to filter low frequency part of one audio signal; (2) one first phase lock loop, used to modulate high frequency component of the audio signal; (3) one low-pass filter, used to filter high frequency component of the audio signal; (4) one second phase lock loop, used to synthesize the high frequency modulation signal and the low frequency modulation signal; in which the second phase lock loop consists of: (1) one digital frequency synthesizer, used to modulate low frequency of the audio signal; (2) voltage control oscillator, generating one fixing frequency oscillating signal based on input voltage; (3) roughly modulated signal synthesizer, used to generate carrier signal with larger frequency gap; (4) first mixer, used to receive output of the roughly modulated signal synthesizer and the voltage control oscillator, fetching its differential frequency and outputting one signal; (5) second mixer, used to receive output of the first mixer and the first phase lock loop, fetching its differential frequency and outputting one signal; (6) phase detector, receiving the directly digital frequency synthesizer output signal and the second mixer output signal, fetching its differential frequency and outputting one signal; (7) loop filter, with output DC component of the phase detector as input voltage of the voltage control oscillator; (8) thereby, the voltage control oscillator output may consist of high frequency modulation component and low frequency modulation component of audio signal.
Patent TW-328141-B (TW)
Title: Manufacturing method for semiconductor wafer and IC card and its bearer
Inventor: MIYAMOTO TOSHIO
IPC: H01L21/301
Filed: 1996-11-11
Granted: 1998-03-11
Abstract: A kind of manufacturing method for semiconductor wafer whose features are - the first engineering process: preparing the planklike or filmy bearer which is composed of the substrate and the connection element installed on one surface of the substrate - the second engineering process: let the inner surface without electric circuit element forming face oppositely to said bearer and form the wafer composite by connecting the semiconductor wafer to said bearer. - the third engineering process: let the side of said wafer composite of semiconductor wafer face upward and hold the wafer composite letting the etching liquid be rotately spreading on the inner surface of said wafer composite to apply the thinly processing on it.
Patent TW-401385-B (TW)
Title: Quenching fused materials
Inventor: ASHLEY PETER J
IPC: C09K3/14
Filed: 1996-12-02
Granted: 2000-08-11
Abstract: A process is provided that permits the rapid quenching of molten ceramics by passing a flow of the molten ceramic into a turbulent fluid flow such that the flow is broken up into particles which then solidify as they pass into and through a cyclone and are finally separated from the fluid flow and collected as dry particulate ceramic materials.
Patent TW-334544-B (TW)
Title: Data processor
Inventor: NISHIMOTO JUNICHI
IPC: G06F9/06
Filed: 1997-01-10
Granted: 1998-06-21
Abstract: The microprocessor 100 uses an RISC core 106 for the execution of RISC instructions and a VLIW core 140 for the execution of VLIW instructions. An instruction fetch unit 101 outputs the address of an instruction to be executed to an instruction address bus 105. If a branch instruction (a part of RISC instruction) for the execution of VLIW instructions is generated during the execution of RISC instructions, an RISC decoding unit 114 informs the instruction fetch unit 101 of the branching generation. The VLL instructions are read out of a VLIW table 113. A VLIW decoding unit 115 decodes the instructions to control a VLIW arithmetic unit 120 or integer arithmetic unit 119 and a floating-point unit 118 in parallel. By the way, to reduce the cost and strengthen the security.
Patent TW-340088-B (TW)
Title: Closing unit for presses for the injection of plastic materials
Inventor: OTTOGALLI TARCISIO
IPC: B29C43/34
Filed: 1997-06-30
Granted: 1998-09-11
Abstract: A sort of closing unit for presses for the injection of plastic materials, having: a pair of plates for the housing in between a pair of half molds for formation of a switchable mold, binder between the plates as th counterforce to the force applied onto the half molds, restraint unit for application of said restraint, featuring the restraint unit having at least a tilt face disposed between a pair of plates and the corresponding half molds, having the equipment a first and second wedge element for sliding one against the other while the pressure element moving operationally along the sliding direction in perpendicular to the restraint force, facing the element in the sliding direction, toward the joint surface of the tilt surface of such a grade that the pressure applied by the pressure element on between the joint faces has a major force forming the restraint force.
Patent TW-331654-B (TW)
Title: The method for cleaning polymer produced by SOG
Inventor: LII SHING-LONG
IPC: H01L21/02
Filed: 1997-08-16
Granted: 1998-05-11
Abstract: A method for cleaning polymer produced by SOG, it has already proceeded SOG method of etching back on wafer, and to form plurality polymers. It includes following steps: - Cover an insulating layer on wafer, it also covers those polymers. - Form photoresist layer on insulating layer. -Proceed edge exclusion at peripheral edge of photoresist layer, and toward horizontal direction of wafer to etch the peripheral edge of photoresist, to form a distance between peripheral edge of photoresist layer and wafer boundary, and enable the upper of polymers without covering the photoresist. - Use photoresist as mask to etch insulating layer till exposing the polymers. - Remove polymers.
Patent TW-332317-B (TW)
Title: Erase method on source base/channel of floating gate memory device
Inventor: HER MING-JOU
IPC: H01L21/28
Filed: 1997-08-21
Granted: 1998-05-21
Abstract: An erase method on source base/channel of floating gate memory device includes a) applying the first high voltage to the source and the first low voltage to the base and the control gate b) applying the second high voltage to the base and the second low voltage to the control gate.
Patent TW-346603-B (TW)
Title: Synchronous semiconductor memory device having macro command storage and execution method therefor
Inventor: CHEOL-WOO PARK
IPC: G06F9/30
Filed: 1997-08-23
Granted: 1998-12-01
Abstract: A synchronous semiconductor memory device which, in operation, operates in synchronism to a clock signal producing a series of clock pulses, the device comprising: macro storage means for storing a macro command; means for counting the clock pulses producing an output; means for selecting between a current external instruction and an external instruction of the macro command, the means for selecting producing an internal instruction corresponding to a selected external instruction; means for comparing an interval data value of the selected external instruction with the output of the counting means; and macro control means for controlling the macro storage means to accomplish a store operation in response to a macrostore command, for controlling the selecting means to select and execute the macro command in response to a macro execute command, and for controlling a read-out of the macro command.
Patent TW-351787-B (TW)
Title: Memory subsystem capable of high speed data transfer
Inventor: NAKANO MASAO
IPC: G06F13/42
Filed: 1997-11-13
Granted: 1999-02-01
Abstract: A memory subsystem comprises: a clock source providing a time clock; at least a memory works synchronously with the clock, controller is sued to control the data to be imported to the said memory and its output as well; a data signal circuit used to control the data signal transferred between the controller and the memory; a clock signal circuit, linked in parallel with the data signal circuit and disposed to transfer the clock signal to the memory; and a data selective pulse signal circuit, connected in parallel with the data signal circuit and disposed to transfer a data selective pulse signal to the controller; in which the controller is provided with the clock by the clock source and transfers the read-out data to the memory in response to the transformation edge under the clock; the memory transfer the read-out data to the controller in response to the transformation edge of the data selective pulse signal; the clock signal circuit and the data signal circuit comprise a clock delay circuit with preset delay in the clock; the data selective pulse signal circuit comprises a data selective pulse delay circuit with preset delay magnitude for the data selective pulse signal circuit; the memory includes a data input circuit for receiving the read-out data from the transformation edge converted by the clock; and the controller includes a data input circuit for receiving the read-out data from the transformation edge converted by the clock.
Patent TW-355738-B (TW)
Title: Method for the distance measurement and distance-measuring meter
Inventor: SPINK ROGER
IPC: G01B11/00
Filed: 1997-12-04
Granted: 1999-04-11
Abstract: A method for distance (Z) measurement, under the application of the laser radiation, which at first directed on an objective (18) in a parallel path of radiation and then clustered through the objective (18) in the focus; if the object plane is ot in the focus-point, two luminous points of the laser can be seen on the object plane; if the luminous points of laser are coded in the form of a horizontal or vertical line by means of suitable series lens or templates in front of the objective (18), so the picture of the marks can be obtained; it can also be provided a timely coding, so that for instance a laser blinks at one time and then the other laser blinks after some time; the distance between the both luminous points of the laser is a measure for the distance from the object plane to the main objective (18); this measure depends analytically on the focus distance of the objective (18) and the stereo-basis of both the luminous point sources in front of the objective (18).
Patent TW-350030-B (TW)
Title: Laser Doppler velocity meter based on self-mixing with off-axis
Inventor: TZENG MIN-HUEI
IPC: G01S7/00
Filed: 1997-11-25
Granted: 1999-01-11
Abstract: A sort of laser Doppler velocity meter having a steady-frequency laser beam source (with a consonant chamber), biased beam amplifier and off-axis light testing circuit for generation of light interference differential signal by means of consonant chamber and using the Doppler velocity meter.
Patent TW-406378-B (TW)
Title: The structure of read-only memory (ROM) and its manufacture method
Inventor: JANG GE-YING
IPC: H01L21/8247
Filed: 1998-02-03
Granted: 2000-09-21
Abstract: A kind of structure of read-only memory (ROM) and is manufacture method is disclosed. First, form the tunnel oxide, the first poly-silicon layer, the bottom oxide and the first silicon nitride layer on the semiconductor substrate. Second, define the first poly-silicon layer as the floating gate. Third, form the doping region on the substrate, then use the chemical vapor-phase deposition (CVD) method to form the top oxide and the second silicon nitride layer on the first silicon nitride layer. Forth, etch back the second silicon nitride layer to make the sidewall of the floating gate as the silicon nitride spacer. Then proceed thermal oxidation method to oxidize the doping region to form the etching stop layer, meanwhile, form the silicon nitride on the surface of the spacer and to densify the top oxide to form the second poly-silicon and define the control gate. Finally, proceed the doping of the source/drain region to complete the fabrication of the memory device.
Patent TW-384554-B (TW)
Title: Increased bandwidth patch antenna
Inventor: NGHIEM DAVID
IPC: H01Q5/371
Filed: 1998-06-23
Granted: 2000-03-11
Abstract: An increased bandwidth patch antenna (300) which includes first and second arms (308, 312) spaced by an air gap. The first and second arms (308, 312) are electrically connected by a bridge (324). A ground plane (316), which is approximately parallel to the first and second arms (308, 312), is separated from the first and second arms by a dielectric substrate (320). In one embodiment of the present invention, the first arm (308) is a radiating arm and the second arm (312) is a tuning arm. By varying the length of the tuning arm, the bandwidth of the antenna is increased. The second arm (312), which also acts as a parasitic arm of the first arm (308), increases the gain of the antenna (300). A signal unit (332) is electrically coupled to the bridge (324). The signal unit (332) transmits and/or receives signals having a selected frequency band. The antenna (300) resonates at the selected frequency band.
Patent TW-565532-B (TW)
Title: Specification apparatus for treating waste water
Inventor: SHIOTA YUSUKE
IPC: C02F1/28
Filed: 1998-04-21
Granted: 2003-12-11
Abstract: The present invention relates to an apparatus for treating waste water. Specifically, the present invention relates an apparatus which, when waste water discharged from various industrial plants is treated using a solid catalyst and/or a solid adsorbent (hereinafter, simply referred to as ""a solid catalyst"" in some cases), effectively prevents the movements of the solid catalyst such as traveling and swinging to solve the problems including the abrasion of the solid catalyst due to the movements, the deterioration of performance thereof, and an increase in pressure loss thereof, thereby treating waste water in a stable manner for a long period of time.
Patent TW-384546-B (TW)
Title: Coplanar oscillator circuit structures
Inventor: MOHWINKEL CLIFFORD A
IPC: H03B5/18
Filed: 1998-04-30
Granted: 2000-03-11
Abstract: An oscillator circuit (20) having a flip chip metalization pattern and base substrate metalization pattern is defined such that a common-drain oscillator is configured with the common drain (38) interposed between the source (40) and gate (36) terminals, providing an effective RF common reference with reduced parasitic inductance elements which otherwise degrade oscillator power and phase noise at high frequencies. Multiple sets (50) of such patterns (90, 92, 94) on the substrate (82) and such three-terminal devices (52) on the flip chip (54) are arranged such that conductor patterns on the substrate connecting separately from the gates (98) and the sources (100) of the multiple devices to the common-drain reference (96) are easily configured into separable resonator (102) and feedback (104) circuits.
Patent TW-388204-B (TW)
Title: Super plastic molding method for metal enclosure with anti-EMI properties
Inventor: JUANG DUNG-HAN
IPC: H05K9/00
Filed: 1998-05-20
Granted: 2000-04-21
Abstract: The present invention uses an improved super-plastic molding method for producing a metal enclosure with anti-EMI properties, which comprises providing a super plastic alloy plate the surface of which being covered with a plastic film; heating the super plastic alloy plate covered with a plastic film to the super plastic molding temperature of the super plastic alloy plate; blowing the alloy plate with a gas under a super-plastic condition such that a super-plastic deformation occurs in the super-plastic alloy plate thereby obtaining a metal enclosure with anti-EMI properties which is lined with a plastic film, in which the melting temperature of the selected plastic is lower than the super-plastic molding temperature of the alloy plate, while the thermal degradation temperature of the plastic is higher than the super plastic molding temperature of the alloy plate. In the super plastic blow molding process, the plastic film lined on the surface of the plate protects the alloy plate from oxidation, and provides lubrication and demolding between the workpiece and the mold, as well as improves the formation of porosity during the super plastic molding. The plastic film lined on the surface, depending on the type thereof, can prevent the scratching or corrosion of the workpiece during transport or storage, and be peeled off during the final stage or be kept permanently to increase the corrosion-resistant, insulation and cosmetic functions of the workpiece. The invented product also has the features of high EMI shielding (over 100 dB) as in a conventional sheet metal enclosure and the delicate appearance as in a conventional plastic enclosure.
Patent TW-386909-B (TW)
Title: Applicator
Inventor: BUNYAN GLEN WALTER
IPC: B05C17/005
Filed: 1998-06-18
Granted: 2000-04-11
Abstract: An applicator can be used to convey viscous liquid like butter, yolk jam or mustard. The applicator includes a set of cylinder assembly for receiving a piston. The cylinder assembly separates a pair of partitions. The piston includes a one-way valve, the one-way valve may elastically deviate from the orifice of the piston for allowing the liquid to flow from one partition to another. An inlet is extended to the partition, and a discharge valve is connected to the partition. This arrangement will allow the operator to reduce the force for manipulating the applicator to the minimum when conveying the viscous liquid.