Patent GB-1161874-A (GB)
Title: Improved Magnitude-to-Frequecny Converter.
Inventor: WINN ROGER FREDERICK EDWARD
IPC: H03K7/06
Filed: 1965-09-04
Abstract: 1,161,874. Pulse modulation circuits. ELLIOTT BROS. (LONDON) Ltd. 2 Dec., 1966 [4 Sept., 1965], No. 37905/65. Headings H3P and H4L. In a circuit for producing an output signal having a frequency dependent on the magnitude of an input signal, a capacitive means is charged through an input circuit by said signal, and the voltage across it is compared with a first level of reference signal. When the two voltages equate, a discharge circuit is connected to the capacitive means, and the voltage across the latter is compared with a second and lower level of reference signal. When the two voltages equate, the first level of reference signal is substituted for the second, the discharge circuit is disconnected, and charging of the capacitive means recommences. The circuit includes means to render the polarity of its output signal independent of the polarity of the input signal. As described, input voltage at a terminal VI, Fig. 2, is applied through an integrator 11 comprising a resistor R1 in series with a D.C. operational amplifier 12, having a feed-back capacitor C1, to one input of a comparator 13. The input voltage is also applied to a polaritysensitive device 15 which operates a switch S3 so that a reference voltage of the appropriate polarity is applied through a resistor R2 to the second input of the comparator 13. When a voltage is applied to the terminal VI, the magnitude of the voltage applied by the integrator to the comparator 13 increases in magnitude until it reaches that of the reference voltage. At this point, the output from the comparator changes from a first to a second value, and a corresponding change occurs in output voltage at the terminal V0 which is applied to means which closes two switches S1, S2. The switch S1 discharges the capacitor C1, and the input to the comparator 13 falls. The switch S2 reduces the reference voltage applied to the comparator 13. When the output voltage from the integrator reaches that of the reduced reference voltage, the output of the comparator reverts to its first value, and the corresponding change in the output voltage at the terminal V0 causes the switches S1, S2 to open, when the cycle recommences. Thus, pulses are produced at a rate dependent upon the magnitude of the input voltage at the terminal V1. The comparator 13 may produce positive- or negative-going pulses, according to the polarity of the input, and the arrangement of gates, in which the AND gates 16, 18 open only with two positive inputs, ensures that the pulses reaching the output terminal V0 are positivegoing.  In another embodiment, Fig. 1 (not shown), there is inserted between an input terminal (VI) and an integrator (11) a device (21), Fig. 3 (not shown). This device produces an output which is of the same polarity whatever may be the polarity of the input. As described, it comprises a polarity sensitive arrangement (23) which switches in an inverter (22) if necessary. An output terminal (V0) is connected directly to the output of a comparator (13), and the device 15, the inverters 17, 19 and the gates 16, 18, 20, shown in Fig. 2, are omitted.