Patent GB-829352-A (GB)
Title: Improvements in magnetic grating on core inputs
Inventor: BONN THEODORE HERTZ
IPC: H03K19/16
Filed: 1957-05-01
Abstract: 829,352. Controlled non-linear inductors. SPERRY RAND CORPORATION. May 1, 1957, No. 13928/57. Class 40 (9). In a magnetic gating circuit comprising a core having a plurality of input windings and an output winding, the input signals comprise unidirectional current pulses which reduce the core magnetization when applied coincidently, while further unidirectional pulses applied alternately with the input pulses augment the core magnetization and produce an output pulse whenever a change of core flux results. The gate may alternatively be of the complementary type, in which case output pulses are produced only in the absence of input signals. As shown in Fig. 2, one form of gate comprises a core 20 formed of material having a rectangular hysteresis loop such as Orthonik or Moly-permalloy, which is associated with input windings 21a-21e, a power winding 22, output winding 25 and a bias winding 27. The core is magnetized alternately by power pulses PP1- and input pulses SS-1 to SS-5 and is biased by pulses PP-2 which act at the same time but in the opposite sense to the input pulses. Since the power and bias pulses magnetize the core in opposite senses, it is necessary for two or more input pulses to occur simultaneously for the core flux to be reduced from the saturation level. When the flux is restored to saturation by the next power pulse PP-1, a current pulse is induced in a winding 25 which passes through a rectifier 26 to a load 28. In a modified arrangement, Fig. 3, the bias pulses are replaced by continuous current from a source 38, the bias circuit as before including a rectifier 39 which suppresses induced currents. The magnetic gate may alternatively provide a complementary output, Fig. 4, by applying the power pulses PP directly to the output circuit, in which case current passes to a load 44 only when insufficient input pulses are applied coincidently to modify the core flux. A number of the gates described may be interconnected one arrangement being shown in Fig. 5, which uses three gates 70, 71, 72 of the type shown in Fig. 3. Certain of the input windings of the gates such as 70b, 71b, 72b may be each connected to separate sources of signals, while other windings such as 70a, 71a, 72a may be controlled collectively from a single signal source SS-1, an input winding on each core being connected in series with a pulse source PP-1 and a blocking pulse source BP. The pulses PP-1 alternate with the pulses from a power pulse source PP-2 common to all the gates. The blocking pulses are effective at the same time as PP-2 and by disabling a rectifier 78 suppress spurious voltages induced by the power pulses in the input circuit. A magnetic amplifier 73 responsive to the input signal pulses SS-1 controls the application of pulses PP-1 to the input windings. Each gate requires a plurality of coincident input signals to establish an output in its respective load. As reduction of core flux in each gate is determined by the number of coincident input pulses applied, the cores may subsequently return to saturation at different rates when the next power pulse is applied so that the respective output pulses differ. This disadvantage is overcome by limiting the rate of change of flux in each core to a predetermined value. The limiting arrangement may comprise a winding 80 on each core which is short-circuited over a rectifier 82 having a biasing potential 81, or alternatively the load winding may be associated with a short-circuit path comprising a biased rectifier 87. In a further arrangement a short-circuit path may be provide across and input winding on each core by a biased rectifier 85. These methods of restricting the rate of flux change are also applicable to the other interconnected gate arrangements described. The Fig. 5 embodiment also includes D.C. sources 75a, 77a which function in association with resistors 75c, 77b and rectifiers 75b, 77c to provide a power source for input pulses whenever the pulses PP-1 are effective over the amplifier 73. At all other times they maintain the input lead 76 at earth potential. In a modification, Fig. 7, use is made of the complementary gates shown in Fig. 4. Operation of the arrangement is basically the same as in Fig. 5 except that complementary outputs are provided by windings 90f, 91f, 92f and a direct output is obtained from the circuit comprising winding 97 and load 99. The gates shown in Fig. 4 may also operate in groups comprising gates 100, 101 and gates 106, 107, 108, Fig. 8. A single input signal source SS-1 is provided for one winding 100a, 101a, 106a, 107a, 108a of each gate and the groups are balanced by the provision of a resistor 102 in place of a missing gate. In this arrangement input current pulses are supplied by D.C. sources 103a, 109a in response to a pulse PP-1 and a signal pulse SS-1 applied to a magnetic amplifier 104. A further method of restricting the rate of change of core flux is described, comprising a winding 89 short-circuited by a Thyrite or other non- linear resistor. The complementary gates of Fig. 4 may be connected as shown in Fig. 9, an input winding of each gate 110-113 being concurrently energized by a D.C. source 115 so that normally no output is obtained. Control is effected by positive signals applied to one of terminals A, B, C, D, a signal applied to either of terminals A or B inhibiting the concurrent energization of all the gates while a signal applied to terminals C or D inhibits the energization of gates 110 and 111 only. The gates shown in Figs. 2 or 3 are used in the Fig. 10 embodiment. In this arrangement loads 1, 2 and 3 are each connected in series with one or more output windings 120g-120k, 121g- 121j and 122g-122j on each gate 120-122. Energization of all three inputs such as SS-1, SS-2, SS-3 of a gate is necessary to overcome the bias and provide an output. In operation, load 1 is energized if any gate provides an output, while outputs must be provided by at least two gates for the D.C. bias in series with load 2 to be overcome. The load 3 output circuit comprises two assisting windings on gate 120 which are opposed by windings on gates 121, 122, so that current passes through this load whenever one or two gates are operative, but not when all three gate outputs are simultaneously effective. Two gates 130, 131, Fig. 11, may be connected with their power windings 134, 136 in parallel with a load 138. When both cores are set to negative remanence by coincident input signals SS-1 to SS-4, both power windings present a high impedance and the power pulse PP passes to the load. If either or both cores are not set, the respective load windings provide a short-circuit path for the power pulse and the load is unenergized. In an alternative arrangement, Fig. 12, the load 149 is shunted by two power windings 142, 143 connected in series, in which case current pulses PP always appear in the load except when both cores 140, 141 are set by coincident input signals. Both circuits include a blocking pulse source 132, 148 in the signal paths.