baber/WOPTO huggingface dataset:
Patent TW-492033-B (TW)
Title: Fuse cutout with mechanical assist
Inventor: ROBERTS GERALD B
IPC: H01H31/12
Filed: 2001-04-27
Granted: 2002-06-21
Abstract: A fuse cutout for connection to a power source comprising, a mounting having upper and lower support members extending from opposing ends of the mounting, respectively. A holder member fixedly attached to the lower support of the mounting. A pivot member received in the holder member at a first pivot point, the pivot member being movable between first and second positions. A fuseholder having upper and lower ends, the lower end being pivotally attached to the pivot member at a second pivot point, the fuseholder being movable between closed and open positions corresponding to the first and second positions of the pivot member, respectively. A first biasing member disposed between the pivot member and the lower end of the fuseholder at the second pivot point, biasing the pivot member toward the second position. The pivot member includes a planar cam surface that engages a lower contact of the holder member.
Patent TW-467811-B (TW)
Title: Clamp apparatus
Inventor: TAKAHASHI KAZUYOSHI
IPC: B25B5/08
Filed: 2001-05-11
Granted: 2001-12-11
Abstract: A clamp apparatus comprises a toggle link mechanism (64) which converts rectilinear motion of a rod member (32) into rotary motion, an arm (20) which is rotatable by a predetermined angle in accordance with a driving action of a cylinder section (14), and a lock mechanism (22) which holds an unclamping state of the arm (20) even when transmission of driving force of the cylinder section (14) to the arm (20) is cut off.
Patent TW-512376-B (TW)
Title: Switching device
Inventor: BENS PETRUS WILHELMUS FRANSISC
IPC: H05B41/282
Filed: 2001-05-17
Granted: 2002-12-01
Abstract: A switching arrangement intended to operate a high-pressure discharge lamp at a voltage having successive periods of opposite polarity. The switching arrangement is provided with: input terminals for connecting a power supply source, output terminals for connecting the lamp to be operated, a switch mode power supply and control means for controlling the switch mode power supply, and means for forming a lamp signal corresponding to the voltage across the lamp. According to the invention, the switching arrangement is provided with means for detecting Direct current through and/or DC voltage across the high-pressure discharge lamp.
Patent TW-494207-B (TW)
Title: Evacuated panel for thermal insulation of cylindrical bodies
Inventor: DI GREGORIO PIERATTILIO
IPC: F16L59/14
Filed: 2001-06-22
Granted: 2002-07-11
Abstract: An evacuated panel (2) is described, which enables the thermal insulation of a cylindrical body (1), provided with two substantially rectangular main faces and formed of a flexible envelope (4) made of one or more barrier sheets, containing a discontinuous or porous, inorganic or polymeric filling material (3). The panel has a thickness such that the ratio between this thickness and the minimum bending radius of the lateral wall of said cylindrical body is small enough so as to enable the rolling of the panel without compromising the integrity thereof, and length such that it allows at least two rollings around the body (1).
Patent TW-I290946-B (TW)
Title: Cyan dye mixture, aqueous cyanic ink composition and ink-jet printing method
Inventor: KITAYAMA HIROKAZU
IPC: C09D11/00
Filed: 2001-07-24
Granted: 2007-12-11
Abstract: The present invention provides a cyan dye mixture, an ink composition comprising said cyan dye mixture, and a method for ink-jet printing. The printed matter obtained by this invention is characterized by slight discoloration/fading even when left to stand in the well-ventilated shade or in an ozone gas. The cyan dye mixture comprises a compound obtained by chlorosulfonating the copper phthalocyanine, then amidation by using an aminating agent in a molar ratio of the agent to the copper phthalocyanine of >= 2.5; wherein the compound is represented by formula (1), (M is proton, an alkali metal ion, alkaline earth metal ion, organic amine onium ion or ammonium ion; m is an integer of 1-4; n is an integer of 0-3; and (m+n) is an integer of 1-4, but m+n=3 is excluded).
Patent TW-500921-B (TW)
Title: Measurement of critical dimensions using X-rays
Inventor: MAZOR ISAAC
IPC: G01N23/201
Filed: 2001-08-28
Granted: 2002-09-01
Abstract: A method for measurement of critical dimensions includes irradiating a surface of a substrate (20) with a beam (36) of X-rays. A pattern of the X-rays scattered from the surface due to features formed on the surface is detected and analyzed to measure a dimension of the natures in a direction parallel to the surface.
Patent TW-512230-B (TW)
Title: Speedometer mounting structure in motorcycle
Inventor: HIDEO OGURA
IPC: B62J11/00
Filed: 2001-08-28
Granted: 2002-12-01
Abstract: The subject of the present invention is to provide a speedometer mounting structure in a motorcycle, which is capable of mounting the speedometer without deteriorating the design of the motorcycle. The solution of the present invention has the characteristic that, in order to secure a steering direction, a handlebar holder is installed on a fork support member 21 for supporting a front fork 12 of a motorcycle 10. The speedometer 29 is mounted on the handlebar holder.
Patent TW-571145-B (TW)
Title: Liquid crystal display device
Inventor: SHIN JE-HUNG
IPC: G02F1/13
Filed: 2001-09-11
Granted: 2004-01-11
Abstract: There is provided a liquid crystal display device, which includes a first array substrate, a second array substrate, a frame adhesive, and a liquid crystal layer. The frame adhesive is arranged between the first array substrate and the second array substrate to form a space. The liquid crystal layer is arranged in the space to form a display cell, wherein the display cell has a display area and a non-display area surrounding on the circumference of the display area. In addition, a diffusion layer is arranged on the second array substrate to increase the brightness of the liquid crystal display, wherein the distribution of the diffusion layer is larger than that of the display area.
Patent TW-523895-B (TW)
Title: Polymer stud grid array and a process to manufacture this kind of polymer stud grid array
Inventor: PUYMBROECK JOZEF VAN
IPC: H01L21/48
Filed: 2001-09-12
Granted: 2003-03-11
Abstract: A first wiring layer (V1) and metallized through holes (D) are formed on a substrate (S). Then a substrate layer is provided on the upper side (01) of the substrate (S) by means of inject casting, whereby the material runs throughout the metallized through holes (D) and polymer protuberances (PS) appear on the beneath side (U) of the substrate (S). A second wiring layer (V2) formed on the substrate layer (SL) is electrically connected with the first wiring layer (V1) via the sack metallized through holes (SD) and thereby electrically connected with out connections (AA) on the polymer protuberances (PS).
Patent TW-529249-B (TW)
Title: Method and apparatus for decreasing integrated circuit clock skew
Inventor: CHEN CHIEN-MING
IPC: H03K5/01
Filed: 2001-09-27
Granted: 2003-04-21
Abstract: A kind of method for decreasing integrated circuit clock skew is disclosed in the invention. The integrated circuit is provided with plural circuit blocks; and the method for decreasing clock skew between different circuit blocks includes the following steps: providing the first clock signal source for connecting to the clock signal input terminal of the first circuit block in these circuit blocks; providing the second clock signal source for connecting to the clock signal input terminal of the second circuit block in these circuit blocks; When it is necessary for the second circuit block to conduct a synchronous operation with the first circuit block based on the clock frequency of the first clock signal source, the clock signal input terminal of the second circuit block is switched and coupled to the first clock signal source so as to make the first circuit block and the second circuit block operate under the same first clock signal source.
Patent TW-531791-B (TW)
Title: Formation method of metal-insulator-metal semiconductor structure
Inventor: LIU CHUNG-SHI
IPC: H01L21/28
Filed: 2001-10-02
Granted: 2003-05-11
Abstract: A formation method of metal-insulator-metal semiconductor structure suitable for damascene process comprises the following steps: (1) form a first metal layer on the trench bottom, sidewalls and substrate; (2) form a bottom metal layer covering the first metal layer; (3) form a second layer covering the bottom metal layer; (4) execute a first CMP process to remove the second metal layer, bottom metal layer and first metal layer on the substrate surface and expose a part of the second metal layer; (5) form an insulated layer on the bottom metal layer, substrate and exposed second metal layer conformally, (6) form a top metal layer covering the insulated layer; (7) form a third metal layer on the top metal layer and fill in the trenches; (8) finally, execute a second CMP process to remove the third metal layer, top metal layer and insulated layer on the substrate surface.
Patent TW-529316-B (TW)
Title: Method for making composite plate
Inventor: KURIYAMA KAZUYA
IPC: H01L21/027
Filed: 2001-10-04
Granted: 2003-04-21
Abstract: Object of the present invention is to provide a manufacturing method of a composite plate that can surely bond a bonding sheet body, where a metal protrusion section is attached to the surface of a metal substrate. In this method, the composite plate is manufactured, where the composite plate has a bonding sheet body 1, a metal protrusion section 2 attached onto the surface of the bonding sheet body 1, and a metal pedestal 4 having a hollow section 3 inside. While the metal protrusion section 2 is being laminated onto the surface of the bonding sheet body 1, the bonding sheet body 1 is laminated onto the surface of the metal pedestal 4 via a bonding material S. They are surrounded by a packing bag 13, having a heat resistance and breathing resistance. The inside of the packing bag 13 is set to a reduced pressure state. In the reduced pressure state, the hollow section 3 of the metal pedestal 4 communicates with the outside of the packing bag 13 in the chamber, and at the same time, the packing bag 13 is heated and pressurized.
Patent TW-550847-B (TW)
Title: High performance lithium or lithium ion cell
Inventor: DAI DONGLI
IPC: H01M10/04
Filed: 2001-10-05
Granted: 2003-09-01
Abstract: Graphite sheeting having a thickness of less than 250 micrometers and in-plane conductivity of at least 100 S/cm when employed as a cathode current collector in a lithium or lithium ion cell containing a fluorinated lithium imide or methide electrolyte salt imparts high thermal resistance, excellent electrochemical stability, and surprisingly high capacity retention at high rates of discharge.
Patent TW-I244181-B (TW)
Title: Semiconductor chip packaging structure and manufacturing method of the same
Inventor: WANG HSUEH-TE
IPC: H01L23/373
Filed: 2001-10-17
Granted: 2005-11-21
Abstract: A semiconductor chip packaging structure is disclosed, which mainly comprises one substrate, one semiconductor chip, and one heat spreader. The semiconductor chip is electrically connected onto the substrate by the flip-chip mode, while the heat spreader is installed onto the semiconductor chip; onto one surface of the heat spreader is electroplated one metal layer which is bonded to the semiconductor chip when the temperature is raised a certain high level to make the heat spreader and the semiconductor chip be closely bonded together, so as to enhance the heat spreading efficacy of the semiconductor chip packaging structure.
Patent TW-555790-B (TW)
Title: Conductive organic thin film, process for producing the same, and organic photoelectronic device, electric wire, and electrode aech employing the same
Inventor: OGAWA KAZUFUMI
IPC: G09F9/30
Filed: 2001-12-24
Granted: 2003-10-01
Abstract: A conductive organic thin film which is made up of organic molecules each having at one end a terminal bonding group bonded to a substrate surface by covalent bonding and having a conjugated bondgroup which is present anywhere in the organic molecule and has been polymerized with other molecules and a photoresponsive functional group which contains no active hydrogen atom and is present anywhere between the terminal bonding group and the conjugated bond group, the organic molecules being oriented and the conjugated bond groups having been polymerized to form a conductive network. The conductive organic thin film has such a light switch function that the conductivity changes upon irradiation.
Patent TW-531426-B (TW)
Title: Method for producing jigsaw puzzle with stereoscopic emboss
Inventor: LIOU WEN-SHIUNG
IPC: A63F9/12
Filed: 2001-12-27
Granted: 2003-05-11
Abstract: A method for producing a jigsaw puzzle with stereoscopic emboss comprises using an overall contour of a theme pattern to design a planar 2D program; dividing each block into a planar unit program in which a shrinkage dimension of a plastic material is reserved between two block units (no need for paper board or wood board); designing the planar 2D program into a 3D emboss program; obtaining the divided 2D planar program to divide the whole 3D emboss program into emboss blocks; completing the arrangement of each mold according to the category of each emboss block; converting the 3D program of each mold into a numerical control program; using a CNC numerical processing machine to process each mold to complete accurate male/female molds; on a production machine, producing each emboss block together with a substrate having an indent of the molded theme pattern to be assembled into each unit block so that two unit blocks have adjacent curvatures thereon and the edge lines of the 3-D embosses are mutually connected together smoothly to form a jigsaw puzzle with a 3D emboss.
Patent TW-556329-B (TW)
Title: Wiring board, its production method, semiconductor device and its production method
Inventor: NARIZUKA YASUNORI
IPC: H05K3/34
Filed: 2000-01-18
Granted: 2003-10-01
Abstract: The invented semiconductor device comprises: a semiconductor element, an electrode formed on the semiconductor element, a wiring connecting with the electrode, an insulation film formed on the semiconductor element, and an external connection terminal electrically connecting with the wiring, etc., which is characterized that the insulation film is used to relax the stress generated between the semiconductor element and the object with the semiconductor element installed on it.
Patent TW-569629-B (TW)
Title: Motion detection method with user-adjustable parameters for better detection accuracy
Inventor: CHEN HSIAO-PING
IPC: H04N5/76
Filed: 2002-03-01
Granted: 2004-01-01
Abstract: A motion detection method with user-adjustable parameters for better detection accuracy is based on a detection system for detecting a moving object and triggering a corresponding event through a set of consecutive frames. The motion detection method comprises comparing duration of the event with a first threshold for determining whether the event is valid, comparing an interval between two successive events for determining whether the later of the successive events is annexed to the first of the events, and comparing size of the moving object with a predetermined rectangle for determining whether the moving object meets a limitation of the predetermined rectangle.
Patent TW-I235868-B (TW)
Title: Electrode substrate for liquid crystal display panel, method of fabricating the electrode substrate, and liquid crystal display panel
Inventor: TANAKA FUKUO
IPC: G02F1/1345
Filed: 2002-03-14
Granted: 2005-07-11
Abstract: A pixel electrode substrate includes a glass substrate, parallel signal lines formed on the glass substrate, parallel gate lines formed perpendicularly to the signal lines on the glass substrate, and a plurality of TFTs disposed near the intersections of the signal lines and gate lines. A color filter layer and pixel electrodes are formed in that order over pixel regions defined by the signal lines and the gate lines on the glass substrate. The pixel electrodes and the color filter layer form color stripes. Each of the signal lines has offset sections formed near the intersections of the signal line and the gate lines with their center axes dislocated laterally from a center axis of the signal line such that the switching devices are disposed in dark regions outside color regions corresponding to the color layer. The pixel electrodes have projections projecting from the color regions into the dark regions, respectively, and the projections are connected to the switching devices in the dark regions.
Patent TW-541691-B (TW)
Title: Capacitor and method of manufacturing the same
Inventor: WANG WENSHENG
IPC: H01L27/105
Filed: 2002-04-01
Granted: 2003-07-11
Abstract: There is provided the capacitor which has the lower electrode having a structure in which the first conductive layer containing a first metal, the second conductive layer that is formed on the first conductive layer and made of the metal oxide of the second metal different from the first metal, and the third conductive layer that is formed on the second conductive layer and made of the third metal different from the first metal are formed sequentially; the dielectric layer formed on the lower electrode; and the upper electrode formed on the capacitor dielectric layer.
Patent TW-550856-B (TW)
Title: Dual damascene horn antenna
Inventor: BALLANTINE ARNE WATSON
IPC: H01Q21/28
Filed: 2002-04-09
Granted: 2003-09-01
Abstract: An integrated horn antenna device with an integrated circuit (IC) chip including a metallic horn structure having a wide aperture, a horizontal waveguide with a tapered via that electromagnetically communicates with a vertical waveguide structure to transmit energy to and from an electronic sub-component transceiver device forming part of the IC chip. Another embodiment of the invention comprises a plurality of multiple discrete IC chips having the integrated horn antenna devices incorporated therewith forming a module for data transmissions between these IC chips. Another embodiment of the invention includes additional external waveguide structures such as optical fibers external to the chips, where radiation is aligned between the horn structures and these waveguides. Dual damascene processing is used to fabricate the horn antenna device within the IC chip.
Patent TW-539796-B (TW)
Title: A joining structure of a roof truss using thin gauge shaped steel
Inventor: KAWAI YOSHIMICHI
IPC: E04D3/40
Filed: 2002-05-20
Granted: 2003-07-01
Abstract: The present invention provides a joining structure of a roof truss using thin gauge shaped steel. In a joining structure of a sub-roof and a main-roof, a metal valley fixer formed by folding a thin gauge steel sheet is inserted and disposed in a longitudinal direction of the valley line formed at the joining position of the rafter composing the sub-roof and the upper chord member or the rafter composing the main-roof. In a joining structure in which an upper chord member or a rafter of a roof truss and a wall cross on the upper surface of the wall, a metal fixer formed by folding a thin gauge steel sheet is disposed at the joining position thereof, and the wall and the upper chord member or the rafter of the roof truss are fixed to each other. In a joining structure for connecting the top of an upper chord member or a rafter of the roof truss, a thin gauge steel sheet is disposed at the connecting top thereof, and an end of the upper chord member or the rafter of the roof truss and a post are fixed to the thin gauge steel sheet, and a box shaped metal hanger, which is formed by folding a thin gauge steel sheet and has a box shaped receiving portion, is disposed on the top of the thin gauge steel sheet and a bridge is fixed to the metal hanger.
Patent TW-538499-B (TW)
Title: Boat with constant backside emissivity to wafers
Inventor: YOU WEI-MING
IPC: H01L21/76
Filed: 2002-06-10
Granted: 2003-06-21
Abstract: A boat with constant backside emissivity to wafers is described. The boat is characterized by a plurality of partitions to separate each wafer and each control wafer. The partitions provide constant backside emissivity to underlying wafers, and achieve uniform thickness of all wafers by eliminating the effect that the backside materials of wafers or control wafers influence the thickness of the oxide layer formed on the underlying wafer. The present invention improves that different emissivities of various backside films of the wafers in the prior boat cause the different thicknesses of the oxide layers grown on the underlying wafers, and gate oxide layer from being controlled difficultly.
Patent TW-I228160-B (TW)
Title: Warp knitted fabric
Inventor: MIYAKE YASUSHI
IPC: D04B21/00
Filed: 2002-07-03
Granted: 2005-02-21
Abstract: This invention provides a warp knitted fabric characterized in that the fabric contains a latent crimp fiber, but does not contain an elastic fiber, and the fabric has 60% or more of stretchability in both warp direction and weft direction, and 15% or less of residual distortion at 60% stretch recovery in both warp direction and weft direction. The warp knitted fabric according to the present invention has little deterioration in stretchability in case of dyeing at high temperature, washing repeatedly and stretching and shrinking repeatedly, and has excellent properties in stretchability, stretch recovery, surface smoothness and shape retaining.
Patent TW-I222051-B (TW)
Title: A plasma display panel and a driving method thereof
Inventor: NISHIMURA MASAKI
IPC: G09G3/20
Filed: 2002-07-23
Granted: 2004-10-11
Abstract: This invention relates to a method of driving a PDP (plasma display panel) that includes a PDP unit and a PDP driving unit. The PDP unit has a plurality of pairs of display electrodes therein, each pair being made up of a scanning electrode and a sustaining electrode, and the scanning or the sustaining electrode from one pair being disposed parallel to another scanning or sustaining electrode from another pair respectively. The PDP driving unit drives the PDP unit by what is called in-field time-division grayscale method. In this driving method of the present invention, the plurality of pairs of display electrodes are divided into a first group and a second group, the first group being made up of pairs of display electrodes in which the scanning electrodes and the sustaining electrodes are disposed in a first line-up order, whereas the second group being made up of pairs of display electrodes in which the scanning electrodes and the sustaining electrodes are disposed in a second line-up order which is the opposite order of the first line-up order. The method comprises a first step of, during each of write periods, impressing scanning pulses on each of two or more selected scanning electrodes among the first group, one at a time in the order of the first line-up order, and a second step of, during each of write periods, impressing scanning pulses on each of two or more selected scanning electrodes among the second group, one at a time in the order of the second line-up order.
Patent TW-557549-B (TW)
Title: Method for fabricating a semiconductor product with a memory region and a logic region
Inventor: GRAF WERNER
IPC: H01L21/8239
Filed: 2002-08-01
Granted: 2003-10-11
Abstract: A method for the integration of field-effect transistors for memory and logic applications in a semiconductor substrate 22 is proposed, in which firstly the gate dielectric 2 and a semiconductor layer 4 are deposited over the whole area both in the logic region and in the memory region 6 and 8. From these layers, firstly the gate electrodes 12 in the memory region 8 are formed, the source and drain regions 56 are implanted and the memory region 8 is covered in a planarizing manner with an insulation material 20. Only afterward are the gate electrodes 21 formed from the semiconductor layer 4 and the gate dielectric 2 in the logic region.