baber/WOPTO huggingface dataset:
Patent JP-S6316737-A (JP)
Title: Time division device for packet signal
Inventor: OSAWA TOMOYOSHI
IPC: H04J3/00
Filed: 1986-07-09
Abstract: PURPOSE:To reduce a required transmission capacity, and to use a surplus transmission capacity for another use, by providing a packet dividing and integrating unit, an additional information signal generator, and a synthesizer, and outputting the output of the synthesizer to a time divisional multiplexing device. CONSTITUTION:The packet signal dividing and integrating unit 7 consists of a packet signal detector 1 which detects the presence/absence of a packet signal, a packet signal length detector 2 which measures the signal length of the packet signal, a storage circuit 4, and a read signal generator 3. The packet signal dividing and integrating unit 7 divides or integrates the packet signal in a constant length less than a time slot, and generates a partial packet. The additional information signal generator 5 outputs a bit of additional information which represents relation in the division or the integration of the partial packets, for example, the bit of additional information such as a bit of data completion information which connects the packet to a preceding packet, or a bit of data length information. The synthesizer 6 synthesizes the partial packet outputted from the storage circuit 4, with an additional information signal outputted from the additional information signal generator 5, and outputs it to a time divisional multiplexing device.
Patent JP-S6220041-A (JP)
Title: Asynchronous data transfer circuit for data processor
Inventor: KIKUKAWA SHOICHI
IPC: G06F12/02
Filed: 1985-07-19
Abstract: PURPOSE:To minimize a required time in a memory circuit related to transfer operation and a data processing circuit by transferring data between the memory circuit and the data processing circuit through a buffer memory. CONSTITUTION:Data existing before processing stored in a memory circuit 2 is transferred first to a buffer memory 5 by the control of a DMA control circuit 3. The write address is given by the counter value of a write address counter 6. A signal WACLK is given to the write address counter 6 for every write operation, and the number of these signals is counted. The value of the write address counter 6 is inputted to an address coincidence detecting circuit 9 and is compared with the valve of a read address counter 7. If this comparison becomes dissident reception of transfer data is requested to a processing circuit 4 through a transfer end decision circuit 10. The processing circuit 4 starts the transfer operation for reception. The read address counter 7 receives a signal RACLK for every read operation from the buffer memory 5 and counts this signal.
Patent JP-S6220052-A (JP)
Title: Stand-by switching control system
Inventor: OGASAWARA SHIGERU
IPC: H04L69/40
Filed: 1985-07-19
Abstract: PURPOSE:To prevent a parity error from being detected in spite of a fact that no fault exists, in a switching period, by constituting the titled system so that a parity check of a data bus is not executed in the switching period, in case of stand-by switching between a CCU and an LUT. CONSTITUTION:When a data transfer is being executed between one CCU and one LUT, if a fault is generated in the CCU, a system monitor device detects it and instructs a switching to the LUT. When the LUT receives the switching instruction, a timer 1 is started, and simultaneously, a switching advance notice signal is sent to the CCU. When reaching the time which has been set to the timer 1, switching destination information which has been set to a register 3 is set to a register 4, and simultaneously, a timer 2 is started. In this way, by information which has been set to the register 4, switching of an interface is executed. When reaching the time which has been set to the timer 2, a switching completing signal is sent out to a CCU of a switching destination, and from this time point, the CCU of the switching destination executes a parity check.
Patent JP-S54116138-A (JP)
Title: Drive system for self shift type gas discharge panel
Inventor: ISHIZAKI HIROSHI
IPC: H04N5/66
Filed: 1977-12-28
Abstract: PURPOSE: To increase or decrese the number of characters written in the character display line, by providing the circit means setting the space between characters desired in advance, in the self shift type gas discharge panel.  
     CONSTITUTION: For example, when the space between characters is taken 3-dot, with the strobe signal STB 0 for instruction to write in the character information, the selection switch 73c of the space set circuit unit for characters 70 is closed. Thus, the 8th bit output CA 8 is sequentially counted for the 8-bit counter 12, the output is counted eight times with the counter 71, and the output of the gate 75 is made to 1. During this time, the write-in shift depending on the character information is made. The output of the gate 75 and -Q output of FF77 cause the character write-in waiting instruction signal MR, reset FF 31, and make the panel PDP in fixed state, until the next signal STB is fed. When the next signal STB is again 0, the same operation is repeated and the space of 3-dot desired can be set. Thus, the number of characters of display line can be decreased or increased. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-S6051796-A (JP)
Inventor: ISHIMATSU TETSUO
IPC: C11D1/38
Filed: 1983-08-31
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6215232-A (JP)
Inventor: DEIITOMARU NISEN
IPC: C08L23/12
Filed: 1986-07-09
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0289-A (JP)
Title: Liquid-crystal display device
Inventor: YAMAZAKI KATSUNORI
IPC: G09G3/36
Filed: 1988-06-28
Abstract: PURPOSE:To reduce the unevenness of display remarkably by varying at least the wave form of either a scanning voltage or a signal voltage in accordance with the pattern of a graphic or a character to be displayed by a display device. CONSTITUTION:When a scanning electrode is selected, a data signal 103 is fetched by a correcting circuit 104 and the number of lighted dots Mon on a scanning electrode selected next is counted. Next, a difference from the number of lighted dots Non on the scanning electrode currently selected, that is, a numeric value '1', is computed. When selection moves, the code and the absolute value of that result are outputted as a code signal 108 and an intensity signal 109 respectively. At the same time, the Mon is fetched and stored as the number of lighted dots Non on a scanning electrode currently selected. Then, necessary correction is performed on the voltage of a Y power supply 106 by a power supply circuit 105 in accordance with the code 108 and the intensity signal 109. As a result, the unevenness of display caused by scan missing every another line on a liquid-crystal panel can be prevented.
Patent JP-S6220526-A (JP)
Title: Mercapto group-terminated polymer
Inventor: INOUE YOSHIO
IPC: C08G63/00
Filed: 1985-07-19
Abstract: PURPOSE:To provide the titled novel polymer useful for rubbery sealing materials, ultraviolet-curing type adhesives, coating materials, etc., constituted by specific structure having mercapto groups at its both ends. CONSTITUTION:A reaction is carried out at 50-250 deg.C in a solvent such as toluene, between, e.g., a polyester polyol of formula I and mercaptoalkanic acid such as mercaptoacetic acid so as to be 0.8-1.2 in the stoichiometrically molar ratio of the OH/COOH to obtain the objective polymer of formula II (R<1> is 1-6C divalent hydrocarbon, R<2> is 1-12C divalent hydrocarbon or <=4C divalent organic group containing thioether bond; m and n are each 3-200; lis 0-20).
Patent JP-H0210173-A (JP)
Title: T-branch unit for gas insulation switch
Inventor: SEMA NOBUYUKI
IPC: G01R31/16
Filed: 1988-06-28
Abstract: PURPOSE:To simplify the testing device and to improve the workability by forming as one body a T-branch plug-in bushing and a protective resistor. CONSTITUTION:A T-branch plug-in bushing 20 is constituted of a mold part 21 consisting of a mold forming body, a connection conductor 22 buried in the vertical direction in its center and connected electrically to an internal circuit of a gas insulation switch, a T-branch metallic fixture 23 provided on the upper end of this connection conductor 22 and connected electrically to a charging device for charging a test voltage, and a corona shield 24 provided on the lower end. Also, to the lower end of this T-branch plug-in bushing 20, a resistor 30 which is inserted between the connection conductor 22 and the internal circuit of the gas insulation switch is connected and fixed. In such a way, in a breakdown strength test of the gas insulation switch, a T-branch unit for the gas insulation switch which can simplify the testing device and its installation work is obtained.
Patent JP-S5862348-A (JP)
Title: Exhaust-gas returning device in internal-combustion engine
Inventor: NOYORI TAKAHIRO
IPC: F02M25/07
Filed: 1981-10-09
Abstract: PURPOSE:To reduce the exhaust amount of NOx effectively by operating a main EGR valve only in the area of high load by means of an engine revolution sensor and a vacuum switch for performing exhaust gas returning EGR. CONSTITUTION:A negative pressure in the downstream side of a throttle valve 8 is introduced into a main EGR valve 20, while that in the upper stream side of the throttle valve 8 is introduced into a sub EGR valve 22. The sub EGR valve 22 is operated in the whole area of medium and high load, as using the negative pressure in the downstream side of the throttle valve for a signal negative pressure. The transition to the area of high load is detected by a vacuum switch 60 and a revolution sensor 62. In this area of high load, a main EGR valve 20 is opened for maintaining the cost of fuel and the capacity of operation effectively as reducing the exhaust amount of NOx.
Patent JP-S6052998-A (JP)
Title: Memory cell
Inventor: NANBU HIROAKI
IPC: H01L27/10
Filed: 1983-09-02
Abstract: PURPOSE:To reduce a decrease of a memory cell voltage margin in case an address is switched, and in case an alpha ray is made incident, by inserting a capacity between cross connecting transistors of an FF type memory cell. CONSTITUTION:A capacity CMC is inserted and connected between the collectors or the bases of cross connecting transistors Q1, Q2 of an FF type memory cell, and operated so that a voltage margin of the memory cell, being a potential difference between the bases of the transistors Q1, Q2 is kept constant. Accodingly, it is reduced that the voltage margin decreases transiently when an address is switched, and when an alpha ray is made incident, and information of the memory cell is held stably.
Patent JP-H06195864-A (JP)
Title: Magnetic recording and reproducing device
Inventor: TOMINAGA KENJI
IPC: G11B20/02
Filed: 1991-07-01
Abstract: PURPOSE:To output continuously reproduced audio signals without having a strange sound or a break even in the case of occurring time base fluctuation in a recording system or a reproducing system by time-sequentially switching FM signals and reference clocks and recording them on a magnetic recording medium. CONSTITUTION:Audio signals inputted to an audio input terminal 9 are inputted to and A/D converter 11 through an audio signal amplifier 10 and a mode changeover switch (MS) 4b. Then reference clocks generated by a reference clock 14 are supplied to a time-axis compressor 15, frequency-divided, passed through the MS 4c and stored in a RAM 12. Then, time base compressed signals are read from the RAM 12, passed through the MS 4e and FM-modulated by an FM-modulator 17. The FM-modulated time base compressed audio signals and reference clocks from the circuit 14 are switched by a switch 30, passed through the MS 4f and deep-recorded by rotary audio heads AR and AL of a rotary drum 7. On the other hand, video signals are surface-recorded by video heads VR and VL. Therefore, a reproducing is provided without a strange sound and a break.
Patent JP-H085544-A (JP)
Title: Evaluating method for scale peelability
Inventor: FURUKAWA SHIGEO
IPC: G01N5/00
Filed: 1994-06-21
Abstract: PURPOSE:To provide a method for highly accurately and efficiently evaluating scale peelability even as-for a steel product with a small amount of scales generated. CONSTITUTION:Load is applied by a tension tester 4 to a test piece 1 with both ends taped 3 to provide a material to be evaluated until a predetermined strain is obtained, scales which have peeled off and dropped from the test piece 1 until the predetermined strain is reached are attracted by a magnet 6, a weight of the attracted scales is weighed to evaluate scale peelability of the steel product based on the weighed value. Thus even with the steel product having a very small amount of generated scales, the peeled scales themselves are measured, thereby allowing highly accurate evaluation of peelability by using a highly accurate weighing device.
Patent JP-H0451141-A (JP)
Title: High-sensitivity silver halide photographic sensitive material
Inventor: OTANI HIROSHI
IPC: G03C1/015
Filed: 1990-06-19
Abstract: PURPOSE:To obtain a high sensitivity and low fogging while maintaining the advantages of a crystal nucleus system by providing at least one layer of emulsion layers contg. a specific silver halide emulsion. CONSTITUTION:At least one layer of the emulsion layers contg. the silver halide emulsion preped. by allow the fine particles of the silver iodide in which the silver halide particles contained therein are mixed within the particles and/or between the particles and the crystal phase is gamma-AgI to exist before the end of the supply of the elements forming the silver halide in the formation of the mixed crystals are provided. The constitution in which the concn. of guest AgX is distributed as the perfect solid soln. phase or partially uniformly or with a discontinuous concn. gradient over the entire area in the particles within the silver halide (AgX) particles or the constitution in which the guest AgX is dispersed as the solid soln. or non-solid soln. with the discontinous concn. gradient is lump shape, grain shape and dispersively and further the system in which the AgX particles of the different compsns. coexist between the particles are included in the mixed crystals. The advantages of the crystal nucleus growth system using the fine particles of the silver iodide as well as the high sensitivity and the low fogging are obtd. in this way.
Patent JP-H0448919-A (JP)
Title: Pipe mixer
Inventor: KOYAMA TOICHIRO
IPC: B01F5/00
Filed: 1990-06-19
Abstract: PURPOSE:To sufficiently make air bubbles fine at the time of use for mixing air and a liquid by making the twist direction of the stirring blade at the downstream end of a tubular body reverse to that of the stirring blade on the upstream side thereof. CONSTITUTION:An air and liquid mixed stream receives rotatory power by a stirring blade 2 and a revolving stream is generated. At this time, the separation and gathering of the liquid are carried out at the parts of notches 3 to form a turblent flow state and air and the liquid are sufficiently stirred and mixed. Since a large number of small holes 4 are formed to the stirring blade 2, air bubbles are finely divided when passed through the small holes 4 to become fine bubbles. The mixed stream passes through a boundary part 7 and subsequently becomes a stream revolved in the direction reverse to the direction set heretofore in a region 9 twisted in a reverse direction. By this method, the mixed stream is made more turblent and air bubbles are discharged from a tubular body 1 in a still more finely divided state.
Patent JP-2000348391-A (JP)
Title: Device and system for inspecting deformation of optical dick
Inventor: TAKAMOTO MASAHIKO
IPC: G01N21/88
Filed: 1999-06-08
Abstract: PROBLEM TO BE SOLVED: To provide the device for inspecting the deformation of an optical disk by which the deformation of an optical disk substrate can automatically be inspected. SOLUTION: This device is provided with a two-dimensional CCD camera 12 to fetch the chart image reflected by the optical disk substrate, a picture processing part 11 for deciding the normal/defective condition of the optical disk substrate based on a video signal subjected to photoelectric conversion, and a main processor 10 for transmitting the signal corresponding to the result of the decision.
Patent JP-S6221701-A (JP)
Title: Method for continuous production of ultrafine metal oxide powder and apparatus therefor
Inventor: UCHIDA KIYOHIKO
IPC: C01F7/58
Filed: 1985-07-23
Abstract: PURPOSE:To obtain the titled ultrafine powder having uniform and stable quality, by forming a raw material containing finely pulverized metallic element in the form of briquette, reacting with chlorine gas and then subjecting to vapor-phase oxidation reaction. CONSTITUTION:Dried (101) and finely pulverized (102) raw material 1 containing metallic element is added with a reducing agent 2, pulverized and mixed (103), added with a granulation assistant 3 and formed in the form of briquette 10. The briquette 10 is calcined (105) in an inert atmosphere and subjected to chlorination reaction (106) by the following process. The briquette is supplied through the feeding tube 9 on a perforated rotary disk 12 in a vertical reaction tube 8, heated with the electrical furnace 16 surrounding the reaction tube 8, and rotated around its own axis by rotating the disk 12 and stopping the motion of the briquette 10 with the stopper 14. At the same time, chlorine gas 4 is supplied from under the disk 12 to and contacted with the briquette to produce a reaction product gas containing a metal chloride 5 and the gas is subjected to the fractional sublimation or distillation (107) to form a metal chloride 5, which is evaporated (108) again by heating and oxidized (109) in vapor phase to obtain ultrafine powder 7 of a metal oxide having a particle diameter of 0.01-0.1mum.
Patent JP-S6315973-A (JP)
Inventor: HENMI YOSHIAKI
IPC: A63D5/04
Filed: 1986-07-09
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H11330769-A (JP)
Title: Ic noise filter ferrite, ic provided therewith, and ic socket
Inventor: YUYAMA MASAKADO
IPC: H05K9/00
Filed: 1998-05-07
Abstract: PROBLEM TO BE SOLVED: To remote electromagnetic noises that come in or go out through an IC through a space-saving manner by a method wherein two or more holes are bored in a burned ferrite flat plate at the same interval with the legs of the IC, and the legs of the IC are inserted into the holes. SOLUTION: When a ferrite flat plate is molded through a wet method, the ferrite flat plate which is of fine grains, high in density, and enhanced in boring accuracy and characteristics can be obtained. Before holes are bored in the ferrite flat plate, the surface of the ferrite flat plate is polished so as to be enhanced in boring accuracy and in adhesion to an IC. As mentioned above, when small holes are accurately bored in the ferrite flat plate, the legs of an IC can be easily inserted into the holes, so that noises flowing through the legs can be removed. The ferrite flat plate is excellent in thermal conductivity, so that an IC or a CPU is improved in heat dissipation effect when the ferrite flat plate is brought into close contact with the IC, especially the CPU.
Patent JP-H0917710-A (JP)
Title: Method and device for aligning exposure film
Inventor: ISHIGURO HIROYUKI
IPC: H01L21/027
Filed: 1995-06-27
Abstract: PURPOSE: To provide a method and device for accurately aligning the position of the pattern of each exposure film on both surfaces of front and reverse sides. CONSTITUTION: A pair of exposure films 1a and 1b are supported by each traveling frame 3 and a fixed frame 4. The relative position for the fixed frame 4 is changed by a displacement mechanism part 5 for the traveling frame 3. An alignment mark and a reference mark are provided outside and inside the pattern for the exposure films 1a and 1b, respectively. The amount of deviation of alignment marks when the reference marks of the exposure films 1a and 1b are aligned is obtained by a control part 8. Then, after aligning the alignment marks, the traveling frame 3 is displaced by the amount of correction where the direction (sign) of the amount of deviation is reversed, thus aligning the reference marks and accurately aligning the pattern positions of the exposure films 1a and 1b.
Patent JP-S5950682-A (JP)
Title: Video signal discriminator
Inventor: OOI KATSUYUKI
IPC: H04N7/167
Filed: 1982-09-16
Abstract: PURPOSE:To discriminate effectively a video signal, by comparing sequentially a digital video data at a sampling point, obtaining a digital difference signal and generating a discriminating signal when a value adding sequentially this signal exceeds a set value. CONSTITUTION:A video signal SV is transmitted to a clamp circuit 5 through a buffer amplifier 2 and led to a timing circuit 4 after synchronizing separation 3 and its output CP clamps the circuit 5. The output is A/D-converted 6 to obtain a digital video signal SD, and a data of the present field and that at preceding field are compared 9 to obtain a level difference signal, which is integrated 11 into a value SD0 and compared 12 with an output value of a set value generator 13. As a result, when the signal SD0 exceeds an output value of the generator 13, the signal SC is outputted to detect the change in the screen at an interval detecting circuit 14.
Patent JP-S5951796-A (JP)
Title: Preparation of aged and fermented saccharide solution
Inventor: KONDOU KIYO
IPC: C12P7/48
Filed: 1982-09-16
Abstract: PURPOSE:To prepare an aged fermented saccharide solution having high absorption of mineral and utility, by assimilating a saccharide solution with a mineral by aging and fermentation using a mold capable of producing gluconic acid, etc. CONSTITUTION:A given amount of a mineral or mineral compound such as water-soluble compound of Ca, K, Na, Mg, Fe, Cu, Mn, Si, Ge, Se, I, etc. is added to a saccharide solution of sucrose, glucose, fructose, honey, etc. having about 40-70 Brix scale, and at least one fermentation seed selected from a mold capable of producing gluconic acid, mold capable of producing citric acid, yeast, enzyme capable of producing gluconic acid, and enzyme capable of producing citric acid is added to the saccharide solution, which is aged and fermented.
Patent JP-S6053348-A (JP)
Title: Data retransmission system in data transfer device
Inventor: YAMADA KENJI
IPC: H04L1/18
Filed: 1983-09-02
Abstract: PURPOSE:To improve the processing capability of a high-order control section by providing a confirming response detecting circuit, buffer control circuit, timer circuit and a direct memory access circuit to a data transfer device to process automatically the retransmission processing having been conducted by the high- order control section. CONSTITUTION:The buffer control circuit 40 managing a memory circuit 20 storing a transfer data, direct memory access circuit 30 started by the buffer circuit, timer circuit 50 and a confirming response detecting circuit detecting the conforming response of the data transmitted already from a received data are provided. When the high-order control section 70 writes a transfer data to the memory circuit 20 and requests transfer to the buffer control circuit 40, the buffer control circuit 40 starts the timer circuit 50 and the direct memory access circuit 30 and performs transfer. When a confirming response detection circuit 60 detects a negative response and can not detect the confirming response for a prescribed time, the direct memory access circuit 30 retransmits automatically the data already transmitted.