baber/WOPTO huggingface dataset:
Patent JP-S57190093-A (JP)
Title: Use of solid pitch with bituminous substance removed as fuel
Inventor: SAKATA TOSHIROU
IPC: F23G7/00
Filed: 1981-05-19
Abstract: PURPOSE: To use effectively peteroleum type heavy hydrocarbon containing bituminous substance as an auxiliary fuel for a rotary kiln for producing portland cement, by using a specific aliphatic hydrocarbon (mixture) as a solvent, removing the binuminous substance such as asphalt, etc. from the petroleum type heavy hydrocarbon so that it is changed into solid pitch with the bituminous substance removed.  
     CONSTITUTION: (A) About 1pt.vol. raw material of petroleum type heavy hydrocarbon containing bituminous substance such as asphalt, residue oil by distillation at normal pressure, etc. is extracted with (B) about pts.vol. 3W7C aliphatic hydrocarbon (mixture) as a solvent by a continuous contact extraction column of counterflow or a batch type autoclave, to separate and to prepare pitch with bituminous substance removed. This fuel in the form of solid is directly fed to the rear of rotary kile. Preferably the softing point of the pitch is 80W200°C and it calorie is 9,000W11,500KCal/g.  
     EFFECT: The pitch has improved lengtht and stability of fire and improved heat efficiency, and is preferable as auxiliary fuel. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-S60242598-A (JP)
Title: Semiconductor storage device
Inventor: IWAHASHI HIROSHI
IPC: H01L29/788
Filed: 1985-04-10
Abstract: PURPOSE:To allow the semiconductor storage device to operate invariably at a low voltage by providing a control signal coupled with a floating gate through a capacitor, and properly combining voltages to be applied to a control gate and the control signal terminal. CONSTITUTION:A capacitor C1' is formed between the control gate 4 and floating gate 5 and capacitors C2' and C3' are formed between the gate 5 and a substrate 1 parasitically. Further, the control terminal 7 is coupled with the gate 5 through a capacitor CA. In this constitution, a high voltage is applied to the gate 4 and a drain for data writing operation and thermoelectrons generated by impact ionization near by the drain are impressed to the gate 5 to perform the writing operation. When data is erased, on the other hand, the high voltage is applied to the gate 4 and the terminal 7 is set to zero. In this case, the high voltage may be applied to the terminal 7 while the gate 4 is set to 0V. Consequently, the data is written and erased without requiring any high voltage.
Patent JP-S531432-A (JP)
Title: Information processing unit
Inventor: NISHIZAWA TAKASHI
IPC: G06F9/30
Filed: 1976-06-28
Abstract: PURPOSE: To reduce the number of FF's and to simplify the control circuit, by using the counter in the instruction executing control circuit. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-S51151863-A (JP)
Title: Precipitating and filtering device
Inventor: SUZUKI TAKUHIRO
IPC: B01D21/24
Filed: 1975-06-23
Abstract: PURPOSE: To provide a device for precipitating and filtering a precipitationnatured particle contained in fluid such as water, etc. 
     COPYRIGHT: (C)1976,JPO&Japio
Patent JP-S52219-A (JP)
Title: Process for storage of curable resin
Inventor: SHIMOKAWA TAKATATSU
IPC: C07C239/00
Filed: 1975-06-23
Abstract: PURPOSE: Pot life of an acrylic type curable resin is largely extended without deterioration the curing characteristics by adding a particular penta-valent phosphorus compound. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-H05210664-A (JP)
Title: Document preparing device
Inventor: TODA ATSUKO
IPC: G06F17/21
Filed: 1991-03-15
Abstract: PURPOSE:To diversify character modifying functions by combining the enclosing ruled line function and the half-tone dot meshing function out of character modifying functions to execute the modification processing. CONSTITUTION:This device is provided with a control part 1 which controls the whole of the device and executes the documentation processing, the editing processing, etc., a keyboard 2, an input control part 3, a document buffer memory 4, a memory 5 where character modification data is stored, and a memory 6 where fundamental graphic data is preliminarily stored. The keyboard 2 is provided with a character modification key 2a, a cursor key 2b, etc., besides various character keys. The input control part 3 converts various key input signals inputted from the keyboard 2 to key codes and outputs them to the control part 1. That is, when the combinational processing of enclosing ruled line processing and half-tone dot meshing processing is indicated, the size of the enclosing ruled line is calculated in accordance with the number of characters as the character modification object, and graphic data of this size and character data of the character modification object are synthesized. The inside of the enclosing ruled line surrounding the generated character data is subjected to half-tone dot meshing processing.
Patent JP-H05238533-A (JP)
Title: Automatic feeder of hexagon socket set screw
Inventor: WAKAIZUMI KIYOSHI
IPC: B23P19/06
Filed: 1992-02-28
Abstract: PURPOSE:To reduce the size and weight of an automatic feeder of hexagon socket set screws with an extremely simple construction so that hexagon socket set screws may be fetched by turning them to a specified direction. CONSTITUTION:A hopper (A) wherein plural fetching openings A2 are formed round a base body is stantly set and installed rotatably. Sliding pins 8 are provided slidably inside the fetching openings A2. Sliding pins 8 are provided capably of rising/fall by following the rotation of the hopper (A) by fixed cams 10. Only those hexagon socket set screws (H) that have entered only in a proper direction from the fetching openings A2 are allowed to fall down outward from the base body, a reversing index consisting of a disc whereon plural fetching holes are formed is provided so that the hopper may be freely rotataed to be capable of receiving the falling hexagon socket set screws (H).
Patent JP-H08270182-A (JP)
Title: Ceramic panel
Inventor: DOMAE MASAAKI
IPC: E04F13/08
Filed: 1995-03-31
Abstract: PURPOSE: To enhance the productivity and quality of a ceramic panel in view of the attachment of the ceramic panel and the cooling in a baking process of the ceramic panel. CONSTITUTION: In a ceramic panel P in which net-like reinforcement 3, and attachments 4 each fitted in a mesh in the vicinity of the associated corner of the net-like reinforcement 3 are embedded, each of the attachments 4 is composed of a bottom part 5, a pair of side parts rising up from the bottom part 5, and flange parts 7 extending outward from the side parts. The side parts of the attachments 4 are arranged obliquely with respect to one another.
Patent JP-S60219745-A (JP)
Title: Pattern formation and pattern-forming device
Inventor: ENDOU MASATAKA
IPC: G03F7/20
Filed: 1984-04-16
Abstract: PURPOSE:To eliminate the variation in shape and dimension of a resist by a method wherein a resist is previously thermoset by irradiation with visible light or the like as a pre-process of post-baking. CONSTITUTION:In a case 3 filled with a nitrogen gas atmosphere, the resist pattern 1 on a substrate 2 placed on a supporter 4 is irradiated with a lamp 5 for visible-light or infrared irradiation. Thereafter, a water cooler 6 operates immediately and cools the supporter 4 and the substrate 2, and a nitrogen gas injector 7 operates and cools the lamp 5. Visible light or infrared rays of high output is capable of instantaneous heating of the substrate surface. Then, the resist on the subtrate can be improved in dry-etching resistance by setting with little thermodeformation.
Patent JP-S62232906-A (JP)
Title: Solenoid driving circuit
Inventor: SUGISAKA MASAMI
IPC: H01F7/18
Filed: 1986-04-02
Abstract: PURPOSE:To decrease a heat value as a whole, by connecting a solenoid coil with a MOS-type FET and connecting the MOS-type FET with a bias circuit so that heat generation of the MOS-type FET is reduced. CONSTITUTION:A MOS-type FET 7 is connected in series with a solenoid coil 4. A bias circuit is connected with a gate of the FET 7. Switching on a switch 2 allows an input voltage Vi to appear. The FET 7 becomes in an ON state, allowing a load current IL to flow across the coil 4. At a time when the input voltage Vi becomes zero, the load current IL also flows across the coil 4 through the FET 7 and a full-wave rectifying circuit 6. In case of the current flowing across the coil 4, ON resistance of the FET 7 is small, 0.1-O.2OMEGA or so, and therefore the consumption power of the FET 7 is small even if the load current IL is 0.5 A or so. Hence, heat generation of the FET 7 becomes low, decreasing the heat value as a whole.
Patent JP-H06266135-A (JP)
Title: Single layer type electrophotographic sensitive body
Inventor: YOSHIKAWA MASAO
IPC: G03G5/04
Filed: 1993-03-10
Abstract: PURPOSE:To improve electrostatic chargeability and sensitivity and to enhance the stability of electrostatic characteristics by dispersing X type nonmetallic phthalocyanine, org. hole transfer material and org. acceptor type compd. into the binder of a photosensitive layer and using a specific compd. as the org. hole transfer material. CONSTITUTION:This photosensitive body is constituted by dispersing at least the X type nonmetallic phthalocyanine, the org. hole transfer material and the org. acceptor type compd. into the binder. The compd. expressed by formula is used as the hole transfer material. In the formula, each of Ar1 to Ar4 denotes a nonsubstd. or alkyl group, alkoxy group, halogen atom, cyano group, nitro group or aryl group substd. with an amino group; X denotes an alkylene group, sulfur, oxygen, etc. As a result, the light attenuation rate in the initial period of photoirradiation increases. The reason thereof lies in that the trap on pigment surfaces is compensated by the hole transfer material. The holes injected into the hole transfer material move in the matrix without receiving the trap. The rapid drop of the surface potential is thus resulted.
Patent JP-H09269740-A (JP)
Title: Liquid crystal shutter type crt
Inventor: SHIRAMATSU NAOKI
IPC: G02F1/1335
Filed: 1996-03-29
Abstract: PROBLEM TO BE SOLVED: To display a picture whose contrast is excellent and which has high quality by reducing boundary reflection by providing a liquid crystal shutter fixed at the surface of a CRT main body so as to be in close contact with the surface and having flexibility. SOLUTION: The liquid crystal shutter 20 is controlled by a control circuit 6. An electron beam emitted by an electron gun 3 is modulated by a video signal, and is deflected up and down and left and right by a deflecting yoke 2, and hits a fluorescent screen provided at the front surface of a glass tube 29, so that white light is radiated to the liquid crystal shutter 20. The surface shape of the glass tube 29 has a part of the shape of a cylindrical side surface, and is a plane in a perpendicular direction, and has curvature in a horizontal direction. The liquid crystal shutter 20 having the flexibility is fixed at the surface of the glass tube 29 so as to be brought into close contact, so that an air layer is prevented from being caused between the surface of the glass tube 29 and the liquid crystal shutter 20.
Patent JP-S61236234-A (JP)
Title: System for switching transmission line
Inventor: TANIGUCHI KOICHI
IPC: H04B1/74
Filed: 1985-04-12
Abstract: PURPOSE:To attain changeover from an active to a stand-by transmission line without any slip by using a first-in first-out FIFO memory, to read a reception signal from the FIFO memory connected to the standby transmission line at the interruption of an input signal from the active transmission line. CONSTITUTION:A signal is sent from a signal source 1 to the active transmission line 2 and the stand-by transmission line 3. The signal from the transmission line 2 is supervised by a clock interruption detection circuit 4 and a clock recovery circuit 5 uses a tank circuit having a longer time constant than that of the interruption detecting circuit 4 to output a clock signal for a prescribed time even after the signal from the transmission line 2 is interrupted. The signal from the transmission line 2 is recovered by a signal recovery circuit 6 operated by the clock from the clock recovery circuit 5. Then the recovered signal is written on the FIFO memory 8 by using a clock from the circuit 5 and read by another clock CKR. When the signal from the active transmission line is given normally, a reception signal is outputted through gates 10, 11.
Patent JP-H10251055-A (JP)
Title: Alumina-magnesia-carbon refractory material for heath of electric furnace
Inventor: NITTA MINORU
IPC: F27D1/00
Filed: 1997-03-12
Abstract: PROBLEM TO BE SOLVED: To extend the durable life of a refractory material by using a material containing each specified amt. of alumina, magnesia containing a specified amt. or larger periclase, and carbon and using a phenol resin or other org. binders or a combination of these. SOLUTION: The refractory material consists of 45 to 90wt.% alumina, 5 to 30wt.% magnesia containing >=5wt.% periclase crystal, and 5 to 25wt.% carbon, and a resin binder such as a phenol resin. Further, the refractory material contains a metal powder such as an aluminum powder and silicon powder to prevent oxidation by 0.5 to 10wt.% to 100wt.% of the material above described. As for the alumina source material, an electric galvanized alumina, sintered alumina containing >=80wt.% alumina is used. As for the spinel source material, sintered clinker is used. As for the magnesia source material, electric galvanized magnesia having >=80wt.% magnesia is used. As for the carbon source material, natural or artificial graphite can be used. These components for the refractory material are compounded in specified proportions, kneaded, formed and heat treated at specified temp. to obtain a brick for a furnace hearth.
Patent JP-S61236221-A (JP)
Title: Charge balance sampling comparator
Inventor: IWABUCHI MASARU
IPC: H03M1/50
Filed: 1985-04-12
Abstract: PURPOSE:To attain a low power consumption with a simple circuit by decreasing the operating current of inverter circuits connected in cascade and the capacitance of input capacitors toward the post-stage. CONSTITUTION:The operation current of CMOS inverters N1-N3 constituting each comparator connected in cascade is set as N1>N2>N3 and the capacitance of capacitors C1-C3 is set as C1>C2>C3. Thus, in the comparison, the post-stage circuit receives an amplified output DELTAV of the pre-strage circuit and does not require any high sensitivity, an MOSFET with a small operating current, in other words, a small conductance is used and the inverter circuits having a transmission characteristic changing slowly are used. Thus, a through- current flowing between a power supply voltage and a common when the input and output are short-circuited is decreased. Since each input capacitance is decreased, the zero correcting time is decreased even with a small current and the operating speed is not sacrificed.
Patent JP-S6433705-A (JP)
Title: Bonding device for magnetic head glass
Inventor: TSUTAKI SHOJI
IPC: G11B5/23
Filed: 1987-03-30
Abstract: PURPOSE:To obtain the bonding of high reliability by executing a grooving to a pair of magnetic substance wafers to construct a magnetic head, arranging the plate body of non-metallic materials to one of the wafers when the wafers are faced through a glass and bonded with pressure and executing a pressurizing with the force of a spring. CONSTITUTION:Magnetic substance wafers 1a and 1b, in which a groove 2 is provided, are faced through a glass 3, put between press members 11a and 11b and mounted to a clip jig 10. Then, on the press member 11b of one side, supporting member 12, a plate body 13 and a protecting member 14 are mounted in this order. Next, a cover body 15 is installed to the jig 10 with using a pin 16 and a screw member 17 is screwed into a screw hole 15a while the deflection quantity of the plate body 13 is measured with a dial gage. Thus, an equal load is given to the wafers 1a and 1b with the elastic force of the plate body 13 and when they are passed through a successive bonding furnace 18, the bonding of the wafers 1a and 1b goes to be possible while a uniform gap (g) is held. Thus, a load control is made high accurate and a handling work is simplified.
Patent JP-H10252268-A (JP)
Title: Muck recovery method and device therefor
Inventor: TSURUMI TETSUYA
IPC: B28B11/22
Filed: 1997-03-13
Abstract: PROBLEM TO BE SOLVED: To make muck recovery work efficient by providing a muck suction part with a nozzle, jetting a pressurized fluid to a concrete placing joint face to suck flowing muck into a tank, and circulating the sucked fluid to the nozzle by a pump. SOLUTION: A muck recovery unit A provided with a muck suction part 19 having a pressure water jet nozzle, a suction port, and the like is elevatingly mounted on a vacuum car 2, and a submerged pump C is provided in a receiver tank 1. A generator B, a crawling travel device D, a hydraulic motor, and the like are mounted on the vacuum car 2, and these devices are driven by an engine mounted on the vacuum car 2. This vacuum car 2 is moved into a required position of a concrete placing joint face S, and high pressure water is jetted to make muck flow and to store it in the receiver tank 1. Part of sucked water in the tank 1 is circulated to the jet nozzle by the submerged pump C so as to prevent the tank 1 from becoming full. Muck disposal efficiency can thereby be improved.
Patent JP-S58194260-A (JP)
Title: Manufacturing method for battery
Inventor: OGURO HIDESUKE
IPC: H01M6/16
Filed: 1982-05-07
Abstract: PURPOSE:To manufacture a battery with excellent preservation performance by forming a non-aqueous electrolytic battery that uses a light metal as the negative electrode material and MnO2 as the positive active material and performing a stand-by discharge process in a specific system. CONSTITUTION:A non-aqueous electrolytic battery that uses a light metal such as Li as the negative electrode active material and MnO2 as the positive electrode active material is formed as the stand-by discharge process that discharges 2 to 10% of the battery capacity is performed multiply as shown below. In other words, the first discharge is performed within 24hr after the battery is formed and the period between the first and second discharges and each discharge interval of the second discharge and later are 24 to 240hr. Besides, while each discharge of the first discharge and later are being performed, the battery must be stored under an atmosphere of 20 to 60 deg.C.
Patent JP-S554133-A (JP)
Title: Variable divider circuit
Inventor: WATANABE MASAHIRO
IPC: H03K23/66
Filed: 1978-06-23
Abstract: PURPOSE:To improve greatly the S/N ratio of the output of a PLL synthesizer by controlling the operation of a phase inverter circuit at every single-counting cycle of a variable divider by using a NOR circuit, monostable multivibrator, AND circuit, FF, and OR-ELSE circuit. CONSTITUTION:To variable divider 1, an integer part of N/2 is set as a dividing ratio and a signal inputted to this divider 1 is phase-inverted by phase inverter circuit 2 and then supplied to monostable multivibrator 4 via NOR circuit 3. The output of this monostable multivibrator 4 is applied to terminal PE of divider 1 and also to one terminal of AND circuit 5, whose output is sent to terminal CL of FF6; and output Q of FF6 and the input signal are both OR-ELSE circuit 7, the output of which is applied to circuit 1. Now, the S/N ratio of a used PLL synthesizer can greatly be improved, by controlling the operation of circuit 2 at every single-counting cycle of the divider.
Patent JP-S522244-A (JP)
Title: Measuring system
Inventor: NEISHI HIDETADA
IPC: G01R31/00
Filed: 1975-06-24
Abstract: PURPOSE: To shorten a waiting time for measurement and improve a utilization efficiency of a measuring unit. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-S522216-A (JP)
Title: Inputting method of modified diagram using digitizer
Inventor: OOTA KIMIHARU
IPC: G06F3/00
Filed: 1975-06-24
Abstract: PURPOSE: An inputting method of modified or changed informations of train to a computer intended for economic equipment and simple operation by using a digitizer. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-S533071-A (JP)
Title: Semiconductor device
Inventor: KAMIBAYASHI KAZUTOSHI
IPC: H01L21/331
Filed: 1976-06-29
Abstract: PURPOSE: To achieve saturation and unsaturation types with one transistor by providing a collector electrode which is voltage-clamped by the barrier at the contact part of a base electrode and collector as well as a collector electrode which is not. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-H05277274-A (JP)
Title: Sewing machine device
IPC: D05B69/30
Filed: 1992-03-31
Abstract: PURPOSE:To provide a sewing machine device capable of eliminating a trouble for passing a needle thread at the time of thread exchange. CONSTITUTION:A machine head 4 for a needle bar 18 is detachable from a machine arm 3, and a thread bobbin, a needle thread tension adjustment device, a thread guide or the like is laid on the machine head 4. A thread take-up lever 15 is laid on the machine arm 3, but a thread is retained with a recess groove and a cover section to conceal the groove, in such a way as freely removable. Thus, constitution is so made that a machine head having another thread can be mounted without any need to remove the existing thread by removing the thread from the lever 15 and demounting the machine head 4 from the arm 3.
Patent JP-H06345695-A (JP)
Title: Production of lignans
Inventor: MORI YUKIO
IPC: C07D307/88
Filed: 1994-04-15
Abstract: PURPOSE:To obtain the title compound which is useful for atherosclerosis efficiently in high position selectivity by reaction of a lactone with an unsaturated ketone in the presence of base followed by dehydration of the product. CONSTITUTION:In the presence of a base (preferably lithium bis(trimethylsilyl) amide, the reaction is effected between a lactone of formula I (R<2>, R<3> are lower alkoxy, alkylenedioxy; R<4> is lower alkoxy, H; R<5>, R<6> are lower alkyl) and an unsaturated ketone of formula II (R<1> is alkyl, cycloalkyl; R<7> is lower alkyl) and the product is dehydrated to give a compound of formula III. For example, the reaction of 3-(3,4-dimethoxy-phenyl)-4,5,6-tri-methoxy-1(3H)-isobenzofuranone with methyl (E)-4-cyclohexyl-4-oxo-2-butenoate give the objective compound.
Patent JP-S554739-A (JP)
Title: Address monitor system
Inventor: SASAKI TAKESHI
IPC: G06F12/16
Filed: 1978-06-27
Abstract: PURPOSE: To make address monitor possible in a simple constitution by controlling an N-word address memory unit through an N-notation counter from the time when a set start address and an address from the center processing unit have agree with each other.  
     CONSTITUTION: N-notation counter 14 and address memory unit 14 are started through control circuit 13 by the agreement signal which is outputted from address check gate 12 at the time when the start address of start address check register 11 set previously according to commands and the address corresponding to the program from central processing unit 2 have agree with each other. Then, an N- word address is stored in the address position of unit 14 designated by counter 15, and counter 15 and unit 14 are circulated to the initial state for every N-word adress. As a result, the address designation state of memory unit 1 dependent upon unit 2 is discriminated when storage contents of unit 14 are read out through unit 2 at an abnormal stop time of unit 2, so that the cause analysis, etc., for program abnormal stop can be performed easily. 
     COPYRIGHT: (C)1980,JPO&Japio