baber/WOPTO huggingface dataset:
Patent TW-I248467-B (TW)
Title: Ultra-high-strength precipitation-hardenable stainless steel, strip made therefrom, and method of making same
Inventor: MARTIN JAMES W
IPC: C21D8/02
Filed: 2002-03-27
Granted: 2006-02-01
Abstract: A precipitation hardenable stainless steel having the following weight percent composition is disclosed. C 0.030 max.; Mn 0.5 max.; Si 0.5 max.; P 0.040 max.; S 0.025 max.; Cr 9-13; Ni 7-9; Mo 3-6; Cu 0.75 max.; Co 5-11; Ti 1.0 max.; Al 1.0-1.5; Nb 1.0 max.; B 0.010 max.; N 0.030 max.; O 0.020 max. The balance of the alloy is essentially iron and the usual impurities. One or more rare earth metals or calcium may be included in the alloy for removing and/or stabilizing phosphorus and sulfur. The alloy provides a unique combination of strength, toughness, and ductility. In accordance with another aspect of the present invention, there is described a useful article such as an aircraft structural component or a golf club head that is formed, at least in part, from the aforesaid alloy. In accordance with a further aspect of the present invention, there is described an elongated strip formed from the aforesaid and a method of making such strip material.
Patent TW-I258510-B (TW)
Title: Non-pyrophoric hydrogen storage alloy
Inventor: OVSHINSKY STANFORD R
IPC: C22C30/00
Filed: 2002-06-03
Granted: 2006-07-21
Abstract: A low temperature hydrogen storage alloy which is not pyrophoric upon exposure to ambient atmosphere, particularly even after hydrogen charge/discharge cycling.
Patent TW-569398-B (TW)
Title: One-transistor memory cell arrangement and method for fabricating it
Inventor: KUSTERS KARL HEINZ
IPC: H01L27/108
Filed: 2002-06-04
Granted: 2004-01-01
Abstract: In a method for fabricating a dynamic memory cell in a semiconductor substrate having a trench capacitor 1 and a selection transistor 2 and a semiconductor memory having such a memory cell, a dielectric insulator layer 17, 201 is formed between the selection transistor and the trench capacitor, a first electrode region 203 of the selection transistor essentially being arranged above a block-type inner electrode 102 of the trench capacitor and being connected to said electrode via a contact opening 213 in the dielectric insulator layer, said contact opening being provided with an electrically conductive filling layer 214.
Patent TW-550782-B (TW)
Title: Semiconductor module
Inventor: MATSUURA TETSUYA
IPC: H01L23/538
Filed: 2002-07-02
Granted: 2003-09-01
Abstract: This invention relates to semiconductor modules with very compactly mounted semiconductor chips. A plurality of substrates are stacked on top of each other. A flexible cable serially connects the substrates. Semiconductor packages are mounted on the surfaces of the substrates. An adhesive material bonds adjoining semiconductor packages and holds the semiconductor packages in place with respect to each other. The bottommost substrate is provided with external leads by which the semiconductor module is mounted on the motherboard.
Patent TW-594798-B (TW)
Title: Composition for forming low dielectric constant insulating film, method of forming insulating film using the composition and electronic parts having the insulating film produced thereby
Inventor: FUKUYAMA SHUNICHI
IPC: H01L21/768
Filed: 2002-07-15
Granted: 2004-06-21
Abstract: A composition for the formation of an insulating film comprising a low dielectric constant polymeric material and a sublimating material, which are dissolved in a solvent. Preferred low dielectric constant polymeric materials include polyaryl ethers. Preferred sublimating materials include silicone compounds having a closed stereostructure having atoms at its vertexes, such as those known as Si-T8 and Si-T12. A method of forming a low dielectric constant insulating film and electronic parts or components using an insulating film formed thereby are also disclosed.
Patent TW-I273146-B (TW)
Title: Method for manufacturing copper-resin composite material
Inventor: SEITA MASARU
IPC: H05K3/18
Filed: 2002-08-21
Granted: 2007-02-11
Abstract: A method for forming copper-resin composite materials is disclosed. This method affixes a palladium or palladium-tin catalyst onto resin substrate, and then subjects the catalyst-containing resin to an electroless copper plating bath without performing a catalyst acceleration treatment step.
Patent TW-I238284-B (TW)
Title: Photographic film cartridge and camera including such
Inventor: WANG WILSON CHING MIAO
IPC: G03B17/28
Filed: 2002-11-01
Granted: 2005-08-21
Abstract: A camera comprises a camera body with a lens and shutter operating control and film cartridge removable from the camera body having an unexposed film spool region and an exposed film spool region and a bridging portion between those regions. An opening in the cartridge permits light from the lens to pass through the opening to the film at the bridging portion. A door closes the opening of the cartridge and the door is openable with the cartridge installed in or attached to the camera body. Cooperating elements on the camera body and the cartridge open the door or close the door with the door being openable when the cartridge is fully engaged with the camera body. There is a detented connection of the film cartridge in the camera body.
Patent TW-571256-B (TW)
Title: A compound vehicle equipment adapted for open electronic billing
Inventor: JENG BO-SHUEN
IPC: G07B15/00
Filed: 2002-11-04
Granted: 2004-01-11
Abstract: A compound vehicle equipment adapted for open electronic billing primarily employs integration of GPS module and mobile communication system module, supplemented with DSRC beacon lane unit installed only at area with poor communication quality to optimize the area that mobile signal is hard to reach, achieving full dimension communication goal. The way requiring no installation of any lane communication equipment on lane can significantly lower system installation and maintenance cost and relatively reduce the operation overhead of freeway business runner. Moreover, the invention can upgrade the existing prevailing equipment of vehicle (e.g. GPS, mobile communication system, etc.) by adding features to reach the goal of electronic billing, which contributes to reduce vehicle equipment cost of driver a lot and significantly drop the resistance against promotion of electronic billing.
Patent TW-578306-B (TW)
Title: Power metal oxide semiconductor field effect transistor layout structure
Inventor: NI CHENG-TSUNG
IPC: H01L29/78
Filed: 2002-11-07
Granted: 2004-03-01
Abstract: A branch type power metal oxide semiconductor field effect transistor (MOSFET) layout structure comprises a base and a plurality of MOSFET cells. The individual MOSFET cell comprises a ling strip shaped base and a plurality of branch portions. The branch portion extends from the side of the base so that photoresist pattern covering the base connects after forming the photoresist pattern, which can increase coverage area of photoresist and thus prevent photoresist from peeling off.
Patent TW-I251616-B (TW)
Title: Polymer electrolyte fuel-cell separator sealing rubber composition
Inventor: MEGURIYA NORIYUKI
IPC: C08L83/05
Filed: 2002-11-12
Granted: 2006-03-21
Abstract: A rubber composition contains an organopolysiloxane having at least two alkenyl radicals, an organohydrogen-polysiloxane having at least three Si-H radicals, a catalyst and optionally, fumed silica and an acid resistant inorganic filler. On a periphery of one side of a polymer electrolyte fuel-cell separator, the composition forms a seal member which allows for little leaching of non-functional organopolysiloxane fraction and has improved acid resistance and compression set.
Patent TW-567587-B (TW)
Title: Semiconductor memory
Inventor: OKADA YOSHINORI
IPC: H01L21/8242
Filed: 2002-11-22
Granted: 2003-12-21
Abstract: A memory cell (10) is a so-called CMOS type cell. P-wells (W1P, W2P, W3P) and N-wells (W4N, W5N) are formed in a main surface (5S) of a semiconductor substrate (5), and the wells (W2P, W4N, W1P, W5N, W3P) are aligned in this order. Driver transistors (11DN, 12DN) are formed in the wells (W2P, W3P), respectively. Load transistors (11LP, 12LP) are formed in the wells (W4N, W5N), respectively. Two access transistors (11AN, 12AN) are formed in the single well (W1P). N+-type impurity regions (FN30, FN10) constituting one of storage nodes are provided in different wells, and N<+>-type impurity regions (FN31, FN11) constituting.
Patent TW-I275644-B (TW)
Title: Novel chimeric TNF ligands
Inventor: PRUSSAK CHARLES E
IPC: C07K14/525
Filed: 2002-12-06
Granted: 2007-03-11
Abstract: The present invention is directed to an isolated polynucleotide sequence encoding a chimeric TNFalpha, comprising a first nucleotide sequence encoding a domain or subdomain of a tumor necrosis factor ligand other than TNFalpha, wherein the encoded domain or subdomain replaces a cleavage site of native TNFalpha, and a second nucleotide sequence encoding a domain or subdomain of native TNFalpha that binds to a TNFalpha receptor. The encoded chimeric TNFalpha is significantly less susceptible to cleavage from the cellular surface and, as a result can increase the concentration of a ligand capable of binding to a TNFalpha receptor on the surface of a cell. The chimeric TNFalpha is therefore useful in methods for inducing apoptosis of a cell expressing a TNFalpha receptor, inducing activation of an immune system cell and treating neoplastic cells, by introducing into the cell of interest an isolated polynucleotide sequence encoding a chimeric TNFalpha that is expressed on the surface of the cell.
Patent TW-I266510-B (TW)
Title: Digital frame determination method and apparatus
Inventor: OLSEN RONALD D
IPC: H04J3/06
Filed: 2003-01-03
Granted: 2006-11-11
Abstract: A digital frame determination method and apparatus are provided which collect a data frame from a digital data stream starting at an initial frame start and a nominal frame frequency, test the data frame for alignment based on a set of rules, determine an adjustment value in accordance with the set of rules when the data frame is not aligned, adjust the frame start in accordance with the adjustment value, and repeat until the data frame is aligned and the alignment is verified.
Patent TW-I227753-B (TW)
Title: Electrolytic copper plating method, phosphorus-containing anode for electrolytic copper plating
Inventor: AIBA AKIHIRO
IPC: C25D17/10
Filed: 2003-02-11
Granted: 2005-02-11
Abstract: The invention relates to an electrolytic copper plating method using a phosphorus-containing copper anode, characterized in that the phosphorus-containing copper anode used has a crystal grain size of 1,500 m to 20,000 m. A method for plating an object to be plated such as a semiconductor wafer with electrolytic copper, while preventing particles produced on the anode side in the plating solution from adhering to the object; a phosphorus-containing copper anode for electrolytic copper plating; and a semiconductor wafer which is plated using them and to which few particles adhere are disclosed.
Patent TW-I277229-B (TW)
Title: OLED area illumination lighting apparatus
Inventor: COK RONALD S
IPC: H05B33/00
Filed: 2003-04-11
Granted: 2007-03-21
Abstract: A solid-state area illumination lighting apparatus, including a plurality of light sources, each light source having, a substrate; an organic light emitting diode (OLED) layer deposited upon the substrate, the organic light emitting diode layer including first and second electrodes for providing electrical power to the OLED layer; an encapsulating cover covering the OLED layer; and first and second conductors located on the substrate and electrically connected to the first and second electrodes, and extending beyond the encapsulating cover for making electrical contact to the first and second electrodes by an external power source; and a lighting fixture for removably receiving and holding the plurality of light sources and having a plurality of first electrical contacts for making electrical connection to the first and second conductors of the light sources, and second electrical contacts for making electrical connection to an external power source.
Patent TW-I270956-B (TW)
Title: Substrate processing apparatus and substrate processing method
Inventor: NUMAKURA MASAHIRO
IPC: H01L21/00
Filed: 2003-05-07
Granted: 2007-01-11
Abstract: The control apparatus MC memorizes the processing room PM (final processing PM) where the final processing is conducted in the prior batch, and the semiconductor wafer W is conveyed in the beginning of the treatment at this batch from the next processing room of the final processing PM (for example it is the processing room PM2 when the final processing PM is the processing room PM1). Thus, the application frequency of each processing portion can be uniform so as to suppress the consumption difference of component occurred in the maintenance period or inside the processing portion.
Patent TW-I222503-B (TW)
Title: Method for making ball valve
Inventor: JIANG SHIANG-HUEI
IPC: F16K5/06
Filed: 2003-06-03
Granted: 2004-10-21
Abstract: This invention provides a method for making a ball valve, including: forming a circular board having a notch with a plate, stamping the circular board into a bowl-shaped body by upper and lower molds, punching through a planar portion of the bowl-shaped body to form a through hole, thereby forming a semi-spherical valve, welding two semi-spherical valves together with two notches matching each other, grinding the welded portion to form a ball valve. Accordingly, the two semi-spherical valves that are made of two plates have the same configuration, curvature and thickness so as to enhance the quality and eliminate the occurrence of displacement, in consistent curvature, thickness, and different configuration caused by stamping a single plate in forming a conventional ball valve.
Patent TW-I221124-B (TW)
Title: Cartridge and printing device
Inventor: ASAUCHI NOBORU
IPC: B41J2/17
Filed: 2003-07-16
Granted: 2004-09-21
Abstract: The object of the present invention is that although it is possible to inspect the status of a recording material for printing operation in a cartridge that contains the recording material, it encounters a problem of poor reliability of the inspection. The solution of the present invention is that a sensor 17 for inspecting if there is residual ink is arranged inside an ink cartridge 10. A control device 22 of a printing device 20 transmits, in a wireless manner, an instruction for inspection and the conditions for inspection to the cartridge 10. The cartridge 10 receives the instruction and drives the sensor 17 to vibrate via a sensor control section in accordance with the conditions of inspection. The sensor 17 is arranged next to a resonance chamber 19 of an ink containment chamber 16 and thus the frequency of vibration thereof is constrained by the resonance frequency of the resonance chamber 18. Since the resonance frequency is different based on the situation where there is ink residual in the resonance chamber 18, inspecting the resonance frequency reveals if there is ink residual in the resonance chamber 18 and even getting aware of the residual amount of ink inside the ink cartridge 10. Thus, by entering conditions of inspection from the cartridge side and ensuring the inspection is performed on the basis of the required conditions of inspection, correctness of inspection can be expected.
Patent TW-I276824-B (TW)
Title: Flexible interface for universal bus test instrument
Inventor: GOHEL TUSHAR K
IPC: G06F3/00
Filed: 2003-07-22
Granted: 2007-03-21
Abstract: An interface for a bus test instrument is readily adaptable for testing a wide range of bus types. The interface includes a pair of transmit lines and a pair of receive lines. A transmitting circuit is adaptable for transmitting either single-ended or differential signals over the transmit lines, and at least one receiving circuit is adaptable for receiving either single-ended or differential signals from either the receive lines or the transmit lines. The flexible interface allows the testing of single-ended and differential busses, as well as busses that support both unidirectional and bidirectional communication.
Patent TW-I230283-B (TW)
Title: Display device
Inventor: KOBAYASHI MICHIYA
IPC: G09F9/30
Filed: 2003-08-19
Granted: 2005-04-01
Abstract: A flat panel display device 1 capable of displaying images on both its front and back panels includes first pixel electrodes 31 and 32 disposed at pixels 11b and second optically transparent pixel electrodes 32 disposed at pixels 11a, and common electrodes 35 and 36 provided with optically transparent portions corresponding to first pixel electrodes 31 and 32 and light shielding portions corresponding to second pixel electrodes 32. Optical layers 34 are further disposed between first pixel electrodes 31 and 32 and common electrodes 35 and 36 to change an optical property in response to electric energy applied between first pixel electrodes 31 and 32 and common electrodes 35 and 36. Second optical layers 34 are also disposed between second pixel electrodes 32 and common electrodes 35 and 36 to change an optical property in response to electric energy applied between second pixel electrodes 32 and common electrodes 35 and 36.
Patent TW-I234078-B (TW)
Title: System bandwidth display device of information processing system
Inventor: LIN I-MING
IPC: G06F13/20
Filed: 2003-09-02
Granted: 2005-06-11
Abstract: A system bandwidth display device of information processing system fetches the strobe among buses of an information processing system. The sampled strobe and a fixed clock are further computed to obtain the data transmission speeds among buses. The bandwidth operated by the information processing system is estimated and displayed so that a user can understand the operating status of the information processing system.
Patent TW-I240286-B (TW)
Title: Miniaturized power inductor and the miniaturization method
Inventor: LIN CHI-SHIAN
IPC: H01F17/06
Filed: 2003-09-08
Granted: 2005-09-21
Abstract: The present invention provides a miniaturized power inductor, and the miniaturization method, which includes the following steps: serially connecting a plurality of inductor units with low inductance with an inductor with a specific inductance; stacking each of the low inductance units in a laminated manner to form an inductor with high inductance in serial connection; and, forming an insulation layer between adjacent low inductance units constitute a closed magnetic loop. Thus, the low inductance unit made by the laminated manner has less number of windings than the single-winding high inductance inductor. Moreover, the insulation layer can be used as an air gap of the inductor to reduce the magnetic flux density without greatly reducing the permeability coefficient u. Thus, the inductor structure according to the present invention can be easily fabricated in a laminated manner, and provides an excellent DC overlapping characteristic.
Patent TW-I330862-B (TW)
Title: Semiconductor apparatus and fabrication method of the same
Inventor: YAMAZAKI SHUNPEI
IPC: H01L21/00
Filed: 2003-10-16
Granted: 2010-09-21
Abstract: It is an object of the present invention to provide a semiconductor device capable of preventing deterioration due to penetration of moisture or oxygen, for example, a light-emitting apparatus having an organic light-emitting device that is formed over a plastic substrate, and a liquid crystal display apparatus using a plastic substrate. According to the present invention, devices formed on a glass substrate or a quartz substrate (a TFT, a light-emitting device having an organic compound, a liquid crystal device, a memory device, a thin-film diode, a pin-junction silicon photoelectric converter, a silicon resistance element, or the like) are separated from the substrate, and transferred to a plastic substrate having high thermal conductivity.
Patent TW-I235031-B (TW)
Title: Process for producing orchid seedlings by static liquid culture
Inventor: CHU CHIEN-YOUNG
IPC: A01H4/00
Filed: 2003-10-28
Granted: 2005-07-01
Abstract: Disclosed herein is a process for producing orchid seedlings by static liquid culture, in which a suitable amount of orchid seeds are suspended in a liquid culture medium suitable for the germination and growth of the orchid seeds to form a seed suspension; the seed suspension is then added into an empty culture container, so that the seed suspension within the culture container, as measured from the bottom of the container, has a predetermined depth no higher than 1 cm and enables each seed to be suspended within the liquid culture medium; thereafter, the container is allowed to stand so as to enable the suspended seeds to germinate and grow. The young seedlings thus formed can be further cultivated by static liquid culture.
Patent TW-I228165-B (TW)
Title: Magnetic damper and actuator having magnetic damper
Inventor: YAJIMA HISASHI
IPC: F16F15/03
Filed: 2003-11-03
Granted: 2005-02-21
Abstract: The object of the present invention is to enhance the usability and the durability by lessening the momentum when an effector is collided, thereby shortening the time until the stoppage of the above effector and making it hard to receive the damage by the collision of the above effector, in a damper for stopping the effector in a shock-absorbing manner. The solution of the present invention is a magnetic damper comprising a mobile braking plate (2) for receiving the effector (1) of the actuator, and a stator (3) which attracts the braking plate (2) by magnetic force, and the magnetically attracting force working between the stator (3) and the above braking plate (2) serves as the braking force for stopping the above effector (1).
Patent TW-I229410-B (TW)
Title: Semiconductor device having STI without divot and its manufacture
Inventor: OHTA HIROYUKI
IPC: H01L21/762
Filed: 2003-11-19
Granted: 2005-03-11
Abstract: The method of manufacturing a semiconductor device has the steps of: etching a semiconductor substrate to form an isolation trench by using as a mask a pattern including a first silicon nitride film and having a window; depositing a second silicon nitride film covering an inner surface of the isolation trench; forming a first silicon oxide film burying the isolation trench; etching and removing the first silicon oxide film in an upper region of the isolation trench; etching and removing the exposed second silicon nitride film; chemical-mechanical-polishing the second silicon oxide film; and etching and removing the exposed first silicon nitride film.
Patent TW-I236033-B (TW)
Title: Alignment mark and flat display panels containing the same
Inventor: CHEN PO-CHENG
IPC: H01J9/00
Filed: 2003-12-05
Granted: 2005-07-11
Abstract: The present invention provides a set of alignment marks for flat display panel assembly. The set of alignment marks includes a first alignment mark composed of a first parallelogram and the diagonal lines thereof extending outward from the four corners, and a second alignment mark composed of a second parallelogram that is identical the first parallelogram in shape and plural sets of parallel line segments disposed along two sides of the diagonal lines extending outward from the four corners of the second parallelogram. The first and second alignment marks are disposed on corresponding areas of the front and rear panels of a flat display device, respectively. When assembling, the first parallelogram is overlapped with the second parallelogram. In addition, the diagonal lines of the first alignment mark are aligned to central axles of the sets of parallel line segments of the second alignment mark, which are designed to improve alignment accuracy.