baber/WOPTO huggingface dataset:
Patent TW-414768-B (TW)
Title: Control device equipped with accelerating and decelerating function
Inventor: MOMOSE NOBUO
IPC: B60T7/00
Filed: 1998-04-23
Granted: 2000-12-11
Abstract: A control device equipped with accelerating and decelerating function can automatically operate a braking device (100) of a vehicle. This control device consists of: a sensing device (404) for running status of an accelerating pedal to sense the operating status of the accelerating pedal; and a controller (31) to execute a control sequence (S5) of accelerating and decelerating function, when the sensing device (404) detect the acceleration pedal under a releasing status, the braking device (100) is forced to the decelerating applied mode, and when the decelerating applied mode of the braking device (100) is continued in a predetermined time period, then the controller (301) will delay to execute the control sequence (S5) with accelerating and decelerating function.
Patent TW-391941-B (TW)
Title: Brake lever having a rapid brake shoe clearance adjusting mechanism
Inventor: YAMASHITA KAZUHISA
IPC: B62L1/14
Filed: 1998-04-27
Granted: 2000-06-01
Abstract: The invention relates to a brake actuation mechanism having first and second adjusting mechanism. The first adjusting mechanism includes a cam member that engages a portion of a lever member. The cam member includes a plurality of cam surfaces. Each of the cam surfaces is configured such that, when engaged with the lever member, defines a different brake disengagement position for the lever member. Each brake disengagement position corresponds to a corresponding position of brake shoes.
Patent TW-479062-B (TW)
Title: LH-RH peptide analogues, their uses and pharmaceutical compositions containing them
Inventor: DELANSORNE REMI
IPC: A61P15/10
Filed: 1998-05-13
Granted: 2002-03-11
Abstract: The invention relates to LH-RH peptide analogues with excellent affinity for LH-RH receptors, of the formula: A1-A2-A3-A4-A5-A6-HAA-A7-Pro-Z (I). The invention also relates to the uses of said peptide analogues and to the pharmaceutical compositions containing them.
Patent TW-377502-B (TW)
Title: Method of dual damascene
Inventor: XU ZHEN-CONG
IPC: H01L21/768
Filed: 1998-05-26
Granted: 1999-12-21
Abstract: A method of dual damascene is disclosed with the following processes: (1) depositing a first metal layer and a silicon nitride layer, in that order; (2) defining silicon nitride layer and the first metal layer for forming the first metal wire and the second metal wire to be covered by silicon nitride layer; (3) removal of silicon nitride layer on top of the first metal wire and defining the silicon nitride layer on top of the second metal wire to form via plug; (4) forming an insulating layer on substrate and then defining it to form exposed trench; (5) removing the via plug to expose the second metal wire; (6) forming a second metal layer through vias of dielectric layer and trenches, making the second metal layer and the second metal wire in contact with each other.
Patent TW-407058-B (TW)
Title: Oral cisapride dosage forms with an extended duration
Inventor: JUO SHOU-CHUANG
IPC: A61K9/24
Filed: 1998-07-17
Granted: 2000-10-01
Abstract: The present invention provides sustained-release oral solid dosage forms of cisapride through a multiply particulate system, which are bioavailable and provide efficient blood level of cisapride for 24 hours. A unit dosage of cisapride comprises a pleurity of substrates containing sustained-release cisapride is also provided herein.
Patent TW-381384-B (TW)
Title: Dual operation voltage single chip for high speed Ethernet network card controller
Inventor: SHIAU JING-FANG
IPC: H04L29/02
Filed: 1998-07-29
Granted: 2000-02-01
Abstract: A kind of dual operation voltage single ship for high speed Ethernet network card controller which comprises a 10 Mbps physical layer module, a 100 Mbps physical layer module, a medium access control module, a PCI/CardBus interface and multiple two way voltage modulating units in which all the said 10 Mbps physical layer module, and medium access control module and PCI/CardBus interface employ the first voltage level as the operation voltage, but the 100 Mbps physical layer module employs the second voltage level as the operation voltage. The two way voltage modulating unit can provide the signal voltage conversion between the first voltage level signal and the second voltage level signal.
Patent TW-426662-B (TW)
Title: Aryloxyarylsulfonylamino hydroxamic acid derivatives
Inventor: ROBINSON RALPH PELTON
IPC: A61K31/4468
Filed: 1998-08-05
Granted: 2001-03-21
Abstract: A compound of the formula, wherein X,Y, R1 and R2 are as defined above, useful in the treatment of arthritis or cancer and other diseases involving selective inhibition of matrix metalloproteinase-13. A compound of the formula, or the pharmaceutically acceptable salts thereof, wherein R1 is (C1-C6)alkyl; R2 is (C1-C6)alkyl; or R1 and R2 taken together with the carbon atom to which they are attached form a ring selected from (C5-C7)cycloalkyl, 4-tetrahydropyranyl and 4-piperidinyl; R3 is hydrogen or (C1-C6)alkyl; and Y is a substituent on any of the carbon atoms of the phenyl ring capable of supporting an additional bond, independently selected from hydrogen, fluoro, chloro, trifluoromethyl, (C1-C6)alkoxy, trifluoromethoxy, difluoromethoxy and (C1-C6)alkyl. The said compounds are useful in the treatment of arthritis or cancer and other diseases involving selective inhibition of matrix metalloproteinase-13.
Patent TW-399211-B (TW)
Title: The multiple stage sensor device applied to flash memory
Inventor: TZENG HUAN-CHIOU
IPC: H01L21/02
Filed: 1998-08-14
Granted: 2000-07-21
Abstract: This invention discovers a kind of multi-step sensor device applied to flash memory, and its related key-in and the approach of reading data. Reading a memory cell from a main memory cell will produce a sensing current to the sensor amplifier, and compare with the permanent current reserving in the reference memory cell array to get the data stored in this memory cell. The device and method of the present invention can read the multi bit data in the memory cell in once to save a lot of reading time.
Patent TW-424322-B (TW)
Title: Method of producing duplicate-cylindrical stack capacitor and structure thereof
Inventor: HUANG GUO-CHIN
IPC: H01L27/108
Filed: 1998-09-11
Granted: 2001-03-01
Abstract: The present invention discloses a method of producing a duplicate-cylindrical stack capacitor and a structure thereof. When a duplicate-cylindrical stack capacitor is used to produce a lower layer electrode structure, the problems associated with an excessive indent of the polysilicon plug and excessive error of misalignment, causing an excessive etching of the oxide layer, and subsequently causing a poor contact of the electric elements and lowering of the production yield, can be solved. Meanwhile, the surface area of the lower layer electrode of the capacitor can be effectively increased, thereby increasing the capacitance of the capacitor.
Patent TW-515932-B (TW)
Title: Method of manufacturing microstructure bodies
Inventor: REINECKE HOLGER
IPC: G03F7/039
Filed: 1998-09-17
Granted: 2003-01-01
Abstract: For the manufacture of microstructures by the LIGA method, plastic coating are deep-irradiated in a patternwise matter with X-rays. The regions of the plastic coating which regions are rendered (or which remain) soluble are selectively dissolved by a developer. Known plastics entail high costs of irradiation. According to the inventive method, light-hardening epoxy coating are employed which need shorter irradiation times than the known plastics. The resulting microstructures can have high aspect ratios, and the developed structures can be produced with greater structure depths while being free of defects and faults. Structural precision is in the submicron range. The invention allows deep microstructures of very high quality to be produced with substantially lower irradiation expense and low overall cost.
Patent TW-407351-B (TW)
Title: Integrated circuit board combining external contact zones and an antenna, and process for manufacturing such a board
Inventor: LAUNAY FRANCOIS
IPC: H01L23/12
Filed: 1998-10-06
Granted: 2000-10-01
Abstract: Integrated circuit board combining external contact zones and an antenna to receive data transmitted by a terminal, and process for manufacturing such a board. The integrated circuit board in accordance with the invention comprises a single integrated circuit connected both to an antenna (6) by connection terminals (7) and to external contact zones (8) by other connection terminals (9); the antenna (6) is arranged between a support (2) and a strip (3); the above-mentioned connection terminals (7, 9) are arranged opposite the corresponding connection ends of the integrated circuit and are respectively connected to them; the integrated circuit is arranged by a process know by the name ""flip-chip"" in a cavity in which the connection terminals of the antenna and those of the external contact zones are accessible. The board in accordance with the invention may by used both with a reader connected to the external contact zones or with a terminal transmitting data without contacts, by means of the antenna.
Patent TW-396322-B (TW)
Title: Method and system for supplying a custom software image to a computer system
Inventor: COLLIGAN TOM
IPC: G06F21/10
Filed: 1998-10-27
Granted: 2000-07-01
Abstract: A method and system for supplying a software image to a computer system utilize a custom-programmed compact disk (CD) ROM that is configured for a specified individual computer system and constrained to be downloaded to and operable on only the specified individual computer system. The method and system further utilize an installation procedure for restoring the specified computer system to the software state that the computer was in at the time the computer left the factory after initial configuration and downloading. The custom-programmed CD ROM 106 is delivered to a customer in combination with a bootable flexible diskette 108, and an instructional technical instruction sheet for usage by the customer to restore the computer system to a ""factory new"" software condition.
Patent TW-451182-B (TW)
Title: Driving method of image to improve the dynamic image profile of display
Inventor: HUANG R-FENG
IPC: G09G3/296
Filed: 1998-11-20
Granted: 2001-08-21
Abstract: A driving method of image to improve the dynamic image profile of display is disclosed, wherein the erase pulse period of the image driving signal is separated mainly in the image display technology of PDP, also, form an a-pair signal by a display electrode and data electrode to form an erase pulse period of separated type. A scanning integrated circuit is included in it, which connects to a plurality of control transistors for achieving the purpose of separating the erase pulse period of said painting driving signal, so that the display quality of PDP can be improved effectively, and avoids the phenomena that some portions of segment become bright suddenly or the image profile is distorted when the dynamic image profile of PDP moves. Furthermore, the requirement of address data memory is reduced to lower the cost of circuit effectively.
Patent TW-458906-B (TW)
Title: Transmission device for a motor vehicle with hybrid motorization comprising controlled coupling of the electric motor
Inventor: GUIGNARD JEAN PIERRE
IPC: B60K6/48
Filed: 1998-12-22
Granted: 2001-10-11
Abstract: The invention relates to a transmission device (10) for a motor vehicle with hybrid motorization, functioning in a thermal mode and/or an electric mode, of the type comprising a first input shaft (38) coupled in rotation with a thermal engine (16) and a second motion output shaft (46) connected in rotation with the input shaft (38) by gearing making it possible to establish different relative speeds of rotation between the two shafts (38, 46), and comprising means of connection in rotation, by gearing, of an electric motor (18) with one of the shafts, characterised in that the means of connection in rotation of the electric motor (18) comprise a controlled coupling device.
Patent TW-480244-B (TW)
Title: Automated guided vehicle system
Inventor: HORI KIKUO
IPC: G05D1/02
Filed: 1999-02-04
Granted: 2002-03-21
Abstract: To accurately recognize the position of an automated guided vehicle by specifying a reflector within a prescribed angle, which is recognized by the scanning of this time, as that similar to previous time from a previous recognition result and obtaining the present position of the automated guided vehicle based on the specified reflector.
Patent TW-I228147-B (TW)
Title: An attenuated Japanese encephalitis virus adapted to Vero cell and a Japanese encephalitis vaccine
Inventor: KIM HYUN-SU
IPC: A61K39/12
Filed: 1999-02-22
Granted: 2005-02-21
Abstract: The present invention relates to an attenuated Japanese encephalitis virus adapted to Vero cell by passages on Vero cell and a Japanese encephalitis vaccine comprising said attenuated virus.
Patent TW-445312-B (TW)
Title: Polybenzazole fiber having high tensile modulus and process of manufacture thereof
Inventor: KITAGAWA TOORU
IPC: D01F6/74
Filed: 1999-04-07
Granted: 2001-07-11
Abstract: A polybenzazole fiber obtained through heat treatment, which has a high tensile modulus of not less than 300 GPa and a tensile strength of not less than 5.0 GPa, said fiber being characterized by an X-ray analysis by a fine structure thereof of at least one of the following (1) and (2): (1) a crystal orientation parameter sin<SP>2</SP>φ of not more than 0.009 as determined by a wide-angle X-ray diffraction method, (2) absence of an equatorial streak, a two-point pattern or a four-point pattern in a small-angle X-ray scattering; and a process of manufacturing a polybenzazole fiber which comprises extruding a dope comprising a polybenzazole polymer and a nonoxidative acid capable of dissolving said polymer, from a spinneret into a non-coagulative gas to give spun filaments, introducing said filaments into a coagulation bath to extract the acid contained in said filaments, neutralizing the filaments, washing the filaments, adjusting a water content of the filaments to not more than 100 %, applying a pretension to the filaments at an optional stage after introduction into a coagulation bath and before heat treatment, and heat treating the filaments at a temperature of not less than 500 DEG C under a certain tension to give the fiber. The polybenzazole fiber of the present invention has a specific fine structure of fiber, as mentioned above, and also has a high tensile strength and a high tensile modulus heretofore unavailable. The inventive polybenzazole fiber can be manufactured at an industrial scale with ease. Thus, the inventive fiber is tremendously effective in expanding the field of possible utilization as an industrial material with high practical advantages.
Patent TW-473548-B (TW)
Title: Dust removal plant for blast furnace gas
Inventor: HEGEMANN KARL-RUDOLF
IPC: B04C5/085
Filed: 1999-04-30
Granted: 2002-01-21
Abstract: The preliminary cleaning stage of a dust removal plant for blast furnace gas is formed by a large cyclone separator (10), which comprises a vertical pressure vassel (14). A gas pipe (12) coming from the blast furnace is connected to an axial feed device (34, 26, 28, 50) at the top end of the pressure vessel (14). The feed device (34, 26, 28, 50) is designed in such a way that it introduces the blast furnace gas in an axial direction into the pressure vessel (14). A swirling device (58) with guide blades (66) is arranged below the axial feed device (34, 26, 28, 50). It causes the blast furnace gas fed axially into the pressure vessel (14) to swirl about the axis (30) of the pressure vessel (14).
Patent TW-410382-B (TW)
Title: Method of manufacturing forming metal oxide semiconductor transistor with raised source/drain
Inventor: YANG GUO-SHI
IPC: H01L21/28
Filed: 1999-06-11
Granted: 2000-11-01
Abstract: The invention relates to a manufacturing method of metal oxide semiconductor transistor that has raised source/drain. The first spacer layer is formed on the sidewall of the gate electrode followed by the formation process of epi-layer. The shallow doping process is then performed on the substrate by using the gate electrode and the first spacer as the mask. The second spacer is formed on the sidewall of gate electrode. The heavy doping process is then proceeded onto the substrate by using the gate electrode, the first spacer and the second spacer as the mask. Since the epi-layer process is performed before the forming the extending structure of source/drain, the high temperature required for the epi-layer formation does not affect the dopant in the extending structure of source/drain. Therefore, redistribution of the dopant in the extending structure of source/drain does not occur.
Patent TW-449961-B (TW)
Title: Active operation-point adjustment for a power amplifier
Inventor: FORSTNER JOHANN-PETER
IPC: H03F1/30
Filed: 1999-06-16
Granted: 2001-08-11
Abstract: An amplifier-circuit includes at least an output-transistor (12), a circuit to compensate the drift of static current and possibly some elements to control the output-transistor, it is characterized in that the circuit to compensate the drift of static current has at least a reference-current-field-effect-transistor (23) with a gate-electrode (22), wherein at least a gate-electrode (22) is arranged in the region of the electrodes of the output-transistor(s) and said reference-current-field-effect-transistor is located on a common chip-area (6, 8) with said output-transistor (12). In addition, said amplifier-circuit can be used in some mobile radio equipment.
Patent TW-410411-B (TW)
Title: Chip scale package and its manufacturing method
Inventor: LIU HERMEN
IPC: H01L21/60
Filed: 1999-06-17
Granted: 2000-11-01
Abstract: The invention provides a chip scale package, which includes a chip, an encapsulating layer formed on the chip; a wire line embedded in the encapsulating layer; and a solder ball arranged on the surface of the encapsulating layer and electrically connected to the top end of the wire line. The chip includes an integrated circuit and a pad arranged thereon and electrically connected to the integrated circuit. The bottom end of the wire line is connected to the pad on the surface of the chip, and the top end thereof is exposed to the surface of the encapsulating layer. The wire line is wire-bonded to the pad of the chip and the solder ball, such that the integrated circuit in the chip can be electrically connected to the outside via the solder ball.
Patent TW-434865-B (TW)
Title: Etching process for reducing the contact resistance in the multi-layer structure
Inventor: YANG JIAN-LUEN
IPC: H01L23/522
Filed: 1999-07-09
Granted: 2001-05-16
Abstract: A method for forming the contact in the multi-layer structure which includes the following steps: providing a substrate, there is a formed metal oxide semiconductor transistor on the upper surface and inside of the substrate, in which the transistor comprises a metal silicide covering thereon and forming a capping layer on the gate of the transistor; then, forming a dielectric and a photoresist on the substrate that the photoresist is used to define the contacts on the active region of the transistor and the gate; being the critical step, directly etching the planarized dielectric uncovered by the photoresist layer; and, using the etchant with high selectivity in the high density plasma etching machine to let the etching process stopped at the capping layer; and, directly etching the capping layer and using the etchant with high selectivity in the high density plasma etching machine to let the etching process stopped at the metal silicide layer.
Patent TW-514605-B (TW)
Title: Information processing apparatus and recording medium with pattern generation programs recorded thereon
Inventor: HASEGAWA SUSUMU
IPC: G06F3/12
Filed: 1999-08-27
Granted: 2002-12-21
Abstract: An information processing apparatus provided with an auxiliary memory device for storing type skeletal shape information indicating skeletal shapes of characters, including symbols and pictorial symbols, and element shape information indicating an outline shape and a skeletal shape of each of constituent elements constituting the characters in advance, and a pattern generator for generating a pattern by changing the element shape information according to the type skeletal shape information, drawing the constituent elements according to a predetermined design corresponding to the changed element shape information, and combining the constituent elements thus drawn. This information processing apparatus is capable of easily generating high-quality patterns, which are colored in various ways according to typeface, by reducing the number of data producing steps and data volume necessary for generating patterns by putting a plurality of colors into each stroke of characters including symbols and pictorial symbols.
Patent TW-477069-B (TW)
Title: High voltage bipolar transistor using recessed isolation structure to increase breakdown voltage
Inventor: TSAI JIUN-LIN
IPC: H01L29/70
Filed: 1999-08-27
Granted: 2002-02-21
Abstract: A kind of bipolar transistor that uses recessed isolation structure to shift breakdown position of device voltage is disclosed in the present invention. The bipolar transistor contains a compressing layer, which is formed on the semiconductor substrate and is used to compress the electric field on its upper surface so as to increase the operation voltage of bipolar transistor. Additionally, the second conducting type semiconductor layer is formed on the compressing layer and the semiconductor substrate. Then, the first conducting type base region is formed inside the second conducting type semiconductor layer; the second conducting type emitter is formed inside the first conducting type base region; and the second conducting type collector is formed inside the second conducting type semiconductor layer. After that, the recessed isolation structure is formed on the second conducting type semiconductor layer, and is adjacent to the first conducting type base region as well the second conducting type collector, respectively, so as to avoid the generation of breakdown in bipolar transistor at the junction between the base region and the second conducting type semiconductor layer.
Patent TW-452781-B (TW)
Title: Recording medium, recording apparatus and recording method
Inventor: SHOJI MAMORU
IPC: G11B7/24
Filed: 1999-09-14
Granted: 2001-09-01
Abstract: Optimum movement of first and last signal pulses based on the data pattern is determined before data recording to record marks in the correct position. A specific pattern signal is read from a disc track and digitized with an appropriate slice level by the digitizing circuit (115). A pulse position offset measuring circuit (120) then measures specific edge intervals in the resulting digital signal. Movement of the first and last pulse by the pulse moving circuit (110) is then set so that the offset between the measured edge interval and a predetermined standard edge interval is ideally zero.
Patent TW-421817-B (TW)
Title: Semiconductor purification apparatus and method
Inventor: ZINMAN JOSEF
IPC: H01L21/00
Filed: 1999-10-04
Granted: 2001-02-11
Abstract: A method for protecting at least one wafer from contamination, the method including the steps of heating the wafer in an apparatus for semiconductor processing having a reaction core, providing a first voltage level to the wafer, and providing a second voltage level lower than the first voltage level, near the reaction core, thereby activating the protection.