Patent GB-1308573-A (GB)
Title: Pulse-code modulator
Inventor: FRUEHAUF W
IPC: H04B14/04
Filed: 1971-04-19
Abstract: 1308573 Nonlinear analog/digital converters 19 April 1971 [3 March 1970(3)] 24328/71 Heading G4H [Also in Division H3] In a non linear analogue/digital converter having an input/output characteristic comprising a plurality of straight line segments (Fig. 1a, not shown) the segment in which the input lies is first determined digitally, the position of the input along the segment then being encoded. In one the input signal is sampled in a sampler (Fig. 3, not shown) and its polarity determined to deliver a sign bit by comparing it in a differential amplifier with earth, the amplifier output also controlling a rectifier (3) so that the sampled signal U S  is either fed direct or via an inverting amplifier to a decision network. The output U in  of the rectifier is compared in differential amplifiers 71-77 (Fig. 5) with voltage levels of U ref /2, U ref /4 ... U ref /64 the resulting amplifier outputs being decoded using NAND gates G1-G6 to provide a 3-bit binary coded signal representing the second third and fourth bits of a digital signal. The amplifier output also control via negators N1- N7 transistors T1-T7 the collectors of which are connected via binary weighted resistances R1-R7 of values R 0 , R 0 /64, R 0 /32 ... R 0 /2 to the inverting input of a differential amplifier 90 to vary its gain. With no output from amplifiers 71-77 all the transistors are saturated and a further transistor T0 is cut off so that the resistors are grounded. When the input is greater than U ref /64 transistor T1 is cut off and consequently TO saturates to connect the resistor R1 to a biasing potential of 2U ref . The other resistances are open circuited when the associated differential amplifier responds. With the amplifier 90 having a high gain its output U out =(1+RO/RS) U in  where R S  is the overall resistance of the grounded resistances in the chain R1-R7. The amplifier output is fed to a fine coder which delivers the fifth, sixth, seventh and eighth bits. In the embodiment of Fig. 7 the input U i  is fed via amplifiers 143, 144, 145 having gains of 1, 4, 16 and samplers 146, 147, 148 to a decision network 104 comprising a plurality of differential amplifiers (Fig. 8, not shown) comparing the amplified signals with earth, +-U ref /2, +-U ref /4, +-U ref  to generate signals on eight leads (A0-A7) representing the segment in which the signal lies. These signals are fed to gating circuit to generate the sign bit and the three most significant bits and to generate signals to control the selection of one of the amplified signals from the samplers 146, 147, 148. The selected signal is rectified in a rectifier 103 (controlled by the sign bit) and then amplified in amplifiers 114, 115, 116 (similar to the amplifier 90 of Fig. 5) having gains of 8, 4, 2 respectively. One of the amplifier outputs is then selected in dependence on the output from the decision network the selected output being fed to a fine analogue/digital coder. As in the embodiment of Fig. 5 one of the output signals (A1) from the decision network controls the switching of one of the resistances in amplifier 114 from ground to a biasing voltage. In a modification of the embodiment of Fig. 7 the input is fed via two parallel amplifiers (243, 245 Fig. 11, not shown) having gains of 1 and 16 respectively to two samplers (246, 248) the outputs of which are connected direct and also via inverting amplifiers to the decision circuit (204) to determine the signals from which the sign bit and the three most significant bits are derived. The four outputs are also fed via a four switch selector (212) controlled by a precoder and controller (205) to an amplifier (206<SP>11</SP>) (similar to the amplifier 90 of Fig. 5) the amplifier output being connected to the fine encoder. In a further modification (Fig. 12) in which all the amplifiers precede the decision circuit sampling occurring either before or after amplification, the input is fed to the non inverting inputs of sixteen operational amplifiers 390<SP>1</SP>-397<SP>1</SP> and 390<SP>11</SP>-397<SP>11</SP> associated with positive and negative amplitude bands respectively. The amplifiers 390<SP>1</SP> and 39011 operating on the lowest bands are connected to fixed weighting resistors R S <SP>1</SP>, R S <SP>11</SP> their magnitudes corresponding to that of the network R 1 -R 7  of Fig. 5 when all branches are grounded. The amplifiers 391<SP>1</SP> 39111 associated with the next band are connected via resistances Rl<SP>1</SP>, R<SP>11</SP> to biasing voltages +2U ref  and -2U ref . The remaining amplifiers are connected to the biasing sources via resistances of progressingly increasing magnitude. The amplifier outputs U 0 <SP>1</SP>-U 7 <SP>1</SP> U 0 <SP>11</SP>-U 7 <SP>11</SP> are compared with a level V ref  in sixteen differential amplifiers the outputs from which are fed via AND gates the control switches X 0 <SP>1</SP>-X 7 <SP>1</SP>, X 0 <SP>11</SP>-X 7 <SP>11</SP> to feed one amplifier output to the fine encoder. The number of amplifiers may be halved by placing a zero comparator and rectifier ahead of the converter switch.