Patent GB-1059372-A (GB)
Title: A circuit arrangement for equalization of distortion in data tramsmission channels
IPC: H04B3/46
Filed: 1963-09-09
Abstract: 1,059,372. Compensating line distortion. TELEFONAKTIEBOLAGET L. M. ERICSSON. Sept. 9, 1963 [Sept. 7, 1962], No. 35575/63. Heading H4R. In a circuit for the equalization of distortion in a transmission channel a number of distortion correcting networks are switched sequentially into the channel under the control of a distortion measuring means until a sufficient number of networks are connected to reduce the distortion below a predetermined value. If the distortion cannot be reduced below the predetermined value with the available networks the distortion measuring means may be arranged to switch to an alternative channel. Fig. 1 is a block diagram of a preferred embodiment in which data signals from a source DS are to be transmitted over a line L via carrier equipment F1, M1, F2, to a receiver which includes distortion correcting networks UN and demodulating equipment M2, F3. Before the start of data transmission a switch S is operated at the transmitter to connect a source of test pulses G1 to the transmitter-modulating equipment for transmission over the line. The test signal is applied to a pulse former P which produces positive and negative levels corresponding respectively to 1's and 0's for an irregular series of pulses. In the filter F1 the pulses are converted to a sine x/x function form and transmitted to the line via modulator M1 and sideband selecting filter F2. At the receiver the carrier is demodulated to recover the pulse signal and the pulses are applied to a distortion measuring apparatus DM. Also applied to the distortion measuring apparatus is a clock pulse obtained from the transmitted signal via units ND and KL. These clock pulses occur in the middle of the digit positions of the received signal and are used to sample the received signal. If the sampled amplitudes are of varying height, corresponding to time delay distortion in the transmission line, a Schmitt trigger STT is operated and pulses from generator PG are gated into the ring counter RR and this causes the distortion correcting networks UN to be inserted one after another in the transmission line. Pulses from generator PG, occur at regular intervals until; either the distortion drops to an acceptable value due to the insertion of a sufficient number of networks UN, when trigger STT resets and a signal is passed back to the transmitter that data transmission may commence; or the maximum number of networks UN have been inserted and the distortion is still above the acceptable limit, when the next pulse from generator PG causes the operation of stage n + 1 of counter RR which transmits a signal back to the transmitter indicating that another line should be selected and -the process of distortion correction repeated. Distortion measuring means, Fig. 2.-The received test signal is fed to the transistor amplifier including transistors T2 and T3 which only amplify for the duration of the clock pulse applied to the base of transistor T1. Pulses modulated according to the amplitude of the received signal are therefore applied to transformer TR2. Transistor T5 is also fed with the clock pulses and causes transistor T4 to gate the amplitude samples on to capacitor C1. The variations in the amplitude samples are fed via capacitor C2 to the amplifying transistors T6 and T7 and hence to the rectifying circuit including transistors T8 and T9. The rectified variations are amplified in transistor T10 and integrated in R18 and C4, the integrated signal being used to operate the Schmitt trigger. The correcting networks comprise bridged-T sections in which the series sections are normally 'shunted and the shunt sections open circuited by relay contacts or electronic switches under the control of the ring counter, Fig. 3 (not shown).