baber/WOPTO huggingface dataset:
Patent JP-2001056499-A (JP)
Title: Finder device
Inventor: INOUE MASATOSHI
IPC: G02B7/02
Filed: 1999-08-19
Abstract: PROBLEM TO BE SOLVED: To provide a finder device constituted so that dust and dirt attached to an optical system arranged near an image forming surface within a finder can be eliminated at an operation time. SOLUTION: This finder device 1 is provided with the photographing optical system 4, a lens frame 3 which holds the optical system 4 and which can be moved in an optical axis direction, finder optical systems 8-11 having an optical axis being different from the optical system 4 and aperture part members adhesive air filters 17 and 18) realizing ventilation corresponding to the change of the pressure of air in the frame 3 occurring by the change of volume in the frame 3 by the movement of the optical system 4. Then, air is injected or sucked into the inside of the finder optical systems through the aperture part members.
Patent JP-H0794821-A (JP)
Title: Semiconductor laser element
Inventor: YANAGISAWA HIRONORI
IPC: H01S5/00
Filed: 1993-09-20
Abstract: PURPOSE:To reduce the influence of steps for the fluctuation of film thickness of ultra-lattice structure by making the ultra-lattice film thickness of multiple quantum barrier structure to be nearly equal to step spacing. CONSTITUTION:A first clad layer 2, an active layer 3 consisting of a multiple quantum well structure where seven layers of first light guide layer and quantum well layer are laminated while sandwiching a quantum well layer and a second light guide layer, a multiple quantum barrier structure 15 where ten cycles are laminated while sandwiching a second clad layer 4, a third clad layer 5, an etching strip layer 6. a fourth clad layer 7, and a buffer layer 8 are grown successively on a substrate 1 where substrate face orientation is inclined by 2 to 55 degrees from (100) face to (011) direction at a temperature of 700 deg.C. A buffer layer 8 and a fourth clad layer 7 are etched to an etching stop layer 6 while leaving a ridge part and a current block layer 9 is buried on it. After that, a contact layer 10 is grown at the ridge part and on the current block layer and metals 11 and 12 for electrode are deposited on the reverse side of the substrate and the upper surface of the contact layer.
Patent JP-H0785737-A (JP)
Title: Manufacture of optical fiber composite overhead earth-wire
Inventor: ISHII YASUHIRO
IPC: H01B11/22
Filed: 1993-09-20
Abstract: PURPOSE:To impart a sufficient margin length to an optical fiber cable so as to remarkably shorten a time required for drawing-in by using a mechanism which can be easily manufactured at a low cost without any large-sized agitator in a method for manufacturing non-fixed type optical fiber composite overheat earth-wire (OPGW). CONSTITUTION:Adapter rolls 11 each having one or plural projections 9 formed at the outer peripheral surface thereof and capable of being bisected by a split surface in the longitudinal direction are fitted to predetermined positions of a pair of rotatable under rolls 10 juxtaposed opposite to each other, to be securely fastened via bolts 12 or the like. Both flanges 8 of a drum 7, around which an OPGW 6 is wound, are mounted on the roll surfaces of the adapter rolls 11. The drum 7 is rotated according to the rotation of the under roll 10 and the adapter rolls 11 integrated with the roll 10 and the flanges 8 are brought into slide-contact with the projections 9 of the adapter rolls 11 so that the drum 7 as a whole is vibrated in the vertical direction.
Patent JP-H0661593-A (JP)
Title: Dense arrangement board
Inventor: MASUDA ISAO
IPC: H05K1/02
Filed: 1992-08-06
Abstract: PURPOSE:To obtain a dense arrangement wiring board, in which the number of boards taken from a large type board is doubled or larger than before by forming V-grooves having a specific depth respectively on both sides of an insulating board. CONSTITUTION:V-shaped grooves 2a...2a are formed between the neighboring unit wiring patterns on the surface of an insulating board 2 while V-shaped grooves 2b...2b are formed on the otherside. Provided that a thickness of the insulating board 2 is A, a depth of the front V-grooves 2a of the insulating board 2 is B, similarly a depth of the rear V-grooves 2b is C, it is to be 0.5<=(B+C)/A<=0.7. When a board is divided these grooves 2a, 2b, the respective unit wiring patterns and one unit of the insulating board corresponding thereto become separated and independent so as to be individual unit wiring boards 6...6. Thereby, the number of unit wiring boards to be taken from a large type board is increased by twice or larger.
Patent JP-H0896521-A (JP)
Title: Device and method for processing signal
Inventor: KIKUCHI TAKAYUKI
IPC: H04N5/92
Filed: 1994-09-28
Abstract: PURPOSE: To eliminate a memory and to reduce the circuit scale by using a readout address when a stored data system is outputted while shuffling as a write address. CONSTITUTION: A rate conversion circuit 105 detects a prescribed sync pattern from inputted bit system data, and recognizes the sync block data and an ID, and performs bit/byte conversion respectively to write the data in an ECC memory 106 according to the ID. Then, the image data to which error correction processing 107 has been performed, are read out in the next track period to be written in a shuffling memory 108. Then, the shuffled data are processed by a high efficiency decoding circuit 111, and the shuffling is released by the shuffling memory 112. In such a case, the read-out address when the data system stored in the memory 108 is outputted while shuffling is used as the write address.
Patent JP-H04114249-A (JP)
Title: Remote channel device
Inventor: NAKAGAWA HIROFUMI
IPC: G06F13/00
Filed: 1990-09-05
Abstract: PURPOSE:To easily inspect a fault processing without fail by providing a means to spuriously prepare a transfer request signal from an input / output device and a means to switch the frequency of generating the transfer request signal. CONSTITUTION:A means 2 is used to designate the internal simulate mode of an input / output operation and to arbitrarily switch speed for transferring data. Therefore, an operation close to actual I/O connection can be realized without a simulator, and a driver and a receiver can be diagnosed by an operation in an external loop mode. Thus, the fault processing is easily inspected without fail by setting or resetting an arbitrary flip-flop during the operation.
Patent JP-H0783337-A (JP)
Title: Ball valve
Inventor: FURUSAWA KATSUHIKO
IPC: F16K5/06
Filed: 1993-09-20
Abstract: PURPOSE:To prevent a seat ring or a valve body from being eroded, by a means at a low cost, due to slide contact with a fluid containing hard particles. CONSTITUTION:Each main unit part 14, 17 of seat rings 5 and a valve unit 4 of a ball valve is constituted of metal, and at least one of internal end surfaces of the seat rings 5, closing surfaces 24 of the valve unit 4 and external peripheral surfaces in both ends of a through hole 13 of the valve unit 4 is constituted of partial ceramic units 16, 18.
Patent JP-S59123699-A (JP)
Inventor: AKAHA BUHEI
IPC: B43K23/08
Filed: 1982-12-28
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0682712-A (JP)
Title: High speed rotating polygon mirror light deflecting device
Inventor: FUNADOKORO HIROYUKI
IPC: G02B26/10
Filed: 1992-09-01
Abstract: PURPOSE:To realize a high speed rotating polygon mirror light deflecting device which is silent, with a low loss, and has excellent characteristic, in a high speed rotating polygon mirror light deflecting device using for a business device, an information device, an optical device, or the like. CONSTITUTION:This high speed rotating polygon mirror light deflecting device is provided with a rotor 12 having a rotary polygon mirror 11, a box body 13 arranged so as to surround the rotor 12 and provided with parts to be opposed to the rotor 12 through narrow gaps 17a, 17b, bearing parts 14a, 14b rotatably supporting the rotor 12 against the box body 13, and a pressure chamber 16 partitioned off with the inner wall of the box body 13, the outer wall of the rotary polygon mirror 11, and the outer wall of the rotor 12. By providing pressure reducing mechanisms 18a, 18b to discharge gas in the pressure chamber 16 formed in the opposing part between the box body 13 and the rotor 12, the pressure in the pressure chamber 16 can be reduced, and the excellent high speed rotating polygon mirror light deflecting device is obtained, in which windy sound and windy loss can be reduced.
Patent JP-S6293411-A (JP)
Title: Lubricating device for connecting rod large end part in two-cycle engine
Inventor: HAKAMATA KYOJI
IPC: F02B75/02
Filed: 1985-10-21
Abstract: PURPOSE:To enable the supply of lubricating oil by communicating between large end bearing parts of crank pins arranged in respective crank chambers of cylinders, in which the explosion timings are different, so as to utilize the pressure difference between the crank chambers, in a multicylinder two-cycle engine. CONSTITUTION:The crank chambers of respective cylinders in a multicylinder two-cycle engine are divided each other by sealing rings 28 which are slidably in contact with the inner surfaces of an engine body 12. Between crank pins 22C, 22D arranged in respective crank chambers 29C, 29D of two cylinders, in which the explosion timings are different, a communicating passage 37 is extendedly provided. Respective ends 38 of the communicating passage 37 are opened in large end bearings parts 26 of the crank pins 22C, 22D, and lubricating oil is forcibly fed from the opening at the end part on a higher pressure crank chamber side to that at the end part on a lower pressure crank chamber side, enabling the lubrication for large end bearing parts 26 without using a lubricating oil pump.
Patent JP-S6294449-A (JP)
Title: Noise insulating material for engine room
Inventor: MATSUSHIMA YUZO
IPC: B60R13/08
Filed: 1985-10-21
Abstract: PURPOSE:To obtain a noise insulating material excellent in noise absorbing and insulating performances by sandwiching a semi-independent foamed material of synthetic resin with the same synthetic resin sheet at both sides and sealing the edges of the material so sandwiched. CONSTITUTION:The subject noise insulating material is so constituted that the layer 2 of a semi-independent foamed material (i.e. material containing about 50% independent foaming) is sandwiched by a surface sheet 1 and a back sheet 3, and the edges of the concerned sandwich construction are sealed for giving monolithic construction. In the manufacture of the aforementioned material, synthetic resin such as vinyl chloride resin is first mixed with a plasticizer, a stabilizer and the like and rolled into a sheet. Then, such resin as mixed with a foaming agent is rolled thereon in a layer form. The material so made is heated to a mold, thereby obtaining double-layer construction comprising the surface sheet 1 and the foamed sheet 2. Thereafter, a similar resin sheet (back sheet) 3 is bonded to the foamed layer 2 via a bonding agent 4 and then the edges thereof are sealed.
Patent JP-2000082148-A (JP)
Title: System for extracting shape feature of object image and system for recognizing image object and device therefor
Inventor: NISHIDA HIROFUMI
IPC: G06T9/20
Filed: 1998-08-04
Abstract: PROBLEM TO BE SOLVED: To extract the shape features of an object image by hierarchically describing the shape features from the outline of the image of an object inputted from an image inputting equipment such as a scanner or a digital camera, for example, the leaf of a plant. SOLUTION: The basic structure of a leaf 1 is constituted of triangular fragments 11-15 jumping to the four directions and a vertex A of each fragment. The leaf can be identified by the structure constituted of the fragments and the shapes of the fragments. A hierarchical procedure is used for a recognition method, and the perspective structure of the outline of the leaf and the rough shapes of the fragments constituting the leaf are captured, and classification is performed, based on obtained featured values. Moreover, the further detailed shapes of the fragements are captured for the kind of a leaf which can not classified in this stage, and classification is performed, based on the obtained featured values.
Patent JP-H04115011-A (JP)
Title: Liquefaction restraining pile, manufacture thereof and plug for liquefaction restraining pile
Inventor: SAIMURA YUKIO
IPC: E02D3/10
Filed: 1990-09-04
Abstract: PURPOSE:To prevent liquefaction caused by external vibration force by providing draining members on the outer peripheral surface of a pile body in the longitudinal direction of the latter, and by fitting plugs each incorporating filters in several holes formed in the pile body in the part making contact with the ground. CONSTITUTION:One or plural draining members 2 are attached to the outer peripheral surface of a pile body 1 so as to drain channels 12 are defined between the pile body 1 and the draining members 2. Then, several holes 3 are formed in a predetermined section facing the ground where liquefaction possible occurs. A through-hole 6 extends axially through each of the holes 3, and a plug 4 incorporating a water-permeable filter 7 is fitted in the through-hole 6. Further, thus obtained liquefaction restraining piles A are installed at predetermined intervals. Thereby it is possible to prevent liquefaction and to improve the ground so that it has a large resistance against earthquake or the like.
Patent JP-S6476247-A (JP)
Title: System for controlling network processing system
Inventor: KUMAMOTO TETSUO
IPC: G06F15/16
Filed: 1987-09-18
Abstract: PURPOSE:To deal with the agency of a processing or the change of a business routine by receiving the transferring of a desired processing program from a host processor with a work station as needed. CONSTITUTION:For example, when a cutform addressing to a chief is issued from a work station 1 a to correspond to a staff A and the chief is absent, turning data to correspond to the said cutform are transferred through the a host processor 2A to a work station LC to correspond to an acting chief. In a station 1C, a processing writing on the data is known and the transferring of a processing program, which is desired at that time, is received from the device 2A. The station 1C executes a processing by the said processing program and writes a processing experience or cutform data as needed. Further, as needed, they are transferred to a work station 1D to correspond to, for example, an accounting staff for example.
Patent JP-H0979943-A (JP)
Title: Clamping device for glass substrate
Inventor: YAMAHARU TAKASHI
IPC: G01M11/00
Filed: 1995-09-12
Abstract: PROBLEM TO BE SOLVED: To prevent the shifting of the optical focus of a clamping device used for a inspection device which inspects glass substrates used for liquid crystal display devices, etc., by eliminating the bending of the substrates. SOLUTION: A substrate 1 is supported by both ends by means of supporting members 2L and 2R and clamping members 3L and 3R. The central part C of the substrate can be maintained at the same height as those of both ends A and B when the absolute value of the supporting angle of the substrate 1 is set at 1/4 of the angle and the direction of the inclination is made opposite when the substrate 1 is supported by some other points than both ends. Practically, an error of about +30% is tolerable to the angle. The clamping members 3L and 3R are respectively fitted to clamp arms 4L and 4R and the arms 4L and 4R are respectively led to rails 5L and 5R and guides 6L and 6R and the vertical angles of the members 3L and 3R are adjusted by means of air cylinders 8L and 8R fitted to base members 7L and 7R. When the supporting angle of the substrate 1 is adjusted in such a way, the light 11 from a white light source 10 and the light 17 from a UV light source 16 can be received by CCD cameras 15 and 19 through a lens 12 and a diaphragm 13 within an accurate focus range, because the substrate 1 is supported at the same height.
Patent JP-S6293671-A (JP)
Title: Low voltage detection circuit
Inventor: SAWA TOSHIHIRO
IPC: G01R29/18
Filed: 1985-10-18
Abstract: PURPOSE:To enhance the accuracy of a detection time and to make it possible to certainly detect phase omission, by digitally detecting low voltage due to power failure, voltage drop and phase omission etc. by the use of a three-phase full-wave signal. CONSTITUTION:The secondary voltage of a control power source transformer 1 is rectified by a diode bridge 2 to be supplied to a stabilized power source. When a three-phase full-wave rectified signal A becomes lower than a signal B of a low voltage detection level due to low voltage or phase omission, a comparator 3 immediately detects this state to output a signal C and, only when a pulse width is a predetermined width or more, a pulse width discriminator 6 outputs a signal C'. Subsequently, a signal E goes to a high level and, at the same time, the output signal of a counter 12 goes to a low level and an OR circuit 11 outputs a signal J for 30ms and the signal J is turned into the ignition signal removing signal of a thyristor. A signal G goes H-level after 256 pulse counting of a clock D and, if the signal C' is again outputted during this time, an AND circuit 9 outputs a low voltage signal I.
Patent JP-S59124092-A (JP)
Title: Memory device
Inventor: MATSUZAKI YASUROU
IPC: G11C8/12
Filed: 1982-12-29
Abstract: PURPOSE:To realize power reduction even in one memory chip by powering on the 2nd-stage decoder selectively through the switch means in the 1st-stage decoder and selecting this 2nd-stage decoder. CONSTITUTION:All address lines of the decoder are connected to the 2nd stage decocer 9b and the optimum number of those address lines are connected selectively to the 1st-stage decoder 9a. Namely, the addresses of the 1st-stage decoder overlap with those of the 2nd-stage decoder. The optimum number of addresses of the 1st-stage decoder depends upon the lowest point 10 of power consumed by the decoders. Consequently, the effect of power reduction is large, and when the number of the 1st-stage decoder inputs is three and the number of the 2nd-stage decoder inputs is eight as to, for example, a programmable ROM, the source current which is 68mA conventionally is reduced to 15mA.
Patent JP-H0870683-A (JP)
Title: Thresher of combine harvester
Inventor: NAKAMURA MASAMI
IPC: A01F12/28
Filed: 1994-09-02
Abstract: PURPOSE: To make the clearance between a threshing cylinder and a receiving net readily controllable using a same receiving net. CONSTITUTION: In this combine harvester arranged with a receiving net 30 on the circumferential side of the lower part of a threshing cylinder 5 in nearly semi-circle, the receiving net 39 is divided into two parts at a semi-circle central part and the lower end parts of these divided nets 30a and 30b are rotatably supported to a rotating supporting point shaft 75 and the upper end parts are supported so as to freely control their movements to the outside direction through position control members 79a and 79b.
Patent JP-H0661737-A (JP)
Title: Low side lobe antenna system
Inventor: SEZAI TOSHIHIRO
IPC: H01Q21/08
Filed: 1992-08-11
Abstract: PURPOSE:To provide an antenna system able to reduce the side lobe without increasing a beam width of the antenna pattern. CONSTITUTION:Two sets of array antennas 1,2 of the same configuration each comprising N-sets of array elements at an element interval (d) are arranged by deviating the center positions so that an angle of a 1st zero point of an array factor depending on a center interval d' is coincident with an angle of a 1st side lobe point of patterns of the array antennas 1, 2. Then, the two sets of the array antennas 1, 2 are coupled in the same phase and excited in common.
Patent JP-H0281246-A (JP)
Title: Serial interface
Inventor: FUKUDA MITSUYOSHI
IPC: H04L29/08
Filed: 1988-09-19
Abstract: PURPOSE:To execute a quick retransfer by detecting a transfer error based on a periodic variation of a transfer clock passing through a receiving system, and outputting a transfer error detecting signal to a hand shake port. CONSTITUTION:A second RS flip-flop FF2 of a system 3 being in a transmission mode is set by a transfer clock generated by a clock generator 34, and reset a little later by an HDSL signal received in a port 38. Accordingly, a Q output of the RS flip-flop FF2 becomes 'H' by a positive edge of the transfer clock irrespective of whether a noise exists or not and a pulse which inverts a normal HDSL signal which becomes 'L' a little later is outputted at every clock. Therefore, a NOR gate G1 outputs 'H' by a noise and an RS flip-flop FF1 is set, and 'L' is outputted steadily to the port 38 through a MOS inverter I3. In such a way, a system 4 detects a transfer error and revokes the previous received data, and can make preparations for a retransfer.
Patent JP-2001058076-A (JP)
Title: Game machine
Inventor: FUKUDA FUMINORI
IPC: A63F7/02
Filed: 1999-08-20
Abstract: PROBLEM TO BE SOLVED: To provide a game machine capable of discriminating and connecting an inspection object device to be the object of an inspection test relating to a game by directly or indirectly participating in a value imparting processing by a main control substrate and a non-inspection object device excluded from the object of the inspection test relating to the game without participating in the value imparting processing by the main control substrate. SOLUTION: In a pachinko machine, while the inspection object devices such as a normal winning switch are connected through inspection object relay substrates to the main control substrate, the non-inspection object devices such as plural lamps 8a-8k are connected through non-inspection object relay substrates 35 and 39 to the main control substrate 25. Also, since the non- inspection object relay substrates 35 and 39 are separated from the inspection object relay substrates, the inspection object devices and the non-inspection object devices are clearly discriminated and connected to a main relay substrate 34 and a sub relay substrate. Thus, the need of searching a communication cable connected to the inspection object device in the inspection test is eliminated and the work of the inspection test is simplified.
Patent JP-H1078515-A (JP)
Title: Optical multiplexer/demultiplexer
Inventor: MOBARA MASAICHI
IPC: G02B6/12
Filed: 1996-09-04
Abstract: PROBLEM TO BE SOLVED: To provide a new optical multiplexer/demultiplexer which has a superior characteristic. SOLUTION: The multiplexer/demultiplexer is provided with first and second waveguides 10a and 10b. A Bragg grating 30a, which has equal refractive index surfaces titled with respect to the optical axis of the waveguide 10b is provided at a prescribed position of the waveguide 10b. Light beams 41, which have a prescribed wavelength and propagate in the waveguide 10b, are reflected by the grating 30a, made incident on the waveguide 10b and propagate in the waveguide 10b. Thus, if the beams 41 having the prescribed wavelength and the beams 42 having the wavelength, that is out of the reflected wavelength band, are made incident to the waveguide 10a, an optical demultiplexing takes place. Moreover, if the beams 41 are made incident on the waveguide 10a and the beams 42 are made incident on the waveguide 10b, an optical multiplexing takes place.