baber/WOPTO huggingface dataset:
Patent TW-343362-B (TW)
Title: Planarization process for integrated circuits
Inventor: CHERN LAI-JUH
IPC: H01L21/31
Filed: 1995-05-12
Granted: 1998-10-21
Abstract: A process for forming a planarized dielectric layer on a semiconductor substrate having a metal conductor pattern thereon, which comprises: forming a semiconductor element and metal conductor pattern on a semiconductor substrate; forming an insulation layer on the metal conductor pattern and other regions of the semiconductor substrate; forming a layer of first spin-on-glass on the insulation layer, the first spin-on-glass being formed by a low, constant spin rate and locally filling the gaps between the metal conductor pattern; baking the first spin-on-glass at a high temperature enabling the outgassing of the first spin-on-glass; forming a layer of second spin-on-glass on the first spin-on-glass, the second spin-on-glass being formed by a high, constant spin rate and completely filling the gaps between the metal conductor pattern; baking the second spin-on-glass at a high temperature converting the second spin-on-glass into an inorganic silicon dioxide thereby completing the planarized dielectric layer.
Patent TW-273608-B (TW)
Title: Chinese character input method on computer systems
Inventor: WU TIEE-SHYONG
IPC: G06F3/00
Filed: 1995-08-24
Granted: 1996-04-01
Abstract: A Chinese character input method utilizes compute host, keyboard, monitor and printer etc. general PC system resources to induce natural rules of Chinese character phonation into recognition logic of initial/final symbol from pronouncing symbol Pinyin. The breakthrough technology with differnt symbols sharing same key method arranges 21 initials, 16 finals and 20 composite finals on 26 English alphabet keys without using translation keys(control and shift keys). It supplies one fast and easy Chinese input method for word processor by letting Chinese character input be in parallel use with English alphabet, number and other symbols on same keyboard.
Patent TW-331002-B (TW)
Title: Coin discriminating apparatus
Inventor: INAGI TOSHIO
IPC: G07F1/02
Filed: 1995-10-13
Granted: 1998-05-01
Abstract: A coin discriminating apparatus, which mainly consists of coin rail formed by rail for supporting diameter orientation and substrate for supporting to discriminating fake coin, comprises of the features: (1) Light-weight discriminating rod supported with fee swing and installed in substrate window, and the front end adjacent to coin trail; (2) Magnet provided on opposite side of said light-weight discriminating rod separated with coin trail for magnetism selection.
Patent TW-375674-B (TW)
Title: Distribution trough junction
Inventor: HAUSCH GAIL W
IPC: B01D3/00
Filed: 1996-01-29
Granted: 1999-12-01
Abstract: A liquid distribution system with improved resistance to leaking is provided by bolting trough members to sump member suing an internal flange formed on the trough members by folding inwards and portions of the side and bottom of the trough and welding the folded-in and portions.
Patent TW-304303-B (TW)
Title: Cost saving for manufacturing planar MOSFET devices
Inventor: FWU-IUAN SHIEH
IPC: H01L27/105
Filed: 1995-11-27
Granted: 1997-05-01
Abstract: A MOSFET device formed on semiconductor chip, which has surface and bottom plane, comprises of the following parts: (1) drain region located near semiconductor bottom plane, formed from first doped conductive impurity; (2) multiple vertical units, each one includes one vertical PN junction region in which there is lower-outer body region doped with second conductive impurity formed on the drain region; (3) the PN junction region further including source region formed on the lower-outer body region by doping first conductive impurity, in the lower-outer body region there forms one channel region extending from the source region to the drain region near the bottom plane; (4) the vertical cell further including one source contact on surface contacting with the source region; (5) multiple expanding gates formed by isolating floating ion material, each one formed on the surface all expands from intersection of the source region and the lower-outer body region in cell to next cell, the gate includes one thin insulating layer to isolate with the vertical cell, the expanded gate is used to apply one voltage to control channel charging state under every gate, and control vertical current from the source contact to the drain region; (6) on the gate and source forming multiple metal contacts, which forms field plate and one equivalent ring on termination region on semiconductor chip, in which there exists multiple floating ion space between the source contact and the gate contact, and between the gate contact and the field plate, the field plate and the equivalent ring, which is overlaid by the expanded metal contact on the expanded gate and the termination region, therefore eliminating passivation layer for isolating floating ion to enter the MOSFET device from the space.
Patent TW-357398-B (TW)
Title: Method and apparatus for solving production suspension time by means of parallel low-pressure sensor
Inventor: ZHANG SHEN-YAN
IPC: H01L21/205
Filed: 1996-07-05
Granted: 1999-05-01
Abstract: A method adjustment of plluted low-pressure sensors, including the step: (a) turning on an on-line valve for transmitting a chamer pressure to a reference sensor, where the on-line valve and the reference sensor are in serial connection and disposed on the route in parallel to the polluted low-pressure sensor; (b) manual adjustment of the polluted sensor until the output reading and the reference sensor reading overlap; and (c) turning off the on-line valve to keep the reference sensor from being exposured in the pollutant in the manufacturing process.
Patent TW-298705-B (TW)
Title: Method of measuring signal noise ratio
Inventor: YANG SHIUH-MING
IPC: H05K3/36
Filed: 1996-07-16
Granted: 1997-02-21
Abstract: A method of measuring signal noise ratio comprises of the following steps: (1) supplying one sine wave testing signal f(t) with frequency fo; (2) starting with t=0 with period Ts as interval, continuously sampling the sine wave testing signal to get one sampled signal f(nTs), in which n=0, 1, 2, ...; (3) comparing the sampled signal on t= nTs and t=(n-1)Ts, and outputting one testing data Data(n), n=1, 2, ..., in which Data(n) is: 1, when f(nTs) >= f((n-1)Ts) 0, otherwise (4) comparing the testing data Data(n) with one test data CD(n) without noise, and recording one number n with different comparison result, in which CD(n) is 1, when 0 < nTs <= 1/(4fo) 0, when 1/(4fo) < nTs <= 3/(4fo) 1, when 3/(4fo) < nTs <= 1/(fo) (5) from the number n resulting in one random signal noise ratio, fetching the minimum random signal noise ration as wanted signal noise ratio.
Patent TW-391008-B (TW)
Title: High voltage level optimization circuit in a non-volatile semiconductor memory device and method therefor
Inventor: LEE SUNG-SOO
IPC: G11C29/50
Filed: 1996-11-28
Granted: 2000-05-21
Abstract: A high voltage level optimization circuit optimizes the time required for erasing and programming operations by optimizing an initial high voltage used for erasing and programming the memory cells. A semiconductor memory device employing the inventive circuit includes an EEPROM in which operations of erasing and programming memory cells and of verifying the erasing and programming operations are performed in sequence; a loop number counter for generating a voltage pumping level control signal, so as to increase an erasing voltage and a program voltage from an initial level step by step, whenever the erasing and programming operations are repeated; a high voltage generator for generating a high voltage which increases step by step in response to the voltage pumping level control signal; and setting means including a plurality of fuses, for supplying trimming signals for varying the initial level to the loop number counter, in response to address signals applied during an operation test mode, and for supplying a setting signal to the loop number counter in response to the address signals, the setting signal being for fixedly setting an optimal initial level for operation time of a mode established during a real operation mode by cutting out selected fuses based on results of the operation test mode.
Patent TW-402812-B (TW)
Title: The read-only memory device of shockly diode structure and its manufacture method
Inventor: WEN RUNG-MAU
IPC: G11C17/06
Filed: 1997-03-27
Granted: 2000-08-21
Abstract: A read-only memory device of shockly diode structure and its manufacture method, which is characterized by using shockly diode structure as the memory unit of the read-only memory to provide the memory with larger current, and defines the contact via as the coding of the read-only memory to replace the tranditional read-only memory which uses the channel transistor as the memory unit and to proceed the coding implantation through the ion implantation to confine the conductive current. And the shockly diode structure is used as the memory unit of the read-only memory of which each memory unit is separated by the insulative layer to reduce the area used by the device and increase the degree of integration.
Patent TW-318914-B (TW)
Title: Programmable computer image processing system
Inventor: FRED WIERINGA
IPC: G06F9/04
Filed: 1997-04-08
Granted: 1997-11-01
Abstract: A programmable computer image processing system comprises of: (1) one computer, which includes one memory used to store program and one processor used to execute program stored in memory; (2) one scanner electrically connected to the computer, which includes: (a) one scanning circuit used to scan one document to generate image signal; (b) one input circuit which includes multiple control keys used to generate corresponding control signals, at least one programmable specified key used to generate one programmable specified signal, and one programmable set key used to generate one programmable set signal; (c) one control circuit used to send image signal generated from the scanning circuit and signal generated from the input circuit to the computer; (3) one image processing program stored in the memory, used to process image signal generated from the scanning circuit based on control signal generated by the control key; (4) one programmable set program stored in memory, used to generate one instruction file of programmable specified key and store it in memory; (5) one instruction execution program stored in the memory, used to execute its instruction file based on programmable specified signal generated from one programmable specified key; (6) one scanner control program stored in the memory, used to control the scanner operation and transmit the signal sent from control circuit of the scanner to corresponding program; in which instruction file of one programmable specified key can generated by the following steps: (a) pressing the programmable set key and sending the generated programmable set signal to the programmable set program in order to start up and generate one instruction file; (b) pressing the programmable specified key and sending the generated programmable specified signal to the programmable set program in order to set the instruction as the one of the programmable specified key; (c) using the multiple control keys to generate multiple control signals in sequence; (d) in sequence storing the multiple control signals into the instruction file; (e) pressing the programmable set key in order to make the programmable set program finish the instruction file and end execution.
Patent TW-455585-B (TW)
Title: Preparation of phthalides
Inventor: MASSONNE KLEMENS
IPC: C07D307/88
Filed: 1997-07-03
Granted: 2001-09-21
Abstract: The disclosure is a process for preparing a phthalide of the general formula I, where R1, R2, R3 and R4 are each independently of the others hydrogen, C1-C4-alkyl or C1-C4-alkoxy, by catalytic hydrogenation of a phthalic anhydride of the general formula II, where R1, R2, R3 and R4 are each as defined above, in a solvent, which comprises using said phthalide I, the reaction product of the catalytic hydrogenation, as solvent.
Patent TW-345688-B (TW)
Title: Electron beam-writing apparatus and method
Inventor: ITO KATUSHI
IPC: G03F7/20
Filed: 1997-08-30
Granted: 1998-11-21
Abstract: An electron beam-writing apparatus comprising: a first beam-shaping aperture means having at least one aperture for electron beam-shaping; and a second beam-shaping aperture means having at least one aperture for further beam-shaping of the electron beam shaped by the first beam-shaping aperture means thereby enabling the desired beam-writing; in which the first and/or second beam-shaping aperture means has an aperture(s) of a shape(s) corresponding to the desired patterns.
Patent TW-367634-B (TW)
Title: Assembly method for high density connector
Inventor: LAI JIN-YI
IPC: H01R43/20
Filed: 1997-11-19
Granted: 1999-08-21
Abstract: The invention provides a kind of assembly method for high density connector especially for a connector with spacer. The method includes the forming, invaginating, the first connecting step and the second connecting step. The main feature is that the forming step is to integrate the conductive terminal of connector and forming mold of forming spacer separately to form several assembly set; employing the assembly set with invaginating step to be fixed on the space of connector; and employing the first and the second connecting steps to be invaginated together to make the conductive terminal, spacer and insulated shell of connector as an integrated object.
Patent TW-432806-B (TW)
Title: Audio decoding device
Inventor: SUEYOSHI MASAHIRO
IPC: H04H20/89
Filed: 1997-12-08
Granted: 2001-05-01
Abstract: An audio decoding device includes a coded information memory section for storing coded audio information; an information transmission section for reading the coded audio information stored at arbitrary position in the coded information memory section; and an audio decoding section for decoding the coded audio information read by the information transmission section and outputting the resultant audio information in accordance with a time axis.
Patent TW-369689-B (TW)
Title: Multi-layer plated lead frame
Inventor: KIM JOONG-DO
IPC: C25D5/26
Filed: 1998-02-04
Granted: 1999-09-11
Abstract: A multi-layered plated lead frame is provided. The lead frame has a structure in which a first precious metal plating layer, an intermediate plating layer and a second precious metal plating layer are sequentially formed on a substrate made of ferroalloy. The lead frame has improvement in all properties such as wire bonding property, anti-corrosion and solderability.
Patent TW-377421-B (TW)
Title: System and method of retrieving information intelligently from web
Inventor: YAN YU-MIN
IPC: G06F9/06
Filed: 1998-02-12
Granted: 1999-12-21
Abstract: A kind of intelligent system for retrieving information from webs is provided, comprising: web browser, web sampling apparatus, web server, web sample storage apparatus, and dynamic data storage apparatus. The web browser is for sending request for web page and displaying the required data in multimedia format; web sampling apparatus is for receiving the requested messages from web browser, retrieving the sample of data format required by the web page and the area sample, screening its contents, and passing the information to web browser; web server is for accepting the web page messages requested and passing them to web sampling apparatus which in turn are passed to web browser after processing; web sample storage apparatus is for storing the web sample and create the area sample of the web page including regularized output macros for screening area samples as output area; dynamic data storage apparatus is for storing the fields of dynamic data in area samples.
Patent TW-416148-B (TW)
Title: A nonvolatile semiconductor memory device and a method of manufacture thereof
Inventor: KOBAYASHI TAKASHI
IPC: H01L21/8247
Filed: 1998-03-03
Granted: 2000-12-21
Abstract: To increase the write/erase current without increasing the low electric field leakage current in nonvolatile semiconductor memory device. The silicon film of the floating gate in contact with the gate insulating film is a amorphous silicon or polycrystalline silicon film. When a polycrystalline silicon film is used, its average thickness is set lower than 8 [nm]. When the floating gate is formed in a multilayer structure, the lowermost silicon film in contact with the gate insulating film uses the above-mentioned silicon film. Compared with a memory device using conventional floating gate electrodes, the memory device of this invention can increase the write/erase current significantly without increasing the low electric field leakage current after application of stresses. This in turn reduces the write/erase time substantially.
Patent TW-362127-B (TW)
Title: An engine
Inventor: SMITH ROGER
IPC: F01C1/36
Filed: 1998-04-10
Granted: 1999-06-21
Abstract: An engine is shown with a main shaft and a pair of rotor pistons mounted on respective rotor piston shafts, the main shaft and the rotor shafts are connected by suitable gearing. The main shaft has a pair of opposed radial cuts or recesses to accommodate the respective rotor pistons, the engine is provided with a spark plug and a fuel injector. As the main shaft rotates and the rotor pistons also rotate within their respective recesses, a pocket of air contained within one of the recesses can be transferred to the exhaust side of the engine while a pocket of exhaust gas in one of the recesses can be transferred to the inlet side. This transfer has been found to reduce the unwanted components of the exhaust submissions from the engine. In alternative embodiments, the engine can be used as a pump, compressor, motor, or the like.
Patent TW-451121-B (TW)
Title: A circuit and method for controlling power and performance based on operating environment
Inventor: JACKSON ROBERT T
IPC: H02J7/00
Filed: 1998-05-02
Granted: 2001-08-21
Abstract: A power control circuit and corresponding technique for controlling the reduction or augmentation of operating frequency and/or supply voltage utilized by an electronic device. Such control is based on the operating environment of the hardware product employing the electronic device by determining whether the hardware product is interconnected to an external source having at least one enhanced cooling mechanism. As a result, the hardware product is able to operate at full frequency and voltage during certain situations and to operate at a reduced frequency and/or voltage during other situations.
Patent TW-395137-B (TW)
Title: Image processing device
Inventor: HIGASHIJIMA KATSUYOSHI
IPC: H04N7/32
Filed: 1998-05-20
Granted: 2000-06-21
Abstract: The picture processor is provided with a conversion unit having a bidirectional conversion function between an analog video signal and digital picture data and a processing unit having a picture data encoding processing function and an encoded data decoding processing function. A data transfer control unit switches the flowing directions of picture data and encoded data in accordance with an encoder/decoder switching signal and a processing control unit switches a transmitting/receiving function for a control signal such as a transmission clock signal related to the encoded data in accordance with a master/slave setting signal.
Patent TW-565602-B (TW)
Title: Electro-conductive composition and electronic equipment using same
Inventor: NIKAIDO DAKASI
IPC: B23K35/02
Filed: 1998-06-08
Granted: 2003-12-11
Abstract: Provided are an electro-conductive composition improved on its wettability and handled with ease and an electronic equipment using the same. The electro-conductive composition comprises: 28 to 45 wt% metallic particles X to form an alloy with a solder at a soldering temperature and to increase a melting point of the solder to a temperature higher than the soldering temperature; 30 to 60 wt% metallic particles Y hard to form an alloy with the solder at the soldering temperature, in which the sum of contents of the metallic particles X and Y is in the range of 75 to 93 wt%; and the rest of a resin.
Patent TW-383526-B (TW)
Title: Automatic paging transfer method between different paging systems and the apparatus thereof
Inventor: CHIOU HUNG-JE
IPC: H04L29/00
Filed: 1998-09-10
Granted: 2000-03-01
Abstract: A kind of automatic paging transfer method between different paging systems and the apparatus thereof which is to intercept the internal codes and message of different frequencies and paging format in the air and apply the amplifying, demodulation and commutation processing; then, the microprocessor will proceed the decoding according to different formats and output to the computer through multi-port so that the computer will compare the input data from multi port with predetermined frequencies and internal codes and transfer the message conformed with the conditions with the specified frequency and internal code and send it to the paging coding workstation. Then, employing the emitter to emit again so that a single pager can receive the emitted messages from different paging systems.
Patent TW-401475-B (TW)
Title: Sound insulating product and method of fabricating such product
Inventor: GROMIER LAURENT
IPC: E04B1/82
Filed: 1998-09-16
Granted: 2000-08-11
Abstract: The present invention concerns a phonic insulation product, intended to be applied to a vertical building wall, and a method of manufacturing said product. The product successively comprises: -a first layer in foam of synthetic material, intended to be placed on the wall to be insulated, -a second layer in a mixture of bitumen, aggregate, and at least one polymer, without a reinforcement, and -a third layer in a primer material, intended to take a wall covering.
Patent TW-386965-B (TW)
Title: Taxi and slope landing sysbology for a helicopter
Inventor: SILDER STEPHEN H JR
IPC: G01C23/00
Filed: 1998-10-23
Granted: 2000-04-11
Abstract: Taxi and slope landing symbology for a helicopter having a main rotor drive shaft and a main hub defining a hub moment, wherein the main rotor drive shaft and the main rotor hub have hub moment limits. The taxi and slope landing symbology comprises a first symbol for providing a symbolic representation of the hub moment limits, and a second symbol for providing  a dynamic symbolic representation of the hub moment, wherein the second symbol is disposed in combination with the first symbol to provide a visual cue of the hub moment relative to the hub moment limits.
Patent TW-405080-B (TW)
Title: Coordinate input apparatus and production thereof
Inventor: WATANABE TAKESHI
IPC: G06F3/041
Filed: 1998-10-26
Granted: 2000-09-11
Abstract: The traditional coordinate input apparatus uses resin series dress layer 27 for preventing the wearing of the thin film 24, while dress layer 27 is resin series; therefore, it is impossible to produce the degree of hardness; by way of using the input composite 28 to rub, the surface of the dress layer 27 could be easily damaged. The coordinate input apparatus of this invention is to use the input composite 7 to push and press the thin film 4 ,and form the glass layer 8 composed by the dry liquid status glass; therefore, the degree of hardness of the glass layer 6 is higher than the traditional resin series dress layer 27, and providing a kind of coordinate input apparatus which could reduce the bruise caused by the rubbing of the input composite 7, and have high merchandise value.