baber/WOPTO huggingface dataset:
Patent JP-H10233484-A (JP)
Title: Method and device for assembling semiconductor device
Inventor: TAKEUCHI MIKIO
IPC: H01L23/48
Filed: 1997-04-01
Abstract: PROBLEM TO BE SOLVED: To automate assembling of semiconductor device without manual operation and assembly a high-quality product with high reproducivility and high productivity, concerning an intelligent power module. SOLUTION: A heating area is provided between an input and a soldering/ adhering part 15 set at the center of a main chamber 10 containing a reductive and low-oxygen atmosphere, and a cooling area is provided between an output and part 15, and further a heating/cooling means and a transfer means are provided thereto, and a spare soldering part 17 and a flux/adhesive coating part 18 are provided to a separation chamber 16 for intaking enclosing resin case separated from the soldering/adhering part.  An assembled body in which a power circuit and a control circuit are mounted to a metallic base plate in advence is preheated on the midway of transferring it to the main chamber, and the enclosing resin case integrated with terminal during transfer is coupled with the circuit assembled body in the soldering/adhering part, and then the outer leading terminal is soldered to the main circuit and control circuit block, and the resin case is adhered to the metallic base plate simultaneously through the same step in this state.
Patent JP-S5512506-A (JP)
Title: Shift register circuit
Inventor: KATOU TOORU
IPC: G11C19/28
Filed: 1978-07-10
Abstract: PURPOSE:To enable to freely set the number of shifts in matching with the respective object, by changing the state of periodical repetition of the address signal given to RAM. CONSTITUTION:The information S1 to be shifted is inputted to RAM 2, which is made alternately to write-in and readout state in a given period by the output signal S2 of the write-in/readout pulse generator 4, and the specified address for RAM 2 is repetitively designated from the address signal generator 5 in the period related to the signal S2. Further, by changing the state of repetition for the designation signal S3, the readout output of RAM 2 is delivered via FF6. As a result, the output of the shift register 1 can perform shifts in the number of addresses of RAM 2.
Patent JP-S60227663-A (JP)
Title: Production of powdery white sauce
Inventor: NISHIZAWA YOSHIHIKO
IPC: A23L23/00
Filed: 1984-04-26
Abstract: PURPOSE:To produce the titled stock capable of cooking instantaneously white sauce by adding water or cow's milk to a raw material therefore, and heating the resultant mixture in a short time, by pressurizing and heat-treating a mixture of wheat flour with a powdered onion of a raw material for white sauce in saturated steam. CONSTITUTION:A mixture of wheat flour with a powdered onion of a raw material for white sauce is pressurized and heat-treated in saturated steam under 1-8kg/cm<2>.G pressure for 5sec-30min, and the powdered onion is prepared by pulverizing dried onion obtained by a method, e.g. hot-air drying or natural drying, usually used for drying vegetables into powder form, or commercially available powdered onion can be directly used. However, a simply fine cut raw onion may be used. The mixing ratio of the wheat flour with the powdered onion may be suitably selected by considering the respective flavors and textures, etc. according to the uses for cooking with the white sauce, etc. Preferably, 0.25- 1.0pt.wt., based on 1pt.wt. wheat flour, powdered onion, is mixed therewith.
Patent JP-H06296316-A (JP)
Title: Floor wiring container
Inventor: URASAKI JUN
IPC: H02G3/38
Filed: 1993-04-09
Abstract: PURPOSE:To precisely perform a wiring operation for a plug socket equipped within a connecting line always from the appropriate direction and to prevent such an erroneous wiring that an electric wire is erroneously led out within a connecting line from a crossing device. CONSTITUTION:A floor wiring container in which passage lines and connecting lines closed to each other are arranged in sections within the main body D of a duct having nearly U-shaped cross-section, the opened upper surface of which is arranged in a floor and opened and closed by a lid is provided with a plurality of stopper plates Cs crossing within the connecting lines Lc1, Lc2 to section the inside of the connecting lines into a plurality of plug socket boxes B1 to B2; B1', B2' and a fixing device A for fixing each of the stopper plates Cs provided within the inner walls of the stopper plates Cs and the connecting lines Lc1, Lc2 so as to be able to adjust a position in the direction of the length, and a plug socket C is provided in at least one of the plural plug socket boxes.
Patent JP-S62237629-A (JP)
Inventor: MIYAMOTO KIYOSHI
IPC: H01H35/00
Filed: 1986-04-09
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H10275316-A (JP)
Title: Magnetic recording and reproducing device
Inventor: KONUMA HIDEYUKI
IPC: G11B5/49
Filed: 1997-04-01
Abstract: PROBLEM TO BE SOLVED: To reduce the number of parts and to simplify the assembling work by obtaining a pressing force to hold the head plate, on which an audio control head is mounted, to a chassis base by deflecting the elastic member, which is integrally formed with the plate, using mounting screws. SOLUTION: In a mounting screw through-hole window 70b of a head plate 70, three segmented sections 70c are interally formed from the plate 70. The sections 70 are projected toward a mounting screw 80 and the tips of the sections 70 are engaged to a head section 80a of the screw 80. The sections 70c are bent and raised so that the tip sections are floated upward so that a screw section 80b of the screw 80 is fastened to the screw hole of a chassis base 100 and engaged to the section 80a of the screw 80. Thus, a spring force is generated to push the plate 70 in the direction of the base 100. The sections 70c are simultaneously punched, bent and raised while the window 70b of the plate 70 is punched.
Patent JP-S5510856-A (JP)
Title: Automatic control device for hydroelectric power station
Inventor: HIRANO KAZUAKI
IPC: H02P9/04
Filed: 1978-07-10
Abstract: PURPOSE: To simplify the adjustment of the opening of the guide vane of the hydraulic turbine and improve the control accuracy of the opening in a hydroelectric generating station by generating the generator effective electric power of maximum efficiency in response to the effective head detection output of the hydroelectric generating station from a function generator, and controlling the opening of the guide vane of the hydraulic turbine in response to the output of the station.  
     CONSTITUTION: An effective head detector 25 produces an effective head signal upon reception of the output signals from upper and lower dam water gauges 21 and 22. A function generator 26 produces an effective generator electric power of maximum efficiency in response to the effective head signal. A deviation electric power detector 27 applies the deviation between the output from the function generator 26 and the output of an effective electric power detector 30 to a servo motor 36 for controlling the guide vane of the hydraulic turbine 37 in a hydroelectric generating station. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S58200529-A (JP)
Title: Plasma processing apparatus
Inventor: KUBONAI KOUICHI
IPC: H01L21/302
Filed: 1982-05-19
Abstract: PURPOSE:To create stable plasma condition by obtaining a control signal by comparing a measured value with setting value of probe and executing feed back control in order to create stable plasma condition. CONSTITUTION:A current plasma potential is measured with a probe, the predetermined control signal is obtained by comparing the current measured value with the setting value required for creating preset ideal plasma condition by a controller 10, interval of electrodes 2, 3 is adjusted by controlling a motor 7 with the signal in order to realize the control for maintaining constant plasma potential and thereby excellent plasma ambient can be sustained. For example, when electrodes 2, 3 are contaminated lowering a plasma potential, the probe 9 detects it and inputs it to the controller 10. The controller compares such detected value with setting value and obtains the specified control value on the basis of the difference between them and then inputs it as the control command signal to the drive control circuit of motor 7. The motor 7 moves upward the shaft 5 as much as the command in accordance with such command signal. Thereby the movable electrode 2 moves approaching the fixed electrode.
Patent JP-S62240090-A (JP)
Inventor: EDOUARUDO UIREMU TEIITOIENSU
IPC: B26B19/14
Filed: 1987-04-06
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000276850-A (JP)
Title: Signal processor
Inventor: OTA HARUO
IPC: G11B20/14
Filed: 1999-03-26
Abstract: PROBLEM TO BE SOLVED: To provide a signal processor with which exact phase synchronism is established and equalization characteristics are not degraded by the competition of phase synchronizing processing and adaptive equalizing processing by generating a clock signal while detecting a phase error from an adaptively equalized signal. SOLUTION: A regenerative signal 1 is adaptively equalized through an A/D converter 17 by an adaptive equalizer 16. Besides, a PLL circuit is composed of the A/D converter 17, the adaptive equalizer 16, a phase error detecting circuit 9, a phase shift circuit 42, a D/A converter 11, a loop filter 12 and a variable frequency oscillating circuit 14 and a clock signal 15 becomes a clock with a phase synchronized to reproduced data. A tap centroid detecting circuit 40 detects a change in the tap centroid of the adaptive equalizer 16 and corresponding to the result, a phase error is appropriately shifted just a little by the phase shift circuit 42 so that equalization characteristic degradation caused by competition can be prevented.
Patent JP-H02291064-A (JP)
Title: Document preparing device
Inventor: KUDO TOMOKO
IPC: G06F17/21
Filed: 1989-03-31
Abstract: PURPOSE:To display time data in accordance with user's designation by storing information, which indicates whether time data should be always displayed or not, into a memory and taking in time data from a clock circuit in accordance with stored contents to display it on a display part. CONSTITUTION:When the clock display mode is set by key input at the time of operation, it is stored and held in a memory 13 by a mode designating part 11. A display control part 14 reads out this clock display mode from the memory 13 to discriminate whether time data should be always displayed or not. When it should be always displayed, the display control part 14 reads out present date, day of a week, time, etc., from a clock managing part 15 and collectively display them on a display part 17 and is returned to the original normal key input state.
Patent JP-H07296477-A (JP)
Title: Front door structure for optical disk device
Inventor: MINAMI SHIGEO
IPC: G11B17/043
Filed: 1994-04-22
Abstract: PURPOSE:To easily perform the opening operation of a front door and the operation of an optical disk cartridge at one side. CONSTITUTION:When an elastic body of a front door holder 23 is pressed at its end by an end surface of an optical disk cartridge, the elastic body is displaced around one end against magnetic force of a permanent magnet and a magnetic material of the front door, and the permanent magnet and the magnetic material are separated from each other, and then the front door is opened by a spring. When the cartridge is inserted into an inserting hole of a front panel 6, a holding member and a guide member are pushed and moved by the cartridge, and a gear provided on a rotary shaft of the front door and another gear are meshed with each other, where the former gear and a third gear are engaged with each other via an elastic member or a one-way clutch, so as to open and close the front door.
Patent JP-S61242057-A (JP)
Title: Manufacture of polycrystalline silicon resistor
Inventor: KUDO NOBORU
IPC: H01L27/04
Filed: 1985-04-19
Abstract: PURPOSE:To prevent the deterioration in element characteristics, and to improve yield by diffusing an impurity in order to lower wiring resistance after forming a wiring pattern. CONSTITUTION:A field oxide film 2 and a gate oxide film 3 are shaped onto an Si substrate 1, and a non-doped polycrystalline silicon layer 4 is formed through a chemical vapor phase growth method. Phosphorus ions are implanted through an ion implantation method, and thermally treated, thus shaping an N-type high-resistance polycrystalline silicon layer. A resist is masked, and the high-resistance polycrystalline silicon layer is etched. Only a resistor 7 is masked with a resist, phosphorus ions are implanted through an ion implantation method, and the resistance of a gate 6 and a wiring 8 is lowered. A source 10 and a drain 11 for an NMOS can be formed simultaneously.
Patent JP-S63249940-A (JP)
Title: Position detector for objective lens of optical pickup
Inventor: WATANABE MITSURU
IPC: G11B7/08
Filed: 1987-04-03
Abstract: PURPOSE:To reduce the number of components, to lower a price comparatively, to miniaturize a device, and to perform position detection with high accuracy, by detecting a laser beam reflected on a reflecting plate provided at a part outside the effective diameter of an objective lens which constitutes an optical pickup, and outputting a signal related to the position of the objective lens. CONSTITUTION:The reflecting plate 18 fixed at a part outside the effective diameter of the objective lens 2 is fixed obliquely in such a way that a certain angle is formed for the incident plane of the objective lens 2. Therefore, since the reflecting plate 18 is also moved according to the movement of the objective lens 2, the incident position of a beams for detecting the incident position of a semiconductor position detecting device 7 is also changed, it is possible to detect the position of the objective lens 2. In such a way, it is not required to provide an optical system to perform the position detection separately, and the position detection with high accuracy can be performed with comparatively simple constitution.
Patent JP-S60228884-A (JP)
Inventor: KOUDA AKIO
IPC: F25D25/02
Filed: 1984-04-27
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S63249982-A (JP)
Title: Magnetic disk device
Inventor: YOSHIKAWA NORIO
IPC: G11B21/16
Filed: 1987-04-07
Abstract: PURPOSE:To fix the rigidity of a flexure head system to satisfactorily record and reproduce information by directly fixing a flexure supporting a magnetic head and a carriage arm, which carries and positions the magnetic head, to each other by adhesion. CONSTITUTION:A flexure 4 is attached to a carriage arm 5, which can be moved in the track direction, for the purpose of reading information in an arbitrary position on a disk medium 1. An attaching face 6 of the flexure 4 and an end part 7 of the carriage arm 5 are directly adhered to each other with an adhesive. Thus, a mount support is unnecessary and the rigidity of the flexure head system is not varied but is approximately fixed to satisfactorily record and reproduce information. An influence of heat hysteresis is lessened between the flexure and the carriage arm even in the case of the variation of temperature in the magnetic disk device because the flexure 4 is directly joined to the carriage arm, thereby improving the head positioning precision.
Patent JP-H11282402-A (JP)
Title: Plasma display driving method and device therefor
Inventor: WATABE KAZUYOSHI
IPC: G09G3/28
Filed: 1998-03-30
Abstract: PROBLEM TO BE SOLVED: To provide a plasma display driving method and the device capable of preventing the degradation of image quality in the case of suppressing power and turning the rate of actually suppressing power consumption to the same degree as a desired suppression rate. SOLUTION: This device is provided with a pattern generation circuit 24 for generating the plural kinds of the discharge number-of-times patterns of one field composed of the discharge number of times for each sub field in a prescribed order for each field corresponding to a suppression rate and a driving waveform generation circuit 26 for generating discharge pulses for each sub field by the discharge number of times indicated by the discharge number-of- times pattern generated in the pattern generation circuit 24.
Patent JP-S57198648-A (JP)
Title: Manufacture of semiconductor device
Inventor: KOUNO HIROMICHI
IPC: H01L21/60
Filed: 1981-06-01
Abstract: PURPOSE:To contrive the fineness of wiring and the improvement of yield by a method wherein the first resist mask is applied and a wiring layer is made by plating with the same thickness as that of the mask or thinner and the second resist mask is applied to provide a projected electrode by plating. CONSTITUTION:Pt wirings 2 exist on an Si substrate 1 formed elements. A photo resist pattern 3 with thicker than planned Au plating thickness or the same thickness is provided by selecting forming condition. After applying Au plating with predetermined thickness, the resist 3 is removed, and the second photo resist pattern 5 is made. At that time, no cracked sections exist at the Au cross section. Therefore, a thin film is acceptable and no pin holes are generated. Next, a projected electrode 6 is provided by Au plating to remove the resist and a semiconductor device is completed. In this composition, a semiconductor device having plating wiring can be made with good yield and high productivity.
Patent JP-H01259146-A (JP)
Title: Manufacture of aluminum alloy plate having excellent heat resistance
Inventor: NISHIKAWA YASUHISA
IPC: C22F1/00
Filed: 1988-04-07
Abstract: PURPOSE:To manufacture an Al alloy plate having excellent strength after high temp. heating treatment such as brazing by subjecting an Al alloy ingot contg. specific amounts of Mn, Si and Fe to homogenizing treatment at a low temp. to rolling, thereafter to rapid heating, to annealing treatment and thereafter to specific amounts of stain introduction working. CONSTITUTION:The molten metal of an Al alloy contg., by weight, 0.8-20% Mn, 0.8-1.5% Si and 0.2-1.0% Fe is cast by a semicontinuous casting method in the use of a water-cooled mold into a long ingot for rolling. The ingot is retained to 430-520 deg.C for 1-15hr, is subjected to homogenizing treatment, is thereafter to hot rolling or cold rolling and is worked into a plate material having desired thickness. After that, the plate material is heated to >=380 deg.C at the heating speed of >=10 deg.C/min, is retained for a short time of <=2min, is rapidly cooled, is subjected to final annealing treatment into the recrystallization structure and is provided with workability. The plate material is then subjected to 0.5-3% strain introduction working by the method of rolling, stretching, etc., according to the change of the thick direction.
Patent JP-H03282889-A (JP)
Title: Graphic data retaining system
Inventor: AIZAWA RYOHEI
IPC: G06T1/00
Filed: 1990-03-30
Abstract: PURPOSE:To convert the magnitude of generated graphic data to a display command being suitable for a display device by holding the information related to logical magnitude of the graphic data given by an instruction from an application program and storing it in a graphic data retaining medium. CONSTITUTION:An application program 1 executes plotting of a graphic, and instructs to generate logical graphic data corresponding to the plotted graphic to a graphic data generating means 2. The graphic data generating means 2 generates the logical graphic data, and delivers it to a graphic data saving means 3. The graphic data retaining means 3 looks at magnitude of the logical graphic data, and saves the logical graphic data in a graphic data retaining medium 4. Subsequently, a graphic data display means 5 is actuated, each record is read out successively from the graphic data retaining medium 4 and the number of apexes of the original logical graphic data and the maximum number of apexes of the graphic data received by a display device 6 being an object are compared, and the graphic data is converted to the graphic data of the display device 6 being the most efficient to the original logical graphic data. In such a way, the data is converted to the graphic data of the display device being the most conformable and efficient to the logical graphic data.
Patent JP-S58199505-A (JP)
Title: Electromagnetic induction apparatus
Inventor: INA TERUO
IPC: H01F27/10
Filed: 1982-05-17
Abstract: PURPOSE:To increase the amount of a cooling medium circulating in an electromagnetic induction apparatus thereby to improve the cooling effect, by positioning a heat exchanger on the upper part of a container to cool the cooling medium, and then introducing the medium into the lower part of the container. CONSTITUTION:A core 1 is wound with a winding 2. These core 1 and winding 2, together with a cooling medium, are contained in a container 3. A heat exchanger 4 is arranged such that, as shown by illustrated arrows, the cooling medium introduced from an inlet piping 4a is allowed to flow through a heat- radiating tube 4b so as to be cooled through heat exchange with the outside air and is then returned to the container 3 from an outlet piping 4c. The heat exchanger 4 is mounted on the upper part of the container 3. The inlet piping 4a of the heat exchanger 4 is communicated with the upper part of the container 3, while the outlet piping 4c is communicated with the lower part of the container 3 through a duct 6 defined by a partition wall 5 and side walls of the container 3.
Patent JP-S57200926-A (JP)
Title: Signal processing circuit
Inventor: SATOU TETSUO
IPC: G11B5/035
Filed: 1981-06-03
Abstract: PURPOSE: To prevent the flat frequency characteristics of a variable gain controlling means from depending upon the deviation of an integrated circuit, by  arranging a filter for determining frequency characteristics on a main path, and  said variable gain controlling means on a side path.  
     CONSTITUTION: A playback signal Vin is transferred to the main path lm-l'm and side path ls-l's of a regenerative equalizing circuit. An amplifier A 1  which has substantially flat frequency characteristics is connected to a buffer circuit BF1 through a low-pass filter LPF for freqency characteristic determination. Output termimals of amplifiers A 21 WA 26  having substantially flat frequency characteristics are connected to a buffer circuit BF2 through electronic switching devices SW 21 WSW 26 . When one of contacts C 1 WC 6  is made, a control circuit ESC closes corresponding one of the devices SW 21 WSW 26 . The signal voltages at the terminal l'm of the main path and the terminal l's of the side path are  added by an analog adder ASC to send an addition output signal Vout to the  2nd terminal. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-S57200784-A (JP)
Title: Vacuum control valve
Inventor: UNNO YOSHIMASA
IPC: B01J3/02
Filed: 1981-06-03
Abstract: PURPOSE:To enable to make a vacuum control valve in small-sized and light weight by a method wherein a part of a member for connecting an etching chamber to an exhaust pump is utilized as a conductance valve. CONSTITUTION:In case the etching chamber 1 is made vacuous for the purpose of purging gases therein, a hollow cylinder 6 is rotated by a drive motor 11 so that the conductance of the cylinder 6 becomes maximum. That is, the piston of a hole 5 in a main valve box 3 comes into exact coincidence with a cutout section of the cylinder 6. Next, a cover 8 of the main valve box 3 is opened and an exhaust air pump 12 is operated for a predetermined period of time to thereby evacuate the etching chamber at a high speed. Thus, a part of the member connecting the etching chamber 1 to the exhaust pump 12 is utilized as the conductance valve to thereby enable the size and weight of the valve to be reduced.