baber/WOPTO huggingface dataset:
Patent TW-438900-B (TW)
Title: High-purity copper sputtering targets and thin films
Inventor: TAKAHASHI KAZUSHIGE
IPC: C23C14/14
Filed: 1998-05-19
Granted: 2001-06-07
Abstract: There is provided copper targets for sputtering capable of forming a deposition film with low electric resistance indispensable for high-speed operation elements and also with excellent thickness uniformity, and such thin copper films. A high-purity copper sputtering target is characterized by comprising up to 0.1 ppm each Na and K, up to 1 ppm each Fe, Ni, Cr, Al, Ca, Mg, up to 5 ppm each carbon and oxygen, up to 1 ppb each U and Th, and, excluding gaseous constituents, more than 99.999% copper. Preferably the average grain size on the sputter surface is 250 mu m or below, with its dispersion within plus or minus 20%. I(111)/I(200) of X-ray diffraction peak intensity on the sputter plane is at least 2.4 with its dispersion within plus or minus 20%.
Patent TW-357062-B (TW)
Title: Composite web forming apparatus and method
Inventor: WILKINSON DONALD ROSS
IPC: A24F47/00
Filed: 1998-06-03
Granted: 1999-05-01
Abstract: A composite smoking articles forming apparatus, inlcuding: a twin-wiring tube splitting machine for spreading alternately from the first and second wiring tube and along a travel route, having a feeding of glass filament of specific width; stacking unit for stacking the rear end of an open first material of the 2 wiring tubes to the front end of the open second wiring of the other wiring tube; and the composite manufacturing device for connection of the stacking device of the wiring material and formation of the composite piece, including a longitudinal cutter for cutting of the first or second wiring material into 2 physically equal wid narrow wiring materials, the first roller system for vertical splitting of the 2 narrow materials, the third wiring tube winding a paper roll, the second roll system for guiding the paper roll to at a position between the 2 narrow wiring materials, having the first and second roller systems the roller for guiding the 2 narrow wiring materials and the paper roll in formatiion 3 plies of composite pieces, making the paper roll be held between the 2 narrow wiring materials.
Patent TW-417397-B (TW)
Title: Rod lens array, and image read apparatus and system using the same
Inventor: NAGATA KENJI
IPC: G02B3/00
Filed: 1998-06-06
Granted: 2001-01-01
Abstract: A rod lens array, used in an image sensor, is configured by sandwiching a plurality of rod lenses with two side plates. Among the two side plates, the one which is on the side of the illumination device is made thinner than the other side plate.
Patent TW-I241188-B (TW)
Title: Sertraline salts and sustained-release dosage forms of sertraline
Inventor: AM ENDE MARY TANYA
IPC: A61K9/22
Filed: 1998-06-25
Granted: 2005-10-11
Abstract: Sustained release dosage forms of sertraline which release sertraline at a rate between 1 mgA/hr and 40 mgA/hr. The dosage forms may exhibit an initial delay period during which sertraline is released at a rate less than 1 mgA/hr. The present invention is further directed to an acetate salt, an L-lactate salt and an L-aspartate salt of sertraline, pharmaceutical compositions thereof and methods of using that salt for treating various conditions and disorders. The present invention is also directed to processes for preparing sertraline acetate, sertraline L-lactate and sertraline L-aspartate.
Patent TW-382857-B (TW)
Title: Pulse shaper circuit
Inventor: JOHNSON BRET
IPC: H03K5/1252
Filed: 1998-07-09
Granted: 2000-02-21
Abstract: Pulse shaper circuit containing a buffer having an input (E) , an output (A) and two supply connections, containing a controllable first switch (1) connected between one of the supply connections (p) and a first supply potential (v), containing a controllable second switch (2) connected between the other supply voltage connection (N) and a second supply potential (M) , containing a controllable third switch (3) connected between the output of the buffer (9,10) and the first supply potential (v) , containing a controllable fourth switch (4) connected between the output of the buffer (9,10) and the second supply potential (m), and containing a control device for the switches (1, 2, 3, 4) which is connected to the output of the buffer (9,10), produces a first control pulse of a specific (<delta>t1) at the occurrence of first edges of a siganl which is present at the output of the buffer (9, 10), and produces a second control pulse of a specific  duration (<delta>t2) at the occurrence of second edges, the first control pulse changing the first switch (1) over from the on state to the off state and the fourth switch (4) over from the off state to the on state, and the second control pulse changing the second switch (2) over from the on state to the off state and the third switch (3) over from the off state to the on state.
Patent TW-561191-B (TW)
Title: Chloride assisted hydrometallurgical extraction of metal from sulphide or laterite ores
Inventor: JONES DAVID L
IPC: C22B3/26
Filed: 1998-08-13
Granted: 2003-11-11
Abstract: A process for the extraction of metal from an ore or concentrate which contains nickel and/or cobalt values and other metals, comprises subjecting the ore or concentrate to acid leaching under pressure at pH <= 2 to obtain a liquor containing nickel and/or cobalt values, subjecting the liquor to a first precipitation stage at pH of about 5 to 6 to produce a solid containing non nickel and non cobalt metals and a resultant solution containing the nickel and/or cobalt values and subjecting the resultant solution to a second precipitation stage at a pH of about 7 to 8 to produce a solid containing nickel and/or cobalt.
Patent TW-368602-B (TW)
Title: Floating spring probe wireless test fixture
Inventor: VAN LOAN DAVID R
IPC: G01R31/02
Filed: 1998-09-10
Granted: 1999-09-01
Abstract: A test fixture for a printed circuit board having a pattern of test probes and a fixed probe plate and a top plate adapted for movement toward and away from the probe plate. The probe plate and the top plate have selected patterns of holes for passage of the test probes through the probe plate and the top plate for contacting test points on the printed circuit board which is supported at one end of the test fixture. A probe retention sheet is positioned below the probe plate in an area of the test pins so that the test probes that extend through the probe plate also extends through the probe retention sheet, the probe retention sheet includes a preformed pattern of openings which are undersized with respect to an outside diameter of the test probes which extend through the pin retention sheet so that the retention sheet naturally applies a compression force around a circumference of the test probes extending through the sheet at a level sufficient to retain the test probes within the test fixture.
Patent TW-392327-B (TW)
Title: Protection circuit layout and manufacturing method thereof
Inventor: SHIAU JR-YUAN
IPC: H01L23/58
Filed: 1998-10-03
Granted: 2000-06-01
Abstract: A kind of protection circuit layout and manufacturing method thereof comprising characteristics as follows: 1. completing the circuit connected with protection diode at the same time of defining gates and the ion doping step is conducted after the connection with gates between active area and protection diodes; 2. the excess charge of first type MOS can be grounded through the first type doping area/first type well/first type substrate and the excess charge of second type MOS can be grounded through the second type doping area/second type well/second type substrate.
Patent TW-393725-B (TW)
Title: Reproduction method of the alignment mark in the shallow trench isolation process
Inventor: JU JR-SHIUN
IPC: H01L21/762
Filed: 1998-10-22
Granted: 2000-06-11
Abstract: A reproduction method of the alignment mark in the shallow trench isolation process is introduced. After forming a mask pattern on the substrate, a top cover layer is formed on the mask-made concave above the substrate alignment mark and substrate is etched to make trenches. Then, an insulated layer with sufficient thickness to cover the trench is formed on the substrate. By means of the chemical mechanical polishing and the insulated layer is flattened until the mask layer is exposed except the concaves. Top cover layer, mask layer, and pad oxide layer are removed in sequence, and an isolation area in the trench is formed and reproduce the substrate alignment mark simultaneously.
Patent TW-506204-B (TW)
Title: Combined header parameter table for ATM node
Inventor: PETERSEN LARS-GORAN
IPC: H04L12/56
Filed: 1998-12-16
Granted: 2002-10-11
Abstract: Within an ATM node, a cell handling unit (CHU) receives incoming ATM cells from an ATM switch and provides outgoing ATM cells back to the ATM switch. The cell handling unit consults a combined or consolidated table to obtain ATM parameters (e.g., VCI) for use in headers of outgoing ATM cells. The combined table can be utilized both for ATM cells with AAL2 protocol and ATM cells of a second type AAL protocol. The second type AAL protocol is preferably AAL2 prime, which requires that AAL2 packets carried in the ATM cell payload be whole packets and that the ATM payload not have an AAL2-type start field. The combined table is structured to have plural intervals, including a first interval for AAL2 protocol connections and plural other intervals for the second type AAL protocol connections. Each row for the AAL2 protocol interval associates (1) a unique incoming VCI value; (2) an output link value; (3) an outging VCI value; and (4) an offset value. The offset value points to the one of the plural intervals for the second AAL protocol connection. Each of the rows for the table intervals for the second AAL protocol connections associates (1) an incoming VCI value; (2) a channel identifier (CID); (3) an output link value; and (4) an ATM parameter for use in an ATM header of an outgiong ATM cell.
Patent TW-409388-B (TW)
Title: Manufacture method of metal plug
Inventor: BAI GUAN-DE
IPC: H01L23/522
Filed: 1998-12-30
Granted: 2000-10-21
Abstract: There is disclosed a manufacture method of metal plug and, more especially, a manufacture method of avoiding generating voids in the metal plug. Said method utilizes the chemical mechanical polishing method to remove the overhang of the barrier layer on the upper terminal of the via or the contact. Alternatively, the method utilizes the sputtering etch method to reduce the overhang produced by the titanium metal layer, or utilizes the sputtering deposition method to reduce the overhang produced by the titanium nitride layer to increase the hole-filling ability of the tungsten metal and reduce the generation of voids.
Patent TW-425773-B (TW)
Title: A method for encoding/decoding multiword information by wordwise interleaving and error protection, a device for encoding and/or decoding such information, and a carrier provided with such information
Inventor: TOLHUIZEN LUDOVICUS MARINUS GE
IPC: H03M13/15
Filed: 1999-01-28
Granted: 2001-03-11
Abstract: A method for encoding multiword information by wordwise interleaving and error protection, with error locative clues derived from high protectivity words and directed to low protectivity words, a method for decoding such information, a device for encoding and/or decoding such information, and a carrier provided with such information. Multiword information is encoded as based on multibit symbols in relative contiguity with respect to a medium, whilst providing wordwise interleaving and wordwise error protection code facilities. This may provide error locative clues across multiword groups, that originate in high protectivity clue words and are directed to low protectivity target words. Further, the clue words may have a first uniform size and be interspersed in a first uniform manner. The target words may have a second uniform size and be interspersed in a second uniform manner. In particular, the organization may be applied for use with optical storage.
Patent TW-442949-B (TW)
Title: MOS-Transistor, and its production method
Inventor: HOFMANN FRANZ
IPC: H01L27/115
Filed: 1999-02-03
Granted: 2001-06-23
Abstract: In a semiconductor-substrate (41) is arranged a first source-/drain-regon (471), a second source-/drain-region (472) and a trench (44) that is arranged between these two regions. The surface of the trench (44) is provided with a gate-dielectric (45). In said trench (44) is arranged a gate-electrode (46), its extension in the direction of the depth of said trench (44) is maximally equal to the depth of said trench (44). Gate-dielectric (45) and gate-electrode (46) are embedded in said trench (44), so that the MOS-transistor as an embedded MOS-transistor is particularly suitable for EEPROM-arrangement.
Patent TW-515797-B (TW)
Title: Process for synthesizing substituted 2-benzo[b]thiophenecarboxylic acids and salts thereof
Inventor: BROUWER WALTER GERHARD
IPC: C07D333/70
Filed: 1999-03-20
Granted: 2003-01-01
Abstract: A process for the preparation of a substituted 2-benzo[b]thiophenecarboxylic acid compound or an alkali metal salt thereof, which comprises reacting a halobenzoyl derivative with mercaptoacetic acid in the presence of an alkali metal hydroxide and water. Substituted 2-benzo[b]thiophenecarboxylic acid compounds and alkali metal salts thereof are useful as intermediates for pharmaceuticals, agricultural chemicals, material preservatives, and the like.
Patent TW-470999-B (TW)
Title: System and method of manufacturing semicustom integrated circuits using reticle primitives and interconnect reticles
Inventor: ADAMS THOMAS EVANS
IPC: G03F1/08
Filed: 1999-03-25
Granted: 2002-01-01
Abstract: A system for, and method of, manufacturing an integrated circuit (IC) and as IC manufactured by the method. In one embodiment, the system includes: (1) a library of reticle primitives, at least two of the reticle primitives containing patterns corresponding to circuit modules to be contained in the IC, (2) an interconnect reticle containing patterns corresponding to interconnecting conductors for electrically coupling the circuit modules and (3) lithographic equipment that employs the at least tow of the reticle primitives and the interconnect reticle to create a lithograph of the circuit modules and the interconnecting conductors.
Patent TW-417295-B (TW)
Title: High performance SRAM polysilicon resistor and its manufacture method
Inventor: YANG CHING-NAN
IPC: H01L27/11
Filed: 1999-05-31
Granted: 2001-01-01
Abstract: This invention relates to a SRAM structure and its manufacture method. The polysilicon resistor is made by forming a contact hole to the buried region, and the contact hole has inner oxide wall and is filled with the P-doped polysilicon. This feature makes it differ to traditional structure of polysilicon resistor. Especially the polysilicon resistor uses the P-doped polysilicon to couple the node (another N- doped polysilicon) through the oxide. So when one of the polysilicon resistors is positively biased, a depletion region will be generated. As a result, the standby current is greatly reduced without influencing the data sustentation current so as to achieve the power saving purpose.
Patent TW-447084-B (TW)
Title: Method for manufacturing deep sub-micron CMOSFETs
Inventor: WU SHIE-LIN
IPC: H01L21/8238
Filed: 1999-07-09
Granted: 2001-07-21
Abstract: The present invention discloses a method for manufacturing deep sub-micron CMOSFETs. With the use of nitrified gate oxide layer and stacked amorphous-Si layer, the boron punch-through effect can be depressed. The present invention further provides two different processes to form the nitrified gate oxide layer. The first one comprises forming a pad oxide layer and implanting nitrogen ions on the surface of the substrate; next, removing the pad oxide layer; then, using a thermal oxidization process to form nitrogen-contained oxide layer on the surface of the substrate, thereby forming the nitrified gate oxide layer. The other one comprises forming a gate oxide layer on the surface of the substrate, and placing the substrate in an nitride-contained plasma environment to nitrify the gate oxide layer; after forming the nitrified gate oxide layer, stacking an amorphous-Si layer thereon, and defining a gate structure; and finally using the conventional semiconductor process to form the source/drain/gate structure to thereby complete the manufacture of the MOSFET.
Patent TW-429578-B (TW)
Title: Damascene processing
Inventor: SHIAU SHI-MAU
IPC: H01L23/522
Filed: 1999-08-03
Granted: 2001-04-11
Abstract: A damascene processing which includes the following steps: firstly, providing a substrate structure; next, forming an opening in the substrate structure; and, forming a metal plug in the opening; then, back-etching the metal plug to reduce the thickness of metal plug; forming a conformal TiN layer on the substrate structure in which the TiN layer has a recess on the opening; then, forming a solidified spin-on-glass on the TiN layer to fill up the recess; and, using the spin-on-glass as a mask to etch the spin-on-glass to substantially remove the TiN layer outside the opening.
Patent TW-466322-B (TW)
Title: Energy regeneration system of a gasification furnace
Inventor: JANG LI-FU
IPC: F23K5/00
Filed: 1999-10-04
Granted: 2001-12-01
Abstract: The present invention is related to a manufacturing method of energy regeneration system of a gasification furnace, which mainly includes a special made energy source of primary furnace to generate gasification energy by a heating system controlled by an automatic heating switch and to store the energy in the special made energy source of primary furnace. The energy regeneration system of gasification furnace absorbs residual heat in surroundings to generate gasification energy and store it in the energy source of primary furnace when the furnace is connected externally and used. When the energy source of the primary furnace reaches to a certain level of energy, the heating system will stop heating and the energy regeneration system of the gasification furnace will operate itself until the regenerated energy is insufficient, hence starting the heating system. Therefore, the energy regeneration system of gasification is obviously helpful to the energy regeneration.
Patent TW-479219-B (TW)
Title: Decoding keys, substitution data patterns, substitution flags or any other information needed to recover the original information is assembled with the modified information in a form that does not equal the forbidden data pattern
Inventor: VERNON STEPHEN DECKER
IPC: H04N19/89
Filed: 1999-10-19
Granted: 2002-03-11
Abstract: Avoiding forbidden data patterns in coded audio data. Any of several information processing techniques maybe used in various information storage and transmission applications to prevent the occurrence of certain ""forbidden"" bit patterns. According to an encoding technique, a reversible coding process is used to generate an encoded representation of an information stream that cannot contain any forbidden data patterns. This may be accomplished by partitioning the information stream into segments and encoding each segment according to a respective encoding key that is selected such that the results of the coding process cannot contain a forbidden data pattern. According to one substitution technique, all occurrences of forbidden data patterns are replaced with permissible data patterns that do not otherwise occur in the information stream. This may be accomplished by partitioning the information stream into segments, identifying an unused data pattern in a respective segment, and carrying out the replacement of all occurrences of the forbidden data pattern in that segment. According to another substitution technique, all occurrences of a forbidden data pattern are replaced by any permissible data pattern. This may be accomplished by partitioning the information stream into segments, identifying occurrences of the substitution data pattern and the forbidden data pattern in a respective segment, constructing a flag for each occurrence, and replacing all occurrences of the forbidden data pattern in that segment with the substitution data pattern.
Patent TW-527356-B (TW)
Title: Tricyclic compounds for preparing (5R)-(methylamino)-5,6-dihydro-4H-imidazo[4,5,1-ij]quinolin-2(1H)-one and intermediates thereof
Inventor: WUTS PETER GUILLAUME MARIE
IPC: C07D471/06
Filed: 2000-02-03
Granted: 2003-04-11
Abstract: The present invention is an improved prosess to prepare (5R)-(methylamino)-5,6-dihydro-4H-imidazo[4,5,1-ij]quinolin-2(1H)-one the compound of formula (VII). A tricyclic compound of formula (II) where RN is phenyl-CH2-.
Patent TW-511377-B (TW)
Title: Method and apparatus for access control of pre-encrypted on-demand television services
Inventor: SAFADI REEM
IPC: H04N7/16
Filed: 2000-04-19
Granted: 2002-11-21
Abstract: A method and apparatus for providing access control of pre-encrypted on-demand television content. Existing encryption capability for cable television services or the like is extended to handle pre-encrypted content from a server (12) that is requested on demand by a viewer at a user terminal (20). Alternatively, the pre-encrypted content (provided, e.g., by an encryption device (14) can be broadcast or multicast from the server (12) to a group of viewers. The invention is upgradeable to facilitate implementations of entitlement control algorithms that vary in sophistication as the need dictates. Additionally, the method is extensible to enable access control of pre-encrypted content that is independent of the transport protocol used. Such protocols include, for example, MPEG-2 and Internet Protocol (IP) which may also utilize public key cryptography.
Patent TW-468224-B (TW)
Title: Techniques for etching a low capacitance dielectric layer
Inventor: MOREY IAN J
IPC: H01L21/3065
Filed: 2000-05-02
Granted: 2001-12-11
Abstract: Techniques for etching through a low capacitance dielectric layer in a plasma processing chamber are disclosed. The techniques uses an etch chemistry that includes N2, O2, and a hydrocarbon. By etching the low capacitance dielectric layer with a plasma created out of the etch chemistry, fast etch rates can be obtained while also maintaining profile control and preserving critical dimension of the resultant opening (e.g., via/trench) being etched in the low capacitance layer.
Patent TW-468026-B (TW)
Title: Environmental icebox
Inventor: JIANG GUNG-AN
IPC: F25D3/00
Filed: 2000-05-10
Granted: 2001-12-11
Abstract: This invention relates to a structural design of an environmental icebox, mainly utilizing a cylindrical container to serve as a body for food placement and provided with a lid body capable of being opened/closed to provide a sealing state. The container wall is hollow and vacuumed to obstruct the conduction of cold molecules in air. The lid body is also hollow and vacuumed and is provided with an air valve at proper position to allow easy opening of the lid body and an infrared detector capable of detecting the interior temperature. In use, food is placed in the container, and high-pressure liquid nitrogen is then injected into the container through operations of automatic control system (such as solenoid valves) to freeze the food instantaneously. The container is then vacuumed, and a vacuum pressure meter is used at the same time to detect whether the container is completely airtight, so as to further obstruct the conducting effect of the air molecules for maintaining the freezing effect for the food. This invention is indeed industrial applicable.