Patent GB-1153067-A (GB)
Title: Improvements relating to apparatus for Addressing Cyclical Memories
IPC: G07C3/00
Filed: 1966-09-01
Abstract: 1,153,067. Data processing apparatus. VOGUE INSTRUMENT CORP. 1 Sept., 1966 [2 Sept., 1965], No. 39159/66. Heading G4C. Associated cyclical memories, in which memories the contents are continuously recirculated, may be addressed by comparing data from a selected one of the memories with the contents of a search register, means being provided for generating a signal during each successive cycle whereby the data stored in corresponding locations of the other associated memories may be located. As described, a plurality of machine stations 20 are monitored in cyclical manner and data relating for example to the number of components or pieces produced and the machine operational (up and down) time is transferred for updating purposes to tracks 40, 50 of a magnetic drum store 24 which already stores other more static data in tracks 60, 62 and 64 relating for example to employee number, job number and machine number, each machine being allocated a corresponding portion of each track, the corresponding portions for any one machine having a common address contained in an address track 26. Data from drum 24 may be selected for display at data display 108 or for print-out using output device 118 (e.g. a typewriter) by specifying the address corresponding to the required machine station or by specifying the contents of a specified one of the tracks 60, 62, 64, 40 or 50. Thus, for example, a required job number may be searched for in track 62 and the piece count corresponding thereto in track 50 printed-out or displayed. In such operation, the word to be searched for is entered via a keyboard 68 into a search register 72 (from where it is displayed at 73) and the relevant track is selected by unit 76 of the console 70. Data from the selected track is then passed in sequence through a data (shift) register where it is compared in comparator 86 with the search word in register 72. Upon obtaining a match, the address then stored in address extension register 96 (coupled to main address register 30) is held by signal GOS so as to produce selected address signals (SAD) at that time during each subsequent drum cycle when the required data is available for read-out as main store output (MSO) from unit 80 which is continuously fed with address words (AUA), piece count words (PAA), time count words (TAA) and any one of the static data words (SDO) from tracks 60, 62 and 64 as selected by track select unit 76 coupled to gated read/ write amplifier 66. If the word searched for is not present, an indicator on console 70 is lit. In cases where a word may occur more than once (e.g. job Nos.) a repeat search may be made. Data may be entered by first entering a word associated with the word to be entered into search register 72 and then, after this word has been found, entering the word to be entered into data register 102 from where it is transferred as main store input signals MSI to the drum 24. An automatic output mode is provided whereby all the contents of each address in turn is fed to the output device 118. A second similar drum may be provided on to which second drum 24 may be copied for subsequent print-out whilst new data is being assembled on drum 24. Output buffer tracks may be provided on the drum 24. The arrangement of data on the drum 24 is shown in Fig. 2, each track accommodating 100 seven binary-coded-decimal-digit words. Each digit comprises four binary bits and one bit for parity. The five words (employee No. &c.) relating to any one machine comprise a message, the common addresses of which are stored as a sequence of two digit numbers from 00-99 in a separate address track in staggered: relation to the related data messages as shown. Two or more drums may be included in a single operating cycle if more than 100 machine stations are to be monitored. The logic circuitry is shown in detail in Figs. 3-15 (not shown), Fig. 7, relating to decimal to BCD and parallel to serial conversions, and Fig. 8 disclosing a reversible 35-stage shift register.