Patent GB-1363048-A (GB)
Title: Pulse tuning control system for radio broadcast receivers
IPC: H01H36/00
Filed: 1973-03-09
Abstract: 1363048 Selective signalling BENDIX CORP 9 March 1973 [7 April 1972] 11522/73 Heading G4H [Also in Division H3] In a pulse tuning control system for a radio receiver comprising a source of clock pulses 12, a binary counter 10 for generating a binary number related to the number of clock pulses applied to the counter, operator controlled gating means 14, 16, 18, 20 for applying the clock pulses to the counter and at least one phase locked loop 35, 37 including a divide by N divider 38, 40 for generating a plurality of local oscillator frequencies as N varies, the radio receiver is tunable across a broadcast band as N varies to vary the local oscillator frequency generated and code converting means 30 is provided for establishing the value of N in accordance with the binary number generated by the counter 10. By operating a switch 20 to close contacts 22, 22a and 24, 24a or 22, 22b and 24, 24b pulses are applied from a pulse generator 12 to increase or decrease the count in a seven stage counter 10. The output from the counter 10 selects by a code converter 30 the division ratio N or N1 of a divider 38 or 40 which selects the required local oscillator frequency at 35a or 37a from a voltage controlled oscillator 46 or 48 in a phase locked loop 35 or 37 depending on the AM or FM band selected by a band switch 68. The band switch 68 is coupled to a switch 11 to change the range of count of the counter 10 for the AM and FM band. The output frequencies of the VCO 46 and 48 change in 10 KHz and 200 KHz steps. The phase locked loops are disclosed in more detail (Fig. 2, not shown) and tuning voltages from the phase detectors 42, 44 are applied to varactors associated with the antenna and RF circuits. When a required station has been tuned in switch 22, 24 is released to stop the count. To memorize this, a station setting push-button 110 is pulled to open a gate 102 so that the count contained in the counter 10 is entered into the seven stage memory 104. Now when push-button 110 is pressed gate 106 is opened so that the number stored in the memory 104 is read into the counter 10 and the receiver is then tuned to this preset station. Further memories such as 114 may be provided to similarly obtain preset tuning. To obtain stop on signal tuning seek switch 51 is closed to set a bi-stable flip-flop 50. This opens a gate 16 so that clock pulses from 12 are fed to the counter 10 to advance the tuning in steps. When a station is detected by the receiver detector 72, the flip-flop 50 is reset to stop the tuning. The output of the counter 10 also feeds via a decoder 73 such as a D/A converter, a station or channel indicator 75 such as a voltmeter or light emitting diodes arranged against a dial scale. The pulse counter 10 may be arranged to count up to the final count and then reverse count down towards the initial count or may immediately go to the initial count. A tuning knob may be provided to apply a signal to the clock pulse generator 12 to alter the pulse repetition frequency such as to give rapid tuning speed for a rapid scan of the band and a slower tuning speed as the desired station is approached. The receiver may be used in an automobile and a capacitor or auxiliary battery may be used to maintain memory integrity when the main battery is removed.  Reference has been directed by the Comptroller to Specification 1,208,849.