Patent TW-301713-B (TW)
Title: Scanning path forming circuit
Inventor: OSAWA TOKUYA
IPC: G01R31/3185
Filed: 1996-05-20
Granted: 1997-04-01
Abstract: A scanning path forming circuit comprises of: (1) one connect circuit; and (2) one control circuit; (3) the connect circuit includes first and second switch circuit, one storage circuit, one input end for the connect circuit, one testing input end for the connect circuit, one output end for the connect circuit, and first and second control end for the connect circuit; (4) fetching first and second control signal of first and second control end independently input to the connect circuit by double value logic, which independently includes first and second logic different to each other;(5) the first switch circuit with one first input end for the first switch circuit, one second input end for the first switch circuit, one output end for the first switch circuit, and one control end for the first switch circuit; (6) the second switch circuit with one second input end for the first switch circuit, one second input end for the second switch circuit, one output end for the second switch circuit, and one control end for the second switch circuit; (7) the storage circuit with input and output end for the storage circuit;(8) control end for the first switch circuit combining to first control end of the connect circuit; (9) first input end for the first switch circuit combining to input end of the connect circuit; (10) when first control signal for the connect circuit is fetched first logic, then first input end for the first switch circuit connects to output end of the first switch circuit; (11) when first control signal for the connect circuit is fetched second logic, then second input end for the first switch circuit connects to output end of the first switch circuit; (12) control end for the second switch circuit combining to second control end of the connect circuit; (13) first input end for the second switch circuit combining to testing control end of the connect circuit; (14) when second control signal for the connect circuit is fetched first logic, then first input end for the second switch circuit connects to output end of the second switch circuit; (15) when second control signal for the connect circuit is fetched second logic, then second input end for the second switch circuit connects to output end of the second switch circuit; (16) output end for first switch circuit connecting to input end of the storage circuit; (17) output end for the storage circuit combining to output end of the connect circuit, and connecting to second input end of the second switch circuit; (18) the control circuit includes first and second control input end for the control circuit, first and second control output end for the control circuit, and one testing end for the control circuit; (19) first and second control input signal for the control circuit and one testing signal for the control circuit independently input to first and second control input end for the control circuit and testing end for the control circuit; and first and second control output signal independently output from first and second control output for the control circuit; (20) fetching first and second control input signal for the control circuit, first and second output signal for the control signal, and testing signal for the control circuit by double value logic; (21) when fetching testing signal for control circuit by one of double value logic, the logic of first and second control output signal for control circuit equal to the logic of second control input signal for the control circuit; (22) when fetching testing signal for control circuit by another one of double value logic, the logic of first control output signal for control circuit equal to the inverse logic of first control input signal for the control circuit, and the logic of second control output signal for control circuit equal to the logic of first control input signal for the control circuit; (23) first control output end for the control circuit connecting to first control end for the connect circuit; and (24) second control output end for the control circuit connecting to second control end for the connect circuit, thereby controlling the connect circuit.