Patent GB-1511148-A (GB)
Title: Automatic electric tuning apparatus
IPC: H03J7/26
Filed: 1975-07-08
Abstract: 1511148 Stop on signal receivers; AFC arrangements SANYO ELECTRIC CO Ltd 8 July 1975 [18 July 1974, 13 Dec 1974] 28735/75 Headings H3Q and H3A A stop on signal receiver has first and second manually selectable modes, in the first mode a control voltage from 47 is applied via A.C. to a voltage controlled reactance device (VC, Fig. 1, not shown) in a tuner and is caused to sweep in a first direction at a slow rate (Fig. 7, not shown) and then in a second direction at a fast rate, in the second mode the opposite occurs and the direction of sweep is reversed when the control voltage reaches maximum and minimum values. By closing switch USW flip flop 33 is set and controls together with flip flop 36 and scanning control circuit 38 gates 41-46 which select a normal discharging circuit 51. This provides an upward frequency scanning tuning voltage (Fig. 7a, not shown) from across a potential memory device MD which has main and auxiliary cathodes MC AC of Ag, an anode A of an Ag-Te alloy and a solid state electrolyte such as RbAg 4 I 5  between cathodes and anode. The scanning voltage is applied to a varicap diode (VC, Fig. 1, not shown) in a tuner 121 and the tuning scan is stopped when a received signal produces a sufficient IF signal level as detected by 30 and when a ratio detector indicates precise tuning as determined a level detector 31 which via gate 32 resets the flip flop 33. Schmitt circuit 39 operates when the scanning voltage AC reaches a lower limit to switch off normal discharging circuit and switch on instantaneous charging circuit 48 and then when the scanning voltage reaches an upper limit operates to switch off the instantaneous charging circuit 48 and reconnect the normal discharging circuit 51 so as to restart an upward tuning scan. These upper and lower limits prevent damage to the potential memory device MD. Downward frequency tuning scan can be selected by switch DSW which in a similar manner controls normal charging and instantaneous discharge circuits 50 and 49 to provide a downward tuning voltage (Fig. 7b, not shown). Switches DSW and USW also enable bidirectional scanning mode (Fig. 7c, not shown). The scanning voltage AC can be connected to a LED frequency display (118, Fig. 1, not shown) which can be disabled during a tuning scan by an output from 12. Also an audio signal circuit (126) can be disabled during a tuning scan by an output from 15. The potential memory device MD can be replaced by a capacitor, The circuit of Fig. 4 can be integrated and is disclosed in detail (Figs. 5A and 5B, not shown). The automatic tuning apparatus can be employed for radio or T.V. receivers. In a temporary stop on signal scan mode (Fig. 7d, not shown) a stop signal d from 13 is connected via a differentiator 62 (Figs. 3 and 5c, not shown) a monostable (63) and a delay circuit (64) to provide a delayed signal (t, Fig. 6, not shown) after a time (T) of the monostable (63) to 16 which reactivates the tuning scan provided a switch 65 is closed. The delay circuit (64) ensures the scan start signal is applied to 16 for sufficient time (t) to continue the scan thereby overriding any stop signal d. The temporary stop signal may be initiated by the change in the audio disable signal when a station is received (Figs. 10 and 11, not shown) the temporary stop signal being provided by a pulse generator transistor (T28) and a differentiation circuit R5, C4 R6. AFC. Any detuning from the station stopped at causes imbalance of a differential amplifier (T3, T4, Fig. 5A, not shown) of the level detector 31 which causes conduction of charging or discharging AFC circuits 60, 61 (T20, T21) to provide fine tuning adjustment of the tuning voltage across the potential memory device MD. If fading of the signal occurs and the IF signal level does not exceed the level of detector 30 a gate 59 prevents the transistors (T20, T21) of the AFC circuits 60, 61 from turning on so as to prevent AFC action. In a modification (Fig. 9, not shown) gates (69, 70) disable AFC discharge and charge circuits 60, 61 during the tuning scan. Also if the AFC voltage operates when a station is received near the upper or lower limits of the band tuned to such that the scanning voltage reaches the maximum or minimum value as detected by detectors (66, 67) a gate (68) is operated to disable the AFC circuits 60, 61 so as to prevent overcharge or discharge destroying the potential memory device MD.