Patent GB-994888-A (GB)
Title: Data handling apparatus
IPC: H03H17/06
Filed: 1961-11-22
Abstract: 994,888. Transistor pulse circuits. SPERRY RAND CORPORATION. Nov. 22, 1961 [Dec. 6, 1960], No. 41790/61. Heading H3T. [Also in Division G4] An arrangement for interpreting a train of signals representing binary data comprises means for inhibiting the passage of non-significant signals which may occur between consecutive signals representing binary digits of the same binary sense. Means may further be provided for varying the length of the inhibiting signals. The arrangement is particularly adapted for interpreting data recorded on a magnetic tape by the " phase modulation " method, the varying length of the inhibiting signal being of use during periods of variable tape speed such as occur during starting. As described, data recorded by the phase modulation method on a tape 10 is read by a head 12 to produce the waveform A, Fig. 2. The waveform A is applied to a differentiation circuit 14 which produces a 90 degree delay. Fig. 2B, the resultant waveform being squared at 16, and differentiated at 17 to produce waveform D. In waveform D, a positive pulse represents "0 " and a negative pulse represents " 1," except that between any pair of like binary digits a pulse such as 20, 22 having no significance is produced. The positive and negative pulses in waveform D are separated at 24 to produce waveforms E, F, Fig. 2, which are applied to individual " and " gates 26, 28 together with an inhibitory waveform H, the inhibitory signals of which are from ¢ to ¥ of a digit period in length and serve to eliminate the non-significant pulses from waveforms E, F, thereby producing correct " 0 " and " 1 " outputs at terminals 34, 36. Production of inhibitory waveform H.-The " 0 " and " 1 " outputs from the gates 26, 28 are combined in an " or " gate 30 to produce a waveform G of " clock " pulses which is applied to a monostable circuit 32 (Fig. 3a, not shown) to produce the inhibitory output waveform H, the duration of the pulses of which is variable. The waveform H is applied to a monostable circuit 38 to produce an output waveform I, Fig. 2, whose pulses are one-third the length of those of H which they follow immediately. The waveform I, together with waveform G of combined outputs " 0 " and " 1," is applied to an " and " gate 40, the waveform I acting as an inhibitory signal so that output pulses J are produced only when the combined pulse time produced by the monostable circuits 32, 38 is less than one digit period. The pulses J are applied to control the length of the pulses produced by the circuits 32, 38. Monostable circuit, Fig. 3a.-The waveform G is applied to the base of a normally conducting transistor 44 which is switched off by a pulse of the G waveform thereby switching on a normally non-conducting transistor 46, the circuit being switched over rapidly in consequence of a feedback connection including a diode 56. When a capacitor 58 has charged to a predetermined level, the circuit 32 returns to its original state. The rate of charge of the capacitor 58 is determined by a transistor 62, to the base of which are applied via a terminal 64 the pulses J. Thus, the output waveform H at terminal 51 is controlled in accordance with the " clock " waveform G. The monostable circuit 38 is generally similar to the circuit 32. In a modification (Fig. 4, not shown) the pulses of the waveform J are produced when the total duration of the pulses produced by the circuits 32, 38 is equal to or greater than one digit time.