baber/WOPTO huggingface dataset:
Patent JP-S6371513-A (JP)
Title: Direct-injection type internal combustion engine
Inventor: ONISHI SHIGERU
IPC: F02B75/12
Filed: 1986-09-12
Abstract: PURPOSE:To raise the rate of air utilization in an engine to upgrade the engine performance by making the fuel injected from a nozzle hole pointing in the direction of a piston axis to impact against an impacting area provided in the central area of a piston. CONSTITUTION:There is a nozzle hole 5 pointing in the direction of an axis besides a plural number of a nozzle hole 4 pointing in the radial direction at the nozzle end 3 of a fuel injection multiple nozzle hole 2. An impacting area 7 is formed in the piston cavity facing the nozzle hole 4 to make the fuel jet from the nozzle hole 5 to impact against this area. The temperature of the impact area 7 which is raised sufficiently by the combustion temperature becomes a high temperature heating surface. The fuel jet injected from the nozzle diffuses due to the impact reaction at the high temperature impact area and, simultaneously, promotes generation of the combustion reaction by the fuel jet making contact with the the high temperature heating surface. This system enables to raise the rate of air utilization in an engine to upgrade the engine performance.
Patent JP-H0556561-A (JP)
Title: Power controller
Inventor: SASAKI TAKASATO
IPC: H02J1/00
Filed: 1991-08-28
Abstract: PURPOSE:To materialize a power controller with redundant power controlling sections by gathering control signals from the plurality of the power controlling sections at a common controlling section and by allowing the common controlling section to output a control signal to a power supply section based on the control signals from the power controlling sections. CONSTITUTION:Control signals from the plurality of power controlling sections 1-1, 1-2,..., 1-n are gathered at a common controlling section 2. The common controlling section 2 outputs a control signal to a power supply section 3 based on the control signals from the power controlling sections 1-1, 1-2,..., 1-n. If at least either one of the power controlling sections 1-1, 1-2,..., 1-n indicates the continuation of operation of the power supply section 3, the common controlling section 2 outputs a continuation signal to indicate the continuation of operation to the power supply section 3. By this method, each power controlling section operates independently and is redundant. Therefore, defects in one power controlling section does not have an effect on the operation of the whole system and thereby a reliability can be increased. What's more, the power controlling sections can be exchanged during operation of a power device.
Patent JP-S59107497-A (JP)
Title: Semiconductor memory containing redundant circuit
Inventor: ENDOU AKIRA
IPC: G06F11/00
Filed: 1982-12-13
Abstract: PURPOSE:To discriminate electrically between a completely nondefective product and a relieved product by providing a detecting circuit for operation of redundant circuit which receives a signal varying within a redundant circuit when it is accessed by a defective address and varies its output. CONSTITUTION:For a detecting circuit 11 for operation of redundant circuit, an MOSFETQ1 is turned on to set a node N1 at a low level when a redundant circuit is working to set an inhibition signal phik at a high level. While the FETQ1 is turned off to set the node N1 at a high level in an inactive mode of the redundant circuit when the signal phik is set at a low level. An output pad 12 connected to the node N1 is connected to an exclusive external pin of a package by wire bonding. Therefore a memory including a defective bit changes the node N1 and the external pin at a low level each with input of a defective address while all bits are successively selected along with change of address. Therefore it is easy to discriminate between a relieved product and a completely nondefective product by observing the external pin from outside.
Patent JP-2000225764-A (JP)
Title: Stencil paper feeder for stencil printer
Inventor: YOSHIDA KENJI
IPC: B41L13/14
Filed: 1999-07-30
Abstract: PROBLEM TO BE SOLVED: To simplify the mounting work for a master roll in a stencil printer. SOLUTION: A case 10 is provided as a means of supporting a master roll 15. The case is provided with a front wall 11, a rear wall 12 and a bottom wall 13 being respectively brought into contact with the front end, the rear end and the lower end of the outer peripheral face of the master roll stored in the case. The rear wall 12 is supported slidably in the forward and backward direction and energized toward the front.
Patent JP-S6373784-A (JP)
Title: Rotary head type video signal reproducing device
Inventor: SATO TAKAHARU
IPC: H04N5/93
Filed: 1986-09-17
Abstract: PURPOSE:To obtain a satisfactory specific reproduced picture without providing a head only for a specific reproduction by writing a reproduced video signal in a memory only at the time of traveling a tape shape recording medium at the same speed as a recording time. CONSTITUTION:When a slow motion reproduction mode is commanded from a system controller 13, a control circuit 17 drives a capstan motor 16 and the tape repeats a carried state and a stop state at the same speed as the recording time. A control signal is supplied to a memory controller 14 from the system controller 13 and only at the time of travelling the tape, the reproduced video signal is written in the memory 15. A change over switch 4 selects and outputs the reproduced video signal outputted from a video signal processing circuit 5 and a video signal read from the memory 15 and outputted through a D/A converter 12 and a low pass filter LPF11 from the memory controller 14. The outputted video signal is cyclically switched and the satisfactory slow motion reproduced picture can be obtained.
Patent JP-H0265168-A (JP)
Title: Semiconductor device
Inventor: FUKUHARA KENJI
IPC: H01L23/50
Filed: 1988-08-30
Abstract: PURPOSE:To enable improvement of the detection sensitivity of lead defects by providing a projected frame of the specified height at a lead end place, in a J lead package. CONSTITUTION:If a projected frame 2 which is limited to the height within the range of a lead floating good article limit, with the size within the range of a J lead 2 curvature good article limit, is provided in each lead end place at the rear of a mold 1, the detection of lead defects such as curvature, loosening, etc., becomes easy and steady, and the detection sensitivity of lead defects is elevated.
Patent JP-H0638691-A (JP)
Title: Food prepared by using low-strength agar
Inventor: KOJIMA MASAAKI
IPC: A23L21/10
Filed: 1992-07-23
Abstract: PURPOSE:To prepare a food having unique characteristics by adding a low- strength agar to various foods. CONSTITUTION:The food contains a low-strength agar containing the agar molecules cut to short fragments and having a jelly strength of <=250g/cm<2> at an agar concentration of 1.5%.
Patent JP-S6198239-A (JP)
Inventor: SASAKI HIROSHI
IPC: G01N23/04
Filed: 1984-10-18
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000044819-A (JP)
Title: Highly damping material composition
Inventor: MIHARA TOSHIYUKI
IPC: C08L31/04
Filed: 1998-07-31
Abstract: PROBLEM TO BE SOLVED: To obtain a highly damping material composition providing highly damping characteristics and slight change with time, useful as a sound barrier of an acoustic room, etc. SOLUTION: An acrylic rubber or an ethylene-methacrylate copolymer being a basic base polymer is mixed with a damping supplying agent such as an isocyanurate-based compound, a phosphite-based compound, etc., subjected to a fixed processing and molding treatment to give a material. The surface layer of the material is subjected to a surface treatment with a silane coupling agent to form a crystallization control layer. The obtained highly damping material composition is completely blocked from an open air by the crystallization control layer on the surface layer and can develop high tan δ for a long period of time.
Patent JP-2001040055-A (JP)
Title: Rigid polyurethane foam
Inventor: MIZUTA KAZUHIKO
IPC: C08G18/00
Filed: 1999-07-30
Abstract: PROBLEM TO BE SOLVED: To obtain a rigid polyurethane foam completely foamed with water without using a fluorocarbon-based foaming agent such as dichloromonofluoroethane and hydrofluorocarbon as a foaming agent, not only excellent in application, operability and dimensional stability, but also having a density same as or lower than that obtained by using the fluorocarbon-based foaming agent. SOLUTION: This rigid polyurethane foam is obtained by an airless spray foaming comprising mixing a formulated liquid obtained by mixing a polyisocyanate component, a polyol component, water, a catalyst and an adjuvant thereof by a mixing head, and foaming the resultant polyurethane by the carbon dioxide generated by the reaction of the polyisocyanate component and the water. The proportion of the water based on 100 pts.wt. polyol component is 3-12 pts.wt., and an alkyl siloxane copolymer and/or an alkyl siloxane copolymer with derived hydroxy group is included in the polyisocyanate component and/or the formulated liquid.
Patent JP-S59107312-A (JP)
Title: Focus detecting signal processing method
Inventor: SUZUKI KENJI
IPC: G02B7/34
Filed: 1982-12-11
Abstract: PURPOSE:To obtain a method with a high speed and high accuracy by extracting or synthesizing a signal train consisting of the number of data smaller than the number of output values of plural photoelectric converting elements, from said output values, and using the signal train for the operation processing. CONSTITUTION:A focus detecting sequence moves a photographic lens by an image shift quantity calculated in the previous time, and also it is provided with a step of a data mode control for varying the effective sampling accuracy of an image intensity distribution data and the effective view field length. By this data mode control step, the smaller in the image shift quantity and the nearer to focusing point, made higher the effective sampling accuracy, or controlled in the direction the narrower, in the effective view field length.
Patent JP-H1063623-A (JP)
Title: Electronic desktop computer
Inventor: NAKAYAMA HITOSHI
IPC: G06F15/02
Filed: 1996-08-19
Abstract: PROBLEM TO BE SOLVED: To mixedly perform the calculation of number of days, the calculation of four rules and financial calculation by setting the date shown by numeral data inputted to a numeral storage part on calendar data based on a date setting signal and storing financial data. SOLUTION: The calendar data for prescribed years are stored in a ROM 12. Besides, a CPU 11 constructs an identifying means for identifying the numeral data in a numeral storage part 13a of the RAM 13 showing either a decimal value or the date on the calendar based on an identification control signal, date setting means for setting the date shown by the numeral data inputted to the numeral storage part 13a on the calendar data based on the date setting signal, and financial memory 13d for storing the financial data. Thus, the calculation of number of days, the calculation of four rules and the financial calculation can be mixedly performed.
Patent JP-H0265502-A (JP)
Title: Antenna and radio equipment mounted on arm
Inventor: HAMA NORIO
IPC: H01Q1/24
Filed: 1988-08-31
Abstract: PURPOSE:To transmit and receive a signal of a prescribed frequency by adopting the structure such that a capacitance is provided to a connector main body equipped to attach/detach a loop antenna to/from an arm and the capacitance is varied automatically with the length of the loop antenna. CONSTITUTION:A metal plate 5 and the loop antenna 4 are opposite to each other while having insulators 2, 11 inbetween and the opposed part forms a capacitance. With the insulator 2 including the loop antenna 4 drawn out, since the opposed area between the metallic plate 5 and the loop antenna 4 is decreased, the said capacitance is decreased. With the insulator 2 inserted to the depth of the connector main body 12 conversely, since the opposed area is increased, the said capacitance is increased. When the length of the loop antenna 4 is increased in this way, that is, the inductance of the loop antenna 4 is increased, the capacitance of the connector main body 12 is automatically decreased. The processing opposite to above is implemented automatically, and any deviation from a tuned frequency does not take place.
Patent JP-S6195788-A (JP)
Title: Compound target material and its production
Inventor: HIJIKATA KENICHI
IPC: G11B7/24
Filed: 1984-10-17
Abstract: PURPOSE:To provide the compound target material enabling to produce on its surface the uniform line of magnetic force in comparison with the conventional target material without the generation of an abnormal discharging by consisting with joining via diffusion layer >=1 kind of a rare earth metal material and >=1 kind of a transition metal material. CONSTITUTION:>=1 kind of the rare earth metal material consisting of Gd, Tb, Dy, Er and Tm also the alloy of >=2 kinds of these and >=1 kind of the transition metal material consisting of Fe, Ni and Co also the alloy of >=2 kinds of these are brought into contact. The rare earth metal material and transition metal material with this condition are subjected to a pressurizing and heating treatment by the pressure of 1-50kg/cm<2> and at the temp. of under the eutectic point of both metals components, for instance. The atmosphere in this case is preferably non-oxidizing atmosphere, for instance, in a vacuum or inert atmosphere. The aimed compound target material is then obtd. with joining both metal materials via the diffusion layer of 5-50mum averaged thickness.
Patent JP-S6373312-A (JP)
Title: Variable output type constant voltage power source circuit
Inventor: SATO OSAMU
IPC: G05F1/56
Filed: 1986-09-16
Abstract: PURPOSE:To expand the range of an input voltage, and to reduce power consumption in a voltage controlled circuit, by providing voltage sources having different reference voltages in a power source circuit, and switching reference voltage sources corresponding to the change of the input voltage. CONSTITUTION:A variable output type voltage power source circuit consists of a control circuit 1, a voltage-division circuit 2, reference voltage sources 3 and 6 which generate different voltages, an error amplifier 4, a voltage detector 5, a change-over switch 7 which switches the voltage sources 3 and 6, and a load 8. In a state that a circuit is constituted in such way, and the switch circuit 7 is connected to the reference voltage source 3, a voltage V1 is set so as to guarantee the stable operation of a constant voltage circuit, and the logic of the voltage detector 5 is selected so as to select the voltage source 3 first by the switch circuit 7, when the input voltage Ei is higher than the voltage V1. Thus, if it is Ei>V1, the voltage source 3 is used, and it is Ei<V1, the voltage source 6 is operated, thus, a difference between the input voltage and an output voltage can be maintained at a constant level.
Patent JP-S6458575-A (JP)
Title: Tag-forming and tagging device
Inventor: WATANABE HIROFUMI
IPC: B41J13/00
Filed: 1987-08-31
Abstract: PURPOSE:To eliminate the need for manual operations or a separate tagging device, by providing an image forming part and a cutting part in a paper passage, providing a conveyor means and a pushing and discharging means at a paper-discharging part, and providing another conveyor means and a tag-supplying part on an operating path of the pushing and discharging means. CONSTITUTION:Rolled form papers R1, R2 are provided with an image when being passed through an image forming part 21, a color band printing part 22 and a color mark printing part 23, and is cut by a cutter 18 to be a tag 01, which is transferred to a paper-discharging part 19. Matching of the image with a cutting position is controlled by a controlling part 25. The tag 01 is brought to a conveyor means 193, is stopped beneath a pushing and discharging plate 196a of a pushing and discharging means 196, and is affixed to an upper surface of an object SS to be tagged. Alternatively, the tag is stacked as a tag 02 in a tag-receiving body 197. When the tag is stacked or when another tag 02 is to be affixed to the object SS to be tagged, the tag 02 is placed on a tag-supplying part 105, is fed to a second conveyor means 194, and the pushing and discharging means 106 is lowered when the tag 02 is located beneath the discharging plate 196a. Double affixing of the tags 01, 02 is conducted by matching the stop positions of the conveyor means 193, 194 and lowering the pushing and discharging plate 196a.
Patent JP-S6458969-A (JP)
Title: Multiple type air conditioner
Inventor: ITO HIROSHI
IPC: F25B29/00
Filed: 1987-08-31
Abstract: PURPOSE: To perform cooling and heating operation at the same time in a plurality of indoor machines connected to one outdoor machine, by connecting each indoor heat exchanger with each two-way valve in the middle of the refrigerant pipe connecting an outdoor heat exchanger to a four-way valve, and interposing an opening and closing valve in each branch pipe. CONSTITUTION: In the case of performing cooling operation as to first and second indoor heat exchangers 17a and 17b, and heating operation as to a third indoor heat exchanger 17c, each two-way valve 19a and 19b linked each to the first and second indoor heat exchangers 17a and 17b is opened and opening and closing valves 23a and 23b are closed by the switching operation of a four-way valve 12. Two-way valve 19c linked to the third indoor heat exchanger 17c is closed, and the opening and closing valve 23c is opened. The gas-form refrigerant at high temperature and high pressure having flowed out of the four-way valve 12 are shunted into an outdoor heat exchanger 13 and a connection pipe 20.  The gas-form refrigerant at high temperature and high pressure shunted to the connection pipe 20 is liquefied, being heated with a third indoor heat exchanger 17c, and that on the side of other throttle devices 18a and 18b after being decompressed by the second throttle device 18c.
Patent JP-H1065194-A (JP)
Title: Roll-type manufacturing method and device for solar cell module
Inventor: KATO SHINJI
IPC: H01L31/042
Filed: 1996-08-20
Abstract: PROBLEM TO BE SOLVED: To provide a roll-type method of manufacturing a solar cell module, wherein a sealing film and a support film are smoothly and stably transferred. SOLUTION: Solar cell units 1u, each composed of a photoelectric conversion element formed on a flexible base film, are sandwiched in between two thermal adhesive insulating sealing films 41 and 42, to be sealed up together with wiring members 2 and 3, which connect the units 1u for the formation of a solar cell module M, wherein the sealing films 41 and 42 and releasing support films 61 and 62 are thermally bonded together into base films, and the wiring members 2 and 3 and the units 1u are fed, bonded, and sealed up as the thermally bonded base films are transferred by rolls. In this case, the wiring members 2 and 3 and the units 1u are fed, bonded, and sealed up after the sealing films 41 and 42 have been embossed by embossing equipments 100, respectively.
Patent JP-H1166368-A (JP)
Title: Temperature record analyzing device
Inventor: KATO TAKATOSHI
IPC: G07C5/00
Filed: 1997-08-12
Abstract: PROBLEM TO BE SOLVED: To easily analyze the exact data of temperature management or operation management while contrasting the operation records of a transportation vehicle itself with the records of temperature states in a freezer clearly at a glance by graphing these records on the same time base. SOLUTION: A temperature graph display data generating means 102 reads out the temperature data of a measuring object, which are measured at every fixed time interval and recorded in a temperature recording means 101 corresponding to data at that time, and generates display data for displaying the time sequential transition of temperature data as a temperature graph corresponding to the time base while taking time data as that time base. A position designating means 103 designates a position on the time base based on the input of an operator and displays it by a cursor. A numerical temperature display data generating means 105 generates display data for displaying the numerical value of temperature data corresponding to the reading of the temperature graph at the designated position.  A display means 106 displays the numerical values of the temperature graph, cursor and temperature data on a display screen.
Patent JP-S6462158-A (JP)
Title: Anatomical absorber
Inventor: EBERUSON AMARARU
IPC: A61F13/15
Filed: 1987-08-31
Abstract: PURPOSE: To lessen the leakage of liquid by providing the absorber with an absorptive base body held between a fluid impermeable layer and a fluid permeable layer and making the seals between both layers discontinuous in the parts provided with the strips of flaps. CONSTITUTION: This anatomical absorber consists of the fluid permeable layer 1 which comes into surface contact with the peripheral region of a user and the fluid impermeable layer 2 which is used apart from the user's body and the absorptive base body 3 held therebetween. The layers 1, 2 described above are coupled to each other at the ends of the slender anatomical absorber. The flanks of the absorber have the thermally shrinkable elastic strips 6 for applying an anatomical curvilinear profile to the absorber. The strips 6 respectively shrink to form the shapes of the flaps 4, 5 in which the flanks of the absorber rise upward. The layers 1, 2 are coupled to the strips 6 in the plural regions interposing along the length of the strips. The coupling thereof is not continuous in the parts of the flaps 4, 5 on the flanks where are provided with the strips.
Patent JP-H0380304-A (JP)
Title: Timer/counter processing method for sequence process
Inventor: OZAKI SATORU
IPC: G05B19/05
Filed: 1989-08-24
Abstract: PURPOSE:To prevent the overhead which is being generated while accompanied with an interruption process by combining an auxiliary logic variable with a logic operation that can be processed by an exclusive processor only. CONSTITUTION:A general-purpose processor 1 performs the timer and counter processes in a batch independently of the sequence process carried out by an exclusive processor 2 and regardless of the interruption request given from the processor 2. Then a logic operation of the processor 2 is carried out based on the bit data including the executing results of the timer/counter processes. An auxiliary logic variable is used to compensate the dead time which is caused by separating the logic operation from the mutual transmission of information performed between a timer and a counter as well as the logic operation to be continuously processed from the timer/counter operations respectively. This logic variable is combined with a logic operation that can be processed by the processor 2 only in place of the conventional timer and counter. Thus the overhead can be reduced.