baber/WOPTO huggingface dataset:
Patent TW-349136-B (TW)
Title: Jet dyeing apparatus and method
Inventor: GEORGANTAS ARISTIDES
IPC: D06B1/02
Filed: 1995-09-04
Granted: 1999-01-01
Abstract: A jet dyeing apparatus of the type used in dyeing textile materials in rope form comprising a housing, a liquid treatment chamber positioned in the lower portion of the housing and having an upwardly open inlet and an upwardly open outlet, a fabric transport tube positioned in the housing above the liquid treatment chamber comprising a generally elongate tubular member having an inlet and an outlet, and defining a path of travel for receiving and transporting a fabric article in rope form therethrough, at least one liquid application jet positioned along the fabric transport tube for applying pressurized liquid to the fabric within the fabric transport tube so as to dye the fabric and advance the fabric along the path of travel defined by the fabric transport tube, a recirculating pump for recirculating liquid from the liquid treatment chamber to the liquid application jet, a plaiting member mounted to the exit end of the transport tube for relative rotation about the transport tube, the plaiting member including an outlet nozzle for depositing the treated fabric into the liquid treatment chamber, liquid bypass means for diverting a portion of the liquid flowing through the fabric transport tube and the plaiting member outside the primary path of travel of the fabric as the fabric is deposited by the outlet nozzle into the liquid treatment chamber, a header in fluid communicating relation with the portion of the liquid flowing through the liquid bypass means for removing a portion of the liquid from the interior of the housing, the header line further being in fluid communicating relationship with the recirculating pump and with a drain assembly.
Patent TW-386875-B (TW)
Title: Transportation system
Inventor: HORINOUCHI ARATA
IPC: G05B15/02
Filed: 1995-12-20
Granted: 2000-04-11
Abstract: The invention is to provide a transportation system, which includes multiple work stations which may display a travelling action of a carrier of a travelling destination, multiple travelling rails being installed in order to detect the position of carriers, and each of the above-mentioned machines being set up corresponding to a hypothetical dividing travelling interval, according to the travelling destination of the carrier and signals from position-detecting sensors, controlling travelling motion of the carrier which is in an autonomous travelling interval, simultaneously receiving signals of the travelling destination where is outside the autonomous travelling interval, multiple travelling control devices having a self-memorizing identification number of the carrier and transmitting/receiving travelling information of the travelling destination.
Patent TW-344192-B (TW)
Title: Electromagnetic wave leakage prevention filter
Inventor: GOTO YUKIO
IPC: H04N5/64
Filed: 1996-12-30
Granted: 1998-11-01
Abstract: An electromagnetic wave leakage prevention filter characterized in provided with a filter base in front of the image display, the surface of the image display side of the filter base being provided with a light-transmitting conductive mesh; the conductive mesh being grounded, in which a light scattering layer is bonded to the mesh with a conductive adhesive which transmits light, thereby causing a foreign light to generate sporadic reflection.
Patent TW-373356-B (TW)
Title: Plug connector with contact area protection in the plug-in opening region
Inventor: WULFF W PETER
IPC: H01R13/46
Filed: 1997-04-15
Granted: 1999-11-01
Abstract: An insulation body (1) has a plurality of electric contact tracks (2), which lie alongside one another in one plane and run in the plug-in direction, arranged on its upper side. For the purpose of contact area protection, the plug-in end of contact tracks (2) is in each case designed as a curved sliding face (3) for the associated contact spring, and the insulation body (1) is designed at its plug-in end with a step-shaped offset (4), the transition between the levels, at least in each case in the region of the contact tracks (2), being designed to match the curved sliding face (3) of the latter, that is to say as a rounded step (5).
Patent TW-330946-B (TW)
Title: Taphole boring machine serving two tapholes on a shaft furnace
Inventor: LONARDI EMILE
IPC: C21C5/48
Filed: 1997-06-24
Granted: 1998-05-01
Abstract: A taphole boring machine to serve two tapholes (12,14) on a shaft furnace (10) comprising: a supporting structure (18); a jib (20), one end of which is pivoted on a first axis of the supporting structure (18); a drive to swivel the jib (20) in relation to the supporting structure (18) between a first operating position and a second operating position; a mount (26), which is secured to one end of the jib (20) in such a way that it can be swiveled about an axis (28); a kinematic chain between the supporting structure (18) and the mount (26) together with the jib (20) forming a gear, in which a swiveling movement of the jib (20) around the first axis (22) produces a swiveling movement of the mount (26) about the second axis (28), which is characterized in that: an actuator (52,60,76,80,96,98) is incorporated in the kinematic chain (36^,36^^,36^^^) in such a way that on actuation it changes the arrangement of at least one link in the kinematic chain (36^,36^^,36^^^) and in this way produces a swiveling movement of the mount (26) about the second axis (28) that is independent of the swiveling movement of the jib (20).
Patent TW-400636-B (TW)
Title: Memory cell having negative differential resistance devices
Inventor: VAN DER WAGT JAN P
IPC: G11C11/38
Filed: 1997-10-06
Granted: 2000-08-01
Abstract: A memory system is organized as a matrix including a memory cell at each intersection of a bit line with write and read word lines. Each memory cell comprises a first FET 20 having its gate coupled to a write word line and its drain coupled to a bit line, a second FET 22 having its source coupled to the bit line and its drain coupled to a read word line, and first and second negative resistance devices 24, 26 coupled in series between a supply voltage and a substrate voltage, the common point SN of the series-connected negative resistance devices being coupled to the source of the first FET and to the gate of the second FET. Preferably, the first FET 20 is a p-channel device, the second FET 22 is an n-channel device, and the first and second negative resistance devices 24, 26 are RTDs. In a second embodiment, a memory system has a memory cell at each intersection of a bit line with a word line. The memory cell comprises an FET having its gate couple to a word line and one of its drain and source electrodes coupled to a bit line, first and second negative resistance devices 44, 46 coupled in series between a supply voltage and a substrate voltage, the common point SN of the series-connected negative resistance devices being coupled to the other of the drain and source electrodes, and a capacitance 48 coupled between the common point of series-connected negative resistance devices and one of said supply and substrate voltages.
Patent TW-368433-B (TW)
Title: Transport and storage carrier
Inventor: LEAVEY JEFFREY A
IPC: G03F7/20
Filed: 1997-07-09
Granted: 1999-09-01
Abstract: A transport carrier for transporting X-ray masks, wafers and the like, from an ultra-clean environment to another through a lesser clean environment. The apparatus comprises a box that is sealed from the outside by an access door, one or more fans, at least one air filter, rechargeable batteries or a continuous voltage supply for powering the fans. It also includes a damper mechanism for maintaining a positive air pressure when the access door opens. The damper also secures recirculating air inside the box when the door closes. The recirculating air is continuously cleaned at a rate of 2,000 times/minute. The air filter is placed horizontally, preferably, over a frame facing the product to be transported to ensure a continuous smooth, laminar flow.
Patent TW-333595-B (TW)
Title: Method for melting incineration residue and apparatus therefor
Inventor: FUKUSHIMA TSUTOMU
IPC: F23G5/00
Filed: 1997-07-18
Granted: 1998-06-11
Abstract: A method for melting an incineration residue comprising the steps of: charging an incineration residue containing salts into a melting furnace; heating the charged incineration residue in the melting furnace to produce a melt comprising a molten slag forming a molten slag layer and a molten salt forming a molten salt layer; controlling a temperature of the molten salt in the molten salt layer; discharging the molten slag and the molten salt from the melting furnace.
Patent TW-358884-B (TW)
Title: Improvement of IC testing with two-way pins
Inventor: TSAI REN-JE
IPC: G01R31/28
Filed: 1997-09-19
Granted: 1999-05-21
Abstract: Improvement of IC testing with two-way pins for circuit feeding orders, by means of one-way input or output pins converted into 2-way pings without changing the input and output pins in number, for additional control points or observation points for improvement of error detection.
Patent TW-495496-B (TW)
Title: A composition of gases generated agent in low residual for air bag
Inventor: ZHOU XINGXI
IPC: B60R21/264
Filed: 1998-03-20
Granted: 2002-07-21
Abstract: The invention provided a gases generated agent for air bag, generating a more amount of gases when it is combustion, a scare of the production solidified and liquidized particles (residuals), and it can be miniaturized the gases generator. A composition of gases generated agent the characterized in that comprising an oxidizing agents which are a mixture containing a phase stabilizing ammonium nitrate (PSAN) and a nitroguanidine used as an essential component, the content of the nitroguanidine in the composition are not exceeding 35 wt%.
Patent TW-419717-B (TW)
Title: Semiconductor device and method for manufacturing the same
Inventor: ASAMURA TAKESHI
IPC: H01L21/768
Filed: 1998-06-08
Granted: 2001-01-21
Abstract: The purpose of the present invention is to provide a semiconductor device wherein a dummy gate electrode is fixed to the same electric potential as that of a substrate, the stable operation of an LSI and the large process margin could be obtained, and also a producing method of the semiconductor device. The characteristic of the semiconductor device comprises; a P-type silicon substrate 1, a dummy device region 32 unnecessary for the actual LSI operation, which is formed on the P-type silicon substrate 1; and a dummy gate device electrode 62 unnecessary for the actual LSI operation, which is formed on at least a part of the dummy device region 32 through a dummy gate oxide film 4; selectively forming titanium silicide 12 on at least a part of a surface of the dummy device region 32 and the dummy gate electrode 62, a P<+>-diffusion layer 11 and a P<+>-dummy gate electrode 72 of the dummy device region 32 are short-circuited by titanium silicide 12.
Patent TW-406349-B (TW)
Title: Method for fabricting a semiconductor memory device
Inventor: PARK YOUNG-WOO
IPC: H01L21/8242
Filed: 1998-06-19
Granted: 2000-09-21
Abstract: A method for fabricating a semiconductor memory device is provided which can prevent oxidation of a bit line of the semiconductor device. A device isolation region is formed on a semiconductor substrate to define active and inactive regions. A gate electrode is formed on the active region of the semiconductor substrate. A first interlayer insulating layer is formed over the semiconductor substrate including the gate electrode. A bit line is formed on the first interlayer insulating layer including the bit line. With the method, crack and thinning phenomena of a silicon nitride layer which is deposited to form a dielectric layer can be prevented, and thereby a bit line is prevented from being oxidized.
Patent TW-486928-B (TW)
Title: Construction for mounting electronic component on flexible substrate
Inventor: YAGI NOBUYUKI
IPC: H05K7/12
Filed: 1998-07-16
Granted: 2002-05-11
Abstract: The invention provides a mounting construction in which an electronic component is mounted on a flexible substrate. The mounting construction comprises a flexible substrate 10 including a flexible sheet 11, bendable electrode pattern forming portions 17 and 17 formed on the flexible sheet, and electrode patterns 13 and 13 formed on the electrode pattern forming portions, an electronic component 30 having electrode portions 33 and 33, and a clamping member 40 having clamping pieces 41 and 41 for clamping the electronic component 30 therebetween. The electrode pattern forming portions 17 and 17 are deflected, so as to cause the electrode patterns 13 and 13 to be contacted with the electrode portions 33 and 33 of the electronic component 30 placed on the flexible substrate 10. By this, the electronic component 30 is clamped by the clamping pieces 41 and 41 of the clamping member 40 through the deflected electrode pattern forming portions 17 and 17. Thus, the electronic component 30 may be easily and positively secured to the flexible substrate 10, without employing additional reinforcing means such as adhesives.
Patent TW-392207-B (TW)
Title: The method for defining the location of defects on the wafer
Inventor: SHIE HAN-MING
IPC: H01L21/027
Filed: 1998-08-26
Granted: 2000-06-01
Abstract: A method for defining the location of defects on wafer. The surface pattern of production wafer to be tested has been pre-stored, when the defect on the wafer surface has been detected, the surface pattern of that defect wafer has also been recorded. The previous stored surface pattern of production wafer under testing should be inserted with defect image that was processed and fetched from that surface pattern of defect wafer in order to decide the possible location of defect die on that production wafer surface. In addition to that, the coordinate location of defect wafer corresponded to E-chuck could be directly decided by placing defect wafer onto E-chuck in particular direction and location, record the surface pattern of that defect wafer. The production wafer under testing is placed onto the chuck in the same direction and location mentioned above, the die location corresponded to defect image on the production wafer surface can be detected.
Patent TW-434284-B (TW)
Title: Process for improving shelf stability of liquid overbased calcium carboxylates, mixed metal stabilizers containing same, and stabilizing halogen-containing polymers therewith
Inventor: KHATTAR RAJESH
IPC: C08L101/04
Filed: 1998-08-26
Granted: 2001-05-16
Abstract: Shelf stable liquid overbased calcium carboxylates are prepared by reacting a calcium base with a monocarboxylic acid, and carbonating in the presence of a promoter mixture with a phenol and an alcohol under controlled temperature conditions, to produce shelf stable liquids. Mixed metal stabilizer compositions are prepared by blending the stable liquid calcium carboxylate with a metal carboxylate of zinc, cadmium or tin. The mixed metal carboxylates are also shelf stable and are used for stabilizing halogen-containing polymers to provide heat stability, clarity and improved plate out properties.
Patent TW-399315-B (TW)
Title: The semiconductor integrated circuit with a static-discharging protection circuit
Inventor: FUJII TAKEO
IPC: H03K5/08
Filed: 1998-09-10
Granted: 2000-07-21
Abstract: This is a semiconductor integrated circuit with a static-discharging protection circuit. A positioning element is connected to metal insulator semiconductor (MIS transistor), in order to prevent the charging device from collapsing. A lateral twin-electrodes type transistor, MOS transistor or MIS transistor has the gate-pole, which consists of insulating film. The insulating film is thicker than the insulating film of transfer gate; it acts as a positioning element.
Patent TW-412639-B (TW)
Title: Impulse radar guidance apparatus and method for use with guided projectiles
Inventor: SCHNEIDER ARTHUR J
IPC: G01S13/88
Filed: 1998-10-13
Granted: 2000-11-21
Abstract: An impulse radar guidance system (10) and method (30) for use with a spinning projectile (11). The system and emthod tracks the flight of the spinning projectile using an all-weather radar (14) or tracker (14). A linearly polarized asymmetric waveform (21) is transmitted at the projectile that comprises a series of repeating pulses (22) having a relatively strong, short, positive electric field pulse (23) followed by a relatively weak, long, negative electric-field baseline (24). The projectile contains a dipole antenna (26) having a switching diode (27) disposed between respective halves thereof. The waveform is reflected from the antenna which spins with the projectile and reflects a relatively strong signal when the electric field pulse of the asymmetric waveform is aligned along a conduction direction of the diode, a relatively weak reflected signal when the antenna and diode are aligned orthogonal to the electric field pulse, and a small, non-zero, signal when the diode is aligned anti-parallel to the electric field pulse and the diode is back-biased so that respective halves of the antenna are disconnected. The radar or tracker measures the instantaneous roll angle of the spinning projectile during its flight as a function of the state of the reflected signal. The projectile has a maneuvering device (16), and a receiver (15) that receives commands that causes the maneuvering device to actuate at one or more specific roll-angles to deflect the flight direction of the projectile at a target.
Patent TW-480267-B (TW)
Title: Process for preparing salts of dialkylphosphinic acids
Inventor: WEFERLING NORBERT
IPC: C07F9/30
Filed: 1998-11-24
Granted: 2002-03-21
Abstract: The invention relates to a process for preparing salts of dialkylphosphinic acids, which comprises (a) reacting alkylphosphonous and/or hypo-phosphorous acid and/or alkali metal salts thereof with olefins in the presence of a free-radical initiator to give dialkyl-phosphinic acids and/or alkali metal salts thereof and (b) reacting the dialklphosphinic asids and/or alkali metal salts thereof obtained according to (a) with metal compounds of Mg, Ca, Al, Sb, Sn, Ge, Ti, Zn, Fe, Zr, Ce, Bi, Sr, Mn, Li, Na, and/or K to give the metal dialkyl-phosphinate salts. The invention likewise relates to the use of the metal dialkylphosphinate salts prepared by the process according to the invention for preparing flame retardants.
Patent TW-445381-B (TW)
Title: Large scale polarizer and polarizer system employing it
Inventor: CHOI JAE-BEOM
IPC: G02B5/30
Filed: 1998-11-27
Granted: 2001-07-11
Abstract: A polarizer system, comprising: a light source for generating a light; a plurality of quartz substrate parts, each quartz substrate part having one or more quartz substrates, wherein the quartz substrate part partially polarizes the light; a polarizer holder supporting said plurality of quartz substrate parts; and a moving control part coupled to and moving said polarizer holder to uniformly irradiate an area underneath said plurality of quartz substrate parts and said polarizer holder.
Patent TW-434831-B (TW)
Title: Open drain input/output structure and manufacturing method thereof in semiconductor device
Inventor: SHIM BYUNG-SUP
IPC: H01L29/10
Filed: 1998-12-04
Granted: 2001-05-16
Abstract: The present invention relates to an open drain input/output structure and manufacturing method thereof in which a n-channel depletion transistor for pull-up resistance can be used like an enhancement transistor without impurity ion implantation process when being formed an open drain input/output terminal. An open drain input/output structure in a semiconductor device according to the present invention includes: a gate formed with an enhancement transistor at a predetermined portion on a first conductive-type semiconductor substrate which is formed with a gate insulating layer; a second conductive-type source/drain region formed in the semiconductor substrate at the both sides of the gate; and a second conductive-type impurity implantation region formed at a predetermined portion of a channel region at the lower part of the gate so as to selectively connected to the source region or the drain region. Therefore, according to the present invention, because the gate length of a n-channel depletion transistor is designed to have longer than conventional ones so as to changed a depletion transistor into an enhancement transistor there is no necessary an impurity ion implantation process after gate forming process when an open drain I/O is achieved. Therefore, all a pull-up resistance I/O and an open drain I/O of a mask ROM embedded MCU, EPROM embedded MCU can be achieved with the same lay out structure thereby to be compatible when being manufactured MCU.
Patent TW-449530-B (TW)
Title: Air pressure type polishing method and apparatus
Inventor: SUGIYAMA MISUO
IPC: B24B37/30
Filed: 1999-04-21
Granted: 2001-08-11
Abstract: An air pressure type polishing method and apparatus capable of preventing the deposition of slurry abrasive on a worked portion due to drying by air. A carrier 2 holding a workpiece W is made to rotate and the wafer W brought into contact with a rotating platen 1 to polish the surface of the wafer W. In parallel with this, air A or water vapor or water mist S are supplied to a fluid passage 6 opening at the bottom surface of a carrier base 21 of the carrier 2 to uniformly press against and moisten the back surface of the wafer W.
Patent TW-I236347-B (TW)
Title: Nutritional product for a person having renal failure
Inventor: LOWRY CAROL JO
IPC: A23L33/00
Filed: 1999-05-11
Granted: 2005-07-21
Abstract: L-arginine found essential to enhance the glomerular function of the kidneys is used to formulate a low viscosity, calorie-dense, nutritional product for a person having renal failure. In a product free of citric acid or citrates, for oral ingestion, the taste of arginine is counteracted by lactic, malic or adipic acid; in a formulation for tube-feeding, citric acid and citrates in a specified ratio controls the product's stability. The ratio of calcium to phosphorus is controlled, as is the caloric distribution and water content; the amounts of vitamins and minerals included provide a nutritionally complete formulation.
Patent TW-457118-B (TW)
Title: Device for supplying a purified gas to a plant purged using this purified gas
Inventor: CHEVALIER GILBERT
IPC: C01B21/04
Filed: 1999-05-12
Granted: 2001-10-01
Abstract: The invention relates to a device (1) for supplying a purified gas to a plant (3) which is purged using this purified gas, comprising a feed line (5) which is connected, on the one hand, to a source (7) of the said substantially pure gas and, on the other hand, to an inlet of the said plant (3), the said purified gas being contaminated with impurities on passing through the said plant (3). The device furthermore comprises a line (9) which is intended to recover the said contaminated gas at the outlet of the said plant (3) and is connected to the feed line (5) and, arranged one after the other downstream of where the said recovery line (9) is connected to the feed line (5), a compressor (11) and means (13) for separating the impurities from the said contaminated gas by permeation in order to supply a purified gas to the said plant (3).