Patent GB-852894-A (GB)
Title: Improvements in or relating to target direction finding mono-pulse radar systems
IPC: G01S13/44
Filed: 1959-03-19
Abstract: 852,894. Radar. COMPAGNIE GENERALE DE TELEGRAPHIE SANS FIL. March 19, 1959 [March 20, 1958], No. 9641/59. Class 40 (7). Relates to a monopulse radar with at least two receiving aerial elements having overlapping directivity characteristics whose outputs are combined simultaneously and applied through a gate circuit opened by a range pulse to give a D.C. pulse error signal of amplitude Vc and phase proportional to the magnitude and sense of the deviation of the aerial equi-signal axis from the direction of a target of range corresponding to the setting of the range circuit controlling the timing of the range pulse. In such a system if any FM interference is present, the actual amplitude Vc of the error signal contains an unwanted component Vc due to the interference and according to the present invention the time error signal Vc = Ve-Vb is obtained by opening the signal gate just prior to the pulse transmission by means of an interference sampling pulse to produce an interference error signal 410, Fig. 4, of amplitude Vb which is combined differentially with the apparent target error signal 411 of amplitude Ve to give a Vc trial error signal. The invention is described as applied to a known form of system producing Az (azimuth) and Eb (elevation) error signals and comprising four aerial elements a, b, c, d, Fig. 1, in the focal plane of a parabolic reflector 20, Fig. 2, the corresponding signals A, B, C, D being combined to give an Az difference signal G = (A + C) - (B + D), a summation signal S = A + B + C + D and an Eb difference signal P = (A + B) - (C + D) which are applied respectively to receivers 21, 22, 23. Receivers 21 and 23 are coupled directly to Az and Eb error detectors 27 and 28 respectively and the S output from receiver 22 is applied 11 through gates 29 and 210 to the error detectors 27, 28 and 21<SP>2</SP> through a gate 216 to an AGC circuit 215 controlling all the receivers 21, 22, 23. The gates 29, 210 and 216 are opened by a gating pulse from the range circuit 26 and according to the present invention the gates 29 and 210 are also opened by the interference sampling pulse applied via a lead 218. The sequential interference and apparent target error pulses 410, 411, Fig. 4, from the Az error detector 27 are applied to a circuit 213 comprising a cathode follower 31 coupled via a capacitor 32 to a cathode follower 35 coupled via a switch 37 to an output cathode follower 39, a switch 34 being coupled between each and the grid of valve 35. The switches 34 and 37 are momentarily closed at the mid-points of the interference and target pulses 410 and 411 respectively by means of control pulses 43, 44, Fig. 4, derived from the interference-sampling and range-gating pulses so that at the end of the interference pulse 410 the capacitor 32 acquires a negative potential Vb and as shown in curve 42, Fig. 4, the potential sampled by the switch 37 is Vc = Ve - Vb, said potential being applied to charge the capacitor 3b to give a corresponding D.C. voltage. A corresponding circuit 214 is provided for the Eb error detector 28. Although the switches 34, 37 are shown as mechanical devices, in practice they would be electronic.