Patent GB-1333774-A (GB)
Title: Telecommunication route selection equipment
IPC: H04Q3/42
Filed: 1970-10-02
Abstract: 1333774 Automatic exchange systems PLESSEY CO Ltd 2 Sept 1971 [2 Oct 1970] 46872/70 Heading H4K A routing code translator comprises, a plurality of staticizers into which the digits of a code are successively entered in the inverse order to that in which they were received in a register and a corresponding plurality of multiples over which the staticized digits are transmitted to one or more selection units that incorporate logic effective to mark a single output terminal representing a particular route in response to a particular routing code supplied thereto by the staticizers. The translator is available on a one at a time basis to a plurality of registers which may access it-ineffectively, between the digits of a routing code having a predetermined number of digits and-effectively during the pause between the routing code and the numerical digits of a number sent by a push button key set. In the embodiment codes of up to five digits P, Q, R, S, T, are catered for, these being received in that order into storage compartments of a register, e.g. RG1, allocated to the call. For an effective translation, the equipment must know when all the digits of a particular code have arrived in store (no details of this process are given however) whereupon the compartments are strobed by timing pulses t1-t5 in the order T, S, R, Q, P so that the digits are passed, one at a time in two-out-of-five code via the five wire line a, b, c, d, e, into the staticizers. These consist of five bi-stables B per digit position and are strobed simultaneously with the register compartments. It may be noted here that if the routing code contains less than five digits then effective strobing begins at the timing pulse tx (x = 1-5) corresponding to the least significant (rightmost) digit. The outputs of the staticizers are arranged as terminal groups 1Da-1De to 5Da-5De corresponding respectively to the P, Q, R, S, T digits and each (effective) group having two of its terminals marked so as to represent the value of the digit. Each group is connected to an individual 5- wire multiple 1H to 5H so that the digit value may be transmitted to the one or more selection units SU jacked-in to the multiples. In addition selected terminals of each group corresponding to particular digit values are jumpered via wires j to selection units associated with the multiple of next most lower significance. For example with the routing code 42657, the terminals 4Db, 4Dd represent digit 5 and these are connected as an input to a selection unit SU connected to multiple 5H, while terminals 3Dc, 3Dd; 2Da, 2Dc; and IDa, IDd representing digits 6; 2; and 4 respectively are also connected to this same unit so that it may mark a unique output terminal OL upon the occurrence of this code. The considered selection units, viz. those connected to multiple 5H, inhibit via wires IH1 all units connected to multiples corresponding to codes having a lesser number of digits so that no ambiguous markings appear on the terminals OL, OR during processing of a 5 digit code. Similar principles apply to codes having 4, 3, 2 or only 1 digits whereby in each case only selection units associated with multiples 4H, 3H, 2H and 1H respectively are involved. The units associated with multiples 5H, 4H and 1H are each only capable of translating 10 codes whereas those associated with multiples 3H and 2H may process up to 20 codes. Thus consider a unit associated with 3H, this (like all others) comprises an array of ten rows and two columns having crosspoints x which are uniquely associated with pads p and thence terminals OL, OR. Each row represents a digit value and is connected to an appropriate two wires of its multiple via decoder h. Each column is connected to a gate IP2 or IP3 which is enabled by markings arriving over the jumpers j. If no inhibit arrives from multiple 4H, i.e. a three digit code is involved, one row becomes marked at t3, i.e. the R digit, one input of either gate IP2 or IP3 becomes marked at t4, i.e. the Q digit, and another input of the same gate becomes marked at t5, i.e. the P digit whereby the gate opens thus marking its associated column and thereby closing the crosspoint so as to mark a terminal OL or OR. With units associated with multiples 5H or 4H, the S and R or R and Q digits respectively affect only the IP2 gate thereby closing a crosspoint so as to mark the IP3 gate which then responds to the Q and P or P digits respectively in order to close a further crosspoint. In this case obviously only 10 crosspoints are available for marking the output terminals OL. Equally obviously a single digit code appearing on multiple 1H can have only ten values whereby only the gate IP2 need be activated so as to mark a single column. The units are constructed as integrated circuits formed by MOSTs and are mounted on circuit boards so as to be capable of being jacked in to the multiples as and when required with the proviso that at least one unit be connected to each multiple so that inhibition markings may be passed-on to adjacent multiples.