baber/WOPTO huggingface dataset:
Patent JP-S6329206-A (JP)
Title: Recognizing method
Inventor: INOUE MITSUJI
IPC: G01B11/24
Filed: 1986-07-23
Abstract: PURPOSE:To securely recognize the position of a body to be detected by performing a projection process as to image information including the shadow part of the body to be detected and recognizing the position shift and rotation of the body to be detected according to the difference of a center position calculation result. CONSTITUTION:A specific area including a parts 3a on a circuit board 1 is irradiated with light from a device 7a which is set slantingly above, and then the parts 3a has a shadow 2a corresponding to its height; and an image pickup camera 6 sends image information including the shadow 20a to a memory 10a. Similarly, image information obtained by an irradiating device 7b is stored in a memory 10b. The difference between the pieces of stored information is calculated 11 for each signal having the same coordinates and binarized 12. When the parts 3a rotates in an XY coordinate direction, a projection circuit 13 and an arithmetic control circuit 16 set projection areas successively based on the binarization information to calculate the edge of the parts 3a and its breadthwise center and when the difference between the current and last center position arithmetic results is smaller than a specific quantity, the position of the parts 3a is decide to recognize the position shift or rotation of the parts 3a.
Patent JP-H04369743-A (JP)
Title: Automatic erasing system for file
Inventor: KURONO MITSUO
IPC: G06F12/00
Filed: 1991-06-18
Abstract: PURPOSE:To efficiently use a file space by registering a file erasing term and term notice necessity/unnecessity, and noticing/automatically erasing a file whose term expires. CONSTITUTION:The calendar mechanism 1 of a date, day and time is given in a system, and a job management mechanism 2 manages the result of a traveling job and informs a file management mechanism 3 of the result. The file management mechanism 3 manages the file which respective jobs use, the terms of respective files and the necessity/unnecessity of notice. An operator interface mechanism 6 gives information on the file whose term expires and which requires notice, and a file erasing mechanism 4 erases it. A file operation registration mechanism 5 dynamically registers the notice necessity/unnecessity of the term of the file.
Patent JP-H09134940-A (JP)
Title: Failure analysis of semiconductor wafer and device thereof
Inventor: NAKADA KAZUKI
IPC: G01N21/956
Filed: 1996-07-02
Abstract: PROBLEM TO BE SOLVED: To make it possible to accurately grasp a pattern defect generation process. SOLUTION: When a pattern defect 1 is detected in an (n-2)th process, pattern defects in an (n-1)th process are retrieved, all the pattern defects detected in the (n-1)th process at a prescribed region, where the pattern defect 1 is detected, are decided to be ones generated in the (n-2)th process and when pattern defects 2 and 3 are detected outside of the prescribed region, these pattern defects 2 and 3 are decided to be ones developed in the (n-1)th process.  Then, pattern defects in an nth process are retrieved, all the pattern defects detected in the nth process at a prescribed region, where the defects 2 and 3 are detected in the (n-1)th process, are decided to be ones generated in the (n-1)th process and when pattern defects 4, 5 and 6 are detected outside of the prescribed region, where the defects 2 and 3 are detected, these defects 4, 5 and 6 are decided to be ones developed in the nth process.
Patent JP-S5697125-A (JP)
Title: Transmission control system for terminal controller
Inventor: HAYASHI HIROSHI
IPC: H04L13/00
Filed: 1979-12-29
Abstract: PURPOSE: To avoid the duplicated transmission to the terminal device, by informing the end of all the data transmission to the central processing unit, with the terminal device only when the readout command is specific, in the communication control system consisting of the central processing unit, terminal controller and terminal devices.  
     CONSTITUTION: The communication system is constituted with the central processing unit 1, terminal controller 2 and terminal device 3, and the channel control word is read out from the device 2 with the start signal from the unit 1 and this data is transmitted to the device 3. With this constitution, the unit 2 is constituted with the command analyzing circuit 4, execution circuit 5, delay circuit 6, AND circuits 7W9, OR circuit 10, and NOT circuit 11. With this constitution, the command from the unit 1 is read out at the circuit 4, and if this is a specific command, the transmission is instructed to the circuit 5, 5, data is transmitted to the device 3 and the end of transmission is reported to the unit 1 after a given time designated. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-H0336572-A (JP)
Title: Developing device
Inventor: ISHIWATARI TAHEI
IPC: H01F7/02
Filed: 1989-07-04
Abstract: PURPOSE:To stably form a high-quality image for a long time by providing a covering layer which contains at least one kind of conductive material on the surface of a magnetic roller. CONSTITUTION:In a developing device 7, developer 8 being the component element of developer is electrostatically charged and conveyed by the rotating cylindrical magnetic roller 9. Namely, the developer 8 held on the magnetic roller 9 with magnetic force is regulated to be proper quantity of developer by a developer conveying quantity regulating member 10 and then conveyed to a developing gap part where a latent image carrier 1 and the magnetic roller 9 are approximate. In such case, at least the covering layer 16 which contains at least one kind of conductive material is provided on the surface of the magnetic roller 9, that means, a developer conveying surface. Therefore, the conductive material functions as a developing electrode. Thus, the high- quality image is stably formed for a long time.
Patent JP-S5795419-A (JP)
Title: Production of draft pipe
Inventor: SOGABE KAZUKI
IPC: B29C67/00
Filed: 1980-12-05
Abstract: PURPOSE: To obtain a draft pipe to be easily laid under the ground in the working site by arranging a compressed spring into a plastic cylinder body while elongating the spring.  
     CONSTITUTION: A material prepared by coating a metal wire with a zinc or plastic layer is formed into a spring 1 having a fixed outside diameter and a fixed pitch. The spring 1 is successively pushed into a receiving cylinder 3 and compressed in the cylinder 3. A cylinder body 4 is formed from a plastic film or sheet. The cylinder 3 is carried through the cylinder body 4, while the spring 1 is pulled out successively. Thus, a draft pipe is obtained. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-S5798109-A (JP)
Title: Magnetic disc control device
Inventor: KONNO KAORU
IPC: G11B20/12
Filed: 1980-12-06
Abstract: PURPOSE:To improve reliability, by regarding the sectors adjacent to the erroneous sector as erroneous sectors and moving all data stored therein to other sectors, when an erroneous sector is detected in a magnetic disc. CONSTITUTION:When an error is detected in the K-th sector, which is erroneous, of the N-th truck in a magnetic disc D, CPU apparatus 1 repeats reading action several times according to predetermined procedure and stores the address of the erroneous sector in a memory unit 4 when the result of the reading remains erroneous to the last. In the next, CPU1 searches the address of a sector adjascent to said sector, and it is stored in a memory unit 4. Further, an access operation and read-in operation are performed for the sector, and the data are stored in the memory unit 4. In addition, an appropriate replacing sector is selected, and the stored data is written in the replacing sector. With such a process, a device of high reliability is formed.
Patent JP-S6063790-A (JP)
Title: Pseudo static memory
Inventor: NAKAIZUMI KAZUO
IPC: G11C11/403
Filed: 1983-09-19
Abstract: PURPOSE:To reduce an ON-ON current of a timer circuit and reduce an average operating current by composing the timer circuit, which is installed to a memory, with pMOST and nMOST and impressing a power cut signal and rest signal to said circuit. CONSTITUTION:When an input signal phiIN becomes ''0'' (t32), a node N31 becomes (-)VTN, a node N32 becomes less than VDD-¦VTP¦, and a transistor (TR) Q35 is turned ON. However, the TR Q35 is turned OFF since the power cut signal phiC is ''1'' and ON-ON current I will not flow from an electric power supply VDD to ground electric potential. When the signal phiC temporarily becomes ''0'' at time T35 and the Q35 is turned ON, the node N34 is charged. Since current capacities of TRs Q34 and Q35 are low, the rise of the electric potential of a node N34 is slow. However, when electric potential exceeds VTN, the output signal of an NAND circuit 2 becomes ''0'', a TR Q38 is turned ON, a TR Q36 is turned OFF. As a result, the node N34 speedily becomes VDD through TR Q38 having more electric potential than TRs Q34 and Q35. At the time t36, a reset signal phiR becomes ''ON'' and output signal becomes ''1''. As mentioned above, the ON-ON current of the timer circuit can reduce the average operating current since the signal phiC will flow only during ''0''.
Patent JP-S6417136-A (JP)
Title: Invalidation control system for cache memory
Inventor: KISHINO TAKUMI
IPC: G06F12/08
Filed: 1987-07-10
Abstract: PURPOSE:To carry out the access to a 1st bus and the invallidation of a cache memory in parallel with each other by delivering the using request address of the 1st bus given from a processing control part which performs the processing within a data processing means to the 1st bus after latching said request address. CONSTITUTION:Each of plural data processing means 113 gives an access to a 1st bus 111 and processes data. Each means 113 gives an access to a 2nd bus 115 connected in response to the bus 111 for access to the data on a memory 117. Furthermore each means 113 contains a cache memory 119 that can store data as necessary and at the same time requires the invalidation of those stored data. The using request address of the bus 111 received from a processing control part 121 is latched by each means 113 and outputted to the bus 111. Thus the data on the memory 119 are invalidated in accordance with said request address. As a result, the memory 119 can be invalidated concurrently with the access to the bus 111.
Patent JP-H0464582-A (JP)
Title: Automatic lighting device interlocking with elevator
Inventor: HIRAYAMA KAZUNARI
IPC: B66B1/14
Filed: 1990-07-02
Abstract: PURPOSE:To economically enhance crime preventing effect and obtain a service comfortable and safe to users by providing an automatic lighting device on each floor provided with an automatic lighting means which receives the signal of an elevator control unit and lights an illuminating lamp. CONSTITUTION:The change-over switch KS for elevator interlocking of an automatic lighting device in a management room is switched to elevator interlocking. When a user of an elevator gets on the cage of the elevator from the ground floor and pushes a designated floor button of 5F during the night or on a holiday, a designated floor registering relay A5 is energized, and the signal output is inputted to an elevator control circuit to travel the elevator to the fifth floor. Simultaneously, a timer T5 is energized, and the illuminating light of the fifth floor is lighted. At the point of time when the elevator cage reaches the fifth floor, a cage position detecting relay B5 is energized by the signal of an arrival detecting limit switch L5, the designated floor registering relay A5 is released, and the time T5 is released, but the lighting is continued for a fixed time and then extinguished because of OFF delay. Thus, the user getting off the elevator can move to his aimed place under a bright state.
Patent JP-H071044-A (JP)
Title: Manufacture of corrugating metal sheet
Inventor: ITO KIYOSHI
IPC: B21D13/04
Filed: 1993-06-18
Abstract: PURPOSE:To suitably execute corrugating work without applying excessive concentrated working load to a corrugating part by roll-correcting a sheed material in a primary and secondary corrugating works and a corrugated correcting work step by step for successive first, second and third roll forming processes. CONSTITUTION:In the first roll forming process for applying the primary corrugating work to the sheet material 1, the roll forming is continuously applied to the sheet material 1 as corrugated edge parts 2 and sloping sides 3 in the equal pitch. In the second roll forming process, by applying the secondary corrugating work having almost the same curvature as the primary corrugated edge part 2 to each primary sloping side 3, a secondary corrugated edge part 4 is formed and the secondary corrugated edge parts 4 and the primary corrugated edge parts 2 are continued. Further, the forming work is applied to flatten the corrugated level of the primary corrugated edge parts 2 and the secondary corrugated edge parts 4 for the third roll forming process. The corrugated edge parts applied to the forming work are called a ternary corrugated edge part 5 and to the level of the edge parts of the sheet material 1, the forming work is applied so as to be flattened. By this method, uneven thickness in the corrugated edge parts is prevented and breakage of the sheet material accompanied with corrugating work can surely be prevented.
Patent JP-H0470361-A (JP)
Title: Recording head
Inventor: MENTANI MAKOTO
IPC: B41J2/415
Filed: 1990-07-02
Abstract: PURPOSE:To prevent the clogging of an ion flow control hole of an ion flow control board to maintain a high-quality recording with high reliability for a long time by providing an air blower for blowing air to make the inner pressure of an ion flow generator positive. CONSTITUTION:By rotating an air fan 7 in an air blower 9 during a recording action, clean air with no dust through a filter 8 is supplied to a shield electrode 1 through an air blow pipe 6. In this manner, the air surrounded by the shield electrode 1 and an ion flow control board 4 is is made a positive pressure and exhausted out of an ion flow control hole 5 of the ion flow control board 4 toward recording paper 10. During a recording action, dust-free clean air is constantly supplied to the ion flow control board 4 from an ion flow generator 3, and dust and the like is inhibited from intruding from the side of the record ing paper 10. In this manner, there is very little possibility that the ion flow control hole 5 of the ion flow control board 4 may be clogged with dirt, dust, and the like.
Patent JP-S6153157-A (JP)
Inventor: SEKIYA BUICHI
IPC: C04B35/20
Filed: 1984-08-20
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6417198-A (JP)
Title: Transmitter
Inventor: SHIMIZU YASUSHI
IPC: G08C15/06
Filed: 1987-07-13
Abstract: PURPOSE:To easily understand a mistake in the combination of both housings by writing the same identification data in a PROM in the pressure receiving housing and a memory in the processing part housing. CONSTITUTION:Initially, the pressure receiving housing 20 and a production computer 30 are connected, the A/D converting data of the pressure receiving housing is collected and the identification data of the pressure receiving housing is written in the PROM 29. Then, said collected data processed to suitable data in the computer 30 and the same data as said identification data are written in the memory 111, and thereafter, the memory 111 is incorporated in the processing part housing 10. When the pressure receiving housing 20 is combined with the processing part housing 10, the respective identification data is compared, so that the combination by mistake or not is easily understood.
Patent JP-S6066253-A (JP)
Title: Photosensitive body for ld printer
Inventor: OOSETO SEIICHI
IPC: G03G5/04
Filed: 1983-09-21
Abstract: PURPOSE:To enhance spectral sensitivity and repetition characteristics of electric characteristics, etc., by forming a sensitizing layer made of a substance of a specified compsn. contg. Se, As, and Tl between the electrostatic charge transfer layer and the charge retaining layer of an amorphous Se type photosensitive body. CONSTITUTION:A charge transfer layer 3 composed essentially of amorphous As2Se3 is formed on a conductive substrate 4 made of aluminum or the like by the vacuum vapor deposition or the like. A sensitizing layer 2 made of a substance of a compsn. represented by Se1-x-yAxxTly, where x is 0.3-0.45, and y is >=0.02, is formed on the layer 3 by the vacuum vapor deposition method or the like. An intended photosensitive body for an LD printer is obtained by further forming a charge retaining layer 1 contg. at least 90atm% amorphous Se by the vacuum vapor deposition method. Crystallization resistance can be improved by incorporating As in an amt. of <=10atm% or Ge in an amt. of <=10atm%.
Patent JP-H09310-A (JP)
Title: Insole for preventing stinking of shoes
Inventor: ONO KATSU
IPC: A43B17/08
Filed: 1995-06-16
Abstract: PURPOSE: To prevent offensive smell, athlete's foot and the like by providing a bellows-shaped or bag-shaped pump for feeding air to a toe below a part corresponding to a heel of a mesh-like or porous shoes insole to restrict sweating on the sole of a foot. CONSTITUTION: A bellows-shaped pump 3 having a valve 4 is bonded below a part 2 corresponding to a heel of a mesh-like or porous shoes insole 1. Moreover, a lining 5 is arranged under the pump and is provided with several grooves 6 to send air discharged from the pump 3 in the direction of a toe accurately. The bellows-shaped pump 3 is operated continuously by vertical movement of the heel generated with walking of a user and the air flows out through pores at a toe part of the insole 1 via the grooves 6 after the fluidization, namely, suction or exhaustion thereof at an opening part 7 to restrict sweating of the sole of a foot. The bellow-shaped pump 3 comprises an elastic resin having a resilience.
Patent JP-H0730033-A (JP)
Title: Lead frame, manufacture thereof, and semiconductor device provided therewith
Inventor: SUZUKI KAZUHIKO
IPC: H01L23/50
Filed: 1993-07-13
Abstract: PURPOSE:To prevent plating silver which leaks out of a lead frame running over the side faces of inner leads, from flowing out of a molding area when the lead frame is plated with silver in a lead frame manufacturing process by a method wherein a plating silver leakage preventing dam bar is provided at an intermediate point between the inner lead and the molding area. CONSTITUTION:In a lead frame where the tips of inner leads 4 are plated with silver 7, besides a dam bar 5 which serves as an reinforcing member of the lead frame and to prevent resin from flowing outside at resin sealing, another dam bar of metal is provided in a lead frame manufacturing process and then cut off after the lead frame is plated. A dam bar 10 of UV-curing resin is provided to an intermediate part of each inner lead 4. By this setup, a desilverizing process can be dispensed with after a resin sealing process is carried out, plating solder is prevented from expanding on outer leads due to leaked silver, and a leakage current is prevented from occuring between the outer leads due to leaked plating silver.
Patent JP-H0732176-A (JP)
Title: Manufacture of laser beam welded member
Inventor: FUKAHORI MITSUGI
IPC: B23K26/20
Filed: 1993-07-13
Abstract: PURPOSE:To enhance strength of the welded member by making arrangement so that the bend outside of a work is superposed on the bend inside of a mating work and irradiating superposed bends with a laser beam to perform welding. CONSTITUTION:In the radius R1 of curvature of a bend 13b and the radius R2 of curvature of a bend 14b of a side frame outer 13 and a reinforcement 14, R1<=R2 is formulated. When arrangement is made so that the bend 13b outside is superposed on the bend 14b inside, a close adhesion part 16 where both are completely adhered is generated. A laser beam torch is arranged on the position in opposition to the outside of the bend 14b and the close adhesion part 16 is irradiated with the laser beam. Since the side frame outer 13 and the reinforcement 14 are welded together at the bends 13b and 14b which are inward parts than flange parts 13a and 14a of both side ends, strength can be enhanced. In addition, the width of the flange parts 13a and 14a can be narrowed.
Patent JP-S5963818-A (JP)
Title: Circuit for generating high voltage pulse
Inventor: NISHIMURA SHINICHI
IPC: H03K3/02
Filed: 1982-10-02
Abstract: PURPOSE:To shorten the time required for the generation of high voltage pulses by connecting a contact switch and a semiconductor rectifying element between both ends of a negative load on the non-power supply side and actuating the contact switch by the thermal coupling of a heating body. CONSTITUTION:A thermistor 1 generates heat by itself in every half cycle of an AC power supply and reaches saturated temperature. Since the thermistor 1 is thermally coupled with a bimetal 2, the bimetal 2 is actuated by the heat generation of the thermistor 1 and a contact is quickly opened and turned off. At the moment of turning off, an inductor L generates induction kick voltage and outputs one high voltage pulse.
Patent JP-H1127161-A (JP)
Title: Receiver
Inventor: SATO KAZUNORI
IPC: H04B1/10
Filed: 1997-06-30
Abstract: PROBLEM TO BE SOLVED: To attain the reception without producing beat by selecting a clock frequency to eliminate the beat caused because an internal clock frequency, a local oscillating frequency of a reception circuit and a reception frequency are close to each other. SOLUTION: This receiver is configured to select any of two kinds of clock frequencies or over such as a clock frequency of 3.6864 MHz from a clock generating circuit 2 and a clock frequency of 3.5754 MHz from a clock generating circuit 8. A clock changeover device 7 is connected to the clock generating circuit 2 in the receiver in a usual use state. In this state, beat is produced at a reception frequency similar to that, of a conventional receiver. When the clock changeover device 7 is thrown to a position of the clock generating circuit 8, the clock frequency is changed to suppress production of bit. In general, a reference frequency selection terminal is provided to a microcomputer and a MODEM IC or the like and they are operated by clock frequencies of two kinds or over, then they are operated by using any of the clock frequencies.
Patent JP-H1125594-A (JP)
Title: Recording and reproducing device
Inventor: YAMASHITA TAKUMI
IPC: G11B20/10
Filed: 1997-06-30
Abstract: PROBLEM TO BE SOLVED: To connect a recording and reproducing device with external equipment for their operation irrespective of the type of an RS-232C cable. SOLUTION: A selecting switch 6 is provided between an interface part 2 and an RS-232C terminal part 3, so as to enable rearrangement of the order of signals of individual terminals at the RS-232C terminal part 3 for each other. Generally, at the time of connecting an external equipment 4 and the recording and reproducing device by the RS-232C cable 5, either a straight cable or a cross cable should be selected for this purpose. However, for this device, both cables can be utilized, and it is enough to change the selecting switch 6 for the purpose of matching the signal array.