Patent GB-875875-A (GB)
Title: Improvements in or relating to matrices of magnetic cores for electrical switching
Inventor: BINDON DOUGLAS GEORGE
IPC: H03K17/81
Filed: 1958-10-30
Abstract: 875,875. Magnetic core matrices; automatic exchange systems. ERICSSON TELEPHONES Ltd. Oct. 26, 1959 [Oct. 30, 1958], No. 34885/58. Classes 40 (4) and 40 (9). In a system in which a plurality of magnetic cores is required to be switched cyclically, the cores are provided with input leads belonging to k groups, each group having numbers of input leads having no common factor, the input leads being energized cyclically and in synchronism, each core being associated with one input lead from each group and being switched only when all k of its input leads are energized. As described the cores are of the type having rectangular hysteresis loops. As shown, Fig. 1, the cores 11 . . . 16 are required to be switched " on " and " off " in succession to provide read-out pulses during the switching " on " and halfwrite pulses on the switching " off " to leads 1 . . . 6. These leads are associated with columns of a further matrix of cores acting as a register in a register translator of an automatic exchange system. The leads RR1, RW1, RR2, RW2 are pulsed cyclically, the pulses on RR1, RR2 being used for generating read pulses and those on RW1, RW2 being used for generating write pulses. Leads C 1 , C 2 , C 3  are pulsed by ring counter 21 each lead receiving two pulses per step one synchronous with the read pulse and one with the write pulse. Fig. 3 illustrates the detailed circuitry of the matrix 10. The read and write pulses are both negative pulses applied on either lead RR1 or RW1 say, simultaneously with an earth pulse on one of the vertical leads, say C 1  current flowing in the upper or lower half of the coil as the case may be to set or restore the core 11 to produce read or half write pulses on lead 1. Rectifiers 25 block positive potential which is applied on the lead RR1 (say) when the negative pulse is applied to lead RW1 (say). Fig. 4 illustrates the ring counter 20, Fig. 1. Full voltage pulses and half-voltage pulses of twice the duration are applied alternately to leads 36, 37. Core 27 is initially switched by a pulse on lead 34 applied via transistor 35. It is reset by the pulse on lead 36 the output from winding 40 setting core 28 via the transistor 41. The pulse 37 resets core 28 thereby setting core 29 and so on. When an odd-numbered core, say 27, is set, its output from winding 43 causes transistor 44 to conduct thereby inducing a voltage in winding 49 in such direction as to drive RR1 negative and RW1 positive. When an even core, 28 say, is set, transistor 46 conducts inducing in winding 49 a voltage such that RW1 goes negative and RR1 goes positive. The ring counter 21 operates similarly with the exception that the outputs from pairs of cores are coupled via rectifiers to a transistor which is rendered conducting to apply earth to the appropriate vertical lead, Fig. 5 (not shown). Correct relationship between the amplitudes of the read and write pulses obtained from windings 22 is obtained by appropriate adjustment of the tappings on transformers 48, Fig. 4, and windings 24, Fig. 3.