baber/WOPTO huggingface dataset:
Patent TW-430933-B (TW)
Title: Method for reducing plasma damages
Inventor: LEE TZUNG-HAN
IPC: H01L21/76
Filed: 1999-11-05
Granted: 2001-04-21
Abstract: There is provided a method for reducing plasma charging damages, which comprise: providing a silicon substrate; pattern-defining a plurality of die areas and a plurality of dicing path areas on the silicon substrate; pattern-etching a trench area in several dicing path areas and the trench area contacting with the silicon substrate; depositing a polysilicon layer to fill the trench area, and forming a pad polysilicon layer on the trench area; forming integrated circuit on the silicon substrate based on the manufacturing process, wherein, in the manufacturing process to complete the integrated circuit, a plurality of channels are formed to connect to the pad polysilicon layer; forming a plurality of conductor structures in the plurality of dicing path areas, and connecting the plurality of conductor structures to the plurality of channels, wherein the extra charges will pass through the channels to be accumulated in the trench areas; and performing a dicing process after completing the integrated circuit process. Accordingly, it is applicable to avoid the plasma damages caused by the extra charges re-flowing into the plurality of dicing path areas.
Patent TW-440896-B (TW)
Title: Spin-rise-drying process for electroplated semiconductor wafers
Inventor: LLOYD MARK
IPC: H01L21/308
Filed: 1999-11-24
Granted: 2001-06-16
Abstract: The present invention removes unwanted deposited material from a substrate backside by chemically dissolving the material, while substantially preventing dissolution of the material from the substrate front side. Preferably, the dissolving process is included with a spin-rinse-dry process and uses a greater flow rate of rinsing fluid directed onto the front side compared to the flow rate of dissolving fluid directed onto a substrate backside to protect the substrate front side while the unwanted backside material is removed. The present invention includes the method of dissolving the unwanted material from the backside and edge and the associated apparatus.
Patent TW-512380-B (TW)
Title: Circuit breaker
Inventor: OKASHITA HIROSHI
IPC: H01H1/22
Filed: 2000-01-11
Granted: 2002-12-01
Abstract: The present invention discloses a circuit breaker, which has the contactor arm capable of using the movable pin to maintain the movable part in a freely rotatable state. An inclined face is installed at the sidewall of the frame body located oppositely to the front-end face of the movable pin of the circuit breaker such that a predetermined gap is formed between the front-end face and the sidewall of the frame body when the movable part is at the open circuit position, and the gap formed between the front-end face of the movable part and the sidewall becomes a micro gap when the movable part is at the closed position. A member for decreasing abrasion is disposed at the sidewall of the frame body opposite to the front-end face of the movable pin, or the front-end face of the movable pin is made to form a spherical surface. In addition, a tubular lining sheath for decreasing the gap, which is arranged between the contactor arm and the contactor pin for preventing the lateral movement of the movable part is disposed between the contactor arm and the contactor pin.
Patent TW-483905-B (TW)
Title: A thermoplastic polyurethaneurea resin for melt spinning and the method for the preparation thereof
Inventor: AHN PYEON-NO
IPC: C08G18/48
Filed: 2000-02-11
Granted: 2002-04-21
Abstract: There is disclosed a polyurethaneurea resin consisting of a polymer represented by the following chemical formula I: [A-O-(O)C-NH-D-NH-C(O)-NH-D-NH-C-(O)-O]n, wherein a represents an organopolyol residue having a number average molecular weight of approximately 500 to 5,000 and a weight average molecular weight/number average molecular weight (Mw/Mn) of 1.5 to 2.5 with the number of functional groups ranging from 1.8 to 2.2, D represents an aromatic organodiisocyanate residue ranging, in the number of functional groups, from 1.8 to 2.2, and n represents the number of repeat units. This resin is superior in thermal resistance and elastic recovery, so that it is suitable to melt spinning to make useful elastic fibers.
Patent TW-473751-B (TW)
Title: Multi-layer capacitor, wiring board, and high-frequency circuit
Inventor: KURODA YOICHI
IPC: H01G4/232
Filed: 2000-02-19
Granted: 2002-01-21
Abstract: The present invention discloses a multi-layer capacitor, which includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. The first and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. The first and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through the via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL (effective series inductance) value.
Patent TW-581969-B (TW)
Title: Apparatus and method for specifying maximum interactive performance in a logical partition of a computer system independently from the maximum interactive performance in other partitions
Inventor: ARMSTRONG WILLIAM JOSEPH
IPC: G06F9/50
Filed: 2000-02-29
Granted: 2004-04-01
Abstract: A partitioner for creating logical partitions allows a user to specify maximum interactive performance in one partition independently of maximum interactive performance of other partitions to arrive at logical partitions that may be much different than the maximum overall interactive performance percentage of the computer system itself. First, the maximum interactive performance for a computer system is specified, and resources are allocated accordingly. Next, logical partitions may be created, which initially reflect the maximum interactive performance for the computer system as a whole. Finally, the maximum interactive performance can be specified for a partition independently of the interactive performance in other partitions. In this manner a computer system that is configured as a server system with low interactive and high batch performance can have two different partitions, one that has very low interactive performance and the other that balances interactive and batch processing. In this manner two partitions that have greatly different performance attributes can be defined within the limitations of the specified interactive and batch performance for the computer system as a whole.
Patent TW-488198-B (TW)
Title: Printed circuit board capable of preventing electrical short during soldering process
Inventor: LEE SUNG-MO
IPC: H05K1/11
Filed: 2000-03-02
Granted: 2002-05-21
Abstract: The present invention relates to a printed circuit board capable of preventing electrical short during a soldering process. A printed circuit board containing pin-through holes, comprises components for mounting on the printed circuit board to be electrically connected with the printed circuit board, wherein each of the components includes a plurality of pins for inserting into the pin-through holes, patterns formed on the printed circuit board, wherein the patterns are located adjacent to a last one hole among the arranged pin-through holes, and at least one zone formed on at least one of the patterns, wherein a surface of the at least one zone is capable of being soldered, and wherein the at least one zone is formed on the same line passing through the plurality of pins and to absorb an excess amount of the solder at the last one hole, which prevents an electrical short due to the excess solidification of the solder at the last solder.
Patent TW-585917-B (TW)
Title: Glucose dehydrogenase
Inventor: SODE KOJI
IPC: C12Q1/00
Filed: 2000-06-30
Granted: 2004-05-01
Abstract: The present invention provides a modified water-soluble pyrrolo-quinoline quinone glucose dehydrogenase (PQQGDH) having improved affinity to glucose. The PQQGDH of the invention is characterized in that one or more amino acid residues are substituted with other amino acid residues in the region defined by residues 227-244, 186-221 or 412-421 in the amino acid sequence corresponding to the amino acid sequence of the water-soluble PQQGDH derived from Acinetobacter caloaceticus.
Patent TW-473750-B (TW)
Title: Internally-fused capacitor
Inventor: FELLERS CLAY L
IPC: H01G2/14
Filed: 2000-05-25
Granted: 2002-01-21
Abstract: An internally-fused capacitor includes a capacitor housing, at least one capacitor module, and at least one fuse assembly. The capacitor module is positioned in the housing and includes capacitor elements. Each capacitor element includes a first extended foil edge on a first end and a second extended foil edge on a second end. The fuse assembly is positioned in the housing and includes a fuse wire. The fuse wire is connected at a first end of the fuse wire to the first extended foil edge by a crimped connection.
Patent TW-498598-B (TW)
Title: A semiconductor integrated circuit, a contactless information medium device having the semiconductor integrated circuit, and a method of driving the semiconductor integrated circuit
Inventor: ASADA HIROAKI
IPC: G06K19/07
Filed: 2000-06-01
Granted: 2002-08-11
Abstract: A semiconductor integrated circuit which obtains a driving power from a carrier onto which data has been piggybacked, the semiconductor integrated circuit being characterized by demodulating data by correctly discriminating it even when the obtained power supply voltage has become overvoltage, and characterized by effectively using the power supplied by the carrier. The semiconductor integrated circuit includes: a two-voltage rectifier circuit as a power source circuit 111, a voltage regulator circuit 112 which exercises a control so that a power with a higher voltage (VDDH) used for demodulating data does not exceed a certain voltage value, a resistor 141; and a capacitor 142. With this construction, the voltage input to a regulator circuit 1121 as the reference voltage changes in correspondence to the change in voltage VDDH which is caused by the change in amplitude.
Patent TW-569567-B (TW)
Title: Apparatus and method for scaling a switching fabric in a network switching node
Inventor: SCHWARTZ STEVEN J
IPC: H04L12/56
Filed: 2000-08-03
Granted: 2004-01-01
Abstract: A method and apparatus for reallocating switching circuitry in a switching fabric are disclosed. The switching fabric is used to permit data transfer among a plurality of interface units each having a plurality of data ports. The switching fabric is partitionable into a plurality of switch planes such that each switch plane can be assigned to transfer data associated with like data ports of the interface units. Each switch plane includes multiple switching channels each assignable to transfer data associated with one data port of one of the interface units, in a full implementation. The number of interface units is less than the number of switching channels in a switch plane, then the reallocation is performed such that multiple channels of at least one switch plane can be assigned to transfer data of multiple ports of at least one of the interface units. This results in switch plane channels that would otherwise be unused being utilized to transfer data. This reallocation of switch plane channels can result in the elimination of one or more switch planes from the switch fabric resulting in substantially reduced hardware complexity and cost.
Patent TW-455539-B (TW)
Title: Method for producing lamination building material and product thereof
Inventor: PENG RUNG-FANG
IPC: B32B21/08
Filed: 2000-08-30
Granted: 2001-09-21
Abstract: The present invention relates to a method for producing a lamination building material and a product thereof. The method comprises: cutting a transparent PVC sheet into a suitable shape and size as a blank material; printing a specific wood grain pattern or other pattern on the transparent PVC blank material; laminating the printed face of the transparent PVC blank material on an ABS plastic material; performing a hot melting process to laminating the wood grain pattern or other pattern between the transparent PVC layer and the ABS layer; performing a vacuum pressing process on the composite ABS material to form a lamination composite with a desired shape; and adhering the lamination composite on a building material. The lamination building material produced therefrom has a sturdy quality and a bright surface with a wear-resistant pattern, and is light in weight. This product is economical in material use and can be used as a building material that is cheap and beautiful.
Patent TW-451032-B (TW)
Title: Fluid pressure cylinder with adjustable stroke
Inventor: HIRANO AKIHIRO
IPC: F15B15/24
Filed: 2000-10-13
Granted: 2001-08-21
Abstract: A fluid pressure cylinder comprises the followings. A piston that can slide freely in a cylinder neck. A hollow piston rod connected to the piston. A stopper rod is installed on the piston cover with a freely adjustable base part. When the tip extends into the cylinder neck, the stopper rod goes through the piston center hole and inserts in the hollow part of the piston rod. A stopper part is installed at the front end of the stopper rod, wherein the stopper part locks from inside of the piston rod in the locking part around the piston center hole during the forward stroke end of the piston.
Patent TW-444088-B (TW)
Title: To set aid-frame assembled of frame strip board on walls and its construction method
Inventor: LIN JIUN-JEN
IPC: E04B2/78
Filed: 2000-10-18
Granted: 2001-07-01
Abstract: A way of setting aid-frame assembled of frame strip boards on walls and its construction method includes aid frame strip board of a single frame strip board or at least three sides of the aid-frame assembled by several aid frame strip boards. Structure of components applied in this construction method: (1) frame strip board: integral made and shaped, hollow inside with intensified ribs, with downward U-shape surface panels on its outside, left side and right side and arc surface panel on its inner side spliced to panels of the right side and left side; (2) next frame strip boards to be jointed by several screws perpendicularly penetrating from one board and locking into holes on its opposite board, and angle flanges extended from two ends of arc panels fitting into the grooves on the left and right side panels; (3) several fixing members with a plate body, jointed to pre-set raw wall body, with a pair of back-to-back hook rod on it to fit in-between the angle flange and arc panel. With methods mentioned above, a pre-set aid-frame or frame strip board for door case, window case, bathtub, kitchen worktop, and basin will then constructed, then a wall will be completed after some finishing.
Patent TW-476622-B (TW)
Title: Method and device for cutting food dough
Inventor: HAYASHI TORAHIKO
IPC: A21C3/10
Filed: 2000-11-15
Granted: 2002-02-21
Abstract: To provide a method and a device for cutting the food dough, which can give food dough sheets each having desired weight and size. This method for cutting the food dough, characterized by carrying the food dough onto a measuring conveyer and further onto a measurement-checking conveyer disposed in vicinity to the measuring conveyer, and then cutting the carried food dough, when the sum of the measurement values of the measuring conveyer and the measurement-checking conveyer or the measurement value of the measurement-checking conveyer is coincident with a set value. The device for cutting the food dough, characterized by comprising a carrying conveyer for carrying the food dough, the measuring conveyer for measuring the carried food dough, the measurement-checking conveyer disposed in vicinity to the measuring conveyer, a cutter for cutting the food dough, when the sum of the measurement values of the measuring conveyer and the measurement-checking conveyer or the measurement value of the measurement-checking conveyer is coincident with the set value, and the measurement-checking conveyer for checking the weight of the cut food dough piece.
Patent TW-480560-B (TW)
Title: Wafer orienting and reading mechanism
Inventor: COADY MATTHEW W
IPC: H01L21/68
Filed: 2001-03-09
Granted: 2002-03-21
Abstract: An aligner is disclosed including a buffer mechanism having a buffer paddle on which wafers may be buffered to increase the throughput of the aligner. The aligner is provided in general to identify a position of a notch, position and read the associated indicial mark and determine the radial runout of the wafer. The aligner includes a rotating support platform in the form of a chuck on which the wafers are received from the robot. A motor rotates the chuck so that the radial runout and notch of the wafer may be identified. According to the present invention, the aligner further includes a buffer mechanism having a buffer paddle and a drive mechanism for vertically translating the buffer paddle. The aligner further includes an analog sensor for determining the notch location, the radial runout and/or the position of the indicial mark on a wafer being rotated on the chuck.
Patent TW-I230583-B (TW)
Title: A method of diffusing an acaricidal composition comprising permethrin and tetramethrin, and the use of a catalytic combustion flask for implementing such a method
Inventor: GOMEZ CORINNE
IPC: A01N25/00
Filed: 2001-01-12
Granted: 2005-04-11
Abstract: The invention relates to a method of combating insects and parasites, and in particular acarids, the method comprising a step of diffusing a composition that includes permethrin in a solvent. The method is such treated, the composition comprising permethrin and tetramethrin in a solvent, and it is diffused in such a manner that said solvent is entirely in the gaseous state.
Patent TW-504780-B (TW)
Title: Fabrication method of semiconductor device
Inventor: TAKAHASHI TOMISHI
IPC: H01L23/498
Filed: 2001-01-15
Granted: 2002-10-01
Abstract: The invention discloses the fabrication method of semiconductor device in effort to increase bondability. The primary side (7c) and the secondary side (7d) containing multiple pressed substrates (7) is provided on the dielectric layer after forming solder resist agent. Then put semiconductor chip (1) on multiple pressed substrates (7) and spray gas (11) to the upper part of multiple pressed substrates (7) from the place close to the primary side (7c) of multiple pressed substrates (7) while doing wire bonding for connection terminal of package substrate in heating multiple pressed substrates and under solder pad of semiconductor chip (1). By means of absorbing gas on top of multiple pressed substrates (7) in the proximity of secondary side (7d) and organic gas generated by said dielectric layer, wire bonding is performed in attempt to have higher bondability.
Patent TW-499819-B (TW)
Title: Cellular phone
Inventor: ITO SHUHEI
IPC: A63F13/92
Filed: 2001-01-18
Granted: 2002-08-21
Abstract: A celluar phone is designed to realize cellular phone functions and game device functions, particularly music games, which are embodied by a vibration device such as a vibration sensor (23) and a vibration motor (26). When the user swings the celluar phone to vibrate like a maraca in synchronization with rhythm of a prescribed musical tune, the vibration device produces vibration pulses, which are compared with rhythm pulses. Then, a score is marked on user's operation to swing the cellular phone on the basis of time differences detected between the vibration pulses and rhythm pulses and displayed on a screen of a display (5).
Patent TW-504936-B (TW)
Title: Method and protocol for managing broadband IP services in a layer two broadcast network
Inventor: WANG YUNSEN
IPC: H04L12/56
Filed: 2001-01-19
Granted: 2002-10-01
Abstract: A method and protocol for managing broadband IP services in a layer two broadcast network. The service information will be advertised by each end system (server) on the layer two broadcast network. There will have multiple end systems that provide the same service. The intermediate system will forward service request packet to one of the available end system that the intermediate system learned from the service advertisements by the end systems. If the end system determines to instruct intermediate system to forward certain traffic from certain source to it, it can advertise the flow information to intermediate systems. This flow could be a TCP connection or any packets that are specified by the flow pattern matching rules. The intermediate system will always forward the packet based on the flow that is advertised by the end system. For the packets that do not match any advertised flow, the service table will be looked up and one of the servers will be picked up based on the response metric and other policies. Both service and flow classification are specified in pattern matching rules to allow faster execution by the pattern-matching network processors. The service information contains the operations of registration of service sent by server; the service attributes, the service congestion status and server list for a particular service. The flow advertisement contains the flow attributes that could contain the quality of service requirements to support real time application. And the flow advertisement contains also the flow attribute that could insert or delete label or tag or modify the type of service and priority within the packet header to support multiple protocol label switching (MPLS), DiffServ and 802.IP priority. The assigned numbers authority protocol will also manages all the numbers that are shared by these servers that work together as one logical IP entity on this network. The service information, flow advertisement and assigned numbers authority protocol together allows multiple physical end systems (servers) load-balanced serve a service like one logical end system (server). Each physical end system (server) can be added on the fly to share the load and gracefully shut down (de-register) on the fly without interrupting other systems on the network and affecting the service.
Patent TW-484054-B (TW)
Title: Real-time processor debug system
Inventor: MOYER WILLIAM C
IPC: G06F11/00
Filed: 2001-01-31
Granted: 2002-04-21
Abstract: A real-time processor debug system that selectively samples address and data signals of a virtual bus of a core processor during real-time operations to reduce power consumption and to minimize performance impact due to bus loading. Gating logic for an embedded processor provides the virtual bus signals of a core processor, including address and data signals, to a debug interface of an embedded system chip or integrated circuit (IC). The gating logic receives update data and update address signals from the debug interface to control switching on corresponding debug address and data buses. The core processor provides processor status signals to the debug interface so that the debug interface determines the particular transaction being performed by the core processor. The processor status signals indicate change of flow (COF) events as well as instruction fetch or data fetch cycles. The processor status signals also indicate whether a data cycle is read or write. The debug interface monitors the processor status signals to identify significant events and asserts the update data or update address signals accordingly to sample the virtual bus. In this manner, during program trace messaging, the debug interface samples the virtual address bus via the debug address bus during a COF event. Also, the debug interface detects data fetch cycles, samples the virtual address bus and compares the address for one or more predetermined addresses or address ranges of interest. If the address of a significant data cycle is within a predefined range, the debug interface asserts the update data signal to sample the virtual data bus.