Patent GB-1253670-A (GB)
Title: Pulse width modulated amplifier
IPC: H03F3/217
Filed: 1968-12-30
Abstract: 1,253,670. Pulse modulation systems; transistor amplifying circuits. WESTINGHOUSE ELECTRIC CORP. 30 Dec., 1968 [10 Jan., 1968], No. 61586/68. Headings H3T and H4L. In a pulse width modulated amplifier the input signal is supplied via a pre-amplifier 12 to a pair of comparators 16, 20 and two sawtooth reference signals a, b, Fig. 2, of the same repetition frequency but inverted in relation to each other are generated at 14 and supplied to the comparators 16, 20 respectively. Bias potentials + B and -B are also supplied to the comparators 16, 20 respectively and the comparators control switching devices 24, 26. The signals a, b are relatively timed so that the operation of switching devices 24, 26 is staggered in time. With no input signal, Fig. 2, the comparator 16 provides output pulses c whenever the sum of the reference signal a and the bias potential B + is positive, and the comparator 20 provides output pulses d when the sum of reference signal b and bias potential -B is negative. The outputs c and d are supplied to switching circuits 24, 26, which produce output pulses e, f respectively which are supplied to push-pull output stage 28. Signals a and b are also supplied to circuits 30, 33 respectively, which are responsive to the flyback portion of the sawtooth waves and the resulting pulses h and i are supplied to terminate the pulses g from the output stage 28. A signal j from the output circuit 28 indicates whether the positive or negative channel is conductive so that a protection circuit 34 provides a signal giving further protection to stop the non- conductive channel from being turned on at the same time. Fig. 3 shows the operation with a positive input signal V10 which results in positive-going width modulated pulses from the output 28. A similar negative input signal produces negative-going output pulses. This arrangement is stated to be the equivalent of Class A operation at low input levels and of Class B at higher input levels. Circuit details.-The input signal is supplied via an amplifier Q1, Q2, Fig. 5, to resistors R10 and R16 forming part of the positive and negative comparators 16 and 20 respectively. A pair of Zener diodes CR1, CR2 limit the input to a predetermined value. The signal generator 14 comprises two phase-locked sawtooth generators Q3, Q4 and Q12, Q13. Transistor Q13 provides a constant charging current for capacitor C6 which charges linearly until it triggers a Shockley diode SH2 and then discharges via resistor R15. The charging current supplied via transistor Q5 for capacitor C5 of positive channel generator Q3, Q4 is made smaller than that for C6 and the trigger voltage for the Shockley diode SH1 is made higher than that for SH2. The resulting lower natural frequency of oscillation of this generator permits synchronization with the negative channel generator via transistor Q3, resistor R14 being selected to produce the required phase difference. The comparator 16 comprising resistors R10, R11, R13 produces an output c which is supplied to circuit 24 comprising transistors Q6, Q7, Q10. Similarly comparator 20 comprising resistors R16, R17, R18 produces output d which is supplied to circuit 26 comprising transistors Q14, Q15, Q18. Considering circuit 24, when the sum of the input signal and bias signal exceeds the reference signal a, Q6 is cut off and Q7 conducts thus discharging a capacitor C9 (which was charged during the non-conductive period of Q7) through the primary of transformer T3. This turns on transistor Q10 to supply signal e to gate on a gate controlled diode GCS1, in the output stage 28. Circuit 26 operates similarly so that when the sum of the input and bias signals exceeds the reference signal in a negative direction, Q14 is cut off, Q15 conducts to discharge C10 and Q18 conducts to gate the diode GCS2 in the output stage. The reference signal a is also supplied to the base of transistor Q8 in circuit 30 which conducts on the flyback to discharge the previously charged capacitor C8 producing a pulse output via transformer T2 to turn on transistor Q9 and turn of the switch GCS 1. Reference signal b is used in similar manner via transistors Q16, Q17 to turn off switch GCS2. The gate-controlled switches GCS1, GCS2 are connected in push-pull and feed a load resistor RL which may be a loud-speaker. Diodes CR12, CR13 protect the switches GCS1, GCS2 from voltage transients. The protection circuit 34 comprises transistors Q11, Q19 and diodes CR7, CR8. Assuming that the switch GCS2 is conductive, the diode CR7 conducts causing Q11 to conduct and clamp the collector of Q6 to earth thus preventing it from conducting so that switch GCS1 cannot be gated. Similarly, when GCS1 is conducting the collector of Q14 is clamped to earth.