Patent RU-2419190-C1 (RU)
Inventor: PROKOPENKO NIKOLAJ NIKOLAEVICH
IPC: G06G7/16
Filed: 2010-02-15
Granted: 2011-05-20
Abstract: FIELD: radio engineering. 
     SUBSTANCE: analogue voltage multiplier includes the first (1) (u x ) and the second (2)   opposite phase sources of input voltage of channel "X", the first (3) (u y ) and the second (4)   opposite phase sources of input voltage of channel "Y", the first (5) and the second (6) input transistors the emitters of which are combined and connected to the first (7) current-stabilising bipole connected through the second output to the first (8) supply voltage source, the third (9) and the fourth (10) input transistors the emitters of which are combined and connected to the second (11) current-stabilising bipole connected through the second output to the first 8 power supply, load circuit (12) connected to the second (13) power supply, as well as the first (14) and the second (15) outputs of the device, collector of the first (5) input transistor is connected to the first (14) output of the device, collector of the fourth (10) input transistor is connected to the second (15) output of the device; at that, bases of the second (6) and the third (9) input transistors are combined, and base of the first (5) input transistor is connected to the first (1) (u x ) input voltage source of channel "X". To the circuit there introduced is the fifth (16), the sixth (17), the seventh (18) and the eighth (19) input transistors, emitters of the fifth (16) and the sixth (17) input transistors through the third (20) current-stabilising bipole are connected to the first (8) power supply; emitters of the seventh (18) and the eighth (19) input transistors through the fourth (21) current-stabilising bipole are connected to the first (8) power supply; bases of the second (6) and the third (9) input transistors are connected to the first (3) input voltage source u y  of channel "Y"; bases of the sixth (17) and the seventh (18) input transistors are combined and connected to the second (4)   source of opposite phase of input voltage of channel "Y"; base of the fifth (16) input transistor is connected to the base of the first (5) input transistor; base of the eighth (19) input transistor is connected to base of the fourth (10) input transistor and the second (2)   source of opposite phase input voltage of channel "X"; collector of the fifth (16) input transistor is connected to the second (15) output of the device; collector of the eighth (19) input transistor is connected to the first (14) output of the device; common assembly of combined collectors of the sixth (17) and eighth (18) input transistors is connected through the first (22) additional resistor to the second (15) output of device, and through the second (23) additional resistor is connected to the first (14) output of the device; common assembly of combined collectors of the second (6) and the third (9) input transistors through the third (24) additional resistor is connected to the second (15) output of the device, and through the fourth (25) additional resistor is connected to the first (14) output of the device. 
     EFFECT: reducing supply voltage. 
     5 cl, 4 dwg