baber/WOPTO huggingface dataset:
Patent JP-H1167967-A (JP)
Title: Board for mounting csp
Inventor: MORI HIROSHI
IPC: H01L23/12
Filed: 1997-08-21
Abstract: PROBLEM TO BE SOLVED: To provide a board for mounting CSP(chip scale package), wherein the reliability, strength and electrical characteristics of the board, the matching of the characteristics of the board with its peripheral site and the like are satisfied, and the reliability of the board in a thermal cycling environment is ensured. SOLUTION: A board for mounting CSP is constituted into a structure, wherein low-temperature calcined ceramic boards 11-1 to 11-3 are laminated, the board which is positioned on the surface on one side of the surfaces of the board 11-2 has land grid arrays 12 formed in a lattice type at a first prescribed pitch, the board which is positioned on the other surface of the board 11-2 has land grid arrays 14 formed in a lattice type at a second prescribed pitch which is wider than above first pitch and the arrays 12 on one side of the arrays 12 and 14 are connected with the other arrays 14 in the ratio of (m) to (n) (where (m) is a natural number and (n) is a natural number including (n).). Moreover, the first prescribed pitch is 0.5 mm or narrower, and the second prescribed pitch is set at a pitch of 0.8 mm or wider.
Patent JP-H0884470-A (JP)
Title: D.c. high voltage generator
Inventor: NAKAE KOICHI
IPC: H02M7/48
Filed: 1994-09-08
Abstract: PURPOSE: To eliminate malfunctions during transition from trigger region to constant current region, by supplying output from a constant-current control circuit and that from a constant-voltage control circuit to a synchronization control pulse generating circuit through an OR circuit. CONSTITUTION: Supplied with a detection signal from a voltage detecting circuit 11, a constant-voltage control circuit 14 generates a control signal so as to make the high voltage for triggering almost constant. Supplied with a detection signal from an output current detecting circuit 12, a constant-current control circuit 10 generates a control signal so as to make the output current in steady operation constant. To set the output current to a specified value and stabilize it, a second transistor Q2 is turned on with a collector current Ic corresponding to a specified output voltage or output current before a transistor Q1 can turn off by itself. Then the base and emitter of the transistor Q1 are short-circuited, and the transistor Q1 is thereby turned off.  In other words, the duration for which the transistor Q1 is on is controlled, and output voltage or output current is thereby controlled.
Patent JP-H1179919-A (JP)
Title: Antimicrobial material
Inventor: HASEGAWA HIDEO
IPC: A01N59/16
Filed: 1997-09-05
Abstract: PROBLEM TO BE SOLVED: To obtain an antimicrobial material capable of imparting effective antimicrobial activities to a material without damaging the characteristics of the material by including tin-zinc alloy. SOLUTION: This antimicrobial material contains a tin alloy containing at least zinc or zinc oxide, or an oxidation-treated material thereof. The objective antimicrobial material includes the tin alloy or the oxidation-treated material thereof regulated so that the content of the zinc or the zinc oxide in the tin alloy or the oxidation-treated material thereof may be the amount not less than the effective amount required as the antimicrobial component and <=20 wt.%. Bulk, plate, powder, foil, wire or the like is cited as a concrete material form of the antimicrobial material.
Patent JP-H0960228-A (JP)
Title: Provisionally placing table for underlay material on roof
Inventor: KAWAHARA AKIRA
IPC: E04D15/00
Filed: 1995-08-24
Abstract: PROBLEM TO BE SOLVED: To provide a provisionally placing table for roof underlay material which is stable and sturdy, can be instaled quickly on the roof, and can be used however many times as one wishes. SOLUTION: A bar receptacle 12 is installed on the top of a column 11 having a certain height, and the bottom of the column 11 is made slope having a certain angle approx. equal to the gradient of the roof, and to the undermost part a mounting base 19 is pivoted on a horizontal pin 22 in such a way as capable of rotating for a certain angle. One of the key-bolt receptacle holes is formed in either of a stay 25 rising from the bas 19 and the column 11, while in the other, two communication holes 27b are formed which are in communication with respective key-bolt holes, wherein all holes are formed penetrating, and a key bolt 28 is inserted in appropriate one of these holes.
Patent JP-H04119618-A (JP)
Title: Manufacture of solid electrolytic capacitor
Inventor: IDA TAKASHI
IPC: C25D11/26
Filed: 1990-09-10
Abstract: PURPOSE:To obtain a solid electrolytic capacitor having a small leakage current and high withstand voltage by a method wherein, in a solid electrolytic capacitor manufacturing method in which a semiconductor layer is formed on the oxide film of a porous sintered material by impregnating a semiconductor mother liquor and decomposing it by heat, the restoration and chemical formation of the oxide film deteriorated by thermal decomposition are conducted by applying pulse voltage. CONSTITUTION:As pulse voltage is applied for conduction of restoring formation, a quiescent time can be generated, and hydroxide ions are fully infiltrated into the recessed part on the surface of a porous sintered body, which is the anode, and the fine holes in the internal part of the porous sintered body during the quiescent time, and as a result, uniform restoring formation can be conducted. Pulse voltage of 100V is applied for 10 minutes at the rate of the application time of one second and the quiescent time of two seconds. As a result, a solid capacitor, having a low leakage current and high withstand voltage, can be obtained.
Patent JP-H0799277-A (JP)
Title: Semiconductor device
Inventor: SHICHI KOICHI
IPC: H01L23/48
Filed: 1993-09-28
Abstract: PURPOSE:To cope with a various kinds of patterning of a packaging substrate and to simplify direction recognition by changing the terminal formed at the rear side of the substrate from a conventional two-terminal structure to a four- terminal structure and at the same time setting a pair of terminals on a same diagonal line to a same polarity. CONSTITUTION:A pair of terminal parts 141 and 142 connected to the upper and rear electrodes of a photodetector 12 are constituted of the surface side of a substrate 11, through-hole parts 111 and 112 of the side part, and one part of plate pattern parts 161 and 162 formed in one piece over the rear side. Also, terminal parts 151 and 152 are constituted of the surface side of the substrate 11, through-hole parts 113 and 114 of the side part, and one part of plate pattern part 17 which is formed in one piece over the rear side, thus simplifying the manufacturing process and packaging operation since the polarity of each terminal does not change even after a rotation of 180 deg. and hence it is not necessary to apply a polarity identification mark, etc.
Patent JP-S62101701-A (JP)
Inventor: KURODA HISAO
IPC: E01B25/24
Filed: 1985-10-28
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0799435-A (JP)
Title: Bus drive system
Inventor: YAMADA SUKETAKA
IPC: H03K19/0948
Filed: 1993-09-28
Abstract: PURPOSE:To provide a bus drive system preventing the occurrence of a bus fight in a bus line and preventing the impedance of the bus line from being high. CONSTITUTION:The bus drive system where output terminals of plural bus drive circuits A10, B10, C10 whose output stage consists of a CMOS transistor(TR) are connected to a common bus line X10 is provided with TRs a11, b11 and inverters a11, b11 being components of a switch circuit connected between sources of P-channel MOS TRs a13, b13 of an output stage of the bus drive circuits and a power supply terminal having been connected to the sources and receiving a potential of the bus line to control the interruption between the sources and the power supply terminal and with a NOR gate Y10 NORing inputs to an output stage of each bus drive circuit and outputting a resulting output to the bus line.
Patent JP-H08109596-A (JP)
Title: Damp-proof laminate
Inventor: YAGI HISANORI
IPC: D21H19/36
Filed: 1994-10-05
Abstract: PURPOSE: To provide a damp-proof laminate which is excellent in damp-proofing and anti-slip properties and causes no trouble of package slipping. CONSTITUTION: A damp-proofing layer containing a synthetic resin and a wax (preferably paraffin or polyethylene) at a weight ratio of 99/1 to 80/20 is formed on the surface of the substrate, and further, a covering layer of 0.5-15g/m<2> , preferably 1-10g/m<2> is formed thereon to give the objective slip-free damp-proof laminate. The synthetic resin used in forming the damp-proofing layer is an aqueous emulsion, for example, of a styrene-butadiene latex or a styrene-acrylic emulsion and the coating amount is 5-30g/m<2> on the dry base. The coating material for the covering layer contains a water-soluble macromolecule and/or a synthetic resin latex having a glass transition point lower than 20 deg.C and the viscosity is adjusted to more than 200cps or, or is that containing a resin soluble in an organic solvent which does not dissolve the damp-proofing layer.  The formation of the covering layer prevents the wax in the damp-proofing layer from migration to the back face of the substrate.
Patent JP-S60132935-A (JP)
Title: Phenylserine derivative and production thereof
Inventor: OOHASHI NAOHITO
IPC: C07D295/12
Filed: 1983-12-20
Abstract: NEW MATERIAL:A compound expressed by formula I [R<1> and R<2> are H or OH; R<3> is COOR<31> (R<31> is H, alkyl or cycloalkyl), C(OH)(R<32> is H, alkyl, etc.), etc.: Z is alkylene or single bond; R<5> is H, alkyl or expressed by formula II (X<1> is H, alkyl, OH, etc.); R<6> is H, alkyl, aryl, etc.; R<5> and R<6> link to denote a bifunctional group as formula III of cycloalkyl or formula IV]. EXAMPLE:thereo-3-Phenyl-N-[2-(4-phenyl)butyl]serine methyl ester. USE:Useful for treating and preventing allergic diseases, ischemic diseases, ischemic cerebral disorder, inflammations, etc., and having inhibitory action on biosynthesis of leukotriene and/or antagonistic action on slow-reacting substances of anaphylaxis (SRS-A). PREPARATION:A compound expressed by formula V (R11 and R<21> are R<1> or benzyloxy; R<37> is part of R<3>) is reacted with a compound espressed by formula VIunder reductive conditions, and the resultant reaction product is then debenzylated when R<11> and R<21> are benzyloxy groups to afford the aimed compound expressed by formula I (R<3> is R<37>).
Patent JP-H06101597-A (JP)
Title: Fuel turning member for solenoid fuel injection valve
Inventor: NAMAIZAWA YASUO
IPC: F02M61/18
Filed: 1992-09-10
Abstract: PURPOSE:To stabilize fuel flow injected from a fuel injection hole and to accelerate atomization of the fuel by forming fuel turning passages while specifying the ratio of (n) fuel turning passages to the length of the outer periphery of an annular passage. CONSTITUTION:Fuel to which a turning force is imparted by a fuel turning member 8 located upstream of a valve seat 6 is forced to flow between a valve- element end portion 4 and the valve seat 6 toward a fuel injection hole 9 and a cavity 10 is formed in a flow passage between the valveelement end portion 4 and the valve seat 6 by the turning of the fuel flow; in that case, the ratio of (n) fuel turning passages 11 to the wall surface of an annular passage 12 is 2/n or more. The fuel turning passages 11 are so formed that the angle formed between the axis of each fuel turning passage 11 and the annular passage 12 is tan<-1> (3<1/2>.n/2) or more; the fuel turning passages 11 are provided by five. The fuel flow upstream of the cavity is thus stabilized and the flow of injected fuel can be stabilized.
Patent JP-H1091563-A (JP)
Title: Mode switching circuit for multiport memory
Inventor: HAYAMA HIROYUKI
IPC: G06F13/10
Filed: 1996-09-12
Abstract: PROBLEM TO BE SOLVED: To provide a mode switching circuit of a multiport memory which can shorten the access wait time for an I/O port. SOLUTION: A multiport memory 13 of this switching circuit includes a port 15 connected to a CPU 11, a port 16 connected to an I/O 14 and a common storage area which is accessed by both ports 15 and 16. A switching command given from the CPU 11 is inputted to the memory 13 to set one of both ports 15 and 16 in an access enable state with the other port set in an access unable state respectively for the switching of modes. Then an arbitration control part 18 is added to issue a switching command independently of the CPU 11 in response to an access request of the I/O 14.
Patent JP-S61121542-A (JP)
Title: Transmission frequency control system of earth station
Inventor: GOTO YUJI
IPC: H04B7/15
Filed: 1984-11-16
Abstract: PURPOSE:To decrease transient answers in a switching mode and to ensure smooth switching between using and spare systems, by recording the frequency information transmitted through the using system to a resist means and performing the automatic control of the spare transmission frequency in a switching mode to the spare system from the using system according to said frequency information. CONSTITUTION:The transmission modulation signals of the earth station of satellite communication are distributed to the using and spare frequency converters 3a, 3b by a modulator 1 via a distributor 2. While the using system is selected by the signal sent from a switch controller 1 via a switch 5 after amplification. Then the signals are transmitted to a satellite through an antenna 6. The signals returned from the satellite are received by the antenna 6 and amplified 7 to be distributed to the using and spare frequency converters 9a and 9b by a distributor 8. The output of the converter 9a is selected by a switch 11 and sent to a demodulator 12. The switch control signal 201 of the controller 13 is supplied to selection registers of automatic frequency controller 10a and 10b. The outputs of these registers are connected to the controllers 10a and 10b at the opposite side respectively. When the using system is switched to the spare system, the controller 10b controls the transmission frequency of the converter 3b based on the frequency information on the selection register of the using system. Thus smooth switching is possible between the using and spare systems.
Patent JP-S6397019-A (JP)
Title: Convolutional encoder
Inventor: YANO MITSUHARU
IPC: H03M13/23
Filed: 1986-10-14
Abstract: PURPOSE:To execute an encoding whose number of states is not large, whose minimum Hamming distance is long and whose efficiency is high by deciding so that the Hamming distance among optional elements is more than (r), they do not have common parts each other and the number of the elements is 2<k-m> equally concerning respective subsets. CONSTITUTION:A logic circuit 1 decides what subset of 2<m> ones inputted (k) bit belongs to and outputs the decided results in (m) bit. Now, if the minimum Hamming distance obtained by encoder is set as (r) the respective subsets are decided so that their Hamming distance among the optional elements is more than (r), they do not have any common parts each other and the number of elements is 2<k-m>. Supposing that the number of states is set as S, a storage circuit 2 stores a current state in S bit. The logic circuit 3 outputs the following state based on the output from the logic circuit 1 and the output from the storage circuit 2. The logic circuit 4 outputs an n-k bit which should be added as a convolutional encoder based on the current state and the inputted (k) bit from the storage circuit 2.
Patent JP-H0691406-A (JP)
Title: Cutting tool
Inventor: UCHIYAMA MITSUO
IPC: B23B27/00
Filed: 1992-09-10
Abstract: PURPOSE:To transmit a torque from a turning movement central shaft securely and smoothly to a throwaway chip by using no key. CONSTITUTION:In a turning movement central shaft 3 for rotatably supporting a throwaway chip 5, a brim 3a is provided with which a rake face 5d not concerning cutting machining out of rake faces 5c and 5d of the throw away chip 5 comes in contact. On the rake faces 5c, and 5d of the throw away chip 5, plural recess parts and/or project parts are formed concentrically with a cutting edge 5d project parts and/or recess parts which regulate a mutual sliding movement in turning movement direction, being engaged with the recessed parts and/or project parts formed on the rake faces 5c and 5d.
Patent JP-S61119243-A (JP)
Inventor: MIYAWAKI YOSHINORI
IPC: A61B5/02
Filed: 1984-11-15
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0582189-A (JP)
Title: Electronic equipment
Inventor: SHINDO NORIO
IPC: H01R9/00
Filed: 1991-09-20
Abstract: PURPOSE:To make a work easy when electronic equipment laid on a rack are pulled, and a cable is connected between them or cable connection is changed. CONSTITUTION:An I/O terminal 20 for electronic equipment 12 is provided at the upper front end thereof. According to this arrangement, the terminal 20 mounted on the equipment 12 comes to be exposed to such an extent as allowing the connection and change of a cable 22, when the equipment 12 laid on a rack 10 are pulled by only a small distance.
Patent JP-H0798749-A (JP)
Title: Method and device for recognizing handwritten character
Inventor: NISHITANI TAKUJI
IPC: G06K9/62
Filed: 1993-09-29
Abstract: PURPOSE:To simply extract a feature from a handwritten character, to improve the collation accuracy with a dictionary for recognition, and to enhance the recognition rate by providing a feature extracting part for analyzing a distribution of strength and extracting the feature, and a recognizing part for collating a character in a dictionary and an input character. CONSTITUTION:This handwritten character recognizing device is provided with a CPU 16 for managing an operation of the whole device, an input/output part 100 for executing an input of a handwritten character and an output of a result of recognition, a feature extracting part 120, recognizing parts 140, 160, a system memory 17, and a dictionary 18 for storing a dictionary for recognition, and each of them is connected mutually through a system bus 19. In such a state, in the feature extracting part 120, a distribution of strength in the vicinity of each picture element for constituting a pattern of an input character is approximated by a polynomical expression, and a feature of a character pattern is extracted from the combination of magnitude of a coefficient of the polynomical expression. Also, in the recognizing parts 140, 160, a feature of an input character and a feature of a character in a storage dictionary are collated directly.
Patent JP-S6392999-A (JP)
Title: Operation of display device and display device
Inventor: KORIN MAATEIN UOOTAAZU
IPC: H04N3/12
Filed: 1987-09-26
Abstract: The liquid crystal display unit 1, has a video signal receiver 2 and a store 3. Time-modulation grey-scale addressing of the ferroelectric liquid crystal pixels in a display panel 4 is provided to a store 10 which records the number of changes of state for each pixel during one picture-signal. Once the most-significent bit has been processed and is being displayed on the panel 4, the change-of-state store 10 has the net number of changes which the pixel has undergone in that picture. Controller 11 causes store 10 to output the value appropriate to that pixel and pass it to driver unit 9 to produce a compensating pulse (whether positive, negative or zero) necessary to ensure that there is no net electrical potential over the entire picture interval. The display produced by the compensating pulse is cleared immediately the first data of the next picture is input to the pixel. Assuming that the LSB of the data for a pixel already on display in panel 4, then in the next scan extractor 6 passes the next LSB to comparator 7 whose other input is connected to a pixel-state store 8. Accordingly, the new bit-value is compared with the existing state of the pixel, and comparator 7 passes on an instructing signal to pixel driver unit 9 only if the state of the pixel requires changing; in such an eventuality, the driver unit 9 issues an appropriate monopulse select voltage. Comparator 7 also passes such an instructing signal.
Patent JP-H1084872-A (JP)
Title: Method for manufacturing sweet with liquid center
Inventor: YAMAMURO MUNEHIRO
IPC: A23G1/00
Filed: 1996-09-13
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a sweet with a liquid center which is simply manufactured and eases the restriction of material to be used the center. SOLUTION: Water soluble sugar is fused or dissolved into water and then boiled own to prepare the candy of the center mainly consisting of this. Then the surrounding of this candy is coated by a sweet dough of higher water activity so that moisture of the coating sweet dough is shifted to the candy inside to dissolve this to make a sweet with the liquid center.
Patent JP-H04122794-A (JP)
Title: Lubricating oil composition for two-cycle engine
Inventor: WATANABE MASAHIKO
IPC: F02B75/02
Filed: 1990-09-14
Abstract: PURPOSE:To obtain the title composition excellent in seizure resistance and cleaning capability and emitting little exhaust smoke by using, as the principal component, a mixture of a specified polybutene, a specified hydrocarbon solvent and a specified alpha-olefin (co)polymer. CONSTITUTION:The title composition is composed mainly of a mixture of 40-90wt.% polybutene having a kinematic viscosity at 100 deg.C of 2-600cSt, 5-40wt.% hydrocarbon solvent having a boiling point of 300 deg.C or lower (preferably a highly purified kerosene fraction), and 5-30wt.% of at least one polymer selected from ethylene/alpha-olefin copolymers and 6-18C alpha-olefin polymers. This composition is excellent in seizure resistance, cleaning capability, and fuel consumption characteristics and emits little exhaust smoke.
Patent JP-2000075953-A (JP)
Title: Information processor and suspending process method at low-battery condition
Inventor: KANEKO KAZUYUKI
IPC: G06F1/00
Filed: 1998-08-28
Abstract: PROBLEM TO BE SOLVED: To obtain a suspending process which is more suitable to be executed at a low-battery condition. SOLUTION: This information processor has a low-battery detection part 2 which detects a low-battery state when the battery rest decreases below a previously set threshold, a timer interruption generation part 3 which sends an interruption signal out repeatedly at constant time intervals when detecting the low-battery state, a suspending process execution part 4 which executes the suspending process, and an application execution control part 5 which stops new application from being started after the low-battery state is detected. The suspending process execution part 4 executes the suspending process by a normal suspending system each time the interruption signal is received and performs the suspending process by a critical suspending system when the frequency of interruption signal reception reaches a forcible suspending frequency.