baber/WOPTO huggingface dataset:
Patent JP-H07160443-A (JP)
Title: Printer and its state informing method
Inventor: UEDA SHIGERU
IPC: G06F3/12
Filed: 1993-12-09
Abstract: PURPOSE:To effectively utilize resources by previously knowing whether or not an error occurs at the time of printing. CONSTITUTION:Once simulation instruction data are received from a host computer 101, a printing simulation part 117 is actuated. Consequently, a printing part which performs actual printing operation is not supplied with a print start signal any more, and the printing simulation part 117 generates the same signal with the actual printing process, so that exactly the same process as a normal printing process except output to a recording medium is performed. If an error occurs, data showing that are sent back to the host computer 101 through a host I/F 102.
Patent JP-2001132158-A (JP)
Title: Ceiling made of plastics
Inventor: MOCHIZUKI TSUTOMU
IPC: E04C2/30
Filed: 1999-10-29
Abstract: PROBLEM TO BE SOLVED: To provide a ceiling material made of plastics whose rigidity can be greatly enhanced without impairing its appearance, by making inconspicuous flaws caused by welding on the surface of a front wall. SOLUTION: The ceiling material 1 is of a hollow double wall structure and made of plastics to construct the ceiling wall of a bathroom or the like. The ceiling material 1 has its back wall 5 dented toward the front wall 4 to form a rib 9. Deeply grooved ribs 11 pointing to the front wall are formed in spaced relationship in the bottom 10 of the rib 9.
Patent JP-H11126970-A (JP)
Title: Manufacture of printed wiring board
Inventor: KOBAYASHI MAKOTO
IPC: H05K3/46
Filed: 1997-10-23
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a printed wiring board having pad-on-via-holes of high pad tight-contact characteristic. SOLUTION: A process is provided in which a surface via hole 11a is opened on a copper-plated laminating plates 10 and 12, plating is done, a circuit is formed, and after Brown-process, two inner layer plates 15 and 25 are made to face opposite a circuit pattern formation surface via a prepreg, while a mold release paper 32a provided with a unevenness part of 1-3 μm, average diameter of 7-10 μm, is allocated on an outermost surface of the inner layer plates 10 and 20, to be heated and pressurized to be integrated as a lamination. Consequently, a multilayered plate 41a is formed. Further, a process where a mold release paper 32a is released off the multilayered plate 41a and a Brown- processed surface is smoothed, and a process-through which the smoothed multilayered plate is placed and a process-through which a pad is formed on the surface wire hole formed in the laminating process, are provided.
Patent JP-H03171080-A (JP)
Title: Abnormality detection for thermal fixing device
Inventor: KONO MASAO
IPC: G05D23/19
Filed: 1989-11-30
Abstract: PURPOSE:To discover the abnormality of the thermal fixing device at an early stage by recognizing change in the temperature ripple of the detected temperature on the side of the temperature detecting means in a temperature control state with few load fluctuation, in terms of time, and deciding the presence of the abnormality when its change exceeds a prescribed reference time. CONSTITUTION:The change in the temperature ripple of the detected temperature corresponding to the surface temperature of a roller is recognized in terms of time as a T1 - T2. When the change exceeds a prescribed reference time Ts, the presence or absence of the abnormality is detected. Namely, a detected voltage which is determined by a comparing unit 4 based on the resistance value of a thermistor 3 and partial pressure resistance R1 is compared with the reference voltage corresponding to the weight reference temperature, a heater control signal is outputted and the solid state relay 2 is controlled, a gate signal with a frequency divided to one half is generated by the flip-flop 5, and the reference clock and an AND 6 are taken and thereby generating a counter input signal corresponding to the reference clock. Thus, the abnormality of the thermal fixing device can be detected at an early stage.
Patent JP-H11123828-A (JP)
Title: Ink jet recording head
Inventor: OKAZAKI TAKESHI
IPC: B41J2/05
Filed: 1997-10-23
Abstract: PROBLEM TO BE SOLVED: To prevent sticking on the jetting face of a recording head and at the forward end of a nozzle by providing a thermal reflection face on the jetting face. SOLUTION: The recording head 100 comprises a thermal fixing heater 102 disposed directly under a heating region = print area (directly under a recording medium) and contiguously to a recording medium 10. The jet port face of the recording head 100 is applied with a heat ray reflective film 104. According to the arrangement, problems which can nor be solved through simple combination of a special ink and a thermal fixing means can be solved resulting in an ink jet recording head in which sticking is prevented on the jetting face or at the forward end of nozzle without causing any clogging of nozzle or degradation of in jet characteristics.
Patent JP-H01163173-A (JP)
Title: 1,2-epoxypentafluoropropane-3-fluorosulfate and production thereof
Inventor: TAKESUE MASAHIRO
IPC: C07D301/08
Filed: 1987-12-07
Abstract: NEW MATERIAL:1,2-Epoxypentafluoropropane-3-fluorosulfate expressed by the formula. USE:Useful as a raw material for producing perfluoromalonyl fluoride and various fluorine-containing compounds. For example the compound expressed by the formula is reacted with perfluorcarbonyl fluoride to provide a polyfunctional fluoroether compound useful as a surfactant, textile treating agent, medicine, agricultural chemical, etc. PREPARATION:A perfluoroallyl fluorosulfate expressed by the formula CH2= CFCF2OSO2F is oxidized with an oxidizing agent to afford the aimed compound expressed by the formula. For example, oxygen, a hypohalite, etc., are used as the oxidizing agent. The molar ratio of the oxygen to the raw material in using the oxygen is normally within the range of 1:3-10:1, preferably 1:2-3:1. The reaction temperature is normally -30-40 deg.C.
Patent JP-S63165841-A (JP)
Inventor: RICHIYAADO EDOWAADO SUMISU
IPC: B65H85/00
Filed: 1987-12-07
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H03170618-A (JP)
Title: Highly efficient production of cold-rolled steel sheet extremely excellent in workability
Inventor: KOYAMA KAZUO
IPC: C21D9/48
Filed: 1989-11-29
Abstract: PURPOSE:To stably produce a cold-rolled steel sheet extremely excellent in workability with high efficiency by subjecting a steel having a specific composition containing C, N, Mn, S, Al, Ti, Nb, and B to respectively specified hot rolling, cooling, coiling, cold rolling, and continuous annealing. CONSTITUTION:A steel having a composition consisting of, by weight, 0.0040% C, <=0.0040% N, 0.05-0.4% Mn, <=0.015% S, 0.005-0.100% acid-soluble Al, 0.01-0.05% Ti, 0.003-0.03% Nb, 0.0001-0.0010% B, and the balance inevitable impurity elements is heated up to <=1200 deg.C and hot rolled. At this time, rough finishing thickness is regulated to >=45mm, and effective strain epsiloneff represented by an equation epsiloneff = [rolling reduction (%) at the final pass] + 1/2 [rolling reduction (%) at the last pass but one] + 1/4 [rolling reduction (%) at the last pass but two] is regulated to >=45%, and further, finish rolling is completed at 950-880 deg.C. Cooling is started within one second after the completion of hot rolling, and the resulting hot rolled plate is cooled down to <=830 deg.C at >=20 deg.C/sec average cooling rate and coiled at 680-800 deg.C. Subsequently, the hot rolled plate is cold-rolled at 75-85% cold draft and then subjected to continuous annealing at 780-870 deg.C. By this method, the cold rolled steel sheet excellent in workability, such as deep drawability and bulge formability, can be obtained.
Patent JP-H06136303-A (JP)
Title: Electrodeposition coating composition
Inventor: MINOHARA TAKETOSHI
IPC: C09D5/44
Filed: 1992-10-23
Abstract: PURPOSE:To provide a cationic electrodeposition coating composition which does not basically require a substrate to be subjected to a chemical conversion treatment, is free from harmful heavy metals such as lead and chromium and has excellent rust-preventive properties. CONSTITUTION:The composition is cationic one comprising a resin composition prepared by reacting a prepolymer obtained by reacting an epoxy resin with a compound having at least one P-OH group, S-H group or 3,4,5- trihydroxyphenyl group with a compound having an epoxy-reactive amino group and hydrotalcite.
Patent JP-H04181333-A (JP)
Title: Fault detecting circuit
Inventor: TSUKAHARA KATSUMI
IPC: G06F11/22
Filed: 1990-11-15
Abstract: PURPOSE:To decrease the capacity of a pass indicator by indicating only an error display register(EIF) and effective bits of the EIF which are set at the same time by a pass indicator. CONSTITUTION:This circuit is provided with a PASS flip-flop 80 which sets only SL flip-flops 50 and 60 corresponding to registers 10 and 20 while an error display register(EIF) flip-flop 70 is set. Therefore, the select conditions of, for example, the register 10 where an error occurs are set in the pass indicator 80 simultaneously with the setting of the EIF 70 and the select conditions of the register 10 where the error occurs are left. Thus, the select conditions corresponding to all the registers are not set in the pass indicator, so the hardware quantity is reducible.
Patent JP-H05118879-A (JP)
Title: Position detection device
Inventor: SHIN NAOTAKA
IPC: G01D5/36
Filed: 1991-10-29
Abstract: PURPOSE:To enable a quantity of detection light to be increased and S/N ratio of a position detection signal to be improved and then a load of a post-processing circuit to be reduced by allowing an incidence angle of a detection light which is irradiated from a light-projection part to a partial reflection part to be equal to a reflection angle of the detection light which is reflected from the partial reflection part. CONSTITUTION:Light axes of a light-projection part 1 and a light-reception part 2 cross at the same point on a reflection surface of a partial reflection part 4 and an incidence angle of a detection light from the light-projection part 1 is equal to a reflection angle of the detection light from the reflection part 4, thus enabling an incidence light to be focused at one point. With a surface of the reflection part 4, a low-reflection region 7 is printed on a rectangular plate in mirror-surface shape at a constant pitch with a paint which absorbs light or the surface is constituted as a penetration hole. A detection light which is irradiated from the light-projection part 1 passes through a partial penetration plate 3 and hits against the reflection part 4 and then only a regularly reflected detection light impinges on a light- reception part 2 through the light-transmission plate 3. Therefore, since the detection light impinges on the light-reception part 2 optimumly, an S/N ratio of the position detection signal is improved and a quantity of the detection light increases, thus enabling a load of a post-processing circuit to be reduced.
Patent JP-S63160586-A (JP)
Title: Production of immobilized enzyme
Inventor: KONISHI HIDENORI
IPC: C12N11/12
Filed: 1986-12-25
Abstract: PURPOSE:To easily obtain an immobilized enzyme having high activity and stability, by impregnating an aqueous solution of an enzyme-containing water-soluble polymer substance in a carrier and forming a thin film of polymer on the surface of the carrier. CONSTITUTION:An aqueous solution of a water-soluble polymer substance such as polysaccharides, proteins, having a concentration of 0.1-5wt% and containing 1-10mg/l of an enzyme such as oxidoreductase, transferase, hydrolase, isomerase, detaching enzyme, synthase, is prepared beforehand. The aqueous solution is impregnated in a preparatorily washed and dried carrier such as activated carbon, cellite, porous glass, natural fiber, and the carrier is made to contact with a organic solvent solution of a film-forming resin having a number-average molecular weight of <=100,000 and soluble in an organic solvent. The solvent is evaporated to form a thin film on the surface of the carrier and immobilize the enzyme.
Patent JP-H04180647-A (JP)
Title: Manufacture of semiconductor integrated circuit
Inventor: SATAKE KAZUYA
IPC: H01L21/76
Filed: 1990-11-15
Abstract: PURPOSE:To easily integrate a semiconductor integrated circuit and to reduce the possibility of the occurrence of short circuit between elements by forming the side wall sections of an insulator deposited on the level difference section of a semiconductor substrate by vapor deposition and separating the elements from each other by means of the side wall sections. CONSTITUTION:After a thin thermally oxidized film 2 is formed on the surface of a P-type Si substrate 1, a photoresist film 3 is formed. An opening is provided and the films 3 is left in the second element forming area. Then a recessed section is formed at the first element forming area on the surface of the substrate 1 by etching the film 2 and the surface of the substrate 1 by using the film 3 as a mask and the films 3 and 2 are removed. After removing the films 3 and 2, an Si oxide film 4 is deposited. Then side wall sections 4a are formed by leaving the film 4 on the side faces of the recessed section by removing the film 4 from the entire area by anisotropic etching and an element separating area is formed of the recessed section and side wall sections 4a. After forming the element separating area, gate oxide films 7 are formed on the surfaces of the first and second element forming areas and gate electrodes 7 are selectively formed on the films 7. Finally, the N<+> diffusion layer 6 of a source-drain area is formed by introducing N-type impurities into the substrate 1 by using the electrodes 8 and sections 4a as a mask.
Patent JP-H02160955-A (JP)
Title: Method for optimum control of rotational speed of loom
Inventor: SAINEN TSUTOMU
IPC: D03D51/12
Filed: 1988-12-09
Abstract: PURPOSE:To set the rotational speed of a loom to maximize the productivity by determining the productivity after changing the rotational speed of a loom and varying the rotational speed in the direction to maximize the productivity judged from the increasing or decreasing tendency of the productivity. CONSTITUTION:The optimum control of the rotational speed of a loom is performed by each loom-controlling part 5 or a specific loom-controlling part 5 designated by an optimum controller 1. The rotational speed of a driving motor 7 of the loom is successively changed at prescribed intervals in decreasing or increasing direction to increase the productivity under the restriction of the relationship between the stop frame level and the upper limit of the stop- frame level.
Patent JP-H09129659-A (JP)
Title: Sheetlike resin for sealing semiconductor
Inventor: AMAYA YUICHI
IPC: B29C45/02
Filed: 1995-11-02
Abstract: PROBLEM TO BE SOLVED: To enable the defective molding due to internal void to be avoided by protruding the central part of sheetlike resin for making it thicker than periphery thereby venting air also in the compression molding step of resin pellet. SOLUTION: The sheetlike resin contral part 1 corresponding to the central part of a semiconductor element 6 is made thicker than the sheetlike resin periphery 2 by protruding the central part 1 of at least one side of the sheetlike resin 3 for sealing semiconductor. For example, a semiconductor sealing sheetlike resin 3 mainly comprising epoxy resin in the size of 20mm×20mm×1.0 mm (central part 1.5mm) having a protrusion in diameter of 15mm, central level of 0.5mm is manufactured on one surface of central part using the metallic mold for a tablet machine.  Finally, a lead frame 5 with a semiconductor element 6 is held by two each of semiconductor sealing sheetlike resins 3 making the protrusion turn to the opposite side of the semiconductor element 6 so that a resin sealed semiconductor device 8 in size of 20mm×20mm×2.2mm may be manufactured by integrally heat pressurizing for compression molding step.
Patent JP-S63158678-A (JP)
Title: Inter-word space detecting method
Inventor: TANAKA HIDEAKI
IPC: G06V30/10
Filed: 1986-12-23
Abstract: PURPOSE:To correctly detect an inter-word space by defining the number of bits respectively corresponding to peaks and bottoms indicating the inter- character spaces and inter-word space in the frequency distribution curve of a space bit number as thresholds and detecting the inter-word space. CONSTITUTION:An image scanner 1 scans the surface of a paper in the direction of the height of a row from the start of the row to the end of the row with a width W, outputs a picture signal as binary information for making white 1 and black 0 to the main body 2 of an OCR and stores in a picture memory 6. A CPU5 extracts picture data of one line from the memory 6, stores in a line picture memory 7, thereafter obtains the AND of the picture data and sequentially stores in a storing buffer. Then, a buffer 8 counts sequentially the number of white bits in a part in which a white bit 1 is sandwiched with black bits 0 and obtains the frequency distribution curve of the space bit number. The space bit number N=3 corresponding to the bottom between the peaks formed by the inter-character space and the peaks formed by the inter-word space is defined as the threshold and when the number of the white bits more than the threshold is detected it is decided as the inter-word space.
Patent JP-H07162808-A (JP)
Title: Device and method for processing video signal and video signal recording and reproducing device
Inventor: MORIKAWA YASUHIRO
IPC: H04N5/937
Filed: 1993-12-10
Abstract: PURPOSE:To keep time difference between a present picture and a delayed video signal constant at all times by providing a synchronizing signal separating means for separating a first synchronizing signal and a synchronizing signal generating means for generating the second synchronizing signal in the almost same cycle as the first synchronizing signal after the lapse of prescribed time. CONSTITUTION:At the time of operation start, an input terminal (a) and an output terminal (y) are connected at a switch 4, and a reset circuit 6, counter circuit 7, memory control circuit 9 and memory circuit 10 are operated synchronously with the synchronizing signal outputted from a synchronizing signal separating circuit 8. After the lapse of a prescribed time, the connection is switched to the connection of an input terminal (b) and the output terminal (y) at the switch 4 corresponding to the output signal of a timer circuit 3. Afterwards, the synchronizing signal generated by a synchronizing signal generating circuit 5 is used corresponding to a counter value from the counter circuit 7. This synchronizing signal is synchronized with an input video signal and satisfies the relation of a chrominance sub carrier wave and horizontal and vertical synchronizing signal frequencies but is not passed through the circuit 8. Therefore, any cycle fluctuation of the synchronizing signal caused by electric jitter is not generated and the time difference between the present picture and the delayed video signal is kept constant at all times.
Patent JP-H09203967-A (JP)
Title: Cartridge ejecting device
Inventor: NISHIO TETSUYA
IPC: G03B17/28
Filed: 1996-11-21
Abstract: PROBLEM TO BE SOLVED: To surely eject a film cartridge or the like without making a device large-sized by loading or ejecting a cartridge by the pressing of a lever. SOLUTION: An ejecting lever 29 is rotated in a clockwise direction centering a shaft 30 by a connecting lever 26 in accordance with the movement of a supporting lever 23. Thus, the top end of the ejecting lever 29 is brought into contact with the bottom surface of a cartridge 4, so that the cartridge 4 is moved upward by the rotation of the ejecting lever 29 in the clockwise direction centering the shaft 30. The ejecting lever 29 is linked with the supporting lever 23, and pushes up the bottom surface of the cartridge 4 at a loading completion position, and is moved to a position where the upper part of the cartridge 4 is held between a driving roller 15 and a driven roller 17. Then, a control circuit starts a roller driving device 16. The cartridge 4 moves upward held between the driving roller 15 and the driven roller 17 by the rotation of the driving roller 15 thereafter.
Patent JP-2001133412-A (JP)
Title: Surface inspection apparatus
Inventor: HORII YASUSHI
IPC: G01N21/84
Filed: 1999-11-01
Abstract: PROBLEM TO BE SOLVED: To provide a surface inspection apparatus whose condensing efficiency to a light receiving part from a projection part is high, whose detecting power is high even with reference to an object, to be inspected, having a feature that the dispersion property or the direction of light is changed and which can inspect a wide width. SOLUTION: This surface inspection apparatus is constituted of a light source 1 which irradiates light. The inspection apparatus is constituted of a first condensing means 2 by which the light of the light source 1 is condensed to at least one direction. The inspection apparatus is constituted of a second condensing means 5 containing a reflecting mirror which condenses the light to a direction at right angles to the direction. The inspection apparatus is constituted of an object 6, to be inspected, which receives the light condensed by the reflecting mirror. The inspection apparatus is constituted of a light receiving means 9 which receives light reflected or transmitted in the object 6 to be inspected.
Patent JP-H07160346-A (JP)
Title: Stationary reactive power compensator
Inventor: YOSHITAKE HIDEKI
IPC: H02J3/18
Filed: 1993-12-13
Abstract: PURPOSE:To improve the response, improve the control performance, and secure the high reliability of the stationary reactive power compensator. CONSTITUTION:A 1st reactor 1, a 2nd reactor 2 and a capacitor 3 is connected in serves to a three-phase distribution line or power transmission line 6 to form a Y-connection, and a thyristor circuit 4 is connected to the connection point between the 1st reactor 1 and 2nd reactor 2 to form a DELTA-connection to constitute a main circuit; when reactive power is controlled continuously from a lagging state to a leading state by controlling the ignition angle of the thyristor circuit 4, a feedback loop is constituted with an effective value of an inter- phase voltage detected by an effective value detecting circuit 11 connected to a PT 7 to enable voltage constant control even over a distorted wave voltage.
Patent JP-H11224492-A (JP)
Title: Semiconductor memory, non-volatile semiconductor memory, and flash memory
Inventor: SAKUI YASUSHI
IPC: H01L29/792
Filed: 1998-10-30
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor memory which can shorten an erasing time, a writing time, a test time, and the like without increasing the chip cost and complexing an address input. SOLUTION: When the erasing, writing, testing or the like of data of a memory cell being electrically rewritable is performed, block size BS1-BS10 and one set of block addresses BS, A1-A10 are inputted in block selecting means 21, 22, 23, multiple selection of plural addresses making the block address as the leading address is performed by controlling a row decoder 15. Therefore, continuous plural blocks can be selected simultaneously and data of memory cells in plural blocks can be simultaneously erased, written, and tested. As a block size is inputted from the outside of a chip, a block size can be freely set. Also, as a block address register storing an arbitrary block address is not required to provide, the chip size can be reduced, the chip cost also can be reduced.