Patent GB-1306825-A (GB)
Title: Touch key circuit
IPC: H03K17/96
Filed: 1970-06-17
Abstract: 1306825 Digital keyboards SOLARTRON ELECTRONIC GROUP Ltd 2 July 1971 [17 June 1970] 29447/70 Heading G4H [Also in Division H3] In a touch operated switch, a capacitor 18 coupled with a transistor 17 has its charge increased if a dielectric-covered metal plate 10 is touched so as to effectively introduce an additional capacitance in a circuit subjected to periodic square wave pulses from a source 14, and has its charge reduced when the touch circuit is broken, the state of capacitor charge being determined by periodic sampling from a sampling pulse source 22 through a NAND gate 19 which produces a +5V output at terminal 27 at all times except during a sampling period when the switch is touched. Each time the sampling pulse source is operative a diode 24 is cut off and a + 5V source through resistors 26 is applied to the capacitor through a diode 23, a high charge current to the capacitor 18 then producing an 0V output at terminal 27 through transistors 28 and a low charge current maintaining the + 5V output. The circuit of source 14 includes a resistor 15 which may be shunted by a voltage clamping diode 16. In a modification, Fig. la (not shown), the diode 16 is omitted and the collector of transistor 17 is connected directly to the square wave source. A plurality of touch operated switches may be provided, each switch controlling a respective flip-flop 29 29a, 29b through an individual NAND gate 19, and inverter 41. A lamp driver circuit 30 controlling a lamp 31 indicates the last switch to be touched, the other flip-flops being reset through diodes 32. A monostable circuit 33 generates a single pulse in response to touching of the associated switch. In Fig. 3 gates 19 are used to control the entry of data in a shift register 35, the single switch circuit shown controlling the setting of register bits 6 and 7 to "1". The square wave pulse source 14 is used to apply shift pulses to register 35 and also to change outputs sequentially in a decoder 37 through a 4-bit counter 36. The sampling pulse generator is effectively constituted by the counter 36; decoder 37 and a NAND gate 40, so that a sampling pulse is applied to gate 19 during the fifth bit interval to determine whether the associated switch has been touched. If the respective flip-flop 29 is set, "1's" are written into 6th and 7th bit positions in the shift register by way of a NAND gate 44 and an inverter 43. Sampling pulses continue to be produced in the 6th and 7th bit positions via NAND gates 45 and 46, and the flip-flop is then reset in the 8th bit position so that the register content from this bit position onwards recirculates through NAND gate 42. In a modification, Fig. 4, the monostable 33 of Fig. 1 provides an additional controlling input to gate 44 to allow "1" bits to pass in one recirculation only, the gate 42 being replaced by a serial full adder 47 to which the output of inverter 43 is applied. A bit-parallel system is shown in Fig. 5 with individual touch switch circuits 50 for the digits 0 to 9. Continuous clock pulses are applied to a four-bit counter 51 of which the four stages are connected to a ten output decoder 52, the first stage of the counter being used as a square wave source connected to the touch switches over a line 60. Each decoder output 53 acts as a sampling pulse source for the respective touch switch circuit inputs 49, inverters 54 being provided. In operation, when any switch is touched sampling does not take place until the point where the counter 51 holds the corresponding digit. The resulting pulse on output 27 causes this digit to be staticized in a buffer store 55 having output control lines 57 connected through a decoder 58 to lamp drivers and lamps 30, 31. The buffer store may be reset to zero by disabling the square wave pulses transmitted over line 60 to the switches 50. For this purpose a zeroing command pulse is applied over line 65 to a NAND gate 63 connecting line 60 through an inverter 64 to switches 1 to 9, and to a NAND gate 62 connecting the inverted condition on line 60 to switch 0.