baber/WOPTO huggingface dataset:
Patent JP-H05331982-A (JP)
Title: Roof beam suspension device
Inventor: GUNJI MASAMITSU
IPC: E04D15/00
Filed: 1992-06-03
Abstract: PURPOSE:To make it possible to easily and stably convey a roof beam by using a suspension device consisting of a roof beam mounting means, a roof beam suspension means and a roof panel fixing means in order that the roof beam is suspended and conveyed to the rooftop. CONSTITUTION:A roof beam suspension device 38 is constituted of a roof beam mounting section 40 fixed across a roof beam 30, a roof beam suspension section 42 and a roof panel fixing section 44. The roof beam suspension section 42 is so formed that the upper end of a roof panel 32 is brought into contact with the perpendicular surface of the roof beam suspension section and that the top of the roof panel 32 can be automatically positioned. The roof panel fixing section 44 is so formed that it is extended to the upper surface of the roof panel 32, and a fixed plate 62 is inserted in the upper end of the roof panel 32 and is fixed to the roof beam 30. According to the constitution, a hook of a crane is put in a suspending hook mounting hole 56, and the roof beam 30 is suspended to the position of the rooftop of a construction and can be conveyed.
Patent JP-S6325062-A (JP)
Title: Printing density regulation circuit
Inventor: WATANABE SUMIO
IPC: B41J2/36
Filed: 1986-07-17
Abstract: PURPOSE:To obtain printing density always equal even when kinds of external power sources different in output voltage are used, by constituting a printing density control circuit of a pulse width control circuit, a voltage detection circuit and a voltage/time converter circuit. CONSTITUTION:Reference voltage Vs is applied to the comparator A in a voltage detection circuit 51 and, when the voltage Vn obtained by dividing the voltage Vin of an external power source by a variable resistor RV1 becomes higher than the reference voltage Vs, the output of the comparator A is set to a higher level and, when the voltage Vn is lower than the reference voltage Vs, the output of the comparator A is set to a lower level. When the output of the comparator A comes to a higher level, the time constant of a one-shot multivibrator M becomes smaller in a voltage/time converter circuit 25 and a pulse width control circuit 12 and, accordingly, the pulse width of voltage applied to a heat generating resistor 4 also becomes shorter. Contrarily, when the output of the comparator A comes to a lower level, the pulse width of voltage supplied to the heat generating resistor 4 also becomes longer accordingly and printing density can be controlled.
Patent JP-S5870278-A (JP)
Inventor: YAMADA MITSUAMI
IPC: G09G3/04
Filed: 1981-10-23
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6324676-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: TOSAKA ASAMITSU
IPC: H01L21/338
Filed: 1986-07-16
Abstract: PURPOSE:To raise breakdown strength of the gate while reducing the gate capacity by a method wherein the relations between a semiconductor layer thickness below a gate electrode.drain electrode and the carrier concentration are specified. CONSTITUTION:A semiinsulating GaAs substrate 11 is implanted with ions to form a layer 21 of td in thickness, and carrier concentration of nd. First, a gate oxide film 22 of ta in thickness and carrier concentration of na is provided. A region 23 is ion-implanted using the film 22 as a mask meeting the requirement of na.ta>nd.td. Second, an Al gate electrode 14 is selectively provided to be annealed or further ion-implanted to be annealed again forming a low resistant layer 41. Later, an ohmic source drain electrode is provided. In such a constitution, breakdown strength of the gate is raised; the gate capacity is reduced; and the reliability and high frequency and high speed characteristics of the device are improved.
Patent JP-S6059599-A (JP)
Title: Non-volatile semiconductor memory
Inventor: HIGUCHI MISAO
IPC: G11C17/00
Filed: 1983-09-13
Abstract: PURPOSE:To test a manufactured non-volatile semiconductor memory and to obtain the high reliability of the device by forming a testing circuit consisting of dummy cell groups connected to row/column lines selected only at the testing time and a peripheral circuit selecting the dummy cell groups. CONSTITUTION:The testing circuit including a row dummy cell group selecting means consisting of row dummy cell groups 23, 24 to be driven by row lines selected only at the testing time, dummy row decoders 20, 21 selecting the cell groups 23, 24 and a testing row address buffer 18, and a column dummy cell group selecting means consisting of a column dummy cell group 25 connected to a column line selected only at the testing time and formed in one column every I/O bit, a dummy column selector 22 selecting the cell group 25, a dummy column decoder 19, and a testing column address buffer 17 is formed. Thus, information is inputted/outputted to/from a memory cell matrix 16 on the basis of address inputs A0-Am.
Patent JP-H11227862-A (JP)
Title: Container for housing multi-member
Inventor: KURZ JOSEF
IPC: B65D85/57
Filed: 1998-06-16
Abstract: PROBLEM TO BE SOLVED: To make housed platelike objects such as mini disks fixed unseparably under the state of being closed wherein housing pockets are brought into contact closely with one another. SOLUTION: Each of housing pockets 20 has a back plate 21 having a grip notch at its upper part and edges each formed in a U shape at its sides and bottom, and connecting links 30 at the upper and lower parts are extended transversely, being connected respectively with transverse connecting plates at positions between the front and the rear sides of the adjoining housing pockets 20, while being equipped with ribs 33 respectively at their side and each of the ribs forms linkage points at the upper and the lower parts, working together with legs at both sides of the U-shaped edge 22.  The housing pockets move in parallelogramatic movement, and under the state of being closed wherein the housing pockets are brought into contact with one another, a protuberance 35 of the transverse connecting plate is fitted into a driving hole 42 of a mini disk 40, and the mini disk 40 is fixed unseparably.
Patent JP-S5957488-A (JP)
Inventor: FUJII HIDEO
IPC: H05K1/00
Filed: 1982-09-28
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5690354-A (JP)
Title: Time-out supervisory system
Inventor: SHINOZAKA TSUTOMU
IPC: G06F11/34
Filed: 1979-12-25
Abstract: PURPOSE: To resolve a dead lock by a set sector command at an early stage of a fault range is yet narrow, by providing a means for extending the supervisory time, in the input/output control means equipped with a time-out mechanism.  
     CONSTITUTION: When the input/output instruction which the input/output control part IOSC has received is a set sector command, the set sector command schedule part IOSS generates the set sector command to the designated input/output unit DEV; through the IOSC and the input/output control unit IOC. In this case, the time supervisory mechanism IOST sets the supervisory time to the transmitted command, by a signal from the set sector command. And, when the IOST is informed from the IOSC that the supervisory time has finished, whether it is time-out of the set sector command transmission or not is decided. In case when it is time-out of the set sector command transmission, the time extension means receives this signal to extend the supervisory time. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S5870369-A (JP)
Title: Frame generating system of table in word processor
Inventor: MITSUSAKA TOSHIO
IPC: G06F17/24
Filed: 1981-10-22
Abstract: PURPOSE:To execute line-drawing or erasion at a stroke between the start and end positions, by instructing how to process a table, setting the start and end position of a frame line by a position setting means, and also instructing the line drawing or the line erasion by a drawing and erasing instructing means. CONSTITUTION:In case when a word processor 1 processes a table, a table mode key 31 is depressed. In case of a table mode, the whole CRT picture becomes a picture showing longitudinal and lateral graduations. A position of a line for constituting a frame of the table is set by moving a cursor to an optional position on this picture by use of cursor moving keys 38-3B. Subsequently, a full line start key 32 is depressed, also the cursor is moved to the end position of a full line, a position is set, and after that, when a line end key 35 is depressed, line-drawing is executed at a stroke between the start position and the end position. In this regard, in case of erasing the line, a line erasing key 34 is depressed.
Patent JP-S5959269-A (JP)
Title: Method for drying coating film of lacquer paint
Inventor: MIHARA KAZUYUKI
IPC: B05D3/06
Filed: 1982-09-28
Abstract: PURPOSE:To dry a coating film in a shortened time for the mass-production of coated bodies, by subjecting a coating film formed by the irradiation of paint such as refined Japanese lacquer or cashew paint with ultraviolet rays in a short time. CONSTITUTION:The coating film of lacquer paint such as refined Japanese lacquer or cashew paint comprising the reaction product of a cashew nut shell liquid with formaldehyde is subjected to ultraviolet irradiation in a short time. Hence, the drying of said coating film can be remarkably shortened without injuring the property of the coating film, so that the mass production of coated bodies can be attained.
Patent JP-H0613499-A (JP)
Title: Hybrid integrated circuit device
Inventor: SAKAMOTO NORIAKI
IPC: H01L23/28
Filed: 1992-06-26
Abstract: PURPOSE:To prevent the peeling-off of a pad for outer lead of silicon gel filled type hybrid integrated circuit device. CONSTITUTION:A case material 10 for sealing an integrated circuit element has a frame shape approximately. Inside this outer frame 12, a pair of a wall body 14 is provided for dividing an integrated circuit substrate into an integrated circuit element mounting region 16 and an outer lead fixing region 18. The silicon gel is injected in a sol state to the integrated circuit element region 16 separated by a pair of wall bodies 14, thereafter, it is heat-treated and becomes silicon gel. By a pair of wall bodies for dividing to the integrated circuit element mounting region 16 and the outer lead fixing region 18, the permeation and scattering of silicon sol having high fluidity and permeability to the outer lead fixing region 18 can be prevented, and peeling-off of pad 38 for outer lead caused by the sticking of silicon sol to the outer lead fixing region 18 can be prevented.
Patent JP-S5694023-A (JP)
Title: Static pressure bearing and its manufacturing process
Inventor: OGASAWARA MASAZOU
IPC: F16C32/06
Filed: 1979-12-27
Abstract: PURPOSE: To keep the size and the shape of a static pressure bearing in high accuracy with ease by giving a lapping process in accordance with a taper master gauge in order to form facing parts of a shaft and a bearing in a tapered shape supplementary to each other.  
     CONSTITUTION: A spindle 11 is integrated with a tapered area 11A and a flange part 11B, and fitted free into a bearing 12. An inner circumferential area 12A confronting the tapered area 11A is given a lapping process to be formed in a tapered supplementary shape accordance with a taper master gauge after being cut and ground with a fixed accuracy, and the relative positions between axes of the spindle 11 and the bearing 12 are adjusted by a spacer to maintain a gap δ radially. This construction permits to keep the gap δ in high accuracy with ease and form a stable air film in the gap δ. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-H0334326-A (JP)
Title: Semiconductor wafer
Inventor: KIKUCHI HIROMASA
IPC: H01L29/02
Filed: 1989-06-29
Abstract: PURPOSE:To augment the yield of devices by increasing the gettering capacity of heavy metal impurity by a method wherein the device is formed on an epitaxial wafer having misfit dislocation caused by the difference between the lattice constant of a high concentration impurity diffused layer and that of an epitaxial layer. CONSTITUTION:High concentration impurity diffused regions 2 are formed on a P-type silicon substrate 1 e.g. having crystal surface of 100 and in specific resistance of 0.01OMEGA.cm by selective doping of an impurity in the concentration of around 1X10<20>atom/cm<2>. Next, an epitaxial film 3 10mum thick is deposited on the P-type silicon substrate 1. The epitaxial deposition process is performed at the deposition temperature of 1150 deg.C and the room temperature using a mixed gas of hydrogen silicon tetrachloride (SiCl4). diboron (B2H6) as an applicable gas. At this time, the specific resistance of the epitaxial film 3 is specified to be 10OMEGA.cm by adjusting the amount of diboron. Through these procedures, the production of particles from rear surface is avoided; the decline in the yield affected by the particles is restrained; and the gettering capacity is increased so that the decline in the yield due to the heavy metal pollution during the device formation process may be restrained.
Patent JP-2000003127-A (JP)
Title: Sign language teaching apparatus and computer readable recording medium recorded with sign language teaching program
Inventor: SAGAWA HIROHIKO
IPC: G09B21/00
Filed: 1998-06-17
Abstract: PROBLEM TO BE SOLVED: To provide an apparatus for effective learning of knowledge on sign language. SOLUTION: This apparatus states the information relating to the sign language at three levels of sign language words, sign language text and sign language sentences (conversation text) (111, 112, 113) and executes the display of the information on the sign language words, the sign language text and the sign language sentences by using the technique of sign language animation. The display of the information on the sign language is executed in three ways of the sign language words, the sign language text and the sign language sentences in accordance with the statements described above. As a result, the detailed display of the corresponding relations of the animation images of the sign language, the respective motions constituting the sign language and the Japanese language is made possible.
Patent JP-S5793582-A (JP)
Title: Semiconductor device
Inventor: HAIJIMA MIKIO
IPC: H01L29/93
Filed: 1980-12-03
Abstract: PURPOSE:To obtain a specific capacitance change in a semiconductor device by forming a defect in the second semiconductor region, forming a junction with the existing first semiconductor region and communicating the third semiconductor region formed at the periphery of the defect with the first semiconductor region. CONSTITUTION:A defect 5 is formed in the second conductive type second semiconductor region 4, and a junction is formed with the existing first conductive type first semiconductor region 2. The first conductive type semiconductor region 6 formed in the second semiconductor region 4 is communicated at least around the periphery of the defect 5 with the first semiconductor region 2. Thus, it can obtain the specific junction capacitance change.
Patent JP-S6228594-A (JP)
Inventor: KAWANISHI HIDETO
IPC: F16L27/12
Filed: 1985-07-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0610101-A (JP)
Title: Magnetic stainless steel
Inventor: SAITO YOSHINOBU
IPC: H01F1/14
Filed: 1992-06-26
Abstract: PURPOSE:To manufacture magnetic stainless steel combining excellent soft magnetic properties and corrosion resistance by preparing the magnetic stainless steel having a specified componental compsn. in which the content of Ti, B, S and Al is prescribed. CONSTITUTION:The magnetic stainless steel contg., by weight, <=0.05% C, 0.30 to 2.50% Si, <=0.50% Mn, 5.00 to 20.0% Cr, >0.50 to 3.00% Al, 0.01 to 0.50% Ti, <=0.03% S, <=0.04% N and 0.0005 to 0.01% B and furthermore contg., at need, one or more kinds among <=2.00% Cu, <=1.00% Nb and <=1.00% V and/or one or more kinds among <=0.30% Pb, <=0.03% Ca and <=0.20% Se, and the balance Fe with inevitable impurities is prepd. In this way, the magnetic stainless steel remarkably improved in soft magnetic properties and corrosion resistance can be obtd., which is useful as a material for a solenoid valve.
Patent JP-2000357509-A (JP)
Title: Nickel-hydrogen secondary battery
Inventor: TAGUCHI KOJI
IPC: H01M4/70
Filed: 1999-06-16
Abstract: PROBLEM TO BE SOLVED: To provide a nickel-hydrogen secondary battery with a high allowable current value, a high capacity, and a long cycle life. SOLUTION: The nickel hydrogen battery has a conductive substrate having a thickness of 30-100 μm and many pores having 30-70% porosity; and a negative electrode 4 containing a hydrogen storage alloy and having a density represented by formula: X=W/(V1-V2) of 4.5-6.5 g/cc. In the formula, W is the weight (g) of the hydrogen storage alloy, V1 is the apparent volume (cc) of the negative electrode, and V2 is the volume (cc) of the conductive substrate.
Patent JP-S5794487-A (JP)
Title: Producing device for spiral pipe
Inventor: OOMAE TAKASHI
IPC: B21C37/08
Filed: 1980-12-03
Abstract: PURPOSE: To perform welding without stopping a line and improve the productivity and  quality of spiral pipes by mounting a plate connection welding device on a carriage  which is freely travelable in the supply direction of a belt-like steel material for pipe  production.  
     CONSTITUTION: The spacing between a plane leveler 4 and edge trimmer 19 of an inlet  side line for a belt-like strip material is made long, and rails are laid therein, on which  a carriage 20 having a plate connection welding device 5 is moved. Just prior to the  starting of welding for connecting preceding and succeeding belt-like steel materials 7,  2 to themselves, the carriage 20 is stopped just behind the device 4, and clamping  devices 23a, 23b are held open. When the end part of the material 7 leaves an un-coiler  1, a new material 2 is fed by pinch rolls 3, and the line speed is decelerated. When the  trailing end of the material 7 approaches to the device 23a, this device is closed, and  the carriage 20 is run. The leading end of the material 2 is moved to catch up to the  end part of the material 7, and the trailing end part of the material 7 is cut and edge- prepared with a preceding gas cutter 22a. When the trailing and leading ends 8, 6 of  the steel materials approach, the clamping device 23b is closed, rolls 3 are opened, and  if necessary, they are worked with a preceding gas cutter 22b, after which the materials 2, 7 are joined. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-H0265867-A (JP)
Title: Method for adhering endothelial cell to surface of polymer and article
Inventor: JIYOERU ERU UIRIAMUZU
IPC: A61L33/00
Filed: 1989-06-30
Abstract: PURPOSE: To produce a surface with a dense layer of endotherium by bringing a plasma generated from a gas substance in contact with a polymer surface to change it to have a surface amino group, and providing the changed surface with endotherium to form a dense cell layer. CONSTITUTION: To easily perform adhesion of cells which irreversibly change the surface of an organic or mineral supporting substance, vaporized material plasma is in contact with the surface of an organic or mineral supporting substance so that a specified chemical specifies with functional groups is connected to the surface of the supporting substance, and the surface of the organic or mineral supporting substance is irreversibly changed. This can be utilized to change the surface of a natural high polymer and a solid polymer material including an addition polymer or a condensation polymer resulting from synthesis. Examples of this polymer material are polyethylene, polypropylene, etc. A preferable plasma used to change a surface in the cell adhesion adjustment is generated from ammonia containing low concentration oxygen.
Patent JP-S5693185-A (JP)
Title: Transfer pulse control system of charge transfer element
Inventor: SHIRAKI RIYUUZOU
IPC: G11C27/04
Filed: 1979-12-26
Abstract: PURPOSE: To realize a control for both the rising and falling times of a transfer pulse in accordance with the property of the CCD, by varying a control voltage to be supplied to a source electrode of the MOSFET which is contained in a charge/discharge route of a driving circuit.  
     CONSTITUTION: With an input of a low-level signal, the MOSFETQ 1  and Q 3  are turned on with Q 2  turned off respectively. And the load capacity CL is charged via Q 1  and Q 3 . In this case, if the control voltage VC connected to the source of Q 3  is varied, the voltage between the gate and the source of Q 3  varies to change the gm of Q 3 . Thus the charging current is controlled to realize a control of the rising time. On the other hand, both Q 1  and Q 3  are turned off with Q 2  turned on with an input  of a high-level signal. Accordingly, the charge of the capacity CL is discharged. In  the same way, the discharge current is controlled by varying the gm of the FET on  the discharge route to realize a control of the falling time. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-2000011187-A (JP)
Title: Method for recognizing graphics and device therefor and storage medium for storing graphics recognition program
Inventor: KONYA SEIICHI
IPC: G06T7/00
Filed: 1998-06-17
Abstract: PROBLEM TO BE SOLVED: To provide a graphics recognition method and device for quickly and highly precisely recognizing a straight line without necessitating a large amount of storage domain, and a storage medium for storing a graphics recognition program. SOLUTION: An image is inputted (S1), the edge information of the inputted image is detected (S2), the ridge of the edge is traced, and line-thinning is operated (S3), a parameter is calculated from the position and direction of the edge (S4), the strength of the edge is accumulated in a parameter space (S5), and the parameter in which frequency is concentrated is selected as a straight line (S6), and the selected straight line is outputted (S7).
Patent JP-S6062262-A (JP)
Title: Interchanging device with message function
Inventor: MIYAZAKI YOSHIBUMI
IPC: H04M11/00
Filed: 1983-09-13
Abstract: PURPOSE:To display a message consisting of a long character string on a display device with the limited number of digits by reading the contents of a message storage memory and displaying the read data on the character display device on a telephone set side. CONSTITUTION:A message to a specific telephone set is registered in the message storage memory 14 from a character input terminal equipment 12, and when a request to process the message is sent to an interchange control processor 15, command data is sent to the microcomputer 4 in the telephone set 1 through a subscriber control microcomputer 10 and data transmission interfaces 5 and 8. The schedule means (c) in the telephone set 1 makes a specific display on the liquid-crystal display device 2 by the liquid-crystal display means (a). Consequently, when the read of the message is requested, a processor 15 fetches a message of only characters many enough to display on the display device 2 at a time and sends it to the means (c). The means (c) displays the message on the display device 2 through the means (a).