baber/WOPTO huggingface dataset:
Patent JP-H11154790-A (JP)
Title: Enclosure device and its manufacture
Inventor: KAIRIKU YOSHINORI
IPC: H05K5/02
Filed: 1998-08-31
Abstract: PROBLEM TO BE SOLVED: To make an enclosure thin, compact, and light and at the same time improve shock resistance property, by providing a laminate structure body consisting of an outer contour-enclosure part with a specific shape and a shock absorption layer part being pinched at the outer-enclosure part. SOLUTION: An enclosure 21 for electronic equipment is a lamination structure body 32 whose surface is covered with metal foils 33 and 34 and also the metal foils 33 and 34 have proper stiffness, thus maintaining the shape of the enclosure 21. Then, the lamination structure body 32 is in a configuration with a viscoelasticity layer 35 consisting of the synthesis resin of a viscoelasticity body as a middle layer. Therefore, even if shock within a specific range is applied to the enclosure 21 or the enclosure 21 drops within a proper shock range, the viscoelasticity layer 35 is elastically deformed to absorb shock. Therefore, even if the enclosure 21 is made thin, shock is absorbed by the elastic deformation of the viscoelasticity layer 35, thus preventing crack and hence making thin, light, and compact an enclosure device.
Patent JP-H0968728-A (JP)
Title: Liquid crystal display element formed by using liquid crystal having spontaneous polarization
Inventor: TANAKA TOMIO
IPC: G02F1/137
Filed: 1995-08-31
Abstract: PROBLEM TO BE SOLVED: To improve the operating speed of an active matrix type liquid crystal display element which is formed by using liquid crystals having spontaneous polarization and with which gradation display is possible. SOLUTION: This liquid crystal display element has a substrate 11 on which pixel electrodes 13 and active elements 31 are formed in a matrix form, a substrate 12 on which common electrodes 14 facing these pixel electrodes 13 are formed and liquid crystals 17 which are arranged between the substrates 11 and 12 and have the spontaneous polarization Ps. The liquid crystal display element satisfies the equation 4.S.Ps/TS<=Ion when the area of the respective pixels is defined as S, the spontaneous polarization per unit area as Ps, the selection time of the respective pixels as TS and on-current of the active elements as Ion.  The on-resistance Ron of the element is expressed by the equation Vmax/Ion>=Ron when the max. value of the voltage impressed between the pixel electrodes 13 and the common electrodes 14 is defined as Vmax, the current flowing in the active elements as Ion and the on-resistance of the active elements as Ron.
Patent JP-2001067841-A (JP)
Title: Optical disc and optical disc playback apparatus
Inventor: IWAMOTO TAKESHI
IPC: G11B20/12
Filed: 1999-08-31
Abstract: PROBLEM TO BE SOLVED: To prevent one from forgetting to playback on one surface of a double-sided DVD. SOLUTION: A double side/single side identifying data showing the single or double side type is recorded on a lead-in of a DVD 2. When a desired disc is selected by an operating unit 9, a system controller 10 controls a changer 5 to take corresponding DVD 2 out of a disc housing 1 and sets it in a DVD playback unit 3, then controls this unit 3 to read information recorded on the lead-in and store, and, actuates an A indication element 7 of an indicator 6 to continuously light, if the double side/single side identifying data in the recorded information indicates the single side type, or actuates both A, B indication elements 7, 8 to continuously light, if indicating the double side type, thereby showing a double side/single side identifying indication for the user. Then it controls the DVD playback unit 3 to playback presentation information.
Patent JP-H0291941-A (JP)
Title: Formation of electrode wiring
Inventor: HAMASHIMA TOSHIKI
IPC: H01L21/3205
Filed: 1988-09-29
Abstract: PURPOSE:To avoid overhang so as to get rid of short circuit, etc., and to remove wire breaking completely by sending Ar gas which is cooled in the sputter vessel execute Al bias sputtering and filling in an opening with Al when forming electrode wiring at a specified part below an insulating film through a fine opening being opened in the insulating film. CONSTITUTION:An Al target part 12 having an inflow/outflow pipe pierced through the bottom is provided at the bottom inside a sputtering vessel 9, and at the ceiling opposed to this a substrate holder 11 having a cooling pipe 15 pierced through the ceiling is arranged, and a substrate is attached to the bottom of it. The bottom of the substrate 1 is coated with an insulating film 2, and an Al layer 4 is attached to the bottom of the film 2 by sputtering while burying a fine opening 3 being opened here. That is, while letting cooling water flow in the pipe 15 high frequency is applied to the holder 11 through this, and high frequency is also applied to the target part 12 and while letting Ar gas flow from an Ar gas supply port 14 the Al layer 4 is generated by sputtering.
Patent JP-S62106577-A (JP)
Title: Display device for cubic topographical map
Inventor: OBA AKIO
IPC: G06T1/00
Filed: 1985-11-01
Abstract: PURPOSE:To easily produce and display a topographical map picture by mapping the topographical pattern picture data on a topographical curved surface data showing the topographical projections. CONSTITUTION:The topographical pattern picture data is obtained on an original face SOR consisting of a two-dimensional plane based on the topographical pattern information DTP. At the same time, the topographical curved surface data SDF showing the topographical projections corresponding to the coordinates on the face SOR based on the topographical projection information DPH and the visual point position information DPOV. Then the topographical pattern picture data is converted by the data SDF and therefore the topographical pattern picture data is mapped on the topographical curves surface shown by the data SDF for production of a cubic topographical picture DIP. Thus it is possible even for an operator who has not such a skill to paint properly a topographical pattern on the topographical curved surface to easily produce a cubic topographical picture.
Patent JP-2000078084-A (JP)
Title: Optical signal quality monitoring device
Inventor: MIZUOCHI TAKASHI
IPC: H04B10/556
Filed: 1998-08-31
Abstract: PROBLEM TO BE SOLVED: To easily monitor the quality of optical signals with high efficiency and high accuracy by receiving the signals transmitted via an optical transmission system, identifying and reproducing the monitoring signal light out of those received signals and detecting errors based on the above monitoring signal light. SOLUTION: A clock extraction circuit 1 to an SOH termination circuit 7 detect the errors based on the identified and reproduced monitoring signal light and monitor the quality of transmission line of an optical communication system, i.e., the quality of a main signal STM-16. The monitoring signal light consisting of a signal STM-1 is received by a photodiode 102 having a band equivalent to the signal STM-16, a preamplifier 103 and a postamplifier 104, undergoes the band limitation via an equalizing filter 105 and is identified and reproduced by an identifier 107. The code error factor characteristic is equal to the signal STE-16 when the receiving electric band width does not vary although the monitoring signal light is equal or not equal to the signal STM-1.  Thus, the component element of this monitoring device can use a simple and small circuit of small power consumption that is used for the signal STM-1.
Patent JP-H0584125-A (JP)
Title: Electric bedclothes cover
Inventor: YONEYAMA MITSURU
IPC: A47G9/06
Filed: 1991-09-25
Abstract: PURPOSE:To provide functions of an electric blanket wherein the whole bedding is light-weight and easy to handle and excellent air conditioning effect is obtd. in a cover for electric bedclothes by forming a wiring circuit with supporting yarn knitted in a warp-knitted blanket, inserting and positioning a heating wire in the circuit, constituting an electric blanket part with a sheet of blanket and integrating the cover for the bedclothes and the electric blanket. CONSTITUTION:A cover 1 for electric bedclothes is constituted by inserting and positioning a heating wire 6 in a transverse wiring circuit 4 and a longitudinal wiring circuit 5 formed with a warp-knitted blanket 2 and supporting yarn provided on the warp-knetted blanket 2 and joining a surface cloth 3. The terminals of the heating wire 6 are connected with an electric source feeding circuit through a connector 7. Feeling for air conditioning is made pleasant by setting the distance of the circuit narrower at user's feet than at user's abdomen and breast when the cover for bedclothes is used.
Patent JP-H0669651-A (JP)
Title: Manufacture of ceramic circuit board
Inventor: FUKUDA JUNZO
IPC: H05K1/09
Filed: 1992-08-21
Abstract: PURPOSE:To provide a manufacturing method by which a ceramic circuit board can be manufactured so that its via hole conductors can have excellent electrical connecting properties. CONSTITUTION:Via holes 90 of a green sheet are filled with via hole conductors 11 and pattern conductors 12 and 13 are formed. An un-sintered ceramic sheet which is not sintered at the sintering temperature of the green sheet is prepared. Then the green sheet is put on another green sheet and the un-sintered ceramic sheet is put on the green sheets as the upper most and lowermost layers and a laminated body 99 is formed by thermocompression bonding them. Thereafter, ceramic substrates 91 and 92 are formed by sintering the green sheets 81 and 82 by heating the laminated body 99 at 800-1,000 deg.C. After forming the substrates 91 and 92, the un-sintered ceramic sheets are removed. The via hole conductors 11 are composed of 100 pts.wt. Ag and 0.5-5 pts.wt. W or Sb2O3 or W and Sb2O3.
Patent JP-S6398936-A (JP)
Title: Magnetron
Inventor: NOBUE TOMOTAKA
IPC: H01J23/22
Filed: 1986-10-16
Abstract: PURPOSE:To restrict the unnecessary radiation from the input/output part and to maintain a high operational rate, by providing a pair of strap rings connected alternately to plural vanes inside the plural vanes, and an antenna lead with an end connected to an optional vane. CONSTITUTION:Plural vanes 39 arranged radially in an anode cylinder 38, a pair of strap rings 40 and 41 mounted in the vanes and connected alternately to the vanes, and an output antenna 46 mounted in the axial direction of the anode cylinder are arranged, while an antenna lead 42 with one end connected to a specific position of the side surface of an optional vane in the axial direction of the anode cylinder, and the other end extended up to the output antenna is provided. By arranging the strap rings 40 and 41 inside the vanes 39, the electric field distribution in the antenna extending space is formed in a good shape, and the unnecessary radiation transmitting along the antenna lead can be restricted. And, since there is no strap ring at the side surface of the vanes, the antenna lead can be connected to the vanes closely to the operation space, the combination with the microwave energy can be made larger, and a high operational rate can be realized.
Patent JP-H03108460-A (JP)
Title: Blender for plural foodstuff
Inventor: SUZUKI KISAKU
IPC: A23L7/10
Filed: 1989-09-21
Abstract: PURPOSE:To obtain mixed rice excellent in flavor and gloss by rotatably supporting a stirring vessel having a stirring bar and attaching a blower in the neighborhood of a hole for air blast and exhaust opened at one end of the stirring vessel. CONSTITUTION:A stirring vessel 1 is formed into a cylindrical form and equipped with a stirring bar 2 oblique to the rotary axis thereof and the stirring vessel is rotated using a motor. An opening part 1a of the end part of the stirring vessel is used as a hole for charge discharge of boiled rice, ingredients, etc., of mixed rice and a disk lid 4 is attached to the upper part thereof using a fastening metal unit 5. And a blower is attached in the neighborhood of a hole 6 for air blast and exhaust.
Patent JP-S60143281-A (JP)
Title: Solenoid valve manifold
Inventor: NAGAI SHIGEKAZU
IPC: G05D3/12
Filed: 1983-12-29
Abstract: PURPOSE:To enable the control to be very quickly further smoothly performed, by constituting a solenoid valve manifold such that the solenoid valve manifold provides in itself a built-in control device having a storing and deciding function and enables a control signal to be fed mutually even between a plurality of the solenoid valve manifolds. CONSTITUTION:Under a condition such that predetermined voltage, current and fluid are respectively given from a power supply system 84 and a fluid supply system 86 through each manifold unit, a main controller 50 supplies a control signal through an optical fiber or lead wires 48. While the movement of a piston 56 in an actuator 54 is detected by a switch 64a or 64b, and the movement of a work 60 is also detected by a limit switch 62. These detection signals are once recorded in a sequence controller 44 while fed to the other manifold unit and the main controller 50 through a bus line 94.
Patent JP-H03107867-A (JP)
Title: Developer for electrophotography
Inventor: ISHIMARU SEIJIROU
IPC: G03G9/087
Filed: 1989-09-21
Abstract: PURPOSE:To improve fixing strength by making combination use of a toner contg. a thermosetting resin and a toner contg. the hardener of the thermosetting resin. CONSTITUTION:The toner contg. the thermosetting resin and the toner contg. the hardener of the thermosetting resin are used in combination. The thermosetting resin is exemplified by, for example, an epoxy resin, urea resin, melamine resin, etc. The use of the epoxy resin is preferable above all in order to enhance the adhesive strength of the toner. The hardener to be used varies with the kind of the resin to be used and the hardeners adequate for the respective resins are selectively used. The thermosetting reaction in addition to the fusion among the toners are induced by the heat treatment at the time of fixing and, therefore, the adhesive strength between the toners is improved.
Patent JP-S61125048-A (JP)
Title: Semiconductor device
Inventor: OWADA NOBUO
IPC: H01L29/43
Filed: 1984-11-22
Abstract: PURPOSE:To prevent the diffusion of silicon into an Al wiring from a silicon layer and to improve heat resisting property in the silicon layer so as to prevent damage and the like and to improve a yield rate, by providing a barrier layer for preventing the diffusion of silicon between multilayer Al interconnections and the silicon layer, which is connected to the wirings. CONSTITUTION:A contact hole 8 is formed in a D-RAM element using multilayer Al interconnection. A barrier layer 9 for preventing the diffusion of silicon is formed on the surface of an exposed source region 6. Patterned multilayer Al interconnections 10 are formed on the layer 9 and connected to the source region 6. The multilayer Al interconnection 10 are formed by upper and lower Al layers 11 and 12 and a different metal layer 13, which is sandwiched between the two layers. The upper and lower Al layers 11 and 12 are formed by an alloy including Si or Cu such as Al-Si, Al.Cu-Si or the like. As the intermediate different metal layer 13, a transient metal such as W is use. Meanwhile, as the barrier layer 9, e.g., platinum silicide, platinum alminide or the like is used.
Patent JP-S61125899-A (JP)
Inventor: TSUCHIYA YOKICHI
IPC: B43K19/02
Filed: 1984-11-22
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6488827-A (JP)
Title: Data processor
Inventor: MIMURA YOSHISUKE
IPC: G06F17/30
Filed: 1987-09-30
Abstract: PURPOSE:To reduce the number of times of comparison operation for retrieval of a 16-bit character string to a half by automatically discriminating whether each of characters constituting the character string as the processing object conforms to the 8-bit code system or the 16-bit code system. CONSTITUTION:An operator selects the 8-bit code system or the 16-bit code system as the code system of each character as the processing object by a character string type defining part 1 and stores the selected code system in a character string type storage part 2 and temporarily stores a corresponding character string in a character string input part 3. The head address of character string data is calculated in a character string storage part 4, and simultaneously, the character string to be retrieved is inputted from a retrieval indicating part 5 to the storage part 4 and is compared, and a retrieval control part 8 refers to contents of the storage part 2 to start an 8-bit character string retrieving part 6 or a 16-bit character string retrieving part 7 according as said contents are '8' or '16'. Thus, the comparison processing of 8 bits and that of 16 bits are selected to reduce the number of times of operation to a half, and accidental coincidence error on the way of retrieval is eliminated.
Patent JP-H0294978-A (JP)
Title: Vertical address generator for memory
Inventor: HIRATA TORU
IPC: H04N5/907
Filed: 1988-09-30
Abstract: PURPOSE:To reduce memory capacity by making the output of a second counter means into a vertical address to a memory. CONSTITUTION:When, for example, the 262H-th of an input video signal is written into the address '244' of the memory with the count value '244' of a second counter 15 used as a writing address, in the next odd-number field, the count number of the second counter 15 becomes '244' when the input video signal is 525H when this value is used as a reading address, and therefore, the delay quantity of just 263H is obtained when the output of the memory is 262H and the input video signal is 525H. By adding '1' to the output of the second counter 15 by an adder 20, reading out the result of the addition and using it as the address, the delay quantity for 262H is obtained. Thus, the memory capacity can be reduced.
Patent JP-S61123942-A (JP)
Title: Debug device for microprocessor
Inventor: YOSHIDA YOSHIO
IPC: G06F11/28
Filed: 1984-11-21
Abstract: PURPOSE:To use an present assembler or a compiler and to measure a test coverage at real time by providing receiving means of a symbol file, a flag memory and a coverage memory. CONSTITUTION:In measuring the test coverage, the symbol file is extracted at a symbol receiving means 14 at first and 1 and is written in address existing a symbol of flag memory 13. Next, address, data and write signal are outputted from a CPU 8 of a debug device to a coverage memory 2. A target CPU 1 is activated sequently and 0 is written in address of an instruction execution cycle. In this case, the extraction of hit ratio and non-hit symbol is possible by comparing the contents of previously memorized memory 13 with memory 2. Thus, this makes it possible to use present assembler or compiler and to measure the test coverage at real time.
Patent JP-S61126283-A (JP)
Inventor: NAKAMURA YOSHIKAZU
IPC: E04F19/02
Filed: 1984-11-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000074453-A (JP)
Title: Defrost controller for air conditioner
Inventor: SAKAGAMI TAKAO
IPC: F24F11/02
Filed: 1998-09-01
Abstract: PROBLEM TO BE SOLVED: To provide a defrost controller for air conditioner in which defrost operation can be entered at an optimal timing regardless of outer air temperature, indoor temperature or air volume. SOLUTION: The defrost controller for air conditioner comprises a duct temperature sensor 7, a highest duct temperature detecting section 21, an indoor temperature sensor 27, a reference temperature memory section 22 prestoring a plurality of reference temperatures for switching heating operation to defrost operation in correspondence with the indoor temperature and the highest temperature, a section 23 for setting one reference temperature out of the plurality of reference temperatures stored in the memory section 22 based on the indoor temperature and the highest temperature detected, respectively, through the indoor temperature sensor 27 and the detecting section 21,  and an operation control section 24 for comparing a set reference temperature with the duct temperature detected by the temperature sensor 7 and making a switch to defrost operation if the duct temperature is lower than the reference temperature.
Patent JP-2000080412-A (JP)
Title: Induction hardening equipment
Inventor: KISHIHARA SHIGEKI
IPC: H05B6/38
Filed: 1998-09-01
Abstract: PROBLEM TO BE SOLVED: To provide equipment for performing hardening by superiorly applying induction heating to the horizontally extending inclined surface to be hardened. SOLUTION: A hardening unit 31 equipped with an induction coil 40 having a shape surrounding a sliding part 45a to be hardened, is attached to a movable table 14 so that it turns around an axis 0, also the movable table 14 is held by a traveling truck 2 so that its position can be adjusted vertically and horizontally and the position and inclination angle of the hardening unit 31 are respectively adjusted so as to fit to the sliding part 45a. By the above procedure, the position of the induction coil 40 is positioned at the prescribed position surrounding the sliding part 45a. The traveling truck 2 is made to travel in this state, the induction coil 40 is made to travel along the long-size sliding part 45a by which the sliding part 45a is heated and hardened over the whole length.
Patent JP-S60139246-A (JP)
Inventor: TERAKURA MASAMITSU
IPC: A61G7/00
Filed: 1983-12-28
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0881749-A (JP)
Title: Hot dip galvanizing method for iron and steel processed product
Inventor: NAKAMURA ICHIRO
IPC: C23C2/32
Filed: 1994-09-14
Abstract: PURPOSE: To prevent the occurrence of ruggedness in the surface of a plating layer by applying vibrations to an iron and steel processed product immersed in a hot dip galvanizing bath. CONSTITUTION: A bar steel product, having hot rolling oxide scale sticking to 10-50μm thickness, is heated to 600-800 deg.C in an oxidizing atmosphere, by which sticking matter is burnt. The bar steel product is reduced in a reducing gas atmosphere. Then, the bar steel product is immersed in a hot dip galvanizing bath, and hot dip galvanizing is done while applying vibrations to the product. When the iron and steel processed product is reduced, the oxide scale is formed into spongy reduced iron. When the iron and steel processed product is immersed in a plating bath and subjected to vibration, the spongy reduced iron is peeled and dissipated by the friction with molten zinc. As a result, plating can be applied to the basis material of steel, and a smooth plating layer can be formed.
Patent JP-S62108556-A (JP)
Title: Semiconductor device
Inventor: NISHIKAWA AKIO
IPC: H01L23/29
Filed: 1985-11-06
Abstract: PURPOSE:To improve adhesive properties and glueing property by coating a semiconductor element and the upper section of a lead wire with a resin composition containing at least a fluorocarbon polymer containing nitrogen. CONSTITUTION:A semiconductor element and the upper section of a lead wire are coated with a resin composition containing at least a fluorocarbon polymer containing nitrogen. The fluorocarbon polymer containing nitrogen consists of a a principal chain represented by formula (II) (in formula, p and q represent an integer and a ratio thereof p/q is kept within a range of 2 or 16) composed of perfluorocarbon polymer chains and pendant chains represented by formula (I) combined with the main chain. In formula (I), X represents a fluorine atom, a chlorine atom or a -CF3 group, R<1> and R<2> represent a lower alkyl group or a tetramethylene group of a pentamethylene group integrally formed by R<1> and R<2>, and l represents an integer of 0 or 5, m 0 or 1 and n an integer of 1 or 5. Accordingly, adhesive properties, workability on molding and reliability on damp-proofing are improved.