Patent GB-995447-A (GB)
Title: Improvements in or relating to data communication systems
IPC: H04L12/54
Filed: 1962-05-17
Abstract: 995,447. Telegraphy. WESTERN ELECTRIC CO. Inc. May 17, 1962 [May 26, 1961], No. 19006/62. Heading H4P. A communication system comprises a switching centre 10, Fig. 1, connectable to a source of data 12, and a plurality of other switching centres 10 connected to said switching centre over trunks, said switching centre comprising a store, means for transferring messages having a plurality of data bits between the source and the store, and means for transferring messages one bit at a time between the store and preselected trunks in selected discrete time intervals in a recurrent cycle. General.-Each switching centre 10 includes a data processor 11 and is associated with a group of data sources 12, e.g. the branch offices of a company. Each message supplied by a source includes the addresses of the destinations to which the message is to be sent, the switching centre selecting one of a number of possible routes in order of preference and availability. Each message, either incoming or outgoing, which is being dealt with by a switching centre 10 is allocated a discrete time interval, called a message slot, in the recurrent cycle and one bit of each message is received or transmitted in the corresponding message slot in each cycle. Outgoing messages.-The text of the message together with the associated destination addresses is supplied to data processor 11, Fig. 2. The buffer coder 20 is then notified of the presence of a waiting message, and it in turn signals allotters 22 to seize a switch 23. The message control 27 in each switch detects the availability of an outgoing message slot storage area in the associated store 26, and when a suitable switch has been found and seized, buffer coder 20 commences to process the message. The text and addresses are checked, parity bits are added (see below), and the message is examined to determine whether it contains more than one address. If a message is to be routed to more than one address, it is transmitted repeatedly, each time to a different address. For each transmission the message is entered in store 26 with the appropriate address during a prescribed portion of an office cycle, and at the same time, the address is supplied to the trunk selector 31 to select the most preferred available trunk 24 out of the group allocated to that address. While a trunk is not being used for transmitting a message, an idle signal is continuously transmitted to the remote switching centre where it is checked for errors, and a corresponding idle signal is returned to the transmitting centre where it also is checked. If a predetermined number of errors are detected in a given timed interval the trunk is made busy. When an idle trunk 24 is selected, the idle signal is removed and the error checking system disabled, trunk selector 31 then supplying a binary number identifying the selected trunk to message control 27. Two control words associated with the message are entered in store 26. The first word includes the selected trunk number and word and bit counts which are up-dated each time a bit of the message is transmitted so that the words and the bits of each word are transmitted in sequence, and the second control word includes a message acknowledgment code. The address word begins with a start code by means of which the receiving centre is alerted. In a first office cycle the first control word is read out of store 26 during the allocated message slot and is subsequently used to enable the selected trunk 24 via translator 29 and to gate out the first bit of the address word. During succeeding office cycles the remaining address word bits are gated out one at a time during the allocated message slot, and subsequently the bits of the message text words are likewise transmitted. After transmission of the complete message the message is retained in store 26 so that if its is not correctly received at the remote centre, a re-run can be made. Incoming messages.-At the receiving switching centre each message control 27 monitors the associated store 26 to inform trunk scanner 32 whether any incoming message slots in the store are available. When trunk scanner 32 detects a start code, bit control 28 is requested to provide an incoming message slot. The incoming trunk number is then recorded in the message slot selected. During the bit transfer interval assigned to the selected message slot of the next office cycle, the incoming trunk 25 is enabled by bit control 28 and translator 29 to provide the first bit of the message for storage in the allocated message slot area of store 26, successive bits being directed to the appropriate storage locations under control of the first control word which is modified after each office cycle. After the entire message has been stored it is transferred word by word from store 26 to buffer coder 20 during a message transfer interval of the allocated message slot in a succeeding office cycle. Buffer coder 20 checks the message, and if it is free from errors, transfers it to data processor 11. An appropriate acknowledgment is transmitted from the second control word in store 26 to the transmitting centre to reset that part of the equipment associated with the transmission of the message. If the message is found to be incorrect an unfavourable acknowledgment is returned bit by bit and the equipment at the receiving centre is made idle. The start code of the acknowledgment is recognized at the transmitting centre, the acknowledgment is stored and examined. If the acknowledgment is satisfactory the message which was returned in store 26 is deleted and the corresponding message slot made idle, but if the acknowledgment is unsatisfactory the message is retransmitted, the operation being as before except that trunk selector 32 is forced to select a different trunk. Parity checking.-A parity bit is calculated from a number of bits selected from an address or message text word. For example, numbering the word bits 1-10 and the parity bits P 1 -P 8  Parity bits P 1 -P 3  are derived from bits numbered 2, 3, 1 respectively in the modulo 3 row, and bits P 4 -P 8  are obtained from bits numbered 1-5 respectively in the modulo 5 row. Further parity bits using a third modulo are similarly derived, and the resulting parity bits are themselves subjected to a similar routine in order to check the accuracy of a message.