Patent GB-687063-A (GB)
Title: Improvements in pulse code modulators for telecommunication systems
Inventor: OXFORD ALAN JOHN HENRY
Filed: 1949-05-26
Abstract: 687,063. Pulse code modulation. NATIONAL RESEARCH DEVELOPMENT CORPORATION. May 24, 1950 [May 26, 1949], No. 14157/49. Class 40 (v). In a communication system, a code signal representing a given magnitude comprises a pulse code signal representing the magnitude to a predetermined degree of accuracy and a further continuously variable signal representing the residual error. In the embodiment described, the further signal is a variable duration pulse. The master oscillator 11, Fig. 1, has a basic frequency represented by the curve (a), Fig. 2, and produces pulses (b) at the same recurrence frequency, which are applied to the gate circuit 6 to provide the code pulses. Pulses (b) are also fed to the frequency divider 10 which produces pulses (c) and (d) of one-fifth the recurrence frequency, which are suitably selected for application to a signal sampling circuit 3, fed with signals from a microphone 1. Each sample amplitude is fed to an integrating circuit 4, the output of which is compared, in the slicer circuit 5, with a datum voltage equal to half the maximum amplitude to be transmitted. Pulses to provide the pulse code signal are passed by the gate circuit 6 to the output terminal 7, when the integrator circuit output exceeds the datum voltage. After the first comparison, the voltage in the integrator circuit is changed by pulses from the switch circuit 8 which are positive (g) if no code pulse has been transmitted for the previous comparison or negative (h) if a pulse has been transmitted. The added pulses are successively of amplitudes resulting in an addition or subtraction of half and a quarter of the datum voltage to the integrator. These modifying pulses are derived by shock-exciting a damped tuned circuit LC by pulses from divider 10 through diode D1. The positive half-waves of the resulting damped wave (f) are fed through diode D2 to the paraphase amplifier 9, the two outputs of which are applied to the switch circuit 8. After three comparisons, the three-unit pulse code having been generated, a circuit 12 controlled by the divider 10 produces a long pulse (e) which is fed to the gate circuit 6 and to the paraphase amplifier 9. If the integrator voltage exceeds the datum voltage, the pulse (e) is fed to the output terminal 7 until the integrator voltage is reduced to the datum level by the negative pulse from the paraphase amplifier 9, at which time the output pulse is terminated. If, however, the datum voltage exceeds the integrator voltage, the latter rises due to the positive output from the paraphase amplifier 9 until it reaches the datum, at which point the circuit 6 opens to transmit the remainder of pulse (e) to the output terminal 7. Thus the final pulse of each group representing a signal sample is duration modulated by the residual difference between the datum voltage and the integrator voltage at the conclusion of the coding operation. The invention is a modification of that described in Specification 664,401, which describes some of the circuits referred to. The residual voltage difference may alternatively be used to modulate the frequency or phase of a radio frequency used for transmitting the code pulses.