Patent GB-778722-A (GB)
Title: Improvements in or relating to circuits for recording and re-transmitting coded information
IPC: G06F7/02
Filed: 1954-04-30
Abstract: 778,722. Pattern-movement stepping registers. PHILIPS ELECTRICAL INDUSTRIES, Ltd. April 30, 1954 [May 5, 1953], No. 12607/54. Class 106 (1). [Also in Group XXXIX] A bi-stable circuit which consists of a magnetic amplifier arrangement having a high degree of feedback, or a ferro-resonant circuit utilizing non-linear inductance and capacitance either singly or together, or a transistor with its emitter and collector electrodes joined by a capacitor, produces according to its stable operating condition a high or a low reference potential which is compared by a voltage pulse with a comparison potential corresponding in value to either one or the other of the reference potentials, the arrangement being such that the voltage pulse causes the circuit to change to its other stable condition if the compared potentials are found not to correspond. A number of bi-stable circuits may be combined to form a shift register. The bistable magnetic amplifier arrangement is shown in Fig. 1 and comprises A.C. windings L energized from a source G, a feedback winding Y carrying rectified current, and a D.C. bias winding GW. An R.C. combination and a rectifier RF in the A.C. circuit provides a D.C. reference potential V1 or V2 at point M with respect to earth according to the stable operating condition of the amplifier. Corresponding high and low comparison potentials V1 or V2 are selectively applied to a comparison point Q by a switch S. Comparison of the potentials at points M and Q is effected by a pulse IG having a value between V1 and V2 which is applied over a tapped amplifier winding W to normallyblocked rectifiers H0, H1. If the potentials differ, the rectifier associated with the lowpotential point V2 conducts and the bi-stable circuit is changed to its other stable condition by current flow through one part a or b of the tapped winding. Point M then has the same potential as Q. If these potentials are the same and of low value (V2), both rectifiers H0, H1 conduct without effect on the bi-stable circuit as the winding W is differentially energized. Once the circuit has been acted on by a pulse, further pulses have no effect unless the position of switch S is changed. Instead of the feedback amplifier, a ferro-resonant circuit, Fig. 5 (not shown), as described in Specification 740,284, [Group XXXVII], may be used. A number of such ferro-resonant circuits I-III each having a non-linear inductance K1-K3 may form a shift register, Fig. 4. Each inductor K has A.C. windings L1, a bias winding GW, a tapped winding W and a winding RW for reading-in binary information. Initially the stable condition of each circuit I-III is determined by the direction in which its winding RW is energized, and each point M1-M3 will have a potential V1 (high) or VO (low) depending on whether a binary one or zero is stored. Each winding W has one part b connected to the point M1-M3 of the associated circuit through a rectifier H<SP>1</SP>1-H<SP>1</SP>3 and the other part a connected to the M point of the preceding circuit through a rectifier H<SP>11</SP>1- H<SP>11</SP>3. As circuit I has no preceding stage, the part a is connected through a rectifier HO to a fixed potential VO representing a binary zero condition. Each time a shift pulse IG having a value between V1 and V0 is applied to the tapping of winding W, the stored information is shifted one step to the right and a binary zero is introduced in circuit I by the fixed potential. The individual ferro-resonant circuits respond to the pulse as previously described, the potentials at the points M of a particular stage and its preceding stage representing the reference and comparison potentials at points M and Q. In the case of the first stage the comparison potential is VO. The response of each trigger circuit to a pulse may be summarized as follows : (i) If a circuit stores a binary one and the preceding circuit a binary zero, the respective reference and comparison potentials at points M will be V1 and V0 and pulse IG will energize part a only of winding W. The circuit will be triggered to the binary zero condition. (ii) If a circuit stores a binary zero and the preceding circuit a binary one, the respective reference and comparison potentials will be VO and V1. Part b of winding W will be energized by the pulse and the circuit will be triggered to the binary one condition. (iii) If a circuit and its preceding stage both store a binary one, both points M will have a potential V and the pulse will have no effect. The circuit remains in the binary one condition. (iv) If a circuit and its preceding stage both store a binary zero, both points M will have a potential V0 and the two parts of winding W will be energized differentially. The circuit remains in the binary zero condition. A switch S is included in the register and in its alternative position permits retention of the stored information during shifting operations. This switch may alternatively be employed to enter information by selectively connecting potentials V1 or V0 representing a binary one or binary zero to the first stage and at the same time shifting the information along the register by pulses IG. A modification is to substitute a single rectifier for the rectifiers such as H<SP>1</SP>1, H<SP>11</SP>1 common to the points M1-M3, Fig. 7 (not shown). A register in which information may be shifted in either direction is shown in Fig. 8. In this arrangement, shift to the right depends on the potentials at points M1-M3 and shift to the left on the potentials at points N1-N3, these potential groups being detected, according to the polarity of the shift pulse IG, by way of rectifiers H1-H3 and F1-F3 respectively. In a modification, Fig. 12, the two groups of points M1-M3 and N1-N3 are associated with separate tapped windings W and V pertaining to positive and negative shift pulses respectively, each winding including a pair of rectifiers corresponding to the rectifiers H0 H1 in Fig. 1. The ferro-resonant circuit may alternatively employ non-linear capacitance, Fig. 10. As shown, non-linear capacitors C1, C2 are connected to an A.C. supply G in association with inductors, constituted by transformers S 1, S2 and S3, harmonic outputs being obtained from the transformer secondary windings. Bistable operation is obtained by suitable choice of a bias voltage G0 and by application of triggering pulses at T. A number of such circuits may be incorporated in a shift register, Fig. 9, in which the bias voltage G0 is applied across linear condensers CG1-CG3 associated with the ferro-resonant circuits. A shift pulse having a potential in excess of G0 is applied to each circuit over a tapped resistor R1-R3. As previously described, the pulse compares the reference potential at point M1-M3 of a circuit with the comparison potential at the corresponding point of the preceding stage. If these potentials are found to differ, a triggering potential is set up across a condenser C by current flow through one of the parts a and b of resistors R1-R3. If both parts carry current the resultant potential is zero. A ferro-resonant circuit comprising a non-linear inductance L, Fig. 11, may be modified so that the voltage required to effect a change from one stable state to the other is adjustable. This is effected, as shown, by controlling with variable resistor RT a rectified current corresponding to the voltage across the non-linear element. Since the arrangement constitutes a feedback circuit, the direction of rectification influences the rate of transition from one of the stable conditions to the other. Transistor trigger circuits may alternatively be employed, a single circuit being shown in Fig. 14 in which a transistor T is associated with potentials G1, G2 through resistors R1- R3 and has its collector and emitter electrodes c, e shunted by a condenser. The circuit responds in accordance with the polarity of a pulse IG applied across R3 to the base electrode b. A shift register employing transistors is illustrated in Fig. 13 and comprises a transformer Tr1-Tr3 associated with each trigger circuit. The IG pulses compare the reference and comparison potentials over the primary windings P1-P3 and their associated rectifiers, while the triggering potential is applied to the transistor bases over secondary windings S1-S3 and delay circuits RC1-R3C.