baber/WOPTO huggingface dataset:
Patent TW-382868-B (TW)
Title: Methods and apparatus for high-speed data transfer that minimizes conductors
Inventor: DOVE JASON W
IPC: H04L12/56
Filed: 1997-11-27
Granted: 2000-02-21
Abstract: A cell bus, which reduces the number of conductors required to transfer data in a telecommunications switching fabric, contains a plurality of conductors data [X:O], for transmitting information. A cell bus interface generates a cell bus frame that includes  a plurality of words, ""X"" bits in length, of both data and control information that includes, in part, routing information for the data. As a result of encapsulating data and control information into and cell bus frame for transmission on the Data [X:O] conductors, the number of conductors required to transmit data is reduced. An asynchronous transfer mode (ATM) switching fabric, which includes a plurality of cell buses configured in a point to point fashion between a cell routing unit (CRU) / ATM-fiber bank interface unit (AFIU) and a plurality of optical line units (OLUs), is also disclosed.
Patent TW-392229-B (TW)
Title: Method of manufacturing semiconductor device and apparatus for same
Inventor: ENDO MASATAKA
IPC: G03F7/075
Filed: 1998-01-20
Granted: 2000-06-01
Abstract: The present invention discloses a method to avoid the formation of a insoluble layer on the surface of anti-corrosion agent. In a clean room, after conducting a surface treatment on the surface of a semiconductor substrate with 4-trimethylsiloxy-3-penten-2-one, the treated surface of the semiconductor substrate is located with a chemically amplified resist, thereby forming a first resist film. Then, the first resist film is successively subjected to exposure, PEB and development, thereby forming a first resist pattern of the chemically amplified resist. Next, in the same clean room, after conducting a surface treatment on the surface of the semiconductor substrate with 4-dimethyl-n-hexylsiloxy-3-penten-2-one, the treated surface of the semiconductor substrate is coated with a non-chemically amplified resist, thereby forming a second resist film. Then, the second resist film is successively subjected to the exposure, the PEB and the development, thereby forming a second resist pattern of the non-chemically amplified resist.
Patent TW-389000-B (TW)
Title: Enclosed stoage battery and its manufacturing method
Inventor: IWAMURA AKIRA
IPC: H01M50/541
Filed: 1998-03-20
Granted: 2000-05-01
Abstract: An enclosed storage battery having an excellent closed tightness and reliability is obtained. An annular bump is formed integrally with the upper periphery of the penetration hole of a lead-alloy bushing buried in the top of the lid for covering the jar The leading end of the pole passing through the penetration hole of the bushing is inserted into the lower part of the annular bump. A recess is formed on the top of the leading end of the pole so as to be easier to melt the upper portion of the pole, and by welding with the inner wall of the penetration hole of the busing, the annular bump is later melted, and the bushing penetration hole is filled up with the fused lead.
Patent TW-373369-B (TW)
Title: Frequency multiplication circuit and the method thereof
Inventor: ZHOU HUANG-CHENG
IPC: H03L7/16
Filed: 1998-03-25
Granted: 1999-11-01
Abstract: This invention uses the duty cycle control circuit and the edge sensor combination to form an N frequency multiplication circuit, wherein 50% duty circle of output signal can be picked up. The first level (N-1) duty cycle control circuit connected in parallel adjusts duty cycle phases to match the output signals of 1/N, 2/N, ..., N-1/N levels respectively. Then, it detects the rising edge and falling edge of 1/N output signal, and the falling edge for the rest of the output signals from 2/N to N-1/N. Then, all the single-shot signals are combined and passed through an OR gate, so that the frequency becomes N times the input signal. Lastly, it adjusts the final output signal to 50% duty cycle using a second level duty cycle control circuit, thus achieving 50% duty cycle of N frequency multiplication.
Patent TW-382794-B (TW)
Title: Dispensing pump for epoxy encapsulation of integrated circuits
Inventor: LEWIS ALAN
IPC: H01L21/56
Filed: 1998-03-27
Granted: 2000-02-21
Abstract: A dispensing pump for dispensing liquid, particularly suitable for dispensing two-part epoxy for encapsulation of integrated circuits, includes a pumping chamber in communication with a nozzle via a three way valve, the pumping chamber including an outlet, an internal volume, a pair of spaced directional seals located away from the outlet, an open volume reciting between the seals and an external port opening the open volume to atmosphere. A stepped plunger extends axially within the pumping chamber, with a first portion sized to be received and aligned through the first directional seal, the plunger being movable to move the first portion toward the outlet to close off the internal volume at the second seal. The second portion of the plunger is relatively smaller in transverse cross-sectional dimension than the inside diameter of the second seal, to cooperate with the port to promote fluid removal from the internal volume during initial filling and priming of the pumping chamber. Once filled and primed, the plunger causes positive volume displacement of liquid from the pumping chamber and out of the nozzle, with very good repeatability and high fluid flow rates, independent of material viscosity, and/or temperature or viscosity changes. For refilling, the plunger is retracted from a volume which corresponds to the volume of material refilled into the internal volume.
Patent TW-416058-B (TW)
Title: Novel flash memory array and decoding architecture
Inventor: LEE PETER WUNG
IPC: G11C16/30
Filed: 1998-04-10
Granted: 2000-12-21
Abstract: A flash memory circuit having a word line decoder with even and odd word line latches and a source line decoder with a source line latch is disclosed. The word line decoders and source line decoder provide the capability of erasing the memory cells of two adjacent word lines in a flash memory simultaneously and verifying the memory cells word line by word line. By erasing two adjacent rows simultaneously, the embodiments of this invention eliminates over-erasure and source disturbance problems associated with conventional flash memory circuits. The decoding architecture provides flexible erase size that can be form a pair to a large number of multiple pairs of word lines. By dividing the memory cells of a word line into a number of segments, the decoding circuit further provides the capability of selecting the memory cells of a word line segment for erasing.
Patent TW-439111-B (TW)
Title: Discharging method and processing apparatus having discharging function
Inventor: TATEYAMA KIYOHISA
IPC: H01L21/00
Filed: 1998-04-28
Granted: 2001-06-07
Abstract: A processing apparatus, having a discharging function, comprises processing mechanisms for providing processes to an object to be processed, a object holding section for holding the object to be processed, a standby section for placing a member having an electrostatic neutralizing function in a standby condition, transfer mechanisms for selectively transferring the object to be processed and the member having the electrostatic neutralizing function to/from the processing mechanism, and controller for controlling the transfer mechanisms so as to make the member having the electrostatic neutralizing function to flow into the apparatus at a flow of at least a part of a process flow of the object after completion of processing a predetermined number of objects. As a result, the apparatus is discharged by the member having the electrostatic neutralizing function.
Patent TW-352416-B (TW)
Title: Camera apparatus
Inventor: NAKAGAWA YUTAKA
IPC: H04N1/21
Filed: 1998-05-29
Granted: 1999-02-11
Abstract: A camera apparatus includes: an optical system; an imaging device for converting light signals of the object from the optical system into electrical signals; an A/D converter for converting the electrical signals from the imaging device into digital picture data; a data compression unit for compressing the picture data from the A/D converter in a pre-set style based on a software program; and a data conversion unit for converting compressed data from the data compression unit into data of a pre-set style that permits recording on a recording floppy disc.
Patent TW-396303-B (TW)
Title: Programmable logic controller seismic support bracket for nuclear applications
Inventor: SENECHAL RAYMOND R
IPC: H05K7/14
Filed: 1998-05-29
Granted: 2000-07-01
Abstract: To prevent damage to the electrical connections between PLC modules and a backplane during seismic and other vibrational disturbances, a bracket is used having two parallel side members attached to the backplane and a lower support bar connected between the side members to support the PLC modules in the vertical direction. An upper support bar may also be provided between the side plates to hold the PLC modules in the bracket and further prevent vertical movement. The upper and lower support bars may also provide vertical menbers or a rest in contact with the PLC modules and having a high coefficient of friction to prevent lateral movement of the PLC modules with respect to the backplane.
Patent TW-402806-B (TW)
Title: Voltage control oscillator circuit and disk regeneration apparature
Inventor: OKUBO MAMIKO
IPC: H03L7/081
Filed: 1998-06-25
Granted: 2000-08-21
Abstract: This invention provides the voltage control oscillator (VCO) circuit which uses at least one basal timepulse to acquire any oscillation frequency signal outside the classification ratio 1/2 <n> and use the disk regeneration apparature of the said circuit. The solving means: there is the circular shaped oscillator formed by the first delay grid groupA and the second grid groupB according its delay quantity to determine the oscillation frequency and the switching7 from the second grid group to select the delay grid number in the VCO circuit; the same value with the first control voltage DCV used as the second control voltage Vin, when inputing into the gate of the second delay grid, it determines the deserted oscillation frequency according to the ratio of the first delay grid number and the second delay grid number. It could correspond to the overall regeneration speed with two kinds of setting delay grid number ratio using one basal timepulse.
Patent TW-396343-B (TW)
Title: Non-volatile semiconductor storage device
Inventor: HIRAKAWA TSUYOSHI
IPC: G11C16/02
Filed: 1998-06-26
Granted: 2000-07-01
Abstract: There is disclosed a non-volatile semiconductor storage device, which comprises: a memory cell to store m or more bits (m>=2) of data and to be given of n kinds (n>=4) of threshold voltages by raising its threshold voltage in writing; wherein, when a write data ""1"" is to be written in the memory cell that a k bit of m bits (1<=k<=m) in a pre-write data has ""0"", the write data is converted into data ""0"".
Patent TW-397981-B (TW)
Title: A ferroelectrics semiconductor random access memory device and the data's method of protecting
Inventor: JEON BYUNG-GIL
IPC: G06F12/16
Filed: 1998-07-09
Granted: 2000-07-11
Abstract: A nonvolatile ferroelectrics semiconductor random access memory device and a method for protecting ferroelectrics memory cell capacitors from data damage are provided. The contents of the FRAM  cells are protected against damage when a power supply voltage goes lower than a predetermine threshold voltage level. Since chip power off time is about several milliseconds and it takes several nanoseconds for a memory chip to perform a normal operation such as a read/write operation, the memory device completes the current read/write operation during either unexpected power down or power off mode, thereby protecting data stored in ferroelectrics memory cells against damage when a power supply voltage goes down.
Patent TW-382682-B (TW)
Title: Improvements in or relating to liquid crystal displays
Inventor: WATSON DAVID STEWART NIMMO
IPC: C03B33/033
Filed: 1998-07-23
Granted: 2000-02-21
Abstract: A custom made liquid crystal display is formed from a pre-manufactured liquid crystal display (10) by removing an excess region (23). The driver card (20) is cut along the line X-X and the excess TABs are disconnected from the conductive layer (18). Optionally, a narrow strip is removed from each of the polarising substrates (15,16) between the lines (22,25) to expose their associated glass plates (12,13). A groove (32) íV see Figure 10 íV is then cut into the exposed surface of each of the glass plates (12,13) along the line X-X. Each glass plate (12,13) is then fractured along the base of its groove (32) so that the excess region (23) is detached from the operative region (24). The cut edges of the glass plates (12,13) are then sealed by applying a bead of ultra-violet curing adhesive. The processes of removing an excess region (23) by cutting the glass plates (12,13) with a laser or by freezing the liquid crystal between the glass plates (12,13) with a laser or by freezing the liquid crystal between the glass plates (12,13) and machining through the glass plates (12,13) are also described.
Patent TW-373378-B (TW)
Title: Address defining frequency reducer control signal receiving method and control apparatus of polypoint multi frequency transmitting system
Inventor: HUANG DA-SHENG
IPC: H04N1/00
Filed: 1998-07-31
Granted: 1999-11-01
Abstract: This invention relates to a kind of address defining frequency reducer control signal receiving method and control apparatus of polypoint multi frequency transmitting system. Applies simultaneous system time, to define address frequency reducer for knowing when the head terminal control system send command data to improve its efficiency, and the head terminal control system also knows when the address defining frequency reducer received the sent command, to increase the efficiency of head terminal address defining control system; the said address defining control device comprises micro control unit, digital frequency adjust and de-adjust apparatus, 3-dimensional multi function device, DC power stabilizer, coupler, memory, quartz oscillator and switch, achieving the installation of the address defining frequency reducer, and can receive and view sectional timing program under non-authorized use condition, to achieve advertising effect.
Patent TW-399181-B (TW)
Title: Video data editing apparatus and computer-readable recording medium storing an editing program
Inventor: NAKATANI TOKUO
IPC: H04N9/806
Filed: 1998-09-17
Granted: 2000-07-21
Abstract: During video editing, video data is recorded in continuous areas of at least a predetermined length on an optical disc to ensure that the display of video images is uninterrupted. A first segment, out of a plurality of segments recorded on an optical disc, whose consecutive area on the optical disc is shorter than the predetermined length is detected. Re-encoded data that is to be reproduced either immediately before or immediately after the detected first segment is recorded next to the first segment. If the combined continuous area of the first segment and the re-encoded data is still below a predetermined length, the segment that is to be reproduced on the other side of the re-encoded data to the first segment is recorded on the optical disc so as to be positioned on the other side of the re-encoded data, thereby increasing the continuous length of the recording area beyond the predetermined length.
Patent TW-541360-B (TW)
Title: Electrosynthesis of hydroxylammonium salts and hydroxylamine using a mediator, a catalytic film, methods of making the catalytic film, and electrosynthesis of compounds using the catalytic film
Inventor: SHARIFIAN HOSSEIN
IPC: C25B1/00
Filed: 1998-10-17
Granted: 2003-07-11
Abstract: In one embodiment, the present invention relates to a method of making a catalytic film comprising: applying an electric current to an electrochemical cell comprising an anode, a cathode and a solution comprising a film forming compound and a nitrate ion source thereby forming the catalytic film. In another embodiment, the present invention relates to a method of preparing a hydroxylammonium salt, involving the steps of: providing an electrochemical cell containing an anode, a cathode, and a divider positioned between the anode and the cathode, to define a catholyte compartment between the cathode and the divider and an anolyte compartment between the anode and the divider; charging the catholyte compartment with a first solution comprising a nitrogen containing compound and a mediator and the anolyte compartment with a second solution comprising an ionic compound; passing a current through the electrochemical cell to produce a hydroxylammonium salt in the catholyte compartment; and recovering the hydroxylammonium salt from the catholyte compartment.
Patent TW-404891-B (TW)
Title: The structure of ink-jet print-head and the manufacture method thereof
Inventor: LI YI-SHING
IPC: B41J2/16
Filed: 1998-10-23
Granted: 2000-09-11
Abstract: A kind of structure of ink-jet print-head and the manufacture method thereof; firstly, provide the substrate and deposit alternately different kinds of metal material on the substrate as the multi-layer heater layer. Next, deposit the conductive layer on the multi-layer heater layer and patterning it. Next, deposit alternately different kinds of silicon compound material on the conductive layer and multi-layer heater layer as the multi-layer passivation layer. Next, deposit the surface passivation layer on the multi-layer passivation layer. Using the structure of multi-layer passivation layer to decrease the pinhole density, increase the fracture toughness and flexural strength of the passivation layer and improve thermal conductivity property.
Patent TW-434432-B (TW)
Title: Optical waveguide path grating and method of manufacturing it
Inventor: ENOMOTO TADASHI
IPC: G02B6/34
Filed: 1999-01-05
Granted: 2001-05-16
Abstract: The present invention relates to an optical waveguide path grating, the optical fiber of which has a clad area 12 on the circumference of the core area 11, along the optical axis direction of said core area 11 is generated a periodic refractive index change within a specific range 13. The core area 11 is composed with GeO2-P2O5-SiO2 system, for example, and clad area 12 is composed with Si O2, the common addition ratio in core area 11 being adjusted, and the temperature dependency of the characteristics reduced. The addition of P2O5 in core area 11 is desirably between 1/15 and 1 time the addition of GeO2, and preferably between 0.6 and 1 time.
Patent TW-418093-B (TW)
Title: Modified superabsorbent based on polyacrylonitrile emulsions
Inventor: SCHAPOWALOV SERGEJ
IPC: C08F8/00
Filed: 1999-02-02
Granted: 2001-01-11
Abstract: Superabsorbing polymers based on crosslinked or uncrosslinked, finely divided polyacrylonitrile emulsions, characterised in that the surface of the polymer particles is modified by crosslinking and simultaneous immobilisation of silica in the crosslinked surface structure.
Patent TW-392039-B (TW)
Title: Controlling apparatus and its controlling method for model engine
Inventor: MATSUDA NORIO
IPC: F02D31/00
Filed: 1999-05-04
Granted: 2000-06-01
Abstract: This invention provides a controlling method for model engine that ensures steadiness in running and that sufficiently conserves fuel under low speed. A fuel injection system 60 for a model engine has the injection period varied to control the amount of fuel per engine cycle. An intermittent fuel injection determining means 61 determines whether the above-mentioned period is less than the minimum injection period controllable by the fuel injection system. If the injection period drops below a set minimum, based on an intermittent datasheet 65 corresponding to the intermittent injection period and the intermittent injection data, an intermittent selection means 62 selects an intermittent injection data corresponds to the injection period. Based on the selected intermittent injection data and the timing signal from an injection timing generating means 66, using a controllable injection period fuel injection means 60 as an intermittent fuel injection, thereby increasing steadiness under lower speed ranges. Because the fuel is sufficiently conserved under lower speed ranges, fuel is not wasted and can improved reaction in high acceleration.
Patent TW-424104-B (TW)
Title: Trisaryl-1,3,5-triazine ultraviolet light absorbers containing hindered phenols
Inventor: GUPTA RAM B
IPC: C08K5/3492
Filed: 1999-06-17
Granted: 2001-03-01
Abstract: This invention relates generally to hindered phenol-substituted triazines and the use thereof to protect materials such as coatings, polymers, resins, organic compounds and the like against degradation by environmental forces, inclusive of ultraviolet light, actinic radiation, oxidation, moisture, atmospheric poltutants and combinations thereof. The new class of hindered phenol-substituted triazines includes a trisaryl-1,3,5-triazine in which one of the aryl groups is substituted by a group which comprises a hindered phenol or is a hindered phenol and is further substituted by a hydroxyl group, either free or blocked to form a latent stabilizer, ortho-to the point of attachment to the triazine. These materials may, under the appropriate circumstances, form oligomers. A method for stabilizing a material by incorporating such hindered phenol-substituted triazines is also disclosed.
Patent TW-413890-B (TW)
Title: Manufacturing method of shallow trench isolation
Inventor: MAU BEN-LIANG
IPC: H01L21/76
Filed: 1999-06-28
Granted: 2000-12-01
Abstract: There is disclosed a manufacturing method of shallow trench isolation, which comprises: providing a substrate sequentially formed thereon a pad oxide and a hard mask layer; removing part of the hard mask layer, the pad oxide and the substrate so as to form a trench in the substrate; locating the substrate in an ozone environment and irradiating the substrate with ultraviolet rays to form a pad oxide along the trench surface; and then, filling an insulated plug in the trench.
Patent TW-490539-B (TW)
Title: Thread-forming pipe plug
Inventor: DONOVAN STEVEN P
IPC: F16L55/10
Filed: 1999-07-12
Granted: 2002-06-11
Abstract: The invention provides a plug and fastener (10, 110, 210, 310, 410, 510, 610, 710, 810, 910, 1010, 1110) and method for sealing in an opening (20) in a workpiece (P). The plug and fastener includes a shank (12) having a threaded portion (14, 114, 214, 314, 414, 514, 614, 714, 814, 914, 1014, 1114) for engaging with an internal wall (18, 118, 218, 318, 418, 518, 618, 718, 856, 856a) of the opening and providing a first seal, and includes an unthreaded sealing portion (16, 116, 216, 316, 416, 516, 616, 716, 816, 916, 1016, 1116) proximate the threaded portion which also enters the opening. The unthreaded sealing portion is configured to engage and provide a second seal against the internal wall (18, 118, 218, 318, 418, 518, 618, 718, 854, 854a) of the opening.