baber/WOPTO huggingface dataset:
Patent JP-2020013849-A (JP)
Title: Thermoelectric element, power generation device, electronic apparatus, and method of manufacturing thermoelectric element
Inventor: GOTO HIROSHI
IPC: H01L29/06
Filed: 2018-07-17
Abstract: To provide a thermoelectric element that can stabilize the amount of electric energy generated, a power generation device, an electronic apparatus, and a manufacturing method of a thermoelectric element.SOLUTION: A thermoelectric element 1 that converts thermal energy into electric energy includes a first electrode portion 11, a second electrode portion 12 facing the first electrode portion 11 at a distance in a first direction Z, and having a work function different from that of the first electrode portion 11, an intermediate portion 13 that is provided between the first electrode portion 11 and the second electrode portion 12, and includes nanoparticles, and a support portion 14 that is provided integrally between the first electrode portion 11 and the second electrode portion 12, and surrounds the intermediate portion 13.SELECTED DRAWING: Figure 1
Patent JP-2020013319-A (JP)
Title: Neural network circuit
Inventor: OTSUKA SHIGEKI
IPC: G06N3/063
Filed: 2018-07-18
Abstract: To provide a neural network circuit capable of reducing the circuit scale while retaining computation accuracy and signal processing speeds.SOLUTION: In a CNN circuit 11, a plurality of DACs 2 and a plurality of drive amplifiers 3 are provided on the input end of a crossbar circuit 4, and a plurality of sense amplifiers 5 and a plurality of ADCs 10 are provided on the output end of the crossbar circuit 4. A series circuit of switches SW1 and SW2 is disposed on a feedback loop in the drive amplifier 3, and a series circuit of switches SW3 and SW4 is disposed on a feedback loop in the sense amplifier 5. A common connecting point for the switches SW1 and SW2 and a common connecting point for the switches SW3 and SW4 are connected to one end of a memristor and the other end thereof, respectively. The A/D converter 10 performs A/D conversion on voltages at both ends of a feedback resistance Rf in the sense amplifier 5.SELECTED DRAWING: Figure 1
Patent JP-2020016019-A (JP)
Title: Floor unit
Inventor: NAGASHIMA ETSU
IPC: E04F15/16
Filed: 2018-07-23
Abstract: To provide a floor unit capable of reducing waste and facilitating construction.SOLUTION: A floor unit 1 comprises: a floor panel 3 and a support leg 2 forming a clearance on a lower side; a tile carpet 4 arranged on an upper side of the floor panel 3 and having an upper surface composed of a pile fiber layer 42; and a design material 5 arranged on the tile carpet 4. The design material 5 has a design substrate 51 and a surface fastener 52 stuck to a lower surface of the design substrate 51, and is bonded to the tile carpet 4 by the bonding strength of the surface fastener 52 and the pile fiber layer 42 of the tile carpet 4.SELECTED DRAWING: Figure 1
Patent JP-2019217488-A (JP)
Title: Coating tool
Inventor: KITSUTA HIROTAKA
IPC: B05C5/02
Filed: 2018-07-26
Abstract: To provide a coating tool capable of imparting a coating film having a uniform thickness, without generating a retention part in a manifold, and without imparting pulsation to coating liquid.SOLUTION: In a coating tool 10 including a body block, and a columnar agitation rod 3, the body block has a manifold 17 for storing liquid inside, a liquid supply part 18 reaching the manifold 17 from the side face of the body block, and a liquid outflow part 7, and the agitation rod 3 passes through the inside of the manifold 17, and is attached to the body block rotatably around its center axis.SELECTED DRAWING: Figure 3
Patent JP-2020021784-A (JP)
Title: Led and manufacturing method
Inventor: KUMURA MASAO
IPC: H01L33/48
Filed: 2018-07-31
Abstract: To provide an LED having a small size similar to a chip LED and a manufacturing method of the same.SOLUTION: A method of manufacturing an LED is includes steps of: molding a package comprising a frame by a resin of a thermal hardening property with a transfer mold to a metal lead frame, assembling an LED chip to the package, implanting a liquid resin of the other thermal hardening property to the package in which the LED chip is assembled to seal with the resin, and dividing them into an individual LED by a die. The package can arrange a plurality of LED chips in one array to one direction extending the lead frame, and the one array is surrounded with the one frame, and has one or more array surrounded with the frame to a direction orthogonal to one direction. The one frame is formed on the side corresponding to a side opposite to te one of the LED of a rectangle shape to be manufactured, and is not formed on the side corresponding to the other opposite side orthogonal to the side opposite to the one.SELECTED DRAWING: Figure 2
Patent JP-2019095770-A (JP)
Title: Organic light-emitting display device and method for driving the same
Inventor: YIM DALE
IPC: G09G3/30
Filed: 2018-08-08
Abstract: To provide an organic light-emitting display device and a method for driving the organic light-emitting display device.SOLUTION: An organic light-emitting display device according to an embodiment comprises a data conversion unit for using first data of a first type supplied from outside to generate second data of a second type different from the first type, and using the second data to generate third data of a third type different from the first and second types, and a display unit for displaying a video corresponding to data outputted from the data conversion unit using a plurality of unit pixels. Each of the plurality of unit pixels includes first sub pixels and second sub pixels arranged on a first column and third sub pixels arranged on a second column parallel to the first column. The data conversion unit can generate the second data according to the arrangement of the first to third pixels.SELECTED DRAWING: Figure 3
Patent JP-2020029008-A (JP)
Title: Decorative body
Inventor: TOYAMA KAZUAKI
IPC: B44F11/04
Filed: 2018-08-21
Abstract: To provide a decorative body that enables a novel visual effect to be obtained when a mosaic image is used.SOLUTION: A decorative body 10 includes: a first member 11 that has a display area for displaying a mosaic image M that is formed so as to be in the same size as a color image C, the mosaic image M being generated based on the color image C; a second member 12 that is transparent or translucent and is formed so as to cover the display area; a first image formation unit that is provided between the first member 11 and the second member 12, where the color image C overlaps the mosaic image M; and a second image formation unit that is provided between the first image formation unit and the first member 11, where the color image C is formed so that white images displayed in a white color overlap the mosaic image M. Each part of the white images is formed in such a manner as the color density of the part that the color image C corresponds to gets higher, the color density of the white color gets lighter.SELECTED DRAWING: Figure 1
Patent JP-2020031114-A (JP)
Title: ALLOY USING META MAGNETIC, MAGNETIC CORE USING THE SAME, AND MANUFACTURING METHOD OF MnAl ALLOY
Inventor: MIYAZAKI TAKASHI
IPC: H01F41/02
Filed: 2018-08-21
Abstract: To provide an alloy which includes a meta magnetic and occurs a primary-phase transition in a lower magnetic field.SOLUTION: An alloy according to the present invention contains Mn, a first layer having a meta magnetic, and a lamella structure which includes Mn and in which second layers having a nearest Mn-Mn atom distance smaller than that of the first layer are alternately laminated. Thus, the nearest Mn-Mn atom distance in the first layer having the meta magnetic is decreased by the second layers. As result, an energy difference between an antiferromagnetic state and a ferromagnetic state becomes small, so that a meta magnetic transference magnetic field can be reduced as compared with the alloy composed only of the first layer having the meta magnetic. Therefore, the use of the alloy of the present invention for a magnetic core of, for example, a current limiter enables reduction of a current value for starting a current-limiting operation by the current limiter.SELECTED DRAWING: Figure 1
Patent JP-2020029217-A (JP)
Title: Vehicle floor carpet
Inventor: YASHIKI SUMIO
IPC: B60N3/04
Filed: 2018-08-24
Abstract: To inhibit creases of a floor carpet from being viewed by an occupant.SOLUTION: A floor carpet 10 is sterically molded along a floor shape of a vehicle cabin. The floor carpet 10 includes a tunnel cover part 20 and floor cover parts 11. The tunnel cover part 20 is molded along a shape of a floor tunnel 32 formed at a center of a floor as seen in a vehicle width direction, protrudes upward from a floor surface, and is extended in a vehicle length direction. The floor cover parts 11 are provided at both sides of the tunnel cover part 20 as seen in the vehicle width direction to form the floor surface. A groove 16 which forms a polygonal line is formed at a cover part, which is covered by a floor mat 30, of the floor cover part 11.SELECTED DRAWING: Figure 1
Patent JP-2020031850-A (JP)
Title: Pinball game machine
Inventor: MIZUNO HIROYASU
IPC: A63F7/02
Filed: 2018-08-29
Abstract: To control discomfort given to a player by full capacity notification during a jackpot game.SOLUTION: A pinball game machine includes: a discharge port configured so as to be capable of discharging game balls stored in a storage part to the outside of the storage part; switching means for switching opening/closing of the discharge port on the basis of a player's operation; full capacity detection means for detecting a full capacity state in which game balls are full in the storage part; and full capacity notification means for notifying a player of a full capacity state when the full capacity state is detected. The full capacity notification means includes: first notification means for executing first full capacity notification for notifying a player of a full capacity state in a first mode when detecting a full capacity state in a game state in which no special games are under execution; and second notification means for executing second full capacity notification for notifying a player of a full capacity state in a second mode differing from the first mode instead of the first full capacity state notification at a predetermined ratio when detecting a full capacity state in a game state in which a special game is under execution.SELECTED DRAWING: Figure 18
Patent JP-2020032895-A (JP)
Title: Parking assistance device
Inventor: FUKE JUMPEI
IPC: B60W50/10
Filed: 2018-08-30
Abstract: To provide a parking assistance device that enables parking assistance operation from a portable terminal even when a plurality of electronic keys exists around a vehicle.SOLUTION: A parking assistance device is provided permitting parking assistance operation of a vehicle requested via a portable terminal on the condition that a regular electronic key exists within a predetermined range around the vehicle. The parking assistance device includes: a detection unit that detects the regular electronic key existing within a predetermined range; an area identification unit that identifies, within the predetermined range, the area where the portable terminal requesting the parking assistance operation exists, when a plurality of regular electronic keys is detected within the predetermined range by the detection unit; and a control unit that permits the parking assistance operation requested from the portable terminal when one regular electronic key exists in the area specified by the area specifying unit.SELECTED DRAWING: Figure 1
Patent JP-2020035916-A (JP)
Title: Imaging apparatus and electronic equipment
Inventor: MACHIDA TAKASHI
IPC: H01L21/22
Filed: 2018-08-30
Abstract: To provide an imaging apparatus equipped with a charge holding part having a larger saturation charge amount.SOLUTION: An imaging apparatus according to the present invention comprises a first conductivity type semiconductor substrate, a second conductivity type photoelectric conversion part, a second conductivity type charge holding part, a transfer part, and a trench part. The semiconductor substrate includes a first plane, and a second plane on a side opposite to the first plane. The photoelectric conversion part is buried in the semiconductor substrate and generates an electric charge corresponding to a light reception amount through photoelectric conversion. The charge holding part is buried in the semiconductor substrate and holds the electric charge generated at the photoelectric conversion part. The transfer part transfers the electric charge from the photoelectric conversion part to a transfer destination. The trench part extends in a thickness direction directed from the first plane to the second plane at the charge holding part. The trench part has a first base body and a first conductivity type first semiconductor layer provided to cover the first base body.SELECTED DRAWING: Figure 4
Patent JP-2020035919-A (JP)
Title: Semiconductor device and method of manufacturing the same
Inventor: KOBAYASHI KIYONARI
IPC: H01L21/8234
Filed: 2018-08-30
Abstract: To provide a semiconductor device and a method of manufacturing the same capable of reducing electric resistance.SOLUTION: A semiconductor device according to an embodiment comprises a first semiconductor region of a first conductivity type, a first metal part, a second semiconductor region of the first conductivity type, a third semiconductor region of a second conductivity type, a first electrode, a fourth semiconductor region of the second conductivity type, and a second electrode. The first semiconductor region has a first portion and a second portion. The first metal part is provided in the first portion and in the second portion. The second semiconductor region is provided on the first portion and on the second portion. The third semiconductor region is provided on a part of the second semiconductor region, and located on the first portion. The first electrode is provided on the third semiconductor region. The fourth semiconductor region is provided on another part of the second semiconductor region, and located on the second portion. The fourth semiconductor region is separated from the third semiconductor region. The second electrode is provided on the fourth semiconductor region.SELECTED DRAWING: Figure 1
Patent JP-2020036229-A (JP)
Title: Optical interference circuit
Inventor: GO TAKASHI
IPC: G02B6/125
Filed: 2018-08-30
Abstract: To achieve an optical interference circuit with less variation in effective optical path length.SOLUTION: An optical interference circuit configured using a waveguide on a substrate, includes: a branch coupler for branching light from a reproduction reference light input port; a frequency synchronization detection circuit connected to one output of the branch coupler; and a transmission path length fluctuation detection circuit connected to the other output of the branch coupler. A length of a path via a reference light path from the branch coupler to a 3 dB coupler of the frequency synchronization detection circuit and a length via the reference light path of a path from the branch coupler to a 3 dB coupler of the transmission path length fluctuation detection circuit is equal.SELECTED DRAWING: Figure 4
Patent JP-2020032139-A (JP)
Title: Game machine
Inventor: MIYASAKA JUN
IPC: A63F7/02
Filed: 2018-08-31
Abstract: To provide a game machine capable of suitably deterring amusement in a process until game balls advance into a winning hole or the like from becoming monotonous.SOLUTION: A residence part 751 is in a configuration such that game balls entering an entrance 636 are brought to a lower side, namely a side closer to a middle start winning device 431, following displacement to a second position of the residence part 751 when the game balls enter the residence part 751 positioned in an initial position, thus creating various suitable situations in which, for example, game balls discharged from a discharge port 751A easily enter the middle start winning device 431 as the game balls approach the middle start winning device 431, and damage to a passage part 653 for guiding game balls to a position permitting entry to the middle start winning device 431 because of collision with game balls discharged from the discharge port 751A can be suppressed.SELECTED DRAWING: Figure 17
Patent JP-2020038309-A (JP)
Title: Fixing device and image forming apparatus
Inventor: SOSHI KYOGO
IPC: G03G15/20
Filed: 2018-09-05
Abstract: To obtain a fixing device that can prevent an image from being displaced with respect to a recording medium, compared with a configuration where a nip pressure near an exit of a fixing nip is increased compared with a nip pressure near an entrance, and an endless belt is pressed against rotation means at different positions in the direction of rotation of the endless belt, and image forming apparatus.SOLUTION: Between an endless belt 62 and a leaf spring 102 pressing the endless belt 62 against rotation means from an inner peripheral surface side of the endless belt 62, an elastic part 122 is arranged, which is elastically deformed to follow the shape of a rotating body 52a and forms a fixing nip NF between the endless belt 62 and rotating body 52a only in an area following the shape of the rotating body 52a.SELECTED DRAWING: Figure 1
Patent JP-2018187494-A (JP)
Title: Game machine
Inventor: TSUCHIYA YOSHITAKA
IPC: A63F7/02
Filed: 2018-09-06
Abstract: PROBLEM TO BE SOLVED: To provide a game machine capable of improving amusement properties of games by using a profit number value.SOLUTION: A game machine 1 comprises: winning game performance means for performing a winning game when a result of a winning/losing determination becomes a winning; and profit number value display means 91 for displaying, till a reset condition is established, a profit number value 40 including a value based on a number of prize balls paid out in the winning game. Upon an establishment of a specific condition including the profit number value reaching a prescribed stipulated value, options of a player with respect to games are to be increased.SELECTED DRAWING: Figure 11
Patent JP-2020040270-A (JP)
Title: Precoated aluminum material and aluminum composite material
Inventor: KATO OSAMU
IPC: B32B15/095
Filed: 2018-09-10
Abstract: To provide a precoated aluminum material which can bond various resin members, and an aluminum composite material prepared using the precoated aluminum material.SOLUTION: A precoated aluminum material 1 has a base material 2 formed of an aluminum material and a primer film 3 formed on the base material 2. The primer film 3 contains an urethane resin. In an infrared absorption spectrum of the primer film 3, a value of absorbance Ain a peak top of the maximum peak among peaks present at a wave number of 1180 to 1330 cmis 0.8-1.5 times of absorbance Ain a peak top of the maximum peak among peaks present at a wave number of 1670 to 1770 cm.SELECTED DRAWING: Figure 1
Patent JP-2020043518-A (JP)
Title: Power amplifier circuit
Inventor: TANAKA SATOSHI
IPC: H03G3/10
Filed: 2018-09-12
Abstract: To provide a power amplifier circuit capable of amplifying a signal in a wide range while suppressing an increase in power consumption.SOLUTION: A power amplifier circuit 10 includes a first amplifier 11 that amplifies an input signal and outputs an output signal, a second amplifier 13 that amplifies a signal corresponding to the input signal to generate a signal having an opposite phase to the output signal on the basis of the control signal, and adds the signal to the output signal, and a control circuit 14 that supplies a control signal to the second amplifier. The control circuit outputs a control signal such that the gain of the second amplifier becomes equal to or more than zero and less than a predetermined level when the power amplifier circuit operates in the first power mode, and the gain of the second amplifier is equal to or higher than a predetermined level and lower than the gain of the first amplifier when the power amplifier circuit operates in the second power mode having an output power level smaller than the first power mode.SELECTED DRAWING: Figure 3
Patent JP-2020047324-A (JP)
Title: Semiconductor storage device and control method of semiconductor storage device
Inventor: SANUKI TOMOYA
IPC: G11C16/26
Filed: 2018-09-14
Abstract: To provide a semiconductor storage device capable of improving read characteristics.SOLUTION: A semiconductor storage device according to an embodiment comprises: n conductive layers from first to nth laminated in a first direction; a first semiconductor region of a first conductive type; a second semiconductor region of a second conductive type closer to the nth conductive layer than the first semiconductor region; a semiconductor layer provided between the first semiconductor region and the second semiconductor region, extending in the first direction, penetrating through the n conductive layers, and having impurity density lower than first conductive type impurity density of the first region and second conductive type impurity density of the second region; n electric charge accumulation regions from first to nth provided between the n conductive layers and the semiconductor layer; and a control circuit controlling voltage applied to the n conductive layers so as to constantly accumulate no electric charge in at least one electric charge accumulation region within the n electric charge accumulation regions.SELECTED DRAWING: Figure 3
Patent JP-2020046834-A (JP)
Title: RF tag label
Inventor: OGATA TETSUJI
IPC: H01Q9/28
Filed: 2018-09-18
Abstract: To manufacture RF tag labels at a low cost and provide wider-band RF tag labels even if antennas mounted on the RF tag labels are designed individually.SOLUTION: An RF tag label 1 includes: a matching circuit 410 to which an IC chip 42 is connected; an inlay 4 having an antenna 41 including two coupling elements 411 arranged symmetrically with respect to the matching circuit 410; and an auxiliary antenna sheet 2 having two first conductive patterns 21 formed on one side and two second conductive patterns 22 formed on the other side. Each of the two first conductive patterns 21 overlaps one of the coupling elements 411 via an adhesive layer 3, in a one-to-one relationship. Each of the two second conductive patterns 22 overlaps one of the first conductive patterns 21 via an auxiliary antenna substrate 20, in a one-to-one relationship.SELECTED DRAWING: Figure 1
Patent JP-2019024217-A (JP)
Title: Uplink power headroom management for connectivity with logically separate cells
Inventor: MADHAVAN SRINIVASAN VAJAPEYAM
IPC: H04W72/04
Filed: 2018-09-19
Abstract: To provide a method for power headroom (PH) management in uplink carrier aggregation.SOLUTION: A wireless network 100 includes a relay 110r. The relay is an entity that can receive a transmission of data from an upstream station and send a transmission of the data to a downstream station. The relay is also a UE that can relay transmissions for other UEs. A network controller 130 is coupled to a set of eNBs/base stations and provides coordination and control for these eNBs/base stations. The network controller 130 includes a single network entity or a collection of network entities. The network controller 130 communicates with the eNBs/base stations via a backhaul. The eNBs/base stations also communicate with one another directly, or indirectly via a wireless or wireline backhaul.SELECTED DRAWING: Figure 1