Patent GB-803733-A (GB)
Title: Improvements in or relating to electronic digital computing machines
Inventor: YANDELL RONALD PERCY BAWDEN
IPC: G06F9/355
Filed: 1955-10-24
Abstract: 803,733. Digital electric calculating-apparatus; electric digital-data-storage apparatus. POWERS-SAMAS ACCOUNTING MACHINES, Ltd. Sept. 11, 1956 [Oct. 24, 1955], No. 30390/55. Class 106 (1). In an electronic digital computer comprising data storage means including separate storage locations, control gates, one for each storage location, are selectively conditioned by addressing means and receive pulses in turn from a counter, so that when a pulse is applied to a conditioned gate a predetermined storage location is addressed during an appropriate time interval, and modifying means operable by an instruction device enable a predetermined count-modifying member to be entered in the counter so that when the addressing means indicates a predetermined storage location, a different location is addressed. The computer described comprises a magnetic storage drum D, Fig. 2, and read and write heads RH, WH which are selectively controlled by addresses forming part of instructions sensed from a programme card by sensing-device SD, Fig. 5, as described in Specification 803,734. Data is recorded in parallel on four track sections corresponding to the elements of the 1, 2, 4, 8 code. Each " track " (four sections) comprises 40 locations, Fig. 2, each divided into 20 digit positions DT1-DT20, Fig. 3, a decimal or sterling amount being recorded within positions DT3-DT18. The digit positions are marked by the pulse outputs of decoder DC1, Fig. 4, of counter C1 which is stepped by clock pulses CP derived from the drum, and the back edge of each pulse DT20 steps on counters C2 and C3 whose decoded outputs NT1-NT40 and MNT1-MNT40 correspond to the track locations 1-40. Counter C3 comprises cascadeconnected bistable flip-flop circuits (Fig. 7, not shown) which form a decimal section, similar to the counting circuit of Specification 729,751, and a scale-of-four section, the two sections being separately decoded by MDC1, MDC2 whose outputs are connected to matrix GM. Counter C3 may be brought out of step with C2 by pulses applied to lines MP1, MP2. An instruction includes function track address and track location address portions which are separately decoded at OD, TD and TLD, respectively, Fig. 5. The marked positive output, such as TA3, of decoder TD selects a set of four write gates WHCG for the corresponding track (3); the outputs TL1-TL40 of TLD are applied together with outputs MNT1-MNT40 to 40 gates G1, whereby during the time that the required track location is opposite the write heads WH a positive potential is applied to all the write gates, via line TLF. Thus during this time, the data represented by coded outputs on lines AU1, AU2, AU4, AU8 from arithmetic unit AU will be recorded on the selected track in synchronism with pulses DT1-DT20. The addressdecoding arrangements for the read heads (Fig. 6, not shown) are similar, but the track location gates for TL1-TL40 are controlled by timed outputs MNT11, MNT12 . . . MNT10, respectively, to allow for the 90 degrees separation between heads WH and RH, Fig. 2. For an addressmodifying instruction, counter C3 is advanced, thus modifying the track location selected with respect to that given in the instruction. The amount of advance is indicated by a 2-digit number which is read from the drum and applied via AU and lines M1, M2, M4, M8 to a register (Fig. 8, not shown) comprising bi-stable flip-flops controlling gates to which are applied different combinations of the DT pulses, whereby the numbers of pulses corresponding to the units and tens digits are applied to lines MP1, MP2 respectively. The track address also may be modified, the effective track address number being increased, a step at a time, by applying modify pulses to a further counter (Fig. 10, not shown) which controls decoder TD. This counter and counter C3 may be reset to normal either by a master reset pulse or by separate demodify signal when required by the programme. Reference is made to forms of storage other than magnetic drum, e.g. delay lines or flip-flop registers.