baber/WOPTO huggingface dataset:
Patent JP-H11314534-A (JP)
Title: Caution ability reduction preventive device for vehicle
Inventor: YANAI TATSUMI
IPC: B60W30/00
Filed: 1998-05-06
Abstract: PROBLEM TO BE SOLVED: To allow to decide the fatigue conditions of individual drivers even in a vehicle plural drivers use, and to decide the fatigue condition generated from the driving work accurately. SOLUTION: A driver inputs a driver information from a driver specifying device 1. A running condition detecting device 2 detects the running condition of a vehicle, and outputs a running mode. The electrocardiographic signal of the driver is measured by an electrocardiographic signal detecting device 3, while a sympathetic and parasympathetic nerve activity calculator 4 finds a pulsation interval (RRI) from the electrocardiographic signal at every running mode, so as to calculate the sympathetic and parasynpathetic nerve activity. In an accumulating fatigue condition deciding part 5, this time calculation value and the last time calculation value at the same driver and in the same running mode which is stored in a memory 6 is compared, the accumulated fatigue condition is decided, and it is output to a controller 8.  In an awaking level reducing condition deciding part 7, the sudden increasing condition of the pulsation number is decided from the pulsation interval (RRI), and it is ontput. In the controller 8, different sorts of alarm sounds are generated from an alarm generator 9 according to the combination of deciding results, and the oxygen is fed from a specified time oxygen feeding part 10.
Patent JP-S5866029-A (JP)
Inventor: EDOWAADO DANKAMU
IPC: G01K7/36
Filed: 1982-07-15
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H10317152-A (JP)
Title: Base material having copper layer and its production
Inventor: SUDA KENSAKU
IPC: H05K3/00
Filed: 1997-05-14
Abstract: PROBLEM TO BE SOLVED: To simply obtain a base material having a copper layer with high adhesion property by coating a polyimide film with a polyimide silicone varnish containing an acid component, an amine component and a silicone compound, which are expressed by specific structural formulas, as essential components, heat treating and after that, depositing copper particle on the varnish by the thermal decomposition of copper formate or the electroless plating. SOLUTION: The polyimide film is coated with the polyimide silicone varnish containing the acid component expressed by formula I, formula II and the amine component and the silicone compound expressed by formula III, formula IV as the essential components and is heat treated. Successively the copper layer is formed by depositing copper particle on the polyimide silicone vanish by the thermal decomposition of copper formate, electroless plating, vapor deposition, sputtering, ion plating, CVD or the like and heat treated. The adhesion property is not attained only by providing an interposing layer between the polyimide film and the copper layer, but excellent adhesion property and heat resistance are attained by heat treating.
Patent JP-S5825661-A (JP)
Title: Electrostatic charger
Inventor: YUASA KAZUHIRO
IPC: H01T19/00
Filed: 1981-08-07
Abstract: PURPOSE:To maintain the surface potential constant after uniform electrostatic charging of a recording medium and to obtain always stable recording of images in an image recording system of transfer type by superposing a DC bias voltage on the AC power source of an AC corona discharger and if necessary, making combination use of a DC corona discharger. CONSTITUTION:A DC bias power source 3 is superposed on the AC power source 2 of an AC corona discharger 1. In the figure, 11 shows a wire electrode for corona discharging. 4 shows a recording medium of endless belt type (may be drum-like), 41 is a recording layer consisting of a photoreceptor or dielectric, 42 is a conductive layer, and 43 is a base layer, respectively. With the electrostatic charger of such constitution, it is possible to obtain the surface potential of the recording medium 4 by application of the DC bias voltage after leveling off the electrostatic charge patterns remaining on the medium 4 after transfer uniformly by application of AC corona discharge on the medium 4.
Patent JP-S5824974-A (JP)
Title: Simple diagram recognition circuit
Inventor: SHIYUDOU TOMOKI
IPC: G06V10/46
Filed: 1981-08-07
Abstract: PURPOSE:To recognize a simple diagram with a simple circuit, by the recognizing the use of either one of direction component distributions for outer, inner circumference or center line of an object to be recognized. CONSTITUTION:A tracking circuit 60 traces either one of an outer circumference, a center line and an inner circumference of a binary digit pattern corresponding to a simple diagram. Simultaneously, the component toward moving direction at tracing is taken and the component is given to a directional counter group 61. The counter group 61 integrates the number of generation of the components to be given at each component. The content of the counter 61 is given to a discrimination circuit 63. To a standard distribution register group 62, the standard directional component distribution of each simple diagram is set via a signal line 100 in advance. The circuit 63 compares the content of the counter group 61 with that of the register group 62 to detect the distribution of the register group 62 with a distribution closest to the content of the counter group 61, allowing to recognize the type of corresponding diagram as the shape of the simple diagram.
Patent JP-S6042103-A (JP)
Inventor: DEIONISHIUSU YOOZEFU POKUE
IPC: B60C15/00
Filed: 1984-06-18
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S62279742-A (JP)
Title: Bit string comparison circuit
Inventor: ISHIHARA TOSHIO
IPC: H04L1/00
Filed: 1986-05-28
Abstract: PURPOSE:To enhance an output information amount by inputting the first decision result of sequentially inputted signals in the second decision circuit in two bit strings which are two sets of bit strings group arranged in the same order and converting in parallel and series the output signal in the third decision circuit to obtain output. CONSTITUTION:A data signal D1 consisting of bit strings D1-1-D1-16 and a data signal D2 consisting of bit strings D2-1-D2-16 are equal signals except the difference of the array order of each string. And an exclusive OR circuit 1-j inputs the bit strings D1-j and D2-j, and decides whether they are equal or not equal every bit and outputs a signal Sj which becomes '0' when bits are equal each other and becomes '1' when not equal. Next OR circuits 2-1, 2-2, 2-3 and 2-4 generates signals S21, S22, S23 and S24. On the other hand a clock distribution part 5 generates clock signals CL1-CL4 from a clock signal CLin and the leading of one of these clock signals coincides with the leading of the clock signal CLin. After the signals S21-S24 are punched by the signals CL1-CL4 in AND circuits 3-1-3-4, they are composed in an OR circuit 4 so as to output a signal SO.
Patent JP-S611039-A (JP)
Title: Monolithic semiconductor integrated circuit device
Inventor: JINMON MASASHI
IPC: H01L21/60
Filed: 1984-06-13
Abstract: PURPOSE:To electrically confirm the connecting state to an external circuit of a salient pole by connecting the electrode except the salient pole connected directly with a substrate with an opposite conductive type region to the substrate separately independent in the substrate. CONSTITUTION:A lower part 7c of the salient pole 12 of an n type epitaxial layer 7b is electrically separated by a p type separately diffused layer 6b. An n<+> type region 13 is formed on the surface of the layer 7c, an internal wiring metal wiring layer 14 is connected through a hole opened at a surface protective film 8 with the region 13, and the pole 12 is formed on the layer 14. Accordingly, a p-n junction diode formed by a p type Si substrate 5 and the layer 7c is presented between the poles 11 and 12. When a monolithic IC having such a construction is face-down bonded to a thick film ceramic substrate, the connecting state of the corresponding metal wirings on the poles and a ceramic substrate is confirmed by monitoring the forward characteristic by applying a voltage between the metal wirings corresponding to the electrodes 11, 12.
Patent JP-S5648631-A (JP)
Title: Photomask inspecting apparatus
Inventor: DAN MASAHIRO
IPC: G03F1/00
Filed: 1979-09-28
Abstract: PURPOSE:To make possible accurate and rapid inspection of the entire pellet shape defects of photomasks by photodetecting the superposed images of a reference mask and the mask to be inspected with a photodiode array and making decision based on the photodetection signal. CONSTITUTION:Parallel luminous fluxes from the same light source 3 via irradiat- ing optical systems 4, 5 irradiate a standard mask 1 and the mask 2 to be inspected by way of color filters 8, 9 of red, green, etc. The images of the masks 1, 2 formed by this are combined by an image combining part 10 etc. to superposed images which are then photodetected with a photodiode array 11. The photodetection signal of the array 11 causes a decision circuit 12 to make signal processing based on the photosensitivity differences and coordinate positions of the portions where monochromatic light of red or green is received and the portions where combined light was received as well as the array 11, whereby the defects and periodicity of the mask are easily decided. Hence, the inspection of whether the pellet shapes of the entire part of the photomask are good or not may be performed accurately and rapidly.
Patent JP-S613587-A (JP)
Title: Character broadcast receiver
Inventor: HATA MIHOKO
IPC: H04N7/088
Filed: 1984-06-15
Abstract: PURPOSE:To obtain a character broadcast receiver from which a program number of a hybrid system character broadcast in recognized easily by detecting and storing the program number of a character broadcast transmitted at present and displaying it on a screen as a program list. CONSTITUTION:A CPU19 decodes a character signal written in a buffer memory 17 to check whether the character signal data is a page control data unit to come to the head of the program or not. If the data is the page control data unit, the program number is detected to check whether it is written in the program number list or not. When the number is a new number, it is added in the program number list. When a recipient selects the program number list, the receiver displays the program number list and when the channel is changed, the program number list formed so far is cleared and a new program number list is generated.
Patent JP-H10311546-A (JP)
Title: Heater panel for floor heating
Inventor: TERAYAMA KENICHI
IPC: F24D13/02
Filed: 1997-05-14
Abstract: PROBLEM TO BE SOLVED: To provide a heater panel which achieves excellent assembling workability by a method wherein a recessed part for housing a heater is formed in the rear of the body of a panel, loaded with a heater formed in a sheet and a rear plate and the heater and the rear plate are compressed in lamination to be securely bonded in the recessed part for housing the heater. SOLUTION: In this heater panel for heating floor, a recessed part 7 for housing a heater is formed in the rear of the body 2 of a panel, loaded with a heater 3 formed in a sheet and a rear plate 4 and the heater 3 and the rear plate 4 are compressed in lamination to be securely bonded in the recessed part 7 for housing the heater while a nailing margin 41 without a heating layer is formed at the central part of the heater 3. The central part of the rear plate 4 is temporarily fixed on the body 2 of the panel by nailing at a part of the nailing margin 41 formed.
Patent JP-H11300392-A (JP)
Title: Fermentation controller used in sludge treating system
Inventor: MOTODA KENRO
IPC: B09B3/00
Filed: 1998-04-17
Abstract: PROBLEM TO BE SOLVED: To obtain condensed water by efficiently condensing the steam from the region where the sludge is decomposed by fermentation. SOLUTION: This fermentation controller 29 is used in the sludge treating system for mixing specified bacteria with sludge, ageing the bacteria-mixed sludge for a specified period while supplying air to decompose the sludge by fermentation, vaporizing the water in the sludge by the fermentation heat and recovering the water as steam. The controller is provided with a steam pipeline 29g for introducing the steam from the region where the sludge is decomposed by fermentation, many pipes 29i connected to the steam pipeline through a fluid and excellent in heat conductivity, the heat-exchange part 29c for sprinkling condensed water around the pipes to exchange heat between the condensed water and the vapor passing through the inside of the pipes, a water discharge chamber 29d into which the condensed water from the pipes in the heat- exchange part is discharged, a pipe 29m for introducing the outside air into the water discharge chamber, a water storage part 29e for storing the condensed water provided between the chamber and the air pipeline 29m for sending the warm and wet air filling the discharge chamber to the region where the sludge is decomposed by fermentation to preheat the sludge to promote fermentation.
Patent JP-H09304566-A (JP)
Title: Reactor fuel element and fuel assembly
Inventor: OKADA SEIJI
IPC: G21C3/28
Filed: 1996-05-20
Abstract: PROBLEM TO BE SOLVED: To employ a combustible poison in a reactor fuel of plutonium thermal utilization and flatten its power distribution. SOLUTION: At least a part in between pellets 2 of MOX (mixed oxide) piled in a fuel clad tube 1, mixture disks 3 of nuclear fuel material and a combustible poison are distributed. By this, MOX fuel containing burnable poison can be easily constituted without mixing MOX and the combustible poison and molding it. This mixture 3 can be a mixture of a chemically stable material other than fissile materials and burnable poison. By setting the thickness and number of these disks 3 properly, flattening of power distribution can be attained.
Patent JP-H01293596-A (JP)
Title: Hybrid integrated circuit device
Inventor: KOGA SHIGECHIKA
IPC: H05K3/34
Filed: 1988-05-20
Abstract: PURPOSE:To reduce the amount of use of thick-film electrode materials, to suppress the scattering of resistance, and to prevent the strength at a soldered part from being lowered by forming thick film electrode part to be soldered by printing for several times and by partially overlapping a protection glass film to the thick film electrode part. CONSTITUTION:Thick-film electrodes 2 and 3 to be soldered 7 are formed by printing electrode materials for a plurality of times so that a protection glass film 4 may partially overlap the thick-film electrodes 2 and 3. For example, by forming the thin-film electrode 3 at a part to be soldered 7 on a thick-film electrode 2 forming a specified circuit pattern by performing printing and baking separately when forming the thick-film electrode 2, chip parts 5 and a lead terminal 6 are connected by a solder 7 on the thick-film electrode 3. Then, the protection glass 4 is formed so that it may overlap to the edge part where the solder 7 of the thick-film electrode 3 is not adhered to. It allows the lowering in soldering strength due to shifting of silver to be suppressed and the amount of use of thick-film electrode materials to be reduced and scattering of resistance to be suppressed.
Patent JP-S5550642-A (JP)
Title: Preparation of semiconductor device
Inventor: HATAISHI OSAMU
IPC: H01L21/3213
Filed: 1978-10-09
Abstract: PURPOSE: To increase etching speed by injecting impurities ions to a poly Si-layer exposed on a Si substrate surface in an electrode forming process, and to prevent the exposure of Si from an electrode window by obviating the etching of the flanks of poly Si in an electrode wiring lower layer.  
     CONSTITUTION: A window is opened to a SiO 2  film 3 on a Si substrate 4, and poly Si 12, to which impurities are not added, and Al 11 are stacked. An electrode 1 is made up by etching Al 11 by using a resist mask 13, and Ar ions are injected to poly Si 11. Flanks are not approximately etched because the layer 12 is completely etched for a short time if is is etched with a mixed liquid of fluoric acid and nitric acid and poly Si uncer the electrode 1 does not contain impurities. Thus, yield and reliability are improved because a Si surface does not expose from the electrode window and the causes of the deterioration of the characteristics of elements are removed. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H01293715-A (JP)
Title: Logical circuit
Inventor: KATO KIKUO
IPC: H03K19/00
Filed: 1988-05-20
Abstract: PURPOSE:To generate a pulse having an accurate pulse width by inserting a dummy gate element having the same composition as that of an I<2>L basic gate element into a basic logical circuit composed of the I<2>L basic gate elements. CONSTITUTION:In a logical circuit L2, a dummy gate 8 with one input and two outputs is provided in parallel with a basic gate G2, the dummy gate 8 has the same composition as that of each of I<2>L basic gates G1 to G7, and the input of the dummy gate 8 is grounded. Since the gate G2 has two outputs, the capacity value of the p-n junction capacity between collector bases is equiva lent to that for two gates of the basic gates G1 to G7. Therefore, basic logical circuits L1 and L2 mutually have the same composition in which the same number of the pieces of the same capacity are connected in parallel, and delay time in the L1 and that in the L2 are also the same with each other. Consequent ly, an output signal S0 having the same pulse width as that of an input signal S1 can be obtained by correcting a pulse width fluctuation.
Patent JP-S5647829-A (JP)
Title: Data input/output system of computer
Inventor: NAKAGAWA YUUJI
IPC: G06F3/00
Filed: 1979-09-27
Abstract: PURPOSE: To prevent a malfunction due to a noise, by setting a specific signal line to "0" level, in case one computer sends out a data to the other computer.  
     CONSTITUTION: In case the microcomputer 2 sends a data to the microcomputer 1, it is sent by setting the highest-rank bit D7 to which the pull-up resistance 4 is connected, to "0" level. In case the bit D7 is "1", the computer 1 detects it, regards it as a malfunction, resets the computer 2, and returns it to the normal operation. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-H1071752-A (JP)
Title: Transparent paper having printing side judging region and method for judging printing side of transparent paper of heat transfer printer and device suitable therefor
Inventor: SO JUNHITSU
IPC: B41J29/42
Filed: 1997-05-14
Abstract: PROBLEM TO BE SOLVED: To prevent the loss of an ink ribbon and transparent papers due to the unheating or overheating of an image at printing by a method wherein the transparent paper is automatically delivered when the printing side of the transparent paper fed from a printing paper cassette tray is opposite to printing specification. SOLUTION: When print instruction is inputted, a CPU 31 drives a paper feeding motor 33 so as to transfer a printing paper from a printing paper cassette tray 34 in order to transfer the tip part of a printing region to the position, at which a capstan roller 40 engages with a pinch roller 38. Next, the CPU 31 judges with a photosensor 37 whether the fed printing paper is ordinary paper or transparent paper. When the printing paper is transparent paper, a printing side judging action is performed. According to the result of judgement, a print action or a self-diagnosing function is executed. Concretely, when the transparent paper is fed in the opposite direction, a stepping motor 35 is stopped and, for example, characters are displayed or alarm noise is generated so as to inform that the transparent paper is fed in the opposite direction.
Patent JP-S62280795-A (JP)
Inventor: ARIGA MIEKO
IPC: G09G1/02
Filed: 1986-05-29
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0232483-A (JP)
Title: Control of overlay display
Inventor: BAABARA EE BAAKAA
IPC: G06F3/048
Filed: 1989-05-19
Abstract: PURPOSE: To select and change the display order of an overlay by assigning a mixed attribute to plural nested overlays in a demarcated area and displaying it at the same time. CONSTITUTION: A computer screen is provided with a composite screen 12 and the screen 12 forms a display medium to be demarcated to areas 14, 16, 18, 20, 22, 24, 26, 28 and 30. For example, four overlays are displayed in the areas 14, 18, 26 and 30 and four overlays are properly combined and displayed in the other areas. Then to the nested overlays in the areas mixed attribute is assigned to determine priority orders at the time of displaying an overlay space on the display screen. Then according to the assigned mixed attribute, the parts existing within each area of the plural nested overlays are combined. As the mixed attribute is assigned to be displayed on the screen 12, the display order of the overlays can be selected and changed.
Patent JP-H09308956-A (JP)
Title: Die having slide core and clamping method for die
Inventor: FUJINO KIYOSHI
IPC: B22D17/26
Filed: 1996-05-20
Abstract: PROBLEM TO BE SOLVED: To prevent the development of flash at the time of die casting and to improve a vacuum casting function by facilitating the deformation in the radial direction at the time of acting a contact-pushing force of a slide core to the inner surface of a ring, in the structure of the tapered ring for pushing the slide core of a fixed die. SOLUTION: On the contact part of the lower surface of the tapered ring 4 with the upper surface of a fitting ring 8, three or more keys slidingly fitting parts composed of projecting key 4c and key groove 8a are respectively radially arranged at regular intervals in a peripheral direction and even in the case the tapered ring 4 deforms by the pushing force and thermal expansion, the key 4c is uniformly slid in each key groove 8a to keep the centering of the ring. Further, the width of the upper side of the tapered ring 4 is reduced in the radial direction, and when the pushing force acts to the inner peripheral surface of the ring, the deformation in the radial direction is facilitated. Further, a bolt 5 for fitting the tapered ring is made slidable in the radial oval-shaped hole 8b arranged at the lower part of the fitting ring key groove 8a.
Patent JP-H01293577-A (JP)
Title: Manufacture of photoelectromotive force element
Inventor: KONDO KAZUO
IPC: H01L31/04
Filed: 1988-05-20
Abstract: PURPOSE:To obtain a photoelectromotive force element with increased mechanical strength and machining properties and without any reduction in current intensity and conversion efficiency due to non-metal inclusion within a substrate by using a high alloy steel or a low alloy steel with improved corrosion resistance as a substrate and by forming a single metal layer on the substrate. CONSTITUTION:A photoelectromotive force element where CdTe or a chemical compound semiconductor layer including it and CdS or a chemical compound semiconductor layer including it are laminated on a substrate are constituted on a substrate 1 consisting of a high alloy steel or low alloy steel with improved corrosion resistance by laminating a single metal layer 2. p-type CdTe, or a semiconductor layer 3 including it, and n-type CdS or a chemical compound semiconductor layer 4 including it in this order. For example, a Cd layer 2 is coated on a substrate 1 consisting of a SUS 304 steel and a p-type CdTe layer 3 and an n-type CdS layer 4 are laminated on it. Also. silver electrodes 5 and 6 are formed on a part where a CdTe layer 3 and CdS layer 4 of a Cd layer 2 are not formed and on a CdS layer 4, lead wires 7 and 8 are led out, and then a transparent epoxy resin layer 9 for protection is formed.
Patent JP-S62285897-A (JP)
Inventor: TAKEBAYASHI TETSUYOSHI
IPC: B66C7/14
Filed: 1986-05-31
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。