baber/WOPTO huggingface dataset:
Patent JP-H0556377-A (JP)
Title: Recorder and reproducer
Inventor: SUZUKI NOBUYUKI
IPC: G11B20/02
Filed: 1991-08-27
Abstract: PURPOSE:To make it possible to take the interchangeability of an inline head device and a track number display. CONSTITUTION:In a frame record, a system control circuit 42 displays the track number of a track faced by a magnetic head 30 on a display device 44 at the time of recording a first field. At the time of recording a second field, the track number display of the display device 44 is not updated. In a frame reproduction, the first and second fields are reproduced and are temporarily stored in a memory 18 and afterwards, they are alternately read by a field cycle repeatingly. At the time of reproducing the first field, the track number in which the first field was recorded is displayed on the display device 44. At the time of reproducing the second field, the track number display on the display device 44 is not updated.
Patent JP-H0378042-A (JP)
Title: Automatic saving/reloading processing system for file
Inventor: NAKAJIMA SUKEYOSHI
IPC: G06F12/00
Filed: 1989-08-22
Abstract: PURPOSE:To prevent a user program from being interrupted and to improve the operation rate by saving a file which can be saved when a space area is deficient in a file and restoring the file when the saved file is referenced or data is added. CONSTITUTION:When a necessary space area can not be secured on a disk device, a retrieval means 4 finds the referenced file with the oldest date as the file to be saved. Then an attribute information output means 5 writes the attribute information on the found file in a save file 9 and a saving means 3 saves data on an auxiliary storage device 10 and then deletes it from the disk device. When data is referenced or added to the saved file, an attribute information input means 7 generates a file on the disk device and restores the data from the device 10 by a restoring means 6. Consequently, the program is prevented from being interrupted and the operation rate is improved.
Patent JP-H0497441-A (JP)
Title: Microprocessor
Inventor: KUSUDA MASAHIRO
IPC: G06F11/22
Filed: 1990-08-15
Abstract: PURPOSE:To secure sufficiently large test vector length and to prevent a ROM area from being uselessly used by providing this microprocessor with a test control means for detecting the start of a test mode and commanding preset. CONSTITUTION:When a signal with a level for activating the test mode is applied from the external to a test terminal 33, the signal is transmitted to a test control part 5 through a control signal line 24 and the control part 5 applies a signal for commanding a cache memory 6 and an associative memory 7 to execute initialization through a control signal line 25. Receiving the signal, the cache memory 6 is initialized so as to hold test vectors and the memory 7 is initialized so as to successively read out the test vectors from the memory 6. After completing the initialization, operation from normal reading up to processing is executed. Consequently, the test vector can be stored and a test can be executed without using the built-in ROM area.
Patent JP-S6274089-A (JP)
Title: Apparatus for producing printed circuit board
Inventor: SONODA SADATOSHI
IPC: H05K3/06
Filed: 1985-09-28
Abstract: PURPOSE:To prevent the generation of uneven treatments and to efficiently produce a printed circuit board having good quality by providing printed circuit board transferring devices respectively into treatment tanks of an apparatus for production and admitting treating liquids into the tanks so as to form laminar flow. CONSTITUTION:The circuit board 8 to be etched is immersed into an etching liquid 6 of a tank 7 of, for example, an etching device for producing the printed circuit board. The circuit board 8 is transferred together with circuit board guide frames 12, 12' of a U-shaped section held in place between upper and lower rollers 10 and 10' of a transfer device 9 toward an arrow by the feed rollers 10, 10' of the transfer device 9. At the same time, a pump 16 provided in a circulation circuit 15 is driven to suck the etching liquid 6 in the tank 7 from an outflow port 14 and to admit the same into the tank 7 from an inflow port 13, thus forming the laminar flow in the tank 7. The always fresh etching liquid 6 can be thereby supplied to the circuit board 8, by which the uneven etching is eliminated and the deterioration of the etching liquid is prevented. The circuit board 8 is treated even in a developing device and stripping device in the same manner as in the above-mentioned constitution.
Patent JP-S6194461-A (JP)
Title: Synchronous coupling device
Inventor: SHIGETA MASARU
IPC: G11B27/28
Filed: 1984-10-15
Abstract: PURPOSE:To facilitate edition of a recorded tape by synchronizing time codes of plural VTRs of unified camera type mutually by radio waves and thereby synchronizing time axis of video signals recorded by the VTR by time code. CONSTITUTION:A time code generator 3 and a main time code transmitter 1 that FM-modulates 4 a main time code Sm from the generator 3 and transmits very high frequencies from an antenna 2 are provided to plural VTRs 5-7 of unified with camera type. Radio waves from the transmitter 1 are received by the antenna 8 of VTRs 5-7 and frequency conversion and FM demodulation are made by demodulator 11. The time code Sm demodulated by the demodulator 11 is supplied to a time code reading device 12, and time code data Dm is outputted. A frame pulse Pf from the reading device 12 is supplied to a timing circuit 13, and a load pulse Pl formed in the circuit 13 is supplied to a synchronizing signal generator 15. Data Dm from the reading device 12 is supplied to the generator 15 as preset data and VTRs 5-7 are synchronized.
Patent JP-2000042599-A (JP)
Title: Muddy soil solidifying treatment apparatus
Inventor: KAMEI TAKESHI
IPC: F26B17/32
Filed: 1998-07-30
Abstract: PROBLEM TO BE SOLVED: To provide a muddy water solidifying treatment apparatus capable of efficiently removing the muddy soil adhered to and deposited in the spaces between agitating vanes and screw vanes without any manual work. SOLUTION: When the adhesion of the muddy soil in a half solidified state into space parts between the agitating vanes 31 and the screw vanes 32 is known, an operator switches a selector valve 42 in an arrow (a) direction. The compressed air from a pump unit 40 is then admitted into the device and extrusion bags 34 are expanded to move mud displacing plates 33 to the inner side in a diametral direction, by which the muddy soil in the half solidified state adherend to and deposited in the spaces is completely discharged from the spaces.
Patent JP-S6279925-A (JP)
Title: Method of deciding press fit force in press work
Inventor: YOSHIDA HIROSHI
IPC: B23P19/02
Filed: 1985-10-01
Abstract: PURPOSE:To enable a correct decision to be performed, by successively storing in memory measuring data of a load cell at every predetermined time and taking out from the memory the data retroactive by a predetermind time, when the data reaches a predetermined extreme preset value, to obtain measured press fit force. CONSTITUTION:When the first part is forced to be pressed into the second part, repeatedly measured data, obtained by a load cell provided in a press fit tool, show a riseup in a press fit start, become a fixed value in a stage pressing the part and rapidly rise by the extreme. Accordingly, the extreme preset value MX and a retroactively sampling number (n) can be previously set in accordance with a work objective part. And a device, repeatedly sampling the measured data of tthe load cell in a predetermined interval to be successively stored in memory and detecting some sampling data to reach the extreme preset value MX while taking out the preceding data from the memory by the predetermined sampling number (n), performs a decision of the result being compared with preset upper and lower limit values.
Patent JP-H1038983-A (JP)
Title: Method for locating failure
Inventor: SANADA KATSU
IPC: G01R31/28
Filed: 1996-07-29
Abstract: PROBLEM TO BE SOLVED: To apply to various failures and to locate a failure site rapidly in a method for locating a failure. SOLUTION: An LSI tester 4 successively applies test vectors stored in a test vector file 1 to an input terminal of a mounted LSI 5 for measuring an Iddq value. Test vector Nos. of the test vectors which cause abnormality on the Iddq value are transferred to a failure block extraction part 2. The failure block extraction part 2 obtains input logic of each block constituting the LSI 5 when each test vector stored in the test vector file 1 is input to the input terminal of the LSI 5 by performing logic simulation and further produces a dump list in which the test vector Nos. and input logic make correspondence for each block. Thereafter a failure block is located based on the dump list of each block and the test vector Nos. transferred from the LSI tester 4.
Patent JP-2000050353-A (JP)
Title: Portable telephone set
Inventor: EJIMA MAKOTO
IPC: H04W48/04
Filed: 1998-07-30
Abstract: PROBLEM TO BE SOLVED: To provide a portable telephone set that sets a manner mode to a valid/invalid state properly without the need for any user operation. SOLUTION: A control section 23 receives intermittently control information from a peripheral base station via a radio section 12, a modem section 13 and a time division multiple access TDMA/time division duplex TDD processing section 14, and writes a base station identification number CS-ID in control information received at that time when accepting depression of a location registration key 182 from the user in a location information memory 22 and sets the manner mode where no display sound is generated to a valid state in the case that it is discriminated that the CS-ID in the control information sent at all times through intermittent reception is coincident with the CS-ID in the location information memory 22.
Patent JP-S6372389-A (JP)
Inventor: TAKAMI AKIKAZU
IPC: B23Q11/00
Filed: 1986-09-13
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H1061080-A (JP)
Title: Mullion
Inventor: KANO YUICHI
IPC: E04B2/96
Filed: 1996-08-16
Abstract: PROBLEM TO BE SOLVED: To provide a mullion resisting large wind pressure and having excellent internal appearance. SOLUTION: A reinforcing material 9 is connected near the indoor section of a mullion body 5 by connecting fittings 11 and used as a mullion 12, and the reinforcing material 9 is fixed under the state, in which tension is applied extending over a floor 1 and a floor slab 2. Accordingly, the mullion resisting large wind pressure is manufactured because prestress is applied to the reinforcing material 9 and the reinforcing material 9 is difficult to be deflected, and the mullion having excellent internal appearance is prepared because the reinforcing material 9 is superposed to the mullion body 5 and is not conspicuous.
Patent JP-H0535085-A (JP)
Title: Conductive composition
Inventor: ISHIHARA KO
IPC: G03G15/02
Filed: 1991-07-31
Abstract: PURPOSE:To allow the formation of a conductive layer with which a sufficient electrostatic charge quantity is obtainable and which has uniform electrostatic chargeability by combining an org. high-polymer binder resin, porous packing material, conductive powder, and a charge control agent. CONSTITUTION:This conductive compsn. is obtd. by combining the org. high- polymer binder resin, the porous packing material, the conductive powder, and the charge control agent. The org. high-polymer binder resin is preferably a polyamide resin and the porous packing material is exemplified by water absorptive and oil absorptive resins, etc., such as cellulose powder, wood meal, sepiolite, and silicon powder (oil absorptive). The content ratio of such porous packing material is preferably set in a range of 5 to 50 pts.wt. per 100 pts.wt. org. high-polymer binder resin. The conductive powder is exemplified by metal oxide powder, etc., such as carbon black and the content ratio thereof is preferably in a 5 to 30vol.% range in the conductive compsn. The charge control agent is selected from various kinds of polymers, etc., according to the electrostatic charging of toners to minus and plus.
Patent JP-H06194983-A (JP)
Title: Radiation-fixing device
Inventor: BUIRUHERUMUSU PIITAA YOHANESU
IPC: F26B23/04
Filed: 1993-08-31
Abstract: PURPOSE: To enable fixing a powder picture on a supporting body by means of radiation heat by forming an air flowing opening, arranged at a position lower than that of groove-type openings and an open connecting part fixed in an interval with the groove-type opening which is arranged at a higher part with an air duct. CONSTITUTION: The groove-type openings 7 and 8 are respectively provided on the opening side walls 5 and 6 of a guard 2. A thin plate 15 is arranged under a sheet guide wire 13 which forms the lower side of a sheet carrier passage, so as to form a lower side heat radiator, the thin plate 16 is provided on the sheet guide wire 14 which forms the upper side of the sheet carrier passage, to form an upper side heat radiator and the thin plates 15 and 16 are serially connected, in order to attain electric resistance at the both sides of the lower and the upper side heat radiators by 20Ω at when cold and 24Ω when warmed.  Then, the string of round holes 30 is formed in the neighborhood of the groove-type opening 7 for entering a sheet at the base surface 3 of a case 1, the holes 30 are mutually arranged at a regular interval and the string of square holes 31 is also provided at the regular interval on a heat reflecting plate with length being a half, compared with that between the side walls 5 and 6.
Patent JP-S6196616-A (JP)
Inventor: TAMADA KAZUMI
IPC: H01H13/70
Filed: 1984-10-17
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0497374-A (JP)
Title: Image recorder
Inventor: ITO MICHIO
IPC: G06K15/12
Filed: 1990-08-16
Abstract: PURPOSE:To reproduce one image element and to obtain a high grade small character image and a half-tone image by means of dither processing by controlling the intensity of a light beam based on the image information of a spot adjacent to the circumference of a recorded light beam spot. CONSTITUTION:The image information of, at least three scanning lines in a sub-scanning direction is stored in storage means 20-22, and the intensity of the light beam is increased or decreased based on the stored contents of the storage means 20-22 by a light intensity control means 23. When a recorded spot is a light irradiation part, and at least, all of the 4-spots of the right and left in the main scanning direction and the front and back in the sub-scanning direction, of the spot, out of the spot adjacent to the recorded spots, is an unirradiated part, the light intensity of the recorded spot is increased. Thus, one image element can be reproduced and the high grade small character image and the half-tone image by the dither processing can be obtained.
Patent JP-S6372343-A (JP)
Title: Catalyst for removing nitrogen oxide
Inventor: RIKIMARU HIROAKI
IPC: B01D53/94
Filed: 1986-09-13
Abstract: PURPOSE:To efficiently remove nitrogen oxide in flue gas containing 0.01ppm or more of As2O3 or 200-2,000ppm of sulfur oxide, by forming a catalyst for removing nitrogen oxide in said gas by compounding titanium and manganese. CONSTITUTION:For example, molded titanium oxide is impregnated with a manganese compound to form a catalyst for removing nitrogen oxide in flue gas. Titanium and manganese are used in the form of oxide, sulfate or nitrate and, when titanium is used in the form of titanium oxide, one composed of a crystal having a particle size of 150-250Angstrom  is pref. The ratio of titanium and manganese is pref. 30-99:1-70 as an element basis. In order to remove nitrogen oxide in a gaseous mixture by the catalyst, ammonia is added to the gaseous mixture in an amount of about 0.5-5mol times nitrogen oxide contained before said gaseous mixture is allowed to pass through the reaction bed packed with the catalyst.
Patent JP-2000030583-A (JP)
Title: Substrate type thermal fuse
Inventor: UEMURA MITSUAKI
IPC: H01H37/76
Filed: 1998-07-15
Abstract: PROBLEM TO BE SOLVED: To increase the welding strength between membrane electrodes and a low-melting point fusible alloy piece and to improve an operating characteristic. SOLUTION: Membrane electrode 12 are formed on an insulating substrate 11, and a low-melting point alloy piece 13 is welded between the tip sections of the membrane electrodes 12 to form this substrate type thermal fuse. Slits 121 are provided at the tip sections of the membrane electrodes 12, and the tip sections are welded to the low-melting point alloy piece 13 with parts (f), (e) of the slits 121 exposed. The membrane electrodes 12 are preferably formed by the print-baking of a conductive paste.
Patent JP-S6275852-A (JP)
Title: Semiconductor memory device
Inventor: HONMA YASUAKI
IPC: G06F21/62
Filed: 1985-09-30
Abstract: PURPOSE:To reduce greatly the effects of the disturbance and also to prevent the leakage of memory information by permitting the read/write operation only when the coincidence is obtained between the count value of the chip enable signals obtained when a specific address is selected and the set value. CONSTITUTION:A specific address is supplied to a NOR gate 11 and the output of the gate 11 is supplied to the enable terminal E of a counter 12. While the chip enable signal CE is supplied to a clock terminal CP from outside and the pulses of the signal CE are counted. The output of the counter 12 is com pared with its set value by a comparator 13. When the coincidence is obtained from said comparison, the setting signal is delivered to the preset terminal SD of an FF 14. Thus the output of the FF 14 is changed to an H level from an L level. Therefore the signal of an L level is supplied to an OR gate 16 and the signal CE is transmitted to the inside as it is for the execution of a normal action. While the reset state of the FF 14 is maintained with its output set at an L level when no coincidence is obtained from said comparison. Thus the output of the gate 16 is always kept at an H level regardless of the level of the signal CE. Then an internal circuit is set under a disable state.
Patent JP-S6370589-A (JP)
Title: Semiconductor laser module
Inventor: SHIBANUMA NAOTERU
IPC: G02B6/42
Filed: 1986-09-12
Abstract: PURPOSE:To position a lens automatically, and to reduce manufacturing cost by joining a side wall in the periphery of a window glass hermetically sealed to the side wall section of a metallic case, in which a semiconductor laser module is loaded, and a lens holder and cementing the holder and a slide ring and the slide ring and a metallic cylinder in succession. CONSTITUTION:A holder 12 is brought into contact with a projecting section 11 from a module body, the assembly of the inside of a case of which is completed, and the position of a second lens 13 is adjusted in the direction vertical to an optical axis so that beams outgoing to the outside through the second lens 13 accurately outgo forward to the module body, and the holder is held temporarily. The position of the tip of a quartz fiber 14, an outer circumference of which is protected by a metallic cylinder 15, is adjusted at an optimum position, and a metallic cylinder, a slide ring and the holder are joined. Lastly, the temporary holding of the holder is released, the position of the fiber where the holder and the slide ring are unified is regulated in the direction vertical to the optical axis and coupling efficiency is recovered, and the holder is fixed to the projecting section. Since tolerance is relaxed largely between a first lens 6 and the second lens 13 at that time, the deterioration of coupling efficiency generated by positional displacement can be ignored.
Patent JP-H0265413-A (JP)
Title: Muting circuit
Inventor: TANAKA YOSHIKAZU
IPC: H03M1/08
Filed: 1988-08-31
Abstract: PURPOSE:To eliminate a shock noise by giving a time constant with a resistor and a capacitor in the case of transition to the state detecting digital 0, applying a bias to 1st and 2nd transistors(TRs), turning on them, thereby applying muting. CONSTITUTION:When an input signal is digital 0, and output point (a) of a digital 0 detection circuit 6 is switched from 'high' to 'low' with a time constant alpha. Since a capacitor 10 is connected to a positive power supply from a midpoint between resistors 11, 12 connecting in series with the output of the digital 0 detection circuit 6, a potential at a point (b) of the base of a TR 18 connected through the resistor 14 is decreased with a time constant determined by the capacitor 10 and the resistor 11. Since muting is applied slowly in a time beta after the output of the digital 0 detection circuit 6 goes to a low level, the shock noise is almost eliminated.
Patent JP-S6194358-A (JP)
Title: Photoelectric conversion device
Inventor: AOKI YOSHITAKA
IPC: H04N5/335
Filed: 1984-10-16
Abstract: PURPOSE:To use a sensitivity layer having low resistivity, and to improve resolution characteristics in the lateral direction by forming a potential barrier by shaping a common electrode or region between a sampling electrode or region. CONSTITUTION:A plurality of sampling electrodes 7 and common electrodes 14 are formed selectively onto a substrate 6 consisting of a semiconductor, etc. An I layer 9 composed of amorphous Si is deposited. In a sensor having said structure, negative voltage is applied to the electrodes 14 and positive voltage to the electrodes 7. Optical signal charges 13 generated by beams in the upper surfaces of the sampling electrodes A flow through the electrodes A by a drift electric field EL in the sensor. The charges 13 intend to spread in the lateral direction by a diffusion phenomenon at that time, but the diffusion phenomenon is prevented by the electric field EL. Consequently, the charges shift to the adjacent sampling electrode B, thus reducing stored signal charges, then improving the deterioration of lateral resolution. Resistance need not be increased by the addition of an impurity, etc. in the photoelectric conversion layer 9, thus also enhancing optical response characteristics.
Patent JP-S6276289-A (JP)
Inventor: TANAKA EIJI
IPC: H05B41/16
Filed: 1985-09-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0380558-A (JP)
Title: Electronic parts provided with lead terminals
Inventor: HIMORI GOJI
IPC: H05K1/18
Filed: 1989-08-23
Abstract: PURPOSE:To improve productivity at the time of forming, decrease the degradation of terminal strength, and improve terminal size accuracy after working and mounting properties, by directly forming a resist coating film for preventing solder flow on the lead frame green material of the part where a plated coating film of a lead terminal is not formed. CONSTITUTION:A lead terminal is soldered and connected with terminal connection electrodes 13 formed on the surface or the rear or both surfaces of an insulative substrate 11. As to a lead frame 12, a resist coating film 15 is directly spread on a lead frame green material which is formed by punching and has not yet been subjected to plating treatment. After that, plating treatment is performed. Said lead frame 12 is inserted into the insulative substrate 11 on which parts have been mounted. By using a jet system soldering machine, the substrate 11 and the lead frame 12 are soldered. At the time of soldering, solder tends to flow out along the lead frame 12 which is used as a lead terminal. The solder, however, is blocked by the resist coating film 15 spread on the lead terminal, so that the lead frame 12 further than the resist coating part is not affected.