baber/WOPTO huggingface dataset:
Patent TW-306058-B (TW)
Title: Manufacturing method of self-aligned silicide device with extended path
Inventor: TZENG HORNG-HUEI
IPC: H01L27/105
Filed: 1996-05-20
Granted: 1997-05-21
Abstract: A manufacturing method of integrated circuit field effect transistor with silicide comprises of the following steps: (1) on silicon semiconductor substrate, forming insulator needed by isolating the above field effect transistor; (2) forming gate oxide of the above field effect transistor; (3) forming one silicon layer and one first dielectric layer; (4) by lithography and etch technology forming raised gate structure; (5) depositing one second dielectric; (6) by etching technology performing vertical one-way etch back to the above second dielectric, so as to form second dielectric spacer on two sides of the above raised gate structure; (7) removing the above first dielectric, making the above silicon layer trapped between second dielectric spacer; (8) depositing one metal; (9) performing annealing, making the above metal happen solicitation with silicon atom on the above silicon semiconductor substrate surface, so as to form metal silicide on the above silicon semiconductor substrate surface, in which the above annealing process makes the above metal happen solicitation with the silicon atom on the above silicon surface, so as to form salicide on the above silicon layer, and on the above second dielectric spacer surface leaving the above metal without solicitation; (10) removing the above metal without solicitation; (11) forming source/drain of the above field effect transistor.
Patent TW-355227-B (TW)
Title: Elastic hinge for spectacle frames
Inventor: MALFROY ROGER
IPC: G02C5/22
Filed: 1996-07-03
Granted: 1999-04-01
Abstract: An elastic hinge, including a front flange hinge element; and a side arm hinge element, both of them being connected in rotation to the front hinge element by a hinge pin, the face of the hinge pin perpendicular to the side arm hinge element having an oblique-face profile, the oblique-face profile interconnecting with a recess of the front flange hinge element; characterized in that: when the side arm hinge element rotates with respect to the flange hinge element and the profile removes from the recess, the hinge element move along the common axis of rear hinge pin and against the spring biased mechanism of the hinge pin.
Patent TW-312026-B (TW)
Title: Method of eliminating metal void
Inventor: SHYU DER-MING
IPC: H01L21/3205
Filed: 1996-09-18
Granted: 1997-08-01
Abstract: A manufacturing method of metal interconnection comprises of: (1) on silicon semiconductor wafer forming MOSFET, which includes gate oxide, gate and source/drain; (2) forming one dielectric, and by lithography and etch technology etching the above dielectric to form contact hole; (3) in sputtering chamber using sputtering technology continuously in-situ forming Al alloy and Titanium-riched TiN and TiN; (4) by lithography and etch technology etching the above TiN, Titanium-riched TiN and Al alloy to form metal interconnection.
Patent TW-332889-B (TW)
Title: Reproducing, decoding and synthesizing speech signal
Inventor: IIJIMA KAZUYUKI
IPC: G10L13/00
Filed: 1996-10-24
Granted: 1998-06-01
Abstract: A method for reproducing speech signals at a controlled speed whereby rate conversion of the time axis may be facilitated , and a method for synthesizing the speech whereby pitch conversion can be realized by a simplified structure based on the encoded speech data without changing the phoneme . With the speech reproducing method an encoding unit discriminates whether an input speech signal is voiced or unvoiced . Based on the results of discrimination , the encoding unit performs sinusoidal synthesis and encoding for a signal portion found to be voiced .
Patent TW-421672-B (TW)
Title: Method for producing crystalline alkali metal silicate granules and granular detergent composition for clothes washing having high bulk density
Inventor: YAMASHITA HIROYUKI
IPC: C11D1/83
Filed: 1996-11-01
Granted: 2001-02-11
Abstract: The method for producing crystalline alkali metal silicate granules includes the following steps: (1) preparing a mixture comprising: (a) a particular crystalline alkali metal silicate; (b) a nonionic surfactant; and (c) an acid precursor of an anionic surfactant capable of having a lamellar orientation; and (2) granulating by tumbling the mixture obtained in step (1) in an agitating mixer while increasing a bulk density at a temperature sufficiently high enough to neutralize the acid precursor, to thereby give crystalline alkali metal silicate granules having a bulk density of from 0.6 to 1.2 g/ml. The granular detergent composition for clothes washing having high bulk density is obtainable by the above method.
Patent TW-341022-B (TW)
Title: Interconnection structures and method of making same
Inventor: SHIMODO NAONORI
IPC: H05K3/46
Filed: 1996-11-19
Granted: 1998-09-21
Abstract: An interconnection structure comprizing one or more insulating films and one or more layers of conductor electrode patterns, wherein at least one of the insulating films consists of a fluorene skeleton-containing epoxy acrylate resin.
Patent TW-338814-B (TW)
Title: Chip card read/write device combined with a keyboard and data transmitting method thereof
Inventor: TAKA NOBUISHI
IPC: G06F3/00
Filed: 1997-02-05
Granted: 1998-08-21
Abstract: A sort of chip card read/write device combined with a keyboard, having: a switch coupled between the host computer and the connection lines of the keyboard; a card connection section for being connected to a connection terminal of a chip card; a code conversion section for converting data stored in the chip card into a corresponding key scan code; and a control section coupled to the host computer through the keyboard connection lines, corresponding to the command given by the host computer and transmitted by the keyboard connection lines for turning on the switching section in a keyboard mode and turning off the switching section in a card read/write mode, being the control device to control the conversion device as reference for the conversion table of the ROM for access of the data of the chip card for conversion into scan code and in the chip card read/write mode, conversion of the scan code for transfer from the keyboard connection lines to the host computer.
Patent TW-333661-B (TW)
Title: Si3N4 dry etching for preventing by-products accumulated in the etching machine
Inventor: CHEN JENG-GUU
IPC: H01L21/02
Filed: 1997-02-26
Granted: 1998-06-11
Abstract: A method of Si3N4 dry etching for preventing by-products accumulated in the etching machine, which is suitable for a semiconductor substrate to remove the Si3N4 layer, at least comprises the following steps: - filling with a first reaction air, which is able to remove the Si3N4 layer, onto the substrate to form profile of Si3N4 layer etching apertures with residual Si3N4 layer; - filling with a second reaction air, which is able to remove the Si3N4 layer , onto the substrate to etch slowly the Si3N4 layer on the substrate and on the etching apertures; and - filling with a third reaction air onto the substrate to remove etching by-products so as to end the process. In which the third reaction air react only with the by-products generated by the etching process executed by the first reaction and the second reaction air onto the Si3N4 layer, and the etching rate of the first reaction air to the Si3N4 layer is greater than that of the second reaction air to the Si3N4 layer.
Patent TW-327713-B (TW)
Title: Apparatus and method for selectively reducing capture effect in a network station
Inventor: GOPAL KRISHNA
IPC: H04L29/10
Filed: 1997-03-18
Granted: 1998-03-01
Abstract: A accessing media method in network station coupled to network media comprises: Deciding if counts of consecutively successful transmissions exceeds predetermined threshold value; If counts is over predetermined threshold, then the set delay time includes predetermined packet time interval and extra time interval; Receiving carrier not specified on sensing media; Waiting delay time in response to sense received carrier not specified; After sensing receiver carrier not specified and delay teem, from network station tries to access media.
Patent TW-449612-B (TW)
Title: An epoxy resin composition containing polyalkyl phenol resins and/or polyalkyl phenol epoxy resins
Inventor: HUANG KUEN-YUAN
IPC: C08G59/62
Filed: 1997-04-09
Granted: 2001-08-11
Abstract: This invention relates to an epoxy resin composition which comprises polyalkyl phenol resins or polyalkyl phenol epoxy resins or both, wherein the polyalky phenol resins are represented by formula (I): wherein Ra, Rb and Rc may be the same or different from each other and stand for C1-5alkyl styryl or halogen respectively; n is an integer of 0 to 4; k is an integer of 0 to 3; l is an integer of 0 to 4; and m is an integer 1 to 10; and the polyalkyl phenol epoxy resins, which are obtained by reacting polyalkyl phenol resins of formula (I) with epihalohydrins, are represented by formula (II): wherein G stands for, while the other symbols are the same as those defined above. The epoxy resin composition of this invention is able to provide a reactivity at lower temperatures and provide lower viscosity when used as hardener resins, as compared with traditional phenolic novolacs. Excellent molding properties and excellent stress resistance in soldering are obtained accordingly when such composition is used in electronic packaging.
Patent TW-333743-B (TW)
Title: The method for producing multi-layers circuit board
Inventor: LIN DING-HAW
IPC: H05K3/46
Filed: 1997-04-16
Granted: 1998-06-11
Abstract: A producing method for multi-layers circuit board by using sand-blasting to form blind hole, includes: - Form inter-Cu foil wiring on hard board. - Cover insulating layer, and press Cu foil. - Cover barrier, and by the opening that is defined by barrier to proceed etching for Cu foil, to expose portion of insulating layer. - Use barrier as mask, to proceed sand blasting for insulating layer located inside the opening, to remove insulating layer inside the opening, and form blind hole for exposing inter-Cu foil wiring. - Remove barrier layer. - Proceed electroplating, to form electroplating layer stuck on external surface and each blind hole. - Define electroplating layer to form outer-layer Cu foil wiring. - Based on the desiring of circuit board layers, to repeat above steps till forming desiring circuit board layers. Compose a multi-circuit board producing method to connect Cu foil wiring on each layer by vertical blind hole.
Patent TW-363078-B (TW)
Title: 1,2-N-acyl-N-methylene-ethylenediamine, and electroconductive paste comprising it
Inventor: UMEDA HIROAKI
IPC: H01B1/22
Filed: 1997-04-24
Granted: 1999-07-01
Abstract: The invention provides a novel compounds which are useful as dispersants, rust inhibitors, curing promoters for epoxy resins, electroconductivity-imparting agents, mold lubricants, etc. An electroconductive paste with excellent electroconductivity and much improved long-term stability is obtained by mixing 100 parts by weight of a thermosetting resin with from 250 to 900 parts by weight of a metal filler and from 1 to 50 parts by weight of the 1,2-N-acyl-N-methylene-ethylenediamine; or by adding from 250 to 900 parts by weight of a metal filler coated with the 1,2-N-acyl-N-methylene-ethylene-ethylenediamine to 100 parts by weight of a thermosetting resin.
Patent TW-332277-B (TW)
Title: Apparatus for paying out a sheet body
Inventor: EHARA TAKASHI
IPC: G07F11/16
Filed: 1997-05-23
Granted: 1998-05-21
Abstract: An apparatus for paying out a sheet body at least comprises: (1) A suction apparatus (21) having an air suction means (26) and an opening (22) for absorbing the sheet body; (2) A sending out means (27) for resisting the absorption to send out sheet body which is absorbed from the opening of the suction means.
Patent TW-342476-B (TW)
Title: Character generator
Inventor: SHINKI YUTAKA
IPC: G09G5/26
Filed: 1997-07-10
Granted: 1998-10-11
Abstract: A character generator comprising: an input section which inputs the information on the character codes, type faces, character sizes, etc., of the character patterns; a character information memory section which stores character structure information including radical structure information representing a kind and a position/size of a radical of kanji or like characters and each stroke information other than the radical for each character code; a radical information memory section which stores each stroke information based on the radical structure information for each type face; a contour information memory section which stores the contour information corresponding to the stroke information for each typeface; a stroke information reading-out section which reads the radical constitution information included in one piece of the character constitution information and the stroke information exclusive of the radicals out of a character information memory section in accordance with the inputted character codes and the kinds of the type faces, further, reads respective pieces of the stroke information of the radicals corresponding to this radical constitution information out of a radical information memory section and respectively positions the information; a character generating section which reads respective pieces of the contour information corresponding to respective pieces of the read out stroke information out of a contour information memory section according to the type faces and generates the same to one character pattern; and an output section for outputting the generated character patterns.
Patent TW-414934-B (TW)
Title: Transfer apparatus and vertical heat-processing system using the same
Inventor: KIKUCHI HIROSHI
IPC: B65G49/07
Filed: 1997-09-10
Granted: 2000-12-11
Abstract: A vertical heat-processing system has a transfer apparatus (9) for transferring semiconductor wafers (W) and for transferring a cassette (C) of a container. The transfer apparatus (9) has a base (8) which is movable upward and downward and which is rotatable in a horizontal plane. A moving arm (25, 26) is disposed above the base (8) for transferring wafers when loaded with the same. The wafer moving arm (25, 26) disposed above the base (8) is capable of horizontal reciprocating movement between a waiting position and an entry/exit position. A cassette (C) moving arm (27) is further disposed above the base (8) for transferring the cassette (C) when loaded with the same. The cassette (C) moving arm (27) disposed above the base (8) is capable of horizontal reciprocating movement between a retracted position and a projecting position. The wafer moving arm (25, 26) is opposite to the cassette (C) moving arm (27) and initiates entry and retraction in mutually opposite directions. When the wafer moving arm (25, 26) and the cassette (C) moving arm (27) are disposed respectively at the waiting position and the retracted position, a cassette fastening portion (27b) of the cassette (C) moving arm (27) is present directly above the wafer moving arm (25, 26).
Patent TW-373307-B (TW)
Title: Flash memory component structure having light ring source electrode and the data erase method
Inventor: HSU CHING-HSIANG
Filed: 1997-11-17
Granted: 1999-11-01
Abstract: When flash memory component is processing data erase, if source erase type is used, it usually due to hot electric hole generation to speed up oxide layer degradation, partial electric hole fell into perforated oxide layer to block voltage suction, making erasing speed to reduce; if channel erase type is used, it needs to cooperate triple well producing procedure for achievement, not only with complex steps which is disadvantageous to production, and also due to component occupies too big a substrate area making advantageous to shrinking process. Therefore this invention provides a kind of improved flash memory component structure, to additionally arrange mixing zone of opposite electric in source electrode zone close to gate electrode zone, forming a flash memory component of light ring halo source. When it is erasing data, separately providing a negative voltage to control gate electrode and providing a positive voltage to source electrode zone, making passage zone to accumulate voltage and rewind to hole channel, wherein by using mixing zone to transmit electric hole passage zone also having high electric field equivalent to source electrode zone, and therefrom injecting in float joint gate electrode for voltage to be able to erase and suction, and via electric hole passage and mixing zone to flow to source electrode zone. In this way it not only can avoid generating electric hole to collapse to pass through oxide layer as a problem, improving the reliability of component, and not necessary to implement complex triple well zone processing, and helpful to lift the production efficiency.
Patent TW-388042-B (TW)
Title: Variable capacitor
Inventor: KISHISHITA HIROYUKI
IPC: H01G5/04
Filed: 1997-12-19
Granted: 2000-04-21
Abstract: In a variable capacitor having a stator with a stator electrode and a rotor with a rotor electrode both of which are housed in a recess section of a casing while allowing the recess section to be closed by a aover, enabling the rotor to be brought into stable close contact with the stator. To this end, a cover (46) made of a chosen metal includes a cover main body (55) which covers the upper opening of a recess section (45) except for an adjustment hole (54) that exposes a driver groove (30) of the rotor (43), leg sections (56,57) which engage a casing (44) letting the cover main body (55) be secured to the casing (44), and a rotor terminal. The cover main body (55) has a size corresponding to the outer diameter of the variable capacitor (41). This cover main body (55) may have a vent shape so as to create intended elastic force which may act to compress the rotor (43) against the stator (42). More preferably, a spring washer (60) is provided which integrally extends from the cover main body (55) and is folded so that it is placed between the cover main body (55) and the rotor (43).
Patent TW-345539-B (TW)
Title: High temperature release films
Inventor: MINGLIANG LAWRENCE TSAI
IPC: B32B27/32
Filed: 1998-01-22
Granted: 1998-11-21
Abstract: A multilayered film comprising: a) a first layer comprised of a polyamide homopolymer or a polyamide containing copolymer; b) a second layer comprised of polymethylpentene homopolymer or a polymethylpentene containing copolymer; and c) an interlayer between a surface of the first layer and the second layer comprised of a polymeric adhesive, which film is independently oriented at least 2 times in the longitudinal and/or transverse direction.
Patent TW-452934-B (TW)
Title: Borderless vertical stacked contact processing
Inventor: TSUEI BING-YUE
IPC: H01L21/768
Filed: 1998-02-11
Granted: 2001-09-01
Abstract: The present invention provides a borderless vertical stacked contact processing for electric connections between multiple metal layers in the integrated circuit which includes the following steps: sequentially forming the inter-metal dielectric layer and the etching stop layer on the first conductive layer; forming the trench through the etching stop layer and extending to part of the depth of the inter-metal dielectric layer; forming the photoresist on the inter-metal dielectric layer such that the photoresist has an opening which is partly overlapped with the opening of the trench; using the photoresist and the etching stop layer as the mask to form the contact connecting to the first conductive layer; depositing the second conductive layer for filling and covering the contact and the trench; and, conducting back polishing by chemical mechanical polishing to at least remove the shallow trench on the surface of the etching stop layer caused by the etching, and keeping at least part of the depth of the etching stop layer; completing the conductive contact which is borderless and can have repetitively stacking process. Because the surface of the contact is a planarized surface and the area outside the contact covers the etching stop layer, the processing to form the stacked multiple conductive layer structure can be repeated and the integrity of integrated circuit can be increased.
Patent TW-495705-B (TW)
Title: Method for controlling semiconductor equipments
Inventor: KIM SUNG-GEUN
IPC: G05B19/418
Filed: 1998-04-07
Granted: 2002-07-21
Abstract: A method for controlling semiconductor equipments capable of preventing an interlocked equipment from being automatically operated by mistake of an operator. In the method, optimal process conditions for respective steps of a process are registered in a host computer. The registered optimal process condition is compared with process data reported from a corresponding equipment. If it is determined that the reported data are in the range of the optimal process conditions through the comparison, it is determined whether the reported data satisfies a specific rule registered in the host computer or not. If it is determined that the reported data satisfies the specific rule, the process is continuously performed. Otherwise, if it is determined that the reported data does not satisfy the specific rule, the equipment and a tracking module of the host computer are simultaneously interlocked and thereby the interlocking is automatically saved in the host computer. The process is stopped until the process failure is solved. On the other hand, if it is determined that the reported data is not in the range of the optimal process condition, a product processed through the presently performed process is waited. Thereby, it is possible to recheck whether or not to introduce the following lot into the equipment using the interlocking information of the tracking module saved in the host computer.
Patent TW-374954-B (TW)
Title: Integrated CVD/PVD AL planarization using ultra-thin nucleation layers
Inventor: CHEN LIANG-YUH
IPC: H01L21/768
Filed: 1998-04-09
Granted: 1999-11-21
Abstract: The present invention provides a method and apparatus for forming an interconnect with application in small feature sizes (such as quarter micron widths) having high aspect ratios. Generally, the present invention provides a method and apparatus for depositing a wetting layer for subsequent physical vapor deposition to fill the interconnect. In one aspect of the invention, the wetting layer is a metal layer deposited using either CVD techniques or electroplating, such as CVD aluminum (Al). The wetting layer is nucleated using an ultra-thin layer, denoted as +531 layer, as a nucleation layer. The +531 layer is preferably comprised of a material such as Ti, TiN, Al, Ti/TiN, Ta, TaN, Cu, a flush of TDMAT or the like. The +531 layer may be deposited using PVD or CVD techniques, preferably PVD techniques to improve film quality and orientation within the feature. Contrary to conventional wisdom, the +531 layer is not continuous to nucleate the growth of the CVD wetting layer thereon. A PVD deposited metal is then deposited on the wetting layer at low temperature to fill the interconnect.
Patent TW-495706-B (TW)
Title: System for restricting use of measuring apparatus
Inventor: NGUYEN JOHN H
IPC: G06F1/00
Filed: 1998-06-26
Granted: 2002-07-21
Abstract: A host computer is used to enter into a measuring apparatus to be leased, a contracted term of lease and the date when the lease starts, and/or a contracted number of times the measuring apparatus can be used, and the warning time when a warning message should be given. After the warning time, the warning message is displayed. When the contracted term of lease expires or when the measuring apparatus has been used the contracted number of times, a message notifying the user of the expiration of the lease is displayed and/or the functions of the measuring apparatus are disabled.