Patent WO-2023143907-A1 (WO)
Title: Semiconductor structure for electrodeposition bonding
Inventor: NAKAMURA KOKI
IPC: H01L21/60
Filed: 2023-01-10
Abstract: A semiconductor structure includes a wafer (903) having a wafer outer surface; a semiconductor chip (901); and a plurality of copper pillars (121, 121A) on the semiconductor chip (901). The copper pillars (121) have end portions and pillar outside surfaces. Also included are a plurality of copper pads (119, 1119, 1119A) on the wafer (903). The copper pads (119, 1119, 1119A) have end portions aligned with the end portions of the plurality of copper pillars (121, 121A) on the semiconductor chip (901), and the end portions of the plurality of copper pillars (121, 121A) and the end portions of the plurality of copper pads (119, 1119, 1119A) define a plurality of bonding material receiving regions. The copper pads (119, 1119, 1119A) have pad outside surfaces. An electrodeposited copper bonding layer (199) is formed on the pillar outside surfaces, the pad outside surfaces, the bonding material receiving regions, and portions of the outer surface of the wafer (903). The portions of the outer surface of the wafer (903) have an annular shape about the copper pads (119, 1119, 1119A) when viewed in plan, which may be defined by size difference between openings in first and second resist layers (187, 189) used for depositing the copper pads (119) on a wafer seed layer (125+123). At least one of the pillar end portions and the pad end portions are curved. The chip (901) may include a chip seed layer (125+123), the copper pillars (121, 121A) being located on the chip seed layer (125+123). The wafer seed layer (125+123, 1111, 1111A) and the chip seed layer (125+123) may each include an inner titanium layer (125) and an outer copper layer (123). The copper pads (119) may have a larger diameter than the copper pillars (121, 121A), wherein the copper bonding layer (199) may include fillets (311) adjacent to the bonding material receiving regions when viewed in cross section and radially outward thereof when viewed in plan and wherein further the copper bonding layer (199) does not have a scallop shape (313) adjacent to the bonding material receiving regions when viewed in cross section. The plurality of copper pillars (121, 121A) may have cylindrical protrusions outward of the curved pillar end portions. The plurality of copper pillars (121, 121A) may have cross-shaped protrusions outward of the curved pillar end portions. The plurality of copper pillars (121) may have elliptical cross sections when viewed in plan. A plurality of additional semiconductor chips (901) may be bonded to the wafer (903) in an equivalent manner. Prior to the electrodepositing of the copper bonding layer (199), the semiconductor chip (901) and the wafer (903) may be temporarily affixed via at least one of soldering of, and adhesive application on, corresponding temporary fixing structures (997, 999) or via ultrasonic bonding of the aligned copper pillars (121A) and copper pads (119), wherein, in the latter case, protrusions may be formed on at least one of the copper pillars (121A) and the copper pads (119), prior to the ultrasonic bonding. A tin plating film (1299) may be formed on the surface of the copper bonding layer (199), wherein solid phase diffusion is performed to form an intermetallic compound on the surface, helping prevent damage from stripping and etching. After etching the seed layers (125+123), electroless nickel (1297) and gold (1295) plating may be fabricated on the surface of the joints to cover them by stable metal, preventing corrosion or oxidation.