baber/WOPTO huggingface dataset:
Patent TW-I243685-B (TW)
Title: Acidic composition for oral administration and its uses
Inventor: BAKER NICOLA JANE
IPC: A23L29/269
Filed: 1999-09-08
Granted: 2005-11-21
Abstract: The use of viscosity modifying polymer materials, commonly used as stabilisers, thickeners and emulsifiers, as tooth erosion inhibitors in acidic compositions for oral administration, especially in acidic beverages such as fruit drinks and oral healthcare products such as mouthwashes, in which the effective pH of the composition is less than or equal to 4.5.
Patent TW-451522-B (TW)
Title: Connector socket and connector plug
Inventor: ARAI JUNICHI
IPC: H01R13/64
Filed: 1999-09-10
Granted: 2001-08-21
Abstract: The insulator 310 is kept inside the fishcake-shaped metal cap 320. The plate-shaped contact supporter 312 is protruded forwards from the main body of its insulator. The fine stripe contacts are arranged on both faces of the supporter 312. The key protruding faces 314, 315 are protruded forwards from the insulator 310 in the manner of clamping the supporter 312. One part of the ring-shaped groove 301 of metal cylinder to be inserted with the plug is constructed between the key protruding faces 314, 315 and the metal cap 320. The key groove 313 is formed on the face opposite to the supporter 312 of the key protruding face 314. Plural contacts are included in this invention such that the combination in between different kinds of connectors is stopped and the miniature is formed.
Patent TW-427007-B (TW)
Title: The manufacturing method for increasing the surface area of the lower electrode of DRAM
Inventor: JANG DING-JANG
IPC: H01L27/108
Filed: 1999-09-17
Granted: 2001-03-21
Abstract: A manufacturing method for increasing the surface area of the lower electrode of DRAM. First form the silicon layer, then proceed the etching step to form an uneven surface on the exposed silicon surface to increase the surface area of the silicon layer. Then proceed the chemical displacement procedure by using the displacement solution to displace the etched silicon layer with metal layer, and maintain the original shape of the silicon layer. Thereafter, the annealing process is proceeded to make the metal layer more delicate to reduce the thin-film leakage current.
Patent TW-429672-B (TW)
Title: Method of using capacitor to make transimpedance amplifier generate pole peaking phenomenon to increase its operation bandwidth
Inventor: JAN YI-REN
IPC: H03F1/42
Filed: 1999-10-05
Granted: 2001-04-11
Abstract: This invention is about the method of using capacitor to make transimpedance amplifier generate pole peaking phenomenon so as to increase its operation bandwidth, in which a peaking capacitor is used to increase the pole of transimpedance amplifier circuit so as to cause phase change of the circuit and raise bandwidth of the whole transimpedance amplifier. This technique is simple and will not change the frame of original circuit. In addition, DC gain of amplifier will not be changed in this invention.
Patent TW-449872-B (TW)
Title: Method for forming contacts of semiconductor devices
Inventor: KIM JEONG-HO
IPC: H01L21/60
Filed: 1999-11-10
Granted: 2001-08-11
Abstract: Disclosed is a method for forming contacts of a semiconductor device. In accordance with the invention, an oxidized silicon-rich nitride film is used as an etch barrier film for a self-aligned contact (SAC) process. Accordingly, the oxidized silicon-rich nitride film exhibits less stress, as compared to an LPCVD nitride film, thereby being capable of avoiding a degradation in the characteristics of the devices finally produced or distortion of the wafer used. There is no formation of cracks occurring in the nitride film during a subsequent thermal process. It is also unnecessary to conduct an additional reflection preventing process. Accordingly, the entire process is simplified. It is also possible to improve a decrease in the operating speed of the devices due to a parasitic capacitance existing among conductive lines because the oxidized silicon-rich nitride film has a low dielectric constant, as compared to nitride films. No damage occurs in the oxidized silicon-rich nitride film, so that it is possible to prevent the substrate from being damaged.
Patent TW-457611-B (TW)
Title: Wafer-level package, a method of manufacturing thereof and a method of manufacturing semiconductor devices from such a wafer-level package
Inventor: MARUYAMA SHIGEYUKI
IPC: H01L21/3205
Filed: 1999-12-22
Granted: 2001-10-01
Abstract: A wafer-level package (10A; 10B; 10C; 10D; 10E; 10F; 10G; 10H; 10I; 10J; 10K; 10L; 10M; 10N) includes a semiconductor wafer (11) having at least one semiconductor chip circuit forming region (12) each including a semiconductor chip circuit each provided with test chip terminals (13A) and non-test chip terminals (13B), at least on external connection terminal (14), at least one redistribution trace (15) provided on the semiconductor wafer (11), at least one testing member (16; 27; 33; 36), and an insulating material (17; 19; 20). A first end of the redistribution trace (15) is connected to one of the test chip terminals (13A) and a second end of said redistribution trace (15) is extended out to a position offset from the chip terminals (13; 13A; 13B). The testing member (16; 27; 33; 36) is provided in an outer region (18) of the semiconductor chip circuit forming region (12), and the second end of the redistribution trace (15) is connected to the testing member (16; 27; 33; 36).
Patent TW-578142-B (TW)
Title: Writable optical information recording medium
Inventor: LUO TUNG
IPC: G11B7/00
Filed: 2000-01-13
Granted: 2004-03-01
Abstract: The present invention is a writable optical information recording medium, which sequentially includes a substrate, a lower dielectric layer, a recording layer, an upper dielectric layer, a first reflective layer, and a second reflective layer, and which employs the phase change of the recording layer to perform the writing operation; wherein, the heat conductivity of the first reflective layer is larger than that of the second reflective layer, so that when the recording layer is recorded with information by the phase change, the material can be rapidly cooled in the process from the crystalline state into amorphous state. Therefore, the present invention can prevent the re-crystallization in the amorphous area by the remaining temperature on the upper dielectric layer to have a lower jitter value.
Patent TW-509910-B (TW)
Title: Magnetic head support mechanism and magnetic disk drive
Inventor: TOKUYAMA MIKIO
IPC: G11B5/54
Filed: 2000-03-04
Granted: 2002-11-11
Abstract: The present invention relates to a magnetic head support mechanism for a magnetic disk drive and more particularly to a magnetic head support mechanism with a loading/unloading mechanism which reduces deformations of and damages to a gimbals during unloading and has excellent impact resistance during operation. When a negative pressure slider is used in the magnetic head support mechanism with a loading/unloading function, the gimbals is likely to be deformed or damaged. Apart from the first tab provided to the front end of the suspension, the second tab is provided to the front end of the gimbals. In addition to the Suspension supporting ramp, the ramp portion has the second ramp for supporting the gimbals. This arrangement allows the slider mounting gimbals, in addition to the suspension, to be loaded/unloaded. Unlike the conventional drive in which only the suspension is loaded/unloaded, this arrangement enables the gimbals to be loaded/unloaded while maintaining a predetermined space between the gimbals and the suspension, thus reducing the risk of gimbals deformation and damage.
Patent TW-459325-B (TW)
Title: Test board for semiconductor devices and test apparatus comprising the same
Inventor: KIM CHANG-NYUN
IPC: G11C29/56
Filed: 2000-05-31
Granted: 2001-10-11
Abstract: A test board for detecting failures of the semiconductor devices, comprise a mother board comprising semiconductor devices and other peripheral components mounted on its front surface and electrically connected to the mother board by circuit wirings, and test connection terminals formed on a rear surface of the mother board and electrically connected to the semiconductor devices. The test apparatus for semiconductor devices comprises the test board, a connector mechanically and electrically connected to the test connection terminals, and an interface board electrically connected to the connector. Test sockets for receiving a semiconductor device to be tested, or socket for receiving a memory module are mounted on the interface board for symmetrically reversing the arrangement order of the test connection terminals. The test board and the test apparatus provide a test environment the same as actual usage conditions of the semiconductor devices, and hence prevent the delay or the distortion of the electrical signals due to unnecessary resistance, inductance, or parasitical capacitance even when using a low-priced mother board for computer.
Patent TW-I252303-B (TW)
Title: Backlight assembly with a light pipe having an integral surface diffuser
Inventor: HOSSEINI ABBAS
IPC: G02B6/00
Filed: 2000-06-01
Granted: 2006-04-01
Abstract: A backlight assembly is disclosed having a light pipe and at least one light source located at an edge of the light pipe. The light pipe has a back surface and a front surface opposite the back surface. The light pipe also has one or more light directing, diffusing, turning, or brightness enhancing film layers adjacent the front surface. The light pipe also has an integral surface diffuser microstructure molded, embossed, or otherwise replicated in the front surface of the light pipe.
Patent TW-I222844-B (TW)
Title: Printed circuit board and its manufacturing method
Inventor: SAIJO KINJI
IPC: H01L21/60
Filed: 2000-06-02
Granted: 2004-10-21
Abstract: By using a clad technique and adopting a bare chip mount system using an anisotropic conductive adhesive in a connection system of electronic parts, a solder reflow process becomes unnecessary. Thus, there is provided a process for producing a clad plate for printed wiring board, an IC card and a printed wiring substrate, which makes it possible to use an inexpensive material such as PET and can produce the printed wiring board at low cost. Therefore, the printed wiring board forms a clad plate (31) for the printed wiring board, which has a laminated structure, by pressure-bonding a bump forming foil (13) made of a copper foil material to one side face of a circuit forming foil (11) made of the copper foil material through an etching stop layer (12) made of a nickel foil material or a nickel plating, and a resin film (17) such as PET is bonded to the other side face of the clad plate (31) for the printed wiring board.
Patent TW-469463-B (TW)
Title: Emitter, manufacture method of emitter, and manufacture method of cold electron emitting element
Inventor: NORIKANE TETSUYA
IPC: H01J1/304
Filed: 2000-06-23
Granted: 2001-12-21
Abstract: The cold electron emitting element of the present invention is formed by the emitter, the emitter is formed by etching the pole shape multiple crystal films which grown on the substrate along the crystal axis of the pole shape crystal grain. In the cold electron emitting element of the present invention, even when a plurality of emitters are formed, the cold electron emitting element with uniform shape of the emitters, and with caused by the variation of the emitter shape be suppressed, and with uniform emitting character on a larger area, can be produced.
Patent TW-511090-B (TW)
Title: Testing device and method for testing a memory as well as a circuit-arrangement
Inventor: OHLHOFF CARSTEN
IPC: G01R31/28
Filed: 2000-06-28
Granted: 2002-11-21
Abstract: This invention relates to a testing device (4) test a memory formed on or in a substrate (1), said memory has many memory-cells (2), wherein the testing device performs a test of the memory according to a test-programm, said testing device (4) has an interpretation device, which drives and tests the memory according to the test-programm, the test-programm is stored in the testable memory. This invention also relates to a method to test a memory as well as to a circuit-device with many circuits (1a), especially memories, formed at a common substrate, said circuits have an inter-space (55) between them so as to separate the circuits, some lines (51) are formed in the inter-space (55), these lines (51) can connect each circuits (la) with one another and/or with one or more additional circuits.
Patent TW-460919-B (TW)
Title: Semiconductor device and manufacturing method thereof
Inventor: OHTA HIROYUKI
IPC: H01L27/04
Filed: 2000-08-28
Granted: 2001-10-21
Abstract: A semiconductor device comprises a semiconductor substrate (2), a first electrode (8) connected electrically with the semiconductor substrate (2), and a second electrode (10) disposed on the first electrode (8) through a dielectric film (9) having a perovskite structure wherein the first electrode (8), the dielectric film (9), and the second electrode (10) constitute a capacitor, and the lattice interplanar spacing of the second electrode (10) is smaller than the lattice spacing of the second electrode (10) in a stress free state.
Patent TW-472279-B (TW)
Title: Pattern drawing apparatus and pattern drawing method
Inventor: HEIKE SEIJI
IPC: H01L21/027
Filed: 2000-10-06
Granted: 2002-01-11
Abstract: This invention is about a pattern drawing apparatus for drawing complex patterns rapidly. It focuses on the situation that it still makes lighting currents from the probe to the base board keep certain voltage without proceeding feedback control but adding certain voltage when the drawing distance is shorter. That is, it proceeds feedback processing in advance then tests to remember expectable voltage of the lighting currents to only proceed remembering ON/OFF of voltage without proceeding feedback when drawing.
Patent TW-564402-B (TW)
Title: Data reproduction apparatus and method with improved performance by adjusting filter coefficients of equalizer
Inventor: SHIM JAE-SEONG
IPC: H04L25/34
Filed: 2001-01-20
Granted: 2003-12-01
Abstract: A data reproduction apparatus and method capable of improving data reproduction performance by adjusting the filter coefficients of an equalizer including a digital filter, and connected before a Viterbi detector. A level of the output value of the equalizer is detected based on a reference level set in the Viterbi detector, and a level error of the detected level with respect to a predetermined reference value is detected. The filter coefficients of the equalizer are adjusted such that the level error is minimized, thereby improving the detection performance of the Viterbi detector.
Patent TW-478098-B (TW)
Title: Barrier layer deposition using HDP-CVD
Inventor: M SAAD HICHEM
IPC: H01L21/314
Filed: 2000-11-01
Granted: 2002-03-01
Abstract: A method of depositing a film, such as a barrier layer, on a substrate using a gaseous mixture including a hydrocarbon-containing gas and a silicon-containing gas. Suitable hydrocarbon-containing gases include alkanes such as methane (CH4), ethane (C2H6), butane (C3H8), propane (C4H10), etc. Suitable silicon-containing gases include silanes such as monosilane (SiH4). The method generally comprises providing a suitable gaseous mixture to the chamber, generating a plasma from the gaseous mixture, and depositing a film onto the substrate using the plasma. In a preferred embodiment, the film is deposited in a high-density plasma chemical vapor deposition (HDP-CVD) system. The gaseous mixture typically includes a silicon containing gas, such as an alkane, and a hydrocarbon containing gas, such as a silane. Embodiments of the method of the present invention can integrated stack structures having an overall dielectric constant of about 4.0 or less. Such a structure may include a barrier layer having a dielectric constant of 4.5 or less.
Patent TW-583774-B (TW)
Title: Scalable LED with improved current spreading structures
Inventor: TARSA ERIC J
IPC: H01L33/00
Filed: 2001-03-29
Granted: 2004-04-11
Abstract: An LED with improved current spreading structures that provide enhanced current injection into the LED's active layer (14), improving its power and luminous flux. The current spreading structures can be used in LEDs larger than conventional LEDs while maintaining the enhanced current injection. The invention is particularly applicable to LEDs having insulating substrates (12) but can also reduce the series resistance of LEDs having conductive substrates. The improved structures comprise conductive fingers (20a, 20b, 22) that form cooperating conductive paths that ensure that current spreads from the contacts (19, 21), into the fingers (20a, 20b, 22) and uniformly spreads through the oppositely doped layers (15, 16). The current then spreads to the active layer (14) to uniformly inject electrons and holes throughout the active layer (14), which recombine to emit light.
Patent TW-492263-B (TW)
Title: Method for detecting and compensating for radio link timing errors
Inventor: LUNDH PETER
IPC: H04J3/06
Filed: 2000-12-15
Granted: 2002-06-21
Abstract: A method for detecting and compensating for radio link timing errors in a mobile communication system is disclosed, whereby a mobile station determines that one or more radio link transmissions from the network are outside or nearly outside of that mobile station's receiving time window, and reports such information to the network for appropriate action.
Patent TW-446849-B (TW)
Title: Confirmation method of the accuracy of automatic focusing
Inventor: LIN JIN-SHENG
IPC: G03B13/32
Filed: 2000-12-28
Granted: 2001-07-21
Abstract: A confirmation method of the accuracy of automatic focusing is disclosed, wherein the YUV values for forming a photograph are generated by random numbers, calculate the theoretical RGB value of the pixels of formed image by image formation formula, calculate the RGB of the pixels of CCD formed image by CCD distance, dispersed energy and their intersection, calculate the evaluated number of various CCD distances to form an evaluation curve; judge and count statistically the number of times that the peak of the evaluation curve is at the image formation position in order to obtain the successful times of in-focus, and analyze and calculate the in-focus performance for successful in-focus; vary YUV to generate different photographs for obtaining plural in-focus performance; calculate the average value of the successful rate of in-focus and the in-focus performance for comparing the versatility and analyzing the degree of versatility.
Patent TW-487586-B (TW)
Title: An antibacterial composition for diffusing to combat bacteria contained in the air, a method of diffusing such a composition
Inventor: GOMEZ CORINNE
IPC: A61L9/03
Filed: 2001-02-08
Granted: 2002-05-21
Abstract: The invention provides a composition for diffusion in the air of an enclosure to be treated to combat the bacteria contained in the air of said enclosure. The composition comprises 2-phenylphenol and natural and/or synthetic thymol dissolved in a solvent comprising isopropyl alcohol, for example. The invention also provides a method of combating the bacteria in the air of an enclosure to be treated, which method comprises a step of diffusing said antibacterial composition into the air of said enclosure. Finally, the invention provides the use of a catalytic combustion flask for implementing such a method.
Patent TW-591709-B (TW)
Title: Easy to remove hard mask layer for semiconductor device fabrication
Inventor: ATHAVALE SATISH D
IPC: H01L21/033
Filed: 2001-02-09
Granted: 2004-06-11
Abstract: A method for forming a patterned shape from a noble metal, in accordance with the present invention, includes forming a noble metal layer (109) over a dielectric layer (105) and patterning a hard mask layer (113) on the noble metal layer. The hard mask layer includes a mask material that is selectively removable relative to the noble metal layer and the dielectric layer and capable of withstanding plasma etching. Alternately, the hard mask material may be consumable during the noble metal layer plasma etching. Plasma etching is performed on the noble metal layer in accordance with the patterned hard mask layer. The hard mask layer is removed such that a patterned shape (109) formed in the noble metal layer remains intact after the plasma etching and the hard mask removal.
Patent TW-512360-B (TW)
Title: Charge pumping circuit
Inventor: TSAI HUNG-PING
IPC: H02M3/07
Filed: 2001-03-16
Granted: 2002-12-01
Abstract: A kind of charge pumping circuit, which has the function of avoiding the decrease of charge pumping effect due to body effect, is disclosed in the present invention. The invention is featured with using two sets of charge pumping circuits and having the following structure. The source of transistor for each charging circuit layer is connected to the drain of NMOS transistor corresponding to the next layer. The gate of NMOS transistor for the first set of charge pumping circuit is connected to the source of transistor for the second set of charge pumping circuit; and the gate of transistor for the second set of charge pumping circuit is connected to the source of transistor for the first set of charge pumping circuit. In addition, the invention uses a CMOS circuit to control the operation of NMOS transistor in each layer so as to increase the charge pumping efficiency.
Patent TW-503446-B (TW)
Title: Mask holder arranged with multiple reticles and its photolithography process
Inventor: LIN BURN J
IPC: H01L21/00
Filed: 2001-03-21
Granted: 2002-09-21
Abstract: This invention provides a mask holder arranged with multiple reticles, which possesses a plural number of windows for being installed with a plural number of reticles for performing photolithography exposure process. The exposure combination area assembled by these reticles is used to define a wafer, in which there is a fine tuning device on the side of every reticle to adjust the position and angle of the reticle during installation of the reticle onto a window and thus make these reticles parallel with each other. Therefore, the mask holder arranged with multiple reticles can be moved in the way that the mask for the forthcoming exposure process is moved below the exposure light source to proceed the exposure step so that any combined pattern from these reticles can be formed on the surface of the wafer.
Patent TW-494438-B (TW)
Title: Method of recycling fluorescent substance for fluorescent lamp, recycled fluorescent lamp and lighting apparatus using thereof
Inventor: IZUMI MASAHIRO
IPC: H01J9/52
Filed: 2001-03-29
Granted: 2002-07-11
Abstract: A method of recycling fluorescent substance for fluorescent lamp is disclosed, whose feature comprises: the process to categorize the disused fluorescent lamps according to types and species of fluorescent substance; the process of recycling the fluorescent substance from said disused fluorescent lamps after being categorized; the process to remove mercury contained in said recycled fluorescent substance, and to regenerate said fluorescent substance.
Patent TW-484217-B (TW)
Title: White light package structure containing two LEDs
Inventor: CHANG HSIU-HEN
IPC: H01L25/075
Filed: 2001-05-29
Granted: 2002-04-21
Abstract: The present invention discloses a white light package structure containing two LEDs (light emitting diodes) with compensatory wave lengths in cascade. For example, by packaging a yellow LED die above the blue LED die or packaging the blue LED die above the yellow LED die, a white light can be obtained when a blue light is emitted through a yellow light or the yellow light is emitted through the blue light. The present invention can be a single-positive-single-negative or a double-positive-single-negative package structure.