Patent GB-891993-A (GB)
Title: Improvements in or relating to time assignment speech interpolation systems
IPC: H04J3/17
Filed: 1959-09-01
Abstract: 891,993. Time assignment speech iriterpolation systems. WESTERN ELECTRIC CO. Inc. Sept. 1, 1959 [Sept. 23, 1958], No. 29789/59. Class 40 (4). In a time assignment speech interpolation system, in which a separate channel is used for signalling the identities of channels from which listeners are to be disconnected, during times of no disconnection activity, the channel is caused to carry error checking signals consisting of pairs of signals, the first of which indicates the identity of a channel and the second of which indicates the identity of the talker connected to that channel. It is observed that in periods of high disconnection activity no error can persist for long periods. At low traffic density, however, an error may persist also unless means are provided to correct it. Transmitter. Connect operations.-As described in Specification 845,174, switching of the 120 talkers to the various ones of the 36 transmission channels is effected by the use of a time division multiplex highway 108, on which each transmission channel is allotted a fixed time position during which gates 185 gate the pulses from the highway 108 to the speech channel via an amplifier and a low-pass filter. The gates 185 are opened in succession by outputs from a selector 189 fed with the identities of the channels in binary form by a recycling binary counter 193 fed by a 288 kc. oscillator 194. The latter also synchronizes the rotation of a memory 123 comprising three portions 201, 154, 171, the middle one of which registers in time slots, synchronous with the output of the counter 193, the binary identities of the talkers assigned to the associated transmission channels. The outputs from this memory activate line gate selectors 118 which open the line gates of the registered talker at the appropriate instant, thereby gating the talkers speech on to the highway 108. The 256 kc. oscillator 137 feeds a binary counter which generates seven-digit binary numbers in a cycle of 120, each number representative of a particular talker's line. These numbers are fed to a TNC (" talker needs connection ") scanner which produces an output on lead 125 when the "active" " output of speech detector SD is operated by a newly active talker. The TNC output controls an input steering circuit which opens gates 142, 143 alternately to admit the identities of newly active talkers to registers A-1, B-1 provided these are empty at the time. When the A-2 or B-2 registers become empty, gates 149, 151 transfer thereto the contents of A-1 or B-1. Memory 123 comprises a portion 171 carrying two binary digits, whose four combinations indicate the state of the transmission channel in question, viz.: A-channel available for use, C-channel being signalled over for connection, D-channel being held for disconnection and T- channel being used for talking. When an A signal is read out it causes a steering circuit 157 to operate gates 155, 156 alternately to feed the identities stored in A-2, B-2 into empty channel positions in the line code memory 154. The registers in the queue A-1, B-1, A-2, B-2 are scanned by the Q-scanner 165 to feed the identities stored therein successively to the TIQ (" talker in queue) selector which pulses the flip-flops 114 of the corresponding subscribers to maintain it in the operated condition which inhibits gate 113 to prevent further insertion of the talker's identity into the queue. Likewise the outputs from the memory 154 feed the TIM (" talker in memory ") selector whose output performs a similar function. The steering circuit 157 simultaneously pulses lead 159 which inserts the C-condition in the memory 171 and starts a timing operation of the type described in Specification 861,515. Circuit 198 which receives the subscribers' identities from the line code memory, converts these identities into pulses modulated in a 4 out of 15 frequency code and feeds them to gate 196 which is fed from the C-output of the memory 171. Thus, for those channels in a calling condition pulses modulated with the talker's identity are released to the highway 108, whence they are gated to the appropriate transmission channel and demodulated for transmission to the receiver. At the end of 12.5 m. sec. the timing circuit emits the channel pulse on lead 206 and this changes the registration in the memory 171 from C to T. The pulses emerging from this memory on lead T enable the line gate selector, which is fed by the line code memory 154 to pulse the line gate 107 of the talker and so gate his speech on to the highway 108, whence it is selected by gate 185 for demodulation and transmission on the appropriate channel 188. Disconnect operations.-Binary counter 210 which is reset once per cycle, is arranged to count the number of idle channels by counting the pulses from the A lead. If this falls below a prescribed small number (e.g. 2) for a significant period, detector 212 provides an output which is fed to gate 208. The TDNC (talker doesn't need connection) scanner operated by outputs from the line code memory 154 scans the idle outputs 112 of the speech detectors SD of talkers holding a connection and reverts pulses over lead 129 in the respective channel times to the gate 208 which also receives T outputs from the memory 171. Master timer 239 emits pulses of 4 m. sec. on and 12.5 m. sec. off and during the on period gate 208 emits pulses for disconnection which operate the bi-stable circuit 220 to disable the error correcting circuit and also change the registration to D for these channels in memory 171. The D outputs from memory 171 pass via gate 244 also opened by the master timer pass together with the outputs from 208 to gate 218 to cause the successive registration of the channel codes (from binary counter 193) into the register 219, the last of these remaining therein when the master timer switches off. At this time gate 222 starts a 12.5 m. sec. timer 225 which during this enables gate 227 to pass the channel identity to circuit 229 which translates the identity into a 4 out of 15 frequency code for transmission along the control 231 channel as a disconnect signal to the receiver. At the end of this period the timer emits a brief pulse on lead 236 to enable gate 235. When the binary counter next reaches the identity registered in register 219 comparison circuit 233 emits a pulse in the appropriate channel position which passes via gate 235 to change the registration in memory 171 to A and to delete the talker identity in memory 154. During the next on period of the timer 239 a further channel having D registered in memory 171 is disconnected and so on until there are no D conditions left in this memory. Error correction.-When no disconnect signals are required to be sent, bi-stable circuit 220 is in its reset condition (due to the output on lead 236 of timer 225) and during the off period of timer 239, the 12.5 m. sec. timer 246 is enabled, successive outputs from which are caused by steering circuit 247 to enable gates 253, 260. Coincident with the end of an enabling signal to gate 260, a signal is emitted on lead 250 which steps a binary counter 252 which has a 36 count cycle. This counter thus assumes the identities of all channels in succession. During the period when gate 253 is open the identity of the channel so stored is emitted to circuit 412 which translates the identity into 4 out of 15 frequency code for transmission on the control channel 231. At the end of this period the signal on lead 250 enables gate 256 and when coincidence is next registered between the identity stored in 252 and the channel code received from counter 193 the comparison circuit 254 emits a pulse through this gate to cause gate 258 to admit to store 259 the identity of the talker, received from the memory 154 (this may include the code 0000000 indicating that the channel is not allotted at this time). During the next 12.5 m. sec. period gate 260 is opened to pass the talker identity to circuit 414 for transmission in 4 out of 15 frequency code over the control channel 213. It will thus be seen that during alternate 12.5 m. sec. periods, the channel identity and the corresponding talker identity is transmitted over the control channel. Also it is seen that owing to the operation of the bi-stable circuit 220, the sending of disconnect signals is given priority over the sending of error correcting signals. Receiver. Connect operations.-The receiver is provided with a multiplex switching highway 306 to which the incoming speech channels are switched in succession by gates 305 opened by a channel gate selector 315 operated by counter 313 which generates the binary identities of the channels cyclicly. The speech is gated off the highway for demodulation and onward transmission to the appropriate listener 311 by gates 308. These are opened by a line gate selector 347 operated in accordance with the listener (i.e. talker) identities stored in the 36 position memory 336 which rotates in synchronism with the counter 313. Each channel has a connect signal receiver comprising fifteen tone filters and threshold detectors for converting the incoming signals into D.C. on 4 out of 15 leads. The outputs from the memory 336 are compared 338 with 0000000, a " different " or a " same " output being obtained according to whether the channel in question is connected to a listener or not. These results are gated to the " reset " and " set " inputs of bi-stable circuits 345 in the associated connect signal receiver circuits by a selector 341 running in synchronism with the memory 336. In the former case gates 319, 326 are closed so that incoming V.F. signals have no effect. In the latter case, however, gate 319 is opened to permit the selection and detection of the tones. Moreover a delayed pulse generator 324 produces a pulse about 10 m. sec. later and with gate 326 now enabled a pulse is passed from the generator 341 to cause gate 322 to pass the four out of fifteen c