Patent GB-740056-A (GB)
Title: Improvements in or relating to electric trigger circuits employing crystal triodes
Inventor: BREWSTER ARTHUR EDWARD
IPC: G06F7/38
Filed: 1954-04-06
Abstract: 740,056. Transistor two stable state circuits. STANDARD TELEPHONES & CABLES, Ltd. April 6, 1954, No. 10034/54. Class 40 (6). In a circuit employing one or two transistors each having a high and low current condition and in which control potentials cause the state of the (or one of the) transistors to change, a further control potential is provided to inhibit the changeover. When transistor 1, Fig. 1, is conducting or " On " the potential of all the electrodes is near that of battery 8 due to the low collector resistor 7. When a positive pulse is applied to the collector, the base also rises in potential, curve A, Fig. 2, until caught at earth due to rectifier 10 conducting. The rise in emitter potential is delayed due to the capacitor 14 so that the transistor is turned " Off." The capacitor 14 charges over rectifier 13, curve C, the emitter being caught at the small negative potential of battery 12 when rectifier 11 conducts. The circuit may be turned " On " by a negative pulse applied over rectifier 20 which causes emitter current to flow when the base potential is driven below the emitter, the collector current resulting lowering the base and collector potentials so that all the electrodes then fall to near the potential of battery 8. Capacitor 14 discharges slowly over resistor 15 rectifier 13 being biased off during the transition but conducts again when capacitor 14 has discharged sufficiently since the emitter is slightly positive with respect to the battery 8. The circuit is then ready for retriggering. If rectifier 20 is reversed the circuit may be triggered to the " Off " state by a positive pulse applied over the rectifier. When a positive potential is applied on lead 16, rectifier 13 remains blocked and the circuit cannot be triggered into the " Off " state as the delay circuit 14, 15 is ineffective and the emitter is able to follow the rise in collector or base potential. An output pulse may be taken from lead 21 or the base or collector electrode. In a modification, Fig. 3, two transistors 1A, 1B are arranged with a common resistor 22. When transistor 1A is " On ", all the electrode potentials are near source 8, the flow in current through resistor 22 establishing a bias equivalent to source 12 for the emitter of transistor 2B which is maintained in the " Off " condition. A positive pulse applied over lead 19 is blocked from transistor 1B due to the biased rectifier 20B but passes through rectifier 20A to trigger transistor 1A " Off." The rise in potential at the junction of resistors 5A, 22 causes the emitter potential of transistor 1B to rise so that, it passes to the " On " state. All the electrodes then fall in potential to near source 8, the rise in current through resistor 22 biasing off the emitter of transistor 1A. By applying positive potential to lead 16A or 16B, the reversal from one state to the other can be prevented. A relay 23 is included in the leads to the collectors of the two transistors and reverses with each transition, rectifiers 24A, 24B, preventing the collectors from being driven more negative than source 8.