baber/WOPTO huggingface dataset:
Patent TW-I288882-B (TW)
Title: A system for positioning staff in office
Inventor: WU CHUNG-WEI
IPC: G07C9/00
Filed: 2003-01-28
Granted: 2007-10-21
Abstract: The present invention relates to a system for positioning staff in office, which comprises a plurality of fixed identification reading devices, a plurality of identification devices, and a host computer. The identification devices are carried by each staff. The identification reading devices are placed at fixed points of the terminal of the system to record and identify staff near the terminal. The host computer is used for collecting and recording the information read by the reading devices. Thereby the system for positioning staff in office according to the present invention could manage the staff in office efficiently.
Patent TW-I222258-B (TW)
Title: Power generator controller
Inventor: KOJIMA YASUHIRO
IPC: H02J3/00
Filed: 2003-02-13
Granted: 2004-10-11
Abstract: There is provided a power generator controller which includes a power system monitor and a power generator output optimizing part. The power system monitor keeps check on a current status of a power system and puts out a demand on electricity. The power generator output optimizing part solves an objective function for determining outputs of power generators at a predetermined interval under a supply and demand balancing constraint which imposes the agreement between electric power demanded and electric power supplied. The objective function requires minimal total costs in power generation. Herein, the power generator output optimizing part solves the objective function further in consideration of an AFC capacity constraint that is determined based on an upper limit of changing speed of power generators.
Patent TW-I259011-B (TW)
Title: Access burst detector correlator pool
Inventor: KAEWELL JOHN DAVID JR
IPC: H04L27/06
Filed: 2003-04-09
Granted: 2006-07-21
Abstract: A node-B/base station has an access burst detector. The access burst detector comprises at least one antenna for receiving signals from users and a pool of reconfigurable correlators. Each correlator correlates an inputted access burst code at an inputted code phase with an inputted antenna output. An antenna controller selectively couples any output of the at least one antenna to an input of any of the correlators. A code controller provides to an input of each correlator an access burst code. The code controller controls the inputted code phase of each controller. A sorter/post processor sorts output energy levels of the correlators.
Patent TW-I221255-B (TW)
Title: Device information management system of application device and method thereof
Inventor: HUANG CHUNG-CHING
IPC: G06F15/177
Filed: 2003-05-09
Granted: 2004-09-21
Abstract: A device information management system of application device that is adapted to a computer system comprises an application device of RAM and BIOS ROM. The BIOS ROM implements a specific data structure to store the device information of the corresponding application device. When the computer system boots up, the system BIOS of the BIOS ROM reads the device information and writes the device information into the RAM of the application device and the application device directly reads the device information from the RAM.
Patent TW-I280951-B (TW)
Title: Fluidized-bed process drain treatment system
Inventor: LU MING-GI
IPC: C02F9/00
Filed: 2003-05-12
Granted: 2007-05-11
Abstract: A fluidized-bed reactor (FBR) for a process solution treatment system is disclosed for the treatment of industrial process solutions. A distribution pipeline system includes a process solution supply network and a reagent supply network for supplying the treatment and reagent solutions to the FBR for optimized reaction therein and the effluent of clean water. The FBR has a reaction section that comprises a reactor core assembly with has at least one reaction unit. Each of the at least one reaction unit receives a portion of the system effluent as recycle water. The reaction unit comprises at least one process solution feed assembly and at least one reagent supply assembly. Each of the solution feed and the reagent supply assemblies comprises a distributor pipework and a number of nozzles connected thereto. Relative distribution of the nozzles of the assemblies inside the reaction unit renders turbulent mixing of the treatment solution and the reagent so as to achieve optimized treatment condition for maximized yield of reaction product. Flow speed of the treatment solution is controlled for the constant suspension of crystallization product inside the reaction unit for the effluent of clean water.
Patent TW-I231850-B (TW)
Title: Processing method for high purity gas container and high purity gas filled in said container
Inventor: KIKKAWA AKIO
IPC: B24B5/40
Filed: 2003-08-01
Granted: 2005-05-01
Abstract: Disclosed is a metal container to be filled with a halogen containing gas with the inner surface processed with a polishing agent, and providing high purity halogen containing gas. The purity of the gas filled in the container does not decline due to the increase of water content or impurities other than the gas absorbed in the inner surface of the container over the passage of time. The inner surface processing method is improved such that the value of dividing the area of the Si2s peak by the area of the Fe2p3/2 peak in the X-ray photoelectron spectrum of the gas container inner surface with the inner surface process with a polishing agent applied is 0.3 or less.
Patent TW-I247414-B (TW)
Title: Semiconductor memory device
Inventor: HASHIMOTO KIYOKAZU
IPC: H01L27/00
Filed: 2003-08-28
Granted: 2006-01-11
Abstract: A semiconductor memory device includes (a) a plurality of reference cells (MR0 to MR15), and (b) a plurality of memory cells (MC00 to MCnm), data stored in a selected reference cell among the reference cells being compared to data stored in a selected memory cell among the memory cells, characterized by an address transition detector (13) for detecting transition in input of addresses by which a memory cell is selected among the memory cells, and transmitting an address transition detecting signal (P0) indicative of the detected transition, a counter (102) for counting the address transition detecting signals, and a reference cell decoder (103) for selecting a reference cell among the reference cells in accordance with an output transmitted from the counter (102).
Patent TW-I247838-B (TW)
Title: A water closet
Inventor: NAKAMURA KENICHI
IPC: E03D11/08
Filed: 2003-09-03
Granted: 2006-01-21
Abstract: A water closet capable of washing a toilet bowl and discharging dirt by using washing water in washing water tank (80), comprising a dirt receiving face (5), a bowl part (2) having an overhung rim part (6) and a rack part, a discharge passage (4) having an inlet connected to the lower side of the bowl part and discharging dirt by the action of siphon, a first water jetting part (11) jetting the washing water onto the rack part of the bowl part to form a swirl flow, a second water jetting part (12) jetting the washing water onto the rack part of the bowl part in the same direction as the rotating direction of the swirl flow, a first water passage (63a) feeding the washing water from the washing water tank to the first water jetting part, and a second water passage (67a) feeding the washing water from the washing water tank to the second water jetting part.
Patent TW-I240981-B (TW)
Title: Method of attaching electronic component and electronic component attaching tool
Inventor: KOIZUMI DAISUKE
IPC: H01R43/00
Filed: 2003-09-09
Granted: 2005-10-01
Abstract: An electronic component attaching tool suitable for an external shape of a semiconductor device is prepared. The electronic component attaching tool has a function of aligning a position of the semiconductor device to an IC socket. The electronic component attaching tool is mounted on the standard surface that is formed on the IC socket substantially regardless of the external shape of the semiconductor device. The semiconductor device is then aligned and attached to the IC socket by using the electronic component attaching tool, and the electronic component attaching tool is removed from the IC socket. Another electronic component attaching tool suitable for an external shape of another semiconductor device is prepared, and the same procedure as the above is performed to align and attach this semiconductor device to the same type IC socket.
Patent TW-I260746-B (TW)
Title: Single-crystal silicon substrate, SOI substrate, semiconductor device, display device, and manufacturing method of semiconductor device
Inventor: TAKAFUJI YUTAKA
IPC: H01L21/84
Filed: 2003-09-25
Granted: 2006-08-21
Abstract: A semiconductor device of the present invention is arranged in such a manner that a MOS non-single-crystal silicon thin-film transistor including a non-single-crystal silicon thin film made of polycrystalline silicon, a MOS single-crystal silicon thin-film transistor including a single-crystal silicon thin film, and a metal wiring are provided on an insulating substrate. With this arrangement, (i) a semiconductor device in which a non-single-crystal silicon thin film and a single-crystal silicon thin-film device are formed and high-performance systems are integrated, (ii) a method of manufacturing the semiconductor device, and (iii) a single-crystal silicon substrate for forming the single-crystal silicon thin-film device of the semiconductor device are obtained.
Patent TW-I284131-B (TW)
Title: Process for obtaining natural mixture of conjugated equine estrogen with poor non-conjugated lipophilic compounds
Inventor: BAN IVAN
IPC: A61K35/22
Filed: 2003-10-06
Granted: 2007-07-21
Abstract: The present invention relates to a process for obtaining an extract of a natural conjugated equine estrogen mixture using liquid-liquid extraction of a conjugated equine estrogen mixture, by which the obtained mixture is poor of non-conjugated lipophilic compounds including non-conjugated flavonoid, non-conjugated isoflavonoid, non-conjugated norisoprenoid, non-conjugated steroid, in particular androstane- and pregnane-steroid and the like.
Patent TW-I263104-B (TW)
Title: A dual-display reflective type liquid crystal display panel
Inventor: LEE SEOK-LYUL
IPC: G02F1/1335
Filed: 2003-11-13
Granted: 2006-10-01
Abstract: A dual-display reflective type liquid crystal display panel consists of multiple pixels. Each pixel comprises a first display area and a second display area, a first base plate provided with a pixel driving element and a second base plate which faces against the first base plate. A first reflective layer is formed on the inner surface of the first base plate in the first display area; a second reflective layer is formed above the inner surface of the second base plate in the second display area; while a liquid crystal layer is clipped between the first base plate and the second base plate.
Patent TW-I286446-B (TW)
Title: Organic electroluminescent panel and method for manufacturing the panel
Inventor: WU CHAO-CHIN
IPC: H05B33/10
Filed: 2003-11-14
Granted: 2007-09-01
Abstract: An organic electroluminescent panel includes a plurality of pixels disposed on a substrate. The pixel comprises an organic electroluminescent device, at least one pixel-defining layer, and at least one separator. The organic electroluminescent device comprises, in sequence, a first electrode, at least one organic functional layer, and a second electrode. The first electrode is disposed on the substrate. The pixel-defining layer is disposed on the first electrode or on the substrate. The separator is disposed on the pixel-defining layer. The organic functional layer is disposed on the first electrode or on the separator. The second electrode is disposed on the organic functional layer. In this case, the pixel-defining layer and the separator are made of negative photoresist. Furthermore, a method for manufacturing the organic electroluminescent panel is disclosed.
Patent TW-I276206-B (TW)
Title: Method for fabricating flash memory device and structure thereof
Inventor: CHEN JASON
IPC: H01L21/8247
Filed: 2003-11-25
Granted: 2007-03-11
Abstract: A method for fabricating a flash memory device is provided. A tunnel oxide layer is formed on a substrate. Thereafter, a floating gate, an inter-gate dielectric, and a control gate are sequentially formed on the tunnel oxide layer. Since the floating gate is consisted of multiple nanocrystals, the memory cell can still normally function even if one of the nanocrystals is impaired.
Patent TW-I241032-B (TW)
Title: Light-emitting device, method of fabricating the same, and LED lamp
Inventor: YASUDA TAKAKI
IPC: H01L21/20
Filed: 2003-12-19
Granted: 2005-10-01
Abstract: A light-emitting device, method of fabricating the same, and LED lamp are provided. That is, the light-emitting device has an improved output efficiency of light. In the semiconductor light-emitting device, an inclined and indented lateral surface is formed on the substrate surface or layer-stacked interfaces among the semiconductors. The 30 DEG to 60 DEG inclined angle is better. In addition to using polishing, high-temperature reducing and selective etching methods to make trenches and holes, the triangle protrusion can be also made by selectively growing semiconductor.
Patent TW-I246846-B (TW)
Title: Image scanner and image detector with the built-in image scanner
Inventor: SAWADA HIDEKI
IPC: H04N1/031
Filed: 2004-01-15
Granted: 2006-01-01
Abstract: The flat-type image sensor A includes a housing, which is mounted at a movable support frame 6 in the sub-scanning direction and is set to have a long shape in the primary scanning direction N1. Light source and plural photosensitive devices are accommodated inside the housing. Each photosensitive device receives light from the original document. Two positioning apparatuses 71 are disposed at the housing 20 for preventing the shift of the main scanning direction N1 relative to the support frame 6; and these positioning apparatuses are separated from each other in the primary scanning direction N1.
Patent TW-I241837-B (TW)
Title: Method for controlling on/off of LEDs in a scanner
Inventor: LEE TA-YI
IPC: H04N1/04
Filed: 2004-01-16
Granted: 2005-10-11
Abstract: The present invention relates to a method for controlling ON/OFF of LEDs in a scanner which replaces CCFL with LED as a light source so as to solve the problem of excessively long warm-up time of CCFL in the prior art. Meanwhile, to achieve intermittent heat dissipation, LED is switched ON/OFF according to the frequency of the scanner receiving optical signals.
Patent TW-I250426-B (TW)
Title: System determining dispatching rule by knowledge-mining technology and method thereof
Inventor: WANG KUNG-JENG
IPC: G06F17/30
Filed: 2004-01-20
Granted: 2006-03-01
Abstract: The present invention relates to a system determining dispatching rule by knowledge-mining technology and method thereof, which is capable of extracting the representative operation characteristics of testing factories from testing orders. In accordance with the test requirements of different databases and performance indicators, the system and the method of the present invention can build an optimal dispatching selection rule so as to select an optimal dispatching method. Moreover, the testing performance can also be predicted in the light of the optimal dispatching method adopted.
Patent TW-I234624-B (TW)
Title: Wire rope type belt cleaning device for belt conveyer facilities
Inventor: MEGURO CHIHARU
IPC: B65G45/12
Filed: 2004-03-31
Granted: 2005-06-21
Abstract: The object of the present invention is to provide a wire rope type belt cleaning device for belt conveyer with extended lifespan, improved cleaning effects, while reducing the time required for maintenance. The solution of the present invention is that a belt cleaning device is disposed at a front part of a conveyer head pulley at an inclination angle theta with respect to an axis of the head pulley to form a wire rope type cleaning device for conveyor belt equipment where the belt cleaning device is engageable with the conveyor belt. The belt cleaning device comprises a wire rope and a plurality of wear-resistant removing chips fitted to the rope so that they are adjacent to each other and contact the conveyor belt, running the full width of the conveyor belt.
Patent TW-I231988-B (TW)
Title: Electrostatic discharge protection circuit, semiconductor circuit and fabrication thereof
Inventor: YEO YEE-CHIA
IPC: H01L23/60
Filed: 2004-04-12
Granted: 2005-05-01
Abstract: A resistor 100 is formed in a semiconductor layer 106, e.g., a silicon layer on an SOI substrate. A body region 108 is formed in a portion of the semiconductor layer 106 and is doped to a first conductivity type (e.g., n-type or p-type). A first contact region 110, which is also doped to the first conductivity type, is formed in the semiconductor layer 106 adjacent the body region 108. A second contact region 112 is also formed in the semiconductor layer 106 and is spaced from the first contact region 110 by the body region 108. A dielectric layer 116 overlies the body region and is formed from a material with a relative permittivity greater than about 8. An electrode 114 overlies the dielectric 116.
Patent TW-I243489-B (TW)
Title: Single chip light emitting diode with red, blue and green three wavelength light emitting spectra
Inventor: CHEN JENG-CHIUAN
IPC: H01L33/06
Filed: 2004-04-14
Granted: 2005-11-11
Abstract: This invention provides a single chip light emitting diode with red, blue and green three wavelength light emitting spectra. It comprises a base, two conductive pins, a single chip light emitting device, a package material and a red light fluorescent substance. The single chip luminescent device is installed on the base and connects electricity with two conductive pins. The red light fluorescent substance is added to the package material. The single chip luminescent device comprises a substrate, a buffer layer, a first conductive cladding layer, a second conductive cladding layer, at least one green light emitting layer and at least one blue light emitting layer. The green light emitting layer and blue light emitting layer are formed between the first conductive cladding layer and the second conductive cladding layer. This invention provides a single chip light emitting diode with red, blue and green three wavelength light emitting spectra. The green light and blue light spectra are provided directly from the green light emitting layer and blue light emitting layer of the single chip light emitting device. The red light spectrum is by exciting the red fluorescent substance by the blue light, green light or the combination of the single chip light emitting device to produce the red light. Therefore, the single chip light emitting diode with red, blue and green three wavelength light emitting spectra in this invention can be applied to the liquid crystal display as back-light source. It is characterized in high color rendering, better electricity-saving function and smaller volume.
Patent TW-I250785-B (TW)
Title: Image rendering device and image rendering method
Inventor: SAITOU TAKAHIRO
IPC: G06T11/40
Filed: 2004-04-27
Granted: 2006-03-01
Abstract: An image rendering device disclosed herein comprises a fragment generator configured to generate a set of fragments including pixels in different positions based on inputted pixel data; and a pixel processor configured to sequentially process the pixel data contained in the fragment generated by the fragment generator.
Patent TW-I289907-B (TW)
Title: Method for fabricating metal oxide semiconductor transistor and memory device memory cell array thereof
Inventor: HWANG CHONG-JEN
IPC: H01L21/8239
Filed: 2004-06-02
Granted: 2007-11-11
Abstract: A fabricating method for metal oxide semiconductor transistor is provided. A patterned film layer is formed on a substrate to define a predetermining region for source/drain. Local oxidation structures are formed on the substrate exposed by the patterned layer that used to define a predetermining region for channels. The patterned layer is removed. The source/drain regions are formed in the substrate by using the local oxidation structures as masks. The local oxidation structures are removed to form a plurality of recess areas naturally. A gate insulating layer is formed on the substrate, and a gate is formed on a portion of the gate insulating layer above the plurality of recess areas. The recess channel with longer length can prevent short channel effect.
Patent TW-I274018-B (TW)
Title: Packing structure and buffer device thereof
Inventor: CHEN HENG-HSIU
IPC: B65D5/48
Filed: 2004-07-30
Granted: 2007-02-21
Abstract: A buffer device comprises a buffer member, a lateral unit, a first supporting board and a second supporting board. In this case, the buffer member is formed by folding up at least one baseboard. The lateral unit is set one side of the buffer member. And the lateral unit has a first edge and a second edge. One side of the first supporting board is joined to the first edge and a first portion of the first supporting board covers at least one part of the lateral unit. A second portion of the first supporting board is folded to inset the lateral unit and the first portion is vertical to the second portion essentially. One side of the second supporting board is joined to the second edge and a third portion of the second supporting board covers at least one part of the lateral unit. A fourth portion of the first supporting board is folded to inset the lateral unit and the third portion is vertical to the fourth portion essentially.
Patent TW-I233688-B (TW)
Title: Diode structure with low substrate leakage current and applications thereof
Inventor: CHEN ZI-PING
IPC: H01L27/02
Filed: 2004-08-30
Granted: 2005-06-01
Abstract: A diode structure with low substrate leakage current and its applications, suitable for BiCMOS process. The diode structure comprises a semiconductor substrate, a buried layer, a well, a connection zone, two isolation regions and a first doped region. The semiconductor substrate and the well are of a first conductivity type. The buried layer, the connection zone, and the first doped region are of a second conductivity type opposite to the first conductivity type. The buried layer is formed on the semiconductor substrate. The connection zone and the well are formed on the buried layer. The connection zone contacts the buried layer. The two isolation regions are adjacent to two sides of the buried layer, each having a bottom deeper than the buried layer. The two isolation regions in together with the buried layer isolate the connection zone and the well from the substrate. The first doped region is formed in the well as a first electrode of a diode. The well and the connection zone are electrically connected to each other as a second electrode of the diode.
Patent TW-I240406-B (TW)
Title: A high voltage ESD protection circuit with low voltage transistors
Inventor: CHEN CHUNG-HUI
IPC: H02H9/04
Filed: 2004-10-29
Granted: 2005-09-21
Abstract: An ESD protection circuit includes a stacked NMOS transistor pair coupled between a pad and a negative voltage supply, with a first transistor's drain connected to the pad and a second transistor's source connected to the negative power supply. A first voltage divider provides reduced voltage from a high voltage positive power supply to a gate of the first transistor, a first diode string coupled between the gates of the first and second transistors, a second diode string with its anode coupled to the pad, an inverter with a source of its PMOS transistor coupled to a cathode of the second diode string and with its NMOS transistor coupled to the negative power supply, an output node of the inverter coupled to a gate of the second transistor, and a RC circuit coupled to an input node of the inverter, for dissipation of ESD current.