baber/WOPTO huggingface dataset:
Patent TW-423074-B (TW)
Title: Method for forming thin film in fabricating semiconductor device
Inventor: LEE SOO-HWAN
IPC: H01L21/027
Filed: 1999-01-22
Granted: 2001-02-21
Abstract: A method for forming a thin film of a semiconductor device is provided. In the process for forming a thin film according to the present invention, a wafer is loaded from a wafer cassette into a reaction chamber and then the thin film is formed on the wafer. Next, the wafer is carried to the wafer cassette and then the reaction chamber is cleaned. The cleaning of the reaction chamber is not performed whenever the process for forming the thin film is performed in the reaction chamber, but is performed after the thin film forming process is performed at least twice, preferably about 9 times, in the case of forming the thin film once on each wafer. The cleaning of the reaction chamber is performed while wafers are carried between the reaction chamber and the wafer cassette. Since the cleaning can be performed any time after the thin film forming process is performed at least twice, a continuous processing is allowed without intermission even if the recipe changes in the course of the thin film forming process. Such a reaction chamber cleaning process is allowed by improving related software. Therefore, the uniformity in thicknesses of a thin film is enhanced, and particles generated in the reaction chamber can be reduced, thereby improving the reliability of a semiconductor device. Also, since the wafer throughput per hour is increased, the productivity of semiconductor devices is enhanced.
Patent TW-460552-B (TW)
Title: New (meth)acrylate esters of organosiloxane polyols and process for their preparation
Inventor: DOEHLER HARDI
IPC: C08G77/38
Filed: 1999-03-02
Granted: 2001-10-21
Abstract: The invention relates to novel organosilicon compounds comprising terminally and/or laterally at least one Si-C-bonded organic radical which has at least two (meth)acrylate groups attached by way of primary hydroxyl groups and may not have monocarboxylic acid groups free from double bonds that are capable of undergoing addition polymerization. It additionally relates to a process for preparing these organomodified polysiloxanes and to their use as curable coating compositions having abhesive properties.
Patent TW-529030-B (TW)
Title: Shared bit-line equalization circuit for semiconductor memory device
Inventor: WANG SHIAU-YU
IPC: G11C5/00
Filed: 1999-05-18
Granted: 2003-04-21
Abstract: A double-bit line equalization circuit for semiconductor memory device is disclosed in the present invention, which includes the followings: a first bit line pair; a second bit line pair, which is adjacent to the first bit line pair; a first primary equalization circuit disposed at one terminal of the first bit line pair; a first auxiliary equalization circuit, which is disposed at one terminal of the second bit line pair and simultaneously responds to the first equalization indication signal together with the first primary equalization circuit so as to pre-charge and equalize the first and the second bit line pairs; a second primary equalization circuit disposed at the other terminal of the second bit line pair; and a second auxiliary equalization circuit, which is disposed at the other terminal of the first bit line pair and simultaneously responds to the second equalization indication signal together with the second primary equalization circuit so as to pre-charge and equalize the first and the second bit line pairs.
Patent TW-409397-B (TW)
Title: The structure of semiconductor image sensor and the manufacture method of the same
Inventor: LIN SHR-YAU
IPC: H01L27/146
Filed: 1999-05-26
Granted: 2000-10-21
Abstract: A semiconductor image sensor structure comprising one semiconductor substrate having one metal layer is disclosed; one oxide layer and the coverage metal layer is formed on the semiconductor substrate; one spin-on-glass is formed on the oxide; one light-filtration layer is formed on spin-on-glass; and one silicon oxygen nitride layer is formed on the light-filtration layer.
Patent TW-512460-B (TW)
Title: Variable porosity porous silicon isolation
Inventor: SWANSON LELAND S
IPC: H01L21/762
Filed: 1999-08-04
Granted: 2002-12-01
Abstract: Varying the porosity through the thickness of a porous silicon layer (210) allows conflicting needs to be met by the same layer; a low porosity surface layer (210A) allows a high-quality epitaxial layer of silicon to be grown, or can provide structural support, while greater porosity in other portions of the layer (210B, 210C) increases circuit isolation and provides stress relief between layers.
Patent TW-519659-B (TW)
Title: Combined pre-charged and homogenization-circuit
Inventor: SCHNEIDER HELMUT
IPC: G11C7/12
Filed: 1999-08-11
Granted: 2003-02-01
Abstract: This invention relates to a combined pre-charged and homogenization-circuit for a semiconductor-memory arrangement composed of a memory-cells array with many bit-lines pair (BLT, BLC), said memory-cells array includes a first and a second field-effect-precharge-transistors (1, 3) and a homogenization-transistor (2), which is in series between said two precharge-transistors (1, 3), wherein the gates of said two precharge-transistors (1, 3) and said homogenization-transistor (2) are connected to a common gate (11, 12), the sources (13) of the precharge-transistors (1, 3) and connected to a common source (13), the drain of the first precharge-transistor (1) and the drain of the homogenization-transistor are connected to a common drain (7, 10), and the source of the homogenization-transistor (2) and the drain of the second precharge-transistor (3) are connected to a common source/drain (8, 9). According to this invention, in said combined precharge- and homogenization-circuit it is designed that the common gate (11, 12) is bent and forms an angle and is rotated around about 45 DEG with respect to the longitudinal direction of the bit-lines (BLT, BLC), the common drain (7, 10) and the common source/drain (8, 9) are pulled forwards with protruded regions over the common gate (11, 12), the bit-lines contacts (15) are provided in said protruded regions.
Patent TW-531445-B (TW)
Title: Novel decomposition type reactive emulsifier and polymer-modifying method using the same
Inventor: HASHIMOTO MASAYUKI
IPC: C09K23/42
Filed: 1999-08-20
Granted: 2003-05-11
Abstract: Use of the novel decomposition type reactive emulsifier of the following general formula (I) in emulsion polymerization insures a high degree of stability of polymerization reaction, marked improvements in the water resistance, adhesion, heat resistance and weather resistance of the film available from the resulting emulsion, the ease with which the emulsion can be destroyed for recovery of the polymer, and significant improvements in polymer properties, wherein R1 and R2 may be the same or different and each represents an alkyl or alkenyl group of 1-20 carbon atoms or a hydrogen atom (provide, however, that both of R1 and R2 do not concurrently represent hydrogen); R3 represents a hydrogen atom or a methyl group; X represents a hydrogen atom or an ionic hydrophilic group which may be anionic, cationic or amphoteric; A represents an alkylene or substituted alkylene group of 2-4 carbon atoms; n represents an integer of 0-100, inclusive, and when n is equal to not less than 2, (AO)n may be a homopolymer comprising one kind of repeating unit as represented by the following formula (i) or a block or random polymer comprising two or more kinds of repeating units having dissimilar substituent groups (A1, A2 ...) as represented by the following formula (ii) -(AO)-(AO)-(AO)- ... (i); -(A1O)n1-(A2O)n2- (wherein n1+n2+ ... =n) ... (ii).
Patent TW-457651-B (TW)
Title: Socket for inspecting semiconductor element, semiconductor device, and manufacture of the semiconductor device
Inventor: TANAKA TADAYOSHI
IPC: H01R33/76
Filed: 1999-09-28
Granted: 2001-10-01
Abstract: The present invention provides a socket for inspecting a semiconductor device which is refined and given high density, capable of accurately inspecting the semiconductor device, while absorbing the variations in height between the adjacent external projection electrodes of an IC. Electrode pads (7) are formed on a tape circuit (2), in such a way as to correspond to the positions of the solder bumps (6) of an IC (5). The tape circuit (2) is electrically connected to mother sockets (4) with a plurality of pins formed on the peripheral part of the tape circuit (2). At the IC mounting part of the tape circuit (2) where the electrode pads (7) are formed, an elastomer sheet (1) is placed between the mother sockets (4) and the tape circuit (2), and cut grooves (3) are formed in a grid shape on the surface of the sheet (1) making contact with the tape circuit (2), with the center parts of the electrode pads (7) almost coinciding with the intersections of the grooves (3). Therefore, the parts of the sheet (1) defined by the grooves (3) can independently absorb pressures from the solder bumps (6) and are seldom affected by variations, if any, in height among the solder bumps (6) to surely bring the solder bumps (6) into contact with the electrode pads (7).
Patent TW-452792-B (TW)
Title: Optical disk
Inventor: ITO HIDEAKI
IPC: G11B7/24
Filed: 1999-09-30
Granted: 2001-09-01
Abstract: The subject of the present invention is to produce an optical disk for preventing a part of a cover sheet 26 from partly projecting from an outer circumferential edge and unexpectedly coming off an optical disk, and to make it possible to easily strip off the cover sheet 26 from the optical disk when the cover sheet 26 is intentionally removed. The solution is: signals are recordable on an optical disk by irradiating the disk with recording light from the side of a transparent substrate 21. The cover seat 26 is provided on the incident surface of recording and reproducing light of the transparent substrate 21 which is peelable. A thin piece 27 is arranged projective from the outer circumferential edge of this cover sheet 26, and the outer edge of this thin piece 27 is flush with the circumferential face of the transparent substrate 21 as a part of the outer circumferential edge of the cover seat 26. The other part of the outer circumferential edge except the part 28 of the outer circumferential edge of the cover sheet 26 is arranged inside the outer circumferential edge of the transparent substrate 21.
Patent TW-452736-B (TW)
Title: Method and apparatus for determining the drive letter assignment of a CD-ROM drive during initial system setup of a computer system
Inventor: MAIA PAUL J
IPC: G06F9/445
Filed: 1999-09-30
Granted: 2001-09-01
Abstract: A computer system includes a processor, at least one computer-readable media drive, and manufacturing process code. The manufacturing process code includes executable instructions for causing the processor to determine a drive letter designation of the at least one computer-readable media drive. The computer system further includes an operating system and a system descriptor record, wherein the operating system includes a desktop suitable for implementation of shortcuts and menu selections to computer-readable media drive based software applications. The drive letter designation of the computer-readable media drive is further a function of the operating system and the system descriptor record. Still further, the manufacturing process code enables a determination of the computer-readable media drive letter designation by the processor to be operable prior to the operating system desktop becoming fully initialized, further for enabling a binding of computer-readable media drive based software applications in an establishing of the shortcuts and menu selections on the desktop.
Patent TW-427030-B (TW)
Title: Manufacturing method of MOS transistor
Inventor: HSIAO CHIH-YUAN
IPC: H01L29/772
Filed: 1999-10-06
Granted: 2001-03-21
Abstract: The present invention provides a manufacturing method of MOS transistor which includes the following steps: firstly, forming a gate on the silicon substrate surface of semiconductor chip; and, forming LDD and space of silicon nitride on both sides of the gate; then, forming a conductive layer covering the surface of the gate and the spacer so as to form a corner in the conductive layer at the interface between the spacer and the silicon substrate surface; then, forming a spacer of silicon oxide at the corner on the conductive layer surface; using the silicon oxide spacer as the mask for an etching process to remove the conductive layer on the silicon substrate surface and the gate so that the conductive layer at the corner can remain on the outer side of the silicon nitride spacer; lastly, completely removing the silicon oxide spacer and conducting an ion implantation to form the source/drain on the silicon substrate on the outer side of the remaining conductive layer for completing the process of MOS transistor.
Patent TW-477832-B (TW)
Title: Cathodic corrosion reisting method for metallic structure, and device therefor
Inventor: TAKAHASHI MASAHIRO
IPC: C23F13/02
Filed: 1999-10-06
Granted: 2002-03-01
Abstract: A cathodic resisting method and device for a metal structure capable of extending to a maximum range within which one anode can effect anticorrosion without an excessive anticorrosion, in such ways that a main anode and a pilot anode are mounted on a coating of a metal structure and a cathode on a metal base material of the metal structure, a preset voltage is applied to the metal structure from the pilot anode, a required anticorrosion current value for the metal structure is read from a current value of the pilot anode which changes with a change in corrosion environment of the metal structure corrosion, and a voltage applied to the main anode is increased or decreased in conjunction with the read current value.
Patent TW-444113-B (TW)
Title: Novel ceramic igniter having improved oxidation resistance, and method of using same
Inventor: WILLKENS CRAIG A
IPC: H05B3/10
Filed: 1999-11-17
Granted: 2001-07-01
Abstract: A ceramic igniter comprising: (a) a pair of conductive ceramic ends, and (b) a ceramic hot zone disposed between the conductive ceramic ends, and (c) a support zone upon which the hot zone is disposed, wherein the support zone comprises: (i) between about 50 vol% and about 80 vol% aluminum nitride, and (ii) between about 2 vol% and about 40 vol% silicon carbide.
Patent TW-483987-B (TW)
Title: Scroll type fulid machine
Inventor: TSUCHIYA TAKESHI
IPC: F01C21/10
Filed: 1999-11-30
Granted: 2002-04-21
Abstract: A scroll type fluid machine which can practically exhibit an appropriate meshing condition between an orbiting scroll member and an unorbiting scroll member and which can enhance the energy efficiency. A positioning means for positioning the unorbiting scroll member in a frame to which the unorbiting scroll member is to be fixed, comprises an elongated positioning hole formed in the unorbiting stationary scroll, and a positioning pin provided on the frame, and with this arrangement, the positioning is carried out in such a way that the unorbiting scroll is movable, relative to the frame, in a direction of a straight line passing through the center of a stationary scroll lap within a plane orthogonal to the axis of the stationary scroll lap, but is unmovable in a direction crossing the straight line, and the stationary scroll is rotatable around a straight line which passes through a position where the straight line crosses the peripheral edge part of the stationary scroll, and which is in parallel with the above-mentioned axis.
Patent TW-I278460-B (TW)
Title: Aqueous two-component polyurethane systems having increased impact strength, high stability properties and good optical properties, a process for their production, and their use
Inventor: PROBST JOACHIM
IPC: C08F291/00
Filed: 1999-12-03
Granted: 2007-04-11
Abstract: The invention relates to aqueous two-component polyurethane systems, a process for their production, and their use for the production of coatings having increased impact strength, high stability properties and outstanding optical properties.
Patent TW-484009-B (TW)
Title: Surface treatment for optical image capturing system
Inventor: TENG HARRY H
IPC: A61B5/117
Filed: 2000-02-16
Granted: 2002-04-21
Abstract: Disclosed is an image capturing system including a light refractor, a light source, and a light receptor. The light refractor can be a triangular prism and includes an imaging surface against which a fingerprint or other object to be imaged is placed. The imaging surface includes at least a first layer of material which has a first part which includes a polymer and a second part which includes a fluid retained within the polymer. The fluid of the first layer can fill irregularities in the ridges of a fingerprint placed on the imaging surface. This allows a higher contrast, sharper fingerprint image to be captured. The imaging surface can also includes a second layer of protective material interposed between the first layer of material and the surface of the prism to reduce breakdown or deterioration of the first layer of material due to adhesives used on the surface of the prism.
Patent TW-439141-B (TW)
Title: Trench etching process for integrated circuits
Inventor: LUO WEN-HAU
IPC: H01L21/306
Filed: 2000-01-18
Granted: 2001-06-07
Abstract: This invention describes a trench etching process for integrated circuits. In the conventional shallow trench isolation (STI) process, trench pattern is formed on silicon substrate through etching and then the trench is filled with silicon oxide material. Chemical mechanical polishing is employed to remove excessive oxide. In this invention, steam is used to treat the silicon substrate in the attached chamber of etching platform after the trench is formed but before the wafer is sent out of the platform. The steam treatment will produce hydrogen bromide and silicon oxide micro-particles due to the reaction between steam and bromides on the surface of the silicon substrate. The reaction products can be pumped out by the vacuum system of the platform. This prevents the pollution or corrosion of subsequent tools or danger to the operators by hydrogen bromide and silicon oxide after the bromides on the silicon substrate are exposed to atmosphere.
Patent TW-445671-B (TW)
Title: Universal receptacle with fast plug board replacement
Inventor: LI CHIOU-SHAN
IPC: H01R13/46
Filed: 2000-01-19
Granted: 2001-07-11
Abstract: The invention relates to a universal receptacle with fast plug board replacement, in particular the one achieving the receptacle or connector with desired plug holes, which can be quickly replaced in terms of the plug hole as required by different countries, over the receptacle or connector with universal plug board. It primarily pre-installs the plug holes for the plug specifications supplied by different countries on the plug board of receptacle or connector, and meanwhile provides a protruded rim frame with certain height over the plug rim of receptacle or connector, in which a concaved area is formed inside the protruded rim frame. The plug board with holes of different specifications can be integrated over the concaved area and one or more than one spring fastening rod are equipped on the bottom of the plug board of receptacle. The plug board is assembled on the concaved area by inserting the spring fastening rod to either one hole on receptacle or connector board to fasten so that the plug hole board can be swiftly positioned over the concaved area to form the plug hole with single specification and can remove plug board as required to replace with plug board with plug holes of different specification. Thus the objective of fast replacement of plug board with different plug holes can be achieved and the it is beneficial to fast replacement of the desired plug holes adapted to receptacle or connector, which is an advanced invention with technique thinking of natural rules.
Patent TW-582144-B (TW)
Title: Network status reporting method and a communications network
Inventor: LEFEBVRE PASCAL ALBERT EMILE
IPC: H04L12/801
Filed: 2000-03-01
Granted: 2004-04-01
Abstract: The present invention relates to a network status reporting method, for reporting in a communications network a network status to a data source with an adaptive transmission rate. The data sink reports the network status to the data source in order to enable the data source to adapt the transmission rate based on the network status. The communications network further contains at least one intermediate network node, and a data sink. Only the data sink reports to the data source on a status of the communications network in its neighbourhood, and no intermediate network node reports to the data source on said network status of the communications network.
Patent TW-562744-B (TW)
Title: Method of positioning sheet elements in the introduction station of a processing machine and a device for performing the method
Inventor: REBEAUD JEAN-CLAUDE
IPC: B41F21/12
Filed: 2000-03-09
Granted: 2003-11-21
Abstract: A method of positioning sheet elements (5) in the introduction station of a processing machine comprising a transport device consisting of one or more bars (10) of grippers (12) for driving the sheet element (5) to subsequent stations, comprises, starting from a shelf (14) in a rear starting position, engaging means (16, 22) for fixing a sheet element (5) on the shelf (14), then controlling actuators (40, 50, 60) to advance the shelf (14) forward and if necessary sideways and/or askew depending on the readings of the positioning coordinates of the sheet element (5) by opto-electronic means (72, 74, 76), said readings being effected during the advance of the shelf (14) so as to feed and finally stop the leading edge of the sheet element (5) in the grippers (12) of the transport device in a predetermined position, releasing the fixing means (16, 22), and then returning the shelf (14) to the rear starting position. The device for performing the method comprises a shelf (14) provided with means (16, 22) for temporarily fixing the sheet element (5), having a notched leading edge (17) complementary to the grippers (12) of the drive bar (10) driven by actuators (40, 50, 60), opto-electronic means reading the front and/or side edge and/or a distinctive sign of a previous treatment of the sheet element disposed slightly forwardly of the starting position of the shelf, and electronic control means for controlling the actuators of the shelf (14) in dependence on the machine cycle and the results of the readings of the positioning co-ordinates of the sheet element (5) by the opto-electronic means.
Patent TW-445573-B (TW)
Title: Methods to modify wet by dry etched via profile
Inventor: LIN CHI-FA
IPC: H01L21/768
Filed: 2000-03-21
Granted: 2001-07-11
Abstract: A method for fabricating funnel-shaped vias in semiconductor devices with an improved profile amelioration of the sharp angles at the onset of the via and at the intersection between the wet etch section (i.e., the bowl-shaped section) and the dry etch section (i.e., the straight section). The method includes the following main steps: (1) using PECVD to deposit a base dielectric layer on a wafer; (2) depositing a bottom dielectric layer on the base dielectric layer, the bottom dielectric layer having a first predetermined etch removal rate; (3) depositing at least one profile modifying dielectric layer on the bottom dielectric layer; (4) depositing a top dielectric layer on top of the at least one profile modifying dielectric layer, the top dielectric layer has a second predetermined etch removal rate, wherein the second predetermined etch removal rate is higher than the first predetermined etch removal rate; (5) forming a photoresist layer on the top dielectric layer, the photoresist layer containing an opening so as to allow a via to be formed through the multiplicity of dielectric layers; (6) using a simultaneous wet-and-dry etching process to form a funnel-shaped via in the multiplicity of dielectric layers. The dielectric layer material is selected such that its etch removal rate can be adjusted by adjusting one of the PECVD parameters.