baber/WOPTO huggingface dataset:
Patent TW-392250-B (TW)
Title: Aspect ratio metal layer etching method for integrated circuit
Inventor: TANG WEN-SHIANG
IPC: H01L21/3213
Filed: 1998-08-21
Granted: 2000-06-01
Abstract: The present invention discloses an aspect ratio metal layer etching method for integrated circuit, which utilizes a novel metal layer structure to perform an aspect ratio metal layer etching process for reducing the thickness of the photoresist to increase the resolution capability of the yellow light sensitive photoresist, and enduring a larger current with a thinner metal layer. With the method, a metal layer is first formed on a wafer that has been pre-processed. Next, a hard tungsten mask and an oxide/nitride layer are formed. Then, the photoresist is used to define the position of the metal interconnection and perform a first etching process to remove the oxide/nitride layer and the hard tungsten mask that are not covered by the photoresist. Subsequently, a second etching process is performed to remove the aluminum alloy layer and diffusion barrier layer that are not covered by the photoresist. Finally, the photoresist is removed to form the metal interconnection.
Patent TW-399269-B (TW)
Title: Method for forming shallow junctions in semiconductor wafers using controlled, low level oxygen ambients during annealing
Inventor: DOWNEY DANIEL F
IPC: H01L21/265
Filed: 1999-01-15
Granted: 2000-07-21
Abstract: A method is provided for forming a shallow junction in a semiconductor wafer that has been implanted with a dopant material. The dopant material is activated by thermal processing of the semiconductor wafer in a thermal processing chamber at a selected temperature for a selected time. The oxygen concentration in the thermal processing chamber during activation of the dopant material is controlled at or near a selected level less than a background level that is typically present when the thermal processing chamber is filled with a process gas. The oxygen concentration may be controlled at or near a selected level in a range less than 1000 parts per million and is preferably controlled at or near a selected level in a range of about 30-300 parts per million. The method is particularly useful for implanted boron or BF2ions, but may be used for any dopant material.
Patent TW-471116-B (TW)
Title: Contact isolation structure and the manufacturing method thereof
Inventor: GAU JING-HUNG
IPC: H01L21/768
Filed: 1999-01-22
Granted: 2002-01-01
Abstract: A contact isolation structure and the manufacturing method thereof which includes the following steps: forming a first insulation layer on a substrate; forming a contact in the first insulation layer to expose the surface of the substrate; forming passivation layer on the substrate exposed by the contact; sequentially forming a second insulation layer and a third insulation layer in the contact and on the first insulation layer; next, using anisotropic etching to remove part of the third insulation layer and leave only the third insulation on the sidewall of the contact; using the isotropic etching to remove the second insulation unprotected by the third insulation layer to form a liner insulation layer for the sidewall of the contact in which the liner insulation layer does not contact with the substrate directly; then, removing the third insulation layer on the sidewall of the contact.
Patent TW-417372-B (TW)
Title: Clock recovery circuit and a receiver having a clock recovery circuit
Inventor: DE MEY ERIC
IPC: H04L7/033
Filed: 1999-02-24
Granted: 2001-01-01
Abstract: A data receiver comprises receiving means for receiving a data signal and providing a base band output, and symbol recovery means (36, 42) coupled to an output of the demodulating means for recovering symbols represented, by the data output. The symbol recovery means comprises means (52) for determining a time difference between rising and falling edges in the data output and their nominal refernce points and means (54) for determining respective clock reference points for the rising and falling edges from the time difference between the rising and falling edges.
Patent TW-409345-B (TW)
Title: Method of utilizing the surface-treated spin-on-glass to improve the latitude in dielectrics wet etching process
Inventor: LIN CHI-FA
IPC: H01L21/76
Filed: 1999-02-25
Granted: 2000-10-21
Abstract: In this invention, an inter metal dielectrics is provided which comprises one first silicon oxide, one surface-treated spin-on-glass (SOG) and one second silicon oxide. Said spin-on-glass (SOG) is formed and covered on said first silicon oxide; and, said second silicon oxide is formed and covered on said spin-on-glass (SOG). Said surface-treated spin-on-glass (SOG) is formed through performing one surface treatment such as one nitrogen ion treatment or one dinitrogen oxide plasma treatment or one argon ion treatment or one high energy electron treatment. Said surface-treated spin-on-glass (SOG) is used as one effective etching stop layer on the wet etching process of the one formed dielectrics opening. Therefore, the lateral etching in the wet etching process of the spin-on-glass (SOG) could be obviously inhibited on the exposed place by said surface-treated spin-on-glass (SOG) such as the sidewall of said dielectrics opening or the edge place of its application chip. So that it also could avoid the delamination of said first silicon oxide caused by over-etching in lateral direction of said pin-on-glass (SOG). The latitude of said wet etching process will be improved obviously, the process reliability of said dielectrics opening will also be increased.
Patent TW-409430-B (TW)
Title: Semiconductor device having a light-receiving element, optical pickup device and method of manufacturing a semiconductor device having a light-receiving element background of the invention
Inventor: ARAI CHIHIRO
IPC: G11B7/13
Filed: 1999-03-03
Granted: 2000-10-21
Abstract: When a light is irradiated on and near separated portions of a light-receiving element, a frequency characteristic grows worse. According the present invention, a light-receiving element is formed on a semiconductor substrate by a junction portion of a first conductivity-type first semiconductor portion and a second conductivity-type second semiconductor portion, i.e. p-n junction. Then, a second conductivity-type separating region is formed on a part of the first semiconductor portion. With application of a reverse-bias voltage lower than a reverse-bias voltage applied to the junction portion when the light-receiving element is driven, the first semiconductor portion is separated into a plurality of portions by a spread of a depletion layer from the junction portion comprising the light-receiving element and the junction portion comprised of the separating region, whereby the frequency characteristic is improved.
Patent TW-503336-B (TW)
Title: Liquid crystal display device
Inventor: KAGAWA HIROYUKI
IPC: C09K19/02
Filed: 1999-05-06
Granted: 2002-09-21
Abstract: Decreasing the ununiformity of display by photo-deterioration of liquid crystal material, in order to provide high grade liquid crystal display devices. A pair of substrates holding a liquid crystal layer between them are adhered together with a resin, and at least an opening for injecting liquid crystal into the interval between the pair of substrates is provided to the resin portion. The opening is sealed with a photo-curable resin. The liquid crystal layer contains a photo-reactive liquid crystal compound, of which molecular structure is converted by a photo-irradiation, and an photo-absorbing organic compound having a photo-absorptivity larger than that of the photo-reactive liquid crystal compound at a designated wavelength, and containing at least one of alkyl substituent, alkenyl substituent, and alkoxyl substituent of 1-8 carbon atoms, respectively, in its molecule.
Patent TW-I241329-B (TW)
Title: Insulative adhesive for electronic component, n and lead frame and semiconductor device using the same
Inventor: SHIMIZU TAKEHIRO
IPC: H01L23/495
Filed: 1999-05-18
Granted: 2005-10-11
Abstract: An insulative adhesive for electronic component, which is to be used for bonding a semiconductor chip to a lead frame and comprises a resin and a solvent, the resin having (A) a weight average molecular weight (Mw) of 30,000 to 300,000 based on conversion into polystyrene and (B) a ratio of weight average molecular weight (Mw)/number average molecular weight (Mn) of 5 or less, and (C) the insulative adhesive for electronic component having a viscosity of 5,000 to 100,000 mPa.s at a rotation number of 10 rpm and a viscosity ratio (eta 1 rpm/eta 10 rpm) of 1.0 to 6.0 as measured at 25 DEG C with an E-type viscometer.
Patent TW-428323-B (TW)
Title: Image sensor structure and its fabricating method
Inventor: PAN RUEI-SHIANG
IPC: H01L27/14
Filed: 1999-06-09
Granted: 2001-04-01
Abstract: This invention is about image sensor structure and its fabricating method. This image sensor can be divided into optical sensing region and circuit region. A stacked polysilicon ring is formed on the peripheral brink of optical sensing region and this stacked polysilicon ring is contacted with the PN photodiode of sensing region. By using metal conduction wire, the stacked polysilicon ring is connected to transistors of the circuit region.
Patent TW-525260-B (TW)
Title: Shallow trench isolation pull-back process
Inventor: JAN BO-WEN
IPC: H01L21/762
Filed: 1999-08-02
Granted: 2003-03-21
Abstract: A shallow trench isolation pull-back process is provided, which comprises forming a patterned mask layer on a substrate, then, forming a sacrificial layer on the sidewall of the mask layer, etching the exposed substrate to from trench in the substrate, and finally removing the sacrificial layer to widening the trench opening and thus form the ""pull-back"" profile.
Patent TW-464600-B (TW)
Title: Foam core countertop extrusion system
Inventor: ORISEH ANTHONY S
IPC: B29C48/30
Filed: 1999-09-06
Granted: 2001-11-21
Abstract: A coextrusion system for extruding a foam core countertop profile is disclosed. Generally, the system includes a plurality of hoppers coupled to conventional drying units, a plurality of extruders respectively coupled to hoppers, a coextrusion die, a calibrator, a cooling tank, a puller and a cutting assembly.
Patent TW-444239-B (TW)
Title: Vacuum process device
Inventor: KIRIMURA HIROYA
IPC: B65G49/07
Filed: 1999-09-14
Granted: 2001-07-01
Abstract: The present invention relates to a vacuum process device equipped with several process chambers in which a specific process can be carried out on the required object under a specific pressure. The object of the present invention is to provide a vacuum process device of excellent maintainability, which is provided with the process device used to perform the prescribed process on the material, having a plurality of process chambers where the prescribed process is performed on the material and also provided with a plurality of process chambers to perform the prescribed process on the internally arranged material, on which the area of installation can be substantially made smaller than the conventional one provided with the same number and size of process chambers. To achieve the object, the process chambers C1 to C6 arranged around the control chamber Cc, a vacuum process device A1 where a carry-in chamber C1 and a carry-out chamber Co are arranged, and the eight chambers arranged around the control chamber are arranged in such a manner that they are separated in two hierarchies of the first lower side hierarchy and the second upper side hierarchy. The two adjacently arranged chambers in the direction around the central chamber are arranged in such a manner that they are partially overlapped in different hierarchies.
Patent TW-466604-B (TW)
Title: High temperature deposition of oxide layer that protects against implantation damage
Inventor: ISHIGAKI TORU
IPC: H01L27/115
Filed: 1999-09-29
Granted: 2001-12-01
Abstract: An oxide layer is deposited to a thickness of about 100-300 Å over a gate and active regions of a semiconductor device prior to the step of implanting the active regions. The deposition is carried out at a temperature between 750-900 DEG C, which is sufficiently high to eliminate damage caused by etching of the gate pattern. The formation of the gate bird's beak is suppressed, because silicon in the gate is not consumed during the deposition of the oxide layer.
Patent TW-439184-B (TW)
Title: Method for preventing the HSQ/dielectric layer interface from peeling off
Inventor: JANG JIA-LUNG
IPC: H01L21/76
Filed: 1999-09-30
Granted: 2001-06-07
Abstract: The present invention discloses a method for preventing the HSQ/dielectric layer interface from peeling off, which comprises: forming a first dielectric layer on a substrate formed by the pre-process and manufactured with a wire structure; using plasma to process the surface of the first dielectric layer, so as to increase the ruggedness of the surface of the first dielectric layer; forming a HSQ layer on the first dielectric layer, thereby increasing the adhesion capability between the HSQ layer and the first dielectric layer.
Patent TW-446954-B (TW)
Title: Test structure and test method for dynamic random access memory
Inventor: GUO JYH-CHYURN
IPC: G11C29/00
Filed: 1999-10-22
Granted: 2001-07-21
Abstract: This invention is about the test structure and test method for a kind of dynamic random access memory. The characteristic of this invention is to select several test structures and to conduct the analysis of leakage currents for the word line in ON and OFF states, respectively, such that, under the condition of eliminating the factor of background noise leakage current, the leakage currents from each different sources are obtained.
Patent TW-476192-B (TW)
Title: Phase lock loop and a charge pump circuit using the phase lock loop, and voltage control oscillation circuit
Inventor: KIYOSE MASASHI
IPC: H03L7/089
Filed: 1999-10-25
Granted: 2002-02-11
Abstract: The phase lock loop includes the followings: a voltage control oscillator, which is used to change frequency of the oscillation clock by responding to the variation of the control voltage; a phase comparator, which is used to compare the phase of the oscillation clock stated above with that of the base clock having a predetermined cycle; the first charge pump, which is used to select output of the first electric potential or the second electric potential by responding to the comparison output of the phase comparator; the first low-pass filter, which is used to smoothen output of the first charge pump and generate a control voltage stated above; the second charge pump, which is used to select output of the first electric potential or the second electric potential in accordance with the predetermined cycle; the second low-pass filter, which is used to smoothen output of the second charge pump and generate a compensation voltage; and a control portion, which is used to control the first and the second electric potentials taken from the first and the second low-pass filters by responding to the compensation voltage.
Patent TW-585913-B (TW)
Title: HS-40 enhancer-containing vector
Inventor: SHEN CHE-KUN JAMES
IPC: C12N15/867
Filed: 1999-12-04
Granted: 2004-05-01
Abstract: A viral expression vector having a nucleic acid which includes (1) a transcriptional start site; (2) a promoter operably linked to the transcriptional start site; and (3) an enhancer operably linked to the promoter, the enhancer comprising the DNA sequence of SEQ ID NO:1 or the RNA equivalent thereof.
Patent TW-539860-B (TW)
Title: Method for printed circuit board inspection
Inventor: GREENBERG ANAT
IPC: G01N21/956
Filed: 2000-01-15
Granted: 2003-07-01
Abstract: A method for printed circuit board (PCB) inspection, comprising: providing a multiplicity of PCBs placed on an inspection panel; defining each non-identical PCB in terms of geometry and features which are to be inspected; grouping said PCBs into at least one cluster, said at least one cluster being defined in terms of an amount, location and orientation of the PCBs in said at least one cluster; creating a reference image for said panel defined by a location and orientation of said at least one cluster on said panel; and inspecting said panel by comparing sensed information with said reference image.
Patent TW-554216-B (TW)
Title: Reflective liquid crystal display device
Inventor: HANAOKA KAZUTAKA
IPC: G02F1/139
Filed: 1999-12-13
Granted: 2003-09-21
Abstract: In a reflective liquid crystal display device 10, a relationship between a refractive index na of a resin layer 12 and ordinary light refractive index no and extraordinary light refractive index ne of a liquid crystal layer 14 is na=ne > no. In a case where a voltage is applied to the liquid crystal layer 14, an emission ray is emitted in a direction which is entirely different from that of an incident ray which enters the reflective liquid crystal display device 10 vertically. On the other hand, in a case where the voltage is not applied thereto, the emission ray is emitted in a direction identical with that of the incident ray. Accordingly, the reflective liquid crystal display device 10, without using a polarizing plate, can perform a liquid crystal display with high contrast and high brightness.
Patent TW-552281-B (TW)
Title: Purification of 1,3-propanediol in carbonyl-containing stream
Inventor: KELSEY DONALD ROSS
IPC: C08G63/183
Filed: 1999-12-27
Granted: 2003-09-11
Abstract: A process for preparing a 1,3-propanediol-based polyester in which a carbonyl-containing 1,3-propanediol stream is purified for reuse of the 1,3-propanediol. The process involves reacting, under condensation polymerization conditions, terephthalic acid and a molar excess of 1,3-propanediol, with distillation and condensation of a major portion of the unreacted 1,3-propanediol. To this condensed stream is added a sufficient amount of base to raise the pH to a value greater than 7, and from this base-containing condensate the 1,3-propanediol is distilled and recycled to the polymerization reaction.
Patent TW-486547-B (TW)
Title: Gas compressor
Inventor: NONAKA TAKESHI
IPC: F04C29/02
Filed: 2000-01-11
Granted: 2002-05-11
Abstract: A gas compressor is suitable to enhance a refrigeration efficiency of an air conditioning system and to avoid lubrication fault due to oil shortage. A volume of a discharge chamber (7) is enlarged, and an easy-to-be soluble combination of refrigerant gas and oil is selected. When the volume of the discharge chamber is enlarged, high-pressure refrigerant gas including non-separated oil component takes a sufficient time to pass through the discharge chamber. If the passage time for the discharge chamber is thus elongated, a ratio of the non-separated oil component contained in the high-pressure refrigerant gas to drop down to an oil pool (7b) at a bottom of the discharge chamber by a gravity force is high so that an entrance amount of the non-separated oil component toward a condenser of the air conditioning system may be reduced as much as possible and the oil within the gas compressor is likely to return to reserve a sufficient amount of the oil in the gas compressor.
Patent TW-466169-B (TW)
Title: Process for the formation of vulcanized hollow bodies, and the hollow bodies so obtained
Inventor: ANZANI LANFRANCO
IPC: B29C43/10
Filed: 2000-01-20
Granted: 2001-12-01
Abstract: In the inside of heated molds hollow bodies are formed by vulcanization, which bodies are made up by elements from natural or synthetic rubber and/or treated elastomers, possibly associated with different materials such as leather, skin, cotton, metals, expanded rubbers and other ones, combined with each other. A pressurized fluid, such as hot or cold air, vapor or compatible gas, is injected between said hollow bodies being formed. During the vulcanization, the components, airtight-coupled with each other along at least a contact and sealing common line, are pushed and kept in forming adhesion against the mold surfaces by the pressurized fluid.
Patent TW-440966-B (TW)
Title: Manufacturing method to activate high resistivity p-type gallium nitride thin film into low resistivity p-type gallium nitride thin film
Inventor: TZENG JIAN-SHIN
IPC: H01L21/477
Filed: 2000-03-10
Granted: 2001-06-16
Abstract: This invention provides a novel manufacturing method to activate high resistivity p-type gallium nitride thin film into low resistivity p-type gallium nitride thin film by using energy produced by temperature gradient variation. The above-mentioned high resistivity p-type thin film is the p-type doped III-nitride thin film or p-type doped II-VI compound thin film. Depending on the needs of the application, there can be no constant temperature operation (zero second of constant temperature time) in the process of temperature gradient variation or constant temperature operation can be employed with the constant temperature time not greater than 25 seconds. The goal of activating p-type doping is achieved by rapid temperature increase so that the diffusion problem derived from longer time heat treatment can be reduce because the heat treatment time is decreased.
Patent TW-472242-B (TW)
Title: Video tape recorder
Inventor: UEMURA HIDEHITO
IPC: G11B5/53
Filed: 2000-03-16
Granted: 2002-01-11
Abstract: In order to not only obtain excellent sound quality in a long-time recording mode not less than five times a standard recording mode by preventing, without narrowing a track pitch of a high-fidelity head, the high-fidelity head from tracing the third sound track from a target sound track as well as excellent picture quality free from crosstalk from an adjoining video track of a target video track but enable special playback without using a field memory in a video tape recorder, one head pair in conventional double azimuth type four heads for the standard recording mode and a threefold recording mode is used for video recording in the long-time recording mode and a head pair having a head width smaller than a width of a recording track is used exclusively for video playback in the long-time recording mode.
Patent TW-459113-B (TW)
Title: Improved manufacture of ball valve
Inventor: WU LE-RUEI
IPC: F16K7/00
Filed: 2000-04-26
Granted: 2001-10-11
Abstract: This invention is related to an improved manufacture of ball valve using tube forming process, comprising the steps of: obtaining a round tube of an appropriate specification; forming the upper and lower end edges of the tube with chamfers inclining inwards; placing and punching the chamfered tube into a punching mold to form a ball valve semi-product with a top opening greater than the bottom opening, the bottom opening being normal to the outlet edge; placing a round tube having a diameter accommodating the bottom opening above the top opening of the ball valve semi-product, the round tube having an upper and a lower end edges being formed with chamfers inclining outwards, such that after insertion, the bottom edge of the round tube aligns with the outlet edge of the ball valve semi-product; placing the ball valve semi-product inserted with a round tube into another punching mold, to form a ball valve final product with a top opening pressing and urging against and the round tube, and a top outlet edge aligning with the chamfer of the round tube, whereby a direct passageway is formed at the ball valve center to allow smooth water flow without resulting in turbulence, such that the ball valve is produced in a simple and an efficient manner without involving the procedures of welding and roundness rectification.