baber/WOPTO huggingface dataset:
Patent JP-2013098258-A (JP)
Title: Composite electronic component and method for manufacturing the same
Inventor: NISHIKAWA TOMONAGA
IPC: H01C7/12
Filed: 2011-10-28
Abstract: PROBLEM TO BE SOLVED: To prevent the occurrence of connection failures between a common mode filter and an ESD protection element and improve static electricity absorbing performance.SOLUTION: A composite electronic component 100 includes: a substrate 11; a functional layer 12 provided on the substrate 11; bump electrodes 13a-13f provided on the functional layer 12; and a magnetic resin layer 14. The functional layer 12 includes: a common mode filter layer 12A including spiral conductors 20, 21; and an ESD protection layer 12B including a plurality of ESD protection elements. In the ESD protection layer 12B, a terminal electrode contact 39 and a ground contact 40, each of which comprises a plated electrode, are formed on surfaces of a terminal electrode part 37 and a ground electrode part 38 of each of gap electrodes 34A -34D, respectively. The terminal electrode contact 39 and the ground contact 40 penetrate through an inorganic insulation layer 36 to be connected to the common mode filter layer 12A and the respective bump electrodes 13a-13f, respectively.
Patent JP-2013098337-A (JP)
Title: Vacuum processing apparatus
Inventor: NAKAO TEIKO
IPC: C23C16/509
Filed: 2011-10-31
Abstract: PROBLEM TO BE SOLVED: To provide a vacuum processing apparatus capable of performing stable film production even on a base plate with a large area by uniformizing an electric field distribution and a plasma distribution.SOLUTION: A vacuum processing apparatus 1 has: a discharge chamber 2 composed of a ridge waveguide having ridge electrodes 21a, 21b and non-ridge electrodes 22a, 22b; converters 3A, 3B composed of a ridge waveguide having ridge parts 31a, 31b and non-ridge parts 32a, 32b; discharge means 9 for discharging gas inside the discharge chamber 2 and the converters 3A, 3B; mother gas supply means 10 for supplying mother gas between the ridge electrodes. In the case that ddefines a distance between confronting faces of the ridge electrodes 21a, 21b, adefines the width of the ridge waveguides of the discharge chamber 2 and the converters 3A, 3B, ldefines the length of the ridge waveguide of the discharge chamber 2, and λ defines a wavelength in vacuum of supplied high-frequency power, the vacuum processing apparatus 1 respectively satisfies the following expressions within the range of allowing fluctuation of ±2%: d=0.004λ, a=0.72λ, l=0.52λ.
Patent JP-2012130333-A (JP)
Title: Mushroom medium reusable as livestock feed, and method for producing the same
Inventor: JIN KATSUKI
IPC: A01G1/04
Filed: 2011-11-02
Abstract: PROBLEM TO BE SOLVED: To provide a mushroom medium capable of being easily domestically procured as a substitute for a mushroom medium mainly made from sawdust or corncob, having a quality as excellent as the medium made from sawdust or corncob, and capable of improving the reuse rate of waste media.SOLUTION: Apple fruit dregs after squeezing the apple juice, or dried apple fruit dregs obtained by drying the remaining juice in the apple fruit dregs after squeezing the apple juice, or apple fruits fallen from trees or culled-out apple fruits are adjusted to the size suitable for mushroom cultivation when necessary to make the mushroom medium.
Patent JP-2013089217-A (JP)
Title: Area expansion card for small memory card
Inventor: IJICHI KATSUHIKO
IPC: G06K17/00
Filed: 2011-10-18
Abstract: PROBLEM TO BE SOLVED: To provide a method to overcome a problem that there is a risk of loss or accidental ingestion because a small memory card is too small for humans to handle direct the small memory card.SOLUTION: A small memory card is stuck on a recess of a card having an area suitable for humans to handle. Then, a dedicated slot for reading and writing of recording data is prepared so as to be used as is.
Patent JP-2013102284-A (JP)
Title: Book mark management device, book mark management system, information processing terminal and program
Inventor: OMATA TOSHIYUKI
IPC: G06F17/30
Filed: 2011-11-07
Abstract: PROBLEM TO BE SOLVED: To collect information in which object a user is interested in a program which the user views.SOLUTION: A fixed receiver 2 transmits video data to a portable terminal 3 while a broadcast program is reproduced. When there is an interesting object while a user views the broadcast program by the fixed receiver 2, the user touches the object on a touch panel display of the portable terminal 3 displaying the broadcast program. The portable terminal 3 transmits program specification information on the broadcast program, touched time, and a touched position on a screen to a book mark management server 4. The book mark management server 4 stores object information showing a display region and display time of the object by the individual program, and reads and stores object identification information when object information in which the touch position is included in the display region and the touch time is included in the display time is specified among object information of the program specified by the received program specification information.
Patent JP-2013104609-A (JP)
Title: Outdoor unit of air conditioning device
Inventor: MATSUI NOBUKI
IPC: F25B39/04
Filed: 2011-11-14
Abstract: PROBLEM TO BE SOLVED: To provide an outdoor unit of an air conditioning device that can further suppress power consumption of the outdoor unit including a spray nozzle for spraying the water by supplying water and air to the same.SOLUTION: This outdoor unit 10 of the air conditioning device 1 includes a heat exchanger 12, the spray nozzle 22 spraying the water by supplying the water and the air of a prescribed pressure thereto to cool the heat exchanger 12, and an air pressure rising device 50 for supplying the air to the spray nozzle 22 while rising its pressure. The air pressure rising device 50 rises the pressure of air while applying energy due to flow of the water supplied to the spray nozzle 22 as a driving source.
Patent JP-2012060663-A (JP)
Title: Method and apparatus for rotating phase of complex psk signal
Inventor: MOHSENI MOHAMMAD JAFAR
IPC: H04B1/707
Filed: 2011-11-14
Abstract: PROBLEM TO BE SOLVED: To provide a method and apparatus for rotating the phase of a complex PSK signal.SOLUTION: In applications employing phase-shift keying modulation, phase rotators (200, 202) as disclosed herein are used to rotate the constellation of signal vectors before carrier modulation in order to maximize modulator output power. The rotators (200, 202) may be applied in the digital domain (to complex signals having either binary-valued or multi-valued components) or in the analog domain.
Patent JP-2013104630-A (JP)
Title: Temperature control device
Inventor: YANAGIDA AKITO
IPC: F25D17/02
Filed: 2011-11-15
Abstract: PROBLEM TO BE SOLVED: To provide a temperature control device capable of removing gas in a refrigerant more effectively, and for performing temperature control of an object by using the circulation of the refrigerant to cool thereof.SOLUTION: The temperature control device 1 includes a circulation flow path L for circulating the refrigerant, a flow path tank 2 being a portion of the circulation flow path L, a reservoir tank 3 disposed in a position vertically higher than the flow path tank 2 and for reserving the refrigerant, and a communicating tube 4 for making an upper part of the flow path tank 2 communicate with a lower part of the reservoir tank 3. The flow path tank 2 has a flow path cross-sectional area larger than that of a pipe 5 forming the circulation flow path L connected with the flow path tank 2.
Patent JP-2013110604-A (JP)
Title: Semiconductor relay device
Inventor: WAKEGI YU
IPC: H03K17/78
Filed: 2011-11-21
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor relay device that inexpensively implements a low on resistance of an output MOSFET by providing an increased withstanding voltage of an entire charging/discharging circuit without using a special process.SOLUTION: A plurality of charging/discharging circuits 7a, 7b arranged between a gate and a source of an output MOSFET 5 are connected in series, and two photodiode arrays 3a, 3b are connected in parallel with the charging/discharging circuits 7a, 7b, respectively. In the configuration, a voltage corresponding to a photo-electromotive force of each photodiode array 3a, 3b acts only on a MOSFET (8a or 8b) in the charging/discharging circuit (7a or 7b) connected in parallel with the photodiode array, and does not act on the MOSFET in the other charging/discharging circuit. An overall withstanding voltage of the two charging/discharging circuits 7a, 7b can thus be the sum of withstanding voltages of the plurality of MOSFETs 8a, 8b included in the charging/discharging circuits 7a, 7b.
Patent JP-2012139673-A (JP)
Title: Method for inhibiting nitrosamine formation in anion exchange resin
Inventor: EICHER CHRIS RAYMOND
IPC: B01J41/12
Filed: 2011-11-22
Abstract: PROBLEM TO BE SOLVED: To provide a method for inhibiting nitrosamine formation in an anion exchange resin including a nitrosating agent and to provide the anion exchange resin produced thereby.SOLUTION: The method for inhibiting nitrosamine formation is provided which comprises mixing a cation exchange resin including the anion exchange resin with the nitrosating agent to inhibit nitrosamine formation on the anion exchange resin. The anion exchange resin produced by the method is also provided.
Patent JP-2013110344-A (JP)
Title: Nonvolatile semiconductor storage device and manufacturing method of the same
Inventor: SAOTOME SHINICHI
IPC: H01L29/792
Filed: 2011-11-24
Abstract: PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor storage device easy to be manufactured, and provide a manufacturing method of the nonvolatile semiconductor storage device.SOLUTION: A nonvolatile storage device comprises: a first memory cell array layer; a first insulation layer formed on the first memory cell array layer; a second memory cell array layer including second NAND cell units each having a second memory cell; a control gate formed via an inter-gate insulation layer, on both lateral faces in a first direction of first and second floating gates vertically positioned via a first insulation layer, and extending in a second direction orthogonal to the first direction; lower contacts positioned on both ends of first NAND cell units, and formed in the same layer with the first floating gate, and connected to the first semiconductor layer; and upper contacts positioned on both ends of the second NAND cell units, and connecting the second semiconductor and the lower contacts.
Patent JP-2013112542-A (JP)
Title: Intercalated graphite and method for producing flaked graphite
Inventor: WADA TAKUYA
IPC: C01B31/02
Filed: 2011-11-25
Abstract: PROBLEM TO BE SOLVED: To provide a new intercalated graphite wherein an intercalant is inserted between graphenes in a graphene laminated body, and a method for producing a flaked graphite by exfoliating the intercalated graphite.SOLUTION: In the intercalated graphite, the intercalant is inserted between the graphenes in the graphene laminated body. The intercalant is at least one compound selected from the group consisting of maleic acid, maleic anhydride and maleates. The method for producing the flaked graphite comprises a step of exposing the intercalated graphite to ultrasonic waves, thereby exfoliating the intercalated graphite to achieve the flaked graphite, wherein the intercalated graphite has at least one intercalant selected from the group consisting of maleic acid, maleic anhydride and maleates inserted between the graphenes in the graphene laminated body.
Patent JP-2013115198-A (JP)
Title: Pattern forming method
Inventor: KAWAMURA YOSHIHISA
IPC: B29C59/02
Filed: 2011-11-28
Abstract: PROBLEM TO BE SOLVED: To form a desired pattern through a reverse mask process by making a step of an applied reverse material small.SOLUTION: A pattern forming method includes the steps of: forming a first pattern in a first region on a processed film; forming a reverse material film including a photosensitive compound on the processed film so as to cover the first pattern; exposing and developing the reverse material film and processing the reverse material film into a second pattern in a second region different from the first region on the processed film; etching back the reverse material film so as to expose an upper surface of the first pattern after exposing and developing the reverse material film, and processing the reverse material film into a third pattern in the first region; and etching the processed film using the second pattern and the third pattern as a mask.
Patent JP-2013102409-A (JP)
Title: Speaker system and passive radiator unit
Inventor: KAKUMOTO JUNICHI
IPC: H04R1/28
Filed: 2011-11-08
Abstract: PROBLEM TO BE SOLVED: To improve a speaker system comprising a passive radiator required in reproducing low-pitched sound with a compact speaker, by realizing further miniaturization, improving low-pitched sound radiation performance, facilitating assembly and simplifying design processes.SOLUTION: A passive radiator having a circular outline is inserted into a tetragon inside an enclosure. The space generated by the difference in shapes is used as an air passage, so that a passive radiator based speaker system is constructed with a wasteless structure. In addition, the passive radiator is unitized.
Patent JP-2013113724-A (JP)
Title: Tire wear prediction method and tire wear prediction device
Inventor: SHIMIZU AKIYOSHI
IPC: G01M17/02
Filed: 2011-11-29
Abstract: PROBLEM TO BE SOLVED: To provide a tire wear prediction method and tire wear prediction device capable of predicting a wear amount of a tire used for an aircraft with high accuracy.SOLUTION: The tire wear prediction method predicts the wear amount of a tire used in an aircraft. The tire wear prediction method includes a step A for acquiring a plurality of wear energies En corresponding to each of a plurality of traveling states divided in accordance with use conditions, a step B for multiplying the plurality of wear energies En by each use frequency of the plurality of traveling states in each of the plurality of traveling states, and calculating the entire wear energy EA accumulated in a tire by integrating multiplication results, and a step C for calculating the wear amount of the tire for the aircraft on the basis of the entire wear energy EA.
Patent JP-2013113011-A (JP)
Title: Roof structure
Inventor: ISHIDA KENSUKE
IPC: E04D13/18
Filed: 2011-11-29
Abstract: PROBLEM TO BE SOLVED: To provide a structure on which solar cell panels can be installed without imposing an unbalanced load to a roof.SOLUTION: In a roof structure, a power generating region on which solar cell panels 7 and roof members 10 are installed is in a partial region of a roof, while the other region of the roof is a non-power generation region on which roof members 11 provided with waterproof function are arranged. The roof structure is constructed so as to suppress the difference between a total weight per unit area of the solar cell panels 7, accessories thereof, and the roof members 10 and a weight per unit area of the roof members 11 in the non-power generation region to 20% or less of the weight per unit area of the roof members 11 in the region without solar cell panel.
Patent JP-2013118217-A (JP)
Title: Semiconductor device
Inventor: IZUMI MASAAKI
IPC: H01L21/8234
Filed: 2011-12-01
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device equipped with a bypass capacitor, which can reduce a leakage current and inhibit decrease in capacitance by connecting MOS capacitors in series.SOLUTION: A semiconductor device comprises: a semiconductor substrate; first power wiring VDD arranged above the semiconductor substrate; second power wiring GND arranged in parallel with the first power wiring; an n-type well NW connected to the first power wiring formed on the semiconductor substrate; a p-type well PW connected to the second power wiring; element isolation regions delimiting an active region including a bypass capacitor active region; and a bypass capacitor formed in the bypass capacitor active region and including a capacitor electrode. The capacitor electrode is in an electrically floating state, and formed above a gate insulation film GD which is continuously formed on surfaces of an inner n-type well and an inner p-type well adjacent to each other via a pn junction pn reaching the substrate surface, and covers a whole surface of the bypass capacitor active region.
Patent JP-2013117673-A (JP)
Title: Image forming apparatus and image forming method
Inventor: GONDO MASANOBU
IPC: G03G15/00
Filed: 2011-12-05
Abstract: PROBLEM TO BE SOLVED: To provide an image forming apparatus capable of correcting a decrease in a charge potential due to deterioration of a charging member to maintain a stable charge potential and contribute to high image quality.SOLUTION: A DC bias is applied to a charging roller 2a by a DC power source 70 to charge a photoreceptor drum 1. Control means 74 detects an energization time from a rotation start time of a motor 72 for rotationally driving the charging roller 2a and corrects the DC bias according to the length of the energization time. As the energization time becomes longer, the charge potential decreases, but the decreased potential is compensated by recognizing the energization time and correcting the DC bias, and thereby the charge potential is maintained substantially constant.
Patent JP-2013017805-A (JP)
Title: Method for manufacturing artificial nail formed of solid ornament
Inventor: CHANG SUNG YONG
IPC: B29C51/10
Filed: 2011-12-06
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing an artificial nail formed of a solid ornament.SOLUTION: The method includes: a design stage S10 which forms a design including a solid ornament and a pattern on a base material; a body forming stage S20 which adsorbs the base material supplied to a vacuum forming mold where multiple nail shapes are formed; a cutoff stage S40 which cuts off the adsorbed base material into artificial nail shapes respectively to form an artificial nail body. The design stage S10 includes: a flat plate printing stage which prints a pattern on the base material; and a solid ornament forming stage which provides a transparent solid ornament so that light of a pattern shape is transmitted through a pattern forming position.
Patent JP-2013119214-A (JP)
Title: Inkjet device
Inventor: YAMAURA TSUKASA
IPC: B41J2/01
Filed: 2011-12-07
Abstract: PROBLEM TO BE SOLVED: To provide an inkjet device which permits a recording medium to be easily mounted.SOLUTION: The inkjet device 1 includes a head 2, an ultraviolet ray irradiation section 5, and a driving section 7. There are an ink discharge area R1, a solvent evapotranspiration area R2, and an ultraviolet ray irradiation area R3. The driving section 7 has an opening and closing mechanism moving a medium 100 to the ink discharge area R1 to the solvent evapotranspiration area R2 and to the ultraviolet ray irradiation area R3 in that order and moving and opening and closing the ultraviolet ray irradiation section 5.
Patent JP-2013120705-A (JP)
Title: Flash discharge lamp lighting device and light irradiator
Inventor: NAGASE TORU
IPC: H05B41/32
Filed: 2011-12-08
Abstract: PROBLEM TO BE SOLVED: To perform appropriate charging control according to capacity drop, by detecting capacity drop of a storage element accurately in a flash discharge lamp lighting device.SOLUTION: The flash discharge lamp lighting device includes a booster circuit for boosting the input voltage, a storage circuit having a storage element for charging the output of the booster circuit and a voltage detection circuit for detecting the charging voltage of the storage element, an igniter circuit for causing dielectric breakdown of a flash discharge lamp and charging the energy from the storage element to the flash discharge lamp, and a control unit for operating the booster circuit until the charging voltage reaches a boost voltage set value, and subsequently starting the igniter circuit. The control unit includes capacity drop detection means for detecting capacity drop of the storage element, and boost voltage setting means for increasing the boost voltage set value on the basis of the amount of capacity drop.
Patent JP-2013121308-A (JP)
Title: Piezoelectric element driving circuit
Inventor: OKAGUCHI KENJIRO
IPC: H02P7/29
Filed: 2011-12-09
Abstract: PROBLEM TO BE SOLVED: To realize a piezoelectric element driving circuit that operates at low power consumption while securing a high driving voltage for a piezoelectric element.SOLUTION: A piezoelectric element driving circuit 10 comprises: an H-bridge circuit 11; low-pass filter circuits 12A and 12B; and a control signal generation part 13. The control signal generation part 13 generates first and second control signals composed of rectangular waves having repetition cycles that approximately coincide with a fundamental cycle of bending of a piezoelectric element P. The first and second control signal are signals whose phases are opposite to each other. The first and second control signals are reduced in through rate as passing through the low-pass filters 12A and 12B. Each FET of the H-bridge circuit 11 performs a switching operation by means of the first and second control signals whose through rates are reduced. First and second driving signals outputted from the H-bridge circuit 11 have step-like waveforms and are signals whose harmonic components are suppressed.
Patent JP-2013122503-A (JP)
Title: Optical connection component
Inventor: SATO MUTSUMI
IPC: G02B6/32
Filed: 2011-12-09
Abstract: PROBLEM TO BE SOLVED: To provide an optical connection component that can reduce the number of parts and the size of the apparatus.SOLUTION: An optical connection component 1 makes light from a luminous element 2 enter an optical fiber 4 of a ferrule 3. A sleeve 7 has a through-hole 8 for inserting the ferrule 3. An isolator 9 has an outer end face 9a in contact with an edge 3a of the ferrule 3 inserted into the through-hole 8 of the sleeve 7. A GRIN rod lens 5 focuses the light from the luminous element 2 onto the outer end face 9a of the isolator 9.
Patent JP-2013122978-A (JP)
Title: Semiconductor light-emitting element manufacturing method
Inventor: SATO TAISUKE
IPC: H01L33/22
Filed: 2011-12-09
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element at high yield.SOLUTION: A manufacturing method of a semiconductor light-emitting element 110 comprises the steps of: bonding a principal surface on a laminate mother body 4 side among principal surfaces of a structure including a substrate 5 for growth and the laminate mother body 4, with a substrate; removing the substrate for growth; forming a plurality of laminates; forming an irregular part 20; and forming a plurality of laminates. The laminate mother body includes: a first conductivity type first nitride semiconductor film 10; a luminescent film 14 provided on the first nitride semiconductor film; and a second conductivity type second nitride semiconductor film 12 provided on the luminescent film. A tensile stress is applied to the laminate mother body.