baber/WOPTO huggingface dataset:
Patent TW-392224-B (TW)
Title: Method of improving SiOxNy mask to define vertical polycide gate
Inventor: LIOU REN-CHENG
IPC: H01L21/28
Filed: 1998-10-28
Granted: 2000-06-01
Abstract: The present invention relates to a method for improving SiOxNy mask to define vertical polycide gate. The method comprises the steps of: providing a substrate; sequentially forming a gate oxide layer, a polysilicon layer, and a silicide to have a stack layer on the substrate; applying photolithography process and etching technique to form a hard SiOxNy mask on the stack layer at a position where a MOS gate will be formed; using gas plasma formed by the gas of chlorine/helium-oxygen/nitrogen mixture; dry etching the stack layer that is not covered by the hard mask until the substrate is exposed; and removing the hard mask to produce a polycide gate structure with vertical edge.
Patent TW-388730-B (TW)
Title: Method for producing hole-drilling saw
Inventor: LIOU SHEN-MU
IPC: B23D65/00
Filed: 1998-12-09
Granted: 2000-05-01
Abstract: The present invention relates to a method for producing a hole-drilling saw, which essentially comprises: (1) a cutting step; (2) a pressing step; (3) a mold winding step; (4) a welding step; and (5) a heat treatment step. The invented method can reduce the production time and the machine cost, as well as the dependence on the experienced personnel. Furthermore, since the saw teeth are completely made by precision machineries, the quality of which are quaranted. The production cost and the unit price of the product can be reduced because the saw teeth need not be made one-by-one.
Patent TW-490860-B (TW)
Title: Manufacturing of flash memory cell
Inventor: DING YAN-LING
IPC: H01L21/8247
Filed: 1998-12-24
Granted: 2002-06-11
Abstract: Manufacturing of flash memory cell is introduced. Use the shallow trench isolation to define the active region and simplify the flash memory cell process. At the same time, this method also provides a way to increase the overlap area of the floating gate and control gate to raise the performance of flash memory cell.
Patent TW-448709-B (TW)
Title: Low-thermal expansion circuit board and multilayer circuit board
Inventor: NAGASAWA MEGUMU
IPC: H05K3/46
Filed: 1999-06-08
Granted: 2001-08-01
Abstract: A low-thermal expansion circuit board comprising an insulating layer made of an organic polymer having thereon a wiring conductor for bare chip mounting, wherein the wiring conductor is an iron-nickel-based alloy layer having a copper layer on at least one side thereof; and a low-thermal expansion multilayer circuit board having a plurality of the low-thermal expansion circuit boards via an adhesive layer, the adhesive layer having through-holes filled with solder to connect the circuits layers.
Patent TW-444187-B (TW)
Title: Speech encoder using continuous warping in long term preprocessing
Inventor: GAO YANG
IPC: G10L19/08
Filed: 1999-08-21
Granted: 2001-07-01
Abstract: A multi-rate speech codec supports a plurality of encoding bit rate modes by adaptively selecting encoding bit rate modes to match communication channel restrictions. In higher bit rate encoding modes, an accurate representation of speech through CELP (code excited linear prediction) and other associated modeling parameters are generated for higher quality decoding and reproduction. To support lower bit rate encoding modes, a variety of techniques are applied many of which involve the classification of the input signal. The speech encoder continuously warps a weighted speech signal in long term preprocessing. The continuous warping is applied to a linear pitch lag contour that enables fast searching through linear time weighting. Optimal searching is performed within a limited range that is defined at least in part on sharpness and speech classification. The speech encoder generates the linear pitch lag contour from previous and current pitch lag values. Such continuous warping may also be applied in an open loop approach to the residual signal.
Patent TW-462153-B (TW)
Title: Energy based communication rate detection system and method
Inventor: JOU YU-CHEUN
IPC: H04B17/00
Filed: 1999-09-09
Granted: 2001-11-01
Abstract: A system and method for the detection of zero-rate communication frames on forward and reverse communication links is described herein. In a first embodiment, the rate determination process begins (602) upon receiving pilot and traffic channel signals (604). The system then compares the received traffic channel energy with the pilot signal to obtain a metric. The metric is then compared with a predetermined threshold (614) to detect the presence of a zero-rate traffic channel frame (414). In a second embodiment, the process begins (902) with the receipt of a reverse communication link frame (706, 708) having first (710, 714) and second portions (712, 716). The system then detects the energy contained in the first and second portions (904, 906). The system compares the detected energy in the first portion with the detected energy in the second portion to obtain a metric (908). The system then compares the metric with a predetermined threshold (901) to detect the presence of the zero-rate frame. The selection of the predetermined threshold in both embodiments is based on the probability of detection of a transmitted zero-rate frame and the probability of erroneously detecting a zero-rate frame.
Patent TW-437048-B (TW)
Title: CMOS silicon-control-rectifier structure for electrostatic discharge protection
Inventor: CHEN SHIAU-SHIAN
IPC: H01L23/60
Filed: 1999-09-13
Granted: 2001-05-28
Abstract: The present invention discloses an electrostatic discharge protection device with silicon-control-rectifier (SCR) in the CMOS processing. In an embodiment of the present invention, the protection device comprises: a semiconductor substrate with the first conductivity and forming a well region with the second conductivity in the semiconductor substrate; forming a first area in the semiconductor substrate and outside the well region; forming a second area in the semiconductor substrate and between the first area and the well region; further, forming a part of a third area in the well region and the other part is outside the well region but still in the semiconductor substrate; forming a fourth area in the well region; forming a fifth area in the well region and between the third and the fourth areas; further, combining the third and the fifth areas to form a P<SP>+</SP>-N<SP>+</SP> junction of zener diode and the breakdown voltage of the zener diode can be controlled by adjusting the ion dosage in the third area.
Patent TW-480482-B (TW)
Title: Memory-cells arrangement and implantation-masks for manufacturing it
Inventor: HONIGSCHMID HEINZ
IPC: H01L27/11502
Filed: 1999-10-05
Granted: 2002-03-21
Abstract: This invention relates to a memory-cells arrangement composed of hybrid memory-cells, in which the respective bit-line-pairs (BL0; bBL0; BL1, bBL1) are separated through a bit-line of other bit-line-pair, so that the memory-cells are mutually arranged under 1/4-division. Thus some connected implantation-mask-portions (12) can be used without connection-regions or corner-regions, some implantation-problems can be prevented and the transistors with different turn-on voltages can be produced.
Patent TW-I224240-B (TW)
Title: Radiation sensitive resin composition
Inventor: KOBAYASHI HIDEKAZU
IPC: G03F7/016
Filed: 1999-12-22
Granted: 2004-11-21
Abstract: A radiation sensitive resin composition which is sensitive to various types of radiation and excellent in terms of resolution and pattern shape, has small film surface roughness and optical proximity effect, and is useful as a chemically amplifying positive resist capable of forming a fine line-and-space pattern, fine isolated pattern and fine contact hole pattern with high accuracy and stability. The radiation sensitive resin composition comprises a polymer containing p-hydroxystyrene and p-cyclohexyloxymethyloxystyrene as polymer units, a polymer containing p-hydroxystyrene and p-t-butoxycarbonyloxystyrene as polymer units, and a radiation sensitive acid-generating agent.
Patent TW-516160-B (TW)
Title: Planar and densely patterned silicon-on-insulator structure and process of fabricating
Inventor: LEOBANDUNG EFFENDI
IPC: H01L21/205
Filed: 2000-01-19
Granted: 2003-01-01
Abstract: A planar silicon-on-insulator (SOI) structure and a process for fabricating the structure. The SOI structure has a silicon wafer, an oxide layer, and a silicon layer. Trenches are formed, extending from the top surface of the structure to the silicon wafer, and are filled with a semiconductor. The trenches have a top, a bottom, and side walls. The side walls have side-wall silicon portions. The side-wall silicon portions of the trench side walls are covered by trench side-wall oxide layers. A protective side wall extends over the trench side walls and trench side-wall oxide layers from the trench top to the trench bottom.
Patent TW-507229-B (TW)
Title: Resistance force generator
Inventor: OOTORI YASUHIRO
IPC: A63F13/24
Filed: 2000-01-21
Granted: 2002-10-21
Abstract: It is an object of the present invention that there can be achieved generation of a resistance force which is proportional to the operation speed of an input operation unit and reduction in the number of parts, and that a player can have a full direct feeling in the sense of touch of the input operation unit. The resistance force generator 53 according to the present invention is the resistance force generator for generating, in accordance with game information, a resistance force corresponding to the input operation on a trigger of an operation device which inputs information to a main unit of the game machine. The resistance force generator has a container 54 that accommodates a magnetic powder 36, rotating vanes 57 which are provided inside the container 54 and rotate based on the input operation of the trigger, and an electromagnet 55 which generates a magnetic field inside the container 54 in accordance with game information.
Patent TW-410249-B (TW)
Title: The modularized stair tread board and the construction methods
Inventor: LIN YING-BIN
IPC: E04F11/09
Filed: 2000-01-21
Granted: 2000-11-01
Abstract: This invention provides the modularized stair tread boards and the construction methods. The first step is to fix a bottom plate at the long side of the lateral plane on the tread board, and at least 2 metal plates are fixed at the opposite side. The second step is to put tread board on the stair-surface, to let the bottom board outside the stair-surface, and the metal plates are located at the vertical surface of the stair. The third is to fix a connecting-plate on the bottom board. The fourth step is to fix several upper blocks of horizontal-adjusting plate at the vertical block of the connecting-plate, thus the tread board can be set in the horizontal position. Then the tread board is fixed on the surface of the stair, and the bottom block of the horizontal-adjusting plate is fixed on the vertical surface of the stair. The fifth step is to set a vertical stair plate that is constrained by the outside length of the tread board at the vertical stair surface. From the previous construction procedures, the stair tread board with a long utilized period has been gotten, and also suited for DIY construction too.
Patent TW-505610-B (TW)
Title: Collision avoidance system for track-guided vehicle
Inventor: BASSETT MICHAEL R
IPC: B61L23/34
Filed: 2000-03-09
Granted: 2002-10-11
Abstract: A system to allow track-guided vehicles to avoid collisions with one another in straight track and curved track situations utilizing vehicle mounted devices and without the need for additional active traffic control devices. The system includes track-guided vehicles equipped with a plurality of selective sensors on the front and identifying reflective elements on the rear. Reflective strips mounted on the inner face of curved track allow the selective sensors to detect targets around curves. Retroreflective sensors coupled with corner cube reflective material are a preferred set of sensor and target implementations. The placement of the sensors and reflective elements is specified such that a calibrated system limits the range of the system and is easily maintained.
Patent TW-487844-B (TW)
Title: Method and apparatus for the block transfer of data
Inventor: DUGGAN ROBERT J
IPC: G06F13/38
Filed: 2000-05-25
Granted: 2002-05-21
Abstract: Systems and methods for performing block transfers of data are disclosed. The block transfers may be performed such that each portion of the block is transferred to a single address of an input/output device. In addition, the disclosed systems and methods may perform block transfers to two or more input/output devices at substantially the same time. The systems and methods may perform such block transfers without decoding circuitry by offsetting the address lines of an input/output device(s) from the lines of an address bus, such that several addresses placed on the address bus correspond to only a single address of thc device(s).
Patent TW-555838-B (TW)
Title: A chemical mechanical polishing method using a slurry
Inventor: HO PAUL KWOK KEONG
IPC: C09K3/14
Filed: 2000-03-17
Granted: 2003-10-01
Abstract: A polishing method is achieved comprising the following steps. A layer made of material containing a metal as a main component over a substrate having recessed portions on a surface thereof so as to fill the recessed portions with the metal layer is formed. The metal is Cu, a Cu alloy, AI, or an AI alloy. The metal layer is polished by a chemical mechanical polishing method using a slurry including a polishing agent. The polishing agent contains a chemical agent and an etching agent. The chemical agent includes at least a carbonyl derivative of benzotriazole and is responsible for forming a protective film on the surface of the metal layer by reacting with the material containing a metal as a main component. The etching agent is responsible for etching the material containing a metal as a main component.
Patent TW-559727-B (TW)
Title: Apparatus for data receiving and transmitting
Inventor: MATSUMI CHIYOKO
IPC: H04L12/56
Filed: 2000-03-29
Granted: 2003-11-01
Abstract: A data processing system includes a real time interface driver for processing data of the apparatus, the apparatus having an interface for requesting a real time upon recording and/or reproduction; a non real time interface driver for processing data of the apparatus, the apparatus having an interface for requesting a non real time upon recording and/or reproduction; an IFS manager for allocating given processing commands relating to the document system to each of the control means for processing the commands; first control means which utilizes first document management information relating to data of a first medium to convert the given processing commands inputted from the IFS manager to data processing commands of the first medium, and to transmit the same to the real time interface driver, the first medium being stored in an apparatus having the real time request interface; and second control means which utilizes second document management information relating to a second medium, along with the given processing commands inputted from the IFS manager, to perform processing of document storage and retrieval with respect to the second medium, and to transmit the given processing commands through an I/O sub-system to the non real time interface driver, the second medium being stored in an apparatus having the non real time request interface.
Patent TW-451088-B (TW)
Title: Optical fiber and optical transmission line including the same
Inventor: KATO TAKATOSHI
IPC: H04B10/2507
Filed: 2000-04-15
Granted: 2001-08-21
Abstract: The optical fiber and the optical transmission line including the same are disclosed which provided with a structure for transmitting the optical signals composed of different wavelength in the wavelength band of 1530 to 1620 nm to a long distance. The optical transmission line of the present invention comprises of one or more of the first optical fiber and one or more of the second optical fiber. The first optical fiber with a dispersion of +1.0 to +8.0 ps/nm/km at the wavelength band 1530 to 1620 nm, and the difference of the maximum value and the minimum value of the dispersion is less than 3.0 ps/nm/km. The second optical fiber with a dispersion of -1.0 to -8.0 ps/nm km at the wavelength band 1530 to 1620 nm, and the difference of the maximum value and the minimum value of the dispersion is less than 3.0 ps/nm/km. By the above structure, in the whole optical transmission line, the difference of the maximum value and the minimum value of the average dispersion value derived from the optical fiber length and the dispersion value of the first and the second optical fiber, can be suppressed to a value less than 2.0 ps/nm/km.
Patent TW-561442-B (TW)
Title: LCD panel driving circuit
Inventor: UTO SHINYA
IPC: G09G3/36
Filed: 2000-05-11
Granted: 2003-11-11
Abstract: In the LCD panel driving circuit, the voltage of first and second buffer amplifiers is supplied to first output pad, the voltage of second and third buffer amplifiers is supplied to second output pad, and voltage of third and fourth buffer amplifiers is supplied to third output pad. Thus, data-line selection switches and output-polarity selection switches are switched in such a way that the voltage supplied to any adjacent output pads is always supplied from adjacent buffer amplifiers.
Patent TW-470926-B (TW)
Title: Method for varying tone and decreasing its noise
Inventor: CHEN WEN-YUAN
IPC: G10L21/0208
Filed: 2000-05-12
Granted: 2002-01-01
Abstract: The present invention relates to a method for varying tone and decreasing its noise, and contains the following steps: providing the first time frame and the second time frame; using the first sampling frequency to sequentially store a digital data into the first time frame and then store the digital data into the second time frame in sequence after the first time frame is full; and using the second sampling frequency to sequentially extract data from the second time frame and convert it to have an analog signal output, and then sequentially extract data from the first time frame and convert it to have an analog signal output after the second time frame is completely empty. Because the second sampling frequency is different from the first sampling frequency, a smoothing process is conducted before the analog signal is output in order to eliminate the discontinuous phenomenon of the analog signal.
Patent TW-503651-B (TW)
Title: A cathode-ray tube system capable of providing beam spots of a small diameter
Inventor: SAKURAI HIROSHI
IPC: G09G1/04
Filed: 2000-06-02
Granted: 2002-09-21
Abstract: A signal is sent to a deflection circuit and a video signal processing circuit. On receiving the signal, the deflection circuit outputs a vertical deflection signal and a horizontal deflection signal. The vertical deflection signal is sent directly to a deflection yoke while the horizontal deflection signal is sent via an S-shaped wave modulation circuit to the deflection yoke. On the other hand, the video signal processing circuit receives the signal and outputs a video signal via an amplitude modulation circuit and a frequency modulation circuit to a cathode of an electron gun. The S-shaped wave modulation circuit performs modulation on the horizontal deflection signal to change scanning speed. The amplitude modulation circuit and the frequency modulation circuit perform, on the video signal, amplitude modulation and frequency modulation which are appropriate for this speed.
Patent TW-455948-B (TW)
Title: Process for etching an insulating layer and forming a semiconductor device
Inventor: RAJAGOPALAN GANESH
IPC: H01L21/311
Filed: 2000-08-04
Granted: 2001-09-21
Abstract: Many variations of etches for insulating layers (114, 400, 422, 426) can be used. In one set of embodiments, an insulating layer (114, 400, 422, 426) is etched using an oxide etching component, a fluorine-scavenging component, and an organic etching component. In another set of embodiments, the insulating layer (114, 400, 422, 426) includes at least one atomic weight percent of carbon or hydrogen. That insulating layer is etched using an oxide etching gas and a nitrogen-containing gas. In yet another set of embodiments, an insulating layer (114, 400, 422, 426) is formed over semiconductor device substrate (100) having a diameter of at least approximately 300 millimeters. The insulating layer (114, 400, 422, 426) is etched using an oxide etching gas and a nitrogen-containing gas.
Patent TW-464589-B (TW)
Title: Tool for cutting material, wire cutter, and insert for use in a wire cutter
Inventor: DALLAS EDGAR A
IPC: B23D35/00
Filed: 2000-08-05
Granted: 2001-11-21
Abstract: A cutting tool having first and second lever arms with a cutting end and a handle end. A first insert and a second insert are connected to the cutting ends of each of the lever arms. The inserts are removable from the cutting ends of the lever arms, and each of the inserts include multiple cutting edges. When the inserts are connected to the cutting ends of the lever arms and the user pulls the handle ends towards each other, the cutting ends also move toward each other. As the cutting ends move toward each other, the inserts act cooperatively to sever materials located therebetween. When one of the cutting edges of an insert becomes dulled or damaged, the user removes the insert from the cutting end of the lever arm and repositions the insert on the cutting end such that a different cutting edge is revealed for severing materials.
Patent TW-472161-B (TW)
Title: Optical transmission line
Inventor: SASAOKA EISUKE
IPC: H04B10/2525
Filed: 2000-08-05
Granted: 2002-01-11
Abstract: The invention provides an optical transmission line, the structure of that is capable of obtaining a good transmission feature used in a wider range of a frequency band. The optical transmission line of the present invention comprises: a first waveguide and a second waveguide, a transmission feature of a specific wavelength used in a frequency band is set respectively in the first waveguide and the second waveguide, which are alternately disposed on the line, as opposite to each other. That is, in the specific wavelength used in the frequency band, an optical dispersion of each of the first and second waveguide is set as reverse signs with each other, and a dispersion slope of the first waveguide and that of the second waveguide are set as reverse signs. More specifically, in an exemplary embodiment, an absolute value of the optical dispersion of the first waveguide is set above 1 ps/nm/km and under 10 ps/nm/km to effectively reduce a difference of a transmiss quality between wavelengths in the whole line of said optical transmission line.
Patent TW-495617-B (TW)
Title: Module based flexible semiconductor test system
Inventor: SHIGERU SUGAMORI
IPC: G01R31/319
Filed: 2000-10-30
Granted: 2002-07-21
Abstract: A semiconductor test system for testing semiconductor devices, and particularly, to a semiconductor test system having a plurality of different types of tester modules for easily establishing different semiconductor test systems. The semiconductor test system includes two or more tester modules whose performances are different from one another, a test head to accommodate the two or more tester modules having different performances, means provided on the test head for electrically connecting the tester modules and a device under test, and a host computer for controlling an overall operation of the test system by communicating with the tester modules through a tester bus. One type of the performances of the tester module is high speed high timing accuracy while other type of performance is low speed low timing accuracy. Each event tester module includes a tester board which is configured as an event based tester.