Patent EP-0155455-A1 (EP)
Inventor: BREDEMEIER-KLONKI VOLKER DIPL-
IPC: H03M5/02
Filed: 1985-01-22
Abstract: 1. Circuit arrangement for the coding of a digital input signal, the five-bit code words of which - being coded according to a first binary code - are translated into six-bit code words according to a second binary code with a positive and a negative mode, wherein the mode for the next five-bit code word to be coded (next mode, FM) of the input signal is determined in a mode selection computer (MR) during the evaluation (C) of the current five-bit code word, to be coded according to the import of the instantaneously present mode, of the input signal and wherein the translation takes place according to the following table : five-bit  six-bit mode+   next mode    mode- next mode 0        00000 50         110010 +    50    110010 - 1 00001 51         110011 -    33    100001 + 2        00010 54 110110 -    34    100010 + 3        00011 35         100011 +    35 100011 - 4        00100 53         110101 -    36    100100 + 5 00101 37         100101 +    37    100101 - 6        00110 38 100110 +    38    100110 - 7        00111 39         100111 -     7 000111 - 8        01000 43         101011 -    40    101000 + 9 01001 41         101001 +    41    101001 - 10       01010 42 101010 +    42    101010 - 11       01011 11         001011 +    11 001011 - 12       01100 44         101100 +    44    101100 - 13 01101 45         101101 -     5    000101 + 14       01110 46 101110 -     6    000110 + 15       01111 14         001110 +    14 001110 - 16       10000 49         110001 +    49    110001 - 17 10001 57         111001 -    17    010001 + 18       10010 58 111010 -    18    010010 + 19       10011 19         010011 +    19 010011 - 20       10100 52         110100 +    52    110100 - 21 10101  21        010101 +    21    010101 - 22       10110 22 010110 +    22    010110 - 23       10111 23         010111 -    20 010100 + 24       11000 56         111000 +    24    011000 + 25 11001 25         011001 +    25    011001 - 26       11010 26 011010 +    26    011010 - 27       11011 27         011011 -    10 001010 + 28       11100 28         011100 +    28    011100 - 29 11101 29         011101 -     9    001001 + 30       11110 30 011110 -    12    001100 + 31       11111 13         001101 +    13 001101 - ABCDE                     ABCDEF            ABCDEF wherein the last four bit places (B, C, D, E) of the five-bit code word are examined in the mode selection computer (MR) for the determination of the next mode (FM), wherein the next mode is produced through inversion of the instantaneous mode in the case of an odd number of binary ones in these bit places and the instantaneous mode is retained as next mode (FM) for the code words 11 and 20, for the code word 7 with the instantaneous negative mode and for the code word 24 with the instantaneous positive mode in the case of an even number of binary ones in these bit places (B, C, D, E), wherein the mode selection computer (MR) is characterized thereby, that an exclusive OR-member (EXOR 1) is provided, the four inputs of which are acted on by the last four bits (B, C, D, E) of the five-bit code word and the output of which is conducted to the one input of an AND-member (UND), that a second exclusive OR-member (EXOR 2) is provided, the one input of which is connected with the output of the AND-member and the other input of which is acted on by the instantaneous mode and assumes one of both the binary signals "0" or "1" according to positive or negative instantaneous mode, that a decoding circuit (Dec) is provided, the inputs of which are acted on by the bits (A, B, C, D, E) of the five-bit code word and by the instantaneous mode and the output (Y) of which produces a binary zero for the code words 11 and 20, for the code word 7 with the instantaneous negative mode and for the code word 24 with the instantaneous positive mode and is connected with the other input of the AND-member, and that the binary signal of the next mode (FM) is derivable at the output of the second exclusive OR-member (EXOR 2).