Patent GB-1361297-A (GB)
Title: Noise exposure computer and method
IPC: G01H3/14
Filed: 1972-01-14
Abstract: 1361297 Diode function generators; measuring exposure to noise MINNESOTA MINING & MFG CO 14 Jan 1972 [18 Jan 1971] 1971/72 Headings G4G and G4H [Also in Divisions H3-H5] Noise exposure as a percentage of a given maximum permissible exposure is computed by amplifying and frequency-weighting the output of a microphone, rectifying the weighted signals, applying the resulting voltage level to a variablegain amplifier having a non-linear input/output amplitude response, converting any resulting amplifier output signals above a threshold value to signals indicative of the duration of the associated noise levels divided by the maximum permissible durations of those levels, and obtaining from the converted signals an indication of the cumulative noise exposure experienced as a percentage of the maximum permissible exposure. In the embodiment shown, amplifier and frequency-weighting network circuits are detailed in Fig. 7a. Microphone 140 output drives an FET Q2 connected as a source follower. Transistor Q1 provides a constant current through the source 166. The base voltage for Q1 is defined by resistors R5, R6 connected between a supply line 136 and a reference voltage line 144. The source-follower output is fed via cable 132 to a negative-feedback op-amp A3. The frequencyweighting is provided by microphone capacitance 150, resistor R7, capacitors C4, C5 and resistors R10, R11. The regulated power supply of Fig. 7a comprises negative-feedback op-amps Al, A2. A reference voltage from pin 4 of Al is coupled to the non-inverting input of Al and, together with voltage divider R2, Ml defines the Al output voltage. D1 and C1 provide decoupling from current surges on line 102. A2 is connected as a voltage follower to give a reference voltage output on line 126. The frequency-weighted signals from A3 are rectified in the Fig. 7b circuit by passing them via phase-splitter Q3 to op-amps A4, A5, whose outputs are fed via diodes D2, D3 to a smoothing network R18, C10, R19 and are also fed back via D2 and D3 to the inverting inputs of A4 and A5. C8 and C9 prevent the op-amps from oscillating. A non-linear amplifier for emphasizing high values of the rectified signal (to take into account the reduction in maximum permitted exposure to personnel to noise as the noise level increases) comprises op-amp A6 with a resistor-diode network providing negative feedback. This network utilizes the varying slope resistance of the diode characteristics to increase the amplifier gain as the input voltage on pin 3 of A6 increases, and is calibrated to give a 6 db output change from A6 for a 5 db input change to A6. In Fig. 7c the (D.C.) output voltage of the non-linear amplifier A6 is compared in op-amp A7 with a threshold value (representing, e.g. a noise level of 90 db) and if it is below the threshold value a transistor Q4 is turned on by the A7 output voltage, thereby clipping by shunting to ground the A6 output voltage. If the A6 output voltage is above the threshold, it passes to a voltage-to-frequency converter comprising op-amp A8 connected as an integrator, op-amp A9 connected as a voltage comparator, and an integrator reset switching transistor Q5. The integrator output commences as a negative-going ramp voltage of slope proportional to the integrator input voltage received from A6. When this ramp reaches a reference voltage across resistor R29, as sensed by A9, Q5 is turned on and is held on (by virtue of positive feedback via R29 to the input of A9) until the integrator has been reset by discharge of the integrator capacitor, Cl2, through Q5. The ramp is then re-generated, and thus recurs with a frequency proportional to the A6 output voltage. Output pulses at this frequency are taken from across R29 and fed to a switching circuit, Fig. 7d, for driving a digital counter 432. These output pulses are frequencydivided at 402 in a binary divider whose output pulse positive-going edges each turn on transistor Q6 to charge capacitor C14 via D11 and Q6. When C14 has been charged, subsequent turnoff of Q6 by a negative-going pulse edge from divider 402 raises the potential of anode 424 of a programmable unijunction transistor Q7 above the potential on anode gate 426 of Q7, whereby Q7 conducts to discharge C14 and trip counter 432. Counter 432 displays the cumulative noise exposure in terms of per cent, and tenths of a per cent, of the permissible exposure.