Patent GB-1000382-A (GB)
Title: Semiconductor devices and methods of manufacture thereof
IPC: H01L21/205
Filed: 1963-06-06
Abstract: 1,000,382. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORPORATION. June 6, 1963 [June 18, 1962], No. 22663/63. Drawings to Specification. Heading H1K. A semi-conductor device comprises a high resistivity layer or body containing an aperture with heavily doped layers of opposite conductivity type material overlying opposite ends of the aperture, at least one of the layers extending into the aperture to form a PN tunnel junction with the other. A plurality of such devices may be made by forming conical or pyramidal pits in one face of a highly resistive (10<SP>8</SP> ohm. cm.) gallium arsenide wafer, vapour depositing heavily doped N-type germanium on the pitted face, lapping or etching the opposite face of the wafer to expose the N+ germanium at the bottoms of the pits and then depositing heavily doped germanium thereon to form an array of tunnel junctions with the exposed N + germanium. The array may, if desired, be split up into individual elements. To obtain better control over the tunnel junction area cylindrical apertures extending from the pit bottoms to the opposite wafer face are first formed from the opposite face by a photoresist masking and etching technique, by electron or laser beams, sandblasting or sparking. Then P + germanium is deposited on the pitted face to fill the apertures. After preferentially electrolytically etching back the P + material from the opposite face into the apertures N+ germanium is deposited on that face to form the junctions. In a modification of this method N germanium is deposited into the pits and where exposed through the apertures converted to N+ type by arsenic diffusion prior to deposition of P + germanium on the unpitted face. In each case one or both germanium layers may be replaced by gallium arsenide and the highly resistive wafer may alternatively be of zinc selenide. In one example of this, using P + gallium arsenide in the pits, the junctions are formed by alloying to the exposed P + material on the opposite face of the wafer. In another method the pits are replaced by parallel grooves and the heavily doped material deposited at the bases of the grooves exposed by cutting an intersecting set of parallel grooves in the opposite wafer face. Subsequently semi-conductor material is deposited in these grooves to form tunnel junctions at groove intersections. The junctions are interconnected either by continuing the deposition to fill the grooves with degenerate material or by providing metal layers over the deposited semiconductor. It is also suggested to design the tunnel diodes to have peak currents above the required level and to reduce the peak current by heat treatment. Finally devices may be formed by vapour depositing a layer of insulating gallium arsenide on one face of a degenerate P-type germanium wafer, forming small apertures in the layer and depositing degenerate N-type germanium over the layer to form junctions in the apertures. In this case the apertures are formed by etching through holes in a wax coating over the layer. Each hole is formed by pressing a metal point into the wax to substantially penetrate it, withdrawing it slightly, and then passing a high voltage discharge between it and the wafer to vaporize the wax under the point.