baber/WOPTO huggingface dataset:
Patent TW-583058-B (TW)
Title: Two-leg walking type man-style robot
Inventor: FURUTA TAKAYUKI
IPC: B62D57/032
Filed: 2002-11-19
Granted: 2004-04-11
Abstract: A two-leg walking type man-style robot 10 has a trunk (11), legs (12L, 12R), arms (13L, 13R), head (14), driving devices (11d, 11e; 18L, 18R-24L, 24R; 28L, 28R-33L, 33R; 35, 36) for causing knuckles of the trunk, legs, arms, and head to pivot, and a behavior control device (50) for respectively driving and controlling these driving devices. The behavior control device (50) includes force sensors (40) respectively installed on the part which protrudes when the part moves or which comes in contact with the environment, and a compensation device (54) which detects the attitude of the robot according the output signals of each one of the force sensors (40) to correct the behavior data from the movement generating device (52). With this arrangement the two-leg walking type man style robot is capable of accurately performing a stable movement of the entire body such as protecting action in a fall-down movement, getting up movement or forward rolling movement etc.
Patent TW-I264144-B (TW)
Title: Panel antenna and the method for installing the same
Inventor: LIN HSIEN-CHU
IPC: G06F1/18
Filed: 2002-12-10
Granted: 2006-10-11
Abstract: A panel antenna and the method for installing the same. The panel antenna is mounted on an electronic device. The electronic device comprises a shell, and at least an expansion slot opened in the surface of the shell. The panel antenna comprises a panel, an antenna body, a cable and a connector. Wherein the panel antenna is received in the expansion slot, and the antenna body is mounted on the panel. The installing method includes the following steps: connecting the connector of the panel antenna to a corresponding connector of the electronic device; mounting the antenna body on the panel; mounting the panel on the opening of the expansion slot and receiving the panel antenna therein.
Patent TW-583598-B (TW)
Title: Method and system to make the motion blur effect for animation image
Inventor: LEE REN-LONG
IPC: G06T15/00
Filed: 2002-12-18
Granted: 2004-04-11
Abstract: A method and system to make the motion blur effect for animation image are disclosed, which employs the way of stencil buffer. It comprises the following basic steps: computing the bounding box of dynamic object; computing the bounding rectangle of the dynamic object on the projection plane; drawing the other objects except the object to have the dynamic blur effect in the scenery; determining if the number of dynamic object images exceeds the preset threshold value in the stencil buffer; setting the index value of the dynamic object; storing the related information of the dynamic object into the queue; duplicating the image generated by the dynamic object; setting the Z-buffer to be in the accessible state.
Patent TW-I247328-B (TW)
Title: Method for grabbing spacers using inductive procedures
Inventor: LIN WEI-YI
IPC: H01J31/12
Filed: 2002-12-19
Granted: 2006-01-11
Abstract: The present invention relates to a method for grabbing spacers using an inductive procedure, which uses a chuck to proceed the inductive procedure to pick field emission display (FED) spacers by inductive forces, wherein the spacers are provided with adsorbable structures and compositions. The spacers grabbing by the chuck are put on a desired location. An inductive procedure refers to a process using a non-contact force (force at a distance), including electrostatic and magnetic force.
Patent TW-I281992-B (TW)
Title: Method of preventing light guide plate from being distorted
Inventor: SUNG CHANG-CHIH
IPC: B05D7/04
Filed: 2002-12-20
Granted: 2007-06-01
Abstract: The present invention relates to a method of preventing the light guide plate from being distorted. The method includes steps of pasting a protective film on each of two surfaces of the light guide plate and forming a macromolecule film on the surface of the light guide plate which is not to be processed.
Patent TW-I287583-B (TW)
Title: Method for the pyrometallurgical treatment of metals, metal melts and/or slags and injection device
Inventor: MEYN MATTHIAS
IPC: C21C5/46
Filed: 2003-01-14
Granted: 2007-10-01
Abstract: In the metallurgical treatment of metals, metal melts and/or slags in a metallurgical unit or melting vessel, especially in electric arc furnaces, injection devices (1) are used for blowing in or up oxygen-rich gases (6) and/or carbonaceous substances. The injection devices cause a gas jet (6') to strike the surface of the slag or metal with as long a jet as possible and at a high pulse energy. It is known from the art to encase the produced gas jet (6'), thereby focusing it. According to the inventive method, such an encasement is obtained by using a hot gas (5, 5') that is preaccelerated to such a degree that the central gas jet (6') is preferably encased without pulse losses.
Patent TW-579562-B (TW)
Title: Surface pressure distribution sensing system of the processed object and the method thereof
Inventor: CHEN JR-KUEN
IPC: H01L21/66
Filed: 2003-02-18
Granted: 2004-03-11
Abstract: A surface pressure distribution sensing system of the processed object and the method thereof are disclosed, wherein a surface pressure distribution sensing system of the processed object is used to simulate the material state after the CMP equipment removes the wafer surface, so as to find the pressure distribution on the wafer surface, and further to adjust the parameters of semiconductor manufacturing process based on it. Also, by outputting the result in the way of plot or data, the pressure distribution on the wafer surface can be more accurately known.
Patent TW-I258941-B (TW)
Title: Method and system for computing the optimal slot to cell assignment in cellular systems employing time division duplex
Inventor: MARINIER PAUL
IPC: H04W16/10
Filed: 2003-05-13
Granted: 2006-07-21
Abstract: A system and method to optimize the number of uplink and downlink slots, given the maximum number of crossed slots between any two cells is disclosed. The present invention effectively assigns a direction (i.e. uplink or downlink) to every slot in every cell of the system, taking into account the trade-off between: (a) avoiding base-to-base or mobile-to-mobile interference; and (b) matching the slot assignment of every cell as closely as possible to the local traffic conditions. The present invention assigns users to slots according to their transmission power requirements in order to allow conflicting slot-to-cell assignments between two cells in the same geographic region.
Patent TW-591763-B (TW)
Title: Scalable dual-bit floating-gate flash cell structure and its contactless flash memory arrays
Inventor: WU CHING-YUAN
IPC: H01L21/8247
Filed: 2003-05-20
Granted: 2004-06-11
Abstract: A scalable dual-bit floating-gate flash cell structure comprises a gate region being formed between common-source/drain regions, wherein the gate region comprises a pair of scalable floating-gate conductive islands with a pair of intergate dielectric layers being formed on their top surfaces and a pair of poly-oxide layers being formed over their inner sidewalls, a gate dielectric layer being formed between the pair of scalable floating-gate islands and on a middle portion of a semiconductor substrate, an implant region being formed under the gate dielectric layer, and a planarized control-gate conductive island being formed on the pair of intergate dielectric layers and the gate dielectric layer. The common-source/drain region comprises a common-source/drain diffusion region or a pair of buried source/drain diffusion regions. Based on common/buried source/drain diffusion region, two contactless flash memory arrays are disclosed.
Patent TW-I221439-B (TW)
Title: Punching/deforming tool for a strapping unit
Inventor: FINZO FLAVIO
IPC: B65B13/30
Filed: 2003-05-22
Granted: 2004-10-01
Abstract: Using a punching tool for a strapping unit for producing an auxiliary-free connection of ends of a strapping band, the tool having a recess of different widths, in the case of which at least one section of a recess-bounding wall is provided with a rounded portion in the region of at least one change in width, on the one hand, the intention is to make a fixed closure between the band ends possible. On the other hand, the intention is for this tool to be produced as easily and cost-effectively as possible and, in addition, for uniform cutting forces to be made possible. For this purpose, it is proposed that the rounded portion is of circle-arc shape with a certain radius, and that the largest width of the recess is equal to or less than four times the radius of the wall.
Patent TW-I236991-B (TW)
Title: Server to display train status of dynamic train information and method thereof
Inventor: YANG JR-MING
IPC: B61L27/04
Filed: 2003-05-30
Granted: 2005-08-01
Abstract: The invention provides a server used to display train status and method thereof, in which the train status server is used in a train control system. The train control system additionally contains an operation control host system and at least a terminal system. The operation control host system is used to provide train information to the train status server and the train status server utilizes the train information to integrate as dynamic train information. The train status server goes through the Internet to synchronously transmit the dynamic train information to the terminal system.
Patent TW-I223377-B (TW)
Title: Method for isolating the active area of a memory cell with partial vertical channel
Inventor: CHANG MING-CHENG
IPC: H01L21/76
Filed: 2003-06-02
Granted: 2004-11-01
Abstract: A method for isolating the active area of a memory cell with partial vertical channel is provided. First, provide a semiconductor substrate that contains two deep trenches. In each deep trench, a deep trench capacitor is formed and the capacitor is below the substrate surface. Second, form a protruding column type active area between the deep trenches, and conduct ion implantation process on the bottom corner of the exposed active area to form ion doped areas that are as source/drain areas. Third, sequentially form a gate dielectric layer and a conduction layer on the active area surface. The conduction layer is used to be a vertical gate. Form a dielectric layer on the substrate to isolate the other active area. The height of the said dielectric layer is equal to the top of the vertical gate.
Patent TW-I228466-B (TW)
Title: A foldable pushchair for babies
Inventor: JANE SANTAMARIA MANUEL
IPC: B62B9/12
Filed: 2003-07-15
Granted: 2005-03-01
Abstract: This pushchair for babies comprises two back wheels and a central front wheel being a castoring wheel, and is characterized in that a footrest is linked in a pin-jointed connection to the lower portion of the converging front legs, the castoring wheel being fitted to the front end of said footrest, this latter being provided with means being apt to lock it in its position when in use and allowing to fold it. This footrest does also comprise means allowing to lock and unlock the castoring support supporting the castoring wheel, this latter being provided with braking means.
Patent TW-I231328-B (TW)
Title: Sewing machine capable of displaying sewn pattern
Inventor: ORII AKIRA
IPC: D05B19/10
Filed: 2003-10-06
Granted: 2005-04-21
Abstract: A model (pattern) selected in a model selection/combination device 3 by a user is displayed in a display device 8. When a model is combined or altered in a model selection/combination device 3, a model processed by a depiction processing device 7 also is displayed in a display device 8. The model data will be recorded in a memory device 50 of sewing model data, a sewing mechanism 51 performs a sewing operation according to the data stored in the memory device 50 of sewing model data and produces a sewn pattern.
Patent TW-I277585-B (TW)
Title: Forgery-preventing packing structure and manufacturing method thereof
Inventor: LIN WEN
IPC: B65D65/38
Filed: 2003-10-14
Granted: 2007-04-01
Abstract: The present invention, regarding a forgery-preventing packing structure and manufacturing method thereof, is first to form a base net layer, constituted by base net strings. There are the same distances between those adjoining base net strings. After those literal and graphic net layers are formed on the base net layer, such literal and graphic net layers are laminated with the base net layer. Literal and graphic net strings are used for those literal and graphic net layers to form characters and graphs. The distances between those adjoining literal and graphic net strings are the same as the ones of those adjoining base net strings, but their angles of inclination are not. Next, those synthetic graphs net layers are exposed on a printed board. Finally, the synthetic graphs can be printed on the surface of the labeled article by the printed board. Also, the surface of the packing thing is formed a base net layer. Therefore, the base net layer on the packing thing is alternately overlapped those synthetic graphs net layers of the article, when the article is packed by the packing thing, to show characters and graphs, such that the forgery-preventing label can be achieved.
Patent TW-I244396-B (TW)
Title: A composition for topical application of methylphenidate and a pharmaceutical composition for treating attention deficit disorder and attention deficit/hyperactivity disorder
Inventor: MANTELLE JUAN
IPC: A61K47/36
Filed: 1998-12-14
Granted: 2005-12-01
Abstract: The invention relates to a method of treating attention deficit disorder (ADD) and attention deficit/hyperactivity disorder (ADHD) and compositions for topical application of methylphenidate comprising methylphenidate in a flexible, finite system, wherein the methylphenidate is present in an amount sufficient to achieve substantially zero order kinetics for delivery to the skin or mucosa of a patient in need thereof over a period of time at least 10 hours.
Patent TW-I274378-B (TW)
Title: Boron phosphide-based compound semiconductor device, production method thereof and light-emitting diode
Inventor: UDAGAWA TAKASHI
IPC: H01L29/205
Filed: 2003-11-24
Granted: 2007-02-21
Abstract: A boron phosphide-based semiconductor device having a junction structure of a group-III nitride semiconductor layer and a boron phosphide layer with excellent device properties is provided. The boron phosphide-based compound semiconductor device has a heterojunction structure comprising a group-III nitride semiconductor layer and a boron phosphide layer, in which the surface of the group-III nitride semiconductor layer has (0.0.0.1.) crystal plane, and the boron phosphide layer is a {111}-boron phosphide layer having a {111} crystal plane stacked on the (0.0.0.1.) crystal plane of the group-III nitride semiconductor layer in parallel to the (0.0.0.1.) crystal plane.
Patent TW-I253014-B (TW)
Title: Architecture for sharing application programs between operation systems with power-saving effect and method thereof
Inventor: LIU CHI-MIN
IPC: G06F12/00
Filed: 2004-02-10
Granted: 2006-04-11
Abstract: The present invention relates to an architecture for sharing application programs between operation systems with power-saving effect and a method thereof, wherein a first operation system simultaneously handles the execution of a plurality of programs; a second operation system is stored in a compressed form in a second storage device; and a virtual disk drive is formed by partitioning a portion of a memory to simulate a disk drive device. After booting up with a basic input/output system, the second operation system is de-compressed and loaded in and installed in the virtual disk drive for the execution of the second operation system, which share at least a data and a multi-medium play-back program of the first operation system through a data processing procedure whereby the second storage device is put in an idle condition and power saving is thus effected through reduced access to the disk drive and speed up processing.
Patent TW-I287639-B (TW)
Title: A distributed operating system for a semiconductor test system for testing at least one device under test
Inventor: PRAMANICK ANKAN
IPC: G01R31/319
Filed: 2004-02-13
Granted: 2007-10-01
Abstract: A distributed operating system for a semiconductor test system, such as automated test equipment (ATE), is described. The operating system includes a host operating system for enabling control of one or more site controllers by a system controller. One or more local operating systems, each associated with a site controller, enable control of one or more test modules by an associated site controller. Each test module performs testing on a corresponding device-under-test at a test site.
Patent TW-I282239-B (TW)
Title: Hybrid latch flip-flop
Inventor: HSIEH TSAU-HUA
IPC: H04N1/40
Filed: 2004-03-09
Granted: 2007-06-01
Abstract: Present invention is related to a negative pulse triggered hybrid latch flip-flop which is applied to LCD. The negative pulse triggered hybrid latch flip-flop includes a negative pulse generation unit, a hybrid latch flip-flop and a buffer unit. The hybrid latch flip-flop further includes a data sampling unit and a data maintain unit. One feature of the present invention is that fewer number of transistors is employed in the negative pulse triggered hybrid latch flip-flop which gives rise to a low power consumption. Another feature of the present invention is that, by employing the negative pulse generation unit of a double edges triggered type, the data processing capacity of the hybrid latch flip-flop of the present invention may be doubled without changing the clock frequency.
Patent TW-I250578-B (TW)
Title: Semiconductor device and manufacturing method therefor
Inventor: AOYAMA TOMONORI
IPC: H01L21/318
Filed: 2004-03-23
Granted: 2006-03-01
Abstract: A semiconductor device comprises a first insulating film on a silicon substrate and a second insulating film on the first insulating film. The first insulating film is a silicon oxide film having a film thickness of 1 nm or less and a suboxide content of 30% or less. The second insulating film is a high dielectric constant insulating film.
Patent TW-I244127-B (TW)
Title: Self-aligned contact for SOI device
Inventor: YANG FU-LIANG
IPC: H01L29/786
Filed: 2004-04-01
Granted: 2005-11-21
Abstract: An advanced MOS transistor structure is provided. The advanced MOS transistor comprises ultra-thin body transistor and multi-gates transistor. The transistor comprises a source and a drain separated by a gate stack. A contact spacer is provided on the sides of the gate stack. A passivation layer covers all the feature of the transistor. A contact in the passivation layer and is in contact with a portion of the contact spacer and a portion of the source/drain. The method for forming the contact is forming the contact spacer first. Then the passivation layer is deposited on the transistor. A contact hole is formed in the passivation layer by etching process. A contact is formed in the contact hole by filling a conductive material.
Patent TW-I228310-B (TW)
Title: Manufacture method of stacked semiconductor device
Inventor: YAO WU-CHIANG
IPC: H01L23/50
Filed: 2004-05-06
Granted: 2005-02-21
Abstract: A manufacture method of stacked semiconductor device includes steps of: (a) providing a predetermined conductor pattern and a cavity placed on to a substrate disposed a temporary substrate at a side thereof; (b) disposing a first die into the cavity of the substrate, attaching on the temporary substrate, and utilizing gold wire to electrically connect the first die with the conductor pattern; (c) stacking a second die on the first die and utilizing gold wire to electrically connect the first die with the conductor pattern; (d) disposing an isolation layer on the substrate and in the cavity to wrapping up the first and the second dies; and (e) removing the temporary substrate.
Patent TW-I272204-B (TW)
Title: Under-seat structure for a motorcycle
Inventor: OGAWA MASAO
IPC: B62J9/00
Filed: 2004-05-13
Granted: 2007-02-01
Abstract: A motorcycle with a seat frame and seat attached to a seat post. The seat frame is covered with the seat as viewed from above and is structured so as to hold an article in an exposed state thereon to form an article accommodating space below the seat. The rear wheel of the motorcycle is driven by a motor to which power is supplied from a battery. The voltage of the battery is converted by a charging and voltage conversion section to supply power to electrical equipment. The charging and voltage conversion section is attached in an exposed state to a vehicle body frame. A battery for supplying power to a motor is provided with a charging and voltage conversion apparatus for charging the battery. A charging cable for energizing the charging and voltage conversion apparatus is disposed in a hollow portion of a vehicle body frame.
Patent TW-I272509-B (TW)
Title: Dynamic object storage-access system and method
Inventor: HU SHIOU-HUA
Filed: 2004-05-19
Granted: 2007-02-01
Abstract: The invention provides a dynamic object storage-access system comprising a database and an object storage module and a data index module. The database comprises an object table and an index table. The object table comprises a plurality of attribute name fields, a plurality of attribute value fields and a plural of dynamic attribute value fields. The object table records a plurality of predetermined objects. The attribute name fields are used to record a plurality of predetermined attribute names respectively. Each attribute value field is used to record a predetermined attribute value corresponding to a predetermined attribute name with respect to one of the predetermined objects. Each dynamic attribute value field is used to record a dynamic attribute value with respect to one of the plural of predetermined objects. The index table is used to record an index data corresponding to each of the plural of dynamic attribute value in the plural of dynamic attribute value field. The object storage module is connected to the database for performing a dynamic object storage process on one of a plurality of predetermined objects according to XML, and refresh simultaneously the index data in the index table. The data access module is connected to the database for accessing the database according to a quick-searching rule.
Patent TW-I272535-B (TW)
Title: Computer system, method for performing a boot sequence, and machine-accessible medium
Inventor: CHEN LECHONG
IPC: G06F9/445
Filed: 2004-06-18
Granted: 2007-02-01
Abstract: Parallel execution of peripheral drivers on a multi-processor and/or hyper-threading enabled processor is described. According to one embodiment of the invention, two peripheral drivers are executed concurrently during a boot sequence. These peripheral drivers are executed on a first and a second processor. The processors may be logical or physical processors.
Patent TW-I250837-B (TW)
Title: Grounding element
Inventor: TSUO CHUN-JUNG
IPC: H05K7/00
Filed: 2004-09-15
Granted: 2006-03-01
Abstract: A grounding element installed on a tab having a hole. The grounding element comprises a bottom, a spring portion connected to one side of the bottom and a latching portion connected to another side of the bottom. When the grounding element is installed on the tab, the spring portion and the latching portion hold edges of the tab.
Patent TW-I263199-B (TW)
Title: Load-adjusted scheduling method and system for speech recognition
Inventor: HSU JYH-SHING
IPC: G10L15/22
Filed: 2004-09-21
Granted: 2006-10-01
Abstract: The present invention provides a load-adjusted scheduling method and system for speech recognition, in which the number of channels waiting for speech recognition is employed as the parameter of system load, so as to reduce the number of channels entering the system for speech recognition by adjusting the ringing time, decrease the number of channels using the speech recognizer by selecting a prompt with a suitable length, and reduce the required memory by selecting only one channel for speech recognition. Therefore, it is able to provide more available channels with one machine platform while the user does not feel that the waiting time is increased as the number of channels is increased.