Patent GB-1359358-A (GB)
Title: Digital information transmission systems
IPC: H04J3/06
Filed: 1971-10-04
Abstract: 1359358 Multiplex pulse code signalling SIEMENS AG 4 Oct 1971 [19 Oct 1970] 46029/71 Heading H4L Means are provided for combining a plurality of asynchronous pulse trains from primary t.d.m. systems ZMS1 to ZMS4, by the use of "pulse stuffing", into a secondary t.d.m. system ZMS5 and for recovering the bit frequencies of the respective primary systems at the receiver ZMS5<SP>1</SP>. As described, the primary systems provide thirty-two channels each and have bit frequencies of f 11  to f 14  respectively, which differ slightly from the mean bit frequency f 10 . A secondary pulse frame UR, Fig. 2, consists of ten primary pulse frames GR each comprising 264 bits. The first eight bits of each primary frame form either a block M for synchronizing the frame UR, a block A for synchronizing the primary frames, or a block B 1  to B 5  containing the pulse stuffing information. In each primary frame the 256 information bits J 1 , J 2 , J 3 , J 4  of the four primary systems are interleaved as indicated and the stuffing information bits P are interleaved as shown in blocks B 1 , B 5 , the first subscript indicating to which primary system the bit belongs and the second subscript indicating to which primary frame it belongs. If the four primary systems are operating at the average bit frequency f 10  all the intelligence signals can be transmitted in the frame UR, and a code word indicating this synchronism is transmitted in the blocks B 1  to B 5 . If a primary system is operating at a frequency below f 10 , i.e. has a negative pulse train deviation, this is notified in the corresponding B channel by another codeword and at intervals at one of the bit positions assigned to the primary system in the secondary frame an additional bit (a negative stuffing pulse) is transmitted. In the case of a positive deviation, i.e. the primary system is operating at a frequency above f 10 , one information bit is omitted from the information bits transmitted in frame UR but instead is transmitted in the associated B channel in place of one of the stuffing information bits, the other bits of the B channel signalling this transmission. This is said to be the addition of a positive stuffing pulse. At the receiver, the synchronizing, stuffing and information bits arranged in blocks are distributed uniformly to the respective systems ZMS1<SP>1</SP> to ZMS4<SP>1</SP> by means of an eight-bit shift register and a rotary sampling switch. Receiving station details.-Each system has a device as shown in Fig. 4 to recover the bit frequencies f 11  &c., each device obtaining from the demultiplexer DM the bit sequence appropriate to the corresponding system. Fig. 4 relates to the first primary system. The bits P define one of three codewords denoting whether f 11  is greater than, equal to, or less than f 10  at the transmitting end and the bit frequency f 11  is recovered by using a fixed frequency f s  where f s  = “f M  - f 10  and f M  is the bit frequency of the secondary t.d.m. system. The information bits are then passed to the station ZMS1<SP>1</SP> at the frequency f 11 . If f 11  is less than f 10  a "filling frequency" of f s +#f 1  is obtained, if f 11  is equal to f 10  the "filling frequency" is f s  and if f 11  is greater than f 10  the "filling frequency" is f s  - #f 1 . A stuffing information analyser SA determines whether positive or negative stuffing pulses are present and supplies this information to a device IE for stepping out or interleaving pulses which produces the "filling frequency" f s Œ#f 1 . An oscillator O1 derives the bit frequency f M  from the bit stream UR and this is reduced to frequency f s  in the divider FT1 and used to control the devices SA, IE. The frequency f M  is divided by four at FT2, “f M  being equal to f 10 +f s . A main oscillator 02 generates the desired frequency f 11  = f 10  Œ #f 1  and this is mixed at M1 with the output of divider FT2. The tresultant f s Œ#f 1  is filtered at TP1 and mixed a M2 with the output of device IE, any difference signal being supplied via filter TP2 to control the oscillator 02.