baber/WOPTO huggingface dataset:
Patent TW-272309-B (TW)
Title: Isolation method with LPD oxide
Inventor: LU HUOO-TIEE
IPC: H01L21/76
Filed: 1994-03-14
Granted: 1996-03-11
Abstract: An isolation method with LPD oxide comprises the steps of: growing the first SiO2 layer on one silicon substrate; depositing one Si3N4 layer on the first SiO2; forming some trenches by lithography on silicon substrate; implanting impurity so as to form channel stop on the trench bottom; growing the second SiO2 layer; removing Si3N4 and SiO2 of trench outside so as that only trench inside has SiO2 on whole substrate; filling the trench with SiO2 with liquid phase deposition; concentrating SiO2 in the trench to get better product reliability; performing chemical vapor deposition and etchback to fill up the gap generated from the concentrated SiO2, making the trench surface more flat.
Patent TW-275732-B (TW)
Title: Pager signal synchronization control device(revision)
Inventor: CHEN JYH-MING
IPC: H04L29/02
Filed: 1994-09-13
Granted: 1996-05-11
Abstract: A pager signal synchronization control device comprises: one magnification frequency sampling circuit composed of counter, whose timing end and data input end are individually connected to sample frequency signal and input signal, performing sampling to input signal with one even magnification sampling frequency, and sending one sampled value signal through output end; one adjustable signal bit generating circuit connected to magnification frequency sampling circuit output end comprises: one sampling point counter composed of counter, connected to output end of magnification frequency sampling circuit to perform accumulation count to sampled value; one high/low bit output judgment circuit composed of comparator, connected with output end of sample point counter, sending bit output signal on the state of high/low bit with the maximum value; one adjustable sample point setting circuit composed of counter, connected with output end of the above magnification frequency sampling circuit, according to set sample point judging if input signal is chanted and detecting period length, on the condition that input signal has changed and sample value is in set range or input range has not changed and sample value is out of range, sending clock signal, and in the meantime sending signal to trigger the following preset sampling circuit, and ignoring the other states; preset sampling point circuit composed buffer and logic gate, for receiving trigger signal of adjustable sample point setting circuit, if input signal has changed and sample value is in preset range, then sending one sample point to sample point counter and adjustable sample point setting circuit, if input signal has not changed and sample value is out of preset range, then sending two sample points to sample point counter and adjustable sample point setting circuit so as to dynamically change sampling method; one clock adjusting circuit composed of counter and logic gate, connected with clock signal output end adjustable sample point setting circuit, when adjustable sample point setting circuit outputs any one clock signal, then sending one synchronous clock signal corresponding to bit signal output timing; With sample point set as judgment basis comparing input signal sample values, and whether in or out of set range, accumulating sample value to synthesize bit signal and synchronous clock signal to eliminate transmission channel noise and prevent signal from floating.
Patent TW-402502-B (TW)
Title: A galactolipid-comprising lipid-polar solvent bilayer preparations
Inventor: CARLSSON ANDERS
IPC: A23L35/00
Filed: 1995-02-13
Granted: 2000-08-21
Abstract: A galactolipid-comprising lipid-polar solvent bilayer preparation consisting of 0.01-60% by weight of a bilayer forming material in a polar solvent such as water, ethanol, 1-propanol, 1, 2-propane-diol, glycerol and mixtures thereof, characterized in that the bilayer forming material is a galactolipid material from cereals consisting of 50-100% digalactosyldiacylglycerols, and 0-50% other polar lipids.
Patent TW-291431-B (TW)
IPC: A01N3/00
Filed: 1995-05-29
Granted: 1996-11-21
Abstract: An agent for preserving the freshness of plants containing 2''-O-glucosylisovitexin as an effective ingredient is disclosed. This agent is excellent in an effect of preserving the freshness of cut flowers and potted plants, and, moreover, is safe and has no problem of the pollution of the environment.
Patent TW-277144-B (TW)
Title: Making method of photoresist imaging with anti-reflection coating
Inventor: SHIAH LIANG-JIUH
IPC: H01L21/31
Filed: 1995-05-31
Granted: 1996-06-01
Abstract: A making method of photoresist imaging with anti-reflection coating comprises the steps of: covering one anti-reflection coating on one metal layer or metal polycide; forming one photoresist on anti-reflection coating; after being exposed and developed forming photoresist pattern as etching mask of later metal layer or metal polycide; It features that the anti-reflection coating material including CrO/CrOx is formed by reactive sputtering method.
Patent TW-269080-B (TW)
Title: Infrared rays receiver
Inventor: SHINDO SHIRO
IPC: H04B10/50
Filed: 1995-07-12
Granted: 1996-01-21
Abstract: This invention provides one light receiving device which can receive light signal in high sensitivity. On the wiring pattern of circuit substrate 20 surface, in which it has been formed 4 chipped pin hold diode PD1-4 setting inside with silver pasted and solidified alone with electric connecting. To connect pin hold diode PD1-4 surface and the others wiring pattern 16 of closely wired with wire bonding method, also to have wiring pattern go through condenser C5, C7 to connect in short distance with field effect transistors FET 1 and FET 2 gate closely. Besides, it will set up one frame 24 to surround pin hold diode PD1-4 and fill in resin of good penetratability infrared to make it solidified.
Patent TW-350926-B (TW)
Title: LCD base plate
Inventor: NATORI MASATAKA
IPC: G02F1/1345
Filed: 1995-08-11
Granted: 1999-01-21
Abstract: A sort of LCD base plate, being a transparent base plate with a symmetrical layout of LCD, on one side of which, a port line group is formed in extension in the direction of X and in parallel in the direction of Y and the drawing group in extension of the Y direction of the port group and in parallel with the X direction, while at then same time outside the intersection of said port group and drawing group the port scanning driving circuit for all the port lines, having, on the transparent base plate which would be abandoned in the following manufacturing and for its carrying next to said display are and in the area opposite to the port scanning driving circuit, forming a common port wire for common connection of said port line groups.
Patent TW-305746-B (TW)
Title: Device for making ball-type dough
Inventor: TSAY SHYR-JUH
IPC: A21C1/00
Filed: 1995-10-16
Granted: 1997-05-21
Abstract: A device for making ball-type dough having at least one upper moving element and one lower moving element, which can move continuously in a cycle at different directions and by different speeds, to roll and move dough to the outlet, in which a part of the upper moving element and of the lower moving element are constrained in a round tube.
Patent TW-358943-B (TW)
Title: Non-contact IC card, the manufacturing method and the device
Inventor: MURASAWA YASUHIRO
IPC: G06K19/077
Filed: 1995-12-26
Granted: 1999-05-21
Abstract: A non-contact IC card, including: a resin film having an IC card cover; a circuit diagram, having a transmission diagram on the other side of the film; electronic parts on the diagram device; and an electric insulation plastic material on the other side of the film with the plasticity fully wrapped by the circuit diagram device and the electronic parts.
Patent TW-356611-B (TW)
Title: Phasing radioactive antenna
Inventor: YAMAHOTO KIYOSHI
IPC: H01Q1/36
Filed: 1996-03-09
Granted: 1999-04-21
Abstract: A kind of phasing radioactive antenna, it characterized in: having rectangular frame antenna component (3), the rectangular frame antenna component (3) is the ratio of lengths of short side(1) and long side (2) is 1:2 ~ 1:6, setting up the length of the long side (2) to applying length of 1/2 of wavelength and the length similar to length of wavelength, from the ends on each long sides (2, 2) up to a location having a total distance about 1/3 ~ 1/8, regarding each long side (2, 2) installing two summing two pairs of electric etching points (4, 4, 4, 4).
Patent TW-298671-B (TW)
Title: Wire bonding method and device thereof
Inventor: SASANO TOSHIAKI
IPC: B23K20/00
Filed: 1996-04-15
Granted: 1997-02-21
Abstract: A wire bonding method, which connects die electrode with leadframe lead by wire, has the feature that, when registering coordinate of fixed point for calibration, and registering bonding point coordinate afterwards, first registering image of electrode or lead captured by video camera, then when implementing verification and correction of bonding point coordinate, displaying registered image on TV screen.
Patent TW-304304-B (TW)
Title: The MOSFET performance and reliability reinforce method
Inventor: SHY JIAW-REN
IPC: H01L27/105
Filed: 1996-04-23
Granted: 1997-05-01
Abstract: A MOSFET performance and reliability reinforce method used for manufacturing MOSFET with lightly doped source/drain on substrate. This method includes following steps: Form field oxide on substrate; Form gate oxide on the area of substrate which is uncovered by field oxide;Deposit polysilicon layer on gate oxide and field oxide area; Proceed dopant on polysilicon layer; Deposit metal silicide on polysilicon layer; Form polysilicon gate structure by forming metal silicide and polysiliconlayer; Implant 1st conductive implantation agent into the area of substrate whichis uncovered by field oxide or polysilicon gate structure; Implant 2nd conductive implantation agent into the area of substrate which is uncovered by field oxide or polysilicon gate structure; Anneal substrate to form SiO2 layer on exposure surface of polysilicon gate structure; Deposit 1st insulated layer; Proceed anisotropic etching on 1st insulated layer to form insulated spacer on polysilicon gate structure; Implant 3rd conductive implantation agent into the area of substrate which is uncovered by field oxide, polysilicon gate structure or insulated spacer;Form 2nd insulated layer on substrate, polysilicon gate structure, insulated spacer and gate oxide; Form connecting point hole of specified area inside 2nd insulated layer till polysilicon structure and substrate; Provide metal connecting point and connection to polysilicon gate structure and specified area of substrate.
Patent TW-294751-B (TW)
Title: Concrete form deformation preventing member and method for assembling concrete form using the same
Inventor: HAYAKAWA YOSHIYUKI
IPC: E04G11/12
Filed: 1996-04-26
Granted: 1997-01-01
Abstract: Deformation of form panels is prevented without increasing material and cost while maintaining efficiency in assembling concrete forms. A concrete form deformation preventing member 1 having rectangular cross section with one side opened is provided with through holes of which pitch is the same as the pitch of holes for attaching space holder between form panels 71 and 72. At opposing ends of the space holder, the concrete form deformation preventing member 1 are fastened by the same means used for fastening and fixing the form panels 71 and 72, with the peripheries of the holes for attaching the space holder formed in the form panels 71 and 72 being pressed as well. By this method, preliminary fastening and final fastening and fixing of the concrete form deformation preventing member 1 at the time of assembly of the concrete forms can be performed without the necessity to provide a new and separate means.
Patent TW-320555-B (TW)
Title: The 3D shoes-tongue cushion
Inventor: HWANG ING-JIUNN
IPC: A43B23/07
Filed: 1996-06-15
Granted: 1997-11-21
Abstract: A 3D shoes-tongue cushion, which has hollow inside, and extended two sides of cushion down to lower part, and formed the top & down surface of cushion in arc-shaped; And the cross-section curve of top & down surface of cushion is arc-shaped curve.
Patent TW-301019-B (TW)
Title: Method for reducing dielectric constant of liquid phase deposited silicon layer
Inventor: YEH CHING-FA
IPC: H01L21/208
Filed: 1996-07-23
Granted: 1997-03-21
Abstract: A method for reducing dielectric constant of liquid phase deposited silicon layer, which includes prepared a H2SiF6 solution of SiO2 as a deposited solution, and soak substrate in deposited solution to form SiO2 layer. Its features include adding water into H2SiF6 solution of SiO2 and controlling the water amount to make the dielectric constant of silicon layer lower than 3.8.
Patent TW-340118-B (TW)
Title: Single reactor bimodal HMW-HDPE film resin with improved bubble stability the invention relates to a granule product
Inventor: ROBERT I MINK
IPC: C08L23/04
Filed: 1996-09-17
Granted: 1998-09-11
Abstract: A sort of granule product, featuring an average granule diameter of between 0.01-0.04 inch, where each of the grains comes with resin selected from ethylene homopolymer or 1-olefin hydrocarbon with 3 to 10 carbon atoms, where density of the resin is 0.89 to 0.97, Mw/Mn of 2.5 to 60 and F1 0 to 100; where said resin having two compositions of different molecules, being one of themm Mw/Mn from 3 to 60 as high molecule (HMW) and the other Mw/Mn 2.5 to 3 as low molecule (LMW), having the resin HMW of from 0.01 to 0.99% by weight; where LMW composition is obtained by means of metal catalyst of dual metal complex, having a narrower distribution of molecule than that of HMW obtained by means of metal catalyst of dual metal complex; where the resin is formed in a single reactor by means of metal catalyst of dual metal complex; and the dynamic fluid property of the resin satisfies the following program: strength (G^/G")G0.1 second-1<0.44+10 7 X (viscosity at 0.1 second -1).
Patent TW-324858-B (TW)
Title: The manufacturing processes for tunneling oxide layer of EEPROM
Inventor: LIN KUEN-JYI
IPC: H01L27/115
Filed: 1996-10-22
Granted: 1998-01-11
Abstract: A method for forming EEPROM, which includes: - Form 1st field oxide on semiconductor substrate; - Form buried N-type region on substrate; - Form several 2nd field oxide layers on substrate, and form a tunneling oxide region in between 2nd field oxide regions; And the tunneling oxide region is contracted due to the bird beaks of 2nd field oxide region; - Form 1st gate oxide in between several 2nd field oxide regions; - Form tunneling oxide layer on tunneling oxide region; - Form 1st dielectric on floating gate; - Form 1st polysilicon on tunneling oxide layer, floating gate oxide layer, several 2nd field oxide regions and 1st field oxide region, and produce floating gate by using lithograph and etching technology; - Form 2nd gate oxide on substrate; - Form 2nd polysilicon on SiO2 and 1st dielectric layer, and use lithography and etching technology to etch producing controlling and transferring gate; - Form drain and source region of transferring transistor; - Form 2nd dielectric on controlling and transferring gate; - Form contact window in 2nd dielectric; - Form metal in contact window and on top of 2nd dielectric.
Patent TW-344137-B (TW)
Title: Multi-stage read-only memory structure and process for producing the same
Inventor: UEN RONG-MAW
IPC: H01L27/112
Filed: 1996-12-09
Granted: 1998-11-01
Abstract: A process for producing a multi-stage read-only memory, which comprises the following steps: (a) providing a first type of substrate formed with a pad oxide thereon; (b) forming a plurality of first trenches, which are arranged substantially parallel to each other, along a first direction in the substrate; (c) forming an insulative layer on the surfaces of the substrate and the first trenches; (d) forming a second type first conductor layer on the surface of the insulative layer, and filling up the first trenches; (e) removing a portion of the first conductor layer such that residues of the second type first conductor layer are all left in the first trenches, and the surface thereof is lower than the surface of the substrate; (f) removing the insulative layer until the surface of the insulative layer being approximately lower than the surface of the second type first conductor layer; (g) forming a second type second conductor layer, and filling up the first trenches; (h) etching back the second type second conductor layer to the surface of the substrate, the second type second and first conductor layers thereby constituting the source/drain regions; (I) removing the pad oxide; (j) forming a plurality of second trenches, which are arranged substantially parallel to each other, along a second direction in the substrate; (k) forming a first photoresist layer, and defining the first photoresist layer by a photolithography process thereby exposing a portion of the second trenches; (l) carrying a doping process thereby forming a plurality of dopant diffusion regions on the two sides and the bottom of the second trenches, then removing the first photoresist layer; (m) forming a dielectric layer having a thicker bottom thickness on the surfaces of the substrate and the second trenches; (n) removing the dielectric layer on the two walls of the second trenches until the bottom of the second trenches keeping the dielectric layer to a specific thickness; (o) forming a second photoresist layer, and defining the second photoresist layer by a photolithography process thereby exposing a portion of the dielectric layer and the substrate on the two sides of the dielectric layer; (p) carrying out a first electric ion implantation thereby forming a plurality of first type diffusion regions; (q) removing the photoresist layer and the dielectric layer; (r) forming a gate oxide; (s) forming a third conductor layer on the surface of the gate oxide, and filling up the second trenches; and (t) etching and defining the third conductor layer as a gate.
Patent TW-360726-B (TW)
Title: Improved sinker pins and sinker cam for a circular knitting machine and knitting method
Inventor: LEE KYUNG-MOK
IPC: D04B15/06
Filed: 1997-01-09
Granted: 1999-06-11
Abstract: A conventional circular knitting machine employs a sinker pin for knitting thin fabrics such as underwear without a butt and it can be simple patterns by a pattern wheel and the arrangement of needles. However the patterning using a sinker pin without butt has low productivity due to the limited patterning range and a long fashioning time for knitted fabrics. The present invention had four stage (multiple stage) sinker pins which have four stage butts in the rear part, a cam to fashion complicated patterns using multiple stage sinker pins, and mechanical or electronic device installed to a top plate attached to upper portion of a circular knitting machine to control the sinker pin described above for thereby fashioning patterns. The cam has two thread slots in the front side of the cam. The cam figured as an undulating shape is composed of a connection part rounded outside at one end and a junction part rounded inside in order to assemble to another connection part, and 1st peak, 1st descending part, 1st valley, 1st ascending part, 1st parallel, 2nd ascending part, 2nd peak, 2nd descending part, and 2nd parallel part formed between the connection part and the junction part.
Patent TW-341681-B (TW)
Title: Machine, method and medium for dynamic optimization for resource allocation
Inventor: ROY ROMANATH
IPC: G06F19/00
Filed: 1997-02-24
Granted: 1998-10-01
Abstract: A method for allocating resources over given time periods t, which comprises the following steps: (1) receiving resource demands each of which are to be satisfied over the time periods; (2) receiving information indicating the resource utilization ratio: predicting the resource utilization ratio in each time period of the time periods; (3) based on the steps (1) and (a), enabling the system to shape in each time period t, in which the resources used in each time period t are mutually dependent with other many time periods; (4) determining the pricing of a product or a service, in which, based on each time period t, the utilization ratio of each resource, product or service is a subset of the system.
Patent TW-419448-B (TW)
Title: Alkylation process using hydrogen fluoride-containing alkylation catalysts
Inventor: PHAM HANG THANH
IPC: C07C2/60
Filed: 1997-03-10
Granted: 2001-01-21
Abstract: This invention relates to catalysts for alkylation reactions and their preparation. More particularly, the invention relates to an alkylation process using a hydrogen fluoride-containing alkylation catalyst, which catalyst may be safely and easily handled, transported, and stored.
Patent TW-358299-B (TW)
Title: SYNC signal self-test device and method
Inventor: KIM EUN-SUP
IPC: H04N17/06
Filed: 1997-03-17
Granted: 1999-05-11
Abstract: An SYNC signal self-test device, including: a pre amplifier, for pre-amplifying the RGB video signals coming from a computer system; a microprocessor, for measuring the horizontal and vertical synchronous signals, and when the horizontal/vertical synchronous signal frequency from the computer system are outside the monitor operation range, for controlling the generation of the display signals on the screen, or for generation of the horizontal and vertical synchronous signals corresponding to the original synchronous horizontal and vertical signals; a screen-display IC, for output of the on-screen display signal synchronized to the microprocessor control signals; a buffer, for temporary saving of the output signals from the on-screen display IC; a mixing unit, for mixing the output of the preamplifier and the buffer; and master amplifier, for amplification of the output of the mixing unit and sending it to a tube.
Patent TW-541363-B (TW)
Title: Method and device for manufacturing single crystals
Inventor: TOMIOKA JUNSUKE
IPC: C30B15/00
Filed: 1997-05-24
Granted: 2003-07-11
Abstract: This invention provides a method and a device capable of manufacturing single crystals with an oxygen density of less than 12x10<17> atoms/cm<3> or less than 10x10<17> atoms/cm<3>, and wherein the oxygen density of the single crystal produced is uniformly distributed along its longitudinal axis. The electrical power inputted into the main heater 6 surrounding the quartz crucible 4 and the top heater 9 shaped like a reverse frustrated cone and disposed above the quartz crucible 4, is controlled to keep the temperature of the melted liquid 5 in a preset range during the process of lifting the single crystal silicon 10. When combining the main heater 6 and the top heater 9, the heat emitted from the main heater 6 can be kept small, and the heat load on the quartz crucible 4 and the amount of oxygen released from the quartz crucible 4 and dissloved into melted liquid 5 can be reduced. Therefore, a single crystal of low oxygen density and with uniformly distributed oxygen density along its longitudinal axis can be obtained. Furthermore, the single-crystal silicon 10 can be assigned a proper heat history. In the above process, if a magnetic field is applied to the melted liquid, then single crystals of much lower oxygen density can be obtained.
Patent TW-392189-B (TW)
Title: Method of manufacturing a cathode ray tube and a cathode ray tube
Inventor: VAN DER VOORT ANDRE
IPC: H01J9/20
Filed: 1997-06-02
Granted: 2000-06-01
Abstract: A method of manufacturing a cathode ray tube having an antistatic, anti-reflective filter, in which method a first conductive layer (for example a layer on the basis of indium-tin oxide) is provided by means of sputtering. A second layer containing SiO<2> is applied to the first conductive layer by means of a wet-chemical process, for example spinning and, subsequently, drying of a TEOS-compound. The method enables an antistatic, anti-reflective filter to be manufactured in a simple manner which can suitably be used on an industrial scale, which filter exhibits good antistatic and anti-reflective properties as well as a good shielding effect.