baber/WOPTO huggingface dataset:
Patent JP-2004197602-A (JP)
Title: Engine drive controller and switch for engine start
Inventor: KAWAMURA DAISUKE
IPC: B60R25/04
Filed: 2002-12-17
Abstract: <P>PROBLEM TO BE SOLVED: To provide an engine drive controller and a switch for engine start wherein power consumption is reduced and operability is improved, while preventing the engine from starting by false operation.  <P>SOLUTION: An operation switch 16 is installed in the interior of a vehicle 2. The switch 16 includes two contacts 16c, 16d placed adjacent to each other, and an operation part for changing contact state of respective contacts 16c, 16d according to a push operation. Pushing-operation signals of contacts 16c, 16d are input in a power controller 15. The controller 15 conducts a changeover for changing a functional positions under the condition that the state of contact of either one of the contacts 16c, 16d has been changed in the state of readiness for mutual communication between a portable device 11 and a vehicle controlling device 12. Then, the controller controls engine start/stop under the condition that connection states of both contacts 16c, 16d have been changed.  <P>COPYRIGHT: (C)2004,JPO&NCIPI
Patent JP-2003119777-A (JP)
Title: Steel pipe foundation pile
Inventor: HOSHI FUMIO
IPC: E02D5/72
Filed: 2002-12-19
Abstract: PROBLEM TO BE SOLVED: To provide a steel pipe foundation pile which can be driven to a predetermined bearing layer by rotation without vibration and noise through a soft or hard stratum. SOLUTION: This steel pipe pile P has a truncated cone head 2 cut off and fitted and fixed at the tip surface Ts of a steel pipe 1; the head portion 2 is constituted of a cylindrical portion 20 equipped with protruded drum 22 fitted to the inside of the steel pipe 1 and the truncated cone head 21, two drive vanes 23 and 23' gently sloped along the outer periphery of the cylindrical portion 20, and steeply sloped cutting vanes 24 and 24' are attached to the outer peripheral surface of the conical head 21 are arranged symmetrically with 180 deg. rotation mutually for drive vanes and mutually for cutting vanes respectively thereby giving cutting and driving actions at two places always in 180 deg. symmetry at the same level as the natural ground.
Patent JP-2004200526-A (JP)
Title: Device for grinding semiconductor wafer, and grinding method
Inventor: OI YOSHIO
IPC: H01L21/304
Filed: 2002-12-20
Abstract: <P>PROBLEM TO BE SOLVED: To avoid the problems wherein a grinding wheel for grinding becomes loaded in a semiconductor wafer grinding process, and loading damages a wafer which is to be ground, and the loaded grinding wheel requires a dressing process as a reproduction process, and further, the condition does not reach a loading level of the grinding wheel, but the damaged layer on a wafer surface after ground becomes thickened.  <P>SOLUTION: In a device for grinding semiconductor wafer, a nozzle 6 is provided between an upper surface of a wafer 1 and a grinding wheel spindle 5, and the opening of a nozzle end 12 of the nozzle 6 is arranged toward an inner peripheral side 13 of a wafer grinding region 10. By grinding the wafer to restrict the direction of supplying a grinding fluid 3 from the nozzle end 12 to the inner peripheral side 13 of the wafer-grinding region 10, a large amount of grinding fluid 3 is certainly supplied, and the grinding fluid 3 passes through the wafer-grinding region 10, and the ground chips are discharged, and the grinding wheel 2 is cooled.  <P>COPYRIGHT: (C)2004,JPO&NCIPI
Patent JP-2004207317-A (JP)
Title: Semiconductor device, manufacturing method thereof circuit board, and electronic equipment
Inventor: MATSUI KUNIYASU
IPC: H01L21/98
Filed: 2002-12-24
Abstract: <P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device capable of facilitating positioning when laminating a semiconductor chip, avoiding the short-circuiting between terminals, and improving reliability in the connection between the electrodes of each semiconductor chip; and to provide the semiconductor device, a circuit board, and electronic equipment.  <P>SOLUTION: An opening hole is provided in the semiconductor chip 1; the opening hole is filled with a conductive member, such as copper; and a terminal, where the upper surface of the conductive member is set to recessed sections 31, 32, 33, 34, is provided.  <P>COPYRIGHT: (C)2004,JPO&NCIPI
Patent JP-2004202805-A (JP)
Title: Injection molding method
Inventor: SAKURAI HISAJIRO
IPC: B29C45/34
Filed: 2002-12-25
Abstract: <P>PROBLEM TO BE SOLVED: To enhance the completion degree of a product by sharply reducing the pressure in a mold not only to rapidly fill the mold with a synthetic resin material but also to draw the resin material in the mold under suction, in molding the synthetic resin material.  <P>SOLUTION: In this injection molding method, a vacuum means such as a pin, a piece or the like is employed and a constricted part is formed to the vacuum means in the region reaching an exhaust passage space from a runner so as to cause the vacuum effect due to the air and gas or the like passing through the constricted part to rapidly depressurize the runner where the vacuum means is installed and the core part continued to the runner.  <P>COPYRIGHT: (C)2004,JPO&NCIPI
Patent JP-2004210806-A (JP)
Title: Ink composition for ink-jet printing, printing method and printed fabric
Inventor: YANAGIHARA HIROKAZU
IPC: C09D11/00
Filed: 2002-12-26
Abstract: <P>PROBLEM TO BE SOLVED: To obtain an ink composition for ink-jet printing which provides a wide color reproduction range with respect to a blue hue and yet has sufficient light resistance, to provide a printing method and to obtain a printed fabric.  <P>SOLUTION: The ink composition for ink-jet printing comprises (1) 3.5-5.5 wt.% of Acid Blue 80 and/or Acid Blue 112 and (2) 2.0-3.5 wt.% of Acid Violet 48. The printing method comprises printing a polyamide-based fiber fabric using the ink composition by an ink-jet method. The printed fabric is obtained by the printing method.  <P>COPYRIGHT: (C)2004,JPO&NCIPI
Patent JP-2004214375-A (JP)
Title: Semiconductor device and its mounting structure
Inventor: NITTA MAKOTO
IPC: H01L21/60
Filed: 2002-12-27
Abstract: <P>PROBLEM TO BE SOLVED: To provide a semiconductor device which is conducted electrically with a substrate surely and can be mounted, in the face-down mounted semiconductor device and its mounting structure.  <P>SOLUTION: In the semiconductor device having connecting pads as input-output terminals, the connecting pads 10 are formed by laminating conductive particles 6 on electrode pads 1 made of a metal, and the openings of the conductive particles 6 are filled with a thermoplastic resin 7. The connecting pads 10 for the semiconductor device 20 and electrode terminals 4 for a substrate 21 are bonded with a thermosetting resin 8.  <P>COPYRIGHT: (C)2004,JPO&NCIPI
Patent JP-2004215388-A (JP)
Title: Cooling structure of electric connection box
Inventor: NAKAMURA TAKESHI
IPC: H05K7/20
Filed: 2002-12-27
Abstract: <P>PROBLEM TO BE SOLVED: To provide the cooling structure of an electric connection box which can reduce the cost by simplifying the installation structure of an exhaust duct for a box.  <P>SOLUTION: An exhaust duct 3 is provided for a box which leads to the interior of the electric connection box 1, the other end of this exhaust duct 3 for a box and the other end of an intake duct 13 for an air cleaner are coupled with each other via a duct coupling member 4, and both openings 3a and 13a are arranged closely.  <P>COPYRIGHT: (C)2004,JPO&NCIPI
Patent JP-2004199633-A (JP)
Title: Mounting structure of serial ata equipment connection connector to pci card type device
Inventor: ITASAKA TARO
IPC: G06F1/18
Filed: 2002-12-13
Abstract: <P>PROBLEM TO BE SOLVED: To use a connector without being hidden from an edge of an opening on the rear surface of a computer cabinet by using a component having a serial ATA connector existing in a market at present for external connection.  <P>SOLUTION: The component having the serial ATA connector is arranged on a second substrate separate from a substrate of a PCI card type device and the second substrate is fixed on the substrate of the PCI card type device leaving an appropriate distance.  <P>COPYRIGHT: (C)2004,JPO&NCIPI
Patent JP-2004514114-A (JP)
IPC: C12Q1/6837
Filed: 2001-06-21
Abstract: The present invention provides a method for the generation of novel libraries of encoded magnetic particles from sub-libraries of by the generation of novel sub-libraries of magnetic nanoparticles and encoded particles. The sub-libraries are functionalized on demand are useful in the formation of arrays. The present invention is especially useful for performing multiplexed (parallel) assays for qualitative and/or quantitative analysis of binding interations of a number of analyte molecules in a sample.
Patent JP-2004502386-A (JP)
IPC: H04N9/07
Filed: 2001-06-25
Abstract: A signal processing device for a sensor output signal from a sensor covered by a color mask pattern having a plurality of colors, the signal processing device comprising a reconstruction unit ( 5 ) for generating a plurality of color signal values (R, G, B) for each pixel from the sensor output signal; and a clipping device ( 8 ) for clipping the sensor output signal or the plurality of color signal values (R, G, B). Preferably, the signal processing device further comprises: a conversion unit ( 6 ) for generating luminance signals (Y) and chrominance signals (U, V) from the plurality of color signal values (R, G, B), and an adjustment unit ( 10 ) for selectively setting the chrominance signals (U, V) to a zero color difference when clipping is performed ( 8 ). Advantageously, the clipping device ( 8 ) is arranged between the sensor ( 3 ) and the reconstruction unit ( 5 ), and the signal processing device further comprises a single bit white clip delay unit ( 11 ) for generating a switch signal for the adjustment unit ( 10 ), the switch signal comprising an at least 2x2 bit array from, or at least in response to, a signal (SS) from the clipping device ( 8 ) indicating that clipping has occurred.
Patent JP-2004505346-A (JP)
Title: 多重プロセッサアーキテクチャのためのキャッシュコヒーレンシシステムおよび方法
IPC: G06F12/08
Filed: 2001-03-16
Abstract: 共有メモリ多重プロセッサコンピュータシステム（１００）で用いられるキャッシュコヒーレンシディレクトリ（３０３）である。データ構造（４００）は、キャッシュ可能な記憶場所の各々に関連し、データ構造は、排他的状態（５０１）、共有状態（５０２）、アンキャッシュ状態（５０３）、ビジー状態（５０６）、ロック状態（５０４）、およびペンディング状態（５２４）を表す状態値を記憶するための場所を含む。キャッシュラインが現在１つ以上の他のプロセッサによって用いられている間に、ビジー状態およびペンディング状態が共働してあるプロセッサによって将来用いられるためにキャッシュラインを確保する。
Patent JP-2004506491-A (JP)
IPC: A61M5/145
Filed: 2001-08-17
Abstract: A wearable, self-contained drug infusion device is disclosed that is capable of achieving the precise flow rate control needed for dose-critical drugs such as insulin. In preferred embodiments of the device, at least two flow channels are utilized in conjunction with a series of valves for providing a user with selectable, constant flow rate control. The device can be made with small dimensions so that it can be worn by the user with a minimum of discomfort and inconvenience. In addition, the simple mechanical nature of the device provides the user with close control over the flow rate, which is required for safe and effective delivery of insulin and other drugs. Also, the absence of electronic components allows the device to be manufactured inexpensively. The device is provided with a first channel that is long and narrow, functioning as a flow restrictor. The first channel is preferably provided in a serpentine pattern. A second channel is also provided that has a larger cross section so that flow is not restricted. A series of valves are used to force the flow of fluid through a selectable portion of the serpentine portion of the first channel before entering the remainder of the second channel and flowing to the delivery cannula. In one embodiment of the device, a needle port is provided in fluid communication with the delivery cannula for delivering bolus injections. In another embodiment, a bolus button is provided for delivering bolus injections. A flow restrictor is preferably included in the bolus button to limit the rate at which the bolus button refills.
Patent JP-2004506793-A (JP)
IPC: B01D3/00
Filed: 2001-08-10
Abstract: The invention relates to a method for producing polycarbonate according to the method for the transesterification of molten mass whereby bis-(hydroxyaryl) compounds (bisphenols) and diaryl carbonates are reacted by means of reactive rectification.
Patent JP-2004507988-A (JP)
Title: 機能拡張テレビのトリガーをタイム・シフトさせる方法及びシステム
IPC: H04N7/08
Filed: 2001-08-29
Abstract: 有効期限属性を有するトリガーを含む機能拡張テレビ送信が、その有効期限属性がトリガーの利用に悪影響を与える場合がある様々な状況において利用できるようにする方法およびシステムを提供する。例えば、放送を記録する状況において、トリガーの期限切れの後でも再生を可能にする。同様に、現地支局またはＦＮＯＣ（ｆｒａｎｃｈｉｓｅ ｎｅｔｗｏｒｋ ｏｐｅｒａｔｉｎｇ ｃｅｎｔｅｒ）は、元のトリガーの有効期限属性を調整することによって、機能拡張テレビ・コンテンツを再放送することができる。
Patent JP-2004509353-A (JP)
Title: フッ化物の検出方法
IPC: G01N21/77
Filed: 2001-09-11
Abstract: 試験試料を式（１）の化合物またはその塩と接触させ、そして該化合物のスペクトル特性の変化を評価する試験試料中のフッ化物の存在および／または量を検出する方法。 【化１】     （式中、Ｘは発色団または発蛍光団であり、Ｗは必要ならば置換されていてもよい芳香族環であり、ｎは０，１または２であり、ｍは１または２であり、そしてｐは１または２を示す。）また、フッ化物の存在および／または量を検出するキット。
Patent JP-2004527222-A (JP)
Title: 新規タンパク質およびそれをコードする核酸
IPC: C12N15/63
Filed: 2001-09-27
Abstract: 新規ポリペプチドをコードするヌクレオチド配列が本明細書中で開示される。これらの核酸配列によってコードされるポリペプチド、このポリペプチドに免疫特異的に結合する抗体、ならびに前述のポリペプチド、ポリヌクレオチド、または抗体の誘導体、改変体、変異体またはフラグメントがまた、開示される。本発明は、これらの新規のヒト核酸およびタンパク質のいずれか１つに関連する障害の、治療剤、診断方法ならびに、診断、処置および予防のための研究方法を、さらに開示する。
Patent JP-2004510303-A (JP)
Title: 陰極線管
IPC: H01J29/52
Filed: 2001-09-14
Abstract: 電子源と、入力開口部及び出力開口部を備える電子ビーム案内キャビティとを有する陰極線管。その出力開口部付近の電子ビーム案内キャビティの壁部の少なくとも一部は、そのカソードと共働動作しかつ電子源を形成するために２次放出係数δ１を有する絶縁材料を有する。さらに、この陰極線管は、動作時にそのカソードと出力開口部との間に第１電界強度Ｅ１の電界を印加するために第１電圧源と接続可能な第１電極を有する。δ１とＥ１は、電子ビーム案内キャビティを通じて電子伝達を可能とする値を有する。本発明によれば、このカソード構造は、当該キャビティの入力部と加速グリッドとの間に当該出口開口部を出る電子のエネルギー分布の広がりを小さくする手段を有する。
Patent JP-2004511874-A (JP)
Title: 情報単位を記録するための方法とデバイス
IPC: G11B27/30
Filed: 2001-09-26
Abstract: 【課題】リンキングがより効率的である記録方法とデバイスを提供すること。 【解決手段】部分的に記録された書き込み可能な記録担体（１１）、例えば光学ディスクに情報信号を記録するための方法とデバイス。情報信号は、少なくとも１つの情報単位を表す。記録担体は、情報単位を記録するための位置を示すあらかじめ形成されたトラックポジション情報を有する。情報信号から変調信号が生成され、この変調信号を記録するために記録トラックが走査される。記録が既存の記録済み情報単位の後に隣接する位置に行われる場合には、既存の記録済み情報単位の終端境界域からリンキング情報が読み取られ、変調信号を論理的に生成するために使用される。記録が既存の情報単位の前に隣接する位置に行われる場合には、既存の情報単位の開始境界域からリンキング情報が読み取られ、変調信号を論理的に生成するために使用される。 【選択図】図５
Patent JP-2004531690-A (JP)
Title: 発光パネルおよびその構成部品の検査方法
IPC: H01J9/02
Filed: 2001-10-26
Abstract: ２つの基板の間に挟装された複数の発光マイクロコンポーネントを有するディスプレイパネルの製造をインライン検査しかつ制御する方法を開示する。好適な方法は、少なくとも２つの電極を介してマイクロコンポーネントに十分大きな電圧が印加されたとき、イオン化可能なガスを含むマイクロカプセルを形成するステップ（９００）と、少なくとも１つのガスイオン化用電極と、前記マイクロカプセルを収容する複数のソケットとを形成するステップ（９１０）と、マイクロカプセル設置工程（９３０）と、別の電極を上面に可設置した第２基板を位置合わせする工程（９４０）と、ダイシング工程（９５０）とを含む。親和性が低く、導電性、反射性および／または発光性を有する材料のような放射を促進するような材料、例えば、酸化マグネシウム、金、アルミニウム、および／または燐コーティング剤で、マイクロカプセルをドープ処理するか被覆する工程（９０５）を別途含めてもよい。パネルは、各工程が終わる毎に、サイズ、形状、位置、物性、または電気的機能等について検査し、そしてそのデータを、格納、分析して前記工程および／または製品に改良の必要性の有無を決定するようにするのが好ましい。
Patent JP-2004533380-A (JP)
Title: ロール状材料のディスペンシング装置
IPC: B65H35/07
Filed: 2001-11-14
Abstract: 本発明は、圧力感知粘着テープのようなロール状の材料をディスペンスする装置を提供する。この装置は、ロールホールディングピースと、カバーピースと、ロールホールディングピースとカバーピースを連結するヒンジアセンブリとを備えるとともに、密閉可能なハウジングを備えている。ヒンジアセンブリは、カバーピースとロールホールディングピースがヒンジアセンブリによって連結されたままでハウジングを開くことを可能にする。この装置はまた、材料を基材に施すためにディスペンシング端近くに位置するアプリケーターと、材料の吐出口と、ディスペンシング端近くに位置する材料を切断するための切断部材とをさらに備えている。本発明の装置は、特に、ハンドヘルド型のテープディスペンサーとして有用である。
Patent JP-2004538619-A (JP)
Title: バンプのない積層配線構造を有する超小型電子パッケージ
IPC: H01L23/538
Filed: 2001-11-15
Abstract: この超小型電子デバイス製造技術は、少なくとも１つの超小型電子ダイを超小型電子パッケージコアの少なくとも１つの開口内に配置して封止材料で固定するか、または少なくとも１つの超小型電子ダイを超小型電子パッケージコアなしに封止材料内に封止するか、若しくは少なくとも１つの超小型電子ダイをヒートスプレッダーの少なくとも１つの開口内に固定する。その後、誘電材料と導電トレースの積層配線構造を超小型電子ダイ、及び誘電材料、超小型電子パッケージコア及びヒートスプレッダーのうちの少なくとも１つに固着して、超小型電子デバイスを形成する。
Patent JP-2004529526-A (JP)
Title: ロバスト・チェックサム
IPC: H03M13/29
Filed: 2001-12-18
Abstract: 本発明は、入力信号が出力信号へ変換される信号変換の正しい動作を検査する方法に関する。この方法は、入力信号から第１のロバスト属性を抽出し、出力信号から第２のロバスト属性を抽出し、第１のロバスト属性と第２のロバスト属性を比較し、類似性が十分だある場合には、信号変換が正しい動作であると判断し、類似性が不十分である場合には、信号変換は誤った変換であると判断する。特別な一実施例では、この方法は、第１のロバスト属性が透かし技術によって入力信号に埋め込まれ、得られた信号が入力信号に対応した出力信号を取り出す受信機へ送信される状況に適用される。
Patent JP-2004531122-A (JP)
IPC: H04L47/43
Filed: 2002-03-11
Abstract: The packets generated by each of multiple packet data applications are provided to a single Point-to-Point Protocol (PPP) stack and a single High-level Data Link Control (HDLC) framing layer to convert data packets into byte streams suitable for transmission through Radio Link Protocol (RLP) connections. Each of the resultant multiple byte streams is then provided to one of multiple RLP connections having different retransmission and delay properties. The RLP connection selected for sending data from each application is based on the grade of service most appropriate for the application. At the receiver, the data from the multiple RLP connections is provided to a single PPP stack.
Patent JP-2004533149-A (JP)
Title: ＩＰＱｏＳのサービス拒否攻撃に耐えるための仮想私設網を採用するシステム、方法および装置
IPC: H04L29/06
Filed: 2002-03-20
Abstract: この発明に従うネットワーク構成（３０）は１以上のネットワークに基づく仮想私設網（ＶＰＮ）（４０，４６）をサポートする通信ネットワークを含む。通信ネットワークは、１以上のＶＰＮ（４０，４６）に属するＣＰＥエッジルータ（３４）へアクセスリンク３５によって接続された複数の境界ルータ（４０，４２）を含む。顧客のＶＰＮの外からのトラフィック（例えば別のＶＰＮまたは一般のインターネットからのトラフィック）が顧客のＶＰＮ内からのトラフィックに提供されるサービスの質（ＱｏＳ）を悪化させるのを防ぐために、この発明では余分なＶＰＮトラフィックが内部ＶＰＮトラフィックに干渉できないよう、アクセスリンク優先順位またはアクセスリンク能力割り当てを通じて各顧客のアクセスリンクに、余分なＶＰＮトラフィックに対して内部ＶＰＮトラフィックを優先する。このように、余分なＶＰＮトラフィックに対して内部ＶＰＮトラフィックを優先することによって、論理トラフィック分離を達成するためにレイヤ２多重化およびルーティングプロトコルの設定を使用した物理アクセスリンク上で内部ＶＰＮおよび余分なＶＰＮ間の分割を含む、ネットワーク要素およびプロトコルの特別の設定が行われる。アクセスネットワークを設定することによって、ＶＰＮ境界ルータ（４０、４２）およびＣＰＥエッジルータ（３４）およびこのようなエッジおよび境界ルータのルーティングプロトコルによってＤｏＳ（サービスの拒否）攻撃防御の高レベルのサービスが達成される。
Patent JP-2004526387-A (JP)
Title: 環ベースの署名スキーム
IPC: H04L9/32
Filed: 2002-05-03
Abstract: メッセージのデジタル署名を生成し検証するめの方法及びシステムが提供されている。デジタル署名は、デジタル署名多項式を含んでいる。環Ｒ（１０２）の互いに素な二つのイデアルｐ及びｑが選択される。秘密鍵及び第二イデアルｑが、公開鍵の生成に用いられる。一つ以上のメッセージ多項式が、署名されるべきメッセージに基づいて生成される。デジタル署名多項式は、メッセージ多項式の少なくとも一つと、秘密鍵多項式の少なくとも一つと、イデアルｐ及びｑのうち少なくとも一つとを用いて、未規約化状態のデジタル署名多項式が環Ｒの秘密鍵多項式の倍数でないというように、生成される（１１０）。署名は、続いて、少なくとも一つのメッセージ多項式と少なくとも一つのデジタル署名多項式との間の偏差（deviation）が予め定められた偏差（deviation）の閾値より小さいことを確認することにより、検証される（１１６）。
Patent JP-2004529576-A (JP)
IPC: H03K19/00
Filed: 2002-05-15
Abstract: A reconfigurable logic device according to the invention comprises a lookup table (LUT) ( 11.1 ) with an input (in 1 ) for receiving an input signal and an output (out) for providing a binary output signal. The reconfigurable logic device is characterized by, a control input (ctrl) for receiving a control bit, a controllable inverting gate ( 11.2 ) for providing the address signal to the LUT ( 11.1 ) in response to the control bit and the input signal, and by a controllable inverting gate ( 11.3 ) for providing a modified output signal in response to the output signal of the LUT and the control bit. The reconfigurable logic device according to the invention can operate at a high speed, and at the same time have a relatively modest configuration memory.
Patent JP-2004528852-A (JP)
IPC: C12N1/32
Filed: 2002-04-26
Abstract: The invention discloses a Gram-positive microorganism, Bacillus megaterium, that effectively and efficiently degrades fats, oils and grease. A composition comprising said microorganism and a method for degrading fatty acids and grease are also disclosed.
Patent JP-2004209883-A (JP)
Title: Holder for writing instrument
Inventor: ARAI YUTAKA
IPC: B42F9/00
Filed: 2003-01-07
Abstract: <P>PROBLEM TO BE SOLVED: To provide a holder for a writing instrument which can stably hold a relatively fine or thick writing instrument.  <P>SOLUTION: The holder 20 for a writing instrument includes a fixing member 30. The fixing member 30 includes a first clamping part 32 and a first supporting part 44. A holding member 50 is displaceably fitted to the fixing member 30. The holding member 50 includes a second holding part 52, a second supporting part 62 and a spring part 64. The second holding part 52 clamps and holds the writing instrument in cooperation with the first holding part 32. The second supporting part 62 is rotatably supported relative to the first supporting part 44. The spring part 64 urges the second holding part 52 to the first holding part 32 side. The tip end 66 of the spring part 64 is displaced while being in contact with the fixing member 30 in opening/closing the second holding part 52 relative to the first holding part 32.  <P>COPYRIGHT: (C)2004,JPO&NCIPI
Patent JP-2004213473-A (JP)
Title: Module management control system
Inventor: MITSUMIZU HIROAKI
IPC: G06Q50/04
Filed: 2003-01-07
Abstract: <P>PROBLEM TO BE SOLVED: To provide a module management control system capable of constructing a system for managing a processing process by setting and instructing the connection between a plurality of modules having segmentalized processing functions by a cell pattern displayed on a screen.  <P>SOLUTION: Each displaying cell pattern corresponding to a plurality of modules is displayed on the screen, and the connecting state of modules is set and instructed by use of the cell pattern. The connecting state is set to connection management information of every module, and the connection of a module concerned with another module is managed on the basis of connection management information. A connection line CL<SB>CA</SB>is drawn from a cell pattern C<SB>A</SB>corresponding to an active module, and the receiving port P<SB>CB</SB>of a cell pattern C<SB>B</SB>corresponding to a passive module. When the connection line is connected to the receiving port, the active module is set as the connecting destination of the passive module.  <P>COPYRIGHT: (C)2004,JPO&NCIPI
Patent JP-2004213474-A (JP)
Title: Calculation system by use and method
Inventor: KONDO TAKETO
IPC: G06Q50/08
Filed: 2003-01-07
Abstract: <P>PROBLEM TO BE SOLVED: To provide a system capable of performing the formation and management of a specification and an order sheet extending over a plurality of pages in an integrated manner.  <P>SOLUTION: This system comprises a storage means for storing a process code, a material code, a construction code, a plurality of unit prices corresponding to the material code, and a plurality of unit prices corresponding to the construction code; a setting means for setting a data table for one process code, a material code dependent on the one process code, a construction code dependent on the one process code, a plurality of unit prices and necessary material quantity corresponding to the construction code, and a plurality of price units and necessary construction quantity corresponding to the construction code as data related to one completed product; a storage means for temporarily storing the set various data; a calculation means for calculating the construction cost required for the one completed product on the basis of the stored various data as an estimation form and an order form of a plurality of times; a display means for displaying the calculated result; and an output means for outputting the calculated result.  <P>COPYRIGHT: (C)2004,JPO&NCIPI
Patent JP-2004221160-A (JP)
Title: Resistor for sensing current
Inventor: YAMASHITA SHINZO
IPC: H01C13/00
Filed: 2003-01-10
Abstract: <P>PROBLEM TO BE SOLVED: To provide a resistor capable of sensing a current highly accurately without causing a change in voltage-current characteristics even when solder climbs.  <P>SOLUTION: The resistor 2 for sensing a current mounted on circuit patterns 6a, 6b on a substrate 4 by soldering includes a power supply 8 for a current flowing through the circuit patterns 6a, 6b, and a sensing part 18 for sensing the current. The power supply 8 includes a pair of terminals 12, 12b provided at opposite ends thereof for soldering, a top plate 16, and a pair of legs 14a, 14b for connecting the terminals 12, 12b and the top plate 16. The sensing part 18 includes protruded parts 20a, 20b protruding from the side surface thereof which is a region where the solder of solder layers 10a, 10b does not climb and which relates to a direction perpendicular to a power supply direction to the top plate 16.  <P>COPYRIGHT: (C)2004,JPO&NCIPI