Patent GB-1388161-A (GB)
Title: Logic circuit
Inventor: ANANIADES CONSTATINE SPYRIDON
IPC: H03K19/088
Filed: 1972-03-22
Abstract: 1388161 Transistor logic circuits BURROUGHS CORP 22 March 1972 [5 April 1971 6 July 1971] 13365/72 Heading H3T A transistor logic circuit has the inputs applied to an emitter or emitters of a transistor, a connection between the collector and base of the transistor and an output which swings between high and low levels which may be higher than the high input level and lower than the low input level, the swing occurring through a substantial region of near unity gain. Level deterioration is thus avoided and the near unity gain reduces the slope of the swing and thus the harmonics generator. In Fig. 1 the ratio of 17 to 18 determines the gain and the voltage V3 determines the centrepoint of the output swing. The resistor 17 may be replaced by a direct connection (Fig. 8) or may include an emitter follower, a diode being connected in series with a resistor to earth, to provide temperature compensation (Fig. 2, not shown). A transistor (60, Fig. 4, not shown) may be connected across resistor 17 to compensate for the reduction of gain near one end of the swing and a diode (59) may be connected in series with the reistor to compensate for the base emitter voltage drop of transistor 11. In Fig. 3 (not shown) an emitter follower (30) is inserted between the collector of transistor 10 and the base of transistor 11 and the connection from collector to base of transistor 10 is effected by a further emitter follower (40) fed from a point of the emitter on the emitter resistor of transistor 30. The input to the emitter of transistor 10 may be derived from an emitter follower or a plurality of emitter followers connected to form a gate (Figs. 4, 5 and 16, not shown) and the emitter followers may have a constant current transistor as their collector loads (Fig. 4, not shown). Clamping of one output level may be effected by a diode (33) or a transistor (61) connected to the output terminal (Figs. 3 and 4, not shown) or by a diode connected at another point in the circuit, e.g. to an input emitter to an extra emitter on transistor 10 (Fig. 15, not shown). Where a direct connection is provided between collector and base of transistor 10 either through a short circuiting connection (Fig. 8) or through an emitter follower (Figs. 11, 13 and 15, not shown) the increase in swing between input and output may be effected by connecting in series with the path between input and output a resistor 32 to the respective end of which are connected current alternately conducting supply source transistors 24, 28. The current source transistors 24 and 28 may alternatively have their collectors connected to the resistor (Fig. 16, not shown). If an asymmetrical gain is required with respect to the mid-point between the input level the resistor 66 can be divided into two series connected portions and the emitter of transistor 30 connected to the junction of the portions. The circuit may be operated so that the transistors are never saturated and so that at the high output transistor 10 is off and at the low output the connection between collector and base of that transistor is broken by the emitter follower inserted therein so that in each case the loop is broken and oscillation prevented.