baber/WOPTO huggingface dataset:
Patent JP-H10209996-A (JP)
Title: Data reception system
Inventor: GOTO HIROKI
IPC: H04J3/06
Filed: 1997-01-20
Abstract: PROBLEM TO BE SOLVED: To effectively utilize transmission power and to improve reception characteristics and to lower power consumption in a receiver. SOLUTION: Relating to an SF(super frame) detection part 1, a symbol for detecting an SF continuously inserted to an SW at each frame timing of reception signals is used, the acquiring and holding proceedings of the synchronization of the SF are performed from reception signals and an SF timing is outputted to a detection part 2, a decoding part 3 and an FEC part 4. By the detection part 2, a known signal sequence is generated corresponding to the SF timing, a phase difference is calculated from it and a transmitted known signal sequence, a phase correction amount is calculated from the phase difference and the reception signals are phase-corrected by the phase correction amount, detected and outputted. By the decoding part 3, the detected reception signals are judged and converted to bit streams, a redundant bit is eliminated and the stream of information bits only is outputted.  Error correction is performed in the FEC(forward error correction) part 4.
Patent JP-S59134047-A (JP)
Title: Positive pressure booster
Inventor: NAKAMURA MASATOSHI
IPC: B60T13/60
Filed: 1983-01-19
Abstract: PURPOSE:To shorten the positive pressure feed time by providing an exchange valve which will communicate the second chamber communicatable with third chamber to the atmosphere when the pressure in the third chamber or operating chamber is below atmospheric pressure while communicate the second chamber to a positive pressure source when the pressure in third chamber is higher than the atmospheric pressure. CONSTITUTION:A positive pressure booster 14 is formed with first chamber 18 communicatable with a negative pressure source, second chamber 29 communicatable with a positive pressure source and third chamber 19 communicatable with second chamber 29. An exchange valve 30 is placed in the path between said second chamber 29 and third chamber 19. The pressure in third chamber 19 will function on one end of a spool 32 in the exchange valve 30 while the atmospheric pressure will function on the other end to exchange the spool 32 through the differential pressure. In other word, the exchange valve 30 will communicate the second chamber 29 to the atmosphere when the pressure in the third chamber 19 is below the atmospheric pressure while communicating the second chamber 29 to a compression air tank 45 when the pressure in third chamber 19 is higher than the atmospheric pressure.
Patent JP-H11197629-A (JP)
Title: Treating method for incinerated fly ash
Inventor: KAWABATA HIROAKI
IPC: B09B3/00
Filed: 1998-01-19
Abstract: PROBLEM TO BE SOLVED: To provide a material convertible to resources, such as an artificial aggregate, with a small elution amount of heavy metals and with a low dioxins content, by firing incinerated fly ash, which is generated at the incineration of urban waste, industrial-waste, etc., and contains a high amount of heavy metals, at low fuel cost. SOLUTION: By adding crushed waste plastic, which has a particle size of 0.5 mm or less and contains chlorine, to incinerated fly ash, mixing them to granulate a mixing molding having a particle size of 10 mm, feeding it to a firing furnace 1 to be fired, and rapidly cooling it by air fed from an air feed pipe 11 for cooling immediately after firing, the crushed waste plastic to be subjected to reclamation or incineration treatment can be used as a fuel to remarkably reduce the treatment cost of incinerated fly ash, heavy metals are effectively vaporized by the existence of chlorine during the firing treatment, and resynthesis of dioxins decomposed by heat is prevented, so that a material convertible to resources, such as an artificial aggregate, with a small elution amount of heavy metals and with a low dioxins content can be provided.
Patent JP-H07221611-A (JP)
Title: Voltage comparator
Inventor: AKIMA ISAO
IPC: H03F3/45
Filed: 1994-01-27
Abstract: PURPOSE:To turn a voltage comparator to one chip along with a counter by constituting it of MOS transistors. CONSTITUTION:A reference voltage and a monitoring voltage are applied to the N channel type MOS transistors 13 and 14 of a first decision circuit 10 and two pieces of output a1 and a2 are obtained from the drain side of the MOS transistors 13 and 14. The output a1 and a2 are impressed to the P channel type MOS transistors 21 and 22 of a second decision circuit 20 and the output (b) is obtained from the drain side of the MOS transistor 22. Then, the output (b) is outputted through a butter circuit 30 as comparison output (c).
Patent JP-S56104852-A (JP)
Title: Purification of aqueous solution of acrylamide
Inventor: ITOU HIROSHI
IPC: C07C231/06
Filed: 1980-01-28
Abstract: PURPOSE: To remove the residual copper catalyst from an aqueous solution of crude acryalmide, easily and completely, and to improve the flocculating activity and solutility of the solution when used as a polymer flocculant, by passing the solution successively through a particular anion exchange resin layer and a cation exchange resin layer.  
     CONSTITUTION: An aqueous solution of acrylamide obtained by the catalytic hydration of acrylonitrile e.g. at 50W150°C in the presence of a copper-containing catalyst, is passed through a layer of a free strongly basic anion exchange resin layer, and then through an H type cation exchange resin layer. The cations such as copper ions can be removed from the solution by this process and the purified solution can be obtained. The passing of the solution through the layers is pref. carried out at ≤60°C to prevent the deterioration and crystallization of acrylamide.  
     USE: Raw material of a paper reinforcing agent, etc. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S57141268-A (JP)
Title: Seasoned dried ume flesh
Inventor: SHIMIZU TOMOKO
IPC: A23L19/00
Filed: 1982-01-20
Abstract: PURPOSE: To obtain a seasoned and dried UME flesh, by adding a seasoning, shavings of a dried bonito and a paste agent to a flesh of a pickled UME, and molding and drying the resultant paste.  
     CONSTITUTION: A flesh of an UME is made into a paste, and sweet SAKE, soy sauce, sugar, shavings of a dried bonito and a paste agent, e.g. starch, are added thereto. The resultant mixture is then heat-treated, kneaded and molded into a plate, filamentary material, net, belt form, or cut with a die to various shapes. The resultant material is then dried to give a product. About 5% eucalyptus,  seed of a beefsteak plant or green laver is added thereto if necessary. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-H06216452-A (JP)
Title: Dummy-light input controlled constant-gain optical fiber amplification method and apparatus thereof
Inventor: ORITO TOSHIHIRO
IPC: H01S3/067
Filed: 1993-01-20
Abstract: PURPOSE:To keep constant the gain of optical fiber amplification and amplify without distortion by combining dummy light of a different wavelength from that of input signal light with the input signal light and by outputting a sum of a dummy light power and an input signal light power in such a way as to be constant. CONSTITUTION:Dummy light outputted from a laser emitting device 2 is combined with the input signal light by an optical multiplexer 1. The combined light is passed through an optical branching filter 5 and then inputted into an optical multiplexer 6. A semiconductor laser emitting device 7 for excitation which is separately driven by a semiconductor laser drive circuit 8 for excitation emits pumping light, and it is inputted into the optical multiplexer 6 in which the input signal light is combined with the dummy light. The combined light passes through an optical isolator 9 and then is inputted into an optical fiber 10 which is doped with a rare earth element, and the fiber 10 is excited by pumping light to amplify the signal light and the dummy light. The amplified signal light and dummy light pass through an isolator 11 and after that, are inputted to an optical fiber 12 for passing only the signal light in which the dummy light is removed.
Patent JP-H11330352-A (JP)
Title: Semiconductor product of packaged ultra-high integrated circuit and manufacture thereof
Inventor: CHOI SIHN
IPC: H01L21/98
Filed: 1999-01-14
Abstract: PROBLEM TO BE SOLVED: To obtain a semiconductor product which is excellent in degree of integration and forms a short signal transmission route, by a method wherein semiconductor chips are mounted upright on a printed circuit board, the semiconductor chips are connected to the board with a conductive connecting member, and outer connection terminal solder balls connected to the semiconductor chip are formed on the rear surface of the board. SOLUTION: U-shaped grooves 6 are provided to a printed circuit board 1, and semiconductor chips 2 are mounted upright on the board 1. The bonding pads 11 of the semiconductor chips 2 are ball-bonded to pads 12 provided to the printed circuit board 1 with conductive gold balls 3. After the semiconductor chips 2 and the ball-bonded parts are sealed up, solder balls 5 are mounted on the underside of the board 1. The chips 2 are integrally mounted upright in a vertical direction on the printed circuit board 1, so that a semiconductor product of this constitution is excellent in degree of integration, and as the semiconductor chips 2 are electrically connected to the solder balls 5 provided to the underside of the board 1, a signal route can be shortened.
Patent JP-S62166578-A (JP)
Title: Piezoelectric porcelain material
Inventor: FUJIMAKI HIROHIKO
IPC: C04B35/49
Filed: 1986-01-20
Abstract: PURPOSE:To obtain a dense porcelain which has high permittivity value, the possibility of a polarization at ambient temperature and a ready sintering in a zircon lead titanate compound by containing 0.05-10wt% of WO3 with respect to the whole composition and 0.05-7wt% of Bi2O3 with respect to the whole composition. CONSTITUTION:0.05-10wt% of WO3 with respect to the whole composition and 0.05-7wt% of Bi2O3 with respect to the whole composition are contained in zircon lead titanate. For example, 127.19g of PbO, 4.43g of SrCO3, 39.18g of ZrO2, 22.53g of TiO2, 4.00g of WO3 and 4.00g of Bi2O3 are prepared to obtain a composition of Pb0.95Sr0.05(Zr0.53,Ti0.47)O3 from PbO, TiO2 and ZrO2, frictionally pulverized for 24hr, and then temporarily baked at 800-1,000 deg.C for 4hr. The thus obtained reactive product is again frictionally pulverized for 24hr, molded, sintered at 1,100-1,300 deg.C in PbO atmosphere to obtain a disk having 20mm in diameter and 1mm in thickness.
Patent JP-H03214260-A (JP)
Title: Retrieving/displaying system for electronic circuit diagram
Inventor: UBUKATA MASARU
IPC: G06F17/30
Filed: 1990-01-19
Abstract: PURPOSE:To reduce the designing manhour of a circuit designer and to maintain the circuit quality by displaying collectively all electronic circuit diagrams which cover >=2 different pages and have the connecting relations among the circuit elements on an output device. CONSTITUTION:A signal name SIG given to an output terminal of a circuit element A is inputted to a connection retrieving part 3a of a picture data arithmetic processor 3 from a retrieving signal input device 1. The part 3a retrieves first the connecting relation in an electronic circuit diagram I only with the retrieving carried out in the same page and recognizes the presence of the connecting relation based on a fact that the pointed signal name SIG is given to the input terminals of circuit elements B and C. Then the part 3a retrieves a fact that the connecting relation is also secured among the circuit elements D, E and F of the electronic circuit diagrams II and III. These connecting relations are turned into the data so that the circuit diagrams I-III obtained through the editing and retrieving performed by an output picture producer can be displayed en bloc on the same screen. Then the picture output is sent to a batch display device 2. Thus the electronic circuits can be easily set and the circuit quality is maintained.
Patent JP-H04250473-A (JP)
Title: Method for controlling cooling fan of copying machine
Inventor: KAMIYAMA SHINICHI
IPC: G03G21/20
Filed: 1991-01-28
Abstract: PURPOSE:To compatibly accomplish the reduction in a cost, the reduction in noise and contamination in a copying machine by a cooling fan at the time of copying in a method for controlling the cooling fan of the copying machine. CONSTITUTION:This method includes a stage shown by S1 for discriminating whether or not the copying machine is during copying actions, stages shown by S2 and S3 for discriminating whether or not the acting history of the copying machine in a past fixed time satisfies a specified condition, and a stage shown by S4 for commanding the driving of the cooling fan based on the discriminated result at the stages S2 and S3 only when that the copying machine is during the copying actions is discriminated at the stage S1. At the stage S2, the acting history of the copying machine is set at the elapse time from stopping the cooling fan, and the acting history of the copying machine at the stage S3 is set at the number of sheets copied by the copying machine.
Patent JP-H05199504-A (JP)
Title: Digital video signal processing circuit
Inventor: ITANI TETSUYA
IPC: H04N19/80
Filed: 1992-01-21
Abstract: PURPOSE:To enable the transfer of resolution having bits more than the number of bits to be spriously transferred by one bit by returning to a video signal at a D/A converter and attenuating the 1/2 component of a quantized clock at a low-pass filter later. CONSTITUTION:This circuit is provided with an A/D converter 13 to convert the input video signal into a digital signal synchronously to a clock, frequency divider 15 to frequency divide the clock into two stages, and digital adder 16 to add the output of the A/D converter and the output of the frequency divider. Further, a means to transfer the signal after cutting the least significant bit of this digital adder 16, a D/A converter 19 to convert the digital signal into the video signal, and a second low-pass filter 20 to remove the frequency component of a frequency dividing period output from the output of the D/A converter are provided. After the video signal is quantized by the A/D converter with the resolution of bits more than the number of bits to be transferred just by one bit, the video signal is added to a signal having the amplitude of 1LSB in the 1/2 cycle of the quantized clock, the added signal is transferred while cutting off the LSB and after the signal is returned to the video signal, it is attenuated by the low-pass filter.
Patent JP-H03214877-A (JP)
Title: Magnetic recording and reproducing device with video signal system conversion function
Inventor: SUZUKI HIROAKI
IPC: H04N5/93
Filed: 1990-01-19
Abstract: PURPOSE:To facilitate a measure even when using a single signal system to a video signal adding circuit (OSD) circuit for display, and to reduce cost by adding or replacing a program content display or a display of the state of a magnetic recording and reproducing device to an output video signal. CONSTITUTION:When inputting an NTSC signal to a changeover circuit input terminal 12 and outputting a PAL signal from a video output terminal 11, when in a reproduction mode, switches 13, 14 are connected to an H side, a switch 15 is connected to an L side, the NTSC signal is converted to a PAL signal at a system conversion circuit 2, and the inputted signal is outputted as it is from an OSD circuit 1. Next, the OSD circuit is made to be in an adding video signal outputting mode when executing a state display or the display of the program contents, the video signal is added to the input signal or the video signal is replaced, and the program content is displayed. That is, the program display operation is executed even when the circuit 1 is in a single mode of PAL, NTSC.
Patent JP-S62165977-A (JP)
Title: Compound semiconductor device
Inventor: ASANO TETSUO
IPC: H01L29/80
Filed: 1986-01-17
Abstract: PURPOSE:To alleviate the load of a Schottky junction of a gate electrode of a metal-semiconductor FET formed on a compound semiconductor substrate by providing a protecting diode formed of the Schottky junction made of an same material as the gate electrode. CONSTITUTION:In a protecting diode 22 connected with the gate electrode 23 of a GaAs dual gate MES (metal-semiconductor) FET, an N-type first diffused region is formed on a semi-insulating GaAs substrate 2. The impurity density of the surface region of the region 37 is reduced in thickness. Then, electrode 4, 4 Schottky-junction with both ends of the region 3 are formed. Thus, since the diode 22 is Schottky-junctioned, the current of the moment that a surge being applied can be absorbed by one half to the electrode 23 and the other half to the electrodes of the diode 22, and the load of the Schottky junction of the gate electrode can be alleviated. A region 5 having a low impurity density on the surface of the region 3 corresponds to the depletion layer region at operating time, and since the impurity density is low, the capacity becomes small to reduce the deterioration of a noise factor.
Patent JP-H05192842-A (JP)
Title: Punching system
Inventor: KAKIMOTO MASAKAZU
IPC: B23Q7/00
Filed: 1992-01-21
Abstract: PURPOSE:To effectively and efficiently punch holes of different shapes by providing in parallel a plurality of punching machines having dissimilar punches and performing punching action, and disposing a high-speed conveying line which uses a linear motor interconnecting the punching machines. CONSTITUTION:A plurality of punching machines 20-24 having dissimilar punches and performing punching action are provided parallel to one another and a high-speed conveying line 12 is disposed which uses a linear motor interconnecting the punching machines 20-24. Works are placed on a linear motor pallet 12a which moves on the conveying line 12 and, as works are supplied to a vacant punching machine, holes of different shapes are punched through each work by the plurality of punching machines 20-24 in sequence. Workability is thereby enhanced and cost reduction is achieved.
Patent JP-H11199366-A (JP)
Title: Apparatus for pulling up single crystal silicon
Inventor: YOSHIMURA HIDETO
IPC: H01F6/00
Filed: 1998-01-20
Abstract: PROBLEM TO BE SOLVED: To make a single crystal silicon pulling up apparatus lightweight and compact and carry out cost down of the apparatus. SOLUTION: In this single crystal pulling up apparatus, incidental equipment of superconducting magnet 10 such as a cryogenic refrigerator 12 for cooling the superconducting magnet 10 or boards 11 of the superconducting magnet 10 (electric current board or measuring board) is provided in places other than upper surface of the superconducting magnet to make the upper surface of the superconducting magnet clear. Since stroke of a movable shaft can be shortened when single crystal silicon is taken out, strength and stiffness of the movable shaft, a strut and a base can be lowered. Thereby, the single crystal silicon pulling up apparatus can be made lightweight, compact and inexpensive.
Patent JP-S59134035-A (JP)
Title: Parking brake
Inventor: YAMAZAKI TAKEO
IPC: G05G11/00
Filed: 1983-01-21
Abstract: PURPOSE:To simplify structure and to reduce cost by coupling the first shaft to be decelerated through a drive section and second shaft to be coupled to the parking brake operating section through a oneway clutch having manual releasing mechanism. CONSTITUTION:First shaft 3 is decelerated by a drive section comprised of a reversible motor 1, worm 2 and wormwheel 4. Second shaft 5 is provided while facing with the first shaft 3 and a manual operation parking pedal 6 in parking brake operating section is secured to said shaft 5. Furthermore a oneway clutch 10 is provided at the joint between the first and second shafts 3, 5. Said oneway clutch 10 is comprised of ratchet wheel 11 to be fixed to the end of first shaft 3, outer race 12 to be inserted with said wheel 11 and manual releasing mechanism 16 where a knob 13 is projected from the outercircumference of outer race 12 to stop a pole 14 at the leading edge at the ratchet wheel 11.
Patent JP-H07215135-A (JP)
Title: Glove box installing structure
Inventor: YASUZAWA TAKAAKI
IPC: E05D7/10
Filed: 1994-01-28
Abstract: PURPOSE:To provide a glove box installing structure by which the number of part items is reduced and the structure is simplified and workability is improved. CONSTITUTION:In a glove box installing structure to install a glove box 1 in a fixed position of a lower panel 4, it has a rotary hinge part 3 integrally protrusively arranged from a bottom part of the glove box 1, a hinge receiving part on which the rotary hinge part 3 arranged on the lower panel 4 side can be installed and a hinge pressing-down piece 6 to hold the rotary hinger part 3 to the hinge receiving part so as to be rotatable and mountable and demountable. Thereby, since a pin like a conventional example becomes unnecessary, the number of part items is reduced, and the structure is simplified, and installing workability can be also improved.
Patent JP-H08202589-A (JP)
Title: Information processor and fault diagnostic method
Inventor: MATSUOKA HIROSHI
IPC: G06F11/30
Filed: 1995-01-24
Abstract: PURPOSE: To monitor and judge the presence or the absence of fault of a monitoring circuit by providing a means which judges the fault of the monitoring circuit in the case where there is no reset signal from the monitoring circuit within a standby period in a cold start mode, and starting a system in a hot start mode when the reset signal is received within the standby period. CONSTITUTION: When a CPU is reset, a start mode is judged by an MPU (step S1). When the hot start mode is judged by a watch-dog timer(WDT), etc., normal processing is executed (step S2), and when the start mode is judged to be the cold start mode, the system is turned into a standby state for the period enough for the WDT to operate (step S3). Then, when the WDT operates normally within the standby period, the CPU is reset, and when it is restarted, the system is tuned into the hot start mode. On the other hand, in the case where the WDT does not operate within the standby period, the WDT is judged to be faulty (step S4).
Patent JP-H06218611-A (JP)
Title: Ball end mill
Inventor: SAKAI SHIGERU
IPC: B23C5/10
Filed: 1993-01-21
Abstract: PURPOSE:To increase tool life and raise cutting efficiency in such machining as three-dimensional machining of a die by forming bottom edge in convex curvature as viewed from the tip of the tool and further setting a rake angle of the bottom edge at a negative angle. CONSTITUTION:A bottom edge 5B is formed in convex curvature, bulging on the forward side in tool rotation direction, as viewed from the tip of the tool 1 and the rake angle of the bottom edge 5B is set at a negative angle. Thereby the rake face 6 continuing from the bottom edge 5B thus gradually widens along the bottom edge toward depth of the bottom edge 5B. Accordingly, cutting chips formed by the bottom edge 5B and rubbing on the rake face 6 are subjected to stress such that the width is increased along the bottom edge 5B, as they flow into depth of the rake face. Consequently, the chips are broken into smaller pieces and thus the adhesion on the edge tips is prevented even at high speed cutting and the chipping is prevented.