baber/WOPTO huggingface dataset:
Patent TW-438621-B (TW)
Title: Purification method for contaminants caused by halogenated organic compounds
Inventor: KATAOKA NAOAKI
IPC: C02F1/70
Filed: 1998-01-26
Granted: 2001-06-07
Abstract: A method for purifying matter contaminated with a halogenated organic compound is disclosed. The method includes the step of adding a reducing agent and a nutritional source for a heterotrophic anaerobic microorganism to the contaminated matter. The reducing agent is reduced iron, cast iron, iron-silicon alloy and so on, or a water soluble compound. A combination of chemical reactions with microorganisms allows to decompose the halogenated organic compound. The nutritional source including an organic carbon and 20 to 50 percent by weight of an oxidized form of nitrogen is added, thereby preventing by products of the decomposition such as generation of noxious gases and decoloration of soil. A method includes the steps of mixing a reducing agent and a nutritional liquid with the contaminated matter, wherein the mixing step including a step of adjusting the contaminated matter at pH ranging from 4.5 to 9.0; and keeping the mixture in a condition that air hardly penetrates through a matrix, thereby allowing to uniformly mix a large amount of the contaminated matter.
Patent TW-393852-B (TW)
Title: A scanner with a self-propelled scanning module
Inventor: JIANG DE-MING
IPC: H04N1/04
Filed: 1998-02-25
Granted: 2000-06-11
Abstract: This invention is a scanner with a self-propelled scanning module, which contains a shell body, a transparent table disposed above the shell body for placing a document to be scanned, a rail mechanism  installed along the front-rear direction under the transparent table in the shell body, a scanning module mounted on the rail mechanism in a forward/backward movable way for scanning the document, and a driving equipment on the scanning module that consists of a wheel and a motor for moving the scanning module back and forth to scan the document. The rail mechanism contains two sliding mechanisms equipped on both left and right hand sides of the shell body and the left and right ends of the scanning module are mounted on the two sliding mechanisms in a forward/backward movable way. A guiding mechanism is installed along the front-rear direction in the shell body to work with the wheel such that the wheel can roll on the guiding mechanism to push the scanning module back and forth.
Patent TW-392014-B (TW)
Title: Apparatus for testing a quality of weld of a balancer in a drum type washing machine
Inventor: KIM JAE-SIN
IPC: D21F1/00
Filed: 1998-03-24
Granted: 2000-06-01
Abstract: An apparatus for testing a quality of weld of a balancer having a lower housing, an upper cover covering the lower housing, and balls accommodated in the lower housing, which is used in a drum type washing machine, is disclosed. The apparatus includes a jig on which a welded balancer is loaded, a water tub for containing water, a device for elevating/de-elevating the jig, and a device for injecting air into the balancer. An operator judges a normal status of weld of the balancer when bubbles are not generated in the water tub.
Patent TW-394920-B (TW)
Title: Driving circuit for active-matrix type liquid crystal display device
Inventor: NAKAMURA MIKA
IPC: G09G3/36
Filed: 1998-04-22
Granted: 2000-06-21
Abstract: By eliminating driver Ics from the components of a liquid crystal display device, the present invention makes it possible to make the thickness of a liquid crystal display device thinner, to eliminate a process of mounting driver ICs onto an array substrate, and to reduce the manufacturing cost. In an active-matrix type liquid crystal display device, a driving circuit has resistance-dividing type digital-analog conversion circuits, signal amplification elements to amplify the analog output voltage from the digital-analog conversion circuits, and liquid crystal display elements driven by the amplified analog output voltage. In the driving circuit, resistance elements R are formed in n+ layers of poly-silicon on an array substrate of the liquid crystal display device, and switching elements Tr and the signal amplification elements are formed on the array substrate.
Patent TW-480188-B (TW)
Title: Method for producing aqueous dispersion slurry of inorganic particles
Inventor: HATTORI MASAYUKI
IPC: B01F25/46
Filed: 1998-05-05
Granted: 2002-03-21
Abstract: The present invention provides production methods for aqueous dispersion slurry of inorganic particles which are so stable as not to increase in viscosity, gel or sediment even if stored for a long time and whose average particle diameter is 0.01 to 2 μm. As such production method, 2 production methods are available: a production method (A) having a preliminary dispersion process in which the inorganic particles are added to ad dispersed in an aqueous medium and a main dispersion process in which dispersed slurry out of the preliminary dispersion process are collided with each other under a pressure of 100 to 3000 kg/cm<SP>2</SP>; and A production method (B) in which the inorganic particles are added to an aqueous medium within a kneading tank of a kneader in which mixing blades rotate around respective subsidiary spindles and the subsidiary spindles revolves around a spindle and dispersed at a solid concentration of 30 to 70 wt%.
Patent TW-392249-B (TW)
Title: Method of removing polysilicon residue after formation of field oxide by wet etching
Inventor: JIN WEI-SHANG
IPC: H01L21/311
Filed: 1998-09-08
Granted: 2000-06-01
Abstract: A method of removing polysilicon residue after formation of field oxide by wet etching, which comprises: depositing a SiO2 pad layer on a silicon semiconductor substrate; forming a silicon nitride layer on the SiO2 pad layer; etching the SiO2 pad layer and the silicion nitride layer thereby defining an active device region in which a groove is formed beneath the silicon nitride layer; forming a polysilicon spacer on the periphery of the active device region and in the groove; carrying out an oxidation process by mounting the wafer in an oxygen-enriched high temperature environment where the silicon nitride layer is used as an oxidation protective mask to form a field oxide layer, in which the polysilicon spacer in the groove is not fully oxidized and forms a polysilicon residue in the groove; removing the silicon nitride layer by a wet etching process; cleaning the SiO2 pad layer with an etching-selective solvent to remove the polysilicon residue, in which the etching-selective means that the solvent has a higher etching rate to the polysilicon material than to the SiO2 material, where the ratio of the former to the later is designated as ERR; and removing the remaining SiO2 pad layer by a wet etching process.
Patent TW-388907-B (TW)
Title: Metal halide lamp
Inventor: TAKAHASHI KIYOSHI
IPC: H01J61/88
Filed: 1998-10-12
Granted: 2000-05-01
Abstract: A fill material 201 enclosed in an arc tube 201 with an inner diameter of 10.8 mm includes ScI3 argon, and mercury. A distance between electrodes 202 is set at 2.2 mm, and a distance between the inner wall of the arc tube 201 and the electrodes 202 is set at approximately 5.4 mm, which is approximately twice the distance between the electrodes 202. The lamp of the present invention is capable of forming thin arc and thereby achieving high luminance since only the metallic elements having an ionization potential of 6 eV or higher is contained in the fill material 207. The restriction of the short distance between the electrodes serves to stabilize arc. Scandium in the fill material serves to achieve a good color reproduction characteristic.
Patent TW-429686-B (TW)
Title: Circuit and method for generating clock
Inventor: SHIMIZU KAZUSADA
IPC: H03L7/06
Filed: 1998-10-26
Granted: 2001-04-11
Abstract: In order to reduce the multiplication number of the multiplier, the maximum delay time of a digital delay line 8 must be proportionally increased, which requires a great number of delay elements and a decoder. Because of a large occupying area of the delay elements and decoder, the circuit scale and even the cost of a chip are increased when the multiplication number of the frequency multiplied clock is reduced. A clock generator including a multiplier 11, a phase lock circuit 12 and a frequency divider 13. The multiplier 11 generates a frequency multiplied clock by multiplying the frequency of an input clock. The phase lock circuit 12 detects a phase difference between the input clock and a frequency divided clock, and generates, by delaying the frequency multiplied clock by an amount corresponding to the phase difference, a phase-locked clock with its phase locked with the input clock. In particular, the frequency divider 13 detects the phase-locked clock immediately before a falling edge of the input clock as a specific pulse, which is provided as a standard to classify the phase-locked clocks. Accordingly, this can reduce the phase difference between the input clock and the phase-locked clock, and shorten the maximum delay time of the digital delay line 8.
Patent TW-419814-B (TW)
Title: Manufacturing method of semiconductor device
Inventor: LEE DUCK-HYUNG
IPC: H01L21/8242
Filed: 1998-12-01
Granted: 2001-01-21
Abstract: The present invention relates to a manufacturing method of a semiconductor device for the simplification of the process during the selective silicidation of the highly integrated D-RAM or of an embedded D-RAM in which a D-RAM and a logic merged. The present invention provides a manufacturing method of a semiconductor device comprising the steps of: forming a gate electrode on a semiconductor board; forming a spacer at either wall of the gate electrode; forming an active region for source and drain inside the board on either edge of the gate electrode; forming an insulation layer on the entire board including the gate electrode and the spacer; etching the insulation layer more than deposition thickness and lefting self-aligningly on only the active region surface between the gate electrodes of a D-RAM cell formation part; and forming a silicide film respectively on the gate electrode surface of the D-RAM cell formation part, on the gate electrode surfaces of other optional regions and on the active region surface. According to the present invention, first, unnecessary are an ARL deposition process and an additional photo etching process during the etching of the isulation layer used as a SBL, and the simplification of the process and the reduction in costs can be achieved because the number of times the process is performed for the selective formation of the silicide film of the semiconductor device (e.g.: a D-RAM or an embedded RAM) can be decreased by one. Secondly, the faults in the process due to mis-alignment (e.g.: Either the silicide film does not form partially on the gate electrode 14 due to mis-alignment, or the silicide film forms partially on the active region like the source and drain region) and the faults in the process during the elimination of the ARL can be eliminated simultaneously, and the semiconductor that can be highly regarded can be obtained.
Patent TW-407237-B (TW)
Title: Image output device
Inventor: KANEKO KIYOSHI
IPC: A63F13/213
Filed: 1998-12-18
Granted: 2000-10-01
Abstract: The invention is to facilitate the required editing for the output image data by a simple structure with respect to an image output device. The solution of the invention is one image output device, which includes: a memory device 20 for memorizing image data; a function generator 40 for generating the indicated function H(x, y) on the required position of the XY address space with respect to the image data and synchronized read control of output XY plane; and an image data processor for processing the image process corresponding to the prescribed function value for the output image data in terms of the address space according to the prescribed function H(x, y) value; and to the synchronous read control of the output XY plane of the image data, with respect to the prescribed function H(x, y) value generated on the required position, processing various image processes for the output image data on real time basis.
Patent TW-408284-B (TW)
Title: Method and apparatus for displaying characters with voice therefore
Inventor: SONG JEFF
IPC: G06F9/06
Filed: 1998-12-21
Granted: 2000-10-11
Abstract: The invention is a method for displaying characters with voice and apparatus therefore, which discloses a technique that determines the operation content for character display (such as color change or agitation) according to the character voice length of each character section to adjust the speed and rhyme of display operation automatically; according to the technique disclosed in the invention, it includes: a memory unit which stores the respective data of the characters and one table for the voice of characters (such as the vowel of English characters), a logical process unit which is used to look up the voice length corresponding to the presently displayed character from the voice length table corresponding to each character before scanning, and calculate the display operation speed of each word in the display with respect to the related data of other displays, display each word on the display with respect to the respective voice speed via a display unit (such as the vowel of English characters).
Patent TW-465014-B (TW)
Title: Manufacturing method for capacitor of metal layer/ dielectric layer/metal layer and its structure after CMOS manufacturing process
Inventor: HE YAN-SHR
IPC: H01L21/70
Filed: 1999-02-01
Granted: 2001-11-21
Abstract: The present invention provides a kind of manufacturing method for capacitor and its structure. The method contains the following steps. The first metal composite layer is formed on a substrate and is followed by forming the dielectric layer on the metal composite layer through the second step. Then, the second metal composite layer is formed on the dielectric layer. After that, by using the second dielectric layer as the etching stop layer, the second metal composite layer is defined such that it is used for the upper electrode plate of capacitor. Photoresist pattern is then formed on the second metal composite layer and the first dielectric layer, in which an etching process is conducted to define the lower electrode plate of capacitor.
Patent TW-416050-B (TW)
Title: Semiconductor memory device
Inventor: TAKATA HIDEKAZU
IPC: G11C14/00
Filed: 1999-02-12
Granted: 2000-12-21
Abstract: The semiconductor memory device of this invention includes a capacitor, a first transistor, and a second transistor, wherein the capacitor includes a first electrode, a second electrode opposing the first electrode, and a ferroelectric film sandwiched by the first and second electrodes, and stores and holds binary information utilizing a polarizing state of the ferroelectric film, the first transistor includes a first electrode, a second electrode, and a gate electrode, the second electrode being connected to the first electrode of the capacitor, and the second transistor includes a first electrode, a second electrode, and a gate electrode, the first electrode being connected to the second electrode of the capacitor.
Patent TW-546287-B (TW)
Title: Process for producing carboxylic acid
Inventor: SHIH KUO-CHEN
IPC: C07C51/12
Filed: 1999-02-12
Granted: 2003-08-11
Abstract: The present invention relates to an improved process for producing an organic carboxylic acid having (n+1) carbon atoms by reacting an alcohol having n carbon atoms with carbon monoxide in the presence of a rhodium catalyst system. More particularly, the present invention relates to carbonylation of alcohol such as methanol catalyzed by a rhodium system to produce acetic acid. The characteristic of the present invention is the addition of a catalyst stabilizer in the reaction medium to avoid or to alleviate the precipitation of the catalyst in the liquid phase. The catalyst stabilizer as used herein is a pyridine derivative having substituent(s) of such as (CH2)mCOOR or (CH2)mSO3R (R=H or hydrocarbons; m=0-6).
Patent TW-429606-B (TW)
Title: Capacitor in an integrated circuit
Inventor: BRUCHHAUS RAINER
IPC: H01L21/02
Filed: 1999-03-16
Granted: 2001-04-11
Abstract: A capacitor in an integrated semiconductor-circuit includes a first electrode (8), which is through a terminal-structure (7) electrically connected with a doped-region (3); a second electrode (11); a capacitor dielectric (10), which is provided between said electrodes; and a barrier-layer (9). The barrier-layer (9) is basically composed of Ta-Me-N, wherein Me is an element or a combination of many elements from a group of transition-metal and/or the lanthanide.
Patent TW-580483-B (TW)
Title: Method of cleaning water piping and the cleaning agent thereof
Inventor: KOIKE HIROYUKI
IPC: C02F1/58
Filed: 1997-11-21
Granted: 2004-03-21
Abstract: The present invention relates to a method of cleaning water piping and the cleaning agent thereof for speeding up fight against veteran bacteria and other pollutions derived therefrom. In addition to sodium (Na), silicon (Si), aluminum (Al) and boron (B) included in the compositions of the cleaning agent, there are also silver (Ag) or copper (Cu) in the form of water-soluble amorphous cake, granule or powder being positioned in the water flowing through the water piping. Thereafter, one or more types of charged sodium, charged silicon, charged aluminum, charged boron, charged silver or charged copper contained in the water-soluble amorphous cake, granule or powder gradually dissolve in the water flowing through the water piping to clean the water piping while speed up fight against veteran bacteria.
Patent TW-518444-B (TW)
Title: Thin film transistor and producing method thereof
Inventor: KAWAKITA TETSUO
IPC: H01L29/786
Filed: 1999-05-25
Granted: 2003-01-21
Abstract: In producing a thin film transistor used for such devices as a large-sized liquid crystal display panel with a high pixel density, a leftover of an insulating film caused by insufficient etching and a loss of a semiconductor layer caused by overetching are prevented, and a reliable electrical contact between the source and drain electrodes and the semiconductor layer is achieved. These are achieved by (a) forming a contact hole region of a silicon film so that the region has a larger thickness, for example, by making the film to have a plurality of layers, and (b) providing a silicide layer between an electrode metal and the semiconductor layer.
Patent TW-445173-B (TW)
Title: Gas adsorbing concentrator
Inventor: YAMAUCHI HISASHI
IPC: B01J19/00
Filed: 1999-08-20
Granted: 2001-07-11
Abstract: The present invention provides a gas absorbing concentrator which can increase the concentration ratio, and can concentrate the vapor concentration of an organic solvent to a high concentration even when the vapor concentration of the organic solvent in air is low. A honeycomb-shaped adsorption rotor 1 is divided into an adsorption region 4 and three desorption regions 5, 6, 7. The air flowing out from the center of the desorption region 6 is made a high concentrated gas. The air containing gases separately flowing out from the two side desorption regions 5, 7 are recycled to the adsorption region 4.
Patent TW-501032-B (TW)
Title: Method and system in a computer network for the reliable and consistent ordering of client requests
Inventor: ELNOZAHY ELMOOTAZBELLAH N
IPC: G06F11/20
Filed: 1999-08-30
Granted: 2002-09-01
Abstract: A method and system for reliably and consistently delivering client requests in a computer network having at least one client connectable to one or more servers among a group of servers, wherein each server among the group of servers replicates a particular network service to ensure that the particular network service remains uninterrupted in the event of a server failure. A particular server is designated among the group of servers to manage client requests which seek to update a particular network service state, prior to any receipt of a client request which seeks to update the particular network service state by any remaining servers among the group of servers. Thereafter, an executable order is specified in which client requests which seek to update the particular network service state are processed among the remaining servers, such that the executable order, upon execution, sequences the client request which seeks to update the particular network service state with respect to all prior and subsequent client requests. The executable order and the client request which seeks to update the particular network service state are automatically transferred to the remaining servers from the particular server, in response to initiating the client request. Thereafter, the client request which seeks to update the particular network service state is processed in a tentative mode at the particular server without waiting for the executable order to be executed through to completion among the remaining servers, thereby promoting a reliable and consistent ordering of client request messaging deliveries and an overall reduction in server response time.
Patent TW-I227235-B (TW)
Title: Bicyclic nitrogen heterocycles
Inventor: HARRIS WILLIAM
IPC: A61P29/00
Filed: 1999-11-03
Granted: 2005-02-01
Abstract: Amino-substituted dihydropyrimido [4,5-d] pyrimidinones of the formula, in which R1 represents hydrogen, lower alkyl, aryl, aryl-lower alkyl, heteroaryl, heteroaryl-lower alkyl, lower cycloalkyl or lower cycloalkyl-lower alkyl, R2 represents lower alkyl, aryl, aryl-lower alkyl, heteroaryl, heteroaryl-lower alkyl, lower cycloalkyl or lower cycloalkyl-lower alkyl, and R3 represents hydrogen, lower alkyl, aryl, aryl-lower alkyl, heteroaryl, heteroaryl-lower alkyl, lower cycloalkyl, lower cycloalkenyl or lower cycloalkyl-lower alkyl, and pharmaceutically acceptable salts thereof are protein kinase inhibitors. They can be used in the treatment or prophylaxis of inflammatory, immunological, oncological, bronchopulmonary, dermatological and cardiovascular disorders, in the treatment of asthma, central nervous system disorders or diabetic complications or for the prevention of graft rejection following transplant surgery.
Patent TW-444451-B (TW)
Title: Discontinuous transmission on high speed data channels
Inventor: KUO WEN-YI
IPC: H04W92/10
Filed: 1999-11-08
Granted: 2001-07-01
Abstract: The present invention is a method for efficiently utilizing spectrum resources belonging to a wireless communications system in the presence of data channels through a discontinuous data transmission technique. The discontinuous data transmission technique involves the transmission of a flag over a control channel (or some other communication channel) in frame f, wherein the flag would indicate to an intended recipient that a transmitter has a data frame to transmit to the recipient in some future frame f+q. In an embodiment, the transmitter would subsequently transmit the data frame over a data channel (or some other communication channel) in frame f+q if the flag indicated that the data frame was ready to be transmitted. In another embodiment, the transmitter would not transmit the data frame unless the recipient has indicated (via another flag) that the recipient is ready to receive the frame of data from the transmitter.