Patent GB-1065074-A (GB)
Title: Epitaxial growth of semiconductor devices
IPC: H01L21/00
Filed: 1964-04-13
Abstract: <PICT:1065074/C6-C7/1> Ge is grown epitaxially on a monocrystalline Ge substrate having one surface coplanar with a crystal plane, by placing, in an evacuated enclosure, a Ge source body and the substrate having adjacent surfaces parallel and 0.1 - 2 mm apart, heating the substrate to a higher temperature than the source, and introducing I2 vapour at a pressure of 0.2 - 5 mm Hg. to transport material from source to substrate.  The substrate 12 may be placed in a quartz reaction vessel on a bed of cracked quartz, and is separated from source 13 by quartz ring 14 having slots 22 to allow non-turbulent entrance of I2 vapour. Surface 20 may be coplanar with the (110) or (111) crystal planes, and may be cleaned by heating in H2 or in vacuo, or in an argon glow discharge. Source 13 and substrate 12 are heated by R.F. induction coils around the vessel to 600 - 880 DEG C. and 870 - 930 DEG C. respectively.  I2 is generated by heating I2 crystals in a water bath, and reacts with Ge at 21 to form a Ge iodide which diffuses to surface 20 and decomposes to deposit Ge. Source and/or substrate may contain a doping impurity; that of the source is transferred to the substrate.  The process may be repeated using sources of different impurity concentration which may be mounted on a rotatable wheel operated through a vacuum-tight seal. A crystal having N-P-N layers so produced may be sliced to give semi-conductor devices.  In an alternative arrangement, Fig. 7 (not shown), an annular groove is cut in the face of the source, resulting in deposition of an annular ring and circular "mesa", which function as emitter and collector respectively in a transistor.  Reference has been directed by the Comptroller to Specification 916,887.ALSO:<PICT:1065074/C1/1> Si is grown epitaxially on a monocrystalline Si substrate having one surface coplanar with a crystal plane, by placing, in an evacuated enclosure, a Si source body and the substrate having adjacent surfaces parallel and 0.1-2 mm. apart, heating the substrate to a higher temperature than the source, and introducing I2 vapour at a pressure of 0.2-5 mm. Hg. to transport material from source to substrate. The substrate 12 may be placed in a quartz reaction vessel on a bed of cracked quartz, and is separated from source 13 by quartz ring 14 having slots 22 to allow non-turbulent entrance of I2 vapour.  Surface 20 may be coplanar with the (110) or (111) crystal planes, and may be cleaned by heating in H2 or in vacuo, or in an argon glow discharge.  Source 13 and substrate 12 are heated by R.F. induction coils around the vessel to 1000-1300 DEG  C. and 1370-1400 DEG  C. resp. I2 is generated by heating I2 crystals in a water bath, and reacts with Si at 21 to form a Si iodide which diffuses to surface 20 and decomposes to deposit Si. Source and/or substrate may contain a doping impurity; that of the source is transferred to the substrate. The process may be repeated using sources of different impurity concentration which may be mounted on a rotatable wheel operated through a vacuum - tight seal.  A crystal having N-P-N layers so produced may be sliced to give semi-conductor devices.  In an alternative arrangement (Fig. 7, not shown) an annular groove is cut in the face of the source, resulting in deposition of an annular ring and circular "mesa," which function as emitter and collector respectively in a transistor. Reference has been directed by the Comptroller to Specification 916,887.