baber/WOPTO huggingface dataset:
Patent TW-561066-B (TW)
Title: Process for producing spherical catalyst particles, catalyst particles and their use in a chemical synthesis
Inventor: STREBELLE MICHEL
IPC: B01J37/00
Filed: 1998-11-02
Granted: 2003-11-11
Abstract: Process for producing spherical catalyst particles containing a zeolite as active element, according to which a sol containing zeolite crystals and at least one gel-forming compound is sprayed from below directly into a reaction zone containing a reaction gas such that the sol breaks up into individual sol beads immediately before or upon entry into the reaction zone, the sol beads flow through the reaction zone on a curved trajectory, in so doing are pre-consolidated and the sol beads are collected on a collecting means.
Patent TW-402821-B (TW)
Title: Semiconductor device and method of manufacturing the same
Inventor: TAKAHASHI KENICHIRO
IPC: H01L21/336
Filed: 1998-11-13
Granted: 2000-08-21
Abstract: In a semiconductor device, a source diffusion layer is formed in a substrate, and a drain extended diffusion layer is formed in the substrate. A drain diffusion layer is formed in the extended drain diffusion layer. A reverse conductive type diffusion layer is formed adjacent to the drain diffusion layer in the extended drain diffusion layer. The reverse conductive type diffusion layer has a conductive type opposite to that of the extended drain diffusion layer. A main gate region is formed between the source diffusion layer and the drain extended diffusion layer on the substrate. A sub-gate region is formed between the reverse conductive type diffusion layer and the drain diffusion layer and on the extended drain diffusion layer.
Patent TW-445201-B (TW)
Title: Casting machine for casting sandalwood incense
Inventor: LIN SHI-JUAN
IPC: C06F1/00
Filed: 1998-11-18
Granted: 2001-07-11
Abstract: In place of the hand-made incense, a casting machine for casting sandalwood incense, especial for a cone shape incense, with automatic production method is invented. The casting machine has injection cylinders facing each other mounted on a machine table. A forming mold whose cavity is filled by the sandalwood is provided between the injection cylinders. The forming mold is withdrawn by the driving device, and then the cast sandalwood incense is ejected from the forming mold by the ejection device. The previous steps are then repeated for casting cycles.
Patent TW-416178-B (TW)
Title: Characterisation procedure for a voltage converter connected to a capacitive circuit
Inventor: REY OLIVER
IPC: G01P15/125
Filed: 1998-12-14
Granted: 2000-12-21
Abstract: The object of the procedure according to the present invention is to characterise a voltage or current converter (20) intended to be connected to a capacitive circuit (32) arranged so as to provide a capacitance difference (C1-C2) to the converter. Said converter is arranged so as to be able to receive the capacitance difference provided by the circuit, and to provide an output voltage (Vo) which is a function of the capacitance difference and a bias signal. This procedure is characterised in that it includes a sequence of steps which consist in varying the bias signal, while keeping the capacitance difference constant and measuring in response the output voltage. One advantage of such a procedure lies in the fact that it allows the electric performance of the converter to be determined independently of the error link to the capacitance measuring.
Patent TW-417404-B (TW)
Title: Projection display device and method therefor, and an image display device
Inventor: ITOH TAKAFUMI
IPC: H04N5/445
Filed: 1999-01-30
Granted: 2001-01-01
Abstract: The present invention provides a technology that enables projection images to be overlaid with embellishment effects without depending on the capabilities of the image supply apparatus. A projection display apparatus comprises: an embellishment effect memory for storing embellishment effect data representing an embellishment effect image that can be used to embellish an arbitrary image; an image embellishment section that generates embellished image data by overlaying an original image represented by the given image data and the embellishment effect image; a light modulation unit that is driven responsive to the embellished image data pixel by pixel; and an optical system for projecting onto the screen the embellished image obtained by the light modulation unit. A projection display apparatus superimposes the embellishment effect on the projected image without having to rely on the capabilities of an image supply apparatus.
Patent TW-404057-B (TW)
Title: A manufacture method of flash memory
Inventor: YE WEN-GUAN
IPC: H01L27/115
Filed: 1999-03-19
Granted: 2000-09-01
Abstract: A manufacture method of flash memory. Provide a semiconductor substrate with the memory circuit region and logic circuit region; after forming the tunnel oxide and floating gate on the memory circuit region, a layer of dielectrics is formed on the floating gate. There forms a layer of poly-silicon layer with two stages; after depositing the poly-silicon with half thickness, first vaccum the deposition environment; next, fill with the reactive gas to complete the deposition of poly-silicon. Define the poly-silicon to form the control gate in the memory circuit region. Form the gate of the MOS in the logic circuit region. Proceed implantation step to form the source/drain at the MOS gate and in the semiconductor substrate at both sides of the control gate. Next, form the self-aligned metal silicide.
Patent TW-396525-B (TW)
Title: Method for forming contact windows
Inventor: GUO JIAN-LI
IPC: H01L21/768
Filed: 1999-03-19
Granted: 2000-07-01
Abstract: A method for forming contact windows is provided, the critical process is to deposit a re-cover layer above cover layer, and the etching rate of re-cover layer is larger than cover layer. Said method includes the following processes at least. First form semiconductor structure on a wafer surface. Then form a cover layer above said wafer surface, which also cover the semiconductor structure. Thirdly, deposit a re-cover layer above forenamed cover layer, and the etching rate of re-cover layer is larger than cover layer. Finally, form the contact windows by etching process, with its opening located at the top of re-cover layer and its bottom is on the semiconductor structure or wafer surface. Because of the different etching rate between cover layer and re-cover layer, a smooth and aslant outwardly contact window pattern is obtained. Compare with traditional method, said method is more advantageous for the filling of these contact windows, therefor, said method is useful for deep sub-micron process.
Patent TW-491865-B (TW)
Title: Novel copolyester material having non-round cross-section
Inventor: YUO WU-BIN
IPC: C08G63/688
Filed: 1999-04-23
Granted: 2002-06-21
Abstract: New synthesis copolyester material for new copolyester staple fiber have non-round cross-section that are retained. These non-round cross-section fibers provide fabrics having outstanding comfort qualities of moisture-management, dryness and comfort, along with minimal pilling.
Patent TW-417315-B (TW)
Title: GaN single crystal substrate and its manufacture method of the same
Inventor: MOTOKI KENSAKU
IPC: H01L21/20
Filed: 1999-06-09
Granted: 2001-01-01
Abstract: The present invention provides a GaN single crystal substrate which is wide in area and is little in warp and can be freestanding by forming a mask having sawtooth-like or strip-like windows on the (111) GaAs substrate, making GaN buffer layers by an HVPE or an MOC, and a GaN externally extension layer is made at high temperature by HVPE method, and the GaAs substrate is removed. With the freestanding film of GaN as the epitaxial seed and made thicker by HVPE method to make a GaN ingot. And then it is cut and polished by a slicing machine to make a transparent colorless GaN wafer with substantially distortion-free.
Patent TW-432120-B (TW)
Title: Controlled addition of water during chemical vapor deposition of copper to improve adhesion
Inventor: ZHENG BO
IPC: C23C16/56
Filed: 1999-06-11
Granted: 2001-05-01
Abstract: A method and apparatus for improving the adhesion of a copper layer to an underlying layer on a wafer. The apparatus provides moisture to a CVD system at a controlled rate for a specific period of time. A moisture containing seed layer of copper is formed over a layer of material on a wafer. A moisture free copper bulk layer is then deposited on top of the copper seed layer. Repeatability of the deposition conditions is achieved by cleaning water vapor out of the system between depositions.
Patent TW-559684-B (TW)
Title: Collective substrate of active-matrix substrates, manufacturing method thereof and inspecting method thereof
Inventor: NAGATA HISASHI
IPC: G02F1/13
Filed: 1999-07-06
Granted: 2003-11-01
Abstract: A collective substrate of active-matrix substrates is divided into a first block and a second block. In cells of the first block and the second block, from a corresponding signal input pad group, an inspection scanning signal is inputted via a scanning-line short ring connecting line to scanning lines, an inspection display signal is inputted via a signal-line short ring connecting line to signal lines, and an auxiliary capacity wire signal is inputted via an auxiliary capacity wire main wire connecting line to auxiliary capacity wires. This arrangement makes it possible to perform an electrical inspection with high accuracy and efficiency on a large-format active-matrix substrate, and to manufacture an inspection probe frame in a simple manner at low cost.
Patent TW-426959-B (TW)
Title: Method of forming contact opening
Inventor: SHIAU SHI-MAU
IPC: H01L21/768
Filed: 1999-07-20
Granted: 2001-03-21
Abstract: A method of forming a contact opening comprises: forming a gate stack layer on a semiconductor substrate; forming a conformal silicon nitride layer on the whole substrate; etching back in a blanket fashion to remove only a portion of the gate stack layer and the silicon nitride layer in the vertical direction on the substrate without affecting the silicon nitride layer in the side direction; covering an insulating layer on the substrate; removing a portion of the insulation layer and the silicon nitride layer; forming a contact opening between the gate stack layer to expose the substrate, while forming a sidewall spacer on the sidewall at the junction between the contact opening and the gate stack layer.
Patent TW-444189-B (TW)
Title: System and method for extending the operating life of a magnetoresistive transducer provided in a disk drive system
Inventor: OTTESEN HAL HJALMAR
IPC: G11B5/596
Filed: 1999-08-18
Granted: 2001-07-01
Abstract: An apparatus and method for extending the service life of an MR element incorporated in a read/write head involves detecting periods of disk drive system inactivity and selectively switching between the heads for purposes of reading servo information during the inactive periods. Switching between heads may involve selecting each of the heads for reading servo information during one or more periods of disk drive system inactivity or selecting each of the heads in sequence during a respective period of system inactivity. Selecting between heads may also involve selecting a head having a minimum of usage, such as a head having an MR element with a minimum of cumulative operational time or energy dissipation relative to other MR elements provided in the disk drive system. Selecting between heads may further include selectively activating each of the heads for reading servo information for a predetermined duration of time during one or more periods of system idleness. An alternative method involves moving the head to a target location, such as a location of maximum head-to-disk clearance, over a surface of a data storage disk, and reducing the servo sampling rate during a period of system inactivity. Reducing the servo sampling rate involves reducing the rate from a nominal number of servo samples per disk revolution to a reduced number of servo samples per disk revolution, such as one servo sample per disk revolution. The MR elements may be selectively activated during idle periods so as to further reduce usage of the MR elements.
Patent TW-442786-B (TW)
Title: Single objective lens optical pick-up head
Inventor: CHANG HUNG-LU
IPC: G11B7/139
Filed: 1999-08-25
Granted: 2001-06-23
Abstract: The present invention is an optical pick-up head with a single objective lens, which discloses an optical pick-up head that can retrieve data from CD and DVD with different thickness using a single objective lens and special optical element on the optical path of the optical pick-up head. This optical element is a three-beam grating which is formed a reflective film and a clear aperture thereon, for example, by coating a metal or dielectric layer then etching a clear aperture to achieve the goal of controlling the numerical aperture. Thus, this invention provides a single objective lens optical pick-up head with simple structure, low cost, easy assembling, and applications to multi-wavelength system.
Patent TW-464806-B (TW)
Title: Method for detecting and installing peripheral devices
Inventor: JANG YAN-CHUEN
IPC: G06F13/00
Filed: 1999-11-03
Granted: 2001-11-21
Abstract: There is provided a method for detecting and installing peripheral devices, comprises determining a software deliverable matrix by hardware specification; establishing a stock keeping unit (SKU) based on the software deliverable matrix; then, using a detection software to detect the peripheral devices; and finally installing the software or driver of the peripheral device based on the installation program. The method can avoid repeatedly establishing stock keeping units (SKUs) and reduce the system maintenance cost.
Patent TW-454203-B (TW)
Title: Circuit for resetting a pair of data buses of a semiconductor memory device
Inventor: SUGAMOTO HIROYUKI
IPC: G11C11/407
Filed: 1999-12-08
Granted: 2001-09-11
Abstract: A semiconductor memory, such as an SDRAM, includes a data bus pair, a first reset circuit, a second reset circuit and a control circuit. The first reset circuit is connected between the buses of the data bus pair and resets the buses at a first potential. The second reset circuit is also connected between the data buses and resets the buses at a second potential. The control circuit is connected to the first and second reset circuits and activates the first reset circuit and deactivates the second reset circuit prior to a write operation. The control circuit further deactivates the first reset circuit and activates the second reset circuit prior to a read operation.
Patent TW-460807-B (TW)
Title: A system, method and article of manufacture for a goal based educational system with support for dynamic media control
Inventor: LANNERT ERIC JEFFREY
IPC: G09B7/04
Filed: 1999-12-22
Granted: 2001-10-21
Abstract: A system is disclosed that provides a goal based learning system utilizing a rule based expert training system to provide a cognitive educational experience. The system provides the user with a simulated environment that presents a business opportunity to understand and solve optimally. Mistakes are noted and remedial educational material presented dynamically to build the necessary skills that a user requires for success in the business endeavor. The system utilizes an artificial intelligence engine driving individualized and dynamic feedback with synchronized video and graphics used to simulate real-world environment and interactions. Multiple ""correct"" answers are integrated into the learning system to allow individualized learning experiences in which navigation through the system is at a pace controlled by the learner. A robust business model provides support for realistic activities and allows a user to experience real world consequences for their actions and decisions and entails realtime decision-making and synthesis of the educational material utilizing simulated human conversations.
Patent TW-429619-B (TW)
Title: Method of forming memory cell
Inventor: LUNG SHIANG-LAN
IPC: H01L27/11
Filed: 1999-12-24
Granted: 2001-04-11
Abstract: This invention provides the method for forming memory cell and at least includes the followings. At first, a substrate is provided and a layer of dielectric structure is formed on substrate. A conduction layer and a polish stop layer are sequentially formed on the dielectric structure layer. Pattern of bit line is defined on substrate and bit line is formed. After that, spacer is formed on sidewalls of conduction layer and polish stop layer, and is followed by performing the salicide process. On the bit line, an oxide layer is filled in. Chemical mechanical polishing process or etching process is then performed onto this oxide layer till reaching the etch stop layer. Finally, the polish stop layer is removed and a word line is formed by depositing a layer of polysilicon.
Patent TW-451379-B (TW)
Title: Efficient parallel testing of integrated circuit devices using a known good device to generate expected responses
Inventor: ROY RICHARD S
IPC: G01R31/319
Filed: 2000-02-25
Granted: 2001-08-21
Abstract: A system for testing integrated circuit devices is disclosed in which a tester communicates with a known good device through a channel. Tester-DUT interface circuitry is provided for monitoring the channel while the tester is writing data as part of a test sequence to locations in the known good device. In response, the interface circuitry writes the data to corresponding locations in each of a number of devices under test (DUTs). The interface circuitry monitors the channel while the tester is reading from the locations in the known good device (KGD), and in response performs a comparison between DUT data read from the corresponding locations in the DUTs and expected responses obtained form the KGD.
Patent TW-451431-B (TW)
Title: Semiconductor device
Inventor: SAKAGUCHI SADANORI
IPC: H01L27/11
Filed: 2000-03-28
Granted: 2001-08-21
Abstract: Contact holes which reach source/drain regions shared by access transistors and driver transistors are formed in a self-alignment manner with a silicon nitride film for covering gate electrodes. Therefore, contact plugs formed in the contact holes have an L plan shape. As a result, semiconductor device including an SRAN can be obtained in which the transistor performance of both the access transistors and the driver transistors is improved and the difference in voltage dependence properties between the driver transistors and the load transistors is improved.
Patent TW-466692-B (TW)
Title: A method of manufacturing a semiconductor device
Inventor: DRUIJF KLAAS GERBRAND
IPC: H01L27/115
Filed: 2000-03-29
Granted: 2001-12-01
Abstract: In a method of manufacturing a semiconductor device, in particular an integrated circuit, in a superficial silicon layer of a wafer, the superficial silicon layer is provided at a surface with a component comprising an area of silicon, which area is at least substantially marked by insulating material and covered with a high-resistivity (C49) phase of titanium silicide. The wafer is subjected to a phase transformation anneal to transform the high-resistivity (C49) phase of titanium silicide into a low-resistivity (C54) phase of titanium silicide. In order to promote the transformation of the high-resistivity (C49) phase of titanium silicide into the low-resistivity (C54) phase of titanium silicide, the area is provided with an extension of silicon, which extension is at least substantially marked by insulating material and covered with the high-resistivity (C49) phase of titanium silicide, the extension being relatively large compared to the area.
Patent TW-484337-B (TW)
Title: Loudspeakers
Inventor: FORDHAM JULIAN
IPC: H04R9/06
Filed: 2000-04-28
Granted: 2002-04-21
Abstract: A bending-wave panel loudspeaker comprising a bending-wave panel and an electrodyramic exciter attached to the panel to vibrate the panel, the exciter comprising a magnet assembly and a voice coil assembly, the exciter being attached to the panel via the voice coil assembly, characterised in that the panel within the ring contact of the voice coil is dished.
Patent TW-440911-B (TW)
Title: Method for breaking the geometrical limitation in the semiconductor photolithography process
Inventor: WEI HUNG-JI
IPC: H01L21/00
Filed: 2000-05-12
Granted: 2001-06-16
Abstract: The present invention discloses a method for breaking the geometry limitation in the semiconductor photolithography process. In the process for manufacturing semiconductor devices, a process for etching the sidewall is additionally provided after the photolithography and etching step and before peeling off the photoresist. Therefore, the spacing or line width between adjacent devices can be reduced, such that the geometrical dimension of the device can further break the limitation of the photolithography process. The present invention is characterized in being compatible with the existing semiconductor process, so as not to add manufacturing difficulties, influence the yield and increase too much additional manufacturing cost.
Patent TW-581912-B (TW)
Title: Active matrix substrate, method of manufacturing same, and flat-panel image sensor
Inventor: IZUMI YOSHIHIRO
IPC: G02F1/1333
Filed: 2000-06-07
Granted: 2004-04-01
Abstract: In an active matrix substrate, a glass substrate is provided with TFTs having gate electrodes connected to scanning lines also provided on the glass substrate. The glass substrate is further provided with auxiliary capacitance lines, formed on the same layer as the scanning lines. Further, pixel electrodes connected to drain electrodes of the TFTs are formed on the same layer as signal lines connected to source electrodes of the TFTs. An insulating layer is provided between the layer forming the signal lines and pixel electrodes and the layer forming the drain and source electrodes. Since the insulating film is present between the signal lines and the scanning and auxiliary capacitance lines, influence on the auxiliary capacitance value can be reduced, as can a signal line capacitance value. As a result, even when the auxiliary capacitance value is increased, the signal line capacitance value remains small.
Patent TW-464820-B (TW)
Title: Method to make windows 9X and NT 4.0 system coexistent
Inventor: WANG TZE-SHIAN
IPC: G06F19/00
Filed: 2000-07-04
Granted: 2001-11-21
Abstract: It is a method to make windows 9X and NT 4.0 system coexistent which applies to the time that the original hard disk image data writes into the target hard disk. The method first writes image data into the target hard disk and finds out the booting file that records hard disk parameters in the target hard disk. When the booting file does not exist, it sends an error hint message and ends. Besides, it finds out hard disk parameters of the target hard disk and writes hard disk parameters of the target hard disk into the booting file when the booting file exists.
Patent TW-493232-B (TW)
Title: Etching aluminum over refractory metal with successive plasmas
Inventor: HARRY HARUHIRO
IPC: C23F4/00
Filed: 2000-08-16
Granted: 2002-07-01
Abstract: A process and apparatus for etching an exposed region of a multi-layer metal having at least two layers: a layer of aluminum or aluminum alloy, and an underlying layer of refractory metal. The etching process includes at least two steps. In a first step, the aluminum layer is etched by processing the substrate with a first plasma chemistry that etches aluminum. Optionally a portion, but not all, of the refractory metal layer also is etched by the first plasma chemistry. In a subsequent second step, the remainder of the refractory metal layer is etched by a second plasma chemistry that etches the lower refractory metal much faster than it etches aluminum. The invention minimizes undercutting of the aluminum side wall as the refractory metal layer becomes depleted.