baber/WOPTO huggingface dataset:
Patent TW-357349-B (TW)
Title: Input buffer of memory device for reducing current consumption in standby mode
Inventor: CHOI JAE-MYOUNG
IPC: G11C7/10
Filed: 1997-11-22
Granted: 1999-05-01
Abstract: An input buffer of memory device for reducing current consumption in standby mode, comprising a bus input buffer for inputting successvie bus data signals through a bus and buffering the inputted bus data signals, and a flag buffer for generating a control signal in response to a system clock signal and a flag signal indicative of a bus data input time point to operate the bus input buffer before a first one of the bus data signals arrives at the bus input buffer and to allow the bus input buffer to enter a standby mode at once after the bus data signal input is completed, the flag signal being enabled before the first bus data signal is inputted and disabled before the bus data signal input is completed.
Patent TW-387075-B (TW)
Title: Memory controller with queue and snoop tables
Inventor: LEUNG WAN L
IPC: G06F12/08
Filed: 1997-12-17
Granted: 2000-04-11
Abstract: A memory controller having request queue and snoop tables is provided for functining with bus interface units interposed between a multiple processor bus and individually coupled to the respective processors in a complex incorporating a multitude of processors, where each bus interface unit includes bolck snoop control registers responsive to signals from a system memory controller including enhanced function supportive of I/O devices with and without block snooping compatibility. The tables are compared to minimize and more efficiently institute snoop operations as a function of the presence or absence of the same listings in the tables. The BIU provides functionality for the bus of the multiple processors to be processor independent. This architecture reduces the number of snoop cycles which must access the processor bus, thereby effectively increasing the available processor bus bandwidth. This in turn effectively increases overall system performance.
Patent TW-381979-B (TW)
Title: Thin steel plate production method and apparatus in a continuous casting machine
Inventor: PLESCHIUTSCHNIQQ PROF DR TRITZ
IPC: B22D11/128
Filed: 1997-12-20
Granted: 2000-02-11
Abstract: A kind of thin steel plate production method and apparatus in a continuous casting machine which is applicable to a thin steel plate apparatus with solidification thickness of 60~120 mm, maximum casting speed at 10m/minute and maximum casting capacity around 3 million tons per year. The apparatus employs the first section (0) of strip guide, which is moving vertically below the ingot mold, for continuous shrinking ( cast-rolling ) of steel strip to ensure the best surface and internal quality of steel strip; the section (1) under the first section (0) can produce the curvature of steel strip through several curved points of inner arc and the steel strip will be bent back to horizontal plane by several bent-back points before final solidification. The features of invented method and apparatus for single strand of continuous casting apparatus have the following: one vertical ingot mold of 1.2 m length which is recessed and opened to at most 80 mm along the horizontal direction of casting level; with a hydraulic driver and the exit thickness of ingot mold at the narrower side is 100 mm; with a section (0) of 3 meters long being designed as a palate to reduce the strip width from 100 mm to 30 mm at maximum 1.11 mm/second deformation speed; the section (1) has five bending points and the section (4) has five straightening points, while the sections (5)~(13) are in the horizontal zone of the strip guide.
Patent TW-364145-B (TW)
Title: Display device comprising an anti-static, anti-reflection filter and a method of manufacturing an anti-reflection filter on a cathode ray tube
Inventor: VAN DE POEL ANGELA CELINA LUDOVICA
IPC: H01J29/28
Filed: 1998-01-07
Granted: 1999-07-11
Abstract: A display window of a display device is provided with anti-static, anti-reflective filter. Said filter comprises a conductive layer including metal particles and transparent particles, which layer is covered with a further transparent layer. The metal particles are responsible for the conduction which is preferably below 1000 ohm, the transparent particles are responsible for the transmission of light. The assembly of the conductive layer and the transparent cover layer has a very low reflection, preferably below 1%.
Patent TW-376650-B (TW)
Title: Moving image estimating system and moving image estimating method
Inventor: SEKIGUCHI SHUNICHI
IPC: H04N19/51
Filed: 1998-02-10
Granted: 1999-12-11
Abstract: To achieve an encoding system including a highly efficient prediction performed in response to the content of a scene, a significance, and a motion characteristic of a moving picture and the like, memories a, b, c, motion compensator 5 responsive to an arbitrary transform parameter representing the motion of a prediction picture segment for generating a predicted picture by using arbitrary data stored in the memories a, b, c based upon the transform parameter, and memory update unit 15 for allowing the content of one or more of the memories to be updated at an arbitrary period of time, are provided.
Patent TW-376558-B (TW)
Title: Method of testing memory operations employing self-repair circuitry and permanently disabling memory locations
Inventor: IRRINKI V SWAMY
IPC: G01R31/28
Filed: 1998-05-04
Granted: 1999-12-11
Abstract: A test method for a memory device wherein failures that may only occur under specified worst-case conditions are converted to hard functional failures. These locations are subsequently detected and remapped by built-in self test (BIST) and built-in self-repair (BISR) circuitry. First, a test suite is performed on a memory array which includes redundant row and column locations. Typically, this test suite is performed under conditions which are most likely to induce failure. Row and column locations that are determined to be malfunctioning are scanned out of the memory device, along with the number of available redundant rows and columns. If there are sufficient redundant locations, the failing rows and columns are permanently disabled by blowing each of the corresponding fuse links. When power is subsequently applied to the memory device, BIST will detect rows and columns, including those permanently disabled, with hard functional failures. Accesses to these locations may then be redirected by BISR circuitry. The test suite may then be re-executed, and the device deemed defective if additional errors are found. Rows and columns in the memory array that are prone to failure are thus never enabled. Additionally, the BIST and BISR circuitry provides the ability to verify basic memory functionality and remap failing addresses on each applications of power to the device. Test coverage of the memory array is advantageously increased. A method of testing a memory device, said memory device including a memory array including a plurality of rows, comprising: performing a given test on said plurality of rows under a particular set of operating conditions; determining that a particular row within said plurality of rows is malfunctioning in response to results from said given test; permanently disabling memory accesses to said particular row; performing a self-test operation upon said memory array in response to an application of power to said memory device during normal operating conditions, wherein said self-test operation identifies any malfunctioning rows within said memory array including said particular row, and wherein said self-test operation is performed subsequently to said permanently disabling memory accesses to said particular row; and enabling a redundant row for each of said malfunctioning rows.
Patent TW-398100-B (TW)
Title: Integrated optical time delay unit
Inventor: WICKHAM MICHAEL G
IPC: H04B10/43
Filed: 1998-06-09
Granted: 2000-07-11
Abstract: A True Time Delay system for creating variable time delays of an optical signal suitable for use with a phased array antenna system in order to avoid beam-squint in broadband applications. The TTD is adapted to be integrated on a planar silica waveguide in order to substantially reduce the package size of the device. In one embodiment of the invention, the TTD is formed from a polarization beam splitter, a polarization rotator and a spiral waveguide. In an alternate embodiment of the invention, the TTD includes a polarization sensitive Mach Zehnder interferometer, a quarter wave polarization rotator and a spiral waveguide. In both embodiments of the invention Bragg relfective gratings are written into the spiral waveguide at different spacings to reflect optical signals of different wavelengths to create various time delays.
Patent TW-432465-B (TW)
Title: Lead frame, manufacturing method of a lead frame, semiconductor device, assembling method of a semiconductor device, and electronic apparatus
Inventor: OHSAWA KENJI
IPC: H01L23/50
Filed: 1998-06-30
Granted: 2001-05-01
Abstract: A manufacturing method of a lead frame, comprising the steps of: forming metal films to constitute bumps by plating at positions on a base made of a metal that allow the bumps to be bonded to at least respective electrodes of a semiconductor chip; and forming, by plating with a metal, a circuit wiring including inner leads so that the inner leads are connected to the respective metal films.
Patent TW-403720-B (TW)
Title: Oxygen generating agent, carbon dioxide gas absorbent, the transport system and the transport method of living fish
Inventor: YOSHIDA KIYOSHI
IPC: B01J20/04
Filed: 1998-09-04
Granted: 2000-09-01
Abstract: This invention provides an effective oxygen generating agent, carbon dioxide gas absorbent and the transport system and the transport method of living fish. The oxygen generating agent of this invention is through a kind of cup method where the humidity (40 DEG C, 90% RH) is over 20 g/m<2>/24 hr and which uses the humid permeable water impermeable material, at normal pressure, to package the solid peroxides and peroxide decomposing catalysts. Besides, the carbon dioxide gas absorbent is a gas-permeable water impermeable material with the Gurley's gas permeability (JIS P8117) of 0.1-3000 sec/ air 100 ml at normal pressure to package the alkaline earth metal hydroxides and/or oxides. Also, the transport system of living fish is to seal the oxygen generating agent and the carbon dioxide absorbent agent into each transport bag.
Patent TW-546255-B (TW)
Title: Process of separating vaporous phthalic acid anhydride from a gas stream
Inventor: BIRKE GERHARD
IPC: C07C51/573
Filed: 1998-09-17
Granted: 2003-08-11
Abstract: For cooling purposes, the gas stream containing vaporous phthalic acid anhydride (PA) is introduced into a cooler, which in its lower portion gas a vertical tube. The tube and its upper orifice are surrounded by an indirectly cooled fluidized bed, whose temperature lies in the range from 20 to 90 DEG C, and to which fluidizing gas is supplied from the bottom. The suspension density of the fluidized bed lies in the range from 300 to 700 kg/m<3>, the inner portion of the tube has no fluidized bed. The gas stream containing vaporous PA flows upwards in the vertical tube into the cooler, where from the fluidized bed throught the orifice of the vertical tube granules of the fluidized bed are constantly introduced into the gas stream and are supplied to a settling space disposed in the cooler upstream of the tube above the fluidized bed. The vaporous PA is cooled and solidified. Solidified PA at least partly drops from the settling space onto the fluidized bed, and granules containing PA are withdrawn from the fluidized bed.
Patent TW-385580-B (TW)
Title: Surface emitting laser and its manufacturing process
Inventor: KANEKO TAKEO
IPC: H01S5/42
Filed: 1998-09-30
Granted: 2000-03-21
Abstract: The present invention provides a surface-emitting laser wherein the transverse modes are controlled and phase-synchronized laser beams are emitted from a plurality of light-emitting portions to produce what appears to be a single laser beam, and a method of fabrication thereof. This laser comprises a columnar portion (20) forming part of a reflective mirror on a light-emitting side, an embedding layer (22) surrounding the periphery of the columnar portion (20), an upper electrode (23) formed on the columnar portion (20) and the embedding layer (22), and an insulating layer (18) formed below the columnar portion (20) and the embedding layer (22). A plurality of aperture portions (23a) are formed in the upper electrode (23) above the columnar portion (20), and aperture portions (18a) are formed in the insulation layer (18) at positions corresponding to the aperture portions (23a). The absolute refractive index of the embedding layer (22) is slightly smaller than that of the columnar portion (20), so that the transverse modes are controlled thereby.
Patent TW-401541-B (TW)
Title: A method and apparatus for scan testing dynamic circuits
Inventor: PARVATHALA PRAVEEN
IPC: G01R31/3185
Filed: 1998-11-24
Granted: 2000-08-11
Abstract: A method and apparatus comprising a first circuit configured to receive a mode signal and generate a first signal and a second signal, the first circuit being configured to deassert the first signal and the second signal when the mode signal is in a first state; a first scan cell configured to latch a first input in response to the first signal and to latch a second input in response to third signal to produce a first latched signal on a first output, the first scan cell configured to drive a second output in response to a fourth signal, wherein the second input and the second output are coupled to a scan chain; a dynamic circuit having a dynamic node, the dynamic circuit being configured to receive the first output and the second signal, to precharge the dynamic node in response to the second signal being deasserted, and produce a data on the third output in response to the second signal being asserted and the state of the dynamic node; and a second cell configured to latch the data in response to the second signal being desserted.
Patent TW-413819-B (TW)
Title: Write-in control circuit for semiconductor memory device
Inventor: UESUGI KENYA
IPC: G11C16/02
Filed: 1999-01-19
Granted: 2000-12-01
Abstract: A write control circuit that generates a control signal to initiate a write operation for a semiconductor memory device, such as an EEPROM, compensates for fluctuations in the supply voltage. The write control circuit includes a control potential generator that produces a first control potential which is kept higher than the ground potential and a second control potential which is kept lower than the supply potential. A first transistor is connected to the supply potential and receives a write potential at its gate. A second transistor is connected between the first transistor and ground and receives the first control potential at its gate. A third transistor is connected to the supply potential and receives the second control potential at its gate. A fourth transistor is connected between the third transistor and ground and receives a potential from a first node between the first and second transistors at its gate. The control signal is generated at a second node between the third and fourth transistors. The control signal is activated when the write potential reaches a certain value.
Patent TW-469280-B (TW)
Title: Method for producing aqueous emulsion of polyurethane
Inventor: NAKAMAE MASATO
IPC: C08G18/12
Filed: 1999-01-25
Granted: 2001-12-21
Abstract: Provided is a method for producing a polyurethane (PU) emulsion having good solvent resistance and water resistance and having good compatibility with other aqueous emulsions to give stable mixtures with them. The method comprises reacting (A) a PU prepolymer having an isocyanate group in the molecule, (B) a modified PVA having at least one member selected from the group consisting of an amino group, a primary hydroxyl group and an acetoacetyl group and (C) a low-molecular compound having an amino group and/or a hydroxyl group, in an aqueous medium.
Patent TW-455670-B (TW)
Title: Refrigerator
Inventor: KUSUNOKI ATSUSHI
IPC: F25D21/00
Filed: 1999-03-16
Granted: 2001-09-24
Abstract: There is provided a refrigerator capable of reducing or eliminating the rise of the intra-compartment temperature during a defrosting operation by means of a defrosting heater and capable of preventing the temperature of foods from rising after the defrosting operation. The refrigerator sets temperature for ending a freezing mode during a pre-cooling operation at pre-cooling freezing mode ending temperature which is lower than temperature during a normal operation by a predetermined amount and conducts an alternate cooling operation until the pre-cooling operation ends based on the pre-cooling freezing mode ending temperature.
Patent TW-469277-B (TW)
Title: Blocked oligomeric isocyanates and production thereof
Inventor: DANNER BERNARD
IPC: C08G18/28
Filed: 1999-04-09
Granted: 2001-12-21
Abstract: Self-dispersible mixtures (G) of oligomeric isocyanates (C) reacted in part with polyethylene glycol monoalkyl ether (A), which optionally contains propyleneoxy units, and optionally with a chain extender (K) and exhaustively blocked with an isocyanate-blocking pyrazole (B) are useful as auxiliaries in the finishing of fibrous material with oleophobicizing and/or hydrophobicizing finishes (F) comprising fluorocarbon polymers.
Patent TW-460805-B (TW)
Title: Identifiable remote interactive learning system
Inventor: CHEN DE-HUAI
IPC: G06F15/173
Filed: 1999-11-19
Granted: 2001-10-21
Abstract: An identifiable remote interactive learning system includes the host system, remote receiver and remote signal transmitter. The host system is embedded with the microprocessor of the control instrument or microcomputer used to connect with the relevant operating software of the remote receiver, the embedded interactive learning system and so forth. The remote receiver is embedded with a wireless transmission device, providing half duplex or full duplex signal transmission and reception, capable of receiving the sending signal of the bundled remote signal transmitter and decoding the source transmitter code and button pressing status of the signal. The remote receiver is connected to the microcomputer host to receive the control signal coming from the microcomputer host or forward the message from the remote transmitter to the host. The remote signal transmitter is embedded with a wireless transmission device, providing half duplex transmission or full duplex reception and signal transmission functions, in which the transmitter panel is installed with several buttons and indicators. Each one has the sole identification code. When pressing button of transmitter to send signal to the bundled remote receiver, the signal contains identification code and press button code. The microcomputer host and several remote receivers in connection with the microcomputer host are integrated with a set of palm type remote signal transmitters with individual identification codes. Within the same operation space, the receiver can receive and identify the remote signals transmitted from different signal transmitters. After decoding and transmitting to the microcomputer host via communication interface, the remote interactive learning goal can hereby be achieved.
Patent TW-429169-B (TW)
Title: Method for forming electrode with dipping end used for long-shaped surface mounted device that needs coated conduction metal on both ends and the apparatus for performing this method
Inventor: LIAU TZUNG-BIN
IPC: H01G13/00
Filed: 1999-11-19
Granted: 2001-04-11
Abstract: The characteristics included in the invented method for forming electrode with dipping end used for long-shaped surface mounted device (SMD) that needs coated conduction metal on both ends are shown in the following. The first sticking tape procedure is performed to stick tape on the first surface of matrix-shaped fixture board that has multi guiding holes of guide embedding-board for SMD. For the first shaking to give material procedure, the first end surface of SMD stated above is made to bond with tape stated above by shaking and making SMD fall down inside multi guiding holes of guide embedding-board for SMD on the fixture board. The first pre-press procedure is conducted onto the second end surfaces of SMDs, which are accepted inside multi guiding holes of guide embedding-board for SMD on the fixture board. For the first dipping procedure, after the fixture board is sucked in the manner of vacuum sucking, the second end surface of SMD is dipped into the paste slot of conduction metal by facing downward and is pulled out again. The first re-dipping procedure is used to modify the end electrode shape of SMD by performing the same procedure of dipping fixture board into the paste slot of conduction metal. The first baking procedure is performed onto the second end surface of the dipped SMD stated above. The second sticking tape procedure is conducted to stick tape on the second surface of fixture board stated above. The first tearing tape procedure is used to tear away the tape stuck during the first sticking tape procedure and to let the first end surface of SMD expose again. The second pre-press procedure is conducted onto the first end surface, which is not dipped, of SMD. For the second dipping procedure, after the fixture board is sucked in the manner of vacuum sucking, the first end surface of SMD is dipped into the paste slot of conduction metal and is pulled out again. Once again, the second re-dipping procedure is used to modify the end electrode shape of SMD by performing the same procedure of dipping fixture board into the paste slot of conduction metal. The second baking procedure is performed onto the first end surface of the dipped SMD stated above. The second tearing tape procedure is used to tear away the tape stuck during the second sticking tape procedure and to complete the fabricated product.