baber/WOPTO huggingface dataset:
Patent KR-100753215-B1 (KR)
Title: Laser welding apparatus
Inventor: SHIN IN SEUNG
IPC: B23K26/60
Filed: 2006-05-25
Granted: 2007-08-30
Abstract: A laser welding system is provided to track a welding line along which welding is conducted and inspect whether a welded portion is defective at the same time during the laser welding. A laser welding system(100) comprises: a welding body(110) which is equipped with a welding laser(111) for outputting a welding beam by welding to project the outputted welding beam onto a welded portion(200), and of which position is moved by driving of a certain actuator(160); a tracking laser(120) installed at one side portion of the welding body to project a tracking beam onto the welded portion; an inspection laser(130) installed at the other side of the welding body to project an inspection beam onto the welded portion; a pair of CMOS(complementary metal-oxide semiconductor) image sensors(140a,140b) installed on an upper part of the welding body to convert and output the tracking beam and the inspection beam into a tracking electrical signal and an inspection electrical signal respectively by receiving a tracking beam and an inspection beam reflected from the welded portion; and a control part(150) for processing the tracking electrical signal outputted from the CMOS image sensors to control the displacement of the actuator, processing the outputted inspection electrical signal to judge whether the welded portion is defective, and controlling on/off of respective beams outputted from the welding laser, the tracking laser and the inspection laser.
Patent KR-100793364-B1 (KR)
IPC: H05B33/10
Filed: 2006-05-29
Granted: 2008-01-11
Abstract: 본 발명은 다양한 픽셀배치 방법을 실행할 수 있는 레이저 조사장치 및 그를 이용한 유기전계발광소자의 제조방법에 관한 것으로, 광원장치; 상기 광원장치 하부에 위치하는 시준렌즈(collimation lens); 상기 시준렌즈 하부에 위치하는 비대칭 디오이 렌즈 어레이(asymmetrical DOE lens array); 및 상기 비대칭 디오이 렌즈 어레이 하부에 위치하는 마스크를 포함하는 것을 특징으로 하는 레이저 조사장치를 제공한다. 
     또한, 본 발명은 제 1 전극이 형성된 기판을 제공하고; 기재층, 상기 기재층 상에 광-열변환층 및 상기 광-열변환층 상에 전사층이 차례로 적층된 구조로 제조된 도너기판을 제공하고; 상기 전사층이 상기 기판과 대향하도록 서로 이격되어 배치하고; 광원장치, 상기 광원장치 하부에 위치하는 시준렌즈, 상기 시준렌즈 하부에 위치하는 비대칭 디오이 렌즈 어레이, 및 상기 비대칭 디오이 렌즈 어레이 하부에 위치하는 마스크를 포함하는  레이저 조사장치를 이용하여 상기 기재층의 일부 영역에 레이저를 조사하여 상기 전사층의 전사를 수행하여 상기 기판 상에 유기막층 패턴을 형성하는 것을 포함하는 유기전계발광소자의 제조방법을 제공한다.  
       
     레이저 조사장치, 비대칭 디오이 렌즈 어레이, 마스크, 유기전계발광소자
Patent KR-100780932-B1 (KR)
Title: Color interpolation method and device
Inventor: LEE HO YOUNG
IPC: H04N9/07
Filed: 2006-05-30
Granted: 2007-11-30
Abstract: A color interpolation method and device is provided to compute parameters through different algorithms according to conditions of directional information using edge directional information, thereby preventing color errors from being generated and limiting generation of zipper type artifact in circumference of an edge. A color interpolation method and device comprises the following steps of: computing edge direction information by extracting only pixel values without respect to R,G,B from bayer pattern images; determining edge direction information conditions computed in the edge direction information computation step; and computing a color interpolation parameter on the basis of color interpolation parameter computation algorithm corresponding to the edge direction information conditions.
Patent KR-101265332-B1 (KR)
IPC: G02F1/13
Filed: 2006-06-26
Granted: 2013-05-20
Abstract: 본 발명은 제조장치가 위치된 내부에 형성된 기류를 순환시킴으로써 기류에 의한 청정 기능이 정상적으로 이루지도록 할 수 있는 평판표시소자의 제조 시스템을 제공하는 것으로, 제품의 제조 공정을 수행하기 위한 제조장치; 상기 제조장치의 상단에 이격되어 설치되며, 청정 공기를 발생하여 내부에 기류를 형성시키기 위한 팬플로우 유닛; 및 상기 제조장치의 하단부에 접촉되게 설치되어 상기 제조장치의 진동을 흡수하고, 하나 이상의 통공이 형성되며, 상기 통공 내에 형성되어 상기 기류를 외부로 순환시키기 위한 팬장치를 구비한 제진대을 포함한다. 
       
     평판표시소자. 제진대, 팬, 통공, 기류
Patent KR-100776570-B1 (KR)
Title: Polishing-pad conditioning device for chemical mechanical polishing apparatus and method thereof
Inventor: LEE JUNG HOON
IPC: B24B53/017
Filed: 2006-06-29
Granted: 2007-11-15
Abstract: A polishing pad conditioning device for a chemical mechanical polishing apparatus and a method thereof are provided to uniformly condition a polishing pad by permitting an arm to be driven in a semi-circular trajectory and arranging a small diamond disk on the arm. A polishing pad conditioning device for a chemical mechanical polishing apparatus, includes an arm driving motor(10), an arm(20), and a holder(30). The arm driving motor is positioned within a revolutionary spindle, and periodically changes rotation direction of a rotary shaft. The arm has the rotary shaft arranged on a bottom surface of the spindle in such a manner that one end of the arm reciprocates along a semi-circular trajectory of a radius of a polishing pad by force generated from the arm driving motor. The holder is joined to a bottom surface of one end of the arm, and has a bottom surface on which a small diamond disk(31) is attached. The polishing pad conditioning device further includes a holder accommodating unit joined to the arm such that the holder accommodating unit is rotatable, a disk driving motor(40) for rotating the holder accommodating unit, and a pressure control unit for controlling vertical movement of the holder housed in the holder accommodating unit.
Patent KR-100775698-B1 (KR)
Title: Control method for recording of a digital broadcasting receiver
Inventor: LEE JOO YEON
IPC: H04N19/89
Filed: 2006-06-30
Granted: 2007-11-09
Abstract: A recording control method of a digital broadcasting receiver is provided to correct an error through interleaving or RS(Reed-Solomon) error correction coding when an error rate is high in a state when the digital broadcasting receiver converts a TS(Transport Stream) into a program stream and stores the converted program stream. A digital broadcasting receiver receives a TS including a digital broadcasting signal(S101). If the recording of the digital broadcasting signal is selected, the digital broadcasting receiver converts the TS into a program stream(S103). The digital broadcasting receiver stores the program stream in a storing medium(S105). If an error of the stored program stream is recognized(S107), the digital broadcasting receiver corrects the error until an error rate is included in a predetermined permission value(S109). The digital broadcasting receiver manages the program stream whose error is corrected in a reproduction standby state(S111).
Patent KR-100800949-B1 (KR)
IPC: H01L27/14
Filed: 2006-07-05
Granted: 2008-02-04
Abstract: 수광 소자를 탑재한 이면 입사형의 반도체 장치 및 그 제조 방법에 있어서, 제조 코스트를 증대시키지 않고 해당 성능의 향상을 도모한다.  수광 소자(11) 및 그 패드 전극(13)이 형성된 반도체 기판(10)의 표면에, 지지체(15)를 접착한다.  다음으로, 지지체(15)를 에칭하여, 지지체(15)를 관통하여 패드 전극(13)을 노출하는 비어 홀(16)을 형성한다.  그리고, 패드 전극(13)과 접속되고 비어 홀(16)을 통해서 지지체(15)의 표면에 연장되는 배선(17)을 형성한다.  마지막으로, 다이싱에 의해 반도체 기판(10)을 복수의 반도체 칩(10A)으로 분리한다.  이 반도체 장치는, 지지체(15)와 회로 기판(30)이 대향하도록 하여 실장된다. 
       
     회로 기판, 반도체 칩, 수광 소자, 패드 전극, 비어 홀, CCD, 촬상 소자, 도전성 페이스트
Patent KR-100742383-B1 (KR)
Title: Thin film transistor and method of manufacturing of the same
Inventor: KIM JONG YUN
IPC: H01L29/786
Filed: 2006-07-05
Granted: 2007-07-24
Abstract: A thin film transistor is provided to reduce driving defects by properly increasing the threshold voltage of a driving thin film transistor in a circuit part. A semiconductor layer(120) in which a polycrystalline silicon layer(121) and an amorphous silicon layer(122) are sequentially stacked is formed on a substrate(100). The amorphous silicon layer can be position on a source/drain region of the polycrystalline silicon layer. A gate insulation layer(130) is positioned on the semiconductor layer. A gate electrode(140) is positioned on the gate insulation layer. An interlayer dielectric(150) is positioned on the gate electrode. A source/drain electrode(161,162) is positioned on the interlayer dielectric. The polycrystalline silicon layer and the amorphous silicon layer can have the same pattern length.
Patent KR-100794694-B1 (KR)
Title: Markers or primers for detecting differentiation or undifferentiation of human embryonic stem cells derived from genes coding deubiquitinating enzymes and methods for detecting using the same
Inventor: BAEK KWANG HYUN
IPC: C12N15/10
Filed: 2006-07-14
Granted: 2008-01-14
Abstract: Markers or primers derived from genes encoding deubiquitinating enzymes are provided to detect the differentiation or undifferentiation of human embryonic stem cells into vascular endothelial cells, so that they are useful for detection whether the human embryonic stem cells maintain undifferentiation state during cultivation. A microarray for detecting the differentiation of human embryonic stem cells into vascular endothelial cells comprises a marker consisting of 10-100 consecutive nucleotides selected from genes of SEQ ID NO:1 to SEQ ID NO:29 encoding deubiquitinating enzymes. A microarray for detecting the undifferentiation of human embryonic stem cells into vascular endothelial cells comprises a marker consisting of 10-100 consecutive nucleotides selected from genes of SEQ ID NO:88 to SEQ ID NO:94 encoding deubiquitinating enzymes. A method for detecting the differentiation or undifferentiation of human embryonic stem cells into vascular endothelial cells comprises the steps of: collecting a nucleic acid sample from the human embryonic stem cells during cultivation; and measuring the expression amount of genes of SEQ ID NO:1 to SEQ ID NO:29 or SEQ ID NO:88 to SEQ ID NO:94 encoding deubiquitinating enzymes by performing RT-PCR(reverse transcriptase-polymerase chain reaction) or real time-PCR by using primers.
Patent KR-100869984-B1 (KR)
IPC: G06F12/02
Filed: 2006-07-14
Granted: 2008-11-21
Abstract: 본 발명은 복수의 뱅크를 갖는 반도체 메모리에 있어서, 시스템 측에 부담을 주는 일없이 랜덤 액세스를 용이하게 실시하고, 랜덤 액세스할 때의 데이터 전송 레이트를 향상시키는 것을 과제로 한다. 
     메모리 시스템은 복수의 뱅크를 갖는 반도체 메모리와, 반도체 메모리를 액세스하는 컨트롤러로 구성된다. 뱅크의 수는 동시에 액세스 동작되는 뱅크의 수보다 많다.  반도체 메모리는 액세스 동작 중인 뱅크와 동일한 뱅크에 대한 액세스 커맨드를 받았을 때에, 실행 중인 액세스 동작이 완료될 때까지 동안 비지 신호를 활성화한다. 컨트롤러는 활성화된 비지 신호를 받고 있는 동안, 다음 액세스 커맨드의 출력을 정지한다. 컨트롤러는 비지 신호를 받음으로써 반도체 메모리에 다음 액세스 커맨드를 출력해야 할지 여부를 판단한다. 
     
     반도체 메모리, 랜덤 액세스, 비지 신호, 액세스 커맨드
Patent KR-101280370-B1 (KR)
IPC: H04B1/40
Filed: 2006-07-19
Granted: 2013-07-01
Abstract: 본 발명은 이동통신 단말기 및 그 제어 방법에 관한 것이다. 본 발명에 따른 이동통신 단말기는, 3차원 입체 형상의 작성 및 3차원 입체 형상이 포함되는 메시지의 타 이동통신 단말기로의 송수신이 가능하여, 메시지의 작성 또는 모바일 메신저의 사용시에 보다 다양하고 풍부한 표현이 가능하다. 
       
     3D 문자, 3차원 입체 형상, 문자 메시지, 모바일 메신저
Patent KR-100694888-B1 (KR)
Title: Structure of partition wall for water disposal plant
Inventor: KIM SA DONG
IPC: E04B1/61
Filed: 2006-07-19
Granted: 2007-03-14
Abstract: A structure of an assembling wall for a water disposal plant is provided to construct a panel with a conduit simply, and to restrict the panel from being separated from the conduit and being deformed or broken against hydraulic pressure with an assembling member and a reinforcing member. A partition wall for a water disposal plant includes a panel(100) arranged across a conduit(10), and an assembling member(200) combining an end of the panel with an inner wall or a bottom of the conduit. The assembling member has a bottom plate(210) contacted and combined with the inner wall or the bottom of the conduit by an anchor, and a couple of protruded plates(220) spaced from each other as thick as the panel, arranged in parallel and combined with the bottom plate by the anchor. The panel is inserted between the protruded plates, and the assembling member is made of fiber glass reinforced resin, stainless steel, steel coated by epoxy, or aluminum. A connecting plate of the assembling member is combined with the bottom plate by welding, and the protruded plates are combined with both ends of the connecting plate.
Patent KR-100790527-B1 (KR)
Title: Wafer level package and fabrication method thereof
Inventor: JUNG GI JO
IPC: H01L21/60
Filed: 2006-07-27
Granted: 2008-01-02
Abstract: A wafer level package and a fabricating method of the same are provided to enhance junction reliability by forming a junction area between a bump pad and a solder with a stepped structure. A semiconductor chip(201) includes one or more electrode pads which are exposed partially by a protective layer. A first dielectric layer(204) is formed on the protective layer. The first dielectric layer includes a dielectric protrusion and a concavo pattern formed around the dielectric protrusion. The first dielectric layer is used for exposing the electrode pads. A re-wiring layer(206) is formed on the first dielectric layer in order to be electrically connected to the electrode pad. A second dielectric layer(207) is formed on the first dielectric layer and the re-wiring layer in order to expose a part of the re-wiring layer and to define a bump connection region. A solder bump(209) is formed on the defined bump connection region in order to be electrically to the re-wiring layer.
Patent KR-101253166-B1 (KR)
IPC: H04N17/00
Filed: 2006-08-14
Granted: 2013-04-10
Abstract: 본 발명은 방송 수신기, 진단 정보 데이터 구조 및 진단 정보 표출 방법에 관한 것으로, 본 발명에 따른 호스트(Host)는 외부(external)로부터 디바이스 인증서(device certificate)의 상태와 관련된 진단 정보(diagnostics information)의 요청을 수신하거나 상기 요청된 진단 정보를 수집하도록 제어(control)하는 제어부를 구비하는 것을 특징으로 한다. 이때, 상기 요청된 진단 정보는 상기 디바이스 인증서를 정의하는 서브젝트(subject)와 관련된 필드, 유효성(validity)과 관련된 필드와 확장(extensions)과 관련된 필드에 대한 정보를 포함할 수 있다. 
     따라서, 본 발명에 따르면, 호스트는 케이블카드의 디바이스 인증서가 유효하지 않은 경우에, 그 원인을 제공할 수 있는 효과가 있다. 
       
     디지털 케이블 방송, 디바이스 인증서, 디바이스 CA, 호스트 다이어그너스틱 프로토콜, 바인딩
Patent KR-100844819-B1 (KR)
IPC: G09G3/288
Filed: 2006-08-16
Granted: 2008-07-09
Abstract: 본 발명은 플라즈마 디스플레이 장치(Plasma Display Apparatus)에 관한 것으로, 리셋 기간에서 제 2 전극(Z)으로 서스테인 폴 신호를 공급하여 과도하게 쌓인 벽 전하를 충분히 소거함으로써 휘점의 발생을 저감시키고, 이에 따라 구현되는 영상의 화질을 향상시키는 효과가 있다. 
     이러한, 본 발명의 일실시예에 따른 플라즈마 디스플레이 장치는 서로 나란한 제 1 전극과 제 2 전극을 포함하는 플라즈마 디스플레이 패널과, 초기화를 위한 리셋 기간에서 제 1 전극으로 상승 램프 신호와 하강 램프 신호를 공급하고, 상승 램프 신호와 중첩(Overlap)되는 서스테인 폴(Pole) 신호를 제 2 전극에 공급하는 구동부를 포함하는 것이 바람직하다.
Patent KR-100734730-B1 (KR)
Title: Semiconductor having a mos varactor and method of fabricating the same
Inventor: CHU KYONG TAE
IPC: H01L29/93
Filed: 2006-08-16
Granted: 2007-07-02
Abstract: A semiconductor device having a MOS(Metal Oxide Semiconductor) varactor and a manufacturing method thereof are provided to reduce parasitic resistance by forming a poly gate pattern as a net structure and allowing a gate to have two channels. A trench is formed on a semiconductor substrate. The trench is gap-filled to form an isolation layer. A net-shaped poly gate(270) and source/drain(280) intersecting with the isolation layer are formed on the semiconductor substrate where the isolation layer is formed. A gate oxide layer(250) and a poly silicon are formed on the semiconductor substrate where the isolation layer is formed. Parts of the gate oxide layer and the poly silicon are etched to form a net-shaped gate oxide layer and a net-shaped poly silicon. Ion is implanted into the whole surface of the semiconductor substrate. The net-shaped poly gate has a MOS varactor that is formed so that each gate has two channels(281,282).
Patent KR-100701614-B1 (KR)
Title: Fire-resistant prefabricated panel and method for manufacturing the same
IPC: E04B1/94
Filed: 2006-08-22
Granted: 2007-03-30
Abstract: A fireproof assembling panel and the manufacturing method thereof are provided to suppress a fire by insulating combustion heat and restricting flames from being transmitted to the other panel. A fireproof assembling panel includes a functional flat core(120), a fireproof material(130) formed at an edge of the core, an exterior member(110) attached outside the core and the fireproof material, a first connection part(131) placed in an opening part of the fireproof material, and a second connection part(132) formed in the opening part of the fireproof material and combined with the first connection part. The core is made of polystyrene, flame-retardant EPS(expandable polystyrene), polyurethane, polyisocyanate, polyester, glass wool, mineral wool, wood or concrete to insulate heat, air and sound and to prevent the fire. A steel plate is attached to an exposed surface of the fireproof material made of wood to improve rigidity and to prevent the fire.
Patent KR-100811480-B1 (KR)
IPC: G21C17/017
Filed: 2006-08-28
Granted: 2008-03-10
Abstract: 본 발명은 원자력 발전소 증기발생기의 튜브다발관(In-Bundle)의 외관을 측정하여 이상유무 판단 및 이물질을 제거하도록 튜브다발관 사이를 통과할 수 있도록 휨성과 직진성이 뛰어난 검사 이송장치를 얻기 위한 것인 바, 얇은 판 중앙에 절곡을 하여 내시경이 들어갈 수 있는 공간홈을 구성하고, 45°내외로 굽을 수 있도록 공간홈면에 일정한 간격으로 절취홈을 배열구성한 두 개의 밴딩판을 접합하여 날개면에 이송기어홀을 구성한 검사장비 이송케이스부과, 상기 이송케이스부의 전방에 구성된 렌즈세척 노즐을 구성한 헤드부와, 상기 이송케이스부의 공간홈에 전자카메라와 세척수공급부를 구성한 특징이 있다. 
       
     	원자력, 전자카메라, 전열관, 튜브다발관(In-Bundle)
Patent KR-100815631-B1 (KR)
IPC: H02H9/04
Filed: 2006-08-30
Granted: 2008-03-27
Abstract: 본 발명은 낙뢰가 발생할 것을 미리 검출하여 전력 공급을 차단시킴으로써 낙뢰를 맞아 발생하는 직접적인 피해를 없애도록 하는 낙뢰 검출 사전 차단장치에 관한 것으로, 더욱 상세하게는 강우량 및 낙뢰와 함께 발생하는 섬광과 소리 그리고 온/습도와 풍량 등을 고려하여 낙뢰가 발생될 시점을 미리 검출하여 전원공급을 차단시키는 것이다. 
     이러한 본 발명은 정전사고가 발생할 정도의 낙뢰가 발생하기 전에 미리 낙뢰를 검출하여 전원을 차단시키도록 하는 것으로, 강우량 측정기와 온/습도 측정기 및 풍량 측정기와 소리 및 영상 측정기 등으로부터의 측정값은 메인 콘트롤러에 인가되게 하고, 상기 메인 콘트롤러는 상기 된 측정값을 가중치를 주어 낙뢰 발생시기를 판단하게 하며, 메인 콘트롤러에서 낙뢰 발생시로 판단되면 스위칭 소자를 구동시켜 전원공급을 차단시키도록 하고, 상기 메인 콘트롤러에는 배터리에서 전원이 공급되어 동작전원으로 사용하는 한편 각각의 측정기를 구동시키도록 한다. 
       
     낙뢰, 검출, 차단, 예방
Patent KR-100800868-B1 (KR)
Title: Method for manufacturing in semiconductor device
Inventor: JUNG SANG HUN
IPC: H01L21/76
Filed: 2006-08-31
Granted: 2008-02-04
Abstract: A method for manufacturing a semiconductor device is provided to improve high voltage capacity and a breakdown voltage during an STI forming process through a corner rounding process tuning condition. A pad oxide layer(303) and a nitride layer(305) are sequentially deposited on a semiconductor substrate(301) to form a multiple pad. A photoresist pattern(307) for defining an STI region is formed over the nitride layer. A wet etching process is performed on the pad oxide layer with 0.49 % HF during 500 seconds by using the photoresist pattern as a barrier layer, and on the nitride with H3PO4 during 330 seconds, so that the pad oxide layer and the nitride are selectively removed to form an STI pattern. The semiconductor substrate exposed by the STI pattern used as a mask is wet-etched to form an STI. A liner oxide layer is deposited on the semiconductor substrate including the STI and the entire surfaces of the pad oxide layer and the nitride layer.
Patent KR-100788377-B1 (KR)
Title: Method for manufacturing semiconductor device
Inventor: KIM JEA HEE
IPC: H01L21/76
Filed: 2006-09-13
Granted: 2008-01-02
Abstract: A method for manufacturing a semiconductor device is provided to improve precision of channel dimension of an EDMOS(Extended Drain Metal Oxide Semiconductor) device by forming a gate oxide layer using an isotropic etching. A nitride layer is deposited on a silicon substrate(200). A first trench is formed by using an isotropic etching through a chemical dry etching. A second trench is formed on the silicon substrate where the first trench is formed by using an anisotropic etching through a plasma etching. An oxide layer(210) is gap-filled in the first trench and the second trench. A first STI(Shallow Trench Isolation)(204a) and a second STI(206a) are formed by planarizing the oxide layer through a CMP(Chemical Mechanical Polishing). The nitride layer is removed. After a well(208) is formed between the second STIs through ion implantation, an oxide layer and a poly silicon layer are deposited on the silicon substrate where the well is formed. The poly silicon layer is patterned to form a gate(214). After an ion implantation is performed by using the gate as a mask, an impurity region(216) is formed.
Patent KR-100772497-B1 (KR)
Title: Golf clinic system and application method thereof
Inventor: SIM TAE YOUNG
IPC: A63B69/36
Filed: 2006-10-09
Granted: 2007-11-01
Abstract: A golf clinic system providing a clinic advice in a medical engineering view and an operation method for the same are provided to allow improvement of exercise performance and prevention of injuries by obtaining objective and quantitative data of user's swing. A golf clinic system comprises: multiple optical markers attached to a person to be trained and his/her golf club; multiple infrared cameras(101A-101F) collecting motion information from the multiple optical markers; ground repulsive force detection devices(102A,102B) detecting repulsive force dispersed to the feet of a user during swing; a synchronizing treatment part(103) which performs time synchronizing of space coordinates, ground repulsive force, muscular response, and high speed frame image data; a synchronizing analyzer(104) which compares obtained 3D data with standard data stored in the second database and identifies their differences in real-time; the first database(105); the second database(106); multiple electromyographs(110) attached to the body of a trainee for measuring muscular response; and a high speed camera taking images of swing motion at high speed.
Patent KR-100968451-B1 (KR)
IPC: H05B44/00
Filed: 2006-10-16
Granted: 2010-07-07
Abstract: 본 발명은 디스플레이장치와 그 제어방법에 관한 것이다. 본 발명에 따른 디스플레이장치는, 다색 발광소자들과, 다색 발광소자들에서 발광된 스펙트럼을 검출하는 광검출부와, 다색 발광소자들의 발광된 광을 혼합하여 백색광을 형성하는 확산부와, 다색 발광소자들을 발광시키는 소정의 구동값들을 복수 회 변경하여 출력하고, 소정의 구동값들이 변경될 때마다 확산부에 의한 백색광을 측정하는 광측정장치로부터 측정값을 입력받고, 입력받은 측정값으로부터 삼자극값들을 산출하고, 삼자극값들 및 광검출부의 검출값들로부터 변환되는 변환행렬계수를 산출하는 제어부를 포함한다. 이에 의하여, 온도에 따른 다색 발광소자들의 색 좌표를 정밀하게 제어할 수 있다.
Patent KR-100727472-B1 (KR)
Title: Light emitting diode and method for forming thereof
Inventor: PARK YOUNG HO
IPC: H01L33/44
Filed: 2006-10-17
Granted: 2007-06-13
Abstract: A light emitting diode and its fabricating method are provided to improve the reliability of a vertical LED by stably connecting plural light emitting structures using a bonding layer having strong adhesive force. A bonding layer(150) is formed on a conductive substrate(160), and a reflective layer(140) is formed on the bonding layer. A light emitting structure(120) having a first semiconductor layer, an active layer(122) and a second semiconductor is formed on the reflective layer. A passivation layer(130) has a first part(131) covering a sidewall of the light emitting structure and a second part(132) with an aperture(135) exposing the light emitting structure. The reflective layer has the same thickness as that of the second part of the passivation layer.
Patent KR-100812173-B1 (KR)
Title: Organic electroluminescent compounds and display device containing the same
Inventor: SHIN HYO NIM
IPC: C09K11/06
Filed: 2006-10-19
Granted: 2008-03-12
Abstract: An organic light emitting material, and an organic light emitting device containing the organic light emitting material are provided to improve the luminous efficiency and lifetime characteristics of a light emitting material and to enhance the drive lifetime of a device. An organic light emitting material is represented by the formula 1, wherein R1 to R3 are independently a phenyl group or a C10-C20 fused polycyclic aromatic ring; and the phenyl group or the C10-C20 fused polycyclic aromatic ring can be substituted with a C1-C20 alkyl group, a C1-C20 alkoxy group, a halogen atom, a C5-C7 cycloalkyl group, a phenyl group or a fused polycyclic aromatic group.