baber/WOPTO huggingface dataset:
Patent JP-S6026375-A (JP)
Title: Automatic image density controlling device
Inventor: KASUYA YUKIO
IPC: H04N1/29
Filed: 1983-07-22
Abstract: PURPOSE:To reduce toner consumption by controlling turning on and off of light emitting elements in accordance with the region detected with a sensor at the time of preliminary scanning of a photosensitive drum for measuring an original density. CONSTITUTION:A photosensitive drum 1 is scanned preliminarily to detect the surface potential corresponding to a latent image on the drum 1 with a sensor 42 and the density of an original is measured. In this case, a large number of light emitting elements BL for blank exposure are controlled with a controller 44 and the elements corresponding to the region detected with the sensor 42 are turned off, and the elements BL corresponding to the other regions are turned on to illuminate the drum 1. As a result, a latent image is not formed on the area other than the necessary area, and toner consumption can be reduced at the time of detection of the image density.
Patent JP-S5924975-A (JP)
Inventor: KOUZAI YOSHITOKU
IPC: B25J15/00
Filed: 1982-07-31
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6117579-A (JP)
Title: Benzofuran derivative
Inventor: PATORISU SHII BERANJIYAA
IPC: C07D405/06
Filed: 1985-06-20
Abstract: Novel benzofuran compounds have the formula <CHEM>  in which  each R<1> is independently hydrogen or C1 to C6 alkyl;  R<2> is hydrogen, C1 to C6 alkyl, -(CH2)n -Het-Y, or <CHEM>  each R<4> is independently C1 to C6 alkyl; each R<5> is independently H, C1 to C6 alkyl, or both R<5>s join to form a 5- or 6-membered ring with the N to which they are attached; Het is a heterocyclic group selected from pyridine, pyrazine, pyrimidine, oxazole, pyrazole, oxadiazole, tetrazole, quinoline, thiophene, furan, pyrrole, thiazole, thiadiazole, or imidazole;  X is O, S, SO, SO2; Y, Y<1>, Y<2>, Y<3>, Y<4> and Z are each independently H, halogen, OH.  C1 to C6 alkyl, C2 to C6 alkenyl,  -COOR<1>, -COR<1>, nitro,  C1 to C6 alkoxy, C1 to C6 alkylthio,  -CH2SR<1>, OCH2CO2R<1>, <CHEM>  and each n is independently 0 to 10;  with the provisos that: (a) not all of R<1>, R<2>, Y, Y<1>, Y<2>, Y<3>, Y<4>, and Z are simultaneously H; (b) when up to 2 of R<1>, R<2>, Y, Y<1>, and Z are C1 to C2 alkyl, and the others of R<1>, R<2>, Y, Y<1>, and Z are H, then R<3> is not OH; and  (c) when n in <CHEM>  is O and one of R<3>, Y, Y<1>  or Z is OH, then R<1> is not H or C1 to C2 alkyl. Their phamaceutically acceptable salts are also novel. These compounds are useful as inhibitors of mammalian leukotriene biosynthesis and are therefore useful therapeutic agents for treating allergic conditions, asthma, cardiovascular disorders, inflammation. The compounds are also useful as analgesics and as cytoprotective agents. They are made into pharmaceutical compositions for such uses.
Patent JP-S5759108-A (JP)
Title: Mark position detecting method for electron beam exposure
Inventor: ENOKIDO EITAROU
IPC: H01J37/304
Filed: 1980-09-26
Abstract: PURPOSE:To achieve high-precision position detection by storing the peak values of two detection signals obtained by scanning a mark appended to a holder in the opposite direction by turns with an electron beam, and by sending a constant peak signal to a signal processing circuit by performing amplification according to the peak values. CONSTITUTION:A scanning signal is sent from a scanning-signal generating circuit 18 to a deflection electrode 4 to scan a mark 1 in opposite directions by turns. A peak signal is obtained from a subtracting circuit 7 through detectors 5a and 5b and amplifiers 6a and 6b. The output is inputted to a level setting circuit 17 through an absolute-valve circuit 13, a peak holding circuit 14, and sample holding circuits 15 and 16. A gain control signal is sent from the level setting circuit 17 to a multi- plying circuit 10 to exercise gain control on the basis of the output peak value of the subtractor 7, and a signal having a constant-level peak value is sent from the multiplying circuit 10 to a signal processing circuit 8. Consequently, mark position detection is performed with high precision.
Patent JP-2000322727-A (JP)
Title: Magnetic recording medium and manufacture of the same
Inventor: MATSUO HIDEKI
IPC: G11B5/66
Filed: 1999-05-14
Abstract: PROBLEM TO BE SOLVED: To provide a magnetic recording medium and a method for manufacturing the magnetic recording medium which is capable of reducing a head floating height and has an excellent sliding characteristic between the magnetic head and the surface of the magnetic recording medium and is capable of preventing an adhesive phenomenon of the magnetic head. SOLUTION: Relating to a magnetic recording medium having a base layer 2, magnetic layer 3, protective layer 4 and lubricating layer 5 successively formed on a substrate 1 having an Ni-P film 12 formed on a non magnetic member plate 11, a P concentration of the Ni-P film at a depth of to at least several nm from the surface of the film is above a P concentration at an inner part of the Ni-P film. In order to heighten the P concentration of a surface of the Ni-P film of the substrate at a depth of to at least several nm from the surface to the P concentration above the concentration at an inner part of the Ni-P film, the substrate which has the Ni-P film formed and a mechanical texture formed on the surface of the Ni-P film is preferably immersed in water or a weak acid solution.  After that, LZT is formed on the mechanical texture and then the base layer, the magnetic layer, the protective layer and the lubricating layer are successively formed on the thus surface-roughened substrate to manufacture the magnetic recording medium.
Patent JP-H04359305-A (JP)
Title: Personal computer
Inventor: OKAWA TOYOKAZU
IPC: G06F1/00
Filed: 1991-06-05
Abstract: PURPOSE:To perform the more complete restart (RESUME) operation including the state of a peripheral device and to select whether the RESUME operation should be executed or not by the power non-supply time. CONSTITUTION:When receiving a power-off request from a switch power source part 12, a CPU 1 turns off a power source after setting a RESUME flag in a memory 2 in the case of the middle of business. When the power source is turned on again, the CPU 1 checks the RESUME flag in the memory 2; and if this flag is set, the voltage of a RESUME backup battery 10 is detected by a power switching and battery voltage detecting circuit 7. This voltage value is compared with a threshold preliminarily set in a battery voltage threshold setting circuit 5 by a voltage comparing circuit 6; and if the battery voltage is higher, the flag is reset to execute the RESUME operation. If the flag is not set or the battery voltage is lower, a RESUME use circuit including the flag is initialized.
Patent JP-S62289745-A (JP)
Title: Method and device for check test of heat resistance
Inventor: FUJITA YASUHISA
IPC: G01N3/60
Filed: 1986-06-10
Abstract: PURPOSE:To greatly shorten the time of a check test of heat resistance by using a test-piece which has a hole in its top surface so that the angle of the edge part of the hole is <=60 deg., and heating and cooling the test-piece rapidly and generating large thermal stress. CONSTITUTION:The test-piece 1 has the hole 2 in the top surface and the angle of the edge part of this hole 2 is <=60 deg.. At the time of heat-resistance check measurement, the test-piece 1 is fixed in the recessed part 6 of a mount base 5 by a screw member 7 and then four thermocouples 11 are fitted to the test- piece 1. Then, a high frequency coil 8 is installed above the test-piece 1. Then while the mount base 5 is rotated by a driving device at 500 r.p.m., the edge part 3 of the test-piece 1 is heated rapidly at 200 deg.C/sec up to specific temperature and then cooled forcibly with a blast or water from above. Consequently, large thermal stress is generated in the test-piece 1 and this operation is repeated several tens of times to cause the edge part 3 of the test-piece 1 to crack. The temperature difference generated at the periphery of the cracking is measured by the thermocouples 11 and the number of times of repetition up to the generation of the cracking is measured.
Patent JP-S61293118-A (JP)
Inventor: AKAHA TERUNOBU
IPC: H02H7/122
Filed: 1985-06-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5836124-A (JP)
Inventor: SASAKI HIROSHI
IPC: H02H3/28
Filed: 1981-08-28
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H081355-A (JP)
Title: No power tip dresser
Inventor: HIRANO SATOSHI
IPC: B23K11/30
Filed: 1994-06-16
Abstract: PURPOSE:To execute shaping without providing the drive device to rotate a shaping tool in a tip dresser in the tip dresser to shape an electrode tip of spot welding gun. CONSTITUTION:A shaping tool 22 is mounted to a holding member 24 which is held rotatable around a center line L and is movable vertically, further, a ball nut 28 screwed to a vertical ball screw shaft 26 is mounted as rotatable each other and not movable each other in the axial direction. Further, a first gear 32 and second gear 34 are respectively integrated into the ball nut 28 and shaping tool 22, electrode tips 14, 16 are engaged to the shaping tool 22 and are vertically moved. In this way, by vertically moving the holding member 24 as integrated, the ball nut 28 is rotated and then the reshaping tool 22 is rotated, the electrode tips 14, 16 are shaped while rotating the shaping tool 22 through the gear 32.
Patent JP-H07183539-A (JP)
Title: Manufacture of thin film transistor array device
Inventor: TANAKA SAKAE
IPC: G02F1/1368
Filed: 1994-06-16
Abstract: PURPOSE:To lessen manufacturing processes in number by a method wherein a connection terminal patterning process is carried out at the same time when a process wherein a source electrode, a drain electrode, and a second wiring or a display electrode are patterned is carried out. CONSTITUTION:A thin film transistor array device is possessed of a first wiring 2 which connects the gate electrodes 1a of thin film transistors together, a second wiring 5a which connects the source electrodes 5c of the thin film transistors together, and a connection terminal 5 which connects a display electrode 5b connected to the drain electrode 5d of the thin film transistor to an external circuit connected to the end of the first wiring 2. A process wherein a connection terminal 6 is patterned is carried out simultaneously with a process wherein the source electrode 5c, the drain electrode 5d, and the second wiring 5a or a display electrode 5b are patterned. By this setup, a thin film transistor array device can be lessened in number of manufacturing processes.
Patent JP-S5562356-A (JP)
Title: Automatic analysis method
Inventor: ISA ISAO
IPC: G01N30/86
Filed: 1978-11-02
Abstract: PURPOSE: To secure an easy and quick analysis for the chlorine density by leading the chlorine water to the vapor-liquid equilibrium cell containing the temperature detector, obtaining the acid aqueous solution by applying the acid to the liquid- phase part of the cell with the vapor-phase part of the cell led to the gas chromatograph and then using the electronic computer.  
     CONSTITUTION: The chlorine water is put into vapor-liquid equilibrium cell 1 through sample inflow path 2 with valve 4 opened and then overflown via valve 5 and through outflow path 3. After this, valves 4 and 5 are closed with valve 6 opened to put a fixed amount of the acid (hydrochloric acid, etc.) into cell 1 from tank 12 via valve 6, and the density of the acid aqueous solution is set to about 0.01W1N. At the same time, the circulation is secured for the vapor-phase part of the cell via pump 11 to lead the part to gas chromatograph 8 via gas flow path switching valve 7 containing calibration tube 13. The signals of 8 are led to A/D converter 9 to be digitized and then supplied to electronic computer 10, and at the same time the Henry constant is calculated by the output sent from temperature detector 14. Thus the chlorine density is calculated based on the working curve memorized previously. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H085024-A (JP)
Title: Alternate combustion burner device
Inventor: KOIZUMI KENJI
IPC: F23D14/66
Filed: 1994-06-16
Abstract: PURPOSE:To contrive the self recirculation of exhaust gas and reduce NOx by a method wherein two sets of passages are formed by a partitioning plate and a heat accumulating body is provided at the downstream side of rear wall of an exhaust gas choking unit, common for both passages, while a flame keeper unit and a U-turn unit are provided at the downstream side of the heat accumulating body and a gas nozzle is arranged on the heat accumulating body. CONSTITUTION:An air switching valve 2 is installed at one side of passages A, B defined by a partitioning plate 1 while a choking unit 3, used also for an exhausting unit, is installed at the downstream side of the switching valve 2. The rear wall 4 of the choking unit 3 is projected into both passages A, B and a heat accumulating body 5 as well as a flame keeping unit 6 are provided sequentially in the downstream side of the rear wall 4 while both passages A, B are communicated through a U-turn unit provided at the downstream side of the flame keeping unit 6. A pilot burner 10 is provided on the partitioning plate 1 while a gas nozzle 11 is provided at the rear position of the heat accumulating body 5. A negative pressure unit 8 is formed near the downstream side of rear wall 4 at the passage side opened by the switching valve 2 to suck a part of exhaust gas conducted through the other passage side and restrain the generation of NOx upon combustion.
Patent JP-H07236727-A (JP)
Title: Slot machine
Inventor: TAKEMOTO TAKATOSHI
IPC: A63F5/04
Filed: 1993-06-04
Abstract: PURPOSE:To provide a slot machine which gives a strong impression and amusement and which requires less time and cost by reducing an installation space of the game machine to improve profitability and by simplifying planning, designing and construction of a game place. CONSTITUTION:This slot machine which varies a plurality of picture patterns by throwing a game medium into a charging door, by operating a game starting switch, and stopping the variation of each picture pattern at a predetermined stop timing, comprises liquid crystal displayers 20a, 20b, 20c, provided in its front face, a display controlling means 31 for making each of liquid crystal displayers 20a, 20b, 20c display a picture pattern, and a prize-giving determining means for judging whether or not a combination of each picture pattern after stopping the variation coincides with a predetermined prize-giving combination. Further, when the display controlling means judges that the prize giving determining means coincides with the prize-giving combination, it makes the liquid crystal displayers 20a, 20b, 20c display lines along with the arrangement of each picture pattern.
Patent JP-H10324555-A (JP)
Title: Cement admixture and method for placing jointed concrete
Inventor: KIDA TSUTOMU
IPC: C04B41/65
Filed: 1997-05-26
Abstract: PROBLEM TO BE SOLVED: To provide a method of placing a jointed concrete reduced in cracking and excellent in packing property, adhesion to existing concrete, usage and workability. SOLUTION: This cement admixture contains an expanding material, dry- shrinkage reducing agent, water reducing agent and aq. polymer dispersion. When a jointed concrete is placed, the joint of existing concrete is covered with the aq. polymer dispersion, and the jointed concrete contg. the cement, expanding material, dry-shrinkage reducing agent and water reducing agent and having >=30 cm packing property by the U-shaped packing test method is placed on the lower face and/or the side face of the existing concrete.
Patent JP-H05328860-A (JP)
Title: Method for forming seedling-planting hole and seedling transplanter
Inventor: WATABE SHIN
IPC: A01G13/00
Filed: 1992-05-27
Abstract: PURPOSE:To provide the method for forming the seedling-planting hole preventing the scattering of a cut piece produced by forming the hole in a mulching film in a field, also preventing the cut piece from damaging or entangling a seedling to kill the seedling. and to perform a proper seeding- transplanting work, and to provide the seedling transplanter. CONSTITUTION:The method for forming a seedling-planting hole is characterized by forming a hole in a mulching film A covering the surface of a field leaving a connecting part (a) and subsequently weld-fixing a cut piece (a) joined to both the mulching film A and the connecting part (b) to the mulching film A having no hole. The seedling transplanter is characterized by installing a heated hole-forming device 37 for forming the hole in the mulching film A covering the surface of a field while leaving the connecting part (b). moving the cut piece (a) joined to teeth the mulching film A and the connecting part (b) to the mulching film A on the side of the frame-traveling direction and subsequently weld-fixing the cut piece (a) to the mulching film A.
Patent JP-H10327327-A (JP)
Title: Image forming device
Inventor: HANEDA SATORU
IPC: H04N1/60
Filed: 1997-05-26
Abstract: PROBLEM TO BE SOLVED: To attain efficient copying at a high speed by storing image data read from an original image with a simple configuration with respect to the image forming device where a toner image is transferred to both sides of a transfer material and they are fixed altogether. SOLUTION: An image processing section B applies all image processing required for image forming such as filter processing, magnification/reduction processing, gamma correction and image area processing to image data of an original read by an image read section A. The image data whose image processing is finished are outputted to an image forming section C. The image forming section C applies compression processing to only the image data and stores the result to an image storage section B23. The image data stored in the image storage section B23 are read selectively later and expanded and the result is given to an image correction processing section B92, where the image is corrected under conditions that differ between the front side image and the rear side image, the corrected image is outputted to an image forming device B25, where the image is formed.
Patent JP-S5468680-A (JP)
Title: Measuring method of sound velocity in object during conveying
Inventor: MIYAGAWA KAZUO
IPC: G01H5/00
Filed: 1977-11-12
Abstract: PURPOSE: To calculate the velocity of sound in the specimen by using the measurement time when the difference between two measurement times becomes zero.  
     CONSTITUTION: An ultrasonic transmitter 2 is driven by a transmitter driving circuit 5 which is driven by a synchronizing circuit 4 and transmits ultrasonic waves for a steel material 1. Counters 7, 7' respectively measure the times when the ultrasonic waves are transmitted and are received in receivers 3, 3' beased on the synchronizing signal from a synchronizing circuit 4. The time measurement signals from the time measuring devices 7, 7' are inputted to a servo unit 8, then the servo unit 8 moves the transmitter 2 in the conveying direction on the steel material so that the outputs of the time measuring devices 7 and 7' become equal. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-S5258980-A (JP)
Title: Optical measuring device for fringe patterns
Inventor: INANI TAKAHIKO
IPC: G03H1/00
Filed: 1975-11-11
Abstract: PURPOSE:Measurement of occurence of fringe patterns is made possible by taking the interference fringes formed by an object to be examined in a television cam camera, dividing the fringes into small regions, assessing less black portions are white, aggregating these and comparing with reference values.
Patent JP-H06326995-A (JP)
Title: Signal processor
Inventor: ANDO ICHIRO
IPC: H04N19/152
Filed: 1993-05-13
Abstract: PURPOSE:To low suppress the quantization distortion to perform the efficient encoding processing by individually limiting the intensity of the high frequency band component on the frequency axis of an orthogonal transformation coefficient group obtained by orthogonally transformation of an input picture signal and subjecting it to inverse orthogonal transformation to output it. CONSTITUTION:An ortogonal transformation part 10 converts an input signal of the time domain to a signal of the frequency domain that is, subjects the signal of the time domain to orthogonal transformation to output the orthogonal transformation coefficient group. A spectrum intensity limiting processing part 20 performs the spectrum intensity limiting processing at every orthogonal transformation coefficient and limits the intensity of the high frequency band component on the frequency axis to output it. An inverse orthogonal transformation part 30 subjects the orthogonal transformation coefficient group after subjecting the spectrum intensity limiting processing to inverse orthogonal transformation, that is, converts the signal of the frequency domain into a signal of the time domain to output it. Thus, the energy in a high-energy part of the high frequency band component in the picture signal is limited but that in a low-energy part is not limited, and therefore, the quantization distortion is suppressed, and outline information of a picture is remained.
Patent JP-S5361242-A (JP)
Title: Integrated circuit
Inventor: TAKIZAWA KATSUHIKO
IPC: H03K19/00
Filed: 1976-11-12
Abstract: PURPOSE: To facilitate an easy fault diagnosis by clamping the plural units of output level to either one of the binary logical levels by means of a control signal. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-H08328604-A (JP)
Title: Arma model identifying method based on step response
Inventor: KOSAKA MANABU
IPC: G05B13/02
Filed: 1995-06-01
Abstract: PURPOSE: To accurately fix the transfer function of an arbitrary degree based on a step response by performing a specified operation. CONSTITUTION: K1 B(s) and A(s) to satisfy the relation of y(s)=K B(s)/A(s)u(s)} are fixed between the step input u(s) for a controlled system and the output y(s) from the controlled system. In this case, the values from P1 to Po are obtained by fixing the degrees m and n of B(s) and A(s), setting the positive infinite matrix W of a degree q to be more than the sum of m, n and 1, setting P(s)=Pq s<q> +Pq-1 s<q-1> +...P1 s+Po to be B(s)/A(s)=1/P(s), setting Po =1, obtaining the value of K from an expression I and successively operating the recurrence formula of an expression II. Between a matrix PP=(P1 , P2 ,..., Pq-1 , Pq )T and a matrix θ=(a1 , a2 ,..., an-1 , an , b1 , b2 ,... bm-1 , bm )T, a determinant III to satisfy PP=Zθ is set and the operation of θ=(ZTWZ)<-1> (ZTWPP) is performed.
Patent JP-S63303900-A (JP)
Title: Method for controlling conduction type of silicon carbide single crystal
Inventor: HATANO AKITSUGU
IPC: C30B29/36
Filed: 1987-05-30
Abstract: PURPOSE:To control the conduction type of an SiC single crystal with relatively low-temp. treatment by depositing the Si added with a group V element, etc., as impurities on an n- or p-type SiC single crystal, and heat-treating the material to diffuse the impurities into the SiC. CONSTITUTION:In the production of a field-effect transistor, n-type beta-SiC 2 and p-type beta-SiC 3 are successively formed on an Si substrate 1 by a CVD method to form a thin Si film 4 contg. P at its source and drain parts as impurities. The material is then heat-treated at about 900-1,300 deg.C in a gaseous Ar atmosphere to diffuse the impurities, and thermally oxidized at about 1,000-1,200 deg.C in a dry gaseous oxygen atmosphere to form an oxide film 5 of about 200-1,500Angstrom  thickness. Then, the oxide film 5 on the electrode forming parts of the source and drain are removed by a liq. mixture of hydrofluoric acid and ammonium fluoride, and then Al is vacuum-deposited to form the electrodes 6 of the source, gate, and drain. By this method, the impurities can be easily diffused into SiC, and the conduction type of SiC is controlled.