baber/WOPTO huggingface dataset:
Patent JP-H11337508-A (JP)
Title: Heating furnace for thermal analysis device
Inventor: NISHINO KOJI
IPC: G01N25/00
Filed: 1998-05-26
Abstract: PROBLEM TO BE SOLVED: To provide a heating furnace for thermal analysis device at a low cost while satisfying various conditions as this kind of heating furnace, equivalenlly to a heating furnace made from pure silver. SOLUTION: This heating furnace has a structure wherein the furnace body material (a base material 101) is copper and a precious metal layer 104 covers the surface of the base material 101. Making best use of a high thermal conductivity of copper whose materials cost and processing cost is low and by covering the surface of the base material 101 with a precious metal layer 104, oxidation and degradation of the heating furnace at a high temperature can suppressed. A nickel layer 103 covers the surface of the base material 101 and nickel is thermally diffused into the surface layer part of the base material 101 to form a copper nickel alloy layer 102. The heating furnace is therefore provided, which is stable physically and chemically and superior to a conventional heating furnace in oxidation resistance.
Patent JP-S6037039-A (JP)
Title: Error correcting circuit for word unit
Inventor: SHIBANO MOTOYOSHI
IPC: H03M13/15
Filed: 1983-08-08
Abstract: PURPOSE:To obtain a correcting circuit with which the clock speed is reduced for correction processing by performing a correction for each word in case a BCH code having a large code length and an information bit consists of plural words. CONSTITUTION:A received code word is supplied to a serial/parallel converting circuit 3 and a syndrome arithmetic circuit 1. The circuit 3 transmits only the information bit and converts it into a parallel form for each word. This parallel bit is stored to a temporary memory 5 as a word of 16-bit via a buffer 4. While the circuit 1 performs a syndrome operation and delivers 6-bit of polynomial expression as a syndrome in the case of an error of one bit. Thus ROMs 1-4 are addressed by said 6-bit, and error patterns are read every word. The data are read out of the ROMs 1-4 and the memory 5 and corrected by an exclusive OR circuit 6 to be led to the memory 5 via an FF7 and a buffer 8. Then the data are rewritten and then delivered outside via a latch circuit 9 when the corrections are through with all words.
Patent JP-H09326372-A (JP)
Title: Splitting method for semiconductor wafer
Inventor: NAKAMURA AKIO
IPC: H01L21/301
Filed: 1996-06-06
Abstract: PROBLEM TO BE SOLVED: To split a semiconductor water smoothly while keeping high quality without damaging the cutter. SOLUTION: A semiconductor wafer 11 bonded onto an adhesive tape 12 through an adhesive 13 is held on a wafer chuck stage 14 and then the semiconductor wafer 11 is split by turning a cutter 15. The splitting method comprises a step for upper cutting the semiconductor wafer 11 using the cutter 15 to leave a thickness of 50-350μm, and a step for splitting the semiconductor wafer 11 perfectly by down cutting the same position as the upper cut position using the cutter 15.
Patent JP-S5768511-A (JP)
Title: Exhaust gas purifier
Inventor: ISHIGURO KAZUHIKO
IPC: F01N3/32
Filed: 1980-10-15
Abstract: PURPOSE:To improve the purification rate of an exhaust gas purifier by connecting a gas suction hole formed on the peripheral surface of a catalyst charging section of a monolithic catalyst converter to a gas exhaust hole formed at an exhaust gas system at the upstream of the converter via a pump throgh a circulation pipe, thereby circulating the exhaust gas and treating the gas. CONSTITUTION:A monolithic catalyst 7 is charged in the outer shell 6 of a coverter 1 which consists of inlet and outlet cones 4, 5 and the outer shell 6. Retainers 9, 9' are privided through cushions 8, 8' at both ends of the catalyst 7 in the exhaust gas flowing direction, and a space section 12 communicating with a gap 11 formed due to the thermal expansion is formed through a wire not 10 between the catalyst 7 and the outer shell 6. A suction hole 13 is opened at the outer shell 6 around the space section 12, is communicated with an exhaust hole 17 formed at an exhaust gas system via a pump 3 through circulating pipes 18, 19 and the exhaust gas flowed to the converter 1 is partly circulated to the exhaust gas system 2.
Patent JP-H11339658-A (JP)
Title: Phosphor pattern forming film, its manufacture and manufacture of substrate for fluorescent character display using it
Inventor: TANAKA HIROYUKI
IPC: H01J9/227
Filed: 1998-05-26
Abstract: PROBLEM TO BE SOLVED: To manufacture a substrate for making a substrate for a fluorescent character display having excellent dimensional accuracy, without many process with good workability. SOLUTION: In this manufacturing method for a phosphor pattern forming film, phosphor paste is discharged from a nozzle of a dispenser to a position corresponding to a position where the phosphor pattern on a substrate for making a substrate for a fluorescent character display on a film of a base material should be formed. In this manufacturing method for the substrate for the fluorescent character display, a resin pattern containing a phosphor of the phosphor pattern forming film is transcribed to the substrate for making the substrate for the fluorescent character display, and is baked.
Patent JP-S6036349-A (JP)
Title: Glass composition
Inventor: OKUYAMA MASAHIKO
IPC: C03C3/097
Filed: 1983-08-05
Abstract: PURPOSE:The titled composition that is obtained by admixing appropriately the following essential components: SiO2, B2O3, Al2O3 and Cu2O, thus being suitably used as an insulating coat under the load of large tensile stress. CONSTITUTION:The objective glass composition is composed of, as essential components, 30-65mol% of SiO2, 11-45mol% of B2O3, 5-15mol% of Al2O3, and 10-20mol% of Cu2O and, as optional components, less than 5mol% of P2O5, less than 2mol% of V2O5, less than 2mol% of Na2O, less than 5mol% of PbO, less than 3mol% of SnO2 and less than 10mol% of ZnO. The total amounts of the essential components are required to exceed 85mol%. The resultant composition has a softening point of about up to 660 deg.C and a thermal expansion coefficient of less than 40X10<-17>/ deg.C. The composition is suitably used as an insulating coat formed on silicon steel plates.
Patent JP-S5844085-A (JP)
Inventor: SHIMOMURA MASAO
IPC: D05C5/06
Filed: 1981-09-11
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S521091-A (JP)
Title: Process for preparing amino acids
Inventor: KUBOTA KOUJI
IPC: C12R1/15
Filed: 1975-12-01
Abstract: PURPOSE: A process for preparing amino acids, convenient process for mass production, by the use of inexpensive carbon sources. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-H01312883-A (JP)
Title: Semiconductor laser device and manufacture thereof
Inventor: TAKAHASHI YASUHITO
IPC: H01S5/00
Filed: 1988-06-10
Abstract: PURPOSE:To allow a semiconductor layer to be easily equipped with an ohmic contact resistance and its contact resistance becomes low in such a manner that it can be disregarded and thus this device makes injection carriers as well as the confinement of light satisfactory by embedding side faces of an active layer with a binary or more compound semiconductor layer and then, providing a binary or more compound semiconductor layer on the above embedded layer through an oxide or nitride thin film layer. CONSTITUTION:A double hetero structure possesses the thin film of a binary or more compound semiconductor layer as an active layer 6 and ternary or more compound semiconductor layers having energy gaps which are larger than that of the active layer as clad layers 5 and 7. Side faces of the above hetero structure are embedded with a binary or more compound semiconductor layer 4 having not only an energy gap which is larger than those of the active layer 6 as well as the clad layers 5 and 7 by more than 0.3eV but also a small refractive index and then, a binary or more compound semiconductor layer 2 is formed on the above embedded layer through an oxide 3 or nitride thin film layer. As a cap layer 2 spreads not only on a mesa part but also over the whole face of the above compound semiconductor layer, this device allows the semiconductor device to be easily equipped with an ohmic contact resistance and its contact resistance becomes low in such a manner that it is disregarded. This approach thus makes injection carriers and the confinement of light satisfactory.
Patent JP-S624799-A (JP)
Inventor: MIYAZAWA KIYOSHI
IPC: C11D17/00
Filed: 1985-07-01
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5368970-A (JP)
Title: Solder electrode structure
Inventor: KANZAWA RIYOUSAKU
IPC: H01L21/60
Filed: 1976-12-01
Abstract: PURPOSE: To improve the moisture resistance of a semiconductor element by forming an underlying metal layer on the first insulating and protecting film selectively covering wiring layers and forming a second insulating and protecting film selectively on this thereby defining the shape of solder electrodes. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-H11332668-A (JP)
Title: Kitchen heating device-comparing and checking device
Inventor: MANABE KANJI
IPC: A47F7/00
Filed: 1998-05-26
Abstract: PROBLEM TO BE SOLVED: To easily render basic knowledge concerning the features and internal structure of each device to users by plurally arranging range tables consisting of various kinds of devices separately by each heating source, each heating system and each use and displaying the fuel consumption related values of the devices. SOLUTION: One plate of counter table 12 is horizontally fixed along a kitchen wall 11 to incorporate four kinds of gas heater system range tables 9 and three kinds of electric heater system range tables 10 in order from one end of the wall 11. A fuel consumption display part is fitted on the wall surface of the wall 11 behind each heater to display the difference of fuel consumption depending on a heating source in real time. The tables 9 consists of a standard built-in gas range table 1, a composite oven type built-in gas range table 2, a flat type gas range table 3 and a high calorie gas range table 4. The tables 10 consist of an electromagnetic induction heating electric range table 5, a halogen heater electric range table 6 and a radiant heater electric range table 7.
Patent JP-S5935245-A (JP)
Title: Pseudo fault generator
Inventor: BANDOU KOUICHI
IPC: G06F11/22
Filed: 1982-08-20
Abstract: PURPOSE:To generate a pseudo fault even under microinstruction execution, by generating the pseudo fault when the instruction code of a microprogram being executed coincides with a preset instruction code for the generation of the pseudo fault. CONSTITUTION:A desired pseudo fault switch SW among switches SW11 and a desired pseudo fault generation microinstruction code setting swith SW1 among switches SW4 are set. The setting of those SWs is possible regardless of whether a data processor 1 is in operation or not, and set values are changed during the operation. A microinstruction register output 2 from the processor 1 is stored in a microinstruction buffer register 3. The output of a pseudo fault generation microinstruction code register 5 having the SW4 set is compared with the output of the register 3 by a comparing circuit 8; when they coincide with each other, a pseudo signal generating circuit 10 is driven by a coincidence signal 9 to output a pseudo fault signal 12 set by the SW11 to the pseudo fault application point in the processor 1. The signal of ''1'' or ''0'' depending upon the circuit characteristic of the application point is generated.
Patent JP-H11334707-A (JP)
Title: Sandwich packing method and sandwich packing device
Inventor: NAKAMURA HIROKI
IPC: B65B61/20
Filed: 1998-05-26
Abstract: PROBLEM TO BE SOLVED: To provide a quite superior sandwich packing method capable of attaining a large amount of sandwich packed products of good outer appearance by an easy packing operation wherein even if there occurs a case that the sandwich is moved within a bag main body, viscous material or adhering seasoning material is scrubbed to the inner surface of a film adhered to the viscous material or adhering seasoning material through the moving sandwich. SOLUTION: A sandwich 7 is transferred to a suspended film piece to cause the surface 7a of the sandwich 7 having exposed various kinds of viscous material or adhering seasoning material to be contacted, wherein the film piece contacted with the surface 7a is cut by a predetermined length, the attained sheet-like film 9b is dropped onto the surface 7a to cover the surface 7a, and then the sandwich 7 is fed into the bag main body 1 and packed.
Patent JP-S5477187-A (JP)
Title: Adjustment of ultrared gas analyzer
Inventor: OKADA AKIRA
IPC: G01N21/35
Filed: 1977-12-01
Abstract: PURPOSE:To adjust the zero point and span of an ultrared gas analyzer, while flowing gases to be measured to a sample cell, by using an aptical attenuator of preset attenuation in a wavelength range other than the range to be measured. CONSTITUTION:There is interposed between a sample cell 2 and a detector 4 a narrow band pass filter 3 which allows the ultrared ray of the wavelength range having no absorption by the gases to be measured to pass therethrough. The ultrared ray coming from a light source 1 and passing through the cell 2 and the filter 3 is received by the detector 4, and the gain of an amplifier is so adjusted that the indication takes the maximum of the scale thereby to adjust the zero point. Then, an optical attenuator 4 having the same attenuation as the absorption of the ultrared ray due to the gases of 50 ppm is inserted into an optical path so that the quantity of the light received is measured by the detector 4 to determine the span of 0 to 50 ppm. After the span is determined as in the above, the filter 3 and the attenuator 5 are removed, and a filter allowing the absorption band range of the gases to pass therethrough is inserted into the optical path so that the concentration of the gases passing through the cell 2 may be measured (although requiring conversion).
Patent JP-S5769477-A (JP)
Title: Information processing method
Inventor: KUBOTA YUTAKA
IPC: G06V10/24
Filed: 1980-10-17
Abstract: PURPOSE:To perform information processing while correcting a mask position in case of a shift in pattern position, by detecting the point where a video signal exceeds a specific level and by controlling a mask on the basis of the detected point. CONSTITUTION:A video detection part 4 is set when a composite video signal 1a from a camera 1 exceeds a threshold level and reset with a vertical synchronizing signal contained in the composite video signal 1a. On the basis of the output 4a of the video detection part 4, a mask control part 5 sends a mask control signal 5a to a modulator 6 and a mask processing signal 5b to an information processing part 7 at prescribed timing. Then the modulation part 6 performs the luminance modulation of the composite video signal by a mask control signal 5a, and a mask part is not displayed on a monitor 2. The information processing part 7 extracts a specific part from the composite video signal and outputs 3 a signal after information processing.
Patent JP-H01312897-A (JP)
Title: Handle structure of large apparatus
Inventor: ARAI TOSHIYUKI
IPC: G11B33/02
Filed: 1988-06-10
Abstract: PURPOSE:To make it possible to directly grasp a horizontal arm section through the opening of a side plate and achieve an improvement in strength of the entire handle by forming the opening so as to expose the horizontal arm section outwardly in a portion corresponding to the horizontal arm section of the frame of the side plate. CONSTITUTION:A frame 2 comprises four struts 2a, a top, a middle, and a bottom transverse frame 2b, 2c and 2d fixed to the top, middle and bottom parts of these struts 2a by welding, etc., and a pair of horizontal arm sections 2e, 2e fixed to respective struts 2a between the top and middle frame 2c, 2d at both sides by welding, etc. A pair of opening 3a, 3a of long sideways are formed on the side plate 3 at a portion corresponding to this pair of horizontal arm sections 2e, 2e so as to expose the pair of horizontal arm sections 2e, 2e outwardly respectively, and handle frames 4, 4 molded by substantially rectangular, cylindrical synthetic resin, etc., are fitted. Since the horizontal arm section of a frame is directly grasped, or used by the opening of a side plate f2, the strength of a handle is increased, and its durability is improved.
Patent JP-H0310204-A (JP)
Title: Nonlinear optical fiber and its manufacture
Inventor: AZEBIRU TOMIO
IPC: G02B6/00
Filed: 1989-06-07
Abstract: PURPOSE:To easily couple intensive light and to transmit it to a distant place by decreasing at least the diameter of a core in an axial direction gradually from one end to the other end and increasing the refractive index of the core gradually in the direction of the decrease in core diameter. CONSTITUTION:At least the diameter of the core 42 between the diameter of a fiber 41 and the diameter of the core 42 decreases axially and gradually from one end to the other end and the refractive index of the core 42 increases gradually in the direction of the decrease in the diameter of the core 42. Then when one end where the diameter of the core 42 is large is used as an incidence end, intensive light can be coupled with high efficiency. Further, the core of this nonlinear optical fiber 41 becomes this in the axial direction, so as incident light is propagated, the light enters an area where the gain of induction Raman scattering is high. Consequently, the light can be transmitted efficiently to a distant place.
Patent JP-H0437872-A (JP)
Title: Display controller
Inventor: YAMAZAKI SHUICHI
IPC: G03G15/04
Filed: 1990-06-04
Abstract: PURPOSE:To input a pressure detecting signal to a setting-value alteration control means from a pressure detecting means, and to control the alteration of the setting of a numeric value displayed on a display means while changing a setting-time interval according to the signal by depressing a positive key switch of a negative key switch. CONSTITUTION:As the positive key switch and key switch for a zoom variable power, resistor switches 5 and 6 where a resistance value is changed by means of pressure produced by depressing are used. The switches 5 and 6 are connected to resistors R1 and R2, respectively. And their nodes are connected to the A/D converter inputs AN0 and AN1, respectively, of a microcomputer 1. The read of the inputted voltages by the resistor keys 5, 6 and the program by zooming display and control are executed at every interruption processing of an inner timer incorporated in the computer 1. In this case, the greater the pressure produced by depressing the resistor switches 5 and 6, the bigger the values of the AN0 and AN1; and the data which is set in the timer has a small value. The interruption processing period is determined by the data. The greater the pressure produced by depressing the resistance switches 5 and 6, the shorter the length of time that a numeric value for the the zoom display is altered for increase or decrease.
Patent JP-H0310430-A (JP)
Title: Demodulating clock correction device
Inventor: SAKAI MASAHIRO
IPC: H04B1/10
Filed: 1989-06-07
Abstract: PURPOSE:To improve a radio data system (RDS) data reception rate and to collect information in a short time by correcting an RDS clock after the demodulation of a received error RDS signal in an RDS receiver. CONSTITUTION:A shift register enable duty ratio control circuit (SREGEN DUTY ratio control circuit) is constituted of a counter (1) 1, a multiplexer (1) 2, a pulse generator (1) 3, a counter (2) 4, a counter (2) 4, a multiplexer (2) 5, and a pulse generator (2) 6, and generates a basic clock synchronously with the received RDS clock and whose pulse width is properly modulated by the duty ratio control. An internal clock generating circuit generates an internal clock based on the basic clock and a demodulates RDS clock. Since the demodulates RDS clock is corrected into an accurate clock as the internal clock, the reception rate of the receiver RDS data after demodulation is improved and the information is collected in a short time.
Patent JP-H01316437-A (JP)
Title: Manufacture of medium-low carbon ferromanganese
Inventor: KISHIMOTO YASUO
IPC: C22C33/04
Filed: 1988-06-14
Abstract: PURPOSE:To permit the through manufacturing of medium-low carbon ferromangenese from Mn ores, etc., at relatively low temp. at the time of subjecting the molten metal of high Cr ferromanganese by reduction refining to decarburization refining in a reaction vessel by treating it under prescribed process-conditions. CONSTITUTION:Mn/Fe of Mn ores at the time of reduction refining is regulated to >=4.5 and the above molten metal contg., by weight, 73 to 81% Mn and <=0.5% Si is charged into a reaction vessel at >=1300 deg.C to blow an oxygen-contg. gas onto the bath face of the molten metal from an upper blowing lance. As for the feeding speed of the above gas, before the bath temp. reaches 1600 deg.C, the heating temp. per metal ton is regulated to >=6.0 deg.C/Nm<3>O2, and during this blowing time, the slag structure is retained to (MnO)/{(MnO)+(CaO)+(SiO2)}>=0.8. When the bath temp. rises to 1600 deg.C or above, the above feeding speed is regulated to <=2.0Nm<3>/min and the indentation depth of the bath face by the blowing of the above gas is regulated to <=200mm. Furthermore, as the amt. of the slag increses, the upper blowing lance is lowered while the indentation depth is retained to <=200mm and the amt. of a bottom blowing gas is incresed, by which decarburization refining is executed to ferromanganese.
Patent JP-H0818979-A (JP)
Title: Image processor
Inventor: KATO MASATO
IPC: H04N19/895
Filed: 1994-06-27
Abstract: PURPOSE:To obtain an image with low deterioration of picture quality even when an incorrectable error occurs in coded data by generating mode information by using the mode information of a peripheral block in a block corresponding to error mode information and performing the decoding of an image signal based on the information. CONSTITUTION:The image signal inputted from an input terminal 101 is digitized by an A/D conversion circuit 102, and divided into the blocks consisting of eight picture elements in the horizontal direction and eight lines in the vertical direction. The image signal is encoded by an encoder circuit 103, and it is error correction-encoded by compressing and adding parity data in an encoder circuit 104, and outputted to a decoder side via a transmission line 105. Data is stored once in memory 111 on a reception side, and after that, error correction processing is applied to encoded image data and encoded mode information by a correction circuit 112. The data and information are inputted once to memory 121 in an encoder circuit 113, and the mode information is corrected in a mode correction circuit 122, and when an encoding mode represents the same mode, the encoding mode of an error block is outputted to the circuit 113 setting same as that of an adjacent block, and it is decoded, then, outputted via a D/A conversion circuit 116.