baber/WOPTO huggingface dataset:
Patent TW-342536-B (TW)
Title: Nickel-metal hydride storage cell having a high capacity and an excellent cycle characteristic and manufacturing method thereof
Inventor: TAKEE MASAO
IPC: H01M10/24
Filed: 1997-03-25
Granted: 1998-10-11
Abstract: A nickel-metal hydride storage cell comprising: a positive electrode which is a non-sintered nickel electrode filled with a nickel active material comprising nickelous hydroxide or matrix particles with nickelous hydroxide as the main ingredient and a cobalt compound layer coated on a portion or all of the surface of the matrix particles; a negative electrode which a metal hydride electrode filled with a hydrogen-absorbing alloy capable of absorbing and releasing hydrogen; and an electrolyte consisted of an alkali solution; in the cell, the positive electrode non-reactive capacity rate (represented by the Equation 1) and the negative electrode charge depth (represented by the Equation 2) after the initial charge/discharge are 16% or lower, and 80% or lower, respectively; positive electrode non-reactive capacity rate % = (positive electrode theoretical capacity - actual cell capacity) / positive electrode theoretical capacity x 100 --- Eq. 1; negative electrode charge depth % = (negative electrode remaining capacity + actual cell capacity) / negative electrode whole capacity x 100 ... Eq. 2.
Patent TW-343306-B (TW)
Title: Signal-transfer system and semiconductor device for high-speed data transfer
Inventor: OKAJIMA YOSHINORI
IPC: H03K19/0175
Filed: 1997-05-10
Granted: 1998-10-21
Abstract: A signal-transfer system for transferring a signal via a line having no anti-signal-reflection resistor, the signal-transfer system being characterized in comprising a line (10) having an equalized characteristic impedance Z0; and an output circuit (12, 12A, 12B) having an output resistance Z0/2 and outputting to the line (10) a signal which has a voltage difference between a high level and a low level smaller than about 1 V.
Patent TW-347513-B (TW)
Title: A novel division algorithm for floating point or integer numbers
Inventor: GAD S SHEAFFER
IPC: G06F7/52
Filed: 1997-05-29
Granted: 1998-12-11
Abstract: A computer-implemented method of dividing numbers according to a radix comprising the steps of: (a) subtracting a divisor from a dividend to generate a first intermediate result; (b) shifting the first intermediate result by N-bits, where N is an integer and 2N is equal to the radix, to obtain a remainder; (c) referencing a memory unit containing a table of multipliers that is indexed by a portion of the remainder and a portion of the divisor, the table providing one or more multipliers; (d) multiplying the divisor by each of the one or more multipliers to generate one or more second intermediate results; (e) subtracting from the remainder each of the one or more second intermediate results to generate one or more corresponding third intermediate results; (f) selecting as a quotient digit a largest multiplier from the one or more multipliers which corresponds to a third intermediate result having a smallest positive value as among the one or more third intermediate results.
Patent TW-384321-B (TW)
Title: Method for the manufacture of extruded lyocell articles
Inventor: NEWBURY JOHN PAUL
IPC: C08J5/00
Filed: 1997-08-07
Granted: 2000-03-11
Abstract: Use in the manufacture of extruded lyocell articles of cellulose having a value of Pipe Flow Index (as defined) to Jet Flow Index (as defined) in the range from 0.85 to 6 can offer a number of advantages, particularly in cellulose solution transport and in spinning stability. Pipe Flow Index is designed to assess the flow performance of cellulose solution under low shear conditions typically experienced in transfer pipework. Jet Flow Index is designed to assess the flow performance of cellulose solution under high shear conditions typically experienced during extrusion. The extruded lyocell articles are made by a method which comprises the steps of:(1) dissolving cellulose in an aqueous tertiary amine N-oxide solvent to form a solution; (2) extruding the solution through a die by way of a gaseous gap into a coagulating bath to form an extruded lyocell precursor; (3) washing the extruded lyocell precursor free from tertiary amine N-oxide; and (4) drying the washed lyocell precursor, thereby forming the extruded lyocell article.
Patent TW-508353-B (TW)
Title: Method of preparing phosphodiesterase IV inhibitors
Inventor: DORZIOTIS ILIAS K
IPC: C07D213/30
Filed: 1997-09-15
Granted: 2002-11-01
Abstract: This invention is concerned with a novel process for the preparation of a compound of structural formula I wherein Rl and R2 independently are aryl, C2-15 alkenyl or C1-15 alkyl, either unsubstituted or substituted with one or three substituents, which can be the same. Or different, selected from the group consisting of Ra, wherein Ra belongs to a group consisting of 01-6 alkyl, aryl, halo, -N(R3)2 -NO2, -CN, -OR3 -C3-6 cycloalkoxy. -CO(R3), -OOOR3, SO2R3 and SR3 wherein R3 is selected from the group consisting of hydrogen, C1-6 alkyl, C2-6 alkenyl and aryl, said alkyl, alkenyl or aryl optionally substituted with 1 to 3 groups of Ra which is an important antiasthmatic agent.
Patent TW-370728-B (TW)
Title: Blended crystalline/amorphous polysilicon thin film transistor and manufacturing method thereof
Inventor: LIN KANG-CHENG
IPC: H01L29/78
Filed: 1997-09-26
Granted: 1999-09-21
Abstract: The present invention discloses a blended crystalline/amorphous polysilicon thin film transistor element used as a switch of liquid crystal display devices, and the manufacturing method thereof, wherein a n+ doped amorphous polysilicon layer has an advantage, i.e., can be used as a mask in a laser anneal process, thus only a selected part of a hydrogenated amorphous polysilicon structure is transferred into a crystalline structure, while the rest maintains as an amorphous structure. The result is that a crystalline polysilicon thin film transistor and at least an amorphous polysilicon thin film transistor are formed in the same structure, with advantages of obtaining a high current and low current leakage in a blended structure of crystalline polysilicon thin film transistors and amorphous polysilicon thin film transistors.
Patent TW-536426-B (TW)
Title: Oxygen absorption composition
Inventor: NAKAGAWA KAZUMOTO
IPC: A23L3/3436
Filed: 1997-10-09
Granted: 2003-06-11
Abstract: There is disclosed an oxygen absorption composition without requiring moisture in oxygen absorption which comprises an oxygen absorbent comprising, as a principal component, an oligomer in liquid form having an unsaturated group, a number-average molecular weight in the range of 150 to 4,000 and a viscosity in the range of 100 to 4,000 cP such as butadiene oligomer in liquid form and an oxygen absorption-accelerating substance, being supported on a carrier; and an other gas absorbent. The above principal component may be replaced with an oligomer in liquid form having an unsaturated group and being incorporated with an oxygen-unabsorptive diluent to adjust the viscosity of the mixture to 10 to 4,000 cP. The above composition is enhanced in oxygen absorption capability in every preservation atmosphere from a low humidity to an intermediate and high humidity, easily producible, minimized in gas generation after oxygen absorption and almost free from odor problem.
Patent TW-399101-B (TW)
Title: Modified physical vapor deposition chamber and method of depositing materials at low pressure
Inventor: FU JIANMING
IPC: H01L21/203
Filed: 1997-12-05
Granted: 2000-07-21
Abstract: A conventional sputtering chamber is modified by providing a target extension that surrounds the plasma region and confines electrons to the plasma. This enhancement of confinement of the plasma reduces the pressure needed to maintain the plasma. At low pressures, reduced scattering of sputtered species takes place and more sputtered particles arrive vertically at the substrate, improving the filling of high aspect ratio openings.
Patent TW-411513-B (TW)
Title: Recessed gate of MOSFET
Inventor: WU SHIE-LIN
IPC: H01L21/283
Filed: 1998-02-06
Granted: 2000-11-11
Abstract: The processes of forming a transistor comprises includes: forming a pad insulating layer; forming a stacked layer; removing a portion of the stacked layer; forming a gate insulating layer; performing an ion implantation to form a doped region; removing the pad insulating layer and the stacked layer; forming a semiconductor layer; removing a portion of the semiconductor layer; forming a spacer; removing a portion of the gate insulating layer; implanting ions to form an anti-punch through region; forming a first insulating layer; forming a gate; removing a portion of the first insulating layer; forming a junction region by ion implantation; forming a second insulating layer and  performing a heat treatment. Metal conducting lines are formed to complete the formation of the transistor. The structure of the transistor comprises a substrate, a gate insulating layer, a gate, a gate oxide layer, a semiconductor layer, a source/drain region, an extended source/drain region and an anti-punch trough region.
Patent TW-390003-B (TW)
Title: Method for producing a semiconductor package
Inventor: SHIMIZU MITSUHARU
IPC: H01L21/48
Filed: 1998-02-11
Granted: 2000-05-11
Abstract: A semiconductor package includes a laminate of substrates having a cavity 16, through-holes 25 and circuit patterns, wherein the through-holes 25 and circuit patterns, wherein the through-holes 45 and some of the circuit patterns 18 are coated with a plated nickel/hold coating 50. A method for producing the package comprises a step for producing a laminate by sandwiching circuit boards 20a, each having an opening 14 for the cavity and inner circuit patterns 18, with a pair of circuit boards 20b having no opening, a first plating step for forming bores 44 for the through-holes and applying a plated copper coating 48 to the inner wall of the through-hole or others, a step for forming outer circuit patterns on the circuit board 20b by the etching, and a step for opening the cavity 16 by providing an opening 60 in the circuit board 20b, and a second plating step for applying a plated nickel coating and a plated gold coating 50 to the inner circuit patterns 18 in the cavity 16, wherein a further step is interposed between the first plating process and the cavity-opening process, for applying a plated nickel coating 58, to the through-holes.
Patent TW-403974-B (TW)
Title: Semiconductor IC device
Inventor: KAWAGUCHI MASAYUKI
IPC: H01L21/40
Filed: 1998-03-05
Granted: 2000-09-01
Abstract: Because the isolator film at the contact holes of the emitter is thinner than the film at the other contact holes of the same, the pin electrode of emitter area is etched as hollow, thus the characteristics of the transistor will deviate since the emitter bottom is not flat enough. And for the need of profile, said the pin electrode has to be elongated on the local silicon oxide (LOCOS film), which will induce the resistance problem. The method provides in the present invention is to form the pin electrode 57 by exposing the active base area 61, and at said pin electrode 57, use the insulated film 56 to form a pin electrode 64 of emitter. And for reducing the resistance 64 of these pin electrodes 57, a silicon nitride film SN is formed under these pin electrodes as the bottom film.
Patent TW-385500-B (TW)
Title: Combined slurry dispenser and rinse arm and method of operation
Inventor: DANIEL KENNEDY
IPC: B24B37/04
Filed: 1998-05-05
Granted: 2000-03-21
Abstract: This invention provides a method and apparatus for delivering an agent to a surface, such as a polishing pad surface and preferably one or more polishing fluids. This invention also provides a method for rinsing one or more surfaces, such as a polishing surface or a substrate surface, which the rinse agent is caused to flow across the surface from a central region to an outer region where unwanted debris and material is collected.
Patent TW-445308-B (TW)
Title: Method and device for analytical monitoring of a bath for the electroplating treatment of substrates surfaces
Inventor: BELE MARJAN
IPC: H05K3/00
Filed: 1998-06-17
Granted: 2001-07-11
Abstract: The invention relates to a method for the analytical monitoring of a bath solution containing polyelectrolytic compounds, charged surfactants or mixtures of both materials for the electro-plating treatment of substrate surfaces and also devices for carrying out the method. The content of polyelectrolytic compounds and surfactants in the solution is determined by a flow potential measurement for analytical monitoring. Especially for exactly determining the concentration of the compound, a titration is introduced, the flow potential being determined at the end-point evaluation during titration. The devices which are appropriate for carrying out the method are suited to the continuous detection of the concentration of compounds in a bath solution and its subsequent metering.
Patent TW-370620-B (TW)
Title: Testing head allocating apparatus for semiconductor element testing device
Inventor: NEMOTO MAKOTO
IPC: H01L21/66
Filed: 1998-07-24
Granted: 1999-09-21
Abstract: The invention provides a manual testing head allocating apparatus having superior operation characteristics, high safety and low cost for semiconductor element testing device. Cylinders 4 are installed respectively on two positions in opposite directions of testing head 81. The summed driving force of the cylinders is set to be approximately the same with the weight of a testing head, and acts as a balancer. Manual jack mechanisms 1, 1B are installed respectively on side parts in opposite directions of the testing head. Manual jack mechanisms are comprised of: longer feeding screws 11,11B which are wheeling-freely supported, two active screw components 12A, 12B screwed with the feeding screws, driving arms 16A, 16B which are wheeling-freely installed on the active screw components, and driven arms 18A, 18B which are wheeling-freely installed on the driving arms and have about the same shape and sizes with the driving arms. By rotating manually the feeding screw 11 thereof, the apparatus can move active screw components to turn driving arms and driven arms so that the testing head can move up and down.
Patent TW-401374-B (TW)
Title: Heat conductive BN filler and electrically insulating/heat dissipating sheet
Inventor: WASHIO YUICHI
IPC: C08J5/00
Filed: 1998-08-03
Granted: 2000-08-11
Abstract: A heat conductive BN filler having a cohesive factor of 3-50% is provided. An electrically insulating/heat dissipating sheet is obtained by mixing the BN filler with an organopolysiloxane and a crosslinking agent, shaping the resulting silicone rubber composition into a sheet form, followed by vulcanization. Without special orienting means, the BN particles are oriented in the sheeting step such that their a-axis is perpendicular to the sheet surface.
Patent TW-469478-B (TW)
Title: Environmental appraisement system for a clean room
Inventor: RUY JAE-JUN
IPC: F24F7/06
Filed: 1998-09-03
Granted: 2001-12-21
Abstract: An environmental appraisement system for a clean room comprising: a plurality of measuring devices each installed at a specific location in the clean room, for measuring environmental conditions of the clean room; a plurality of transmitters each connected to each measuring devices, for performing signal shaping with respect to measured data before transmitting the data in radio; a receiver installed within the clean room, for receiving radio signals transmitted from the transmitters and performing signal converting with respect to the radio signals; and a host computer connected to the receiver, for analyzing the measured data and comparing it with predetermined, limited values, thereby performing appraisement.
Patent TW-379352-B (TW)
Title: Deflection yoke fastener and deviation yoke, method of manufacturing deflection yoke fastener, method of manufacturing deviation yoke, method of mounting cathode ray tube deviation yoke
Inventor: KOGA SOUSUKE
IPC: H01J29/82
Filed: 1998-09-28
Granted: 2000-01-11
Abstract: The present invention relates to a bolt deviation yoke fastener keeping bolt from being stuck or burnt. The fastener 80 is disposed by circumference 8a, a pair of protruding plate 8b outward from both ends of the circumference 8a, and pases through bolt 8c formed on the holes of the protruding plate. By first applying the fluorine lubricant 9 onto bolt 8c, for lubrication between the bolt hole of the protruding plate 8b and the bolt 8c.
Patent TW-438901-B (TW)
Title: Apparatus for depositing a film with a four-corners grounded susceptor
Inventor: LAW KAM S
IPC: C23C16/517
Filed: 1998-10-02
Granted: 2001-06-07
Abstract: An apparatus deposits a high quality film onto a transparent substrate in a reactor. The transparent substrate may be made of glass, quartz or a polymer such as plastic. The transparent substrate is heated in a process chamber and a process gas stream is introduced into the process chamber. The apparatus generates a high frequency power output and a low frequency power output from a high frequency power supply and a low frequency power supply, respectively. The high frequency power output is generated at a frequency of about thirteen megahertz or more, and at a power from about one to five kilowatts, while the low frequency power output is generated at a frequency of about two megahertz or less, and at a power from about 300 to two kilowatts. The high frequency power output and the low frequency power output are superimposed and used to excite a plasma from the process gas stream at a pressure between about 0.4 Torr and 3 Torr, and at a temperature between about 250 DEG C and 450 DEG C to deposit a smooth thin film onto the transparent substrate.
Patent TW-406263-B (TW)
Title: Memory element
Inventor: FUKANO TATSUO
IPC: G11B7/0045
Filed: 1998-10-15
Granted: 2000-09-21
Abstract: Memory element comprises at least a first material and a second material, and is changed the optical properties and recorded the information by reacting said two materials through giving the external energy, wherein the reaction of said two materials which deteriorates the recording properties excluding recording is inhibited. An optical disk 100 as a memory element is obtained by forming WO3 film 2 as the second material, C film 3 as the third material, Sn-10 atom % Sr film 4 as the first material on the base plate 1 in this order. When the laser light for recording as the external energy is irradiated, it is passed through the C film 3 or/and destroyed the C film 3. WO3 forming the film 2 is reduced to form WO2.83, and Sn-10 atom % Sr forming the film 4 is oxidized to form SrO and/or SnO essentially. In the unirradiating of the laser light for recording, the reaction of WO3 film 2 with Sn-10 atom % Sr film 4 is inhibited in the presence of C film 3.
Patent TW-410445-B (TW)
Title: Semiconductor chip-scale package and process thereof
Inventor: WANG HSING-SENG
IPC: H01L23/28
Filed: 1998-11-16
Granted: 2000-11-01
Abstract: There are disclosed a semiconductor chip-scale package and process thereof. The semiconductor chip-scale package comprises a metal heat sink which is covered on the surface of semiconductor chip. The heat sink can also form openings thereon so as to have a better air flow for the cooling effect. In the first process of the semiconductor chip-scale package, each semiconductor chip on the substrate is bonded with one single heat sink. In the second process of the semiconductor chip-scale package, it provides a long heat sink having multiple connected heat sinks which are also connected with the substrate. Both processes can use conventional packaging apparatus to produce the semiconductor chip-scale package.
Patent TW-401652-B (TW)
Title: The fast-wave oscillation type antenna with multi-layer grounding
Inventor: JUANG CHING-GUANG
IPC: H01Q5/10
Filed: 1998-12-03
Granted: 2000-08-11
Abstract: This invention designs the antenna by utilizing the resonance phenomena of the fast-wave leaky mode, the designed antenna has the following advantages: 1. It has relatively small volume; 2. It could be installed on the printing circuit board through the surface mount technology (SMT); 3. It could use the general media with relative dielectric constant value between 2 to 5.
Patent TW-393837-B (TW)
Title: Antenna switching diversity
Inventor: AKERBERG DAG E SON
IPC: H04B7/06
Filed: 1998-12-24
Granted: 2000-06-11
Abstract: An antenna switching diversity radio communication system includes a base station and a radio terminal. Transmission and reception is separated in both time and frequency in both base station and radio terminal. Reception quality uplink is measured(S1) on a set of several antennas belonging to the base station. The base station stores and later retrieves this quality measure for selecting (S3) one of the antennas for uplink reception. The radio terminal measures (S2) and reports (S4) downlink reception quality to the base station, which stores (S5) this information to later select (S6) one of the antennas for downlink transmission.
Patent TW-415006-B (TW)
Title: Split gate having insulating sidewall
Inventor: SUNG HUNG-JENG
IPC: H01L21/76
Filed: 1999-01-30
Granted: 2000-12-11
Abstract: A method for manufacture of a split gate. A gate oxide layer, a conductive layer made of polysilicon and a mask layer made of silicon nitride are formed on a semiconductor substrate, and then patterned to form a first stack structure and a shallow trench within the substrate. The mask layer is removed, and a silicon oxide layer and a silicon nitride layer are formed on the conductive layer so that a second stack structure including the silicon oxide layer, the silicon nitride layer and the conductive layer is formed. The second stack structure is patterned to form a floating gate with a pre-determined pattern. A thermal process is then performed to oxidize the sidewall of the conductive layer of the floating gate, and an insulating sidewall is formed such that the conductive layer becomes a floating gate having bird's beak. A control gate with a pre-determined pattern is formed and a split gate is complete.
Patent TW-480293-B (TW)
Title: Anodizing method and apparatus and semiconductor substrate manufacturing method
Inventor: SAKAGUCHI KIYOFUMI
IPC: H01L21/306
Filed: 1999-02-10
Granted: 2002-03-21
Abstract: A porous layer having a multilayered structure is formed. An Si substrate (102) to be processed is anodized in a first electrolytic solution (141, 151) while being held between an anode (106) and a cathode (104) in an anodizing bath (101). The first electrolytic solution (141, 151) is exchanged with a second electrolytic solution (142, 152). The Si substrate (102) is anodized again, thereby forming a porous layer having a multilayered structure on the Si substrate (102).
Patent TW-411507-B (TW)
Title: Double sidewall raised silicided source/drain CMOS transistor
Inventor: HSU SHENG TENG
IPC: H01L21/84
Filed: 1999-03-04
Granted: 2000-11-11
Abstract: A method of forming a silicided device includes preparing a substrate by forming device areas thereon; providing structures that are located between the substrate and any silicide layers; forming a first layer of a first reactive material over the formed structures; providing insulating regions in selected portions of the structure; forming a second layer of a second reactive material over the insulating regions and the first layer of first reactive material; reacting the first and second reactive materials to form silicide layers; removing any un-reacted reactive material; forming structures that are located on the silicide layers; and metallizing the device.