Patent GB-1523323-A (GB)
Title: Dc to ac inverters
IPC: H02J9/06
Filed: 1975-09-26
Abstract: 1523323 Controlling inverters; standby supply systems SIEMENS AG 26 Sept 1975 [27 Sept 1974 (3) 22 Oct 1974 30 July 1975 13 Aug 1975] 39625/75 Headings H2F and H2H A D.C. to A.C. inverter for use as an alternative supply to an A.C. supply U N  comprises a group of controllable rectifiers T1, T2, a charging circuit 10 for charging a commutation capacitor C, a control circuit 8 for supplying firing signals to the rectifiers, a blocking circuit 20, 21, a regulator 9 for supplying control signals to the control circuit, a further control circuit 16-19 which responds to an initiating signal to release the blocking circuit so that the inverter is fully operative, and a synchronizing sensor 22 which ensures that the inverter output is in phase with the A.C. supply. The mains supply U N  normally feeds a load 1 via a filter 2 and a switch 3 which may be a mechanical or magnetic switch or a switch incorporating thyristors, triacs or ignitions. The regulator 9 receives an actual load voltage signal U L  and a desired load voltage signal U L * to control the circuit 8 such that the firing signals have the correct firing angle whilst the inverter is in the standby condition. If the mains voltage fails, the switch 3 is opened, a switch 6 is closed and a start signal is supplied to a terminal 15. The circuit 8 is divided into a low power portion 8a and a high power portion 8b, the firing signals from the portion 8a being connected to the set and reset inputs of a flip-flop 16. The start signal at the terminal 15 enables that one of two gates 17, 18 which corresponds to the thyristor T1 or T2 which is to be fired on starting the inverter. A thyristor Tr1 or Tr2 is therefore triggered to enable a charged capacitor C1 or C2 to charge the commutation capacitor C with the appropriate polarity. A delay circuit 19 holds the gates 20, 21 of the blocking circuit in a blocked state until the capacitor C is charged and then opens the gate corresponding to the thyristor T1 or T2 that is to be triggered. After the initial commutation process, an inverter 23 blocks the gates 17, 18 to prevent further charging of the capacitor C by the capacitor C1 or C2. In a modification, Fig. 3 (not shown), a charging circuit is provided for the commutation inductance and, depending on the type of inverter, either the capacitor, the inductance or both may be charged prior to starting the inverter. A three phase inverter, Fig. 6 (not shown) including two commutation capacitors is also described in which auxiliary thyristors enable one of the charged capacitors to be connected for the initial commutation and then both capacitors are connected in parallel. A single phase inverter, Fig. 13a (not shown), has main thyristors connected in parallel to increase the output power of the inverter. Fig. 14 (not shown), describes an inverter in which a single commutation capacitor is initially charged with a predetermined polarity so that the inverter thyristor which is initially fired is predetermined. In Figs. 21, 22 (not shown), a high frequency pulse generator enables an initial rapid commutation of the inverter thyristors until the inverter output correctly matches the phase of the A.C. supply U N  at failure.