Patent GB-732221-A (GB)
Title: Apparatus for recording electrical digit signals
Inventor: NEWMAN EDWARD ARTHUR
IPC: G06F3/06
Filed: 1950-11-22
Abstract: 732,221. Electric digital data storage apparatus. NATIONAL RESEARCH DEVELOPMENT CORPORATION. Nov. 8, 1951 [Nov. 22, 1950], No. 28595/50. Class 106 (1). [Also in Group XL (c)J In apparatus for recording a series of N electrical, digit signals, which are presented cyclically, in a store which requires a certain minimum time to record a digit signal which is not more than n times the digit period of the signals, a first digit signal in each successive group of n signals is selected and transferred through an input channel to the store, a second signal in each group is selected and transferred through an input channel to the store and so on for the remaining signals in each group,'the sets of signals being passed through one or more input channels m, where m is not more than n, in such a manner that m sets of signals are transferred to the store in a first presentation of the signals and, if necessary, further m sets in a second presentation, and so on until all the signals are transferred. Information is transmitted in an electronic computer from a mercury delay line to a magnetic drum, the transmission taking n major cycles, i.e. n complete cycles, of the delay line, if m is one. n or n/m, if more than one input channel is used, must have no common factor with N, the number of digits corresponding with a major cycle. In one arrangement having a single input channel (writing head), where N is 1024, n may be any odd number but is preferably 9. The drum rotates once during nine major cycles and has sixty-four tracks. Eight writing heads are mounted for movement together to any one of eight positions, e.g. by the means described in Specification 682,998. When a transmission to or from the drum is to take place, the relevant instruction word is sent to destination DN20, Fig. 8, and through a gate 81, is applied to a gate 82 so that the instruction passes from the highway H through the gate 82. Of the thirty-two digits in an instruction word, the first is a one if a write " transmission (i.e. to the drum) is to take place, the second is a one if a " read " transmission (i.e. from the drum) is to take place, digits 3 to 8 specify which of the sixtyfour tracks is to receive the transmission, the digits 10 to 15 specify whichtrack is to be read, and digits 17 and 18, if ones, order write or read transmissions respectively to take place as soon as possible. Digits 9, 16 and 19 to 32 are not used, In a write, transmission, the first digit re-sets write staticisors S3 to S8 and these are then set according to digits 3 to 8. The staticisors S3 to S5 set up a tree 83, the output of which is applied to a corresponding one of eight gates Tl to T8. The staticisors S6 to S8 set up a further tree 84 which controls the position of the writing heads. The staticisors S6 to S8 are also connected directly and through thirty-two-unit delays to " not-equivalent " circuits E6 to E8 so that if the mechanical position of the writing heads is to be changed, one or more of the circuits E6 to E8 will produce an output during the minor cycle at a gate G16 to pass a P16 pulse to switch on a trigger 86 which is re-set after one hundred millisecs. by 'its output applied through a delay 87. During this time (the time necessary to move the writing heads), the trigger 86 inhibits operation of a gate G20 to delay the actual writing operation. A particular track on the drum may be selected prior to the writing operation itself by an instruction with a zero as the seventeenth digit so that when the same instruction but with a one in that position is received later the writing head will be in the desired position and no delay will be necessary. If a one is present in the seventeenth position, the pulse is gated to switch on a trigger 21, the output of which is passed through the gate G20 to eight gates W1 to W8, each connected to the output of the corresponding gate T and being associated with one of the writing heads WH1 to WH8. Thus, the output of a magnetic write unit 27 is applied to: the selected head. By using two sets of gates T and W, the magnetic write unit may remain operative always. The write unit 27 is fed with digit signals from a gate 18 to which the output of the delay line from and to. which transmissions are made, and "magnetic" clock pulses, are continuously applied. The latter are produced by a generator 20 and occur every nine digit periods so that every ninth digit signal is passed to the unit 27. The "mag netic " clock pulses are also gated by P32 pulses and applied to a gate G21 to which the output of the gate G20 is applied and which consequently produces an output once, every nine minor cycles when the writing operation itself has commenced. A counter 88 produces an output when it has received thirty-three of these pulses which re-sets the trigger 21 to end the writing operation after nine major cycles. The " read " circuits are similar to the " write " circuits-described but as the read unit 28 need be operative only during a reading operation, only one set of gates is provided between the reading heads RH1-RH8 and the read electronic tree 90. For mechanical convenience, the read heads are spaced around the circumference of the drum from the write heads and to correct for this, a unit delay 95 is arranged between the generator 20 and the gates 30 and 19 which are operative'during reading. The delayed magnetic " clock pulses from the gate 30 are applied to an inhibiting connection of a gate 17 in the. normal circulation loop of the delay line so that the original digit signals are erased as the signals read are applied to the input of the delay line through the gate 19. If both " write " and " read " transmissions are ordered in the same instruction, both sets of staticisors are set up and the write and read triggers 21, 22 are switched on. The trigger 21 is, however, switched on first and inhibits operation of a gate G25 so that the read transmission cannot commence until the write transmission is completed. A gate G24, the operation of which is inhibited by the output of the trigger 21, prevents the trigger 22 from being re-set until after the read transmission. In view of the comparatively long time necessary for a transmission, a circuit, Fig. 9 (not shown), may be arranged to stop the computer or actuate an alarm if any instruction is received during a transmission which would disturb it. In a generally similar arrangement, Fig. 10 (not shown), thirty-two read and write heads are used and each set of heads has two alternative positions. Consequently a mechanical shift is rarely necessary and so no arrangements for pre-ordering such a shift are included. The write and read electronic tree circuits are combined so that a simpler instruction word may be used. In this word, only the first seven digits are employed. If the first digit is a one, the circuit is set for a read transmission and operation of the write mechanical shift means is inhibited whereas if the digit is zero, a write transmission is ordered and operation of the read mechanical shift means is inhibited. Digits 2 to 6 select the write or read head and digit 7 selects the mechanical position of the write or read heads. This arrangement also includes means to delay a transmission by two millisecs. after the electronic tree has been set up, thus allowing time for the heavy current output of, the magnetic write unit to be switched to the selected head by electromagnetic relays. To increase the speed of a transmission, several writing and reading heads, equally spaced round the drum, may be used. If three pairs are used, the " magnetic " clock pulse generator is coupled directly to a first write unit and through three and six unit delays respectively to two other write units. Thus, although each head receives every ninth pulse only, the transmission only takes three major cycles. By applying one in three signals to each of three heads, a transmission could take place in a single major cycle. Circuit details. In the " magnetic " clock pulse generator, the basic clock pulses (pulse interval, one microsec.) are applied through a cathode follower pentode VI, Fig. 11, to the cathode of a double triode V2 arranged as a multivibrator so that its left- and right-hand sections conduct for two and one microsecs. respectively. Two out of three clock pulses thus serve to synchronize the switching of the multivibrator. The other clock pulses are rendered ineffective by incorporating in the lefthand anode circuit a tuned circuit with a period of three microsecs. The waveforms at the right-hand grid and anode are thus as shown in Figs. 16c and 16d respectively. The right-hand anode is coupled through a cathode follower pentode V3 to a similar multivibrator circuit but having a tuned circuit with a period of nine microsecs., the output of which is shown in Fig. 16e. This is applied to a further trigger circuit, the output of which includes a sharp positive pulse every nine microsecs. A final trigger pair is switched by this pulse and is adjusted to re-set itself after one microsec. so as to produce the required clock pulses each of one microsec. duration. The unit delay 95, Fig. 8, may comprise a further trigger pair similar to the last-mentioned one which is switched at the end of the one microsec " magnetic " clock pulse and re-sets itself after a further one microsec. The magnetic write unit includes a trigger pair to one side or the other of which a pulse is applied for each " magnetic " clock pulse. These pulses are derived from gates fed with the output of the delay line and the negated output respectively. The output of the unit, which is connected to one anode of the trigger pair, is thus either positive or negative according to the digit to be written. In the middle of the " magnetic " digit period, the trigger pair is reversed by applying a positive pulse, derived from the " magnetic " clock-pulse generator, to the common cathode.