baber/WOPTO huggingface dataset:
Patent JP-S6318338-A (JP)
Title: Electronic flash device
Inventor: KUMAKURA TOSHIYUKI
IPC: H05B41/32
Filed: 1986-07-11
Abstract: PURPOSE:To prevent a photograph from being taken while the quantity of emitted light is deficient by providing a display means which generates a warning when the charging voltage of a 1st main capacitor does not reach a prescribed value. CONSTITUTION:When a power switch 1 is turned on, an oscillation voltage boosting circuit 8 operates to start charging the 1st main capacitor 12 with small capacity in an initial state. At this time, the output of a comparator 16 is at low level and a transistor (TR) 18 is kept off, so a photothyristor coupler 26 does not begin to charge a main capacitor 13 which is turned off. When the charging voltage of the main capacitor 12 does not reaches a constant value, the output voltages of comparators 16 and 21 are still in the initial state and the output of the comparator 21 is at high level; and the base voltage of a TR 5 rises gradually up to its turn-on voltage and then the TR 5 turns on, thereby lighting a light emitting diode 4 for display.
Patent JP-H0213059-A (JP)
Title: System for communication on-line data
Inventor: YAMADA EIJI
IPC: H04M11/00
Filed: 1988-06-29
Abstract: PURPOSE:To execute the restoration of an on-line system in a short time by executing the recognition of a line trouble and the changeover of a line with plural modems. CONSTITUTION:When the line trouble is generated to a private line 300 and a modem 500 recognizes the line trouble of the private line 300 earlier than a modem 600, a line trouble restoration recognizing means 520 issues a line changeover instruction to a telephone line 400 from the private line 300 to a line switching means 530 in the said device 500. The line switching means 530 to receive the instruction executes an automatic transmission through the telephone line 400 to the modem 600. A line switching means 630 in the modem 600 executes an automatic incoming, and it recognized that an opponent destination is the modem 500. Thus, by executing the changeover from the private line 300, in which the trouble is generated, to the telephone line 400, terminal equipment 100 and a host computer device 200 can resume an on-line work through the telephone line 400.
Patent JP-S5588057-A (JP)
Title: Production of photo mask
Inventor: SATOU MASAKI
IPC: G03F1/80
Filed: 1978-12-27
Abstract: PURPOSE:To improve the productivity and reduce the cost, by using the specified resist pattern as mask, exposing the shield film part mainly composed of exposed metal chromium film in a plasma of carbon fluoride base, and obtaining etching resistant film of reverse pattern. CONSTITUTION:A metal chromium film (shield film) 2 is coated on a glass substrate 1, and a negative type photo resist is spread thereon. After prebaking, ultraviolet rays are radiated to the desired part of this resist film to draw a pattern, and further a resist pattern 3 is formed after developing process. This pattern is exposed in CHF3 plasma, and etching resistant film of reverse pattern 4 is formed in the exposed metal chromium film 2 part. Then, removing the resist pattern 3, dipping in a specified chemical etching solution, the exposed part of the metal chromium film 2 is removed, using the etching resistant film 4 as the mask, and a positive type photo mask 6 having a mask pattern 5 is obtained.
Patent JP-S5863883-A (JP)
Title: Electronic clock provided with recording function
Inventor: AYUSAWA HITOMI
IPC: G10L13/02
Filed: 1981-10-13
Abstract: PURPOSE:To easily decide the meaning of an alarm tone by reading out and controlling a pair of storage circuits in which contents with different recognition rates each other are stored through different frequency signals respectively. CONSTITUTION:The operation mode of the titled clock is turned to a voice input mode by depressing a switch 16 to use a speaker as a microphone. The inputted voice is stored in the 1st storage circuit 9 through an I/O switching circuit 13 and an A/D converter 7. On the other hand, voice signals have been already recorded in the 2nd storage circuit 10 at the time of its production. When a coincidence circuit 5 detects an optional set time, a memory controlling circuit 8 is actuated to read out the contents of the storage circuits 9, 10, select any one of the circuits 9, 10 through a selecting circuit 11 and inform the recorded contents from a speaker 15 through the circuit 13. In said circuit configuration, a RAM and a ROM are used for the storage circuits 9 and 10 respectively, and at the reading out from the circuit 10, the frequency of a sampling frequency signal is increased and the circuit 9 is controlled.
Patent JP-H05335316-A (JP)
Title: Electronic component and connecting structure therefor
Inventor: ABE AKIHIKO
IPC: H01L21/60
Filed: 1992-06-01
Abstract: PURPOSE:To prevent generation of cracks in e bump electrodes, even if heat stress is given after connecting, by forming the bump electrodes in uniform height in short time at low cost for materials, and thermocompression at bonding the bump electrodes low temperatures and with low pressure. CONSTITUTION:A base plating layer 5 composed of gold is provided on a connecting terminal 3 composed of aluminum of a semiconductor chip 2, and a bump electrode 6 composed of conductive polymer is provided on the base plating layer 5 by electrolytic oxidative polymerization. In this way, the bump electrode 6 is formed by conductive polymer. Therefore, it is possible to get uniform height in short time with low material cost, and thermocompression bonding is possible at low temperatures and with low pressure. In addition, generation of cracks in the bump electrode can be prevented, even if thermal stress is added after connection, due to the flexibility of the conductive polymer. It is also possible to form the bump electrode composed of the conductive polymer by chemical oxidative polymerization.
Patent JP-H0649408-A (JP)
Title: Polyurea coating composition of improved pot life
Inventor: DAGURASU EI UITSUKUSU
IPC: C08G18/38
Filed: 1993-06-08
Abstract: The present invention relates to a coating composition for the preparation of a polyurea coating which contains     a) a polyisocyanate component,   b) at least one compound corresponding to the formula <CHEM>  wherein   X   represents an organic group which has a valency of n and is inert towards isocyanate groups at a temperature of 100 DEG C or less, R<1> and R<2>   may be identical or different and represent organic groups which are inert towards isocyanate groups at a temperature of 100 DEG C or less, R<3> and R<4>   may be identical or different and represent hydrogen or organic groups which are inert towards isocyanate groups at a temperature of 100 DEG C or less and n   represents an integer with a value of at least 2, and   c) 0.001 to 5 weight percent, based on the weight of components a) and b), of a tin(IV) compound which is a catalyst for the reaction between isocyanate groups and hydroxyl groups.
Patent JP-S5687342-A (JP)
Title: Manufacture of semiconductor device
Inventor: TANGO HIROIKU
IPC: H01L21/033
Filed: 1979-12-18
Abstract: PURPOSE:To prevent metal from being deposited by silicide oxidation by a method wherein silicon is ion-injected into the silicide before the oxidation. CONSTITUTION:An Si wafer on the surface is oxidized to form SiO2 by 500Angstrom . The molybdenum silicide is attached on the SiO2 by 4000Angstrom  spattering and at this stage, an Si<+> is ion-injected at 35keV in a half region of the wafer over the area of 1X10<17>/ cm<2>. After then, the wafer is applied a patterning with a mask and oxidized at 1,000 deg.C from 30min in dry O2, and then, the heat-oxidized film is removed. Thus, the region where the Si ions are injected has little molybdenum left therein due to deposition and has been put in a state that patterns are cut to the satisfaction. Simultaneously, the roughness on the surface and end face of the silicide due to the oxidation process can be prevented.
Patent JP-S6054482-A (JP)
Title: Breaking device of glass substrate
Inventor: AZUMAGUCHI MIKIHIRO
IPC: H01L31/04
Filed: 1983-09-05
Abstract: PURPOSE:To simultaneously act a bending moment and tensile strength and to eliminate burr by forming a plurality of amorphous Si solar batteries on one surface of a glass substrate, disposing the other surface of the substrate between the batteries when dividing them individually digging a scribing line, and passing the substrate in a dividing unit which has a stepwise difference between a substrate dividing fulcrum roller and a substrate tensile feed roller. CONSTITUTION:A plurality of amorphous Si solar batteries 2 are formed on one surface of a glass substrate 1, and a scribing line 3 is formed at the position between the batteries 2 on the other surface. Then, the substrate 1 is placed on a conveyor roller 10 with the line 3 side upside, a pair of substrate feed rollers 11, 12 are arranged at the end 17 side of moving direction, and a substrate divid- ing fulcrum roller 13 is arranged near the roller 11. Further, a substrate tensile feed roller 14 and a conveyor 16 are provided at the downstream of the roller 13, the substrate 1 is divided by the outer periphery 18 of the substrate press roller 15 opposed to the roller 14 during moving of the substrate. At this time a stepwise difference (t) is provided between the rollers 13 and 14.
Patent JP-2000351975-A (JP)
Title: Furnace and operation method for coke oven
Inventor: YOSHIDA SHUHEI
IPC: C10B21/22
Filed: 1999-06-10
Abstract: PROBLEM TO BE SOLVED: To obtain a furnace and operation method for a coke oven capable of reducing NOx in exhaust gas by uniformizing the combustion temperature in the vertical direction of the furnace to eliminate local high-temperature combustions. SOLUTION: This furnace of a coke oven is provided with rich gas (fuel gas of high calorific value) supply port 2 installed on a bottom 5 of the furnace at a position close to a furnace wall, 6 bordering with a carbonizing room and a center P of an air supply port 3 of the bottom 5 located at the opposite side of the rich gas supply port 2 than the center line L of the furnace, and in the case of supplying air both from poor gas (fuel gas of low calorific value) supply port, the mid point P3 connecting a center P2 of the poor gas supply port 7 and a center P of the air supply port 3, locates at the opposite side of the rich gas supply port than the center line L.  In this operating method, a gate controlling device is installed on the opening of the poor gas supplying port or air supplying port placed at the rich gas supplying port 2 side. than the center line of the furnace bottom, to change the air sprouting direction opposite to the rich gas supplying port and adjusting a first contacting position of the rich gas and air.
Patent JP-S5685850-A (JP)
Title: Semiconductor integrated circuit
Inventor: AOKI KIYOSHI
IPC: H01L27/082
Filed: 1979-12-17
Abstract: PURPOSE:To stably amplify the output of an I<2>L circuit by connecting the emitter of an I<2>L circuit coupling bipolar transistor to a power source having lower power source voltage than the voltage of a power source for a bipolar amplifier circuit connected thereto. CONSTITUTION:The I<2>L circuit having two-stage I<2>L gates 1a, 1b, and the bipolar circuit 2 are formed integrally on the same semiconductor substrate, the output of the I<2>L circuit is amplified through the bipolar circuit, and the amplified output is thus produced. In this configuration the output of the I<2>L gate 1a having transistors T1a and T2a is applied to the I<2>L gate 1b having transistors T1b and T2b, and the outputs therefrom are applied to a coupling transistor T7 conducting a complementary operation with the transistors T1a and T1b. When the output from the transistor T7 is then applied to the transistors T5 of the circuit 3 having transistors T5 and T6 as well as a current limiting resistor R3, the power voltage Vcc' applied to the emitter of the transistor T7 is set lower than the power voltage Vcc applied to the emitter of the transistor T6.
Patent JP-S5787564-A (JP)
Title: Solar heat collector
Inventor: EBISU KOUJI
IPC: F24J2/50
Filed: 1980-11-20
Abstract: PURPOSE: To prevent inside surface of a covering glass from condensation and a heat-collecting board from being damaged when it is heated without water, by providing a sunlight pervious film between the heat-collecting board and the covering glass, and also by forming a closed space between the covering glass and sunlight pervious film.  
     CONSTITUTION: A covering glass 1 and a sunlight pervious flexible film 2 are fixed together onto a heat collecting container 4 in a supporting point 6 so that a closed space 5 is formed between the covering glass 1 and the film 2. And, when the sunlight radiation weakens and temperature of a heat-collecting board 10 falls, pressure in the heat-collecting container drops, the film 2 in the closed space 5 shrinks and volume in the closed space 5 decreases keeping inside pressure equal to the atmospheric pressure, as a result, it is possible to prevent humid outside air from entering the closed space 5. When it is heated without  charging water, the film 2 hangs down on the heat-collecting board 10, convection heat- exchange coefficient in the closed space 5 is increased, and heat dissipation from the heat-collecting board 10 is also increased. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-S5787120-A (JP)
Title: Method and device for plasma cvd
Inventor: NAGATA SEIICHI
IPC: C23C16/50
Filed: 1980-11-20
Abstract: PURPOSE:To obtain a thin film of high quality by inserting and taking out a substrate without exposing a reaction room to the atmospheric air by providing a valve and a reserve chamber keeping the substrate at a predetermined temperature by heating up walls of the reaction chamber. CONSTITUTION:A reaction chamber is degassed by plasma excitation applying AC voltage across electrodes 9, 10 supplying H2 while heating up the reaction chamber 1 to 250-300 deg.C and gate valve at about 150 deg.C. The substrate is inserted through a window 19a into a reserve chamber, filled with N2, to be purged by H2. The plasma excitation is stopped and the substrate 12 is placed at the predetermined position manipulating valves 5 and 2. After the substrate reached the predetermined temperature, SiH4 diluted by H2 is led in, exhausted and amorphous Si is deposited at 1Torr. When a desired thickness of the film is obtained, the electricity is discharged and the supply of SiH4 is stopped. The reaction chamber and the reserve chamber are substituted by H2 and the substrate is removed to the reserve chamber room and is, after substituted by N2, taken outside. By this method, the high quality film with stable properties is obtained unaffected by the atmospheric condition of the CVD device.
Patent JP-S5685582-A (JP)
Title: Detector for defect of compressor
Inventor: KOUNO HIROYA
IPC: F04B49/00
Filed: 1979-12-17
Abstract: PURPOSE: To prevent the compressor from seizure by a method wherein the compressor is composed of a detector for existence of a pulse and a temperature sensor and when a temperature at its temperature detecting part exceeds a specified value, the temperature sensor loses magnetism and stops transmitting the pulse signal to the detector for existence of a pulse.  
     CONSTITUTION: There is arranged a periodic motion sensor 19 at a position facing the largest travelling locas around a swash plate 5 which rocks in a swash plate chamber 29 and the periodic motion sensor 19 is composed of a permanent magnet 25 and a temperature sensor 18 (arranged on the side facing the smask plate 5) which are arranged serially and a coil 21 encircling them. Therefore, when the temperature in the swash plate chamber 29 exceeds the Curie point (approximately 120°C), the temperature sensor 18 loses permeability and pulse signals begin to be extinguished on the periodic motion sensor 19 because the distance between the permanent magnet 25 and the swash plate 5 is large, and accordingly the seizure of the compressor can be prevented. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-H067051-A (JP)
Title: Sand for cat and its production
Inventor: YAMAZAKI HIDENORI
IPC: A01K1/015
Filed: 1992-05-30
Abstract: PURPOSE:To obtain epochal sand for cat having a flavonoid effect, being advantageous from the viewpoints of deodorizing power, sterilization power, water absorbing properties and economic efficiency, light-weight and capable of burning and contributing to the prevention of environmental pollution and recycle of natural waste materials by utilizing tea grounds which are wastes after producing green tea, black tea, oolong tea, etc., as main components. CONSTITUTION:The objective sand for cat characterized by using tea grounds whose particles are formed into definite size by drying and roughly grounding tea grounds as a main ingredient and mixing these tea grounds with a ground material made of a pure plant, a binder and a water absorbent, forming the mixture and then drying or burning the formed article and its production method.
Patent JP-H04362336-A (JP)
Title: Vibration reducing device for engine
Inventor: MORIMOTO YOSUKE
IPC: F16F15/26
Filed: 1991-06-07
Abstract: PURPOSE:To reduce vibration without increasing the whole height of an engine by providing a left and a right downward ribs at both lateral edges of a tie plate, and placing a balancer in such a way as to enter into a space formed between the left and right ribs, on the lower side of the tie plate. CONSTITUTION:When a crankshaft 3 is rotated by the motion of an engine, the first balancer shaft is rotated through a driving gear and a driven gear, and the second balancer shaft is further rotated through an interlocking gear and an interlocked gear so as to reduce vibration, caused by the reciprocating inertia and the like of a piston, by a balancer 7. A gear ratio among the driving gear, driven gear, interlocking gear and interlocked gear is set in such a way that the first and second balancer shafts are rotated twice during one rotation of the crankshaft 3. The secondary vibration of the engine is thereby reduced by the balancer 7, and the upper part of this balancer 7 enters into a space 10 formed between a left and a right ribs 8, 9, on the lower side of a tie plate 6.
Patent JP-S649636-A (JP)
Title: Alignment
Inventor: NISHI TAKECHIKA
IPC: G03F9/00
Filed: 1987-07-02
Abstract: PURPOSE:To make it possible to perform alignment at a position, where rotation errors are hard to ocurr and the areas of marking regions are small, by performing the alignment based on position relationship between selected substrate marks and masking marks. CONSTITUTION:Mark patterns YR, #9R, YL and thetaL, which are formed on one street region, are located between reticle marks RR and RL. The patterns are the same in the right and left marks on the reticle. On the left reticle mark region, the position deviation in the direction (y) between the marks RR and RL and the mark patterns thetaR and thetaL are detected. In the right reticle mark region, the position deviations in the direction (y) between the marks RR and RL and the mark patterns YR and YL are detected. Thus the alignments in the direction (y) and the rotating direction for the reticle and a chip region Cn can be performed. Since the lengths of the marks can be made same as the width of the street line, the SN ratio of an alignment signal is enhanced.
Patent JP-H05334675-A (JP)
Title: Electronic filing device
Inventor: ITO HIROYUKI
IPC: G11B7/004
Filed: 1992-05-29
Abstract: PURPOSE:To improve workability and operability by diagnosing an optical stain by measuring reflected light quantity. CONSTITUTION:The filing of an original is performed by storing image data in a storage part 111 via an image reader 102, attaching an index on it by a registration retrieval part 110, and writing the data on an optical disk 107 by an input/output device 106. The retrieval of the image data registered on the disk 107 is performed by retrieving the index of the image data in the disk 107, and reading the image data with a corresponding index from the optical disk 107 via the device 106. By performing such operation, it is possible to prevent the workability and the operability due to the occurrence of the read/write error of the optical disk from being lowered.
Patent JP-S6057392-A (JP)
Inventor: NAKADA AKIRA
IPC: G10H7/00
Filed: 1983-09-08
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6158106-A (JP)
Inventor: MITSUZOO SHIDA
IPC: H01B11/08
Filed: 1985-07-26
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5787623-A (JP)
Title: A-d converter
Inventor: NUKUSHINA HARUNOBU
IPC: H03M1/56
Filed: 1980-11-21
Abstract: PURPOSE:To reduce error due to noise, etc., by comparing a counter output after being converted into an analog value with an input signal, inputting a clock pulse to a register according to the output of comparison, and completing the measurement when the counter makes full-count. CONSTITUTION:A counter 4 and a register 12 are cleared and a clock generator 3 generates a clock. This clock is counted by a counter 4, the count value is converted into an analog value with a D/A converter 2 and applied to a comparator 1. A temperature data (b) is applied to the comparator 1 and the register 12 counts the clock until the output of the D/A converter 2 is greater than the temperature data. When the counter 4 makes full-count, a gate 5 is opened and the operation of the clock generator 3 is stopped. If any noise is present, since the comparator 1 only inverts, the error of the register 12 is reduced.
Patent JP-S6057472-A (JP)
Title: Projection histogram count circuit
Inventor: IMAMURA MAKOTO
IPC: G06T7/00
Filed: 1983-09-07
Abstract: PURPOSE:To obtain at a high speed a projection histogram from a binary picture and attaining the projection in an optional direction, by providing an operator of (ay-bx-d), a memory, an adder and a writing circuit to the optional coordinates (x, y) on a screen. CONSTITUTION:An (ay-bx-d) operator 1 obtains the cumulative values (x) and (y) of each clock number every time clocks (x) and (y) are given for raster scan. Thus Pi=(ay-bx-d) is obtained by an operation. The Pi is applied to a memory 3 through a multiplexer MPX2 in the form of an address (n). The contents D(n) of the address (n) and the binary picture data f(x, y) are added 5 together. As a result, the clock (x) is changed to ''L'' from ''H'' and written to the address (n) when the memory 3 is set under a write mode. Then a new address (n') is obtained by the operator 1 when the clock (x) is applied. Thus the memory 3 is addressed. The addition and writing are carried out in the same way to obtain a projection histogram at the memory 3.
Patent JP-S5687717-A (JP)
Title: Petroleum conbustion apparatus
Inventor: NAKANO OKIHIKO
IPC: F23N1/00
Filed: 1979-12-17
Abstract: PURPOSE:To enlarge the variable range of combustion level of a combustor, by disposing burners having an equal capacity in two rows, and controlling the combustion level continuously from a low level to a high level through the turning of a control knob. CONSTITUTION:Burners 1, 2 have at the bottom respective wicks 3, 4 made of a heat-resisting, porous material. Oil is supplied to the wicks 3, 4 via a leveller 11 and two oil supply pipes 12, 13 branched at a downstream part of the leveller 11 and then via respective solenoid valves 14, 15. On the other hand, combustion air is supplied from a fan 16 to a damper box 17, and after control of a cylindrical damper 18, carried to the burners 1, 2 via respective air ducts 19, 20. Control of the combustion level of these burners 1, 2 is accomplished by controlling the air- flow rate. For this purpose, the damper 18 is shaped in a drum form having openings 21, 22, 23 as shown in the drawing, and it is arranged such that its turning is controlled by a control knob 21'.