Patent GB-1490768-A (GB)
Title: High-output solid state dc-ac inverter with over load protection and control logic circuitry
IPC: H02M7/538
Filed: 1975-05-19
Abstract: 1490768 Inverters S OHBA 19 May 1975 21249/75 Heading H2F An inverter comprising a transistor oscillator, Fig. 2 (not shown) supplying terminals A, B of an amplifier (Fig. 3) having a driver stage 30 and an output stage 40, is protected from internally developed transients and those produced by a inductive load by a protection circuit 50 connected via a terminal C to at least a pair of diodes 43, 44 across the output of stage 40 and preferably also to diodes 33, 34 and (28) across the stage 30 and the oscillator, the circuit 50 including a capacitor 51 maintained at a predetermined voltage level by a circuit composed of members 52...55 and charged by transient energy when the voltage at any of the diodes rises due to a transient above the predetermined level, members 52 ... 55 subsequently discharging the capacitor 51 until its voltage falls to the predetermined level. The energy thus extracted may be returned to the battery supplying the inverter or may be used as a power source for other purposes or dissipated through a resistor. Members 52-55 may be replaced by a D.C./ D.C. converter when high power transients are likely to occur. The output of stage 40 is coupled through a transformer T 3  and circuitbreaker 46 to sockets 47. Transformer T 3  may be replaced by a saturable one having a resonant-secondary winding (502) and a further winding (504) which adds odd harmonics to the output voltage, Fig. 5 (not shown). Its action in producing a sine wave output with reduction in current in the transistors of stage 40 is discussed. Further protection for the inverter is provided as follows:- (1) Transistors of stages 30, 40 are operated in a collector-current limiting manner, each being biased so that, as its current approaches a predetermined maximum value, its base-emitter bias voltage approaches the maximum amplitude of the applied A.C. voltage. For stage 30 the maximum current is attained with no load on the inverter output and for stage 40 it is attained with a short-circuit on the output. This feature, combined with a resistor 35, reduces the no-load power drain of stage 30. (2) Each transistor of stage 40 has a fusible resistor in its base circuit whereby, with the transistor bias suitably chosen, the resistor burns out upon breakdown of the collector-emitter junction. (3) Detector circuits 60, 80 (Fig. 4) respectively responsive to the output voltage of stage 40 and the battery source control a switching circuit 70 to 74 for the coil of a contactor S controlling the battery supply to the inverter, the contactor opening if either voltage falls below a predetermined value for more than a predetermined time. (4) A circuit 90 sustains power to the oscillator during brief dips of the battery voltage not producing operation of members 70-74, 5 and 46. During such a dip, a charged capacitor 91 supplies the oscillator (through a voltage regulator 100) and is isolated from the battery by diode 92. Further diodes 94, 95 provide an instantaneous start by avoiding the need to charge capacitor 91 immediately following switch-on. (5) Voltage regulator 100 maintains the output frequency constant during the condition discussed in (4) above. To energize the inverter, a circuit-breaker 46 is in its normally-closed condition and changeover contacts 78 controlled thereby complete a turn-on circuit 76 for transistor 74 when a switch 77 is closed, the coil of contactor S being energized through transistor 74 which is held on by operation of the detector circuit 80. For a prolonged overload condition, the breaker 46 operates to disconnect transformer T 3  in addition to the operation of contactor S by the circuits 60, 80, changeover of contacts 78 opening the turn-on circuit 76 until the breaker 46 automatically recloses, whereupon the contactor S is also automatically reclosed.