Patent GB-1344079-A (GB)
Title: Calculators
IPC: G06F15/02
Filed: 1971-03-19
Abstract: 1344079 Digital calculator; floating point arithmetic PICO ELECTRONICS Ltd 19 March 1971 7372/71 Heading G4A A digital electric calculator uses floating point arithmetic and has a storage capacity in each random access register such that the number of digit storage positions for the mantissa is less than the maximum storable value of the exponent (e.g. there is an 8 digit mantissa and a two digit exponent expressing values up to 79). A desk top or pocket calculator comprises four decimal display lamps capable of indicating a decimal point or a minus sign, and a keyboard 4, the conductive keys of which are actuated by a conductive stylus 6 connected to the calculator circuitry. All the circuitry is formed of IGFET'S on a single semi-conductor chip. The calculator can perform the four rules of arithmetic by actuating the keys in the desired sequence, e.g. 2À5¸5 x 3+1 would be entered as 2, À, 5, ¸, 5, x, 3, +, 1, = (the commas indicating pauses between actuations) and the display then shows the answer, i.e. 2.500. The key <> causes the display to show the next less four significant digits of the answer i.e. 0À0À0À0À (the decimal points indicating that <> has been pressed). The key C clears the display without erasing the result from the memory i.e. if now the keys are actuated in the order C, +, 2, =, the display will indicate 4À500. However, if key C is actuated followed by a numeral or decimal key, the memory will be erased. The key K allows a number in the memory to be held as a constant for a subsequent calculation, e.g. if the number 2 is held and keys k, 8, ¸ pressed, 2 is divided into eight. The calculator operates in floating point mode and can handle numbers from 1À0 Î 10<SP>-20</SP> to 9À9999999 Î 10<SP>+79</SP>. It holds the 8 most significant digits of the mantissa, e.g. 2¸1 Î 10<SP>+15</SP> is displayed as À0000 but C, X, 10<SP>14</SP> gives À2000. Within the calculator the data is stored as 11  digit words, 2 digits exponent, 1 guard digit, and eight digits mantissa, each digit being stored as 4 bit BCD. Negative numbers are stored in 10's complement form. All four arithmetic functions are performed on the mantissa but only addition and subtraction are performed on the exponent. Addition, subtraction.-Both numbers are manipulated until the two exponents have an equal exponent, then the mantissas are added or subtracted. Multiplication.-The exponents are added after the mantissa product is produced but the 8 least significant digits are discarded. Division.-The exponents are subtracted and the mantissas divided by repeated subtraction. Circuitry (Fig. 3).-This comprises a binary arithmetic unit, 9, three 11 digit sequentially addressed, random access, dynamic memory registers 11, 12, 13 which store the exponent and mantissa, and a register 14 holding decimal point information. Register 11 holds the displayed data which is shown with the exponent equal to zero and the mantissa scaled accordingly. The register 13 holds the displayed data in floating point form and register 12 holds a previous answer or a constant number. The sequentially provided addresses are generated by a reversible direction system timer 15 connected to a 4 phase (#1 to #4) clock 16, 18. The timer is a 12 bit counter generating 11 addresses plus one blank for each register. A read only microprogram memory 19 controls operations, the program branches taken depending on the results noted by test logic 10. The integrated circuit layout is such that the timing signals from timer 15 flow at right angles to the data flow from registers 11 to 14 and the control signals from read only memory 19. Other features mentioned include a shift register and BCD to binary conversion.