baber/WOPTO huggingface dataset:
Patent KR-20000066950-A (KR)
Inventor: YUN JAE OK
IPC: B23K9/00
Filed: 1999-04-22
Abstract: PURPOSE: A method and a device are provided to make possible butt welding of arcs by forming a weld position by a weld base material without using a welding rod when butt- welding a bar or a pipe of large area or a long welding wire. CONSTITUTION: Magnetic welding base materials(2,3) are placed to penetrate through exciting coils while having a gap(11) between them. The exciting coils are excited by a separate power supply. An arc is generated in the gap by a power supply(12) of an arc generation unit(4). The arc receives the magnetic force corresponding to the right-hand law of Fleming and drives in rotary arc type. Thereby, uniform arc is generated over the entire of a welded portion and a uniform welded portion is formed.
Patent KR-19990064644-A (KR)
Title: 캔 결합체
Filed: 1999-04-23
Abstract: 개시된 캔 결합체는 일측에 취음구가 형성되며, 내용물이 수용된 캔 본체; 취음구를 절취선을 따라 개봉할 수 있도록 캔 본체에 설치된 개봉수단; 및 캔 본체로부터 분리되어 컵으로 사용가능하고 취음구 주위의 청결을 유지하도록 캔 본체의 외측 일부를 감싸도록 결합되며, 캔 본체와 동일한 재질을 가진 컵겸용 위생 덮개;를 구비한다.
Patent KR-20000005723-A (KR)
Inventor: YOSIO KAHIROKAZ
IPC: H05K3/42
Filed: 1999-05-28
Abstract: PURPOSE: A multi-layer wiring board and manufacturing method thereof have high reliability of electric connection between conducting layers by electroplating layer which is provided to a through-hole. CONSTITUTION: A plurality of conducting layers(1a) are piled by inserting resin insulation layers(2) thereby, and a through-hole(3) by which the conducting layer is exposed is formed on the insulation layer. An electroplating layer(4) for electric connection between the conducting layers is provided to the through-hole. The adjoining portion between inner side wall and bottom of the through-hole is formed in a concave curved surface whose radius is in the range of 20 and 100 micrometer. Accordingly, in the electroplating process, the equipotential surface in the through-hole is formed in a curved shape in the adjoining portion between inner side wall of the through-hole and the lower conducting layer, the current density is uniform. and the electroplating layer has a uniform thickness overall.
Patent KR-20000005789-A (KR)
Inventor: TAMATZMASARO
IPC: C30B15/00
Filed: 1999-06-01
Abstract: PURPOSE: Silicon mono crystal wafer having low grow-in defect for particle monitoring is manufactured by czochralski method. CONSTITUTION: Silicon mono crystal wafer for particle monitoring with low crystal defects on wafer surface can measure particle number accurately in measuring of particle because generated a little light scattering due to pits on wafer surface, so it is useful to control a process for manufacturing devices. And silicon mono crystal wafer is manufactured by raising silicon mono crystal bar doped with nitrogen by czochralski method and processing single crystal bar with wafer.
Patent KR-20010001885-A (KR)
Inventor: KIM WON
IPC: H01L21/68
Filed: 1999-06-09
Abstract: PURPOSE: A structure for sensing a device of an aligner of a horizontal handler is provided to rapidly perform a test operation of the device, by sensing the device transferred from a picker of the aligner, and by precisely having the device inserted into a test tray while checking if an error occurs in the device. CONSTITUTION: A structure for sensing a device of an aligner of a horizontal handler comprises an aligner(30), an aligner lower plate(80), an aligner lower block(86), a supporting unit(88) and a sensing unit(90). The aligner has a plurality of device settling units on which the device is settled. The aligner lower plate is fixed to a lower part of the aligner by a plurality of the first and second pins. The aligner lower plate is fixed in the aligner lower block having a plurality of device supporting unit blocks. The supporting unit corresponds to the plurality of device supporting unit blocks established in the aligner lower block for supporting the device aligned in the aligner. The sensing unit is established in an upper part of the supporting unit, and senses whether a device is settled in the aligner.
Patent KR-20010002485-A (KR)
Title: Multi-thread microprocessor for instruction fetch
Inventor: HWANG GYU CHEOL
IPC: G06F9/38
Filed: 1999-06-15
Abstract: PURPOSE: A multi-thread microprocessor is provided to perform buffering instructions from other threads before issuing instructions from one thread by using a plurality of instruction buffers so that it can perform an efficient instruction fetch. CONSTITUTION: A multi-thread microprocessor comprises an instruction cache(100), an instruction fetch controller(120), an instruction fetcher(130) and an instruction issuer(150). The instruction cache(100) stores a plurality of instructions to be executed, and outputs the instruction positioned corresponding to an address output from the instruction fetch controller(120). The instruction fetch controller(120) selects one among a plurality of thread program counters(122a-122d) by a selection result in a thread selection controller(124), and output an address(ADD) for an instruction to be fetched from the selected thread program counter. At this time, the address(ADD) is transmitted to the instruction cache(100). The instruction fetcher(130) fetches the instruction from the instruction cache(100) corresponding to the address(ADD), and buffers the fetched instructions at each thread instruction buffers(132a-132d). The instruction issuer(150) issues concurrently the instructions stored in the thread instruction buffers to an execution device.
Patent KR-20010003340-A (KR)
Inventor: CHA TAE HO
IPC: H01L21/334
Filed: 1999-06-22
Abstract: PURPOSE: A method for forming gate electrode having cobalt silicide film is provided to form a gate electrode structure thermally stabilizing with a smooth interface of a cobalt silicide film and a doped poly silicon film by forming the doped polysilicon film to have a multi-layered structure. CONSTITUTION: A device isolation film is formed on an upper surface of a silicon substrate(100), and a gate oxide film(112) is formed on an active area of the substrate isolated by the device isolation film. The first doped polysilicon film(104) is deposited on the gate oxide film. The second doped polysilicon(106) is deposited on the first doped polysilicon film with a depositing temperature of a doped polysilicon being increased. A cobalt is deposited on the second doped polysilicon film using a physical vapor deposition or chemical vapor deposition process, and the substrate is treated with a rapid thermal process to form a cobalt silicide film(108). The cobalt silicide film and the doped polysilicon film are patterned to form a gate electrode on the gate oxide film. A spacer film(110) consisting of an insulation film is on both sides of the gate electrode.
Patent KR-20010003843-A (KR)
Inventor: KIM JONG YUN
IPC: H04L12/28
Filed: 1999-06-25
Abstract: PURPOSE: A method for connecting nodes of a distributed system is provided to broadcast state transition information and to give the information to each node in the distributed system so that mutual dependence among nodes is efficiently removed. Therefore, it is easily performed to extend or reduce the distributed system. CONSTITUTION: Each node notifies another node of self state information by using a broadcasting to remove a direct connection among nodes(node1-to-node4). Each node is not directly connected with another node, and notifies another node of self state transition by the broadcasting.
Patent KR-20010004669-A (KR)
Inventor: PARK JONG TAE
IPC: G11C11/407
Filed: 1999-06-29
Abstract: PURPOSE: An internal column address generator is provided to reduce a design area steeply by simplifying a circuit configuration. CONSTITUTION: An internal column address generator uses a unified counter flip flop used in generating a least significant bit(LSB) address also in an interleave method and a sequential method address generation. The generator comprises: the first counting unit(100) generating an internal column address of n bit by an interleave method by performing an address counting operation as to the n bit column address input; the sequential counter(200) generating an internal column address of n-1 bit except a least significant bit(LSB) as to the n bit column address input by a sequential method; the first multiplexing unit(20) generating one internal column address by a select control signal after receiving the least significant bit column address generated from the first counting unit as to both input terminals; and n-1 second multiplexing units(30) generating one internal column address by the select control signal after receiving the internal column address as to the remaining bit except the least significant bit of the first counting unit and the internal column address generated from the sequential counter by each bit.
Patent KR-20010009188-A (KR)
Inventor: MA BYEONG IN
IPC: G11B7/09
Filed: 1999-07-08
Abstract: PURPOSE: A method and a device for detecting tracking error in an optical disk driver are provided to improve precision in tracking error by inducing PLL(Phase Locked Loop) to existent DPD TE(Differential Phase Detection Tracking Error). CONSTITUTION: Binarization apparatuses(308a,308b) form outputs of optical detector in binary. PLL(310a,310b) generates clock signals synchronized to the outputs of the binarization apparatuses. A phase difference detector(312) detects phase difference between the clocks. Low pass filters(314a,314b) perform low pass filtering the outputs of the phase difference detector to supply as tracking error signal. A device generates a tracking error signal independent from pit recorded on the disk and length of a mark to improve the reliability on tracking error signal.
Patent KR-19990073403-A (KR)
Title: 디지털액자
Filed: 1999-07-09
Abstract: 본 발명은 디지털화된 이미지 정보를 저장 및 디스플레이하는 디지털 액자에 관한 것으로서, 특히 주위의 명암에 따라 자동으로 밝기 조절이 되는 디지털 액자에 관한 것이다. 
     본 발명은 이미지 정보를 외부 장치로부터 입력받거나 외부 장치로 출력하는 입출력 수단과, 입출력 수단을 통해 입력된 이미지 정보를 저장하는 저장수단과, 주변 빛의 세기를 감지하는 감지수단과, 감지수단에서 감지된 빛을 전기신호로 변환하는 광전 변환수단과, 각종 키입력을 위한 키입력 수단과, 키입력 수단의 키입력에 따라 저장수단에 저장되어 있는 이미지 정보 중 원하는 이미지 정보를 원하는 형태로 출력하며, 광전 변환수단의 출력 및 키입력에 대응되는 밝기 제어신호를 출력하는 제어수단과, 저장수단에서 인출된 이미지 정보를 제어수단에서 출력되는 밝기 제어신호에 따라 디스플레이하는 표시수단을 포함한다. 
     따라서, 관리가 용이하고, 제작 비용을 줄일 수 있다.  기존의 이미지 파일을 보유한 경우에는 자유롭게 디스플레이 할 수도 있다.  또한 이미지에 다양한 효과를 줄 수 있으며, 여러 이미지 파일을 순차적 혹은 임의적으로 디스플레이할 수 있으므로 분위기를 쉽게 전환할 수 있다.  그리고 주변 밝기에 따라 액자의 밝기를 자동으로 조절할 수 있다.
Patent KR-20010010888-A (KR)
Inventor: KIM JAE UN
IPC: G11C11/413
Filed: 1999-07-23
Abstract: PURPOSE: A circuit for precharging a bit line is provided to operate an SRAM(Static Random Access Memory) cell at a high speed when the read operation of SRAM cell is performed. CONSTITUTION: A circuit for precharging a bit line includes a bit line pull-up circuit(60), a plurality of an SRAM(Static Random Access Memory) cell(70), a column select circuit(80) and a sense amplifier(90). The bit line pull-up circuit has the first through third PMOS transistors(51-53) and the first and second NMOS transistors(54-55). The first and second PMOS transistors receive an inverted bit line precharge signal(BPB) and pull up in DC(Direct Current) a bit line(B/L) and a bit bar line(/B/L) when the inverted bit line precharge signal is logically low. The third PMOS transistor has a gate receiving a bit line precharge signal(BP) and the inverted bit line precharge signal. When the inverted bit line precharge signal is logically high and the bit line precharge signal is logically low, the third PMOS transistor precharges AC(Alternative Current) the bit line and the bit bar line with a threshold voltage of the first and second PMOS transistors.
Patent KR-20010017081-A (KR)
Inventor: MUN WON
IPC: H01L27/10
Filed: 1999-08-07
Abstract: PURPOSE: A method for manufacturing an analog capacitor of a merged memory and logic(MML) device is provided to simplify a manufacturing process, by using a plug poly layer and a bit line used in a dynamic random access memory(DRAM) process as the analog capacitor of a logic portion. CONSTITUTION: A doped polysilicon layer(107) as a plug poly layer is deposited on a semiconductor substrate(101) having a word line and a gate electrode. The plug poly in an analog capacitor region of a logic portion is left to form a plug poly pattern of the doped polysilicon layer. An interlayer dielectric(301) is deposited and planarized. A pattern is formed through a bit line contact mask and an etching process, to form a bit line contact in the analog capacitor of a logic portion. A pattern is formed by depositing a bit line contact spacer layer(501) and by leaving a spacer oxide in the analog capacitor region of the logic portion. A pattern is formed by depositing a bit line polycide layer and by leaving the polycide layer in the analog capacitor region of the logic portion. The interlayer dielectric is deposited, and a process for forming a capacitor of a dynamic random access memory(DRAM) is performed. A metal interconnection process is formed on the capacitor.
Patent KR-20010018707-A (KR)
Inventor: KIM GWANG CHEOL
IPC: H04N5/46
Filed: 1999-08-21
Abstract: PURPOSE: A method for recognizing broadcasting mode in a multi-system television is provided to set up a broadcasting mode automatically with one free-run operation when channel is turned. A user does not need to handle keys. CONSTITUTION: If the user requests channel turn, a tuner is tuned to a selected channel(204). The tuner outputs received broadcasting signal to a mode switching part. If the user does not requests channel turn, a broadcasting mode which was set up previously is outputted to a CRT. The mode switching part outputs synchronizing signal to the micro processor. The micro processor determines whether broadcasting signal modulation mode is negative modulation mode by basing on the synchronizing signal(206). If the broadcasting signal modulation mode is not negative modulation, the micro processor recognizes broadcasting mode as SECAM-L mode, and outputs mode switching signal to the mode switching part(206a). If the broadcasting signal modulation mode is negative modulation, the micro processor determines whether a voice carrier frequency is 5.5 MHz(208). If the voice carrier frequency is 5.5 MHz, the micro processor recognizes broadcasting mode as PAL-B/G mode, and outputs mode switching signal to the mode switching part(208a). If the voice carrier frequency is not 5.5 MHz, the micro processor determines whether the voice carrier frequency is 6.0 MHz(210).
Patent KR-20010019059-A (KR)
Title: An apparatus for grinding a conductor roll
Inventor: LEE SEONG HO
IPC: B24B5/26
Filed: 1999-08-24
Abstract: PURPOSE: A conductor roll grinding machine is provided to exchange a sand paper for grinding a conductor roll in a short time for guaranteeing continuous proceeding of operations. CONSTITUTION: A conductor roll grinding machine includes a sanding block(400) mounted on a top surface of a conductor roll to move vertically and passed by a sandpaper(500) at a lower surface, a supplying part(100) mounted at a side of the sanding block for supplying the sandpaper to the lower surface of the sanding block, a withdrawing part(200) for withdrawing the sandpaper supplied to the lower surface of the sanding block from the supplying part, and a latch element for preventing reverse rotation of the withdrawing part after rotated forward by a handle(206), wherein the lower surface of the sanding block contacts the top surface of the conductor roll for grinding the conductor roll, when a scratch is generated on the top surface of the conductor roll.
Patent KR-20000017495-A (KR)
Inventor: SAKAMOTO KENSEI
IPC: B09B3/00
Filed: 1999-08-24
Abstract: PURPOSE: An organism processor is provided to reduce the number of components, to miniaturize the device and to increase heat efficiency. CONSTITUTION: The processor is composed of: a double bottoms structure processing tub(11) that processes organism such as food waste; a deodorizing device(40) deodorizing by heating waste gas, using a heater(20) and a catalyst(30); a blower(60) discharging the deodorized high temperature gas outside after heating the processing tub by passing through the double bottoms(11d) of the processing tub; a flexible duct(44) supplying outer gas into the processing tub; and a flexible duct(19) supplying waste gas from the processing tub to the deodorizing device. The device prevents bad smell from outflowing as deodorizing by heating waste gas when processing an organism.
Patent KR-20010027392-A (KR)
Inventor: YUM GYE HUI
IPC: H01L21/28
Filed: 1999-09-13
Abstract: PURPOSE: A method for forming a metal contact of a semiconductor device is provided to prevent a cut of a barrier metal layer and a failure of the metal contact due to a bad profile of a contact opening. CONSTITUTION: In the method, at least two interlayer dielectric layers(200,300) having different etch rates are formed on a semiconductor substrate(100) having a contact region(100a) therein and then dry-etched to form the contact opening exposing the contact region(100a) in the substrate(100). Thereafter, a spacer(500) is formed on a sidewall of the contact opening to protect the interlayer dielectric layers(200,300) during the following wet-etching process. The wet-etching process is then performed to remove a natural oxide layer in the contact opening. After that, the barrier metal layer(600) is formed on resultant entire surfaces, and then a metal layer(700) for the metal contact is deposited enough to fill the contact opening.
Patent KR-19990084125-A (KR)
IPC: C02F3/34
Filed: 1999-09-15
Abstract: 본 발명은 하.폐수중에 함유된 질소 및 인의 제거기술이 미약한 현실로 인하여 정체된 호수 및 해안에 부영양화, 적조현상을 유발시켜 자연환경 훼손과 인간생활에 막대한 손실을 주던 문제점을 해결하기 위한 하.폐수 처리 기술에 관한 것으로서, 특히 현재까지의 질소 및 인의 제거기술이 많이 적용되었으나 그 처리효율에 비해 시설비 및 시설유지비가 많이 소요되어 기피하고 있는 실정을 감안하여 기존보다 기대이상의 처리효율과 하.폐수 처리시설비와 비슷하며 그 유지비가 훨씬 적게들고, 또한 기존에 설치된 하.폐수시설을 약간만 보완하여 적용시킬 수도 있는 등의 공법인 바실러스 종 혼합균에 의한 하.폐수 처리장치 및 방법에 관한 것이다. 
     본 발명은 특히, 전처리시설과 저류지, 반응지, 침전지, 소독지, 슬러지농축지, 슬러지저류지 및 탈수기 공정을 이용하여 하.폐수를 처리함에 있어서, 반응지과정에서 바실러스 종 혼합균의 미생물활성제를 반응지에 투여하는 한편 상기 반응지에 침전지의 슬러지를 반송하되 바실러스 종 혼합균이 사상체-포자화-발아-사상체의 과정을 반복하면서 질소 및 인이 함유된 유기성 폐수를 처리하도록 한 것임을 그 구성적 특징으로 한다.
Patent KR-20010028209-A (KR)
Inventor: CHAE JAE OU
IPC: F23D11/16
Filed: 1999-09-20
Abstract: PURPOSE: A burner taking oil and water as fuel is provided to obtain a combustion function by injecting oil and water into an evaporating chamber after increasing the temperature of the evaporating chamber and supplying the evaporated oil gas and steam to a combustion chamber. CONSTITUTION: A burner is comprised of a water tank(20) and an oil tank(30) positioned in a frame; an evaporating and burning unit(50) made up of an outer first member(51), an inner second member(52) and a central third member(53) to let in and burn up the evaporated steam and oil gas; and an air supply regulator(40) installed in the frame to inject and supply air to an inner space of the third member. Herein, a heater is installed in a space made up by the first and second members and used as an evaporating chamber for evaporating the supplied water and oil. The inner space of the third member is connected to a nozzle and the space between the first and second members. In a state for burning the evaporated steam and the oil gas, combustion heat heats each evaporating chamber so that the water and oil are sufficiently evaporated. Thus, even if the heater is stopped after start, the evaporation of the water and oil is continued.
Patent KR-20010028409-A (KR)
Inventor: CHA JONG HYEON
IPC: A23L27/40
Filed: 1999-09-21
Abstract: PURPOSE: A method for preparing a toothpaste containing dissolved mugwort salt which can replace conventional bamboo salt or pine salt that needs lumber and repeated heating process is provided. CONSTITUTION: A method for preparing a toothpaste containing dissolved mugwort salt is composed of the following steps of: (i) a first step to mix dried mugwort or the mixture of mugwort and crown daisy with salt: (ii) a second step to repeat a process to dissolve at 800-1500deg.C one time or more, and pulverize; and (iii) a third step to add conventional materials for toothpaste and produce a toothpaste containing dissolved mugwort salt.
Patent KR-20010028459-A (KR)
Inventor: HA YEONG GIL
IPC: H01B17/06
Filed: 1999-09-21
Abstract: PURPOSE: Provided is a method for binding a polymer insulator and a fitting with glue, which is also useful in increasing tensile strength between FRP load and the fitting and preventing the penetration of water. CONSTITUTION: A method for binding a polymer insulator and a fitting (40) with glue is provided. A first step includes that a polymer insulator (30) equipped with a FRP load (34) covered with epoxy glue (44) on one end is inserted into the fitting (40). And a second step is that, when the glue (44) is hardened, the fitting (40) and the FRP load (34) are further bound by a compression dice (38), which prevents water penetration from the outside so that the contact side between the fitting (40) and the FRP load (34) does not lose physical characteristics.
Patent KR-20000023411-A (KR)
Inventor: LADAN MICHELL
IPC: C08J9/10
Filed: 1999-09-22
Abstract: PURPOSE: A production process is provided which produces foam in simple and cheap way and overcomes problem that resins are mobilized and adhered to supporters thereof during producing and driving the expanding products. CONSTITUTION: In process, unidirectional expansion is done by the following two methods. From a first method, supporters are adhered to one or both side of expanding intermediate products vertically about expansion direction before expanding supporters. The expansion of intermediates is blocked by adhering effect to supporters, not extensibility. From a second method, the expansion is blocked by the process of surface bridging on one side or both side of intermediate products. The surface bridging contains at least the following one steps of: high energy irradiation, spray of reactants, application of photo radiation or corona discharge and temperature increase considered in terms of intensity and durability.
Patent KR-20010038845-A (KR)
Inventor: JUNG GIL JO
IPC: H02J1/02
Filed: 1999-10-27
Abstract: PURPOSE: A DC current transmitting system is provided to improve the efficiency of the DC current transmitting system by constituting a converter and an inverter of the DC transmitting system by using a semiconductor device. CONSTITUTION: An insulating gate bipolar transistor inverter(10) and an insulating gate bipolar transistor converter(12) is constituted by disposing a semiconductor device(18) such as a plurality of insulating gate bipolar transistor and a plurality of gate turn off thyristor. A transformer(14) for an inverter(14) raises the voltage. A transformer(16) increases the voltage. The semiconductor device(18) has an on and off function. The semiconductor device(18) has a diode. A condenser(20) applies the voltage obtained by rectifying the input voltage of the insulating gate bipolar transistor converter(12).
Patent KR-20000047592-A (KR)
Title: Semiconductor memory device
Inventor: HASEGAWAMASATOMO
IPC: H01L27/105
Filed: 1999-11-03
Abstract: PURPOSE: A semiconductor memory device is provided to decrease the leakage current of a memory cell. CONSTITUTION: A semiconductor memory device has a PNP transistor having a grounded collector(14) and the semiconductor can decrease the leakage current of a memory cell. The semiconductor memory device installs a memory cell transistor in a first P-well region(P-WellA) formed on a P-type semiconductor substrate(10), and maintains the first P-well and the P-type substrate with a back bias potential. A deeper second N-well(N-wellB,N-wellC) is formed using an N-type retrograde region(N-Rwell) formed by implanting N-type impurity using a high energy. In addition, a third P-well region(P-wellD) is formed in the second N-well. Thus, the PNP transistor is constructed in the transverse direction to the P-type emitter region(12) formed in the second N-well region, the second N-well and the third P-well.