Patent GB-758495-A (GB)
Title: Electric information storage system
IPC: G11C11/23
Filed: 1954-08-31
Abstract: 758,495. Electric digital data storage apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Aug. 31, 1954 [Sept. 2, 1953], No. 25242/54. Class 106 (1). An electrical data storage apparatus comprises means for recording one part of a bit of data in one store and a remaining part of such bit of data in a second store, and means for reading out the stored data from the two stores simultaneously and producing an output indicative of the order in which the said parts were recorded in the two stores. Figs. 1A and 1B show the circuit arrangement of an eight-order electrostatic storage system. A pair of electrostatic C.R.T. stores, 100 and 101, are provided for each order, each comprising a conductive signal pick-up plate 110 on the outside wall of the tube adjacent the screen. The anodes 105, 106 and 107. are maintained at high positive potentials, the remaining electrodes having suitable negative potentials to cause the tube to operate at a beam velocity such that the ratio of secondary emission electrons, struck from the screen, to primary electrons arriving, is greater than unity. The combined fluorescent screens of each pair of storage tubes are adapted to provide 150 storage positions or addresses. The vertical deflection plates 112 of all 8 pairs of storage tubes are connected in parallel and to a vertical deflection control circuit 113. Similarly all the horizontal deflection plates 111 are connected in parallel and to a horizontal deflection control circuit 115. Thus, deflection voltages generated by circuits 113 and 115 are applied to all the tubes and direct their cathode-ray beams simultaneously to corresponding areas of the associated screens 108. The binary " one " charge pattern is recorded on a pair of storage tubes in the following manner: a so-called " bit sweep " voltage waveform is impressed on the horizontal deflection plates of both upper and lower tubes so that each of the related cathode-ray beams, if turned on, would travel from a rest position, then slightly to the left of the rest position (looking at the tube from the screen end), then to the right for a distance equal to the width of the bar charge pattern, and then back to the left of the rest position. The beams are turned on only during the time interval when they are being deflected from left to right in their respective tubes. Consequently, a horizontal bar charge pattern is traced on the corresponding screens. After the C.R.T. beams (then off) have returned to their rest position, the beam of the lower tube is again turned on to generate a spot charge pattern at the beam rest position over the previously traced bar charge pattern. A binary " zero " charge pattern is effected in the same manner except that the spot charge pattern is impressed on the bar charge pattern of the upper tube. Fig. 3 shows the manner in which six elementary storage areas are arranged in a 20 x 30 raster on the C.R.T. screen. The elementary areas of the tube are arranged horizontally in groups of four, there being five such groups per line of elementary areas. The corresponding four elementary storage areas in each pair of tubes are used for recording a decimal digit in accordance with a 1, 2, 4, 8 binary code. The storage positions are numbered from 0 to 149 as shown, to give 150 storage positions per pair of tubes. The horizontal deflection control circuit 115 is adapted to generate twenty distinct voltage steps or increments each capable of deflecting the C.R.T. beams to the beam rest position of a corresponding one of the twenty elemental storage areas in a horizontal line of such areas (Fig. 3). Similarly the vertical deflection control circuit 113 generates thirty distinct voltage steps or increments each capable of deflecting the C.R.T. beams to a particular one of the thirty lines of storage positions in the tube. Consequently, by the proper combination of voltage increments from the two control circuits it is possible to deflect the C.R.T. beams to the beam rest position of any one of the 600 elemental areas in a tube. The selection of the various possible combinations of vertical and horizontal increment voltages is effected through either of two control units 116 (Address register) or 117 (Regenerate counter) in conjunction with a so-called 1, 2, 4, 8 ring 120. The Address register can direct the C.R.T. beams to the beam rest position of the " one " weighted area of any one of the storage positions 0 to 99, while the Regenerate counter can direct the C.R.T. beams to the " one " weighted area of any one of the storage positions or addresses 0 to 149. The " bit sweep " circuit 123, referred to above, impresses a voltage waveform on the horizontal deflection plates of all storage tubes which causes the associated beams to trace the bar charge pattern. If a spot is to be recorded on a particular bar pattern, the beam of that tube is again turned on after the " bit sweep " voltage has been removed from the horizontal deflection plates. The 1, 2, 4, 8 ring 120 is driven through conductor 125 from a 100 kc. pulse source in a clock circuit 126, the latter being the source of all timing and activating pulses for the entire memory system. The ring 120 is adapted to control the horizontal deflection control circuit 115 so that the C.R.T. beams are sequentially advanced at 10 Ásec. intervals from the rest position of the " one " area of the particular storage area to which the beams are directed under control of either circuit 116 or 117, to the rest position of the " two " area of the same storage area, to the rest position of the " four " area and finally to the rest position of the " eight " area of the storage position. When the beam is in each elemental area the " bit sweep " voltage is applied. Thus, the interrogation of one full storage position or the recording of information in that position is effected during the 40 Ásec. interval. A memory register built up from trigger units is used for transferring information between the electrostatic storage and a computer. During a memory read-out operation the information in any desired storage position is read out of the electrostatic storage tubes and transferred to the memory register. Conversely, during a memory read-in operation the number (and its sign) in the memory register may be read into any storage position in the electrostatic storage tubes. At a time distinct from memory read-in or memory read-out time, a number may be read from the register 131 to the computer or from the computer to the register. The transferring of numerical data from the computer via the memory register to the electrostatic storage tubes and from the storage tubes via the memory register to the computer is controlled on a sequence and timed basis by a so-called Use-Regenerate control circuit 132, which in turn is controlled by a Primary timer 133. The Regenerate counter, when in operation, controls the deflection control.circuits so as to direct the C.R.T. beams to the storage position corresponding to the number represented in the counter. Thereafter that storage position is regenerated on a 40 Ásec. cyclic basis. The Regenerate counter then advances one position and the next successive storage position is regenerated in the same manner. This regeneration of successive storage positions continues until the Use- Regenerate control 132 disconnects the counter 117 from the deflection circuits by shifting the potential of line 155. This action takes place at the beginning of either of the two USE times. At the same time the Use-Regenerate control stops emitting advance pulses to the counter over conductor 390 and the counter stops. Thus, the counter " remembers " the last position regenerated and when the next regenerate time arrives the counter advances to its next numerical position and continues the systematic regeneration of the C.R.T. storage. In this manner the 149 storage positions are systematically regenerated, approximately 15 complete cycles being required to regenerate all positions.