Patent GB-1325376-A (GB)
Title: Manufacture of field effect transistors
IPC: H01L21/8234
Filed: 1970-12-07
Abstract: 1325376 Semi-conductor devices GENERAL ELECTRIC CO 7 Dec 1970 [8 Dec 1969] 58008/70 Heading H1K A high stability self registered gate FET is fabricated on a N-type phosphorus doped monocrystalline silicon (or germanium) wafer 12 in which is deposited an insulant layer of thermally grown silicon oxide layer 10 (or silicon nitride by pyrolysis of silane and ammonia, or amorphorus silicon oxy nitride by pyrolysis of silane, oxygen, ammonia) is formed and covered with a thin metallic film of molybdenum or tungsten by electron deposition at elevated temperature, sputtering, or pyrolysis of molybdenum tetrachloride. Thereafter the film is patterned by photoresist and etched in sulphuric and nitric acids to establish the gate electrode, and RF back sputtered in argon atmosphere to remove the exposed insulant from the source and drain regions 18, 20 (Fig. 2c) while leaving the molybdenum. Alternatively, etching by hydrofluoric acid and ammonium fluoride for silicon dioxide or phosphoric acid for silicon nitride may be used. An acceptor activator impurity e.g. boron is introduced as ethyl borate in a mildly oxidizing wet gaseous stream of e.g. nitrogen, helium, hydrogen or argon formed by bubbling the gas respectively through ethyl borate and water and mixing, which is passed over the heated wafer to form a doped glass layer 22 in the source and drain regions and an oxide layer on the gate electrode. Ethyl alcohol, carbon dioxide or carbon monoxide may be added. For a P-type wafer doped with boron, the glass is phosphorus doped by introducing similarly ethyl phosphate or phosphorus pentachloride, or the doping may be antimony or arsenic. Similarly for N-type wafer a zinc, cadmium, or aluminium dopant may be substituted for boron. After glass deposition, the boron is heat diffused into the wafer to form source and drain regions 36, 38 (Fig. 2e) in a mixture of hydrogen with argon, nitrogen, or helium, and the glass layer is etched in hydrofluoric acid and ammonium fluoride, and an aluminium layer is vacuum deposited, over the wafer surface and etched over photoresist to furnish source and drain electrodes; (Fig. 2f) the base of the wafer 12 may be welded to a suitable header. Complementary transistors are formed on a single monocrystalline N-type silicon wafer heat oxidized to produce a silicon oxide layer etched over photoresist with hydrofluoric acid and ammonium fluoride to form a window for the N-channel complementary transistor, and a boron doped silicon dioxide glass is deposited over the wafer by pyrolysis of ethyl orthosilicate and triethyl borate in a stream of argon. Thereafter the wafer is heated to diffuse boron into a P-type isolation region (which may also be made by selective deposition or prolonged heating in boron, zinc, or cadmium vapour). The glass layer and underlying oxide layer are etched with hydrofluoric acid and ammonium fluoride over photoresist to expose the silicon surface for the source, drain, and channel, and the wafer is heated in oxygen to form a gate oxide layer 50, and a molybdenum film 52 is deposited by vacuum evaporation (Fig. 5e). This is etched over photoresist in sulphuric and nitric acids to leave a gate electrode, and the exposed oxide is sputter etched to expose the source and drain regions 56, 58, and a glass rich in boron is formed on the exposed surface by pyrolysis of ethyl borate in wet hydrogen and nitrogen to form a borosilicate glass layer, after which the wafer is heated to diffuse the boron into regions 56, 58 (Fig. 5h) of transistor 60. Thereafter source and drain holes 62, 64 (Fig. 5i) are etched to define gate electrode 68, and phosphorus doped glass 70 is grown by pyrolysis of ethyl phosphate in wet hydrogen and nitrogen at the exposed source and drain regions of transistor 66, while a similar glass layer 71 is deposited on glass layer 53. The wafer is heated in hydrogen and nitrogen to diffuse phosphorus into source and drain regions 72, 74 of transistor 66 and to partially compensate source and drain regions 56, 58. Contact holes are etched and aluminium is deposited over the water surface, and etched to leave source, drain, and gate regions (Fig. 5l). A varactor may be similarly fabricated. Specifications 1,245,116; 1,248,580; 1,211,354; are referred to.