Patent GB-873126-A (GB)
Title: Improvements in and relating to comparison means for comparing two digital number instructions
Inventor: AINSWORTH JOHN DESMOND
IPC: H03M1/00
Filed: 1956-11-05
Abstract: 873,126. Electric selective control systems. ENGLISH ELECTRIC CO. Ltd. Nov. 1, 1957 [Nov. 5, 1956], No. 33669/56. Class 40 (1). A subtractor adapted to receive two numbers the digits of which are represented by electrical signals, each number having a major part and a minor part, with at least one digit in each part, has first means for deriving an electrical analogue proportional to the difference between the minor parts of the two numbers and second means which, when there is a unit difference between the least significant digits of major parts of the numbers add to the analogue a further proportional quantity representing this unit difference, the second means, when the major parts differ by a greater amount, being adapted to produce a " saturation signal which does not correspond to the actual difference between the numbers but signifies that the difference exceeds a given value. The subtractor is used in the position control of the work-table 10, Fig. 1, of a machine tool, which is to be positioned by a binary coded control signal stored in a position register 15. The table is driven by servomotor 11 energized through amplifier 12 by the output of the subtractor 13. One input A to the subtractor is from the register 15 and the other B from a pick-off device which also generates a binary coded signal. For low error values the subtractor generates a signal proportional to the difference between A and B to drive the motor at a variable speed, slowing down as it approaches the desired position. For larger positional errors a " saturation " signal is produced which drives the motor at a constant maximum speed until a proportional signal is obtained. A proportional signal is assumed to be required below a value of 15 units of positional error and accordingly the subtractor must respond linearly at least to the difference between the four least-significant digits in the A and B numbers. The numbers A, B applied to the subtractor are shown in Fig. 3 as having eight digits (more would be required in practice) which appear as steady voltages on the terminals in rows 17 and 18 respectively. The leastsignificant digit is applied to the upper terminal in each row. The numbers are divided into major and minor parts, the most significant four digits and the least significant four. The minor parts of the two numbers are compared in subtractor 19 by applying the signal voltages to appropriately weighted resistors 20, inverters 22 being interposed to reverse the B voltages. The output on line 21 is proportional to the differences between the two groups of four digits. The major parts, i.e. the remaining four digits of each number are fed in corresponding pairs to detectors 23. The outputs from the detectors pass to two pairs of lines " 16 + " (signifying A is greater than B by 16 units), " 16 - ", " S + " (signifying A is greater than B by more than 16 units-the saturation condition) and " S - ". The " 16 + " and " 16 - " lines pass through weighted resistors 25 to line 21, the latter also being inverted in inverter 24, so that these signals form part of the subtractor 19. When lines " S + " or " S - " are energized they apply the saturation signal to line 21. The detectors 23 search the four major pairs of digits for an unequal pair. If all are equal nothing is added to the output from the subtractor 19. If the detectors find an unequal pair of digits they apply a signal on the " 16 + " or "16 -" line, according to the sign of the difference, and a carry signal passes to subsequent detectors causing them to give outputs on both lines " S + " and " S -." But if a subsequent detector finds inequality, one of these signals is blocked. Also gates 26, 27 are provided in these lines, gate 26 being closed when there is a signal on the " 16 - " line and 27 is closed by a signal on the " 16 + " line. If the major part of A exceeds the major part of B by one unit in the least significant position (e.g. A = 0001, B = 0000), the corresponding detector 23 gives an output on the " 16 + " line. If A = 1000 and B = 0000, the first pair of digits produces a signal on the " 16 + " line and a carry which causes all subsequent detectors to produce " S + " and " S - " signals. The " S -" signal is blocked in gate 27 by the " 16 + " signal. The " S + " signal overrides the " 16 + " signal and causes saturation. If A = 1000 and B = 0111, the first pair of digits produce a " 16 + " signal and a carry signal which causes subsequent detectors to produce " S-," the " S + " signals being blocked within each detector since the B digit is greater than the A digit in each case. The " S - " signal is blocked by the " 16 + " signal in gate 27 so that only the " 16 + " signal is fed to the common bus-wire 21. A subtractor is described designed to receive decimal numbers the digits of which are binary coded. The binary digits of each decimal digit are used to derive proportional difference signals or a saturation signal in a manner similar to that described above.