Patent GB-1257245-A (GB)
IPC: G06V10/20
Filed: 1969-09-26
Abstract: 1,257,245. Colour facsimile. INTERNATIONAL BUSINESS MACHINES CORP. 26 Sept., 1969 [15 Jan., 1969], No. 47505/69. Heading H4F. A coloured document having colour stripes 507, 501, 503, 505 e.g. a contoured map, is divided into an ordered set of areas a 11 , a 12  etc., Fig. 5 and is scanned by a system including digital coding means and redundancy reduction logic circuit means such that in a set of areas such as a 11 , a 12 , a 21 , a 22 , b 11 , b 21 , b 22 , only the colour of the left most area exhibiting a new colour is coded and registered for magnetic tape recording and subsequent reproduction of the document. The document 103 Fig. 1 is placed on a drum 101 rotated by motor means under the control of a clock 109. By means of two groups of nine light guides 113 and 115, each light guide terminating in a photodector 119, 121, an axial strip of nine areas, e.g. a 11 , a 12  ... e 11  is simultaneously scanned. Rotation of the drum through one strip, e.g. to a 21 , a 22  ... e 21 , is indicated by a pulse on line 109, Fig. 6. By means of a dichroic mirrors 117, the colour, if any, in each area, is investigated as to its component intensity in two colour frequency bands, i.e. the amplitudes of the outputs of corresponding photodetectors in the arrays 119, 121. Eight colours may be thus distinguished in decoder 123 according to the ratios of said corresponding amplitudes, and the decoder provides, on eight cables of three lines each, as three-bit binary number represently the colour 1 to 8 of each of the first eight areas, area e 11 , not being decoded. The presence or absence of any colour (as against background) in the areas is detected by passing the outputs of corresponding detectors in the arrays 119, 121 to individual OR circuits 129 which give an output if either detector gives an output other than zero. The binary data from the nine circuits is fed to a 'data compactor 127 Fig. 2, which compacts the data from three consecutive line arrays of nine areas into four parallel binary bits. Thus, if the input binary data to shift register stages 201 is 111110011 for the first and second lines, and 000110000 for the third line, the output stages 271 give 1110. Input logic stage 202, coupled to register stages a, b, c gives an output at OR gate 213 defined by:-213=a if a=b, 213=c if a#b. The four similar logic stages thus give 1110 at their respective OR gates. This binary data is fed to respective stages of register 253 via AND gates 241/243 etc. enabled by timing pulses 133B, Fig. 6 synchronized with the odd lines. When the output 1110 appear at the output of the input logic stages for the second line it is passed to register 251 via AND gates 231/233 enabled by even line timing pulses. During the third line analysis, the logic stages output of 0010 is fed to register 253 where it displaces the first line data to register 257. Thus at the end of analysing three consecutive lines registers 255, 251 and 253 contain the horizontally compacted data of lines 1, 2 and 3, i.e. 1110, 1110, 0010. The outputs of the three registers are fed to the three output logic stages to give vertically compacted data 1110. Thus the 9 x 3 data array: 1 1 1 1 1 0 0 1 1 1 1 1 1 1 0 0 1 1 0 0 0 1 1 0 0 0 0 has been reduced to a 4 Î 1 data array: 1 1 1 0 Fig. 3 shows the half of the colour encoder 131 dealing with the four left hand areas of each line of eight areas e.g. areas a 11 , a 12 , b 11 , b 12  of line a 11 , d 12 , b 11 , b 12 , c 11 , c 12 , d 11 , d 12 . Triplet lines 301, 302, 303, 304, carry the binary coding for the colours the four areas, i.e. 001, 001, 001, 111. OR gates 305/308 give a 1 if a colour is present in the respective area. The four triplet colour codes are fed to respective AND gate triplets 309, 310, 311 etc. The output of each OR gate 305 etc. is fed, via an invertor e.g. 312 an AND gate, e.g. 316 producing an enabling signal for the AND gate triplet e.g. 313, 314, 215 associated with the next area. The effect is that all the AND gate triplets for areas to the right of that one having a colour are inhibited. Thus in the present case, only triplet 309, 310, 311 will pass the colour code 001, via OR gates 327, 328, 329 to respective stages of register 330. Code comparators 331/337 give 1 outputs when the compared colours are different. These outputs are collected in OR gate 349 (via AND gates 343/348 guarding against the case of colourless areas by co-operation with the outputs of OR gates 305/308) and fed to a stage of register 330. Further stages 355 of the register hold the compacted data for the left hand part of the 9 x 3 area array, and a clock pulse. The register contents are then fed to a tape recorder etc.