Patent GB-892098-A (GB)
Title: Improvements in and relating to computing machines
IPC: G06F7/78
Filed: 1958-03-31
Abstract: 892,098. Electric calculating apparatus. BAUER, F. L., and SAMELSON, K. March 31, 1958 [March 30, 1957], No. 10307/58. Class 106 (1). Digital calculating apparatus comprises a store for operational characters entered from a fixed vocabulary, and means for comparing each character as it received with the lastentered character to obtain orders for dataprocessing and entry or removal of characters from the store. The characters may be mathematical symbols such as +, x, &c., the algebraic operations which they represent not being effectible until further characters, e.g. numbers or other symbols, have been received. Fig. 1 shows diagrammatically a machine in which simple arithmetic operations are carried out according to instructions from a typewriter-type keyboard 1 using conventional mathematical notation and the results printed directly at 2. The keyboard includes keys for the decimal digits 0-9 (information N), operational symbols +, -, x and ¸, symbols (,), B and R, B denoting " absolute value of " and R "reciprocal of" (information Op), the symbol = (information R) and further keys such as " space," " carriage return" not relevant to computing (information S). The output from the keyboard (for example in a five-bit code) on line 3 passes to a pre-decoder 5 which directs the information to an appropriate unit 7, 8, 6 or 9. Numbers pass to a numbers cellar 11 where they are stored sequentially so that the latest number received appears at the top ready for operating on by the computor 10 and moves earlier numbers down one storey on arrival. Operational symbols are similarly stored in an operations cellar 12 until the operations can be carried out, and each new symbol received on line Op is compared in the operations converter with the latest-stored symbol appearing in the top storey of the operations cellar 12 (line C) to determine if an arithmetical operation can now be carried out. Fig. 2 gives the operations converter output response on lines Op<SP>1</SP>, Op<SP>11</SP> for each combination of top-storey and received symbol, and Fig. 3 represents the content of the numbers cellar NC and operations cellar OC after the reception of each of the symbols and numbers (a-d in Fig. 3 represent numbers) received from keyboard 1, as the required calculation (a+b) x (-a+b)= is written. In Fig. 3, D = the discriminating register (the top storey of OC), O#the number zero, ##empty, and the S numbers in row 1 indicate the stage of the operation. All the received information is stored until the right parenthesis is received at S5 when by comparison of this with the " + " in D, operations converter directs that a and b in NC be added and the sum c entered in NC, and then the left parenthesis be discarded (see Fig. 2 and Table 1). Similarly at stage S11 a in NC is converted to - a and at S13 - a and b are added and the sum d entered in NC for multiplication with c at S15 to store the product e for transmission via output unit 6 and line 13 to printer 2 for typing the result, when the " number requested " character is received. Fig. 4 shows a modification. Paper tape units 20, 21 provide alternative input and output, and by use of a unit 22 for storage of intermediate calculation results, calculations such as (2.27 + 3.328) x 64.45 - 2 (2.27 + 3.328)= may be simplified to 2.27 + 3.328 = Z Z Î 64.45 - 2 Î Z = with the intermediate result number stored under the address Z in 22 until called for. Formula store 23 enables storage of formulµ for calculation by repetition as for example obtaining square roots by successive approximation, a symbol such as an asterisk following a number indicating that the formula at the address in 23 corresponding to the number is to be acted upon. A simple system of relative addressing for intermediate results is described, using subscript numbers. The maximum values of these numbers (e.g. i, k, I in a i ; k; l) is first specified so that the space held for such relative addressing by " co-ordinates " i, k, l is kept to a minimum allowing maximum free storage. A computor is shown in more detail in Figs. 7-11, assembled as shown in Fig. 12; in these Figures all 3-digit reference numerals have as their first digit (or first two, if the first digit is 1) the corresponding reference numeral in Fig. 1. This embodiment also includes a " numbers storage " to and from which numbers may be transferred from and to the " top storey " of the numbers cellar 11 (Fig. 1) indicated for convenience at the bottom of Fig. 9 by bi-stable devices 114. Signals from keyboard 1 (Fig. 7) in 5-bit code are directed from unit 500 to NC (Fig. 9) via unit 7 if they represent numbers and to operations converter 8 (Fig. 7) otherwise (line R of Fig. 1 included, line S not shown in this embodiment); the digits of numbers leave numbers converter 7 serially in excess - 3 code, each decimal digit occupying a row of 11, and operation symbols appear as outputs on lines 521-532 where they are compared with the operation symbols stored in 3-bit code in the top 120 of operations cellar 12 (Fig. 8) and the appropriate instruction obtained from the matrix arrangement of " and " gates shown (in part) in Fig. 7, the gate outputs being coupled by " or " gates to operation signal lines 841-854. (If the operation symbol is to be stored in 120 this is done by converter 800). Fig. 2 shows the outputs for each combination of input E from unit 500 and input D from operations cellar 12, the significance of the letters in the matrix being as follows:- V: Signal " beginning of number " from numbers converter. B: Absolute value. R: Reciprocal. #: Empty condition of operations cellar O.C. f : Number into numbers cellar N.C. e: Zero into numbers cellar N.C. k: E # O.C. and therefore available in D. a: Execute D, E -> D. n: Raise N.C. r: Execute D, raise O.C. and repeat by comparison of new D and E. c: Raise O.C. s: Print (or store) the number at top of N.C. Transfer from row-to-row in 12 is effected by output " c " and " k " (853 and 854) through flip-flops 124 and 125 which open and close gates 128 and 129 allowing upward and downward transfer respectively of operation symbols when a signal via delay 126 resets all storage flip-flops 120-123 etc.; by a similar arrangement using flip-flop 111 numbers in number store 11 may be raised or lowered under control of arithmetic unit 10. A comparator 112 examines each digit read out from 114 into arithmetic unit 10 or to output unit 6 to determine when the last digit of the read-out or entered number is reached; the combination 0000 indicating " end of number " sending an " end shift " pulse to 10, otherwise read-out or storage is continued by an outut supplied direct to line 113. Arithmetic unit 10 on receipt of an instruction such as " a+," collects the first two numbers from 11 by emitting two " raise NC " pulses, effects the addition and returns the result to 11 by emitting a " lower NC" pulse; after receipt of an " end shift " pulse from 112 it emits an " end signal arithmetic operations " pulse which is either directed to keyboard 1 via gate 103, enabling a new character to be passed to 5, or if a " repeat " comparison of D and E is demanded by output w (841) (see Tables 1 and 2) is directed via gate 101 to operations converter 8. Fig. 13 shows diagrammatically a combined numbers cellar and arithmetic unit replacing those shown in Figs. 9 and 10; in it indicates a numbers cellar and adder, shown in more detail in Fig. 14, and II-VIII indicate switching networks responsive to the outputs 841-854 and controlling unit I by inputs to the latter at 10-12 and receiving and evaluating outputs therefrom on lines Iα-I#, networks V, VII and VIII for multiplication, addition and miscellaneous operations respectively being shown in more detail in Figs. 15-17. Referring to Fig. 14, the numbers cellar and adder comprises a main numbers cellar NC, a multiplicand register MD acting as uppermost storey of the cellar, an adder I35, comparators I32, I33 which examine the contents of digit positions I50, I52 of MD and NC and a counter I34. NC and MD each consist of a complete loop of digit positions, their ends being connected, so that a shift is in fact a circular movement of the contents of all digit positions. Such shifts are excluded on receipt of inputs at I1 and I3 or IS or at I2 and I4 or I6 through flip-flops I24 and I26 in a manner similar to that described in connection with Figs. 8 and 9. Gates I37-41 control transfer of digits between NC, MD and I35 in response in instructions received at I7-10. An "add" input on I9 for example opens gates I39 and 41 and allows numbers stored in I51 and upwards and 199 and upwards to be shifted down by synchronous digit-by-digit shifting to I35 and the result stored in I52 and below. A " multiply " input on I10 opens I40 in addition, so that MD is in " loop " connection and a multiplicand may be shifted cyclically through MD without being lost. Multiplication.-The multiplication control circuit is shown in Fig. 15; multiplication is initiated by a pulse on "a x " line (847, Fig. 7) which sets flip-flop V21, moves the first multiplier digit into I52 and I34 and then sets V22. If an output on # now shows I52 to be other than zero this passes through V to I5, I6 and since V22 energizes I1 and I2 the multiplicand in MD and the contents of NC are simultaneously lowered digit-by-digit through adder I35 so that the content of MD is added into NC above the multiplier until I52 registers an " end " character on output when V23 is reset and the contents of the registers raised again ( until I50 registers an end character to give a signal on line 8). The contents of I34 is reduced by one at each such addition (by the 8 pulse) until the multiplier digit has been counted down to zero and a pulse resets V21 and raises the next multiplier digit in NC for the process to continue. Any decimal point in the multiplier is first entered in the corresp