Patent GB-1244518-A (GB)
Title: Information storage cell
IPC: H03K19/195
Filed: 1969-06-27
Abstract: 1,244,518. Super-conductor devices. INTERNATIONAL BUSINESS MACHINES CORP. 27 June, 1969 [15 July, 1968], No. 32500/69. Heading H1K. [Also in Division H3] An information storage cell comprises a pair of Josephson tunnelling devices connected to an input portion, and switch means for switching either one of the pair of devices from the novoltage state (electron pair tunnelling) to the voltage state (single-electron tunnelling). As shown, Fig. 2, a memory cell 10 comprises a word line 12 in which is formed a loop having two identical arms 14, 16, each containing a Josephson junction 18, 20. A bit line 22 passes, over the junctions 18, 20 and a sense line 24 passes under part of the loop remote from the junctions 18, 20 and is provided with a gate in the form of a Josephson junction 26 underlying the loop arm 16. In the rest condition a persistent current circulates in the loop the clockwise and anticlockwise directions representing the " 1 " and " 0 " states respectively. A current IW applied to the word line 12 divides equally between the arms 14, 16 and combines with the stored current resulting in a large net current in one arm in the direction of the stored current and a small net current in the other arm in the opposite direction (IW is greater than the stored current). If a current IB is simultaneously applied to the bit line 22 the critical current of the Josephson junction in the loop arm carrying the large net current will be exceeded and junction will switch to the voltage state if the bit current is in the same direction as the net current. The current is redistributed in the cell resulting in a reversal of the circulating current direction in the loop. If the large net loop arm current and the bit line current are in opposite directions no switching occurs and the circulating current remains unchanged. The final state of the cell is therefore changed to a state corresponding to a circulation direction opposite to the direction of the bit current or allowed to remain in this state depending on the initial state of the cell so that a desired input can be written into the cell. The cell is non-destructively read by applying the word current IW to the line 12 and a sense current to line 24 in a direction from right to left in the Figure. If a " 1 " is stored in the loop a large net current flows in arm 16 and since it is in the same direction as the sense current the Josephson junction 26 in the sense line is switched to its voltage state to provide an output signal. If a " 0 " is stored in the loop the current in arm 16 is small and junction 26 remains in the super-conductive state. The cell may be produced by evaporating a ground plane of super-conductor material on to an insulating substrate, depositing an insulating layer by evaporation or RF sputtering, depositing the bottom portions of the sense line and loop arms through a mask, performing a controlled oxidation or deposition of insulation to form the thin insulating layers for the Josephson junctions and depositing super-conductor material and insulating material alternately to complete the required structure. The superconductor material may be Pb, Sn, Nb or Ta. A Josephson junction decoding tree is described, Fig. 6 (not shown), and such decoders may be combined with a matrix of memory cells to form a random access store, Fig. 7 (not shown). The complete store may be formed on a single substrate by simultaneous deposition.