baber/WOPTO huggingface dataset:
Patent TW-483920-B (TW)
Title: Slider of fiber-reinforced thermoplastic resin for use in slide fastener
Inventor: MIYAJIMA YOSHIFUMI
IPC: C08L101/00
Filed: 1999-06-05
Granted: 2002-04-21
Abstract: A formed article of fiber-reinforced thermoplastic resin which has been adapted for use in a sliding member by restoring the wear resistance once degraded by the addition of reinforcing fibers to the normal level is disclosed. This formed article comprises a fiber-reinforced resin material of a thermoplastic resin containing reinforcing fibers and incorporating therein additionally as a sliding property-imparting agent a material having a storage elastic modulus in the range of 3.5x10<SP>8</SP> Pa to 5.0x10<SP>8</SP> Pa in a service temperature range of 30 DEG C to 70 DEG C. The ratio of incorporation of the sliding property-imparting agent is properly in the range of 4 to 10% by weight when the matrix resin is a polyamide-based resin or 4 to 20% by weight when the matrix resin is a thermoplastic resin other than the polyamide-based resin, respectively based on the total weight of the resin and the reinforcing fibers.
Patent TW-425514-B (TW)
Title: E-mail driving data exchange method
Inventor: LIN YU-LUNG
IPC: G06F15/163
Filed: 1999-06-11
Granted: 2001-03-11
Abstract: The present invention relates to an e-mail driving data exchange method that can perform data exchange on cross-domain databases. It aims mainly, while exchanging databases, to packet the required structured query language (SQL) command into an executable command before transmitting the command in a form of e-mail from the local end to a remote end through a network. When the remote end receives the e-mail, it will identify the command as a database updated data and voluntarily execute the command so as to duplicate or update the database.
Patent TW-446870-B (TW)
Title: Inspection method of peripheral components
Inventor: CHEN TAI-CHENG
IPC: G06F13/40
Filed: 1999-06-25
Granted: 2001-07-21
Abstract: An inspection method of peripheral elements is used to effectively initiate the drivers of components in connection with buses in computer system. By means of scanning each bus, the method checks the bus in connection with the peripheral component interconnect (PCI) and effectively utilizes the peripheral elements. The method can be further applied to the drivers of the peripheral components in connection with the PCI bus and the hierarchy of PCI to PCI bridge to activate the peripheral components for connecting to more other components.
Patent TW-432264-B (TW)
Title: Fluid control device
Inventor: YAMAJI MICHIO
IPC: F16K27/00
Filed: 1999-06-29
Granted: 2001-05-01
Abstract: A massflow controller and block valves are each fastened to block couplings adjacent to each other by screw members screwed in from above like a bridge and are thereby made removable upward. The block couplings are fastened to a base plate by screw members left uncovered with the fluid control members when seen from above.
Patent TW-424163-B (TW)
Title: The dot matrix hologram with hidden moire pattern
Inventor: YEH SHENG-LIE
IPC: G02B5/32
Filed: 1999-07-23
Granted: 2001-03-01
Abstract: The present invention relates to a dot matrix hologram with hidden moire pattern which applies the moire technology in the dot matrix hologram. The main body region of the moire pattern and the background region of the moire pattern are formed by interleaving the same bright and dark lines in the hidden moire pattern region of the dot matrix hologram, but there is a position shifting between the line patterns in these two regions, and the position shifting is several times larger than the grating dot. Therefore, the invisibility of the moire pattern in the hidden moire pattern region without special processing is not good, usually the moire pattern can directly be seen by eye without using the decoding film, so the effect in this kind of application of moire pattern is pretty bad. But the moire pattern of the present invention ingeniously uses the camouflage pattern to prevent the occurrence of the above mentioned phenomena, and also it can make this kind of the dot matrix hologram more nice-looking. Furthermore, the present invention extends the one-dimensional moire pattern technology to two-dimensional moire pattern technology, which not only increases the quantity of information hidden, but enhances the invisibility of moire pattern.
Patent TW-454167-B (TW)
Title: Speech coding with improved background noise reproduction
Inventor: JOHANSSON INGEMAR
IPC: G10L19/12
Filed: 1999-08-16
Granted: 2001-09-11
Abstract: In producing an approximation of an original speech signal from encoded information about the original speech signal, current parameters associated with a current segment of the original speech signal are determined from the encoded information. Reproduction of a noise component of the original speech signal is improved by using at least one of the current parameters and corresponding previous parameters respectively associated with previous segments of the original speech signal to produce a modified parameter. The modified parameter is then used to produce an approximation of the current segment of the original speech signal.
Patent TW-495546-B (TW)
Title: Heat transfer fluids
Inventor: DAMIANI ROBERT A
IPC: C09K5/10
Filed: 1999-09-15
Granted: 2002-07-21
Abstract: A heat transfer fluid having high heat capacity, high thermal loading capacity, low viscosity and low freezing point includes diphenyl oxide and 1,1 diphenyl ethane in broad proportions.
Patent TW-483166-B (TW)
Title: Vertical field effect transistor with built-in ring-shaped gate and its manufacturing method
Inventor: SCHAMBERGER FLORIAN
IPC: H01L29/78
Filed: 1999-09-28
Granted: 2002-04-11
Abstract: The vertical MOS-transistor according to this invention is characterized by a gate arranged in a trench, wherein a channel and source and drain in the substrate are arranged on the wall of the trench. The gate encircles a drain terminal ringwise, which extends from the surface of the substrate to the drain arranged on the bottom of the trench. When producing the gates, through the utilization of a slant implantation, the vertical transistors with different channel lengths can be produced in a substrate with different width trenches.
Patent TW-I242563-B (TW)
Title: Monoclonal agonist antibodies which specifically bind to or interact with human G-CSF receptor
Inventor: NI BAOFU
IPC: C07K16/28
Filed: 1999-10-06
Granted: 2005-11-01
Abstract: The invention relates to agonist molecules which specifically bind to or interact with human G-CSF receptor and dimerize the receptor or activate phosphorylation of kinases associated with the receptor to stimulate cell proliferation and differentiation. Such agonist molecules include monoclonal antibodies, or fragments, homologues or analogues thereof, or peptides of organic compounds. Two examples of mouse monoclonal agonist antibodies are disclosed: mAb163-93 and mAb174-74-11.
Patent TW-445736-B (TW)
Title: Dynamic configuration of digital subscriber line channels
Inventor: ARAVAMUDAN MURALI
IPC: H04L47/762
Filed: 1999-11-01
Granted: 2001-07-11
Abstract: A technique is provided which advantageously facilitates the dynamic recovery from faults in one or more communication channels. In accordance with the technique, the dynamic adjustment of DSL bandwidth allocation and/or symmetry across communications channels is combined with a dynamic bonding mechanism that, in cases of single or multiple loop failures, creates the appearance of a single higher-bandwidth channel by combining and/or distributing the communications traffic across the still available physical communications channels. In this way, the channel bonding technique advantageously facilitates the dynamic recovery from faults in one or more communication channels while preserving a symmetric bandwidth channel allocation.
Patent TW-469567-B (TW)
Title: Shallow trench isolation (STI) method capable of preventing the formation of indent on the top edge of dielectric layer in the shallow trench
Inventor: HUANG JUI-TSEN
IPC: H01L21/76
Filed: 1999-11-05
Granted: 2001-12-21
Abstract: The present invention provides a shallow trench isolation (STI) method. A semiconductor chip comprises a silicon substrate, a silicon oxide layer, a silicon nitride layer, and a shallow trench installed in a predetermined region on the surface of the semiconductor chip and penetrating the silicon nitride layer and the silicon oxide layer and to a predetermined depth of the silicon substrate. The method comprises: forming a dielectric layer on the surface of the chip and filling up the shallow trench; performing a chemical mechanical polishing to completely remove the dielectric layer on the surface of the silicon nitride layer in order to align the surface of the dielectric layer in the shallow trench with the surface of the silicon nitride layer; completely removing the silicon nitride layer and the silicon oxide layer; forming a spacer on the top periphery of the dielectric layer in the shallow trench, thereby avoiding the formation of an indent on the top edge of the STI caused by the subsequent semiconductor process.
Patent TW-449724-B (TW)
Title: Circuit arrangement and method with state-based transaction scheduling
Inventor: MOUNES-TOUSSI FARNAZ
IPC: G06F12/08
Filed: 1999-12-23
Granted: 2001-08-11
Abstract: A data processing system, circuit arrangement, and method rely on state information to prioritize certain transactions relative to other transactions when scheduling transactions in a data processing system. In one implementation, as a result of the recognition that in many shared memory systems cached data having a modified state is accessed more frequently than cached data having a non-modified state, transactions associated with modified cached data are prioritized relative to transactions associated with non-modified cached data, thereby reducing the latency of such modified transactions. Any concurrent increase in latency for non-modified transactions is more than offset by the decreased latency of modified transactions, resulting in an overall reduction in system latency.
Patent TW-I223011-B (TW)
Title: Electroless gold plating solution and process
Inventor: TOBEN MICHAEL P
IPC: H05K3/18
Filed: 2000-01-27
Granted: 2004-11-01
Abstract: Electrolyte compositions useful for forming gold coatings on nickel containing substrates are disclosed. Also disclosed are methods of plating gold layers on nickel containing substrates.
Patent TW-589142-B (TW)
Title: Herbicidal mixture, comprising a 3-heterocyclyl-substituted benzoyl derivative and an adjuvant
Inventor: BRATZ MATTHIAS
IPC: A01N43/78
Filed: 2000-03-04
Granted: 2004-06-01
Abstract: A herbicidal mixture, comprising (a) a herbicidally effective amount of a 3-heterocyclyl-substituted benzoyl derivative of the formula I where: R1, R2 are hydrogen, halogen, C1-C6-alkyl, C1-C6-alkylthio, C1-C6-alkylsulfinyl, C1-C6-alkylsulfonyl, C1-C6-haloalkyl, C1-C6-alkoxy, C1-C6-haloalkoxy; R3 is hydrogen, halogen, C1-C6-alkyl; X is a heterocycle from the group consisting of isoxazolyl, 4,5-dihydroisoxazolyl and thiazolyl, where the heterocycle may be unsubstituted or mono- or polysubstituted by halogen, C1-C6-alkyl, C1-C4-alkoxy, C1-C4-haloalkyl, C1-C4-haloalkoxy, C1-C4-alkylthio; R4 is a pyrazole of the formula II which is attached in the 4-position and where R5 is hydrogen or C1-C6-alkyl, R6 is C1-C6-alkyl, or their environmentally compatible salts; (b) an adjuvant comprising (i) a C1-C5-alkyl C5-C22-alkanoate, (ii) a C10-C20-carboxylic acid, (iii) a partial phosphoric ester or a partial sulfuric ester of a monohydroxy-functional polyalkyl ether and (iv) if appropriate an alkyl polyoxyalkylene polyether in a synergistically effective amount is described.
Patent TW-463031-B (TW)
Title: Apparatus and method for measuring polarization dependent loss
Inventor: MARRO MARLENE ANN
IPC: G01M11/00
Filed: 2000-04-25
Granted: 2001-11-11
Abstract: An apparatus for measuring polarization dependent loss is disclosed. Featuring several fiber optic couplers combined in tandem and oriented such that the PDL noise of the measurement system is reduced to a negligible level. By matching the PDLs of the couplers and vectorally subtracting opposite phases of polarization, the PDL of the measurement system is virtually eliminated. Thus, the PDL noise floor is lowered to near zero and the PDL of the optical device-under-test can be accurately measured. The system is relative inexpensively to implement and offers needed versatility because it measures the PDL of optical devices that operate in a reflection mode or in a forward transmission mode. Thud, it provides one PDL measurement solution for both types of devices.
Patent TW-I262190-B (TW)
Title: IP3 receptor ligand
Inventor: NAGANO TETSUO
IPC: C07F9/144
Filed: 2000-05-25
Granted: 2006-09-21
Abstract: As provided is a compound or a salt useful as a ligand of inositol-1,4,5-trisphosphate (IP3) receptor, which is represented by the general formula (I) or a salt thereof, wherein R represents a group represented by the following formula (A), (B) or (C) wherein R1 and R2 independently represent a C1-6 alkyl group, R3 represents an amino group, a mono(C1-6 alkyl)amino group, a di(C1-6 alkyl)amino group or a C1-6 alkoxy group and X- represents an anion, and n represents an integer of 2 to 5.
Patent TW-450802-B (TW)
Title: Method for opening an individual package and retrieving an absorbent interlabial device therein
Inventor: FARRIS DIANE DUNN
IPC: A61F13/15
Filed: 2000-09-25
Granted: 2001-08-21
Abstract: The invention provides an individual package in combination with an absorbent interlabial device. The package has a longitudinal axis, a top portion, a bottom portion positioned oppositely to the top portion, a first surface and a second surface. The package may be folded about the longitudinal axis to form two halves or it may be formed from one more sheets fitted together to form the package. The package may be re-sealable. An absorbent interlabial device is positioned within the package. The absorbent interlabial device is readily retrievable from the package such that a user neither touches nor contaminates the absorbent portion of the absorbent interlabial device with any part of her hand prior to the use and in using the absorbent interlabial device.
Patent TW-464704-B (TW)
Title: Yarn feeder for textile machines
Inventor: SCHMODDE HERMANN
IPC: D04B15/48
Filed: 2000-07-11
Granted: 2001-11-21
Abstract: The yarn feeder of the invention has a plastic housing, preferably made of two clamshells. For connection to a retainer on the machine, a fastening device is provided that is made of plastic. The fastening device is made rigid by suitable shaping and makes do without metal inlays. The two halves of the housing each have one bearing for a continuous shaft, which on one end carries a yarn guide drum and on its other end carries pulleys, for instance, as a drive device. Fastening means serve to hold the two housing parts together in the correct position. The housing is easy to open for maintenance.
Patent TW-466662-B (TW)
Title: Semiconductor wafer examination system
Inventor: TAKE KUNIHIKO
IPC: G01N21/94
Filed: 2000-12-04
Granted: 2001-12-01
Abstract: A semiconductor wafer examination system can accurately and reliably detects defects of semiconductor wafers. The semiconductor wafer examination system 1 comprises a defect classification device for automatically classifying defects of semiconductor wafers on the basis of defect detection parameters and a knowledge base and a classification support device for supporting the operation of the defect classification device. The defect detection parameters define the permissible deviation of the surface image of a defective semiconductor wafer from that of a normal semiconductor wafer. The knowledge base contains data for the types of defects that can occur in semiconductor wafers and data for showing the characteristics of each type. The classification support device prepares data on isolated defective areas that are used for selecting and/or altering the defect detection parameters and preparing the knowledge base.
Patent TW-469698-B (TW)
Title: Circuit design with single pulse signal to simultaneously control output voltage and switch converting circuit
Inventor: WU SHI-CHI
IPC: H03K5/003
Filed: 2000-12-14
Granted: 2001-12-21
Abstract: The present invention provides an output circuit to regulate the voltage by pulse width, which utilizes a pulse width inputted by a single pulse input terminal to regulate the voltage for output. When there is a pulse inputted in the pulse input terminal, the switch converting chip is turned on. When there is no pulse inputted in the pulse input terminal, the switch converting chip is automatically turned off, thereby achieving the power-saving effect.
Patent TW-470726-B (TW)
Title: Automatic warehouse
Inventor: KAWAGUCHI MASATOMI
IPC: G06K17/00
Filed: 2001-01-09
Granted: 2002-01-01
Abstract: A hoisting table 31 of a stacker crane 4 in an automated is provided with two units of bar code readers 36, 37 for a long distance and a short distance, and an article 20 in a rack is attached with bar codes on the front face and the side face. The bar code reader for a long distance 36 reads bar codes of articles in the rack, and the bar code reader for a short distance 37 reads bar codes of articles loaded on the stacker crane. It is possible to reduce the number of the bar code and make an inventory without taking articles out of the station.
Patent TW-473937-B (TW)
Title: Fabrication method of split-gated non-volatile memory
Inventor: LIN JIAN-WEI
IPC: H01L21/8246
Filed: 2001-02-07
Granted: 2002-01-21
Abstract: A fabrication method of split-gated non-volatile memory is disclosed, which comprises: (1) form gate oxide layer, the first doped polysilicon layer, the first insulation layer on the semiconductor substrate sequentially; (2) remove part of the first insulation layer at the position where the floating gate is to be defined, so as to expose part of the first doped polysilicon layer; (3) oxidize the first doped polysilicon layer so that the exposed portion of the surface of the first doped polysilicon layer has a polysilicon oxide layer formed; (4) remove the first insulation layer; (5) form the first photoresist layer on the first doped polysilicon layer and the polysilicon oxide layer; (6) remove the portion of the first photoresist layer located on the polysilicon oxide layer to define the source pattern; (7) remove part of the polysilicon oxide layer, the first doped polysilicon layer using the first photoresist layer as the mask until part of the gate oxide layer is exposed, wherein the polysilicon oxide layer is cut into two mutually disconnected parts; (8) remove the first photoresist layer; (9) form the second photoresist layer on the first doped polysilicon layer, polysilicon oxide layer and part of the gate oxide layer, and fill the gap between two polysilicon oxide layers; (10) remove part of the second photoresist layer to expose the first doped polysilicon layer; (11) remove part of the first doped polysilicon layer by using the polysilicon oxide layer and the second photoresist layer as the mask, wherein the remaining part of the first doped polysilicon layer is located directly under the polysilicon oxide layer used as the floating gate; (12) remove the second photoresist layer; (13) cover an interlayer dielectrics on the gate oxide layer, floating gate and polysilicon oxide layer; (14) fabricate the control gate on the interlayer dielectrics by the external side of the floating gate sidewall; (15) define the drain region.
Patent TW-526363-B (TW)
Title: Display apparatus and its driving method
Inventor: KUMAGAWA KATSUHIKO
IPC: G09G3/32
Filed: 2001-04-24
Granted: 2003-04-01
Abstract: The purpose of the invention is to eliminate voltage non-uniformity and display non-uniformity caused by enlarging scale and increasing resolution when performing capacitor-coupling driving of the liquid crystal display apparatus. A display apparatus includes the followings: plural pixel electrodes 5, which are disposed to have a matrix shape; a switch device 3, which is connected to the electrode 5; a scanning electrode 1; an image signal electrode 2; and opposite electrodes (in which a capacitor is formed between the opposite electrode and the pixel electrode 5). A storage capacitor 7 is provided in between the pixel electrode 5 and the scan electrode excluding the scan electrode 1 of the same section. More than two kinds of capacitance compositions connected to the pixel electrode 5 (including the gate-drain capacitance 4 of the switch device 3, and at least one kind of capacitance in the storage capacitor) correspond to the separation distance from the power supply terminal of the scan electrode 1 and have different values. In one pixel, when total capacitance connected to pixel electrode 5 is equal to Ctot, the first capacitance ratio Αgd=Cgd/Ctot is increased consecutively or gradually. The second capacitance ratio Αst=Cst/Ctot becomes approximately constant by setting the capacitance composition of each pixel.
Patent TW-593271-B (TW)
Title: Production of tertiary butyl acetate from MTBE
Inventor: WARNER R JAY
IPC: C07C69/14
Filed: 2001-06-08
Granted: 2004-06-21
Abstract: Disclosed is a process for the production of t-butyl acetate and coproduction of methyl acetate or ethyl acetate, directly from MTBE or ETBE, by contacting a mixture of acetic acid, acetic anhydride, and MTBE, or alternatively, ETBE, with an acid catalyst. Unlike the art, disclosed is a route employing a tert-butyl ether as starting material for the desired production or coproduction of tert-butyl acetate. Also unlike the art, acetic anhydride is employed to react with the water of formation from the esterification reaction to control formation of t-butyl alcohol.
Patent TW-503508-B (TW)
Title: Mechanical clamper for heated substrates at die attach
Inventor: FOONG SALLY Y L
IPC: H01L21/52
Filed: 2001-06-28
Granted: 2002-09-21
Abstract: An apparatus is provided wherein a substrate is mechanically clamped to a heater block of a die bonder to hold down the heated substrate before and during the die bonding operation, thereby preventing warpage of the substrate. Embodiments include a clamp comprising a plurality of spring-loaded rollers which push down opposing outer edges of the substrate onto the heater block while the substrate is being heated and die bonded. The clamp minimizes warpage of the substrate by pushing the substrate flat onto the heater block, and allows the substrate to be moved into and away from the die bonding area.
Patent TW-I244534-B (TW)
Title: Panhead
Inventor: NAKATANI KOICHIRO
IPC: F16M11/04
Filed: 2001-07-31
Granted: 2005-12-01
Abstract: A panhead (11) has a base body (20), a tilting body (21), and a camera mount (41). The base body (20) is adapted to be connected to a leg system 12. The tilting body (21) can be adjustably rotated around a rotation center axis (X) that horizontally extends in the lateral direction. The camera mount (41) can be adjustably rotated around a rotation center axis (A) that horizontally extends in the fore-and-aft direction and coincides with the axial direction of a side-tilting shaft. The rotation center axis (A) of the camera mount (41) approximately coincides with a lateral-dimension-bisecting line (B) of the base body (20) as viewed from the top. The side-tilting shaft is disposed approximately below a camera fixing screw (59) of the camera mount (41).