Patent EA-001361-B1 (EA)
Title: Multiplier circuit for power measurement equipment and method for measuring momentary value of power
Inventor: KROSNOV MIKHAIL NIKOLAEVICH
IPC: G01R22/00
Filed: 1997-07-29
Abstract: 1. A multiplier circuit for power or energy measurement equipment (P, W, 30, 40), comprising (a) a first measured (9) analog signal (u(t)) is supplied to a first sigma-delta converter (SDM1; 10), whose output controls a multiplier (20; 20a, 20b, 20c, 20d; 21a, 21b, 22a, 22b), wherein (b) a second measured (9) analog signal (i(t)) is supplied to the multiplier (20), and (c) the output of the multiplier (20) is supplied to a second sigma-delta converter (SDM2; 30) which generates at its output an output signal (p(t)) which represents the momentary value of the product of the first and the second analog signals (u(t), (i(t)), characterized in that  (d) two digital inverter stages (50a, 50b) are arranged before the multiplier (20), and after the second sigma-delta converter (30) and are synchronously driven at a low-frequency (fc), wherein (e) the operating frequency of the sigma-delta converters (10, 30) lies in the MHz range, frequencies of alternating analog signals (fu, fi) lie in the 20 to 1000 Hz range, and the switching frequency of the digital inverter stages lies below 10 Hz, to maintain operation of both sigma-delta converters (10, 30) for measuring the output signal (p(t)) the switching frequency of the digital inverter stages is selected to compensate the offset of the two sigma-delta converters at a frequency that is markedly lower than the frequencies of the measured analog signals. 2. The multiplier circuit according to claim 1, characterized in that  (a) the operating value of the first signal (u(t)) is less than the AC variable signal, in particular, of the signal which is the network voltage (uNetz(t)), and (b) the operating value of the second signal (i(t)) is considerably higher of the AC variable signal, in particular, of the signal which is the network current (iNetz(t)). 3. The multiplier circuit according to claim 2, characterized in that the network voltage and the current are measured from 110V, 220V or 380V. 4. The multiplier circuit according to any preceding claim, characterized in that the output signal (p(t)) is supplied to an analog or digital integrator (40), in particular, a reversible counter, the counter levels of which are operable to read at least one period, preferably two or more periods of the alternating analog signals (u(t), (i(t) and reading the binary output signal of the second sigma-delta converter (30) without overflowing , so that the integrator output (40) calculates continuously the work (w(t) performed by both analog signals. 5. The multiplier circuit according to any preceding claim, characterized in that the first and the second digital inverter stages (50a, 50b) are "exclusive OR" circuits. 6. The multiplier circuit according to any preceding claim, characterized in that the multiplier has two outputs and (a) comprises four analog switches (20a, 20b, 20c, 20d) connected by a bridge-type circuit, wherein the bridge arm is an output, and the upper, and correspondingly, the lower bridge arm are the first input of the multiplier (20), wherein the second input of the multiplier (20) is a digital input, which closes and breaks simultaneously two corresponding analog switches (20f, 20d, 20b, 20c), wherein simultaneously closed and broke analog switches are accordingly one upper analog switch of one bridge arm and one lower analog switch of the other bridge arm, so, independently from the output signal (ux) of the first sigma-delta converter (10) to actuate the analog switches and transmit the second analog signal (i(t) in accordance with the position of the analog switches directly or with an inverted polarity; or (b) has two multiplexes, the multiplex outputs of which are connected together and form the second input of the multiplier (20), to which the output signal of the first sigma-delta converter (10) is supplied, wherein the first input (21a, 21b) of the multiplier (20) has two analog switches (22a, 22b), which, depending on the output signals of the multiplexes gate either the second analog signal (i(t) or the analog-inverted second analog signal (-i(t) as an output signal of the multiplier (20), wherein opposite frequency signals (f1, f2; f2, f1) are continuously supplied to both multiplexes on their multiplication inputs which are not overlapping clock signals for control the analog switches of the sigma-delta converters (10, 30) in switched capacitor circuity. 7. The multiplier circuit according to any preceding claim, characterized in that the sigma-delta converters (30, 10) generate currency density in bits proportional to the analog input signal (u(t), (i(t) as the sigma-delta converters of the first degree where the ratio of the logical unit level to the logical zero level is proportional to the momentary value of the input signal. 8. The multiplier circuit according to claim 5, characterized in that the frequency of the low frequency switching (fc) is considerably lower of the frequency (fu, fi) of the alternative analog signals (u(t), (i(t), if the signals of AC current are used as the input signals. 9. A method for measuring the momentary value of the power in a measurement equipment, in particular, for both voltage and current in the network, in which (a) the digital flow current in bits of the high frequency (ux) is controlled by the density of both logical levels proportionally to the first analog signal (u(t), the frequency of which is substantially lower the current frequency in bits, (b) the first digital flow current in bits (ux) switches the sign or the polarity (20) of the second analog signal (i(t), the frequency of which (fi) coincides by the order of values  with the frequency of the first analog signal to obtain the basic signal with a switchable high frequency polarity (uy), which is suitable for determining the multiplication signal (uz), characterized in that  (c) operating currencies (f1, f2) of the density control and switching (10, 20) mainly higher than the frequencies (fu, fi) of the analog signals by 10<5> - 10<6>, but if direct analog signals are used then the operating frequencies (f1, f2) are above 1 MHz. 10. The method according to claim 9, characterized in that the multiplier (20) is the multiplier of the sign inversion. 11. The method according to claim 9 or 10, characterized in that the basic signal (uy) is evaluated without analog-digital conversion using parallel output or without forming the product respective its low-frequency component, in particular using the secondary sigma-delta converter (30), which generates at the output the multiplication signal (uz = p(t). 12. The method according to claims 9 to 11 characterized in that the first analog signal is measurable voltage (u(t), in particular, domestic network voltage, and the second analog signal is measurable current (i(t) in said network in case of calculating the momentary value of the power taken from the network. 13. The method according to claims 9 to 11 characterized in that the analog signals are the alternative analog signals.