Patent EP-3809453-A1 (EP)
Title: Method of forming an interconnection between metallic layers of an electric component and an electronic component with removal of oxide layers from the metallic layers by a reducing agent as well as a corresponding arrangement
Inventor: HEINRICH ALEXANDER
IPC: H01L23/488
Filed: 2019-10-16
Abstract: A method of forming an interconnection between an electric component (101, 201) and an electronic component (104, 204) comprises providing an electric component (101, 201) comprising a first main face, and a first metallic layer (102, 202) disposed on the first main face, providing an electronic component (104, 204) comprising a second main face and a second metallic layer (105, 205) disposed on the second main face, wherein at least one of the first or second metallic layers (102, 105, 202, 205) comprises an oxide layer (102A, 105A, 202A, 205A) provided on a main face thereof, disposing a reducing agent (150, 250) on one or both of the electronic component (104, 204) and the electric component (101, 201) such that the reducing agent (150, 250) is enabled to remove the oxide layer (102A, 105A, 202A, 205A), and connecting the electronic component (104, 204) to the electric component (101, 201) by directly connecting the first metallic layer (102, 202) of the electric component (101, 201) with the second metallic layer (105, 205) of the electronic component (104, 204) by applying pressure and heat. The interconnection process may be a cold or solid-solid diffusion interconnection process or step. The electronic component (104, 204) may be a chip or a die and the electric component (101, 201) may comprise one or more of a substrate, a carrier, a leadframe, a semiconductor wafer, a chip, a die, a chip package, a direct copper bonded (DCB) substrate and an aluminium metal braze (AMB) substrate. The application of the reducing agent (150, 250) can be done by coating one or both of the components (101, 104, 201, 204) with a flux layer, by providing the reducing agent in liquid form between the electric and electronic components (101, 104, 201, 204) or by applying the reducing agent in form of a gas or vapor in a closed process chamber, preferably being also the chamber in which connecting the electronic component (104, 204) to the electric component (101, 201) is conducted. The first metallic layer (102, 202) may comprise a first surface roughness and the second metallic layer (105, 205) a second surface roughness which is different from the first surface roughness or which in the same order of magnitude as the first surface roughness. The first and second metallic layers (102, 105, 202, 205) may comprise identical or different metallic materials. The first and second metallic layers (102, 105, 202, 205) may have a different malleability, in particular, one of the first and second metallic layers (102, 105, 202, 205) may be formed by sputtering while the other one may be formed by a plating process, e.g. an electro- or electrochemical plating process, wherein the use of different processes may be an efficient way to provide metallic layers having a different level of plasticity. For example, one of the metallic layers (102, 105, 202, 205) may comprise or may (at least partially) consists of a monocrystalline metal, e.g. silver, formed e.g. by electrochemically plating, while the other one may comprise or (at least partially) consist of a microcrystalline metal, e.g. silver, formed by sputtering.