baber/WOPTO huggingface dataset:
Patent TW-336243-B (TW)
Title: A compound of formaldehyde polyresins
Inventor: YAHIRO SHUUJI
IPC: C08L59/04
Filed: 1995-05-18
Granted: 1998-07-11
Abstract: A compound of a plurality of formaldehyde polyresin comprising: (A) formaldehyde poly resin of 100 by weight that is formed by a plurality of formaldehyde polymer chains of which each containing repeated formaldehyde units where at least 2 oxygen alkene units of carbon units of 0.05-0.5mo1% and the number of carbons in the total plurality of the formaldehyde polymer chains bearing at least 1 alkoxy, the number of carbon bearing at least 2 hydroalkyl of carbon, in nitrogen and under 230 degree C, when heated 100 minutes, the reduction rate R in rated weight as follows remains under 3%, (where W1 is the weight of the formaldehyde polymer resin before heating, W2 weight of heated formaldehyde polymer resin) (B) 0.01-3.0 by weight of poly-B-alanin of 6um in chip diameter in average, and (C) 0.001-0.6 by weight of organic fat alkalinic metal salt.
Patent TW-347563-B (TW)
Title: Method for selectively depositing silicon oxide spacer layers
Inventor: JANG SHIUN-MING
IPC: H01L21/31
Filed: 1996-02-15
Granted: 1998-12-11
Abstract: A method for selectively depositing a silicon oxide insulator spacer layer between multi-layer patterned metal stacks within an integrated circuit, which comprises: forming upon a semiconductor substrate a silicon oxide insulator substrate layer which is formed through a plasma Enhanced Chemical Vapor Deposition (PECVD) process; forming multi-layer patterned metal stacks on the silicon oxide insulator substrate layer, the multi-layer patterned metal stacks having a top barrier metal layer formed from titanium nitride and a lower-lying conductor metal layer formed from an aluminum containing alloy; selectively forming a silicon oxide insulator spacer layer upon the portions of the silicon oxide insulator substrate layer exposed through the multi-layer patterned metal stacks and upon the edges of the aluminum containing alloy exposed through the multi-layer patterned metal stacks, the silicon oxide insulator spacer layer being formed through an ozone assisted Chemical Vapor Deposition (CVD) process employing Tetra Ethyl Ortho Silicate as the silicon source material, the silicon oxide insulator spacer layer being formed for a deposition time not exceeding an incubation time for forming the silicon oxide insulator spacer layer upon the top barrier metal layer formed from titanium nitride.
Patent TW-311199-B (TW)
Title: A game apparatus
Inventor: HONGO TAKEICHI
IPC: G06F19/00
Filed: 1996-05-30
Granted: 1997-07-21
Abstract: A game apparatus characterized in that: * it has a main game part, a toy part, a monitoring device showing the characters , and an operating device for operating the characters on the monitor; * the toy part has a main toy part and a plurality of sub-toy parts to be assembled or disassembled to the main toy part; * the main toy part has non-volatile memory for recording its own data;* the sub-toy parts have their own recognition parts; * the main game part has an access device for accessing data from the non-volatile memory of the main toy part, and has a judging device for judging the recognition parts of the sub-toy parts; * the main game part has a control device for controlling the showing off of the characters on the monitor according to the data from the access data device.
Patent TW-358946-B (TW)
Title: Semiconductor memory having a fast operation circuit array structure
Inventor: YOO JEI-HWAN
IPC: G11C11/41
Filed: 1996-06-18
Granted: 1999-05-21
Abstract: A semiconductor memory, including at least four memory cell blocks, being each formed by the word line and bitline detectors disposed in the memory cell blocks, including: an I/O line, for I/O of data in the memory cell blocks; I/O, connected to the I/O line, for controlling and driving the I/O of data; a first data line, for transmission of data, disposed between the I/O of the memory cell block and the I/O of the other memory cell block in perpendicular to the memory cell block; a second data line, for transmission of data by means of the first data line of at least two memory cell blocks; a data sensing amplifier, connected to the second data line, for sensing and amplifying data; and data output, for output the amplified data to an external lead frame.
Patent TW-473390-B (TW)
Title: A hormonal pharmaceutical composition for correcting oestrogen deficiencies in menopausal women
Inventor: LANQUETIN MICHEL
IPC: A61K31/57
Filed: 1996-09-24
Granted: 2002-01-21
Abstract: The present invention relates to the field of chemotherapy. More precisely, it relates to a trisequential oestro-progestogen combination, characterized in that it is made up of dosage units comprising only an oestrogen, dosage units comprising a combination of an oestrogen and a progestogen, and dosage units comprising only an excipient. This trisequential mode of administration is intended for compensation of functional disorders caused by hypoestrogenia associated with the menopause or the premenopause.
Patent TW-343418-B (TW)
Title: Digital color encoder capable of reducing beat noise on TV screen
Inventor: MUKAI TAKUO
IPC: H04N9/65
Filed: 1997-03-07
Granted: 1998-10-21
Abstract: A digital color encoder using first and second color difference signals to form a digital signal used as the sample as a predetermined sampling frequency, and generating a composite video signal corresponding to a predetermined color television broadcasting system from three video signals corresponding to the three basic colors of light; in which the digital color encoder comprises: color subcarrier signal generating means for generating two color subcarrier signals separately having a predetermined frequency determined according to the color television broadcasting system, and having a phase difference of 90° therebetween, to be used as the digital signal of sampling at a sampling frequency; modulation means for generating first and second modulation waveform signals thereby carrying out a balancing modulation on the two color subcarrier signals by using the first and second color difference signals; noise signal generating means for generating random noise signals; and signal combining means for summing the first modulation signal, the second modulation signal and the noise signals, and quantizing the summed signal, thereby generating a digital signal having a predetermined word length to be used as the chrominance signal.
Patent TW-362158-B (TW)
Title: Device and procedure for generating electromagnetic pulses
Inventor: GIBAS PETER ALFRED
IPC: G01H11/02
Filed: 1997-04-28
Granted: 1999-06-21
Abstract: The invention is based on the tasks of a device and a procedure which make possible a new technological variant for developing additional fields of use in the field of generating strong electromagnetic pulses, for example, for explaining and influencing structures of materials or even application in electromagnetic compatibility investigations. The tasks are handled by the principle construction of the core piece of the device in the form of 2+n (i.e. from 5, with n=3) electromagnetic solenoid systems interleaved in one another according to the "Matroschka" principle and by the principle switching and measurement technique connections of the resonant chamber systems with the impulse generators (33, 34, 35, 36, 37) for excitation as well as an evaluation and control unit (38) and a vibration measurement device (40). The invention is a device and procedure for generating electromagnetic pulses on the basis of electric-magnetic-mechanical interactions between electromagnetic and mechanical oscillatory systems and can be employed in basic research on the structure of matter, solid-state physics, materials testing and electromagnetic compatibility tests.
Patent TW-434596-B (TW)
Title: Method of producing transponders and transponder produced according to said method
Inventor: DROZ FRANCOIS
IPC: H04B1/59
Filed: 1997-07-17
Granted: 2001-05-16
Abstract: Method of producing a transponder (20) comprising the following steps: (a) demarcation of different turns (8) of a coil in a sheet (1) including a dielectric substrate covered by at least one conducting layer (2) by stamping said conducting layer by means of a stamping die (5) having cutting surfaces of contact (6) with the superficial conducting layer (2), (b) connection of at least one electronic component (25) with the said turns (8), (c) mounting of at least one protective sheet (22; 27) covering said coil and said electronic component (25). To facilitate the stamping and to obtain clean incisions, the conducting layer is covered before stamping with a synthetic film. To prevent short circuits from becoming established over the incisions, the latter are preferably filled in with adhesive, varnish or lacquer.
Patent TW-353827-B (TW)
Title: System and method for increasing the efficiency of alternating current induction motors
Inventor: STRAKA RICHARD STEPHEN
IPC: G05F1/70
Filed: 1997-08-23
Granted: 1999-03-01
Abstract: A system for increasing efficiency of an AC motor, comprising, in combination: switching means coupled to the AC motor for controlling power supplied to the AC motor; timer means coupled to the AC motor for monitoring a time when AC line voltage to the AC motor reaches zero volts; A/D converter means coupled to the timer means for monitoring a time when AC line current to the AC motor reaches zero amps and for converting an AC open circuit voltage across the switching means from an analog measurement to a digital measurement, the digital measurement being indicative to power actually needed by the AC motor; and microcontroller means coupled to the timer means, to the A/D converter means and to the switching means for combining the time when AC line current reaches zero amps with the time when AC line voltage to the AC motor reaches zero volts and with the digital measurement provided by the A/D converter means to determine a servo error, for determining if the AC motor needs more power based on the servo error, for determining if the AC motor needs less power based on the servo error, and for providing a control signal to the switching means to supply the minimum power required.
Patent TW-355752-B (TW)
Title: Optical coupling-device to couple the light between two waveguide-end-face
Inventor: HEISE GERHARD
IPC: G02B26/08
Filed: 1997-09-23
Granted: 1999-04-11
Abstract: The coupling-device has a shift-device (100) to shift the two waveguide-end-faces (4, 4^) relatively parallel to the end-faces (4, 4^); said shift-device (100) has an expansion element (7), which relatively moves the end-faces (4, 4^) due to a special expansion and/or contraction of said element (7).
Patent TW-343390-B (TW)
Title: Semiconductor device
Inventor: TOMITA NAOTO
IPC: G11C16/06
Filed: 1997-09-26
Granted: 1998-10-21
Abstract: A semiconductor device characterized in comprising: a reference potential generation circuit for outputting a reference potential; a first voltage increase circuit for supplying the reference potential to the input terminal, outputting either a source potential or a formed first high voltage potential; a second voltage increase circuit forming and outputting a second high voltage potential for the drain potential of a write transistor; a first voltage drop circuit supplying the output potential of the first voltage increase circuit and the reference potential to the input terminal for outputting either a potential decreasing the output potential of the first voltage increase circuit or the output potential of the first voltage increase circuit for the gate potential of the memory cell and the source potential of the memory cell; a second voltage drop circuit supplying the output potential of the first voltage increase circuit and the reference potential to the input terminal, and outputting a potential decreasing the output potential of the first voltage increase circuit for the gate potential of the write transistor; at least one first source switch circuit supplying the output potential of the first voltage drop circuit to the input terminals, and outputting either the output potential of the first voltage drop circuit or the source potential for the gate potential of the memory cell; a second source switch circuit; a third source switch circuit; a cell source decoder circuit; a row decoder circuit; a column decoder circuit; and a write transistor decoder circuit.
Patent TW-360804-B (TW)
Title: Illumination device and information processing apparatus
Inventor: TABATA MASAMI
IPC: H04N1/04
Filed: 1997-12-08
Granted: 1999-06-11
Abstract: A light source or LED element is positioned adjacent to an entrance surface of a light guide element of stick, shape made of light transmissive substrate. The light that has entered from the entrance surface to the interior of the light guide element is scattered by a diffusion area to emerge from an exit surface in a predetermined direction, wherein the light that has entered from the entrance surface into the light guide element is not made incident directly on at least a part of the diffusion area.
Patent TW-406103-B (TW)
Title: Amorphous precipitated silica cured organic rubber composition
Inventor: SWIFT HAROLD E
IPC: C01B33/193
Filed: 1997-12-13
Granted: 2000-09-21
Abstract: Amorphous precipitated silica is characterized by a standard white area of less than 0.8 percent. The low standard white area is a characteristic of the silica which is indicative of high (i.e., very effective) dispersion when the silica is incorporated into organic rubber compositions which are cured. Cured organic rubber compositions comprising amorphous precipitated silica exhibit low white areas which indicate high dispersion of the silica in the compositions.
Patent TW-360927-B (TW)
Title: Method and materials for through-mask electroplating and selective base removal
Inventor: PANAYOTIS CONSTANTINOU ANDRICACOS
IPC: H01L21/8247
Filed: 1997-12-19
Granted: 1999-06-11
Abstract: Multilayer metal materials are selected so that the materials will alloy or intermix under rapid thermal annealing conditions. The individual materials of the multilayers are preferably chosen such that at least one of the materials may be selectively etched with respect to the other material by wet chemical or electrochemical etching. For electroplating applications, the alloyed plating base material will assume some of the etch resistance of the original electrodeposit material such that a selective wet etch of the plating base can be performed without substantial undercutting. Furthermore, the graded composition alloy will exhibit other advantageous physical and chemical properties for electrode formation and use. The alloying or intermixing may be accomplished before or after patterning of the materials, for the instance wherein the materials deposited as blanket layers. Similarly, the alloying or intermixing may be accomplished before or after plating base removal for structures deposited by through-mask plating.
Patent TW-382878-B (TW)
Title: Full-color organic electroluminescent device
Inventor: CHEN SHING
IPC: H05B33/00
Filed: 1997-12-27
Granted: 2000-02-21
Abstract: The present invention discloses a full-color organic electroluminescent device using an organic electroluminescent element capable of emitting ultra-violet light with wave length 380-400 nm as a basic element, coated with a layer of different fluorescent media (wave length converting layer) on its surface. By means of this ultra-violet light organic electroluminescent element, ultraviolet light is produced, which in turn excites the fluorescent layer thereon to emit fluorescent lights with different colors according to the florescent media used, I.e. the red fluorescent medium emits red light, the green fluorescent media emits green light, etc....R,G,B three color fluorescent medium emits white light . By applying this principle, a high brilliance, low current and low energy consuming full-color display device may be fabricated.
Patent TW-382859-B (TW)
Title: D/A converter with Gamma correction
Inventor: TU NENG-PING
IPC: H03M1/66
Filed: 1997-12-31
Granted: 2000-02-21
Abstract: A D/A converter with Gamma correction according to the invention is designed for C-DAC which takes up much less space than the conventional R-DAC and 2-divided C-DAC. Therefore, this D/A converter has advantages of simple design and low cost. Furthermore, this invention provides a D/A converter with a Gamma correction circuit with which users can freely define the shape of a Gamma correction conversion curve to thereby widen application areas by adjusting terminal voltages.
Patent TW-376430-B (TW)
Title: Anti-buckling spiral wound gasket
Inventor: CHESTER RICKEY W
IPC: F16J15/12
Filed: 1998-01-14
Granted: 1999-12-11
Abstract: An improved spiral wound gasket is disclosed that deters and redirects buckling. The invention includes the following: an integral inner ring, a gasket element, outer wraps and an outer guide ring. The integral inner ring is a winding of a thin strip metal of at least seven revolutions that is overlapped over itself and secured to itself. The gasket element is wound around the integral inner ring and includes a second thin strip of metal and also a thin strip of filler material so as to form alternate layers of the thin strip of metal and filler material. The outer wraps are a winding around the circumference of the gasket element of a thin strip of metal. The invention also discloses a new outer guide ring that has an inside edge that, together with the outside circumferential edge of a spiral wound gasket, defines apertures. These apertures or expansion zones allow filler material to displace radially outwardly rather than radially inwardly to form buckles.
Patent TW-374045-B (TW)
Title: Polishing apparatus, polishing member and polishing method
Inventor: KONISHI NOBUO
IPC: B24B7/20
Filed: 1998-02-02
Granted: 1999-11-11
Abstract: A polishing apparatus includes a polishing layer formed of foaming resin and having a plurality of mechanical polishing particles contained in the polishing layer so as to be partially exposed from a polishing surface thereof. An object to be polished and the polishing layer are rotted relative to each other so that the object is polished with the mechanical polishing particles, in a state in which the object is allowed to contact with the polishing surface of the polishing layer.
Patent TW-415977-B (TW)
Title: Plating method
Inventor: OMASA RYUSHIN
IPC: C25D7/00
Filed: 1998-04-09
Granted: 2000-12-21
Abstract: This invention provides a method of sound and uniform plating of small holes with diameter of no more than 0.2 mm, preferabally no more than 0.1mm, further preferabally no more than 0.05 mm, or even better no more than 0.03 mm that are indispensable for micro-wiring of PCB's and IC substrate so that defect rate due to imperfect wiring of zero can be ensured. A method of continuous plating with a sequential treatment of the object from pretreatment to plating procedure, wherein: (A) agitating and vibrating means of both (such as 4 in the figures), (B) bath aeration means, (C) means (such as 2, 3 in the figures) that swing the electrode bar from which the object is suspended, and (D) means (such as 5, 14 in the figures) for offering vibration within an amplitude range of 0.5 to 1.0 mm by means of the electrode bar, from which the object is suspended, by a motor that is adjusted by an inverter to 10 to 60 Hz, are operated in the pretreatment and plating procedures in at least one of the cleaning tank the non-electrolytic plating tank and/or the electrolytic plating tank.
Patent TW-395102-B (TW)
Title: Improved general LAN power-line carrier transmitting system and method
Inventor: SCHURIG ALMA K
IPC: H04L12/46
Filed: 1998-08-11
Granted: 2000-06-21
Abstract: A local area network repeater system for transmitting and receiving network data between repeaters, the system comprising a plurality of repeaters, each comprising: (A) a interface, connecting said repeater to an AC power line; (B) transceiver, electrically connected to said coupler for receiving data from said coupler, wherein said transceiver further comprising: (I) a data modulator to convert digital data to analog data; (ii) a transmitter to receive the analog data from said data modulator and prepare the analog data for transmission on the power lines; (iii) a transmit filter receiving the analog data from said transmitter and filtering the resulting analog signal to transmission on the power lines; (iv) a receiver filter receiving an analog signal from the power lines; (v) a receiver receiving the filtered analog singal from said receiver filter and demodulating and digitizing said analog signal, wherein said demodualtion incoporates frequency shift key (FSK) and differential frequency shift key (DFSK) technology; and (VI) a data buffer receiving said digitized data from said receiver; c a controller, electronically connected to said transceiver, receiving data from said data buffer and sending data to said data modulator, to provide digital control to said transceiver; and (D) an interface electrically connected to said controller for transferring digital data to a computer.
Patent TW-388903-B (TW)
Title: Shadow mask for color cathode ray tube and manufacturing method of the same
Inventor: YASUDA TSUKASA
IPC: H01J9/14
Filed: 1998-06-22
Granted: 2000-05-01
Abstract: Slot holes 5 and bridge portions 6 are formed throughout an effective region of a shadow mask, in which the slot holes are to be formed, such that a major side length L(x) of the slot hole 5 and a bridge width Bw (x) of the bridge portion 6 are gradually increased from a center portion of the effective region toward a peripheral portion thereof while maintaining a bridge width ratio R between the major side length and the bridge width in the center portion of the effective region, according to a bridge width determination function F(x).
Patent TW-393751-B (TW)
Title: Semiconductor device with protection circuit
Inventor: FUJII TAKEO
IPC: H01L23/60
Filed: 1998-09-10
Granted: 2000-06-11
Abstract: A lead on chip (LOC) semiconductor device or a chip on lead (COL) semiconductor device with protection circuit. Non-connection pins are made shorter than connection pins to reduce the inductance of the non-connection pins, or to obtain different capability of protection circuit for non-connection pins and connection pins with each other. The time constant of the protection circuit for the non-connection pins are made longer than that of the protection circuit for the connection pins. Further, the clamping capability for the connection pins is made greater than that for another connection pin adjacent to the connection pin.
Patent TW-385549-B (TW)
Title: manufacturing process for metal oxide semiconductor transistor
Inventor: CHEN JIN-LAI
IPC: H01L29/772
Filed: 1998-10-02
Granted: 2000-03-21
Abstract: A manufacturing process for metal oxide semiconductor transistor takes use of thin oxide layer, polysilicon layer and top covering layer as etching barrier for forming trench in the substrate. When the trench is formed a insulating layer is filled up therein, after finishing making the shallow trench isolation region, then the aforementioned the three of layers is patternized to form pretreated gate structure. After then, source/drain region is formed in the substrate, and, simultaneously, on the side wall of the pretreated gate and the shallow trench isolation region gate gap wall and isolation gap wall are respectively formed. After then, removing the top covering layer of sacrificing gate from the pretreated gate structure to form an opening, a conductive layer is implanted into the opening and a contact window pretreated opening which is formed and enclosed by gate gap wall and isolation gap wall, and the making of conductive gate layer and contact window pretreated plug are then simultaneously finished.