Patent GB-824685-A (GB)
Title: Improvements in or relating to electronic telephone exchanges
IPC: H04Q11/04
Filed: 1956-12-03
Abstract: 824,685. Automatic exchange systems. TELEFONAKTIEBOLAGET L. M. ERICSSON. Dec. 3, 1956 [Dec. 1, 1955], No. 36954/56. Class 40 (4). In an automatic exchange a connection between two two-wire lines is effected by a junction transistor, the emitter of which is connected to one wire of the first line and the collector of which is connected to one wire of the second line. The second wires of the two lines are connected together for the passage of alternating currents, and to the base of the transistor via a base resistance, the value of which is substantially lower than those of the emitter and collector resistances when the transistor is cut off, but is substantially higher than they are when the transistor is conductive, and means is provided to change the bias of the base from a value at which both the emitter-base and the collectorbase junctions are biased in the backward direction to one at which both junctions are biased in the forward direction. The embodiment described is a 100-line automatic satellite (non- exchange) having twenty link circuits each associated with a two-way junction to the main exchange. The talking circuit switches, which operate on a one-wire basis, are as shown in Fig. 1. The inlet and outlet are connected via the collector-emitter path of a junction transistor the base of which is normally biased to the non-conducting or OFF condition. Negativegoing pulses are applied via an " and " gate Ro, Lo and rectifier Lk to an integrating circuit Ru, C having a time-constant longer than the repetition interval of the pulses. Consequently for as long as the pulses persist the transistor is maintained in the ON condition and provides a low-impedance input-output path. Each subscriber line is connected to four such transistors (Fig. 3) giving access to four links, two shared by ten subscribers having the same tens digit, and two by ten subscribers having the same units digit. Each link circuit such as SN1 has access via ten secondary transistors to the ten links of the corresponding group of links, and via a further transistor to a common marker. The transistors of Fig. 3 are controlled by a pulse distributer system illustrated in Figs. 5, 6. A pulse generator F drives two magnetostrictive delay lines De and Df on each of whichthe time interval between adjacent coils is 10Á sees. Each time the pulse in De triggers M1, that is every 50Á sec., a pulse is passed to the " and " gates connected to the coils of Df and in consequence these gates are opened cyclically at 50u sec. intervals and the chain Bf is stepped on each occasion. The columns of link circuits SNR are pulsed cyclically from De and the rows from Bf. Each row of link circuits is allotted the respective one of four groups of twenty delay lines D 1-D4 (one delay line for each digital value of tens and units digits of subscribers). Each delay line has a delay time of 50Á secs. of which each link circuit of a row is allotted a 10Á sec. time position coincident with the time position of its column. The arrangement is such (see below) that when a subscriber (calling or called) is connected to a link circuit his number is stored on the relevant two delay lines D in the time position of the link circuit concerned, and therefore appears each 50u sec. as pulses on the relevant two conductors in the corresponding one of four groups of twenty conductors H1- H4 which two conductors are connected to the " and " gate GI of the corresponding transistor of the subscriber concerned. The relevant transistors of all subscribers engaged on calls are thus pulsed and retained in the ON condition. Testing for calling lines is controlled by the chain Bf, the output of which connects the four groups of conductors H1-H4 sequentially to the common group of conductors V by opening the corresponding group of "and" gates GII1-GII4. These gates pass pulses in either direction as indicated by the back-to-back symbol employed in the drawings. Each subscriber is provided with an " and " gate GIII connected to the relevant tens and units wires of group V, the third input being enabled when the handset is off the cradle. If a subscriber is engaged in a call his number appears on the corresponding two wires of V every 200Á sees. and pulses are passed via GIII to conductor S in the time position of the link to which the subscriber is connected. Detailed operation, Figs. 7-10. Testing for calling lines.-The " and " circuit G106 passes a pulse when De pulses the column and Bf the row of the link circuit shown in Fig. 8. If the link circuit is idle, this pulse passes G100 and G201 (Fig. 9) to the conductor L. One device in each of the groups of bi-stable devices B10-B19 and B20-B29 is in the triggered state, thus producing via the corresponding gates of G410-G419 and G420-G429 pulses on the leads of group V relevant to the subscriber line having the number stored on B10-B29, whereafter the two triggered devices are restored by the output of M6. If the subscriber of that line has his handset on its cradle no pulse passes to conductor S. The pulses produced on the two V conductors also pass two :of the gates G510-G529 and two of the inhibitor gates 6610-6629. The " units " pulse is shifted by the relevant inhibitor circuit of G320-G329 to the next higher value lead and triggers the next device of B20-B29. In general the " tens " pulse passes via one of G210-G219 to trigger the same device B10- B19 as before; but if the units digit of the line tested was " 9," a pulse passes via G200 to block G210-G219 and the pulse passes via one of G310-G319 to trigger the device of B10- B19 corresponding to the next higher digit. Thus the lines are sequentially scanned in the time positions of idle link circuits. Handset off cradle when line scanned.-A pulse passes, via GIII of the line scanned, to conductor S and via G450 and G452 to trigger B30, which blocks G320-G329 and G451 so that the tens and units pulses are re-written in B10-B29 and scanning is stopped. B30 also triggers B31 which blocks G201 and G207 to mark the marker busy, and triggers B35 in the link circuit, which switches transistor EM1 to the ON condition to connect the marker to the corresponding junction. Scanned line busy.-During the next cycle of Bf the marker compares the number stored on B10-B29 with those appearing on the conductor group V from the delay lines of all busy link circuits by means of " and " gates G710- G729. If the line is busy, G700 passes a pulse which resets B30, B31 and B35 and appears on conductor L to cause B10-B29 to store the next number, thus initiating the restarting of scanning. Scanned line not busy.-No coincidence occurs at G700 and at the end of the cycle a pulse via G102 and G202 triggers B33 which, with B35 also triggered, opens the " and " gate G105, the output of which blocks the tone sender GT. The cessation of tone indicates a calling line condition and when the main exchange is ready to deal with the call it reverts a short signal which steps K3 to position 1, thus triggering M3 which opens G810-G819, and the tens digit of the calling line, after translation by 01 into a twoout-of-five Vf code, is sent via EM1 to the main exchange. The acknowledgment signal steps K3 to position 2, thus triggering M4 which opens G820-G829 to cause transmission of the units digit, the following acknowledgment signal stepping K3 to position 3. In the next time position of the link circuit a pulse via G102, G202 and G203 triggers M5 thus restoring K3, B33 and B30, and a pulse is sent via G107 to trigger B36, and to conductor L to cause the number of the caller to be sent on the conductor group V whence it passes via gates GII to the delay lines of the link circuit group in the time position of the link circuit, since G108 was opened when B36 was triggered and passed a pulse to open the relevant gates GD. B36 restores B35, the link is disconnected from the marker, and EM1 reverts to the OFF condition. M5 also restores B31 and the marker is freed to continue scanning. During each cycle of the delay line De a pulse passes via G108 at the same time as the caller's number appears at the output of delay lines D as pulses on the relevant group H1-H4. The latter maintain the primary transistor of the calling line ON, and the combination passes GIV of the relevant secondary transistor connecting the link circuit with the link connected to the desired group of ten subscribers' primary contacts to maintain that transistor ON. Calling party dials wanted number.-As long as the caller's line is looped pulses occur on S every 200Á sees. in the time position of the link circuit and pass via G104 to trigger the slow release monostable device connected to its output which blocks the inhibitor circuit G109. When the caller dials, this monostable device follows the impulses since the breaks are of 60 msecs. duration whereas pulses are required every 200Á sees. to keep the device operated. Tone impulses of 60 msecs. duration are thus sent by GT, MF which is very slow-acting preventing restoration of B36. The call is set up in the main exchange in known manner. Release.-When the caller hangs up, pulses in the time position of the link cease to appear on lead S, so that the inhibition is removed from G109 and B36 is restored. G108 is blocked and the gates GD are thus blocked in the time position of the link circuit. The calling number is therefore erased from the delay lines D, both transistors go to the OFF condition and the link circuit is once again idle. Call incoming from main exchange.-The tone normally sent from the main exchange ceases, TM in the link circuit responds and sends a pulse in the time position of that circuit via G103 and G207 to trigger B32 which busies the marker by blocking G201 and G207, blocks G204, triggers M6 to restore B10-B29, and triggers B35 and M8. M8 sends a pulse via G105 so that GT interrupts the tone to the main exchange. The tens digi