baber/WOPTO huggingface dataset:
Patent TW-455917-B (TW)
Title: System and method for cleaning silicon-coated surfaces in an ion implanter
Inventor: EDDY RONALD JOSEPH
IPC: C23C16/24
Filed: 2000-04-26
Granted: 2001-09-21
Abstract: A method and system for controllably stripping a portion of silicon (98) from a silicon coated surface, for example, from an interior portion of an ion implanter (10). The system comprises (i) a source (80) of gas comprised at least partially of a reactive gas, such as fluorine; and (ii) a dissociation device (70) such as a radio frequency (RF) plasma source located proximate the silicon coated surface for converting the reactive gas to a plasma of dissociated reactive gas atoms and for directing the dissociated reactive gas atoms toward the silicon coated surface. A control system (102) determines the rate of removal of the silicon (98) from the surface by controlling (i) a rate of source gas flow into and the amount of power supplied to the dissociation device, and (ii) the time of exposure of the silicon coated surface to the plasma. The invention is useful, among other things, for removing a contaminant-laden layer of silicon from a wafer-supporting disk (40) in an ion implanter, wherein the silicon coated surface has been formed by applying a layer (98) of silicon onto the surface by a plasma enhanced chemical vapor deposition (PECVD) process.
Patent TW-569074-B (TW)
Title: Active matrix liquid crystal display device
Inventor: WATANABE MAKOTO
IPC: G09G3/36
Filed: 2000-05-18
Granted: 2004-01-01
Abstract: In an active matrix liquid crystal display device having a thin film transistor array substrate (250) comprising a plurality of scan lines formed on an insulating substrate (100), a plurality of signal lines formed to cross the scan lines, thin film transistors formed near intersections between the scan lines and signal lines, respectively, pixel electrodes connected to one electrodes of the thin film transistors, respectively, and additional capacity portions connected to pixel electrodes (5) connected to source electrodes (4) of the thin film transistors, respectively; in order to provide a higher contrast and to allow driving at a lower voltage, a part of the additional capacity portion is formed, via insulating film (115) and semiconductor (120), between the pixel electrode (5) and that scan line (11) which is connected to a gate electrode (1) of the thin film transistor for switching the pixel electrode (5).
Patent TW-493116-B (TW)
Title: Semiconductor processing techniques
Inventor: NULMAN JAIM
IPC: G03F7/20
Filed: 2000-05-29
Granted: 2002-07-01
Abstract: The present invention provides a manufacturing environment (110) for a wafer fab, and an SPC environment (112) for setting control limits and acquiring metrology data of production runs. A computation environment (114) processes the SPC data, which are then analyzed in an analysis environment (116). An MES environment (118) evaluates the analysis and automatically executes a process intervention if the process is outside the control limits. Additionally, the present invention provides for an electrical power management system, a spare parts inventory and scheduling system and a wafer fab efficiency system. These systems employ algorithms (735, 1135 and 1335).
Patent TW-572923-B (TW)
Title: Special polyurethane compositions which cross-link by condensation and contain aminosilanes, a process for their preparation and their use
Inventor: SCHMALSTIEG LUTZ
IPC: C09D7/63
Filed: 2000-06-20
Granted: 2004-01-21
Abstract: This invention relates to polyurethane compositions which cross-link via a silane polycondensation and contain at least one alkoxysilane-functional polyurethane, at least one basic filler, at least one reaction product of an aminosilane with a maleic or fumaric ester, at least one organometallic compound and optionally additional auxiliary substances, to a process for their preparation, and to their use.
Patent TW-445198-B (TW)
Title: Rotary knife mounting device
Inventor: MATSUOKA HARUO
IPC: B27G13/08
Filed: 2000-06-27
Granted: 2001-07-11
Abstract: A rotary knife mounting device is adapted to permit easy, safe and quick replacement of knives, and to permit simple construction of a knife member installation structure. A sunken groove 2 is formed in a peripheral portion of a support 1 for receiving an inner pad 3 that has one lateral side 3a abutting against a side wall 2a of the groove 2. One lateral side 4a of a knife member 4 abuts against the other side of the inner pad 3 such that a pointed edge 14 projects from the peripheral portion of the support 1. One lateral side 5a of a press member 5 is disposed to abut against the other lateral side of the knife member 4 and, together with the inner pad 3, clamp the knife member 4. Further, the other lateral side 5b of the press member 5 is provided with a receiving member 6. The receiving member 6 has a receiving face 6a that inclines in the direction of a spindle of a rotary main shaft P. In addition, a wedge member 7 is provided with an abutting face 7a facing the receiving face of the receiving member to freely slidably abut against the press member 5 towards the side wall 2a of the groove 2 so that a drive device 8 adapted to enable slidable displacement of the wedge member 7 is connectable to the wedge member 7.
Patent TW-478013-B (TW)
Title: Method of formation of nano-structures on the surface of silicon
Inventor: SMIRNOV VALERY
IPC: H01L21/00
Filed: 2000-08-08
Granted: 2002-03-01
Abstract: A process for controllably forming silicon nanostructures such as a silicon quantum wire array. A silicon surface is sputtered by a uniform flow of nitrogen molecular ions in an ultrahigh vacuum so as to form a periodic wave-like relief in which the troughs of said relief are level with the silicon-insulator border of the SOL material. The ion energy, the ion incidence angle to the surface of said material, the temperature of the silicon layer, the formation depth of the wave-like relief, the height of said wave-like relief and the ion penetration range into silicon are all determined on the basis of a selected wavelength of the wave-like relief in the range 9 nm to 120 nm. A silicon nitride mask having pendant is used to define the area of the silicon surface on which the array is formed. Impurities are removed from the silicon surface within the mask window prior to sputtering. For the purpose of forming a silicon quantum wire array, the thickness of the SOI silicon layer is selected to be greater than the sum of said formation depth, said height and said ion penetration range, the fabrication of the silicon wires being controlled by a threshold value of a secondary ion emission signal from the SOI insulator. The nanostructure may be employed in optoelectronic and nanoelectronic devices such as a FET.
Patent TW-581878-B (TW)
Title: Scanning tunneling microscope emission converging apparatus
Inventor: ARAFUNE RYUICHI
IPC: G01Q30/02
Filed: 2000-08-19
Granted: 2004-04-01
Abstract: The purpose of the present invention is to provide a scanning tunneling microscope (STM) emission converging apparatus that has higher light converging efficiency in a vacuum without impairing the high space resolution of an STM. The scanning tunneling microscope emission converging apparatus is provided with the followings: a scanning tunneling microscope; and plural optical fibers 2, which are arranged in a radiation shape about the front end of a scanning tunneling microscope probe 1 and around the scanning tunneling microscope probe 1 to converge emission caused by the operation of the scanning tunneling microscope.
Patent TW-482991-B (TW)
Title: Power-saving driving circuit for plasma display panel
Inventor: HUANEY JIH-FON
IPC: G09G3/294
Filed: 2000-09-13
Granted: 2002-04-11
Abstract: A kind of power-saving driving circuit used for plasma display panel can drive the sustaining electrode on the plasma display panel during the sustaining period. The power-saving driving circuit includes a voltage source for storing electric energy, a first channel for raising the sustaining electrode to a high electric potential, a second channel for pulling down the sustaining electrode to a grounding potential, and the other auxiliary circuits. When the first channel is conducted, electric energy can be released to the sustaining electrode through the voltage source. When the second channel is conducted, the electric energy on the sustaining electrode can be retrieved to the voltage source so as to make the holding electrode be driven between high electric potential and the grounding potential, in which the first channel and the second channel can also share part of the common channel portion.
Patent TW-462940-B (TW)
Title: Container
Inventor: THIERSCH GEORG
IPC: B65D21/02
Filed: 2000-11-28
Granted: 2001-11-11
Abstract: The invention relates to a re-closable container comprising a rectangular base area, four side (body) areas (1, 3) essentially arranged at right angles with respect to each other, a top region which after filling of the package is closed by means of a ridge seam (5), and a closing element (8) arranged on an inclined area (7) in the top region, which is to design and improve the re-closable container described in more detail above such that the container volume can be used optimally without having to do without the advantages of the known containers in relation to production, filling and closing. Furthermore, the form of such a container, resulting from the blank (cut shape), is to protect the fitted closing element in the best possible way from the forces experienced and from damage. The blank should be such that it takes into account, at least basically, the current state of manufacturing technology. This object is met in that the container is folded such that the inclined area (7) supporting the closing element (8) at least partially protrudes from the rectangular profile defined by the base area, so that the body area (1) situated below the closing element (8) extends outward and that the body area (2) opposite the outward extending body area (1), at least in the top region, extends inwardly in a corresponding shape.
Patent TW-479279-B (TW)
Title: Deuterium reservoirs and ingress paths
Inventor: BURNHAM JAY
IPC: H01L21/8234
Filed: 2000-10-17
Granted: 2002-03-11
Abstract: Semiconductor structures are provided with on-board deuterium reservoirs or with deuterium ingress paths which allow for diffusion of deuterium to semiconductor device regions for passivation purposes. The on-board deuterium reservoirs are in the form of plugs which extend through an insulating layer and a deuterium barrier layer to the semiconductor substrate, and are preferably positioned in contact with a shallow trench oxide which will allow diffusion of deuterium to the semiconductor devices. The deuterium ingress paths extend through thin film layers from the top or through the silicon substrate. The latter include shallow trench isolations formed in a semiconductor substrate which are adjacent and connected to semiconductor devices formed in the semiconductor substrate, and where the back portion of the semiconductor substrate has been polished or ground down to the bottom of the shallow trench isolation, thereby allowing deuterium, during an anneal, to diffuse from the back through the shallow trench isolation to the semiconductor devices in the semiconductor substrate.
Patent TW-480556-B (TW)
Title: Method and apparatus for monitoring process exhaust gas, semiconductor-manufacturing device, and method and system for managing semiconductor manufacturing device
Inventor: KOMIYAMA KIYOSHI
IPC: C23C16/52
Filed: 2000-10-25
Granted: 2002-03-21
Abstract: In the present invention, process exhaust gas is collected to analyze its components using a Fourier transform spectroscope (FT-R) (26). The results of analysis are compared with the reference values derived from a process carried out under reference process conditions. If the amount of any analyzed component exceeds a predetermined range with respect to the reference values, a signal indicative of trouble in the process is produced. Alternatively, the process conditions may be automatically controlled instead of producing such a signal indicative of trouble.
Patent TW-511345-B (TW)
Title: Method and apparatus for forward error correction coding for an AM in-band on-channel digital audio broadcasting system
Inventor: KROEGER BRIAN WILLIAM
IPC: H03M13/25
Filed: 2000-12-22
Granted: 2002-11-21
Abstract: A method for digital audio broadcasting comprises the steps of providing a plurality of bits of digital information to be transmitted, interleaving the bits of digital information into a plurality of partitions, forward error correcting the bits of digital information using a combination of pragmatic trellis code modulation and complementary punctured code, and transmitting the bits of digital information. The partitions include a main partition, a backup partition, an upper partition, and a lower partition, wherein the upper partition and lower partition are non-overlapping. The main partition overlaps both of the upper and lower partitions and the backup partition overlaps both of the upper and lower partitions. The interleaved bits comprise a core interleaver and an enhancement interleaver. The forward error correcting is accomplished by representing the bits as independently coded in-phase and quadrature signals, applying a first error correcting code to the in-phase signals, and applying a second error correcting code to the quadrature signals. Receivers for processing the broadcast signals are also provided.
Patent TW-487837-B (TW)
Title: CMOS constant current reference circuit
Inventor: CHO SEONG-IK
IPC: G05F3/24
Filed: 2000-11-30
Granted: 2002-05-21
Abstract: The present invention discloses a CMOS constant current reference circuit that has a simple circuit structure, which is composed of only CMOS transistors but any bipolar transistors, and is capable of providing a constant current, which is independent of the variations of voltage supply and temperature, for the load. The CMOS constant current reference circuit contains the followings: constant current generation tool, which is used to generate a constant bias current that is independent of voltage supply; self-compensation tool, which is used to control constant current generation tool so as to maintain the generated bias current that is independent of temperature variation at a constant level; the switching-on tool, which is used to switch on the current route of the constant current generation tool; and constant current supplying tool, which is used to supply bias current generated by the constant current generation tool with a constant quantity.
Patent TW-473934-B (TW)
Title: Manufacturing method of DRAM cell
Inventor: WU JIN-LUNG
IPC: H01L21/60
Filed: 2000-12-04
Granted: 2002-01-21
Abstract: There is provided a manufacturing method of DRAM cell. The method comprises covering a first dielectric layer after forming a transistor on a substrate, and forming a bit line having a cap layer thereon; next, forming a second dielectric layer on a passivation layer; then, etching the second dielectric layer in a self-aligned contact manner, and keeping to etch to penetrate the passivation layer and the first dielectric layer until exposing the substrate, so as to simultaneously form a node contact opening and an electrode opening of capacitor bottom; then, filling a polysilicon layer into the node contact opening and electrode opening of capacitor bottom, wherein the top of the polysilicon layer is located below the capacitor bottom electrode opening; then, forming a spacer on the upper side of the polysilicon layer and inner side of the opening for use as a mask, and back-etching the polysilicon layer to form a recess-shape bottom electrode located above the node contact opening; then, removing the second dielectric layer and spacer to form a capacitor bottom electrode; next, forming a dielectric layer on the bottom electrode, and further forming a upper electrode opening of capacitor, thereby completing the capacitor of DRAM cell.
Patent TW-478092-B (TW)
Title: Semiconductor device incorporated therein high K capacitor dielectric and method for the manufacture thereof
Inventor: KIM MIN-SOO
IPC: H01L27/108
Filed: 2000-12-18
Granted: 2002-03-01
Abstract: A semiconductor device for use in a memory cell includes an active matrix an active matrix provided with a semiconductor substrate, a plurality of transistors formed on the semiconductor substrate and conductive plugs electrically connected to the transistors, a number of lower electrodes formed on top of the conductive plugs, Ta2O5 films formed on the lower electrodes, composite films formed on the Ta2O5 films and upper electrodes formed on the composite films.
Patent TW-484127-B (TW)
Title: Writing device
Inventor: MORIICHI MUNETOSHI
IPC: G11B7/126
Filed: 2001-01-03
Granted: 2002-04-21
Abstract: The object of the present invention is to provide a writing device capable of writing data at 1-time or higher recording rates, which can perform a highly precise laser drive pulse control in the direction of time axis. A first delay circuit (SR1 to SRn) capable of variably controlling a delay time in units of a relatively long time and a second delay circuit (DB1 to DBn) capable of variably controlling a delay time in units of a relatively short time are employed in a combined manner. A laser drive pulse can be controlled in the direction of the time base with high accuracy corresponding to any recording rates ranging from 1-time to higher, e.g., 8- or 12-time, speeds without using very large number stages of delay gates, thereby perform a highly precise laser drive pulse control in the direction of time axis.
Patent TW-496796-B (TW)
Title: Method for recycling calcium fluoride sludge
Inventor: JENG WAN-LING
IPC: B09C1/08
Filed: 2001-02-16
Granted: 2002-08-01
Abstract: The present invention relates to a method for recycling calcium fluoride sludge, which comprises: estimating the amount of a reducing agent needed according to the basicity of the calcium fluoride sludge; adding a heating agent into the reducing agent; and mixing the obtained mixture with the calcium fluoride sludge. In a preferred embodiment, the mixture is added with a hardening agent and granulated. The granulation step adopts a cold granulation method and includes a heating step so that the granules has an initial strength, and a conditioning step so that the final product has a certain crushing strength and a reduced residual moisture. Hence, the calcium fluoride sludge processed according to the present invention is similar to a natural fluorite and has a very low content of HF. Both will only escape under a high temperature. The present invention adopts a cold granulation method so as to eliminate the possibility of environmental contamination caused by the possible escape of HF. Furthermore, its heat loss is similar to that of a natural fluorite such that it can replace a natural fluorite to be used as a slug-production, flux material in a steel plant. Furthermore, the present invention uses basicity to calculate the amount of a reducing agent needed so that the processing cost of SiO2 can be removed, as well as eliminating the problem where other flux needs to be added to adjust the CaF2 content.
Patent TW-477872-B (TW)
Title: Antifriction bearing joint
Inventor: SCHEFFER LUTZ
IPC: F16C19/54
Filed: 2001-02-22
Granted: 2002-03-01
Abstract: The present invention relates to an antifriction bearing joint with a first joint portion (1) and a second joint portion (2) which is moveable, at least to a limited degree about an axis in a rotary manner with respect to said first joint portion (1), two antifriction bearings (4, 5) arranged coaxially and at an axial distance apart from one another, which are provided between the first and the second joint portion (1, 2), wherein the antifriction bearings (4, 5) each have an inner and an outer bearing race, wherein the outer bearing races of the two antifriction bearings (4, 5) are associated with the first joint portion (1) and the inner bearing races of both antifriction bearings (4, 5) are associated with the second joint portion. In order to provide an antifriction bearing joint having the aforementioned features and which is quick and easy to mount and ensures exact seating of the bearing without fine adjustment, said antifriction bearing joint is characterized by the following further features: two inner and two outer bearing shells (6', 7') which are engaged at least partially in a tightly fitting manner with the parts forming the bearing tracks and otherwise are optionally configured integrally with the bearing races, wherein the two outer bearing shells (6, 6') are securely connected to the first joint portion (1) and the two inner bearing shells (7, 7') are securely fixed to the second joint portion (2), and wherein the bearing tracks of one of the bearings (4) are fixed in the axial direction to both the associated outer bearing shell (6') and the inner bearing shell (7'), while the other of the bearings (5) is fixed axially only to one of the associated outer or inner bearing shells (6, 7) and is axially moveable, preferably with a tight sliding fit, with respect to the remaining bearing shell (7, 6).
Patent TW-492176-B (TW)
Title: Silicon epitaxial layer diode and its manufacturing method
Inventor: JANG JR-YI
IPC: H01L23/60
Filed: 2001-03-21
Granted: 2002-06-21
Abstract: The present invention relates to a kind of integrated circuit device that contains a semiconductor substrate and a silicon epitaxial layer deposited on top of the semiconductor substrate. The silicon epitaxial layer contains n-type doped region, which is doped with n-type impurity, and p-type doped region, which is doped with p-type impurity. The present invention further contains the manufacturing method of the integrated circuit device, in which the manufacturing method includes the following steps: providing a semiconductor substrate; forming a dielectric layer on top of the semiconductor substrate; forming a silicon epitaxial layer on top of the dielectric layer; using photolithography process to define the first doped region in the silicon epitaxial layer; doping the first type impurity in the first doped region; using photolithography process to define the second doped region in silicon epitaxial layer; and doping the second type impurity in the second doped region, in which the first doped region and the second doped region are adjacent to each other. Furthermore, the present invention includes a kind of integrated circuit device that receives signals from the integrated circuit, in which the integrated circuit device includes at least one silicon epitaxial layer diode to react with the signal for providing electrostatic discharge protection function.
Patent TW-508574-B (TW)
Title: Method and device for recording an information signal on an information layer of a recording medium
Inventor: DEKKER MARTIJN JEROEN
IPC: G11B7/125
Filed: 2001-05-09
Granted: 2002-11-01
Abstract: The invention relates to a method and a device for recording an information signal 10 in a phase change layer of a recording medium. A mark is recorded by a sequence 13 of write pulses and previous marks between the marks to be recorded are erased by a sequence of erase pulses 14. De bias power level 191, 192 between the erase pulses is made dependent on the recording speed, thus obtaining low jitter of the recorded marks and at the same time preventing thermal cross write during erase.
Patent TW-499370-B (TW)
Title: Spoked cycle wheel
Inventor: HERTING ERIC
IPC: B60B21/00
Filed: 2001-06-19
Granted: 2002-08-21
Abstract: A multi-part lightweight easily extruded or molded wheel rim and wheel particularly for cycling with joined flanges which extend radially inwardly toward the center of the rim and wheel provides strength not found in conventional channel shaped rims. The radially extending flanges are provided with apertures for receiving bent ends of spokes for assembling the rim and a hub to form a wheel which receives an inflatable tubeless or tube tire which need not be dismounted from the rim when repairing or replacing spokes.