Patent GB-896129-A (GB)
Title: Data storage device
IPC: H03M7/30
Filed: 1959-08-11
Abstract: 896,129. Electrical digital data-storage apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Aug. 11, 1959 [Aug. 13, 1958], No. 27422/59. Class 106 (1). Data words of fixed length are compressed for recording on to e.g. magnetic tape by replacing a number of non-significant characters greater than a predetermined number by a special character signal. As described (Fig. 1), four character words are gated from an input unit 10 in parallel by character and bit, and recorded in parallel by bit, in series by character on a magnetic tape 12. The characters are first gated to a temporary store comprising 4-bit registers 22a to 22d, each register comprising four bi-stable devices having output lines 24 each of which, if at high potential, indicate the presence of a binary one. In the present example the characters represent digits and non-significant digits are to the left of significant digits. The outputs 24 are applied to AND units 42a and 42d which produce an output if the input lines are at low potential indicating that the corresponding register contains a zero. These outputs are applied to a network comprising AND units and inverters which marks an output line from 0-0, 1-0, to 4-0, according to the number of zeros to the left of the first significant digit. Gates 55a to 55d pass the contents of the respective 4-bit registers to the transducers 13 and are operated by a signal on line 56, connected in series to the gates through delays 58a to 58c, the signal deriving from the marked line out of 0-0 to 3-0 applied to a tap T0, T2 or T3 of line 56. Lines 0-0 and 1-0 are connected to tap T0, and lines 2-0, 3-0 to T2, T3, respectively. Line 4-0 and line 56 are connected as inputs to the special character generator 20. The special character consists of four 1-bits and after issuing the character to the transducer, the generator 20 provides an end of operation (E0) signal. A start signal is supplied at 17s gating the contents of the input unit to the 4-bit registers. Assume output 2--0 to be marked indicating that the contents of 22a, 22b are non-significant. Then tap T2 is energized, gate 55c is opened, after a delay gate 55d is opened, a special character is recorded after a further delay at the E0 signal generated which provides the start signal for the next word and the gating control for the output of the analysing network on the next operation. Data words are expanded by the apparatus of Fig. 5. Each character read by transducers 112 and transferred to a temporary 4-bit register 116a triggers a multi-vibrator 158 the output of which is applied to AND units 155, 156. If the character is not special, i.e. a significant digit, the output of AND unit 150 is low and is inverted to actuate AND unit 155 producing a signal S and delayed signals SD, SD 2  to SD 4  and SD x . These operate to step a register comprising the stages 122a to 122d, to clear the contents of temporary store 116a into the first stage 122d of the register and to step a counter 170. The multivibrator is re-set by SD. A special character actuates AND unit 150 and thus AND unit 156 to generate signal T and a delayed signal TD. T clears the stepping register to output unit 110 while TD re-sets the counter, the multivibrator 158 and clears the temporary register 116a. Signals T and TD may also be generated by the counter reaching a count of four, due to four significant digits being read, i.e. all the digits of a word are significant.