baber/WOPTO huggingface dataset:
Patent JP-H09121483-A (JP)
Title: Noncontact passive card
Inventor: THORIGNE YVES
IPC: B42D15/10
Filed: 1996-06-21
Abstract: PROBLEM TO BE SOLVED: To supply sufficiently high energy to a processing means for a component of a noncontact passive card from a remote step and interactively transfer data between the card and a station. SOLUTION: A coil L2 of a component of a noncontact passive card CSC receives energy by induction and interactively transfers a data signal with a station. A processing means which processes a signal from the coil L2 is formed as an integrated circuit on a substrate of the component. The coil L2 is formed on the surface of the component by flattening integration technology of a metallic coating. The integrated coil dominates at least 50% of the entire surface of the component.
Patent JP-H06249917-A (JP)
Title: Device and method for detecting electronic circuit
Inventor: MAASHIYA REIMAA MOSUKOUTSUTSU
IPC: G06F11/28
Filed: 1992-05-29
Abstract: PURPOSE: To compress response signal with a small number of gates even when a large-scaled electronic circuit as divided into a number of section circuits is tested. CONSTITUTION: In the compression of response signals generated by the assembly of independent circuits of a digital circuit to be tested, each response signal generated by the assembly of the corresponding section circuit is first analyzed by logical analyzing means 16, 18 in order to determine whether the response signal has a specified pattern or not. A pattern bit is set according to the response signal having a specified pattern bit. The pattern bit is compressed by a time compressing means 20 connected in chain form. Each compressing means imparts the pattern bit from the corresponding logical analyzing means together with the compressed bit generated by the upstream compressing means to an exclusive OR gate 22.
Patent JP-H108770-A (JP)
Title: Damper for building
Inventor: KOMI TOSHIO
IPC: E04B1/98
Filed: 1996-06-21
Abstract: PROBLEM TO BE SOLVED: To apply a damper to a small-scale dwelling or the like by attaching a mass capable of horizontally moving with vibration of a building to a part necessary for damping in a building and disposing a viscous damper between a mass and the building. SOLUTION: A frame 2 is fixed on a part needing damping of a floor or a ceiling beam 1. A housing for an X-directional bearing is provided on the frame 2. A Y-directional linear motion bearing is attached to be moved in a housing for the Y-directional bearing 8 along a Y-directional shaft 10 fixing both the ends on the frame 2. When vibration occurs on the floor or the ceiling beam 1 in the X-direction, vibration between the floor or the ceiling beam 1 and the frame 2 and that with a mass 3 are buffered with an X-directional coil spring 7 to be attenuated with a viscous damper 12. Y-directional vibration is also attenuated. Intermediate vibration between the X-directional and the Y-directional is moved in the direction of composed force of the X-directional and Y-directional shafts and attenuated with the viscous damper 12.
Patent JP-H0210256-A (JP)
Title: Method for detecting flaw in ceramic board
Inventor: ISHIZAKI TAKESHI
IPC: G01N25/72
Filed: 1988-06-29
Abstract: PURPOSE:To perform highly accurate detection in a very short time by projecting infrared rays on one surface of a ceramic board, and detecting the transmitted infrared rays from the other surface. CONSTITUTION:An infrared-ray lamp 2 is provided on the rear surface side of a ceramic board 1. An infrared camera 3 is provided on the front side thereof. A processing device 4 and a monitoring TV 5 are sequentially connected to the camera 3. When the lamp 2 projects the infrared rays on the rear surface, the infrared rays are emitted again from the front surface of the board 1 and reach the camera 3. The camera 3 photographs the reached infrared rays. The electric signal of the image is processed 4 and displayed on the TV 5 as an image. When defects such as cracks and holes exist on the rear surface in the inside or on the front surface of the board 1, the emitting rate of the infrared rays from the front surface of the board 1 is changed. Therefore, defective parts 6 are displayed on the TV 5. Thus the board 1 whose defective parts 6 are displayed is rejected as the defective part.
Patent JP-S6318572-A (JP)
Title: Automatic filing device for floppy disk
Inventor: KURIBAYASHI TOSHIHIRO
IPC: G11B17/28
Filed: 1986-07-11
Abstract: PURPOSE:To smoothly take out a floppy disk from respective storing room and return after the use thereof and to constantly correctly manage and store the floppy disk at a prescribed rack storing room by horizontally moving a manipulating fork inserted into the rack from a fork gate disposed at one end of the rack along a space part disposed at the upper or the lower part of a rack column. CONSTITUTION:There are provided the rack 2 in which many floppy disk storing rooms 4 partitioned by partition walls 2 are disposed in parallel and a floppy moving device 19 capable of moving along the direction in which the storing rooms for the rack 2 disposed in front of this rack 2 are arranged in parallel. The floppy disk moving device 19 is provided with the floppy disk, manipulating fork 25 capable of reciprocating internally and externally of the storing room 4 through slits 16 disposed on the bottom surface or the ceiling of the respective storing room 4 and a floppy holder 26 having a slit 33 permitting the manipulating fork 25 to be passed for holding the floppy disk 2 taken out from the storing room 4 on the moving device by the fork 25 and the one end of the rack 2 is provided with the fork gate 15 for pushing and pulling the fork 25 internally and externally of the rack 2.
Patent JP-S6224663-A (JP)
Title: Semiconductor memory device
Inventor: AOTO TOSHIRO
IPC: H01L27/11
Filed: 1985-07-24
Abstract: PURPOSE:To improve information holding characteristics by increasing overlapping areas of gate electrodes and upper surfaces of source and drain regions in MISFET's which constitute a flip-flop circuit. CONSTITUTION:N<+> type semiconductor regions 4 constitute switching MISFET's QSW with gate insulation films 5 and gate electrodes 6 and the gate electrodes 6 are formed together with word lines WL. N-type semiconductor regions 7 constitute driving MISFET's QDR of a flip-flop circuit with gate insulation films 8 and gate electrodes 9 and each semiconductor region 7 consists of an N<+> type semiconductor region 7A and an N<++> type semiconductor region 7B which has impurity concentration higher than the region 7A. The N<+> type semiconductor region 7A is provided to make the channel length of the driving MISFET QDR equal to that of the switching MISFET QSW or to those of MISFET's composing peripheral circuits. With this constitution, the overlapping area of the gate electrode 9 and the upper surface of the semiconductor region in the driving MISFET QDR is made to be larger than the area in the switching MISFET QSW.
Patent JP-S6224860-A (JP)
Title: Potting device
Inventor: NOGUCHI MASAMI
IPC: B23K3/06
Filed: 1985-07-24
Abstract: PURPOSE:To stably supply a pasty material having specified characteristics by constituting a supply nozzle for the pasty material of a potting device in such a manner that the nozzle can move in the plane direction. CONSTITUTION:The potting device is attached with a syringe 5 having the nozzle for supplying the paste at the top end of an arm 3 and turnably supports the same to a pin 4 of a stage 2. A post 6 is connected to a driving part. The paste is potted to a lead frame on a frame feeder 1 by vertically moving the arm 3 in an ordinary operation. The arm 3 is held slightly lifted from the top surface of the stage 2 and is turned to the left so as to be moved to an offline position where the arm 3 is made to stand by while the potting into the hole 11a of a test potting part 11 is repeated during the interruption of the operation. The pasty material having the specified characteristics is thereby stably supplied.
Patent JP-S5593580-A (JP)
Title: Buffer memory control system
Inventor: TONE HIROSADA
IPC: G06F9/38
Filed: 1978-12-29
Abstract: PURPOSE: To make the fetch processing efficient by returning data to a CPU when the fetch address does not exist in a high-speed buffer memory unit and data of the address exists in a store buffer register.  
     CONSTITUTION: When an address block to be stored exists in high-speed buffer memory unit 2, data is stored into unit 2 and store buffer registers 6 and 7. Meanwhile, when the address block to be stored does not exist in unit 2, data is stored in registers 6 and 7. In case that fetch request is issued from the CPU to the address block when the address block to be stored does not exist in unit 2 and data to be stored in a main memory is held in registers 6 and 7, data held in registers 6 and 7 is returned to the CPU. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H0456043-A (JP)
Title: Cathode-ray tube
Inventor: NAKAMURA MICHIO
IPC: H01J29/04
Filed: 1990-06-20
Abstract: PURPOSE:To suppress blooming phenomenon in the high current region by forming an approx. circular recess coaxially with an electron beam passinghole in No.1 grid at that surface of a cathode which faces the No.1 grid, and providing an electron emission layer only on the inner surface of this recess. CONSTITUTION:An approx.. circular recess 26 is formed coaxially with the electron beam passing hole 5 in No.1 grid at that surface of a cathode 25K which faces the No.1 grid G1, and an electron emission layer 27 is provided only on the inner surface of this recess. Thereby electrons in the low current region are emitted from an operational region 29L formed in a shallow part near the No.1 grod G1 in the recess 26. The electrons in the high current area, on the other hand, are emitted from the operational region in the low current region and that operational area 29H of the recess 26 which is formed in a part deeper than the low current region operational region. Thereby the assumed crossover dia. can be made small even in the high current region, and also the influence of the aberration due to main electron lens ML in the high current region can be reduced. As a result, blooming phenomenon in the high current region can be suppressed.
Patent JP-S6140635-A (JP)
Title: Magnetic disc controller
Inventor: MORITA FUMIO
IPC: G11B20/10
Filed: 1984-07-31
Abstract: PURPOSE:To shorten considerably the processing time of a magnetic disc FD by writing write information on the FD simultaneously with formation of a data format on the FD. CONSTITUTION:Format data of track number 00 of a master magnetic disc M- FD13 is stored in a format data storage area 15-1 of a memory buffer RAM. Format data of track number 02 is stored newly in the same format data storage area. Meanwhile, format data of track number 01 is stored in a format data storage area 15-2. In an operation step at this time, format data of track number 01 stored in the storage area 15-2 is written on a copy magnetic disc C-FD14. In case that another format data is stored in the storage area where format data is already stored in this manner, data is written after confirming whether already stored format data is all written on the C-FD14 or not.
Patent JP-H0532009-A (JP)
Title: Recording device
Inventor: ITO SHINICHI
IPC: B41J2/32
Filed: 1991-07-03
Abstract: PURPOSE:To make recording speed fast by recording and deleting a visible image in a state where a thermal head is preheated at a temperature which does not allow the visible image to be delected in a recording device using a recording material which reversibly becomes transparent or turbid whitely depending on temperature. CONSTITUTION:A thermal head 2 is equipped with a thermal resistor which supplies a thermal energy for recording a visible image and a low thermal energy for delecting the image to a recording material, and further with a means for preheating. Thus the thermal head 2 can be preheated by a temperature-controllable heater 4 based on a difference between a preheating temperature which is previously set by a heater drive circuit 5 and a temperature delected at a thermistor 6. Bit data is read from RAM 13 upon a print instruction from CPU 1 and the thermal resistor of the thermal head 2 is allowed to generate heat selectively according to an energization time determined by an energization time calculation circuit 7, thus enabling a visible image to be written and deleted. Subsequently, the energization period is out short and the recording speed is improved as compared to the case when the thermal head 2 is not preheated.
Patent JP-H1057507-A (JP)
Title: Device for monitoring electrode lead for heart pacemaker
Inventor: ABRAHAMSON HANS
IPC: A61N1/08
Filed: 1997-06-19
Abstract: PROBLEM TO BE SOLVED: To calculate impedance of a pacemaker lead and monitor it by identifying the impedance of an electrode lead from the combination of the capacity and an impedance time estimated from at least two surface ECG measurements which are obtained from an analyte in the attenuation time. SOLUTION: An implanted pacemaker can be observed as an RC circuit drawn in a figure. A waveform attenuating exponentially has an attenuation time constant τ=RC, as known by the standard RC circuit analysis. An output capacity expressed by a condenser C is known on a prescribed pacemaker. A value on the time constant τis estimated using, at least, two sampled signals of a surface ECG obtained from a patient, after the time t=0, namely a switch is closed and opened again. The value on R, namely the lead impedance, can be calculated as R=τ/C from the known value on C and the estimated value on τ.
Patent JP-S6317547-A (JP)
Title: Semiconductor device
Inventor: NAKANO NAOKI
IPC: H01L23/04
Filed: 1986-07-10
Abstract: PURPOSE:To improve adhesive properties on hermetic sealing by loading a semiconductor element onto the upper surface of a connecting pad and joining a cover for coating and sealing a land, a pin and a conductive circuit and the semiconductor element with the outer circumferential section of a substrate without being brought into contact with these land, pin and conductive circuit. CONSTITUTION:Lands 12, a conductive circuit 3 and connecting pads 5 are formed to a flexible substrate, and through-holes A are shaped to the land sections, thus acquiring a flexible wiring board 2. A substrate is disposed onto the lower surface of the flexible wiring board. Through-holes B having diameters larger than the through-holes A are shaped to the substrate at positions corresponding to the through-holes A, and pins are penetrated into the through-holes A, B. The pins and the lands in the periphery of the through-holes A are fixed and connected electrically, a semiconductor element 7 is loaded onto the upper surfaces of the connecting pads, and a cover 8 is joined with the outer circumferential section of the substarte in order to cover and seal the lands, the pins and the conductive circuit and the semiconductor element without being brought into contact with these lands, pins and conductive circuit. Accordingly, adhesive properties on hermetic seal are improved.
Patent JP-S5686047-A (JP)
Title: Rotary electric machine
Inventor: MATSUO MASAHIRO
IPC: H02K9/06
Filed: 1979-12-17
Abstract: PURPOSE:To attempt the improvement of cooling effect for the ratio of the quantity of wind by providing turbulent flow plates at the internal circumference section of an out cover wherein a turbulent flow is generated in a cooling ventilation flue. CONSTITUTION:A plurality of cooling fins 22 facing in the axis direction are arranged at the external circumference side of a supporting frame 12 for a stator. A cylindrical out cover 24 is placed by covering the cooling fins and a cooling ventilation flue 30 surrounded by the supporting frame 12 for a stator, the cooling fins 22, and the out cover 24 is formed. A cooling fan 28 is provided in a space section 26 installed between the out cover 24 and a bearing bracket 20. Furthermore, turbulent flow plates 32 are provided at the internal circumference side of the out cover 24 so that the plates may project toward the cooling ventilation flue 30. To generate a turbulent flow, notches 34 are provided at the part corresponding to the turbulent flow plates 32 of the cooling fins 22. In this way, cooling effect will be improved by generating the turbulent flow at the cooling ventilation flue 30.
Patent JP-H1115692-A (JP)
Title: Debug information output controlling method
Inventor: HIRATA TETSUYA
IPC: G06F11/28
Filed: 1997-06-19
Abstract: PROBLEM TO BE SOLVED: To bring a software executing time close to an actual executing time by comparing a function number added to a log output in debugging and an outputting object condition designated by an external file with each other and deciding the propriety of the log output so as to reduce outputs to an external storage device being the outputting destination of debug information. SOLUTION: A log output function 4 is provided with a function of determining whether to output debug information to the external file 5 from function ID obtained from each function 11, 12...1n of a software, a log outputting condition obtained from the file 5 and the button depressing state of a joy stick so as to output a log file. Then, as ID is given to all the functions 11, 12...1n of a debug objective software to call a function for outputting debug information with ID, necessary information is obtained by on designating the log outputting condition by the file 5. Consequently, information to be outputted for debugging can be changed without correcting the debug objective software.
Patent JP-H11264893-A (JP)
Title: Storage vessel of spent fuel
Inventor: FUKUDA TAKUJI
IPC: G21F5/012
Filed: 1998-05-27
Abstract: PROBLEM TO BE SOLVED: To make spent fuel possible to be preserved by efficiently cooling high burnup fuel, MOX fuel or fuel contained in a high density in a storage vessel of spent fuel. SOLUTION: In the preserving vessel of spent fuel, a storage space is formed inside a shield layer 1, where a lattice basket 3 supporting partitioning a plurality of fuel assemblies 6 is placed, the structural material 8a of the basket 3 is formed of a copper allot of Cu of 94 wt.% or more. By this, efficient cooling in accordance with the increase in heat rate of fuel containing high burnup and MOX spent fuel or contained in high density is possible. By this, fuel arrangement in the preserving vessel can be made higher density than the conventional design to reduce the space in preserving. By making the storage vessel itself small-sized, the cost can be reduced.
Patent JP-S5591134-A (JP)
Title: Semiconductor device
Inventor: MITSUI YASUROU
IPC: H01L29/812
Filed: 1978-12-28
Abstract: PURPOSE: To improve high frequency characteristic by projecting only the source bonding area of the chip loading body higher than the other areas with a conductive buffers between the other areas when a three-terminal semiconductor chip of a flip flop structure is mounted to the body.  
     CONSTITUTION: Source, drain and gate projected electrodes 1, 2 and 3 are separately provided on a three-terminal semiconductor chip to form a flip chip of a source- grounded GaAs FET element. Then, the electrodes are bonded on a chip loading body 9 made up of a grounding metal plate 10. In this process, the source grounding area 11 is projected high enough at the center to have the electrode 1 bonded thereon. The drain and gate areas 13 and 14 positioned sandwitching the area 11 are set so lower in the height of the metal plate as to have ceramic substrates 12a and 12b thereon. The electrodes 2 and 3 are respectively brought into contact with the ceramic substrates through drain and gate connection buffers 15 and 16 each comprising gold. In this manner, parasitic resistance at the contact part can be reduced. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S5863214-A (JP)
Title: Surface acoustic wave element
Inventor: OKAMOTO TAKESHI
IPC: H03H9/02
Filed: 1981-10-12
Abstract: PURPOSE:To obtain a surface acoustic wave element which has high performance with a small size, by forming a zinc oxide film on a silicon substrate via a dielectric film and therefore increasing both electric-mechanical coupling coefficient and the temperature coefficient. CONSTITUTION:A dielectric film 7 like silicon dioxide, etc. is formed on a silicon substrate 5 which is cut at the face equivalent to the (110) face. A zinc oxide film 6 is formed on the film 7 so that the piezoelectric axis formed on the surface of the substrate 5 and the film 7 is set vertical to the surface of the substrate 5. The comb-shaped electrodes 8 and 9 are formed on the film 6 by the vapor deposition of aluminum, etc. A Sezawa wave is energized in the direction equivalent to the axis (001) direction of the silicon 5 and to an input electrode 8 of a surface acoustic wave element. Thus the surface acoustic wave propagates on the surface of the film 6 to reach the output electrode 9. The electric- mechanical coupling coefficient is increased owing to the film 6, and the temperature coefficient is decreased due to the film 7 respectively. Thus the performance is improved for the surface acoustic wave element.
Patent JP-H0813195-A (JP)
Title: Multistage energization electrodeposition coating device for printed circuit board and electrodeposition coating method of printed circuit board
Inventor: FUJIMOTO SHINJI
IPC: B05D7/00
Filed: 1994-06-23
Abstract: PURPOSE:To attain continuous electrodeposition, to shorten the electrodeposition time of printed circuit boards, etc., to improve productivity, to assure good coating films and to lessen carryover of a coating material. CONSTITUTION:This multistage energization electrodeposition coating device for printed circuit boards consists of plural stages of electrodes 5 (branch numbers are omitted and hereafter the same) which are arranged within an electrodeposition vessel 1 and are independent to each other, a transporting conveyor 2 for the printed circuit boards, current collecting rails 7 which are disposed parallel therewith and are alternately arranged with energizing parts (7a to b) and electrical insulating parts (7d to g), metallic hangers 3 which are disposed at this conveyor 2 and support the circuit boards and conductors which project from these hangers 3 and come into contact with the rails 7. The device described above forms independent circuits in each step and successively executes energization and deenergization of the circuit boards plural times while transporting the circuit boards from the inlet tank side to the outlet tank side. This electrodeposition coating method comprises setting the voltages to be applied at the time of energization successively higher in the respective stages from the inlet tank side to the outlet tank side by using this device and successively executing the energization-deenergization while transporting the circuit boards.