baber/WOPTO huggingface dataset:
Patent JP-2000129002-A (JP)
Title: Friction material for brake
Inventor: ARAI KATSUO
IPC: C09K3/14
Filed: 1998-10-29
Abstract: PROBLEM TO BE SOLVED: To obtain a friction material which produces less noise even when the amount of the synthetic resin of a binder used in a friction material is equivalent or so to the conventional amount. SOLUTION: This friction material is prepared by preforming a friction- material-forming material obtained by adhering part of the thermosetting resin powder to be mixed to aramid fibers during or after fiber opening and mixing under agitation the resultant mixture with the remainder of the thermosetting resin powder together with other additives, and integrating the preform by means of a pressure plate under applied heat and pressure. It is desirable that the amount of the thermosetting resin powder to be adhered to the aramid fibers after fiber opening is 3-12 wt.%, the amount of the remainder of the thermosetting resin powder is 3-12 wt.%, the amount of a filler is 35-70 wt.%, the amount of a friction modifier is 10-25 wt.% and the amount of reinforcing fibers other than the aramid fibers is 12-35 wt.%.
Patent JP-H04181452-A (JP)
Title: Storage controller
Inventor: YAMAMOTO AKIO
IPC: G06F13/18
Filed: 1990-11-16
Abstract: PURPOSE:To eliminate loss time until the issue of a request and to enable an overlap processing for requests issued by both storage controllers (SC) by using a means to measure time until the arrival of another system request and a same resource usability deciding means for the own system request and the other system request. CONSTITUTION:The request generated by an inquiry request generating circuit 301 is transmitted through a request line 302 and an address line 303 to another system SC. In the own system SC, a busy latch 304 is turned on, a counter 305 is started being updated and when the request arrives from the other system, it is decided which request is generated fast. When the same resource is used by utilizing this character, any one of busy latches (304 and 309) is turned off by a deciding circuit 310. Thus, the both system request can be processed while overlapping them, and the loss time is not generated at all because of the exclusive processing.
Patent JP-H10148237-A (JP)
Title: Driving gear
Inventor: TAKAHASHI TAKUJI
IPC: H02P29/00
Filed: 1996-11-20
Abstract: PROBLEM TO BE SOLVED: To provide a driving gear by reducing cost whereby high position accuracy can be obtained by attaining reduction of speed fluctuation and vibration, in a speed width of a driven unit over a wide range. SOLUTION: In a driving gear driving a driven unit 22 by a motor 20, a drive system has inertia force giving means 23, 24, in accordance with a determined drive speed range, inertia force by the inertia force giving means 23, 24 is variably generated, the driven unit 22 is driven with the inertia force giving means 23, 24. In the driving gear driving the driven unit 22 by the stepping motor 20 determined with a phase by a pulse, the drive system has the inertia force giving means 23, 24, in accordance with a drive speed range determined by pulse number/sec, inertia force by the inertia force giving means 23, 24 is variably generated.
Patent JP-H03171227-A (JP)
Title: Micro processor
Inventor: KUNISHIGE SHINJI
IPC: G06F7/00
Filed: 1989-11-30
Abstract: PURPOSE:To attain a 16-bit operation at a 1T cycle and to attain the parallel processing of an 8-bit operation and the 16-bit operation by providing 16-bit ALU and few additional circuits for an 8-bit micro processor. CONSTITUTION:A control unit 5 decodes an instruction code held in an instruction register 4. When the content of the instruction code is the 16-bit operation, a destination-side and a source-side are designated from a 16-bit register file 3, are inputted to 16-bit ALU 7 and an operated result is written into a register designated by a destination. Since an 8-bit internal bus is not used at that time, data is transferred between 8-bit ALU 1 and an 8-bit register file 2. Thus, the parallel processing of the 8-bit operation and the 16-bit operation is attained and the 8-bit micro processor which can execute the 16-bit operation at the 1T cycle is obtained.
Patent JP-H04180458-A (JP)
Title: Facsimile equipment
Inventor: YAMAMOTO SUSUMU
IPC: H04N1/32
Filed: 1990-11-15
Abstract: PURPOSE:To surely reproduce a received picture by storing a picture signal till a prescribed condition is satisfied even after print-out. CONSTITUTION:When a start signal is inputted, a received picture signal is expanded by a companding section 7 by a command of a memory control section 22 and a document management sections 24,25,26 and after an error is checked, the signal is again compressed and stored in a storage section 8. Then the signal read from the storage section is expanded by the companding section and fed to a recording section 12 via an input output control section and the picture signal is printed out. Even after print-out, the storage section 8 stores the picture signal till a table delete command section 28 receives a delete command from the operator. Thus, when normal operation is not implemented by the recording section, after the repair, the signal is again printed out and the received picture is surely reproduced.
Patent JP-H07159493-A (JP)
Title: Inspection method for semiconductor device
Inventor: KOBAYASHI MASARU
IPC: G01R31/28
Filed: 1993-12-09
Abstract: PURPOSE:To identify good or bad of soldering and bad locations in a short time by providing a bidrectional pin for an output pin to be inspected and input/output part with two input and output pins for testing, and providing an memory element and the like for each pin to be inspected. CONSTITUTION:All pins to be inspected of a semiconductor device are set in an input state with an input pin TST1 for testing, a switch element 26 is set in a conductive state, pull-up or pull-down resistor elements 28, 48 are set in a connection state to the input terminal of an input buffer 34 via an element 26, and a low or high level pulse is input to all pins to be inspected from the outside of the semiconductor device. Then, test data input from all the pins to be inspected through a multiplexer 30 are stored in an element 32 by inputting one clock. The output of the multiplexer 30 is switched with a second testing pin TST2 to connect the element 32 in a shift registor state and the test data stored in the element 32 are input to the CLK of the testing clock pin.
Patent JP-H02155301-A (JP)
Title: Microwave circuit device
Inventor: HASHIMOTO KOJI
IPC: H01P5/103
Filed: 1988-12-07
Abstract: PURPOSE:To avoid an undesired transmission line and to minimize the number of discontinuous parts by constituting the subject device such that a metallic chassis mounted with a dielectric board formed with a microstrip line or a cover of the metallic chassis and a part of a flange of a waveguide are united integrally. CONSTITUTION:A dielectric board 4 formed with a microstrip line 3 is mounted onto a metallic chassis 2 and closed hermetically with a cover 1. In this case, a part of a flange 8 of a waveguide 7 is integrated to cover 1. Moreover, a part of the flange 8 of the waveguide 7 is integrated to the metallic chassis 10. Furthermore, the inner conductor 20 of a coaxial line 5 formed to the metallic chassis 2 or 10 is projected to both sides, one end is connected to the microstrip line 3 and the other end is inserted to the waveguide 7 composed of the metallic chassis 2, or 10 and 6. Thus, the inner conductor 20 of the coaxial line 5 is inserted directly to the waveguide 7.
Patent JP-2000124959-A (JP)
Title: Electromagnetic wave suppressor for signal transmission system by differential signal
Inventor: TAKAHASHI KUNIHIRO
IPC: H04L25/02
Filed: 1998-10-16
Abstract: PROBLEM TO BE SOLVED: To suppress radiation of unnecessary electromagnetic waves due to phase difference between a common-mode polarity signal and a reverse phase polarity signal by providing a delay means to delay a digital signal to be transmitted to at least one polarity of digital signals with mutually different polarities and an adjusting means to adjust balance of amplitude between both polarities of the digital signals on the transmitting side. SOLUTION: An adjusting circuit 12 to adjust difference in phases and amplitude between two polarity signals of balanced signal is provided outside a differential amplifier integrated circuit 11 for driving a cable. The adjusting circuit 12 is provided with an amplitude balance adjusting circuit 121 to adjust the amplitude and an emitter follower 122 for delay to adjust the difference in the phases of outputted signals.  Since the differences in the phases between the differential output signals consisting of the common-mode polarity signal and the reverse phase polarity signal and in the amplitude between the two polarity signals are compensated on the transmitting side so that no such differences appear on the receiving side by the adjusting circuit 12, the radiation of the unnecessary electromagnetic waves to be generated due to the differences in the phases and amplitude is suppressed on a transmission line.
Patent JP-2000141634-A (JP)
Title: Print head having acoustic lens and manufacture of acoustic lens
Inventor: BIEGELSEN DAVID K
IPC: B41J2/015
Filed: 1999-10-29
Abstract: PROBLEM TO BE SOLVED: To provide an improved acoustic lens which is formed in a complete hemisphere as much as possible. SOLUTION: An acoustic lens is manufactured such that a substrate 10 is etched to make a recess of a lens 11 integrally formed in a parabola shape. An etching solvent 13 is placed on the substrate 10 and a light 15 which is patterned by using a mask 17 from a parallel light source 19 is emitted to the etching solvent 13, thereby manufacturing the acoustic lens.
Patent JP-H01190727-A (JP)
Title: Production of polyketone polymer
Inventor: EITO DORENTO
IPC: C08G67/02
Filed: 1988-12-07
Abstract: PURPOSE: To prepare easily and efficiently polyketone polymers by bringing a mixture of carbon monoxide with an α-olefin of 3 to 10 C into contact with a solution of a specified catalyst composition to polymerize them.  
     CONSTITUTION: The catalyst composition comprising (A) a palladium compound, (B) a non-noble transition metal salt of an acid with a pKa of <2, and (C) a bisphosphine of formula R 5 R 6 P-PR 7 R 8 , wherein R 5 , R 6 , R 7  and R 8  each represents an aryl group, and may have polar substituents in a position ortho to the phosphorus atom to which the aryl group concerned is bound; R is a bivalent organic bridging group containing at least two carbon atoms in the bridge is prepared. The composition is dissolved in a mixture comprising at least 75 vol.% of aliphatic tertiary mono-alcohols containing at least 20 carbon atoms per molecule and/or aromatic hydrocarbons containing at most 10 carbon atoms per molecule, and at least 5 vol.% of aliphatic primary alcohol containing at most 10 carbon atoms per molecule. A polyketone polymer is prepared by polymerizing while bringing the mixture of carbon monoxide with an α-olefin of 3 to 10 C to the said catalyst composition. 
     COPYRIGHT: (C)1989,JPO
Patent JP-H08141843-A (JP)
Title: Thread cutter
Inventor: MATSUOKA KAZUHIKO
IPC: B23G5/20
Filed: 1994-11-18
Abstract: PURPOSE: To eliminate chips positively and form a thread of high accuracy without needing to form a prepared hole. CONSTITUTION: A thread cutting edge 13 is provided at the periphery of the tip of a shank 1, and a hole cutting edge 16 is formed at the tip face of a thread chaser in such a way as to be continuous onto the radial inner side of the thread chaser from the thread cutting edge 13. A circular recessed part 20 is formed at the center of the tip face of the thread chaser, and a passage 21 is provided being opened to the circular recessed part 20 from the base end face of the thread chaser. The thread chaser is held to the spindle of an NC machine tool enabling the simultaneous three-axis control of a holding part 2, and helically fed to advance one pitch every one revolution while being driven to autorotate and to revolve so as to form a prepared hole by the hole cutting edge 16 and to form a threaded hole by the thread cutting edge.  Chips are eliminated by jetting compressed air, a coolant, and the like into the circular recessed part 20 through the passage 21.
Patent JP-2000138227-A (JP)
Title: Method for manufacturing semiconductor device
Inventor: HONGO SADAHITO
IPC: H01L29/737
Filed: 1998-10-30
Abstract: PROBLEM TO BE SOLVED: To enable to realize simultaneously a lowered parasitic capacitance and leakage current among electrodes by forming a dielectric film to be a partial substrate of a base electrode in a manner in which selectively coating from an end face is made to an outside of a base-mesa. SOLUTION: A pattern for forming a base region is formed on a surface deposited by SiO2 film 80 with a photoresist 81, the SiO2 film 80 is etched with an RIE system, and a base region is formed with a part of a base layer 64, and a collector layer 63 etched. After the SiO2 film 80 is side etched, a SiO film 71 is vapor deposited from an oblique direction of max. 10 degrees from a normal line. The end of the base mesa and the end of the SiO film 71 are deposited in one point. A base electrode pattern is formed by a photoresist 82, the SiO2 film 80 is etched, and a base electrode 68 is formed with an electrode metal deposited and lifted off. The electrode can be formed on a dielectric film without itself being made to contact an ion implantation region.
Patent JP-H03171679-A (JP)
Title: Semiconductor light emitting device
Inventor: SUGAWARA HIDETO
IPC: H01L33/30
Filed: 1989-11-29
Abstract: PURPOSE:To improve a light emitting section in current distribution so as to improve a semiconductor light emitting device in light inducing efficiency and luminance by a method wherein a second conductivity type GaAlAs layer is provided onto an InGaAlP layer of a light emitting section, where the GaAlAs layer is larger than the InGaAlP layer in both thickness and band gap. CONSTITUTION:An N<-> In0.5(Ga1-xAlx)0.5P clad layer 12, an In0.5(Ga1-yAly)0.5P active layer 13, a P<-> In0.5(Ga1-zAlz)0.5P clad layer 14, a P<-> Ga1-pAlpAs layer 15, and a P<-> GaAs contact layer 16 are successively formed on the primary face of a substrate 11, and electrodes 17 and 18 are provided. The P<-> Ga1-pAlpAs layer 15 is formed much thickness than the P<-> In0.5(Ga1-zAlz)0.5P clad layer 14. The structural difference between a light emitter device of this design and a conventional one is that the P<-> Ga1-pAlpAs layer 15 much thicker than the P<-> In0.5(Ga1-zAlz)0.5P clad layer 14 is formed thereon. A current injected through an electrode is spread by a P<-> GaAlAs layer to flow through a wide area excluding a region just under the electrode so as to expand a light emitting region, so that a semiconductor light emitting device can be improved in light inducing efficiency.
Patent JP-2001125762-A (JP)
Title: Print system
Inventor: SUZUKI YUKIHIKO
IPC: B41J29/38
Filed: 1999-10-29
Abstract: PROBLEM TO BE SOLVED: To efficiently utilize shared resources by improving a probability to normally complete printing and by suitably using a low-speed printer. SOLUTION: A print client device 12 having a group managing function for an object printer, operating condition inquiring function, error/fault history inquiring function, priority list display function for a recommended printer, parallel print processing function, print performance inquiring function, use history information managing function, combination calculating function for printers to be used, print completion time designating function, print data preparing function and print data transfer function and printers A14, B16 and C18 having a printer operating condition inquiring function, error/fault history managing function, error/fault history inquiry responding function, printer information managing function, print performance inquiry responding function for printer, print data receiving function and print data storage function are all connected through a network 10.
Patent JP-S63161378-A (JP)
Inventor: SUGA CHOICHI
IPC: G01M99/00
Filed: 1986-12-24
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H07164082-A (JP)
Title: Work transfer device in press machine
Inventor: SHINKAWA KUNIO
IPC: B21D43/02
Filed: 1993-12-10
Abstract: PURPOSE:To produce a upper die in compact and at low cost by making a holding fitting descend/retreat to the position not interfere with a lower die and at the approximate same height as the lower die at press bottom dead center. CONSTITUTION:Plural lower dies 2a-2b are mounted on a bolster 1a of a press machine main body 1 through a die set 1b, plural works W is simultaneously subjected to press working. The work placed on lower dies 2a-2b is clamped/ released by a holding fitting 9 (suction fitting). The holding fitting 9 is approached/transferred to the prescribed upper face of lower die by a transfer mechanism consisting of a feed bar 3, load 4, etc. The transfer mechanism is driven by a drive mechanism consisting of a worm gear reducer, large pulley 17a, etc. The transfer mechanism is constituted so that at the press lower dead point, the holding fitting 9 is descended/ retreated to the position not to interfere the lower die 2 and at the approximate same height as the lower die 2. By this method, high speed operation of a press machine becomes possible, further improving productivity.
Patent JP-H01150949-A (JP)
Title: Memory access system
Inventor: NOMURA KEIICHI
IPC: G06F12/00
Filed: 1987-12-08
Abstract: PURPOSE:To cause an access to be suitable especially for accessing a continuous address at a high speed by executing a next cycle to a dual port RAM as a data transferring cycle when an I/O command is received and inputting the following memory cycle as a clock to the dual port RAM. CONSTITUTION:For the data transferring cycle, since the timing of a data output enable signal (DT/OE) is different from a normal read/write cycle, it is informed by a control part 1 I/O command, etc., in advance that the next memory cycle is the data transferring cycle. In the control part 1, the next memory command to receive the I/O command is executed to a dual port as the data transferring cycle. The following memory cycle is inputted to the dual port RAM as the clock and simultaneously, by causing a buffer to be enable, serial port data are outputted to a system bus. Thus, an access time is shortened and the high speed access can be executed.
Patent JP-H02156253-A (JP)
Title: Electrophotographic dry toner
Inventor: FUSHIMI HIROYUKI
IPC: G03G9/087
Filed: 1988-12-08
Abstract: PURPOSE:To enhance color reproducibility by mixing a specified amount of polyester resin or styrene-acrylic copolymer with resin. CONSTITUTION:A binder resin is a mixture of the modified epoxy resin P obtained by esterifying the secondary hydroxyl groups by one of monocarboxylic acids, their ester derivatives, and lactones, and the polyester resin Q of a bisphenol type diol and a polycarboxylic acid or the styrene-acrylic copolymer R, in a weight ratio P/Q or P/R of (95-60) : (5-40), thus permitting color reproducibility to be enhanced.
Patent JP-2000135203-A (JP)
Title: Intracardiac electrical phenomenon diagnostic instrument
Inventor: OYU SHIGEHARU
IPC: G06F17/00
Filed: 1998-10-30
Abstract: PROBLEM TO BE SOLVED: To prevent a misdiagnosis by a physician by estimating a solution of an intracardiac electrical phenomenon based on an electrocardiogram, calculating an evaluation value of the estimated solution, comparing the evaluation value with a prescribed threshold value, deciding whether the solution is reliable or not and displaying the solution according to the decision result. SOLUTION: A magnetocardiography of a subject is measured (S1). From distribution and time waveform on the breast surface in measured magnetic field, excitation time distribution and action potential amplitude distribution within a heart are estimated (S2). An evaluation value (f) for reflecting whether estimated distributions are reliable as a solution of an electrical phenomenon within the heart or not is calculated (S5) and the evaluation value (f) is compared with a preliminarily set threshold value (S6). When the evaluation value (f) is equal to the threshold value and below, the value is decided as an estimation result defective (S6), an error display to the effect that the solution is decided to be non-reliable is performed (S9) and only a reliable estimation result is displayed to a user such as a physician.  As a result, the estimated solution is not displayed without discrimination and an erroneous diagnosis by the physician can be prevented.
Patent JP-H04184168-A (JP)
Title: Classification of leucocyte by flow cytometry
Inventor: MAEKAWA YASUNORI
IPC: G01N33/48
Filed: 1990-11-16
Abstract: PURPOSE:To correctly count the number of leucocytes by using the first liquid which is a fluorescent dye solution in low acidic state and the second liquid as the liquid for varying the osmotic pressure and acidity, as reagent, when the blood corpuscles which are fluorescent dye-treated are optically measured and leucocytes are separated, by using the flow cytometry. CONSTITUTION:A liquid added with a dye which characteristically fluorescent-dyeing the nucleus of a leucocyte cell which is damaged is used as the first liquid between the first liquid and the second liquid which are used as reagent, and measurement is carried out. Then, analysis is carried out in relation to the obtained two kinds of two dimensional distribution, and the number of leucocyte cells which are distributed at the positions different from the ordinary state because of the damage of the cell membrane is obtained, and the result of the classification of leucocytes is calculated. Concretely, the first liquid is added with the third dye such as provitycom iodide, and analysis is carried out in relation to both the two dimensional distributions between the fluorescent light intensity of the red and green colors and the side scattered light, and the number of leucocytes which is degenerated after the lapse of time after taking in blood and distributed at the position different from the ordinary case is obtained.
Patent JP-H07270367-A (JP)
Title: Absolute humidity sensor
Inventor: TSUCHIDA ATSUKO
IPC: G01N27/12
Filed: 1994-12-14
Abstract: PURPOSE:To provide an absolute humidity sensor which does not utilize a heat radiation constant of a thermistor. CONSTITUTION:In a humidity sensor element 1, an impedance Zs exponentially changes to a relative humidity. A z-f conversion circuit 2 generates a pulse signal S1 corresponding to the impedance Zs. In a time constant-controlling/ differential circuit 3, an impedance Zt of a voltage-controlling variable impedance element 32 is changed exponentially by a control voltage Vc, and a differential signal S2 of the pulse signal S1 is output. A wave-shaping circuit 4 outputs a string of pulse signals S3 which are binary differential signals S2. A first integrating circuit 51 of an integrating circuit 5 integrates the pulse signal string S3 to obtain the control voltage Vc. On the other hand, a second integrating circuit integrates the pulse signal string S3 to obtain an output voltage Vr of a relative humidity signal S4. At least one of the integrating circuits follows a temperature rise to control the control voltage Vc or output voltage Vr. An absolute humidity signal S5 is obtained in this manner.