baber/WOPTO huggingface dataset:
Patent TW-456086-B (TW)
Title: Method for manufacturing cable positioning-stand
Inventor: CHEN YI-REN
IPC: H02G3/02
Filed: 2000-01-29
Granted: 2001-09-21
Abstract: The present invention relates to a kind of method for manufacturing cable positioning-stand. In the first step of the process, the expanded-form mold cavity is installed in a mold such that plastic material can be shaped to an expanded type of original material component through the mold cavity. In the second step, a punching-hole process is performed onto the expanded type of original material component to form the produced material component. In the third step, the whole produced material component is placed into a continuous mold such that the continuous mold can heat the produced material component, which is gradually bent to form the U-shaped cable positioning stand. Therefore, the present invention can use the expanded original material component formed by the first step to make the original material component capable of being placed directly on the bottom of the die to conduct the punching-hole process. And, the grooves for clamping wires can be punched and manufactured on both left and right side plates simultaneously. In addition, a lockhole is shaped and formed on the bottom plate. Thus, the present invention is able to effectively decrease the manufacturing process such that the effectiveness of timesaving, laborsaving and raising production capability can be obtained.
Patent TW-470810-B (TW)
Title: Separator structure of chain case
Inventor: NAKAMURA KENSUKE
IPC: F01L1/02
Filed: 2000-02-22
Granted: 2002-01-01
Abstract: The interior of a chain case 23 accommodating therein a chain-sprocket mechanism (a sprocket 12 and a silent chain 14) provided for rotating a crankshaft 11 and camshafts 5 in an interlocking fashion and a tensioner shoe 18 for applying a predetermined tension to a slack side of a chain or a guide shoe 19 for preventing the run-out of the chain on a stretched side thereof is partitioned by providing a rib 27, 28 so as to protrude from at least either of an end face of an engine E and an inner surface of a chain cover 22 joined to the end face with distal end edges of the ribs being directed toward sides 18a, 18b of the tensioner shoe or the guide shoe that are perpendicular to the crankshaft. According to this construction, since the rib provided so as to protrude from the cylinder block or the chain cover cooperates with the tensioner shoe or the guide shoe so as to form a separator, an oil passage having a sufficient cross-sectional area can be defined without control from the chain line and necessity of enlargement of the engine.
Patent TW-464940-B (TW)
Title: Method and apparatus for process control of semiconductor device fabrication line
Inventor: SADA TOSHIHIRO
IPC: G05B19/418
Filed: 2000-03-01
Granted: 2001-11-21
Abstract: A lot-base management host computer performs management of wafers with a lot as a unit by managing a process condition for each lot, a correspondence between a carrier ID and a lot ID, and a correspondence between a slot ID and a wafer ID in each lot. A wafer-base management host computer performs management for each wafer in a lot by managing a process condition corresponding to a wafer number in a lot. Further, a converted condition instructing section transmits data acquired from the lot-base management host computer and the wafer-base management host computer to a semiconductor fabrication apparatus. The wafer-base management host computer stores a process condition for each level and a machine number of a semiconductor fabrication apparatus in use in the form of a matrix as an experimental level master and issues a process condition as instructions to the semiconductor fabrication apparatus through the converted condition instructing section according to the experimental level master.
Patent TW-510023-B (TW)
Title: Deep-sub-micron process for producing complementary metal-oxide-semiconductor having ultra-shallow junction
Inventor: SHIAN LI-REN
IPC: H01L21/8238
Filed: 2000-03-13
Granted: 2002-11-11
Abstract: deep-sub-micron process for producing a complementary metal-oxide-semiconductor (CMOS) having an ultra-shallow junction comprises: providing a semiconductor substrate having an N-well region, a P-well region and a shallow trench isolation (STI) region thereon, in which a polysilicon gate is separately formed on the N-well region and the P-well region; using a furnace or a rapid thermal oxidation (RTO) to form an oxynitride (e.g. NO, N2O) layer on the surface of the structure; covering the P-well region with a photoresist layer; performing a boron difluoride or boron ion implantation and doping boron ions in the oxynitride (e.g. NO, N2O) in the N-well region; after removing the photoresist layer, covering another photoresist layer on the N-well region; performing an arsenic or phosphorus ion implantation and doping arsenic or phosphorus ions in the oxynitride (e.g. NO, N2O) in the P-well region; after removing the photoresist layer, forming a spacer on the sidewall of the gate; performing a deep implantation of source/drain; and performing a rapid thermal process (RTP) to form an ultra-shallow junction and a source/drain region in the CMOS device.
Patent TW-I310688-B (TW)
Title: Dry powder compositions having improved dispersivity
Inventor: LECHUGA-BALLESTEROS DAVID
IPC: A61P3/02
Filed: 2000-04-12
Granted: 2009-06-11
Abstract: The present invention provides a highly dispersible formulation comprising an active agent and a tripeptide comprising at least two leucyl residues. The composition of the invention possesses superior aerosol properties and is thus preferred for aerosolized administration to the lung. Also provided is a method for increasing the aerosol performance of an active-agent containing formulation for administration to the lung, which comprises the incorporation of a di- or tripeptide comprising at least two leucines into a formulation comprising an active agent.
Patent TW-491957-B (TW)
Title: Mounting structure of multiple chips, electro-optic device, and electronic equipment
Inventor: UCHIYAMA KENJI
IPC: H01L23/538
Filed: 2000-05-31
Granted: 2002-06-21
Abstract: The present invention relates to a mounting structure of multiple chips and aims to efficiently mount plural IC chips on a substrate with better productivity, and moreover, less manufacturing devices. To achieve the purposes, plural IC chips (12a, 12b) having respective bumps (14a, 14b) are mounted on a substrate (11) provided with substrate side terminals (16a, 16b) so that the substrate side terminals (16a, 16b) are brought into conductive contact with the bumps (14a, 14b). The bumps (14a, 14b) arranged for the plural chips (12a, 12b) form terminal array pairs opposing to each other. Since the plural IC chips (12a, 12b) are mounted on the substrate (11) so that the center lines (L1, L2) between the terminal array pairs formed respectively coincide with each other, the position of the press-contacting head does not need to be changed, and also one sheet of ACF 19 can be used commonly.
Patent TW-465091-B (TW)
Title: Deep trench DRAM with SOI and STI
Inventor: SHEN WEI-LIN
IPC: H01L27/108
Filed: 2000-06-07
Granted: 2001-11-21
Abstract: A method of forming dynamic random access memory (DRAM) comprising a deep trench capacitor with two electrodes and a node dielectric. The deep trench capacitor is formed by etching a deep trench, making a node dielectric on the surface of the trench, and filling the trench with poly-Si. The method also employs silicon on insulator (SOI) technology to form a single crystal Si layer on an insulator above the trench. The SOI is then contacted with the poly-Si electrode of the trench capacitor, and a transistor is fabricated above the trench capacitor. The method enables fabrication of a transistor above the trench capacitor and thereby frees space on the DRAM chip to allow for a greater density of devices on the DRAM chip.
Patent TW-449830-B (TW)
Title: Method for cleaning semiconductor wafer
Inventor: WU CHIH-NING
IPC: H01L21/321
Filed: 2000-06-14
Granted: 2001-08-11
Abstract: The present invention provides a method for effectively removing the photoresist layer and polymer resided on the surface of the semiconductor wafer. The semiconductor wafer surface has a plurality of gate structures defined by using the photoresist layer. The method of the present invention comprises: performing a plasma ashing process on the surface of the semiconductor wafer; using O2-CF4 plasma to remove most of the photoresist layer; then performing a wet cleaning process and a oxygen plasma cleaning process to completely remove the polymer residue and the photoresist layer on the surface of the semiconductor. The wet cleaning process comprises the steps of: (1) using amine solvent containing NH2OH to clean the surface of the semiconductor wafer; (2) using DI water dissolved with O3 to clean the surface of the semiconductor wafer; (3) using cleaning solvent containing NH4F to clean the surface of the semiconductor wafer.
Patent TW-I244897-B (TW)
Title: Compositions containing fat soluble substances in a carbohydrate matrix
Inventor: CHEN CHYI-CHENG
IPC: A23L33/15
Filed: 2000-07-03
Granted: 2005-12-11
Abstract: The invention relates to compositions containing a fat soluble substance in a glassy carbohydrate matrix comprising maltose or a mixture of low-molecular weight carbohydrates, and, optionally, a high-molecular weight carbohydrate. The compositions can be used for multivitamin tablets, hard gelatin capsules, dry food and feed compositions and for enriching sugar.
Patent TW-445154-B (TW)
Title: Foamed fragrancing and deodorizing gel
Inventor: KAWAMOTO RYUJI
IPC: A61L9/16
Filed: 2000-09-20
Granted: 2001-07-11
Abstract: Disclosed herein are foamed gel air-treating compositions that have at least 50% water, between 1 and 15 percent soap surfactant, a volatile fragrance, at least 0.1 percent carbon, and a foam stabilizer. These compositions can fragrance a room as well as adsorb malodors in the room. Methods for forming these foamed gels are also disclosed.
Patent TW-I279233-B (TW)
Title: Treatment of patients having non-Hodgkins lymphoma with bone marrow involvement with anti-CD20 antibodies
Inventor: RASTETTER WILLIAM H
IPC: A61K39/395
Filed: 2000-08-10
Granted: 2007-04-21
Abstract: This invention relates to methods of reducing bone marrow involvement in B cell lymphoma patients prior to radioimmunotherapy by administering monoclonal antibodies which target cancerous B cells.
Patent TW-451056-B (TW)
Title: Mechanism and method for controlling the focal point position of UV light and apparatus and method for inspection
Inventor: NOGAMI TOMOHIKO
IPC: G01B11/00
Filed: 2000-09-13
Granted: 2001-08-21
Abstract: A method and apparatus for controlling the focal position of the UV light for auto-focussing the converged UV light, and a method and apparatus and for inspecting a device, such as a semiconductor wafer or liquid crystal using the converged UV light, in which the UV light converged is to be auto-focussed accurately and speedily. The method includes an inspection stage 11 for supporting a semiconductor wafer, an objective lens for UV light 40 or converging a UV laser light for illuminating the laser light converged to the semiconductor wafer, a distance sensor 41 secured to this objective lens for UV light 40 to detect the distance to the semiconductor wafer and a controller for causing movement of the inspection stage 11 in a perpendicular direction. The controller causes the distance between the objective lens for UV light 40 and the semiconductor wafer to coincide with the target distance T based on the distance as detected by the distance sensor 41.
Patent TW-591086-B (TW)
Title: Ink composition
Inventor: CHANG CHI-JUNG
IPC: C09D11/00
Filed: 2001-03-02
Granted: 2004-06-11
Abstract: Specified surface tension modifiers are added to the ink composition used in an ink jet printer to adjust the surface tension of the ink composition. As the modifiers dissolve in continuous phase medium, it is easy to obtain ink composition having adequate high surface tension by adjusting the amount of the modifiers. Adding 1% of the modifiers can make the reduced amount of the low frequency surface tension and the high frequency surface tension within 25%, and the printed ink spot will be smaller. Specified surface tension modifiers select from nitrogen or oxygen heterocyclic compounds. However, the printed ink spot can become larger, if desired, by adding suitable surfactants to the ink composition, and thus the processing window of the ink composition can be increased.
Patent TW-509938-B (TW)
Title: Production method for optical disc
Inventor: IIDA TETSUYA
IPC: C25D1/00
Filed: 2001-05-11
Granted: 2002-11-11
Abstract: The present invention is to provide a production method for an optical disc, capable of obtaining a good S/N ratio without deterioration of the stamper quality due to reaction with an electron attractive group contained in a resist material. The processes of forming a resist film on a substrate, patterning the resist film on the substrate by an electron beam cutting, forming a nickel alloy thin film on the patterned resist film, forming a nickel layer on the nickel alloy thin film by the electrocasting, and injection molding of a resin, using the nickel layer peeled off from the nickel alloy thin film as a stamper, are provided. The nickel alloy thin film has a composition containing Ni element as the main component as well as Ru element by less than 25% by weight.
Patent TW-574055-B (TW)
Title: Non-evaporable getter alloys
Inventor: TOIA LUCA
IPC: C22C16/00
Filed: 2001-05-15
Granted: 2004-02-01
Abstract: Non-evaporable getter alloys containing zirconium, vanadium, iron, manganese and one or more elements selected among yttrium, lanthanum and Rare Earths are described, having improved features of gas sorption, particularly of nitrogen, with respect to the known getter alloys.
Patent TW-540100-B (TW)
Title: Method for the production of an epitaxially grown semiconductor wafer
Inventor: SCHMOLKE RUEDIGER DR
IPC: C30B25/02
Filed: 2001-05-24
Granted: 2003-07-01
Abstract: The invention relates to a method for the production of a semiconductor wafer having a front and a back and an epitaxial layer of semiconductor material deposited on the front, which comprises the following process steps: (a) preparing a substrate wafer having a polished front and a specific thickness; (b) pretreating the front of the substrate wafer in the presence of HCl gas and silane source at a temperature of from 950 to 1250 degrees Celsius in an epitaxy reactor, the thickness of the substrate wafer remaining substantially unchanged; and (c) depositing the epitaxial layer on the front of the pretreated substrate wafer.
Patent TW-522748-B (TW)
Title: Structure of earphone with a plurality of speakers
Inventor: SHEN YAU-SHENG
IPC: H04R1/10
Filed: 2001-05-29
Granted: 2003-03-01
Abstract: A structure of earphone with a plurality of speakers comprises at least three speakers mounted on a set of signal wires, in which two of the speakers can be separately mounted on the locations of ear and the other speaker is placed at a location near the ears (e.g. neck, rear skull) so that the sound waves generated by the speakers can be transmitted to the ears. The set of signal wires is installed with wires separately connected to the speakers, and a power source, so that when the earphone is connected to an electronic device, the wires can transmit signals to various circuits on the speakers to perform a signal processing. Furthermore, the power source wires transmit a working power required by the circuits, thereby forming a surrounding sound field through the speakers.
Patent TW-483243-B (TW)
Title: High speed low power 4-2 compressor
Inventor: RHEE YOUNG-CHUL
IPC: H03K19/00
Filed: 2001-05-31
Granted: 2002-04-11
Abstract: A high speed low powered 4-2 compressor according to the present invention performs an XOR/XNOR operation of input data by using a single input type NAND/NOR logic circuit and a dual input type NAND/NOR logic circuit. Thus, delays to generate complementary signals are not occurred. In addition, the 4-2 compressor uses a single railed multiplexer instead of a dual railed multiplexer, so that gate drive nodes and internal load capacitance are reduced. As a result, a chip area and a power consumption of the 4-2 compressor is reduced.
Patent TW-546181-B (TW)
Title: A simple measuring method for volumetric error detection of numerical control machine tool
Inventor: JIUE WEN-YU
IPC: B23Q17/20
Filed: 2001-07-02
Granted: 2003-08-11
Abstract: This invention is adapted to the detection of error in a platform, such as a machine tool, of which a primary function is to employ two-dimensional optical gauges mechanism assembly in the measurement of error of a numerical control machine tool, in order to realize the detection of volumetric error of a platform. In measuring the error of the numerical control machine tool, the basic two-dimensional optical gauge is used to measure two-dimensional movements for detecting static and kinetic errors in radial directions. One or two optical gauge mechanism assemblies are used in combination and by means of mounting in different methods and movement directions, twenty-one static errors of the machine tool are detected, which are jointly used to detect the volumetric error. Hence, this system is a complete error detection system for machine tools, which provides high precision, reliability and a practical and effective measuring method.
Patent TW-518899-B (TW)
Title: Determination method of enhanced mobile cell coverage and system implementing the method
Inventor: SHIU CHING-SHIANG
IPC: H04W16/18
Filed: 2001-07-23
Granted: 2003-01-21
Abstract: A method and system are used to position the enhanced cell coverage of a mobile station in a cellular mobile communication system. The entire scope of the mobile station system is divided into various pixels and then the pixel mapping relationship including all pixels is built up. The antenna with the shortest distance to all pixels is set up as the server antenna and the antenna with the shortest distance to the pixel is located. Then the pixel is designated to be the cell of the antenna, the distance between both is the shortest one and all pixels pertaining to the cell constructs the pixel coverage of the cell. Then construct the diagonal area that enhances the pixel coverage and determine the minimum coverage of the rectangular area as the enhanced cell coverage of the antenna. Therefore, the mobile operator can provide necessary information to the mobile station inside the coverage.
Patent TW-531846-B (TW)
Title: Memory element and method for fabricating a memory element
Inventor: HOFMANN FRANZ DR
IPC: H01L27/10
Filed: 2001-08-08
Granted: 2003-05-11
Abstract: A memory element comprising organic material has two metallization layers which are arranged above one another and have first lines and second lines, which are arranged so that cross one another. In each case one trench, which partially overlaps the first line and completely overlaps the second line, is formed at the crossing points between the first line and the second line. The trenches are filled with a filler material, the electrical conductivity of which can be changed by an applied electric voltage.
Patent TW-498497-B (TW)
Title: Method for producing chip with high carrier mobility
Inventor: SHIH WONG-CHENG
IPC: H01L21/8232
Filed: 2001-08-08
Granted: 2002-08-11
Abstract: The present invention provides a method for producing a chip with a high carrier mobility, which comprises covering a first silicon layer of a silicon on insulator wafer with an epitaxial first Si-Ge layer, where the lattice of the first Si-Ge layer is at a strained state; converting the strained first Si-Ge layer to a relaxed state; applying an epitaxial second Si-Ge layer on the relaxed first Si-Ge layer upper epitaxial layer, where the lattice of the second Si-Ge layer is at a relaxed state; applying an epitaxial second silicon layer on the second Si-Ge layer, where the lattice of the second silicon layer is at a strained state.
Patent TW-538574-B (TW)
Title: Degenerative load temperature correction for charge pumps
Inventor: ELMHURST DANIEL R
IPC: H02M3/07
Filed: 2001-09-27
Granted: 2003-06-21
Abstract: A regulator circuit to control the output of a charge pump circuit, to reduce the effects of operating temperature and process variations on available output current from the charge pump circuit. A predetermined fraction of the output voltage of the charge pump circuit is fed back to the input of a differential amplifier, which compares it to a reference voltage. The output of the differential amplifier feeds a voltage controlled oscillator (VCO), which in turn generates a clock signal that is used to drive the charge pump circuit. The normal temperature characteristics of this configuration cause the output of the charge pump circuit to degrade with temperature changes. The regulator circuit can be placed between the differential amplifier and the VCO to adjust the voltage driving the VCO. In one embodiment, a biasing resistor with a negative temperature coefficient can be used in the regulator circuit to offset the normal effects of temperature on the circuit. In another embodiment, multiple such resistors can be selectable with programmable logic, so that process variations during manufacture can be compensated for by selecting the resistor value that most closely provides optimal biasing.
Patent TW-I241162-B (TW)
Title: Aqueous suspension pesticide preparation
Inventor: SATO YOSHIHIRO
IPC: A01N37/52
Filed: 2001-10-24
Granted: 2005-10-11
Abstract: An aqueous suspension pesticide preparation of 1,1'-iminiodi(octamethylene)diguanidinium=tris(alkyl-benzenesulfonate), which not only has excellent storage stability under storage conditions where the temperature changes drastically in a long cycle through the seasons, but also excellent storage stability during storage in winter when the day and night short cycle temperatures fluctuate between 5 to -10 DEG C, further includes (b) a compound represented by the general formula (1): R-O-(CH2CH2O)n-H, (wherein R represents a C8-C18 alkyl group and n represents an integer of 0 to 4); (c) a phospholipid; (d) a surfactant having a C6-C20 alkyl group; and (e) water; and the phospholipid (c) is a hydrogenated phospholipid having an iodine value of 20 or less.
Patent TW-521443-B (TW)
Title: Processing method of LED and the structure thereof
Inventor: WANG YU-WEI
IPC: H01L33/00
Filed: 2001-10-29
Granted: 2003-02-21
Abstract: The present invention discloses a processing method of LED and the structure thereof. Firstly, form a printed circuit board which has plural LED cell blocks, the front side of each cell block has cell circuit comprising die-bonding region and wire-bonding region, the wire-bonding region is connected to two copper leads for transmitting signals, the copper lead extends from the front side to the copper in the conductive region on the back side. A damascene hole passing through both front and back side is disposed at one of both ends of the two diagonal lines of the cell block respectively. Form an upper mold of panel having die hole and damascene leads on the printed circuit board using plastic mold, so that the two different materials of plastic and printed circuit board are tightly bonded. The die hole can expose the die-bonding region and wire-bonding region. The die is implanted onto the die-bonding region through the die hole and the wire-bonding/packaging/baking operation is proceeded. Proceed dicing to the printed circuit board having plural cell blocks to make independent LEDs individually.