Patent GB-887842-A (GB)
Title: Device for simultaneously comparing an intelligence word with a plurality of intelligence words stored in an intelligence memory
IPC: G06F7/02
Filed: 1959-11-19
Abstract: 887,842. Circuits using bi-stable magnetic elements.. INTERNATIONAL BUSINESS MACHINES CORPORATION. Nov. 19, 1959 [Nov. 19, 1958], No. 39280/59. Class 40 (9). [Also in Group XIX] In apparatus for comparing a given data word simultaneously with a plurality of data words stored in a magnetic core matrix, a circuit is provided for each stored word, which circuit is set to a state dependent on whether or not the associated stored word is equal to the given word. As described, a given four-digit binary data word is stored in a " comparison register " on bi-stable triggers 13, Fig. 1, and five words with which it is to be compared are stored in rows A-E of a magnetic core matrix store. Circuits 12, AX-EX, are all set initially to a first state. A line 14 is then pulsed to cause an output on such of the lines 10 as are connected to triggers 13 storing a " 0 " in the given word. These outputs are arranged to switch any cores registering a " 1 " in the associated matrix column to produce outputs on lines A-E from cores storing a " 1," the outputs on lines A-E, where they occur, setting the circuits AX-EX to a second state. A line 15 is now pulsed to cause an output on such of the lines 11 as are connected to triggers 13 storing a " 1 " in the given word. These outputs are arranged to switch any cores registering a " 0 " in the associated matrix column, the resulting outputs on lines A-E where they occur, setting such of the circuits AX-EX as have not already been set to the second state, to that state. Any circuits AX-EX which remain in the initial first state, correspond to rows storing a data word identical to the given data word. Circuits AX-EX, Fig. 5.-Each circuit, such as BX, which is shown, comprises four magnetic cores 21-24, initially in the " 0 " state. A positive pulse on the input line B, resulting from a " 0 " mismatch, i.e. " 1 " in a position in which the given data word has a " 0," switches the core 21 to its " 1 " state. A " 1 " mismatch, resulting in a negative pulse on the line B, switches the core 22 to its " 1 " state, the core 21 being biased to the " 1 " state at this time. Switching of either of the cores 21, 22 to the " 1 " state causes the core 24 to switch to its " 1 " state. The cores 21, 22 are now reset by windings N3. To sense the circuit a pulse is applied over a winding N4 to the core 24 to switch it to its " 1 " state if it has not been switched, the resulting output switching the core 23 to produce an output from the winding N6. This output is produced only when no input has been received over the line B, the core 24 being switched to " 1 " as the result of an input on the line B being the second state of the circuit. In an alternative embodiment, Fig. 7, employing a non-destructive read-out system, using transfluxors, each matrix position has a core i to store the data at that position and an associated core p into which is entered the digit of the given data word. The cores i, p form an " exclusive or " circuit, and a pulse from a generator 31 over lines 33 produces row output pulses on lines F-J only if two associated cores i, p are storing different binary digits. Circuits FX-JX provided for the row lines are arranged on being sensed to produce an output only if no input has been received, and they may be similar to the circuit of Fig. 5, with the core 22 omitted.