Patent GB-1382324-A (GB)
Title: Digital voice interpolation system for pcm systems
IPC: H04J3/17
Filed: 1972-03-22
Abstract: 1382324 Multiplex pulse code signalling SOC ITALIANA TELECOMUNICAZIONI SIEMENS SpA 22 March 1972 [15 April 1971] 13368/72 Heading H4 In a digital speech interpolation system, at the transmitting station an interpolation unit includes a digital threshold detector which detects codes corresponding to sampled signals which have a higher level than a fixed value to select the channels carrying speech signals. General description.-N PCM transmission units Tr1 to TrN, Fig. 1, each have thirty input lines C1 to C30 and supply N time division multiplexed signals at the same transmission speed to an interpolation unit DSI (t) controlled by a timer CK1. The interpolation unit receives a signal defining the number of time slots available, the length of the signal burst being varied to suit traffic requirements. The output SI consists of the codewords transmitted in a frame from the lines found active by the interpolation unit and destination information for the codewords. In the transmitter-receiver unit RT preamble information is added and the resulting signal Bl is transmitted. A receiving unit DSI (r) processes the received signal SI (r) after it has passed through a preamble detector and on the basis of the destination information Idd distributes the voice signals to the appropriate lines C1 to C3 of the receiving units Ric1 to RicN. In Fig. 2, pulses F1, F2, FK locate the frames of stations 1, 2, K respectively each of which has a duration t m  and contains signals PCM 1  to PCM N  respectively in time slots #1 to #30 and which are combined in a frame as digital signals B1, B2, each of which consists of a preamble of n 0  bits for ensuring synchronism, a word m which is part of the allocation message and is transmitted over several frames and a series of words d of speech information. Interpolation unit.-The time division multiplexed PCM outputs of the N transmission units are examined by a corresponding digital threshold circuit S1 to Sn which detects those coded signals corresponding to a speech signal higher than a fixed value. The outputs of these circuits are sampled by gates A 1 <SP>1</SP> to A 30 <SP>1</SP> etc. under the control of pulses #1 to #30 produced by scanner SC, the outputs of the gates being supplied to memories Me<SP>1</SP>, etc. via integrating circuits CT<SP>1</SP> 1  etc. providing a delay. The allocation message showing which lines are active, is generated at FMA and transmitted to a memory MO having 30N elements, which under the control of clock T 1  indicates to the interpolation network RI the lines which are to be connected. Network RI controls registers R1 to RN to receive the appropriate coded speech signals via delay D1 etc. at the transmission speed of units Tr1 etc. and to read them out by high speed pulses CK 1  etc. to the output circuit C u . At the end of each frame the circuits are reset by pulses P 1 <SP>1</SP> etc. generated at PR under the control of clock T 1  and a comparator Cp which compares the number of active time slots with the number of time slots No allotted to the station. When these two numbers become equal the memories Me 1 <SP>1</SP> etc. are reset via circuit LR.