Patent GB-1291178-A (GB)
Title: Improvements in or relating to time division switching networks
Inventor: MARCUS MICHAEL JAY
IPC: H04Q11/04
Filed: 1970-03-24
Abstract: 1291178 Time-division-multiplex switching WESTERN ELECTRIC CO Inc 24 March 1970 [26 March 1969] 14153/70 Heading H4K  A highway-to-highway switching matrix is provided with channel store and forward facilities at each cross-point. Data in time slots of an incoming highway is distributed to the crosspoint stores associated with the outgoing highways required by each time slot. Data from all time slots rented to it in one multiplex cycle is accumulated by a cross-point store and in the next multiplex cycle the accumulated channel data is switched on to the outgoing highway in a group of consecutive time slots but in an order the reverse of that in which the data was received. When one cross-point store has switched its accumulated store of channel data on to the outgoing highway it triggers another store to send its accumulation and so on in a chain of all stores associated with the outgoing highway. Whenever a new channel is connected in this system it is introduced into a cross-point store strictly in order of appearance of the time slot, channels read out after this new channel will consequently be delayed by a time slot compared with the preceding multiplex cycle and the switch controls take account of this shift of time slots in any subsequent switching stages. Cross-point stores.-Fig. 2 shows a 2 x 2 highway switching matrix having incoming highways 201, 202 and outgoing highways 203, 204. Incoming highway 201 is served by channel address store 240 to steer incoming channels to crosspoint 210 or 211. Incoming highway 202 is similarly served by address store 241. As shown at cross-point 211, shift registers 230, 231 operate in alternate multiplex cycles to accumulate data from the incoming highway or to send data from the preceding cycle to the outgoing highway. A bi-stable 234 governs alternation between the registers. Counters 235, 236 record the number of channels switched to the stores from the incoming highway in a multiplex cycle so that when the stores are read out the end of each batch of channels can be determined and the next cross-point store can be signalled to initiate read out to the highway. The address stores 240, 241 accommodate an 8-channel multiplex and comprise stepping registers with a storage section for each channel. In static circumstances the stores, such as 240, recirculate over switch 255 to repetitively switch the same channels in the successive multiplex cycles. A binary 0 or a binary 1 switches the associated' incoming highway to one or other of the crosspoint stores. The pattern circulating in the stores may be closed up by operating switch 251 to contact 253 so as to recirculate the channel switching data one time slot ahead of the high-' way multiplex. The pattern may be opened out by operating switch 255 to contact 258 so as to recirculate over the additional stage 262, the stage 261 being used in this procedure to accept a binary state from contact 257 in order to control the associated highway channel in accordance with instruction over the lead labelled New Address. By these means variation in the time slots for each stream of data, arising from the insertion and withdrawal of other data streams, can be compensated for by the common control. Larger matrices.-A 4 x 4 matrix with 64 channels in each multiplex cycle of the highways requires four controlling address stores, one for each incoming highway, and each address compartment requires a 2-bit code to select one of the four cross-point stores for each channel. The address store for the matrix, therefore, comprises 64 stages and 8 bits per stage. Such a store is conveniently constructed from 8 one bit shift registers. Such matrices may be arranged in switching units in which a first stage of 4 matrices is trunked for full accessibility to a second stage of 4 matrices, a rank of 4 such units being trunked for full accessibility to a second rank of 4 such units. The resulting 4 stage network serves 64 incoming highways and comprises 1024 cross-point stores. A concentrator can be employed on the incoming side and an expander on the outgoing side of the network. As shown in Fig. 11 groups of 50 subscribers whose speech is delta-modulated are multiplexed and pulse coded, if such coding has not been previously effected, at circuits such as 1100. The multiplexor 1100 works into the 64 channel highway 710, 50 channels being provided for speech and the remaining 14 being used for supervision. It is said that between 4 to 9 such highways may be concentrated on to a single 64 channel highway. As shown, 5 groups of 50 subscribers multiplexed on to 5 highways are concentrated on to the highway 721 by means of cross-point stores 1125 to 1129. An additional rank of cross-point stores 1120 to 1124 handles the supervisory channels and routes them to common control 78. Circulating address stores 1110 gate channels of the subscribers' group highways to cross-point stores of the concentrator. As shown in Fig. 12, 64 highways such as 721, on which the traffic from 5 subscriber groups is concentrated, are incoming to the 4-stage switching network 73 and each of the 64 highways outgoing from the network is served by an expander 75. By means of the expander, which comprises a 2 x 5 array of cross-point stores, channels on an outgoing highway, and supervisory channels from the common control, are distributed to 5 subscriber group terminating highways. The subscriber group highway 751 is shown and has a demultiplexing unit 76 which, by means of a circulating store 1224, guides the channels to individual lines in fixed time slots so that variations of time slot used for a connection, in order to accommodate new connections and disconnections, do not appear as noise. Path routing.-Blocking can occur because a highway has no free channels or because a cross-point store on the route has no available storage space. In respect of each cross-point the absence of blocking on either count is indicated by a single bit at the common control. In this manner a pattern of 1024 bits is sufficient to provide a congestion map of the 4-stage network 73 of Fig. 12 and to allow a route to be selected. Given the time slot on a subscriber's group highway it is necessary to determine the time slots on the intermediate highways in consequence of the fact that connection channels emerge from cross-point stores in time slots determined by the number of channels read out from superior cross-point stores and the number of channels, read out from the cross-point store handling the channel in question, and following that channel. A circuit to determine such time slot of emergence from a cross-point store is shown in Fig. 9 where, in respect of an incoming highway channels on which are steered to outgoing highways by stepping register 901, the identity of the wanted outgoing highway is recorded in 903 and the time slot on the incoming highway is recorded in 904. When the time slot occurs, as signalled by comparator 906, the address of the wanted outgoing highway is written in the register 901 from 903 to effect gating of the time slot approximately in subsequent cycles. A counter 911 is given the identity of the outgoing highway from register 903, the incoming highway from 910, and the identity of the time slot on the incoming highway from 904. With this information the counter is made to accumulate the total of communication channel slots put on the outgoing highway by all incoming highways of higher rank, as the corresponding cross-point stores are read out one after the other in chain, and also the number of communication channels to be delivered from the cross-point store (between the incoming highway served by store 901 and the outgoing highway) following the channel slot registered in 904. The resulting count indicates the time slot the communication channel will occupy on the outgoing highway. Transmission of high bit rates.-As adjacent time slots seized for a single communication retain their adjacency across the network higher rates of transmission can be obtained by using such groups, regard being given to possible reversal of bit order if an odd number of stages is employed.