Patent GB-1207625-A (GB)
Title: Traffic control apparatus
IPC: G08G1/08
Filed: 1967-12-11
Abstract: 1,207,625. Traffic control systems; analogueto-digital converters. E. W. BLISS CO. 11 Dec., 1967 [24 March, 1967], No. 56207/67. Headings G4H and G4Q. [Also in Division H3] A traffic control system includes one or more local controllers which are controlled by a signal obtained by combining, for the same direction of flow, signals representing traffic volume and level of traffic occupancy, i.e. the proportion of time that a given point in the roadway is occupied by a vehicle. Preferably a stoppage detector is also included so that if the flow of traffic stops the traffic volume and occupancy level signals are held at their previous values until flow recommences. General description.-Fig. 12 shows the arrangement of detector circuitry and master controller for two adjacent intersections (Fig. 1, not shown). The detectors D1-D5 may be presence detectors (buried loop or overhead ultrasonic) or treadle pads. Detectors D1 and D5 are mounted a distance apart in the same lane and a transfer circuit DT automatically switches to the other detector if one should cease to give a signal during a predetermined period, indicating a fault or a stalled vehicle. The detector output is passed to a unit SM-I where the volume and occupancy level signals are obtained and summed, subject to the operation of the stoppage detector. A similar detector D2 and summing network SM-O provides the same information for traffic flow in the opposite direction, and a high-level selector HLS selects which of the two flow directions is more important to control the cycle length. The resultant is passed to a level selector LS which energizes one of four circuits CGA-CGD in accordance with the amplitude of the signal. These circuits provide signals at fixed frequencies to control the local controllers via line CC. An offset selector OS also receives the processed signals from detectors D1 and D2 and produces either an average offset signal on line O1 or a preferential offset in one direction on line 02 or 03. These are also passed to line CC via a relay circuit SRC. Similar circuitry deals with the signals from detectors D3 and D4 for the two directions in the cross road and split signals are derived in unit SS which passes them to the local controllers via a second relay circuit SRC1, in the same way as the offset signals. The computing circuits for deriving the volume and occupancy level signals may be of the analogue or digital type, but only the former are described. Occupancy level computer (Fig. 4).-As long as a vehicle is within the zone of detector D1 relay coil CR1-C closes contacts CR1-1, thereby cutting off transistor 14 by earthing its base through diode 20. Current then flows through transistor 12 to charge capacitors 28 and 30. When the presence of a vehicle is no longer sensed by detector D1, transistor 14 conducts and discharges the capacitors. The average value of capacitor voltage thus represents the proportion of time that detector D1 is energized. This value is passed through amplifier 36 to the summing network SM. Volume level computer (Fig. 4).-When a vehicle is detected by D1, contacts CR1-1 close and earth the top plate of capacitor 50 through diode 52. When the vehicle leaves the zone of D1, this top plate potential becomes that of B + and a positive pulse is applied from the bottom plate to a NOR gate 58, which is coupled with another NOR gate 56 to form a bi-stable circuit. The NOR gate 58 now gives a "O" output to cut off transistor 78 and allow capacitors 84 and 86 to charge through transistor 72. The change in state of the bi-stable circuit also cuts off transistor 44 through resistor 60, allowing a capacitor 66 to charge and ultimately fire a unijunction transistor 62. When this happens, the NOR gate 56 receives a positive input to change the bi-stable back; this discharges capacitors 84 and 86 through transistor 78, and capacitor 66 through transistor 44. The average value of the voltage on capacitors 84 and 86 thus represents the number of times the unijunction has fired in a given time, and thus the traffic volume. This value is passed through amplifier 92 to the summing network SM. Stoppage detector (Fig. 4).-A differential amplifier 100 compares the output of the summing network SM with a reference level at 102. If the former should exceed this level, the amplifier output falls to zero and cuts off transistor 110, allowing capacitor 128 to charge. In the absence of any further vehicle detection to alter the output of SM, the capacitor voltage will eventually rise sufficiently to allow a unijunction 124 to fire and develop a positive voltage across resistor 126. A bi-stable circuit formed by cross-coupled NOR gates 134 and 136 then changes over and applies positive signals (a) to diode 24 and NOR gate 26 in the Occupancy Level Computer to cut off transistors 12 and 14 and hold the charge on capacitors 28 and 30, and (b) to diode 74 and NOR gate 58 in the Volume Level Computer to cut off transistors 72 and 78 and hold the charge on capacitors 84 and 86. If a vehicle moves out of the zone of detector D1 before the unijunction has fired, capacitor 118 delivers a positive pulse to turn on transistor 110 and discharge capacitor 128. The timing period must now recommence. This circuit is the subject of Specification 1,207,626. Level selector (Fig. 7).-A signal from the summing network SM (modified if desired by the high-level selector to take account of different conditions in the two directions of flow) determines which one of four triacs 188, 204 will conduct to energize the corresponding line CGA-CGD connected to a cycle generator. Normally transistor 196 conducts to energize triac 204. When the level of the input signal exceeds that on the top of potentiometer 174 in the unit 160, a differential amplifier 166 gives a positive output to change the state of a bi-stable circuit formed of cross-coupled NOR gates 178 and 180. This causes a further NOR gate 182 to turn on transistor 184 and energize the triac 188, and at the same time through diode 194 to energize a NOT circuit 192 and turn off transistor 196 and triac 204. When the level of the input signal falls to that on the top of potentiometer 176 (set slightly lower than 174) the differential amplifier 168 gives a positive output to NOR gate 180 and resets the bi-stable circuit. The other circuits 162 and 164 operate similarly at successively higher values of the input signal to turn on the corresponding triacs 188. This circuit is the subject of Specification 1,207,627. Offset selector (Fig. 9, not shown).-This operates in the same way as the level selector but has only two stages, selectively operating one of three triacs. This circuit is the subject of Specification 1,207,628. Detector transfer circuit (Fig. 11).-The two alternative detectors D1 and D5 are connected via relay coils CR1 and CR2 and corresponding contacts CR1-1 and CR1-2 to a switch SW which selects which one will be normally operative (D1 as shown). If the contacts remain closed for a certain time, the stoppage detector of Fig. 4 will operate and provide a positive signal to cut off transistor 306, allowing capacitor 318 to charge. After a further time, the unijunction 314 will fire and change the state of a bi-stable circuit formed by crosscoupled NOR gates 324 and 326. This inhibits NOR gate 330 to break the connection from detector D1 and enables NOR gate 332 to connect detector D5 in circuit. The output is taken through a transistor 334. The bi-stable circuit can be reset by a momentary closure of switch 328.