Patent GB-1177377-A (GB)
Title: Improvements in or relating to Electric Signal Line Monitoring Arrangements
IPC: H04Q3/00
Filed: 1967-03-30
Abstract: 1,177,377. Automatic exchange systems; circuits employing bi-stable magnetic elements. SIEMENS A.G. 30 March, 1967 [31 March, 1966], No. 14526/67. Headings H3B and H4K. Saturable cores, such as Aeo, in a matrix AM each supervise current in an associated line, the current biasing the core into saturation and an interrogating current withdrawing the core from saturation step-by-step or progressively so that the step or point in time at which the core emerges from saturation and starts turning over is a measure of the line current; access to an individual core of the matrix being made by address circuits Asx, Asy which energize selected row and column windings the currents through which are drawn over and in opposition to a common bias winding g so that only the chosen core is subject to a null magnetization due to selection currents and is the only core susceptible to interrogation by means of the common winding ab. It is stated that the arrangement can use ferro-electric elements in place of saturable cores. As shown in Fig. 1 each core Aeo is interrogated by a staircase waveform from generator AG to detect no current, a first current, or a second larger current in the associated line. The generator AG is started by a bi-stable LS in response to start signal st, a counter Z zeroized by LS being pulsed by the leading edges of each step n the waveform. As soon as an output appears on the common winding I the bi-stable LS is reset to cut off generator AG, the counter Z indicating the step that produced turn over of the core and thereby indicating the line current. Where a sawtooth interrogation waveform is employed the counter Z cannot be operated as in Fig. 1 and timing pulses are required to define those portions of the sawtooth corresponding to steps of the staircase waveform. One way of producing the timing pulses to drive counter Z is described with reference to Fig. 7 (not shown),  and comprises three saturable cores biased progressively so that when interrogated by the sawtooth waveform they turn over one after the other at times corresponding to the transition from one step to the next. If these three cores are subjected to the co-ordinate address currents and common bias of the g winding their environment will be the same as the cores Aeo of the matrix and consequently the timing pulses will be produced in a way which automatically compensates for changes of environment. Where the timing pulses driving the counter Z are fixed, however, the arrangements for adjusting operating conditions in face of environmental changes are more elaborate. In Fig. 4 for instance two of the cores of the matrix AM, V1 and V2, are not associated with lines but are specifically biased over R1 and R2 as to turn over when addressed and interrogated at the point of transition between the first said second " steps," and second and third " steps " respectively, of the sawtooth waveform. If the points of transition indicated by the cores V1 and V2 are not in agreement with the timing pulses driving the counter Z compensation is effected by way of modifying the current in common bias winding g and/or altering the slope of the interrogating sawtooth waveform. The point of turnover of the core V1 in comparison with the timing pulse to Z marking transition from the first to the second " step " of the sawtooth waveform is evaluated in a circuit RK1 which is not described except in so far as it effects control of a transistor T3 in a circuit RG1 to selectively shunt more or less current away from the common bias winding g. The point of turnover of the core V2 in comparison with the timing pulse to Z marking transition from the second to the third " step " is similarly assessed by RK2 which controls a transistor T1 selectively to increase or decrease the peak amplitude of the sawtooth interrogating waveform on common winding ab. Both adjustments hunt about in search of optimum values. Instead of a single core such as V1 or V2 indicating a single point of transition between " steps " it is suggested that two cores may be employed turnover of one indicating when one " step " is completed and turnover of the other indicating that the next " step " has begun.