Patent GB-1117405-A (GB)
Title: Improvements in or relating to apparatus for recording and reproducing video information
IPC: H04N5/53
Filed: 1967-01-17
Abstract: 1,117,405. Automatic gain control circuits. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. 17 Jan., 1967 [19 Jan., 1966], No. 2386/67. Headings H3T and H4R. In apparatus for recording and reproducing video information, the recording channel includes a first automatic gain control (a.g.c.) circuit in which the control signal is obtained by rectification of the video information, the amplitude of which is thereby adjusted to a maximum level corresponding to optimum recording. The reproducing channel includes a second a.g.c. circuit in which the control signal is obtained by rectification of the reproduced synchronizing pulses only so as to adjust the amplitude of the video information to a value at which the synchronizing pulses in the output signal have a substantially constant value. In recording video signal, including sync. pulses from terminal 3, Fig. 4, after preliminary amplification in amplifier 4 is fed to the base of one transistor 20 of a long-tailed pair 20, 21, the collectors of which are coupled to the bases of a further long-tailed pair 23, 24 operating as a differential amplifier. An output is obtained from the collector of transistor 24 via an emitterfollower 26 and is fed to a frequency-modulating stage 7 for application to a recording head 8 as a frequency-modulated signal. In addition, the output of emitter-follower 26 is fed to a diode peak rectifier 27 from which rectified signals are applied to transistor 28, an adjustable delay being provived by means of an emitter bias network which includes variable resistor 29. The output from transistor 28 is smoothed by filter network 30 and applied as a a.g.c. bias to a transistor 22 which forms a variable resistance in the common emitter circuit of transistors 20, 21. In a modification (Fig. 3, not shown), the a.g.c. is not fed from emitter follower 26 but from the output of frequency-modulator 7, via a demodulator. The resultant recorded signal is of constant peak-to-peak height and with the height of the included sync. pulses inversely proportional to the amplitude of the video component (Fig. 2, not shown). In the reproducing system, frequency-modulated signals from play-back head 10, Fig. 5, are first amplified in amplifier 11 and then demodulated in demodulator 12. Demodulated signals pass via cascaded first and second common-emitter stages 31, 33 and emitterfollowers 34, 37 to an output amplifier 17 and terminal 18. Part of the output from emitterfollower 37 is applied to a transistor 38 forming a sync.-separating stage, being biased so that only sinc. pulses appear at its collector; these are amplified and differentiated in a stage 36. The differentiated pulses are applied to the base of transistor 35, which comprises a clamp, being conductive only during the back-porch periods to clamp the porch level of the signal at the base of emitter follower 37 to a constant potential. The sync. pulses are also applied from the collector of transistor 38 to the base of transistor 39 which is biased to act as a rectifier, variable resistor 40 in the emitter circuit providing an adjustable delay. The rectified sync. pulses, after smoothing are applied as an a.g.c. bias to transistor 32 which acts as a variable resistance in the emitter circuit of transistor 31: thereby the sync. pulses in the output signal are brought to a substantially constant amplitude and the variations in the video component are restored to their original values.