Patent FR-2973938-A1 (FR)
Title: Forming bonded semiconductor structure e.g. chips, comprises bonding second semiconductor structure to first semiconductor structure, and forming through-interconnect through second structure and into first structure to device structure
Inventor: SADAKA MARIAM
IPC: H01L21/762
Filed: 2011-04-08
Abstract: The method comprises bonding a second semiconductor structure (112) to a first semiconductor structure (100) at a temperature of below 400[deg] C, where the first semiconductor structure comprises a device structure (108), forming a through-interconnect through the second semiconductor structure and into the first semiconductor structure to the device structure at a temperature of below 400[deg] C, and bonding a second semiconductor structure on its side opposite to the first semiconductor structure to a third semiconductor structure. The method comprises bonding a second semiconductor structure (112) to a first semiconductor structure (100) at a temperature of below 400[deg] C, where the first semiconductor structure comprises a device structure (108), forming a through-interconnect through the second semiconductor structure and into the first semiconductor structure to the device structure at a temperature of below 400[deg] C, and bonding a second semiconductor structure on its side opposite to the first semiconductor structure to a third semiconductor structure. The step of bonding the second semiconductor structure to the first semiconductor structure comprises bonding a semiconductor structure relatively thicker to the first semiconductor structure, and thinning the semiconductor structure to form the second semiconductor structure. The second semiconductor structure comprises a thinner portion of the semiconductor structure remaining bonded to the first semiconductor structure. The thinning step comprises implanting ions into the semiconductor structure along a plane of ion implantation, and fracturing the semiconductor structure along the plane of ion implantation. The implanting step comprises implanting the ions into the semiconductor structure before the step of bonding the semiconductor structure to the first semiconductor structure. The fracturing step comprises fracturing the semiconductor structure along the plane of ion implantation after the step of bonding the semiconductor structure to the first semiconductor structure, and heating the semiconductor structure at a temperature of below 400[deg] C to move the semiconductor structure to fracture along the plane of ion implantation. The method further comprises selecting the second semiconductor structure such that the second semiconductor structure is made of monocrystalline silicon, forming a heat management structure into the second semiconductor structure, adjusting a thermal expansion coefficient of the second semiconductor structure by changing a size, a number, a composition, a position and a shape of the heat management structure such that a ratio between the thermal expansion coefficient of the second semiconductor structure and the thermal expansion coefficient of the first semiconductor structure is 0.9-1.1, bonding the second semiconductor structure to the third semiconductor structure at a temperature of below 400[deg] C, and forming the additional device structures on the second semiconductor structure after the step of bonding the second semiconductor structure to the first semiconductor structure and before the step of bonding the second semiconductor structure to the third semiconductor structure. The step of forming the heat management structure comprises forming a dummy metal pad electrically isolated form the device structure into the first semiconductor structure. An independent claim is included for a bonded semiconductor structure.