baber/WOPTO huggingface dataset:
Patent TW-365075-B (TW)
Title: A vertical diversity antenna
Inventor: TAKO NORIYUKI
IPC: H01Q21/10
Filed: 1996-10-03
Granted: 1999-07-21
Abstract: A vertical diversity antenna which has no degradation of the radiation characters is disclosed, the electrical conformity can be afforded without increasing the antenna diameter (radome diameter). The present invention comprises branching the front end of the strip lines which are to be used for supplying the power to the antenna unit, connecting one of the branched line to the antenna element, and connecting the another one of the branched line to the antenna element in a manner that bypassing the opposite one of the strip lines. When the length difference of the two lines is converted to the phase difference of the supplying power to the antenna element, the phase difference is set as 360 or its multiple. The effect of the present invention is that the electrical conformity can be afforded because the adverse influence caused by the electrical coupling between the strip line for supplying the power to the former stage of the antenna unit and the strip line for supplying the power to the latter stage of the antenna unit, can be prevented, accordingly a vertical diversity antenna without the degradation of VSWR and the degradation of radiation character can be provided.
Patent TW-368712-B (TW)
Title: General burn-in device
Inventor: SHIN KYUNG-MO
IPC: H01L21/64
Filed: 1996-11-08
Granted: 1999-09-01
Abstract: A kind of general burn-in circuit used for burn-in the semiconductor device which comprises: a socket with a plurality of connections for the plug-in of the tested semiconductor device; the first apparatus, with the first connection to one of a plurality of connections and an isolating resistance connected to the first connection with a test signal wire and an input power voltage and the first power connection of grounding voltage and a grounding connection and a first transmission point connected to the first connection; the second apparatus, with the second power connection connected to each first power connection and the first grounding connection thereof, a second grounding connection and a second transmission point connected to the test signal wire; and selection device, selectively connected to the first power connection, the first grounding connection and the first transmission point and the second power connection of the first apparatus, the second grounding connection and the second transmission point will provide a burn-in test signal according to the characteristic of tested semiconductor device connected to the first connection.
Patent TW-375549-B (TW)
Title: Method and apparatus for adhering ingots to support members; method for cutting ingots; automated wafer production system
Inventor: BANZAWA YOSHIAKI
IPC: H01L21/02
Filed: 1996-11-19
Granted: 1999-12-01
Abstract: An adhering apparatus adheres cylindrical ingots with crystallization orientation (L2) to a support member (21) on the cutting device (326) that cuts the ingots. A measuring apparatus (28) measures the crystallization orientation (L2) of ingot (13) using diffracted X-ray. A rotary apparatus (38, 40), based on the measured crystallization orientation, rotates ingot (13) along the center axis (L1) of ingot (13) while keeping said center axis parallel to a first plane (18), so that the crystallization orientation (L2) of ingot (13) is arranged within the plane parallel to said predetermined first plane (18). A regulating device (91), oppositely arranged in the crystallization orientation (L2) of ingot (13) within said parallel plane, regulates the direction of support member (21) or ingot (13) within said parallel plane according to the measured crystallization orientation, so it is in the same direction as that of installation axis (23) extended from the perpendicular direction of support member (21). A first adhering device (103) adheres to ingot (13) and support member (21) under the state where the crystallization orientation of ingot (13) is the same as the installation axis (23) of support member (21).
Patent TW-358256-B (TW)
Title: Rotor of magnetic generator
Inventor: WATANABE TOSHIYUKI
IPC: F16D41/06
Filed: 1996-12-13
Granted: 1999-05-11
Abstract: A rotor of magnetic generator, having on its outer flange a part of the boss member of the flange being inserted into the opening in the bottom wall on a bowl-shaped spigot portion and the outside of a one-way clutch in connection with the bottom wall of the spigot, including: the boss member being fixed at one end of the spigot opening, having the end flange held by a latch engagement formed on the outer flange and the boss flange; and a make spigot formed on the outer flange of the boss flange of the boss member being joined in the female spigot on the inner flange outside the clutch and, in protrusion on the bottom wall of the magnetic joint and the protrusion of the outside of the clutch in the recess of the other one.
Patent TW-313548-B (TW)
Title: Manufacturing method of safety floor tiles and the product
Inventor: LIN GWO-JONG
IPC: B29C65/02
Filed: 1996-12-17
Granted: 1997-08-21
Abstract: A manufacturing method of safety floor tiles; the top layer and the bottom layer of the floor tiles being produced by two different material formulas; first, mix up the top layer materials and the bottom layer materials, respectively, then put the mixed top layer materials into the upper section of mold and the mixed bottom layer materials into the lower section of mold; the materials melt into a liquid state by sulfurization in a temperature of 170 deg.C; a bonding layer formed between the top layer and the lower layer for the infiltration effect resulted by sulfurization.
Patent TW-326570-B (TW)
Title: Semiconductor integrated circuit apparatus and process thereof
Inventor: NARII SEISHI
IPC: H01L27/108
Filed: 1997-01-13
Granted: 1998-02-11
Abstract: A semiconductor integrated circuit apparatus, which mainly has DRAM of memory cell constituted by MISFET for memory selection and capacitor device formed on upper part for information storage, has the characteristics: Thin sheet resistor combined with MISFET for memory cell selection into a body of word line, and thin sheet resistor connected to either one of source region or drain region of MISFET for memory cell selection, both of whose resistance are under 2 ohm.
Patent TW-333485-B (TW)
Title: Apparatus, throttle air inlet and air inlet bushing for a pneumatic tool
Inventor: DAVID A GIARDINO
IPC: B25B21/00
Filed: 1997-01-13
Granted: 1998-06-11
Abstract: A kind of connector for interconnecting the bare ends of two fiber optic which has the following parts: - the first plate member, comprising contact surface and edge for fiber optic - the second plate member, comprising contact surface and edge for fiber optic, the at least one contact surface has an fiber-receiving groove and the contact surface of the first plate member is located at the position neighboring to the edge of the second plate member - a device used to clamp the plate members on the edges along the longitudinal direction.
Patent TW-350807-B (TW)
Title: Velocity control and nosepiece stabilizer system for combustion powered tools
Inventor: VEOUKAS STANLEY C
IPC: B25C1/18
Filed: 1997-01-21
Granted: 1999-01-21
Abstract: A sort of velocity control and nosepiece stabilizer system for combustion powered tools, having the tools a self-fed internal-combustion power supply being constructed and arranged for combustion and driving of the driving plate for impacting the sustainer which shall be punched into the workpiece, having the tool: a casing with a main chamber surrounding the driving supply; the cylinder inside the main chamber, being the cylinder surrounding the piston disposed longitudinally along the cylinder, with the piston in forward movement for displacement of the air in volume as in one side of the piston of the cylinder; at least a vent for displacement of one volume, disposed the vent in the cylinder for displacement of the volume and, when displaced from the forward moving piston, for escape from the cylinder; and the regulator, for regulation of the displacement volume for escape of the drag of the cylinder from at least one exit.
Patent TW-355133-B (TW)
Title: Window covering
Inventor: PRINCE KENDALL W
IPC: A47H23/04
Filed: 1997-02-17
Granted: 1999-04-01
Abstract: A window covering, a shell having a input nozzle for connecting a supply tank, a cylindrical dimension for receiving a head of plunger and a emitting nozzle being arranged along the front position of the cylinder and axially; a security valve is installed in the input nozzle to refrain the liquid from flowing toward the input nozzle; a plunger is installed to move along axially; a reciprocal spring is interposed between the plunger and one of closed axial ends of cylinder to resilient biased and move the plunger to first axial position during the stroke, in which the first axial position is arranged between the input nozzle and the emitting nozzle, and move toward the input nozzle and to the second axial position during any one of the strokes; the plunger has a head which has a flange while the flange has a inner wall and external wall, when in the first axial position, the resilient flange of the external wall engage against the wall of the cylinder to form the seal from supply tank to the emitting nozzle and when moving to the second position, the resilient flange curl inwardly to make the liquid from the input nozzle to the emitting nozzle; the plunger having a plunger rod which is connected to the head and the front flange of the cylinder protrudes, and manually pushes the plunger; casing cap is detachably connected to the front flange of the casing and is located proximate to the plunger rod.
Patent TW-388093-B (TW)
Title: Method for fabricating DRAM cell capacitor
Inventor: LIN CHI-HUEI
IPC: H01L21/8242
Filed: 1997-07-19
Granted: 2000-04-21
Abstract: The present invention discloses a method for fabricating DRAM cell capacitor method, which is to form a barrier layer with step coverage difference to protect the rugged surface of storage electrode to increase the capacitance and reduce the defect in capacitor. This method comprises: (a) provide a semiconductor substrate with a transistor having gate and source/drain region on it, and an insulating layer covered the transistor; (b) form a contace in the insulating layer to expose source/drain region; (c) form the first poly silicon layer over the insulating layer and fills the contact up for electrical connection; (d) anisotropically etching the first polysilicon layer until the surface of the insulating layer to form a recession for defining each capacitor region; (e) form a thin poly silicon layer with rugged surface covering the first polysilicon layer and the insulating layer; (f) form a barrier layer over the thin polysilicon layer, wherein the part of the barrier layer on the bottom of the recession is thinner than the other part of the barrier layer; (g) perform an an-isotropic etching for removing the part of the barrier layer on the bottom of the recession; (h) remove the part of the thin polysilicon layer not covered by the barrier layer and to expose part surface of the insulating layer; (I) remove the barrier layer to form a storage electrode of capacitor constructed by the residual thin polysilicon layer and the first polysilicon layer; (j) form a dielectrics layer on the exposed surface of the storage electrode and the insulating layer; and (k) form the second poly silicon layer on the dielectrics layer to make an upper electrode and finishing the fabrication of capacitor of DRAM cell.
Patent TW-353191-B (TW)
Title: Semiconductor device and process for producing the same
Inventor: MOTONAMI KAORU
IPC: H01L21/8234
Filed: 1997-08-13
Granted: 1999-02-21
Abstract: A semiconductor device comprising: a semiconductor substrate; a first element region and a second element region which are mutually isolated from each other and formed on the semiconductor substrate; an isolation region for isolating the first element region and the second element region; a first MOS structure having a first gate electrode and a first gate insulation layer, which is disposed on the first element region; a second MOS structure having a second gate electrode and a second gate insulation layer, which is disposed on the second element region; and a conductive layer disposed on the isolation region.
Patent TW-402754-B (TW)
Title: A method for cleaning wafer surface and a method for forming thin oxide layers
Inventor: HWANG CHUL-JU
IPC: H01L21/304
Filed: 1997-08-15
Granted: 2000-08-21
Abstract: A method to remove the native oxide and contaminants from a wafer surface by hydrogen gas and a hydrogen gas used in a extremely low temperature range from 100 DEG C to 800 DEG C. The said hydrogen containing gas includes impurity source such as boron, phosphorus, arsenic, antimony, aluminum, and germanium, which is activated by plasma and is to treat the wafer surface in a vacuum furnace. And a method for forming a thin oxide on a silicon wafer or a substrate in vacuum furnace is by treating with O2 or NO2 gas activated by plasma in a extremely low temperature range from 100 DEG C to 800 DEG C.
Patent TW-416094-B (TW)
Title: Automatic control system and method using same
Inventor: KASAI SHIGERU
IPC: G05B13/02
Filed: 1997-09-01
Granted: 2000-12-21
Abstract: An automatic control system controls a controlled variable serving as an object 2 to be controlled so that the object 2 approaches a predetermined target value, by means of an optimum regulator 4. The automatic control system include: a gain setting section 48 for setting a gain; a comparing section 52 for comparing the target value with the controlled variable serving as the object; and a weight control section 50 for weighting the gain set by the gain setting section so as to increase the weight from 0 to 1 within a predetermined period of time and for deriving a corrected manipulated variable in response to the time when a difference between the target value and the controlled variable comes within a range of a predetermined percentage of the target value, so that the corrected manipulated variable is added to the manipulated variable derived by the optimum regulator. Thus, the gain is controlled so as to gradually increase only within a restricted range, so that it is possible to quickly and accurately control an object.
Patent TW-374154-B (TW)
Title: Camera apparatus
Inventor: KITAZAWA TOMOYASU
IPC: H04N5/225
Filed: 1997-09-02
Granted: 1999-11-11
Abstract: The digitized image signal and audio signal are synthesized in a predetermined format by the digital signal processor circuit 6 and the synthesized signal is supplied to the VTR unit 10 for carrying out the digital recording. The image signal from the digital signal processor circuit 6 is supplied to the viewfinder 11 for displaying the processed image signal. The system control circuit 13 is provided which controls the processing operations in the digital signal processor circuit 6 and the VTR unit 10. To this system control circuit 13 is supplied the signal from the standby switch 14 for switching among the power supply off, the VTR mode, the camera (animated picture) standby and the photo (still picture) standby. Also, to this system control circuit 13 is supplied the signal from the push button 15 for controlling the start/stop of recording the camera (animated picture) and the still picture recording.
Patent TW-404971-B (TW)
Title: Bis(aminocarbonylnaphthol) derivatives and their preparation
Inventor: UENO RYUZO
IPC: C07C235/66
Filed: 1997-10-09
Granted: 2000-09-11
Abstract: The present invention provides a bis(aminocarbonylnaphthol) derivative which is useful as a raw material for novel azo pigments by bisamidation of each one carboxyl group of two 2-hydroxynaphthalene-3,6-dicarboxylic acids using an aliphatic or aromatic diamine.
Patent TW-389801-B (TW)
Title: Knitting fabric take-down device of flat knitting machine
Inventor: SHIMA MASAHIRO
IPC: D04B15/90
Filed: 1997-10-24
Granted: 2000-05-11
Abstract: The present invention relates to knitting fabric take-down devices, located in front and back of and facing each other across a knitting fabric passageway formed under a needle bed gap between at least a pair of front and back needle beds of a flat knitting machine, for taking down a knitting fabric. Each of the knitting fabric take-down device includes a front knitting fabric take-down mechanism for capturing only a front part of the knitting fabric in the knitting fabric passageway and taking it down; a back knitting fabric take-down mechanism for capturing only a back part of the knitting fabric and taking it down; and a take-down force adjusting mechanism for adjusting a take-down force of each of the knitting fabric take-down mechanism. The front and back knitting fabric take-down mechanism each comprises a plurality of take-down members which are arranged along a longitudinal direction of the needle beds and are each adapted to be sequentially or individually actuated to take down the knitting fabric in the knitting fabric take-down operation.
Patent TW-356527-B (TW)
Title: IC testing device
Inventor: HASHIMOTO YOSHIHIRO
IPC: G01R31/28
Filed: 1997-12-12
Granted: 1999-04-21
Abstract: An IC testing device which is connected to a current testing resistor between the power adapter at the current efflux of the tested IC and the common potential point, and parallel connected together to the short circuit switch; in the state where the tested IC consumes heavy current, the said short circuit switch bypasses the heavy current, and the voltage generated by the current testing resistor is measured when the short circuit switch is in cutoff state; using the said voltage to measure the static current of the tested IC, and determining if the IC is good by comparing the said current with a preset value, featuring setting: a control device to restore the short circuit switch to "on" state when the voltage generated by the current testing resistor rises above certain set value when short circuit switch is in cutoff state, and an auto-connecting control circuit to control the short circuit switch in cutoff state, and a delay control device that delays the cutoff action of the short circuit and makes it occur gradually.
Patent TW-391940-B (TW)
Title: Bicycle having an equilibrium sensing suspension system
Inventor: BUSBY JAMES
IPC: B62K25/30
Filed: 1998-02-11
Granted: 2000-06-01
Abstract: A bicycle having an independent equilibrium sensing suspension system for its crank assembly. The bicycle comprises a main frame having a rear assembly pivotally connected thereto. Rotatably connected to the rear assembly is an eccentric link, while attached to and extending between the eccentric link, while attached to and extending between the eccentric link and the main frame is a sensing link. Rotatably connected to the eccentric link is the crank assembly of the bicycle which is mechanically coupled to the rear wheel via a chain extending therebetween.
Patent TW-425748-B (TW)
Title: Charge and discharge control circuit
Inventor: MUKAINAKANO HIROSHI
IPC: G01R19/165
Filed: 1998-02-12
Granted: 2001-03-11
Abstract: The invention provides a charge and discharge control circuit protecting surely a secondary cell from high voltage. The charge and discharge control circuit 102 carries out a charge and discharge control of the secondary cell connected to an external power source terminals +V0 and -V0 so as to ON/OFF control a switch circuit 103. The charge and discharge control circuit 102 includes an overcharge detecting circuit 119, a delay circuit 128 outputting output from the overcharge detecting circuit 119 with predetermined delay time, and a high voltage detecting circuit 131 for detecting whether the secondary cell 101 is in high voltage state, wherein the switch circuit 103 is turned OFF responding to at least either output of the delay circuit 128 or the high voltage detecting circuit 131 and charging is stopped.
Patent TW-381123-B (TW)
Title: A process for surface-treating a sputtering target
Inventor: YOSHIMURA RYOJI
IPC: B24C11/00
Filed: 1998-02-27
Granted: 2000-02-01
Abstract: The surface to be sputtered of a sputtering target is blasted with a blasting material in the form of a finely divided powder having particle diameters falling within the range of 10 to 500 micrometer to remove impurities staining the surface to be sputtered. This blasting treatment is suitable especially for a sputtering surface having a raised portion thereon. Preferably the blasting treatment is effected in two stages: in the first stage, a blasting material powder with particle diameters of 50 to 500 micrometer is used, and in the second stage, a blasting material powder with particle diameters of 10 to 110 micrometer is used. The blast-treated surface has a uniform, isotropic and reduced surface roughness.
Patent TW-445449-B (TW)
Title: Information storage medium and information reproducing apparatus
Inventor: ANDO HIDEO
IPC: G11B7/24091
Filed: 1998-03-06
Granted: 2001-07-11
Abstract: There are provided an information storage medium, which is manufactured with high yield and is little influenced by a reproducing apparatus, and which is an information reproducing apparatus capable of performing stable information reproduction. The information storage medium has a pre-groove 1 with a groove-like, continuous projection-and-recess shape and a pre-pit 2 with an intermittent projection-and-recess shape. A level difference (depth or height) of the projection and recess of the pre-pit is substantially equal to that of the pre-groove. Each of the pre-pit and pre-groove has a recording surface wobbling along a predetermined curved line. A reproduction signal from the information storage medium having the recording surface can be obtained by at least one pair of a preamplifier and a digitizing circuit.
Patent TW-505618-B (TW)
Title: Water separation process
Inventor: PARTEN WILLIAM DAVID
IPC: C02F1/04
Filed: 1998-06-19
Granted: 2002-10-11
Abstract: An improved process for azeotropic distillation of a feedstock comprising an aliphatic carboxylic acid, such as acetic acid, water and an ester impurity derived from the aliphatic carboxylic acid, such as methyl acetate.
Patent TW-459063-B (TW)
Title: A chemical vapor deposition process and a substrate processing system for depositing a tungsten layer on a substrate
Inventor: RAJAGOPALAN RAVI
IPC: H01L21/28
Filed: 1998-05-13
Granted: 2001-10-11
Abstract: A multiple step chemical vapor deposition process for depositing a tungsten layer on a substrate. A first step of the deposition process includes a nucleation step in which WF6 and SiH4 are introduced into a deposition chamber. Next, the flow of WF6 and SiH4 are stopped and diborane is introduced into the chamber for between 5-25 seconds. Finally, during a bulk deposition step, the WF6 is re-introduced into the chamber along with H2 and B2H6 flows to deposit a tungsten layer on the substrate. In a preferred embodiment, the bulk deposition step also introduces nitrogen into process gas.
Patent TW-398131-B (TW)
Title: The image process method, the image process device and the data memory medium
Inventor: NISHI TAKAYOSHI
IPC: H04N19/593
Filed: 1998-06-18
Granted: 2000-07-11
Abstract: For the purpose of the present invention, the data quantity of the DCT coefficient of the interlace image can be decreased when the coding of the image and the estimate efficiency can be increased. The macro blocks which processed in frame or field DCT process are arranged at the same spatial area as the DCT area, when the coded block X(I) is processed in frame DCT process, the estimate values of the DCT coefficient of the X(I) are generated from the blocks which adjacent to the up-left side, up side and left side of the coded block, and when the coded block X(I) is processed in field DCT process, the estimate values of the DCT coefficient of the X(I) are generated from the blocks which located at the two blocks left, the two blocks up, and the block adjacent to left side of the coded block.