baber/WOPTO huggingface dataset:
Patent TW-436447-B (TW)
Title: Wrapping apparatus
Inventor: SUOLAHTI YRJOE
IPC: B65B25/24
Filed: 1999-12-04
Granted: 2001-05-28
Abstract: Wrapping apparatus for winding a web of wrapping foil (F) around an object (1). The wrapping apparatus comprises a ring guideway (2) defining a track of variable curvature and foil dispenser (6). The foil dispenser is provided with idler assemblies (10, 11) supporting the foil dispenser as it moves along the ring guideway. In the idler assembly, an inner idler (12) mounted with bearings on the foil dispenser frame (7) leans by its circumference on an inner rolling surface (3) of the guideway (2). A first outer idler (13) leans by its circumference on an outer rolling surface (4). A lateral idler (14) leans on a lateral rolling surface (5). The idler assembly comprises a second outer idler (15), which leans on the outer rolling surface (4) at a distance form the first outer idler (13). A pivoted frame (16) is mounted with bearings on the frame so that it can turn about a swing axis coincident with the axis of rotation of the inner idler (12). The first outer idler (13), the second outer idler (15) and the lateral idler (14) are mounted with bearings on the pivoted frame (16).
Patent TW-494298-B (TW)
Title: Device to detect the performance of CPU and PCI bus
Inventor: LI JIUN-LIANG
IPC: G06F11/30
Filed: 1999-12-15
Granted: 2002-07-11
Abstract: A device to detect the performance of CPU and PCI bus is disclosed, whose components comprise a logic gate part, MOSFET part, resistance part and capacitor part. When the present device is used, the control signal from each input logic gate part passes through and is processed by the logic gate part, MOSFET part, resistance part and capacitor part. Whether the CPU and PCI bus are busy or not can be told from the signal type after being processed. For CPU bus, the trigger condition is the ADS, DRDY, TRDY, and DBSY combination for the input logic gate part signals adopted; for PCI bus, the trigger condition is the frame, IRDY, and TRDY combination for the input logic gate part signals adopted; when the trigger condition of CPU, PCI bus are set, the output terminal of each logic input gate part generates each pulse which activates the operation of each MOSFET part detecting the performance of CPU and PCI bus, and makes each capacitor part proceed the charging operation. When the pulse generation frequency is faster, the charging voltage of each capacitor is higher, and each voltage level at the output terminal of the present device varies. By detecting the variation of each output voltage through the performance of CPU and PCI bus, the corresponding relationship between the voltage variation and the operation condition of CPU and PCI bus can be obtained. Users can determine the performance of CPU and PCI bus from the output voltage at each output terminal of the device of the present invention and this corresponding relationship.
Patent TW-468047-B (TW)
Title: Methods for providing liquid and solid components of a sample for use in assay methods
Inventor: STEAFFENS JEFFREY W
IPC: G01N33/48
Filed: 1999-12-17
Granted: 2001-12-11
Abstract: A method for providing an aliquot of a sample comprising liquid and solid components for use in an assay method comprising contacting the sample with a sampling device configured and arranged to hold an aliquot of both liquid and solid components of the sample in proportion to the liquid and solid composition of the sample, under conditions in which the sampling device holds the aliquot of the sample and providing the aliquot for use in an assay method.
Patent TW-562797-B (TW)
Title: Aroyl aminoacyl pyrroles for use in the treatment of neuropathic pain
Inventor: CARSON JOHN R
IPC: C07D401/06
Filed: 2000-03-23
Granted: 2003-11-21
Abstract: Aroyl aminoacyl pyrroles are pharmaceutically useful in treating neuropathic pain, which includes utility for the treatment of neuropathic pain. A pharmaceutical composition for the treatment of neuropathic pain comprising a pharmaceutically acceptable carrier and, as an active ingredient, an effective amount of a compound of the formula, wherein, As are different form each other, where one is [formula] and the other is [formula], n is an integer from 1 to 5; R1 is selected from the group consisting of H and C1-4alkyl; R2 and R3 are selected from the group consisting of H and C1-4alkyl; R4 and R5 are independently selected from the group consisting of H, C1-4alkyl, phenyl C1-4alkyl and substituted phenyl C1-4alkyl where the substituent is on phenyl and selected from the group consisting of methyl and methoxy, or in the alternative, are fused and together with said nitrogen form a heterocyclic ring selected from the group consisting of: wherein Y is S or O, x is 3 to 7 and R7 is selected from the group consisting of methyl and hydroxymethyl; and R6 is selected from the group consisting of halo, C1-4alkyl, C1-4alkoxyl, hydroxy, nitro, amino, C1-4acylamino, cyano, trihaloC1-4alkyl, C1-4alkylsulfonyl, C1-4alkylsulfinyl, and C1-4acyl, including pharmaceutically acceptable acid addition salts thereof.
Patent TW-452484-B (TW)
Title: Slide fastener chain, method and apparatus for forming end thereof
Inventor: KUSE KAZUKI
IPC: B29C65/08
Filed: 2000-04-14
Granted: 2001-09-01
Abstract: According to the fastener chain, method and apparatus for forming ends thereof, coil-shaped fastener elements (11) as linear fastener elements (1) are attached and sewed to side edge portions (5) of a pair of fastener tapes (2) with sewing yarns (15) as fixing yarns (4) while a core thread (3) is inserted through the fastener elements (1). The coil-shaped fastener elements (1) are cut off at leg portions (22), each of which is in contact with the fastener tape (2), at ends of the fastener elements (1), so that cut end portions (7) are formed. These cut end portions (7) are pushed inward of the side edge portions (5), and then, the leg portions (22) and inverted portions (23) thereof are fused to the fastener tapes (2) by heating. As a result, a form of each end of the fastener elements (1) is stabilized, so that the resultant slide fastener is good in safety.
Patent TW-540039-B (TW)
Title: Optical disk, optical disk recording apparatus, optical disk reproducing apparatus, optical disk recording and reproducing apparatus, method for recording and reproducing data on optical disk, method for recording data on disk
Inventor: NAGAI TAKAHIRO
IPC: G11B19/12
Filed: 2000-04-27
Granted: 2003-07-01
Abstract: An optical disk of recording type on which data is recordable is provided which includes a data recording and reproducing area for recording data therein and reproducing data therefrom, and a read-only disk identification information area for recording disk identification information for identifying the optical disk therein. In the optical disk, the disk identification information is formed by removing a reflection film formed on the optical disk in a strip shape. The disk identification information includes an inherent disk identifier for each optical disk, and the data recording and reproducing area includes an area for recording therein encrypted data, which is encrypted using information including the disk identification information for identifying the optical disk as a key.
Patent TW-I262939-B (TW)
Title: Slurry composition and method of chemical mechanical polishing using same
Inventor: BONNEAU LIONEL
IPC: B24B37/00
Filed: 2000-05-22
Granted: 2006-10-01
Abstract: The present invention provides a slurry composition for chemical mechanical polishing comprising spinel particles having the formula AO.xZ2O3 wherein A is at least one divalent cation, Z is at least one trivalent cation, and 0.01 <= x <= 100. The present invention also includes a method of chemical mechanical polishing the surface of a substrate using slurry compositions that include these spinel particles. The slurry compositions of the present invention provide the desired level of planarization and selectivity for both metal and oxide surfaces. In addition, the slurry compositions of the invention can be prepared such that they are substantially free of alpha phase alumina particles and other high hardness particles to produce a scratch-free polished surface.
Patent TW-466830-B (TW)
Title: Input buffer
Inventor: CHEN JR-HUNG
IPC: H03K19/00
Filed: 2000-05-12
Granted: 2001-12-01
Abstract: The present invention is related to an input buffer, in which a tunable voltage dividing circuit is designed to generate a bias signal so as to decrease and prevent the occurred phenomenon of trigger point shift under different power voltage ranges. The tunable voltage dividing circuit includes the followings: using a pull-up device portion to control a voltage value of threshold effect; and using tunable resistors to generate bias effects. In addition, at least one set of transistor combination is added to the input buffer to control the variation of rising trend line for the trigger point.
Patent TW-520449-B (TW)
Title: Retardation film, composite retardation film, and liquid crystal display device using same
Inventor: KUSHIDA TAKASHI
IPC: G02F1/13363
Filed: 2000-07-28
Granted: 2003-02-11
Abstract: A retardation film for compensating the optical properties of a liquid crystal cell of a liquid crystal display device to improve the quality of an image. A retardation film made of a single polymer film, which has a wave length band wherein the retardation value is positive and a wave length band wherein the retardation value is negative in a wave length range of 400-800 nm; satisfies at least one of the following formulae (1) and (2); and has a water absorption of not more than 1% by mass. |R(400)| ≥ 10 nm (1), |R(700)| ≥ 10 nm (2).
Patent TW-557444-B (TW)
Title: Variable threshold voltage DRAM cell
Inventor: TIWARI SANDIP
IPC: H01L27/108
Filed: 2000-08-18
Granted: 2003-10-11
Abstract: A memory cell is provided that includes a transistor and a capacitor. The transistor has a gate, a drain, a source, and a back-plane gate, and the capacitor has first and second electrodes. The back-plane gate of the transistor is connected to the first electrode of the capacitor. In a preferred embodiment, the source of the transistor is also connected to the first electrode of the capacitor. Additionally, a memory cell is provided that includes a transistor and a capacitor. The transistor has a gate, a drain, a source, and a back-plane gate, and the capacitor has first and second electrodes. The first electrode of the capacitor is connected to the source of the transistor, and the back-plane gate changes the threshold voltage of the transistor in correspondence to charge stored on the capacitor. In one preferred embodiment, the back-plane gate is charged from the transistor by a tunneling process.
Patent TW-480351-B (TW)
Title: Optical transmitting means, it's manufacturing method and optical transmitting system
Inventor: OKUNO TOSHIAKI
IPC: H04B10/2581
Filed: 2000-08-25
Granted: 2002-03-21
Abstract: This invention relates to an optical transmitting means in which exciting light is supplied for the Laman amplification applied on light signals, and to the manufacturing method of the same, and to an optical transmission system using the same. This optical transmitting means, being supplied with exciting light so as to cause Laman amplification on light signals, is formed in which the area with maximum value of Laman gain coefficient exists at a place with a predetermined distance apart from an end part supplied with exciting light along the propagation direction of exciting light. At any position of optical transmitting means, the increase of the power of the optical signal is suppressed until the level of the light emitting effect becomes apparent, and the decrease of the power of the optical signal is suppressed until the S/N ratio degrades to an certain extent, and the power of the optical signal at the end of optical transmitting means can be sufficiently maintained.
Patent TW-476030-B (TW)
Title: RAID controller system and method with ATA emulation host interface
Inventor: STOLOWITZ MICHAEL C
IPC: G06F3/06
Filed: 2000-09-22
Granted: 2002-02-11
Abstract: A RAID storage device controller provides a host interface for interfacing the controller to a host system bus. The host interface is isolated from the attached storage devices, for example IDE disk drives, so that the actual attached drives are not limited in number or interface protocol. Various device ports can be implemented, and various RAID strategies, e.g. level 3 and level 5, can be used. In all the cases, the host interface provides a standard, uniform interface to the host, namely an ATA interface, and preferably a dual channel ATA interface. The host interface emulates the ATA single or dual channel interface and emulates one or two attached IDE devices per channel, regardless of the actual number of devices physically connected to the controller. Thus, for example, five or seven IDE drives can be deployed in RAID level 5 protocol without changing the standard BIOS in a PCI host machine. Thus the RAID controller is transparent relative to a standard dual channel ATA controller board.
Patent TW-450818-B (TW)
Title: Flow control device
Inventor: KANAI MASAHIRO
IPC: A61M5/152
Filed: 2000-09-22
Granted: 2001-08-21
Abstract: A flow control device has a body 41, a plurality of elastic flow control tube 51-54 provided in the body 41, a single fluid path 55 in communication with the flow control tube 51-54, a slider 56 slidable relative to the body 41, and a valve mechanism 71 for selectively pressing and shutting the flow control tube 51-54 in accordance with a slide position of the slider 56.
Patent TW-496792-B (TW)
Title: Process for recovery of synthetic resin substrate and pressured type cleaning apparatus used thereof
Inventor: YAMAGUCHI MASATOSHI
IPC: B29B17/02
Filed: 2001-02-21
Granted: 2002-08-01
Abstract: The present invention relates to a method of removing a layer of material from a synthetic resin or an organic add ester of cellulose comprising: washing the layer from the substrate with an aqueous alkali solution having a temperature of at least 105 DEG C, and then washing the alkali solution from the substrate. Furthermore, the present invention relates to a pressure vessel comprising a longitudinal cylindrical body having a circular cross-section, an end plate connected to the top of the cylindrical body and an inverted end plate connected to the lower part of the cylindrical body in a manner such that its convex part faces upwards wherein the pressure vessel has a strainer plate and a stirring blade inside the cylindrical body.
Patent TW-527432-B (TW)
Title: A method and composition for depositing a polymer layer in the production of a light-emissive device, a method of forming a polymer layer on a substrate, and the use of a composition in an ink-jet method of depositing a polymer layer
Inventor: GRIZZI ILARIA
IPC: H01L29/00
Filed: 2001-02-27
Granted: 2003-04-11
Abstract: A formulation for depositing a polymer layer in the production of a light-emissive device, the formulation including a conjugated polymer dissolved in a solvent, the solvent including a dialkyl- or trialkyl-substituted aromatic hydrocarbon, at least two of the alkyl substituents being ortho to one another; and the use of such formulation in the deposition of a polymer layer on a substrate by an ink-jet method.
Patent TW-530508-B (TW)
Title: System and method for determining the position of a wireless CDMA transceiver
Inventor: SOLIMAN SAMIR S
IPC: G04G7/00
Filed: 2001-03-02
Granted: 2003-05-01
Abstract: A system and method for determining a position of a mobile wireless transceiver. The inventive system merges GPS position location and wireless communication technologies to achieve a precise position location in dense urban and other environments when line-of-sight to the satellites (60, 70, 80, 90) is somewhat obscured. The inventive method uses signals from only two GPS satellites and the serving terrestrial base station. In a most general sense, the inventive method includes the steps of receiving at a base station (10) a first signal transmitted from a first GPS satellite and a second signal transmitted from a second GPS satellite. The mobile transmitter (200) and receiver (100) are adapted to receive these GPS signals as well and transmit a third signal to the base station in response thereto. The base station (10) receives the third signal and uses it to calculate the position of the wireless unit (20). In a specific implementation, the base station (10) sends aiding information to the wireless unit (20). The aiding information is used by the wireless unit to quickly acquire the signals transmitted by the first and second satellites (60, 70, 80, 90) and includes satellite identification information, Doppler shift information, and range information between the base station and the satellites. On the acquisition by the wireless unit (20) of the signals transmitted by the first and second satellites, the wireless unit (20) calculates the range between the wireless unit (20) and each of the two satellites. This range information is transmitted back to the base station (10) along with information as to the time at which the measurement was made. In a CDMA implementation, the time at which the wireless unit (20) transmits the third signal to the base station (10) is known by the base station (10, 11). The delay in the receipt of the third signal provides an indication to the base station as to the range between the base station (10) and the wireless unit (20). The base station utilizes information known as to its position, the position of the first and second satellites relative to the wireless unit (20) and the range to the wireless unit (20) from the base station (10) to calculate the position of the wireless unit (20).
Patent TW-498343-B (TW)
Title: Dynamic configuration of storage arrays
Inventor: PATTI ROBERT
IPC: G11C29/42
Filed: 2001-03-13
Granted: 2002-08-11
Abstract: A reconfigurable memory [10, 50, 100] having M bit lines [12] and a plurality of row lines [13], where M > 1. The memory includes an array [11] of memory storage cells [15], each memory storage cell [15] storing a data value. The data value is read from or into the storage cells by coupling that data value to one of the bit lines [12] in response to a row control signal on one of the row lines [13]. A row select circuit [14] generates the row control signal on one of the row lines [13] in response to a row address being coupled to the row select circuit [14]. The row select circuit [14] includes a memory for storing a mapping of the row addresses to the row lines [13] that determines which of the row lines [13] is selected for each possible value of the row address. The memory includes a plurality of sense amplifiers, one such sense amplifier being connected to each of the bit lines [12] for measuring a signal value on that bit line [12]. A controller [40] that is part of the memory tests the memory storage cells [15] both at power up and run time to detect defective memory storage cells [15]. The controller [40] uses an error correcting code scheme to detect errors during the actual operation of the memory. The memory includes sufficient spare rows and columns to allow the controller [40] to substitute spares for rows or columns having defective memory storage cells [15].
Patent TW-480656-B (TW)
Title: Method for manufacturing ONO layer of nitride read only memory
Inventor: CHANG KUO-HUA
IPC: H01L21/76
Filed: 2001-05-11
Granted: 2002-03-21
Abstract: The present invention provides a manufacturing method for ONO (oxide-nitride-oxide) layer of nitride read only memory (NROM), which includes the following steps: first, forming a first oxide layer on the substrate surface of a semiconductor chip; next, conducting twice chemical vapor deposition (CVD) to sequentially form a first nitride layer and a second nitride layer on the surface of the first oxide layer so as to form an interface at the intersection of the second nitride layer and the first nitride layer; then, forming a second oxide layer on the surface of the second nitride layer to complete the processing of the ONO layer; in which, the second nitride layer and the first nitride layer are used as the floating gate of the NROM and the interface is used as a deep charge trapping center to increase the charge trapping efficiency and further increase the endurance and reliability of the NROM.
Patent TW-I305149-B (TW)
Title: Dental antibacterial composition for curing decayed tooth
Inventor: NAKATSUKA KAZUMITSU
IPC: A61K6/083
Filed: 2001-05-21
Granted: 2009-01-11
Abstract: An antibacterial composition comprising (a) an antibacterial salt compound, (b) an acid group-having polymerizable monomer, (c) a hydrophilic polymerizable monomer, (d) water, and (e) a basic compound selected from alkali metal hydroxides, strong basic acid salts not having an aromatic group, and aliphatic amines has good antibacterial properties, and, in addition, the composition discolors little and its adhesiveness lowers little even when stored or heated for a long period of time. <IMAGE>
Patent TW-500618-B (TW)
Title: Positionable-axle bicycle ergometer
Inventor: KATO MINORU
IPC: A63B21/005
Filed: 2001-06-01
Granted: 2002-09-01
Abstract: A positionable-axle bicycle ergometer comprises axles each to be supplied with a rotational force from a corresponding pedals and a corresponding arms, seats each supporting a corresponding axles, guide sections each supporting a corresponding seats such that seats can reciprocate in a direction perpendicular to axles, positioning mechanisms each for positioning a corresponding guide sections on the basis of an rotation angle of the axles and braking mechanisms each braking a corresponding axles.
Patent TW-514874-B (TW)
Title: Copyright protection method, reproduction method, reproduction apparatus, recording method and recording apparatus
Inventor: MORIYAMA YOSHIAKI
IPC: G06F21/10
Filed: 2001-06-06
Granted: 2002-12-21
Abstract: A copyright protection method for adding copy control information to an information signal in association with contents which are protected under copyright is provided. In the method, attributive information representing the attribution of a predetermined apparatus (2, 3, 4, 6) is added to the information signal when the information signal is propagated via the apparatus. Then, the recording of the information signal is controlled on the basis of the copy control information and the attributive information. For example, even if the copy control information indicates that a copy is allowed since the information signal was propagated via a illegal path (B, D, F), the copy is forbidden since the attributive information indicates an attribution of an reproduction apparatus (6).
Patent TW-499339-B (TW)
Title: Manually-operated sealing tool for joining end portions of plastic strapping, seal member, and sealed joint formed thereby
Inventor: ANGAROLA BARRY R
IPC: B65D63/14
Filed: 2001-06-20
Granted: 2002-08-21
Abstract: A manually-operable crimping tool for lockingly securing a seal member upon overlapped end portions of plastic strapping is provided with particular structure such that the resulting crimped seal member and overlapped end portions of the plastic strapping have an undulated configuration whereby the overlapped end portions of the plastic strapping cannot readily become loosened or disengaged with respect to each other under the influence of axially applied tensile forces. The present invention is also directed toward the particularly structured or configured seal members well as toward the resulting sealed joint formed or defined between the seal member and the overlapped end portions of the plastic strapping.