Patent GB-1526467-A (GB)
Title: Satellite controlled digital clock system
IPC: G04G7/02
Filed: 1976-10-01
Abstract: 1526467 Master and slave clock systems UNITED STATES DEPARTMENT OF COMMERCE NATIONAL TECHNICAL INFORMATION SERVICE 1 Oct 1976 [13 Feb 1976] 40882/76 Heading G3T In a digital clock system in which time-indicating data transmitted at a precise data rate comprises a series of serial mode data groups each containing a number of data blocks each having a synchronizing segment and a message segment, the message segments from all the blocks of a group together forming a time code message starting with a synchronization portion and following with a number of digits indicating the time of year, the receiver comprises a clock pulse generator phase-locked to the transmission data rate, means for detecting the synchronization segment of each data block so as to find the following message code segment, means for detecting the synchronization portion of the message so as to find the beginning of the time code message, means for assembling the complete time code message from the received time code segments means for registering present time by counting the clock pulses, means for checking this time against the received time code message and, after a predetermined number of non-agreements, for correcting the registered time. The time message is transmitted from an atomic master clock and is relayed to the receiving stations by satellites orbiting the earth. The transmitted message contains a satelliteposition indicating portion which is displayed together with the time. The apparatus at the receiver consists of a random access memory and a firmwave programmed micro-computer. The data is transmitted serially at 100 bits per second, each group of 50 bits being a block. Each block comprises a four-bit time code segment, Fig. 2A, a maximum length synchronization code of 15 bits and an interrogation address of 31 bits. The maximum length synchronization code is a fixed sequence repeated in every block to allow the receiver to find the time code segment by skipping 31 bits. The time code message begins with ten synchronization word segments; then come eight time-of-year segments, two correction segments and thirteen satellite position segments. The message takes 16¢ seconds and is repeated every 30 seconds. The synchronization words are the letter 'A' repeated ten times. When the receiver detects these words it assembles the following time code segments into a time-of-year message which is stored and displayed. The local clock then keeps this updated by counting the 100 bit per second of the transmitted data. Each thirty seconds a further time message is received and compared with the stored presenttime indication. A succession of four disagreements causes the stored value to be corrected. The local pulse generator produces pulses at 512 Hz. These are divided in a counting chain to give a pulse train at 100 Hz which is compared with the 100 Hz signal from the satellite. Any phase difference is used to correct the frequency of the oscillator which is thereby phase-locked to the transmission frequency. If the satellite signal is lost the clock continues to count the local 100 Hz pulses. The display is conventional and uses light-emitting diodes.