Patent GB-826631-A (GB)
Title: Improvements in or relating to time division multiplex communication systems
Inventor: FLOOD JOHN EDWARD
IPC: H04Q11/04
Filed: 1953-06-12
Abstract: 826,631. Automatic exchange systems. POSTMASTER GENERAL. Dec. 22, 1955 [June 12, 1953], No. 16315/53. Class 40 (4). In a time division multiplex exchange system in which a plurality of circuits CT3, CT4, Fig. 1, are connected to common transmit and receive highways GT3, GR3 through transmit and receive modulators TM3, TM4, RM3, RM4, the transmit and receive highways are interconnected by modulators M3, M4, at least one of which is connected in series with a delay line DL5, such that the delay introduced by the paths through the latter modulators is different. Thus if the interval between the pulses in successive channels is referred to as one unit, the delay line DL5 might have a delay of two units. In this case if the transmit and receive modulators TM3, RM3 of CT3 are pulsed at phases Pn, Pn +1, respectively, and modulators TM4, RM4 of CT4 are pulsed at phases Pn +1, Pn + 2, respectively, then forward communication from TM3 to RM4 can be effected via M4 when pulsed at phase Pn and backward communication from TM4 to RM3 can be effected via M3 when pulsed at phase Pn+ 1. The system thus requires that the transmit and receive modulators are fed with consecutive pulses. Fig. 2 illustrates how connection is established between circuits of different groups associated with highways GT1, GR1 and GT2, GR2, respectively. Each transmit highway is connected via half unit delay lines DL1, DL4 to intergroup modulators M1, M2, which are connected by further half-unit delay lines DL2, DL3 to the receive highways. Connection is established by pulsing M1, M2 with pulses of phase Pn+¢. Connection between circuits in different groups, Figs. 7, 8, 9, 10. This proceeds in the same manner as in Specification 803,509 with appropriate modifications due to the use of staggered pulses. Thus connection between calling and called subscribers and the calling and called side of the register is effected on the register side by pulsing the modulators and demodulators M3, M4, M7, M8, RRM1, RTM1, RRM2, RTM2 with ¢-phase pulses (i.e. pulses whose phase number is of the type Pm+¢). The half unit delay lines DL1, DL2 effect the necessary timing changes allowing the subscriber's transmit and receive modulators to be fed by pulses staggered in phase by one unit. The circulating systems TD1, TD2 for pulsing the modulators and the circulating system TD22 for providing holding pulses have their delay lines split. Thus system TD 1 has two tappings PDL1, DPDL1 to provide pulses staggered by one unit for feeding the transmit and receive modulators. Since the pulse selectors such as SEL4, SEL7 are arranged to select from and to emit half-phase pulses, this involves the introduction of a half unit delay line DL10 in the input circuits and half-unit delay lines DL11, DL17, DL18 in their output circuits. Connection between circuits in the same group. For the establishment of such a connection consecutive pulse trains are required, one of which is free in the modulators RRM1, RTM1 which establish connection between the calling subscriber and the register and the other of which is free in the modulators RRM2, RTM2 which establish connection between the called subscriber and the register. When connection has been established between a calling subscriber and a register and it has been established that the call must be routed to a called subscriber in the calling subscriber's group then lead PIL10 carries channel pulses free in the group and a D.C. output obtained from pulse lengthener PLM20, as described in Specification 803,509, is applied to gates DCG6 in all groups. In the calling group this gate opens to apply D.C. to the multiplex MX6 feeding selector SEL5 which accordingly indicates the group in question by applying D.C. to a combination of two leads such as DCIL7, DCIL8. A marking on DCIL16 indicating that the associated group is the calling group opens gate PG27 to pass pulses indicative of free marked circuits in the group (there may be more than one in the case of a PBX subscriber). These are fed to selector SEL6 which operates to indicate the selected circuit both as a D.C. marking combination on leads DCIL17, DCIL18 and as a pulse train on lead PL16, the latter being fed to circulating system TD20 to mark the circuit busy. Lead DCIL16 also opens gate PG28 to pass channel pulse trains not in use in the group to lead PIL13. The pulse trains free in the group on lead PIL10 are combined with that on PIL8 used in connecting the caller to the register and passed via PG50 to lead PL50 to feed a gate PCG50 directly and via a unit delay line DL50. The output from gate PCG50 thus consists of the second pulses of consecutive pairs of pulses present on PL50 and these are fed to gates PSG51, PSG52, PSG53, PSG54. PSG52, PSG51 are suppressed by PSL4 pulses (busy in register to called subscriber connections) either directly or delayed one unit by DL14. Likewise PSG53, PSG54 are suppressed by PSL7 pulses (busy on register to calling subscriber connections) either directly or delayed one unit by DL15. Thus PSG51 emits unit delayed versions of pulses free in the called subscriber-register modulators and coinciding with the first of a pair of pulses on PL50 ; and PSG54 emits pulses free (or available) in the calling subscriber-register modulators and coinciding with the second of a pair of pulses on PL50. The PSG51 and PSG54 outputs feed a coincidence gate PCG52 whose output on PL53 represents the second of a pair of pulses, the first of which can be used in a called subscriberregister connection and the second of which can be used in a calling subscriber-register connection. Similarly gate PCG51 emits on lead PL52 second pulses of pairs which can be used to effect the above connections in the reverse order. The two sets of pulses are fed to selector SEL50 and one is selected. The selected pulse train is emitted by SEL50 time advanced by one unit to lead PIL50 (i.e., it is coincident with the first pulse of the pair). After delay by one unit in DL16 the selected pulse is compared with the pulses on leads PL52, PL53 in gates PCG53, PCG54 to determine whether the pulse can be used in a called subscriber-register connection or a calling subscriber-register connection, and the results of this test are indicated by D.C. outputs from pulse lengthening means PLM50, PLM51. If both tests prove successful one is given priority over the other by the mutually inhibiting gates DSG50, DSG51, one of the circuits PLM50, PLM51 having a longer build-up time than the other. According as the D.C. output from these gates is on lead DCL50 or DCL51 appropriate pairs of gates PG51 ... PG54 are opened to pass a first pulse of the pair from PIL50 to DM51 and a second pulse of the pair from PIL51 to DM50 or vice versa. The pulse at DM50 is fed after a half-unit delay at DL17 to the called subscriber's combination of circulating systems via gates PG17, PG18 opened by D.C. markings from selector SEL6 indicating the called subscriber's identity. The pulse is also fed to the hold and busy circulating system TD22 of the group concerned. The pulse is furthermore fed to lead PIL 15 for insertion in the circulating systems TD7, TD8, TD11, TD12 for connecting up the called side of the register. The pulse at DM51 is fed via half-unit delay line DL18 and gates PG30, PG31 (opened by calling line identifying potentials from PLM4, PLM7 as in Specification 803,509) to the circulating systems associated with the calling subscriber. The pulse is also fed to lead PL18 for insertion (pulse changing taking place if necessary) in circulating systems TD5, TD6, TD9, TD10 to connect up the calling side of the register. Finally the output from SEL50 is fed via the half-unit delay line DL19 to the circulating system TD40 from which outputs staggered by one unit are taken at PL40 and DPL40. Thus if the output from SEL50 has phase Pn+¢, the receive modulators of the calling and called subscribers are fed with pulses Pn +1, Pn + 2 or vice versa and the transmit modulators are fed with pulses Pn, Pn+ 1 or vice versa. Channel pulses on lead GT1 of phase Pn + 1 pass through modulator M40 (pulsed by Pn+1 from lead DPL40) for transmission via PSG40 to lead GR1. Pulses on GT1 of phase Pn pass through modulator M41 (pulsed by Pn from PL40) and the two-unit delay line DL40 and modulator M42 (pulsed by PL40 pulses delayed by two-unit delay line DL8) for transmission in phase Pn+2 to lead GR1 via gate PSG40. The latter gate, however, opens only on disconnection of the register prior to which it is closed by Pn+¢, Pn+3/2 pulses on lead GR 11 which are applied via halfunit delay line DL5 to its suppression lead. The connection is held on a calling party release basis, the called party's pulse train being maintained in the circulating system TD22 until the caller hangs up, by pulses received over lead GR1, as described in Specification 803,509. Pulses derived therefrom maintain the circulation in system TD40 over lead PHL3, and further pulses obtained therefrom over lead PHL40 are applied either via PCG41 or PCG40 and DL40 to GR1 in the phase used by the calling party, thereby maintaining the circulating of that pulse in the calling subscriber's circulating systems and maintaining a busy potential on the calling subscriber's lead H2, despite the cessation of the called party's pulses on GT1 when the latter hangs up. Specifications 707,379, 718,269, [both in Group XL (c)], 722,179, 770,616, 770,617, 781,561, 781,562, 781,916 and 784,901 also are referred to.