Patent GB-1279756-A (GB)
Title: Suppressing interference in fm radio receivers
IPC: H04B1/16
Filed: 1970-10-22
Abstract: 1279756 Interference suppression in radio receivers PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 22 Oct 1970 [25 Oct 1969] 50205/70 Heading H4L In a receiver for frequency-modulated signals the output of the discriminator 3 is fed via emitter follower 5, delay network 10 to 14, emitter follower 17 and field effect transistor 21, acting as a gate, to a storage capacitor 22. The signal on the storage capacitor is amplified by a field effect transistor 23 and supplied via capacitor 26 to an audio-frequency amplifier. Interference is detected by inductor 27 which with the output impedance of transistor 5 forms a differentiator and is differentiated again (28, 29) before amplification at 34. Capacitor 30 bypasses the relatively unimportant higher interfering frequencies. The amplified interference pulses are supplied to a phase-splitter 38 whose outputs are applied to a fullwave rectifier 45 to 48 which enables both positive and negative pulses to be detected. When an interference pulse of either polarity is present, a positive pulse appears across resistor 50 and causes a normally cut off transistor 51 to conduct for a short period. When transistor 51 is cut off, transistors 52, 53 of a monostable device are both conductive and capacitor 54 is charged to a predetermined value. When transistor 51 conducts the capacitor 54 is charged further and this results in transistors 52, 53 being cut off. During this period the capacitor 54 discharges via resistor 55 and transistors 52, 53 become conductive again. If during the discharge of capacitor 54 an interference pulse makes transistor 51 conductive, the capacitor 54 is recharged so that the period of the monostable device is extended automatically. The positive-going output pulses from transistor 53, coinciding with interference pulses, are amplified at 60 and the resulting negativegoing pulses cut off transistor 21. Under these conditions the charge on capacitor 22 maintains the output signal at its level just before the interference occurred. A resistor may be included between the drain electrode of transistor 21 and capacitor 22 to introduce a delay and improve the operation. If a stereo signal is received a circuit 65 tuned to 19 Kc./s. prevents distortion due to phase errors in the pilot signal. The voltage across circuit 65 may be utilized for a stereo decoder, Fig. 2 (not shown). A second circuit tuned to 38 Kc./s., the subcarrier frequency, may be included in series with circuit 65. In the case of a mono receiver the 38 Kc./s. component is suppressed by a circuit 66 tuned to that frequency. An integrator 71, 72, provides a voltage which is a measure of the number of switching pulses and their duration from the monostable 52, 53, and this voltage is supplied to series connected diodes 73, 74 whose junction is connected to capacitor 33 in the input of amplifier 34. If the voltage is low the diodes have a high resistance and all the interference pulses are passed to the amplifier 34 but as the voltage increases the interference pulses are attenuated so that only the strongest are effective. By this means, continuous blocking of transistor 21 in the event of a large number of interference pulses is avoided. A delay may be introduced by a Zener diode 75a. In a modification, Fig. 3 (not shown), interference pulses are detected by an amplitude modulation detector fed from the I.F. amplifier prior to the signal being limited. This controls a monostable device as in the previous embodiment, the gating circuit in this case comprising a bipolar transistor.