Patent GB-796323-A (GB)
Title: Improvements relating to electronic digital calculating apparatus
IPC: H03M7/12
Filed: 1955-12-13
Abstract: 796,323. Digital electric calculating-apparatus. GENERAL ELECTRIC CO. Dec. 13, 1955 [Dec. 13, 1954], No. 35768/55. Class 106 (1). An electronic apparatus for converting a number from a first to a second radix comprises an accumulator having cascaded stages, one for each power of the second radix, and generators each associated with a different power of the first radix and operatively connected to appropriate stages of the accumulator so that when a generator is energized the second radix number corresponding to the associated power of the first radix is entered into the accumulator, the generators being energized in turn each a number of times corresponding to the digit of the associated power of the first radix. The decimal-to-binary converter shown is similar to that of Specification 796,322, the binary equivalents of decimal digits being entered in a binary accumulator 23 by applying a number of pulses corresponding to each digit to an associated one of cathode followers 19-22 having output connections 24 representing 1000, 100, 10 and 1 respectively. In the present converter, a 4-digit decimal number is entered by adjusting pairs of ganged contactors of switches 11-14. The conversion is started by opening a gate 25a when the next positive pulse on line 30 triggers bistable flip-flops 26 to open gate 29. The following negative pulses on 30 are inverted and pass via gate 29 to produce positive pulses on line 31b which are transmitted to one of lines 33-36 selected by resistor matrix 32 controlled by bistable cascade-connected flip-flop circuits 39, 40. Initially, line 33 is selected, whereby each pulse is passed through contactors 10b of switch 11 and cathode follower 19 to enter 1,000 in the accumulator, and also steps on a 4-stage binary counter 47 whose outputs control a resistor matrix 100 so that lines 1-9 in succession are marked with a positive potential. Thus, when a number of pulses corresponding to the entered digits have been passed through 19, the line connected to switch contactor 10a is rendered positive and gate 501 is opened to allow the next positive pulse from 30 to pass via delay circuit 502 to counter-reset line 63 and to line 50b and the input of circuit 40 to cause matrix 32 to select line 34. The pulses on 31b are then passed to 20 to effect similar operations for the next lower digit, and so on. If any digit is zero, the first pulse to the associated switch is passed directly to by-pass line 603 (see contactor 13b) and circuit 502, to switch matrix 32 immediately to the next lower order. When the 4 digits have been converted and circuits 39, 40 are returned to the initial state, a pulse is applied via line 53, delay 580 and amplifier 581 to reset flip-flop 26, and via cathode follower 582 and delay 585 to line 28 to clear the accumulator; the output of 582 also opens read-out gates 584 whereby the converted binary number is transferred, e.g. to a storage register. Circuit diagrams are given of parts of the converter (Fig. 2, not shown). The flip-flop circuits and the stages of the accumulator and binary counters comprise Eccles-Jordan type trigger circuits, the gates such as 501 comprise pentodes and the delay circuits such as 502 each comprise a resistance and inductance in parallel in the anode circuit of a pentode gate or a triode.