baber/WOPTO huggingface dataset:
Patent JP-H07218595-A (JP)
Title: Semiconductor integrated circuit device
Inventor: WAKAHARA ATSUSHI
IPC: H01L21/82
Filed: 1994-02-03
Abstract: PURPOSE:To predict the occurrence of deterioration and troubles of a semiconductor integrated circuit device beforehand by installing a deterioration predicting element, whose deterioration proceeds more quickly than other elements used, in a semiconductor substrate, driving the element by the same driving power source for the integrated circuit used, and detecting the degree of the deterioration and displaying it. CONSTITUTION:A deterioration predicting element 112 is produced by depositing aluminum or an aluminum alloy by sputtering and is composed of a linear part and a pair of contact parts. One of the contact parts is connected with a control circuit 103 and the other is connected with a deterioration degree detecting circuit 113. Following a program stored in a program ROW 101, the circuit 103 sends clock pulses out of a clock circuit 110 to the element 112 at the working time of the computing circuit 104. The circuit 113 detects the current value flowing in the stores element 12 and the result in a resistor 105 through a data bus 109. Deterioration judging data is stored in the ROM 101 and by comparing the detected result with the data, the deterioration degree of the element 112 is judged and the result is sent out of an output port 108.
Patent JP-S61172314-A (JP)
Title: Transformer
Inventor: KAMISAKI ISAO
IPC: H01F27/28
Filed: 1985-01-26
Abstract: PURPOSE:To enable to prevent the generation of a layer short-circuit by a method wherein an inclined part is provided on the lead-out part such as the tap lead-out wire and the like of the flange provided for the purpose of splitting the winding part of a bobbin into a plurality of parts, thereby enabling to form a certain space distance between a tap and a coil having the potential higher than that of the tap. CONSTITUTION:A pin terminal 2 is erected on the terminal stand 9b of a bobbin 8. A flange 9a is used to divide the winding part of the bobbin 8, a coil is wound around the bobbin 8, and the lead wire or the tap lead-out wire of the coil are lead out. An inclined part 10 is provided on the tap lead-out part of the flange 9a. According to this constitution, when a tap is led out along the inclined part 10, it is wound around the lead-out wire, the lead-out wire and the coil having the potential higher than that of the lead-out wire do not come into contact with each other, and a certain space interval is formed. As a result, the generation of a layer short-circuit can be prevented, and the improvement in quality and reliability of the transformer itself can be contrived.
Patent JP-S63273479-A (JP)
Inventor: STRAUCH ECKHARD DR
IPC: C12N15/31
Filed: 1988-01-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S63178887-A (JP)
Title: Method for regenerating active carbon for water treatment
Inventor: KASATANI SHIGERU
IPC: B01J20/34
Filed: 1987-01-20
Abstract: PURPOSE:To eliminate the need for removing active carbon from an active carbon adsorption column by biologically oxidizing the org. matter adsorbed to the active carbon to regenerate the active carbon at the time of treating waste water by adsorbing the org. matter contained in the waste water on the active carbon. CONSTITUTION:The waste water is treated by erecting the active carbon 1 which is cylindrical and in which the active carbon 2 is so housed as to close the inside thereof, admitting the waste water contg. the org. matter into the column from above and adsorbing the org. matter on the active carbon. The water contg. microorganisms is press-fed together with the atm. air into the adsorption column 1 from below to oxidize the org. matter adsorbed on the active carbon by the microorganisms at the time of regenerating said active carbon. As a result, the need for the operation to remove the active carbon 2 from the adsorption column 1 is eliminated and the workability is thereby improved; in addition, the cost is reduced as the need for special equipment is obviated.
Patent JP-S62169762-A (JP)
Title: Manufacture of cholecalciferol derivative and intermediate therefor
Inventor: EFUREI SUTERURINGU
IPC: C07C401/00
Filed: 1987-01-20
Abstract: A novel process for the stereospecific prepa­ration of a 24(R),25- and 24(S),25-dihydroxycholecalci­ferol. Also provided are novel intermediates used in the above process, being 22-p-toluenesufonyl deriva­tives of 23,24,25,26,27-pentanorcholecalciferol and of 24(R)- and 24(S),25-dihydroxycholecalciferol.
Patent JP-H08203894-A (JP)
Title: Fabrication of semiconductor device
Inventor: YAMANE CHIGUSA
IPC: H01L21/318
Filed: 1995-01-30
Abstract: PURPOSE: To obtain a method for fabricating a semiconductor device in which P-SiN can be deposited, as the final protective film, on the surface of a substrate having level difference while lowering the stress without causing any damage on the composition or a semiconductor element. CONSTITUTION: In the method for fabricating a semiconductor device, an interlayer insulation film or a final protective film is formed on the irregular surface of a substrate 51 where a semiconductor element part is formed. The protective film is formed by depositing SiN 54 by plasma CVD using a silane based compound and nitrogen or a nitrogen compound as a material and then irradiating the SiN 54 with UV-rays. Deposition of SiN and irradiation with UV-rays may be repeated a plurality of times.
Patent JP-H04247390-A (JP)
Title: Semiconductor memory
Inventor: KONDO HIDEAKI
IPC: G11C11/413
Filed: 1991-02-01
Abstract: PURPOSE:To realize low power consumption and the simplification of a circuit. CONSTITUTION:A first means A generates a write column selection signal (a) in a write operation, and outputs it to a write column selection gate 2 as write column selection gate input (e) corresponding to a write transfer timing control clock (c). A selected write column selection gate 3 is turned on, and an inputted serial data is converted to parallel data at a serial-parallel conversion part 3, and is transferred to a memory cell array 1 via the write column selection gate 2. A second means B generates a read column selection signal (b) in a read operation, and outputs it to a read column selection gate 4 as read column selection gate input (f) corresponding to a read transfer timing control clock (d). A selected read column selection gate 4 is turned on, and the parallel data is transferred from the memory cell array 1 to a parallel-serial conversion part 5 via the read column selection gate 4, and it is outputted after being converted to the serial data.
Patent JP-H07196019-A (JP)
Title: Car washing machine
Inventor: TAKEUCHI SHIGEO
IPC: B60S3/06
Filed: 1994-01-11
Abstract: PURPOSE:To uniformly wash a car body without any damage to a painted surface by constituting a washing body of a car washing machine with a water repellent soft cloth or a water-proof soft cloth. CONSTITUTION:The side, to be fixed to a rotating body 20, of a washing body 1 is constituted with a water repellent soft sheet or a water-proof soft sheet. An upper brush 116 comprising a rotating brush 1A of a washing body 1 is rotated with a brush driving motor 109 supported to a pair of carriages, a tip 2 of the washing body 1 is brought into contact with the surface of a car body J with somewhat slant, and a rotating body 20 is driven. A pair of carriages 103 are guided up and down by a guide rail 102 to wash the surface of the car body J. The painted surface on the car body J is not damaged during washing and uniform washing is provided.
Patent JP-H11209855-A (JP)
Title: Valve seat made of fe-base sintered alloy, exhibiting excellent wear resistance under high plane pressure
Inventor: SAKURADA TORU
IPC: F01L3/02
Filed: 1998-01-26
Abstract: PROBLEM TO BE SOLVED: To provide a value seat made of Fe-base sintered alloy, exhibiting excellent wear resistance under high plane pressure. SOLUTION: The valve seat is constituted of an Fe-base sintered alloy which has an overall composition consisting of, by weight, 0.7-1.4% C, 0.2-0.9% Si, 15.1-26% Co, 6.1-11% Mo, 2.6-4.7% Cr, 0.5-1.2% Ni, 0.2-0.7% Nb, and the balance Fe with inevitable impurities, a structure where hard grains of a wear resistant Co-base alloy composed of Co-Mo-Cr alloy are dispersedly distributed in a matrix of alloy steel by 10 to 24 area % from the observation on the photograph of a structure under an optical microscope, and 5 to 15% porosity. Further, the valve seat is constituted of the above Fe-base sintered alloy into which copper or copper alloy or lead ro lead alloy is infiltrated, if necessary.
Patent JP-S63181589-A (JP)
Title: Video signal converting circuit
Inventor: ABE HIDEYUKI
IPC: H04N9/74
Filed: 1987-01-23
Abstract: PURPOSE:To obtain a brightness and darkness gradation display signal by storing respectively color picture element signals in a memory circuit, and reading the storing information of the respective memory circuits with a fixed ratio in time to form the brightness and darkness display signal. CONSTITUTION:A data input circuit DIB receives the color picture element signals R(red), G(green) and B(blue) inputted synchronously with a clock signal CL and transfers to the memory circuits M0(R), M1(G) and M2(B) respectively through a data bus DBI. In a reading operation, a chip selecting signal generating circuit CSG is used in order to obtain the brightness and darkness gradation weighted correspondingly to color data. Namely, one gradation cycle is constituted of plural frame cycles in a liquid crystal display panel to weight in time red data R, green data G and blue data. In such a way, the color picture element signals are respectively stored in the memory circuits M0-M1, the storing information of the respective memory circuits is read under the fixed ratio in time of form the brightness and darkness display signal.
Patent JP-H02193361-A (JP)
Title: Digital signal reproducing device
Inventor: SAWADA KANAME
IPC: H04N1/409
Filed: 1989-01-20
Abstract: PURPOSE:To obtain a high fidelity regenerative signal by adding a threshold generating circuit and a comparator to a gate circuit. CONSTITUTION:A binary changing point of an input signal S2 is detected by a differentiation circuit 1 to become a differential output S5, which is then compared with a threshold S7 by a setter 3 to output a binarized differential signal S6. A DC component of the signal S2 detected by a DC component detecting circuit 7 and an offset value by a setter 9 are added up, and a threshold S9 which is varied by the DC component is outputted, and then compared and binarized by the comparator 6 with the signal S2 to output a signal S10. When the signal S10 is H, a differential pulse of the signal S6 is inputted via an AND gate 4 to an inversion circuit 5, and when the signal S10 is L, the differential pulse of the output S6 is interrupted by the circuit 4 not to reach the circuit 5, so that false differential pulse is not inputted to the circuit 5. Whenever the pulse is inputted to the circuit 5, a shaping output signal S12 obtained by binarizing the signal S2 is inverted. By this method, a high fidelity regenerative signal can be obtained.
Patent JP-H10205960-A (JP)
Title: Supercooler
Inventor: ITO KATSUNORI
IPC: F25D13/00
Filed: 1997-01-27
Abstract: PROBLEM TO BE SOLVED: To effectively prevent the release of the supercooled condition by forming a supercooled condition release preventive and frosting preventive layer on a flowing water face of a supercooled water flow passage in which the supercooled water flows. SOLUTION: A supercooled condition release preventive and frosting preventive layer 35 is formed on a flowing water side of a raw water main 23 of a double-pipe type supercooler 6, a plurality of raw water mains 25 of a shell and tube type supercooler 6, or a supercooled water flow passage 21 of the supercooler 6 of a water flow gutter 27 of the gutter type supercooler 6. The preventive layer 35 is made of the water-repellent polymer resin, the polymer resin dissolved in the solvent flows over the whole flowing water side of the supercooling water flow passage 21, and then, the solvent is evaporated to dry the resin.  When the supercooled water 5 which is energetically unstable flows on the flowing water face of the supercooled water flow passage 21, the preventive layer 35 suppresses the stimulus to release the supercooled condition against the supercooling water 5, ice is generated in the supercooled water flow passage 21, and the supercooled water flow passage 21 is effectively prevented from being blocked with ice.
Patent JP-H11210047-A (JP)
Title: Water failure detection method for automatic discharge mechanism type water closet
Inventor: SUZUKI MASATO
IPC: E03D5/10
Filed: 1998-01-26
Abstract: PROBLEM TO BE SOLVED: To prevent a bowl from emptying by securing sealing water even when a discharge operation is input during water failure. SOLUTION: A pressure sensor 10 is provided at the primary side of a solenoid valve 8, and is electrically connected to a control section 9. The water pressure inside the water supply passage during initial water application until the rotation of a movable trap is detected by a pressure sensor, its change is monitored by a control section, the control section detects a water failure if the change in pressure is judged to be caused by the water failure, and the rotation of the movable trap is stopped based on the detection of the water failure.
Patent JP-S60156181-A (JP)
Title: Seal stamp collating device
Inventor: TERADA HIROSHI
IPC: G06T7/00
Filed: 1984-01-26
Abstract: PURPOSE:To decrease the variation of the decision criterion by displaying a registered seal stamp and a seal stamp to be collated on a same display device, superimposing them and discriminating the result by visual inspection, measuring automatically the degree of superimposition of both seal stamps in addition, and displaying the result after numeric representation. CONSTITUTION:Both memory planes of a memory circuit 7 and a memory circuit 8 are superimposed completely so as to display the registered seal stamp data stored and the seal stamp data to be collated are displayed on a CRT16. Since the display color of the registered seal stamp is red and the display color of the seal stamp to be collated is green, the overlapped part of both the seal stamps is displayed in yellow, and the dentity and difference of both the seal stamps not overlapped actually are discriminated by visual inspection on the contrary the intension to display in the completely overlapping state. A collation rate operating circuit 14 operates the collating rate based on the output of counters 10, 11, 12. The collation rate to be operated is expressed as 2C/(A+B), where A is the number of picture elements of the registered seal stamp, B is the number of picture elements of the seal stamp data to be collated and C is the number of picture elements coincident with each other.
Patent JP-H08199530-A (JP)
Title: Cyclopean block and cyclopean block revetment
Inventor: SASAKI KUNITAKA
IPC: E02B3/14
Filed: 1995-01-30
Abstract: PURPOSE: To obtain the vegetation of the face of a slope and a fish nest on a river-bed section and the purification function of water, and to enable matching with natural environment by combining and using natural stone and a cyclopean block. CONSTITUTION: A cyclopean block 1, in which projecting sections 9 having a huge stone patter are formed continuously to a crosswise crossed concrete base section body 8, is manufactured, and the blocks 1 are laid and arranged on the face of a slope of a river and a river-bed surface 26. The inside of the frame is filled with natural stone such as a cobble-stone, and a cyclopean block revetment breeding a natural waterside space having vegetation, a fish nest and the purification function of water is constructed.
Patent JP-H09202555-A (JP)
Title: Elevator car
Inventor: TANI NOBUKAZU
IPC: B66B3/00
Filed: 1996-01-29
Abstract: PROBLEM TO BE SOLVED: To cause the speaker of an interphone slave device to also serve as the speaker of a voice synthesizing device. SOLUTION: A car for an elevator comprises an interphone slave device 10 connected to an interphone parent device 11; a voice synthesizing device 9 to announce a synthesized voice from the interphone slave device 10; and a button switch pressed to output a signal from the interphone slave device 10 to the interphone parent device 11. When the button switch is depressed and the receiver of the interphone parent device 11 is picked up, the interphone slave device 10 and the interphone parent device 11 are interconnected. When the button switch is not depressed or the receiver of the interphone parent device is put back, the interphone slave device 10 is connected to the voice synthesizing device 9.
Patent JP-H03219600-A (JP)
Title: Electron beam monitor device of synchrotron
Inventor: OGAWA TAKAFUMI
IPC: H05H13/04
Filed: 1990-01-24
Abstract: PURPOSE:To monitor the cycling of an electron beam without using a rabbit current transformer by detecting the variation in current of an ion sweeping electrode. CONSTITUTION:At the time of initial adjusting operation before starting the operation of a synchrotron orbital radiation(SOR), the wiring 16 of an ion sweeping electrode 10 is connected to an electron beam detection circuit 19 by a switching circuit 17. When an electron beam is injected in the synchrotron 1 in this condition, the electron beam is deflected by a deflecting magnet 4 inside the synchrotron 1, and is cycled. At the time of the cycling of the electron beam, when it passes over the electrode 10, a current corresponding to that of the beam flows in the electrode 10. The current is input to the circuit 19 through the wiring 16 and the circuit 17, and the cycling of the electron beam is monitored thereby. After the adjustment is carried out so that the electron beam may be stably cycled, the circuit 17 is changed over, and negative voltage of a power supply 18 is given to the electrode 10, so as to perform SOR operation. The cycling of the electron beam can thus be monitored without using a rabbit current transformer(RCT).
Patent JP-H08205574-A (JP)
Title: Digital servo device
Inventor: NAKATSUKA TAKASHI
IPC: H02P5/54
Filed: 1995-01-30
Abstract: PURPOSE: To hold the balance of control response, by outputting signals for equalizing and synchronizing the period of a plurality of controllers performing positional control with the period of a computer instructing the controllers on their operational desired values. CONSTITUTION: A computer 1 computes positional instructions equivalent to the rotational-angle instructions of motors 5a-5c whereinto the movement- quantity for moving a machine to its desired position is broken down, and the computer 1 writes the positional instructions in memories 2a-2c concurrently. By the positional instructions written in the memories 2a-2c, controllers 3a-3c compute motor drive PWM-singals concurrently. Then, responding to these PWM-singals, switching transistors 4a-4c are driven, and the positional controls of the motors 5a-5c are performed. Further, a positional-period generator 6 outputs the signal for synchronizing the writing of the positional instructions in the memories 2a-2c by the computer 1 with the reading-in of the positional instructions from the memories 2a-2c by the controllers 3a-3c.  Thereby, the balance of the responsivenesses of the positional controls can be held among the controllers 3a-3c, and hence, the accuracy of the end-locus of a robot can be improved.
Patent JP-S58131127-A (JP)
Title: Solubilizing agent good in temperature resistance and method therefor
Inventor: SHINODA KOUZOU
IPC: C09K23/00
Filed: 1982-01-29
Abstract: PURPOSE:To obtain a solubilizing agent good in temp. resistance and high solubilizing capacity, by preparing the solubilizing agent for a liquid detergent or a rinse from an ionic surfactant, a nonionic surfactant and an electrolyte. CONSTITUTION:A solubilizing agent substantially consists of an ionic surfactant, a nonionic surfactant and an electrolyte. This solubilizing agent is used within a range of about 0.1-15.0wt% to about 99.8-0.1wt% oil component and about 0.1-99.8wt% water and, by this method, a uniform liquid layer good in temp. resistance is obtained.
Patent JP-S61171601-A (JP)
Title: Auxiliary non-skid tire
Inventor: ENDO SHUJI
IPC: B60B15/04
Filed: 1985-01-28
Abstract: PURPOSE:To prevent possible damages to roads and environmental pollution by arranging an auxiliary tire on the lower surface of a suspension device so that it may be housed in apart from an ordinary tire when not in use but it may rotate while it comes in contact with the ordinary tire when it is in use. CONSTITUTION:A non-skid auxiliary tire 4 is fixed with a bolt 19 while it is in a suspended configuration when it is in use. This allows the auxiliary tire 4 to come in contact with the shoulder of an ordinary tire 4 linked with the movement of the ordinary tire 1 permitting a non-skid effect to be accom plished. When not in use, the auxiliary tire is swung forward as shown by a dot-dash line with the bolt 19 removed and then is fixed with a bolt 20. This configuration enables the auxiliary tire to be used only when required so as to prevent possible damages to roads and environmental pollution.
Patent JP-S61170896-A (JP)
Inventor: KUBO MASANORI
IPC: G08B21/00
Filed: 1985-01-25
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S59139284-A (JP)
Inventor: NIIYAMA KICHIHEI
IPC: A63F7/02
Filed: 1983-01-31
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S62171031-A (JP)
Title: Firmware protecting device
Inventor: OKUBO TADASHI
IPC: G06F21/62
Filed: 1986-01-23
Abstract: PURPOSE:To prevent firmware from being used illegally without making an I/O circuit complicate by providing at least one CPU, a main memory part, an instruction ciphering decoder circuit and an instruction ciphering key circuit outputting instruction ciphering decoding signals. CONSTITUTION:For executing a program, the CPU 1 supplies an instruction fetch control signal regarding instructions inputted from the ROM 4 of the main memory part MM 2 to the instruction ciphering decoder circuit 5 through an instruction fetch control line 8 to set the circuit 5. An instruction ciphering key circuit control signal is supplied to the instruction ciphering key circuit 6 from the CPU 1 through a circuit control line 9 to set the circuit 6. Whenever instructions are inputted to the circuit 5, the circuit 6 supplies the instruction ciphering decoding signal through an instruction ciphering decoding circuit activation line 10. The circuit 5 decodes a ciphered program, and supplies it to the CPU 1 through a data bus 7. Then the CPU 1 executes the instruction.
Patent JP-H06252226-A (JP)
Title: Testing method of integrated circuit chip
Inventor: ANIRUKUMARU CHINUPURASADO BATS
IPC: G01R31/28
Filed: 1994-02-07
Abstract: PURPOSE: To provide simulated site test and actual site test for integrated circuit chip by providing a contact corresponding to the contact of semiconductor chip and defining the contact of carrier as a chip carrier having a dendrite surface. CONSTITUTION: A semiconductor circuit chip is placed on a board or a test jig while facing a connector on the board. The board or jig has the dendrite in structure including a conductive pad or substrate, smooth Pd lower layer and upper layer such as a pole-shaped Pd layer on the connecting plane, contact or pad of chip. Then, the chip and the board are contacted and compressing force is applied to the chip and the board. Afterwards, various logic tests and memory tests are performed to the integrated circuit chip while applying power between the input and the ground, and unsuccessful chip is discarded but the successful chip is bonded to the board between the bonding pad and the dendritic surface.