Patent GB-868239-A (GB)
Title: Magnetic amplifier circuit having a plurality of control inputs
Inventor: BONN THEODORE HERTZ
IPC: H03K19/16
Filed: 1957-07-25
Abstract: 868,239. Controlled non-linear inductors. SPERRY RAND CORPORATION. July 25, 1957, No. 23586/57. Class 40 (9) [Also in Group XIX] A gating or switching arrangement comprises a plurality of magnetic amplifiers of the resetting type connected to separate signal sources, each amplifier including a circuit for limiting the potential developed in its output winding, while the output windings are connected to a fixed bias which permits the application of an output to a load only when a plurality of input signals are received. Several of the embodiments utilize the complementing type of resetting magnetic amplifier shown in Fig. 1, in which power and control windings 18, 21 on a ferrite, orthonik or molypermalloy core 10 are energized alternately from power and signal sources 16 and 20 in the time positions shown in Fig. 3. In operation, power winding 18 normally presents a low impedance to the power pulses so that effective output pulses pass to a load 19. If, however, a signal pulse such as A, Fig. 3, is applied to winding 21, the core magnetization is reversed and winding 18 has a high impedance for the duration of the next power pulse. In consequence this power pulse is ineffective as no output B appears at the load. The small magnetizing current effecting' flux reversal during the zero output period is prevented from passing to the load by a biasing circuit comprising resistor 24, rectifier 25 and a negative voltage source 23. Synchronism between the power and signal sources is effected over circuit 26, while the negative portions of the alternating power pulses are utilized to block rectifier 17. A gating circuit is described, Fig. 5, in which signals from sources SS-1 to SS-4 must be applied simultaneously to control-windings 81a-84a on individual cores to produce an output pulse in a load 89. Power energization is supplied by a source 80, which is connected to power windings 81-84 and induces voltages in output windings 85-88 only when the respective cores have previously had their magnetizations reversed by control winding energization. Simultaneous outputs from all four windings are necessary to overcome the bias of a source 89a, in which case an output pulse passes to a complementing amplifier 10 of the kind shown in Fig. 1. The output pulse may alternatively be applied directly to the load, Fig. 4 (not shown). The alternating waveforms of the pulses PP-1 and PP-2 applied to the power and signal circuits, respectively, are shown in Fig. 8, rectifiers being connected in series with each source so that only positive pulses are effective. The output from each power winding may be limited to a predetermined voltage value by circuits comprising rectifiers 85a, 86b and 87b and biasing voltages 86a and 87a, the biasing voltages having respective negative potentials of E and 2E in relation to the 3E potential of bias source 89a. In a modification, Fig. 6 (not shown), a complementing magnetic amplifier is connected between each signal source SS-1 to SS-4 and its respective control winding 81a-84a. A further modification, Fig. 7, provides automatic resetting of the cores by a battery 71 and resistor 70 circuit-connected to each control winding, the resetting action being inhibited whenever the associated signal source SS-1 to SS-4 is effective. This arrangement normally produces voltages in the output windings such as 85, these outputs terminating when control windings are energized by signals. Another circuit is described, Fig. 9, in which signal sources SS-1 to SS-3 must be inoperative simultaneously for an output pulse to be produced in a load 94. As shown, the arrangement is energized by alternating power pulses PP of which only the positive half-cycles are operative in parallel windings 91-93, each winding comprising the power winding of a complementing amplifier of the kind shown in Fig. 1. A resistor 96-98 is connected in series with each winding 91-93 and simultaneous output power pulses must be obtained from the amplifiers to overcome a bias comprising a source 99a in association with resistor 99b and rectifier 99c. The output voltage from each amplifier is limited by a circuit comprising rectifiers 95a-95c and a voltage source 95. Pulse transformers 100- 102 producing rectangular waveform outputs are used in place of magnetic amplifiers in a modified circuit, Fig. 10, in which embodiment the signal sources SS-1 to SS-3 constitute the only sources of power energization. Pulse transformers may also be used instead of magnetic amplifiers in a modification of the Fig. 4 arrangement, Fig. 11 (not shown). A non- complementing type of magnetic amplifier is also used in certain embodiments, Fig. 12. As shown, power PP and control SS pulses are applied alternately to windings 122 and 125 respectively. In the absence of control pulses, the core is automatically reset by a bias voltage - V which acts over rectifier 126, resistor 123 and winding 122. This winding thus presents a high impedance to each power pulse in a continuous pulse train transmitted by source 120. If, however, a control pulse is applied to the control winding 125, the resetting action of the bias is neutralized and winding 122 presents a low impedance to the next power pulse. Two magnetic cores, Fig. 15, having power, output and control windings 173, 174; 170, 171 and 177, 178 may constitute a coincidence gate in a half-adder circuit. As shown, the binary signals to be added are applied to leads 130, 131 and the sum output in complementary form is obtained on lead 137 by way of non-complementing magnetic amplifier 162 and complementing amplifier 135. A carry output is obtained on lead 139b when both inputs 130, 131 are pulsed simultaneously, in which case the bias 172 of the gate is overcome by the induced voltages in windings 170, 171 and their output applied to non-complementing amplifier 139. The two amplifying stages in the sum circuit, and the gating and amplifying stages in the carry circuit, are pulsed alternately by staggered power pulses PP-1 and PP-2. An alternative half-adder circuit comprises two cores 192, 193 having their windings interconnected as shown in Fig. 19, the binary input pulses being applied to leads 190, 191, and the sum and carry outputs obtained on leads 199 and 200 respectively. Both cores are subjected to power pulses from a source PP over windings 192b, 193b and have respective input windings 192a, 193a. The carry output circuit comprises output windings 192e, 193e on each core and is biased by a source 194 so that coincident inputs are required to obtain a carry output pulse. The sum output circuit comprises parallel output winding pairs 192c, 193c and 192d, 193d, the windings of each pair being connected in series opposition so that a sum output is obtained only when a single core is subjected to an input pulse. No output is obtained on either lead 199, 200 in the complete absence of input pulses. The output voltage developed by core 192 is limited by winding 180 and its biased rectifier 182, while similar limitation for core 193 utilizes the existing bias source 194 and a rectifier 189. A modification is described in which voltage limitation is effected by biased rectifiers connected to the sum and carry output leads, Fig. 21 (not shown). A further coincidence circuit is shown in Fig. 17 in which each core has three output windings such as 170c, 170d, 170e. One output winding 170c, 171c, 172c on each core is series-connected with a load 173 and a biased rectifier 173a, the voltage of the bias source 173b being such that pulses from all the signal sources SS-1 to SS-3 must be applied simultaneously for the combined output voltage to overcome the bias and establish output current. The remaining output windings form series groups of two, each group being connected to separate loads 174, 175, 176 by way of biased rectifiers 174a, 175a, 176a. The biasing potentials are equal and are of such value that a selected load is energized in accordance with the simultaneous application of two out of three signal pulses. A further winding short-circuited by a biased rectifier may be included on each core to limit the voltage induced in each output winding, Fig. 18 (not shown). Specifications 868,236 and 868,238 are referred to.