baber/WOPTO huggingface dataset:
Patent TW-507277-B (TW)
Title: Liquid-phase growth method, liquid-phase growth apparatus, and solar cell
Inventor: NAKAGAWA KATSUMI
IPC: C30B19/06
Filed: 2000-09-20
Granted: 2002-10-21
Abstract: The present invention provides a method for producing a semiconductor substrate which comprises the steps of growing a first semiconductor layer on a substrate in liquid phase at a properly controlled temperature for eliminating defects and growing a second semiconductor layer on the first semiconductor layer in liquid phase at a higher temperature; a solar cell produced by a method comprising a step of anodizing the surface of the first and second layer side of the semiconductor substrate produced by the liquid-phase growth method; a liquid-phase growth apparatus comprising means for storing a melt, means for changing the temperature of the stored melt, and means for bringing an oxygen-containing substrate into contact with the melt, wherein a substrate is brought into contact with the melt at a temperature so as to suppress the stacking faults in the semiconductor layer grown on the surface of the substrate.
Patent TW-461104-B (TW)
Title: Solid state imaging device and fabrication method thereof
Inventor: NAKASHIBA YASUTAKA
IPC: H04N5/335
Filed: 2000-09-21
Granted: 2001-10-21
Abstract: There is encountered a problem of a conventional solid state imaging device that microlenses formed at a lower part are dissolved into solvent, deformed or stripped because materials on bonding pads are removed by photoetching after formation of microlenses and then photoresist, used as a mask, is removed using the solvent. In accordance with the present invention, since the upper part of a planarization layer 14 is flush with the upper part of a fourth metallization 12 serving as bonding pads, a photoetching step for removing materials on bonding pads is not required and thereby fabrication yield is prevented from lowering due to dissolution, deformation or stripping of microlenses.
Patent TW-488196-B (TW)
Title: Wire electric discharge machining method and device
Inventor: SATOU SEIJI
IPC: B23H7/02
Filed: 2000-10-27
Granted: 2002-05-21
Abstract: The present invention provides a wire electric discharge machining method and device. On at least one time point of performing machining in a combination of at least two of the three types of process, machining in the machining liquid (4a), machining in a mist (7), and machining in a gas (8), before the start of machining except that in a machining liquid (4a), and after the operation of the automatic wire connecting device (20) for performing automatic wire connecting operation by holding a wire electrode (1a) by a water column, the machining liquid nozzles (13a, 13b), which are provided as pressurized gas spouting means designed for switching the feed fluid between the machining liquid (4a) and the pressurized gas (12) are used to remove the liquid such as the machining liquid (4a) deposited to the work (2) and the liquid deposited to the machining liquid nozzle (13a) or the like and liable to drip onto the machined surface of the work (2). Since full use of the intrinsic characteristics of each machining can be made, a highly reliable, wire electric discharge machining method and device, suitable for precision machining, can be obtained.
Patent TW-467797-B (TW)
Title: Chemical mechanical polishing tool components with improved corrosion resistance
Inventor: DYER TIMOTHY S
IPC: B24B37/20
Filed: 2000-11-03
Granted: 2001-12-11
Abstract: Components of chemical, mechanical, polishing apparatus with components resistant to chemical attack by chemical slurries used in the polishing of semiconductor wafers. Among the components that are improved to enhance resistance to chemical attack are the polishing platen, pad conditioning end effectors, various subassemblies, housing for instrumentation, carrier rinse station surfaces, and other components that come into contact with a slurry. The coating compositions are preferably tightly adherent to the underlying substrate, and may be applied by a wide range of techniques. Especially useful are coatings such as tungsten carbide, tungsten nitride, amorphous diamond like carbon, and other such inert wear resistant coating.
Patent TW-543000-B (TW)
Title: Microprocessor with improved instruction set architecture
Inventor: HOYLE DAVID
IPC: G06F9/355
Filed: 2000-11-15
Granted: 2003-07-21
Abstract: A data processing system on an integrated circuit 42 with microprocessor 1 and peripheral devices 60-61 is provided with an emulation unit 50 which allows debugging and emulation of integrated circuit 42 when connected to an external test system 51. Microprocessor 1 has in instruction execution pipeline that has several execution phases that involve fetch/decode units 10a-c and functional execution units 12, 14, 16 and 18. The pipeline of microprocessor 1 is unprotected so that memory access latency to data memory 22 and register file 20 can be utilized by system program code which is stored in instruction memory 23. Multi-field arithmetic/logic unit (ALU) circuitry (L1, L2, S1, S2) is provided for operating on a set of source operands to form a multi-field destination operand by treating the plurality of source operands as a set of N1 fields, such that the multi-field result includes N1 results corresponding to the set of N1 fields. Multi-field multiplication circuitry (M1, M2) is provided for operating on a set of source operands to form a multi-field destination operand by treating the plurality of source operands as a set of N2 fields, such that the multi-field result includes N2 results corresponding to the set of N2 fields. An instruction set architecture (ISA) is provided that is optimized for intensive numeric algorithm processing and includes a set of single instruction, multiple data (SIMD) instructions to direct the operation of the multi-field ALU circuitry and the multi-field multiplication circuitry. Non-aligned data transfer to data memory (D1, D2, 22) can be performed for byte, half word, word, and double-word data items.
Patent TW-525108-B (TW)
Title: Markings on transparent plastic
Inventor: DARR GERHARD JOERGEN
IPC: B32B3/30
Filed: 2000-12-08
Granted: 2003-03-21
Abstract: A marking on a transparent plastic member is formed by an array of uniform protrusions on the rear side of the transparent plastic member.
Patent TW-495698-B (TW)
Title: Manufacture method for computer system
Inventor: LIN JIAN-SHIUN
IPC: G06F9/445
Filed: 2000-12-27
Granted: 2002-07-21
Abstract: Provided is a manufacture method for computer system. The computer dealer receives the order from the customer. The order which includes a list of hardware components and a list of software components is for ordering a computer. The computer dealer would send the list of hardware components to a computer manufacturer who would combine the assigned hardware components in the list of hardware components. The computer dealer would pre-install the assigned software components in the list of software components into a storage medium. The computer manufacturer and dealer would respectively deliver the hardware components combined and the software components pre-installed to the customer. The customer would install the store medium into the hardware combined to complete assembling of the computer.
Patent TW-I233850-B (TW)
Title: A hardening flex, a soldering resist, a semi-conductor package and a semi-conductor device reinforced by said hardening flex, as well as a manufacturing method for said semi-conductor package and semi-conductor device
Inventor: HOSOMI TAKESHI
IPC: H01L21/60
Filed: 2001-01-16
Granted: 2005-06-11
Abstract: The invention is to provide a hardening flux, a soldering resist, a semi-conductor package and a semi-conductor device reinforced by said hardening flux as well as a method for manufacturing said semi-conductor package and said semi-conductor, in which, said semi-conductor package is jointed with a semi-conductor mounting substrate by a solder, and is hardened by heating after soldering, thereby acting as a reinforcing material for the soldered portion. A hardening flux which acts a flux during soldering, then as a reinforcing material for a soldered portion after hardening by heating, a semi-conductor package, of which a soldering ball jointed portion is reinforced by coating a soldering resist and said hardening flux on an exposed surface of a circuit and hardening said flux by heating after jointing of the soldering ball; a semi-conductor device, of which a soldering ball jointed portion is reinforces by coating said hardening flux on a semi-conductor mounting substrate having a soldering land, and hardening said flux by heating after soldering; as well a manufacturing method for said package and said device.
Patent TW-479318-B (TW)
Title: Manufacturing method of shallow trench isolation structure
Inventor: LI TZUNG-HAN
IPC: H01L21/76
Filed: 2001-02-06
Granted: 2002-03-11
Abstract: A manufacturing method of shallow trench isolation structure is disclosed, which comprises forming a pad oxide layer on the substrate, and forming a hard mask layer on the pad oxide layer; then forming and defining a photoresist layer on the hard mask layer; etching the hard mask layer and the pad oxide layer by the photoresist layer, and etching down to the substrate to form a trench; then removing this photoresist layer; forming a liner oxide layer on the surface of the trench; forming a thin film layer which can form many and dense dangling bonds on the substrate; then forming an insulation layer covering the substrate and filling the trench; then proceeding a thermal process to solidify the insulation layer; afterwards, removing the insulation layer on the hard mask layer; and finally, removing the hard mask layer and the pad oxide layer.
Patent TW-589605-B (TW)
Title: Display device
Inventor: VAN VELZEN JEROEN
IPC: G09G3/3283
Filed: 2001-02-21
Granted: 2004-06-01
Abstract: Rise time in matrix_LED displays is decreased by providing extra current via capacitive (37) of column electrodes (12) to a circuit (39) providing peak currents.
Patent TW-510105-B (TW)
Title: Authenticated dynamic address assignment
Inventor: MEDVINSKY ALEXANDER
IPC: H04L29/12
Filed: 2001-03-06
Granted: 2002-11-11
Abstract: A method for an uninitialized client to obtain credentials from a server which are then used to provide authenticated exchange for network configuration parameter assignment. The obtained credentials can be applied to an authentication option when a dynamic host configuration protocol (DHCP) is being used for address assignment.
Patent TW-I222076-B (TW)
Title: Memory testing method and memory testing apparatus
Inventor: OSHIMA HIROMI
IPC: G11C29/44
Filed: 2001-05-01
Granted: 2004-10-11
Abstract: A memory testing method and apparatus are provided, which can test in short time a flash memory. In case of testing a flash memory having block function, in a memory testing method and apparatus in which a predetermined logical value is written into memory cells constituting each of blocks of the memory, the written logical value is read out from the memory cells to compare it with an expected value. When the read-out logical value and the expected value do not coincide with each other, such memory cell is determined to be a failure memory cell. When the number of failure memory cells in each block reaches a predetermined number, such block is determined to be a bad block, and the test of such block is stopped. In addition, when the number of failure memory cells on the same address line reaches a predetermined number, such address line is determined to be a bad address line, and after such decision has rendered, the test of memory cells on the bad address line is substantially not affected.
Patent TW-550914-B (TW)
Title: Automatically delaying client responses to broadcast uniform resource locators
Inventor: KINDER DAVID B
IPC: H04N7/173
Filed: 2001-05-08
Granted: 2003-09-01
Abstract: A client side system (14) reduces overloading of web servers (18) that experience excessive loads in response to widely distributed information about services or products available through the web server (18). The client side system (14) may delay the accessing of the web server (18). For example, instructions may be added to the uniform resource locator (22) distributed for the server over a television broadcast. These instructions may be utilized by software resident on the client side system (14) to delay the accessing of the server (18) to reduce server (18) overloading.
Patent TW-503579-B (TW)
Title: Semiconductor device and manufacturing method thereof
Inventor: OTA KAZUNOBU
IPC: H01L29/78
Filed: 2001-06-19
Granted: 2002-09-21
Abstract: An object is to provide a semiconductor device having an insulated-gate transistor which operates at high speed with low power consumption and a manufacturing method thereof. Two source/drain regions (9) are selectively formed in the surface of a transistor formation region in a Si substrate (1), a stacked gate insulating film (25) is formed on the channel region between the source/drain regions (9,9) in the Si substrate (1), and a gate electrode (3) is formed on the stacked gate insulating film (25). The stacked gate insulating film (25) has a three-layer structure composed of a HfSiO2 film (21), a HfO2 film (22) and a HfSiO2 film (23) each having a higher dielectric constant than SiO2. The HfSiO2 film (21) is less reactive than the HfO2 film (22) at the interface with the Si substrate (1) and the HfSiO2 film (23) is less reactive than the HfO2 film (22) at the interface with the gate electrode (3) (polysilicon layer (4)).
Patent TW-482860-B (TW)
Title: Engine starting system
Inventor: ONO YUJI
IPC: F02N11/08
Filed: 2001-06-26
Granted: 2002-04-11
Abstract: An engine starting system is to be provided wherein a noise (starting noise) generated at the time of starting an engine is suppressed low. An engine starting system for driving a starting motor in response to an engine starting operation, comprising start signal generating means 401 to 406 for generating a start signal corresponding to the period of the starting operation, a start signal extending means 407 for extending a start signal Sin shorter than a predetermined reference time to the reference time or linger and outputting the thus-extended signal, and a starter relay 162 which drives the starting motor in accordance with an output signal Sout provided from the start signal extending means 407.
Patent TW-I222890-B (TW)
Title: Game procedure control method, game system, and server
Inventor: NAMBA KAZUHIRO
IPC: A63F13/45
Filed: 2001-07-31
Granted: 2004-11-01
Abstract: Using terminal apparatuses 1A to 1E connected to a server 3 by a network 2, original characters are trained by the game players executing a character training game, and data relating to those original characters are stored in a database 31 in the server 3. When two or more game players directly contest the same game in real time via the network 2, data relating to the original characters of the game players stored in the database 31 are downloaded to the terminal apparatuses 1A to 1E and used as character data.
Patent TW-I256305-B (TW)
Title: Oral fast-melt pharmaceutical composition of a cyclooxygenase-2 inhibitor and process for preparing the same
Inventor: LE TRANG T
IPC: A61K31/341
Filed: 2001-08-17
Granted: 2006-06-11
Abstract: A process is provided for preparing an oral fast-melt composition of a selective cyclooxygenase-2 inhibitory drug, the process comprising (a) a step of wet granulating the drug together with a binding agent comprising a saccharide of high moldability, and (b) a step of blending with the drug a saccharide of low moldability, wherein the above steps (a) and (b) occur in any order or simultaneously to result in formation of granules. The process optionally incorporates means to inhibit agglomeration of the drug, for example addition of a wetting agent. Optionally the process further comprises (c) a step of blending the granules with at least one of a lubricant, a sweetening agent and a flavoring agent to form a tableting blend, and (d) a step of compressing the tableting blend to form oral fast-melt tablets. Also provided is a composition prepared by such a process.
Patent TW-529163-B (TW)
Title: Compact MRAM cell, compact magnetic tunnel junction memory cell, and fabricating method thereof
Inventor: DURLAM MARK
IPC: H01L43/08
Filed: 2001-08-27
Granted: 2003-04-21
Abstract: A method of fabricating an MRAM cell (10) includes providing an isolation transistor (12) on a semiconductor substrate (11) and forming an interconnect stack (13) on the substrate in communication with one terminal of the transistor. A via (14) is formed on the upper end of the stack so as to extend from a position below the digit line (15) to a position above the digit line. The via also extends above the upper surface of a dielectric layer (20) to provide an alignment key. A MTJ memory cell is positioned on the upper surface in contact with the via, and the ends of a free layer of magnetic material are spaced from the ends of a pinned edge of magnetic material by using sidewall spacers and selective etching.
Patent TW-I270158-B (TW)
Title: Method and apparatus for the mounting of semiconductor chips
Inventor: LEU FELIX
IPC: H01L21/00
Filed: 2001-08-29
Granted: 2007-01-01
Abstract: With the mounting of a semiconductor chip (1) onto a substrate (4) having a portion of adhesive (5) the bondhead (3) is lowered to a predetermined height H above a support (6) holding the substrate (4). At the same time, the pick-up tool (2) is fixed in an upper limit position on the bondhead (3). As soon as the bondhead (3) has reached the height H, the fixing of the pick-up tool (2) is released so that the pick-up tool (2) moves downwards from the upper limit position and presses the semiconductor chip (1) onto the adhesive (5). After a predetermined time after releasing the fixing of the pick-up tool (2), the bondhead (3) is raised and moved away. With a bondhead (3) particularly suited for the method, the pick-up tool (2) and the bondhead (3) are connected by means of a chamber (12) to which compressed air and/or vacuum can be applied so that, to a large extent, the movement of the pick-up tool (2) can be controlled.
Patent TW-516981-B (TW)
Title: Method of laser welding
Inventor: DIJKEN DURANDUS KORNELIUS
IPC: B23K26/60
Filed: 2001-09-06
Granted: 2003-01-11
Abstract: Method of laser welding which comprises at least two steps: a first step wherein the laser (10) is operated for some time T1 at low intensity in order to create a melt (31) in one part (12) with little or no evaporation of matter, thereby reducing product contamination, and a further step wherein the laser is operated for a shorter time T2 at high intensity in order to push said melt (31) towards a further part (13), whereby large gaps between said parts can be bridged, yet further reducing product contamination thanks to the low laser energy needed to proceed with the further step. Optionally, a third step is performed during a third period of time (T3) in which the weld is post-heated.
Patent TW-554289-B (TW)
Title: Method and apparatus for booting the operating environment of an autonomous subsystem in a computer based system without involvement of the main operating system
Inventor: HART FRANK P
IPC: G06F9/445
Filed: 2001-09-28
Granted: 2003-09-21
Abstract: A method and apparatus for booting the operating environment of an autonomous subsystem in a computer based system without involvement of the main operating system are described.
Patent TW-570837-B (TW)
Title: Porous film, separator for cell, and cell
Inventor: TAKATA ATSUHIRO
IPC: H01M50/489
Filed: 2001-10-12
Granted: 2004-01-11
Abstract: A porous thermoplastic resin film capable of functioning well as a separator of a cell is provided. The porous film is constituted with a thermoplastic resin and a filler, wherein XR defined by the following formula: XR=25xTGURxd<2>/Y is smaller than 5, where Y (mum), TGUR (sec/100cc), and d (mum) represent the thickness, the gurley value, and the average pore diameter of said film, respectively. The porous film constructed as shown above can reduce the internal resistance of a cell when used as a separator of the cell.
Patent TW-512328-B (TW)
Title: Optical recording medium on which multi-modulated header signals are recorded, method and apparatus for recording header signals and method and apparatus for reproducing header signals
Inventor: LEE HYUNG-KEUN
IPC: G11B7/24082
Filed: 2001-10-16
Granted: 2002-12-01
Abstract: An optical recording medium on which a header signal having multi-modulated header information is recorded, a method and apparatus for recording the header signal, and a method and apparatus for reproducing header information from the header signal are provided. The optical recording medium includes a wobbled track on which user data is recorded, and a header area on which a header signal having multi-modulated header information is recorded. Accordingly, the optical recording medium increases the recording density of header information, thereby providing a wider user data area.
Patent TW-501249-B (TW)
Title: Circuit connection structure of integrated circuit chip and substrate
Inventor: HSIEH YU-TE
IPC: H01L23/28
Filed: 2001-11-09
Granted: 2002-09-01
Abstract: This invention provides a circuit connection structure of an integrated circuit chip and a substrate. Because a non-conductive adhesive is used for connection, there are differences of coefficients of thermal expansion between the non-conductive adhesive and the integrated circuit chip and between the non-conductive adhesive and the substrate and thus thermal stress results during temperature variation. The circuit patterns are coated on the connection surfaces of the integrated circuit chip and the substrate in the present invention, whose coefficient of thermal expansion is intermediate among those of the non-conductive adhesive, the integrated circuit chip and the substrate. It provides buffer of the coefficients of thermal expansion in the connection region to reduce impact of the generated thermal stress due to the differences in the coefficients of thermal expansion and can increase adhesion surfaces of the integrated circuit chip and the substrate and thus enhance adhesion to pass strict reliability test.
Patent TW-577152-B (TW)
Title: Semiconductor integrated circuit device
Inventor: SHINOZAKI MASAO
IPC: H01L21/60
Filed: 2001-12-12
Granted: 2004-02-21
Abstract: The present invention provides a semiconductor integrated circuit device, which can reasonably arrange the circuit and use simple structure to increase the flexibility of internal circuit layout in a chip. The structure is to configure a first electrode on a main surface of the semiconductor substrate for electrically connecting the circuit elements, layout and circuit composing the circuit; then, forming an organic insulating film on the circuit after removing the surface opening of the first electrode; and, configuring the first and second electrodes for external connection on the organic insulating film; finally, covering the conductive layer on the organic insulating film, and electrically connecting the first and second electrodes for external connection with the first electrode.
Patent TW-I259318-B (TW)
Title: Method of fabricating a liquid crystal display with reduced contact resistance
Inventor: KIM HYUN-JIN
IPC: H01L21/00
Filed: 2001-12-24
Granted: 2006-08-01
Abstract: A method of fabricating a liquid crystal display with reduced contact resistance is provided. The method comprises the steps of: depositing a buffer layer on a gate layer; and performing a thermal process to diffuse metal atoms of the buffer layer on the upper part of the gate, thereby forming a diffusion layer.