Patent GB-977436-A (GB)
Title: Control system for computer
IPC: G06F11/10
Filed: 1962-08-01
Abstract: 977,436. Microprogramming. INTERNATIONAL BUSINESS MACHINES CORPORATION. Aug. 1, 1962 [Sept. 29,1961], No. 29557/62. Heading G4A. A microprogram control magnetic core matrix is divided into four sub-matrices A to D the selection of which is determined in part by an address taken from the matrix at the conclusion of a micro-cycle and in part by the condition of the computor as determined by the setting of cores in the matrix. The operation character is decoded to select one out of sixteen lines from each of the X and Y factor address switches 75, 76 Fig. 2b (only one line from each shown). Each sub-matrix has 256 rows of cores (only one row of each sub-matrix shown) and each line from the switches 75, 76 is wired in the same sense through 16 rows of each sub-matrix. Thus,the one line from switch 75 is wired through rows 1 to 16 of each sub-matrix. It is however branched so that that branch which passes through sub-matrices A and C terminates in driver D2 while the other branch which passes through sub-matrices B and D terminates in driver D4. One line from switch 76 passes through rows 1,17,33... of each sub-matrix and is branched, the branch passing through sub-matrices A and B terminating in driver D1 and the other branch, passing though sub-matrices C and D terminating in driver D3. Operation of the switches 75,76 selects one row, in the example given row 1, of each sub-matrix but which row is energized depends on which pair from drivers D1 to D4 supplies halfselect switching current. If for example drivers D1 and D2 are operated row 1 of sub-matrix A is switched. A row having been selected and switched the cores are reset column by column by a timing ring 70 the sense lines 69,79 &c. energizing selected control points in the computor. At T1 for example, cores 51 and 52 are reset setting latches SALT1 and SAL3 which energize gates &c. in the computor. At TN, the last point in the microcycle, cores 53 to 58 are reset. Cores 53 and 54 set latches SAL1X and SAL2X which represent a new X factor address that is passed through circuits 170,172 to switch 75. In the same way the new Y factor address is entered into the latches SAL1Y to SAL4Y-in the present example only latch SAL2Y is set-and switch 76 is operated. The selection of a pair of drivers from D1 to D4 is by means of sets of cores such as cores 57 and 58. An input 87 to a "condition net" latch 87 is wired in one sense through core 57 and in the opposite sense through core 58. An input to "condition not met" latch is wired through core 57. The cores 57, 58 are initially set. If at any time in the microcycle a specified condition, negative operand or some such, is sensed line 86 is energized to reset core 57. The switching is not sensed at that time because gates 87A, 89A are closed. At time TN core 58 is reset and latch 88 is set. The latch is connected to driver D3. If the condition were not sensed both cores 57 and 58 are set at TN. The pulses generated on line 87 by their switching cancel out since it is threaded in opposite senses through the cores and latch 88 is not set. Latch 91 is set due to the resetting of core 57 generating a pulse on line 89. Latch 91 is connected to driver D1 A similar arrangement (Figs. 2e, 2f, not shown) selects driver D2 or D4. Error checking circuits are included. Even parity is checked in the function control section (cores 51, 52 for example) and in the X and Y address sections (core 56 is present to ensure that two-out-of-five of the latches 94 are set). Additionally exclusive-or circuits are connected across the outputs of the condition latches to ensure that only one of the outputs is energized.