Patent GB-1035203-A (GB)
Title: Improvements in or relating to frequency sensitive apparatus
Inventor: RICKARDS ARTHUR JOHN
IPC: H04N5/46
Filed: 1962-03-30
Abstract: 1,035,203. Transistor pulse discriminating, frequency dividing; monostable circuits. IRIS PRODUCTIONS Ltd. March 29, 1963 [March 30, 1962], No. 12369/62. Heading H3T. Apparatus providing one or other of two alternative output signals in dependence upon the frequency of a repetitive component in either one of two applied electric signals having respectively repetitive signal components of different known frequencies includes a monostable trigger circuit having a relaxation period time lying intermediate the respective period times of the two repetitive signal components and a capacitor which is charged and discharged under the control of a rectangular pulse output from the trigger circuit to and from a voltage which is dependent upon and indicative of which of the alternative repetitive frequencies is present in the applied electric signal. The circuit shown provides current outputs for automatically controlling the time base circuits of a monitor or other television receiver to accept any one of three different input video signals which may be at standards of 405 lines/ 50 frames, 525 lines/60 frames or 625 lines/50 frames. The input video signals, including the line and frame sync. pulses, Figs. 2(a) or 2(b) and Figs. 2(i) or 2(j) respectively, are applied to terminal SK1 and are passed to signal amplifiers and sync. pulse separator S1, S2, S3 to produce the respective alternative line frequencies 2(c), 2 (d) and alternative frame frequencies 2(k), 2(1). During the time between each line sync. pulse diode S5 is reverse biased and capacitor C6 charges over resistor R14, but upon the arrival of each sync. pulse at the base of transistor S4 the resultant positive potential at the collector of this transistor forward biases diode S5 and discharges capacitor C6. Thus capacitor C6 will charge to a greater negative value when the line sync. pulses are the 10kc/s. ones of the British standard than when they are the 15 kc/s. ones of the Continental and American standards, Figs. 2(c), 2(f). The sawtooth voltage across capacitor C6 is applied to the base of transistor S7 which is biased so that it is only rendered conductive by the greater amplitude peaks of the 10 kc/s. sawtooth and not those of the 15 kc/s. Positive going pulses, Fig. 2(g), or no output, Fig. 2(h), are thus produced at the collector of transistor S7. At a sync. input frequency of 15 kc/s., i.e. no output pulses at transistor S7, transistor S9 is non-conducting and transistor 10 conducting so that relay RL1/2 is energized. Positive pulses at the collector of transistor S7, i.e. at a sync. input frequency of 10 kc/s., result in transistor S10 non-conducting due to capacitor C9 maintaining the collector of transistor S9 at +6 v. so that relay RL1/2 is de-energized. The frame sync. pulses from the collector of transistor S4, Figs. 2(k), 2(1) are integrated by R11 and capacitor C5 and the resultant voltage, Figs. 2(m), 2(n), applied to the base of emitter follower S12 forming part of a feedback loop in a monostable trigger circuit comprising transistors S11, S13, the duration of the unstable period being set by R22 to be 18 m.sec. The trigger circuit is triggered by each trigger pulse through C11 only when the input is at 50 c/s. so that the output waveform at the collector of S13 is as shown in Fig. 2(o). With a 60 c/s. frame input the trigger circuit will be triggered only by alternate frame sync. pulses giving an output as shown in Fig. 2(p). Transistor S13 in conjunction with C12 and R30 operates in a similar manner to transistor S4 and C6 and R14, and since the charging of capacitor C12 occurs only during the stable state periods of the trigger circuit output the capacitor C12 is charged to a much greater value during the 60 c/s. input than the 50 c/s., Figs. 2(q), 2(r). The voltage across capacitor C12 is applied to transistors S16, S18, S19 which operate in the same manner as transistors S7, S9, S10 so that since transistor S16 is only turned on for a 60 c/s. frame input and will remain off for a 50 c/s. frame input relay RL2/2 is de-energized at 60 c/s. and energized at 50 c/s.