Patent GB-888731-A (GB)
Title: Electric multiplier apparatus
IPC: G06F7/38
Filed: 1959-11-12
Abstract: 888,731. Digital electric multipliers. INTERNATIONAL BUSINESS MACHINES CORPORATION. Nov. 12, 1959 [Nov. 12, 1958], No. 38424/59. Class 106 (1). An electronic decimal multiplier operates by multiplying together single digits of the multiplier and multiplicand, the digits being selected in groups such that the partial product formed by summing the products of the pairs of digits of a group occupies certain ordinal positions in the final product, and the groups are operated on in such a sequence that the ordinal positions of the partial product of a group contain a higher order than the partial product of the preceding group. The multiplier is sequence-controlled to multiply two six-figure numbers. In general a group is characterized in that the sum of the orders of the digits comprising a pair is the same for all pairs of the group. The first partial product of a group may occupy three adjacent orders of the final product. The first group comprises a single pair, the units digits of multiplier and multiplicand, the second group the two pairs, tens digit of multiplier and units digit of multiplicand, and tens digit of multiplicand and units digit of multiplier. The multiplier is entered on a keyboard, the multiplicand read from a punched card into a magnetic core matrix, and the product punched on to a card. The punched card machine may be that described in Specification 827,296. Magnetic core matrices are used for multiplication, accumulation of digit-pair products, carry storage and storage of the final product. Core selection is by the conventional coincident current method. Magnetic core arithmetic matrices.-Addition is performed on an 11 x 10 matrix (Fig. 8), the additional column being provided to allow for a carry from previous order when the addend is 9. A core of the matrix in row m, column n, represents the digit (m+n) (mod 10), and readout sense lines thread all cores representing the same value. Additionally, a carry sense line threads all cores for which m+n 9, a no-carry sense line threading the rest. Multiplication of a decimal digit-pair is performed in two matrices, one, the left-hand (LH) components matrix, producing the tens digit of the product and the other, the right-hand (RH) components matrix, the units digit. A core of the LH matrix (Fig. 5) in row m, column n, represents digit a of the product m X n=ab, and the sense lines are threaded accordingly. The RH matrix (Fig. 6) comprises submatrices 40 and 41. Submatrix 40 has sense lines representing the odd digits only and the rows and columns represent the digits 1, 7, 3, 9, 5, as shown. A core of the submatrix thus represents the digit b of the product above where m, n can only take odd values. The rows and columns of submatrix 41 are double-valued and the cores represent only even digits arising from multiplication of a digit-pair. On multiplication of two odd digits a spurious core will be marked, e.g. 7 X 7 will set a core representing 9 in submatrix 40 and a core representing 4 in submatrix 41. Although both will be read out to storage triggers, the output of the 9-trigger will inhibit the output of the 4-trigger. Core circuits arrangement.-The multiplicand storage matrix column windings (Fig. 4) receive half-write currents from the card reader as the appropriate column passes the sense-pins and read currents from the control circuits. The row write windings receive half-write currents from the appropriate sense-pin. The sense windings are horizontal and serve as half-write current generators for the LH and RH components matrices, being connected to the horizontal rows of these matrices. The horizontal row windings are continued through the Add matrix and are connected to horizontal write drivers to which the output of horizontal storage triggers set by the sense lines from the components matrices are gated (Figs. 7 to 7B, not shown). The LH and RH components matrices also have common column write windings actuated through the keyboard from the control circuits. These matrices have common sense lines, being read at different times. The product storage matrix (Fig. 11) stores a twelve-figure number, one digit to a row. The row windings are connected to read-write drivers actuated by the control signals. The column write windings extend from vertical write drivers through carry propagation units (Fig. 9) and the columns of the Add matrix to earth. The sense windings of the Add matrix extend vertically through the carry propagation unit and continue as the sense windings of the product storage matrix, being connected to vertical storage triggers, the output of which is gated to the vertical write drivers by the control circuits. Control circuits.-These comprise a threestage ring whose outputs control the basic matrix core cycle of write, read and clear storage triggers. This ring steps an eight-stage ring, whose outputs control the eight operations of the step of multiplying a digit-pair, which steps two six-stage rings combined to produce thirty-six outputs S-1 to S-36 corresponding to the thirty-six digit pairs which must be multiplied to form the product of two six-figure numbers. The grouping and selection of the digit pairs is predetermined by the S signals which act each on a particular column of the multiplicand storage matrix and on a particular order position of the keyboard. Carry propagation.-The partial product of a group of digit pairs may occupy three positions of the final product-in ascending order N 1  to N 3 . If the sum of the first order N 1  produces a carry this is sensed by the carry sense line in the Add matrix which sets a DC trigger, otherwise an NDC trigger is set. The carry propagation unit (Fig. 9) comprises for both the N 2  and N 3  orders two rows of ten cores N 2 , N 2 +1 and N 3 , N 3 +1. At appropriate times the values in the N 2 , N 3  positions of the product storage matrix are read out into the N 2 , N 2 + and N 3 , N 3 +1 rows, respectively, of the carry propagation device. The vertical sense lines are threaded in such a way that a core in the N+ 1 rows has a value greater by one than a corresponding core in the N row. Later the N 2  or N 2 +1, and the N 3  or N 3 +1 rows are read out on to the Add matrix, the selection of the row depending on which of the DC, NDC triggers has been set by a previous addition. Sequence of operation on a digit-pair.-This comprises the following eight steps:- (1). Selected orders of multiplier, multiplicand read, producing coincident write currents in LH, RH components matrices and setting cores representing the product of these orders. (2). RH components matrix and selected position of product storage matrix simultaneously read, switching core representing their sum in the Add matrix. It will be noted that the partial product of the products of a group of digit parts is not actually formed. The group is merely selected so that at most three orders of the final product are operated on. (3). The next left-hand position of the product storage matrix read out into carry propagation rows N 2 , N 2 + 1. 1. (4). The next left-hand position of the product storage matrix to the position read out in (3) is read out into carry propagation rows N 3 , N 3 +1. (5). Sum in Add matrix read out to selected position of product storage matrix. (6). Digit in N 2  or N 2 +1, depending on carry in step (2), and digit in LH components matrix read into Add matrix, switching core representing their sum. (7). Sum in Add matrix read into position of product storage matrix from which the digit in step (3) was taken. (8). Digit in N 3  or N 3 +1, depending on carry in step (6), read into the position of the product storage matrix from which the digit of step (4) was taken. As an example a multiplier of 6 and a multiplicand of 4 will be considered, both units order digits, with the product storage matrix empty. (1). 4 and 6 entered into LH, RH components matrices switching cores representing 2, 4 in LH, RH matrices, respectively. (2). 4 from RH components matrix and 0 from units order of product storage matrix read into Add matrix switching core representing 4. NDC trigger set. (3). 0 from tens order of product storage matrix read into N 2 , N 2 +1. (4). 0 from hundreds order of product storage matrix read into N 3 , N 3 +1. (5). 4 in Add matrix read into units position of product storage matrix. (6). LH components matrix and contents (0) of N 2  read into Adder switching core representing 2. NDC trigger set. (7) 2 read from Add matrix into tens position of product storage matrix. (8). 0 in N 3  read into hundreds position of product storage matrix.