Patent GB-1152848-A (GB)
Title: Circulating Page Loose System
Inventor: SCHAFFNER MARIO ROBERTO
IPC: G06F9/46
Filed: 1966-05-24
Abstract: 1,152,848. Digital data processing. M. R. SCHAFFNER. 24 May, 1966 [25 May, 1965], No. 23035/66. Heading G4A. In a computing system a set of data and instruction words corresponding to a " job " are fed from a delay medium 30 into a loosely connected logic circuit 35 where an operation is performed and also a new set of data and instruction words generated and fed back into the delay medium. Alternatively the delay medium may be eliminated and the set of words made to circulate around a closed loop of logic circuits 35 (Fig. 18, not shown), the output of one circuit being fed as input to the next circuit in the loop. In the former ease all words may appear in the delay medium as a single time sequence of binary bits which, before being fed into the logic circuit 35, are assembled by a decoder 32 into a set or " page " of words, each word occupying one of a set 33 of shift registers. The page of words is then transferred in parallel to a second set of registers 34 where the configuration of the words within the registers decides which parts of the " loosely connected " logic circuit are to be made use of in performing an operation on the present page of words. Having performed the operation, circuit 35 generates into output registers 36 a new page of words which are then transferred in parallel to registers 37 whose contents are then coded into a single time sequence and fed back into the delay circuit The modified page is recirculated through the system and further modified until processing is complete (e.g. a sufficient approximation to the sum of a divergent series is attained), whereupon the data is extracted and the corresponding page disappears from the delay medium. To accommodate a number of pages and so perform a number of jobs simultaneously, the delay medium may be extended to any length, and for " jobs " which involve a very large number of words, a number of pages may be combined to form a " volume," transfer means being provided in the logic circuit to enable data to be transferred between the pages of the volume. The allocation of the words to the registers 33 is controlled by a counter and a further logic circuit which detects " end of word " signals in the delay medium output to transfer this output to a different register 33 when a word is completed. The same circuit also detects a " new page " signal so as to operate parallel transfer of the present page to the registers 34. The pages may also be expanded into a two or three dimensional form in which the words of a page are allocated to a two or three dimensional array of registers 33, further counters and logic circuits being incorporated to detect " new paragraph " and " new part " signals for controlling the allocation of the words to the register array. Input and output memories (Fig. 15, not shown) may also be incorporated in the system for a continuous supply of data to and from the delay medium. Outside space may also be used as a storage medium, using a suitable reflector, and the system may be employed as a processor for meteor radar signals.