Patent GB-1207167-A (GB)
Title: Information processing system having stored lists
Inventor: GOSHORN LARRY ARTHUR
IPC: G06F9/48
Filed: 1967-11-14
Abstract: 1,207,167. Digital computers; digital data storage. GENERAL ELECTRIC CO. 14 Nov., 1967 [23 Nov., 1966], No. 51793/67. Headings G4A and G4C. In an information processing system, a first word is obtained from memory in response to an operand address portion of a command word, there being means combining a field of the first word with the operand address portion mentioned to identify a storage location, and means responsive to detection of a particular condition in the first word to transfer a word between the storage location and a register. Circular lists.-Lists in a computer main memory 2 each consist of a list control word at an address Z (say) and the list proper at word addresses Z + 1 to Z + 2<SP>L</SP>. The list control word contains the quantity L above, a list full bit, a list empty bit, and fields F, N (see below). The word locations occupied at any time have the addresses Z+1+F+1 to Z+1+F+N inclusive, the addresses (exclusive of the Z portion) being taken modulo 2<SP>N</SP> so that the list is circular. Programmed list commands (instructions) ABL, AEL, RBL, REL if executed respectively append a word to the beginning of the list (i.e. at address Z+ 1 +F), append a word to the end (at address Z+1+F+N+1), remove a word from the beginning (from address Z+1+F+1)  .  and remove a word from the end (from address Z+ 1 +F+N), the fields F, N and the full and empty bits of the list control word being appropriately updated before returning the control word to main memory. The list command specifies the address Z in its operand adress portion. After the command has been executed, the programme proceeds with the next but one command. A list command is not executed if it calls for appending to a full list or removal from an empty list. In this case the list control word is not returned to main memory and the programme proceeds with the next command to jump to a subroutine to deal with the error. Referring to Fig. 5, the list control word is transferred from main memory 2 into the B register. The F field is shifted from the relevant section of the B register (without passing through the rest of the B register) via the I serial full adder with or without addition of one and of field N from the B register into the I register, while the F field is shifted through the F serial full adder back to the B register with or without addition or subtraction of one (subtraction being done by adding all ones and discarding high order carry). The N field is shifted through the N serial full adder back to the B register with or without addition or subtraction of one. The full and empty bits are updated in response to the output of the N adder, the list being full when the N field is all zeros. In fact, in all of the above, only the L lowest order bits of the F and N fields are used, these being selected by setting the ones-complement of L into the J counter and counting up to capacity. Parallel adder 20 obtains the address to be accessed in the list by adding the contents of the I register, the H register (holding Z) and one. Parallel adder 20 is also used for adding one twice to the P register contents (the address of the next command) except that if the list command cannot be executed the next command is proceeded with before the second addition can take place. The A register delivers/receives the word appended to or removed from the list. Provision is made for presetting the carry flip-flops of the serial full adders to either value to facilitate the above operations. Input/output.-The lists may be used for queuing in connection with input/output, especially in real-time systems, priorities being selectable by appending to the beginning or end of lists according to the priority. Other features.-All commands (including list commands) have a 3-bit index portion which, if non-zero, causes the contents of a memory location specified thereby to be added to the operand address portion of the command before use. In so-called quasi commands, part of the operation code selects one of eight subroutines (e.g. to execute floating point operations), the operand address portion being stored, for use in the sub-routine if necessary. In some commands (including the list and quasi commands), one bit of the operand address portion is used to specify whether the rest of the operand address portion is to be modified (relative addressing-distinct from the indexing mentioned above) before use, to permit a greater range of possible addresses. In other commands the operand address portion is used as a microcoded extension of the operation code (still may be indexed as above).