baber/WOPTO huggingface dataset:
Patent JP-S58221533-A (JP)
Title: Remote supervisory and controlling system
Inventor: SHIMOKAWA ISAO
IPC: H04B17/00
Filed: 1982-06-17
Abstract: PURPOSE:To ensure an effective remote supervisory and control, by monitoring the counted value within a prescribed time of a counter function part, and then initializing the counter function when the counted value is larger than a fixed value, and simultaneously stopping the function to a direct memory access device. CONSTITUTION:A counter function part 7 performs counting every time a stage change arises to the information on the same monitor subject which is written to a main memory region 4 within a CPU3. A monitor module 8 for cyclic digital information transmission CDT receives the output of the part 7 and monitors the counting within a fixed time. When the count value is larger than a fixed value, the module 8 decides a defect due to the output of the CDT device or a fault of a direct memory access DMA device 2 and then initialize the counting function of the part 7, and simultaneously stop the function of the device 2. Then a fault output device 9 displays a fault of the corresponding monitor subject.
Patent JP-H07286885-A (JP)
Title: Measuring spoon
Inventor: WATANABE HITOSHI
IPC: G01F19/00
Filed: 1994-04-20
Abstract: PURPOSE:To provide a measuring spoon which can easily measure a plurality of capacities with one measuring spoon. CONSTITUTION:The measuring spoon 1 consists of a handle member 2 where a surrounding wall body 3 is formed at the fore end and a spoon body 4 where an operation part 7 is formed at one edge and a capacity body 5 is formed at the other edge part. The operation part 7 of the spoon body 4 is inserted through a hole part formed at the handle member 2 so that the operation part 7 can rotate freely on the upper surface of the handle member 2 and at the same time, the capacity body 5 of the spoon body 4 is combined into the surrounding wall body 3 formed in front of the handle member 2 so that the capacity body 5 can rotate freely, and then the capacity body 5 slides in the surrounding wall body 3 by rotating the operation part 7 and the capacity at the storage part formed by the surrounding wall body 3 and the capacity body 5 changes freely.
Patent JP-H11352055-A (JP)
Title: Optical liquid refractive index measuring apparatus
Inventor: TAKATSU ICHIRO
IPC: G01N21/41
Filed: 1999-04-12
Abstract: PROBLEM TO BE SOLVED: To provide a small-sized optical liquid refractive index measuring apparatus, high in resolving power and which is not affected by the fluctuations of a light source. SOLUTION: This optical liquid refractive index measuring apparatus uses a transparent crystal optical member 12. For example, the transparent crystal optical member 12 comprises a lithium niobate single crystal and has a bottom surface 12c coming into contact with the surface of a liquid 1 to be measured with a refractive index n1 , the incident surface 12a forming a predetermined angle with respect to the bottom surface 12c and the emitting surface 12b provided on a side opposed to the incident surface 12a, so as to form a predetermined angle with respect to the bottom surface 12c. Furthermore, the crystal optical member 12 has a double refractive index forming a discontinuous interface, with respect to the refractive index at the boundary surface of the bottom surface 12c and the liquid 1 to be measured.  When light is made incident on the incident surface 12a of the transparent crystal optical member 12 from a light source 14, it passes through the transparent crystal optical member 12 to be reflected by the boundary surface of the bottom surface 12c and the liquid 1 to be measured to be separated into a vertical polarized component light 1s and a horizontal polarized component light 1p , and these lights are emitted from the emitting surface 12b. Light detection parts 22, 24 detect these polarized lights, and these signals are processed by a signal processor 26 to calculate the refractive index n1 of the liquid 1 to be measured.
Patent JP-S5228249-A (JP)
Title: Quartz oscillator
Inventor: KUMADA KIYOSHI
IPC: H03B5/36
Filed: 1975-08-28
Abstract: PURPOSE:In a quartz oscillator using a C-MOS inverter, oscillation stop voltage is lowered by making load capacity sufficiently large and setting gate protection circuit on-voltage high.
Patent JP-S586714-A (JP)
Title: Rolling method for steel plate
Inventor: KOUNO TERUO
IPC: B21B37/30
Filed: 1981-07-03
Abstract: PURPOSE:To prevent the occurrence of wedge and camber to improve the quality of goods, by determining preliminarily a wedge quantity due to the offset quantity and the difference between left and right drawing down positions in  case of off-center rolling to adjust drawing down positions. CONSTITUTION:A proportional constant K1 indicating the relation between an off-center quantity L and a wedge quantity  W of a rolled material after rolling and a proportional constant K2 indicating the relation between difference (level correction quantity)  S between left and right drawing down positions of the rolling mill and said wedge quantity  W are determined preliminarily in accordance with conditions of the rollig mill and the rolled material. Left and right drawing down positions are adjusted by level correction quantities calculated by  expressions  W1=K1.L and  W2=K2. S, thus rolling the material.
Patent JP-S5849413-A (JP)
Inventor: JIYON EMU ROUCHITSUTO
IPC: B01D35/02
Filed: 1982-06-17
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H07286799-A (JP)
Title: Airframe device executing shoot by pressurized air
Inventor: KAWANO TERUKAZU
IPC: F41B11/62
Filed: 1994-04-18
Abstract: PURPOSE:To raise a safety with simplicity, by executing a closure fixture of a space between a firing material and an airframe vessel which is to be mounted with a packing actuated by a valve body, and by so composing as to execute a releasing of a pressure close adhesion of a packing through a migration of the valve body through a releasing action of a stopper and as to execute a shooting. CONSTITUTION:An airframe vessel (vessel) 1 is set on a mounting section 3A of a shooting material 3 after releasing a stopper 8. Then, the packing 4 is fixed by executing a pressure close adhesion on a inner face of the vessel 1, and by opening and widening a packing 4 with a taper section 5A through executing a traction of a valve body 5, after an insertion of the packing 4 from an opening of the vessel 1. At this time, the valve body 5 is fixed at a traction position by a stopper 8. Then, a migration stoppage of the valve body 5 is released by the stopper 8, and a migration of the valve body 5 toward an upper direction is executed. By this, a widening and opening of the packing 4 caused by the valve body 5 is released, and the vessel 1 is released from the shooting material 3 and is shooted.
Patent JP-S62263053-A (JP)
Inventor: EERITSUHI BUIIRANTO
IPC: B41F33/14
Filed: 1987-04-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000299070-A (JP)
Title: Magnetron
Inventor: OBATA HIDEYUKI
IPC: H01J23/10
Filed: 1999-04-13
Abstract: PROBLEM TO BE SOLVED: To invariably reduce a spurious level by setting the diameter of the tip face of a pair of pole pieces smaller than the inscribed circle diameter of the inner end faces of anode vanes, and setting the angle between the vertical direction of the tube axis of an anode cylinder and the outer peripheral face of the taper shape of a pair of pole pieces to a specific angle or above. SOLUTION: A cathode 2 is arranged at the center of the tube axis of a cylindrical anode cylinder 1, anode vanes 4 are radially arranged at uniform intervals in an acting space 3 around the cathode 2, and a pair of pole pieces 6 are arranged face to face across the cathode 2 and the acting space 3. The diameter ϕp of the tip faces of the pole pieces 6 is made smaller than the inscribed circle diameter ϕa of the inner end faces of the anode vanes 4. The angle θof a taper formed by a virtual line extended with the tip face of each pole piece 6 in the direction of the anode cylinder 1 and the outer periphery of the pole piece 6 is set to 20 deg. or above, thereby the magnetic flux density at both end sections of the cathode 2 is made 1.1 times the magnetic flux density at the center section of the cathode 2 or above, and a spurious level is improved.
Patent JP-S58222561-A (JP)
Title: Semiconductor memory device
Inventor: HARADA HIROSHI
IPC: H01L27/112
Filed: 1982-06-18
Abstract: PURPOSE:To prevent insulating breakdown at the time of applying a high voltage, shorten an access time and improve erasing efficiency by providing an erasing gate between the floating gate and control gate. CONSTITUTION:A polycrystalline silicon film is formed, phosphorus or arsenic is diffused into this film. Thereby, an erasing gate 27 which is the second conductive layer can be obtained through the photo etching. Thereafter, the second gate insulating film 28 is formed by the thermal oxidation method on the erasing gate 27. Moreover, the polycrystalline silicon film is formed by the CVD method thereon. Phosphorus or arsenic is diffused into such silicon film and a control gate 29 which is the third conductive layer can be obtained by the photo etching. Thereafter, the source 30 and drain 31 are formed by the selective diffusion of phosphorus or arsenic to the specified area of the semiconductor substrate 21. Next, after forming an insulating film 32 which covers the surface of the semiconductor substrate 22 providing a control gate 29 by the CVD method, the wiring 33 of the specified pattern is formed on the insulating layer 32 and it is connected to the drain 31 through a contact hole 34. Thereby, a semiconductor memory device 40 can be obtained.
Patent JP-H02283065-A (JP)
Title: Manufacture of gate array type semiconductor integrated circuit
Inventor: OKAMURA RYUICHI
IPC: H01L27/04
Filed: 1989-04-25
Abstract: PURPOSE:To form semiconductor integrated circuits of various sizes and scales from the same base wafer by selecting the size of a circuit in a metallizing step, and forming scribing lines of chips. CONSTITUTION:Gates 12 are formed on the whole surface of a silicon wafer 11 in a diffusing step. The sizes and scales of chips to be formed are not determined at this time point, and no scribing line is formed. When chips 13 are formed, for example, using 12 gates 12 on the wafer 11, wirings, input/output pads, scribing lines 14, etc., are formed with a shaded part as one chip 13 in a metallizing step to form a semiconductor integrated circuit. In this case, the boundary lines of the chip 13, so-called the scribing lines 14 coincide with those of the 12 gates used in the chip 13.
Patent JP-S5229335-A (JP)
Title: Device for changing direction of running toys
Inventor: SUDOU SHIYOUHEI
IPC: A63H17/36
Filed: 1975-08-31
Abstract: PURPOSE:To accomplish change in direction of a running toy by retracting the toy in such a manner to depict a circle with the driving wheel as the center through reverse revolution thereof. After change in direction, the toy runs straight through positive revolution of the driving wheel.
Patent JP-H0725866-A (JP)
Title: Chiral compound
Inventor: PAURU DERAFUIIRU
IPC: C09K19/34
Filed: 1994-05-19
Abstract: The invention relates to compounds containing chiral radicals of the general formula I <IMAGE> in which B is a single or double bond and R<1> is C1- to C30-alkyl which is optionally substituted by fluorine, chlorine, bromine, cyano or hydroxyl and optionally interrupted by O, S, NH, N(CH3), COO or OCO, is phenyl which is optionally substituted by fluorine, chlorine, bromine, cyano, C1- to C20-alkyl, C1- to C20-alkoxy or C1- to C20-alkoxycarbonyl, or is fluorine, chlorine, bromine or cyano. The compounds according to the invention are suitable for use in liquid-crystalline media in display technology, in optical, electronic and opto-electronic storage media, electronic data processing and reproduction or electrophotography, and in light-reflecting layers.
Patent JP-S5228836-A (JP)
Title: Integration circuit which prepares potential memory element
Inventor: YAMADA IKUHIRO
IPC: G11C27/00
Filed: 1975-08-29
Abstract: PURPOSE:To perform the arithmetic of physical quantity of fluctuation amplitude is large, by means of making the integration of the value of integrated voltage which is smaller than the memory unit of potential element.
Patent JP-H02286587-A (JP)
Title: Elevator door control device
Inventor: KODERA TOSHIYUKI
IPC: B66B13/14
Filed: 1989-04-25
Abstract: PURPOSE:To obtain an elevator door control device which does not cause any recoil or chattering of a door at the end of its stroke by so constituting to equip with a means of gradually lowering motor torque when the door reaches the end of its stroke. CONSTITUTION:When a door comes to the end of its stroke and actuates an end position detecting photo switch installed immediately ahead of a door bumper rubber, the voltage of the end position detecting circuit starts charging a press torque control circuit 8 having a first order lag element. The output of the press torque control circuit 8 is then added to the output of a speed command generating circuit 5 since a loading is given to the input of a comparison circuit 4, an adder. The output of the comparison circuit 4 therefore declines gradually, subtracting an output voltage portion corresponding to the charge voltage of the press torque control circuit 8 from the output voltage at the terminal position of the door, so that the press torque of a motor can be gradually lowered through the alternating current control of bidirectional three- terminal thyristers 2a and the gradual lowering of the primary voltage of the motor 1.
Patent JP-S63269399-A (JP)
Title: Track hold circuit
Inventor: IMAMURA MAKOTO
IPC: G11C27/02
Filed: 1987-04-28
Abstract: PURPOSE:To reduce noise without necessitating a resistor, by applying an input signal on an input stage on one side, connecting a hold capacitor between an input and an output on the other side, and performing the connection and disconnection of one end of the hold capacitor to a common potential point synchronizing with the switching of those two input stages. CONSTITUTION:An amplifier 30 which selects either one of the two input stages by preparing the two input stages and switching an operating current to be supplied to those input stages is used, and the hold capacitor 32 is connected between the input stage on one side and the output of the amplifier 30. Also, a FET31 as a switch whose ON/OFF is controlled interlocking with the switching of the operating current is connected between the side of the hold capacitor 32 not being connected to the output of the amplifier 30 and the common potential point. Thus, the input signal to be held is applied on the input stage on the other side of the amplifier 30. In such a way, it is possible to reduce the noise and to obtain high accuracy without necessitating the resistor.
Patent JP-S5533606-A (JP)
Title: Surge detector
Inventor: OOCHI HARUSHIGE
IPC: G01R15/22
Filed: 1978-08-31
Abstract: PURPOSE: To simply and the accurately detect the waveforms of a surge voltage or current by connecting a light emitting element in series with a discharge type lightning arrester so that the light emitting power of a single waveform corresponding to the discharge current of the lightning arrester with high fidelity with the use of an optical fiber.  
     CONSTITUTION: A discharge type lightning arrestor 1 emits a light, when it receives a surge voltage, and has its anodes 13 and 14 conducted with the ground so that the discharge current flows in the directions 15 and 16. This current is shunted by resisters 2 and 3 so that the current component 15 having passed through the resister 3 makes a light emitting element 4 emit whereas the current 16 makes a light emitting element 5 emit. The optical powers having the single waveform proportional to the respective currents are fed to a light receiving element 10 through the optical fibers 8 and 9 which are arranged in the vicinity of the light emitting elements 4 and 5 and the light receiving element 10. The powers are photoelectrically converted by the element 10 so that electric signals proportional to the discharge current are generated through an amplifier 11 at a terminal 12. Thus, the surge can be simply and accurately detected without applying the power for detection and transmission. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H0951468-A (JP)
Title: Hand shake correction device
Inventor: SATO KOICHI
IPC: G03B5/00
Filed: 1996-04-25
Abstract: PROBLEM TO BE SOLVED: To attain hand shake correction over a broad band with a simple configuration by providing each means of shake detection, characteristic compensation and correction, temperature detection and arithmetic operation of compensated quantity to the device. SOLUTION: A detection section 1 detects an angular velocity due to a longitudinal or lateral shake of a camera main body and applies A/D conversion thereto and the result is given to a generating section 2. The generating section 2 integrates the sum of the products between the digital angular velocity signal and a sampling time of the angular velocity signal to calculate an angle by a shake and to generate a correction signal. The correction signal is sent to a correction section 3 to correct a cower shake. A detection section 4 detects a voltage difference from ambient temperature of the camera and gives the voltage to an arithmetic section 5. The arithmetic section 5 sets variably a compensation quantity based on the voltage. A frequency characteristic of a prism 21 is optimized at all times independently of the ambient temperature of the camera by the simple configuration as above and the correction section 3 conducts sufficient hand-shake correction.
Patent JP-S588360-A (JP)
Title: Microprogram controller
Inventor: WAKITA HIROYUKI
IPC: G06F9/22
Filed: 1981-07-08
Abstract: PURPOSE:To prevent an important resource from being revised or destructed with an erroneous microprogram, by making operating of a specific decoder possible only when the content of an address register is made coincident with the specified condition. CONSTITUTION:A microinstruction stored in a control memory 1 is read out from an address designated with a microinstruction address register 2, the microinstruction is stored in a microinstruction register 3, decoded 4 and each part in a device is controlled with a control signal to be outputted and executed. A microinstruction effectiveness condition generating circuit 5 outputs a signal when the content of the register 2 is e.g. a multiple of 16 to operate a specific decoder. By constituting so as to perform the microinstruction revising the content of the important resource with the specific decoder, the destruction of the imporatnt resouce due to unprepared or erroneous program can be prevented.
Patent JP-S60250223-A (JP)
Title: Black body furnace
Inventor: TAMURA KIYOSHI
IPC: G01J5/52
Filed: 1984-05-26
Abstract: PURPOSE:To obtain a compact and large diameter furnace, by, in a black body furnace forming a hollow space with a group of blackened mirrors, arranging cone-shaped mirrors at the center deep in that hollow space, cone-base-shaped mirrors arround the center and forming a plurality of mirror concavities at the end. CONSTITUTION:A black body furnace 10 with configuration of a hollow space 10 is composed of stainless stell circular cone furnace wall unit 12, circular cone base furnace wall unit 13, cylindrical furnace wall unit 14 arranged in a coaxial manner. Further heater 16 heating the furnace wall units 12-14, thermocouple 17 detecting temperature, heat insulating unit 18, outside wall unit 19 are installed and a mirror concavity unit 15A surrounded by a circular cone mirror 12A is formed. Further, a mirror concavity unit 12B surrounded by a cylindrical mirror 14A is formed. Thus, comparatively high blackness can be kept by assuring necessary frequency of multiple reflections and widening of a diameter of an opening 15C becomes available without elongating the hollow space.
Patent JP-S60250649-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: HASHIMOTO TADAHIRO
IPC: H01L23/522
Filed: 1984-05-25
Abstract: PURPOSE:To obtain a semiconductor device of high reliability multilayer wiring structure durable against resin sealing by forming an insulating film of the anodic oxidation film of the first layer metal, a CVD SiO2, plasma Si3N4 between the first and second layers. CONSTITUTION:The first layer aluminum wirings 3 are selectively provided through an insulating film 2 on an Si substrate 1, subjected to an anodic oxidation, and coated with an alumina 5. The aluminum 3 is opened, and a CVD SiO2 film 6 and a plasma Si3N4 film 8 are laminated. A resist mask 4'' is formed, an Si3N4 film 8 is first isotropically plasma etched, and the film 6 is then anisotropically etched. The mask 4'' is removed, the second layer aluminum wirings 3' are formed, and coated with a protecting film 7 of CVD SiO2 film. Since an interlayer insulating film is formed of an anodic oxidation film of the first layer metal itself, a CVD SiO2 film, and plasma Si3N4 film having durability against strain, it is strong against thermal distortion, no deterioration nor variation in the characteristics, thereby remarkably improving the reliability of the device.
Patent JP-S61264522-A (JP)
Title: Tracking controller
Inventor: KAWAI AKIHIRO
IPC: G11B7/09
Filed: 1985-05-20
Abstract: PURPOSE:To obtain a tracking controller which eliminates harmful track deviation and the occurrence of noise to trace tracks faithfully, by providing filters having such frequency characteristic that the amplitude level of a detection signal having an optical frequency characteristic is made fixed. CONSTITUTION:Filters 12 and 13 have a frequency characteristic (b) shown in the figure with respect to a detection signal (a) having the optical frequency characteristic. That is, when the primary high pass filter having the frequency characteristic opposite to that of the detection signal (a) is used, the frequency characteristic of the filter output is made flat to reduce the difference of amplitude level. Thus, the generation of an unnecessary tracking error signal is suppressed, and an actuator 8 is not unnecessarily driven, and tracks are traced faithfully without track deviation neither the occurrence of noise.
Patent JP-H09293882-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: SUGIURA YOSHIYUKI
IPC: H01L21/329
Filed: 1996-04-25
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device which can easily form an electrode having capacitive coupling and can realize a high breakdown voltage, and also to provide a method for fabricating the semiconductor device. SOLUTION: An n-type single crystal silicon substrate 1 is subjected on its one major surface to ion implanting and thermal diffusing processes to form a p-type impurity diffusion region 1a and an n-type high-concentration impurity diffusion region 1b, and after that, a silicon oxide film 2 and a silicon nitride film 3 are formed thereon. The silicon nitride film 3 is etched with use of a predetermined shape of pattern made of photoresist 4 as a mask to form projections 3a thereon, and then the photoresist 4 is removed. Next, a polysilicon layer 5 is formed as an electrode, the polysilicon layer 5 formed on top faces of the projections 3a is removed with use of photoresist 6 as a mask, and then the photoresist 6 is removed. Subsequently, a silicon oxide film 7 is formed, openings 8a to 8c are made therein with the photoresist as a mask and then the photoresist is removed.  Finally, metallic wiring material 9 is filled into the openings 8a to 8c to form a metallic wiring pattern.