Patent GB-715816-A (GB)
Title: Method of and apparatus for counting electrical pulses
Inventor: HUTCHINSON GEORGE WILLIAM
IPC: G06F7/50
Filed: 1951-06-26
Abstract: 715,816. Digital electric calculating machines. NATIONAL RESEARCH DEVELOPMENT CORPORATION. May 5, 1952 [June 26, 1951], No. 15081/51. Class 106 (1). [Also in Group <SP>XXXVI]</SP> Apparatus for analysing electrical pulses in accordance with their amplitude comprises means for comparing the pulses with a saw-tooth wave, and a synchronous memory cycle which records a signal at a point in the cycle determined by the amplitude, the memory cycle being divided into a number of intervals corresponding with the number of channels into which the pulses are being divided, each channel containing binary adding circuits which indicate the number. of pulses in that channel. The totals are indicated on a cathode ray tube whose display is synchronized with the saw-tooth wave. Sorting circuit.-Each pulse is amplified at 1, 2 (Fig. 1) and fed via a gate 6 to a pulse lengthener circuit 5, where a condenser is charged, and an extended pulse whose amplitude is proportional to that of the original pulse is produced The pulse is also taken from gate 6 to the discriminators 7, 8 and if it is between predetermined amplitudes, the end of the pulse, as sensed by discriminator 8, causes a prolonged signal to be sent from a circuit 10 to a coincidence circuit 11, and also to gate 6 to close it. The pulse from circuit 5 (Fig. 2a) is now compared in circuit 14 with a saw-tooth voltage (Fig. 2b,) from a generator 16, and when they are equal on the slope of the saw-to.oth voltage a trigger circuit 20 sends a pulse to coincidence circuit 11. Thus circuit 11 has now received a signal from circuit 10, to ensure that the measuring pulse has ended, followed. by a pulse from circuit 20 at a point in the sawtooth wave which is proportional to the amplitude of the original pulse. It is also fed with pulses from a channel pulse generator 21 (described below) which, in conjunction with the pulse from circuit 20, causes a pulse to be transmitted to the recording and memory circuits, and also back to reset the previous circuits by discharging the condenser in circuit 5, and opening the gate 6. The memory cycle comprises a square-wave digit oscillator 28 and channel pulse generator 21 actuated by channel oscillator 29, controlled by a trigger circuit 26 of two states, A which allows the oscillators to operate, and B which stops the oscillators, the transition from B to A injecting a pulse through an adding gate 25. to a delay line 22, of delay time T1. The saw-tooth generator 16 feeds into an amplitude discriminator 30 which, at predetermined level, causes the collapse of the saw-tooth voltage, and feeds a pulse into trigger circuit 26 to change its state from A to B. The first change from B to A occurs automatically after delay T3, injecting a pulse into the delay line, which reappears after a delay T1, soon after the discriminator 30 senses the end of the saw-tooth wave to cause conversion from state A to B. These conversions from A-B, and B-A now recur regularly. In state A, the oscillators 21, 28 are free to oscillate, the former dividing time T1 by a series of channel pulses defining the limits of the groups into which the measuring pulses are to be analysed, these channels being subdivided by the digit oscillator pulses from oscillator 28. The pulse from circuit 11, produced at the point in the saw-tooth wave indicative of the amplitude of the original pulse is fed through the adding gate 25 into the memory cycle at this point in the cycle, and is added to a binary numbering scale, which is displayed on a cathode ray tube 27. The X-plates are fed with the saw-tooth output of circuit 16, and the Y-plates by a triggered time base 33 actuated by channel pulse generator 21. Thus a raster of faint vertical lines is obtained, each corresponding to one channel, containing faint marks indicating each digit position in each channel, which are converted into bright dots by pulses from the adding gate. Detailed circuits are shown for the coincidence circuits 10, Fig. 5 (not shown), for a combined comparison circuit 14, trigger pair 20 and coincidence circuit 11, Fig. 6 (not shown), for the sawtooth generator 16, discriminator 30 and trigger circuit 26, Fig. 7 (not shown), and for the adding gate 25 (Fig. 8, not shown).