baber/WOPTO huggingface dataset:
Patent TW-471231-B (TW)
Title: Implicit resource allocation in a communication system
Inventor: WILLARS PER
IPC: H04B7/26
Filed: 1999-10-16
Granted: 2002-01-01
Abstract: In a communications system, communications resources are allocated in a dynamic, ""as needed"" fashion. No explicit signaling is needed to exchange information pertaining specifically to an allocated communications resource. Instead, resources are implicitly allocated by using one or more parameters known to both the radio access network and mobile station the are more or less unique to the mobile station. Such parameters are used to generate or address a communications resource for use by the mobile station. The parameters might, for example, be information readily acquired or communicated as a result of a synchronization procedure, a mobile station registration procedure, a mobile station access procedure, a paging procedure, etc. Example parameters may include a system frame number, a system identification, a radio access network identification, a base station identification, a cell identification, a mobile station-associated signature, an access reference number corresponding to the mobile station, a time instant when an acknowledgment message is received, etc.
Patent TW-I257867-B (TW)
Title: Vaccine preparations containing attenuated toxin
Inventor: AIZAWA CHIKARA
IPC: A61K39/145
Filed: 2000-03-22
Granted: 2006-07-11
Abstract: Described herein are adjuvants containing as the active ingredient an attenuated toxin having a residual activity of less than 1/2000 that of the natural toxin and vaccines containing such adjuvants. An attenuated product of, for example, natural cholera toxin, can be used to provide vaccines capable of showing sufficient immune potentiation when percutaneously or nasally inoculated.
Patent TW-495729-B (TW)
Title: Liquid crystal display module and scanning circuit board thereof
Inventor: LIN TIEN-JEN
IPC: G09G3/36
Filed: 1999-12-01
Granted: 2002-07-21
Abstract: The present invention relates to a liquid crystal display (LCD) module, a LCD panel scanning method, and a scanning circuit board thereof. A first scanning line circuit and a second scanning line circuit are separately installed on both sides of each scanning line on a LCD panel. During scanning, the first scanning line circuit and the second scanning line circuit are applied simultaneously to scan each scanning line on the LCD panel so as to equivalently reduce the RC time constant. A first scanning drive circuit and a second scanning drive circuit may be installed on two scanning circuit boards having the same layout circuit. Two connectors are equipped on both sides of the scanning circuit board and a scanning interface is placed aside the connector. Then, the two scanning circuit boards may be separately installed on both sides of a LCD panel after being rotated 180 degree.
Patent TW-451205-B (TW)
Title: Sensing circuit and method
Inventor: NICHOLES JAMES W
IPC: G11C7/06
Filed: 1999-12-03
Granted: 2001-08-21
Abstract: The occurrence of invalid data transitions on an output data bus (17) are reduced with an improved data sensing circuit (20). In a single block memory application, a self-controlled sense amplifier (21) eliminates the need for external timing control signals by triggering off the rail-to-rail voltage swings of a complementary bit line pair (BIT, BITB) of a memory array coupled to the inputs of the amplifier (21). Triggering off the bit lines (BIT, BITB) ensures that the amplifier (21) is not activated until valid data appears at its input, thereby preventing glitches on the output data bus (17) due to the amplifier (21) or associated latch (13). In a multiblock memory application, the data sensing circuit is further improved by eliminating invalid data transitions from appearing on the output data bus (17) through use of feedback. Data storage devices (13) of inactive blocks are preloaded with the valid data appearing on the output data bus (17) via a feedback circuit (23), thereby preventing potentially invlaid data otherwise stored in an inactive storage device (13) from being transferred to the output data bus upon activation.
Patent TW-495730-B (TW)
Title: Display drive device and liquid crystal module incorporating the same
Inventor: TAMAI SHIGEKI
IPC: G02F1/133
Filed: 1999-12-27
Granted: 2002-07-21
Abstract: A display drive device of the present invention includes a plurality of cascade connected source driver LSI chips for driving a liquid crystal panel in accordance with an image data signal, and each of the source driver LSI chips includes: a shift register for shifting and transmitting a start pulse signal in synchronization with a clock signal; a sampling memory for sampling the image data signal in accordance with an output of the shift register; and a hold memory for latching a selected image data signal in accordance with a latch signal, wherein a delay circuit for generating the latch signal by delaying the start pulse signal supplied by the shift register in each of the source driver LSI chips is disposed. This arrangement enables the whole device, including a controller, atc., to be produced in a smaller size and at a lower cost.
Patent TW-462073-B (TW)
Title: Manufacturing method of semiconductor device
Inventor: IMAI KIYOTAKA
IPC: G03F1/68
Filed: 2000-01-18
Granted: 2001-11-01
Abstract: The present invention relates to a method of manufacturing a semiconductor device; which comprises the steps of forming a film of a hard mask material, on a pattern-forming film which is to be used to from a prescribed pattern, and then forming a photoresist film over said film of the hard mask material; carrying out a first exposure using a first mask with a phase shifter and subsequently making a development; etching said film of the hard mask material using the formed resist pattern as a mask; forming a photoresist film so as to cover the formed hard mask pattern; carrying out a second exposure using a second mask with a pattern which enables a portion of the photoresist covering only a required part of said hard mask pattern to remain after the exposure and the development, and subsequently making a development; removing, by means of etching, an unrequired part of the hard mask which is not covered with any portion of said photoresist; and etching said pattern-forming film using the remaining hard mask pattern as a mask. With the present invention, a semiconductor device having high reliability and excellent element characteristics can be produced in a high yield.
Patent TW-464552-B (TW)
Title: Rolling method and steel materials interval controlling device
Inventor: HYAKUTAKE JUNJI
IPC: B21B37/00
Filed: 2000-03-14
Granted: 2001-11-21
Abstract: By a table speed compensating means, the speed of a table on which a succeeding material is put is compensated through a master controlling device so that the value of the interval between steels which is obtained with a CCD camera before the rolling of the preceding material becomes a 1st set value which is preset as the interval by which the preceding and succeeding materials are not mutually collided by the drop of speed at the time of biting the preceding material and the speed of a table on which the succeeding material is put is compensated through the device so that the value of the interval between steels obtained with the camera at the time of rolling the preceding material becomes the 2nd set value which is preset as the interval by which the succeeding material is bitten into the rolling mill at the same time that the tail end of the preceding material is run out. By a table speed compensating means, the speed of the table on which the preceding material is put is controlled through the device so that the measured value of the interval between steels obtained with a CCD camera at the time of rolling the succeeding material becomes the 3rd set value which is preset as the optimum interval of the rolling in the next stage. As such, this invention greatly improves the efficiency of rolling by enabling highly accurate control of an interval between materials.
Patent TW-490495-B (TW)
Title: Ferrite stainless steel plate with excellent formability
Inventor: OTA HIROKI
IPC: C22C38/48
Filed: 2000-03-21
Granted: 2002-06-11
Abstract: A ferrite stainless steel plate, characterized as comprising, in mass %, 0.02 to 0.06% of C, 1.0% or less of Si, 1.0% or less of Mn, 0.05% or less of P, 0.01% or less of S, 0.005 % or less of Al, 0.005% or less of Ti, 11 to 30% of Cr, and 0.7% or less of Ni; and also N and C in an amount satisfying the formulae: 0.06 ≤ (C+N) ≤ 0.12 and 1 ≤ N/C, and further V in an amount satisfying the formula: 1.5x10<SP>-3</SP> ≤ (VxN) ≤ 1.5x10<SP>-2</SP>, wherein C, N; and V represents the contents (mass %) of respective alloy elements. The ferrite stainless steel plate exhibits good formability and excellent surface quality after forming.
Patent TW-444213-B (TW)
Title: Key structure with dual-hardness and the manufacture process
Inventor: HE JIUN-CHIANG
IPC: H01H11/04
Filed: 2000-05-30
Granted: 2001-07-01
Abstract: This invention describes the key structure with dual-hardness and also its manufacture process, which possesses a key structure of both hard and soft materials. It uses two raw materials of different hardness (for example, rubbers). The material with higher hardness is shaped through injection molding first and then the preformed article is placed into another mold for integral forming. The material with elasticity is injected into the mold and combined with the preformed article made of harder material to form an integrated article. Thus, the key structure is obtained with the upper surface layer being hard and the rest of the key being soft and elastic so that better touch feeling when pressing the key can be provided and precise and reliable delivery of pressing displacement is offered.
Patent TW-478137-B (TW)
Title: Semiconductor device
Inventor: NAKAGAWA KAZUYUKI
IPC: H01L23/13
Filed: 2000-07-24
Granted: 2002-03-01
Abstract: A lower semiconductor element is mounted facing down on an insulating circuit board, and an upper semiconductor element is stacked facing up on the lower semiconductor element. Openings are provided in the insulating circuit board at a location facing the element electrodes of the lower semiconductor element, and the element electrodes of the lower semiconductor element are connected to the board electrodes on the lower surface of the insulating circuit board through the openings. Also, the element electrodes of the upper semiconductor element are connected to the board electrodes on the upper surface of the insulating circuit board. Thus, a high-density semiconductor device is provided by stacking a plurality of semiconductor elements.
Patent TW-461806-B (TW)
Title: Method of manufacturing dental prosthesis, method of placing object and measuring device
Inventor: HAMADA HIROAKI
IPC: A61C5/00
Filed: 2000-08-01
Granted: 2001-11-01
Abstract: Method of manufacturing a dental prosthesis includes the steps of obtaining shape data of a portion to be prosthetically treated and shape data of a surface condition after prosthetically treated, obtaining shape data of a prosthesis from the two shape data, obtaining contour data of a portion of the prosthesis contacting a tissue of a living body and appearing outward, and converting the shape data of the prosthesis into a cutting data assuming that a connecting rib is to be connected to the prosthesis at a region appearing outward on the shape data of the prosthesis and substantially not contained in the contour data. Also, the present invention provides a method of placing and object and a measuring device.
Patent TW-521467-B (TW)
Title: Battery status monitor circuit and battery device
Inventor: NAKASHIMO TAKAO
IPC: G01R31/36
Filed: 2000-08-04
Granted: 2003-02-21
Abstract: In the circuit that uses amplifier to monitor charging/discharging current, output voltage of the amplifier is converted into a digital signal through an A/D converter. However, the constitution for increasing monitoring accuracy of charging/discharging current will increase the number of A/D conversion per unit time such that the current consumption is increased. Additionally, there is a degradation problem of current monitoring accuracy if the current consumption is suppressed. When charging/discharging current drops below a predetermined value, a current monitoring circuit is activated to decrease the current consumption. The current monitor circuit then stops functioning, but a control circuit is connected with a differentiating circuit so that the current monitoring circuit can resume in response to a change in voltage across a sense resistor. Thus, the current consumption is suppressed while increasing the accuracy of current monitoring.
Patent TW-469679-B (TW)
Title: Structure of reducing solder overflowing phenomenon for terminals of electronic apparatus
Inventor: SHIU JIUN-SHIAN
IPC: H01R43/00
Filed: 2000-09-27
Granted: 2001-12-21
Abstract: The present invention is to provide a kind of structure that reduces overflowing solder phenomenon for terminals of electronic apparatus. The structure is mainly composed of an insulating housing and at least one terminal. The insulating housing is provided with an accommodation channel for passing through terminals and fixing terminals. In addition, the fixed end of the terminal is exposed outside the accommodation channel stated above so as to make terminal capable of electrically contacting with circuit board. A solder collection hole is installed at the opening position near the inside of the accommodation channel. The solder collection hole is capable of preventing structure strength of terminal from change after the soldering process or avoiding short-circuit effects in between terminals caused by solder overflowing phenomenon.
Patent TW-464897-B (TW)
Title: Plasma display screen having a reflection layer
Inventor: BECHTEL HELMUT
IPC: H01J17/49
Filed: 2000-10-11
Granted: 2001-11-21
Abstract: A plasma display screen comprising a carrier plate, a transparent front plate, a rib structure, which divides the space between the carrier plate and the front plate into plasma cells which are filled with a gas, and comprising one or more electrode arrays on the front plate or on the front plate and the carrier plate to generate corona discharges in the plasma cells, and comprising a phosphor layer and a reflection layer, which reflection layer comprises a non-metallic powder having a refractive index in the wavelength range from 147 nm to 700 nm of n=nreal+ik, where n > 1.3 and k < 0.05, said powder having an average grain diameter of 100 nm < d < 1000 nm, is characterized by an improved luminance.
Patent TW-I278477-B (TW)
Title: Coating having macroscopic texture and process for making same
Inventor: MACQUEEN RICHARD C
IPC: C09D7/65
Filed: 2001-03-14
Granted: 2007-04-11
Abstract: In one embodiment the present invention provides a coated substrate comprising a substrate, a radiation-cured coating or a thermally-cured on at least a portion of the substrate, wherein the coating comprises an inherent macroscopic texture. In another embodiment, the present invention provides a pre-cured coating mixture comprising a radiation-curable resin and an initiator, or a thermally-curable resin and thermal initiator, wherein the radiation- or thermally-curable resin and the respective initiator form a pre-cured coating mixture capable of forming a macroscopic texture upon application of the mixture on a substrate. In another embodiment the present invention provides a pre-cured coating mixture comprising a radiation- or thermally-curable resin, an initiator, and texture-producing particles having an effective size to provide a macroscopic texture upon application of the mixture on a substrate. In another embodiment, the present invention provides a coated substrate comprising a substrate and a radiation- or thermally-cured coating on at least a portion of the substrate, wherein the coating comprises an inherent macroscopic texture. In addition, the present invention provides a process for making a coating on a substrate, comprising the steps of distributing a pre-cured coating mixture comprising a radiation-curable resin and an initiator or a thermally-curable resin and thermal initiator over at least a portion of a substrate to form a pre-cured coating having a macroscopic texture, and radiation-curing or thermally curing, respectively, the pre-cured coating to form a radiation-cured or thermally-cured coating having the macroscopic texture.
Patent TW-508600-B (TW)
Title: Laminated ceramic capacitor and its manufacturing method
Inventor: KISHI HIROSHI
IPC: H01G4/12
Filed: 2001-03-06
Granted: 2002-11-01
Abstract: In recent years, the demand of increasing electronic machine performance and the request of increasing electronic component performance by the market never stop. The purpose of the present invention is to increase application lifetime and reliability of laminated ceramic capacitor. In the solving means of the invention, plural dielectric layers and plural inner electrodes are integrally laminated, where the dielectric layer contains dielectric porcelain composition. In the laminated ceramic capacitor, the dielectric porcelain composition is composed of ceramic particles and glassy grain boundaries, linking and covering the ceramic particles. The glass contains one kind or more than two kinds of additive elements selected from Mn, V, Cr, Mo, Fe, Ni, Cu, and Co in the form of a solid solution.
Patent TW-486799-B (TW)
Title: Semiconductor device and its manufacturing method
Inventor: SHIBATA KAZUTAKA
IPC: H01L21/60
Filed: 2001-03-23
Granted: 2002-05-11
Abstract: The present invention provides a semiconductor device and its manufacturing method. The semiconductor device comprises: a pad for electrical connection provided on a semiconductor substrate, a first insulating film with which a surface of the semiconductor substrate is coated and having an opening to which the pad is exposed, a conductive film joined to the pad on a bottom surface of the opening of the first insulating film and extending to a surface of the first insulating film outside the opening, a second insulating film with which the conductive film is coated and having an opening to which a part of the conductive film is exposed, and a connecting member arranged to be joined to the conductive film inside the opening of the second insulating film.
Patent TW-510089-B (TW)
Title: Radio communication system, electronic machine with radio communication function and semiconductor integrated circuit device for radio communication as well as radio communication method
Inventor: YOSHIMOTO TAKESHI
IPC: H04B7/00
Filed: 2001-05-29
Granted: 2002-11-11
Abstract: The invention provides a radio communication system, which can relax or remove limitations imposed on communication terminals that can be used in different regions or countries due to different communication schemes. The radio communication system of the invention includes a radio receiver (1) receiving radio signal and converting it to receivable signal, a radio signal splitter (5) splitting the characteristics of the radio signal from the received radio signal, a demodulator (9A, 9B) converting the demodulation method in accordance with the characteristics of the received radio signal to demodulate the received signal, a receiving communication program processor (10A, 10B) conducting communication program processing with respect to the received demodulated signal and a decoder (11A, 11B) decoding the received signal through the communication program processing by converting the decoding method in accordance with the characteristics of the received radio signal.
Patent TW-518389-B (TW)
Title: Hinge assembly
Inventor: CHO GYU-YEOL
IPC: E05D5/10
Filed: 2001-06-22
Granted: 2003-01-21
Abstract: Hinge assembly provided between a fixed body to be coupled to a fixed object and a rotating body to be coupled to a rotating object to be rotatably fitted to the fixed object, for providing a torque required with respect to the fixed object, including a shaft, a fixed bracket having one leaf fixed to an end of the shaft, and the other leaf fixed to the fixed body, a rotating bracket having one leaf rotatably coupled to the shaft from an outer side of the fixed bracket, and the other leaf coupled to the rotating body, and a frictional elastic member disposed between the fixed bracket and the rotating bracket such that the one end thereof is fixed to an end of the shaft, and the other end thereof coupled to the rotating bracket to pass through the rotating bracket, for making friction as a part of the frictional elastic member in contact with the rotating bracket makes an elastic compression onto the rotating bracket, for applying a torque to the rotating bracket.
Patent TW-531828-B (TW)
Title: An SOI semiconductor integrated circuit for eliminating floating body effects in SOI MOSFETs and method of fabricating the same
Inventor: LEE SOO-CHEOL
IPC: H01L27/092
Filed: 2001-07-03
Granted: 2003-05-11
Abstract: A silicon-on-insulator (SOI) integrated circuit and a method of fabricating the SOI integrated circuit are provided. A plurality of transistor active regions and at least one body contact active region are formed on an SOI substrate. A semiconductor residue layer, which is thinner than the transistor active regions and the body contact active region, is disposed between the transistor active regions and the body contact active region. The transistor active regions, the body contact active region and the semiconductor residue layer are disposed on a buried insulating layer of the SOI substrate. The semiconductor residue layer is covered with a partial trench isolation layer. A bar-shaped full trench isolation layer is interposed between the adjacent transistor active regions. The full trench isolation layer is in contact with sidewalls of the transistor active regions adjacent thereto and is in contact with the buried insulating layer between the adjacent transistor active regions. An insulated gate pattern crosses over the respective transistor active regions. The insulated gate pattern is disposed to be parallel with the full trench isolation layer.
Patent TW-I293792-B (TW)
IPC: H01L23/522
Filed: 2001-08-15
Granted: 2008-02-21
Abstract: A semiconductor device having reduced interconnect delay and increased interconnect reliability and a method of manufacturing the same are provided. A plurality of interconnects 12a through 12f are formed on a base insulating layer 10 with different interconnect pitches P1 through P3. Next, an adhesion inhibiting layer inhibiting adhesion to an interlayer insulating layer 16 formed on the interconnects is formed in the space between adjacent interconnects of a smaller interconnect pitch in which space the interconnect delay is predicted to exceed a predetermined value due to interconnect design. In a formed semiconductor device 18, gaps of a small dielectric constant are formed in the spaces between interconnects of the smaller interconnect pitches (parts C), while an insulating film is buried selectively in the spaces between interconnects of the larger interconnect pitches (parts A and B). <IMAGE>