Patent GB-1255195-A (GB)
Title: Dynamic fault tolerant information processing system
Inventor: SLAY BUFORD GLYN JR
IPC: G11C15/06
Filed: 1969-03-13
Abstract: 1,255,195. Superconductive circuits. TEXAS INSTRUMENTS Inc. 13 March, 1969 [13 June, 1968], No. 13318/69. Heading H3B. [Also in Division G4] A cryogenic memory with testing facilities has for each word to be stored a status register SR formed by a drive line 12 and a series of storage loops formed by a high inductance path 14 and a low inductance path 16, an enable register ER formed by a drive line 22 continuously supplied with D.C. current, a not enable branch EN and an enable branch EN, and a write register WR formed by a drive line 40, a write branch W and a not write branch W. A word in the store is formed of bits B1-Bn written into locations having current in the W branch by applying current of appropriate polarity to the drive lines 84. This switches a cryotron 86 at each bit position to a high resistive condition so that current in the W lines passes through a high inductance loop 87 and switches cryotron 88 resistive. This diverts current in line 84 to a high inductance branch 82 so that when current in line 84 is discontinued current is trapped in the storage loop formed by branches 80 and 82. Read out occurs when a D.C. current is applied to lines 90. If the current in the read line shunt 92 is additive with the stored current cryotron 96 becomes resistive. If the currents are not additive the cryotron remains superconductive. The three registers can be reset by applying current to the lines 18, 31 or 42 to cause a cryotron 20, 30, 44 respectively to be rendered resistive to prevent current flowing in branches 16, EN, W respectively. A register having been reset can be set to correspond to the state of another register line 54 sets EN to correspond to W, line 32 sets SR to EN and 46 sets W to EN. The lines work in a similar manner so one will be described. A current on line 54 renders cryotron 56 resistive if W is set. The current is diverted to branch 58 to render cryotron 60 resistive since current flows through EN. This diverts current flow to EN. If W is reset cryotron 56 remains superconductive and no current is diverted to branch 58.  If a fault such as an open circuit or inferior gain or trapped current levels exists the circuit described will detect this. If the status register fails it automatically switches to the failed state in that the inability of a loop to store current indicates a failed state. A stored current indicates the absence of a failure and the direction of current indicates whether the location is full or empty. In the absence of a stored current, current could not be switched from EN to EN so a word would not be accessed. Procedure.-Reset lines 18, 31, 42 are pulsed to dissipate currents stored in the appropriate loops and to switch the currents in the registers to the EN and W branches. If any of the drive lines 12, 22, 40 become resistive during this operation then this indicates that a branch EN or W is open at some bit and the array is inoperative. The reset currents are terminated and the current through drive line 12 is terminated leaving currents stored in operative bits of the status register in a direction determined by the polarity of the drive current. The drive current is then reversed so that the current and the stored current add in branches 16 to switch cryotron 28 resistive and divert current to the EN branch only at the non-faulty locations of the status register. The status register is reset and then set to the enable register by pulsing line 32. This sets cryotron 36 at all words where the enable register was successfully switched to branch EN, switches current to branch 34 and switches cryotron 38 resistive. Current is applied to line 12 before current through line 32 is terminated so that current is switched through the high impedance branch 14. When current flow is terminated current is again stored in the status register bits where current is in branch EN. Register ER is reset by pulsing line 31 and set to register SR by pulsing drive line 12 in a direction to set cryotron 28 resistive. The write register is set to the enable register by pulsing line 46. Register ER is then reset by pulsing line 31 and set to the write register WR by pulsing line 54. The write register is reset and then set to the enable register. The status register is then reset and set to the write register by pulsing line 12. This switches cryotron 98 resistive to divert current round branch 100 to switch cryotron 102 resistive to send current through the high impedance path 14 and cause current to be stored in the appropriate or termination of the drive current. Thus the procedure results in currents being stored in the status register only at those words where all parts of the status, enable and write registers are operative and in the absence of stored currents the ER and WR cannot be set. Associative operation.-Words having a "1" stored in a predetermined bit position can be determined by applying a logic "1" current to the appropriate bit drive line after the enable register of the words to be considered have been set to the state EN. In the bits where a "1" is stored the currents in branch 80 oppose, cryotron 104 remains superconductive and current remains in branch EN. However, if a "0" is stored the currents add to switch cryotron 104 resistive and current is switched to branch EN.