baber/WOPTO huggingface dataset:
Patent TW-459424-B (TW)
Title: Manufacturing method of high transmission electric connector terminal
Inventor: CHEN HENG-MING
IPC: H01R43/00
Filed: 2000-12-11
Granted: 2001-10-11
Abstract: The present invention provides a kind of manufacturing method for high transmission electric connector terminal. At first, plural sets of terminals corresponding vertically to each other are stamped and bent on a metal tape so as to make the upper and the lower row terminal sets connect together by the material tape. In addition, the contact portion and the insertion mount foot of each terminal are not on the same plane. After that, the upper row of plural terminal sets is bent toward the lower row direction of terminal sets so as to make the upper row and the lower row terminal sets stack together. When stacking, the separation between each terminal of the upper row and each terminal of the lower row is different such that the contact portions of each terminal on the upper row and on the lower row can be arranged on the same row. Because the insertion mount foot of each terminal and its contact portion are not on the same plane, a constant separating distance is formed in between the insertion mount feet of each terminal on the upper row and on the lower row. Finally, the contact portion of each terminal on the upper row and the lower row is stamped and bent to form an arc contact portion, which is then electroplated. Thus, the product of high transmission electric connector terminal can be completed. Because the present invention can only uses one set of stamping mold to manufacture plural terminals having different separating positions, such that it is capable of saving the manufacturing time and mold cost to raise the production efficiency. Additionally, the size can be controlled precisely to reach the effects of optimum quality.
Patent TW-471018-B (TW)
Title: Semiconductor processing equipment having improved process drift control
Inventor: WICKER THOMAS E
IPC: H01J37/32
Filed: 2000-12-15
Granted: 2002-01-01
Abstract: A plasma processing chamber including a slip cast part having a surface thereof exposed to the interior space of the chamber. The slip cast part includes free silicon contained therein and a protective layer on the surface which protects the silicon from being attacked by plasma in the interior space of the chamber. The slip cast part can be made of slip cast silicon carbide coated with CVD silicon carbide. The slip cast part can comprise one or more parts of the chamber such as a wafer passage insert, a monolithic or tiled liner, a plasma screen, a showerhead, dielectric member, or the like. The slip cast part reduces particle contamination and reduces process drift in plasma processes such as plasma etching of dielectric materials such as silicon oxide.
Patent TW-548132-B (TW)
Title: Process of discontinuous polycondensation and stirring reactor therefor
Inventor: WILHELM FRITZ
IPC: C08G63/78
Filed: 2001-01-16
Granted: 2003-08-21
Abstract: A process for the discontinuous production of granules from polycondensation polymers by precondensation of an oligomer at 5 to 400 mbar and subsequent polycondensation in a stirring reactor and subsequent granulation. In the vicinity of the outlet port, the density of the entraining surfaces lies between 1 and 8 m<2> per m>3> reactor space and constantly increases with increasing distance from the discharge region. Inside the reactor, there is a viscosity gradient between the region most remote from the discharge port and the zone of the discharge port. The thermal decomposition of the polymer melt flowing out of the reactor is compensated during granulation. The stirring reactor with horizontal longitudinal axis approximately has the shape of a single or double truncated cone. The reactor has rotatable, vertical product entraining surfaces and stationary scrapers between the same.
Patent TW-471182-B (TW)
Title: Thin film transistor having light guide material
Inventor: PENG JIA-PENG
IPC: H01L29/786
Filed: 2001-01-20
Granted: 2002-01-01
Abstract: A thin film transistor having light guide material is disclosed, which comprises: a transparent substrate; a gate formed on said transparent substrate; a dielectric layer formed on said transparent substrate and said gate; a light guiding layer formed on said dielectric layer; a source formed on said dielectric layer and said light guiding layer and located on one side of said gate; a drain formed on said dielectric layer and said light guiding layer and located on one side of said gate, wherein the drain and said gate are not overlapped, and the light guiding layer below the drain and between the gate forms a light guiding region; and a passivation layer formed on said source, drain, light guiding layer and dielectric layer.
Patent TW-527508-B (TW)
Title: Liquid crystal display device and producing method
Inventor: ISHIHARA SHOICHI
IPC: G02F1/139
Filed: 2001-02-12
Granted: 2003-04-11
Abstract: An alignment layer capable of causing liquid crystal molecules to have a pretilt angle from 15 degrees to less than 90 degrees is subjected to a parallel alignment treatment. Thereby, a high-speed liquid crystal display device, in which a bend alignment is easily formed by applying a voltage as low as several volts, is provided. In addition, the invention can provide a liquid crystal display device that does not require transition operation. Moreover, the device of the invention has good viewing angle characteristic, which makes the OCB mode device excellent in practical use.
Patent TW-483126-B (TW)
Title: Nonvolatile semiconductor memory, method of reading from and writing to the same and method of manufacturing the same
Inventor: YAMAUCHI YOSHIMITSU
IPC: H01L21/8247
Filed: 2001-03-02
Granted: 2002-04-11
Abstract: A nonvolatile semiconductor memory including at least two cells each comprising: a floating gate formed on a semiconductor substrate with the intervention of a first insulating film: a split gate formed on the semiconductor substrate with the intervention of a second insulating film at a predetermined distance from the floating gate; a control gate formed at least on the floating gate with the intervention of a third insulating film; and an impurity diffusion layer formed in a surface layer of the semiconductor substrate and capacitively coupled with an edge of the floating gate on an opposite side to the split gate in the channel direction, wherein the floating gate and the split gate of one cell are alternately arranged with the floating gate and the split gate of another adjacent cell along the channel direction and the impurity diffusion layer of one cell is capacitively coupled with a split gate of another adjacent cell.
Patent TW-507272-B (TW)
Title: Method of growing nitrogenous semiconductor crystal materials
Inventor: SCHOTTKER BERND
IPC: C23C16/34
Filed: 2001-04-12
Granted: 2002-10-21
Abstract: What is described here is a process for the initial growth of nitrogenous semiconductor crystal materials in the form AxByCzNvMw wherein A, B, C, is an element of group II or III, N is nitrogen, M represents an element of group V or VI, and X, Y, Z, W denote the molar fraction of each element of this compound, using a, which are deposited on sapphire, SiC or Si, using various ramp functions permitting a continuous variation of the growth parameters during the initial growth. This novel initial growth process is characterised by the aspect that during the initial growth process of the nitrogenous semiconductor crystal materials on sapphire, SiC or Si an abrupt change of the growth regime is not required for realising a structure suitable for the ongoing high-temperature growth.
Patent TW-578377-B (TW)
Title: Charge-pump circuit and method for controlling the same
Inventor: MYONO TAKAO
IPC: H02M3/07
Filed: 2001-04-25
Granted: 2004-03-01
Abstract: The purpose of the present invention is to provide a charge-pump circuit and its control method so as to solve the error operation problem of circuit caused by the parasitic diode forward voltage bias when using smaller step than the power source voltage Vdd to conduct boosting voltage in the charge pump circuit. The invented charge pump circuit contains the followings: the serially connected MOS transistors M1 and M2 for transferring at least the first and the second charges; the clock driver 3 for supplying clock to one terminal of the second capacitor 2; the first switch mechanism S2 for connecting in series the first and the second capacitors 1, 2 at the pumping node; and the second switch mechanism (S1, S3) for connecting the first and the second capacitors 1, 2 in parallel at the pumping node. The clock driver 3 changes the clock state when both the first and the second switch mechanisms are in an open-circuit state.
Patent TW-494483-B (TW)
Title: Method to form self-aligned elevated source/drain by selective removal of gate dielectric in the source/drain region followed by poly deposition and CMP
Inventor: PAN YANG
IPC: H01L21/225
Filed: 2001-05-15
Granted: 2002-07-11
Abstract: A method of manufacturing a self aligned elevated source/drain (S/D). A first insulating layer is formed over a substrate. The first insulating layer having at least a gate opening and source/drain (S/D) openings adjacent to the gate opening. Spacer portions of the first insulating layer define the gate opening. A gate dielectric layer is formed over the substrate in the gate opening. A conductive layer is formed over the substrate. The conductive layer fills the gate opening and the source/drain (S/D) openings. The conductive layer is doped with dopants. The conductive layer is planarized to form a gate over the gate dielectric layer and filling the gate opening and filling the source/drain (S/D) opening to form elevated source/drain (S/D) region. The conductive layer is preferably planarized so that the top surface of the conductive layer is level with the top surface of the first insulating layer. The spacer portions are removed the form spacer openings. LDD regions are formed in the substrate is the spacer opening. A dielectric layer is formed over the substrate filling the spacer openings. Source/drain (S/D) regions are formed in the substrate under the elevated source/drain (S/D) regions.
Patent TW-510103-B (TW)
Title: MIMO OFDM system
Inventor: LI YE
IPC: H04J99/00
Filed: 2001-05-15
Granted: 2002-11-11
Abstract: A MIMO OFDM system includes a plurality of space-time encoders for encoding respective data blocks with independent space-time codes. The transformed data block signals are transmitted by a plurality of transmit antennas and received by a plurality of receive antennas. The received data is pre-whitened prior to maximum likelihood detection. In one embodiment, successive interference cancellation can be used to improve system performance. Channel parameter estimation can be enhanced by weighting the channel impulse response estimates based upon a deviation from average.
Patent TW-I239940-B (TW)
Title: Glass tube for encapsulating semiconductors and method for encapsulating semiconductor elements
Inventor: KOSOKABE HIROYUKI
IPC: C03C3/089
Filed: 2001-05-16
Granted: 2005-09-21
Abstract: Glass, for encapsulating a semiconductor, which is substantially free of lead or other harmful ingredients, but which exhibits a sealing temperature of not higher than 710 DEG C, and which stably seals with Dumet. Further, when the glass has a viscosity of 10<6> dPa.s, the temperature of said glass is not higher than 710 DEG C, and includes two or more of Li2O, Na2O and K2O and B2O3. Also, the glass may comprise: SiO2, B2O3 and Al2O3 in an amount of from 40 to 70%, from 5 to 20% and from 0 to 15% by weight, respectively; MgO, CaO, SrO, BaO and ZnO in a total amount of from 0 to 45% by weight; and Li2O, Na2O and K2O in a total amount of from 5 to 25% by weight.
Patent TW-576949-B (TW)
Title: Antireflective coatings with increased etch rates
Inventor: MAO ZHIBIAO
IPC: G03F7/09
Filed: 2001-08-17
Granted: 2004-02-21
Abstract: The present invention provides new light absorbing compositions suitable for use as an antireflective coating (""ARC"") with an overcoated resist layer. ARCs of the invention exhibit increased etch rates in standard plasma etchants. Preferred ARCs of the invention have significantly increased oxygen content relative to prior compositions.
Patent TW-495359-B (TW)
Title: Electric toothbrush
Inventor: BLAUSTEIN LAWRENCE A
IPC: A61C17/34
Filed: 2001-11-09
Granted: 2002-07-21
Abstract: An electric toothbrush comprising an elongated body portion (10) and a head (16) including a static portion (22) and a moving portion (20), a handle (18), and an angled shaft (28) between the head (16) and the handle (18). The moving portion (20) rotates or reciprocates about an axis normal to a longitudinal axis (19) of the head (16). The moving portion (20) can include stiff bristles (24) and massaging tips (325) and the static portion (22) can include soft bristles (26) and massaging tips (327). The elongated body portion (10) is hollow and further includes a motor (32) in the hollow portion (30), which is operatively connected to the moving portion (20) for rotating or oscillating or reciprocating the moving portion. A battery (60) is located within the hollow section (30) for powering the motor (32). A switch (50) is operatively connected to the motor (32) to provide momentary and continuous operation of the toothbrush. A worm gear (40) and a pair of step gears (42, 43) are located in the hollow portion (30). The motor (32) is operatively connected to the worm gear (40) and the step gears (42, 43) are operatively connected to the worm gear (40) and to each other. One of the step gears (43) is offset with respect to a longitudinal axis (36) of the elongated body portion (10). A shaft (44) which is operatively connected to the offset step gear (43) and to a second end to the moving portion (20). Alternately, the toothbrush comprises a plurality of gears (202, 206) and swivel arms (220, 224, 240) which move the brush head (160) moving portion (164) in a rotating, oscillating or reciprocating manner.
Patent TW-544831-B (TW)
Title: LSI device failure analysis apparatus and analysis method thereof
Inventor: GOTO JUNICHI
IPC: H01L21/66
Filed: 2001-11-16
Granted: 2003-08-01
Abstract: The critical area calculation means (4), by accessing the relationship between the mask layout data of the target LSI device included in the design data (3) and the size and density of the extraneous materials including in the extraneous material distribution information (6), calculates the critical area of the failure node candidate, the results of this calculation being displayed by the critical area information display means (5). The displayed critical area information is support information, which indicates to be checked by physical means, of the failure node candidates.
Patent TW-562714-B (TW)
Title: Method and apparatus for manufacturing copper and/or copper alloy ingot having no shrinkage cavity and having smooth surface without wrinkles
Inventor: YAJIMA KENJI
IPC: B22D21/00
Filed: 2001-11-30
Granted: 2003-11-21
Abstract: The present invention discloses a method and apparatus for manufacturing copper and/or copper alloy ingot having no shrinkage cavity and having smooth surface without wrinkles and in particular to a method and apparatus for manufacturing copper ingot of high purity of 99.9999 wt% having no shrinkage cavity and having smooth surface without wrinkles. The method of the present invention comprises the steps of casting molten copper and/or copper alloy into a mold which has side wall heated to form a temperature gradient increasing from bottom to top and which is provided at the bottom thereof with a cooling pedestal. The apparatus of the present invention comprises: a cooling pedestal 4; a mold 1 positioned on the cooling pedestal 4; and a heating furnace 2 surrounding the periphery of the mold 1. The heating furnace 2 performs heating control to induce, in the mold, a temperature gradient that increases from the bottom to the top.
Patent TW-523901-B (TW)
Title: Electrostatic discharge protection device and the forming method thereof
Inventor: LIN SHI-TRON
IPC: H01L27/02
Filed: 2001-12-18
Granted: 2003-03-11
Abstract: The purpose of the present invention is to provide an electrostatic discharge (ESD) protection device having at least an isolation island and N-well. The isolation island has a terminal separated from one boundary of the ESD protection device and drain-doped region to form a gap in-between. The N-well is overlapped with the isolation island and keeps a predetermined distance with a channel region of the ESD device. The present invention further provides an isolation island having an interlock structure to lead the ESD current flow forward and reversibly toward the channel of the ESD device. The spreading resistance of the drain-doped region is thereby increased. Plural advantageous conditions can be accomplished, such as lower drain capacitance, lower standby power consumption and wider range of tunable resistance.
Patent TW-513584-B (TW)
Title: Free space dynamic optical coupling device
Inventor: TSAU SHR-LIN
IPC: G02B6/36
Filed: 2002-01-07
Granted: 2002-12-11
Abstract: A free space dynamic optical coupling device is disclosed, which is applied in coupling the optical signal in the inspection equipment in the automatic production line of fiber. The laser light signal from a static, fixed fiber is coupled into a rotating, moving fiber, which comprises: a static, fixed device to receive an optical input; a static, fixed ferrule connector into which the static, fixed device penetrates; a rotating, moving device to generate an optical output; a dynamic rotation ferrule connector into which the static, fixed device penetrates; and a free space is formed between the static, fixed ferrule connector and the dynamic rotation ferrule connector; a connection device for ferrule connector to connect the static, fixed ferrule connector and the dynamic rotation ferrule connector; a frame body to dispose the connection device for ferrule connector and it has a penetration-through space for the connection device of ferrule connector to penetrate through; plural flexible devices, one end of each flexible device is connected to the frame body, and the other end of it is connected to the connection part. By using the frame body to absorb the vibration, the vibration resulted from the rotating fiber in the process can be avoided and adjustment in three dimensions can be obtained.
Patent TW-561700-B (TW)
Title: Radio frequency transmitter and methods thereof
Inventor: BARAK ILAN
IPC: H04B1/04
Filed: 2002-01-17
Granted: 2003-11-11
Abstract: In one embodiment, the present invention provides a radio frequency transmitter that may have a processor and a controller that reduce current consumption of the power amplifier of the radio frequency transmitter.
Patent TW-529985-B (TW)
Title: Tweezers holder
Inventor: SGOBERO CHRISTIAN
IPC: A61B34/00
Filed: 2002-01-28
Granted: 2003-05-01
Abstract: The present invention relates to a holder for tweezers comprising a box (1), used for being mounted on the arms of a robot, including the tweezers, (3) fixing and positioning device (6-14) on one hand and the tweezers branches driving device on the other hand. This driving device contains a motor device (4, 17) which drives the push buttons (21) acting on the branches of the said tweezers.
Patent TW-548508-B (TW)
Title: An illumination engine for a projection display using a tapered light pipe
Inventor: LI KENNETH K
IPC: F21Y101/00
Filed: 2002-02-05
Granted: 2003-08-21
Abstract: An illumination engine for a projection display using a TLP including a reflector having a first focal point and second focal points. A source of electro-magnetic radiation disposed proximate to the first focal point of the reflector emits rays of radiation that reflect from the reflector toward the second focal point. A TLP collects and transmits substantially all of the radiation converged at the second focal point, adjusting the numerical aperture of the radiation, but curving the surface formed by the images of the radiation. An SLP or a lens collects and transmits substantially all of the radiation transmitted by the TLP, flattening the surface formed by the images of the radiation. A condenser lens collects and transmits substantially all of the radiation transmitted by the contoured delay element to a PBS and a projection system.
Patent TW-519720-B (TW)
Title: A ferroelectric capacitor structure having spacer and the method for fabricating the ferroelectric capacitor
Inventor: CHEN SHUE-SHUEN
IPC: H01L21/76
Filed: 2002-03-28
Granted: 2003-02-01
Abstract: The present invention provides a method for fabricating the ferroelectric capacitor having spacer structure. A diffusion barrier layer is formed in the ferroelectric capacitor structure of the present invention to protect the W-plug in high temperature process. The barrier layer may prevent the oxygen diffusing into and reacting with the W-plug to form the W-Oxide layer. On the other hand, a conductive spacer is formed in the structure of the present invention to make the structure having self-align function. That means an electrical connection with the conductive layer may be achieved through the spacer.
Patent TW-564521-B (TW)
Title: Cost saving methods using pre-defined integrated circuit modules
Inventor: SHAU JENG-JYE
IPC: H01L21/82
Filed: 2002-05-07
Granted: 2003-12-01
Abstract: The present invention provides cost saving integrated circuit (IC) design methods pre-defined masks. The same front-end structures are used not only by core circuits but also by peripheral structures including input/output (I/O) devices, bonding pads, seal rings, and scribe lanes. These methods allow high utilization rates for a wide variety of products. Additional cost saving is achieved by separately manufacturing I/O circuits and bonding pads using low cost IC technologies. Testing methods and special inter-module connection methods are provided to support IC modules that do not have connections to external pins.
Patent TW-540117-B (TW)
Title: Method for improving the roughness of the sidewall of a polysilicon layer in an etching process
Inventor: JANG MING-CHING
IPC: H01L21/306
Filed: 2002-05-24
Granted: 2003-07-01
Abstract: A method for improving the roughness of the sidewall of a polysilicon layer in an etching process comprises: depositing a polysilicon layer on a semiconductor substrate; performing a multi-stage etching process on the polysilicon layer to define a polysilicon gate on the upper surface of the semiconductor substrate, in which, upon completion of each stage's etching process, an oxidation process is performed on the exposed sidewall of the polysilicon layer to form a smooth oxidized surface layer to improve the rough surface thereof.
Patent TW-557596-B (TW)
Title: The method of preparing the solid-state polymer Zn-air battery
Inventor: YANG CHUN-CHEN
IPC: H01M12/06
Filed: 2002-06-03
Granted: 2003-10-11
Abstract: This patent relates to a method to fabricate the alkaline solid-state polymer Zn-air battery. The solid polymer Zn-air battery consisted of the zinc gel anode, the air cathode, and the alkaline solid polymer electrolyte. The formulation of anode zinc gel is similar to that of alkaline battery. The Zn gel anode contains a mixture of electrolytic dendritic zinc powders, KOH electrolyte, gelling agent and small amount of additives. Air cathode is made by the carbon gas diffusion electrode, in which comprising two types of layers, namely the gas diffusion and active layers. The active layer on the electrolyte side uses a high surface area carbon for the oxygen reduction reaction and potassium permanganate used as a catalyst for oxygen reduction. The diffusion layer on the air side has a high PTFE content to prevent KOH electrolyte weeping or climbing. Due to the sufficient amount of fresh air and oxygen supply, the air cathode can run continuously. Theoretically, Zn-air battery is an accumulator if the cell has enough zinc powders and electrolyte. The air cathode plays a role of energy transfer.