baber/WOPTO huggingface dataset:
Patent JP-H09131653-A (JP)
Title: Inner surface grinding device of non-magnetic tube
Inventor: YUKII MASAYUKI
IPC: B24B5/40
Filed: 1995-11-10
Abstract: PROBLEM TO BE SOLVED: To perform the grinding even in a case of a long tube without cutting or even in a case of a part which is folded several times over by placing a grinding wheel of magnetic substance in a non-magnetic tube, and arranging an electric magnet and an electric circuit to generate the magnetic force to give the grinding motion to the magnet to grind the inside of the tube on the outer side of the tube for grinding. SOLUTION: An inner surface grinding device consists of a magnetic grinding wheel 2 made of the magnetic substance which is placed in a tube 1 to be ground which is made of the non-magnetic substance, electric magnets 4-7 arranged on the outer circumferential surface of the tube, and an electric circuit 3 to control generation of the magnetic force of the electric magnets 4-7. The magnetic grinding wheel 2 placed in the tube 1 to be ground grinds the inner surface of the tube by turning while rubbing the inner surface of the tube by the magnetic force generated by the electric magnets 4-7. The grinding conditions to meet the purpose can be set by controlling the magnitude, direction, timing, and period of the current flowing in the electric magnets 4-7, and changing the shape, the surface roughness, etc., of the magnetic grinding wheel 2.
Patent JP-H02139512-A (JP)
Title: Gaussian type standard lens
Inventor: OHATA TATSUYA
IPC: G02B9/62
Filed: 1988-11-21
Abstract: PURPOSE:To compensate a sagittal comatic aberration by composing a lens system of seven lens elements and arranging at least one axial distributed index lens in the lens system. CONSTITUTION:The lens system consists of the seven lenses and at least one distributed index lens is provided to the lens system. When the distributed index lens is a negative lens, an axial type having a refractive index distribution which decreases in negative refracting power with the distance from the optical axis on a stop-side surface is constituted. Further, when a positive lens is applied, an axial type distributed index lens having a distribution which decreases the negative refracting power with the distance of the opposite surface from the stop from the optical axis is constituted. Consequently, the positive power is increased for a light beam passing through the peripheral part of the position lens with the refractive index distribution and the sagittal comatic aberration is suppressed.
Patent JP-S63146020-A (JP)
Title: Liquid crystal display device
Inventor: TERASAKA TORU
IPC: G02F1/1337
Filed: 1986-12-10
Abstract: PURPOSE:To obtain display characteristics for excellent liquid crystal images by constituting a liquid crystal display device so that the thick part of the orienting film of one substrate face the thick part of the orienting film of the other substrate. CONSTITUTION:The two substrates 1a and 1b which are manufactured by an oblique vapor-depositing method are so arranged that the thick part of the orienting film of the substrate 1a and the thin part of the orienting film of the substrate 1b face each other and the thin part of the orienting film of the substrate 1a and the thick part of the orienting film of the substrate 1b face each other. Thus, the thick part of the orienting film of one substrate and the thin part of the orienting film of the other substrate are set opposite each other, so the mean value of the sum of the thickness of the orienting films of those substrates becomes nearly constant and the influence of variation in angle of vapor deposition is canceled on the whole to decrease. Consequently, the uniformity of characteristics such as a contrast ratio, a threshold voltage, etc., is improved over the entire surface of a liquid crystal cell and the display characteristics for liquid crystal image are improved.
Patent JP-H10294276-A (JP)
Title: Pattern formation
Inventor: AZUMA TSUKASA
IPC: H01L21/027
Filed: 1997-10-24
Abstract: PROBLEM TO BE SOLVED: To suppress resist footing and undercut by forming a primer layer of neutralizer, by contacting the neutralizer vapor, which generates acid by exposure, with a base film surface formed on a semiconductor substrate, and forming a pattern on the primer layer by using chemical amplification resist. SOLUTION: A primer layer of neutralizer is formed by contacting the vapor of the neutralizer with a base contained base film surface on a semiconductor substrate. Then, chemical amplification resist is applied on the primer layer. When the resist is exposed, acid is generated from the acid generating agent in the resist and also from the primer layer. Therefore, the base generated from the base film is neutralized by the acid generated in the primer layer, and the acid from the acid generating agent in the resist is not neutralized by the base diffused from the base film. Thus, footing on the interface between the base film and the resist is prevented.
Patent JP-H11126766-A (JP)
Title: Method for cleaning semiconductor crystal wafer
Inventor: TANI TAKEHIKO
IPC: H01L21/304
Filed: 1997-10-24
Abstract: PROBLEM TO BE SOLVED: To provide a method for cleaning a semiconductor crystal wafer by which a very small quantity of impurities remaining on the mirror plane of a semiconductor crystal wafer whose surface is mirror-polished can be perfectly cleaned off and removed, and no conductive layer is formed at interface between the wafer and an epitaxial functional layer when the epitaxial functional layer is grown on the mirror-polished surface of the semiconductor crystal wafer. SOLUTION: A semiconductor crystal wafer whose surface is mirror-polished is immersed in an ultra pure water with dissolved ozone in which 0.5 ppm or higher concentration of ozone is dissolved, an ultra pure water solution with 20% of HF or an ultra pure water solution with 20% of ammonia irradiated with light having energy equal to or larger than a band gap. Then, the wafer is cleaned with an acid solution, an alkaline solution or a mixed acid- alkaline solution and then is cleaned with an ultra pure water.
Patent JP-H06139141-A (JP)
Title: Memory card device
Inventor: YOSHIOKA SHINPEI
IPC: G06F12/00
Filed: 1992-10-30
Abstract: PURPOSE:To efficiently execute data erasing processing and to shorten time required for erasing processing by writing one digital data in each of plural semiconductor chips when the number of digital data to be written is less than the number of semiconductor memory chips. CONSTITUTION:Data A are written in the blocks 13a to 13c of block numbers (1) to (3) (physical addresses), data B are written in the blocks 14a to 14c of block numbers (5) to (7) (physical addresses) and data C are written in the blocks 15a to 15c of block numbers (9) to (11) (physical addresses). Since chip erasing can be executed by distributing and recording respective data A to C in respective EEPROM chips 13 to 15 even in the case of erasing any data A, B or C, data erasing processing can be efficiently executed, time required for erasing processing can be shortened and rapid data rewriting can be executed.
Patent JP-H01134074-A (JP)
Title: Scaffolding device for hydraulic machine
Inventor: OTANI FUMIO
IPC: E04G1/36
Filed: 1987-11-19
Abstract: PURPOSE:To facilitate the assembly of a scaffolding frame by installing a self- propelled hoist in the inner part of a manhole passage installed in the side wall of a draft tube, supporting the scaffolding frame with this self-propelled hoist and inserting it into the inside of the draft tube. CONSTITUTION:A hydraulic machine is made to flow out to a draft tube 8 after water taken in a scroll case 7 passes through a guide vane 6 and rotates a runner 2 attached to a main shaft 1. An inside inspecting manhole 9 is installed on a side wall of the draft tube 8, and this manhole 9 is connected to the outside via a passage 10. In the above constitution, a rail 14 is installed in a ceiling 13 of this passage 10, and a self-propelled hoist 15 is installed in this rail 14. In addition, an opening 16 for inserting a scaffolding frame 11 is formed in a lower part of the manhole 9, while a recess hole part 17 for inserting a tip part 11a of the scaffolding frame 11 is formed on a side wall of the draft tube 8 being opposed to this opening 16.
Patent JP-H10127912-A (JP)
Title: Centralized management system for game medium counter
Inventor: TAKEMOTO TAKATOSHI
IPC: A63F7/02
Filed: 1996-11-05
Abstract: PROBLEM TO BE SOLVED: To realize better operation of a game place by providing the subject system with a display means for displaying the transition data of a counted result for one day for respective groups corresponding to history data based on the display signals of a transition data display control means for outputting the display signals correspond ing to the history data of game machine operation conditions. SOLUTION: A transition data display control means 62 calls the counted result of respective gift ball counters stored in a counted result storage means 81 by a group unit and executes a graph preparation processing as the transition data for one day. Simultaneously, a graph for indicating the transition of the number of times of special prize generation for instance for one day for which the history data of respective pachinko machines stored in a RAM 65 are called by the group unit and compared with the transition data is prepared.  Then, based on the display signals of the control means 62, a polygonal line graph for indicating the transition data of the counted result total value of gift balls for one day is displayed as the history data corresponding to the graph of a special prize generation number-of-times total value for one day in the order of group symbols for the respective groups on the screen of a display device 82.
Patent JP-H08145954-A (JP)
Title: Method and apparatus for eddy current detection testing
Inventor: SATO TOMINARI
IPC: G01N27/90
Filed: 1994-11-28
Abstract: PURPOSE: To obtain a method for eddy current detection testing which can search a thinned corrosive state generated in an inner tube with high reliability to inspect the heat transfer tube of a double tube specification. CONSTITUTION: A method for eddy current detection testing has the steps of moving a probe which has a probe body 8a, a coil axis core along the body axis core direction of the body 8a and a pair of searching coils 11 provided by aligning the axial cores in the axial direction of the body 8a in a tube material, and detecting the change of an eddy current induced in the material to detect the flaw of the material. When the material is a double tube having an inner tube 3 and an outer tube 4, a pair of ferrite cores 13 insulated by an insulator 12 at the intermediate size between the coils 11 are provided to form the body 8a, the frequency of AC flowing to the coils 11 is changed, the optimum frequency in which the absolute sensitivity is reduced in the coils 11 is obtained, and the flaw of the inner tube is detected at the optimum frequency.
Patent JP-H05126928-A (JP)
Title: Temperature-jump nuclear magnetic resonance device
Inventor: AKASAKA KAZUYUKI
IPC: G01N24/08
Filed: 1991-11-08
Abstract: PURPOSE:To change the temperature of a sample in a short time and, at the same time, to efficiently receive NMR signals. CONSTITUTION:This temperature-jump nuclear magnetic resonance device is provided with a coil 5 for microwaves which is coaxially arranged in a transmission-reception coil 4 and a driving and control means which drives and controls a microwave oscillator. When microwaves are radiated against a sample by driving the coil 5, with pulses the temperature of the sample can be raised in a short time and NMR signal can be efficiently received.
Patent JP-H04167300-A (JP)
Title: Integrated circuit with built-in prom
Inventor: KANAI TETSUO
IPC: G11C29/00
Filed: 1990-10-30
Abstract: PURPOSE:To enhance system reliability by detecting that an error correction processing has been carried out to correct errors in an error correction circuit as for read data from PROM and outputting an error correction signal. CONSTITUTION:An error correction detection circuit 8 comprises an OR gate GO1, an inverter IV1, a HAND gate GNA1, a NOR gate GNO1, and transistors Q1 and Q2. This circuit detects that error correction has been made in an error correction circuit 4A as for data read out from PROM 1 and outputs an error correction detection signal ER to the outside. Since it is possible to know whether or not error correction has been made to the outside based on the error correction detection signal RR as a result, it can be shifted to other devices if it involves many errors. This construction makes it possible to enhance system reliability.
Patent JP-H11132118-A (JP)
Title: Air cleaner
Inventor: ARAKI TSUNEO
IPC: B01D46/00
Filed: 1997-10-24
Abstract: PROBLEM TO BE SOLVED: To simply and easily attach and detach a cover member to/from a main body case by one hand in a single operation, and prevent the cover member from easily detach in the case where vibration, shock, and the like are applied on the main body case. SOLUTION: This device is composed of a main body case 20 provided with a cleaner chamber 22 on which a filter element 15 is mounted and a lock claw 30 projected from the circumferential wall part 22 a of the cleaner chamber 22, a cap chamber 42 formed in a size capable of covering the main body case 20, an engaging surface part 44a, and a pair of push-press surface parts 44b, 44c. A lock opening 50 which abuts on an engaging end surface 30a is formed on the engaging surface part 44a of the cover member 40. The lock opening part 50 of the engaging surface part 44a is bent in a direction slipped off from the engaging end surface 30a of the lock claw 30 by push-pressing a pair of push-press surface part 44b, 44c so as to hold from those outsides.
Patent JP-H10145988-A (JP)
Title: Motor core, production thereof and motor having motor core
Inventor: KISHIMOTO HIROYUKI
IPC: H02K21/22
Filed: 1996-11-05
Abstract: PROBLEM TO BE SOLVED: To provide a method for producing a motor core while simplifying the production process and facility. SOLUTION: The method for producing a motor core comprises a pretreatment step for thermally removing matters adhering to the surface of a core body, a first step for coating the core body with a powdery material at a first predetermined thickness, a step for removing the powdery material from the peripheral surface at the forward end of teeth part of the core body, a second step for coating the core body with the powdery material at the first predetermined thickness, a step for heating the core body coated with the powdery material, and a step for cooling and securing the core body.
Patent JP-H08211247-A (JP)
Title: Wavelength resonance fusion-type fiber coupler
Inventor: TOMASU JIYON KAREN
IPC: G02B6/293
Filed: 1995-11-10
Abstract: PROBLEM TO BE SOLVED: To provide a, wavelength sensitive fused type fiber coupler of another form showing no limitation of wavelength separation by further providing a substantially matched pair of core/cladding mode converters having first and second optical fibers on the upper stream and lower stream of a coupling area, respectively. SOLUTION: Two single mode fibers 30, 31 are arranged in parallel over a part of the length, and the part forms a coupling area 32. In the coupling area 32, the two fibers 30, 31 are fused together and gradually drawn. The continuous drawing is stopped at a point of time when the power transmission of cladding mode from the first fiber to the second fiber reaches its maximum value. A matched pair of core/cladding mode converters 33, 34 of a period Λ1 are provided on the opposite side to the coupling area 32 of the fibers 30, 31, respectively. The period Λ1 is selected so as to realize the mode conversion of the light having a wavelength λ1 .
Patent JP-H06138985-A (JP)
Title: Power upply control circuit for extension unit
Inventor: HACHIMAN MASASHI
IPC: G06F1/26
Filed: 1992-10-30
Abstract: PURPOSE:To normally start the operation of an internal circuit by turning on a power switch of each section when an extension unit which extends the function of a computer main body as an information processor is connected to a computer main body. CONSTITUTION:The circuit consists of a computer main body 12 with power switch 3 and an extension unit 1 which extends the function. The computer main body 12 is provided with a remote switching circuit 5, and a personal computer main body 12 is provided with a power source control circuit 14 for extension unit. Thus, according to the operation order of the power switch 3, the power supply to various additional equipments of the extension unit 1 is controlled.
Patent JP-2000118299-A (JP)
Title: Rear side monitoring device for vehicle and its control method
Inventor: MASUDA MOTOI
IPC: B60R1/06
Filed: 1998-10-15
Abstract: PROBLEM TO BE SOLVED: To provide the images of the right and left rear sides equivalent to the dead angles of a driver and having little distortion on the same screen. SOLUTION: An omnibearing visual sensor 1 for picking up an image around a vehicle is loaded on the vehicle, an omnibearing image is formed from an image signal generated by the omnibearing visual sensor 1 by an image input section 2, this omnibearing image is converted into a cylindrical projected image by an image conversion section 3, right and left rear side images of specified ranges around the right and left rear sides of the vehicle are selected from the obtained cylindrical projected image, and these two rear side images are displayed on one of the screen of a display section 4 composed of a liquid crystal display or the like.
Patent JP-H11136348-A (JP)
Title: Digital telephone system
Inventor: ONOZUKA KATSUHIKO
IPC: H04M1/658
Filed: 1997-10-27
Abstract: PROBLEM TO BE SOLVED: To accurately control an automatic answering function of a telephone system that accommodates an ISDN line by determining whether or not a received telephone number matches with another telephone number that is registered on memory and signaling an incoming call to corresponding incoming call signaling line when there is matching. SOLUTION: When a user of a digital telephone set 3 calls a telephone number of an ISDN line from a portable telephone to confirm whether a business message for himself is recorded in the set 3 that is used by himself from a place of visit away from home, an incoming call arrives on the ISDN line. In such cases, a controlling part 22 of a main device 1 detects the matching between the telephone number of a caller which is notified from a network side and an abbreviated dial data that have been registered in an abbreviated area 23A, and if both match, the part 22 signals the incoming call to a corresponding line that is registered on the area 23A. As a result of this, the person answers the incoming call after the set 3 of the user rings the incoming call and reproduces a business message that is recorded on the self-telephone.
Patent JP-2001119470-A (JP)
Title: Telephone voice processor
Inventor: MATSUKAWA HIROSHI
IPC: H04B3/23
Filed: 1999-10-15
Abstract: PROBLEM TO BE SOLVED: To realize a telephone voice processor that can properly conduct voice processing in a hands-free telephone set and effectively conduct echo elimination processing or the like. SOLUTION: In a telephone voice processor that is used for a hands-free telephone set which transmits a voice picked up by a microphone 10 installed in the interior of a vehicle and reproduces the voice of the destination from a speaker 11 installed in the interior of the vehicle and that synthesizes an echo cancelation signal obtained by applying delay processing to a received signal of a phone 1 and adjusting the level with an input signal to the microphone 10 to generate a transmission signal so as to eliminate an echo mixed to the transmission signal resulting from the received speech signal reproduced from the speaker 11 and given to the microphone 10, an operating condition of a voice processing section that processes a transmission voice signal and a reception voice signal is set properly in response to conditions such as a transmission sound volume,  a reception sound volume and a model of the vehicle or the like.
Patent JP-S62157789-A (JP)
Inventor: ADACHI HIDEO
IPC: B25J9/02
Filed: 1985-12-27
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H11134735-A (JP)
Title: Information recorder
Inventor: SATAKE MIKI
IPC: G11B15/00
Filed: 1997-10-27
Abstract: PROBLEM TO BE SOLVED: To protect a recording medium and a recording/reproducing mechanism for pull-out operation of a cartridge while recording in an information recorder in which the cartridge incorporating the recording medium and the recording/reproducing mechanism is loaded on a main body device so as to perform the recording operation of information. SOLUTION: A cartridge 100 is inserted into a housing part 210 of a camera main body 200, is connected through a connecter, an open/close cap 310 is closed and a video signal photographed by the camera main body 200 is recorded on a video tape in the cartridge 100. Further, the camera main body 200 is provided with a detector 500 detecting the opening/closing of the open/close cap 310, when the open/close cap 310 is opened while recording operation, it detects this and after the main body 200 performs the stop processing of respective mechanisms for the cartridge 100 at a prescribed timing, performs the processing of stopping a power source and stops the power source before the cartridge 100 is pulled out.
Patent JP-S62151009-A (JP)
Title: Digital notch filter
Inventor: KOYABU KUNIHIRO
IPC: H03H17/06
Filed: 1985-12-25
Abstract: PURPOSE:To decrease number of storage circuits by providing one or plural adder circuits adding an output data of a storage circuit at the end or on its way of a storage circuit group and an input data of the said storage circuit and one or plural multiplication circuits multiplying output data of the said adder circuits. CONSTITUTION:The titled filter consists of the storage circuit group 20 being cascade connection of mn-set (where mi+1>mi, i=1, 2, 3, ..., n-1), an adder circuit 11i (i=1, 2, 3, ..., n) adding an output of the storage circuit mi (i=1, 2, 3, ..., n) and an input 300, a multiplication circuit 502 multiplying an output 311 of the adder circuit 111 and the output 312 of the adder circuit 112, and a multiplication circuit 50i (i=3, 4, 5, ..., n) multiplying the output 32i (i=2, 3, 4, ..., n-1) of the multiplication circuit 50i (i=2, 3, 4, ..., n-1) and the output 31i (i=3, 4, 5, ..., n) of the adder circuit 11i (i=3, 4, 5, ..., n). The output 31i (i=1, 2, 3, ..., n) of the adder circuit 11i (i=1, 2, 3, ..., n) is multiplied by using the multiplication circuit 50i (i=2, 3, 4, ..., n).