baber/WOPTO huggingface dataset:
Patent JP-S63129313-A (JP)
Title: Interlacing optical mechanism
Inventor: NAKAZATO HIDEAKI
IPC: H04N5/335
Filed: 1986-11-19
Abstract: PURPOSE:To shorten a transition time by installing two reflecting mirrors which are set previously for odd-numbered fields and even-numbered fields and switching their optical paths. CONSTITUTION:A reflecting mirror 11 with an interlacing angle for the odd- numbered fields and a reflecting mirror 11 with an interlacing angle for the even-numbered fields are arranged opposite each other and an optical path switch 16 which has a semicircular plate type both-surface reflecting mirror 12 is provided on a plane crossing the opposition-directional center line at its middle point; and the optical path switch 16 is rotated around the center line to alternate a case where incident luminous flux 17 is reflected by the reflecting mirror 10 at right angles and then reflected again by the both-surface reflecting mirror 12 at right angles to enter an image formation optical system 5 and a case wherein the light is reflected by the both-surface reflecting mirror 12 at right angles and then reflected again by the reflecting mirror 11 at right angles to enter the image formation optical system 5 according to the rotational position of the both-surface reflecting mirror 12. Consequently, the transition time require to switch both odd-numbered and even-numbered fields is shortened.
Patent JP-H10101894-A (JP)
Title: Resin composition and its molding product
Inventor: ASAI KUNIHIKO
IPC: C08L53/02
Filed: 1996-09-27
Abstract: PROBLEM TO BE SOLVED: To obtain a resin composition capable providing a molding product having high impact resistance and good application property of paint and reducing the drop of the impact strength by coating. SOLUTION: This composition comprises (A) a polypropylene-based polymer having propylene-ethylene block copolymer, (B) an ethylene-propylene-based rubber, (C) a triblock copolymer, (D) a modified polyolefin polymer having a hydroxy group, (E) an oligomer having a polar group at the terminal and (F) talc. The component A of the polypropylene-based polymer has 5-100g/10min melt flow rate(MFR) and the xylene extract of the component A at 20 deg.C has 2.0-5.0/dl intrinsic viscosity. The component B of the ethylene-propylene-based rubber has 40-60 wt.% propylene content and 0.5-10g/10min MFR. The compomnent C of the triblock copolymer has 40-200g/10min MFR. The critical energy release rate between the triblock copolymer and the xylene-undissolved component of the component A of the polypropylene-based polymer at 100 deg.C is >=20J/m<2> . The percentage of the component C is 2-10wt.%.  The content of the unsaturated compound having the hydroxy group in the component (D) of the modified polyolefin polymer is 0.5-7.0 wt.% and the percentage of the component D is 0.5-40wt.%. The number average molecular weight of the component E of the oligomer is 300-10,000 and the percentage of the component E is 0.5-10wt.%. The component F of the talc has <=5μm average particle diameter and the percentage of the component E is 5-25 wt.%.
Patent JP-H07110934-A (JP)
Title: Magnetic recording medium
Inventor: TSUNODA SHOHEI
IPC: C09D5/23
Filed: 1993-10-08
Abstract: PURPOSE:To obtain a magnetic recording medium which is excellent in heat resistance, resistance to solvent and wear resistance without use of a heat hardening type hardening agent which is capable of hardening at a normal temperature below 40 deg.C and is also of a normal type. CONSTITUTION:A magnetic recording medium is made up of a coat layer mainly composed of a magnetic powder and a binder formed on a non-magnetic body. A main binder component herein used is polyurethane resin containing one or more hydrophilic functional group in a molecular chain as selected from among uerthodione group, a SO3M group, a COOM group, a P=O(OM')2 group, a tertiary amino group and a quanternary ammonia salt (M represents hydrogen or alkali metal and M' hydrogen, alkali metal or a hydrocarbon group) and a urethodione group dissociation catalyst herein used is one or more selected from among 1,8-diazabicyclo (5,4, 0)-undecene-7 and a borane salt thereof, a phenol salt thereof, an octylate thereof, a formate thereof and a p-toluen sulfonate thereof.
Patent JP-H10162327-A (JP)
Title: Magnetic tunnel joining device and magnetic reluctance reading head
Inventor: ROBERT EDWARD FONTANA JR
IPC: G11B5/39
Filed: 1997-10-09
Abstract: PROBLEM TO BE SOLVED: To provide a magnetic tunnel joining(MTJ) device which can function as a magnetic reluctance(MR) reading head linearly responding to a magnetic field from a recording medium. SOLUTION: The MTJ device is constituted of an antiferromagnetic layer 116, a fixed ferromagnetic layer 118 which is exchange-biased with the antiferromagnetic layer so that a magnetic moment cannot rotate even in the presence of an applied magnetic field 182, an insulating tunnel barrier layer 120 being in contact with the fixed ferromagnetic layer and a detection ferromagnetic layer 132 having the magnetic moment which is freely rotable in the presence of the applied magnetic field. Respective layers are rectangular shapes having parallel flank edges and the magnetic moment of the detection ferromagnetic layer 132 is bised in a longitudinal direction by a bias ferromagnetic layer 150 magnetostatically connected therewith in the absence of the applied magnetic field.  An insulating layer 160 prevents shunt of a detection current and magnetostatically connects the bias ferromagnetic layer with the detection ferromagnetic layer without exerting adverse influence on the resistance of the MTJ MR head.
Patent JP-H09121355-A (JP)
Title: Moving image coding/decoding device
Inventor: GO YUKIO
IPC: H04N19/33
Filed: 1995-10-25
Abstract: PROBLEM TO BE SOLVED: To improve the efficiency encoding and the quality of a picture by calculating a motion vector from pictures for two past frames. SOLUTION: A preceding frame picture signal s14-3 is read out from a memory 14, based upon a current frame picture signal s10 inputted from the external and motion vector information s11 outputted from a calculating means 11 and error information is sent to a compressed coding means 16 as a difference signal s12. A difference signal s16 is decoded to picture information by a DCD 17 and outputted as a difference signal s17. A current frame picture is decoded by the picture block position of the difference signal s17 of the current frame and motion vector information s11 on an inputted block position and the decoded picture is supplied to the memory 14. On the other hand, a picture signal s14-1 for a preceding frame is supplied to a memory 15.  The calculating means 11 calculates a motion vector between two frames from the picture signal s14-2 of the preceding frame which is outputted from the memory 14 and the picture signal s15 of two frames before which is outputted from the memory 15.
Patent JP-H09189748-A (JP)
Title: Method for adding test point to one of a plurality of signal receiving nodes in circuit
Inventor: CHENG KWANG-TING
IPC: G06F11/22
Filed: 1996-10-21
Abstract: PROBLEM TO BE SOLVED: To insert a test point into a circuit while minimizing the performance deterioration of the circuit by deciding the signal slack and estimated testability of each node. SOLUTION: The testability of each node is calculated by calculating the signal slack of each node. The testability of each node is decided based on a cost reducing factor. Then whether or not the calculated testability (cost reducing factor) of each node is the optimum is decided. At the same time, whether or not the excessive delay of each node is smaller than the maximum allowable threshold is checked. When the testability is the optimum in the node and the delay associated with the addition of a test point is equal to or smaller than a threshold slack value, the test point is inserted. Thereafter, the failure coverage obtained after the test point is inserted is calculated.
Patent JP-S61156221-A (JP)
Title: Optical element
Inventor: NISHIOKA KIMIHIKO
IPC: G02F1/01
Filed: 1984-12-28
Abstract: PURPOSE:To dissolve deviation of image forming points relying on the polarizing direction, by variably controlling the length of an optical path by combining two optical elements whose molecule oriented directions become opposite to each other on a plane vertical to the optical axis and changing an applied voltage. CONSTITUTION:Liquid crystal lenses 12a and 12b are formed by enclosing liquid crystal 16 in the hollow cells between one surfaces of adjacent transparent plates 13 and a concave lens 15 and an AC voltage is applied across a pair of transparent electrodes 17 and 18. When the orienting directions of liquid crystal molecules 21a and 21b are made opposite the each other about a plane intersecting the optical axis at right angles and the sizes of the orienting directions are made equal to each other by applying the same voltage across the liquid crystal lenses 12. The molecules 21a and 21b are oriented in a rightward-descending and rightward-descending conditions, respectively. There fore, deviation of image forming positions can be dissolved and, at the same time, the focal distance can be changed by changing the applied voltage, since the advancing course of the abnormal light Le of rays made incident along the optical axis is deviated upwar and then returned to the original condition.
Patent JP-H10125617-A (JP)
Title: Method of manufacturing semiconductor device
Inventor: YOSHIIE MASANOBU
IPC: H01L29/49
Filed: 1996-10-21
Abstract: PROBLEM TO BE SOLVED: To provide a stable and reliable electrode of policed structure or metal structure, capable of having low resistance and no threshold variation of a transistor with a productive method capable of reducing the number of manufacturing processes and providing sufficient process margin. SOLUTION: After a polysilicon film 4 of approx. 500nm thickness is formed by LP-CVD method, an inert gas containing oxygen is flowed for 1 to 10 minutes to form a diffusion protection layer 5, consisting of an silicon oxide of approx. 2nm thickness in an oxidative atmosphere. A polysilicon film 6 is deposited and a tungsten sliced film 7 is deposited using dichlorosilane gas and hexafluoride tungsten gas. A diffusion preurentivce layer 5 prevents fluorine from diffusing into a gate oxide film to thicken it.
Patent JP-H05113006-A (JP)
Title: Structure of arrangement of reinforcement for reinforced concrete beam
Inventor: NAKACHI TADAHARU
IPC: E04C5/06
Filed: 1991-10-24
Abstract: PURPOSE:To form a through-hole for installation of pipe lines or the like in the span center part of a reinforced concrete beam which has a low stress level, while maintaining an earthquake resistance at a level equal to that of an X-like reinforcement. CONSTITUTION:Of upper and lower end main reinforcements which are laid at the upper and lower ends of a reinforcement concrete beam 11, at least one lower end main reinforcement 13 and the upper end main reinforcement 14, excepting main reinforcements 13', 14' positioned opposite side ends, are bent so as to have parallel parts 16 which are in a substantially equiside trapezoidal shape and which are projected toward the center vertically through inclined parts 15 at the opposite ends. Further, a through-hole 12 is formed between the parallel parts 16 projected from the upper and lower main reinforcements 13, 14.
Patent JP-H05119121-A (JP)
Title: Waveform generating apparatus
Inventor: AGATA TATSUYUKI
IPC: G01R31/28
Filed: 1991-10-24
Abstract: PURPOSE:To prevent malfunction by providing a storage circuit, storing encoded data with a format encoding circuit beforehand, and avoiding the generation of an invalid time. CONSTITUTION:Data Da, i.e., pattern data Pda, are inputted into a terminal Di1 of an FiFo 4A for leading in an FiFo (first-in first-out) part. Pattern data Pda, i.e., Dc, which are inverted with an inverter 321 of a format encoding circuit 32 are inputted into a terminal Di2. Meanwhile, data Db of an AND gate 322 are inputted into a terminal Di1 of an FiFo 4B for trailing, and data Dd of an AND gate 323 are inputted into a treminal Di2. The data stored in the FiFo beforehand are outputted into an RS flip-flop 35 based on a leading CLK and a trailing clock TCK. Therefore, an invalid time, which is generated when the data are switched with the format encoding circuit 32, is not formed, and the malfunction can be prevented.
Patent JP-H03137960-A (JP)
Title: Apparatus for supplying pail can sealing hot melt adhesive
Inventor: TSUJI KIYOSHI
IPC: B05C5/00
Filed: 1989-10-24
Abstract: PURPOSE:To prevent the presence of a stagnation place such as a tank or a storage chamber in a supply route and to prevent the deterioration of a hot melt adhesive by connecting a melting unit and a coating unit through a gear pump unit. CONSTITUTION:The hot melt adhesive supplied from a single melting unit A through a pressure feed heating hose 1 is respectively supplied to a plurality of coating units C by a gear pump unit B through pressure feed heating hoses 2, 2. At this time, the supply amounts (pressures) of the adhesive supplied to the respective coating units C are arbitrarily set independently by controlling a servo motor.
Patent JP-H08141929-A (JP)
Title: Edge plate piece pulling-out device
Inventor: DAIMATSU TAKAKAZU
IPC: B31B1/14
Filed: 1994-11-11
Abstract: PURPOSE: To provide a convenient edge plate piece pulling-out device by which an edge plate piece constituting a Tomson edge can be simply pulled out only by handle operation. CONSTITUTION: An edge plate piece pulling-out device is provided with a frame body 1 having support legs 2, a first sandwiching body 3 arranged and installed in the frame body so as to be freely raised and lowered, a second sandwiching body 5 pivotally fixed to the first sandwiching body by crossing the first sandwiching body and an actuating member 8 which is pivotally fixed to the frame body by being connected to the second sandwiching body and has an operation handle 9 and closes the second sandwiching body by rotating by a prescribed angle by handle operation and integrally raises-lowers the second sandwiching body together with the first sandwiching body.
Patent JP-H03139851-A (JP)
Title: Semiconductor device
Inventor: FUKUDA KAZUYUKI
IPC: H01L21/60
Filed: 1989-10-25
Abstract: PURPOSE:To prevent erosion of an electrode terminal by the solder at soldering and the short circuit of a wiring pattern by bonding a semiconductor element having a solder bump with an electrode element formed of an electrolytic plated layer. CONSTITUTION:A paste 4 has glass particles as a binder and gold as a main component. Metal organic pastes 3a and 3b whose main components are gold are laminated in a partially overlapped pattern at parts where an undercoat glass layer is not present on an insulating substrate. Minute machining is performed for a wiring pattern by a photoetching technology. The vicinity other than a soldering pad which is to become a connecting part in the wiring pattern is protected from the upper part with photoresist 5 having excellent solder-heat resisting property. Electrolytic plating with Ni 6 is performed as a barrier. Electrolytic plating is further performed with Si-Pb 7 on the upper part. This semiconductor device is constituted so that the plated surface is lower than the photoresist layer in the vicinity of the surface. Thus, the gold is not shorted by the solder erosion into a hole-shaped electrode terminal.
Patent JP-H03138127-A (JP)
Title: Blow molding device
Inventor: ETO SHINSUKE
IPC: B29C49/04
Filed: 1989-10-25
Abstract: PURPOSE:To break through a parison by providing a guide means for rotating an air blow nozzle corresponding to the axial displacement of the air blow nozzle on a section in which a guide hole and the air blow nozzle are slid together. CONSTITUTION:A guide means for rotating an air blow nozzle 7 corresponding to the axial displacement of the air nozzle 7 is installed on a section in which a guide hole 11 formed in a mold and the air blow nozzle 7 to be inserted into said guide hole 11 are slided together. As for said guide means, for exam ple, the combination of a helical projected line 15 formed on the inner peripheral surface of the guide hole 11 and a helical channel 14 formed on the outer periph eral surface of the air blow nozzle 7 is utilized. Therefore, when axial push-in force is applied to the air blow nozzle 7 in order to insert the air blow nozzle 7 to a parison P, the air blow nozzle 7 is rotated by the engagement of the helical projected line 15 and the channel 14. The air blow nozzle 7 is practically screwed into the parison P by said arrangement to break through the parison easily.
Patent JP-H08105252-A (JP)
Title: Lock and opening/closing confirmation mechanism for safe and desk drawers
Inventor: TAMURA HARUTO
IPC: E05B19/22
Filed: 1994-10-05
Abstract: PURPOSE: To confirm on a built-in display that there occurs no abnormality in order to prevent a trouble with control of a safe and desk drawers. CONSTITUTION: A magnetically recording chip capable of inputting and erasing magnetic signals is built in the main body of a safe or a desk drawer. Also a signal read mechanism is built in the door of the safe or the movable part of the drawer. When it is opened by releasing a lock, first an electronic circuit is turned ON and then the generation of signals and their reading are made instantaneously and in physical order.
Patent JP-S62136909-A (JP)
Title: Variable gain circuit
Inventor: AMASAWA KIYOSHI
IPC: H03G3/30
Filed: 1985-12-11
Abstract: PURPOSE:To decrease the gain of a signal input section when a signal output of a dual difference circuit is decreased and to increase the gain of the signal input section when the signal output of the dual difference circuit is increased by using an output of the dual difference circuit as a signal output and feeding back the other output to the signal input section of the dual difference circuit. CONSTITUTION:A signal amplified in response to a voltage of the 3rd variable bias power supply is extracted from an output of a voltage conversion circuit 11 and of the 2nd current mirror circuit 10 connected between the output of the 1st current mirror circuit 9 and a base of the 2nd transistor (TR) Q2. The the 2nd TR, the 1st current mirror circuit 9 and the voltage conversion circuit 11 act like a feedback circuit and the gain of the signal input section is decreased when the signal output of the dual difference circuit 8 is decreased and the gain of the signal input section is increased when the signal output of the dual difference circuit is increased.
Patent JP-S62136830-A (JP)
Title: Substrate for integrated circuit
Inventor: AMANO AKIRA
IPC: H05K3/34
Filed: 1985-12-11
Abstract: PURPOSE:To eliminate stress concentration to a solder joining section by constituting the titled substrate so that a section joining with a solder bump on the chip side in a conductor layer is brought to a non-joining state between the section joining with the solder bump and the substrate under the state, in which a chip is mounted, and floated from the substrate side. CONSTITUTION:An adhesive layer 3 is applied previously to a section corresponding to a chip fitting position in a conductor layer 21 and the conductor layer 21 is formed according to a pattern on the substrate 2 side where a chip 1 is mounted. The chip 1 is placed at a predetermined position on the substrate 2 under the state, and solder bumps 11 and a pretinning layer 22 are made to solder-reflow, thus bonding the chip 1 at the position of mounting. The adhesive layer 3 is removed through chemical treatment, and a clearance 4 is formed so that the sections of the conductor layer 21 joined with the solder bumps 11 are floated from the board surface of the substrate 2 and section among the sections of the conductor layer 21 joined with the solder bumps 11 and the substrate 2 are brought to a non-joining state. Accordingly, stress resulting from the difference of thermal expansion coefficients between the chip 1 and the substrate 2 when thermal stress is applied is let to escape by the non-joining sections, and the stress concentration of the solder joining sections is eliminated, thus allowing an improvement in reliability and the increase of the density of the mounting of the chip.
Patent JP-H0997327-A (JP)
Title: Scanner device
Inventor: FUJIMIYA HITOSHI
IPC: G06T1/00
Filed: 1995-10-02
Abstract: PROBLEM TO BE SOLVED: To read a weak light emission pattern generated by a flat plate type sample with high sensitivity by providing a light converging means, a moving means, a light receiving means which photodetects the light of a sample pattern converged by the light converging means by dividing the light into specific sections and scanning light from the sections linearly, etc. SOLUTION: This device consists of a flat plate type light source 13, a read carriage including a photodetection part, a data processor 15, a printer 16, etc. While light emission from the sample pattern continues for a specific time, the read carriage moves to the right and left and the photodetection part reads the light from the light emission pattern according to the moving read position. The photodetection part converges the light emitted by the sample, divides it into the specific sections, and passes light of size corresponding to plural sections of the read section of the sample selectively and linearly; and a light guide is led to an optical converting element to perform conversion into an electric signal, and A/D conversion into a digital signal is performed to output the digital signal. The data of this digital signal are sent to the data processor 15.
Patent JP-H02123662-A (JP)
Title: Sealed lead-acid battery
Inventor: TANAKA HIROSHI
IPC: H01M50/489
Filed: 1988-11-02
Abstract: PURPOSE:To prevent electrolyte leakage caused by excessive compression of a separator attendant on decrease in internal pressure of a battery by using the separator in which the whole or part of its periphery is resin-cured. CONSTITUTION:A separator 4 made of fibers in which the whole or part of its periphery extending over a width of 1mm or more is resin-cured is used. A positive plate 2, the separator 4, and a negative plate 3 are placed in a container 1, then the opening of the container 1 is sealed with a sheet 5 such as plastic sheet by heat-bonding. Even when the internal pressure of a battery is decreased while the battery is stored, the sheet 5 is supported with the positive and negative plates faced through the separator whose periphery is resin- cured, and also the separator 4 is not compressed and kept steady.
Patent JP-S63132542-A (JP)
Title: Monitoring system for multiplexer
Inventor: NAGATA YOICHI
IPC: H04J3/06
Filed: 1986-11-25
Abstract: PURPOSE:To reduce a scale of a circuit by checking whether an output abnormality has been detected by a unipolar/bipolar converting part of an opposed equipment or not, when a signal input disconnection has been detected by a bipolar/ unipolar converting part, and deciding it as an abnormality of its equipment itself, unless said abnormality is detected. CONSTITUTION:In a monitor and control equipment 4, when an abnormality notice is received from a monitor and control part 11 is received, whether it is an abnormality of a multiplexer 1 itself or not is demarcated. An abnormality which has been detected by logic circuit parts 6, 9 or unipolar/bipolar converting parts 7, 10 can be decided immediately to be an abnormality of the multiplexer 1 itself, but as for an abnormality detected by bipolar/unipolar converting parts 5, 8, it is possible that said abnormality is caused by a transmitting side. Therefore, whether a signal output abnormality has been detected by the unipolar/bipolar converting part concerned of an equipment 2 or 3 opposed to the multiplexer 1 is checked. Unless said abnormality is detected, it is decided to be an abnormality of the multiplexer 1.