baber/WOPTO huggingface dataset:
Patent TW-512296-B (TW)
Title: Gas discharge display device with superior picture quality
Inventor: OKADU TAKU
IPC: G09G3/292
Filed: 2001-08-02
Granted: 2002-12-01
Abstract: To provide a gas discharge display device that can perform stable write operations for a gas discharge panel and thereby display images with superior quality. A base pulse is applied throughout a write period. The base pulse gradually varies with an approximately constant slope (an average slope of 10V/μsec or less), during an introduction part Ia (i.e. from when the leading edge of the base pulse starts until immediately before the base pulse reaches a constant base voltage Vb) of the write period. A scan pulse Psco is not applied in the introduction part la, but is applied after the base pulse reaches the base voltage Vb.
Patent TW-591659-B (TW)
Title: MRAM arrangement
Inventor: VIEHMANN HANS-HEINRICH
IPC: G11C11/14
Filed: 2001-10-09
Granted: 2004-06-11
Abstract: The present invention relates to a MRAM arrangement. In the way of the arrangement, word lines or control lines (WL) are connected with programmable line (PRL) via low ohm, and the source electrodes (S) of the selective transistors (T) are positioned at the potential of the control electrode (G) or the programmable line (PRL).
Patent TW-535385-B (TW)
Title: Lighting board on keyboard with luminous features
Inventor: SHIU JEN-CHANG
IPC: H04M1/22
Filed: 2001-11-07
Granted: 2003-06-01
Abstract: A lighting board on keyboard with luminous feature is set up inside an electronic product. There's a lighting side in contrast to the LCD module and the lighting side comprises a light guiding part capable of guiding most of lights to the lighting side. Beside, the lighting board has at least one light source installed on one side of the lighting side; and plural through holes at corresponding touch control part and touch buttons of keyboard on the lighting board so that the sides of the plural holes are equipped with the second light guiding part capable of guiding light upward.
Patent TW-508280-B (TW)
Title: Method and apparatus for converting wave length, and a laser processing machine
Inventor: KOJIMA TETSUO
IPC: G02F1/35
Filed: 2001-12-13
Granted: 2002-11-01
Abstract: The present invention provides a method and apparatus of wavelength transformation which is capable of stably producing light of various wavelengths via nonlinear optical crystalline in a long-term period, and the laser-machining device with using the method. The method of present invention has made the ambient gas, in contact with the light exit face of a nonlinear optical crystalline for wavelength transformation, contained less proportion of nitrogen than air. On the other hand, the apparatus of present invention is characterized in that it is capable of making the ambient gas, in contact with the light exit face of a nonlinear optical crystalline for wavelength transformation, contained less proportion of nitrogen than air. The laser-machining device of present invention is equipped with the wavelength transformation apparatus of present invention.
Patent TW-580762-B (TW)
Title: Apparatus for routing signals, multi-layer card, packaged semiconductor device, and method of fabricating a package for a semiconductor device
Inventor: JAMIESON MARK P
IPC: H01L23/48
Filed: 2002-02-18
Granted: 2004-03-21
Abstract: An interconnect routing for a card or interposer or the like, including splines of traces on a first layer and traces on a second layer, with vias connecting between the layers. Outer rows of signals are routed out from a chip on the first layer, while inner rows of signals are viad down to the second layer where they are routed out, then viad back up to the first layer. These outer vias are arranged in an arc, enabling the second layer trace segments to be of a more uniform length. The second layer may also include ground or power plane fingers extending between the splines and viad up to ground or power signals of the chip.
Patent TW-558891-B (TW)
Title: A method and system for a low-overhead mobility management protocol in the internet protocol layer
Inventor: SHAHRIER SHARIF M
IPC: H04W8/26
Filed: 2002-02-18
Granted: 2003-10-21
Abstract: A system and method for supporting mobile Internet communication is provided which employs a plurality of routers and a plurality of mobile nodes (MNs). Each router has a unique communication address. Each MN is associated with a home router. Each router has an associated mobile node location list identifying each MN for which the router is the home router and the communication address of a router corresponding to a current location of each such MN. Each MN is movable from an old location where the MN communicates with the Internet via one Router to a current location where the MN communicates with the Internet via a different router. Communication at the current location via the different router is established by communicating to the MN's home router the communication address of the different router as the communication address corresponding to the MN's current location. Accordingly, a data communication from a corresponding node (CN) to a selected MN is communicated to the selected MN by accessing the mobile node location list of the selected MN's home router to determine the communication address corresponding to the selected MN's current location and directing the data communication to that determined communication address.
Patent TW-563001-B (TW)
Title: Bottom anti-reflective coat forming composition for lithography
Inventor: ARASE SHINYA
IPC: G03F7/038
Filed: 2002-02-22
Granted: 2003-11-21
Abstract: The present invention relates to a bottom anti-reflective coat forming composition having the resin with the structural unit comprising maleimide or maleimide derivative for the lithography process in the preparation of semiconductor device. The resin comprises maleimide or derivative thereof in the principal chain or the side chain and its weight-average molecular weight is 700-1000000. The invention offers the bottom anti-reflective coating for lithography showing high anti-reflective effect, no intermixing with resist layer, excellent resist pattern, and large dry etching rate in comparison to resist.
Patent TW-586917-B (TW)
Title: Baby harness or head/neck brace for infant mounted on baby harness
Inventor: MINOGUCHI KAZUMI
IPC: A47D13/02
Filed: 2002-03-12
Granted: 2004-05-11
Abstract: This invention provides a baby head keep for a baby harness, or head/neck brace for infant mounted on baby harness, which is capable of keeping the legs of the baby from being pressed by the body part of the person who holds the baby in a lay-down form. The baby harness has basic sheet 46, a side upright 41 provided at an edge of basic sheet 46, a pair of branches 47a, 47b extending from a lower end of the basic sheet 46 opposite to the edge where side upright 41 is formed, and engaging fasteners 48a, 48b for fastening the branches 47a, 47b. The basic sheet 46 is provided with a seat 461 for supporting the waist 461, the seat 461 having two sides extending outwardly. The baby harness can be converted from the baby head keep by lowering basic sheet 46 from the back support 32 to insert in between the chest support 34 such that the baby head keep is detachable. By providing a protrusion 462 extending from seat 461 to abut belly part of the person holding the baby, a space between the person and the legs of the body is assured, so that the harness can be used advantageously for holding a baby in a laid-down form exclusively.
Patent TW-588011-B (TW)
Title: A leadframe loader system
Inventor: HUMPHREY HENRY L
IPC: H01L21/677
Filed: 2002-05-28
Granted: 2004-05-21
Abstract: A leadframe loader having a magnetic latch 32 of predefined strength connecting a drive arm mechanism 30 and a pusher system 33 is the preferred embodiment of a transport loader. The amount of force applied to a pusher blade 33 is set to a level below that where a leadframe, or other device to be pushed would be damaged by selecting the size and strength of a magnetic latch 32 attached to the drive arm 30. The magnet is designed to break away from the steel coupling structure on the pusher when the force exceeds a preset value, and stops the movement before damage to the leadframe occurs. Calculated values were verified by physical testing, and a safety margin assigned to insure release of the magnet prior to bending leadframes. The system is assimilated into different pieces of semiconductor assembly equipment.
Patent TW-I222604-B (TW)
Title: Reading apparatus
Inventor: TOYOSHIMA TSUYOSHI
IPC: G06K9/00
Filed: 2002-06-24
Granted: 2004-10-21
Abstract: A reading apparatus has a sensor unit which is arranged on a substrate to read an object to be detected, a driver circuit unit which is arranged on the substrate to supply a drive signal for driving the sensor unit, and a static electricity protection portion, which is formed to cover at least a portion of the upper surface of the driver circuit unit, and at least a portion of which has electrical conductivity.
Patent TW-I220597-B (TW)
Title: DAC cell circuit
Inventor: KAO HSUEH-WU
IPC: H03M1/06
Filed: 2002-07-08
Granted: 2004-08-21
Abstract: A digital-analog converter cell circuit is proposed. The DAC cell circuit comprises a current source, a first resistor, a second resistor, a first MOSFET, and a second MOSFET. The source of the first MOSFET is connected to the current source, the drain of the first MOSFET is connected to the first resistor, and the gate of the first MOSFET receives a first signal. The source of the second MOSFET is connected to the current source, the drain of the first MOSFET is connected to the second resistor, and the gate of the first MOSFET receives a second signal. The DAC cell circuit further comprises at least a third MOSFET and at least a fourth MOSFET. The source and drain of the third MOSFET are connected to the source and drain of the first MOSFET, respectively, and gate of the third MOSFET receives a third signal. The source and drain of the fourth MOSFET are connected to the source and drain of the second MOSFET, respectively, and gate of the fourth MOSFET receives a fourth signal. The DAC cell circuit can decrease the interference in the voltage and output current during converting and reach the stable state quickly.
Patent TW-550740-B (TW)
Title: Method for forming trench bottom silicon oxide layer
Inventor: SUEN PEI-FENG
IPC: H01L21/76
Filed: 2002-07-26
Granted: 2003-09-01
Abstract: A kind of method for forming trench bottom silicon oxide layer is disclosed. Firstly, lithography and anisotropic etching techniques are used to form a trench on a semiconductor substrate, in which the trench includes the side wall and bottom. Subsequently, a first silicon oxide layer and an auxiliary layer are formed sequentially on the side wall and bottom of the trench. The anisotropic etching technique is used to remove the auxiliary layer and the first silicon oxide layer on the bottom of the trench. Subsequently, a thermal oxidation technique is used to form a second silicon oxide layer on the bottom of the trench. Finally, a wet etching technique is used to remove the auxiliary layer and the first silicon oxide layer on the side wall of the trench.
Patent TW-I244882-B (TW)
Title: Method of copper plating via holes
Inventor: SHIMO TOSHIHISA
IPC: H05K3/42
Filed: 2002-08-06
Granted: 2005-12-01
Abstract: A copper plating method for a via hole (13) formed on a multi-layer substrate is provided. The via hole (13) interconnects conductive layers of the multi-layer substrate. The method includes performing chemical copper plating on an inner wall of the via hole (13) and performing electrolytic copper plating on the inner wall of the via hole (13), on which the chemical copper plating has been performed. The electrolytic copper plating includes a first stage and second stage. The first stage is performed with a current density equal to or less than 1.5 A/dm<2> to deposit copper film having a thickness of 1 mum or more. The second stage is performed at a current density higher than that in the first stage.
Patent TW-530137-B (TW)
Title: Rotary vane type throttle valve
Inventor: CHEN CHIEN-WEI
IPC: F16K31/02
Filed: 2002-08-27
Granted: 2003-05-01
Abstract: Disclosed is a rotary vane type throttle valve, including: a valve body, a stationary valve gate, two rotary valve gates and a rotary device. The valve body includes a fluid conduit penetrating the valve body and substantially configured to a hollow cylindrical shape. The stationary gate is positioned in the fluid conduit and constructed of a stationary cylindrical column and a plurality of stationary vane blades. The two rotary valve gates are positioned on the same side of the stationary cylindrical column and each constructed of a rotary cylindrical column and a plurality of rotary vane blades. The rotary device is coupled to the two rotary valve gates for rotating the rotary vane blades of the two rotary gates about the same axis in opposite directions whereby the relative translation between the two corresponding rotary vane blades of the two rotary valve gates can be employed to reduce and increase the cross-sectional area of the opening constructed of the two adjacent stationary vane blades and the inner annular wall of the fluid conduit, to regulate the flow rate.
Patent TW-565973-B (TW)
Title: Method for designing the cavity length of a tunable laser
Inventor: CHANG SEAN
IPC: H01S3/139
Filed: 2002-12-20
Granted: 2003-12-11
Abstract: A method for designing the cavity length of a tunable laser source is disclosed. The performing steps are illustrated as follows. Selecting a wave band for standard reference according to the International Telecommunication Union specification; determining a constant that is a minimum multiplier for transforming all the frequencies among the wave band into integers; setting the optical path length of the cavity as a half multiple of the constant, the frequencies, the central wavelength and a positive integer; and disposing the cavity length according to the optical path length.
Patent TW-I256969-B (TW)
Title: Solvent-free, hot melt adhesive composition comprising a controlled distribution block copolymer
Inventor: HANDLIN DALE L JR
IPC: C08L91/00
Filed: 2003-02-07
Granted: 2006-06-21
Abstract: The invention relates to a solvent-free, hot melt adhesive composition suitable for bonding a polar leather layer to a non-polar substrate, comprising: (a) a block copolymer having the general configuration A-B, A-B-A, (A-B)n, (A-B)n-A, (A-B-A)Nx or (AB)Nx wherein n is an interger from 2 to 30 and X is a coupling agent residue, wherein: (i) each A block is a mono alkenyl arene polymer block and each B block is a copolymer block of at least one conjugated diene and at least one mono alkenyl arene, wherein the distribution of monomers has been controlled by using a distribution agent; (ii) each A block having an average molecular weight between 3,000 and 60,000 and each B block having an average molecular weight between 30,000 and 300,000; (iii) each B block comprises terminal regions adjacent to the A block that are rich in conjugated diene units and one or more regions not adjacent to the A blocks that are rich in mono alkenyl arene units; (iv) the total amount of mono alkenyl arene in the block copolymer is 20 percent weight to 80 percent weight; and (v) the weight percent of mono alkenyl arene in each B block is between 10 percent and 75 percent; (b) a hydrogenated hydrocarbon tackifying resin, with a softening point lower than 140 DEG C, in a weight proportion of 30 to 150 parts by weight of tackifying resin per 100 parts per weight of block copolymer; (c) a resin which is compatible with the mono alkenyl arene blocks, having a softening point lower than 140 DEG C, in a weight proportion of from 10 to 80 parts by weight per 100 parts by weight of block copolymer; (d) optionally a melt flow improving poly (alkylene) resin, which is functionalized, in a weight proportion of from 0 to 30 parts by weight per 100 parts by weight of block copolymer, and (e) stabilizers and/or additional auxiliaries in a weight proportion of from 0.1 to 1 part by weight per 100 parts by weight of block copolymer.
Patent TW-577118-B (TW)
Title: Method for manufacturing gate of fin field effect transistor
Inventor: CHAN BOR-WEN
IPC: H01L21/28
Filed: 2003-02-13
Granted: 2004-02-21
Abstract: A method for manufacturing a gate of a fin field effect transistor (FINFET) is disclosed. The method planarizates a polysilicon layer by using a chemical mechanical polishing (CMP) technique after the polysilicon layer is deposited on a channel layer, and then patterns the polysilicon layer to complete a gate structure of the fin field effect transistor.
Patent TW-I220206-B (TW)
Title: System and method for searching a single word in accordance with speech
Inventor: CHEN FRED HUAI-YAN
IPC: G06F17/30
Filed: 2003-04-04
Granted: 2004-08-11
Abstract: A system and method searching a single word in accordance with speech firstly stores audio data. The audio acquisition module acquires the single word to be searched in audio data. The comparison module searches the pronunciation of the single word in word information database to locate matching word. Further forward the corresponding annotation information of single word to output display module for display so as to implement search of annotation for single word through single word pronunciation.
Patent TW-I240585-B (TW)
Title: Enhancement to the recovery mechanism for cell update procedure in CELL_DCH state
Inventor: CHEN REX HUAN-YUEH
IPC: H04L12/28
Filed: 2003-05-01
Granted: 2005-09-21
Abstract: This invention provides an enhancement to the current mechanism used to make mobile device enter idle mode if a suitable cell could not be found and avoid unnecessary power consumption.
Patent TW-I220995-B (TW)
Title: Plasma display panel
Inventor: SWEI SHOW-LING
IPC: H01J17/49
Filed: 2003-05-20
Granted: 2004-09-11
Abstract: A plasma display panel includes a front substrate, and a back substrate parallel to the front substrate. The front substrate has a plurality of sustain electrodes, a plurality of scan electrodes parallel to the sustain electrode, a dielectric layer, a plurality of address electrodes vertical to the sustain electrodes and the scan electrodes, and a passivation layer. The back substrate has a plurality ribs that overlap and is vertical to the address electrodes, and a phosphor layer is between each rib. The address electrodes further have a salient that overlaps and is parallel to the scan electrodes for increasing the efficiency of the address electrodes.
Patent TW-I227552-B (TW)
Title: Stacked chip package structure
Inventor: TSAI YU-FANG
IPC: H01L23/28
Filed: 2003-06-17
Granted: 2005-02-01
Abstract: A stacked chip package structure is composed of a plurality of chip package units. Each one unit includes a substrate, a chip, a plurality of wires, a compound, a lead frame and a plurality of solder balls. The chip package unit such as a BGA type chip package with high pin count, and one unit stacks with the other unit by solder balls to shorten the electric length of connecting two chip package units. That is also multiple chip package type we need. In addition, with improvement of structure, the area of stacked chip package can be more miniaturization.
Patent TW-I238273-B (TW)
Title: Optical transceiver with optical fiber protection boot
Inventor: KUU WIEN-HAURN
IPC: G02B6/44
Filed: 2003-06-25
Granted: 2005-08-21
Abstract: An optical fiber protection boot is described. The optical fiber protection boot is utilized for protecting an optical fiber of an optical transceiver module or any other electrical appliance. The optical fiber protection boot includes a main protection boot and an elastic ring. The main protection boot couples with the optical fiber and a barrel of the transceiver module. The elastic ring is disposed between the main protection boot and an outer surface of the barrel. The elastic ring is adhered to the main protection boot with a thermosetting adhesive. The optical fiber protection boot further comprises an elastic layer disposing between the main protection boot and the thermosetting adhesive to enhance an impact absorption.
Patent TW-I220335-B (TW)
Title: Power level detection circuit
Inventor: PENG YUNG-CHOW
IPC: H03K5/00
Filed: 2003-07-07
Granted: 2004-08-11
Abstract: A power level detection circuit detects the voltage level of a power source. The power level detection circuit has a first voltage level detector having an input coupled to the power source and outputting a first signal representative of an upper boundary, a second voltage level detector having an input coupled to the power source and outputting a second signal representative of a desired detection level, and a third voltage level detector having an input coupled to the power source and outputting a third signal representative of a lower boundary. The power level detection circuit also has a control circuit coupled to the first, second and third signals for outputting a power level detection signal if there is a change in the second signal, and when the power level is greater than the level of the third signal and less than the level of the first signal.
Patent TW-I235460-B (TW)
Title: Method of manufacturing non-volatile memory device
Inventor: JOO KWANG-CHUL
IPC: H01L21/02
Filed: 2003-07-08
Granted: 2005-07-01
Abstract: Disclosed is a method of manufacturing the non-volatile memory device. The method comprises the step of forming a floating gate on a semiconductor substrate, implementing nitrification treatment for the top surface of the floating gate, forming a silicon nitride film on the floating gate experienced by the nitrification treatment, forming a metallic oxide film on the silicon nitride film, implementing annealing in order to supplement oxygen for the metallic oxide film, and forming a control gate on the metallic oxide film. As the leakage current due to irregularity of the interface is prevented, electrical characteristics could be improved. Furthermore, the process equipment used in the existing DRAM (dynamic random access memory) capacitor could be utilized intact.
Patent TW-I220534-B (TW)
Title: Method of fabricating thin film transistor (TFT) array
Inventor: LEE CHI-SHEN
IPC: H01L21/336
Filed: 2003-09-16
Granted: 2004-08-21
Abstract: A method of fabricating thin film transistor (TFT) array discloses ions of desired-plated metal and the graphs of the desired-plated area are made by oxidation-reduction materials processes ion replacement for implementing the metal wiring layout of the TFT-LCDs. This, therefore, can overcome the problem of uneasy metal etching thereto achieves the purpose of an automatic alignment. The method uses the ability of the oxidation-reduction reaction to implement the replacement for alternating the lithography etching process in the metal wiring layout as presented in the traditional technique.
Patent TW-I221052-B (TW)
Title: Method of setting bi-directional offset in a PWM controller using a single programming pin
Inventor: ISHAM ROBERT HAYNES
IPC: H02M3/156
Filed: 2003-11-12
Granted: 2004-09-11
Abstract: A user-programmable bi-directional, constant current generator circuit allows external programming of either a positive (+) or a negative (-) polarity output current, for injection into one of two locations of the PWM controller circuit of a DC-DC voltage converter. The parameters of the DC-DC converter's offset voltage will depend upon the connection of a single programming pin to one of two programming resistors. The programming resistors are respectively referenced to different supply rail voltages (VCC and VSS). The polarity of the offset additionally depends upon where, within the PWM-controlled DC-DC converter, the programmed constant current is injected.