Patent KR-20140028830-A (KR)
Title: Pcb and method of manufacturing the same
Inventor: JANG EUN JU
IPC: H01L23/12
Filed: 2012-08-31
Abstract: A method for manufacturing a printed circuit board is disclosed. According to one embodiment of the present invention, first, a carrier substrate in which a release layer and a base copper layer are consecutively disposed in both surfaces of a dummy insulating layer is prepared. A first resist pattern layer having a contact hole on the base copper layer is formed. A first copper-plated layer which fills the contact hole by a plating method using the first resist pattern layer and is disposed on the first resist pattern layer is formed. A first circuit pattern layer and a first insulating layer are formed by removing the first copper-plated layer partially using at least one of etching and sanding methods. A second insulating layer is laminated on the first circuit pattern layer and the first insulating layer. A via hole which partially exposes the first circuit pattern layer positioned in the lower part is formed by selectively processing the second insulating layer. A second resist pattern layer having a contact hole is formed on the second insulating layer where the via hole is formed. The via hole is filled by a plating method using the second resist pattern layer and a second copper-plated layer is formed on the second resist pattern layer. The base copper layer and the release layer of the carrier substrate are separated from each other to form a pair of laminated substrates which include the first circuit pattern layer formed on the base copper layer, the first insulating layer, the second insulating layer, the second resist pattern layer, and the second copper-plated layer, respectively. The second copper-plated layer is partially removed by at least one of etching and sanding methods to form a second circuit pattern layer and a third insulating layer on the laminated substrate. [Reference numerals] (110) Prepare a carrier substrate in which a release layer and a base copper layer are consecutively disposed in both surfaces of a dummy insulating layer; (120) Form a first resist pattern layer having a contact hole on the base copper layer; (130) Form a first copper-plated layer filling the contact hole and disposed on the first resist patten layer and form a first circuit pattern layer and a first insulating layer by removing the first copper-plated layer partially; (140) Laminate a second insulating layer on the first circuit pattern layer and the first insulating layer; (150) Form a via hole which partially exposes the first circuit pattern layer by selectively processing the second insulating layer; (160) Form a second resist pattern layer having a contact hole on the second insulating layer where the via hole is formed; (170) Form a second copper-plated layer which fills the via hole and is disposed on the second resist pattern layer; (180) Form one pair of laminated substrates by separating the release layer and the base copper layer of the carrier substrate from each other; (190) Form a second circuit pattern layer and a third insulating layer on the laminated substrates by partially removing the second copper-plated layer; (AA) START