baber/WOPTO huggingface dataset:
Patent JP-H01234047-A (JP)
Title: Load feeding circuit arrangement
Inventor: MANFURETSUTO ARUBATSUHA
IPC: H02M1/00
Filed: 1989-01-26
Abstract: PURPOSE: To reduce the loss and the size by setting the switching period for a start switching element shorter than that for a main switching element. CONSTITUTION: Power is fed from an energy source 1 through a DC voltage conversion circuit 2 to a load 3. The load 3 comprises a DC motor 4 connected through four switching elements 5, 6,..., 8 for rectification. The DC voltage conversion circuit 2 comprises an inductive element 9 and connected in series with a main switching element 10. A main control circuit 13 controls switching of the main switching element 10 to feed the load 3 with power through a rectifier 11 and the like. Furthermore, a start switching element 15 constitutes a series circuit along with the inductive element 9 and switching is performed alternately through a start control circuit 16. The start control circuit 16 sets a shorter switching period than that of the main control circuit 13.
Patent JP-H11195824-A (JP)
Title: Magnetoresistance effect element and magnetoresistance effect type head
Inventor: KUSUMOTO OSAMU
IPC: G11B5/39
Filed: 1998-01-28
Abstract: PROBLEM TO BE SOLVED: To provide a magnetoresistance element which is high in sensitivity, responds with excellent inearity to an external signal magnetic field. SOLUTION: A magnetoresistance effect element is constituted of a first ferromagnetic layer 1 and a second layer 3 adjoining each other through a first nonmagnetic layer 2, and a third ferromagnetic layer adjoining to the second ferromagnetic layer 3 through a second nonmagnetic layer 4, and this prevents a magnetic flux from reaching the first ferromagnetic layer, by closing the leaked magnetic flux generated from the end face of the second ferromagnetic layer 3, between itself and the third ferromagnetic layer 5.
Patent JP-S54108582-A (JP)
Title: Manufacture of silicon type field effect transistor
Inventor: NOZAWA HIROSHI
IPC: H01L29/78
Filed: 1978-02-15
Abstract: PURPOSE: To form a T-shaped or inversely-trapezoid gate electrode by selective etching with an impurity density difference given in the depth direction of the poly- Si film thickness.  
     CONSTITUTION: Onto (p)-type Si substrate 21, field oxidized film 24 and gate oxidized film 22 are provided and phosphorous-added poly-Si 25 and unadded poly- Si 26 are stacked. The density of phosphorus should be more than 10 21 /cm 3 . Using resist mask 27 etches phosphorus-added layer 25 in parallel to the substrate and the eaves of layer 26 are produced. Next, after mask 7 is removed, film 22 is etched by using layer 26 as a mask to make a window, (n)-type source 28 and drain 29 are made through phosphorus diffusion, and layer 26 is made conductive, so that T- shaped electrode 30 will be formed. Next, the surface is covered with SiO 2 31 and electrode 32 is provided. In this method, a shorter-channel FET can be formed by self-matching by using conventional photoetching technique. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H01193156-A (JP)
Title: Device for grinding parts
Inventor: TSUSHIMA KAZUYOSHI
IPC: B24B7/02
Filed: 1988-01-26
Abstract: PURPOSE:To prevent mixing of chips generated at the time of grinding and metal powder into a device by providing a drying air jetting out nozzle. CONSTITUTION:While a metal cap 19 on a sealing 20 is ground by means of a grinder grinding member 10, an X-Y movable stage 13 is gradually moved to a horizontal plane vertical to a grinder rotating shaft 8, one part of a sealing member is ground/machined by means of the member 10 rotated through a drive belt 7 by means of a motor, to the very limit of depth from which the thickness of the cap is lost. Next, a turn stage 12 is rotated and other parts of the sealing member are similarly ground. After the whole periphery is ground in this way, the thinned portion of cap is cut in by a cutter knife and opened. At the time of this grinding operation, drying air is blown to the portions to be ground from nozzle 17 so that mixing of cut chips or metal powder in the inside is prevented before hand.
Patent JP-H09208967-A (JP)
Title: Dehydration of heavy oil
Inventor: KANEKO MASAHITO
IPC: B01D17/04
Filed: 1996-01-31
Abstract: PROBLEM TO BE SOLVED: To provide an efficient and economical method for the dehydration of heavy oil, especially a method to be applied to the dehydration operation of an olimulsion combustion apparatus. SOLUTION: An emulsion of water and heavy oil is mixed with each other in a stirring tank 16 together with a prescribed amount of an emulsion breaker 9, the mixture is separated in a two-phase separation tank 6 into a component rich in heavy oil and a component rich in water, the component rich in heavy oil is supplied to a high-potential charge dehydrator 12 and separated into dehydrated heavy oil and a water-rich component, the water-rich components discharged from the two-phase separation tank 6 and the dehydrator 12 are mixed in a pipe and the obtained mixture is incorporated with an 0/W-type emulsion breaker, supplied to a stirring tank, passed through a 2nd separation tank 18 and separated into a component containing heavy oil and a water-phase free from oil component.
Patent JP-S62174967-A (JP)
Title: Semiconductor device
Inventor: SHIBA TAKEO
IPC: H01L27/10
Filed: 1986-01-29
Abstract: PURPOSE:To increase the data storing capacity without increasing the planar dimensions of a memory cell, by arranging an electrode connected to an element on a vertically stepped portion of a semiconductor substrate between an element forming region and an element isolating region so as to increase the opposing surface area between the electrode and the substrate or another electrode. CONSTITUTION:A semiconductor substrate 1 having a first type of conductivity is provided with an element isolating groove by etching an element isolating region of the substrate. An oxide film 4 is then formed thereon except a region where an element is to be formed. Subsequently, a polycrystalline semiconductor 5 is deposited on the whole surface and unrequired portions are etched away. An oxide film 6 is then formed. An impurity diffusion layer 7 having the second type of conductivity is provided so as to be connected to the polycrystalline semiconductor electrode 5. Further, a gate electrode 8 and a drain electrode 9 are formed while a thin dielectric material layer 11 and a source electrode 12 are formed in a region 10 where a capacitance is formed to complete a memory cell. According to the present invention, the opposing surface area between the polycrystalline semiconductor electrode 5 and the source electrode 12 is larger than the planar dimensions and, therefore, the capacity can be increased without increasing the cell size.
Patent JP-S61179307-A (JP)
Inventor: ITO OSAMU
IPC: B32B5/24
Filed: 1985-01-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H08214358-A (JP)
Title: Roaming method to private system for mobile communication terminal
Inventor: OMIYA TOMOKI
IPC: H04W8/10
Filed: 1995-02-02
Abstract: PURPOSE: To link a public telecommunication network and a private telecommunication network and to perform communication even when a public network mobile communication service user moves to the private telecommunication network. CONSTITUTION: A public network service control function realizing device 11 for holding authentication/position information or the like and realizing service control inside the public telecommunication network 20 and a private network service control function realizing device 12 for holding the position information or the like and controlling the service inside the private telecommunication network 21 are connected by an electric signal line 2.  Then, when a public network mobile communication terminal 18 moves over mobile communication service areas within both networks, at the time of authentication/position registration, a fact that the authentication/position registration is requested in the different telecommunication network is reported between the devices 11 and 12 for realizing both public and private service control functions and information required for the service control is mutually transferred.
Patent JP-H10200854-A (JP)
Title: Recorder, reproducing device and recording and reproducing device
Inventor: KODAMA YASUMASA
IPC: H04N19/00
Filed: 1997-01-13
Abstract: PROBLEM TO BE SOLVED: To reproduce stream data provided with non-continuous time management information as the stream data of the continuous time management information by performing the multiplex processing of the difference information of reference synchronizing signals among the stream data, the difference information of the time management information of reproduction output among the respective stream data and the difference information of the time management information of decoding among the respective stream data. SOLUTION: PTS, PID and DTS are detected from respective transport streams TS1 and ΔPCR, ΔPTS and ΔDTS are obtained by an PCR difference generation circuit 29, a PTS difference generation circuit 31 and a DTS difference generation circuit 32. The respective information of the difference information ΔPCR, ΔPTS and ΔDTS of the time information are multiplexed to the data of the transport streams TS1 in an MUX 25 along with a program clock reference PCR and outputted. In the state, cut editing is performed and the data of the transport units of the continuous time information are easily reproduced.
Patent JP-S53100718-A (JP)
Title: Formation method for facsimile network
Inventor: IWAHASHI TSUTOMU
IPC: H04M11/06
Filed: 1977-02-15
Abstract: PURPOSE: To ensure a mutual communication between the facsimile units of different types efficiently, by utilizing in common the speed converters and the code converters which are less than the number of the subscriber terminal installed at the exchange. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-H01192294-A (JP)
Title: Key telephone system
Inventor: SAKAI TETSUYA
IPC: H04Q3/58
Filed: 1988-01-28
Abstract: PURPOSE:To attain the function of an abbreviation dial provided to a key telephone system by a conventional pushbutton dial operation by stopping the transmission of a PB signal from a telephone terminal set to a speech circuit section at dialing and attaining only the call reception. CONSTITUTION:When a telephone terminal set 7 sends a PB signal to acquire an electric communication set equipment 8, a PB signal reception circuit section 4 receives the signal and a function circuit section 5 acquires the line of the equipment 8. After the telephone terminal set 7 is connected to the equipment 8, a transmission interruption circuit of a transmission/reception separation circuit section 9 is operated and the PB signal from the telephone terminal set 7 is received by the PB signal reception circuit section 4 only and not transmitted to the equipment 8. Since the function circuit section 5 generates a selection signal in this way, when the telephone terminal set 7 gives an instruction of abbreviated dialing, the PB instruction signal is received by the PB signal reception circuit section 4 only.
Patent JP-S53103406-A (JP)
Title: Preparation of glycol
Inventor: KIYOURA TADAMITSU
IPC: C07C29/04
Filed: 1977-02-18
Abstract: PURPOSE: To prepare glycol economically in a direct one-step reaction, by the contact of an olefin with O 2  in an aqueous solvent in the presence of I 2  or an iodine compound and a tin compound. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-H10214256-A (JP)
Title: Parallel processing system
Inventor: YAMAUCHI MASAKI
IPC: G06F1/14
Filed: 1997-01-30
Abstract: PROBLEM TO BE SOLVED: To uniformize the load on respective terminals and to improve efficiency in parallel processing by distributing cyclic parallel processing as a certain multiple or a certain fraction of common cycle corresponding to the conditions of respective terminals. SOLUTION: In this system, plural terminals execute parallel processing while virtually regarding the whole system as parallel computers. Each terminal is respectively provided with a parallel processing mechanism 100, time managing mechanism 200, CPU managing mechanism 300 and network interface 400. The parallel processing mechanism 100 provides a parallel processing environment for a user. The time managing mechanism 200 or the CPU managing mechanism 300 communicates with the other terminal through the network interface 400. The CPU managing mechanism 300 performs the cyclic management of task. Timing data for a fixed length are sent out in a constant cycle. When the fixed sending cycle of server terminal is recovered from the arriving cycle of these timing data, synchronism is established with this constant cycle as a reference.  Then, parallel processing is allocated to plural client terminals at least.
Patent JP-S56112607-A (JP)
Title: Measuring device for length of single corrugated cardboard sheet
Inventor: ADACHI TAKANAKA
IPC: G01B7/04
Filed: 1980-02-13
Abstract: PURPOSE:To measure the length of the single corrugated cardboard sheet accurately by measuring the same through detection of the number of corrugations of the sheet prescribed according to the sort of the corrugated cardboard sheet. CONSTITUTION:When a reset signal 301 is delivered, a marker 25 operates to give a black mark on to the corrugated side of the single corrugated cardboard sheet. In a pulse interval-speed converter 41 is inputted a pulse signal equivalent to the number of the corrugations detected constantly by a detector 26 and the output thereof is inputted in a reference pulse generator 40, wherefrom a reference pulse train 400 is delivered. By a mark detection pulse 300 a gate 32 is made open and a pulse signal 322 from the inlet side of a bridge is counted by a counter 34, while a pulse signal 332 from a detector 27 on the outlet side of the bridge is counted by a counter  35. By applying subtraction to the counted values of the counters 34 and 35 by a  subtractor 36, the staying length of the single corrugated cardboard sheet on the  bridge is obtained.
Patent JP-H02198310-A (JP)
Title: Object checking apparatus
Inventor: YAMAMURA TATSUO
IPC: G01N21/956
Filed: 1989-01-27
Abstract: PURPOSE:To perform highly accurate checking without the effects of position fluctuation and the like by detecting a plurality of positions, and extracting characteristics. CONSTITUTION:An image sensor 1 takes out the two-dimensional image signal of an object. An A/D converter 2 performs the binary coding of the image signal in corresponding with variable-density levels. Then the signal is stored in a memory 3. A position-checking-area generator 4 sets a respective position checking area in correspondence with a plurality of positions to be checked. Furthermore, a characteristic extractor 7 and a processor 8 are provided. Quality is judged based on the amounts of the characteristics which are extracted with the extractor 7. A plurality of the predetermined positions are detected with the generator 4, a projection data detector 5 and the checking area generator 7. Then, the quality of the object is judged based on the individual amounts of the individual characteristics which are obtained through the checking areas which are set based on the individual conditions. Therefore, the checking can be performed stably and highly accurately.
Patent JP-H07225131-A (JP)
Title: Bearing plotting device
Inventor: HIBINO HIROSHI
IPC: G01C19/00
Filed: 1994-02-10
Abstract: PURPOSE:To reduce the number of parts used in a bearing plotting device, reduce the size and cost of the device, and improve the reliability of the device by using one set each of single-shaft mounting means, gyro means, and inclination detecting means. CONSTITUTION:When the detecting shaft of a gyro 3 perpendicular to the shaft 1 of a gimbal 2 is inclined by an angle gamma against the horizontal plane and by an angle alpha against the east-west direction, the angular velocity detected by the gyro 3 is calculated from alpha= Wsingamma+ Vsingamma. An accelerometer 4 is set so that its detecting shaft can become parallel to the angular velocity detecting shaft of the gyro 3 and the inclined angle rho is detected by means of the accelerometer 4. The gyro 3 is combined with a gyro driving circuit 7 and outputs the angular velocity. A speed reducer 13 performs subtraction on the angular alphavelocity and motor driving circuit 11 rotates a motor by an angle-by driving the motor 5 so as to control the angle to 0 deg.. Since the angle theta is controlled to 0 deg., the angular velocity detecting shaft of the gyro 3 can be always maintained in the east-west direction and a potentiometer 6 outputs the azimuth (x) at which the angle of the angular velocity detecting shaft of the gyro 3 against the bearing plotting device is detected.
Patent JP-H08301861-A (JP)
Title: Ether derivative
Inventor: TERASAWA HIROFUMI
IPC: C07D407/12
Filed: 1996-02-01
Abstract: PURPOSE: To obtain a new taxol derivative useful as an antitumor agent and having improved effectiveness against the cancer of digestive tracts, especially colon cancer. CONSTITUTION: This ether derivative (salt) is expressed by formula I [R<1> is a (substituted)phenyl; R<2> , R<4> and R<7> are each an alkyl, an alkenyl, a halogen, etc.; R<3> , R<5> and R<6> are each H, OH, a halogen, etc.; R<8> is an alkyl, an aryl or an alkoxy each of which may have substituent], e.g. 13-O-[(2R,3S)-3-(t- butoxycarbonylamino)-2-hydroxy-3-phenylpropionyl]-10-O-allyl-10-deacet ylbaccatin III.  The compound can be produced e.g. by treating a compound of formula II [R<21> is a (protected)R<2> ; R<31> is H, a halogen or a (protected)OH] and a compound of formula, R<41> -CH2 -X (R<41> is vinyl, phenyl, etc.; X is a halogen, etc.) in the presence of a base in a solvent to selectively etherify the 10-OH group, condensing the resultant compound of formula III with a compound of formula IV [R<51> and R<61> are each OH, a protected OH, a halogen, etc.; R<71> is a (protected)R<7> ; R<81> is a (protected)R<8> ] and deprotecting the condensation product.
Patent JP-S57131067-A (JP)
Title: Trigger circuit for signal waveform observing device
Inventor: TAKAI JIYUNICHI
IPC: G01R13/28
Filed: 1981-02-06
Abstract: PURPOSE:To facilitate the capture of phenomena which have been difficult to observe and to expand the range of utilization of one device to a large extent, by imparting selectivity and flexibility to the triggering conditions. CONSTITUTION:The signals from a digital devices are applied to comparators CM1-CMn wherein the triggering conditions are set by setting switches S1- Sn, through channel terminals CH1-CHn. The outputs of the comparators CM1-CMn are applied to mode setting switches SW1-SWn. When the switches are placed on the sides (a), an inverted OR mode is obtained. When the switches are on the sides (b), an AND mode is obtained. The outputs of the mode setting switches SW1-SWn are applied to an AND circuit 6 through an inverted OR circuit 4 and also to an AND circuit 5. A mode switch MS is automaically set to the side B when all the mode setting switches SW1-SWn are in the AND mode and automatically set to the side A when only one switch is set in the inverted OR mode, and outputs the trigger signal to terminal T.
Patent JP-H08187749-A (JP)
Title: Motor attaching structure in injection molding machine
Inventor: TANAKA HIDEO
IPC: B29C45/72
Filed: 1995-01-06
Abstract: PURPOSE: To provide motor attaching structure of the frame of an injection molding machine suppressing noise and capable of absorbing the heat of a motor. CONSTITUTION: In a motor attaching structure arranging the pump 10 and motor 13 becoming the drive source of an injection molding machine in the hermetically closed frame 10 for preventing noise of the injection molding machine, a motor main body and the frame 10 are connected by a member 14 composed of a high heat conductivity material for removing heat from the motor 13 or a cooling line through which cooling water flows. By this constitution, the heat of the motor is removed through the frame or the cooling line through which cooling water flows and, therefore, the housing chamber 11 of the motor or the like can be perfectly hermetically closed and noise can be lowered to a large extent.
Patent JP-H06119844-A (JP)
Title: Optical matrix keyboard
Inventor: KUROODO BATARERU
IPC: H01H13/00
Filed: 1992-01-31
Abstract: PURPOSE: To eliminate generation of failure signals in the case that some random keys are simultaneously pushed by arranging a plurality of keys having means to shut at least two light beams in a matrix-like arrangement. CONSTITUTION: A plurality of movable keys provided with means to shut at least two light beams crossing the key installation points are arranged in matrix-like arrangement and each of the keys are made of an elastically deformable sheet part 45. Each key part 45 comprises one side gear par 49 to shut both light beams crossing at the key position or two gear parts 49 to shut both light beams, respectively. When a key part 45 is pushed down, the part 49 shuts the light beam 50 for a moment and also when the key part 45 is turned back to a pause state, the beam 50 is shut for a moment. Consequently, failure signals to insufficient key movement process can be eliminated by recognizing the key pushing operation only at the time when a signal is sent from a row on the completion of the signal transmission from the row through a photodetector, a processing unit, etc.
Patent JP-H08214548-A (JP)
Title: Parallel operating apparatus for switching power source
Inventor: NOGUCHI SEIICHI
IPC: H02J3/38
Filed: 1995-02-03
Abstract: PURPOSE: To improve the transient response by giving a voltage to the primary side of the transformer of each power source, outputting the transformer outputs in parallel, and connecting the high selector buffer outputs of the respective power sources in parallel. CONSTITUTION: In the case of a parallel operation, a high selector buffer (HS) having an error amplifier (amp) 1 of a master unit SUa, a comparator (cmp) 1 and an amp 4 of a high reference voltage Vr power source is operated, but an amp 3 and a cmp 2 are not operated. That is, a constant voltage control is conducted with the reference voltage Vr, and a voltage Vo is supplied to a load. On the other hand, the cmp 2 and the amp 3 of a slave unit SUb are operated, but the amp 1, the cmp 1 and the HS are not operated. That is, the constant voltage control with the voltage Vr is not executed, and a transistor Q is pulse-width controlled via the output of the amp 3 through the cmp 2 and an OR circuit OR so that the voltage Vo supplied to the load is so operated at the amp 3 that the voltage of a current detector CS becomes equal to that of a communication line CB.
Patent JP-H03220982-A (JP)
Title: Gamma amplifier
Inventor: IEMOTO TAKAAKI
IPC: H04N5/202
Filed: 1990-01-26
Abstract: PURPOSE:To correct the correspondence relation between the amplitude of an input video signal and the brightness of a television image with higher accuracy by automatically varying and setting the large/small border value of the amplitude of an input video signal where the degree of amplification should be switched, i.e., a break point according to the white peak of the input video signal. CONSTITUTION:When an image of television is bright on the whole and the amplitude of the input video signal Vin is high as shown by Vmax, namely, when a detected voltage Vr is high, an input voltage Vb corresponding to the break point has a relatively high value shown by Vn and has a rough approximate input/output characteristic. When the image of television is dark on the whole and the amplitude of the input video signal Vin is low as shown by Vn, namely, when the detected voltage Vr is low, the input voltage Vb corresponding to the break point has a low value as shown by Vm and has a fine approximate input/output characteristic. Consequently, the correspondence relation between the input video signal Vin and television image is finely corrected.