baber/WOPTO huggingface dataset:
Patent JP-S61190286-A (JP)
Title: Heat exchanger
Inventor: MATSUSHIMA HITOSHI
IPC: F28F9/24
Filed: 1985-02-18
Abstract: PURPOSE:To provide a heat exchanger having a superior anti-wear characteristic of a thermal conduction pipe and a superior vibration-proof characteristic as well as showing no excessive thermal load in a part of the thermal conduction pipe at the hot gas flowing part by a method wherein a cover is arranged for every thermal conduction pipe near the inlet port of hot temperature barrel fluid. CONSTITUTION:Circular buffle plates 6 having recessed portions are arranged among a plentiful thermal conduction pipe groups 1 held between the upper and lower pipe plates 8 and 10 in such a way as the positions of the recessed portions may be alternatively settled and the group 1 of the thermal conduction pipes at the first stage of the buffle at the inlet port 4 of the barrel fluid are arranged in such a way as they are covered with double-pipe groups 3. A relation between the thermal conduction pipes 1 and the outer pipe 3 is made such that they are a concentric double-circular pipe, and a clearance 2 of 0.5mm-1mm is present between the thermal conduction pipes 1 and the outer pipe 3. The outer pipe 3 is connected to the pipe plate 8. Hot barrel fluid enters the inlet nozzle 4 of the barrel and the fluid flows in a zig-zag form due to subsequent bending of flow by several buffle plates 6 among the thermal conduction pipe groups 1, then the fluid is discharged at the barrel fluid outlet nozzle 7. Due to a double-wall structure of the thermal conduction pipe groups in the first bending flow area at the first stage of the buffle plate, so that a rate of transparency of heat at this part is decreased and a flux of thermal flow is also decreased.
Patent JP-S52111342-A (JP)
Title: Semiconductor memory device
Inventor: SUZUKI YASOJI
IPC: H01L29/78
Filed: 1976-03-16
Abstract: PURPOSE:To realize the dynamic semiconductor memory device which can operate with only one element composing the memory cell, and can fully manage to the multiple bit of memory.
Patent JP-S54121703-A (JP)
Title: Television receiver
Inventor: YANAGAWA KAORU
IPC: H04N5/44
Filed: 1978-03-15
Abstract: PURPOSE: To make the channels selected before and after VTR reproduction the same and eliminate the need for reoperation for the selection before VTR reproduction by making use of the memory circuit of the TV channel selection part.  
     CONSTITUTION: At the receiving of TV broadcasting, a switch 9a is connected to the TV side contact (a) and at the VTR receiving, the switch 9a is connected to the voltage setting circuit side contact (b) for VTR, by which the tuning voltage is supplied to a tuner 4. At this time, the contents of a memory circuit 2 are holding the state at the TV broadcasting receiving. When the reproducing state of VTR is stopped, the switch 9a is again changed over to the contact (a) and the contents of the memory circuit 2 are supplied to the tuner 4 via voltage setting circuit 3, whereby the TV receiving before the VTR reproduction may be performed in succession. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H07239425-A (JP)
Title: Ferrule for optical connector
Inventor: KOBAYASHI YOSHIHIRO
IPC: G02B6/36
Filed: 1994-02-28
Abstract: PURPOSE:To obtain a good-quality ferrule which drastically shortens grinding time and does not generate connection loss in spite of adhesion of foreign matter and stains in an optical fiber insertion hole of the ferrule for an optical connec tor bored with the optical fiber insertion hole to be inserted with the optical fiber through the ferrule by forming rugged lines on the inside surface of the optical fiber insertion hole of the ferrule. CONSTITUTION:This ferrule 2 is a circular columnar body and is bored with the optical fiber insertion hole 1 in its axial direction through the ferrule. The optical fiber 3 is housed in such optical fiber insertion hole l. The optical fibers are connected by pressing the end faces of these ferrules 2 to each other. The rugged lines are formed on the inside surface of the optical fiber insertion hole 1. The optical fiber 3 is supported by plural supporting projections 4 formed on the inside surface of the optical fiber insertion hole 1. As a result, the foreign matter is eventually interposed and housed in the spaces 11 between the outer peripheral surface of the optical fiber 3 and the inside surface of the optical fiber insertion hole 1 even if the foreign matter enters the optical fiber insertion hole l of the ferrule 2. The foreign matter does not, therefore, acts as the cause for the adhesion defect of the ferrule 2 and the optical fiber 3.
Patent JP-S61203166-A (JP)
Inventor: ROBAATO SHII SHIEIFUAA
IPC: C08G63/00
Filed: 1986-02-12
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H02208599-A (JP)
Title: Nuclear fuel transfer facility for nuclear reactor
Inventor: KAKIUCHI TETSUO
IPC: G21C19/18
Filed: 1989-02-09
Abstract: PURPOSE:To cut off a cast and to enable a quick and easy execution of inspection/maintenance work by arranging a transfer carriage truck which reciprocates between a containment vessel and a fuel handling building, above a cavity and a pit, and by attaching a tilting mast to it. CONSTITUTION:A lid 23 of a nuclear reactor vessel 14 is lifted up to a working floor 39 by an operation of a rotary crane 24. Then a transfer carriage truck 27 is moved to a containment vessel 11 side, a tilting mast 30 is erected, telescopic masts 32 and 33 are extended, a spent fuel assembly 15 in a reactor body 13 is grasped by a gripper and is lifted upto an inside of the mast 30 with the masts 32 and 33 and finally the mast 30 is overturned horizontally. After that, a lift-up lid 21 and a shielding door 22 are lifted up, a hatch 20 is opened, the transfer carriage truck 27 is moved into a fuel handling building 18 along a guide rail 26, the mast 30 is vertically erected again and the masts 32 and 33 are extended to carry the fuel assembly into a pit 17. In case of a carrying-in of new fuel assembly, an almost reverse procedures are applied. By adopting this facility, crane related equipments can be simplified and an equipment cost can be cut off and no dewatering is required as well, and therefore a quick and easy inspection/maintenance work can be carried out.
Patent JP-S63194616-A (JP)
Inventor: OBATA TETSUO
IPC: A47L7/00
Filed: 1987-02-10
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S59189705-A (JP)
Inventor: ROBAATO ARAN BUROOSHIIRUDO
IPC: H03F3/34
Filed: 1984-02-20
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H07213679-A (JP)
Title: Card for game
Inventor: KUROKI KENICHI
IPC: A63F1/02
Filed: 1994-02-01
Abstract: PURPOSE:To provide a card for game capable of increasing the interest of a game by comprising an independent card by coupling a pair of cards. CONSTITUTION:This card is equipped with plural first cards 1 provided with projecting parts 3 protruding over the appropriate position of an edge, and plural second cards 2 provided with recessed parts 6 to be fitted in the projecting parts 3 of the first cards, and incomplete game display screens (a), (b) accomplished by coupling the first card 1 with the second card 2 are formed.
Patent JP-S63196279-A (JP)
Title: Substrate for cell culture
Inventor: ASAKO SHIGERU
IPC: C12N5/02
Filed: 1987-02-10
Abstract: PURPOSE:To obtain a cell-culture substrate having excellent adhesivity, distensi bility and proliferativity of cell and enabling cell culture over a long period in high density, by supporting laminine on a surface of a polymeric substrate. CONSTITUTION:A surface of a cell-culture substrate composed of a polymeric material such as olefinic polymer, polyester resin, etc., and preferably formed in the form of porous material, tube, hollow fiber, etc., is pretreated preferably by chemical or physical means. Laminine is supported on the whole surface of the substrate or partially on the surface. e.g. in the pattern of lattice, stripes, dots, etc.
Patent JP-H01204511-A (JP)
Title: Demodulation circuit
Inventor: ARAKI AKISHI
IPC: H04N5/445
Filed: 1988-02-10
Abstract: PURPOSE:To obtain a proper demodulation output with low cost by obtaining an A/D conversion value respectively as to plural points in one cycle of an AM signal in a demodulation circuit demodulating an AM signal, integrating the result and comparing the integrated value with a maximum value obtained in this way so as to obtain a demodulation output. CONSTITUTION:A signal Sd is extracted by a reception means 1, an undesired signal component is eliminated from the signal Sd by a band pass filter 2 and the result is fed to an A/D comparator 4 through a gain control circuit 3. A level of plural points is subject to A/D conversion with respect to one cycle of the AM signal Sa, the integration value of the A/D conversion value is obtained and the maximum value of the integration value obtained similarly is divided by the integration value to obtain an original picture data. Thus, even when one cycle of take AM signal Sa represents the gradation of one picture element, the picture data is obtained correctly for each cycle and the gradation of the adjacent picture element is not affected. Thus, the demodulation with low cost and excellent noise performance is obtained.
Patent JP-H10226306-A (JP)
Title: Sensor fitting structure of air bag device for side collision
Inventor: MASUDA TOMONORI
IPC: G01P15/00
Filed: 1997-02-13
Abstract: PROBLEM TO BE SOLVED: To install a sensor in a lower position by setting a weld bolt to a height near the upper edge of an opening part formed near the lower edge of a pillar inner of a center pillar, and installing the sensor at a height near the lower edge of the opening part by a bracket fitted to the weld bolt. SOLUTION: A center pillar 1 is formed by joining a pillar outer 2 and a pillar inner 3 to each other, an opening part 10 is formed near the lower end part of the pillar inner 3, and a base plate is fitted to the opening part 10. In this case, a bracket 21 for supporting a sensor 20 of an air bag device for side collision is installed in the center pillar 1. This bracket 21 is formed like a crank by an upper end part 23 fitted to a weld bolt 6 by a nut 22, a longitudinal face part 24 extended downward from an upper end part 23 along an embossed part 5 to the vicinity of the lower edge of the opening part 10, a lateral face part 25 extended from the lower end to the outside of the opening part 10, and a lower end part 26 bent downward from the end part of the lateral face part 25.
Patent JP-S58146107-A (JP)
Title: Frequency modulation demodulator
Inventor: OOMOTO NORIAKI
IPC: H03D3/08
Filed: 1982-02-25
Abstract: PURPOSE:To use the demodulator at a high frequency band and to form the demodulator on a printed circuit board, by connecting the middle point of a series circuit of two capacitors connecting in parallel with a secondary coil to an input terminal. CONSTITUTION:A parallel resonance circuit consisting of a primary capacitor 4 and a primary coil 5 is connected between the input terminal 1 and ground, and two capacitors 12, 13 connected in series are connected across the secondary coil 6 mutually coupled with the primary coil 5 to form a dual tuning circuit. The mutual connecting point of the two capacitors 12, 13 is connected to the  input terminal 1 to lead the input signal at the primary side, allowing to operate  the circuit as Foster-Seeley type frequency discriminator.
Patent JP-S59155777-A (JP)
Title: Stop watch with totalized time display
Inventor: OONUMA KOUJI
IPC: G07C1/24
Filed: 1983-02-25
Abstract: PURPOSE:To enables indication of measured time in total on a stop watch display by providing a first counter for outputting a signal according to the upper limit value and a second counter for outputting according to counts at the inputting of signals. CONSTITUTION:The counting upper limit value of a first counter 31 is set at 12 and with a switch 29 ON, time is indicated on a display 25 continuously. A division output of a division circuit 19 is inputted into first and second counters 31 and 32 every one hour and when the measuring time reaches 12 hours, the first counter 31 outputs a signal according to the upper limit value and 12 is indicated on a total display 34. As the time measurement continuous for 15hr and 51min, 3hr and 51min is indicated on a sequential display 25 while 12hr are indicated on the totalized display 34. When a button is pressed to turn ON a flip flop 39, a reset signal is outputted to reset the first counter 31 and the second counter 32 outputs a signal according to counts to add 3hr to the value of the total display 34 and 15 is indicated.
Patent JP-H03235149-A (JP)
Title: Address converter
Inventor: MORI YOSHIICHI
IPC: G06F12/10
Filed: 1990-02-13
Abstract: PURPOSE:To execute address conversion processing at high speed by performing the selection of an STO(segment table descriptor) in the address conversion processing by using a cache register. CONSTITUTION:This converter is comprised of an address conversion buffer (TLB) 1, a register array 2, a segment table descriptor (STO) storage part 3, the cache register 4, and comparators 5, 6. The cache register 4 functions as the cache of the STO storage part 3, which reduces frequency to make access the STO storage part 3 of slow speed. In such a way, address conversion when accessing plural virtual memories is performed at high speed.
Patent JP-H01203905-A (JP)
Title: Tunnel area detecting device
Inventor: HONMA AKIHIKO
IPC: G01N23/00
Filed: 1988-02-10
Abstract: PURPOSE:To control an approach mechanism 4 with high accuracy by varying the amplitude of a voltage applied to a conductor as the current source for a tunnel current which flows between two conductors. CONSTITUTION:A conductor 1 is put close by the approach mechanism 4 as shown by an arrow A and superposed upon the DC voltage VB1 from a voltage source 5, so that a carrier signal f0+ or -DELTAf is applied from a frequency modulating oscillator 6. Then when the conductor 1 approaches a conductor 2 extremely to obtain a tunnel area sufficiently, the tunnel current by the signal f0+ or -DELTAf superposed on the voltage source 5 flows in an IV transformer 7 through an electrode 3 and is converted into a proper voltage value, thereby correcting exponential function characteristics in the tunnel area by a logarithmic amplifier 9 through an absolute value circuit 8. Then, a band-pass filter 10 extracts a carrier signal component from a correcting voltage value and a lock-in detector 25 outputs the amplitude value of the carrier signal, which is compared 15 with a preset threshold voltage VTH1 to obtain a binary detection signal S1. The approaching operation of the mechanism 4 is stopped with the signal S1. The influence of noises is nearly ignored by selecting a carrier frequency properly.
Patent JP-S61188702-A (JP)
Title: Magnetic recording and reproducing device
Inventor: HIROTA HOZUMI
IPC: G11B5/62
Filed: 1985-02-18
Abstract: PURPOSE:To improve remarkably the reproduced output of a head, lap writing characteristic, etc. in a high recording density region by improving the efficiency of the head and adapting the vertical orientation of a medium. CONSTITUTION:The decreased efficiency of the head as a result of a decreased gap is made up by miniaturizing the head to adapt the ratio Br (rt. angle)/ Br (//) between the coercive force Hc and residual magnetic flux of the medium to the head. More specifically, the coercive force Hc is adjusted to 500-1600Oe and Br (rt. angle)/ Br(//) to 0.4-3.0. the device is so constituted that the average magnetic path length/gap length ratio l/gl does not exceed 3X10<4> with respect to the head having the gap length gl in a 0.3-0.6 mum range. The head output, lap writing characteristic, etc. in the high recording density region are thus improved.
Patent JP-H02222842-A (JP)
Title: Base line correction circuit
Inventor: YAMAZAKI YOSHIHISA
IPC: G01R19/04
Filed: 1989-02-10
Abstract: PURPOSE:To enable realization of an inexpensive and highly reliable correction circuit by arranging a limiting circuit, an integrating circuit and an amplifier adapted to correct a base of a signal after amplification. CONSTITUTION:A resistor 44 for a feedback is connected between a negative input terminal of a first operational amplifier 43 and an output terminal. A second operational amplifier 46 of a limiting circuit 47 inputs an output signal 45 into the negative input terminal through a resistor 51 and a positive terminal is earthed. Diodes 52 and 53 are arranged in parallel between output terminal and negative input terminals of the amplifier 46 with polarity thereof opposite. An integrating circuit 49 inputs a signal appearing at the output terminal of the amplifier 46 into a negative input terminal of a third operational amplifier 48 through a resistance 55 and a capacitor 56 is arranged between the negative input terminal and an output terminal of the amplifier 48. In addition, an output of the amplifier 48 is inputted into the negative input terminal of the amplifier 43 through a resistance 57. A correction voltage is added with a polarity opposite to a variation in the base line overlapped with an input signal 41 at the negative input terminal, thereby correcting the base of the output signal 45.
Patent JP-H06221072-A (JP)
Title: Electric blind position adjusting device
Inventor: CHISAKA YUKINORI
IPC: E06B9/322
Filed: 1993-01-26
Abstract: PURPOSE:To prevent breakage and poor contact of wiring between limit switches and install adjusting dials of the limit switches without drilling any hole in a head box. CONSTITUTION:Three conductive plates 32, 34, and 36 are installed on a wall 30 of a limit switch case 26 in longitudinal direction. First and second limit switches 38 and 40 which use commonly the center conductive plate 34 are made in contact with the conductive plates 32 and 36 and can be moved in axial direction by adjusting shafts 48 and 50, respectively. The one ends of the adjusting shafts 48 and 50 are connected integrally and rotatably to adjusting dials 52 and 54 located on the outer side of the limit switch case 26. Also a moving body 58 which can be made in contact with limit switches 30 and 40 and moved in axial direction by a screw shaft 56 connected integrally and rotatably to a rotating shaft 22 is installed between the limit switches 30 and 40. Then the limit switch case 26 is provided so that the adjusting dials 52 and 54 are projected outward from one end of the head box 10.
Patent JP-S62188250-A (JP)
Title: Printed circuit board type semiconductor package
Inventor: HORI KUNIYUKI
IPC: H05K1/18
Filed: 1986-02-13
Abstract: PURPOSE:To prevent the entrance of humidity into a semiconductor element mounting part by coating the periphery of a printed circuit board except a semiconductor element mounting part and an inner lead connecting part of a conductor circuit with a mold resin. CONSTITUTION:Plural through-holes 9, 9... are opened on a printed circuit board 1 of the positions corresponding to outer lead connection parts 7 of a conductor circuit 5 and each through-hole 9 is plated by through-hole plating (not shown in drawing). Also, in each through-hole 9, n aligned outer lead 10 like a lead pin is inserted and it is fixed to a printed circuit board 1 by soldering etc. The periphery of the printed circuit board 1 except a semiconductor element mounting part 4 and an inner lead connecting part 6 of the conductor circuit 5 is coated completely with a mold resin 11. As an outer surface 12 of the printed circuit board 1 is coated with the mold resin 11, the entrance of humidity into the printed circuit board 1 is prevented.
Patent JP-H08223271-A (JP)
Title: Telephone set
Inventor: NAKANE YASUO
IPC: H04M1/274
Filed: 1995-02-17
Abstract: PURPOSE: To omit seeking of a telephone number of an opposite party visually by reading telephone number information stored on a card and designating specific telephone number information from the read telephone number information to immediately specify the telephone number of the opposite party. CONSTITUTION: A telephone number memory card C is inserted from an insert port S. The inserted memory card C is connected to a connector SK provided in a telephone set T. Then a microprocessor system 7 is operated by a signal from a gate circuit 2 and telephone number information stored on the memory card C is read via a gate circuit 1. Then an opposite party is specified and its telephone number is designated by pressing a push key panel TP. Through the operation above, its operation signal is given to the microprocessor system 7 via a gate circuit 4 and a call signal is sent to a telephone set of the opposite party being the designated telephone number through a connection line via a gate circuit 5.
Patent JP-S56126320-A (JP)
Title: Electronic circuit
Inventor: ISOGAI HIDEAKI
IPC: H03K17/04
Filed: 1980-03-10
Abstract: PURPOSE:To improve the rise and fall characteristics of output voltage, by giving a nonsaturated operation to a transistor. CONSTITUTION:When the input Vi is set at L with transistor (TR) T2 turned on, the base potential of the TRT3 is set at -0.8V. In this case, the TRT1 is turned off. And a part of the constant current I1 flows in the route of l1-R1-SBD-T2 since the Schottky barrier diode SBD is connected forward from the collector through the base of the TRT3. As a result, the potential at point A lowers down to 0V or less by the current flowing to the resistance R1, and the value of this current is decided by SBD. In such way, the voltage higher than the forward voltage (0.8V) is never applied between the collector and the base of the TRT3. Thus the TRT3 works at the nonsaturated region. Accordingly the fall characteristics can be improved since the collector charge is low. And the output VO changes sharply from H to L when the input Vi is charged from L to H.
Patent JP-H11233577-A (JP)
Title: Thermostat
Inventor: INOUE FUJIO
IPC: F24F1/00
Filed: 1998-02-12
Abstract: PROBLEM TO BE SOLVED: To make temperature distribution of gas flowing to a thermostatic bath uniform in a thermostat which keeps a temperature inside a thermostatic bath uniform through circulation of gas. SOLUTION: A first flow path 8 from a fan 6 to a thermostatic bath 4 is divided into a reverse flow path 9 positioned at the side of an inner wall 1a of a container 1 and a main flow path 10 positioned at an inlet side of the thermostatic bath 4 by a partition 11. Gas influenced by the air temperature flowing near the inner wall 1a inside the main flow path 10 is introduced upstream through the reverse flow path 9 by using draft function of rapid fluid and is diffused and mixed inside gas flowing in the main flow path 10, and temperature distribution of gas flowing into the thermostatic bath 4 is made uniform.
Patent JP-S56126459-A (JP)
Title: Selective floatating method of lead mineral
Inventor: HIKOSAKA TADAYOSHI
IPC: B03D1/06
Filed: 1980-03-10
Abstract: PURPOSE: To economically and efficiently recover lead ores from complex sulphide ore containing lead minerals, etc., by recovering lead minerals as the floated ore, by using the thiourea with O 2  or the air.  
     CONSTITUTION: Thiourea is added and, at the same time, O 2  or the air is blown into the ore solution containing lead minerals, such as complex sulphide ore containing galena, etc., and the lead minerals are selectively floated as the floated ore and selectively collected. As a result, the grade and recovery of concentrate of lead minerals can remarkably be improved. 
     COPYRIGHT: (C)1981,JPO&Japio