Patent TW-409424-B (TW)
Title: Field effect transistors with vertical gate side walls and method for making such transistors
Inventor: BOYD DIANE C
IPC: H01L29/732
Filed: 1998-06-23
Granted: 2000-10-21
Abstract: The present invention discloses a Metal oxide semiconductor Field effect transistor (MOSFET) comprising a drain region and source region adjacent to a channel region. A gate oxide is situated on the channel region and a gate conductor with vertical side walls is placed on the gate oxide. The MOSFET further comprises a threshold adjust implant region and/or punch through implant region being aligned with respect to the gate conductor and limited to an area underneath the gate conductor. Such a MOSFET can be made using the following method: forming a dielectric stack on a semiconductor structure; defining an etch window on the dielectric stack having the lateral size and shape of a gate hole to be formed; defining the gate hole in the dielectric stack by transferring the etch window into the dielectric stack using a reactive ion etching (RIE) process, implanting threshold adjust dopants and/or punch through dopants through the gate hole; depositing a gate conductor such that it fills the gate hole; removing the gate conductor covering portions of the semiconductor structure surrounding the gate hole; removing at least part of the dielectric stack. The present invention further discloses a method for the formation of field effect transistors (FETs) and general, and metal oxide field effect transistors (MOSFETs) in particular, comprising the following steps of: forming a dielectric stack on a semiconductor structure; defining an etch window on the dielectric stack; defining a gate hole in the dielectric stack by transferring the etch window into the dielectric stack using a reactive ion etching (RIF) process; depositing a side wall layer; removing the side wall layer from horizontal surface of the dielectric stack and gate hole such that side wall spacers remain which reduce the lateral size of the gate hole; depositing a gate conductor such that it fills the gate hole; removing the gate conductor covering the portions of the semiconductor structure surrounding the gate hole; removing at least part of the dielectric stack; and removing the side wall spacers. The present invention further discloses a Metal oxide semiconductor field effect transistor (MOSFET) comprising a drain region and source region which enclose a channel region. A thin gate oxide is situated on the channel region and a gate conductor with vertical side walls is located on this gate oxide. The interfaces between the source region and channel region and the drain region and channel region are abrupt. Such an FET can be made using the following method: forming a dielectric stack on a semiconductor structure which at least comprises a pad oxide layer; defining an etch window having the lateral size and shape of a gate pillar to be formed; defining a gate hole in the dielectric stack by transferring the etch window into the dielectric stack using a reactive ion etching (RIE) process; depositing a gate conductor such that is fills the gate hole; removing the gate conductor covering the portions of the dielectric stack surrounding the gate hole; removing at least part of the dielectric stack such that a gate pillar with vertical side walls is set free.