Patent GB-1139042-A (GB)
Title: Digital data transfer system
IPC: G06F3/06
Filed: 1966-06-24
Abstract: 1,139,042. Data transfer. MINNESOTA MINING & MFG. CO. 24 June, 1966 [14 July, 1965], No. 28548/66. Heading G4C. Digital data is transferred from one device to another via a buffer, the data rate of one device being controlled in accordance with the number of characters present in the buffer. In Fig. 1, data from a computer 10 is transferred serial by character, parallel by bit through each character position of an (n+2)-character flip-flop buffer 40, 50, 60 to record flip-flops 80 for recording on to magnetic tape 20. Each character position in buffer 40, 50, 60 has an associated status flip-flop 45, 55, 65 which is set if the position is occupied. The status flipflops, in conjunction with shift pulses from a clock (which may be the computer clock), shift the characters down the buffer 40, 50, 60 to close up gaps. Characters are read from the lowest character position 60 by clock pulses from a first track of a tachometer disc 32 driven by the tape motor 30, for uniform spacing on the tape. The computer 10, on sending a character, sets the highest status flip-flop 45. The number of status flip-flops set is converted to an analogue voltage and when the number exceeds 50%, a brake on the tape motor 30 is released and the motor is accelerated. The motor is also accelerated and the brake released in the event the number of status flip-flops set increases at above a certain rate. A deceleration voltage is applied to the motor 30 if the number of status flip-flops set falls below 50%. This voltage is terminated and the brake applied, when the tape speed, as indicated by the tachometer 32, falls below a certain value. Data can be passed from the tape 20 to the computer 10 in a similar fashion via the buffer 40, 50, 60, the switches 42, 43, 62, 63 being in the reversed positions from those shown. However, in this case the analogue voltage used for motor and brake control represents the number of status flip-flops not set. Also, the lowest status flip-flop 65 is reset by the computer 10 when it accepts a character and the highest status flip-flop 45 is set by a character gate 25 which detects characters read from the tape 20. Arrival of the first bit of a character (they may not be simultaneous because of skew) is detected by an OR gate (26, Fig. 2, not shown) to enable a counter (28) to count clock pulses from a second track of the tachometer disc 32. When a predetermined count is reached, judged sufficient to allow all the bits of the character to arrive, the highest status flip-flop 45 is set. Providing inter-record gaps.-These are not required for this apparatus but may be provided for compatibility of the tape with other apparatus by the computer 10 supplying dummy characters during computer-to-tape transfer or by routing the clock pulses from the first track of the tachometer 32 to the highest status flip-flop 45 for a predetermined time, to simulate dummy characters. Alternatively, the switch doing said routing may be activated under control of a counter counting one or more clock pulses from a third track of the tachometer 32, or a count of the clock pulses from the first track may control the gap length, or the shift pulses mentioned may be used. Modifications.-The magnetic tape 20 may be replaced by photographic film, punched tape, drum or disc. Transfer of characters may be serial by bit generally, or only within the buffer 40, 50, 60. Fig. 3 (not shown) shows an entirely serial flip-flop buffer using a 7-stage counter for controlling the status flip-flops (since each character has 7 bits). Fig. 7 (not shown) shows buffer portions 40, 60 used as parallel-to-serial and serial-to-parallel converters respectively and linked by a recirculating delay line. The lowest status flip-flop 65 is set by a 1 bit inserted at the beginning of the character by an extra flip-flop stage in portion 40 and shifted through the delay line and portion 60. Fig. 8 (not shown) shows the buffer 40, 50, 60 as involving a matrix store columns of which are filled and emptied successively with respective characters. Fig. 4 (not shown) shows a pulse train fed to the tape motor 30 being derived by ORing 1 bits obtained by scanning the status flip-flops with a ring counter. One or more portions of the buffer 40, 50, 60 may be dispensed with.