Patent GB-1078244-A (GB)
Title: Information storage units
IPC: G11C17/04
Filed: 1966-03-31
Abstract: 1,078,244. Read-only stores. INTERNATIONAL BUSINESS MACHINES CORPORATION. March 31, 1966 [April 20, 1965], No. 14303/66. Heading G4A. A read-only store (e.g. for microprogramming) comprises a plurality of printed circuit boards arranged side by side, projecting edge portions of adjacent boards being staggered so as not to overlap and carrying signal conveying members, the boards having interrogation and output terminals for preselected information on printed circuit cards contacting said boards. Each board (11) comprises an internal copperground plane separated by insulator from a copper surface on each side. These surfaces are each etched with a matrix of tabs (12) connected in columns each of which is connected to two sense terminals (35, 36) one at the top and one at the bottom of the (vertical) surface. Each row of the matrix has a respective conductive pad (19), electrostatically shielded from the matrix by a thick circuit line (41) connected to the internal ground plane. Each conductive pad (19) is connected to the corresponding such pad on the other side of the board and to an interrogation terminal (20) on the projecting edge (21) of the board. The matrix and optionally the conductive pads (19) are covered in varnish as a dielectric. The matrix is separated into four quarters by guides (50) stuck to the board, four printed circuit data cards (16) being inserted between the guides. Each card is the size of a conventional tabulating card and consists of copper-clad insulator etched with rows of parallelconnected tabs (15) connected to respective conductive pads (18), to overlay the tabs (12) and pads (19) of the board respectively. Some of the card tabs (15) are punched out. Alternatively the card may use conductive ink. Addressing circuitry (Fig. 5, not shown), including transistors (105) is provided on further cards (28, 29) plug-mounted on to the projecting edges (21) of the boards (11) and on to two busses (22a, 22b) themselves plugmounted on to the projecting edges (21). The projecting edges occupy only half the height of the boards, alternate boards being upside down to allow more room for the plug adapters (22), 23). Sense busses (39) are plug-mounted on to the top edges of the boards (11) connecting one set of sense terminals (35 or 36), depending on the orientation of the board, to a cable card (70), the other sense terminals being unused. Ground connections for the sense busses are provided to the internal ground planes of the boards. The data cards (16) are pressed against the boards (11) by inflatable bags (51) wrapped in shields (52) of copperclad insulator, the copper being soldered to selected points of the two boards (11) between which the shield (52) is situated and the insulator contacting the data cards. The addressing circuitry (Fig. 5, not shown), on receipt of a read-out pulse (102) from a delay on a timing card (101), decodes (103) bits 2, 4, 8, 16 from an address register (ROSAR) to select one of 16 groups of 126 transistors (105) at their bases. The higher order bits from the register are decoded (106 to 109) to select one transistor in each group, at their emitters. The selected transistor (105) reads out two words from the store, from corresponding positions on the two sides of one of the boards (11), one of the words being gated (115, 117) into latches (116) under control of the lowest order address bit. The latches are reset from the delay on the timing card (101).