baber/WOPTO huggingface dataset:
Patent JP-H10234810-A (JP)
Title: Nursing support bath bed
Inventor: TAKAHASHI TAKASHI
IPC: A61G7/10
Filed: 1997-02-24
Abstract: PROBLEM TO BE SOLVED: To achieve a reduction in a nursing person in replacing sheets, to enable 'raising of back' and 'lifting of knee' of a person to be nursed during the bathing and also to reduced the labor of the nursing person in the setting or removal of bedding. SOLUTION: Two sets of beds A and B are arranged to position the bed B under the bed A. Floor surfaces AF and BF of the beds A and B are hoisted by hoisting means 1 and 2 and held at almost the same height to form the surfaces of the beds. The surface BF of the bed B is lowered by the hoisting means 2 to differentiate a level between the surfaces AF and BF of the two sets of beds A and B so that fouled sheets can be taken out from the surface of the bed B to put clean sheets utilizing a difference in level keeping a person to be nursed lying on the bed A.
Patent JP-S58172617-A (JP)
Title: Hologram scanner
Inventor: YAMAGISHI FUMIO
IPC: G02B5/32
Filed: 1982-04-01
Abstract: PURPOSE:To reduce the astigmatism of a hologram scanner by providing a wavefront transducing element which transduces the wavefront of a reproduced wave incident to a scanning hologram and removes the astigmatism of a diffracted wave on at least one part of a scanning surface. CONSTITUTION:The wavefront of a reproduced beam 5 is the wavefront of diffracted light obtained by irradiating the hologram 1 reversely with light diverging from a point 3 and this diffracted light when made incident reversely converges to one point 3. The hologram scanner uses not only a point A, but also a point B on the hologram, but when the points A and B are close to each other, astigmatism at the point B is also reduced. A wavefront rransducing hologram 6 adjusts laser light 7 so as to form an image at the point 3 through a half-mirror 3, spherical lens 9, and mirror 10 to regard diffracted light 5 generated by irradiating the scanning hologram 1 with light as object light, and generates a plane wave 7' as reference light only by changing optical paths of the same laser light 7 through the half-mirror 8 and a mirror 8 and a mirror 11. When laser light 12 having the same wavefront with the reference light 7' is caused to strike the hologram 6, the diffracted light has the same wavefront with the object light 5.
Patent JP-H11324784-A (JP)
Title: Gas engine
Inventor: RIECK KAI
IPC: F02M21/02
Filed: 1999-03-02
Abstract: PROBLEM TO BE SOLVED: To operate a gas engine for its maximum reachable power and optimum efficiency within a harmful-material limit value without causing any knocking or misfire even under peripheral conditions on which it varies strongly. SOLUTION: The gas engine is mounted with a pre-controller 2 that includes sensors 6 and 8 for measuring peripheral conditions and computes output signals for driving a final control element 12 by way of a drive part 10 so that the engine operating point is adapted to a variation in the peripheral conditions. The pre-controller 2 is designed to shift the engine operating point at most to a point with a minimum allowance preset to the upper limit of an operating range upon a fluctuation in the peripheral conditions those sensors 6 and 8 detect. The pre-controller 2 is associated with a host knocking monitor device 4, which serves to control the engine power properly or stop the engine when the engine operating point reaches to a point with a minimum allowance set to the knocking limit.
Patent JP-S58172462-A (JP)
Title: Ignition device
Inventor: HIGUCHI TAKASHI
IPC: F02P3/055
Filed: 1982-04-01
Abstract: PURPOSE:To prevent damage of elements and misoperation at overvoltage in an ignition device equipped with an overvoltage protective circuit detecting overvoltage of a battery, by providing a means which decreases collector voltage of an amplifying transistor at detection of the overvoltage. CONSTITUTION:An ignition device, in which an ignition signal amplified by a transistor Tr3 controls a Darlington connected driving transistor Tr4 to generate a spark discharge to an ignition plug 6 by switching to drive an ignition coil 5, is equipped with an integrating circuit 9 removing a noise component in voltage VB by integrating the voltage VB of a battery and an overvoltage protective circuit 10 receiving the integrated voltage. Here a Zener diode ZD11 is interposed between the collector of said transistor Tr3 and the point of earth potential. In this way, even if the circuit 10 operates with a delay time for an increase of the voltage VB, voltage V2 is previously held by the ZD11 to lower voltage to prevent both breakdown of the Tr3 and misoperation of the Tr4.
Patent JP-H06240787-A (JP)
Title: Partition panel mounting structure
Inventor: IWAKIRI TOSHIYUKI
IPC: E04B2/82
Filed: 1993-02-22
Abstract: PURPOSE:To connect adjacent partition panels together and to readily and surely mount the partition panels on a floor face. CONSTITUTION:A first mounting plate 10, having a bent upright piece 11b projected sidewards of a support plate 11a, and a second mounting plate 12, having a bent upright piece 13b and an extending portion 13c both projected sidewards of a support plate 13b, are arranged in parallel on a floor face with the extending portion 13c secured to the floor face. Adjacent partition panels 1, 2 are placed on the two mounting plates 10, 12 and the bent upright pieces 11b, 13b arranged in a parallel, back-to-back relation are covered with and connected together by a connecting fitting 15.
Patent JP-S56150499-A (JP)
Title: Disposal of sludge
Inventor: OSHIRODA SHIGEHIRO
IPC: C02F11/12
Filed: 1980-04-24
Abstract: PURPOSE: To save the total consumption amount of a fluidizing oil in the aerobic biological disposal of organic sewage, by independently dehydrating sludge from the first sedimentation pool and excess sludge, and using the fluidizing oil only for the dehydration of the excess sludge.  
     CONSTITUTION: In the aerobic biological disposal of organic sewage, sludge precipitate 16 separated in the first sedimentation pool 1 is thickened in a sludge-thickening vessel 24, dehydrated by a dehydrator 26, dried by a drier 28 and then charged into an incinerator 9. On the other hand, excess sludge 17 generated in the final sedimentation pool 3 is thickened in a floating thickener 4, mixed with a fluidizing oil 31 in a fluidizing vessel 5, evaporated and dried in a quadruple-effect can- type vaccum evaporator 6, and then carried to a centrifugal separator 7 where the fluidizing oil 31 is separated from the excess sludge 17. The excess sludge is further treated thermally in a deoiler 8, to evaporate and separate water and oil from the sludge and to make deoiled sludge 30. The deoiled sludge 30 is charged into the incinerator 9. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S57169134-A (JP)
Title: Foundation construction work for housing using blocks and blocks therefor
Inventor: SAKAMOTO MASAHIRO
IPC: E02D27/01
Filed: 1981-04-10
Abstract: PURPOSE:To construct a foundation in a short period by a method in which iron bars are projected from the upside of a footing, blocks are set on the footing, the iron bars are pierced through the blocks, and cement mortar is packed into the through holes of the blocks. CONSTITUTION:A trench A is excavated, cable stones B are laid in the trench A, and a footing C is provided on the broken stones B. Iron bars E are arranged properly on the footing C, iron bars F are projected at a given interval from the footing C in such a way as to match the through holes of the blocks 1, cement mortar is placed on the footing C, and blocks 1 are orderly provided on the cement mortar. Then, the iron bars F are pierced through the holes 3 of the blocks 1 and then cement mortar is packed into the holes 3.
Patent JP-H04290368-A (JP)
Title: Power feeding transfer system
Inventor: MATSUI KAZUMASA
IPC: H04M19/00
Filed: 1991-03-19
Abstract: PURPOSE:To eliminate large parts such as transducers and choke coils, resulting in small size as well as low device cost and low assembly cost. CONSTITUTION:The power feeding of a transmitter 4 via a line 2 is performed by supplying the power which is generated by a high-voltage power supply 17 through active inductances 42 and 43 to a line 2. In this case, the power feeding to a transmission circuit 12 by DC interruption capacitors 40 and 41 is interrupted. On the other hand, the power supplied through the line 2 is extracted through active inductances 52 and 53, and supplied to a DC/DC conversion circuit 37. In this case, the power feeding to a reception circuit 33 is interrupted by DC interruption capacitors 50 and 51.
Patent JP-H02234752-A (JP)
Title: Ultrasonic diagnosing device
Inventor: YOSHIMURA HIROYUKI
IPC: G01N29/44
Filed: 1989-03-09
Abstract: PURPOSE:To ensure safety through prevention of output of an excessive ultrasonic wave by a method wherein when the peak value of a square computing output exceeds a set value, excitation of an ultrasonic probe is stopped. CONSTITUTION:A current by means of which an ultrasonic probe 5 is excited is detected in the shape of a voltage through a resistor R2, and electrically insulated by a transformer T2 to transmit it to a subsequent stage. The detecting current is squared by a squaring device 21 to obtain an exciting current square value, which is brought into an amount equivalent to acoustic intensity Im is defined to maximum intensity, ISPTA to space peak time average intensity, and ISPPA to space peak pulse average intensity. Three kinds of the intensity are determined from the exciting current of a ultrasonic probe, and compared respective specified voltage values, and when exceeding the specified voltage value, a high voltage used for exciting the ultrasonic probe 5 is shut off. Even when external noise is mixed and abnormality and a trouble occur, only an acoustic output within given specified value is emitted from the ultrasonic probe, resulting in the possibility of safe diagnosis.
Patent JP-S63220406-A (JP)
Title: Perpendicular thin film head
Inventor: EZAKI JIYOUICHIROU
IPC: G11B5/31
Filed: 1987-03-10
Abstract: PURPOSE:To obtain superior recording and reproducing output characteristics, by forming a first magnetic film, a second magnetic film, a coil, and an insulating film on the plane of a substrate, exposing a part of the second magnetic film to the surface side of the insulating film, and interposing a soft magnetic film between an exposed end face and a magnetic material. CONSTITUTION:On the plane of the substrate 1, the first magnetic film 2 made of a thin film, the second magnetic film 3, and the coil 4 are formed, and the first magnetic film 2, the second magnetic film 3, and the coil 4 are covered with the insulating film 5, and the magnetic material 9 is bonded on the insulating film 5 with a bonding agent 7. And the surface 311 of a branching path 31 consisting of the second magnetic film 3 is exposed on the surface of the insulating film, and the soft magnetic film 10 is interposed between the exposed end face 311 and the magnetic material 9. The soft magnetic film 10 is formed as a sputtering thin film by an Ni-Fe or a Co-Zr-Nb, etc. In such a way, a magnetic circuit is formed between the magnetic material 9 and the second magnetic film 3, and the magnetic resistance of a magnetic flux recovering path from the magnetic material to the first magnetic film 2 can be lowered remarkably, then, a high reproducing output characteristic can be obtained.
Patent JP-S58172619-A (JP)
Title: Substrate for optical device
Inventor: KAWAGUCHI TAKAO
IPC: G02F1/03
Filed: 1982-04-01
Abstract: PURPOSE:To obtain a substrate for a miniaturized optical device or a substrate for an optical device suitable for use in optical IC by interposing a buffer layer made of a dielectric having a lower refractive index than a light transmitting layer and small transmission loss between the light transmitting layer and an electrically conductive layer to reduce loss. CONSTITUTION:A light transmitting layer 32 made of a material having a higher refractive index than a transparent substrate 31 and an electrooptical effect is formed on the substrate 31 to manufacture an optical waveguide 30. A buffer layer 33 having a lower refractive index than the layer 32 is formed on the layer 32, and an electrically conductive layer 34 is formed on the layer 33. Since the peripheral part 331 of the layer 33 can be tapered by leaving space 42 between the surface 321 of the layer 32 and a mask 41 having an opening 411 and by carrying out vacuum deposition, sputtering or ion beam sputtering, a substrate for an optical device with no transmission loss of light waves and beams at the peripheral part of the layer 33 is obtd.
Patent JP-S60198559-A (JP)
Title: Ion current modulator
Inventor: TAMURA SAKAE
IPC: G03G15/05
Filed: 1984-03-22
Abstract: PURPOSE:To perform stable modulation by arranging a common electrode on the lower face of an insulating material layer having plural ion current passage holes and arranging a photoconductive layer, an ion current control electrode, and a resistance layer on the upper face of this insulating material layer and impressing positive and negative voltages to both electrodes. CONSTITUTION:Plural ion current control electrodes 22 are attached to an insulating material layer 21, under which a common electrode 23 is provided, in parallel, and plural ion current passage holes 24 piercing the common electrode 23, the insulating material layer 21, and ion current control electrodes 22 are provided. A corona charger 11 consisting of a shield electrode 12 and a corona discharging electrode 13 is provided under passage holes 24. The first electrode 25, a photoconductive layer 26, ion current control electrodes 22, a resistance layer 28, and the second electrode 27 are arranged on the upper face of the insulating material layer 21, and both sides of photoconductive layer 26 and the resistance layer 28 are allowed to overlap partially. A positive potential is given to the first electrode, and a negative potential is given to the second electrode, and zero potential is given to the common electrode 23. Further, the intensity of light irradiated to the photoconductive layer 26 is controlled to modulate the potential of control electrodes 22, and an ion current is controlled. Thus, the ion current is modulated stably.
Patent JP-H04290712-A (JP)
Title: Covering layer-molding method
Inventor: MITSUI KENICHI
IPC: B29L9/00
Filed: 1991-03-20
Abstract: PURPOSE:To injection-mold a covering layer without deteriorating the appearance of the surface of an elastic body also, while its burrs may be suppressed suficiently and simply. CONSTITUTION:In this method, the covering layer 2 of thermoplastic resin is injection-molded on the surface 4b of an elastic body. While the mold-position 6a for injection molding which forms sealing part 7 with the surface 4b of the elastic body is kept at lower temperature than that of the other mold position for injection molding, the covering layer 2 is molded characteristically.
Patent JP-H09231857-A (JP)
Title: Illuminated switch
Inventor: SHIMAMITSU TOKU
IPC: H01H13/70
Filed: 1996-02-20
Abstract: PROBLEM TO BE SOLVED: To provide an illuminated switch giving a clear click feeling and consuming a low power by forming an EL element from a transparent material capable of bending deformation elastically, subjecting the EL element to an emboss processing into a dome shape, and furnishing an electric contact on the internal surface. SOLUTION: A film of ITO etc., is attached to the undersurface of a transparent material 1 capable of bending deformation elastically and subjected to an emboss processing so that a dome shape is formed, and a ring-shaped electroconductive material 2 is printed with a specified width in the position corresponding to the diameter of the dome. On its undersurface, a phosphoric layer 3, dielectric substance layer 4 and lower electrode 5 are laminated in a structure similar to an EL element so that a sheet-form light emitting element is formed. The dome shape having the diameter in the position of the ring-shaped electroconductive material 2 is subjected to an emboss processing so that the configuration as illustrated beside is generated, and an insulation part 6 is provided along the lower electrode 5 on its inner surface, where the symbol 7 shows the upper contact.  Under it, a comb/teeth electrode is positioned which is provided on a lower base board with a spacer 8 interposed, and to the over-part an indication rubber piece 10 is fixed by adhesives 9.
Patent JP-S60199388-A (JP)
Title: Production of d-pantoic acid and/or d-pantolactone
Inventor: YAMADA HIDEAKI
IPC: C12R1/72
Filed: 1984-03-22
Abstract: PURPOSE:L-Pantoate salt and/or L-pantolactone is treated with a microorganism and the pH of the resultant solution is adjusted to enable high-yield preparation of D-pantoate salt and/or D-pantolactone. CONSTITUTION:At least one microorganisms selected from Arthrobacter, Acinetobacter and Candida is aerobically cultured in a medium containing L-pantoate salt and/or L-pantolactone. Then, when needed, saccharides such as glucose or sucrose, alcohols, acids and other energy sources are added to the culture mixture, then, a microorganism in Mucor or Rhizopus is added to adjust the pH of the culture mixture to 2-6.
Patent JP-H06267283-A (JP)
Title: Read-only memory writable data and method for writing/ reading data
Inventor: OKUDA YASUHIRO
IPC: G11C16/02
Filed: 1993-03-16
Abstract: PURPOSE:To reduce current consumption in a read-only memory writable data by inverting the values of respective bits in data when the number of bits of a first value in the data is a prescribed number or above. CONSTITUTION:Whether the number of bits of '0' among the data to be written in a memory cell array 1 is 1/2 or above of a prescribed bit length or not is decided by a number of '0' decision circuit 8 to store the decision result in a monitor bit cell group 9. Then, when the fact that the number of '0' is 1/2 or above of a prescribed bit length is decided, the values of respective bits are inverted to be outputted to a data write/read circuit 2. Further, when the fact that the number of '0' is 1/2 or above of a prescribed bit length is stored in the cell group 9, the values of respective bits in the data read out by the data W/R circuit 2 are inverted by a data inversion selection circuit 12 to be outputted. By such a constitution, the current consumption at a writing time is reduced, and the current consumption is suppressed even when a data length is enlarged.
Patent JP-S56149828-A (JP)
Title: Phase synchronization detecting circuit
Inventor: SHIGETA KOUJI
IPC: H03L7/095
Filed: 1980-04-23
Abstract: PURPOSE:To easily detect the synchronization irrespective of duty ratio of an input signal, by inserting a duty ratio converting circuit having a function for controlling the transition of a signal, into the prestage of the exclusive OR circuit. CONSTITUTION:In case signals A, B which are in the same frequency and in phase, but are different in the duty ratio have been input, the duty ratio converting circuit 4 corrects an operation error of the signal transition in the initial state, etc., which is caused in the inside of the circuit, and controls so that two output signals A', B' are always in phase as shown by E of the waveform B'. They become signals whose duty ratio is also same. These signals are input to the next exclusive OR circuit 1. The output of the exclusive OR circuit 1 is applied to the integrating circuit 2, and after smoothed in said circuit, it is converted to DC voltage D. The DC voltage D which has been converted in this way is input to the voltage comparator 3, and is compared with the reference voltage Vr.
Patent JP-S63221771-A (JP)
Title: System for setting retransmission condition
Inventor: SHIMADA TOMOYUKI
IPC: H04N1/32
Filed: 1987-03-10
Abstract: PURPOSE:To attain retransmission request for an illegible pattern only by counting a code length of a picture signal at each sent scanning line and applying retransmission request to the sender side when number of time of mis- reception exceeds a prescribed threshold value. CONSTITUTION:In case of starting the reception of a picture signal from a transmission line 1, a transmission control means 2 restores the count of a counter 5 to zero. A picture information decoding means 3 restores the picture signal received via the transmission control means 2 to original picture information. In this case, whether or not mis-reception exists is discriminated by linear decoding and in case of normal reception, the code length is recorded to a code length recording means 8. When misreception is detected, a code length read by a code length comparison means 9 is compared with a prescribed threshold value and when the read code length is larger than the threshold value, the counter 5 is advanced. Then when the page comes to its end, only when the count of the counter 5 exceeds a prescribed value, the retransmission request signal is sent to the sender side.
Patent JP-H09245983-A (JP)
Title: Discharge lamp lighting device
Inventor: OE NOBUYUKI
IPC: H05B41/24
Filed: 1996-03-13
Abstract: PROBLEM TO BE SOLVED: To provide a lighting device which can reduce the consumed power to a half by sensing the primary side current fed to the primary side of a transformer of a push-pull inverter, and setting the operation of a regulator for controlling a discharge lamp concerned to the half-cycle operating point of the primary side current. SOLUTION: One end of a resistance 14 is connected with the emitter of a transistor 4 while the other end is connected with the conneting point of the emitter of another transistor 5 with the ground. When a drive signal is fed to a transistor 13 with the operation of a control circuit 12, the base currents of the transistors 4, 5 are supplied through resistances 6, 7, and either transistor (Tr) 4 or 5 is turned on. The primary side current fed to the primary side of transformer 3 with turn-on of Tr 4, 5 flows in a portion of half one cycle to a resistance 14 as a current sensing means and becomes a current having an amperage differing from cycle to cycle. The power consumed by the resistance 14 reduces to one half of the conventional value.
Patent JP-S63221716-A (JP)
Title: Digital-analog converter
Inventor: MASUDA SUMITAKA
IPC: H03M1/66
Filed: 1987-03-11
Abstract: PURPOSE:To decrease the chip area by setting an electric charge in response to each capacitance into each capacitor, transferring the electric charge stored in each capacitor and outputting the result of total sum thereby reducing the current consumption. CONSTITUTION:Capacitors C0-C2 are provided corresponding to each bit of a digital input signal and have a capacitance proportional to the weight of the quantized bit of the digital value. Transfer setting means IV0-IV2 and transfer means S10-S12 set an electric charge in response to each capacitance of the capacitors C0-C2. Transfer/total sum means S20-S22 transfer the electric charge stored in the capacitors C0-C2 and output the result of total sum as an analog signal.
Patent JP-H10248357-A (JP)
Title: Head-feeding combine
Inventor: UEDA SUEZO
IPC: A01D61/00
Filed: 1997-03-11
Abstract: PROBLEM TO BE SOLVED: To provide a head-feeding combine by which cutting work and pile threshing work are excellently executed in accordance with the posture of a grain culm supply guide. SOLUTION: This head-feeding combine is the one where the grain culm supply guide 12 is made to be freely position change possible from a pinching actuation posture for pinching grain culms from a vertical carrier device along a grain culm carrying direction as against the carrier start end part of a feed chain 11 to a pile threshing evasion posture for opening the carrier start end part of the feed chain 11. It is also provided with a pile threshing mode detecting means 16 for detecting whether the grain culm supply guide 12 is in the pinching actuation posture or in the evasion posture.