Patent GB-772274-A (GB)
Title: Data processing apparatus
IPC: G06F7/24
Filed: 1955-05-02
Abstract: 772,274. Statistical apparatus. RADIO CORPORATION OF AMERICA. May 2, 1955 [May 3, 1954], No. 12684/55. Class 106 (1).  In apparatus using storage tape upon which is recorded a plurality of characters each comprising a combination of at least one binary digit of a first kind with binary digits of a second kind, read heads for each binary digit position being each connected to a gating means which has a single output connection and which gives an output signal whenever a binary digit of the first kind is sensed, the output signals from the gating means are used to cause a timing means to produce tuning signals for the control of a plurality of functional units adapted to operate upon the information derived from the tape. The apparatus described is arranged to sort messages stored on each of two input tapes into a predetermined sequence and transfer them to one of two output tapes. It comprises two pairs of signal sensing means respectively adjacent the path of the input tape, storage means coupled respectively to one of each pair of sensing means for storing signals representing the messages, comparing means coupled to the storage means for determining the order of precedence of the messages and transfer means responsive to the comparing means for transferring one of the messages stored on each input tape to one of the output tapes. Each message comprises an order determining portion and the storage means stores the order determining portions of a message encoded on a first input tape and a second input tape and the comparing means determines the relative order of the portions stored by the storage means. Normally an order determining identification will be provided which precedes the message proper. In the embodiment described the identification stands in place of the message and is called a serial number, i.e. the whole of the individual messages are stored and used in making the comparison when necessary. The two input tapes are designated A, B in the circuit shown and are driven respectively by driving means 56a, 56b. The output tapes C, D are driven by means 70a, 70b. Reading heads 16a, 18a are applied to tape A and heads 16b, 18b to tape B. Recording heads 65a, 65b and erase heads 67a, 67b are applied to tapes C and D. The reading heads 16a each sense six signals across the width of the tape and these are relayed to amplifiers 28a. (Numbers shown on connections in the drawings indicate the number of separate channels.) The signals pass from the amplifiers to pulse shapers 40a, making pulses of rectangular waveform which are relayed to an input matrix 38a consisting of an array of " and gates arranged in six rows and eight columns. The signals are fed through the " and " gates of this matrix column by column to storage registers 46a consisting of " flipflop " circuits disposed in a similar array. During this process the column is selected by the timing means which is in the form of a ring counter 36. The counter advancing one stage as each pulse is received from pulse shapers 40 through " or " gates 42a, " or " gate 47 and " and " gate 34. From storage register 46a the messages are transferred to output " and " gates 48a arranged in a similar array. The timing pulses from the counter 36 are fed to the columns of this array through a delay line 49a. From the output gates 48a the messages are transferred column by column to comparator 50. Messages read on tape B by head 16b are relayed similarly to the other side of the comparator and according to the results of the comparison, the message on tape A is recorded on an output tape before or after the corresponding message on tape B. Preliminary operation.-Before sorting is commenced however it is necessary to send a " clear " signal to flip-flops of storage register 46a which may be done by means of a manual switch. The output tapes are each to receive one message from tape A and one from tape B. Predetermined counters 58a, 58b are therefore pre-set to produce an output after one input pulse. During sorting only one input tape is running at a time, the tapes being run alternately, e.g. tape A first. When tape A is started the " start message " symbol is sensed by the reading heads 16a and signals are furnished in parallel to the amplifiers 28a through pulse shapers 40a and thence to " code recognition " gate 26, to input matrix " and " gates 38a and to " or " gates 42a. From gate 42a the signal passes through " or " gate 47 to "and" gate 34 which is not yet primed so that it does not pass the signal. The " start message " signal is recognized by code recognition gate 26 and an output signal passed through delay line 30 to " set " input of flipflop 32. The output of flip-flop 32 is a D.C. voltage applied to inputs of "and" gate 34 which is thereby primed to pass subsequent signals. The " and " gates of input matrix 38a are not responsive to the signals received from pulse shapers 40a because the second input signal, from counter 36, is not present. The pulses representing the second character sensed by the reading head 16a, which is the highest order-determinative character of the serial number, are applied through the amplifiers and pulse shapers to the input matrix 38a. At the same time they are applied through "or" gates 42a, 47 to " and " gate 34 (now primed) and thence to input of character counter 36 to render the first stage of the counter operative. The output of the first stage is applied to inputs of first column of " and " gates of input matrix 38, coinciding with the inputs direct from pulse shaper 40a so that these gates are made conductive. The outputs from the first column are connected to the " set " inputs of the first column of flipflops in storage register 46a which are thereby set up to correspond with the first character of the serial number. The outputs of the first column of the storage register are connected to the respective inputs of the first column of the output " and " gates 48a and since the storage register flip-flops remain in one or the other stable condition the outputs thereof maintain the condition of the first column of the output gates until the storage register flip-flops are reset to their zero condition. The output of the character counter 36 applied through delay lines 49a coincide with the signals from flipflops 46a and cause an output signal representative of the first character of the serial number to be applied to one of the inputs of the comparator. The succeeding characters of the serial number of the first message on tape A are similarly stored in succeeding columns of the storage register and the succeeding columns of output matrix "and" gates are thereby primed for subsequent operation. The output " and " gates 48a are gated column by column by the output pulses through delay lines 49a so that the serial number stored in the flip-flops 46a is switched to the comparator column by column. So far tape B has not started and consequently the comparator indicates that the serial number from tape A is the greater. This causes an output signal on lead 52b which is applied through " or " gate 45 to " reset " input of flip-flop 55 and direct to an input of " and " gate 53b. Flip-flop 55 is initially in a " set condition so that both " and " gates 53a, 53b are primed and the signal applied to " and " gate 53b is passed to " or " gate 54b. Since flip-flop 55 is now reset, subsequent signals from the comparator do not pass to the gates 54a, 54b until flip-flop 55 is again set. Output of " or " gate 54b passes to " set " input of flip-flop 35b and through " or " gate 57a to the " reset " input of flip-flop 35a. The eighth character of the serial number causes the counter 36 to furnish D.C. voltage to Schmitt trigger 37 which transforms D.C. voltage to a pulse which passes to " and " gates 63a, 63b. The output from trigger 37 is also applied through delay line 39 to one of the inputs of an " and-not " gate 51 which passes the signal unless a prior signal has been received from one or the other of the flip-flops 35a or 35b. The " and-not " gate is provided to cause tape A to advance in the case where both serial numbers are equal. In this first comparison, message A is the greater and flip-flop 35b is therefore in set condition and " and-not " gate 51 is disabled by the signal applied therefrom. The output from delay line 39 is passed through another delay line 41 to an " initiate " conductor connected to " and gates 59a, 59b, 74a, 74b. Flip-flop 35a is in reset condition and so the initiation pulse has no effect on " and " gate 59a. Flip-flop 35b is set and and " gate 59b therefore passes signal to the "start" input of tape B drive mechanism 56b and to " stop " input of tape A drive mechanism 56a. Thus the eighth character of the serial number on tape A causes tape A to be stopped and tape B to be started. " Start " pulse from " and " gate 59b passes through delay line 61b to input of predetermined counter 58b, advancing it one position. Since this counter is set to respond to count of one, a signal is sent to " and " gate 60 which becomes operative because of signals from both counters 58a, 58b. Output from " and " gate 60 passes to Schmitt trigger 69 to generate resetting pulses for the counters 58a, 58b. The " initiation " pulse is applied through _delay line, through " or " gates 57a, 57b to reset flip-flops 35a, 35b. This pulse is also applied to reset counter 36 and to reset flip-flop 32. First pass of sorting.-The first character of the first message encoded on tape B, i.e. the " start-message " symbol is detected by reading head 16b, passed through amplifiers 28b, pulseshapers 40b to code recognition gate, the output of which is passed through delay line 30 to "set" inputs of flip-flop 32 which then primes " and " gate 34. The highest order determining character of the first " B " message is then detected and passed to " or gate 42b and to input matrix 38b. The signal passing through "