baber/WOPTO huggingface dataset:
Patent TW-521236-B (TW)
Title: Method and device for displaying bit-map multi-colored image data on dot matrix type display screen on which three-primary-color lamps are dispersed
Inventor: TOKIMOTO TOYOTARO
IPC: G09G3/32
Filed: 2000-06-02
Granted: 2003-02-21
Abstract: A large number of pixel lamps are evenly arrayed in a regular pattern to constitute a display screen. The pixel lamps are in three kinds which are a first color lamp, a second color lamp and a third color lamp. These three kinds of pixel lamps are evenly dispersed on the display screen. Image data to be displayed on the screen is multi-color data of a bitmap format, in which one pixel is expressed by a gathering of first color data, second color data and third color data. The first color data plane (second color data plane, third color data plane) on a bitmap image data plane is divided into a multitude of groups, each group being composed of a plurality of pixels arranged adjacently to each other. Each group is made to correspond to each first color lamp (second color lamp, third color lamp). An action of selecting, in a specified order, the first color data of a plurality of pixels that belong to one group is repeated at high speed, and the first color lamp (second color lamp, third color lamp) corresponding to each group is activated to emit light according to the selected first color data (second color data, third color data). The way that the first color data plane is grouped, the second color data plane is grouped, and the third color data plane is grouped is such that the groups are mutually shifted on the bitmap image data plane while being partially overlapped, interrelating with a shift in the arrays of the first color lamp, the second color lamp, and the third color lamp on the display screen.
Patent TW-454379-B (TW)
Title: Scaling logic for event based test system
Inventor: GOMES GLEN A
IPC: G01R31/319
Filed: 2000-03-31
Granted: 2001-09-11
Abstract: An event based test system having a scaling function for freely changing the timings of events for testing an electronics device under test (DUT) by supplying a test signal to the DUT and evaluating an output of the DUT at a timing of a strobe signal. The event based test system includes an event memory for storing timing data of each event formed with an integer multiple of a reference clock period and a fraction of the reference clock period wherein the timing data represents a time difference between two adjacent events, an address sequencer for generating address data for accessing the event memory to read out the timing data therefrom, a summing and scaling logic for summing the timing data and modifying the timing data based on a scale factor to produce and overall time of each event relative to a predetermined reference point, an event generation circuit for generating each event based on the overall time for formulating the test signal or strobe signals, and a host computer for controlling an overall operation of the event based test system through a test program.
Patent TW-468295-B (TW)
Title: Charge/discharge controlling semiconductor device
Inventor: YOSHIDA SHINICHI
IPC: H02J7/00
Filed: 2000-04-08
Granted: 2001-12-11
Abstract: In a charge/discharge controlling semiconductor device for a secondary battery which can be used repeatedly even after detection of an abnormal charging current, the abnormal charging current is detected by using the resistance value of the on-state of a switching element without a current fuse for detection of the abnormal charging current.
Patent TW-452983-B (TW)
Title: Non-volatile semiconductor memory device and its manufacturing method
Inventor: KAMIYA EIJI
IPC: H01L27/115
Filed: 2000-04-26
Granted: 2001-09-01
Abstract: It is difficult to control the etching of the floating gate. In each memory cell MC, a gate oxide film 12 is formed on the surface of a semiconductor substrate 11. A first floating gate 13a comprising a floating gate FG is formed on the gate oxide film 12, an insulating film 14 is formed on the floating gate 13a, and a second floating gate 13b is formed on the insulating film 14, wherein the insulating film 14 functions as an etching stopper, when the second floating gate 13b of polysilicon is etched.
Patent TW-425296-B (TW)
Title: A device for acupuncture
Inventor: KIM CHI-KYUNG
IPC: A61N2/06
Filed: 2000-05-25
Granted: 2001-03-11
Abstract: A device for acupuncture is disclosed. The device has a pressure plate 100 having a polygonal profile. Both a magnet 300 and a magnetic body 400 are set in the pressure plate 100, with the magnetic body 400 being brought into contact with the magnet 300 at its upper end. The magnetic body 400 also extends through the pressure plate 100 so as to project outside the lower surface of the plate 100 at its lower end. The pressure plate 100 is also provided with both a plurality of fitting rods 130 and the same number of channelled fitting tubes 140. When it is desired to assemble two or more pressure plates 100 into an assembly, the fitting rods 130 of one plate 100 are elastically coupled to the channelled fitting tubes 140 of another plate 100. A cap 200 is mounted to the upper surface of the plate 100 and seats both the magnet 300 and the magnetic body 400 therein. A tubular member 500 is fitted into the pressure plate 100 from the lower surface of the plate 100 and is locked to the cap 200 at its upper end. The tubular member 500 has a central bore 530 allowing the magnetic body 400 to axially extend through until the conical tip of the magnetic body 400 projects outside the lower surface of the plate 100. This device is formed as a unit cell, and so two or more devices are easily and orderly coupled to each other into an acupuncture assembly, having desired size and shape, when necessary. The device of this invention may be attached to a desired part of the body using a band or may be coupled to each other into a bed mattress-sized assembly preferably usable as a healthful mattress for beds. This device thus allows a user to save money while purchasing such a device and gives a desired acupuncture treatment effect to the user.
Patent TW-476093-B (TW)
Title: Plasma display panel
Inventor: LIN YIH-JER
IPC: H01J9/00
Filed: 2000-05-31
Granted: 2002-02-11
Abstract: A plasma display panel (PDP) contains a back plate, a front plate parallel to and above the back plate, a plural number of electrode pairs and a plural number of ribs. Every electrode pair contains a first electrode and a second electrode parallel along a first direction and placed underneath the front plate with equal distance apart. The plural number of ribs contain at least a first rib, a second rib and a third rib parallel along a second direction and paced above the back plate with equal distance apart. The second direction is perpendicular to the first direction. The intersection of the first rib and the second rib with the electrode pair forms a first sub pixel unit and the intersection of the second rib and the third rib with the electrode pair forms a second sub pixel unit. The first electrode area of the first sub pixel unit is greater than the first electrode area of the second sub pixel unit. When a voltage is applied on the first electrode and the second electrode, plasma-generating area of the first sub pixel unit is greater than that of the second sub pixel unit.
Patent TW-552412-B (TW)
Title: Environmental testing chamber
Inventor: ELDRED JOHN
IPC: G01M99/00
Filed: 2000-06-21
Granted: 2003-09-11
Abstract: An apparatus is provided for conducting environmental tests on a device. The apparatus includes a cabinet defining a testing chamber for receiving the device therein. Control structure, operatively connected to the cabinet, varies the environmental conditions within the testing chamber to a user desired environment. An isolation structure is provided for isolating the device within the testing chamber and preventing electromagnetic and radio frequency waves from passing therethrough.
Patent TW-487922-B (TW)
Title: Semiconductor memory device having global bit line precharge circuits
Inventor: KA SOON-TAEG
IPC: G11C11/401
Filed: 2000-06-27
Granted: 2002-05-21
Abstract: A semiconductor memory device includes: a plurality of global I/O line pairs, each having a global I/O line and a complementary global I/O line; a data I/O buffer unit, coupled to the global I/O line pair; a plurality of banks, coupled to the global I/O line pair, for storing data, said banks including: a first bank coupled to the global I/O line pair; and a second bank coupled to the global I/O line pair, wherein the second bank is located closer to the data I/O buffer unit than the first bank is; a control signal generating unit for generating a control signal, said control signal has a first level and a second level in a read operation and a write operation, respectively; a first precharge unit located closely to said first bank, said first precharge unit sensing a level transition of the global I/O line pair and precharging the global I/O line pair in response to the control signal of the second level in a write operation; and a second precharge unit located closely to the second bank, said second bank, said second precharge unit sensing a level transition of the global I/O line pair and precharging the global I/O line pair in response to an inverted signal of the control signal in the read operation.
Patent TW-464489-B (TW)
Title: Electrical page turner device
Inventor: TSAI KUEN-HUNG
IPC: A61F4/00
Filed: 2000-08-29
Granted: 2001-11-21
Abstract: This invention of page turner device is used to assist person with upper limb handicap in reading. The whole device consists of four parts: a mechanical platform, a pair of mechanism for pressing and pushing page, a forward turning page mechanism, and a control system. The book is put on the mechanical platform and there are three input buttons on the two side of platform for users can easily access the page turner. The pressing-pushing page mechanism includes a pressing arm and pushing bar controlled by an individual motor to perform the functions of fixing book and pushing page respectively. The function of forward turning page mechanism is to turn page from side to side when the page is propelled and separated from book by the pressing-pushing page mechanism. The control system placed under the mechanical platform is used to incorporate motors and sensors during the device is performing the functions.
Patent TW-491790-B (TW)
Title: Motorcycle having improved rear braking device
Inventor: IGARASHI MAKOTO
IPC: B62K11/10
Filed: 2000-08-04
Granted: 2002-06-21
Abstract: The technical objective of the present invention is to provide a motorcycle with an improved rear-braking device that can suppress the undesired thermal effect from the muffler on the caliper. This motorcycle (10) is assembled by installing a swing unit (16) with built-in rear wheel power transmission mechanism swingably and vertically on a body frame, extending the swing unit (16) rearward, extending a swing arm (70) from a longitudinally mid-point of the swing unit (16) rearward, pivotally supporting a rear wheel (17) between the rear part of the swing unit (16) and the rear part of the swing arm (70), and installing a caliper (92) of a hydraulic rear disk brake (90) on the swing arm (70). Then, a muffler (82) for engine exhaust is passed through the swing arm (70) in the outer side direction thereof, and the caliper (92) is disposed on the underside of the swing arm (70).
Patent TW-488143-B (TW)
Title: Optical scanning device with variable resolution and method thereof
Inventor: HUANG JR-WEN
IPC: H04N1/04
Filed: 2000-08-18
Granted: 2002-05-21
Abstract: An optical scanning device with variable resolution and method thereof are disclosed. The invention utilizes devices such as two rotation plates with plural lenses having different specifications and plural CCDs, etc., and a motor that pulls a transmission rod for proceeding the forward and backward movement, and which moves in accordance with two unidirectional axes with two different rotational directions, so that the two unidirectional axes on the transmission rod can rotate with different directions to vary the combination of plural lenses and plural CCDs for adjusting the resolution. When the device is applied in a scanner, users can adjust the scanner according to the data with different resolutions to obtain a clearest scanning effect.
Patent TW-488124-B (TW)
Title: Transfer mechnism for transferring power between a utility source and a stand-by generator
Inventor: KERN ROBERT D
IPC: H02J9/06
Filed: 2000-08-18
Granted: 2002-05-21
Abstract: A transfer mechanism is provided for transferring the supply of power between a generator and utility source. The transfer mechanism includes a monitoring system for monitoring the power supplied by the utility source. The monitoring system starts the generator in response to a power outage from the utility source and stops the generator in response to the restoration of power from the utility source. A power relay has a utility input connectable to the utility source, a generator input connectable to the generator, an output connectable to a load, and a movable contact for selectively interconnecting one of the inputs to the output in response to the generation of power by the generator.
Patent TW-472330-B (TW)
Title: Semiconductor device and the manufacturing method thereof
Inventor: IMOTO TAKASHI
IPC: H01L25/065
Filed: 2000-08-18
Granted: 2002-01-11
Abstract: The prevent invention discloses a semiconductor device with stacked type package. The semiconductor device comprises a stacking structure for stacking a plurality of printed circuit boards with semiconductor devices and the stacks of conductive via in insulation substrates. The printed circuit boards have a plurality of embedded via holes to form the connecting electrode respectively and a plurality of wirings to connect electrically with the connecting electrodes. The semiconductor device is electrically connected with the wirings provided in the printed circuit board. The insulation substrate provides a chip cavity with size larger than the size of the semiconductor device for accommodating the semiconductor devices on the printed circuit board and the connecting electrodes having a plurality of via holes embedded therein. The conductive via insulation substrate is stacked with the printed circuit board so that the connecting electrodes of the conductive via insulation substrate are electrically connected with the connecting electrodes of the printed circuit board. And the semiconductor devices on the printed circuit board are accommodated in the chip cavity on the conductive via insulation substrate to compose the above-mentioned stacking body.
Patent TW-494569-B (TW)
Title: Semiconductor device
Inventor: OTSUKA NOBUAKI
IPC: H01L21/822
Filed: 2000-09-05
Granted: 2002-07-11
Abstract: The present invention provides a kind of semiconductor device that contains the followings: an output buffer circuit, which has several transistors connected in parallel for driving the external portion; a connection terminal, which connects an external resistor; and an output impedance control circuit, which is connected with the connection terminal as well as the output buffer circuit such that the output buffer resistance is adjusted in accordance with the external resistor. The output impedance control circuit is provided with the followings: the first transistor with the first conduction type, in which the drain is connected with the connection terminal; the first level control circuit, which connects the gate of the first transistor for controlling the level of the first transistor gate so as to maintain the voltage of the connection terminal at the specified voltage level; the second transistor, which has a gate connected to the gate of the first transistor and a source connected to the source of the first transistor; the first dummy transistor group consisting of transistors with the second conductivity type, which are connected to the second transistor and correspond to the output buffer transistors for driving the external portion such that each transistor is connected in parallel; the first control circuit, which is connected to the second transistor and the first dummy transistor group for controlling the first dummy transistor group to maintain the level of a connection node between the second transistor and the first dummy transistor group at the predetermined voltage level; and the second control circuit, which is used to control the transistor group for driving the external portion according to the control results of the first control circuit.
Patent TW-I229126-B (TW)
Title: Cutting or grinding oil composition for use in a minimal quantity of 0.001 ml/minute to 1 ml/minute lubrication system and cutting or grinding method using the same
Inventor: YOKOTA HIDEO
IPC: C10M105/32
Filed: 2000-10-25
Granted: 2005-03-11
Abstract: The invention provides cutting or grinding oil compositions which are suitable for use in a minimal quantity lubrication system in which a minimal quantity of oil is supply together with air to the spot to be cut or ground of a work. With the use of an ester, particularly an ester having specific characteristics, as a base oil, the oil compositions can be improved in lubricating properties and stickiness.
Patent TW-I225036-B (TW)
Title: Photoelectric oxidation wastewater treatment method and device using such a method
Inventor: LU RUEI-SHAN
IPC: C02F1/30
Filed: 2000-10-31
Granted: 2004-12-11
Abstract: The present invention relates to a photoelectric oxidation wastewater treatment method and a device using such a method, and is related to the field of wastewater treatment method in treating industrial wastewater in compliance with the discharge standard stipulated by the environmental protection agency. The invented method comprises performing a pH value adjustment step to adjust wastewater to a desired pH value; performing a step of reducing the ADMI (American dye manufacturers institute) value in the wastewater for removing impurities from the wastewater and reducing the hue of wastewater; performing a photoelectrical oxidation step of using electrolysis, photo decomposition, and photo catalytic reaction, to decompose the organic matters in the wastewater in order to greatly reduce the COD of the wastewater; and performing a discharge step for discharging the treated wastewater.
Patent TW-544829-B (TW)
Title: Testing integrated circuits
Inventor: DEGANI YINON
IPC: H01L21/66
Filed: 2000-11-01
Granted: 2003-08-01
Abstract: The specification describes a technique for burn-in electrical testing of IC dies prior to wire bonding the dies to the next interconnection level. The dies are provided with a test solder bump array interconnected to the IC contact pads of the dies. The Known Good Dies (KGD) can then be wire bonded, or alternatively flip-chip solder bump bonded, to the next interconnect level.
Patent TW-487868-B (TW)
Title: Portable record and/or reproduce device, method of reproducing, and method of recording and reproducing
Inventor: MIYAZAKI SHUICHI
IPC: G06F19/00
Filed: 2000-11-10
Granted: 2002-05-21
Abstract: The portable record and/or reproduce device of the present invention comprises reproduce means for reproducing digital data read from a predetermined recording medium recorded with digital data; operation means for indicating reproduction of digital data recorded on a recording medium; control means that, in response to an indication through the operation means, reads digital data from the recording medium, sends the data to the reproduce means, and controls the reproduce means to reproduce the digital data; and a cylindrical case for receiving the reproduce means and the control means. The operation means is installed to one end side of the cylindrical case in a long edge direction. The user can advantageously operate the device without taking it off a bag or pocket. Therefore, the operability is remarkably improved.
Patent TW-468247-B (TW)
Title: Damascene wiring structure and semiconductor device with damascene wirings
Inventor: OTSUKA SATOSHI
IPC: H01L23/52
Filed: 2000-12-12
Granted: 2001-12-11
Abstract: A damascene wiring structure having: a lower wiring structure; an interlayer insulating film covering the lower wiring structure; a wiring trench formed in the interlayer insulating film from an upper surface thereof, and a via hole passing through the interlayer insulating film from a lower surface of the wiring trench in an inner area thereof and reaching the lower wiring structure, the via hole having a diameter smaller than a width of the wiring trench; an insulating pillar pattern projecting upward form the lower surface of the wiring trench in an area outside of the via hole, the insulating pillar pattern being made of a same material as the interlayer insulating film, wherein a first occupied area factor of the insulating pillar pattern in a first area of the wiring trench near said via hole is higher than a second occupied area factor of the insulating pillar pattern in a second area of the wiring trench remote from the via hole; and a dual damascene wiring formed by filling the wiring trench and said via hole with conductive material. A damascene wiring structure having a high reliability and a semiconductor device having such a damascene wiring structure can be formed.
Patent TW-488061-B (TW)
Title: Apparatus for current ballasting ESD sensitive devices
Inventor: RUSS CHRISTIAN CORNELIUS
IPC: H01L23/60
Filed: 2001-01-04
Granted: 2002-05-21
Abstract: A current ballasting circuit for an ESD protection device couples nonintersecting conductive strips between a common contact pad and the contact electrodes of the ESD protection device. The connecting strips form respective electrically isolated ballasting resistors between the external contact pad and the contact electrodes of the ESD device. In addition, lateral resistances are formed between the contact strips which enhance the operation of the multiple ballasting resistors. The conductive strips may be made from metal, polysilicon or by a vertically meandering series connection of polysilicon layers, metal layers and interconnecting vias. The lateral resistance between the parallel conductive paths may be enhanced by segmenting both the drain and source electrodes. In one example, the gate electrode of an MOS ESD device extends locally between each pair of strips to segment the drain and source regions. The lateral resistance between the conductive strips is further enhanced by defining an additional gate electrode, having a portion that is parallel to the gate electrode of the ESD device and further portions that extend between the conductive strips. Multiple ESD devices may be connected in parallel to provide additional paths for shunting ESD current.
Patent TW-I289238-B (TW)
Title: Negative resist compositions using for electronic irradiation
Inventor: AOAI TOSHIAKI
IPC: G03F7/028
Filed: 2001-01-09
Granted: 2007-11-01
Abstract: To provide a solution of technical objects for increasing the micro-processing performance of semiconductor elements using electronic irradiation or X ray, and a negative chemical-amplified resist composition using for electronic irradiation or X ray with satisfied characteristics such as sensitivity, resolution and resist type corresponded to the use of electronic irradiation or X ray. The invention provides a negative chemical-amplified resist composition using for electronic irradiation or X ray, in which the compositions comprises a compound of generating acids and/or radical sources by irritation of electronic irradiation or X ray, an alkali-soluble resin, an acids-crosslinkable cross-linked agent and certain monomers.