baber/WOPTO huggingface dataset:
Patent TW-202243711-A (TW)
Title: Virtual object controlling method, device, computer apparatus, and storage medium
Inventor: WEI JIA-CHENG
IPC: A63F13/52
Filed: 2021-11-04
Abstract: Virtual object controlling method, device, computer apparatus, and storage medium, belong to a field of computer technologies. The method comprises: in response to a trigger operation of a first skill, controlling a first virtual object to move to a target location; in response to a trigger operation to a second skill during an effective duration of the first skill, searching based on the target location to obtain a virtual object; and under a condition of the first virtual object reaching the target location, controlling the first virtual object to unleash the second skill to the target virtual object. The above technical solution searches based on the target location indicated by the first skill such that the target actually attacked is consistent with a user's expected target to be attacked, which improves efficiency of human-computer interaction.
Patent TW-202221520-A (TW)
Title: Bus arbitration circuit and data transfer system including the same
Inventor: SHEN BIAO
IPC: H04L12/40
Filed: 2021-11-11
Abstract: A bus arbitration circuit in which a transmission speed of a bus does not decrease is provided. The bus arbitration circuit includes a first bus port, a second bus port, a first output circuit, a second output circuit, a control circuit, and a switch circuit. The first bus port is connected to a host bus. The second bus port is connected to a local bus. The first output circuit has an output port connected to the first bus port. The second output circuit has an output port connected to the second bus port. The control circuit includes a first input port, a second input port, a control signal output port, and an output port. Data of the first bus port is inputted to the first input port, data of the second bus port is inputted to the second input port, and data is outputted from the output port to an input port of the first output circuit. The switch circuit has an input port connected to the first bus port, a control port connected to the control signal output port of the control circuit, and an output port from which data of the host bus is outputted to an input port of the second output circuit.
Patent TW-202321879-A (TW)
Inventor: LIANG YING-HSIN
IPC: G06F3/033
Filed: 2021-11-24
Abstract: A system for giving an illustrative image of a recipe when a user makes a wrong action and a method thereof are provided. By analyzing real-time images to identify a user action and real objects, prompting a current step with augmented reality (AR) when determining the user action not matches the current step in operation steps according to the user action and the real objects, and marking the real objects associated with the current step with AR based on position of each of the real objects in the real-time images, the system and the method can prompt users when wrong action, and can achieve the effect of saving costs of money and time.
Patent TW-202228453-A (TW)
Title: Basis function based beam shape assistance for downlink angle of departure positioning
Inventor: YERRAMALLI SRINIVAS
IPC: H04W64/00
Filed: 2021-12-01
Abstract: Disclosed are techniques for wireless communication. In an aspect, a positioning entity receives a beam report from a network entity, the beam report including beam shape assistance information for one or more downlink transmit beams of a base station, the one or more downlink transmit beams corresponding to positioning reference signal resources to be measured by a user equipment (UE), the beam shape assistance information indicating at least one basis function representing a beam shape of each of the one or more downlink transmit beams or a quantization of a reduced portion of each of the one or more downlink transmit beams, and determines a location of the UE based at least on signal strength measurements of the positioning reference signal resources and the beam shape assistance information.
Patent TW-202324300-A (TW)
Title: 顯示面板檢測系統與方法
Inventor: LIN SZU-YEN
IPC: G06T7/30
Filed: 2021-12-14
Abstract: 本發明揭露了一種顯示面板檢測系統與方法，所述顯示面板檢測方法包含以下步驟。首先，提供測試影片，測試影片依序包含第一間隔圖樣以及第一測試圖樣，且第一間隔圖樣包含第一檢測資訊。接著，驅動待測顯示面板播放測試影片。接著，提供檢測設備拍攝待測顯示面板播放的測試影片。以及，由檢測設備依據第一間隔圖樣中的第一檢測資訊檢測待測顯示面板顯示的第一測試圖樣。
Patent TW-202326610-A (TW)
Title: 基於雙目測距之機械人控制方法，及其多機械人協作方法
Inventor: JUANG LI-HONG
IPC: G06T7/50
Filed: 2021-12-15
Abstract: 本發明係提供一種基於雙目測距之機械人控制方法，及其多機械人協作方法，其步驟包含：配置雲端以連線二影像擷取裝置，並取得影像擷取裝置之位置；令所述影像擷取裝置朝相異方向共同擷取一目標物之影像；將所述影像傳輸至該雲端；識別所述影像之輪廓值；依據所述影像擷取裝置之位置、所擷取該目標物影像及該輪廓值，以求得該目標物之座標；配置一機械裝置以連接至該雲端，且該雲端係依據該座標以界定一執行路徑；令該機械裝置執行該執行路徑。藉此，本發明係可透過雙目測距演算法以提高對於目標物識別之精度，並可透過雲端據以令相異之機械人間可依據影像擷取裝置鎖擷取之影像進行識別後予以協作，藉以提升機械人間之協調性並可相互合作，可廣泛應於工業、醫療等領域之產業，進而可有助於相關技術之發展者。
Patent TW-202318502-A (TW)
Title: 電漿蝕刻中的原位除阻塞
Inventor: Tan zhong-kui
IPC: H01L21/3065
Filed: 2021-12-16
Abstract: 在半導體處理中，對材料 (例如，碳或矽) 進行電漿蝕刻以形成垂直高深寬比凹陷特徵部可能會由於源自遮罩的阻塞材料 (例如，矽氧化物) 的非期望沉積而導致凹陷特徵部的內側阻塞。此問題係藉由進行除阻塞而解決，其中該除阻塞包括藉由將基板接觸鹵素源及有機溶劑及/或水的蒸汽而較佳地在同一處理腔室中蝕刻阻塞材料。可添加例如胺、雜環化合物或氟化氫根來源的添加劑以提高對於阻塞材料的蝕刻選擇性。在除阻塞步驟後，進一步續行電漿蝕刻。可依需求將除阻塞步驟及電漿蝕刻步驟重複進行數次，以蝕刻所欲深度的凹陷特徵部。
Patent TW-202326520-A (TW)
Inventor: HUANG WEN-HSIEN
IPC: G06K19/067
Filed: 2021-12-17
Abstract: 一種卡片結構，包括板體、晶片以及電力傳輸元件。板體包含第一板材、第二板材以及第三板材。第三板材位於第一板材與第二板材間，且第一板材、第二板材以及第三板材平行相疊連接；其中板體之材料包含第一材料，第一材料為碳酸鈣。晶片設置於板體內，電力傳輸元件設置於第三板材且與晶片電性連接。
Patent TW-202238736-A (TW)
Inventor: KIM CHEOL
IPC: H01L21/336
Filed: 2022-01-06
Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes a substrate, first and second active patterns, each including first and second side walls, a field insulation layer surrounding side walls of each of the first and second active patterns, a first dam between the first and second active patterns and having a lower surface lower than an upper surface of the field insulation layer, a second dam spaced apart from the first side wall of the first active pattern and having a lower surface lower than the upper surface of the field insulation layer, a first gate electrode on the first dam between the first and second active patterns, a second gate electrode spaced apart from the first gate electrode, and a first gate cut spaced apart from each of the first side walls of each of the first and second active patterns and intersecting each of the first and second gate electrodes.
Patent TW-202220049-A (TW)
Inventor: CHERIAN BENJAMIN
IPC: H01L21/304
Filed: 2017-11-21
Abstract: A method of processing a substrate includes subjecting a substrate to processing that modifies a thickness of an outer layer of the substrate, measuring a spectrum of light reflected from the substrate during processing, reducing the dimensionality of the measured spectrum to generate a plurality of component values, generating a characterizing value using an artificial neural network, and determining at least one of whether to halt processing of the substrate or an adjustment for a processing parameter based on the characterizing value. The artificial neural network has a plurality of input nodes to receive the plurality of component values, an output node to output the characterizing value, and a plurality of hidden nodes connecting the input nodes to the output node.
Patent TW-202326219-A (TW)
Inventor: JHANG JIA-SIN
IPC: G02B11/34
Filed: 2022-01-24
Abstract: 本發明提供一種光學成像鏡頭，其從物側至像側依序包括第一、第二、第三、第四、第五、第六、第七、第八透鏡。本發明透過控制透鏡表面的凹凸曲面排列，達到增加解析度、增大光圈與像高且同時維持良好成像品質的目的。
Patent TW-202303518-A (TW)
Title: Method of processing circuit, system comprising processing circuit and system comprising means for processing
Inventor: VADALI RAMA MYTHILI
IPC: G06T7/00
Filed: 2022-01-28
Abstract: A system and method for confidence aided upsampling of categorical maps. In some embodiments, the method includes: determining a category of a first pixel of an image, the first pixel having a plurality of neighboring pixels, each of the neighboring pixels having a category; and processing the image based on the determined category. The determining may include: calculating a confidence weighted metric for each of the neighboring pixels, the confidence weighted metric being based on a maximum confidence value among each of the neighboring pixels; and determining the category of the first pixel based on the confidence weighted metric of each of the neighboring pixels and based on the category of one of the neighboring pixels.
Patent TW-202235633-A (TW)
Inventor: Tang zhi-hui
IPC: C22C33/00
Filed: 2022-02-25
Abstract: The invention discloses a NdFeB magnet and preparation method. The NdFeB magnet includes main phase grain and shell, and Nd-rich phase adjacent to the main phase grain; the main phase grain comprises Nd2Fe14B; or, the main phase grain comprises Nd2Fe14B and Pr2Fe14B; the shell comprises (Nd/Dy)2Fe14B and/or (Nd/Tb)2Fe14B; the thickness of the shell is 0.1~6[mu]m; the Nd-rich phase includes R6Fe13B phase, the R is one or more of Nd, Pr, Dy and Tb. The method of the invention effectively reduces the diffusion of heavy rare earth elements into the main phase, forms a thinner heavy rare earth shell, and further optimizes and improves the high temperature performance of the magnet.
Patent TW-202242742-A (TW)
Title: Method and apparatus for attribute pre-modification of warehousing system
Inventor: Zhou hong-xia
IPC: G06Q10/08
Filed: 2022-04-18
Abstract: Embodiments of the present application provide a method and apparatus for attribute pre-modification of a warehousing system. The method includes: in response to an attribute pre-modification instruction and according to a material storage area mapping model, detecting whether a storage area attribute of a storage area matches a material attribute of a material in the storage area; if the storage area attribute of the storage area matches the material attribute of the material in the storage area, generating attribute modification confirmation information, where the attribute modification confirmation information indicates that the storage area attribute of the storage area or the material attribute of the material in the storage area are allowed to be modified. Before modifying the storage area attribute or the material attribute in a warehousing system, it is to first check, by the attribute pre-modification instruction, whether the storage area attribute matches the material attribute, so as to determine security and effectiveness of the attribute modification, and avoid a problem that the storage area attribute does not match the material attribute.
Patent TW-202247274-A (TW)
Title: Method of processing wafer
Inventor: KIM YOUNG-SUK
IPC: H01L21/304
Filed: 2022-05-17
Abstract: Energy is locally supplied to a cutting surface that is formed in an outer circumferential region of a wafer in a trimming step, before a grinding step of grinding the wafer. This can remove or repair at least part of a damage layer formed in the outer circumferential region of the wafer due to the trimming step. As a result, breakage of the wafer that originates from the outer circumferential region in the grinding of the wafer which has been subjected to the edge trimming and generation of dust in a step after this grinding can be suppressed.
Patent TW-202312133-A (TW)
Inventor: CHENG CHIH-YU
IPC: G09G3/34
Filed: 2022-05-25
Abstract: The present invention provides improved driving methods for four particle electrophoretic displays. The driving methods improve the color state performance when a first pixel is displaying a mixed state of a first highly-charged particle and a second lower-charged particle of the opposite polarity, while a neighboring pixel is displaying a state of a second highly-charged particle having the opposite polarity to the first highly-charged particle. The particles can be, for example, all reflective or one type of particle can be partially light transmissive.
Patent TW-202307152-A (TW)
Title: Coating composition and coating film
Inventor: YOSHIDA TSUTOMU
IPC: C09D5/33
Filed: 2022-05-30
Abstract: The present disclosure addresses the problem of providing a coating composition and a coating film which can increase near-infrared detection accuracy in LiDAR technology. Furthermore, the present disclosure addresses the problem of providing a coating composition and a coating film which preferably can increase near-infrared detection accuracy in LiDAR technology while having low brightness. The coating composition according to the present disclosure is for a detection object to be sensed with near-infrared radiation, the coating composition including a coating film-forming resin (A) and a color pigment (B). The color pigment (B) includes at least one selected from the group consisting of a white color pigment having a near-infrared reflectance rate of 60% or more, a chromatic color pigment having a near-infrared reflectance rate of 50% or more, and a black color pigment having a near-infrared reflectance rate of 30% or more, where the near-infrared reflectance rate is the reflectance rate in the wavelength region from 800 to 2,500 nm.
Patent TW-202320290-A (TW)
Inventor: LIN YU-SHENG
IPC: H01L25/065
Filed: 2022-06-27
Abstract: A package assembly includes a package substrate, a package lid located on the package substrate and including a plate portion, an outer foot extending from the plate portion, and an inner foot having a height greater than or equal to a height of the outer foot, extending from the plate portion and including a first inner foot corner portion located inside a first corner of the outer foot, and an adhesive that adheres the outer foot to the package substrate and adheres the inner foot to the package substrate.
Patent TW-202303973-A (TW)
Inventor: LIN TA-CHUN
IPC: H01L29/43
Filed: 2022-07-01
Abstract: 根據本揭露，凹蝕位於兩個不同的磊晶源極/汲極部件之間的混合鰭片以防止導電材料進入混合鰭片的內部空氣隙，因此，防止源極/汲極接觸件與閘極電極之間的短路。凹蝕混合鰭片可以藉由在半導體鰭片回蝕期間擴大遮罩來達到，因此，不會增加生產成本。
Patent TW-202311044-A (TW)
Title: Optical film and display device
Inventor: FUTAMATA Kai
IPC: B32B7/023
Filed: 2022-07-07
Abstract: This optical film is provided with: a transparent base material; at least one colored layer that includes dye and is formed on the transparent base material; and at least one functional layer that is disposed on the opposite side to the transparent base material with the colored layer therebetween. The colored layer includes: a first color material in which the maximum absorption wavelength is in a range of 470-530 nm and the half-value width of an absorption spectrum is 15-45 nm; and a second color material in which the maximum absorption wavelength is in a range of 560-620 nm and the half-value width of an absorption spectrum is 15-55 nm. The functional layer and/or the colored layer includes a black organic pigment. The functional layer has an ultraviolet ray shielding rate of 85% or higher as a whole. The pencil hardness, at a load of 500 g, of the surface on the side where the functional layer is provided is H or higher. Values a* and b* of the hue of the optical film are each in a range of -5 to +5.
Patent TW-202321311-A (TW)
Title: Antibody binding to linker of scFv or like
Inventor: TAMADA KOJI
IPC: C07K16/42
Filed: 2022-08-01
Abstract: The present invention provides an antibody that binds to a linker in a novel binding manner. More specifically, the present invention provides: an antibody that binds to a linking part between a first region and a linker in an scFv structure; and an antibody that binds to a linking part between the linker and a second region.
Patent TW-202328151-A (TW)
Title: 經取代之2,3-二氫[1,3]噻唑并[4,5-b]吡啶、其鹽及其作為除草活性物質之用途
Inventor: FRACKENPOHL JENS
IPC: C07D513/04
Filed: 2022-08-17
Abstract: 本發明係關於通式(I)之經取代之2,3-二氫[1,3]噻唑并[4,5-b]吡啶或其鹽，
         其中該通式(I)中之基團對應於說明書中所給出之定義；且係關於其作為除草劑尤其用於控制有用植物作物中之禾本科雜草及/或闊葉雜草及/或作為植物生長調節劑用於影響有用植物作物之生長之用途。
Patent TW-202322617-A (TW)
Title: Image sensor, image processing system having the same, and operating method of the same
Inventor: KOO SI-GYOUNG
IPC: G06F21/60
Filed: 2022-08-23
Abstract: An image sensor includes a non-volatile memory (NVM) storing an encoded private key and partial information of a private key, using first random numbers generated by repeating a first random number generation operation using the partial information of the private key, and a security circuit that performs a decryption operation on a cipher text received from a controller. The security circuit includes a self-recursive decoder that receives the encoded private key from the NVM during the decryption operation, repeats a second random number generation operation using the partial information of the private key to generate second random numbers, and uses the second random numbers to restore the encoded private key to the private key, and a crypto module that uses the restored private key to decrypt the cipher text.
Patent TW-202326903-A (TW)
Title: Base, manufacturing method of base, and plasma processing equipment capable of improving the heating uniformity of the substrate
Inventor: Zhang hai-long
IPC: H01L21/67
Filed: 2022-09-23
Abstract: The invention discloses a base, a manufacturing method of the base, and plasma processing equipment. The base comprises: a base disc having a substrate placing surface on which a substrate to be processed is placed; a heating assembly disposed inside the base disc to heat the substrate to be processed; a cooling assembly disposed inside the base disc and below the heating assembly to cool the substrate to be processed; and a base shaft disposed at the center of the base disc to support the base disc, wherein the base disc and the base shaft are formed by integral casting of the first metal. The invention improves the heating uniformity of the substrate.
Patent TW-202324688-A (TW)
Inventor: SAKUI KOJI
IPC: H01L27/105
Filed: 2022-10-06
Abstract: A memory device of the present invention is provided with a page composed of a plurality of memory cells arranged in a row on a substrate, and performs a data writing operation and a page erasing operation. The data writing operation controls voltages applied to a first gate conductor layer, a second gate conductor layer, a first impurity layer and a second impurity layer of each memory cell contained in the page to hold a group of electric holes formed by impact ionization phenomenon inside a channel semiconductor layer; and the page erasing operation controls voltages applied to the first gate conductor layer, the second gate conductor layer, the third gate conductor layer, the fourth gate conductor layer, the first impurity layer and the second impurity layer to remove the group of electric holes from the inside of the channel semiconductor layer. In the memory cell, the first impurity layer is connected to a source line, the second impurity layer is connected to a bit line, one of the first gate conductor layer and the second gate conductor layer is connected to a word line, and the other of the first gate conductor layer and the second gate conductor layer is connected to a drive control line. The bit line is connected to a sensor amplifier circuit. The memory device has a refresh operation, which selects at least one of the word lines and controls the voltages applied to the selected word line, the drive control line, the source line and the bit line, so as to form the group of electric holes by the impact ionization phenomenon inside the channel semiconductor layer of the memory cell where the voltage of the channel semiconductor layer has been set to a first data retention voltage by the page writing operation; whereby the voltage of the channel 
semiconductor layer of the selected word line is returned to the first data retention voltage, while in a page read-out operation, the page data of a group of the memory cells selected by the word line is read-out to the sensor amplifier circuit, and the refresh operation is performed at least once before the page read-out operation.
Patent TW-202331128-A (TW)
Inventor: ARISATO AKIRA
IPC: F16K15/18
Filed: 2022-10-11
Abstract: Provided is a check valve device having a structure with which a pressurized fluid is less likely to leak from a flowpath blocked by a valve. A flowpath 2 is formed in a block 1, and a main valve 3 and a sub-valve 4 are provided in series at a point along the flowpath 2. A primary-side chamber 5, an intermediate chamber 7, and a secondary-side chamber 6, which form a section of the flowpath 2, are formed in that order from the one end of the flowpath 2 to the other end thereof. The main valve 3 and the sub-valve 4 are opened by a pilot valve 60.
Patent TW-202329608-A (TW)
Title: Hybrid phase-interpolator
Inventor: FOLEY DAVID
IPC: H03B21/01
Filed: 2022-10-19
Abstract: A phase interpolator with a DAC outputting a first and second value responsive to a control code. A first current mirror generates a first current proportional to the first value. A second current mirror generates a second current proportional to the second value. A first FET pair comprising a first and second FET such that the source terminals of the first FET and the second FET are electrically connected and connect to the first current mirror. A second FET pair comprising a third and fourth FET such that the source terminals of the third FET and the fourth FET are electrically connected and connect to the second current mirror. A first terminal outputs a phase adjusted clock signal as compared to the clock signal, from the first FET and the third FET. A second terminal outputs an inverted phase adjusted clock signal, from the second FET and the fourth FET.
Patent TW-202334425-A (TW)
Title: 一種ｄｓｒｎａ、其製備方法及應用
Inventor: LI YUN-FEI
IPC: C12N15/113
Filed: 2022-12-16
Abstract: 本揭露揭示了一種dsRNA、其製備方法及應用。本揭露還關於包含該dsRNA的醫藥組成物、細胞或試劑盒。本揭露的dsRNA可以干擾HBV基因的表達，預防和/或治療相關疾病。
Patent TW-202333328-A (TW)
Title: Semiconductor package assembly
Inventor: SYU SHIH-YI
IPC: H01L23/488
Filed: 2023-02-07
Abstract: A semiconductor package assembly is provided. The semiconductor package assembly includes a fan-out package and a memory package stacked on the fan-out package. The fan-out package includes a first redistribution layer (RDL) structure, a first logic die, through via (TV) interconnects, and first conductive structures. The first logic die and the first conductive structures are in contact with the first RDL structure. The TV interconnects are electrically connected to the first RDL structure. The memory package includes a first substrate, a memory die, and second conductive structures. The memory die and the second conductive structures are disposed on the first substrate. The memory die is electrically connected to the first logic die using the TV interconnects and the first RDL structure. The semiconductor package assembly further includes a second substrate electrically connected to the first logic die using the first conductive structures.
Patent UA-38202-A (UA)
Title: Горілка особлива
Filed: 2000-06-06
Abstract: Горілка особлива містить ароматизатор "Bread Flavour", цукор та водно-спиртову рідину. Органолептичні властивості горілки: відсутність характерного для міцних алкогольних напоїв гіркого присмаку, аромат горілчаний з легким ароматом житнього хліба.
Patent UA-38387-A (UA)
Title: tightening frame
Filed: 2000-06-27
Abstract: The invention relates to components for sealing coke furnaces. A tightening frame has tightening rib from the side of mirror of anchor frame, membrane, plate with thickening on inner edge. The tightening rib is made perpendicular to the plate and connected with it by radial elastic and plastic membrane.