baber/WOPTO huggingface dataset:
Patent JP-S59151258-A (JP)
Title: Picture processing device
Inventor: HIRATA TAKAO
IPC: G06T1/60
Filed: 1983-02-18
Abstract: PURPOSE:To automate conversion from coordinate to address performed in a processor and increase speed of picture processing by providing a device that converts coordinates X, Y to memory address between a processor and a picture memory. CONSTITUTION:When X, Y coordinates are given from the processor 3 to access a picture memory 2, a selector 8 sends lower m-bits to an adder as X basing on maximum number of bits (m) given from a register 10. Above-mentioned bits is sent to a multiplier as Y. The multiplier multiplies Xs and Y given from a size register 11 and sends the result (YXXs) to the adder. The adder adds Ao and X from an address register 9 and (YXXs) and outputs the result (Ao+X)+ (YXXs) as address of the picture memory 2. Thus, by converting from coordinates X, Y to corresponding address of the memory 2. The picture memory 2 can be directly accessed from the processor 3 by X, Y coordinates. Ao is address of picture memory corresponding to coordinate (O, O) and Xs is the size of the picture in the direction of X axis.
Patent JP-H05225220-A (JP)
Title: Cash processor
Inventor: OKAZAKI TOSHIO
Filed: 1992-02-13
Abstract: PURPOSE:To provide a cash processor which enables simple and sure data processings. CONSTITUTION:In the cash processor composed of a control part composed of a program memory for storing a control program, a processor for decoding the program in the program memory to execute it, a data structure memory to store the structure of data and data memory 8 for storing processed data, operation part connected to this control part and provided with an input/output part required for control, and counter connected through an interface to the control part for counting cash such as paper moneys or coins, a data structure definition table 61 is constructed according to data structure decided in advance so as to hold the structure and attribute of data, and the data are processed by a coded subscript 60.
Patent JP-S58143606-A (JP)
Title: Frequency multiplying circuit
Inventor: HOSHINO TAKEHIKO
IPC: H03B19/00
Filed: 1982-02-19
Abstract: PURPOSE:To mulitply the frequency, by writing an input signal to two analog delay lines having feedback circuits with the switching action of a switch circuit and then reading out the input signal at a reading speed different from the writing speed. CONSTITUTION:Analog delay lines 1 and 2 are driven by clock pulses CP2 and CP3. Switch circuits 3 and 4 switch a common contact S1 connected to the input side of the lines 1 and 2 respectively and alternately between contacts S2 and S3. A feedback circuit 5 contains the contacts S1 and S2 in series is provided to the lines 1 and 2 respectively. A switch circuit 7 is driven by a clock pulse CP1 with interlocking to the circuits 3 and 4. When either one of lines 1 and 2 is set in a writing mode, the other side is set in a reading mode. An analog signal having an optical waveform and freuquency is fed to an input terminal (a) to be written with a clock frequency f1 and to be read out with a clock frequency f2. Therefore it is possible to deliver the input signal to an output terminal (b) after a multiplication of frequency by f2/f1.
Patent JP-H09216160-A (JP)
Title: Polishing device for thin plate type substrate
Inventor: SATO HIROSHI
IPC: B24B37/00
Filed: 1996-02-13
Abstract: PROBLEM TO BE SOLVED: To uniformly polish a polished face in polishing of a semiconductor wafer. SOLUTION: In a polishing device 1A, a polishing liquid supply groove 21c connected to a through hole 22 is formed in a polishing pad fixing face in a pad holder 20A in which the through hole 22 is bored in the center part. On the polishing pad fixing face, a polishing pad 30A in which a plurality of polishing liquid discharge ports are bored is installed and fixed so as to be positioned on the polishing liquid supply groove 21c line. Polishing can be carried out while polishing liquid L is supplied from the polishing liquid discharge ports 32 onto the whole polished surface Sa of a semiconductor wafer S via the polishing liquid supply groove 21c.
Patent JP-S58143633-A (JP)
Title: Frequency offset circuit
Inventor: OGAWA NOBUO
IPC: H03J1/04
Filed: 1982-02-19
Abstract: PURPOSE:To control simultaneously both control and display of the operating frequency, by having addition and subtraction between the frequency data and performing the offset frequency data and controlling and displaying the frequency. CONSTITUTION:When an offset selector 7 is not actuated with switches 13 and 14 set at a through position, respectively, the frequency data which is fed to a frequency register 11 from a tuner 1 is applied to a PLL oscillator 2 and a frequency display 3 via the register 11 to set and display the receiving frequency. Then the selector 7 is actuated with a receiving operation, counters 16 and 8 count the clocks of an operator 17. A comparator 20 applies the signal to the operator 17 when coincidence is obtained between the analog value obtained by giving a D/A conversion to the output of the counter 8 through a circuit 9 and the output value of an offset controller 5. Thus the operator 17 stops and holds the operations of counters 16 and 8. Then addition/subtraction is carried out between the value of the counter 16 and the data of the register 11 through an offset adder/subtractor 15. This added/subtracted value of the counter 16 is fed to both the oscillator 2 and the display 3.
Patent JP-S54118125-A (JP)
Title: Forecasting reconstruction method for high-resolution picture image
Inventor: EJIRI KOUICHI
IPC: H04N1/417
Filed: 1978-03-07
Abstract: PURPOSE: To obtain a reception picture of a high resolution by forecasting the information of the output picture element based on the sampled picture information and then transmitting the shift from the forecasting algorism or from the average forecasting algorism.  
     CONSTITUTION: The output picture element forescasted by the sampling picture element set as S (k, l) is set as On. The picture information is read out via the image sensor and then modulated through the encoding circuit to be transmitted after shaping the signal. The original sampling picture element information S (i, j) is reconstructed via the signal circuit at the receiver side, and the linear forecasting coefficient is obtained through the forecasting reconstruction circuit to decide output picture element Oi and j based on the linear forecasting method. This linear forecasting algorism can be varied according to the types of patterns to be transmitted, and thus the reconstructed picture image can be obtained in the picture quality according to the patterns to be transmitted. Thus, the sampling error can be reduced. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H01201963-A (JP)
Title: Manufacture of semiconductor device
Inventor: UEDA SEIJI
IPC: H01L21/336
Filed: 1988-02-08
Abstract: PURPOSE:To make it possible to form a high-density impurity layer on a substrate at the same time with exposure of a low-density impurity under an L- shaped insulating film by a one-time ion implantation, by forming the L-shaped insulating film on side walls of a gate electrode and by injecting a source-drain formation impurity by ion implantation. CONSTITUTION:On the main surface of a P-type silicon substrate 1, a silicon dioxide film 2 and a channel stopper 3 are formed, constituting a separation area. Then, patterns of a gate oxide film 4 and a polycrystalline silicon electrode 5 are formed by anisotropic etching. After that, a PSG film 6 and a silicon dioxide film 7 are piled up to form side walls of a transistor. Nextly, the PSG film 6 and the silicon dioxide film 7 are etched by anisotropic etching to form side walls 8. Then, the PSG film 6 is selectively removed by dilute fluoric acid etching. At this time, the silicon dioxide film 7 remains on side walls of the electrode in the shape of L. Using this as a mask, an N-diffusion layer 9 and an N<+> diffusion layer 10 are formed simultaneously by ion implantation of arsenic. At the same time, a side wall oxide film 7b is formed on side walls of the electrode. At last, a layer-to-layer insulating film 11 and an aluminum electrode 12 are formed.
Patent JP-S62186124-A (JP)
Title: Ignition file for lighter
Inventor: YONEDA YUSHIN
IPC: F23Q2/46
Filed: 1986-02-10
Abstract: PURPOSE:To get an inexpensive ignition file by a method wherein clay body containing molten glass substance, iron metallic substance and super-hard metallic substance is formed and sintered. CONSTITUTION:Molten glass substance, iron metalic substance and super-hard metallic substance such as titanium or the like are included in form groove 1a, 1b and 1c of a form 1, heated to melt the glass substance and iron substance or the like, and then the semi-hardened clay body is put into both substances, the body is pressed with the upper and lower forms 1' and 1' to make a file molded product, then the upper and lower forms 1' and 1' are slightly spaced apart, blade rods 3 are pushed from the form grooves 1a with a certain clear ance being left against the molded product and a pushing ring 5 is operated. In case that the blade rods 3 are pierced into the clay body surface of the product, projections 2a' are formed on the clay body surface to constitute a file surface. Then, the blade rods 3 are pulled out of the clay body, deformed to complete a ignition file 2. Since some steps such as ring cutting, forming, burr removing, hole forming and fixing of a setting shaft or the like can be eliminated, machining cost can be reduced.
Patent JP-S54117954-A (JP)
Title: Production of sheathed heater
Inventor: ITOU HIROMICHI
IPC: H05B3/48
Filed: 1978-03-07
Abstract: PURPOSE: In a seathed heater comprising a metal pipe the ends of which are sealed by a port-sealing material, to enhance the insurance of the port sealing and to facilitate the welding between terminals and lead sires.  
     CONSTITUTION: A heating coil 2 is inserted in a metal pipe 1 and an insulator 4 such as magnesium oxide is filled in the space therebetween. Keeping this state, the diameter of the pipe 1 is reduced by rolling. Then electric current is fed to the pipe 1 to anneal anly the pipe 1 by Joule heat. In this case, the voltage of an AC source 6 is fed to an adjuster 8 through a fuse 7, and the output voltage is applied to the primary coil 11 of a transformer 10 through a timer 9 so as to generate a secondary voltage in the secondary coil 12. A clamp means 13 is connected with the secondary coil 12 and nips the portions near ends of the pipe 1. The end ports of the pipe 1 is sealed by a port-sealing material to complete a sheathed heater. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-S52110367-A (JP)
Title: Lock washer
Inventor: KIKUCHI SADAO
IPC: F16B43/00
Filed: 1976-03-12
Abstract: PURPOSE: To tighten a fastening nut without causing the deviation of a lock washer from its proper position, and to prevent the slack of the nut; which are achieved by arranging a turular guide member around th hole of the washer, vertically to the base plate of the washer. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-H05195814-A (JP)
Title: Exciter for gas turbine
Inventor: HAGIWARA YOJI
IPC: F02C7/266
Filed: 1992-01-17
Abstract: PURPOSE:To prevent secular change of an exciter for a gas turbine and also change discharge starting voltage corresponding to change in the temperature of the gas turbine. CONSTITUTION:Direct current outputted from a direct current power supplier 1 is converted into alternating current by an oscillating circuit 2, and raised in its pressure by a first step-up transformer Tr1, and also rectified by a rectifier D3 so as to accumulate electric charge in a capacitor C0. When voltage of the capacitor C0 attains a prescribed voltage value, a thyristor Th is electrically conducted in a discharge starting voltage control circuit 3, and electric charge accumulated in the capacitor C0 is boosted via a second step-up transformer Tr2, so as to generate spark in an ignitor IGN owing to electric discharge. When the temperature of a gas turbine is raised, discharge energy in the ignitor IGN is suppressed to a low level by a semiconductor D4, and an unijunction transistor UT, or resistance circuit elements R3, R4, having negative temperature characteristics.
Patent JP-S61187355-A (JP)
Title: Semiconductor capacitor
Inventor: SUNAMI HIDEO
IPC: H01L27/04
Filed: 1985-02-15
Abstract: PURPOSE:To realize a capacitor free of voltage-withstanding capability degradation and capable of long-standing reliability by a method wherein an insulating film with an opening is provided on a semiconductor substrate and serves as a mask in a dry- etching process whereby an groove is provided, an epitaxial layer is grown on the groove bottom and side wall to reach as far as the substrate surface, and, on the epitaxial layer, a capacitor electrode is installed with an intermediary of another insulating film. CONSTITUTION:On an Si substrate 1, a glass film with its main component SiO2 or synthetic resin is formed to serve as a mask 2 provided with an opening. Directional dry etching is accomplished by using the plasma of a gas based on F or Cl for the provision of a groove 11. A process follows wherein the inner wall of the groove 11 is subjected to etching that is accomplished only lightly, an epitaxial layer is grown, by using SiH4 or the like, to extend from the bottom of the groove 11 to its side wall to the surface of the Si substrate 1. The epitaxial layer develops into an epitaxial layer 3 with its surface very flat, flattening the inner wall with its surface rugged with protrusions and pits. After this, on the epitaxial layer 3 through the intermediary of an insulating film 4 consisting of SiO2, Si3N4, or the like a capacitor electrode 5 is built by deposition of polycrystalline Si.
Patent JP-S58142582-A (JP)
Title: Amorphous silicon hydride photo conductive film
Inventor: TAKEDA YOSHIYA
IPC: H01L31/0248
Filed: 1982-02-19
Abstract: PURPOSE:To obtain a photo conductive film having excellent photo conductive characteristic having less pin holes by keeping amount of hydrogen included in the amorphous silicon hydride in the side of substrate less than that in the amorphous silicon hydride formed thereon. CONSTITUTION:A photo conductive film 33 in comparatively less amount of hydrogen concentration is formed on a transparent electrode 32 of a glass substrate 31. A photo conductive film 34 in comparatively high hydrogen concentration is formed thereon. A photo conductive film having excellent photo conductive characteristic with less pin holes can be obtained, as explained above, by forming precedingly an amorphous silicon film in such a hydrogen concentration as not generating pin holes and thereafter forming amorphous silicon film in the desired hydrogen concentration.
Patent JP-H09218283-A (JP)
Title: Reserve recording apparatus
Inventor: KAWAMURA TOSHIYUKI
IPC: H04N5/76
Filed: 1996-02-14
Abstract: PROBLEM TO BE SOLVED: To easily and reliably make a shift and automatically cancel the shift by shifting a reserved time slot up to a desired time amount by a shifting part and canceling a set shift of the reserved time slot by a shift canceling part when set time is reached. SOLUTION: A reserve-record setting part 10 is for setting a reserved time slot, wherein reservation information is stored in a memory 6 based on a reservation signal S1 from an input part 2. The input part 2 is equipped with a shift key 20 and a shift cancel key 21. The shift key 20 is a key for inputting a shift time amount, wherein each time it is pressed a shift signal S2 indicating a shift time amount of 5 minutes for example and a set program No. is input to a CPU 4. On the other hand, the shift cancel key 21 inputs a cancel signal S3 indicating cancel time. A shift part 11 stores the shift time amount in the memory 6 based on the signal S2. The shift cancel part 12 cancels the shift at time indicated by the cancel signal S3.
Patent JP-H03230230-A (JP)
Title: Internal abnormality detection system
Inventor: YAMAZAKI NOBORU
IPC: G06F12/16
Filed: 1990-02-06
Abstract: PURPOSE:To decide an abnormal position and to handle internal abnormality speedily by putting respective internal fault registers in simultaneous operation in response to an actuation signal to one of banks. CONSTITUTION:This system is equipped with internal fault registers 15 and 16 having internal fault flags ERF-A and ERF-B which input the outputs of parity check circuits 12 and 14 for detecting parity errors of address buses 4A-4C and also input respective actuation signals 0 - 4 for actuating banks 7 - 10. When one of the actuation signals 0 - 3 actuates one of banks 7 - 10 connected to address buses 4A-4C provided in respective LSIs 5 and 6, the internal fault registers 15, 16 operate at the same time. It is therefore decided whether or not there is an internal fault of the LSI 5, an internal fault of the LSI 6, or a fault on a printed board 2 from the ON/OFF states of the internal fault flags ERF-A and ERF-B of the internal fault registers 15 and 16. Conse quently, an internal fault is handled speedily.
Patent JP-H09218773-A (JP)
Title: System for displaying multimedia information into high dimension
Inventor: OZAWA HIDEAKI
IPC: G06F3/0484
Filed: 1996-02-14
Abstract: PROBLEM TO BE SOLVED: To express multidimensional information on a plane display based on the description of logic structure mentioned in multimedia information and to improve the list ability of whole information. SOLUTION: The description of logic structure in multimedia information is identified in a structure text analysis part 12 and is converted into internal structure in an information structure decision part 15. Content information on multimedia information are arranged in an area which is set in accordance with logic structure on pages that are previously designated for plural pages if information are massive. A display structure selection part 16 analyzes description where the multidimensional display of a claw header in logic structure is executed and makes a page where information for executing the display of claw header exists correspond to one of the pages on content information.  A book information interface part 18 calculates/displays the thickness of a book on the periphery of content information to be transmitted in accordance with a reference page and display an element by which the user of the claw header can survey the structure of information on the position on thickness of the existing page.
Patent JP-H09219960-A (JP)
Title: Common magnetic-pole-circuit type rotating machine having plurality of rotors
Inventor: TAII HAA YAN
IPC: H02K16/00
Filed: 1996-02-14
Abstract: PROBLEM TO BE SOLVED: To operate respective motor units independently or co-operatingly by providing the same characteristic or the different characteristics on the respective motor units, and by making it possible to arrange the magnetic fields or the rotor coils of the respective motor units in series, or in parallel or in series/parallel. SOLUTION: The respective rotary shafts of rotors 801-804 of a motor are connected in series, and the concatenated operation, or the separate independent operation, or the partial independent operation in the partially series-connected pattern of the rotary shafts is performed. Magnetic-pole circuit cores 811 and 812 have a pair of magnetic poles and magnet transmission circuits. A pair of blocked magnetic-field circuits are constituted for the working faces of the rotors 802 and 803. The other pair of magnetic-pole circuits 813 and 814 have the other magnetic poles and electromagnetic circuits, and two pairs of the electromagnetic circuits are vertically intersected and arranged.  The magnetic poles of the respective motor units are not connected by the electromagnetic circuits, and the number of the respective magnetic-field circuits correspond to the number of the electrodes of the rotors and the number of the rotors.
Patent JP-H01202360-A (JP)
Title: Ladle
Inventor: KAWASHIMA KAZUTOSHI
IPC: B22D41/50
Filed: 1988-02-08
Abstract: PURPOSE:To enable a smooth charging work without any energy loss and causing no nozzle clogging by fitting a casting nozzle, the nozzle for charging having larger diameter than that and the opening and closing mechanism of the nozzle for charging to the bottom of a ladle. CONSTITUTION:In case of charging the molten steel 4 of the ladle 1 inside to the other ladle, it is discharged to the other ladle through a charging nozzle 2 by using an opening and closing mechanism 2a by making a casting nozzle 3 in a closed state. The molten steel 4 of the ladle 1 inside can thus be discharged at the speed of about 4-16 times the casting nozzle 3. The remaining molten steel is thus discharged to the other following ladle by closing the mechanism 2a after discharging the molten steel in specified amt. from the ladle 1. At this time, the molten steel infiltrated to the nozzle 2 is large at its nozzle diameter and short at its opening and closing time, hence it is not solidified.
Patent JP-H09219622-A (JP)
Title: Voltage controlled oscillator
Inventor: TAMAKOSHI OSAMU
IPC: H03B5/18
Filed: 1996-02-14
Abstract: PROBLEM TO BE SOLVED: To make an oscillator small by making an oscillating frequency match a resonance frequency of a series parallel circuit so as to prevent leakage of an oscillated signal and parasitic oscillation and by keeping the impedance high so as to reduce the inductance and to make the size of the coil small. SOLUTION: A resistor R20 is connected in series to a parallel resonance circuit consisting of a capacitor C20 and an inductance L20 to form a series parallel circuit 20 in the voltage controlled oscillator and the circuit 20 is inserted between a power supply voltage terminal 7 and an oscillation circuit 1 for a high frequency cut circuit. In this case, the capacitance and the inductance of the C20, L20 are selected so that the resonance frequency fo of the series parallel circuit 20 matches the oscillated frequency of the oscillation circuit 1. Thus, the leakage of the signal toward the voltage terminal 7 is prevented to suppress parasitic oscillation. Furthermore, through the connection of the resistor R20, a high impedance is kept over a broad frequency band and the voltage controlled oscillator copes with a frequency change by a control voltage, a high impedance is obtained with a small inductance so as to make the coil small in size.
Patent JP-H03231107-A (JP)
Title: Linear position sensor
Inventor: SHIMOMURA EIJI
IPC: G01B17/00
Filed: 1990-02-06
Abstract: PURPOSE:To detect the position of a movable body precisely by providing a constitution wherein a voltage is induced with a magnetic elastic wave which is generated in a magnetic body in correspondence with the moving position of the movable body in a detecting means provided in the movable body, and the voltage is compared with an exciting current. CONSTITUTION:The current having the exciting frequency is applied to exciting coils 14 and 15 from an AC power supply 16. Then, magnetic elastic waves are generated in a magnetic body 13. The phases of the elastic waves are inverted to each other. When the oscillating state of the magnetic body 13 obtained by synthesizing the elastic waves is compared with the exciting current, the relationship between the phases and the amplitude is shown as the characteristic in the figure. Namely, the amplitudes of the elastic waves generated in the respective coils 14 and 15 approach zero as the distance is increased, and its change becomes less. The amplitude can be forcibly made to be zero by the interference at the intermediate point. Therefore, the change in amplitude with respect to the distance can be made large.