baber/WOPTO huggingface dataset:
Patent TW-523590-B (TW)
Title: Test head actuation system with positioning and compliant modes
Inventor: BOSY BRIAN J
IPC: G01R31/28
Filed: 2001-11-06
Granted: 2003-03-11
Abstract: A system for positioning a test head for compliantly docking the test head with a prober, handler, or other peripheral for automatically testing electronic components. The system includes a plurality of backdrivable linear actuators. Each actuator has a first end mechanically coupled to the test head and a second end mechanically coupled to a support for holding the test head, for example, a manipulator. In a first mode, a control system applies inputs to the actuators for variably extending the actuators to establish a desired position of the test head relative to the support. The desired position is generally a centered position of the test head within a compliance range; however, it may also be a non-centered position that tends to align the test head with the peripheral. In a second mode, the control system stops varying the input to the actuator. The actuator tends to maintain its position, but complies with external forces applied to the test head. In the second mode, the actuators can be driven in compliance with external forces both forward and backward, and provide only slight resistance to movement in both directions. The disclosed system for positioning a test head is particularly useful for providing compliant docking with extremely heavy test heads.
Patent TW-589627-B (TW)
Title: Optical recording medium
Inventor: KURIBAYASHI ISAMU
IPC: G11B7/26
Filed: 2001-11-27
Granted: 2004-06-01
Abstract: To provide a phase-change type optical recording medium which can be used as a write-once type and on which high density recording can be performed. The optical recording medium having a phase-change type recording layer where recording is performed so that the shortest recording mark is formed which has a length less than or equal to 0.4 lambda/NA when the wavelength of recording light and the numerical aperture of the object lens of a recording optical system are expressed by lambda and NA, respectively, and a circular or an oval shape and consisting of a DRAW type medium wherein recording information can not be erased or rewritten in the used minimum linear velocity.
Patent TW-554101-B (TW)
Title: Water jet device of water jet loom
Inventor: SHIMIZU KAZUYA
IPC: D03D47/32
Filed: 2001-11-29
Granted: 2003-09-21
Abstract: The present invention is to provide a water jet device which does not reduce quality of a textile and makes a water jet loom higher speed. A pump shell (12) of a constituent loop pump (29) is screwed with a cylinder (30). The cylinder (30) can slidably receive a piston (32). The piston (32) is combined with and mounted in plunger (14). A compression chamber (35) is formed between inner circumferential surface of the cylinder (30) and outer circumferential surface of he piston (32) and between the cylinder (30) and sealing rings (33, 34) which are mounted on the cylinder (32). An air pressure source is connected to the compression chamber (35) through air pipe (37).
Patent TW-I221184-B (TW)
Title: Method for operating a refuse incineration plant
Inventor: SCHIRMER ALFONS
IPC: F23G5/50
Filed: 2001-12-05
Granted: 2004-09-21
Abstract: The invention relates to a method for operating a refuse incineration plant and to a regulating system, in which, after the fire has been fanned, the generation of heat is made more uniform by regulating at least one of the operating parameters refuse metering, residence time on a grate, quantitative supply of primary air and quantitative preheating of primary air. To match the operating parameters to a varying calorific value of the refuse, the calorific value of the refuse is recorded as well as the standard regulating variables and is used to adapt the regulating means. The measure used for the calorific value is, for example, the moisture content of the flue gas generated during the incineration. Consequently, there is no need for the operator to estimate the calorific value and manually adapt the operating parameters accordingly.
Patent TW-559738-B (TW)
Title: Color-designating server, color-designating receiving/ordering system, color-designating method, color-designating receiving/ordering method, and recording medium
Inventor: UCHIMI HIDEKI
IPC: G06Q10/00
Filed: 2001-12-25
Granted: 2003-11-01
Abstract: Disclosed are a color-designating server which can display a screen for designating color at a user terminal, which can be connected to a network, a color-designating method, and a recording medium. A matchable color database stores data required for determining matchable colors in a color-designating server which displays a screen for designating color at a user terminal. A conditions-designating processor transmits a conditions-designating screen for designating conditions data, required for determining the matchable colors, to the user terminal. A color data transmission processor determines colors which can be matched under the conditions specified by the conditions data, designated in the conditions-designating screen, by consulting the matchable color database, and transmits the result to the user terminal.
Patent TW-531955-B (TW)
Title: Power amplifier module
Inventor: YAMASHITA KIICHI
IPC: H03F3/189
Filed: 2002-01-16
Granted: 2003-05-11
Abstract: A power amplifier module is disclosed in the present invention. In a bias circuit, there are disposed detecting circuits for the variations of ambient temperature and control voltage, and an error amplification circuit for commonly amplifying the variation part detected respectively by the detecting circuits, so as to make the current variation part of the control current, which is varied in accordance with the change of temperature or the control voltage, flow through the error amplifier and offset the variation part of the control current such that a stable idle current is supplied to the power amplifier. In addition to the function of temperature detection, the temperature detecting circuit has the function of the standard voltage source varied with the control voltage. Besides the function of detecting the control voltage, the control voltage detecting circuit has the function of standard voltage source varied with the temperature so as to act for each variation by mutually forming the detecting circuit or the standard voltage source.
Patent TW-583287-B (TW)
Title: Pigment-based inkjet ink composition with decreased feathering
Inventor: SHEN YU-CHANG
IPC: C09D11/00
Filed: 2002-01-23
Granted: 2004-04-11
Abstract: A pigment-based ink composition for inkjet printing. The ink composition includes at least one dispersive pigment, an aqueous solution medium, and a 2-pyrrolidone compound. The ink composition of the present invention effectively controls the line width of printed images, decreases feathering, and enhances printing quality when used in inkjet printing.
Patent TW-528881-B (TW)
Title: Position measuring apparatus
Inventor: TOMINAGA TAMOTSU
IPC: H01L21/68
Filed: 2002-01-25
Granted: 2003-04-21
Abstract: A position measuring apparatus for an alignment of an array of devices such as a thin film magnetic heads on a semiconductor wafer with a high degree of accuracy and satisfactory reproducibility, comprising, on a base, an object holding unit on which an object to be measured, an X-stage, a portal sub-base arranged across over the X-stage, a Y-stage arranged on the portal sub-base, a TV microscope (detector) capable of movement in a Z-axial direction, a ball circulation type linear guide and a motor for driving and guiding the X-stage and the Y-stage, an X-axial straight bar and a Y-axial straight bar attached to side surfaces of the object holding unit, and triangulation type laser displacement meters arranged in the vicinity of and in opposite to the X-axial bar and Y-axial bar, for detecting lateral motion errors during straight movement of the holding unit in the X- and Y-axial direction with a high degree of accuracy.
Patent TW-550620-B (TW)
Title: Color tuning device and method of plasma display panel
Inventor: GAU SHIU-BIN
IPC: G09G3/28
Filed: 2002-03-18
Granted: 2003-09-01
Abstract: A color tuning device and a method of plasma display panel are disclosed. The color tuning device has a look-up table (LUT) and an error diffusion circuit, wherein the look-up table is used for storing plural gray scale data, and extracting the corresponding one from these gray scale data according to the received gray scale input value for use as the output. The error diffusion circuit receives the outputted gray scale data from the look-up table, and increases the color-tuning precision by using error-diffusion compensation method.
Patent TW-578057-B (TW)
Title: Smart card for accessing a target Internet site
Inventor: NOBAKHT LIDA
IPC: G06Q30/06
Filed: 2002-03-18
Granted: 2004-03-01
Abstract: A server is established for a plurality of authorized users. Each authorized user accesses the Internet through a user terminal, with support from the server. The server maintains a database identifying the authorized users. A target Internet site provides payment and a target URL to the server. In return, the server has smart cards created, each storing information identifying an authorized user and the target URL. These smart cards are sent to the corresponding authorized users. Upon insertion of a smart card, a user terminal retrieves the authorized user information and transmits this information to the server. The server compares this information with authorized user information in the server database. If a match exists, the server transmits an authorization code to the user terminal. In response, the user terminal retrieves the target URL from the smart card, and uses this URL to retrieve information from the target Internet site.
Patent TW-I220254-B (TW)
Title: CG-WL voltage boosting scheme for twin MONOS
Inventor: OGURA NORI
IPC: G11C11/56
Filed: 2002-07-05
Granted: 2004-08-11
Abstract: This invention provides a circuit and a method for providing an override voltage to control gates through boosting of a selected word line for TWIN metal oxide, nitride semiconductor MONOS memory. The boosted voltages are required to program, erase and read the 2-bit MONOS memory cell in this invention. This invention relates to providing a means of using capacitive coupling between selected word lines and neighboring control gates to boost the voltage for the program, erase and write modes of MONOS memory. Capacitive coupling to boost the voltage on the control gates adjacent to the selected word lines is used instead of generating the required boosted voltage through the control gate and bit line decoders and drivers. This voltage boosting method saves address decoder silicon area, decoder circuit complexity, reduces address decode set-up time, and eliminates the need for extra voltage supplies for address decoders.
Patent TW-541368-B (TW)
Title: Method for producing jet-type crimped yarn for braided stripe cloth
Inventor: CHIOU CHANG-SHIUAN
IPC: D02G1/16
Filed: 2002-07-09
Granted: 2003-07-11
Abstract: A method for producing a jet-type crimped yarn for braided stripe cloth mainly comprises: controlling the feed rate and the feed time of the sheath yarn for a jet-type crimped yarn machine so that the same crimped yarn forms a different fluffiness at a different length region in order for a braided cloth to form different stripe widths and stripe pitches after braiding and dyeing.
Patent TW-548209-B (TW)
Title: Control device for hybrid vehicle
Inventor: WAKASHIRO TERUO
IPC: B60L50/16
Filed: 2002-07-29
Granted: 2003-08-21
Abstract: A control device for a hybrid vehicle includes an actual intake gas negative pressure detection unit which detects an intake air negative pressure for the engine, an estimated intake gas negative pressure calculation unit which estimates an intake air negative pressure based on a revolution number of the engine and an opening degree of a throttle, and an engine control unit which compares an actual intake gas negative pressure obtained by the actual intake gas negative pressure detection unit with an estimated intake gas negative pressure obtained by the estimated intake gas negative pressure calculation unit. The engine control unit prohibits a fuel supply to the engine until the actual intake gas negative pressure matches the estimated intake gas negative pressure, and carries out the fuel supply to the engine when the actual intake gas negative pressure matches the estimated intake gas negative pressure.
Patent TW-554069-B (TW)
Title: Plating device and method
Inventor: HONGO AKIHISA
IPC: C23C18/16
Filed: 2002-08-09
Granted: 2003-09-21
Abstract: There is provided a plating device that can easily form a uniform plated film on the surface, to be plated, of a material. The plating device includes: a holder for holding a material with its surface, to be plated, upward and its peripheral portion of the surface, to be plated, sealed; a heated fluid holding section for holding a heated fluid which is allowed to come into contact with the back surface of the material held by the holder to heat the material; and a plating solution supply section for supplying a plating solution to the surface, to be plated, of the material held by the holder.
Patent TW-592917-B (TW)
Title: Method for manufacturing modified wood
Inventor: ABE HIROYASU
IPC: G10D1/00
Filed: 2002-08-30
Granted: 2004-06-21
Abstract: Wood such as spruce, maple, and hornbeam are retained in high pressure steam of pressure 0.2 to 1.6 MPa at 120 to 200 DEG C for 1 to 60 minutes, and subsequently, cooled and dried to obtain a modified wood having superior acoustic properties and old wood-like appearance due to a change to a deep color tone. Since the conventional modification methods by chemical treatment using chemicals such as resorcin and formaldehyde are not used, the treatment steps are simple and a modified wood used as a material for musical instruments is obtained at low cost.
Patent TW-540298-B (TW)
Title: Composite board forming method for heat sink
Inventor: CHEN YUNG-JENG
IPC: H05K7/20
Filed: 2002-09-04
Granted: 2003-07-01
Abstract: The composite board forming method for heat sink of the present invention is mainly to dispose the thin copper material with 0.1 to 8 mm thickness on the bottom layer of the forming mold cavity, so that the bottom surface of the copper material is tightly pasted with the bottom layer of the forming mold cavity, and heat the copper material to 300 to 600 DEG C, instill the melted aluminum material into the forming mold cavity by gravity casting process, so that the interface between the copper material and aluminum material has diffusion bonding function. After the melted aluminum material is cooled and its shaped is formed, the composite board structure having specific form body formed by copper, aluminum hetero-alloy integrally is obtained.
Patent TW-565927-B (TW)
Title: Semiconductor device having multi-layer wiring structure and its manufacturing method
Inventor: MATSUNAGA NORIAKI
IPC: H01L23/52
Filed: 2002-09-25
Granted: 2003-12-11
Abstract: In the invention, plural wiring layers are stacked on the LSI chip. Each wiring layer contains the followings: the electrode, which is added with the mechanical pressure; the first insulation film, which is disposed in the region where mechanical strength is required and is formed with the electrode; the second insulation film, which is formed on the same layer as the first insulation film and is disposed in the region where the same mechanical strength as that required for the first insulation film is not needed; and the wiring, which is disposed on the surface of the second insulation film.
Patent TW-I241674-B (TW)
Title: Manufacturing method of semiconductor chip
Inventor: KITAMURA MASAHIKO
IPC: H01L21/784
Filed: 2002-11-11
Granted: 2005-10-11
Abstract: Through the adhesive tape 10 having an adhesive layer of which the adhesive strength is reduced due to the external important factor, the semiconductor wafer surface is adhered and mounted on the plate-shaped supporting member such that the backside of the semiconductor wafer is polished. Then, backside of the polished semiconductor wafer is adhered and mounted on the cutting tape. Additionally, a frame is used to support the outer periphery of the cutting tape; and by making the external important factor act on the adhesive layer, the adhesion strength of the adhesive layer is decreased. Therefore, the plate-shaped supporting member and the adhesive tape can be unloaded without causing damage on the semiconductor wafer or the semiconductor chip.
Patent TW-I224456-B (TW)
Title: Data encryption and decryption method and apparatus
Inventor: YEH MING-FONG
IPC: H04L9/14
Filed: 2002-11-26
Granted: 2004-11-21
Abstract: The present invention provides a data encryption method and apparatus, in which an encryption algorithm module combination is selected from among a plurality of encryption algorithm module combinations predetermined by the user in cooperation with data attribute matching and a dynamic selection mechanism to perform encryption processing of data. The encryption of data through such alternate use of different encryption algorithm module combinations not only enhances the complexity in decryption of the data, the processing speed is not sacrificed due to use of relatively complicated encryption algorithms to ensure security. Furthermore, in the data decryption method and apparatus according to the present invention, data is decrypted using decryption algorithm module combinations that are dynamically switched according to decryption information appended to the ciphertext.
Patent TW-591727-B (TW)
Title: Method for producing a protection for chip edges and arrangement for the protection of chip edges
Inventor: ZACHERL JUERGEN
IPC: H05K3/30
Filed: 2003-01-14
Granted: 2004-06-11
Abstract: The invention relates to a method for producing a protection for chip edges in unpackaged electronic devices in which semiconductor chips provided with a laterally open bonding channel (1) are mounted on a substrate (4) with the interposition of a tape (3). The invention furthermore relates to an arrangement for the protection of chip edges. The invention is intended to provide a method that is simple to realise and also an arrangement for the reliable protection of the chip edges/corners. This object is achieved by virtue of the fact that for mounting the semiconductor chip (2) on the substrate (4), a tape (3) is used whose contour is smaller than the contour of the semiconductor chip (2), so that a peripheral underhang (6) is formed as a capillary between the semiconductor chip (2) and the substrate (4) along the outer edge, that, after the production of the electrical connections between the semiconductor chip (2) and the substrate (4) by wire bonding, in a first step, a flowable encapsulant material (7) is introduced into the bonding channel (1) until the encapsulant material (7) uniformly encloses the edge of the semiconductor chip, and that the bonding channel (1) is subsequently filled completely with encapsulant material (7) in a second step.
Patent TW-573354-B (TW)
Title: Non-volatile memory cell structure and method for manufacturing thereof
Inventor: CHANG KO-HSING
IPC: H01L21/8246
Filed: 2003-01-14
Granted: 2004-01-21
Abstract: A non-volatile memory cell structure. Each of the symmetric cell structure includes a substrate, a tunnel oxide layer, two floating gates, a dielectric layer, a plurality of spacers, a control gate, and two split gates. In this case, the substrate has at least two sources and a drain that is located between the sources. The tunnel oxide layer is formed on the substrate. The floating gates are formed on tunnel oxide layer, and each of these is located between each source and the drain. The dielectric layer is formed on the floating gates, and the spacers are formed on the side-walls of the floating gates. The control gate is formed above the drain and between the floating gates. The split gates are located adjacent to outward side-wall of the floating gates, respectively. Therefore, each of the split gates is opposite to the control gate through each of the floating gates. Furthermore, this invention also discloses a method for manufacturing the cell structure.
Patent TW-I274462-B (TW)
Title: Power supply device and portable apparatus equipped with the same
Inventor: HORIMOTO MASASHI
IPC: H02M3/156
Filed: 2003-03-10
Granted: 2007-02-21
Abstract: A DC-DC converting type power supply device, wherein a power supply circuit, which is controlled to work or to stop, can be soft-started under a condition that the reference voltage of a reference voltage source is maintained to a fixed value, so that the fluctuation of power supply voltage can be suppressed and the need of changing the reference voltage can be eliminated, is provided. While the DC-DC converting type power supply device is started, an input terminal of an error amplifier whereto the output of the device is fed backed is temporarily set to have a voltage which causes the device has no output. Then, its voltage is slowly reduced toward the reference voltage following the discharge of charges charged in a condenser of a feedback circuit, whereby a soft start can be performed without having to change the reference voltage.
Patent TW-I250030-B (TW)
Title: Sterilizer monitoring and controlling system, sterilizer controlling method and computer-readable medium for controlling sterilizer
Inventor: BRAFFORD ROBERT W
IPC: A61L2/08
Filed: 2003-03-18
Granted: 2006-03-01
Abstract: A system and method are provided for monitoring and/or controlling a sterilization system. Briefly described, in architecture, the system can be implemented as follows. A current transformer is operatively associated with a source of power for a radiation source. A power meter is operatively associated with the source of power. The power meter is also operatively associated with the current transformer. The power meter is designed to monitor the source of power to confirm the radiation source provides a desired dosage.
Patent TW-578288-B (TW)
Title: Bumping process for wafer level package
Inventor: FANG JEN-KUANG
IPC: H01L23/48
Filed: 2003-03-21
Granted: 2004-03-01
Abstract: A bumping process for wafer level package mainly comprises the following processes. Firstly, a wafer with an active surface on which a plurality of pads are formed and a plurality of under-bump-metallurgy layers are formed on the plurality of pads is provided. Each one of the surfaces of the plurality of under-bump-metallurgy layers includes a recession and a top. Next, an encapsulation is formed on the active surface and covers the surfaces of the plurality of under-bump-metallurgy layers. Then, the encapsulation is ground to expose the tops of the plurality under-bump-metallurgy layers and covers the recessions of the plurality of under-bump-metallurgy layers. A further grinding process is proceeded to grind the exposed tops of the plurality of under-bump-metallurgy layers and the residual portions of the encapsulation. In such manner, the surfaces of the plurality of under-bump-metallurgy layers will be smoothed. Next, a plurality of bumps are formed on the smoothed surfaces of the plurality of under-bump-metallurgy layers. Finally, a reflow process is proceeded to join the bumps to the under-bump-metallurgy layers.
Patent TW-I234874-B (TW)
Title: Semiconductor device
Inventor: SAKAKIBARA KIYOHIKO
IPC: H01L27/088
Filed: 2003-04-10
Granted: 2005-06-21
Abstract: The first semiconductor element constitutes transistor for use in a memory cell region, and the second semiconductor element constitutes a transistor for use in a peripheral circuit region. The first total impurity concentration of the first impurity diffusion region and the second impurity diffusion region of the first semiconductor element is set higher than the second total impurity concentration of the fifth impurity diffusion region of the second semiconductor element. Thus, a semiconductor device provided with semiconductor elements of different threshold voltages is obtained.