Patent GB-1233925-A (GB)
IPC: G06F9/45
Filed: 1968-09-30
Abstract: 1,233,925. Data processing. BURROUGHS CORP. 30 Sept., 1968 [2 Oct., 1967], No. 46290/68. Heading G4A. Data processing apparatus comprises a memory for storing stacks of information, each stack having mark words positioned in different stack areas, each mark word having a reference value referencing another mark word, a plurality of display registers for storing the absolute addresses of mark words for the stack areas used in a current procedure, the display registers being updated for a new procedure by utilizing the reference value in one or more of a series of linked mark words for forming a series of absolute addresses which are set into the display registers. A core memory 20 is addressed by address register MM. A PR sub-register of a programme register 22 provides the addresses of successive operators which are passed to operator register 124 to control the system. Last-in-first-out stacks are stored in the memory 20, and A and B registers shown can be used as the top two word locations of a stack currently in use. Words in the body of the stack can be addressed using MM. Transistor flip-flop display registers DO-DN store absolute memory addresses of MSCW mark words in the stack, such a mark word being provided at the bottom of the stack, at the bottom of a sequence of SD (segment descriptor) words, and at the bottoms of groups of words relating to respective ALGOL (or PL/I) procedure blocks. An MSCW word, when complete, has a field DISP which when added to the contents of a BOSR sub-register of the programme register 22 forms the address of another MSCW word in the stack (e.g. that relating to the containing block in the programme), thus linking the MSCW words in an "address environment list". The MSCW word also has a DF field which when subtracted from the address of the word gives the address of the next MSCW word below in the stack, thus linking the words in a "stack history list". Other fields shown in the word types of Fig. 1A (used in the stack) include TAG and E (to identify the type of word), STKNR (to identify the stack), 11 ("lexicographical level" to specify a display register), # (a quantity to be added to the contents of the specified display register or another number to get the address of a desired word in the stack), SDIF, SDIF<SP>1</SP> (consisting of 11 and # to be used as above to locate a segment descriptor SD), and ADDRESS (in a segment descriptor, being the address of the beginning of machine code for a particular procedure). Entry into a procedure involves the following steps. The contents of an F sub-register of the programme register 22 point to the MSCW of the procedure and are incremented by one to get an IRWS (or IRW) word just above it in the stack. The IRW words differ from the IRWS in lacking the STKNR and DISP fields. The IRWS word provides DISP and 8 which added to the contents of sub-register BOSR address a PCW for the procedure (in the stack). An IRW, word would use 11 to select a display register the contents of which would be added to 8 to address the PCW, or a sequence of indirect addressing steps could be used using IRW IRWS words. The PCW exchanges fields with the programme register 22 and loads an LL register (see below), and is converted into an RCW which is replaced in the stack at the same position. The RCW enables subsequent return from the procedure. The "address environment list" is updated by completing the MSCW of the procedure entered by supplying it with the DISP field of the IRWS (if used). The display registers are updated in turn, by selecting the one specified by the LL register and loading it with the contents of the F sub-register, then saving the contents of LL in an RF register and decrementing the LL register by one repetitively to zero, using each value to select a display register. Each display register thus selected is loaded with the current contents of a BUFF sub-register in the programme register 22, these contents being the sum of BOSR and 8 from the IRWS word (obtained above) in the first case, and in each subsequent case the sum of BOSR and the DISP field from the MSCW addressed by the respective preceding contents of BUFF. Register LL is then restored from RF, the SDIF<SP>1</SP> field (transferred into the sub-register PDR of the programme register 22 from the PCW during the "exchange" mentioned above) provides an 11 field which addresses display register D1 (which addresses the MSCW at the bottom of the sequence of segment descriptors in the stack), and a 8 field which is added to the contents of D1 to address the segment descriptor, the ADDRESS field in which is stored in a BPR sub-register of programme register 22 to address the machine code for the procedure. A DRSR register is also provided to receive an 11 field to select a display register for reading. Exit from a procedure is said to be similar.