Patent GB-1185284-A (GB)
Title: Process Analyzing Device
IPC: G06G7/75
Filed: 1968-07-24
Abstract: 1,185,284. Flow extraction computing. HOWE RICHARDSON SCALE CO. 24 July, 1968 [11 Aug., 1967], No. 35209/68. Heading G4G. [Also in Division G1] In milling, it is shown that where P, C 1  and C 2  denote the feed rates of different grades of flour and W is the feed rate of intake wheat, the mill yield is given by the extractions of different grades are given by and the yields of different grades are given by In operation, wheat is fed (Fig. 1) to an automatic dump scale 14 wherein hopper 18 on a balance beam tilts on a predetermined burden to cause control 36 to energize motors to close catch gate 16 and to open dump gate 22. After a preset delay, the gates are restored and gate 16 dumps into the hopper the wheat caught during closure, so that supply is continuous at rate W. The output of grinder 26 is sifted into grades P, C 1 , and C 2  fed to similar dump scales 30, 31, 32 delivering at rates P, C 1 , C 2  respectively. Analysing circuit 10 (Fig. 2) comprises networks 40, 43, 41, 42 corresponding to scales 14, 30, 31, 32. In network 40, an integrator 46 comprises an operational amplifier 62 with feedback capacitor 64 and normally open relay contact R2-1 fed from potentiometer 54 with a variable reference voltage over resistor 58, to generate a linear ramp voltage E 1  proportional to the time of each weighing cycle, which is applied to a multiplier-divider circuit 47 receiving preset voltages E 4 , E 5  and producing voltage proportional to the average input feed rate when ramp voltage E 1  approaches peak. E 2  is memorized and sampled by circuit 48, and closure of contacts R2-1 by relay R 2  on displacement of discharge gate 22 clamps E 1  to zero for recommencement of cycle. E 4  is set proportionally to the weight feed dump and E 5  to a scaling factor, and E 2  is applied to input 82 of a summation resistor 84 of a storage circuit comprising operational amplifier 88 with feedback storage capacitor 90 and capacitor 94 switched by sampling contacts R3-1 of relay R 3 , operative once per feeding and dumping cycle, which on closure charge the capacitor to E 2  and on opening hold the output at voltage E 3 , equal to the last value of E 2  before opening, and representing average input feed rate (weight per unit time). Similar networks 41, 42, 43 controlled by contacts R2-1b, R2-1c, R2-1a of relays R2b, R2c, R2a are operated by the dumping of scales 30, 31, 32 to produce memorized signals E 3a , E 3b , E 3c  representing average feed rates of the several grades of flour. These signals are algebraically added over resistors 98, 99, 100, and operational amplifier 104 to a total feed signal which is applied over normally closed switch 112 to multiplier/ divider circuit 50, also receiving signal E 3  and a scaling signal at 107, to produce an output voltage representing which is recorded at 116 to indicate mill yield. On closure of switch 120 with opening of switch 112 to which it is ganged, a signal E 3a  is substituted for the sum signal, so that the recorded P output represents extraction -. W Multiplier/divider circuit 122 receiving the output of summation amplifier 104 and signal E3 a  together with a scaling voltage at 125 gives output representing yield recorded at 130. The yields may be similarly determined and recorded, while feed rate meters 132, 133, 134, 135 are energized by E 3 , E 3 a, E 3 b, E 3c  for input wheat and the several grades of flour. The circuits may be applied to interchangeable printed circuit cards. Logic circuits (Fig. 4, not shown) corresponding to the networks 40, 43, 41, 42 (Fig. 2) control the operational cycles of relays R 2 , R 3  &c., in which a limit switch opening and closing with the gate of the appropriate dump scale energizes a relay (R 1 ) restoring the appropriate integrator in parallel with a timer (T 1 ). The relay R 3  (Fig. 2) is operated over closed contacts of the said relay (R 1 ) and the normally closed timer contacts to sample E 3  from circuit 48 holding signal E 2 , and on delay operation of the timer, R 3  is released to open R3-1 to store a further value of E 2 , while a further timer (T 2 ) and parallel relay (R 4 ) are energized in series with the gate switch. The relay operates to energize R 2  over normally closed timer switch to reset integrator 46, and then the timer operates to de-energize R 2  and allows integrator 46 to generate ramp signal E 1 . Opening of the discharge gate 22 deenergizes the timers (T 1 ,T 2 ) and relay (R 1 ) and resets the timers, while relay (R 3 ) remains deenergized. Similar circuits are provided for the dump scales delivering the outputs of the different grades of flour.