Patent SG-11201811721U-A (SG)
Title: Semiconductor packaging structure and method of forming the same
Inventor: JUNG BOO YANG
IPC: H01L23/50
Filed: 2017-07-03
Abstract: INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property :::` , Organization MD HIM 0 11101 HOE 3E1 0 101110110111111 010 MIMI 1111 MI International Bureau (10) International Publication Number 3 (43) International Publication Date .....•\"\" WO 2018/009146 Al 11 January 2018 (11.01.2018) W I PO I PCT (51) International Patent Classification: (74) Agent: VIERING, JENTSCHURA & PARTNER LLP; H01L 23/50 (2006.01) HOlL 23/52 (2006.01) P.O. Box 1088, Rochor Post Office, Rochor Road, Singa- H01L 21/768 (2006.01) HOlL 21/56 (2006.01) pore 911833 (SG). (21) International Application Number: (81) Designated States (unless otherwise indicated, for every PCT/SG2017/050334 kind of national protection available): AE, AG, AL, AM, (22) International Filing Date: AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, 03 July 2017 (03.07.2017) CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, (25) Filing Language: English HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, (26) Publication Language: English KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, (30) Priority Data: OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, 10201605552U 07 July 2016 (07.07.2016) SG SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (71) Applicant: AGENCY FOR SCIENCE, TECHNOLO- GY AND RESEARCH [SG/SG]; 1 Fusionopolis Way, (84) Designated States (unless otherwise indicated, for every #20-10 Connexis North Tower, Singapore 138632 (SG). kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, (72) Inventors: JUNG, Boo Yang; c/o Industry Development, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, — Institute of Microelectronics, 2 Fusionopolis Way, #08-02 TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, Innovis Tower, Singapore 138634 (SG). AU, Jason; c/o EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, Industry Development, Institute of Microelectronics, 2 Fu- MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, sionopolis Way, #08-02 Innovis Tower, Singapore 138634 TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, (SG). KM, ML, MR, NE, SN, TD, TG). = = Title: SEMICONDUCTOR PACKAGING STRUCTURE AND METHOD OF FORMING THE SAME = (54) (57) : Various embodiments may provide a method of forming a semicon- = FIG. 3 344 ductor packaging structure. The method may include forming a plurality of semi- conductor packages, each semiconductor package including a semiconductor die and a mold encapsulation structure. The method may also include arranging the Form a plurality of semiconductor packages \ plurality of semiconductor packages to form a vertical stacked arrangement with a = _ = 1 302 mold portion including a plurality of mold encapsulation structures, the mold por- - Arrange the plurality of semiconductor packages to form a vertical stacked arrangement with a mold portion comprising a plurality of mold encapsulation structures tion extending from a first side to a second side of the vertical stacked arrangement opposite the first side. The method may additionally include forming a first via on the mold portion at the first side of the vertical stacked arrangement, forming a sec- = = = 1 \ 304 and via on the mold portion at the second side of the vertical stacked arrangement, and forming an electrically conductive filled via extending through the mold portion from the first side to the second side of the vertical stacked arrangement. = Form a first via on the mold portion at the first side of the vertical stacked = arrangement after the vertical stacked arrangement is formed = I \ 306 Form a second via on the mold portion at the second side of the vertical — stacked arrangement after forming the 11 first via I \" 308 Form an electrically conductive filled via extending through the mold portion from 11' the first side of the vertical stacked PSI arrangement to the second side of the vertical stacked arrangement C:r 310 © © ,-.... GC 11 © N O [Continued on next page] WO 2018/009146 Al MIDEDIMOMMIONERIONINIMMIEERMOVOIS Published: — with international search report (Art. 21(3))