Patent GB-1111276-A (GB)
Title: Differential amplifier
IPC: H03F3/45
Filed: 1965-09-28
Abstract: 1,111,276. Transistor circuits; pulse modulation circuits. ROBERTSHAW CONTROLS CO. 28 Sept., 1965 [30 Sept., 1964], No. 41243/65. Headings H3T and H4L. [Also in Division G4] In converting a D.C. measurement signal into A.C. for amplification and subsequent measurement, the D.C. signal is applied between terminals 32, 34 (Fig. 1), the latter being earthed and the former connected over series resistors 38, 40 to an input 23 of differential amplifier 26. A balancing potentiometer 50 is connected over series resistors 48, 46 to an input 25 of the amplifier; the junction of 38, 40 being earthed over capacitor 42 and that of 48, 46 being earthed over capacitor 44 and resistor 52; the input circuit impedances being symmetrical. A chopper circuit comprises a 4-terminal semiconductor device 12 whose emitters 18, 20 are connected to inputs 25, 23, while drive, e.g. from a free run multivibrator is transformer coupled to the base 14 and collector 16 of the device and earthed over capacitor 64; in parallel with a PNP limiting transistor 66; 12 and 66 being enclosed in a constant temperature chamber 68. Semi-conductive device 12 is rendered alternately conductive and semiconductive in response to the square-wave to alternately open and shut inputs 23 and 25, so that the difference signal therebetween is a square-wave of amplitude proportional to the D.C. input; together with common mode error voltages derived from switching transients in the semi-conductor device 12 and the interwinding capacitance of transformer 56. The differential amplifier 26 must respond to the voltage difference between its inputs while rejecting common mode interference voltages. It receives (Fig. 2) an input at 23 comprising a common mode signal plus an additional signal derived from the D.C. input signal, which is transmitted over a capacitor to the base of transistor Q2 which is earthed over resistor 74. Its emitter is returned to a voltage reference point of a potential divider 124, 126 and its collector is resistance connected to a power supply and coupled over amplifying transistors Q5, Q6 to output 28; the other output 30 being earthed. The reference point is held instantaneously to a voltage equal to the signal voltage to earth on input terminal 25 by a feedback loop comprising transistors Q1, Q3 and Q4; the base of Q1 being capacitance coupled to 25 with its emitter earthed over capacitance 100 and resistor 98 while its collector is resistance capacitance coupled to the base of transistor Q4; the emitter of which is connected over resistor 114 to base 116 of transistor Q3. The collector of the latter is connected to the junction of resistors 122, 124 series connecting the emitters of transistors Q1,Q2 to complete the loop. Resistor 124 forms part of a voltage divider 124, 126 returned to the output terminal 28 and emitter 130 of transistor Q6; the reference point being selectively positioned on the voltage dividers so that transistor Q1 and the loop comprising transistors Q3, Q4 maintain a voltage equal to and varying with the common mode signal at input 25, and consequently Q2 produces zero common mode output provided that the phase of the signal at Q3 collector is identical with that of the signal at Q1 base (Figs. 3A, 3B, Fig. 4, not shown).