baber/WOPTO huggingface dataset:
Patent TW-200502106-A (TW)
Title: Positive tone bi-layer imprint lithography method and compositions therefor
Inventor: SREENIVASAN SIDLGATA V
IPC: G03F/
Filed: 2004-03-24
Abstract: The present invention provides a method and compositions to pattern a substrate that features creating a multi-layered structure by forming, on the substrate, a patterned layer having protrusions and recessions. Formed upon the patterned layer is a conformal layer, with the multi-layered structure having a crown surface facing away from the substrate. Portions of the multi-layered structure are removed to expose regions of the substrate in superimposition with the protrusions, while forming a hard mask in areas of the crown surface in superimposition with the recessions.
Patent TW-200503408-A (TW)
Title: Digital amplifier
Inventor: DUERBAUM THOMAS
IPC: H03F1/32
Filed: 2004-04-02
Abstract: Recently, the use of class-D audio amplifiers has become more and more widespread. In contrast to the generally employed class-AB linear amplification technology, class-D allows for improved efficiency. However, the class-D principle is known for its poor distortion characteristics. According to the present invention a digital amplifier is provided for converting an audio signal to a power output, comprising a ripple suppression circuit for suppressing voltage ripples in a supply voltage supplied to the bridge circuit with at least one pair of switches. The ripple suppression circuit suppresses ripples in the supply voltage supplied to a switch in the bridge circuit, which has been found to cause a major part of the distortions in the output signal of the digital amplifier.
Patent TW-200508031-A (TW)
Title: Surface covering
Inventor: HIGGINS KENNETH B
IPC: B32B5/26
Filed: 2004-04-23
Abstract: A surface covering element adapted for disposition in covering relation to a support surface. The surface covering element includes a show surface adapted to project away from the support surface when the surface covering element is disposed across the support surface and an underside adapted to project towards the support surface when the surface covering element is disposed across the support surface. A friction enhancing coating composition is disposed in coated relation across the underside at an effective level to enhance sliding friction of the surface covering element such that the surface covering element exhibits a degree of lateral grip cross across the support surface. The friction enhancing coating composition does not permanently stick to the support surface.
Patent TW-200537642-A (TW)
Title: Method of making a bit line contact device
Inventor: LIAO CHIEN-MAO
IPC: H01L21/76
Filed: 2004-05-12
Abstract: A method for making a bit line contact on a substrate is provided. Two gate conductor stacks are formed on a main surface of the substrate in close proximity to each other. A bit line contact forming area is defined above the area between the two gate conductor stacks. A silicon dioxide lining film is deposited on a top surface and sidewalls of the gate conductor stacks. A sacrificing layer is deposited on the silicon dioxide lining film. The sacrificing layer is then polished to expose the top surface of the gate conductor stacks. A spin-on-glass (SOG) film is then coated on the sacrificing layer. A resist pattern masking the bit line contact forming area is formed on the SOG film. The un-masked SOG film, sacrificing layer and silicon dioxide lining film are etched away. A silicon nitride thin film is deposited on the remaining SOG film. A BPSG layer is deposited on the silicon nitride thin film and is then polished to expose the SOG layer. The exposed SOG layer and the underlying sacrificing layer are removed to form a bitline contact hole.
Patent TW-200503475-A (TW)
Title: Peer-to-peer name resolution wire protocol and message format data structure for use therein
Inventor: MILLER JOHN L
IPC: H04L29/08
Filed: 2004-05-18
Abstract: An extensible data structure for messages in a peer to peer name resolution protocol is presented. This message data structure utilizes a number of fields, each containing a message element. Preferably, the first field is the message header that includes protocol information and identifies the type of message. Each message element contains a number of fields. These message element fields include a type field, a length field, and the content or payload of the message element. In one embodiment, at least ten messages are formed for proper operation of a Peer To Peer Name Resolution Protocol (PNRP), including resolve, response, solicit, advertise, request, flood, inquire, authority, ack, and repair messages.
Patent TW-200541204-A (TW)
Title: Power multiplying amplification circuit for balance output of RFIC
Inventor: CHANG JASON L C
IPC: H03F3/26
Filed: 2004-06-02
Abstract: The present invention discloses a power multiplying amplification circuit for balance output of RFIC, which amplifies a signal power of an output end in about two folds. The circuit amplifies a balance output signal of a balance output terminal in a regular RFIC. The balance output terminal includes a first output end and a second output end, and signals of the two output ends have opposite phases. Two power amplifiers having lower rated output power are adopted to connect with the first output end and the second output end respectively so as to individually amplify signal power of each output end. A BALUN converter is utilized to combine the two amplified signals with opposite phases into one signal for outputting it via a single end. Therefore, the signal output power of the unbalanced end can be doubled.
Patent TW-200539957-A (TW)
Title: Gas torch tool (2) having a heat conductive element, including a combustor
Inventor: Lin quan-chuan
IPC: B05C5/04
Filed: 2004-06-14
Abstract: This invention provides a gas torch tool (2) having a heat conductive element, including a combustor, a discharge tube device, a heat conductive element, and a gas canister. The gas torch tool is provided in a tool casing thereof with a combustor and in a grip with a gas canister. The combustor is provided at an end thereof with a glue injecting nozzle, and at another end thereof with a pushing portion and a lever for controlling movement of the pushing portion. The pushing portion is provided therein with hot melt glue. An igniting device is provided next to the combustor. The combustor and the gas canister is provided therebetween with a discharging tube device connecting to the combustor and the gas canister. The discharging tube device is formed with a passageway for supplying gas to the combustor. The discharging tube device is sequentially assembled with a fitting, an adjustment wheel and a regulating value. During vaporization of the gas, fast temperature reduction or incomplete vaporization may cause blockage in the fitting, thereby resulting in hindrance in the passageway of the fitting and the regulating valve. Upon connecting the heat conductive element to the fitting, the heat generated by the combustor during combustion will be quickly absorbed, concentrated and conducted towards the fitting, so as to prevent blockage in the fitting caused by fast temperature reduction or incomplete vaporization. Such a design prevents blockage in the discharging tube device and significantly reduces failures of the gas torch tool. The heat conductive element is a simple and easily assembled structure. Such a design meets the consumers' needs and is of industrial applicable and inventive invention.
Patent TW-200601644-A (TW)
Title: Structural improvement of power adapter
Inventor: Xie zhen-rong
Filed: 2004-06-24
Abstract: The present invention relates to a structural improvement of power adapter mainly including a main body, wherein one end of the main body has a two plug pins being a live pin and an earth pin, the place of the main body excluding the plug pins has three-hole slots being one live slot, another earth slot and the other grounding slot. The live pin and the live slot are connected and the earth pin and the earth slot are connected. The earth slot and the grounding slot are connected through a thermal resistor therebetween. A metal piece and a warning light are disposed at proper places of the main body, and the metal piece and the warning light are connected through the live pin and the live slot. By means of the grounding effect of the grounding terminal of the computer itself, the earth slot and the grounding slot of the main body are connected through a thermal resistor therebetween, so as to directly guide all radiation through the grounding slot and the grounding pin into a computer case.
Patent TW-200503333-A (TW)
Title: Connector with locking part, distributing substrate installed with the connector, and electronic electric equipment containing the distributing substrate
Inventor: NAKASHIMA TERUMI
IPC: H01R13/639
Filed: 2004-06-30
Abstract: The present invention provides a connector with a lock part composed by securing a sucking surface for automatic mounting while having a lock structure. The connector with a lock part comprises: a connector housing to accommodate the connector, and fittable to an opposed connector having a lock engagement part; and contacts housed in the connector housing, coming into contact with the terminal fittings of the opposed connector, and jointed to the wiring board. The connector housing comprises: a contact housing part allocated by the side of the wiring substrate to accommodate the said contacts; intermediate walls for partitioning the contact housing part; lock parts formed on the upper surfaces of intermediate walls for locking the said lock parts of the opposed connector; and a top surface wall formed above the lock parts and having the flat sucking surface for suction formed of a suction member on its upper surface.
Patent TW-200514180-A (TW)
Title: Mutiple gate electrode linewidth monitor method
Inventor: CHEN JIA-REN
IPC: G01R31/28
Filed: 2004-06-30
Abstract: A method for fabricating a semiconductor product first provides an embedded semiconductor product comprising: (1) a logic region having formed therein a logic field effect transistor devices; (2) a memory region having fromed therein a memory field effect transistor devices; and (3) a kerf region having formed therein a kerf field effect transistor device. The method also provides for measuring for the embedded semiconductor product a gate electrode linewidth for each of the logic field effect transistor device, the memory field effect transistor device and the kerf field effect transistor device. The measured gate electrode linewidths may be compared among themselves or to specified target values for purposes photoexposure process control.
Patent TW-200513353-A (TW)
Title: A power-driven nailing machine
Inventor: OGAWA TATSUSHI
IPC: B25C1/04
Filed: 2004-07-02
Abstract: In a power-driven nailing machine for driving a nail disposed within a discharge port 7 of a nose body 6 into a work, a contact nose 13 giving a leading end discharge port 12 for guiding the nail driven from a discharge port 7 of the nose body 6 toward the work is provided to be protrusively urged toward the leading end of the nose body 6. In the leading end discharge port 12 of the contact nose 13, a guide portion 17 and 19 longer than a maximum sized nail are formed from the leading end.
Patent TW-200513874-A (TW)
Title: Systems and methods for extensions and inheritance for units of information manageable by a hardware/software interface system
Inventor: DEMIROSKI BEKIM
IPC: G06F9/44
Filed: 2004-07-28
Abstract: By modeling real-world application objects with complex structures, behaviors, and operations described by a schema which is enforced by the hardware/software interface system, various embodiments of the present invention provide rich sub-typing functionality by extending Items (and Item types) using "Extensions" which provide additional data structures (Properties, Relationships, etc.) to already existing Items type structures. Extensions are strongly typed instances that cannot exist independently and must be attached to an Item or a Nested Element. Extensions are also intended to address "multi-typing" issues by enabling the overlap of type instances (e.g., a Document may be a "legal document" as well a "secure document").
Patent TW-200539708-A (TW)
Title: Chip antenna for terrestrial DMB
Inventor: KIM HYUN-HAK
IPC: H01Q21/00
Filed: 2004-08-03
Abstract: Disclosed herein is a chip antenna for terrestrial DMB. The chip antenna comprises a dielectric block, a main antenna device formed with conductive patterns in the dielectric block such that a plurality of unit lamination structures of the conductive patterns having a meander line structure in the direction of the Z-axis in an XZ plane are arranged in the direction of the Y axis while adjacent unit lamination structures are connected to each other, forming a lamination structure having the meander line structure in the directions of the Y-axis, and the plurality of lamination structures are arranged in the direction of the X-axis and adjacent lamination structures are connected to each other in the direction of the X-axis to have the meander line structure, and a T-shaped assistant antenna device formed at an upper or lower dielectric layer in the main antenna device.
Patent TW-200611352-A (TW)
Title: Solder for manufacturing bumps and bumping process
Inventor: CHENG YI-HSIUN
IPC: H01L21/60
Filed: 2004-09-22
Abstract: A bumping process is provided. First, a wafer is provided, wherein the wafer has an active surface and a plurality of bonding pads disposed on the active surface. Then, a solder is provided to form a solder block on each bonding pad respectively, wherein the solder comprises a flux, a metal alloy powder, and an organic solderability preservation which is coated on the metal alloy powder and evaporates in temperature of 210 DEG C to 240 DEG C. Next, a reflow process is performed to the solder blocks to form a plurality of bumps as the organic solderability preservation evaporating at the same time. The solder for manufacturing the bumps and the bumping process can reduce voids in the bumps after reflow in order to enhance the reliability of bumps and improve the yield factor of the bumping process.
Patent TW-200534018-A (TW)
Title: Array substrate of liquid crystal display and fabrication method thereof
Inventor: JEOUNG HUN
IPC: G03F7/20
Filed: 2004-10-12
Abstract: Provided is an array substrate of an LCD that includes a substrate, an active layer, a first insulating layer, and a gate electrode sequentially formed on the substrate. A source region and a drain region reside in predetermined regions of the active layer and each is doped with impurity ions. A second insulating layer overlies an entire surface of the substrate including the gate electrode. A pixel electrode resides on the second insulating layer. First and second contact holes reside in the first and second insulating layer and expose portions of the source region and the drain region, respectively. A portion of a source electrode contacts the source region through the first contact hole and a first portion of a drain electrode contacts the drain region and a second portion contacts the pixel electrode.
Patent TW-200614653-A (TW)
Title: C-less ask demodulator for implantable biological nerve micro-stimulators
Inventor: WANG CHUA-CHIN
IPC: H03D1/00
Filed: 2004-10-21
Abstract: The invention relates to a C-less ASK demodulator for implantable biological nerve micro-stimulatros. The demodulator of the invention comprises an envelope detector and a power regulator. The envelope detector comprises a plurality of transistors for receiving an ASK modulation signal and locking a high level and a low level of the ASK modulation signal at different ranges so as to generate a first level envelope and a second level envelope corresponding to the ASK modulation signal. The power regulator comprises a Schmitt trigger and an inverter. The Schmitt trigger is used to determine the first level envelope and the second level envelope and to generate an inverted ASK demodulation signal. The inverter is used to invert the inverted ASK demodulation signal to an ASK demodulation signal. The demodulator of the invention utilizes a plurality of transistors, and does not need any capacitor. The area of the demodulator can be substantially reduced in the SOC (System-on-a-Chip) designs as well as implanted biological chip devices.
Patent TW-200526207-A (TW)
Title: Process for preparing (3-oxo-2,3-dihydro-1h-isoindol-1-yl) acetylguanidine derivatives
Inventor: SCHUBERT GERRIT
IPC: C07C233/66
Filed: 2004-11-30
Abstract: The present invention relates to process for preparing (3-oxo-2,3-dihydro-1H-isoindol-1-yl) acetylguanidine derivatives of the formula I, Via 3-hydroxy-2,3-dihydro-1H-isoindol-1-one derivatives or 3-(2-carbamoyl-phenyl)-acrylic ester derivatives as intermediates, to a process for optical resolution, and to intermediates of the process according to the invention.
Patent TW-200623031-A (TW)
Title: Disk changer and tray locking apparatus thereof
Inventor: KUO TSUNG-JUNG
IPC: G11B17/00
Filed: 2004-12-17
Abstract: A dick changer has plural trays. Every tray is selectively disposed in a storing zone and a reading zone. A tray locking apparatus includes a locking member, a drawing device, and a moving member. The locking member is used for locking the trays in the storing zone. The moving member is disposed on the drawing device and used for moving the locking member to release a selected tray, so that the drawing device draws the selected tray from the storing zone to the reading zone.
Patent TW-200531416-A (TW)
Title: Startup circuit for converter with pre-biased load
Inventor: MEHAS GUSTAVO J
IPC: H02M3/139
Filed: 2005-01-19
Abstract: A method of starting a DC-DC converter into a precharged output voltage including generating a reference voltage having a linear relationship with the output voltage such that the reference voltage ranges between a minimum and maximum voltage level of a PWM triangular waveform as the output voltage ranges between zero and an input voltage level, and enabling output switching of the DC-DC converter when the reference voltage is approximately equal to a compensation signal generated by an error amplifier comparing the reference voltage with a feedback signal representative of the output voltage. Generating a reference voltage may include applying a first current based on the input voltage through two resistors to develop the minimum and maximum voltage levels, applying the first current in one direction through a third resistor, and applying a second current based on the output voltage through the third resistor in the opposite direction.
Patent TW-200626387-A (TW)
Title: Gearbox structure for an all-terrain vehicle
Inventor: Tang qing-wei
IPC: B62M11/00
Filed: 2005-01-26
Abstract: This invention relates to a gearbox structure for an all-terrain vehicle. The all-terrain vehicle drives conveyor gearshift mechanism in the gearbox via a crankshaft of the engine so as to transmit power to a final shaft in the gearbox via a driven shaft of the conveyor gearshift mechanism. The driven shaft has a shaft end extending into the gearbox. The shaft end of the driven shaft is provided with a torque release mechanism. The torque release mechanism is constructed of a transmission gear, a ball disc, balls, a rolling disc and a resilient member, which are engaged over the shaft end of the driven shaft. The transmission gear is provided at a side thereof with the ball disc. The ball disc is formed with plural ball indents. The rolling disc is indented with an annular groove at a side facing the transmission gear. The annular groove is further indented with plural ball indents, where the ball indents of the ball disc and the rolling disc correspond to each other for receiving balls therebetween. The resilient member is limited by a fastener so as to be placed between the rolling disc and the fastener. The provision of the torque release mechanism in the gearbox prevents chains or driven gears from damages caused by instantaneous overload or excessive torque thereby improving the utility of the all-terrain vehicle.
Patent TW-200627257-A (TW)
Title: Mode determination system and method for fine search of motion vector
Inventor: HSIEH PAI-CHU
IPC: G06F7/00
Filed: 2005-01-27
Abstract: The present invention provides a mode determination system and method for fine search of motion vector, wherein each macro block is predefined with an expected clock number. The system comprises a first subtracter, an operation level generation device, and a determination device. The first subtracter has a first input for receiving the clock number for a macro block to execute the fine search, and a second input for receiving the expected clock number of the macro block, so as to subtract a clock number with an expected clock number to generate a clock difference. The operation level generation device is coupled with the first subtracter to generate an operation level based on the clock difference. The determination device selects at least one encoding mode based on the operation level to execute the fine search on the block.
Patent TW-200612702-A (TW)
Title: Multimedia communication and collaboration system and protocols
Inventor: HWANG CHERNG-DAW
IPC: H04L29/06
Filed: 2005-03-25
Abstract: A system is described that includes a real-time routing server to route and process multimedia sessions over a network. The system also includes a group server to manage the multimedia communications sessions over the network. The group server is coupled to the routing server. The system further includes a plurality of end-point processing devices to schedule and conduct multimedia communications sessions over the network. The plurality of end-point processing devices are coupled to the routing server and the group server. Protocols determine the topology of the network, reserve bandwidth, reserve media processing resources, and find the best route and the best real-time routing server to transfer and process multimedia data.
Patent TW-200633863-A (TW)
Title: Method for manufacturing improved slipcase and structure of the improved slipcase
Inventor: WU MING-HAN
IPC: B42D3/00
Filed: 2005-03-29
Abstract: The present invention relates to a method for manufacturing improved slipcase and a structure of the improved slipcase, wherein: the material of the slipcase is delivered by a delivery machine; first, a line imposing procedure is performed to produce a inward foldable crease at two sides of the slipcase material; the slipcase material at the external side is the inner sheaths; then a cutting line is formed on at least one inner sheath; a rectangular piece is combined to the lateral of the cutting line, and a self-adhered bar is implemented between the rectangular piece and the inner sheath; then the sheaths at two sides are folded inward and processed by equal-interval thermal cutting treatment so as to form the slipcase; accordingly, the present invention may provide the slipcase with lower production cost and having the functions of conventional fixation property and self-adhered property.
Patent TW-200535977-A (TW)
Title: Semiconductor device and method for manufacturing the same
Inventor: KAWANO MASAYA
IPC: H01L21/60
Filed: 2005-03-30
Abstract: A semiconductor device having a through electrode excellent in performance as for an electrode and manufacturing stability is provided. There is provided a through electrode composed of a conductive small diameter plug and a conductive large diameter plug on a semiconductor device. A cross sectional area of the small diameter plug is made larger than a cross sectional area and a diameter of a connection plug, and is made smaller than a cross sectional area and a diameter of the large diameter plug. In addition, a protruding portion formed in such a way that the small diameter plug is projected from the silicon substrate is put into an upper face of the large diameter plug. Further, an upper face of the small diameter plug is connected to a first interconnect.