baber/WOPTO huggingface dataset:
Patent JP-S60245875-A (JP)
Title: Shaft seal
Inventor: HANSU FUORUHI
IPC: F16J15/3244
Filed: 1985-01-23
Abstract: In the combination of a shaft with a polymeric ring having a sealing surface which flares against a counter surface on the shaft to form a dynamic sealing zone therebetween upon relative rotation of the shaft and ring, both the sealing and counter surfaces have hydrodynamically-acting feed-back elements for pumping fluid which seeps between the surfaces upon the relative rotation. The resultant, net axial component of pumping actions of the elements is in one axial direction along the shaft to pump the fluid back into the space from which it came, but the elements have different pumping actions. The different pumping actions produce a fluid circulation in the dynamic sealing zone which inhibits seal-wearing granular deposits.
Patent JP-H08204700-A (JP)
Title: Cryptographic communication device and method
Inventor: ABE MASAYUKI
IPC: G09C1/00
Filed: 1995-01-26
Abstract: PURPOSE: To reduce the danger of leakage of password to a third party in the case of revising the password by using a ciphering key different from each communication for 1st and 2nd equipments in common. CONSTITUTION: Ciphered data C are sent from a 1st equipment to a 2nd equipment via a communication means 340. Or ciphered data C from the 1st equipment are received by th 2nd equipment via the communication means 340, the data are decoded and in this case, a ciphering key different from each communication is shared in common by the 1st and 2nd equipments. The equipment is provided with a public key generating means 310 generating a public key Y, a common share key generating means 320 generating a common key shared in common by the communication parties and a decoding means 360 generating a ciphering key every time a main text M is ciphered, generating the same decoding key as the ciphering key used for ciphering and decoding a ciphered text C.  Then the ciphering key and the decoding key are generated for each communication to generate a different ciphered text from each communication even when the communication main text is the same.
Patent JP-H09204813-A (JP)
Title: Luminaire for under shelf
Inventor: MATSUBARA TOSHIO
IPC: A47F11/10
Filed: 1996-01-25
Abstract: PROBLEM TO BE SOLVED: To eliminate posiibility that a mounting member is attached to a luminaire body upside down. SOLUTION: A luminaire concerned is equipped with a thin and long body 1 on whose undersurface a thin and long light source is mounted and mounting members 3 which are installed at the ends of the luminaire body 1 and is furnished with a vertical piece 3b directed downward at the tip of a horizontal piece 3a in a plate form. The two side ends of the horizontal piece 3a are inserted in a pair of slide grooves 1b formed opposingly across the width at the ends of the body 1 about the longitudinal direction and detained slidably, and the mounting members 3 are hitched at a pair of brackets 6 installed at a certain spacing and set overhead between brackets 6.  At the horizontal piece 3a, an upset mount preventing means 8 is instailed to prevent the mounting members 3 from being mounted upside down to the slide grooves 1b, wherein the means 8 is formed by seam folding one side end of the horizontal piece 3a toward the undersurface in such an arrangement that only one slide groove 1b can be inserted to the seam folded part 8a.
Patent JP-S60156804-A (JP)
Inventor: BABA YOSHIO
IPC: E01C5/06
Filed: 1984-01-26
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S60173650-A (JP)
Title: Managing system of lot of information transfer
Inventor: KINOHARA SEIJI
IPC: G06F15/17
Filed: 1984-01-26
Abstract: PURPOSE:To attain effective use of a memory in a device at reception side by transferring information when it is information to be stored to a secondary storage device according to a predetermined protocol so as to allow the device at reception side to store it without assembling. CONSTITUTION:An information unit IU transferred from an input data line to a transmission buffer 8 is decomposed by a transport unit TU and transferred to a communication processing device 5. When the transmitted TU is processed after it is assembled into the IU at the device at reception side, an IU assembling display is set and then the TU is transferred to a TU transmission device 9. The TU transferred to the TU reception device 12 is discriminated for whether or not the IU assembling display is set by a display discrimination device 18 and when it is set, the TU is transferred to a reception buffer 14 and transferred to IU information processing device 15 after the TU is assembled into the IU. When the display is not set yet, the TU is transferred directly to the secondary device 16, where the TU is assembled into the IU and only the information required for information processing is transferred to the IU information processing device 15.
Patent JP-H05206259-A (JP)
Title: Semiconductor integrated device
Inventor: NAKAMURA TOKUO
IPC: H01L21/76
Filed: 1992-01-24
Abstract: PURPOSE:To provide a semiconductor integrated device which is easily designed and manufactured, in which reduction in size of a chip is realized and which has dielectric isolation substrates having different depths. CONSTITUTION:Symbols H1-H5 denote high breakdown voltage islands of deep islands. Symbols L1-L5 denote low breakdown voltage islands of shallow islands. Symbols D1-D3 denote dummy islands. The islands H1-H5 are disposed collectively on the left side, and the islands L1-L5 are disposed collectively on the right side. A boundary between the islands H and L is linearly disposed. The islands D1-D3 of the shallow islands in which a semiconductor element is not formed at the boundary between the islands H and L are linearly provided corresponding to the islands H and L.
Patent JP-H04245216-A (JP)
Title: Optical isolator
Inventor: WATANABE TOSHIAKI
IPC: G02F1/09
Filed: 1991-01-31
Abstract: PURPOSE:To provide an optical isolator of lesser insert loss, with which complying with multiple wavelength communications can be made even though a single, small-sized isolator is used and which can exert sufficient light extinguishing performance even for various wavelengths being transmitted. CONSTITUTION:An optical isolator according to the invention comprises a polarizing element 1, Faraday rotor 3, and analyzer 2, which are arranged in the sequence as named. The Faraday rotor 3 is of a garnet structure having a composition expressed as (Y1-a-bLnaBib)3(Fe1-c-dMcTid)5O12, where Ln is at least one of the elements Er, Tm, Yb, Lu, and M is Al and/or Ga, and also (a, b) shall meet the conditions 0<a<=0.4. 4.0<b<=0.1 while (c, d) meet the conditions 0<=c<=0.1, 0<=d<=0.01.
Patent JP-H01186945-A (JP)
Title: Processing method for silver halide color photographic sensitive material
Inventor: ISHIKAWA TAKATOSHI
IPC: G03C7/30
Filed: 1988-01-21
Abstract: PURPOSE:To decrease the change of photographic characteristics by processing the photosensitive material by a color developing soln. contg. an arom. primary amine color developing agent, org. phosphonic acid chelate agent and specific compd. CONSTITUTION:The photosensitive material is processed by the color developing soln. contg. the arom. primary amine color developing agent, the org. phosphonic acid chelate agent and the compd. expressed by formula I. In formula, R<1>-R<3> denote a hydrogen atom., alkyl group (preferably 1-20C), aryl group (preferably 6-20C), heterocyclic group (preferably 1-20C), etc.; R<4> denotes a hydrogen atom., hydroxy group, alkyl group (preferably 1-20C), aryl group (preferably 6-20C), heterocyclic group (preferably 1-20C), aryloxy group (preferably 6-20C), etc.; X<1> is preferably a divalent org. residue; (n) is 0 or 1. The change of the photographic characteristics at the time of continuous processing is thereby decreased.
Patent JP-H05202556-A (JP)
Title: Aqueduct of vacuum type sewage
Inventor: FUJIMOTO JUNICHI
IPC: E03F5/22
Filed: 1992-01-24
Abstract: PURPOSE:To prevent lowering of degree of vacuum come from the head on passing through under obstacles like a river or something like that. CONSTITUTION:A vacuum sewage pipe 2 on the upstream side installed on one side of a river 1 is connected to an inflow tank 7 and a vacuum sewage pipe 3 on the downstream side laid down on the other side of the river is connected to an outflow tank 8. These tanks 7, 8 are jointed to each other through a siphon tube 4 and a vent pipe 5 spanning above the river 1. Since the sewage in the vacuum pipe 2 at the upstream is conducted to the vacuum pipe 3 on the downstream side by the siphon principle, the vacuum spread from a vacuum station to the vacuum sewage pipe 3 on the downstream side is spread to the vacuum sewage pipe 2 on the upstream side without reduction of vacuum. Accordingly, the sewage collecting area by a vacuum type sewage collecting system is widened and the piping work is made easy.
Patent JP-H05201232-A (JP)
Title: Blower control device for air conditioner
Inventor: MURAKI TOSHIHIKO
IPC: B60H1/00
Filed: 1992-01-24
Abstract: PURPOSE:To provide a comfortable, gentle wind without interfering with the starting characteristic in very cold time by controlling an applied voltage to a blower driving motor based on the atmosphere temperature detected, when the calculated blow-off air quantity is at least a lower limit value. CONSTITUTION:Detected information from a temperature setting device 11 of a control panel, internal and external air sensors 12, 13 for detecting the temperatures inside and outside a car cabin, a solar radiation sensor 14, and on water temperature of an engine, etc., is introduced into an automatic control circuit 10 for a target blow-out air temperature to be calculated in answer to the information. Based on the target blow-out air temperature, a voltage which is according to the smoothness of rotation of a block motor 2 is applied so that a blower does not blow more air than necessary when the air quantity is a minimum. The motor is thus positively started to provide a comfortable and gentle wind.
Patent JP-S58128760-A (JP)
Title: Semiconductor device
Inventor: AGATA YOSHIO
IPC: H01L27/08
Filed: 1982-01-27
Abstract: PURPOSE:To form an inductance element by a semiconductor layer by connecting sections among the contrary end sections of a plurality of rectangular semiconductor regions formed onto a semiconductor substrate by conductor layers. CONSTITUTION:n-Pieces of rectangular reverse conduction type regions 2 are formed adjacently onto one conduction type semiconductor substrate 1, and an insulating layer 3 is formed onto the surface of the substrate 1. The insulating layers 3 at both ends of the regions 2 are removed, contrary both ends of adjacent regions 2 are connected by the conduction type layers 4, and a coil is formed. Accordingly, the inductance element can be formed by the semiconductor layer, and the device can be miniaturized and simplified.
Patent JP-H0739612-A (JP)
Title: Integral head of stick for lacrosse
Inventor: RICHIYAADO BII SHII TATSUKAA S
IPC: A63B59/02
Filed: 1994-01-06
Abstract: PURPOSE: To provide a lacrosse stick having an integral plastic frame and a head having a pocket by specifying the values of the width between the side walls of the frame from the deepest point of the molded pocket area of a net to a portion just inside it and the depth from the deepest point of the pocket to the open surface of the frame. CONSTITUTION: The frame of a lacrosse stick head 10 has an almost V-shaped structure, the lower end of the head is formed as a throat, and two side walls 16, 19 are inclined and diverged to the outside of the top from the bottom and are closed by a scoop or a traversing wall 14. A net 12 is integrated with the frame and includes a ball guide area 11 and a pocket area 13. By the extension of a pocket from the deepest part Y, the dimension between the side walls 16, 18 becomes that between points X1 -X2 located on almost the opposite side, and the width between the points X1 , X2 is 2 inches. Also, the maximum depth of the pocket from a point Y to a line connecting the points X1 , X2 is 35/8 inches.
Patent JP-S5294938-A (JP)
Title: Carburator
Inventor: OSANAMI KENICHI
IPC: F02M7/04
Filed: 1976-02-06
Abstract: PURPOSE: To reduce the dispersion, at the starting time of power valve, of set load of the spring forcing piston downwards with power valve which rises by the engine suction negative pressure without any adjustment by making the set load less than 30% of the total of set load and the total weight of piston and others. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-2000213069-A (JP)
Title: Mounting method for cable support device for insert and cable support device for insert
Inventor: IBAYASHI SADAYOSHI
IPC: E04B1/41
Filed: 1999-01-20
Abstract: PROBLEM TO BE SOLVED: To provide a method for mounting a cable support device for insert and the cable support device for insert capable of increasing work efficiency of works from insert mounting work to cable supporting work without depending on a process until a ceiling face is completed and eliminating dangerous work at an elevated place. SOLUTION: A mounting hole P1 for mounting insert S is drilled on a top face of a deck plate P by a tool for drilling hole, and a cable support device 1 is provided in a lower end part of the insert S mounted in the mounting hole P1 from above the mounting hole P1. In this case, the cable support device 1 is connected with a lower end of the insert S in advance, the cable support device 1 is inserted from above the mounting hole P1, and the insert S is mounted in the mounting hole P1 together with the cable support device 1.
Patent JP-H04246857-A (JP)
Title: Semiconductor integrated circuit device
Inventor: MIYAZAKI SHINICHI
IPC: H01L23/52
Filed: 1991-02-01
Abstract: PURPOSE:To obtain a semiconductor integrated circuit device where a time required for the redesign and remanufacture of it can be shortened when logic gates are changed in interconnection by a method wherein all connection wires between logic gates on a chip are made to partially use the uppermost wiring layer without fail. CONSTITUTION:A logic circuit is wrongly designed, and when an input signal wire 12 of a logic gate 3 connected to the output signal of a logic gate 2 is changed to be connected to the output signal wire 15 of a logic gate 14, a wiring 5 of a second aluminum wiring layer is removed from the photomask layout pattern of the second aluminum wiring layer. Then, a signal wire 16 which connects a through-hole 13 provided onto the output signal line 15 of the logic gate 14 with a through-hole 10 provided to the input signal wire 12 of the logic gate 3 is added to the photomask layout pattern of the second aluminum layer. As mentioned above, logic gates can be changed in interconnection by only redesigning a second aluminum wiring layer.
Patent JP-H03216656-A (JP)
Title: Resist pattern forming method and resist material
Inventor: ABE NAOMICHI
IPC: G03F7/075
Filed: 1990-01-23
Abstract: PURPOSE:To enable dry development of a resist in a dry atmosphere by using a mixture of a specified polymer with a specified compd. as an additive as the resist. CONSTITUTION:A mixture of a polymer represented by formula I with a compd. represented by formula II as an additive is used as a resist. In the formula I, each of R<1> and R<2> is H, 1-10C alkyl, etc. In the formula II, each of R<3>-R<5> is H or aryl(phenyl or naphthyl) contg. 1-3 benzene rings which may be substd. by 1-4C alkyl but all of R<3>-R<5> are not H. When the resist is treated in oxygen plasma or at the downstream side of oxygen plasma, the exposed part of the resist is etched at a low etching rate because Si atoms and aryl groups are contained and a fine negative pattern can be formed. Dry development in a dry atmosphere (vapor phase) is enabled.
Patent JP-H05202249-A (JP)
Title: Polypropylene film having high rigidity and excelent impact resistance
Inventor: KITABAYASHI KOJI
IPC: C08J5/18
Filed: 1992-01-27
Abstract: PURPOSE:To obtain the title film excellent in the lance between rigidity and impact resistance and especially in low-temperature impact resistance by mixing a polypropylene resin with a liquid paraffin and a modified polymethylsiloxane and molding the resulting mixture. CONSTITUTION:The title film is obtained by molding a resin composition prepared by mixing 100 pts.wt. polypropylene resin comprising a propylene homopolymer and/or a propylene/ethylene copolymer and having an ethylene content of 0-2wt.% with 0.2-5.0 pts.wt. liquid paraffin and 0.1-0.50 pt.wt. modified polymethylsiloxane having the value of A of 1/8 or above [wherein A is as defined by the proton nuclear magnetic resonance spectrum relationship represented by the formula (wherein a is the intensity of resonance absorption ascribable to Si-bonded CH3, b is the intensity of resonance absorption ascribable to C-bonded CH3, and c is the intensity of resonance absorption ascribable to O-bonded CH2 and CH) in the proton nuclear magnetic resonance spectrum of the modified polymethylsiloxane as measured in a deuterated chloroform solution in a concentration of 75mg/ml at 24  deg.C].
Patent JP-S60160358-A (JP)
Title: Brushless dc motor
Inventor: TAKABA YOUSUKE
IPC: H02K1/14
Filed: 1984-01-27
Abstract: PURPOSE:To reduce the size and to enhance the performance of a brushless DC motor by forming pole pieces in a special shape having the first to third portions and eliminating unnecessary spaces. CONSTITUTION:A brushless DC motor has a stator 10 and a rotor 12 supported rotatably to the stator 10. The stator 10 has a stator core 16 including pole pieces 14, a stator winding 18, a housing 20 and a shield 21. The piece 14 has the first portion extending radially outward from the hub of the core 16, the two second portions extending in the direction farther substantially in the circumferential direction from the outer end of the first portion, and the third portion extending radially outward from the circumferential end of the second portion. The first and second phase coils 36, 38 are wound on the piece 14.
Patent JP-S62171227-A (JP)
Title: Semiconductor integrated circuit
Inventor: SUZUKI TAKAMASA
IPC: H01L27/082
Filed: 1986-01-22
Abstract: PURPOSE:To decrease the current of the emitter to which a potential higher than the potential of the collector is given by connecting at least one emitter of multi-emitter structure and a base. CONSTITUTION:A transistor (TR) Q1 of the multi-emitter structure has four emitter electrodes of the same structure, the three emitters are used respectively as input terminals I1, I2 and I3 and the remaining emitter is connected to the base. Figure shows a current state as an example of the input state, two terminals among the three input terminals connect to the high level output of a TTL circuit and the one is connected to a low level output of the TTL circuit. Let the current flowing from a high level input terminal be IE, the current amplification factor at the inverse TR operation of the TR Q1 be betaI, and the current flowing to the resistor R2 be IC, then a current of IB+2betaI.IB /1+betaI+IC flows to the emitter of a low level and the current is smaller than that of a conventional circuit.
Patent JP-S62171274-A (JP)
Title: Image area separating device
Inventor: TAKASHIMA HIRONORI
IPC: H04N1/40
Filed: 1986-01-22
Abstract: PURPOSE:To separate the dot area and the line drawing area even when a dot photograph with unknown line number and angle and a line picture exist in mixture by emphasizing the high frequency component of a spatial frequency of an input picture signal to obtain a binary-picture signal and discriminating whether the area is the dot photograph area or the line picture area depending on the presence of white or black closed area in the prescribed area of the said signal and storing the result with priority when the area is the dot photograph area. CONSTITUTION:The high frequency component in the spatial frequency component of an input picture signal is emphasized by a 2-dimension digital filter 11, and the result is converted into a binary picture signal at a fixed threshold by a binarization circuit 12. Whether or not a black picture element surround by a white level or a white picture element surrounded by a black level exists in a noted area by a closed area is detected by a closed area detection circuit 13 and when in existence, logic 1 is outputted as the existence of the closed area and when not, logic 0 is outputted. A write circuit 14 receives the output of the detection circuit 13 to write the result of closed area detection to a position corresponding to a built-in picture memory. The write is applied to OR logic with the priority of 1 at the write and the result is outputted from a terminal 102.
Patent JP-S63181330-A (JP)
Title: Manufacture of semiconductor device
Inventor: KASE MASA
IPC: G03F1/82
Filed: 1987-01-23
Abstract: PURPOSE:To shorten the process by cleaning the inner surface of a groove formed in a silicon substrate using a cleaning liquid which is faster in the etch rate of the etching mask of the silicon substrate than in the etch rate of the substrate, thereby beveling the opening part of the groove. CONSTITUTION:With a silicon dioxide film 22 on a silicon substrate 21 as a mask, the silicon substrate 21 is etched to form a groove 25 in the substrate 21, and thereafter the inner surface of the groove 25 is cleaned using a cleaning liquid which is faster in the etch rate of the etching mask 22 than in the etch rate of the silicon substrate 21, e.g., a mixed liquid of hydrofluoric acid, acetic acid and pure water. As a result, in a groove opening part 24, the silicon substrate 21 surface surrounding the opening part 24 is exposed. And, when the substrate 21 surface surrounding the groove opening part 24 is exposed in this way, the substrate silicon of the corner section of the groove opening part 24 is etched from the lateral and vertical directions, so the corner section becomes a taper 28, whereby a groove with a taper 28 in the opening part 24 is formed. With this, the etching of the substrate can be shortened.
Patent JP-H01191395-A (JP)
Title: Output circuit
Inventor: UCHIBORI KIYOBUMI
IPC: G11C11/417
Filed: 1988-01-25
Abstract: PURPOSE:To speed up an output circuit without increasing a consuming current by disposing a data inverting means for inverting an outputted data signal in the prestep of a final output step and temporarily supplying reverse data obtained by inverting the previous data immediately before an output signal is changed to the output step. CONSTITUTION:Based on the output data signals DT, -DT supplied from an internal circuit, AND gates G1, G2 forming the driving signal of MOSFET Q1, Q2 and exclusive OR logical gates G3, G4 are disposed on the prestep of the output step to temporarily supply the reverse data obtained by inverting the previous data to the output step immediately before the output signals DT, -DT are changed. Namely, according to the reverse data supplied to the output step, output transistors Q1, Q2 are reversely operated to a preceding time to preset an output terminal to Vcc/2. Thereby, an equalizing MOSFET is not required nor passes a through current to speed up the output circuit without increasing the consuming current.