baber/WOPTO huggingface dataset:
Patent JP-S59212345-A (JP)
Title: Paper feed mechanism for horizontal serial printer
Inventor: KIURA RIYUUJI
IPC: B65H19/10
Filed: 1983-05-14
Abstract: PURPOSE:To provide a paper feed mechanism of simple construction and stable paper setting for a horizontal serial printer, by mounting a medium setting sensor and a stoppage sensor between two feed rollers. CONSTITUTION:A sensor 15 for detecting the setting of a medium and a stoppage sensor 16, which detects the upper end of the medium which is used as a reference for the printing position on the medium, are mounted between feed rollers 12, 12'. The sensor 15 is located near upstream to the contact line 17 of the medium 11 and the rollers 12, 12' with regard to the processing direction P of the medium. The other sensor 16 is located downstream to the contact line 17. When the medium 11 is inserted in between the rollers 12, 12' and pinch rollers 14, 14', the medium is detected by the sensor 15. Since the sensor 15 is located near the contact line 17, the medium 11 is not detected when it is obliquely inserted. The medium is thus prevented from remaining obliquely inserted.
Patent JP-S62239736-A (JP)
Title: Circuit switching device
Inventor: KUNIDO JIYUNICHI
IPC: H04L1/00
Filed: 1986-04-11
Abstract: PURPOSE:To reduce jitters of a bipolar data signal which is outputted by equipping respective systems with a circuit which has narrow-band selectivity for reducing the jitters. CONSTITUTION:A stand-by system is equipped with a narrow-hand filter 18 and an in-use system is equipped with a narrow-band filter 5. A received signal processing circuit 7 separates added bits and performs reverse speed conversion to send a data signal 116 to a code converting circuit 9, so that a clock signal 115 is inputted to the narrow-band filter 5. The narrow-band filter 5 is a narrow- band filter having a center frequency as high as a clock frequency and has function for reducing jitters due to the speed conversion; and jitters in the clock signal 115 are compressed and a clock signal 117 having reduced jitters is outputted. A code converting circuit 9 performs multiplication with the clock signal 117 having the jitters reduced and performs unipolar-bipolar conversion. Therefore, the jitters of the bipolar data signal 118 outputted by the code converting circuit 9 are improved greatly.
Patent JP-H09275581-A (JP)
Title: Portable radio device
Inventor: HAMA NORIO
IPC: H04W84/02
Filed: 1996-04-05
Abstract: PROBLEM TO BE SOLVED: To use a portable radio device as a clock by adding such functions to a control part consisting of a microcomputer as a clock, a battery voltage detection part, a battery discrimination means and a receiving operation control means. SOLUTION: This device serves as a clock 23 as well as a radio device 22 which can perform the intermittent receiving operations. The clock (control part) 23 functions as a microcomputer which includes the functions of a battery voltage detection part, a battery discrimination means and a receiving operation control means in addition to a clock. The voltage detection part detects the voltage of a battery B contained in this device. The battery discrimination means decides whether the battery B is identical with the prescribed one based on the detected voltage of the battery B. A receiving operation control means stops the receiving operations of the device 22 when the battery B does no satisfy the prescribed specification and also controls to instruct the device 22 to perform the intermittent receiving operations only in a prescribed time band.
Patent JP-H02261234-A (JP)
Title: Broadcast installation equipment
Inventor: ENAMI KAZUMASA
IPC: H04H60/95
Filed: 1989-03-31
Abstract: PURPOSE:To decrease the number of console panels with respect to an equipment group to be controlled, to decrease the occupied space and to facilitate the handling by providing an assignment device and applying the control of applying one console panel to one equipment to be controlled selectively through a communication path. CONSTITUTION:Switchers 21-24 have respectively interfaces 211 and data processing sections 212 and introduce an operation signal and an assignment signal via a local network 25. The processing section 212 enables the reception circuit of an operation signal when an assignment signal designating itself is discriminated, stores the signal into a register and an internal signal processing circuit is controlled in response to the operation signal. A final video signal selected and introduced by each switcher is outputted from the switcher 24. The switchers being plural devices to be controlled are operated by one console panel in this system and the number of console panels is far decreased than the number of a conventional system.
Patent JP-H07267900-A (JP)
Title: Production of high-purity 3-alkoxyisolactic acid esters
Inventor: TAKAYANAGI YASUYUKI
IPC: C07C67/48
Filed: 1994-03-31
Abstract: PURPOSE:To obtain the subject compound useful for perfumes, cleaning agents, solvents, synthetic raw materials, etc., by reacting specific methacrylic acid esters with alcohols in the presence of a basic catalyst, controlling pH of the reacted liquid and then, distilling the reactional product. CONSTITUTION:A methacrylic acid ester of the formula (R<1> is a 1-8C alkyl, a cycloalkyl or an aralkyl) (preferably methyl methacrylate, ethyl methacrylate or butyl methacrylate) is reacted wnth alcohols of the formula R<2>-OH (R2 is a 1-4C alkyl) (preferably methanol, ethanol or butanol), preferably in a molar ratio of 1:(1-5) in the presence of a basic catalyst (e.g. an alkali metal or alkali metal hydroxides) and then, pH of the reacted liquid is controlled so that pH of an aqueous solution containing 10wt.% of the reacted liquid is 8-10 and then, the reacted liquid is distilled to provide the objective compound.
Patent JP-S567342-A (JP)
Title: Fluorescent lamp
Inventor: YANAGI TADASHI
IPC: H01J61/16
Filed: 1979-07-02
Abstract: PURPOSE:To reduce the painting amount of an expensive rare earth element fluorescent with high efficiency and high color renderability as well as control the increase of power consumption of lamp by confining a mixed rare gas containing mercury and a specific amount of krypton in a tube of a specific diameter with a specific charging pressure. CONSTITUTION:A mixed rare gas, consisting of mercury gas and a charging gas containing 30-70% krypton, e.g., krypton-argon, krypton-neon, or krypton-argon- neon, is confined into a rapid start type 110W straight tube fluorescent lamp, approx. 2,400mm. long and 32-35mm. in diameter, with a charging pressure of 1.5- 2.5 torr. Thus, the rise of lamp voltage can be suppressed, the power of the lamp can be controlled to a specified standard value or less, starting can be made easier, and the life of the lamp can be lengthened.
Patent JP-H07272969-A (JP)
Title: Manufacture of multilayer ceramic capacitor
Inventor: ANPO TAMIKO
IPC: C25D3/12
Filed: 1994-03-29
Abstract: PURPOSE:To provide the manufacturing method of a multilayer ceramic capacitor in which the degradation of an insulating property due to a progressive exfoliation or to the detachment of particles at the interface between a ceramic layer and an internal electrode layer and at the interface between a capacitor element and an external electrode is not generated. CONSTITUTION:When an external-electrode intermediate layer 4 constituting an external electrode B is formed by an electrolytic plating method, a plating electrolytic solution in which at least one kind selected from nickel trifluoroacetate [Ni(CF3(COO)2], nickel perchlorate [Ni(CO4)2] and nickel sulfamate [Ni(OSO2NH2)2] has been dissolved in an organic solvent is used as an electrolyte.
Patent JP-S58152529-A (JP)
Inventor: HAMADA ATSUO
IPC: A47L9/10
Filed: 1982-05-18
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H05143517-A (JP)
Title: Personal computer system
Inventor: RICHIYAADO BIRARUKONSUKI
IPC: G06F13/14
Filed: 1992-04-06
Abstract: PURPOSE: To evade the failure of an application program software caused by improper assumption related with the operational characteristic of a keyboard controller. CONSTITUTION: A personal computer is provided with a local processor bus 34, microprocessor 32, volatile memory 64, memory controller 36, and bus controller 48 connected with the local processor bus 34. A keyboard controller 78 and the computer system cooperate, a control data word, mask value, and changed data derived to an output port register by application program software are read, and the new control data word is written in the output port register. Only the part of the control data word which is normalized so as to be changed by the mask value is changed.
Patent JP-S539393-A (JP)
Title: Preparation of glutathione
Inventor: MIYAMOTO TATSU
IPC: C12R1/38
Filed: 1976-07-14
Abstract: PURPOSE: To produce glutathione in high yield by the cultivation of C 1 compound-assimilating microorganisms belonging to Methylomonas or Pseudomonas genus. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-S59206249-A (JP)
Inventor: KURISUCHIAN RIKAARU
IPC: B60T8/26
Filed: 1984-04-27
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H07296112-A (JP)
Title: Character segmenting device
Inventor: HOTSUTA YOSHINOBU
IPC: G06K9/34
Filed: 1994-04-22
Abstract: PURPOSE:To reduce processing time and to avoid the problem of erroneously merging adjacently written characters each other. CONSTITUTION:This device is provided with means 3 and 4 for extracting only the pattern provided with a prescribed feature, means 5 for calculating a contour line to be decided by weighting and expanding the respective parts of the extracted pattern, and means 6 for merging the calculated contour line and the other adjacent pattern when that contour line comes into contact with that pattern. On the other hand, a rectangle circumscribed with the pattern is extracted based on connection information as the prescribed feature, the average size of respective characters in a character string is calculated based on the extracted rectangle, any pattern which size is smaller in comparison with this average size or the directivity of the pattern is calculated, and only the pattern provided with certain specified directivity (longitudinally long) is extracted. Further, in order to extract the contour line by weighting and expanding the respective parts of the pattern, the sequence of dots decided by prescribed expanded width for each part of this pattern is connected.
Patent JP-H10259259-A (JP)
Title: Control of reaction finish point in single molecular film surface treatment in liquid phase
Inventor: MIURA YUJI
IPC: C08J7/00
Filed: 1997-03-17
Abstract: PROBLEM TO BE SOLVED: To enable to accurately control a reaction finish point in a single molecular film surface treatment in a liquid phase by precisely measuring the changes in the mass of the single molecular film on the surface of a substrate to be treated, wherein the changes are accompanied by the single molecular film-forming reaction. SOLUTION: In the single molecular film surface treatment for forming the single molecular film on the surface of a substrate to be treated in a state that the substrate is immersed in a liquid phase, the substrate, a quartz resonator having a mass change- detecting surface in a state capable of being subjected to the same surface treatment as that of the substrate, and a measuring device (temperature sensor) for detecting the changes in the temperature of the liquid phase are immersed in the liquid phase, and the temperature of the liquid phase is subjected to a feed-back control so that the liquid phase temperature detected with the temperature sensor is maintained at a constant temperature, and it is judged that the single molecular film surface treatment reaction is finished at a point when the change in the frequency of the quartz resonator is settled.  The method is useful for wet type chemical adsorption treatments using organic silicon compounds, etc.
Patent JP-S60227481-A (JP)
Title: Constant-voltage smiconductor device
Inventor: KOMATSU YUUJI
IPC: H01L29/866
Filed: 1984-04-26
Abstract: PURPOSE:To enable operation at low supply voltage by forming a P-N junction having high impurity concentration contributing to breakdown to a shallow section in a semiconductor substrate. CONSTITUTION:A P type buried layer 2, an N type epitaxial layer 3 and a P type diffusion layer 4 having high concentration are shaped to the surface of a semiconductor substrate 1. A shallow N type region 9 having low impurity concentration is formed to the surface of the layer 4. An N type region 10 having high impurity concentration surrounding the layer 4 and the layer 9 is shaped annularly while being brought into contact with the layer 4 and the layer 9. Breakdown is generated in sections where the layer 4, the region 9 and the region 10 are in contact in the structure. That is, impurity concentration at the position of a junction is made approximately the same as the surface concentration of the layer 4, and a sufficiently low value is obtained in response to the magnitude of the surface concentration of the layer 4 as breakdown voltage. According to said structure, excellent noise performance can be acquired only by a small amount of currents because current density can be increased.
Patent JP-S5512715-A (JP)
Title: Container for high purity ic wafer
Inventor: ANDOU HIROSHI
IPC: H01L21/02
Filed: 1978-07-13
Abstract: PURPOSE: To increase resistance to impact as well as to reduce weight by providing a pantagraph type pussing body that is capable of assembling and disassembling and is parallel to upright rims which are parallel and equally spaced on the upper center of the inner surface of a lid.  
     CONSTITUTION: When a wafer 5 is inserted between two guide pins 2, the lower side of the periphery of the wafer 5 comes into contact with ribs 3 and 4 and is supported by them. Thus the part of the wafer near the guide pins 2 is located in the air and is only separated by each wafer guide pin 2. When the straight section of wafer 5 is located to the guide pins 2 and then the wafer is brought into contact with the wafer supporting ribs 3 and 4 and is placed on them, the ribs 3 and 4 are pressed outward by the periphery of the wafer. Therefore, the wafer 5 is elastically supported by the ribs 3 and 4, thus absorbing impact from the bottom of the box. As a result, breakage of the wafer 5 is prevented. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S58200230-A (JP)
Title: Automatic exposure adjusting device
Inventor: HIRAI SHIROU
IPC: G03G15/00
Filed: 1982-05-19
Abstract: PURPOSE:To adjust the exposure automatically and properly to information of a device which selects freely a position to be set to a proper density from all of regions of an original preliminarily and detects the density of this position, by incorporating this device in a copying machine. CONSTITUTION:A detector 3 is stored in a density detector storing chamber 11 provided in a part of an operation panel 1a which is formed on one side of an original placing table 2 of a copying machine body 1, and a lamp 4 and a lens 5 are so constituted that the intersection between their optical axes is placed on the surface of the original put on the operation panel 1a. The detector 3 is taken out from the chamber 11 and is inverted and is set onto a selected ground part O1 of the original put on the platen 2, and the original is illuminated by a light source 4, and the reflected light is focused on a photodetector 6 by the lens 5 to read the reflection density. The output signal of the density of the photodetector 6 is sent to a processing system circuit, and the quantity of light of an illumination lamp of an original scanning system or/and a charger, a development bias, a lens aperture, a slit width, etc. are controlled to perform the automatic exposure adjustment.
Patent JP-2000276068-A (JP)
Title: Display device and electronic equipment
Inventor: ENDO KATSUMA
IPC: G09F9/00
Filed: 1999-03-26
Abstract: PROBLEM TO BE SOLVED: To actualize a display device which is lightweight and thin and simplifies a terminal connecting process. SOLUTION: Data signal driver ICs 27 and 28 are mounted on a projection area 23A of a glass substrate 23 which projects to a glass substrate 24 and electronic components are mounted on there driver ICs 27 and 28. A flexible control circuit board 22 is mounted. A signal output side terminal part 22A of the control circuit board 22 is connected to the end part of an input wire 29 connected to the driver ICs 27 and 28. Further, a scanning output side terminal part 22B of the control circuit board 22 is connected to the end part of an input wire 32 connected to a scanning driver IC 31 mounted on a projection area 24A of the glass substrate 24. Consequently, the control circuit board 22 is arranged at the step part between both glass substrates 23 and 24, and hence the liquid crystal display device 20 can be made thinner.
Patent JP-H07298095-A (JP)
Title: Dc transmission ratio correction circuit
Inventor: SAKAGUCHI TAKASHI
IPC: H04N5/18
Filed: 1994-04-22
Abstract: PURPOSE:To correct a DC transmission ratio depending on a setup by varying a DC transmission ratio correction quantity with a simple configuration without provision of an externally mounted resistor. CONSTITUTION:The circuit is provided with black level extension circuit means 2, 3 extending a luminance signal level from an input terminal 1 set to a black level than a preset 1st level, an average video level detection means (R2., MOSFET8, Cext) detecting an average video level of the luminance signal outputted from the black level extension circuit means 2, 3, a means 6 changing the 1st level of the black level extension circuit means 2, 3 depending on an average video level detected by the average video level detection means, a voltage division means (MOSFET8) dividing a voltage between the average video level and the luminance signal outputted from the black level extension circuit means 2, 3 and a means (5, SW) comparing the divided voltage with a reference voltage and changing the level of the luminance signal outputted from the black level extension circuit means 2, 3 depending on the comparison result for a blanking period.
Patent JP-S5419357-A (JP)
Title: Production of semiconductor device
Inventor: NAKAMURA TETSUO
IPC: H01L21/52
Filed: 1977-07-14
Abstract: PURPOSE: To use perforated pressure-sensitive adhesive tapes in order to prevent dislocation of chips in pre-mounting process and to considerably reduce the remaining of chips at the mounting. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H01256838-A (JP)
Title: Signal transmission system
Inventor: HANABATAKE TOSHIO
IPC: H03M5/06
Filed: 1988-04-06
Abstract: PURPOSE:To transmit a signal of frame constitution without generating a pseudo synchronizing signal and almost any reduction of data transmission quantity by transmitting a frame signal to take coded synchronization and a data signal as information with multiplex in accordance with the CMI coding rule where 2-bit of a data signal is used as one data. CONSTITUTION:Switches SW1, SW2 are thrown normally to the position shown in dotted lines and a data is outputted as '1, 1, 0, 0' as shown in figure (A), for example, at a period inserting a frame signal from a frame signal generating section 3 and at a period taking 2-bit of a conventional NRZ code data as one data constituting a frame signal, the data is subjected to CMI coding by a CMI coding section 1 and a frame signal of '0, 0, 1, 1, 0, 1, 0, 1' as shown in figure (B) is inputted to a multiplexing section 2. Then a data signal being the result of superimposing the NRZ code data onto a part excluding the part with the frame signal inserted thereto as shown in figure (C) is sent to the multiplexing section 2, where the signal is multiplexed to be a signal of frame constitution as shown in figure (D) and it is sent. In case of the frame signal applied with CRV, the switches SW1, SW2 are changed over to the position shown in dotted lines.
Patent JP-H05250196-A (JP)
Title: Fault tolerant system of computer
Inventor: SAKAMOTO YOSHIMASA
IPC: G06F15/177
Filed: 1992-03-09
Abstract: PURPOSE:To obtain high reliability and to reduce the cost of the whole constitution by setting either one of normal CPU to transmit the output even if an abnormality occurs in either one of three sets of CPU. CONSTITUTION:CPU 11 to 13 synchronizing mutually and performing the same processing are provided, each output of the CPU 11 and 12 is compared by a first comparison circuit CMP 14, each output of the CPU 12 and 13 is compared by a second CMP 15 and each output of CPU 13 and 11 is compared by a third CMP 16. In this case, if each CPU 11 to 13 is normal, each output of the CPU 11 to 13 is transmitted to an output bus 17 by making them the same state and synchronizing each other and a data processing is performed without interfering each other. In contrast with this, as the CMP 14 and 16 generates uncoincident output if an abnormality occurs in the CPU 11, for instance, and gate circuits GAT 18, 20 are turned off by this, the outputs of the CPU 11 and 13 are hindered, and one set of the normal CPU 12 and 13 or the only output of the CPU 12 is transmitted to the output bus 17.
Patent JP-H09274033-A (JP)
Title: Apparatus and method for measurement of blister-resistant suitability
Inventor: ASAYAMA YOSHIYUKI
IPC: G01N33/34
Filed: 1996-04-08
Abstract: PROBLEM TO BE SOLVED: To judge the blister-resistant suitability of an actual press which is close to that of an offset rotary press by a method wherein a pressurization treatment and a heating treatment are executed to one pair of heating rolls and pressurization rolls at uniform speed or by setting a circumferential speed difference. SOLUTION: A top roll 1 can be heated and pressurized, and a bottom roll 2 can be heated and pressurized as required. The surface roughness value Rmax of the metal rolls 1, 2 is at 0.05 to 2.0μm, a roll circumferential speed is at 0.5 to 500m/min, a circumferential speed difference of 0 to ±10% can be set for the roll circumferential speed, and a pressurization force which is applied to the rolls 1, 2 is at 1 to 6000kg/cm<2> . While a sheet of paper is being passed through an apparatus, a heating treatment and a pressurization treatment are executed to the sheet of paper. Then, moisture in the sheet of paper is evaporated, vapor which is generated is passed through the gap between coating layers so as to escape from the sheet of paper. At this time, when the amount of steam is much so as to be more than its passable amount, a large pressure is generated at the inside.  A temperature which generates a blister when a paper layer is destroyted due to an increase in the inside pressure is evaluated as a blister generation temperature.
Patent JP-H04318033-A (JP)
Title: Antimicrobial film
Inventor: KUBOTA SHIZUO
IPC: B32B27/18
Filed: 1991-04-17
Abstract: PURPOSE:To obtain the subject film, compose of a hydrophilic polymer film containing antimicrobial zeolite, excellent in water absorptivity, antistatic, drip-proof properties and transparency and useful as packaging materials, etc. CONSTITUTION:The objective film is composed of a hydrophilic polymer film, containing, e.g. antimicrobial zeolite having 0.3-6mum average particle diameter. Furthermore, the antimicrobial zeolite in an amount of 10-300mg per m<2> film is preferably contained and the film thickness is preferably <=20mum.