Patent GB-920483-A (GB)
Title: Improvements in or relating to computers
IPC: G06F9/26
Filed: 1961-09-08
Abstract: 920,483. Digital electric calculating-apparatus. TELEFUNKEN PATENTVERWERTUNGS-G.m.b.H. Sept. 8, 1961 [Sept. 10, 1960], No. 32325/61. Class 106 (1). A microprogramming arrangement for a digital computer comprises a first chain of binary elements connected to a plurality of matrices, each of which is arranged to control a series of operations, and a second chain of binary elements which controls the sequence of operation of the said matrices. As shown, Fig. 1, a microprogramming arrangement comprises a chain K 1 (y) of binary elements and a matrix consisting of a first part As and a second part Z<SP>x</SP>. The outputs of the binary elements are connected to both parts A<SP>x</SP>, Z<SP>x</SP>, the outputs 1-21 of the part A<SP>x</SP> being connected to control operations, and the outputs of the part Z<SP>x</SP> being connected back to the energizing inputs e(y) of the binary elements. The " minim-shaped " connections shown represent additional connections with other elements of the computer. Thus the connections k=0 or k=1 on the output W(y 4 ) are made alternatively according to a twostate condition in the computer, and when k=0, the elements y 1 -y 4  form a loop which is retraversed until k becomes " 1," when the element y 5  becomes operative. Instead of only one element of the chain K 1 (y) being energized, r elements may be energized at a time, the the matrix then additionally acting as a decoder. In order that different microprogrammes may be carried out under the control of the chain K 1 (y), the outputs of the chain are connected to a plurality of matrices (not shown), the particular matrix which is operative being determined by a second sequence chain K 2 (x) (Fig. 2, not shown). The matrix of Fig. 1 may be realised as a printed " card " with edge connections, the connection at crossing-points being " and " or " or " gates. In a further arrangement, Fig. 4, the matrix parts A<SP>x</SP>, Z<SP>x</SP> are as in Fig. 1, but an additional part W<SP>x</SP> is provided to determine the number of repetitions of each individual micro-order. The various lines of the matrix part W<SP>x</SP> are connected to the various stages of a counter WZ and when a particular element of the sequencing chain K 1 (y) is activated, an element of the counter WZ is activated via the part W<SP>x</SP> to determine the number of repetitions, the counter controlling gates in the energizing inputs to the chain K 1 (y). WZ may be a binary counter instead of a chain counter. In a further arrangement, the simultaneous working of a plurality of computers in a computing system, or of a plurality of simultaneously operating components of computer, can be controlled. Micro-orders for " petitioning " computers i=1, 2, 3 &c. take the form ym, ik, where m=1, 2, 3 &c. denotes the computer requested and k denotes the priority level which such request is given in the computer m. A control arrangement, Fig. 5, comprises a threedimensional matrix array operated by sequence chains K 3 (i) for the petitioning computers and K 4 (k) for the various priority levels, j representing the various operations required. If the priority class k remains constant, i is advanced sequentially, and the petitioning units are dealt with in turn until there is transfer to a different class k, a random value of i is employed as starting point for the new sequencing. When the system has dealt with the request, it delivers a signal to the petitioning computer which then continues its sequencing under the control of its y chain. Additional flip-flops are provided to indicate when the units m are in use. A k sectional plane of the matrix of Fig. 5 is illustrated in Fig. 6 (not shown).