Patent GB-737917-A (GB)
Title: Telecommunication system
IPC: H04Q11/04
Filed: 1952-02-01
Abstract: 737,917. Automatic exchange systems. STANDARD TELEPHONES & CABLES, Ltd. Feb. 1, 1952 [March 28, 1951], No. 2734/52. Class 40 (4). [Also in Group XL (c)] In a system in which a subscriber making a call is allotted a free time-division multiplex channel for the duration of the call, the calling and called subscribers' numbers are recorded in storage circuits which control the connection of the subscribers to the common transmission path in the time position of the seized channel. When a call is made the wanted number is compared with the stored numbers to ascertain whether or not the called party is busy. In a 100-line electronic exchange, Figs. 2A ... 2D, a single four-wire talking circuit provides twelve time-division multiplex channels each 10.416 Ás. wide. Speech is transmitted by amplitude modulation of the 8 kc., 1 Ás. channel pulses. Each subscriber's line circuit is connected.to three sets of code bars each set consisting of ten tens bars and ten units bars each multipled to line circuits having the corresponding tens or units digits. Chain-connected pulse finders in free register senders pass pulse trains corresponding to idle channels from generator 103 to a pulse finder 105a which passes one train to the common start wire 253. Closure of the caller's loop gates the start pulse to the appropriate bars of the calling outgoing set 106, 107. The simultaneous pulses on the two bars are delayed by the units and tens grouping circuits 108, 109 by amounts from 0 Ás. by units of 1.04 Ás. to 9.37 Ás. corresponding to the digits of the caller's number and the delayed pulses are stored in calling number units and tens storage circuits 160, 159 providing 8 kc. pulse trains which are applied by units and tens separating circuits 121, 120 to the two bars of the calling incoming set 123, 122 connected to the calling line. In passing through the separating circuits'121, 120 the pulse trains are aligned with a 9.37 Ás. delay with respect to the start pulse train. The simultaneous reception of pulse series on the calling incoming bars gates similarly timed channel pulses to and from the common amplifiers 112, 118 in the go and return paths of the talking circuit. The output of the amplifier 112 is gated to the register controller whose pulse finder is locked to the pulse series received by the calling line circuit. This output also operates a pulse suppressor 372 which prevents the seized pulse train reaching the pulse finder 105a which thereupon passes a different series of channel pulses to the start wire. The register controller passes the dialled digits in turn to the hundreds and tens called storage circuits 163, 161 and when the units digit is registered ascertains from the storage circuits whether or not the wanted line is busy. The register controller either reverts busy tone to the caller or sends the units digit to the units called storage circuit 162. In the latter case the register controller releases, operates a pulse suppressor 371 to block the output of the seized channel pulses from the generator 103 and its pulse finder locks to a free series of channel pulses. The pulses from the tens and units called storage circuits 161, 162 are by separating circuits 115, 114 aligned with a 9.37 Ás. delay with respect to the start pulse train and applied to the appropriate two bars of the tens and units called set 117, 116. The simultaneous reception of pulses on the called tens and units bars connected to the called line circuit gates similarly timed pulses from and to the common amplifiers 112, 118. The channel pulses from amplifier 112 cause the called party to be rung. The channel pulses for maintaining the connection are supplied by the storage circuits. When either party releases, a release circuit 124 causes the storage circuits to stop generating the corresponding channel pulses, and their disappearance from the output of amplifier 112 enables the pulse suppressor 371 to pass corresponding pulses to the chain-connected finders of the register controllers. Seizure of free channel by calling line numbered 19. Closure of the caller's loop applies a positive pulse of about 1000 Ás. from line wire 243, Fig. 6, to rectifier 250 and the next start pulse received is gated to the units and tens bars 254, 255 of the calling outgoing set. The pulse representing tens digit 1 is passed through the grouping circuit 109 without delay but the pulse representing units digit 9 is delayed 9.37 Ás. by the grouping circuit 108. Each pulse is applied to the input amplifier 169, Fig. 9, of a storage circuit. The pulse is gated with 960 kc. ¢ Ás. pulses through tube 172 to a magnetostrictive delay line 176 which provides a delay of 125 Ás. which equals the time between pulses in the same channel. The delayed pulse is applied together with the 960 kc. ¢ Ás. pulses to a coincidence circuit 183 whose output is fed to the outlet 198 of the storage circuit and also to the input of the delay line 176. The pulse trains generated by the tens and units calling storage circuits 159, 160 are applied to separating circuits 120, 121, Fig. 17, in which the incoming pulse is passed through an amplifier 206 to a delay line 207 connected at intervals of 1.04 Ás. to the control grids of ten tubes 208 ... 217. The 96 kc. pulse train from which the channel pulses are derived is delayed 9.37 Ás. by line 221 and is applied to the suppressor grids of the tubes 208 ... 217 so that the tube 208 or 217 corresponding to the digit 1 or 9, respectively, receives coincident pulses on its grids and passes them to the corresponding calling incoming tens and units bars 122, 123. Thus simultaneous pulses are received on the incoming bars 264, 265, Fig. 6, of the caller's line circuit and produce positive pulses at the common point of rectifiers 265, 267. The pulses by means of rectifier 268 and a filter create a bias which blocks rectifier 260 so cutting off the start wire 253 from the caller's line circuit. The pulses from bars 264, 265 are also applied through a rectifier 273 to a gating and modulating circuit comprising rectifiers 276, 277 and an amplifier 112A, and, providing the bias received from the loop when the loop is closed is present at the rectifiers 276, 277, the pulses proceed to the amplifier 112 in the go-path of the talking circuit. Dialling and outgoing speech currents pass through transformer 241 and the hybrid 304 to the modulating circuit. Signals from amplifier 118 in the return-path occurring in the seized channel are summated with the pulses applied from incoming bars 264, 265 through rectifier 291 and thus are enabled to pass rectifier 294 to be demodulated by the associated filter circuit anf fed through hybrid 304 to the calling line. Register controller, Figs. 5A ... 5H. The pulses in the seized channel go from amplifier 112 through a 115.63 Ás. delay line 721, Fig. 2A, in the common input lead to the register controllers and are thus brought into phase with the seized start train. The pulse finder locked to the start train gates the delayed pulses through tube 390 of the associated register controller to lead 393. The pulses on lead 393 are fed to the control grid of a pentode 631 to the suppressor grid of which dialling tone is applied and the resulting amplitude modulated dialling tone is transmitted over lead 111 and a 9.37 Ás. delay line to the common return path amplifier 118. The break of a dialled impulse is reflected as a lowering of the level of the 8 kc. input to the register-controller. The impulses are separated out in circuit 377 by a low-pass filter 397 and are differentiated by condenser '398 and resistance 399. The resulting negative pulses are removed by a clamping rectifier 402 and the positive pulses are applied to lead 410 to actuate the register tubes 446 ... 455, successive tubes after the normally conducting start tube 445 being fired and extinguished in turn. The train of pulses from circuit 377 is also applied through an inverter 411 to a low-pass filter 417 which produces a negative pulse corresponding to each digit. This pulse is differentiated and the resulting positive pulse operates a flip-flop circuit 419, 422 to feed a pulse over a lead 427 at the end of each digit to a digit-counting circuit consisting of a normally conducting start tube 428 and tubes 429 ... 431. The pulse at the end of the first digit fires tube 429 which extinguishes 428 so blocking at tube 628 the 8 kc. input to modulator 631 which stops transmitting dialling tone. Each pulse on lead 427 momentarily opens a pentode gate 462 which passes the 8 kc. channel pulses on lead 393. The first pulse gated to a tube 463 is passed to a 1000 Ás. delay circuit 464 which prevents the passage of further pulses and ensures that the digit has been registered before the delayed pulse which is maintained in the seized channel timing by a timing gate 471 is fed to a 9.37 Ás. delay line 477 having ten tappings spaced at 10.41 Ás. intervals. The pulses from the tappings are passed through tubes 500 ... 509 to coincidence gates 520 ... 529. The conducting register tube also biases one of the gates 520 ... 529 so that a pulse from this gate having a time position characteristic of the registered digit and the seized channel is amplified by tubes 561, 562 and applied to the common input to three pentode gates 563, 564, 565 corresponding to the hundreds, tens and units digits respectively. The gate corresponding to the registered digit is opened by the conducting tube 429 ... 431 of the digit counting circuit and the pulse is passed to the corresponding called digit storage circuit 163, 161 or 162, Fig. 2A. The pulse from the delay line 477 passes over lead 571 to operate a flip-flop circuit 573, 574 so that a long negative pulse is applied to lead 582 to extinguish the operated register tube and a long positive pulse is applied over lead 588 to fire the starting tube 445 of the register, which is then ready