baber/WOPTO huggingface dataset:
Patent SA-93140396-A (SA)
Inventor: BERNSTEIN PETER ROBERT
IPC: C07D209/12
Filed: 1993-12-04
Abstract: يتعلق هذا الاختراع بمشتقات اميد جديدة ، مفيدة صيدليا ، لاحماض بنزو الكانوية حلقية متخالفة معينة ( ورباعى زولات و آسيل سلفوناميدات متعلقة بها ) للصيغة (١) واملاحها ، حيث الشقوق R1 ‘و R2 ،و L ، و X ، و Y ، و Z ، و A1 ، و Q ، و A2 ، و M لها المدلولات المذكورة في هذا الوصف .ويتضمن الاختراع ايضا مستحضرات صيدلية تحتوي على مركب للصيغة (١) او ملح منه ، وطريقة لتصنيع المركب المذكور ، بالاضافة الى مواد وسيطة تستخدم في الطريقة الاخيرة .
Patent TW-200300859-A (TW)
Title: Color filter substrate, method for manufacturing the same, liquid crystal display panel, and electronic equipment
Inventor: TAKIZAWA KEIJI
IPC: G02F1/1335
Filed: 2002-11-20
Abstract: The present invention ensures both of the brightness in the reflective display and the chroma in the transmissive display. To solve the problem, each color filter 22 includes a deep-color portion 221 being superimposed on a translucent portion 211 of a reflection layer 21 and a light-color portion 222 having an optical density lower than that of the deep-color portion 221. A light-shielding layer 23 for shielding the gaps between individual subpixels 7 from light is a laminate composed of at least a deep-color portion 221B of a blue color filter 22B, a deep-color portion 221R of a red color filter 22R, and a deep-color portion 221G of a green color filter 22G.
Patent TW-200410090-A (TW)
Title: Method for determining parasitic inductance by using new metal oxide semiconductor FET transmission line equivalence circuit model
Inventor: LAI YONG-LING
IPC: G06F17/50
Filed: 2002-12-09
Abstract: A method for determining a parasitic inductance by using a new metal oxide semiconductor FET transmission line equivalence circuit model, in which the metal oxide semiconductor FET includes a source, a drain, a gate, and a base, comprises: using a special numerical analysis procedure to obtain a linear relationship among the gate parasitic inductance and the source parasitic inductance of the metal oxide semiconductor FET, the drain parasitic inductance and the source parasitic inductance of the metal oxide semiconductor FET, versus the imaginary Z parameters, thereby extracting the gate parasitic inductance, the drain parasitic inductance and the source parasitic inductance of the metal oxide semiconductor FET.
Patent TW-200410412-A (TW)
Title: Method for fabricating floating gate
Inventor: LAY CHAO-WEN
IPC: H01L29/423
Filed: 2002-12-10
Abstract: A method for fabricating a floating gate. A semiconductor substrate is provided. A gate dielectric layer, a conductive layer, a first insulating layer, and a patterned mask layer forming an opening are sequentially formed on the semiconductor substrate. Portion of the surface of the semiconductor substrate is exposed through the opening. The first insulating layer and the conductive layer are sequentially etched to form a rounding bottom corner trench using the patterned mask layer as a mask. The patterned mask layer is removed. A second insulating layer is formed on the rounding bottom corner trench. The first insulating layer and the conductive layer not covering by the second insulating layer are removed using the second insulating layer as a mask. The conductive layer covering by the second insulating layer is retained to be a floating gate.
Patent TW-200404944-A (TW)
Title: Door opening and closing device for processing equipment
Inventor: KAWAHARA MASARU
IPC: F16J13/00
Filed: 2002-12-12
Abstract: Treating rooms 12, 12a of the processing equipment 10, 10a has a front end separated into a plurality of openings 20, 22, each opening having a periphery provided with a seal 24. The door opening and closing device 30 has doors 31 including a number of door members 32, 34 consistent with the number of the openings, and operating devices 36, 37 to operate individual door members independently. While one door member is moved a distance equivalent to the dimension of one opening to transfer a given article to or from the treating room, other openings are closed by other respective door members. As soon as the transfer of the article to or from the treating room is finished, another door member is moved to a position adjacent to the above said one door member to open the opening which was closed previously, and the same operation is repeated.
Patent TW-200412032-A (TW)
Title: Method of analog to digital conversion and means thereof
Inventor: CHEN J D
IPC: H03M1/26
Filed: 2002-12-24
Abstract: A method of analog to digital conversion and means thereof is provided for increasing the resolution of the lower analog current. The analog current is inputted into a plurality of ad converters and digital current is outputted in digital form from the plurality of ad converters. The converters are used to deal with currents in different current operation section thereby increasing the resolution of the lower analog current.
Patent TW-200302843-A (TW)
Title: Solvent for treating polysilazane and treating method thereof
Inventor: SHIMIZU YASUO
IPC: H01L21/304
Filed: 2002-12-26
Abstract: A safe solvent for treating polysilazane has excellent solubility to polysilazane, no influence on the properties of basements such as a semiconductor or a substrate and the residual polysilazane coating film, no clogging of the exhausted liquid line, and little amount of silane gas generated in the exhausted tank. The treatment of the polysilazane is conducted by using a solvent which is a single of mixed solvent comprising one or more solvents selected from the group consisting of xylene, anisole, decalin, cyclohexane, cyclohexene, methylcyclohexene, ethylcyclohexane, limonene, hexane, octane,decane, a C8-C11 alkane mixture, a C8-C11 aromatic hydrocarbon mixture, an aliphatic/alicyclic hydrocarbon mixture containing 5 to 25% by weight of an aromatic hydrocarbon having more than 8 carbon atoms, and dibutyl ether. In 1 ml of the solvent, more than 50 fine particles of 0.5 μ m or more are present. The polysilazane is treated by rinsing the edge of a polysilazane film spin-coated on the semiconductor substrate or by rinsing the back. Preferably, the moisture content of the above solvent is 100ppm or less.
Patent TW-200412416-A (TW)
Title: Multiple propellant initiation
Inventor: O'DWYER JAMES MICHAEL
IPC: F42B5/03
Filed: 2003-01-03
Abstract: A barrel assembly (10) including a barrel (11), a plurality of projectiles (12, 13) axially disposed within the barrel (11) for operative sealing engagement with the bore of the barrel, and discrete selectively ignitable propellant charges; wherein each projectile (13) is associated with a plurality of the propellant charges (16, 18, 20) for propelling the projectiles from the barrel. Operative sealing engagement may be provided by complementary end faces (22, 23 and 25, 26) formed on end portions of cup shaped casings (17, 19) containing the propellant charges (16, 18, 20) and on the body of the projectile. Suitably the propellant charge (16) adjacent the projectile (13) is initially ignited followed by the next adjacent propellant charge (18) in sequence towards the rear of the barrel (11), whilst the projectile remains in the barrel.
Patent TW-200412832-A (TW)
Title: Assembling method of heat dissipation module and heat conducting pipe
Inventor: LIU JUN-FU
IPC: H05K7/20
Filed: 2003-01-09
Abstract: The present invention is related to assembling method of heat dissipation module and heat conducting pipe. In the invention, hole is drilled on the side face of the base of heat dissipation plate. Then, empty metal pipe is placed in the hole. After that, pipe-expansion machine is used to expand both inner and outer diameters of the metal pipe, so as to make the metal pipe tightly combine with the hole. At last, heat conduction material is placed into the metal pipe, and the metal pipe is then sealed.
Patent TW-200303970-A (TW)
Title: Light source unit, lighting device, exposure device and exposure method
Inventor: KOYAMA MOTOO
IPC: G03F7/20
Filed: 2003-01-28
Abstract: An exposure device is provided. The device precisely monitors changes of light amount and adjusts the illuminating quantity to a constant so the light loss is prevented. The exposure device comprises a light source 1, a power supply system 36 to supply power, a reflection mirror 3 which reflects the light to an illuminated side, a light absorption device 8a to absorb the leakage light from the reflection mirror 3, detection means 30a and 30b to detect the quantity of the leakage light, and a power control means 34. The power control means 34 controls a power that is supplied to the light source from the detection means 36 based on the quantity of the leakage light detected by the detection means.
Patent TW-200304878-A (TW)
Title: Transmitter of tire condition monitoring apparatus and tire condition monitoring apparatus
Inventor: SAHEKI SETSUHIRO
IPC: B60C23/20
Filed: 2003-01-28
Abstract: Transmitters of a tire condition monitoring apparatus that monitors condition of vehicle tires. Each transmitter has a measuring sensor, a transmission circuit, a vehicle speed sensor and a controller. The measuring sensor measures condition of the corresponding tire. The transmission circuit periodically transmits data representing the tire condition. The vehicle speed sensor detects moving of the vehicle. The controller sets a delay time. The delay time being a period form when the vehicle speed sensor detects moving of the vehicle to when the data representing the condition of the corresponding tire is transmitted. The delay time varies from one transmitter to another.
Patent TW-200422834-A (TW)
Title: Recovery method for master boot record of hard disk drive
Inventor: LAI YU-CHEN
Filed: 2003-04-16
Abstract: A recovery method for a master boot record of a hard disk drive is adapted to a computer system incorporating extensible firmware interface (EFI). When modification occurs in the master boot record, the extensible firmware interface stores the master boot record in an NVRAM (Non-volatile Random Access Memory) as a backup. The backup is read out for recovery of the hard disk drive if the master boot record is destroyed. The NVRAM is write-protected during runtime and the backup data stored therein is therefore free from destruction.
Patent TW-200405630-A (TW)
Title: Shell processing jig
Inventor: KUKITA KEIMEI
IPC: H01R9/00
Filed: 2003-05-22
Abstract: The present invention provides a shell processing jig, which comprises: a mainbody of shell (152) for installing the housing (130) accommodating the connector (101) attached with the coaxial cable (120); and a shell lid (153) erected perpendicular to the mainbody of shell (152) on one side, and sealing the top of the mainbody of shell (152) by bending it to the other side. The shell processing jig applied in working the shell (151) has: a plate-like working surface (3a); a base plate (1) of the shell holding part (4) to hold the shell (151) in the working attitude that the shell lid (153) is perpendicular to the working surface (3a), the shell (151) being located on one side of the mainbody of shell (152), and the other side being of the same direction as the push/pressing direction; and a bending mechanism (5) to push/press the shell lid (153) of the shell (151) held in the shell holding part (4) and bend it.
Patent TW-200502863-A (TW)
Title: Method to improve execution of basic input output system (BIOS)
Inventor: WENG JIA-LIAN
IPC: G06F9/445
Filed: 2003-07-15
Abstract: The present invention provides a method for executing basic input output system (BIOS). The method comprises: loading a BIOS program into the address appointed by the central processing unit (CPU) and the CPU cache; and, when the CPU is operating, enabling the CPU to read the related commands for performing a self test directly from the address without using a read only memory (ROM) to accept the execution command. Thus, by means of the characteristics of the CPU and the CPU cache, the execution speed of the BIOS program is faster than the execution speed of the conventional method that has to use a ROM for accessing.
Patent TW-200504963-A (TW)
Title: Multi-chip semiconductor package and manufacturing method thereof
Inventor: LIN CHIAN-CHI
IPC: H01L23/31
Filed: 2003-07-29
Abstract: A multi-chip semiconductor package comprises a lead frame, a first chip, a second chip, a plurality of bonding wires and an encapsulant. The lead frame has a plurality of first leads, a plurality of second leads, and a plurality of bump pads which are electrically connected to the first leads. The first chip has an active surface, a back surface, a plurality of pads disposed on the active surface of the first chip, and a plurality of bumps disposed on the pads for being electrically connected to the bump pads of the lead frame. The second chip has an active surface, a back surface adhered to the back surface of the first chip, and a plurality of bonding pads disposed on the active surface of the second chip. The bonding wires are electrically connected to the bonding pads of the second chip and the second leads of the lead frame. The encapsulant encapsulates the first chip, the second chip, the bonding wires and the bump pads of the lead frame with the first and second leads exposed out of the encapsulant.
Patent TW-200418164-A (TW)
Title: Electrostatic discharge protection circuitry and method of operation
Inventor: MILLER JAMES W
IPC: H01L27/088
Filed: 2003-08-05
Abstract: An Electrostatic Discharge (ESD) protection circuit (9) includes a plurality of I/O and power supply pad cells (22, 40) that comprise external pads (31,41) and circuitry requiring ESD protection. The protection circuit includes an array of shunting devices (36, 46) coupled in parallel between an ESD bus (14) and a VSS bus (18) and distributed among the plurality of pad cells. One or more trigger circuits (50) control the shunting devices. ESD events are coupled from any stressed pad onto two separate buses: the ESD bus which routes the high ESD currents to the positive current electrodes of the multiple shunting devices, and a Boost bus (12) which controls the trigger circuits. During an ESD event, the trigger circuits drive the control electrodes of the shunting devices to a voltage level greater than possible with prior art circuits, thereby reducing the on-resistance of the shunting devices.
Patent TW-200506599-A (TW)
Title: Debugging method of subsystem in computer
Inventor: LEE RONG-JUNG
IPC: G06F11/32
Filed: 2003-08-06
Abstract: A debugging method of subsystem in computer is disclosed, wherein a debugging program is implanted in the embedded controller of the subsystem in computer. The operator sets the operation mode of the embedded controller in the subsystem as the debugging mode through an operational interface, and inputs the data to be detected by using the operational interface. When the embedded controller receives the data to be detected and inputted by the operational interface, the embedded controller calculates, searches or directly obtains the data found based on the detected data inputted from the operational interface. Finally, the data found is outputted to the display interface. The operational interface comprises plural input keys for the operator to input the data signal to the embedded controller in binary way. The display interface comprises plural lamps, and the representative significance of individual on/off state for each lamp, or the on/off state in the assembly of several lamps is predefined, so as to display the data found by the embedded controller.
Patent TW-200505589-A (TW)
Title: Powder coating method
Inventor: DENG BAR-LONG
IPC: B05D1/24
Filed: 2003-08-07
Abstract: A powder coating method is disclosed. The method comprises providing a substrate, defining a predetermined pattern on the surface of the substrate with a certain distribution of electric charge, and performing a corona electric spraying process to coat charged powder on the surface of the substrate.
Patent TW-200407022-A (TW)
Title: Controlled frequency signals
Inventor: GRIFFIN JED D
IPC: H04L25/49
Filed: 2003-08-14
Abstract: In some embodiments, a transmitter includes first encoding controlled frequency output circuitry to creates a magnitude encoded controlled frequency signal (CFS) and second encoding controlled frequency output circuitry to create a complementary a magnitude encoded controlled frequency signal (CCFS). Other embodiments are described and claimed.
Patent TW-200422386-A (TW)
Title: Method and apparatus for chemically, mechanically, and/or electrolytically removing material form microelectronic substrates
Inventor: LEE WHONCHEE
IPC: H01L21/304
Filed: 2003-08-29
Abstract: Method and apparatus for chemically, mechanically and/or electrolytically removing material from microelectronic substrates. A polishing medium for removing material can include a liquid carrier, an electrolyte disposed in the liquid carrier, and abrasives disposed in the liquid carrier, with the abrasives forming up to about 1% of the polishing liquid by weight. The polishing medium can further include a chelating agent. An electrical current can be selectively applied to the microelectronic substrate via the polishing liquid, and a downforce applied to the microelectronic substrate can be selected based on the level of current applied electrolytically to the microelectronic substrate. The microelectronic substrate can undergo an electrolytic and nonelectrolytic processing on the same polishing pad, or can be moved from one polishing pad to another while being supported by a single substrate carrier.
Patent TW-200509701-A (TW)
Title: Method to record and display the DBCS (Double-Byte Character Set) of digital video recorder
Inventor: JIN YUAN-CHANG
IPC: G06F7/00
Filed: 2003-08-29
Abstract: The present invention provides a method to record and display the DBCS (Double-Byte Character Set) of digital video recorder for playing and editing the title or filename of an optical disk. Its steps are: storing the font files of various language systems in a storage medium for the digital video recorder to read; establishing a font-recording space on a recordable optical disk by the digital video recorder; recording the beforesaid font files into the font recording space; inputting the internal code to specify the font code in the font file; recording the beforesaid input internal code in the recordable optical disk; searching the font code mapped onto the font file by the internal code; the digital video recorder searching and reading font codes; finally, updating the font code on the OSD (On-Screen Display). Thus, users can name titles or filenames in various multiple language fonts when editing recordable optical disks.
Patent TW-200511596-A (TW)
Title: An avalanche photo-detector(APD) with high saturation power, high gain-bandwidth product
Inventor: SHI JIN-WEI
IPC: H01L31/08
Filed: 2003-09-09
Abstract: An avalanche photo-detector (APD) with high saturation power, high gain-bandwidth product, low noise, fast response, low dark current is disclosed. The avalanche photo-detector (APD) having a multi-layered structure includes: an absorption layer with graded doping, a undoped multiplication layer, a undoped drift layer sandwiched between the absorption layer and the multiplication layer for reducing the capacitance, and a field buffer layer sandwiched between the drift layer and the multiplication layer for concentrating the electric field in the multiplication layer.
Patent TW-200406823-A (TW)
Title: Manufacturing method of semiconductor device
Inventor: YAMAZAKI YASUO
IPC: H01L21/3205
Filed: 2003-09-17
Abstract: A manufacturing method of a semiconductor device in which the influence of alignment errors is decreased is provided. A semiconductor device includes a plurality of elements each having the same structure composed of a plurality of layers including the same plural patterns respectively. One-shot exposure is performed for forming patterns on layers on which the patterns are formed before the formation of a pattern on the layer including wiring substantially affecting the operation of the semiconductor device when the value of the parasitic capacitance generated according to a positional relationship between the wiring and other wiring is different between elements. Division exposure is performed for forming patterns on all of the other layers on which the patterns are formed after the one-shot exposure.
Patent TW-200511950-A (TW)
Title: Shoelace buckle
Inventor: LIOU KUEN-JUNG
IPC: A43C7/08
Filed: 2003-09-29
Abstract: Provided is a shoelace buckle which is set on shoes providing two shoelace units set on the shoes to achieve a goal of being fastened and positioned and defining a midline of the shoes located between the two shoelace hole pieces. The buckle comprises a wedging unit, at least one flexible rope firmly connected to the wedging unit and at least one slippery clamping unit looping on the flexible rope. When pulling the wedging unit and gearing the flexible rope, the clamping unit glides toward the midline and attains the shoelace units to be raveled, thus achieving the goal of tight relieving.
Patent TW-200415837-A (TW)
Title: Integrated floating power transfer device with electromagnetic emission control circuit and method
Inventor: DONALDSON WILLIAM
IPC: G11C5/14
Filed: 2003-11-17
Abstract: An electromagnetic emission control circuit and method are provided for a power transfer device having a floating bus (214, 215) driven by a power and data system (107, 301, 310, 103). The electromagnetic emission control circuit includes one or more switch control circuits (402, 411) coupled between the floating bus and the power and data system for facilitating charging of the floating bus and for controlling electromagnetic emission from the power transfer device by constraining a slew rate on the floating bus. In one embodiment, the one or more switch control circuits include a first switch control circuit (402) electrically coupled to a high side bus node (214) of the floating bus and a second switch control circuit (411) electrically coupled to a low side bus node (215) of the floating bus. Transfer characteristics of the first and second switch control circuits are tailored to constrain the slew rate on the floating bus.
Patent TW-200418751-A (TW)
Title: Process for mixing an acidic aqueous solution comprising hydroxyl ammonium and phosphate with nitric acid
Inventor: OEVERING HENDRIK
IPC: C01B21/14
Filed: 2003-12-11
Abstract: The invention relates to a process for mixing a first acidic aqueous solution comprising hydroxyl ammonium and phosphate with a second acidic aqueous solution comprising nitric acid at a temperature between 20 and 80 DEG C resulting in a third acidic aqueous solution comprising hydroxyl ammonium, phosphate and nitric acid, wherein in the third acidic aqueous solution the total acid concentration minus the phosphate concentration is lower than 0.523xln([hydroxyl ammonium]/1.25)+422/(T+81) whereby [hydroxyl ammonium] is the concentration of hydroxyl ammonium in the third acidic aqueous solution, T is the temperature of the third acidic aqueous solution expressed in DEG C and all concentrations are expressed in mol/l.