baber/WOPTO huggingface dataset:
Patent JP-H05327050-A (JP)
Title: Forming method for josephson element
Inventor: NOSHIRO HIDEYUKI
IPC: H01L39/24
Filed: 1992-05-26
Abstract: PURPOSE:To provide a method for forming a Josephson element in which a normal S-N junction can be formed in a boundary between a superconductor layer and an insulating layer or a normal conductor layer interposed therebetween by holding an operating temperature high and improving voltage/ current characteristics. CONSTITUTION:The method for forming a Josephson element comprises the steps of selectively implanting an impurity in a C60 film 31 having normal conductivity on a base 17 by ion implanting or focused electron beam to form first and second superconducting region layers 32a, 32b adjacent through a normal conductive region, and forming electrodes on the layers 32a, 32b.
Patent JP-H02311737-A (JP)
Title: Drop shock testing apparatus
Inventor: TSUMURA HIDEO
IPC: G01N3/30
Filed: 1989-05-26
Abstract: PURPOSE:To improve the flatness of a steady-state acceleration part in a rectangular shock acceleration waveform, to suppress a required cost and to reduce a space by hitting the shock head of a drop table having a sample to a part to be hit, and imparting the shock to the sample. CONSTITUTION:A drop table is guided with guide rods 4 and freely falls. A high rigidity pad 7 hits a part to be hit 23 so as to move the part 23 downward. At this time, the value of the shock acceleration generated in the table rapidly increases until kinetic energy balances with the spring force of a spiral spring 20 which moves the part to be hit 23 upward. When the kinetic energy of the table becomes zero and the moving displacement of the part to be hit 23 reaches the maximum value, the part to be hit 23 is moved upward by the returning action of the extending spring 20, and the table is repelled upward along the rods 4. At this time, the increasing trend of the value of the shock acceleration generated in the table is suppressed in comparison with the rapid increase, and a constant level is maintained. This is based on the equal speed of the part to be hit 23 due to the returning of the spring 20 having the stable spring constant. Thus the strength of the sample can be measured and evaluated.
Patent JP-H0430485-A (JP)
Title: Laser device
Inventor: SAGEHASHI HIDEO
IPC: H01S3/00
Filed: 1990-05-25
Abstract: PURPOSE:To realize a means which prevents dust or foreign particles from attaching to a lens even if a fiber is detached and serves as a safety device restraining a laser from being wrongly operated by a method wherein a shielding means is provided between a condensing lens and the fiber. CONSTITUTION:Laser rays L emitted from a laser tube 2 of a laser oscillator 1 are projected from the laser oscillator 1 through the intermediary of mirror control plates 4 and 4, and resonator mirrors 3 and 3, reflected by a half mirror 6, and made to impinge on a condensing lens 7. The mirror 6 transmits laser rays L1 out of laser rays L, the laser rays L1 is directed to a photodetective element 13 and detected so as to judge that a laser output is coincident with a set value or not. A laser shutter 11 recedes from a position between the lens 7 and a fiber 10 rotating around a shaft 12a as a center basing on the detection results of the fiber 10 and the element 13. The light L is collected through the lens 7 so as to impinge against the opening of the fiber 10 after the shutter 11 is released. By this setup, even if a light guiding system is detached, a shutter prevents dust or foreign particles from attaching to a lens and serves as a safety device to prevent a laser device from being wrongly operated.
Patent JP-S5659360-A (JP)
Title: Computer equipped with board
Inventor: SAKAGUCHI KATSUHIKO
IPC: G06F15/02
Filed: 1979-10-19
Abstract: PURPOSE: To make it possible to memo in the course of a calculation and also swiftly perform a calculation in the midst of writing, by attaching a desk computer to the board so that it can be attached and detached freely.  
     CONSTITUTION: The opening parts 4, 5 are formed at the positions which are opposite to the display part 2 and the keyboard part 3 on a part of the white board on which a character, a graphic form, etc. can be written freely, and an electronic desk computer 8 is installed at the lower side of the board 1 with metal fittings or a fastener, etc. so that it can be attached and detached freely. Also, the notch part 6 is formed on a part of the white board 1, the groove 7 is formed at the both side edges of this notch part 6, and the both side edges of the electronic desk computer can be fitted so that it can be slided freely. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S61294006-A (JP)
Inventor: SUGAYA KO
IPC: E01D19/02
Filed: 1985-06-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H10307911-A (JP)
Title: Multidimensional interpolation method and device therefor
Inventor: FUMOTO TERUO
IPC: G06T1/00
Filed: 1997-05-08
Abstract: PROBLEM TO BE SOLVED: To suppress the increase of multiplication frequency of the multidimensional interpolation, to simplify the calculation of a weight coefficient for interpolation and to attain the rational extension up to a multiple dimension by selecting the ridgelines in each axial direction and in the order of larger axial positions against the input point of a unit hypercube and obtaining an interpolation hypercube that is symmetrical to an interpolation operation. SOLUTION: The relation is shown between a unit hypercube and every input axis, and the axes A and B show the 4-dimensional and 5-dimensional axial directions respectively (1). The ridgeline set in the X axis direction, i.e., the maximum direction of sequencing is selected among five ridgelines obtained from the 1st ridgeline extended from an original point 0 of the unit hypercube (2). The ridgeline of the Y direction, i.e., the 2nd sequencing is selected as the 2nd ridgeline by the ridgeline extended newly from an end point of the 1st ridgeline (3). Thus, the ridgelines are successively selected, and the 5th ridgeline is selected in the B direction as the final ridgeline. Finally, a hypercube that is surrounded by six apexes of end points of six segments connecting the end point of the 5th ridgeline and the point O of the unit hypercube is selected as an interpolation hypercube (6).
Patent JP-S62291061-A (JP)
Title: Manufacture of hot electron transistor
Inventor: FUJII TOSHIO
IPC: H01L29/20
Filed: 1986-06-10
Abstract: PURPOSE:To facilitate improvement of the current amplification factor of a hot electron transistor by a method wherein InGaAs which is lattice-matched with an InP substrate is used for an emitter, a base and a collector and 4-component mixed crystal of InGaAlAs formed by a pulse molecular beam is used for a barrier layer to form a hot electron transistor. CONSTITUTION:A one conductivity type InGaAs collector layer 2, a one conductivity type InGaAs base layer 4 and a one conductivity type InGaAs emitter layer 6, which are lattice-matched with InP respectively, are successively formed on an InP substrate 1. In the manufacture of a hot electron transistor (HET) like this, two types of three-component mixed crystals, i.e. InGaAs and InAlAs, which can be lattice-matched with InP are alternately made to grow by molecular beam epitaxial growth with the thickness about the same or less than a single-atomic layer to form four-component mixed crystal of InGaAlAs which has a forbidden band between those of InGaAs and InAlAs and the four- component mixed crystal is used for a barrier layer 5 between the base and the emitter or a barrier layer 3 between the collector and the base. With this constitution, the high performance and high speed HET with improved current amplification factor can be obtained.
Patent JP-S6114593-A (JP)
Inventor: KENESU CHIYAARUZU RADOFUOODO
IPC: G21C3/62
Filed: 1985-06-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5258549-A (JP)
Title: Production of optical fiber
Inventor: KUROSAKI SHIROU
IPC: G02B6/00
Filed: 1975-11-08
Abstract: PURPOSE:Inserting a glass tube having heating element which is heated by electricity in the glass tube of basic material, the glass film is formed to the specified thickness by heating the raw material gas through the heating element.
Patent JP-S5835219-A (JP)
Title: Manifold converter holder
Inventor: ISOTANI KIYOSHI
IPC: F01N13/02
Filed: 1981-08-27
Abstract: PURPOSE:To eliminate the necessity for a press fit process and improve workability and productivity, by supporting a catalyzer body with a center bolt. CONSTITUTION:A through hole 9 is provided in the central part of a catalyzer body 3, further a pipe 10, extended in the through hole 9, and a center bolt 12, extended through an internal surface of the pipe 10, are provided, then a boss 13, having a thread part 14 screwed to the bolt 12, is provided in either a manifold 1 or case 2. Then the bolt 12 is screwed to the thread part 14, and the catalyzer body 3 is fixed by the bolt 12 through the pipe 10. In this way, a process can be performed by tightening only a single of the bolt 12, and the necessity for applying a disadvantageous process of press fitting the catalyzer body 3 can be eliminated to simplify assembly workability, while the catalyzer body 3 can be released from limitations of dimensional accuracy in its overall length and external diameter.
Patent JP-S63299567-A (JP)
Title: Call time warning equipment for talking equipment
Inventor: KOJIMA AKIHIRO
IPC: H04M15/30
Filed: 1987-05-29
Abstract: PURPOSE:To prevent the breakdown of a system by producing a warning signal when a prescribed time passes when the talking lasts for a long time or a handset is kept away from a talking device for a long time. CONSTITUTION:A control part 4 fetches a call time signal S from an outside line call detecting part 8 and activates a talking circuit 10 when an outside line call is confirmed. At the same time, the part 4 starts a timer 5 to count the talking time. In case the outside line call lasts for a long time or a handset 1 is kept away from a telephone 2 for a long time, the part 4 produces a warning signal by the timer 5 via an oscillator 9 when a prescribed time passes from a time point when the timer 5 is started. Then the warning is informed to outside with actuation of a sound generator 7. Thus the breakdown of a system is prevented.
Patent JP-S6112311-A (JP)
Title: Method for molding multicolor resin container
Inventor: SONE KATSUMI
IPC: B29C45/16
Filed: 1984-06-29
Abstract: PURPOSE:To easily mold a container having different colors by integral molding, by a method wherein a first synthetic resin is injected in a frame shaped cavity in such a state that a slide core is present at an advance position and, subsequently, a second synthetic resin is injected in at least one of a bottom plate cavity and a top plate cavity while a third synthetic resin is injected in the other cavity in such a state that the slide core is present at a retracted position. CONSTITUTION:After first and second slide cords 32, 33 are moved to advance positions, a first synthetic resin P1 is injected in a frame shaped cavity C1 from a first gate G1 and, subsequently, the slide cores 32, 33 are moved to retracted positions to inject a second synthetic resin P2, which is prepared by coloring the resin having compatibility with the first syntheric resin P1 with a different colorant, in a bottom plate cavity C2 from a second gate G2 and, in parallel to this, a second synthetic resin P3 having a color different from the colors of both first and second synthetic resins is injected in a top plate cavity C3 from a third gate G3 to mold a three-color synthetic resin container.
Patent JP-S5924773-A (JP)
Title: Semi-metallic friction material
Inventor: KONNO YUKIHIKO
IPC: C09K3/14
Filed: 1982-08-03
Abstract: PURPOSE:To provide a semi-metallic friction material consisting of a metal fiber, a binder such as (boron-modified) phenolic resin, a filler and a specified auxiliary material and exhibiting excellent frictional properties at high temperatures. CONSTITUTION:The friction material is prepared by adding at least one auxiliary material selected from among phosphoric acid ester (e.g. tricresyl phosphate), halogen-containing phosphoric acid ester [e.g. tris(beta-chloroethyl)phosphate] and halogen compd. (e.g. chlorinated paraffin) to a mixture of a steel fiber or a similar metal fiber, a binder such as (boron-modified) phenolic resin and a filler such as graphite, iron powder, BaSO4 or Ca(OH)2, in an amount of 2-100pts.wt. per 100pts.wt. binder. EFFECT:The resultant friction material shows excellent frictional properties at a high temperature of above 300 deg.C. USE:Brake for automobile, etc.
Patent JP-S62289469-A (JP)
Inventor: HANSU KURISUTOFU KURAIN
IPC: B62D6/02
Filed: 1987-05-29
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000323600-A (JP)
Title: Multilayer wiring board
Inventor: NOMOTO MASARU
IPC: H01L23/12
Filed: 1999-05-14
Abstract: PROBLEM TO BE SOLVED: To electrically connect a multilayer wiring board efficiently having laminated parallel interconnections to a high-density semiconductor element, and to reduce the number of laminated layers. SOLUTION: This multilayer wiring board comprises, below a mounting region M of a semiconductor element D, a line wiring layer, and a strip line section. The line wiring layer consists of a line conductor C2 for connecting an upper conductor layer C1 to the element D by a first group of through-conductors T1. The strip line section consists of a lower conductor layer C3. Around the line wiring layer and the strip line section, the multilayer wiring board is also provided with a parallel wiring section, which is formed by connecting a first wiring line L1 to a second wiring line L2 by a second group of through-conductors T2.  The line L1 consists of a group of parallel wiring lines having intersecting points with the region M, the parallel wiring lines being formed within the same plane as that of the line wiring layer and extending toward the intersecting points in regions so segmented as to have substantially the same central angle with each other by two to four lines. The second wiring layer L2 consists of a group of parallel wiring lines which are orthogonal to the first layer L1 in the respective segmented regions. Furthermore, the element D is connected to the layer L1 via the line wiring layer.
Patent JP-H0430075-A (JP)
Title: Horizontal main rope extending jig and scaffold assembly method using such jig
Inventor: YOSHII MASARU
IPC: E04G1/14
Filed: 1990-05-24
Abstract: PURPOSE:To prevent an accidental fall in a schoffold assembly work by erecting and fixing round pipes on both sides of an established scaffold, and extending a main rope through guide roller-form jigs installed on top of the round pipes. CONSTITUTION:A jig 1 made by forming ratches 4 at both sides while holding a roller-form short pipe 3c at the U-shape end of a round pipe 2 is prepared. Then a round pipe 5 with the length about two times the height of a scaffold is provided, and the round pipe 2 of the jig 1 is installed on the top of the pipe 5. Then, the round pipes 5 are installed to cross arms 13-n on the uppermost floor surface at both ends of the established scaffold 11, and cross arms 12-(n-1)at the floor surface one step lower. And a main rope 6 is extended between the short pipes 3c of the jigs 1, a safety belt life-line is locked to the main rope, and the scaffold is constructed. And, in the case to install the cross arms step by step, the work is carried out by installing a lifeline, a vertical main rope, or the like also to the ratches 4. As a result, the main rope can be extended easily and in a low cost in any stage of a high place work.
Patent JP-H09321628-A (JP)
Title: Voice coding device
Inventor: ISHINO TOSHIYUKI
IPC: G10L19/02
Filed: 1996-05-29
Abstract: PROBLEM TO BE SOLVED: To provide large masking quantity and to perform efficient coding by combining and using both forward and backward masking effects. SOLUTION: In the case of coding an Nth frame of input audio signal data inputted to a spectrum calculator 4, the input audio signal data in an area B from an (N-j)th frame to an (N+k)th frame including the Nth frame are used. In such a case, the input audio signal data are composed of (i+1)×(n) pieces of sampled. At such a time, the condition of i=j+k is established. The (i+1)×(n) pieces of input audio signals expressed in the area B are inputted to the calculator 4, frequency analysis is performed, the analyzed result is inputted to a predictor 5 and a masking curve is found. Then, a predictor 6 predicts quantizing step width based on masking curve information so that both the forward masking result and the backward masking result of successive masking can be used.
Patent JP-H04362123-A (JP)
Title: Production of bearing steel stock
Inventor: YASUMOTO SATOSHI
IPC: C22C38/22
Filed: 1991-06-06
Abstract: PURPOSE:To improve the productivity of bearing by applying specific heat treatment to a bearing steel stock having a composition containing specific weight percentages of C, Si, Mn, Cr, and Mo. CONSTITUTION:The bearing steel stock has a composition containing, by weight, 0.40-0.80% C, 0.01-2.00% Si, 0.20-2.00% Mn, and either or both of <=0.80% Cr and <=1.00% Mo. This steel stock is subjected to treatments (1)-(3) and then to a repetition of treatments (4), (5) once or more and cooled: (1) heating and holding to and at a temp. not lower than the A3 point and rapid cooling; (2) reheating and holding to and at a temp. in the range of [A1 point +(5-30) deg.C]; (3) holding at a temp. in the range of [A1 point -(5-30) deg.C]; (4) holding at a temp. in the range of (A1 point +5)-(A3 point +30) deg.C; (5) holding at a temp. in the range of [A1 point-(5-30) deg.C]. By this method, rolling fatigue life can remarkably be improved.
Patent JP-S5561824-A (JP)
Title: Power supply circuit
Inventor: TAKAZAWA OSAMU
IPC: H04B1/16
Filed: 1978-10-31
Abstract: PURPOSE: To enable to perform ON-OFF control for the function of power supply switch with the remote control transmitter, for the power supply circuit having the power supply switch function of electronic unit.  
     CONSTITUTION: When the main power switch 6 is turned on in advance, the voltage E 1  rectified and smoothed at the smoothing circuit 7 is fed to the amplifier 2, signal separation circuit 3, wave shape circuit 4, and flip flop 5 to keep them in waiting condition. When the remote control signal from the remote control transmitter is received at the receiver 1, it is amplified at the circuit 2, the power supply ON-OFF signal is separated and shaped into one short signal at the circuit 4, the flip flop 5 is inverted. Thus, the transistor Q 4  of the ON-OFF control circuit 9 and diodes D 7  and D 8  are cut off, the transistors Q 1 , Q 3  of the voltage stabilization circuit 8 are turned on, DC output voltage is led out at the output terminal T 1 , the power supply is tutned on, and it is turned off when the remote control signal is received further. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H09320785-A (JP)
Title: Flash charger
Inventor: YAMAGUCHI TAKEHISA
IPC: H05B41/32
Filed: 1996-05-29
Abstract: PROBLEM TO BE SOLVED: To enable protection against overcharging to be influentially normalized and a flash charger to be miniaturized. SOLUTION: AND outputs of a drive control signal Fc and a highlevel charging stop signal STC to be output from a drive control circuit 5 are input to a DC/DC converter via an AND circuit during charging. After a drive control circuit 5 reads a protection time (> charging time) according to a battery voltage Vp from a memory 51 and sets the time to a timer 6, charging starts, and when a charging voltage Ve rises to a specified charging voltage Vc, a drive control signal Fc is stopped and charging is terminated. In addition, when the protection time is counted by means of the timer 6, the charging stop signal STC inverts to low level, the drive control signal Fc is forcibly stopped, and charging operation is stopped.  By changing the protection time according to the battery voltage, overcharge protection is influentially normalized, making a main capacitor CM and the charger capable of miniaturization.
Patent JP-H04232480-A (JP)
Title: Testing method for test-pattern-bit-sequence forming circuit and digital circuit device
Inventor: BERUNDO KAARU FUERUDEINANDO KO
IPC: G01R31/28
Filed: 1991-04-15
Abstract: PURPOSE: To shorten the time required for testing an integrated circuit tip device. CONSTITUTION: To generate a test bit stream sequence, a linear feedback shift register 30 is used as a dummy random pattern generator, so that the generated pattern is weighted. Previous simulation stores a seed value judged to be ineffective, and the seed value is skipped in actual test.
Patent JP-H09313592-A (JP)
Title: Tube for catheter
Inventor: MASUDA HARUHIKO
IPC: A61L29/00
Filed: 1996-05-29
Abstract: PROBLEM TO BE SOLVED: To provide a tube for a catheter with excellent push-in power transmission and constant flexibility and without breaking in bending. SOLUTION: This tube for a catheter is formed with a polyamide alloy containing 5-95wt.% of a high rigidity segmented polyamide resin shown by the formula:-[-CO-PA-CO-O-PE-O]n -, in which PA represents a segment consisting of a constituent component selected from among nylon 6, 66, 610, 612, 11, and 12, and PE represents a segment consisting of a constituent component selected from a polyetherdiol or polyesterdiol with molecular weight of 300-3000, and n is an integer not lower than 10.
Patent JP-H11330430-A (JP)
Title: Manufacture for nonvolatile semiconductor memory device
Inventor: KAWADA MASAHITO
IPC: H01L27/115
Filed: 1998-05-18
Abstract: PROBLEM TO BE SOLVED: To make efficient the element isolation characteristics of a nonvolatile semiconductor memory device by a method, wherein the insulation film and the deposited film of a floating electrode material formed in a peripheral circuit part are removed in this over. SOLUTION: First, after an element isolation film 201 is formed at a specified position of a peripheral circuit part and a cell part, a polysilicon 202 of a floating electrode material is deposited on the entire substrate. Next, after a resist film is formed at the specified position of the cell part and in the entire region of the peripheral circuit part, a deposition film of the floating electrode material is etched to form a floating electrode. Thereafter, a specified pattern is formed on the deposition film of the floating electrode material, and a floating gate is formed in the cell part. Next, an insulating film 205 is formed on the entire face of the substrate. Continuously, the resist film is formed on the entire region of the cell part. The resist film is not provided in the peripheral circuit part.  In this state, the insulating film 205 formed in the peripheral circuit part, and the floating gate are removed in this order. Thus, it is possible to prevent the isolation oxide film 201 of the peripheral circuit part from decreasing, and to enhance the isolation characteristics.
Patent JP-S5831618-A (JP)
Inventor: ERITSUKU ERU ABUTON
IPC: H03M1/36
Filed: 1982-08-03
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S61295380-A (JP)
Title: Method for plating ornament
Inventor: KAWAGUCHI SEIICHI
IPC: C23C18/16
Filed: 1985-06-21
Abstract: PURPOSE:To give a smooth and lustrous outer surface by plating a titanium or titanium alloy material to form an underlayer, polishing the surface of the underlayer, and carrying out finish plating. CONSTITUTION:Each of titanium or titanium alloy parts 1 of an ornament is plated with nickel or the like to form an underlayer 2. The surface of the nickel underlayer 2 is made smooth by barrel polishing or other polishing method, degreased, washed and subjected to bright alloy plating. By this method, a smooth and lustrous surface can be given to an assembled ornament or each of parts before assembling with the minimum thickness of finish plating.