Patent GB-1448867-A (GB)
Title: Electric pulse train generators and frequency synthesisers
IPC: H04L27/10
Filed: 1973-04-25
Abstract: 1448867 Digital transmission; FSK systems; transistor switching circuits GENERAL ELECTRIC CO Ltd 23 April 1974 [25 April 1973] 19600/73 Headings H3T and H4P A pulse train generator particularly for a multi-channel F.S.K. system generates a plurality of pulse trains of differing frequency, no pulse in any train being coincident with a pulse in any other train, and the means combining two or more trains to provide a sum of the selected tains, and an arrangement for cancelling from the sum of a number of patterns of trains to provide a difference pulse repetition rate. The plurality of trains are preferably related by factors of two, and if any pulse from the selected pattern is not coincident with one from the sum the next following pulse is cancelled. The sum preferably has a high repetition rate which is divided to produce the desired values also to provide an averaging effect, which may be filtered to near sinusoidal form and the filter may be arranged to attenuate the sum fundamental frequency. When used for F.S.K. transmission to a receiver, incoming received tones may be compared for phase difference with output of the generator and a control signal derived to select the pattern so that the generator is phase locked to the incoming tone and value of the control signal is a measure of the frequency and hence of incoming information. A generated pulse train of say 4 x 10<SP>6</SP> pulses/ sec. is divided successively by 2 through an OR gate network (see Fig. 2, not shown) and led to outputs 14-22 connected selectively by jumper links to one of a number of channels, only one 12 being shown. Incoming binary signals 32 through AND 36 and OR 38, also receiving divided outputs 24, 26 are fed to a binary subtractor 40 also receiving the sum of pulses applied to adder 28. The difference output from 40 is divided at 42, producing say mark/space frequencies of 630/690 pulses/sec. through attenuator 44 and B.P. filter 46 to line 48. By suitable links between terminals 30 other pairs of frequencies can be produced spaced by say 120 hz. At the reciever incoming tones are converted in amplifier 54 to pulse trains of 630/690 pulses/sec. and fed to phase comparator 56, also receiving the divided output of subtractor 60 producing 600/720 pulses/sec., both normal and inverted outputs being fed to comparator 56. When comparator inputs are 630 and 600 pulses/sec. it will sooner or later switch its output line to 0 hence block AND 58 hence one input resets to 720 pulses/sec. and thence in time switches back to a 1 ouptut, the 1 period being three times 0. Conversely when 690 pulses/sec. are being received the 0 period= three times 1. Such outputs are applied through L.P. filter 64 to a relay terminal 68. It is stated that switching between frequencies is performed without phase discontinuities or amplitude distortions. Output from adder 28 may be delayed slightly by an amount similar to a pulse length to compensate for gate switching delays. A circuit including transistor (35) (Fig. 3, not shown) detects signal failure at terminal 32 and applies a warning signal, i.e. fail/space or fail/mark in dependence of a link (77) to the output of interface 34. An incoming signal failure circuit 34 is described in connection with Fig. 3 (not shown) which comprises reverse parallel optically coupled devices (31) switching a bi-stable circuit (33), and a transistor (35) which responds to signal failure on terminal (32) and applies an input to one of the unreferenced gates shown in dependence on a jumper 37 to provide a "fail space" or "fail mark" signal at the circuit output.