Patent GB-896759-A (GB)
Title: Improvements in or relating to electric pulse circuits
Inventor: LEAKEY DAVID MARTIN
IPC: B65D25/24
Filed: 1959-10-08
Abstract: 896,759. Pulse delaying circuits. GENERAL ELECTRIC CO. Ltd. Sept. 30, 1960 [Oct. 8, 1959], No. 34140/59. Class 40(6).  In a circuit comprising a source of regularly recurring pulses and means for delaying the train of pulses supplied by the source by a period equal to the half the time spacing between two (not necessarily adjacent) pulses, the means for delaying the pulses consists of a plurality of separate stages each comprising a delay line and connected in cascade to provide the desired overall delay, but none of .the individual delay lines having delay times equal to half the time spacing between any two pulses so that in no case to the first reflections produced within a delay line appear at its input in coincidence with a later pulse of the pulse train, means being inserted between successive stages which permit pulses of the pulse train to pass from one stage to another but prevent the transmission of reflected pulses between the stages. In the arrangement illustrated, applied to a timedivision-multiplex system, half-microsecond pulses spaced a two microsecond intervals applied to the emitter electrode of transistor 2 are required to be delayed by two microseconds. Delay lines 4 and 14 have delay times of 0.675 microseconds and 1.325 microseconds respectively so that pulses delayed by the desired amount appear at the collector electrode of transistor 18. Diodes 21, 23, 26, 28 are normally conducting so that in the intervals between applied pulses the lines 4, 14 are approximately correctly terminated by resistors 20, 7, 25, 17. However when an input pulse is applied to transistor 1 diode 21 is switched off and by virtue of the largevalued resistor 22 nearly all the pulse energy is sent down line 4. On its arrival at the far end of the line its amplitude is sufficient to switch off diode 23 so that the pulse current flows into the transistor 8 and similarly through line 14 and to the output through transistor 18. Owing to the low input impedance of the transistor 8 the line 4 remains approximately matched; however a small signal is reflected which since it arrives at the input to the line at a time when no input pulse is applied is heavily attenuated by the matched termination. Any re-reflected pulse after travelling down the line is unable to pass the transistor 8 which is switched off by the small reverse bias across diode 23. Successive reflections occur with heavy attenuation until the fifth reflected pulse arrives at the input to the line in substantial coincidence with an input pulse; then on its sixth reflection the pulse is able to pass through the transistor 8 but the level of interference introduced thereby is negligible. Pulses similarly pass after six reflections within line 14 through transistor 18; however whereas they pass with the pulse four microseconds later through transistor 8 they pass with the pulse eight microseconds later through transistor 18 so that the small amount of crosstalk appearing at the output of transistor 8 is not increased at the output of transistor 18. It is stated that the transistors 8, 18 may be replaced by diodes with their directions of forward conduction the same as those of the emitter-base diodes of the transistors they replace. In this case the bias voltage applied to diodes 26 and 28 is preferably the same as that applied to diodes 21 and 23, i.e. -3 volts. Specification 896,760 is referred to.