baber/WOPTO huggingface dataset:
Patent JP-H02277981-A (JP)
Title: Diaphragm type pump
Inventor: MIWA TAKENAO
IPC: F04B43/02
Filed: 1989-04-20
Abstract: PURPOSE:To prevent a main fluid from flowing out when bellow-diaphragms are broken by constituting displacement member with bellow-diaphragms and seal pistons integrally displaced with them and sealing gaps between bellow- diaphragms and drive chambers, and connecting a pair of respiratory chambers partitioned by bellow-diaphragms and seal pistons with a connecting path. CONSTITUTION:Deep-drawn bellow-diaphragms 23a and 23b and seal pistons 25a and 25b sealing gaps between them and drive chambers 20a and 20b are integrally fixed on both sides of a shaft 13 hermetically penetrating the bulkhead 11a of a body 11 to form displacement members 3a and 3b. Seal pistons 25a and 25b are hermetically slid in drive chambers 20a and 20b by packings 26, and respiratory chambers 27a and 27b between bellow-diaphragms 23a and 23b and seal pistons 25a and 25b are communicated by the connecting path 28 of the body 11. A main fluid is prevented from flowing to drive chambers 20a and 20b and the outside even if bellow-diaphragms 23a and 23b are broken according to this constitution.
Patent JP-S60245144-A (JP)
Title: Semiconductor integrated circuit device
Inventor: TAKEMOTO TOYOKI
IPC: H01L21/762
Filed: 1984-05-18
Abstract: PURPOSE:To integrally form elements of different characteristics and utilities by coating the sides and bottom of an active region with an oxide film, and differentiating the depths of the active regions in two or more ways. CONSTITUTION:Holes 14, 15 of different depths are formed in an Si substrate 11. Then, holes 20 which extend laterally and downward are formed at the bottoms of the holes 14, 15. Then, a diffused layer 21 is formed on the bottom of the hole 20, and when the entire surface of the substrate 11 is oxidized, only the hole 20 is oxidized to form an oxide layer 22. This layer 22 also extends laterally, the extended layers 22 are connected, and regions 23, 24 separated from the substrate 11 are formed. Transistors Tr are respectively formed in the regions 23, 24. The formed Tr having deep collector 23 has high withstand voltage, and a high withstand element is formed with the emitter 24, a base 31 and a collector 32. Since the Tr formed with the emitter 24, the base 31 and the collector 32 has shallow depth of the region 24, DC amplification factor hFE is high, and can be used for an I<2>L.
Patent JP-H0617427-A (JP)
Title: Vibro-generator system
Inventor: SHIMADA CHIKASHI
IPC: E02D7/18
Filed: 1991-05-02
Abstract: PURPOSE:To optionally and steplessly change vibro-motive force at the time of operation, and simply and rationally manufacture the structure in an easy manner. CONSTITUTION:A fluid operating chamber 100 is formed in space between a peripheral part of a phase adjusting shaft 90 and a first phase adjusting gear 35. With supply or discharge of a fluid to or from this operating chamber 100, the first phase adjusting gear 35 is relatively rotated to the phase adjsuting shaft 90. Hence, a phase difference is produced in space between the first phase adjusting gear 35 and a second phase adjusting gear 36.
Patent JP-H06308092-A (JP)
Title: Material deterioration inspection device
Inventor: NAKASHIRO NORIYUKI
IPC: G01N27/83
Filed: 1993-04-27
Abstract: PURPOSE:To inspect a specimen of a non-magnetic material which cannot be measured easily by measuring fatigue damage non-destructively without any contact. CONSTITUTION:The title device consists of an excitation part 2 for applying alternate magnetic field to a specimen 1 to be inspected by an excitation coil, a sensor part 3 consisting of a flux gate flux meter for detecting a small magnetic field generated in the specimen 1 to be inspected at the excitation part 2, a computer group 6 for judging the degree of fatigue damage of a material according to the data base indicating the relationship with the fatigue damage and then displaying the output result, and a measurement control device 7 for controlling excitation etc. For example, the degree of fatigue damage can be inspected non-destructively without any contact by capturing, with the flux crate flux meter, the magnetic properties generated by turning the degree of fatigue of the specimen to be inspected made of, for example, austenite steel into martensite by fatigue.
Patent JP-H04493-A (JP)
Title: Display device for information equipment
Inventor: MIYAZAWA SHUNSAKU
IPC: G09G5/00
Filed: 1990-04-17
Abstract: PURPOSE:To enable a CRT display and a liquid crystal display which has a half duty by setting plural display areas on a video RAM and inputting display data in order from the top of an image plane at intervals of IH(one horizontal scanning period) or two upper and lower divided image planes alternately according to modes. CONSTITUTION:The display area on the multi-port video RAM 2 is divided into upper and lower areas and set by a display area setting means 43 and an address generating circuit 3. Then, when a CRT mode is set in the setting register of a display equipment, the contents of the RAM 2 are supplied to a CRT 5 through a display converter 4 in order from the top of the image plane at intervals of IH according to the address from the circuit 3. When a liquid crystal mode is set in the register 41, on the other hand, IH data from the two upper and lower divided areas of the RAM 2 supplied to a liquid crystal display device 50 which has a half duty cycle alternately. This simple, small- sized constitution which requires no display frame memory switches the CRT display and liquid crystal display selectively.
Patent JP-H02280409-A (JP)
Title: Gain switching amplifier circuit
Inventor: ISHIHARA TAKESHI
IPC: H03G3/12
Filed: 1989-04-20
Abstract: PURPOSE:To obtain an amplifier circuit excellent in the stable operation and whose gain is able to be switched by controlling the forward gain of the amplifier circuit simultaneously interlockingly when the value of the negative feedback impedance is changed to control the transfer impedance. CONSTITUTION:One terminal of a diode Q4 connects to an output B of an amplifier circuit, other terminal of the diode Q4 connects to an input A of the amplifier circuit via a resistive element Rf', and a 1st switching element Q5 is connected between a reference point and a connecting point of the diode Q4 and the resistive element Rf' via a resistive element R6. Moreover, a 2nd switching element Q3 connects in parallel with an emitter impedance element R4 of the common emitter circuit Q1 to make the 1st switching element Q5 conductive and to interrupt the 2nd switching element Q3 thereby reducing the gain of the amplifier circuit. When the transfer impedance is lowered to decrease the gain, the gain of the amplifier circuit is lowered at the same time and the gain switching amplifier circuit operated stably is obtained.
Patent JP-H04331976-A (JP)
Title: Display device
Inventor: YOSHITAKI HIDETOSHI
IPC: G09F9/00
Filed: 1991-05-07
Abstract: PURPOSE:To offer the display device which is suitable to a space-saving beauty- sensitive creation and play epoch while securing the functions of a CRT type display-device. CONSTITUTION:This device is equipped with a liquid crystal display device 21, an interface control circuit 22, a power circuit, a power ON/OFF switch, and various input/output connectors and has a means for varying the elevation angle of the liquid crystal display device 21, a means for holding the position of an optional elevation angle, and a means for rotating the direction of the liquid crystal display device 21. Further, the device has brake lining made of a different kind of metal and also has a means for holding the liquid crystal display device 21 in space and a storage means for storing all circuit electric conductors in the display device.
Patent JP-S61260192-A (JP)
Inventor: FURUSAWA TAKEHIRO
IPC: G01M3/26
Filed: 1985-05-15
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000164823-A (JP)
Title: Buried plate forming method
Inventor: KOFFLER GUENTHER
IPC: H01L21/334
Filed: 1999-04-08
Abstract: PROBLEM TO BE SOLVED: To fairly decrease a manufacture step, reduce all process times, and enhance device performance characteristic by a method wherein, before a second layer of an undoped material is vapor-deposited on a first layer containing a dopant, the first layer is not brought into contact with an air. SOLUTION: A silicon nitride layer 102 is vapor-deposited on a silicon wafer 100, and a trench 104 is formed by plasma-etching therein. Next, a first arsenic- doped glass layer 106 is formed by LPCVD of arsenic-doped glass by use of tetraethyl arsenate within the trench 104 and on the silicon nitride layer 102. Next, a second layer 108 of glass undoped by LPCVD is vapor-deposited on the first glass layer 106 by use of ortho-tetraethyl silicate. Incidentally, before the undoped second glass layer 108 is formed, the arsenic-doped first glass layer 106 must not be exposed to an element reacting involuntarily with arsenic therein, in particular an air.
Patent JP-S583432-A (JP)
Title: Optical data link system
Inventor: KOUSAKA TAKASHI
IPC: H04B10/00
Filed: 1981-06-30
Abstract: PURPOSE:To simplify the constitution of the signal transmitting/receiving part of an optical data link, by converting a timing signal and a serial transmitting data into the optical signals of different wavelengths, then multiplexing and transmitting this optical signal. CONSTITUTION:A set signal generated from a control part and a parallel transmitting data are fed to a transmitting buffer 12, and the transmitting data is held with the timing of the set signal. The set signal is fed also to a flip-flop 11. A data transmission control circuit 15 is started by a set output Q of the flip-flop 11. Then the circuit 15 sets the contents held at the buffer 12 to a shift register 13 and at the same time feeds the contents of the register 13 to an electricity-light converter 17 in accordance with the output of a transmitting basic clock generating circuit 14 to convert it into an optical signal of a wavelength lambda1. This optical signal is multiplexed along with a signal of a wavelength lambda2 through a wave synthesizer 18 to be delivered.
Patent JP-S60246480-A (JP)
Title: Three-dimensional interactive processor
Inventor: SUGAWARA MICHITAKA
IPC: G06T7/60
Filed: 1984-05-22
Abstract: PURPOSE:To execute easily an interactive processing of a three-dimensional picture by providing a coordinate calculating means for calculating a three-dimensional coordinate of a specified part of an operator. CONSTITUTION:A real image and a mirror image, namely, a parallax image of an operator 1 photographed by a video camera 2b are inputted to a binary- coding processing means 3, converted to a binary-coded picture, and stored temporarily in a picture memory 4. Subsequently, based on the binary-coded picture stored in the memory 4, a head part center coordinate of the operator in three dimensions is calculated by a coordinate calculating means 5. When the calculated head part center coordinate in three dimensions is inputted to a picture processing means 6, this picture processing means 6 executes a picture processing of a three-dimensional picture data in accordance with the inputted head part center coordinate, and offers its processing result to a pseudo three-dimensional display. In this way, the operator 1 can execute such processings as magnification, reduction, rotation, etc. of a picture by only moving the head part.
Patent JP-S60247277-A (JP)
Title: Contact roller type fixing device
Inventor: MORI SHIGENORI
IPC: G03G15/20
Filed: 1984-05-22
Abstract: PURPOSE:To execute stable copying irrespective of paper size by providing plural heat roll setting temps., and gradually changing over these setting temps., and suppressing the temp. of the end of the heat roll. CONSTITUTION:The plural setting temps. of the heat roll are provided and when a copying quantity detector B detects the arrival at a prescribed value during copying, it changes over from the first setting temp. to the second lower setting temp. through a temp. controller C and a setting temp. changer D. The temp. of the end of the heat roll higher in temp. than the middle part can be suppressed to a hot offset temp. of lower by repeating the change-over of the setting temps., thus permitting stable copying to be executed irrespective of paper size.
Patent JP-H09253390-A (JP)
Title: Blinding cover for hanging type haundry drying tool
Inventor: KAWABATA TOSHIAKI
IPC: D04H1/4326
Filed: 1996-03-19
Abstract: PROBLEM TO BE SOLVED: To improve the blinding function of laundry inside by providing an upper surface cover part where an insertion hole for passing through the hook of a laundry drying tool is formed and a side face cover part for surrounding laundry attached to the laundry drying tool and forming them by nonwoven fabric not provided with transparency and a see-through hole and provided with water repellency. SOLUTION: In the case of performing execution to a hanging type laundry drying tool 1, the upper surface cover part 4 for covering the upper surface of the hanging frame 9 of the laundry drying tool 1 is formed and the insertion hole 3 for passing through the hook 2 of the laundry drying tool 1 is formed at the center. Also, the upper edge of the side face cover part 6 for surrounding the laundry 5 attached to the laundry drying tool 1 through pinches 10 is connected to the peripheral edge of the upper surface cover part 4. Then, the upper surface cover part 4 and the side face cover part 6 are formed by the nonwoven fabric not provided with the transparency and the see-through hole and provided with the water repellency.  To put it concretely, the one for which water repellency work is performed by a water repellency agent to the nonwoven fabric made of nylon fibers, the nonwoven fabric made of polyster fibers, the nonwoven fabric made of polypropylene fibers and the other nonwoven fabric is used.
Patent JP-S584182-A (JP)
Inventor: ONDA NOBUHIKO
IPC: G06T11/80
Filed: 1981-06-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5326642-A (JP)
Title: Graphic equ alizer
Inventor: TAKAHASHI KENICHI
IPC: H04B3/14
Filed: 1976-08-25
Abstract: PURPOSE:To perform an accurate and quick setting and memorization of the frequency property for a graphic equalizer by combining a BPF, attenuator and digital circuit.
Patent JP-H02290717-A (JP)
Title: Tilt sliding sun roof device
Inventor: OISHI TOSHIOMI
IPC: B60J7/05
Filed: 1989-04-21
Abstract: PURPOSE:To prevent backlashing of a roof panel caused by the resistance of wind by providing a shift regulating member which has an engaging part to regulate backward and forward shift of the roof panel, when the roof panel is between an opening nearly closed posture and a tilted-up posture. CONSTITUTION:Front and rear supports 9 and 10 and middle supports 11 are fixed to left and right both sides parts at the bottom of a roof panel 4 which is free in opening and closing in the backward and forward direction along a pair of guide rails being arranged on right and left both sides of a roof opening 3. And shoes are provided at both ends of a front support part 14 in the left and right direction being provided at the front support 9, and those are guided by the guide rail 5. Moreover, the front upper end of a shift regulating member 19 is pivoted on the middle support 11 through a pin 18, and a shoe on the supporting shaft 20 provided at the rear lower end is guided by the guide rail 5. An engaging part 23 projected in the left and right direction is formed at the middle of the shift regulating member 19, and this engaging part 23 is made free in engagement to the part 24 to be engaged being formed at the guide rail 5, when the front support part 14 abuts on a front stopper 15.
Patent JP-S62259123-A (JP)
Title: Data entry device
Inventor: NAKAJIMA SHUZO
IPC: G06F3/02
Filed: 1986-05-06
Abstract: PURPOSE:To secure coincidence between the actual slip position and the cursor position display obtained in a program production mode, by displaying the cursor position equivalent to two characters just with a single KANJI (Chinese characters) defining character and giving the +1 increment to other defining characters. CONSTITUTION:A defining character deciding part 4 decide whether the input defining character defines KANJI or not. If the defining character defines KANJI, the cursor position display data which gives +2 increment to the numeric value showing the cursor position display is written to a buffer 5. Here a CRT controller 6 displays the input defining character on a CRT7 and at the same time moves forward the cursor position by +1 for display. At the same time, the controller 6 reads the cursor position display data out of the buffer 5 and gives the +1 or +2 increment to the numeric value for display of the cursor position on the CRT7.
Patent JP-H08297724-A (JP)
Title: Detection device for exchange of memory card
Inventor: AMAIKE MASAHARU
IPC: G06F12/06
Filed: 1995-04-26
Abstract: PURPOSE: To provide an excellent memory card detection device which carries on a program operation as it is when the same memory cards are put into the card detection device. CONSTITUTION: When a state detection part 11 detects that an IC memory card 2 is put into a memory card detection device, a control part 12 gives an instruction to a data collation part 15 to perform collation to the BCC of a program. The part 15 performs collation to decide whether the coincidence is confirmed between the program BCC of the card 2 and the BCC that is stored in a BCC store part 14. If no coincidence is confirmed between both BCCs, the part 12 instructs an initialization processing part 17 to start initialization and the program of the card 2 is read into the card detection device. Then the part 12 calculates the program BCC of the card 2 through a BCC calculation part 13 and stores this BCC in the part 14.
Patent JP-S583815-A (JP)
Inventor: ITOU KIYOUJI
IPC: B28B1/26
Filed: 1981-06-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H09289216-A (JP)
Title: Field-effect transistor
Inventor: TANABE MITSURU
IPC: H01L29/812
Filed: 1996-04-24
Abstract: PROBLEM TO BE SOLVED: To apply a high electric field to a portion below a gate electrode even with low drain bias voltage in a field-effect transistor comprising a wide gap semiconductor. SOLUTION: This device comprises a channel layer 12 made of an n type SiC into which nitrogen is doped on an SiC semiconductor substrate 11, a first conductive layer 13B and a second conductive layer 13C both comprising an n+t type SiC into which higher concentration nitrogen than the channel layer 12 is doped on the channel layer 12, and an Ni source electrode 17B on the first conductive layer 13B and an Ni drain electrode 17C on the second conductive layer 13C. An Al gate electrode 19B is formed on the first conductive layer 13B so as to stride a side part of the first conductive layer 13B in the length direction of the same on the side of the drain electrode 17C.
Patent JP-S5626465-A (JP)
Title: Semiconductor memory and the manufacturing process thereof
Inventor: OONO NOBUHIKO
IPC: H01L21/8229
Filed: 1979-08-13
Abstract: PURPOSE:To improve 'write' recovery, by converting a relatively low-resistance semiconductor portion, which is located between a base region and an embedded layer in a bipolar transistor type memory cell, to an electroconductive type identical with the base region so that it takes a shape of a substantially broadened base width. CONSTITUTION:An N<+> type embedded layer 11 is dispersingly formed on a P type Si substrate 10, and ion is driven into surface of this layer to form a P<+> type layer  11A. And then, an N type layer which is to become a base region is allowed to  grow epitaxially on an entire surface as usual and, at this time, a P type impurity in the P<+> type layer 11A having been formed in advance is raised and dispersed in an N type epitaxial layer, and the N type epitaxial layer is converted to P type to form a P type base layer 12. And then, by forming a thick field SiO2 film 13 in the surrounding area as usual to turn the layer 12 into an island shape, a P<+> type base region 14 is dispersingly formed in the layer 12 and an N<+> type emitter region 15 is provided in this region 14. A thin SiO2 film 13 is attached onto the regions 14 and 15 and provided with a window, and an emitter electrode 16 is installed on the region 15.
Patent JP-S62257873-A (JP)
Title: Printer
Inventor: KUROKI HIDEO
IPC: B41J29/38
Filed: 1986-05-02
Abstract: PURPOSE:To enable a turning-up action of a carriage to be started immediately after a printing position is shifted to the next line, by starting forming a printing parameter table when printing in a line is finished, and completing the printing parameter table before line feeding is finished. CONSTITUTION:Printing position information for one line is stored in a printing parameter table 3a. When printing in a line is finished and deceleration of a carriage is started, a controlling means 2 starts forming a printing parameter table for the next line. When formation of the printing parameter table is finished, the controlling means 2 references the table, and forms a step table 4a for storing driving information for a stepping motor. This operation is carried out physically by a CPU 9, a ROM 10 and a RAM 11. Because the formation of the printing parameter table is completed before line feeding is finished, a turning-up action of the carriage can be started immediately after the printing position is shifted to the next line, and printing speed can be enhanced.
Patent JP-S59227404-A (JP)
Inventor: KOYAMA HIROYASU
IPC: B28B1/44
Filed: 1983-06-08
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S60246582-A (JP)
Inventor: SATOU GOROU
IPC: H05B3/06
Filed: 1984-05-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S583046-A (JP)
Title: 1 chip microcomputer debugging system
Inventor: OZAKI TAKAYUKI
IPC: G06F11/28
Filed: 1981-06-30
Abstract: PURPOSE:To improve debugging efficiency, by constituting a system so that only a changed part can be corrected when changing a program. CONSTITUTION:A storing circuit which is capable of executing write, read-out and correction of write inputted from the outside is constituted of a random access memory (RAM)1. A host computer system 2 connected to the RAM1 is provided with a microcomputer, an RAM, an ROM, a paper tape reader keyboard display part, etc., so that write and read-out to the RAM1 can be executed. The host computer system 2 and a debug CPU4 are switched by a switching controlling circuit 3, and are connected to the RAM1.
Patent JP-S5255651-A (JP)
Title: Light-diffusing plate
Inventor: IMATAKI HIROYUKI
IPC: G02B5/02
Filed: 1976-08-27
Abstract: PURPOSE:To obtain a light-diffusing plate excelling in light diffusion properties by subjecting to heat treatment for effecting crystal growth a plate composed of a molten blend of two or more of polymers which include a crystallizable polymer and which differ in index of refraction.
Patent JP-S59221852-A (JP)
Inventor: JIYON DABURIYUU FUUBAA
IPC: G11B15/18
Filed: 1984-05-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。