Patent GB-1220866-A (GB)
Title: Improvements in or relating to intelligence communication systems
IPC: H04B7/08
Filed: 1968-05-06
Abstract: 1,220,866. Radio signalling. RUCKER CO. 6 May, 1968 [19 July, 1967], No. 21261/68. Heading H4L. The diversity reception system disclosed in Specification 1,137,498 is modified in that the amplifier in each diversity channel is provided with slow and fast acting A.G.C. circuits under the control of signals derived from the recurring characteristic of the incoming signals, Fig. 3, to ensure that the channel with the best signal to noise ratio is utilized, rather than that with highest signal level. Further means are provided for suppressing a channel signal if it falls below a certain level. Also the fixed reference voltage used in the prior Specification for comparison with the signals representing the noise present in the respective channels is replaced by a variable reference voltage E R  which is dependent on the amplitude and "quality" of the input signals, Fig. 5. Fig. 3 shows the means for deriving a signal representing the "quality" or noise content of an incoming signal on one of the channels. The incoming signal from a receiver A is supplied via a gain controlled amplifier 40 and output lead 24A to a channel switch or attenuator controlled to pass only the selected signal to the output circuit. The output of amplifier 40 is also supplied via an envelope demodulator 41 to an integrator 42 which as in the prior Specification supplies a signal representing the "quality" of the incoming signal taking into account its immediate past history. This signal is supplied to a comparator for the corresponding channel where it is compared with the aforementioned reference voltage. Gain control for amplifier 40 is provided by a summing amplifier 48A receiving inputs from the demodulator 41 and integrator 42. A further amplifier 43 receives the input signal which is demodulated at 44, integrated at 45 and compared at 47 with a reference voltage from 46 to supply a control signal to the summing amplifier 48A whenever the reference voltage exceeds the signal voltage. This control signal operates via the A.G.C. circuits to decrease the gain of the amplifier 40. The A.G.C. circuit includes a long time constant circuit R2, C2 and a short time constant circuit R1, C1, circuit R1, C1 being normally blocked by the diode D1 so that only R2, C2 is operative. If a sudden increase of signal amplitude occurs, the amplifier 48A is driven into saturation which causes diode D1 to conduct so that circuit R1, C1 is operative. To derive the variable reference voltage E R  the outputs such as 50A from the various signal processors, are supplied to a preselector 200, Fig. 5, which passes only the highest amplitude signal via resistor R5 to a summing amplifier 204. The output of the preselector is also differentiated and supplied via resistor R6 to the amplifier 204, a voltage level memory circuit 202 supplies an output via resistor R7 and a fixed reference voltage 203 is supplied via resistor R8 to the amplifier. Curves are given showing the development of the reference voltage E R  in the presence of a very good channel and in the presence of a poor but acceptable channel.