baber/WOPTO huggingface dataset:
Patent TW-367414-B (TW)
Title: Parallel bit test circuit having common output driver and parallel bit test method using the same
Inventor: KIM BYUNG-CHUL
IPC: G11C29/12
Filed: 1998-06-03
Granted: 1999-08-21
Abstract: A parallel bit test circuit and a parallel bit test method are disclosed. The parallel bit test circuit includes normal drivers, a comparison circuit and test drivers. Eight data units are amplified by corresponding sense amplifiers in a memory cell array to be data line outputs. In a normal output mode, each of the normal drivers transmits corresponding data line outputs to global output lines. The comparison circuit compares data line outputs in response to the number of compared bits and outputs compared signals, in a parallel bit test mode. Also, the test drivers receive output signals of the corresponding comparison circuit and transmit the input signals to a corresponding global output line.
Patent TW-381401-B (TW)
Title: Video clock pulse phase automatic correction method and the apparatus
Inventor: YANG HE-SHING
IPC: H04N9/77
Filed: 1998-08-07
Granted: 2000-02-01
Abstract: A kind of synchronous signal phase correcting device which comprises: phase adjusting circuit, used to adjust the phase of synchronous signal; phase lock loop, used to generate clock pulse corresponding to the output of phase adjusting circuit; locking circuit, used to lock the testing code and generate a locking code corresponding to the testing code in input data and the output of phase lock loop; comparison circuit, used to compare the locking code and testing code; switching circuit, used to correspond to output of comparison circuit and change the delay time of phase adjusting circuit. The correction of synchronous signal phase may include the following steps: firstly, delaying the phase of synchronous signal; generating clock pulse signal from the delayed synchronous signal; generating locking code by locking testing code from clock pulse signal; then, comparing locking code and testing code; adjusting phase delay of synchronous signal while the locking code and testing code are different; furthermore, repeating the said delaying, clock pulse signal generating, locking code generating, comparing of locking and testing codes, and phase delay adjusting until the locking code and testing code are completely the same.
Patent TW-426835-B (TW)
Title: View offset estimation for stereoscopic video coding
Inventor: CHEN XUEMIN
IPC: H04N13/239
Filed: 1998-10-29
Granted: 2001-03-21
Abstract: In a stereoscopic video transmission system, where an enhancement layer image is disparity predicted using a lower layer images, the lower layer image is made to more closely match the enhancement layer image by shifting the lower layer image to the right to compensate for inter-ocular camera lens separation. The motion vector search range for disparity prediction is reduced to improve coding efficiency. At an encoder, the optimal offset, x, between the enhancement layer image and the lower layer image is determined according to either a minimum mean error or a minimum mean squared error between the enhancement and lower layer images. The offset x is bounded by an offset search range X. The x rightmost pixel columns of the lower layer image are deleted, and the x leftmost columns of the lower layer image are padded to effectively shift the lower layer image to the right by x pixels to obtain the reference image for use in disparity predicting the enhancement layer image. For arbitrarily shaped images such as VOPs within a frame, the leftmost portion is deleted and the rightmost portion is padded. At a decoder, the offset value x is recovered if available and used to reconstruct the reference frame.
Patent TW-378306-B (TW)
Title: Computer processor with dynamic setting of latency values for memory access
Inventor: HOLSCHER BRIAN
IPC: G06F9/445
Filed: 1998-12-15
Granted: 2000-01-01
Abstract: A computer processor includes a dynamic latency module. The dynamic latency module includes a read-only memory (""ROM"") in which is stored a plurality of sets of latency values. The dynamic latency module further includes a register coupled to the ROM and adapted to store at least one set of the plurality of sets of latency values. The dynamic latency module dynamically sets a plurality of memory access latency values by determining an operating speed of the processor and implementing one of the plurality of sets of latency values based on the operating speed.
Patent TW-396027-B (TW)
Title: Shower device
Inventor: SASAKI TSUTOMU
IPC: A47K3/28
Filed: 1999-02-05
Granted: 2000-07-01
Abstract: A hollow bar is provided in a bath room and connected to a faucet 10 and a shower head 1. The hollow bar comprises a slide bar 3 for a hook 2 for shower head 1 or a grip bar 15 for user. A water treatment material such as filter material, ion exchange resin, ceramic to the like is received in the hollow bar. Water spouts from faucet 10 to pass through the water treatment material in the hollow bar so that the water can be treated by the water treatment material. The treated water is directed to the shower head 1 to spout therefrom.
Patent TW-436469-B (TW)
Title: Glass-ceramic substrate for a magnetic information recording medium
Inventor: GOTO NAOYUKI
IPC: C03C10/02
Filed: 1999-02-24
Granted: 2001-05-28
Abstract: A glass-ceramic substrate for a magnetic information recording medium contains, as a main crystal phase or phases, one or more crystal phases selected from the group consisting of β-quartz (β-SiO2), β-quartz solid solution (β-SiO2 solid solution), β-spodumene (β-Li2O.Al2O3.SiO2), β-spodumene solid solution (β-LI2O.Al2O3.SiO2 solid solution), β-eucryptite (β-Li2O.Al2O3.2SiO2, a part of Li2O being capable of being substituted by MgO and/or ZnO) and β-eucryptite solid solution (β-Li2O.Al2O3.2SiO2 solid solution, a part of Li2O being capable of being substututed by MgO and/or ZnO). Alternatively, the glass-ceramic contains, as a main crystal phase or phases, gahnite (ZnAl2O4 and/or gahnite solid solution (ZnAl2O4 solid solution). The glass-ceramic substrate has a high heat resisting property and a super flat surface capable of achieving a high recording density according to the perpendicular magnetic recording.
Patent TW-428155-B (TW)
Title: Method and apparatus for outputting an on-screen display of a display device
Inventor: KIM JUNG-DAE
IPC: G09G1/00
Filed: 1999-03-09
Granted: 2001-04-01
Abstract: A method and an apparatus for outputting an OSD of a display device, which is capable of preventing the display device from damaging by means of the OSD which represents an operation state of the display device, is disclosed. If an OSD activation signal which represents an abnormal state of the display device is inputted, a control section controls an OSD circuit section and outputs the OSD. If an output time of the OSD exceeds a predetermined reference time, control section changes an output position of the OSD. Control section outputs the OSD to the changed output position. Control section repeatedly executes an operation for changing the output position of the OSD based on whether or not the output time of the OSD outputted to the changed output position exceeds the predetermined reference time. Accordingly, it is able to prevent the display device such as the cathode-ray tube and liquid crystal display from damaging by displaying the OSD on the one output position of the display device for a long time. Also, it is able to prevent the life of the display device from decreasing.
Patent TW-403965-B (TW)
Title: The method of etching the silicon nitride to form the spacer
Inventor: TSAI HUEI-YING
IPC: H01L21/3213
Filed: 1999-05-28
Granted: 2000-09-01
Abstract: A method of forming the silicon nitride spacer on the sidewall of the conductive structure comprising the following steps: First, provide a semiconductor substrate wherein there is a conductive structure on the upper surface of said semiconductor substrate, and a silicon nitride layer which is covered on the conductive structure. Next, etch the silicon nitride layer to form the spacer on the sidewall of the conductive structure wherein the used etch recipe comprises the first reactive gas (CiFj), the second reactive gas (CxHyFz), inert gas Ar and oxygen (O2).
Patent TW-503658-B (TW)
Title: Method and apparatus for producing program information and receiving apparatus for processing the program information
Inventor: ARAI YUKO
IPC: H04N5/44
Filed: 1999-06-17
Granted: 2002-09-21
Abstract: A program information storing section (2) stores program information including program name, program start time, and channel discriminating information. A program information search section (4) searches the program information stored in the program information storing section (2) according to designated search conditions and produces personalized program information resulting from the search. A program guide display section (6) displays a program guide including a personal channel consisting of the resultant program information. Thus, the receiving apparatus (100) allows users to display their personal channels.
Patent TW-445571-B (TW)
Title: Manufacturing method for shallow trench isolation
Inventor: JANG SYUN-MING
IPC: H01L21/76
Filed: 1999-06-28
Granted: 2001-07-11
Abstract: A manufacturing method for shallow trench isolation according to the present invention is disclosed, wherein after forming insulation layer on the barrier and trench by high density plasma chemical vapor deposition method, conduct sputtering back on the insulation layer for planarizing the insulation layer so that it can not only solve the problem of rugged insulation layer but also prevent the problems caused by the improved manufacturing method of active area reverse tone; that is, it eliminates the photolithography technique and etching process; and, it has no need for over-polishing and also without alignment deviation. The present invention will not be limited by the resolution of the stepping machine so as to be beneficial to the design rule to approach smaller dimension for the future requirement.
Patent TW-417255-B (TW)
Title: Manufacturing method of self-aligned selective gate with a split-gate non-volatile memory structure
Inventor: CHEN BIN-SHING
IPC: H01L27/115
Filed: 1999-07-19
Granted: 2001-01-01
Abstract: There is provided a method for manufacturing a non-volatile memory device. In accordance with the present invention, the method includes: forming an insulating layer over a semiconductor substrate of a first conductivity type; forming a first polysilicon layer over the insulating layer; forming a nitride layer over the first polysilicon layer such that first and second portions of the first polysilicon layer are exposed; and forming first and second insulating regions on the first and second exposed portions, respectively, of the first polysilicon layer; the first insulating region and the first portion of the first polysilicon layer are then removed such that the substrate underneath insulation layer is exposed to allow an impurity region of a second conductivity type to be formed; subsequently the nitride layer is removed; and finally, the first polysilicon layer is etched such that only the second portion of the first polysilicon layer underneath the second insulating region is remained.
Patent TW-442879-B (TW)
Title: Test chip, its manufacturing method, and method using the test chip to identify the cleaning capability and efficiency of a chemical station
Inventor: HUANG JENG-JIE
IPC: H01L21/66
Filed: 1999-08-03
Granted: 2001-06-23
Abstract: A test chip comprises a semiconductor substrate; an oxide layer formed on the semiconductor substrate; a polysilicon layer and polymer formed on the oxide layer, wherein the polysilicon layer has an opening for exposing part surface of the lower oxide layer; and the polymer is formed on the exposed surface of the oxide layer. In addition, the oxide layer also has an opening, and the polysilicon layer is connected to the substrate via the opening in the oxide layer. The polymer is a cluster defect, whose composition is the residue containing fluorine.
Patent TW-452603-B (TW)
Title: Methods for preparing ruthenium and osmium compounds
Inventor: UHLENBROCK STEFAN
IPC: C07F9/02
Filed: 1999-08-11
Granted: 2001-09-01
Abstract: The present invention provides methods for the preparation of compounds of the formula (formula I): LyM(CO)z, wherein M is Ru or Os, each L is independently a neutral ligand, y=1-4, and z=1- 5. These methods involve the reaction of Ru3(CO)12 or Os3(CO)12 with a neutral ligand in a solvent system having a boiling point higher than that of benzene at atmospheric pressure.
Patent TW-418133-B (TW)
Title: Device for hydraulically adjusting the rollers of strand guiding segments of a continuous casting installation
Inventor: GEERKENS CHRISTIAN
IPC: B22D11/128
Filed: 1999-08-12
Granted: 2001-01-11
Abstract: This invention relates to a device for hydraulically adjusting component, especially the rollers of stand guiding segments of a continuous casting installation with hydraulic cylinders (2) which are subdivided into a cylinder chamber (9) and an annular cylinder chamber (11) by each one piston (12) comprising a piston rod (13). The cylinder chambers (9, 11) can be alternatively, reciprocally and simultaneously connected to a pressure source (7) and to a pressure sink (5) by control elements. The disadvantages of prior art continuous valves used as control elements, primarily their high level of sensitivity with regard to cleanness and lubricity of the working fluid, are avoided in that control valves are provided as control elements. The control valves are non-sensitive with regard to cleanness and to the use of an oil-in-water emulsion used as a working fluid.
Patent TW-495529-B (TW)
Title: Salt-modified electrostatic dissipative polymers
Inventor: ECKSTEIN YONA
IPC: C08K3/00
Filed: 1999-10-26
Granted: 2002-07-21
Abstract: A low molecular weight polyether oligomer is modified with a salt during chain extending reaction of the polyether oligomer to form electrostatic dissipative polymer products such as polyurethanes, polyether amide block copolymers and polyether-ester block copolymers. The reaction product polymers exhibit relatively low surface and volume resistivities, and static decay times which are not too fast or too slow, yet are free of excessive amounts of extractable anions, particularly chlorine, nitrate, phosphate and sulfate. The electrostatic dissipative polymers can be blended with a variety of base polymers to form plastic alloys, which in turn can be utilized to form articles useful in the manufacture of electrostatic sensitive electronic devices.
Patent TW-I255840-B (TW)
Title: Silicone composition, method for the preparation thereof, and silicone elastomer
Inventor: LEE YEONG-JOO
IPC: H01L23/29
Filed: 1999-10-18
Granted: 2006-06-01
Abstract: A silicone composition comprising (A) 100 parts by weight of a polydiorganosiloxane containing an average of at least two silicon-bonded alkenyl groups per molecule; (B) 75 to 150 parts by weight of an organopolysiloxane resin having a number-average molecular weight of from 2,000 to 5,000 and comprising R32R4SiO1/2 units and SiO4/2 units wherein each R3 is independently selected from monovalent hydrocarbon and monovalent halogenated hydrocarbon groups free of aliphatic unsaturation, R4 is selected from R3 and alkenyl, the mole ratio of R32R4SiO1/2 units to SiO4/2 units is from 0.6:1 to 1.1:1, and the resin contains an average of from 2.5 to 7.5 mole percent of alkenyl groups; (C) an organohydrogenpolysiloxane having an average of at least three silicon-bonded hydrogen atoms per molecule in an amount to provide from one to three silicon-bonded hydrogen atoms per alkenyl group in components (A) and (B) combined; (D) an adhesion promoter in an amount to effect adhesion of the composition to a substrate; and (E) a hydrosilylation catalyst in an amount to cure the composition.
Patent TW-496845-B (TW)
Title: Machine for manufacturing pneumatically filled packing cushions
Inventor: AQUARIUS PETER THEODORUS JOSEP
IPC: B31D5/00
Filed: 2000-01-13
Granted: 2002-08-01
Abstract: Machine for manufacturing pneumatically filled packing cushions from a tubular plastic film at a single processing station where perforations are formed in the film, a gas is introduced into the film through the perforations, and seals are formed on opposite sides of the perforations. The gas is introduced through an injector and a plate which is positioned within the film. The plate is movable longitudinally within the film between advanced and retracted positions relative to the injector, and has passageways for directing the gas into the portion of the film where a cushion is being formed.
Patent TW-462171-B (TW)
Title: Sample data transmitting method, receiving method, transmission/reception method and its transmission apparatus, reception apparatus, transmission/reception apparatus
Inventor: SATO MAKOTO
IPC: G11B20/12
Filed: 2000-02-24
Granted: 2001-11-01
Abstract: In order to transmit and receive sample data of different sampling frequencies collectively, the first row of a packet is composed of 4 bytes and the first and second rows are provided with headers prescribed by IEEE1394. Also, the second one byte in the third row is provided with the first counted value (DBS) of a data block counter and a fourth one byte is provided with a next to the last counted value (DBC) of the data block counter. Further, latter half 2 bytes in the fourth row are provided with a value (SYT) of a reference time (time stamp data). First 2 bits in and after the fifth row are provided with values showing recording media; and the fourth bits are provided with flags showing sampling frequencies; and the seventh and eighth bits are provided with values showing quantized bit numbers; and the second three bytes and after are provided with sample data. The last row of the packet is provided with an error correcting code for data transmitted in and after the third row.
Patent TW-434822-B (TW)
Title: Method to form node contact window
Inventor: LIN SZ-MIN
IPC: H01L21/768
Filed: 2000-02-25
Granted: 2001-05-16
Abstract: The present invention provides a method to form node contact window, which comprises the following fundamental steps: first providing a substrate, and forming a dielectric layer on this substrate; then forming a polysilicon layer on this dielectric layer; proceeding a photolithography and etching process on this polysilicon layer to thereby convert this polysilicon layer into a patterned mask layer which comprises a plurality of gaps; then forming a selectively grown polysilicon layer on this patterned mask layer, and both of the selectively grown polysilicon layer and patterned mask layer forming a stack structure together; and proceeding an etching procedure to the dielectric layer by using the stack structure as the mask, whereby a plurality of node contact windows under these gaps can be formed in the dielectric layer.
Patent TW-553987-B (TW)
Title: Halogen-free flame-retardant composition
Inventor: VAN DER SPEK PIETER ARIE
IPC: C08L23/08
Filed: 2000-05-09
Granted: 2003-09-21
Abstract: The invention relates to a halogenfree, flame-retardant composition that comprises at least (A) an organic phosphorus compound and (B) melamine or a compound derived from melamine, or a melamine-phosphorus compound (AB) and a polymer compound comprising an olefine having 2-12 carbon atoms and 0.1-30 weight % (relative to the weight of the polymer compound) of a compound containing acid, acid anhydride or epoxy groups. The invention also relates to a polycondensate composition that contains the flame-retardant composition according to the invention. The flame-retardant composition according to the invention presents the advantage that the burning time of the polycondensate composition in which the composition according to the invention is used is substantially shortened. Preferably the flame-retardant composition is used in polyesters or polyamides.
Patent TW-503640-B (TW)
Title: Telephone line interface circuit with intelligent line current and voltage control
Inventor: SACCA FRANK
IPC: H04M3/00
Filed: 2000-05-12
Granted: 2002-09-21
Abstract: A telephone line interface circuit is disclosed having intelligent line current control that can adjust to the various requirements of worldwide telephone systems (DC masks), and/or can reduce the power consumed by the interface circuit. A controller reads a voltage value and based on the theoretical model of a telephone line network, and the expected current/voltage characteristic, as dictated by the appropriate DC mask. The controller sets the line current (via an output voltage) to an optimum value and causes the line voltage to adjust so as to comply with the DC mask and/or minimize power dissipation in the circuit.
Patent TW-430759-B (TW)
Title: Temperature control apparatus
Inventor: TSAI YAU-YANG
IPC: G05D23/00
Filed: 2000-08-11
Granted: 2001-04-21
Abstract: This invention discloses a temperature control apparatus that includes a container having heat exchange medium inside. The container is coupled to an external machine, in which temperature of the external machine is controlled by introducing heat exchange medium into the external machine. In addition, the container stated above contains a discharging hole to discharge heat exchange medium in the container. The characteristic of this invention is that it includes a monitoring tube and an alarm height. One end of the monitoring tube is connected and fixed to the discharging hole stated above. The other end of monitoring tube faces upward and is used to monitor the remaining quantity of heat exchange medium inside the container. Heat exchange medium inside the monitoring tube is connected together with heat exchange medium inside the container. The alarm height is exhibited on the monitoring tube stated above and corresponds to the smallest quantity of heat exchange medium required for temperature control apparatus to operate normally.
Patent TW-455684-B (TW)
Title: Parallel mechanism and test apparatus
Inventor: OKADA NAOBUMI
IPC: B23Q1/56
Filed: 2000-09-22
Granted: 2001-09-21
Abstract: A parallel mechanism includes three expandable linear actuators (5), (12) and (13); drive means for supporting the proximity ends of the linear actuators (5), (12) and (13) so that they can move along guide rails (2), (6) and (7), at least one of the guide rails including slopes (102) and (103) on which the actuators (12) and (13) run with their levels varying; a stage support (23) held by the distal ends of the linear actuators (5), (12) and (13); and a wafer holder (24) attached to a moving member for holding a workpiece.
Patent TW-469137-B (TW)
Title: Pump dispenser with dosage control and child-resistant feature
Inventor: DOBBS DOUGLAS B
IPC: B65D47/34
Filed: 2000-10-17
Granted: 2001-12-21
Abstract: A manually actuated pump dispenser has a control ring mounted on the pump body for rotation about its central axis and engaging the pump plunge for controlling the number of plunger strokes and thereby the dosage of the dispenser for each cycle of revolution of the control ring, the plunger being releasably locked with the control ring against plunger reciprocation at the commencement and at the end of each cycle of revolution of the control ring to thereby render the same child-resistant.
Patent TW-502165-B (TW)
Title: System and method for effectively utilizing a cache memory in an electronic device
Inventor: JAMES DAVID V
IPC: G06F12/0804
Filed: 2001-03-02
Granted: 2002-09-11
Abstract: A system and method for effectively utilizing a cache memory in an electronic device comprises a processor that operates in response to a software program to insert a marker in isochronous data that is stored in the cache memory. The marker may then be utilized to identify the isochronous data as special information that is protected from removal from the cache device without the occurrence of a predetermined rollout exception event.