Patent SG-11201908704X-A (SG)
Title: Semiconductor on insulator type structure, notably for a front side type imager, and method of manufacturing such a structure
Inventor: SCHWARZENBACH WALTER
IPC: H01L21/02
Filed: 2018-03-21
Abstract: International Patent Classification: HOlL 21/762 (2006.01) HOlL 21/02 (2006.01) C3OB 25/02 (2006.01) (21) International Application Number: PCT/EP2018/057151 (22) International Filing Date: GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). (25) Filing Language: (26) Publication Language: (30) Priority Data: 1752310 21 March 2018 (21.03.2018) English English Declarations under Rule 4.17: — of inventorship (Rule 4.17(iv)) Published: — with international search report (Art. 21(3)) 21 March 2017 (21.03.2017) FR sir 7,ain FIGURE 2 W O 20 18/ 17 2405 Al (12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property Organization International Bureau (43) International Publication Date 27 September 2018 (27.09.2018) WIP0 I PCT mu °million °nolo olo 0111HoVIIIIIII1111111 ois (10) International Publication Number WO 2018/172405 Al (71) Applicant: SOITEC [FR/FR]; Parc Technologique des Fontaines, Chemin des Franques, 38190 BERNIN (FR). (72) Inventors: SCHWARZENBACH, Walter; 19, Chemin du Mollard, 38330 SAINT NAZAIRE LES EYMES (FR). KONONCHUK, Oleg; MONTGOYE, 38570 THEYS (FR). ECARNOT, Ludovic; 44 rue Saint Laurent, 38000 GRENOBLE (FR). (74) Agent: REGIMBEAU; 87, rue de Seze, 69477 LYON CEDEX 06 (FR). (81) Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, = (54) Title: SEMICONDUCTOR ON INSULATOR TYPE STRUCTURE, NOTABLY FOR A FRONT SIDE TYPE IMAGER, AND METHOD OF MANUFACTURING SUCH A STRUCTURE (57) : The invention relates to a semiconductor on insulator type structure notably for a front side type imager, successively compris- ing from its rear side to its front side a semiconductor support substrate (1), an electrically insulating layer (2) and a monocrystalline semicon- ductor layer (3) called active layer, characterised in that the active layer (3) is made of a semiconductor material having a state of mechanical stress with respect to the support substrate (1), and in that said support substrate (1) comprises, on its rear side, a silicon oxide layer (4), the thickness of said oxide layer (4) being chosen to compensate the bow induced by the mechanical stress between the active layer and the sup- port substrate during cooling of the structure after the formation by epi- taxy of at least a part of the active layer (3) on the support substrate.