Patent RU-94013836-A (RU)
Title: Device for control of regeneration in semiconductor dynamic memory
Inventor: SAMKHARADZE T G
IPC: G11C11/406
Filed: 1994-04-28
Abstract: FIELD: computer engineering. SUBSTANCE: device has first, second, third and fourth NAND gates, first and second flip-flops, first, second and third AND gates, first and second delay gates, OR gate, NOT gate. First input of first NAND gate is connected to direct input of first flip-flop, which synchronization input serves as first synchronization input of device. Output of second NAND gate is connected to setting input of first flip-flop, which inverse output is connected to reset input of second flip-flop and first input of third NAND gate, which second input serves as device control input. First input of fourth NAND gate is connected to output of first AND gate and serves as starting output of device. First input of second AND gate is connected to direct output of second flip-flop, which information input is device input fro logical one. Output of first NAND gate is connected to first input of third AND gate, which second input and input of first and first delay gate are joined and connected to output of third NAND gate. Input of second delay gate and first input of first AND gate are joined and connected to output of OR gate, which first input and input of NOT gate are joined and connected to request input of device. Output of NOT gate is connected to first input of second NAND gate, which second input, second input of first NAND gate and second input of fourth NAND gate are joined and connected to second synchronization input of device. Third input of second NAND gate is connected to output of second AND gate, which second input is connected to output of first delay gate. Output of second delay gate is connected to second input of first AND gate. Output of fourth NAND gate and output of third AND gate are connected to, respectively, strobe output for line number and strobe output for column number. information input of first flip-flop is connected to device input of logical zero signal. Direct output of first flip-flop is connected to second input of OR gate. Unit of detectors which measure intensity of external physical magnetic fields and unit for generation of pulses for starting regeneration are introduced to accomplish the goal of invention. Inputs of unit for generation of pulses for starting regeneration are connected to output of detectors which measure intensity of external physical magnetic fields. Output of unit for generation of pulses for starting regeneration is connected to synchronization input of second flip-flop. Unit for generation of pulses for starting regeneration has integrator, which contains differential operational amplifier, comparator and controlled direct-voltage power supply, which one output is connected to one of adding inputs of integrator, which other adding inputs are inputs of unit. Output of integrator is connected to signal input of comparator, which reference voltage input is connected to another output of controlled direct-voltage power supply. Output of comparator is connected to reset input of integrator and serves as output of unit. Device may be used in special computers that are exposed to heavy physical fields with variable intensity. EFFECT: increased reliability. 1 dwg