baber/WOPTO huggingface dataset:
Patent TW-438573-B (TW)
Title: Automatic rice seedling case dismantling machine
Inventor: FENG DING-SHU
IPC: A01C11/02
Filed: 1999-09-13
Granted: 2001-06-07
Abstract: This invention discloses an automatic rice seedling case assembling and dismantling machine, comprising a conveying frame and a case dismantling machine. To feature the automatic rice seedling case dismantling machine with automatic conveying function, the trusses of the conveyer is allowed to move forwards and backwards to allow case dismantling process. The case-dismantling machine is provided to an upwardly inclined conveying portion, a lateral conveying portion, a downwardly inclined conveying portion, and a dismantling portion. This invention allows the seedling cases to be automatically lift-conveyed to be discharged into a green zone, and to be automatically picked up from the green zone after the seedling is matured.
Patent TW-447211-B (TW)
Title: Chip on board device of contact image sensor module
Inventor: LIOU YING-SHIN
IPC: H04N1/04
Filed: 1999-09-17
Granted: 2001-07-21
Abstract: The present invention discloses a chip on board device applied in contact image sensor module, which contains a photoelectric sensing integrated circuit having a plurality of photodiodes to generate corresponding analog voltage signal output in response to the intensity of light. The chip on board device comprises a main frequency generation device to provide timing signal to the contact image sensor module so as to sequentially output the analog voltage signal. Then, the digital signal corresponding to the analog voltage signal is outputted directly to the exterior of the chip on board device through circuit designs of three different kinds of concepts. These three kinds of circuit design are briefly described as follows: (1) putting the analog/digital converter on the chip on board device to directly convert the analog voltage signal to digital signal; (2) fabricating the digital/analog converter in the photoelectric sensing integrated circuit to directly output the digital signal; (3) integrating the function of peripheral circuit to process in parallel the output signal of the photoelectric sensing integrated circuit.
Patent TW-429625-B (TW)
Title: Electric charge transferring apparatus with final potential energy well close to floating diffusion region
Inventor: NAKASHIBA YASUTAKA
IPC: H01L27/148
Filed: 1999-11-20
Granted: 2001-04-11
Abstract: This invention is about a kind of electric charge transferring apparatus, which has electric charge transferring regions (102/103/203a/203b) under the electric charge transferring electrodes (107a/107b/108a/108b/207a/208a) such that electric-charge packet can be sent step by step from potential energy well to the floating diffusion region (112). In addition, the electric-charge transferring region has boundary secondary-regions (102/203a/203b), which reduce toward the floating diffusion region. Final potential energy well is generated at a specific region (203b), which is close to floating diffusion region, of the boundary secondary-region so as to make each electric-charge packet move over a short distance and enhance electric-charge transferring efficiency.
Patent TW-480719-B (TW)
Title: Semiconductor device and manufacturing method
Inventor: SRINIVASAN SENTHIL
IPC: H01L29/78
Filed: 2000-03-01
Granted: 2002-03-21
Abstract: A method for forming field effect transistor includes providing a semiconductor substrate having: a gate insulation layer; and, a gate metalization layer disposed on the gate insulation layer, such gate metalization comprising an oxidizable material. A mask is provided over the gate metalization layer, such mask having an aperture therein and masking a region of the gate metalization layer. The mask is subjected to a plasma etch to selectively remove portions of the gate metalization layer exposed by the aperture while leaving unetched the masked region of the gate metalization layer to form a gate for the transistor. An oxidation resistant layer is formed an over the formed gate. The semiconductor substrate is heated with the oxidation resistant layer. Using the gate as a mask, source and drain regions for the transistor are formed. The heating comprises heating to a temperature in the order of 1050 DEG C to anneal the substrate. A field effect transistor includes a silicon substrate; a gate silicon dioxide layer disposed on the substrate; a gate disposed on the gate insulation layer, such gate having an oxidizable material; and an oxidation resistant layer disposed on sidewalls of the oxidizable material of the gate. The oxidizable material comprises an electrically conductive material.
Patent TW-444330-B (TW)
Title: Method for forming inter-dielectric layer
Inventor: HUANG SHOU-WEI
IPC: H01L21/76
Filed: 2000-02-15
Granted: 2001-07-01
Abstract: The present invention provides a method for forming inter-dielectric layer, which comprises: providing a semiconductor structure; using a high-density plasma chemical vapor deposition method to deposit a first silicon oxide layer on the semiconductor structure; then, depositing a second silicon oxide layer on the first silicon oxide layer, wherein the material of the second silicon oxide layer at least includes TEOS, and the second silicon oxide layer is planarized; and finally, depositing a third silicon oxide layer on the second silicon oxide layer, wherein the material of the third silicon oxide layer at least includes BPSG.
Patent TW-466751-B (TW)
Title: Method and apparatus for forming an inlaid capacitor in a semiconductor wafer
Inventor: AMICO GREGORY M
IPC: H01L21/321
Filed: 2000-03-09
Granted: 2001-12-01
Abstract: An inlaid capacitor and method of forming the same on a semiconductor wafer provides for polishing a layer formed within a cavity and on a top surface of the semiconductor wafer. The layer may include a bottom electrode layer of the capacitor. The cavity, which remains open since a sacrificial material is not used to protect the cavity during polishing, contains residual particles after the polish process is completed. The particles are loosened from the surfaces of the bottom electrode layer by a megasonic cleaning process. In order to remove the loosened residual particles, the semiconductor wafers is subjected to a double-sided brush scrubbing. Following the removal of substantially all of the residual particles from within the cavity, and the surface of the bottom electrode layer, formation of the capacitor completed by the deposition of a dielectric material and a top electrode layer.
Patent TW-448275-B (TW)
Title: Method and agent for reducing chlorinated aromatic compounds
Inventor: SAITO KENJI
IPC: A62D101/22
Filed: 2000-03-27
Granted: 2001-08-01
Abstract: Chlorinated aromatic compounds such as dioxin, PCB and DDT can be effectively reduced by mixing the chlorinated aromatic compounds with an SiH group-bearing organosilicon compound and heating the mixture at 150-1,300 DEG C.
Patent TW-465145-B (TW)
Title: Wire insertion device for RJ-45 plug
Inventor: YANG YUAN-WEI
Filed: 2000-04-21
Granted: 2001-11-21
Abstract: A wire insertion device for RJ-45 plug extends the twisting length of 8 signal wires connected to a RJ-45 plug to reduce interference among signal wires. The wire insertion device is inserted into the RJ-45 plug and consists of 8 hollow channels horizontally positioned and extending from one side of the device to the other. The 8 wires for the RJ-45 plug pass through the wire insertion device to reach inside wire holes of the RJ-45 plug. Among the 8 hollow channels, two twisted pairs of hollow channels are on opposite sides of the device, a twisted pair of hollow channels is at the center of the device, and the remaining two hollow channels are located in between the three twisted-paired hollow channels.
Patent TW-498560-B (TW)
Title: Epitaxial wafer for infrared light-emitting device and light-emitting device using the same
Inventor: YOSHINAGA ATSUSHI
IPC: H01L33/30
Filed: 2000-04-25
Granted: 2002-08-11
Abstract: The present invention provides an epitaxial wafer comprising, on a p-type GaAs single-crystal substrate, a first p-type layer; a p-type cladding layer; a p-type active layer; and an n-type cladding layer, wherein the n-type cladding layer has a carrier concentration of 1x10<SP>17</SP> to 1x10<SP>18</SP> cm<SP>-3</SP>; a sulfur concentration of 3x10<SP>16</SP> atoms/cm<SP>3</SP> or less; and a thickness of 40 μm. The p-type GaAs single-crystal substrate is subsequently removed after the deposition to afford an epitaxial wafer for infrared light-emitting device. The maximum silicon concentration in the portion of the p-type cladding layer within 2 μm of the interface between the p-type cladding layer and the first p-type layer is less than 1x10<SP>18</SP> atoms/cm<SP>3</SP>; the concentration of carbon, sulfur, and oxygen in the first p-type layer is less than 1x10<SP>17</SP> atoms/cm<SP>3</SP>; the p-type cladding layer has a thickness of 50-80 μm; the first p-type layer has a carrier concentration of 3x10<SP>17</SP> to 1x10<SP>18</SP> cm<SP>-3</SP>; and the n-type cladding layer contains germanium at a concentration of 3x10<SP>16</SP> cm<SP>-3</SP> or less. Thus, there can be produced an epitaxial wafer for fabricating an infrared LED exhibiting high emitted-light intensity with small variation.
Patent TW-498162-B (TW)
Title: Compliant probe apparatus
Inventor: DI STEFANO THOMAS H
IPC: G01R1/06
Filed: 2000-06-21
Granted: 2002-08-11
Abstract: A mechanically compliant probe for electrically connecting to contact pads on microelectronic devices. The probe can be used for burn-in of integrated circuits at the wafer level. Additional applications include probe cards for testing integrated circuits and sockets for flip-chips. One configuration of the probe includes a probe tip (81), which is held on an extension arm (82) projecting laterally from an elongated flat spring (83). The spring is supported above a substrate (89) by posts (85) such that the probe tip is free to move vertically in response to a contact force on the probe tip. Deflection of the probe tip is compliantly limited by bending and torsional flexure of the sheet spring. Mechanical compliance of the tip allows arrays of the probe to contact pads on integrated circuits where the pads are not precisely planar.
Patent TW-476876-B (TW)
Title: Method for testing CPU performance
Inventor: DING HUAI-LIANG
IPC: G06F11/22
Filed: 2000-07-14
Granted: 2002-02-21
Abstract: There is provided a method for testing CPU performance, which utilizes a software design via a flag test unit, an arithmetic test unit and a logic test unit to issue various commands for performing different tests to the flag, arithmetic and logic of the CPU, respectively.
Patent TW-I288286-B (TW)
Title: Manufacturing method of liquid crystal display element and manufacturing device for use with the same
Inventor: INOU IPPEI
IPC: G02F1/1341
Filed: 2000-12-12
Granted: 2007-10-11
Abstract: A liquid crystal cell is moved into a vacuum oven in a ""vacuum oven loading"" step. The heater power source of the vacuum oven is turned off and the chamber in the vacuum oven is evacuated to a degree of vacuum (vacuum condition) of about 100 Pa in an ""evacuation starting"" step. Then, the liquid crystal cell is slowly cooled to, for example, 40 DEG C while maintaining that degree of vacuum. Subsequently, nitrogen gas is substituted for the contents of the liquid crystal cell in a ""nitrogen gas substitution"" step, by introducing nitrogen gas to the chamber in the slow cooled vacuum oven and thereby restoring normal pressure. Thereafter, liquid crystal is charged to the liquid crystal cell in an ""injection"" step, followed by a ""sealing"" step whereby an injection opening is sealed with a sealant, and ultraviolet light from which 330 nm or shorter wavelength light is projected to cure the sealant. A liquid crystal display element in accordance with the present invention is thus fabricated.
Patent TW-480595-B (TW)
Title: Vacuum processing apparatus
Inventor: AMANO HIDEAKI
IPC: C23C16/458
Filed: 2001-01-11
Granted: 2002-03-21
Abstract: In a plasma CVD apparatus for applying a film deposition process to a semiconductor wafer (W), a wafer placement stage (3) is provided at a center of a vacuum chamber (2). The placement stage (3) is mounted to a side wall (63) via a support part (6). An exhaust port (9) having a diameter equal to or smaller than a diameter of the placement stage (3) is provided under the placement stage (3). A center axis (C1) of the exhaust port (9) is displaced from a center axis of the placement stage (3) in a direction opposite to an extending direction of the support part (6), thereby achieving an efficient exhaust.
Patent TW-593616-B (TW)
Title: Adhesive composition
Inventor: YUYAMA MASAHIRO
IPC: B32B15/08
Filed: 2001-01-18
Granted: 2004-06-21
Abstract: Disclosed is an improved epoxy resin-based adhesive composition, which is particularly suitable for use in the preparation of a base sheet for flexible printed circuit boards as a laminate of an insulating plastic resin film and a foil of a metal such as copper as well as in the preparation of a coverlay film for protection of the circuit pattern of the metal foil in a flexible printed circuit board. The adhesive composition comprises, as a uniform blend, (a) an epoxy resin, (b) an acrylic rubber modified by carboxyl groups to have a specified content of the carboxyl groups, (c) a curing agent for the epoxy resin such as an aromatic amine compound and (d) a curing promoter, each in a specified weight proportion.
Patent TW-I289065-B (TW)
Title: Skin basement membrane formation promoting agent, as well as process for production of the skin basement membrane formation promoting agent and artificial skin
Inventor: AMANO SATOSHI
IPC: A61F2/14
Filed: 2001-03-27
Granted: 2007-11-01
Abstract: Artificial skin formation promoting agent and skin basement membrane stabilizing agent, comprising matrix metalloprotease inhibitor, or matrix metalloprotease inhibitor and matrix protein production promoting agent; as will as a process for production of artificial skin characterized by adding to an artificial skin formation medium the matrix metalloprotease inhibitor, or matrix metalloprotease inhibitor and matrix protein production promoting agent.
Patent TW-558897-B (TW)
Title: Determination method for brightness compensation of partial scanning area
Inventor: WANG GUO-REN
IPC: H04N1/56
Filed: 2001-04-06
Granted: 2003-10-21
Abstract: The present invention provides a determination method for brightness compensation of partial scanning area, which includes the following steps: first, substituting each bright layer value and the corresponding dark layer value into the mathematical formula to obtain the corresponding computation result; then, individually determining if these operation results are fallen into the predetermined interval; if there are computation results fallen into the predetermined interval, conducting the brightness compensation computation on the scanned pixels corresponding to the computation results; but, if there are computation results not fallen into the predetermined interval, then not conducting the brightness compensation computation on the scanned pixels corresponding to the computation results.
Patent TW-501007-B (TW)
Title: Central processing unit for easily testing and debugging programs
Inventor: CHO KYUNG-YOUN
IPC: G06F9/445
Filed: 2001-04-18
Granted: 2002-09-01
Abstract: A central processing unit (CPU) for easily testing and debugging an application program, which includes a data communications unit for performing data communications with a host computer, a status register having a flag representing whether an operational mode of the CPU is a general operational mode representing a general operational state or a debugging mode representing a debugging state, a debugging stack pointer register which is used as a stack pointer designating a stack memory storing data of a debugging program, and a comparator for comparing a value stored in a break register with break data, wherein the CPU is converted into the debugging mode if the break register value is same as the break data, the flag of the status register has a value representing a debugging mode, a start address for performing a debugging program is loaded in a program counter, and the debugging program is executed to perform a debugging according to a command from the host computer via the data communications unit.
Patent TW-540234-B (TW)
Title: A program list display device and a recording/regenerating device
Inventor: SUZUKA TETSUYA
IPC: H04N5/445
Filed: 2001-04-24
Granted: 2003-07-01
Abstract: The present invention is to provide a recording/regenerating device which employs suitably a program list displaying device which can visibly display the past status of a video recording and a guide for a prearrangement broadcasting program during selecting channel-prearrangement for recording of a television broadcasting program. A program information cell 207 representing individual program information is disposed on a program guide picture 200, having a channel attribute as abscissas 201 and a date attributes as an ordinate 202, further, in order to limit the displayed program information cell 207, a display filter setting picture 250 is also provided, by which only a program cell 207 which represents a program information of a program consisting of the broadcasting week day designated by a week day designator 253, as well as the broadcasting time zone designated by a time zone designator 254 is played on the program guide picture 200.
Patent TW-I237143-B (TW)
Title: Half-transmissive liquid crystal display element
Inventor: OHTAKE TOSHIYA
IPC: G02F1/1335
Filed: 2001-05-22
Granted: 2005-08-01
Abstract: The liquid crystal display element includes a polarization plate, a liquid crystal layer provided in the rear of the polarization plate, for modulating incident light in correspondence with an applied voltage, a selectively reflective layer provided behind the liquid crystal layer, for reflecting a first circular polarization component of incident light, and a back light source arranged in the rear of the selectively reflective layer, for emitting light having intensity peaks for a plurality of predetermined wavelengths. The selectively reflective layer has first reflection factors to the first polarization components of incident light falling within first small regions of visible light, including the plurality of predetermined wavelengths, and has second reflection factors to the first polarization components of incident light falling within second small regions of visible light, not including the plurality of predetermined wavelengths. The first reflection factors are smaller than the second reflection factors.
Patent TW-544424-B (TW)
Title: Bicycle headset
Inventor: TANGE SATOSHI
IPC: B62K21/06
Filed: 2001-06-22
Granted: 2003-08-01
Abstract: Disclosed is a bicycle headset, having: a head tube, a front fork engaging in the head tube to allow a stem to insert therethrough, a locking device provided to a top of the front fork to urge against the stem, a lower lug and a upper lug each provided to the top and bottom of the head tube, and an urging piece provided between a cap of the upper lug and bearings to provide pivotal and sliding effects between the front fork and the head tube, wherein the urging piece has an annular shape and comprises a tapered profile, a vertical wall and a hook so as to provide steady and easy assembly of the bicycle headset.
Patent TW-I292143-B (TW)
Title: Circuit, driver circuit, organic electroluminescent display device electro-optical device, electronic apparatus, method of controlling the current supply to an organic electroluminescent pixel, and method for driving a circuit
Inventor: TAM SIMON
IPC: G11C27/02
Filed: 2001-07-09
Granted: 2008-01-01
Abstract: A driver circuit operating in stages that comprise a programming stage and a reproduction stage, the circuit comprising: a plurality current paths each of which passes through the circuit, a current driven element, a transistor connected so as operatively to control the current supplied to the said element, a capacitor connected for storing an operating voltage of the transistor during the programming stage, and switching means which control the current paths, the arrangement being such that one of the current paths does not include the said element. No current is applied to the current driven element by the current controlling transistor during the programming stage and thus the overall power consumption is reduced. Furthermore, the circuit can be operated from a normal supply voltage rather than requiring a high bias voltage. During the programming stage, the circuit uses a current sink rather than a current source. Preferably, the current driven element is an electroluminescent element. <IMAGE>
Patent TW-511067-B (TW)
Title: Organic EL display device and method for driving the same
Inventor: KAWASHIMA SHINGO
IPC: G09G3/20
Filed: 2001-09-24
Granted: 2002-11-21
Abstract: Organic EL elements are arranged in a matrix pattern. A column of organic EL elements are connected by their anodes to each data line. A row of organic EL elements are connected by their cathodes to each scanning line. In a data line driving circuit, a signal current source is connected to each data line, and each signal current source is connected to a power source. In a scanning line driving circuit switches are connected to each scanning line, with one end of each switch being connected to the power source, and the other end thereof being connected to the ground. The data lines are commonly connected to a Zener diode of a voltage retaining circuit via switches. A capacitor is connected in parallel to the Zener diode. The potential retained by the Zener diode is as high a potential as possible such that it is determined to be a black level of each color.
Patent TW-I224753-B (TW)
Title: Image browsing using cursor positioning
Inventor: GARGI ULLAS
IPC: G06F3/0483
Filed: 2001-10-15
Granted: 2004-12-01
Abstract: Image browsing through memory-stored items, such as a library (92) of images or desktop windows, is efficiently performed by arranging images (24, 26, 28, 30, 32, 52, 54, 56, 58 and 60; 116, 120, 122, 124 and 138) in partially overlapping fashion and generating a second-level image (64) for each overlapped image that is contacted by a user-manipulated cursor (34 and 62; 140). The second-level image is a ""transitory"" image, since it is removed as soon as the cursor is displaced from the corresponding first-level image. Thus, by placing the first-level images in a diagonally extending stack, straight line movement of the cursor will initiate a sequential presentation of transitory images for the images in the stack. In one embodiment, the display also includes an incrementing icon (68) and a decrementing icon (70) that are employed to provide substitute stacks. Moreover, a third-level image (82) is formed in a separate window (76) when the user selects one of the images from the stack. This third-level image has more permanency, since it remains in the display window after the stack has been substituted. The images may be digital photographs, but other applications are contemplated.
Patent TW-558585-B (TW)
Title: Catchment net for rockfall catchment systems or the like
Inventor: SENNHAUSER MARCEL
IPC: E01F7/04
Filed: 2001-11-12
Granted: 2003-10-21
Abstract: A catchment net for rockfall catchment systems or the like has a net (12, 33) and support elements (16, 17, 18, 19) retaining this. The net (12, 33) is retained on the outside, on at least two mutually-opposing sides, by least one peripheral cable (14, 15, 41, 42) in each case, and/or by a tensioning cable (22). Additional connection elements (25, 46), which connect the net (12, 33) to the support elements at its outside, make it possible for the energy incurred in the event of a rock (23, 31) or the like falling into the net to be absorbed to the maximum. The connection elements can, however, also be secured additionally or only in the interior of the net.