Patent GB-863612-A (GB)
Title: Improvements in and relating to semi-conductive devices
Inventor: BEALE JULIAN ROBERT ANTHONY
IPC: H01L21/308
Filed: 1957-05-21
Abstract: 863,612. Transistors. MULLARD Ltd. May 21, 1957, No. 16102/57. Class 37. A method of making a semi-conductor device comprises the steps of diffusing a first impurity into a semi-conductor crystal to form a relatively thick diffused layer therein, removing material from part of the crystal to a depth extending through, or through at least 70% of the diffused layer, and diffusing into the new surface thus formed a second impurity characteristic of the same conductivity type, and possibly of the same material, as the first, to produce a relatively thin diffused layer beneath the new surface. Diffusion of the second impurity may be from an applied layer or pellet, from the atmosphere, or from the first-diffused layer, and a point contact can be made to the new surface after the second diffusion step. As shown, Fig. 1, in the manufacture of a PNP transistor, a slice 1 of P-type monocrystalline germanium is heated at 830 C. for about 2 hours in a current of hydrogen in a chamber containing a supply of antimony trichloride at 50 C. Diffusion of antimony into the crystal causes the formation of an N-type region sub-surfacely defined by a junction 2. A cavity 3 extending through the junction is etched. in the crystal and a pellet of lead with 1% gallium and 1% antimony is placed therein and the whole heated at 750 C. for 10 minutes in an atmosphere of hydrogen. Preferential diffusion of antimony into the crystal produces an N-type region between a fresh junction 6 (Fig. 4) and a recrystallized P-type layer 5 of predominantly gallium-doped germanium, the part 4 of the pellet which solidifies last being mainly lead; the heating also causes deeper penetration into the crystal of the first-diffused antimony. The lower surface, and the peripheral portion of the upper surface of the crystal, are removed by etching in two stages, and a pellet 9 of lead with 1 % arsenic is alloyed at 650 C. to the N-type region, and an indium pellet 11 is alloyed at 450 C. to the P-type region, each being heated for about 6 minutes in an atmosphere of hydrogen. Finally, nickel wires 13, 14, 15 are provided and the device may be encapsulated and/or given a mask of lacquer. In a modification, the area of the N-type upper surface is not reduced, but the lateral N-type region is removed and, of the sub-surface PN junction, only the portion 6 and a small adjacent area are retained. In another modification, instead of the cavity 3, a piece of material is etched from the crystal to form a step having a concave V- shaped riser, within the angle of which the pellet 4 is placed. Fig. 6 shows part of a fieldeffect transistor of the type described and claimed in Specification 856,430 in which the carrier current path from source 9 to drain 4 is adjacent the transistor surface. It differs from the Fig. 4 embodiment in that the pellet 4 comprises only lead and antimony so that the region 5 is N-type, and the cavity 3 is enlarged by the etching away of an annular region 19. An indium pellet (not shown) is alloyed to the P-type region to form a gate electrode. Specification 852,904 also is referred to.