baber/WOPTO huggingface dataset:
Patent TW-377325-B (TW)
Title: Method of manufacture cranks
Inventor: Lin yu-qin
IPC: B62M3/00
Filed: 1996-12-09
Granted: 1999-12-21
Abstract: The present invention relates to the method of manufacture of a crank, in particular the method of manufacture of a crank of fast production while saving material for production of bicycle cranks, comprising mainly the making process of the crank body and the making process of the shaft block before assembling the crank body and the shaft block; including the making process of the crank: first cutting the raw material properly into the mold cavity of the raw material for forging or casting into patterns and then having the waste be removing and drilling screw holes at the end of the crank body, for final prototype, having the prototype a strip-shaped crank body, having one end with screw holes and the other with an arc neck and an articulation seat, housing an articulation hole, which is a dented slot; the making process of the shaft seat comprising the cutting of the raw material into proper blank placed into the mold cavity, for forging or casting, forming thus the prototype of the shaft seat, having a substrate, having the upper ring a dented block for engagement with the dented slot of the articulation hole, having at one end of the shaft seat a rectangular aperture and the process of assembly of the crank body and the shaft seat: by coupling the dented block of the shaft seat into the articulation hole, making full engagement of the dented block and the dented slot, before punching the rectangular aperture to open the inclination of the 4 corners, making the vertical aperture of the rectangular shape having a conic degree and the dented block and the dented slot against each other firmly, and the assembled appearance coating the plastic casing to form a complete crank, in much reduced material and at upgraded speed, thus to drive down the cost of manufacture of the crank.
Patent TW-348201-B (TW)
Title: Valved suction mechanism of fluid displacement apparatus
Inventor: KAWABATA HIRONARI
IPC: F04B49/22
Filed: 1996-12-09
Granted: 1998-12-21
Abstract: A refrigerant compressor comprising: a compressor housing divided by a valve plate into a first chamber and a second chamber, the valve plate including suction conduits linking the first chamber with the suction chamber and discharge conduits linking the first chamber with the discharge chamber; a suction valve member which bends to open and close the suction conduits in response to changes in discharge chamber pressure and the resulting pressure difference between the first chamber and the suction chamber; a suction valve control mechanism which includes a regulator for regulating the opening and closing of the suction conduit between a maximum opening position and a minimum opening position in response to changes in discharge chamber pressure.
Patent TW-360682-B (TW)
Title: Films based on polyamides and on polyolefins
Inventor: ALEX PATRICK
IPC: C08J5/18
Filed: 1997-02-13
Granted: 1999-06-11
Abstract: The invention relates to films composed of compositions comprising: at least one polyamide (A); at least one polymer (B) comprising polyamide blocks and polyether blocks; at least one polyolefin (C); at least one functionalized polyolefin (D) and such that the impact strength (Dart Test) is greater than that of a film containing the same proportions of (A), (C) and (D) but not containing (B).
Patent TW-355665-B (TW)
Title: Apparatus for treating a fluid product by injection of steam and the fluid product
Inventor: BADERTSCHER ERNEST
IPC: A23L3/22
Filed: 1997-04-10
Granted: 1999-04-11
Abstract: An apparatus for treating a fluid product by injecting steam from a steam inlet and the fluid product from a product inlet into a mixing chamber, that comprises an outlet for the treated product, a steam injection opening with a first valve member disposed in said steam injection opening, a product injection opening with a second valve member disposed in said product injection opening, with the position of said valve members determining the width of a substantially annular discharge orifice around each valve member, said discharge orifices facing one another, and the apparatus further comprising pressure sensitive displacement means to permit movement of the second valve member in response to the pressure in the product inlet.
Patent TW-358849-B (TW)
Title: 2-stroke internal combustion engine
Inventor: ISHIBASHI YOICHI
IPC: F16H7/08
Filed: 1997-05-19
Granted: 1999-05-21
Abstract: A 2-stroke internal combustion engine, being disposed between the combustion chamber and in linkage with the fuel injection device for free control of opening and closing of the passage by the control valve, for feeding of fuel to said combustion chamber through the passage, including: in addition to disposing said chamber in said combustion chamber, having at least the control of said control valve under the connection of said control chamber.
Patent TW-339488-B (TW)
Title: Circuitry and method for time division multiple access communication system
Inventor: ULF GORAN FORSSEN
IPC: H01Q3/24
Filed: 1997-07-12
Granted: 1998-09-01
Abstract: A sort of improved wiring in a multiple access proximity communication system for transmission of communication signals, having the system be defined with at least a part of it being divided into a plurality of timing slot carrier frequency of which at least one timing slot is selected for traffic, allowing the carrier frequency modulation of a selected remote communication station for detection of signal energy, being used said improved wiring for transmission of the first communication signal to the first remote communication station at the selected timing slot and at least one second communication signal to at least one second remote communication station, having the first and at least 1 second remote communication station be divided in space and located at any location in a selected area, having the wiring: a plurality of antennas being coupled selectively to the communication unit for receiving of the first communication signal and at least one second communication signal, being capable the plurality of antennas on the traffic channel of transmitting and receiving the first communication signal and at least one second communication signal; and a antenna direction coupler for receiving of instructions for the first and the second remote communication station locations from the communication device, being the antenna direction coupler selectively coupled to the first communication signal for transmission of the first communication signal to at least the first group of said plurality of antennas, for formation of the first antenna wave beam direction chart for transmission of the first communication signal, being the first antenna wavebeam direction chart to cover the location of the first remote communication station and selectively coupled to at least one communication signal for at least one second group of the plurality of antenna for formation of at least one of the second antenna wavebeam chart for transmission of the second communication signal, covering the second antenna wavebeam direction chart the location of the second remote communication station, covering the first antenna wavebeam direction chart and at least one of the second antenna wavebeam direction chart in total selected areas, which when selectively and modulated to the carrier wave frequency, the selected remote communication station shall detect respectively at least the energy of the communication signal of one of the first and the second.
Patent TW-413920-B (TW)
Title: Method for forming multilevel interconnects in semiconductor device
Inventor: KIM SUCK-TAE
IPC: H01L21/316
Filed: 1997-07-29
Granted: 2000-12-01
Abstract: A method for forming a multilevel interconnects in a semiconductor device. In the multilevel interconnects forming method, a conductive layer pattern is formed on a semiconductor substrate including a first insulating layer, to a thickness of Y1. A second insulating layer is formed on the overall surface of the resultant including the conductive layer pattern. A lower conductive layer pattern is formed to a thickness of 2xY1/3 on the second insulating layer to be separated from the conductive layer pattern by at least 3xY1. On the overall surface of the resultant including the lower conductive layer pattern is formed a third insulating layer. A planarization layer is formed of spin-on-glass (SOG) on the third insulating layer to expose the third insulating layer on the conductive layer pattern and the lower conductive layer pattern. By forming this planarization layer, conductive layer pattern-induced fine cracks can be prevented from being produced on the SOG of a step portion.
Patent TW-432048-B (TW)
Title: Processes for the preparation of 1-butyl-4-piperidinylmethylamine and N-[(1-n-butyl-4-piperidyl) methyl]-3,4-dihydro-2H-[1,3] oxazino [3,2-a] indole-10-carboxamide
Inventor: FEDOULOFF MICHAEL
IPC: A61K31/5365
Filed: 1997-09-10
Granted: 2001-05-01
Abstract: A process for preparation of 1-butyl-4-piperidinylmethylamine, which process comprises: (i) the reaction of isonipecotamide and 1-bromobutane to give the N-butyl deravative of isonipecotamide; followed by (ii) reduction with LiAlH4, characterised in that the reactions (i) and (ii) are carried out in toluene as solvent.
Patent TW-346593-B (TW)
Title: Data display control apparatus, a data transmission apparatus, and a data display control information editing apparatus
Inventor: WATANABE SHIGEAKI
IPC: H04N21/236
Filed: 1997-09-11
Granted: 1998-12-01
Abstract: A data display control apparatus for receiving a plurality of sets of multimedia data and a set of time control information, and for controlling the display of the sets of multimedia data, the plurality of sets of multimedia data comprising a plurality of contents which make up a broadcast program, and the set of time control information being used for controlling a display of the sets of multimedia data, the data display control apparatus comprising: data storage means; receiving means for extracting at least one set of multimedia data and the set of time control information from data transmitted from a broadcast program transmission apparatus and storing the received sets of multimedia data and the set of time control information into the data storage means; current time information obtaining means for obtaining a set of current time information; time information judging means for judging whether control relating to a display of the sets of multimedia data is possible by comparing the set of current time information with the set of time control information; and display control means for controlling the display of the sets of multimedia data based on a judging result of the time information judging means.
Patent TW-440782-B (TW)
Title: Method for estimating hot carrier deterioration
Inventor: IWANISHI NOBUFUSA
IPC: G06F11/00
Filed: 1997-11-10
Granted: 2001-06-16
Abstract: This invention is to provide a hot carrier deterioration estimating method for estimating the deterioration of the reliability of LSI owing to the influence of a hot carrier in accordance with the actual operation. In a delay calculation step S10, the delay of the respective cells of an objective LSI, an input waveform inclination 13 and output load capacity 14 are calculated based on circuit information 11 and a delay library 12 where delay parameter is stored. In a delay deterioration library generation step S20, a delay deterioration library 19 where delay parameter after LSI operates for a prescribed period is stored is generated by using the number of estimated operations on the respective cells 15, the input waveform inclination 13 and output load capacity 14 based on delay deterioration parameter 16 where the change of the delay of the cell owing to the influence of the hot carrier is shown by the change of delay parameter with the number of the operating times of the cell. The steps S10 and S20 are repeated by the number of repetitive times 17 and delay 18 calculated in the final step S10 becomes delay in LSI operating for the period equivalent to the product of the prescribed period and the number of repetitive times 17.
Patent TW-335352-B (TW)
Title: An electrode jacket for pulse-type facial beautifier
Inventor: ISAWA YOSHIHIRO
IPC: A61N1/04
Filed: 1997-11-10
Granted: 1998-07-01
Abstract: An electrode jacket for pulse-type facial beautifiers which inside features a plane electrode of soft material with the pulse-type power and the plane electrode in association.
Patent TW-346492-B (TW)
Title: Silane-grafted materials for solid and foam applications
Inventor: JOHN D BAMBARA
IPC: C08J9/06
Filed: 1997-11-13
Granted: 1998-12-01
Abstract: A polyolefin product comprising a silane-grafted olefin copolymer resin having a silane-grafting content of upto 6%, in which the olefin copolymer resin exhibits a density in the range of 0.86 g/cm3 to 0.96 g/cm3, a molecular weight distribution in the range of from 1.t to 3.5, a melt index in the range of 0.5 d/10 min to 100 g/10 min, and a composition distribution breadth index greater than 45%, in which the silane comprises a vinylic silane having C2-C10 alkoxy.
Patent TW-365017-B (TW)
Title: Semiconductor apparatus
Inventor: IWATA HIROSHI
IPC: H01L21/00
Filed: 1997-11-29
Granted: 1999-07-21
Abstract: A kind of semiconductor apparatus which is used for semiconductor substrate to provide a dynamic threshold voltage MOSFET. The semiconductor substrate is composed of the first inductive well area, and forms the second inductive source and drain area on the surface of the first inductive well area. There allocates channel areas within those areas and sequentially laminates the gate insulation films and gate electrodes in the channel area. The gate electrode is connected to the well area by the conductive hole on the insulation film. In this kind of transistor, the impedance of well area can be lowered by 10% compared to the used SOI substrate.
Patent TW-388820-B (TW)
Title: Method for synchronizing browser's bookmark in different computers
Inventor: HE DAI-SHUEI
IPC: G06F15/163
Filed: 1997-12-15
Granted: 2000-05-01
Abstract: The present invention relates a method that can make browser's bookmark in different computers synchronous. The present invention uses the location data for saving bookmark created from the same or different internet browser by searching the operating system in the two computers, and then searches bookmark text separately on the two computers based on the location data, mark different symbol to the bookmark that has been found and then built a comparison table by it to proceed comparing and synchronous operation which makes the bookmarks on the computers retain identical in order to manage and maintain the two same or different format synchronously to achieve the goal of sharing networking resource in the same or different browsers of different computers.
Patent TW-448584-B (TW)
Title: Semiconductor device and a method of manufacturing the same
Inventor: YAMAZAKI SHUNPEI
IPC: H01L31/068
Filed: 1996-03-20
Granted: 2001-08-01
Abstract: A method of manufacturing a thin-film solar cell, comprising the steps of: forming an amorphous silicon film on a substrate; holding a metal element that accelerates the crystallization of silicon in contact with the surface of the amorphous silicon film; subjecting the amorphous silicon film to a heat treatment to obtain a crystalline silicon film; depositing a silicon film to which phosphorus has been added in close contact with the crystalline silicon film; and subjecting the crystalline silicon film and the silicon film to which phosphorus has been added to a heat treatment.
Patent TW-355224-B (TW)
Title: Dispersion-shifted fiber
Inventor: KATO TAKATOSHI
IPC: H04B10/00
Filed: 1998-02-11
Granted: 1999-04-01
Abstract: An dispersion-shifted fiber for transmitting a signal light at a wavelength of 1.55<mu>m, the dispersion-shifted fiber includes a core region extending along predetermined axis and layer region being provided along the contour of the core region, the dispersion-shifted fiber, characterized in that: a dispersion whose absolute value is from 1.0 to 4.5 ps/nm/km; a dispersion slope is 0.05 to 0.09 ps/nm<2>/km; an effective core cross-sectional area is at least 70<mu>m<2>; and at a fiber length of 2m, the cutoff wavelength is at least 1300nm.
Patent TW-418118-B (TW)
Title: Method of producing surface conductive layer for plated material
Inventor: SHIAU BIAU-YING
IPC: B05D5/12
Filed: 1998-03-13
Granted: 2001-01-11
Abstract: The present invention relates to a method of producing a surface conductive layer for a plated material, which comprises applying a sensitizing treatment or coating a metal film with good adherent on a plated material which has received a standard pretreatment of degreasing, surface smoothening, roughening, etc.; which is characterized in: immersing the pretreated plated material with a water soluble resin; prior to drying of the resin, spraying a metal particle in a powder chamber to uniformly distributing a preset metal particle on the surface of the plated material; hard baking the plated material to increase the adhesion thereof and form a conductive layer, which can be used as a prime plating in the electric plating of a non-conductive plated material, as well as a metal plating layer of an ordinary plated material.
Patent TW-466572-B (TW)
Title: Overall equipment effectiveness classifying method and its control system
Inventor: WU WEN-FENG
IPC: H01L21/00
Filed: 1998-05-05
Granted: 2001-12-01
Abstract: There are provided an overall equipment effectiveness classifying method and its control system. The method comprises the following steps: first, a wafer lot is loaded and a chip loader interface issues a loading request to a real-time control system; next, the wafer loader interface sends a message of the wafer lot to a semiconductor manufacturing equipment for setting the manufacturing recipe; and the wafer loader interface controls and starts the semiconductor manufacturing equipment to load in a cassette, wherein the semiconductor manufacturing equipment reports its equipment status the wafer loader interface; the wafer loader interface changes the manufacturing status of the real-time control system based on the equipment status for starting to count the manufacturing time; when the cassette has been loaded, the wafer loader interface notifies the semiconductor manufacturing equipment to start to execute the predefined semiconductor process; furthermore, the wafer loader interface issues a taking-out request to the real-time control system, and after being granted, starts to take out the wafer lot; after taking the wafer lot, the wafer loader interface notifies the semiconductor manufacturing equipment, and the semiconductor manufacturing equipment sends its equipment status to the wafer loader interface; finally, the wafer loader interface changes the manufacturing status of the real-time control system based on the equipment status, thereby stopping counting the manufacturing time.
Patent TW-389753-B (TW)
Title: Vinyl acetate process utilizing a palladium-gold-copper catalyst
Inventor: NICOLAU IOAN
IPC: B01J23/89
Filed: 1998-05-20
Granted: 2000-05-11
Abstract: A process is disclosed for the production of vinyl acetate by reaction of ethylene, oxygen and acetic acid as reactants comprising contacting said reactants and a non-halogen containing copper compound with a catalyst comprising a porous support on the porous surfaces of which is deposited catalytically effective amounts of metallic palladium, gold and copper. During the process to prepare vinyl acetate, a stream of alkali metal acetate is preferably passed over the catalyst. The process results in higher vinyl acetate selectivity and productivity due to lower CO2 selectivity during the life of the catalyst, and/or longer catalyst life.
Patent TW-418567-B (TW)
Title: Analog-to-digital converter with successive approximation
Inventor: EKLUND JAN-ERIK
IPC: H03M1/06
Filed: 1998-06-09
Granted: 2001-01-11
Abstract: The present invention relates to a process and a device for analog-to-digital conversion of successive approximation type for conversion of an analog signal value to a digital signal value, comprising the steps of: defining for each search interval at least three areas, so that said areas cover the entire search interval and so that each area overlaps at least one other area, defining each such area to a new, smaller search interval until a last search interval reaches a pre-set value, defining a reference level within each redundant part, so that N areas in a search interval give N-1 reference levels, defining at least one reference level in each search interval to coincide with at least one other reference level, where at least one such coinciding reference level belongs to two search intervals formed by areas in a nearest larger search interval, for achieving said digital signal value, comparing an unknown sampled value with all reference levels in a search interval, whereby at least two areas in said search interval can be eliminated and that at the proceeding successive approximation process, the unknown sampled value is compared to all reference levels in the new, smaller search interval, where each choice of comparative reference level is independent of the result in the nearest, preceding step until said unknown sampled value can be determined with a pre-set accuracy.
Patent TW-418393-B (TW)
Title: A reference voltage generating circuit for ferroelectric memory device
Inventor: KYE HOON-WOO
IPC: G11C11/22
Filed: 1998-06-25
Granted: 2001-01-11
Abstract: The present invention provides a reference voltage generating circuit for generating a stable reference voltage and having a long life time, and the reference voltage generating circuit for generating a reference voltage of a ferroelectric memory device having a plurality of bit line pairs, including: a first and second reference word line; a first dummy block comprising a plurality of switching transistors and a plurality of ferroelectric capacitors, wherein gates of the switching transistors are coupled to the first reference word line and drains/sources of the switching transistors are coupled to a bit line of one of the bit line pairs; a second dummy block comprising a plurality of switching transistors and a plurality of ferroelectric capacitors, wherein gates of the switching transistors are coupled to a second reference word line and drains/sources of the switching transistors are coupled to a bit bar line of one of the bit line pairs; and a reference plate line commonly to the ferroelectric capacitors of both of the dummy blocks.
Patent TW-382798-B (TW)
Title: Low resistance contact between integrated circuit metal levels and method for same
Inventor: NGUYEN TUE
IPC: H01L23/522
Filed: 1998-07-10
Granted: 2000-02-21
Abstract: A method of forming a direct, copper-to-copper, connection between levels in an IC is disclosed. A via interconnection is formed by isotropically depositing a barrier material in a via through an insulator to a lower copper level, and then anisotropically etching the via to remove the barrier material covering the lower copper level. The anisotropic etch leaves the barrier material lining the via through the insulator. The subsequently deposited upper metal level then directly contacts the lower copper level when the via is filled. A dual damascene interconnection is formed by etching an interconnection trench in an insulator and anisotropically depositing a non-conductive barrier material in the trench bottom. Then a via is formed from the trench interconnect to a lower copper level. As above, a conductive barrier material is isotropically deposited in the trench/via structure, and anisotropically etched to remove the barrier material covering the lower copper level. The insulating barrier material, lining the trench and via, remains. An IC via interconnection structure and a dual damascene interconnection structure, made in accordance with the above described methods, are also provided.