Patent UA-98169-U (UA)
Title: Shaper single pack containing three three-pulse code series with programmable time parameters
Inventor: KOROBKOV MYKOLA HRYHOROVYCH
IPC: H03K3/78
Filed: 2014-08-11
Abstract: Shaper single pack containing three three-pulse code series with programmable time parameters, multiple period of continuous periodic sequence of pulses fed to its input from the output of crystal oscillator containing comparator pidsumovuvalnyy binary counter with input supply clock, entrance permit simultaneous parallel loading and presentation of data inputs, asynchronous input settings in the zero state, which has an output transfer bits and outputs that are connected to the first input comparator group, characterized in that the introduced binary adder, inverter, first and second JK-flip-flops which have two inputs J, one of which inverted combined in aND and one inverse log K; first and second synchronous D-triggers with inputs asynchronous installation in zero state, the first and second chotyryvhodovi elements OR, tryvhodovyy element NAND, first and second dvovhodovi elements and chain consisting of a resistor and a capacitor, and the inputs of the first group of inputs adder connected to respective inputs download counter, which form the inputs setup generator at a given time series of pulses in a pack; Second inputs of the adder inputs form shaper adjustment to set the pause between pulses in the series; input adder is connected to a transfer unit level; Second inputs of comparator inputs connected to respective outputs of the adder; chotyryvhodovoho inputs of the first OR element connected to the output of the counter, the output of the first OR element connected to the input of a permit simultaneous parallel load counter inputs J and K JK-triggers input of the second input element OR and inverter; output inverter connected to the information input of the first D-flip-flop; inverted output of the first D-flip-flop, the output of the comparator and the output transfer counter inputs connected to a NAND element, whose output forms the output of the shaper; clock inputs of counters, JK-flip-flops and the first D-trigger interconnected to form shaper input - input supply continuous periodic sequence of pulses output from the external oscillator; direct access to the first JK-flip-flop is connected to a second input J of the second JK-flip-flop and a second input of the second OR element; direct access to the second JK-flip-flop is connected to a third input of the second OR element; inverted output of the second JK-flip-flop is connected to a second input of the first J JK-flip-flop; chain consisting of series-connected resistor and capacitor connected to a power source, and the total point it is connected to the first input of the first and second elements I and D input of the second D-flip-flop; the output of the second D-flip-flop is connected to a fourth input of the second OR element, whose output is connected to a second input of the second element I; output of the second element is connected to the input settings in the asynchronous counter zero state, JK-flip-flops and the first D-flip-flop; clock input of the second D-flip-flop forms the input supply pulses start; a second input of the first element is connected to the output of the comparator; And out of the first element is connected to the input asynchronous installation in zero state of the second D-trigger.