baber/WOPTO huggingface dataset:
Patent JP-H1020763-A (JP)
Title: Housing component manufacturing factory experiencing device
Inventor: FUJISAKI FUMIYOSHI
IPC: H04N7/18
Filed: 1996-07-04
Abstract: PROBLEM TO BE SOLVED: To provide the information on the durability and earthquake proofing performance by a house building company, by installing a facility of a factory for manufacturing the housing components, and the real components, in a tunnel space, so that how to manufacture the components used in the building, can be experienced. SOLUTION: A housing component manufacturing factory experiencing device is installed at a part of a house design information facility. The housing component manufacturing factory experiencing device has the shape of tunnel, so that the people can image the inside of the factory when he enters the inside. An architecture display device of a framework and a framework joint part, is installed at a left side of an inlet. A strength of column comparing device H is installed at an area formed like a connecting corridor. The strength of column comparing device H is a device for explaining a point of difference of the bearing power between the case when one thick column 11 is installed under a transparent resin board 10, and the case when a number of thin columns 12 are installed.
Patent JP-S6418224-A (JP)
Title: Semiconductor manufacture equipment
Inventor: ONO YASUYUKI
IPC: H01L21/205
Filed: 1987-07-13
Abstract: PURPOSE:To enhance the etching uniformity of a substance to be etched by a method wherein a stream of an etching gas is made uniform and smooth on each semiconductor wafer mounted on a cathode. CONSTITUTION:A number of gas exhaust ports 6 installed inside a vacuum container 1 are arranged; in addition, a length and a shape of a pipe from the gas exhaust ports 6 to a vacuum pump 14 are made equal. Accordingly, the stream of an etching gas passing on a semiconductor wafer 20 mounted on a cathode 2 inside the vacuum container 1 can be made uniform. By this setup, the etching uniformity of a substance to be etched on the semiconductor wafer 20 can be enhanced; a yield rate and the quality can be enhanced.
Patent JP-H0340070-A (JP)
Title: Data base retrieving device
Inventor: YANADA KAZUHIKO
IPC: G06F17/30
Filed: 1989-07-06
Abstract: PURPOSE:To more easily execute the retrieval by storing a word which does not exist in an associative keyword in a short-term storage area, in the case this word is inputted, and linking them and registering them in an associative keyword data base, in the case a retrieval keyword is obtained by inputting another word. CONSTITUTION:In the case the same associative keyword as an inputted word is not registered, an intellectual document retrieval function 9 stores this word in a short-term storage area 14, and urges to input a word of the next associative conception related to a document to which it is desired to execute a retrieval, to a user. Subsequently, in the case a retrieval keyword is fetched, an associative keyword data base management function 13 decides whether the word is stored in the short-term storage area 14 or not, and in the case the word is stored, the fetched retrieval keyword is linked to this word and stored in the short-term storage area 14. In the case a user instructs to register this word, the intellectual document retrieval function 9 updates an associative keyword data base 10, and thereafter, erases the storage contents of the short- term storage area 14. In such a way, the associative keyword can be extended automatically, and the retrieval is facilitated.
Patent JP-H0338624-A (JP)
Title: Wiring electrode
Inventor: ICHIKAWA YOSHIHARU
IPC: G02F1/1345
Filed: 1989-07-05
Abstract: PURPOSE:To provide the wiring electrode which has a high adhesive property and obviates the warpage of a substrate and disconnection by forming a lower metallic layer and upper metallic layer which consist of a metal of the same material and vary in film forming conditions at the time of film formation. CONSTITUTION:After a silicon nitride film 2 by a plasma CVD method is formed on a glass substrate 1, a lower chromium film and upper chromium film are formed and are patterned by a photoresist method to form a lower chromium electrode 3 and an upper chromium electrode 4. The lower chromium film of 750Angstrom  is formed at 0.2Pa vacuum degree and with 4kW discharge electric power in an argon atmosphere on the silicon nitride film in a forward path shown in Fig.(a) and the upper chromium film of 4,250Angstrom  is formed at 0.1Pa vacuum degree and with 2kW discharge electric power in the argon atmosphere thereon in the backward path shown by Fig.(b). The control of the film thickness is executed by changing the transporting speed of the glass substrate 1 in the forward path and the backward path. The wiring electrodes formed in such a manner obviate the warpage of the glass substrate and the peeling of the wiring electrodes and exhibit the good yield of production.
Patent JP-H0224838-A (JP)
Title: Production of magnetic recording medium
Inventor: MORIOKA AKIRA
IPC: G11B5/842
Filed: 1988-07-13
Abstract: PURPOSE:To obtain excellent electromagnetic conversion characteristics and durability by incorporating cyclohexanone which is one component of the org. solvent in a magnetic coating compd. into said compd. at a specific ratio of a binder resin or above. CONSTITUTION:The magnetic recording medium is obtd. by coating the surface of a nonmagnetic substrate with the magnetic coating compd. prepd. by dispersing a compsn. contg. magnetic powder and the binder resin, etc., into the org. solvent. The magnetic coating compd. contg. The cyclohexanone at >=40% ratio of the cyclohexanone which is one component of the org. solvent and the binder resin is used in the production of this magnetic recording medium. Of the total solvent, 5-25wt.% is preferably composed of the cyclohexanone and the remaining 95-75wt.% of a solvent mixture composed of methyl ethyl ketone and toluene. The ratio of the methyl ethyl ketone and toluene is characteristic set at 40/60-60/40. The adverse influence by the org. solvent is eliminated in this way and the excellent electromagnetic conversion characteristics and durability are obtd.
Patent JP-S6152004-A (JP)
Title: Elliptic corrugated waveguide or horn
Inventor: YAMAWAKI SEIICHI
IPC: H01P3/123
Filed: 1984-08-22
Abstract: PURPOSE:To design the depth of corrugation with the strict solution by designing the depth of slot of corrugate under the condition that an electric field and a magnetic field in the circumferential direction of an ellipse at the tip of teeth. CONSTITUTION:When the balanced hybrid condition is to be established, tangential components E2, Eeta, Heta of the electromagnetic field of an elliptic corrugate waveguide 4 should be continuous at the tip 1 of the teeth of corrugate with epsilon=epsilon1. In order to generate a continuous electromagnetic field with the balanced hybrid mode in the elliptic waveguide and the corrugate slot at the boundary of epsilon=epsilon1, the condition of Yout=Heta/E2=0 is established at both and even and odd modes. Since no wave can establish in the slot 6 at the TE mode, then the relation of Eeta=0 is established. In order to utilize the conditions above, the complete design of the elliptic corrugate slot is attained.
Patent JP-S6419409-A (JP)
Title: Control method for robot arm
Inventor: KANO MINORU
IPC: G05B19/19
Filed: 1987-07-15
Abstract: PURPOSE:To reduce the arithmetic load on a main control processing part by arbitrarily moving a robot arm and an additional shaft with individual numbers of degrees of freedom as well as in cooperation with each other and giving an interpolating function in the machine coordinate system level of the robot arm to a servo system. CONSTITUTION:An arithmetic means 15 executes one of processing parts (main control processing parts) 21-25 for origin matching, operation teaching, etc., and a servo control part 30 which executes the operation control of the robot arm in accordance with instruction of these processing pars is placed under them. The robot arm and the additional shaft are arbitrarily operated with individual numbers of degrees of freedom as well as in cooperation with each other and the interpolating function in the encoder value level is given to the servo system. Consequently, it is sufficient if a considerable rough command value is given to the servo system even at the time of operating the robot arm in, for example, a rectangular coordinate system other than a specific coordinate system. Thus, the operation load on main control processing parts is reduced.
Patent JP-S6066221-A (JP)
Title: Endoscope device
Inventor: YABE HISAO
IPC: H04N5/225
Filed: 1983-09-21
Abstract: PURPOSE:To improve the assembling efficiency by providing an attaching member, which is centered to an objective lens system, on a lens supporting frame of the objective lens system so that this member is projected to the side of the light detecting face of a solid-state image pickup device. CONSTITUTION:The light from an object to be observed in an endoscope device is focused through an objective lens system 2A, and the device is so designed that this focusing position is placed in the position of the rear end of a lens supporting frame 8 approximately by combination of plural lenses. Consequently, in case of assembling of the endoscope, the supporting frame 8 in which the objective lens system 2A is set is fixed into the front end part of an endoscope insertion part 1, and the part of an optical glass 11 projected to the front of a package 10 is inserted from an aperture part in the rear end of the supporting frame 8, thereby fix a solid-state image pickup device 3 in an optimum focusing position in the state where optical axes of the objective lens system 2A and the solid-state image pickup device 3 coincide with each other.
Patent JP-S6421893-A (JP)
Title: Lighting device for electric discharge lamp
Inventor: KENMOCHI YOSHIO
IPC: H05B41/18
Filed: 1987-07-15
Abstract: PURPOSE:To modify and correct the temperature dependent characteristics of a non-linear capacitor via simple constitution by providing the series circuit of the non-linear capacitor and a double-throw voltage switching element connected in parallel to an electric discharge lamp and connecting a bypass capacitor in parallel to said switching element. CONSTITUTION:The series circuit of a non-linear capacitor 4 and a double-throw voltage switch 5 is connected in parallel to an electric discharge lamp 3 connected to an AC power supply 1 via a reactor 2. And a high voltage pulse is applied to the electric discharge lamp 3 including a high voltage sodium lamp, together with power supply voltage, thereby starting and lighting the electric discharge lamp 3. Said switch 4 is connected with a bypass capacitor 6 in parallel and preheating current runs to a capacitor 4, thereby modifying and correcting the temperature dependent characteristics thereof. As a result, the electric discharge lamp 3 can be made to light properly via simple constitution, regardless of an ambient temperature change.
Patent JP-H06154401-A (JP)
Title: Pachinko game machine
Inventor: NAKAJIMA KENKICHI
IPC: A63F7/02
Filed: 1993-06-22
Abstract: PURPOSE:To enable the exercise of ensured rights sufficiently by displaying either one of first, second and the other identification information and displaying the existence of acquisition of right and lapse of right according to the jump of a pachinko ball into a right winning port. CONSTITUTION:When a pachinko ball jumps into a right winning port 8, a right lamp 13 is turned on and off, and after the lapse of fixed time from the jump of the pachinko ball into the right winning port 8, the display of a numerical variable display device 17 is stopped in a designated cycle per figure. When the combination of displays of the display device 17 is a first identification information (e.g. 7-7-7), the right is ensured, and when a ball jumps into either one of starting prize winning ports under such a condition, an opening and closing plate 20 is opened during a designated time. When a chance (right) of winning a prize in a bonanza port 19 is exercised for a designated number of times in the right ensuring condition or a second identification information (e.g. 4-4-4) different from the first identification information is displayed on the numerical variable display device 17, the right ensuring condition is extinguished.
Patent JP-S6153918-A (JP)
Title: Vegetating method for face of slope
Inventor: MATSUMOTO HISANO
IPC: E02D17/20
Filed: 1985-08-07
Abstract: PURPOSE:To form an uneven vegetating surface on the face of slope, by a method wherein solid feutilizer is placed on a netlike net stretched over the face of slope, the solid feutilizer is covered with a mat material employing a non-woven cloth to secure it to the face of slope, and cultivated soil is blown against the mat and the net. CONSTITUTION:A netlike net 2 is stretched over the face 1 of slope, solid feutilizer 4 is placed on the net 2, and a mat material 3 is secured in a manner that the solid feutilizer 4 is covered therewith. Cultivated soil 5 mixed with seeds is blown against the mat material 3 and the net 2. In which case, a non-woven belt is used as the mat material 3. This causes a steep-sloped face of slope to be formed in an uneven surface state, enables simple and easy vegetation of the face of slope, and permits prevention of carrying-out of cultivated soil.
Patent JP-S6153744-A (JP)
Title: Multilayer interconnection semiconductor device
Inventor: INABA TORU
IPC: H01L23/532
Filed: 1984-08-24
Abstract: PURPOSE:To discriminate logic circuit and linear circuit and improve characteristic of these circuits by using different materials for a first layer wiring and a second layer wiring in a first region of a semiconductor device and using the same wiring material to the first and second layer wirings in a second region. CONSTITUTION:An epitaxial semiconductor layer 2 is formed on a semiconductor substrate 1, the surface is separated by an isolation oxide film 3 and an isolation diffused layer 4. The one region I is prepared for logic circuit, while the other IIfor linear circuit. The first aluminum wirings 13, 15 are formed respectively to the regions I, II through molybdenum layer on the surface of such regions. A molybdenum wiring 14 and a second aluminum wiring 16 are formed through a through hole 10 on the insulation film 9 between the main layers. The different kinds of wire materials are used for the first and second wiring layers of the region I, the same kinds of wiring material is used for the first and second wiring layers in the region II, thereby the logic circuit and linear circuit can be discriminated and respective characteristics are improved.
Patent JP-H05341325-A (JP)
Title: Mim liquid crystal panel and its production
Inventor: KANEKO YASUSHI
IPC: G02F1/136
Filed: 1992-06-09
Abstract: PURPOSE:To provide the MIM liquid crystal panel having a high opening rate and high image quality. CONSTITUTION:The MIM element is formed by forming a triple structure constituted by holding an insulating thick film which has >=0.5mum thickness and can be patterned between a transparent pixel electrode 1 and a metallic wiring 4 and directly connecting an insulating film 3 formed by an anodic oxidation treatment and the transparent pixel electrode 1 in the part of a hole 5 provide in the insulating thick film 2. The colored MIM substrate structure is otherwise formed by using an electrodeposited color filter as the insulating thick film 2. As a result, the need for the spacing between the tantalum wiring and the transparent pixel electrode which is heretofore needed is eliminated and the cross electric field between the tantalum wiring and the transparent pixel electrode is eliminated and, therefore, an orientation defect is hardly generated and the MIM liquid crystal panel having high image quality is provided.
Patent JP-S5797652-A (JP)
Title: Manufacture of semiconductor device
Inventor: KUROKI HAYASHI
IPC: H01L21/60
Filed: 1980-12-10
Abstract: PURPOSE:To form collectively a plurality of electrodes of a certain thickness by covering a semiconductor wafer, except regions for making a plurality of electrodes, with a mask of a certain thickness and by screen-printing on the electode regions through the mask. CONSTITUTION:A mask 15 having mesh-shaped eyes 16 of uniform thickness is placed on a wafer 1 except for regions 3 for electrodes. The material for electrode such as silver paste 20 is plastered into the eyes 16 by a rubber roller and heated in a furnace to harden.
Patent JP-H0339779-A (JP)
Title: On-vehicle navigation device
Inventor: ARAKI MORIO
IPC: G08G1/0969
Filed: 1989-07-06
Abstract: PURPOSE:To display a past travel track on a display in an easy-to-see state and utilize it for the guidance of a route by reading a position data group which is gathered and stored in order every time a vehicle travels at data group intervals corresponding to the display scale of a map and supplying the data to a display means. CONSTITUTION:While the current position of the vehicle is confirmed, the place data group indicating the position coordinates of the current position is gathered and stored in a storage means 9 in order every time the vehicle travels by a constant distance. Then the stored position data group in the storage means 9 is read out in the storage order at data group intervals corresponding to the display scale in response to a display command 21 for the travel route of the vehicle and map data groups of contents centering on the position coordinates based upon the read position data group and corresponding to the display scale are read out of storage media 10 - 13 and supplied to the display means 16. Therefore, while a map in a constant range is displayed, the travel track can be displayed. Consequently, the past travel route can be displayed on the display 17 in the easy-to-see state and used conveniently to guide the route.
Patent JP-H03116564-A (JP)
Title: Immediately effective master/stamper for optical recording
Inventor: HAWAADO II SHIMONZU ZA SAADO
IPC: G11B7/26
Filed: 1990-07-02
Abstract: PURPOSE: To make it possible to drastically simplify production processes for compact and video disks by using a master as a direct stamper in duplication stages. CONSTITUTION: A master/stamper exists on the surface of a substrate 10, has low thermal conductivity, high elasticity and glass transition point (Tg) below 50 deg.C. The stamper has an expansion film 18 having coloring materials dispersed therein and an active recording layer 12 including a holding layer 20 having low thermal conductivity, low elasticity and Tg exceeding 70 deg.C. A curable soft polymer layer 44 having a creep viscosity of an least 30 megapoises and a thickness of at least 0.1 micron on one surface of a light transparent substrate 42. The images of relief information tracks are embossed on the curable polymer layer 44 by supplying the surface having the bumps 32 of the master/master stamper under a pressure. The curable layer is cured and a reflection layer 52 is formed. As a result, the many stages for the compact and video disks are averted.
Patent JP-H0519435-A (JP)
Title: Processing method for silver halide color photographic sensitive material
Inventor: HAGIWARA MOEKO
IPC: G03C7/44
Filed: 1991-07-16
Abstract: PURPOSE:To prevent the generation of the scum in a color developer even when the color developer is subjected to a lower replenishing treatment and to ameliorate the color development defect of magenta dyes by incorporating a specific cyclic aldehyde compd. into a liquid stabilizer. CONSTITUTION:The amt. of the color developer to be replenished is 10 to 900ml per 1m<2> silver halide color photographic sensitive material and the liquid stabilizer contains at least one kind of the compds. expressed by formula I in the processing method for the silver halide color photographic sensitive material which subjects the photosensitive material to color development processing, then to processing with a processing liquid having fixability followed by processing with the liquid stabilizer. In the formula, Z denotes the atom group necessary for forming a substd. or unsubstd. carbon ring or substd. or unsubstd. heterocycle; X denotes an aldehyde group, formula II, etc.; R1 and R2 respectively denote a lower alkyl group; (n) denotes integer 1 to 4. The carbon ring and heterocycle may be a single ring or condensed ring and more preferably, Z is an arom. carbon ring or heterocycle having a substituent.
Patent JP-H0464464-A (JP)
Title: Output device
Inventor: SAITO TOSHIHARU
IPC: G09G5/28
Filed: 1990-07-04
Abstract: PURPOSE:To effectively use an external storage device by a method wherein only required ones are preserved out of character symbol patterns stored in the external storage device. CONSTITUTION:When a power is thrown in, only attributes required by an operator out of the attributes of all preserved character patterns of a dot pattern retrieval table stored in a large-capacity storage device is processed to be preserved. The dot pattern retrieval table required by the operator is stored in a dot output pattern retrieval table management part 6. When a character pattern which is absent in the management part 6 is generated, the character pattern is stored in the large-capacity storage device 5, and data corresponding to the pattern is processed to be added to the dot output pattern retrieval table in the management part 6. With the reception of an instruction of preserving the dot output pattern retrieval table in the management part 6, the table is written in the large-capacity storage device 5.
Patent JP-S6152678-A (JP)
Inventor: JINNO TOSHIO
IPC: G09B27/00
Filed: 1984-08-23
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0621458-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: KOBAYASHI IZUMI
IPC: H01L27/11
Filed: 1992-07-02
Abstract: PURPOSE:To provide a bottom-gate type thin-film transistor of uniform quality by making its channel region thinner than source/drain regions in such a manner that the gate electrode has no step under the gate film. CONSTITUTION:A silicon oxide film 102 is formed to cover the entire surface of a semiconductor substrate 101. After a polysilicon film 103 is formed and doped with impurity, a silicon oxide film 104 is formed and it is patterned. The polysilicon film 103, masked by the silicon oxide film 104, is etched and then a silicon nitride film 105 is deposited to the same thickness as the polysilicon film 103. The polysilicon and silicon nitride are removed, and a patterned silicon oxide film 106 is formed, before a polysilicon film 107 is formed. Then, source and drain regions are formed by laser annealing, followed by deposition of polysilicon oxide 108. Contact holes are opened and aluminum interconnections 109 are formed.
Patent JP-S6154121-A (JP)
Inventor: TAKEOKA NOBUO
IPC: H01H21/00
Filed: 1984-08-22
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。