text stringlengths 9 39.2M | dir stringlengths 26 295 | lang stringclasses 185 values | created_date timestamp[us] | updated_date timestamp[us] | repo_name stringlengths 1 97 | repo_full_name stringlengths 7 106 | star int64 1k 183k | len_tokens int64 1 13.8M |
|---|---|---|---|---|---|---|---|---|
```objective-c
#define op_seg(name, seg, opcode_table, normal_opcode_table) \
static int op##name##_w_a16(uint32_t fetchdat) \
{ \
fetchdat = fastreadl(cs + cpu_state.pc); \
if (cpu_state.abrt) \
return 1; \
cpu_state.pc++; \
\
cpu_state.ea_seg = &seg; \
cpu_state.ssegs = 1; \
CLOCK_CYCLES(4); \
PREFETCH_PREFIX(); \
\
if (opcode_table[fetchdat & 0xff]) \
return opcode_table[fetchdat & 0xff](fetchdat >> 8); \
return normal_opcode_table[fetchdat & 0xff](fetchdat >> 8); \
} \
\
static int op##name##_l_a16(uint32_t fetchdat) \
{ \
fetchdat = fastreadl(cs + cpu_state.pc); \
if (cpu_state.abrt) \
return 1; \
cpu_state.pc++; \
\
cpu_state.ea_seg = &seg; \
cpu_state.ssegs = 1; \
CLOCK_CYCLES(4); \
PREFETCH_PREFIX(); \
\
if (opcode_table[(fetchdat & 0xff) | 0x100]) \
return opcode_table[(fetchdat & 0xff) | 0x100](fetchdat >> 8); \
return normal_opcode_table[(fetchdat & 0xff) | 0x100](fetchdat >> 8); \
} \
\
static int op##name##_w_a32(uint32_t fetchdat) \
{ \
fetchdat = fastreadl(cs + cpu_state.pc); \
if (cpu_state.abrt) \
return 1; \
cpu_state.pc++; \
\
cpu_state.ea_seg = &seg; \
cpu_state.ssegs = 1; \
CLOCK_CYCLES(4); \
PREFETCH_PREFIX(); \
\
if (opcode_table[(fetchdat & 0xff) | 0x200]) \
return opcode_table[(fetchdat & 0xff) | 0x200](fetchdat >> 8); \
return normal_opcode_table[(fetchdat & 0xff) | 0x200](fetchdat >> 8); \
} \
\
static int op##name##_l_a32(uint32_t fetchdat) \
{ \
fetchdat = fastreadl(cs + cpu_state.pc); \
if (cpu_state.abrt) \
return 1; \
cpu_state.pc++; \
\
cpu_state.ea_seg = &seg; \
cpu_state.ssegs = 1; \
CLOCK_CYCLES(4); \
PREFETCH_PREFIX(); \
\
if (opcode_table[(fetchdat & 0xff) | 0x300]) \
return opcode_table[(fetchdat & 0xff) | 0x300](fetchdat >> 8); \
return normal_opcode_table[(fetchdat & 0xff) | 0x300](fetchdat >> 8); \
}
// clang-format off
op_seg(CS, cpu_state.seg_cs, x86_opcodes, x86_opcodes)
op_seg(DS, cpu_state.seg_ds, x86_opcodes, x86_opcodes)
op_seg(ES, cpu_state.seg_es, x86_opcodes, x86_opcodes)
op_seg(FS, cpu_state.seg_fs, x86_opcodes, x86_opcodes)
op_seg(GS, cpu_state.seg_gs, x86_opcodes, x86_opcodes)
op_seg(SS, cpu_state.seg_ss, x86_opcodes, x86_opcodes)
op_seg(CS_REPE, cpu_state.seg_cs, x86_opcodes_REPE, x86_opcodes)
op_seg(DS_REPE, cpu_state.seg_ds, x86_opcodes_REPE, x86_opcodes)
op_seg(ES_REPE, cpu_state.seg_es, x86_opcodes_REPE, x86_opcodes)
op_seg(FS_REPE, cpu_state.seg_fs, x86_opcodes_REPE, x86_opcodes)
op_seg(GS_REPE, cpu_state.seg_gs, x86_opcodes_REPE, x86_opcodes)
op_seg(SS_REPE, cpu_state.seg_ss, x86_opcodes_REPE, x86_opcodes)
op_seg(CS_REPNE, cpu_state.seg_cs, x86_opcodes_REPNE, x86_opcodes)
op_seg(DS_REPNE, cpu_state.seg_ds, x86_opcodes_REPNE, x86_opcodes)
op_seg(ES_REPNE, cpu_state.seg_es, x86_opcodes_REPNE, x86_opcodes)
op_seg(FS_REPNE, cpu_state.seg_fs, x86_opcodes_REPNE, x86_opcodes)
op_seg(GS_REPNE, cpu_state.seg_gs, x86_opcodes_REPNE, x86_opcodes)
op_seg(SS_REPNE, cpu_state.seg_ss, x86_opcodes_REPNE, x86_opcodes)
// clang-format on
static int
op_66(uint32_t fetchdat) /*Data size select*/
{
fetchdat = fastreadl(cs + cpu_state.pc);
if (cpu_state.abrt)
return 1;
cpu_state.pc++;
cpu_state.op32 = ((use32 & 0x100) ^ 0x100) | (cpu_state.op32 & 0x200);
CLOCK_CYCLES(2);
PREFETCH_PREFIX();
return x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
}
static int
op_67(uint32_t fetchdat) /*Address size select*/
{
fetchdat = fastreadl(cs + cpu_state.pc);
if (cpu_state.abrt)
return 1;
cpu_state.pc++;
cpu_state.op32 = ((use32 & 0x200) ^ 0x200) | (cpu_state.op32 & 0x100);
CLOCK_CYCLES(2);
PREFETCH_PREFIX();
return x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
}
static int
op_66_REPE(uint32_t fetchdat) /*Data size select*/
{
fetchdat = fastreadl(cs + cpu_state.pc);
if (cpu_state.abrt)
return 1;
cpu_state.pc++;
cpu_state.op32 = ((use32 & 0x100) ^ 0x100) | (cpu_state.op32 & 0x200);
CLOCK_CYCLES(2);
PREFETCH_PREFIX();
if (x86_opcodes_REPE[(fetchdat & 0xff) | cpu_state.op32])
return x86_opcodes_REPE[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
return x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
}
static int
op_67_REPE(uint32_t fetchdat) /*Address size select*/
{
fetchdat = fastreadl(cs + cpu_state.pc);
if (cpu_state.abrt)
return 1;
cpu_state.pc++;
cpu_state.op32 = ((use32 & 0x200) ^ 0x200) | (cpu_state.op32 & 0x100);
CLOCK_CYCLES(2);
PREFETCH_PREFIX();
if (x86_opcodes_REPE[(fetchdat & 0xff) | cpu_state.op32])
return x86_opcodes_REPE[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
return x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
}
static int
op_66_REPNE(uint32_t fetchdat) /*Data size select*/
{
fetchdat = fastreadl(cs + cpu_state.pc);
if (cpu_state.abrt)
return 1;
cpu_state.pc++;
cpu_state.op32 = ((use32 & 0x100) ^ 0x100) | (cpu_state.op32 & 0x200);
CLOCK_CYCLES(2);
PREFETCH_PREFIX();
if (x86_opcodes_REPNE[(fetchdat & 0xff) | cpu_state.op32])
return x86_opcodes_REPNE[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
return x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
}
static int
op_67_REPNE(uint32_t fetchdat) /*Address size select*/
{
fetchdat = fastreadl(cs + cpu_state.pc);
if (cpu_state.abrt)
return 1;
cpu_state.pc++;
cpu_state.op32 = ((use32 & 0x200) ^ 0x200) | (cpu_state.op32 & 0x100);
CLOCK_CYCLES(2);
PREFETCH_PREFIX();
if (x86_opcodes_REPNE[(fetchdat & 0xff) | cpu_state.op32])
return x86_opcodes_REPNE[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
return x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
}
``` | /content/code_sandbox/src/cpu/x86_ops_prefix.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 2,136 |
```c
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* x86 CPU segment emulation commmon parts.
*
*
*
* Authors: Sarah Walker, <path_to_url
* Miran Grca, <mgrca8@gmail.com>
*
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <stdarg.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include "x86.h"
#include "x86seg_common.h"
#include <86box/device.h>
#include <86box/timer.h>
#include <86box/machine.h>
#include <86box/mem.h>
#include <86box/nvr.h>
#include <86box/plat_fallthrough.h>
#include <86box/plat_unused.h>
uint8_t opcode2;
int cgate16;
int cgate32;
int intgatesize;
static void
seg_reset(x86seg *s)
{
s->access = 0x82;
s->ar_high = 0x10;
s->limit = 0xffff;
s->limit_low = 0;
s->limit_high = 0xffff;
if (s == &cpu_state.seg_cs) {
if (!cpu_inited)
fatal("seg_reset(&cpu_state.seg.cs) without an initialized CPU\n");
if (is6117)
s->base = 0x03ff0000;
else
s->base = is286 ? (cpu_16bitbus ? 0x00ff0000 : 0xffff0000) : 0x000ffff0;
s->seg = is286 ? 0xf000 : 0xffff;
} else {
s->base = 0;
s->seg = 0;
}
}
void
x86seg_reset(void)
{
seg_reset(&cpu_state.seg_cs);
seg_reset(&cpu_state.seg_ds);
seg_reset(&cpu_state.seg_es);
seg_reset(&cpu_state.seg_fs);
seg_reset(&cpu_state.seg_gs);
seg_reset(&cpu_state.seg_ss);
}
void
x86de(UNUSED(char *s), UNUSED(uint16_t error))
{
#ifdef BAD_CODE
cpu_state.abrt = ABRT_DE;
abrt_error = error;
#else
x86_int(0);
#endif
}
void
x86gen(void)
{
x86_int(1);
}
void
x86gpf(UNUSED(char *s), uint16_t error)
{
cpu_state.abrt = ABRT_GPF;
abrt_error = error;
}
void
x86gpf_expected(UNUSED(char *s), uint16_t error)
{
cpu_state.abrt = ABRT_GPF | ABRT_EXPECTED;
abrt_error = error;
}
void
x86ss(UNUSED(char *s), uint16_t error)
{
cpu_state.abrt = ABRT_SS;
abrt_error = error;
}
void
x86ts(UNUSED(char *s), uint16_t error)
{
cpu_state.abrt = ABRT_TS;
abrt_error = error;
}
void
x86np(UNUSED(char *s), uint16_t error)
{
cpu_state.abrt = ABRT_NP;
abrt_error = error;
}
``` | /content/code_sandbox/src/cpu/x86seg_common.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 795 |
```objective-c
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* x86 i686 (Pentium Pro/Pentium II) CPU Instructions.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*/
static int
opSYSENTER(uint32_t fetchdat)
{
int ret = sysenter(fetchdat);
if (ret <= 1) {
CLOCK_CYCLES(20);
PREFETCH_RUN(20, 7, -1, 0, 0, 0, 0, 0);
PREFETCH_FLUSH();
CPU_BLOCK_END();
}
return ret;
}
static int
opSYSEXIT(uint32_t fetchdat)
{
int ret = sysexit(fetchdat);
if (ret <= 1) {
CLOCK_CYCLES(20);
PREFETCH_RUN(20, 7, -1, 0, 0, 0, 0, 0);
PREFETCH_FLUSH();
CPU_BLOCK_END();
}
return ret;
}
static int
sf_fx_save_stor_common(uint32_t fetchdat, int bits)
{
uint8_t fxinst = 0;
uint32_t tag_byte;
unsigned index;
floatx80 reg;
if (CPUID < 0x650)
return ILLEGAL(fetchdat);
FP_ENTER();
if (bits == 32) {
fetch_ea_32(fetchdat);
} else {
fetch_ea_16(fetchdat);
}
if (cpu_state.eaaddr & 0xf) {
x386_dynarec_log("Effective address %08X not on 16-byte boundary\n", cpu_state.eaaddr);
x86gpf(NULL, 0);
return cpu_state.abrt;
}
fxinst = (rmdat >> 3) & 7;
if ((fxinst > 1) || (cpu_mod == 3)) {
x86illegal();
return cpu_state.abrt;
}
FP_ENTER();
if (fxinst == 1) {
/* FXRSTOR */
fpu_state.cwd = readmemw(easeg, cpu_state.eaaddr);
fpu_state.swd = readmemw(easeg, cpu_state.eaaddr + 2);
fpu_state.tos = (fpu_state.swd >> 11) & 7;
/* always set bit 6 as '1 */
fpu_state.cwd = (fpu_state.cwd & ~FPU_CW_Reserved_Bits) | 0x0040;
/* Restore x87 FPU Opcode */
/* The lower 11 bits contain the FPU opcode, upper 5 bits are reserved */
fpu_state.foo = readmemw(easeg, cpu_state.eaaddr + 6) & 0x7FF;
fpu_state.fip = readmeml(easeg, cpu_state.eaaddr + 8);
fpu_state.fcs = readmemw(easeg, cpu_state.eaaddr + 12);
tag_byte = readmemb(easeg, cpu_state.eaaddr + 4);
fpu_state.fdp = readmeml(easeg, cpu_state.eaaddr + 16);
fpu_state.fds = readmemw(easeg, cpu_state.eaaddr + 20);
/* load i387 register file */
for (index = 0; index < 8; index++) {
reg.signif = readmemq(easeg, cpu_state.eaaddr + (index * 16) + 32);
reg.signExp = readmemw(easeg, cpu_state.eaaddr + (index * 16) + 40);
// update tag only if it is not empty
FPU_save_regi_tag(reg, IS_TAG_EMPTY(index) ? X87_TAG_EMPTY : FPU_tagof(reg), index);
}
fpu_state.tag = unpack_FPU_TW(tag_byte);
/* check for unmasked exceptions */
if (fpu_state.swd & ~fpu_state.cwd & FPU_CW_Exceptions_Mask) {
/* set the B and ES bits in the status-word */
fpu_state.swd |= (FPU_SW_Summary | FPU_SW_Backward);
} else {
/* clear the B and ES bits in the status-word */
fpu_state.swd &= ~(FPU_SW_Summary | FPU_SW_Backward);
}
CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
} else {
/* FXSAVE */
writememw(easeg, cpu_state.eaaddr, i387_get_control_word());
writememw(easeg, cpu_state.eaaddr + 2, i387_get_status_word());
writememw(easeg, cpu_state.eaaddr + 4, pack_FPU_TW(fpu_state.tag));
/* x87 FPU Opcode (16 bits) */
/* The lower 11 bits contain the FPU opcode, upper 5 bits are reserved */
writememw(easeg, cpu_state.eaaddr + 6, fpu_state.foo);
/*
* x87 FPU IP Offset (32/64 bits)
* The contents of this field differ depending on the current
* addressing mode (16/32/64 bit) when the FXSAVE instruction was executed:
* + 64-bit mode - 64-bit IP offset
* + 32-bit mode - 32-bit IP offset
* + 16-bit mode - low 16 bits are IP offset; high 16 bits are reserved.
* x87 CS FPU IP Selector
* + 16 bit, in 16/32 bit mode only
*/
writememl(easeg, cpu_state.eaaddr + 8, fpu_state.fip);
writememl(easeg, cpu_state.eaaddr + 12, fpu_state.fcs);
/*
* x87 FPU Instruction Operand (Data) Pointer Offset (32/64 bits)
* The contents of this field differ depending on the current
* addressing mode (16/32 bit) when the FXSAVE instruction was executed:
* + 64-bit mode - 64-bit offset
* + 32-bit mode - 32-bit offset
* + 16-bit mode - low 16 bits are offset; high 16 bits are reserved.
* x87 DS FPU Instruction Operand (Data) Pointer Selector
* + 16 bit, in 16/32 bit mode only
*/
writememl(easeg, cpu_state.eaaddr + 16, fpu_state.fdp);
writememl(easeg, cpu_state.eaaddr + 20, fpu_state.fds);
/* store i387 register file */
for (index = 0; index < 8; index++) {
const floatx80 fp = FPU_read_regi(index);
writememq(easeg, cpu_state.eaaddr + (index * 16) + 32, fp.signif);
writememw(easeg, cpu_state.eaaddr + (index * 16) + 40, fp.signExp);
}
CLOCK_CYCLES((cr0 & 1) ? 56 : 67);
}
return cpu_state.abrt;
}
static int
fx_save_stor_common(uint32_t fetchdat, int bits)
{
uint8_t fxinst = 0;
uint16_t twd = x87_gettag();
uint32_t old_eaaddr = 0;
uint8_t ftwb = 0;
uint16_t rec_ftw = 0;
uint16_t fpus = 0;
int i;
int mmx_tags = 0;
uint16_t exp = 0x0000;
uint64_t mant = 0x0000000000000000ULL;
uint64_t fraction;
uint8_t jm;
uint8_t valid;
/* Exp_all_1 Exp_all_0 Frac_all_0 J M FTW_Valid | Ent
----------------------------------------------+------ */
uint8_t ftw_table_idx;
uint8_t ftw_table[48] = { 0x03, /* 0 0 0 0 0 0 | 0x00 */
0x02, /* 0 0 0 0 0 1 | 0x01 */
0x03, /* 0 0 0 0 0 0 | 0x02 */
0x02, /* 0 0 0 0 1 1 | 0x03 */
0x03, /* 0 0 0 1 0 0 | 0x04 */
0x00, /* 0 0 0 1 0 1 | 0x05 */
0x03, /* 0 0 0 1 1 0 | 0x06 */
0x00, /* 0 0 0 1 1 1 | 0x07 */
0x03, /* 0 0 1 0 0 0 | 0x08 */
0x02, /* 0 0 1 0 0 1 | 0x09 */
0x03, /* 0 0 1 0 1 0 | 0x0a - Impossible */
0x03, /* 0 0 1 0 1 1 | 0x0b - Impossible */
0x03, /* 0 0 1 1 0 0 | 0x0c */
0x02, /* 0 0 1 1 0 1 | 0x0d */
0x03, /* 0 0 1 1 1 0 | 0x0e - Impossible */
0x03, /* 0 0 1 1 1 1 | 0x0f - Impossible */
0x03, /* 0 1 0 0 0 0 | 0x10 */
0x02, /* 0 1 0 0 0 1 | 0x11 */
0x03, /* 0 1 0 0 1 0 | 0x12 */
0x02, /* 0 1 0 0 1 1 | 0x13 */
0x03, /* 0 1 0 1 0 0 | 0x14 */
0x02, /* 0 1 0 1 0 1 | 0x15 */
0x03, /* 0 1 0 1 1 0 | 0x16 */
0x02, /* 0 1 0 1 1 1 | 0x17 */
0x03, /* 0 1 1 0 0 0 | 0x18 */
0x01, /* 0 1 1 0 0 1 | 0x19 */
0x03, /* 0 1 1 0 1 0 | 0x1a - Impossible */
0x03, /* 0 1 1 0 1 1 | 0x1b - Impossible */
0x03, /* 0 1 1 1 0 0 | 0x1c */
0x01, /* 0 1 1 1 0 1 | 0x1d */
0x03, /* 0 1 1 1 1 0 | 0x1e - Impossible */
0x03, /* 0 1 1 1 1 1 | 0x1f - Impossible */
0x03, /* 1 0 0 0 0 0 | 0x20 */
0x02, /* 1 0 0 0 0 1 | 0x21 */
0x03, /* 1 0 0 0 1 0 | 0x22 */
0x02, /* 1 0 0 0 1 1 | 0x23 */
0x03, /* 1 0 0 1 0 0 | 0x24 */
0x02, /* 1 0 0 1 0 1 | 0x25 */
0x03, /* 1 0 0 1 1 0 | 0x26 */
0x02, /* 1 0 0 1 1 1 | 0x27 */
0x03, /* 1 0 1 0 0 0 | 0x28 */
0x02, /* 1 0 1 0 0 1 | 0x29 */
0x03, /* 1 0 1 0 1 0 | 0x2a - Impossible */
0x03, /* 1 0 1 0 1 1 | 0x2b - Impossible */
0x03, /* 1 0 1 1 0 0 | 0x2c */
0x02, /* 1 0 1 1 0 1 | 0x2d */
0x03, /* 1 0 1 1 1 0 | 0x2e - Impossible */
0x03 }; /* 1 0 1 1 1 1 | 0x2f - Impossible */
/* M is the most significant bit of the franction, so it is impossible
for M to o be 1 when the fraction is all 0's. */
if (CPUID < 0x650)
return ILLEGAL(fetchdat);
FP_ENTER();
if (bits == 32) {
fetch_ea_32(fetchdat);
} else {
fetch_ea_16(fetchdat);
}
if (cpu_state.eaaddr & 0xf) {
x386_dynarec_log("Effective address %08X not on 16-byte boundary\n", cpu_state.eaaddr);
x86gpf(NULL, 0);
return cpu_state.abrt;
}
fxinst = (rmdat >> 3) & 7;
if ((fxinst > 1) || (cpu_mod == 3)) {
x86illegal();
return cpu_state.abrt;
}
FP_ENTER();
old_eaaddr = cpu_state.eaaddr;
if (fxinst == 1) {
/* FXRSTOR */
cpu_state.npxc = readmemw(easeg, cpu_state.eaaddr);
fpus = readmemw(easeg, cpu_state.eaaddr + 2);
cpu_state.npxc = (cpu_state.npxc & ~FPU_CW_Reserved_Bits) | 0x0040;
codegen_set_rounding_mode((cpu_state.npxc >> 10) & 3);
cpu_state.TOP = (fpus >> 11) & 7;
cpu_state.npxs &= fpus & ~0x3800;
x87_pc_off = readmeml(easeg, cpu_state.eaaddr + 8);
x87_pc_seg = readmemw(easeg, cpu_state.eaaddr + 12);
ftwb = readmemb(easeg, cpu_state.eaaddr + 4);
x87_op_off = readmeml(easeg, cpu_state.eaaddr + 16);
x87_op_off |= (readmemw(easeg, cpu_state.eaaddr + 6) >> 12) << 16;
x87_op_seg = readmemw(easeg, cpu_state.eaaddr + 20);
for (i = 0; i <= 7; i++) {
cpu_state.eaaddr = old_eaaddr + 32 + (i << 4);
mant = readmemq(easeg, cpu_state.eaaddr);
fraction = mant & 0x7fffffffffffffffULL;
exp = readmemw(easeg, cpu_state.eaaddr + 8);
jm = (mant >> 62) & 0x03;
valid = !(ftwb & (1 << i));
ftw_table_idx = (!!(exp == 0x1111)) << 5;
ftw_table_idx |= (!!(exp == 0x0000)) << 4;
ftw_table_idx |= (!!(fraction == 0x0000000000000000ULL)) << 3;
ftw_table_idx |= (jm << 1);
ftw_table_idx |= valid;
rec_ftw |= (ftw_table[ftw_table_idx] << (i << 1));
if (exp == 0xffff)
mmx_tags++;
}
cpu_state.ismmx = 0;
/* Determine, whether or not the saved state is x87 or MMX based on a heuristic,
because we do not keep the internal state in 64-bit precision.
TODO: Is there no way to unify the whole lot? */
if ((mmx_tags == 8) && !cpu_state.TOP)
cpu_state.ismmx = 1;
x87_settag(rec_ftw);
if (cpu_state.ismmx) {
for (i = 0; i <= 7; i++) {
cpu_state.eaaddr = old_eaaddr + 32 + (i << 4);
x87_ldmmx(&(cpu_state.MM[i]), &(cpu_state.MM_w4[i]));
}
} else {
for (i = 0; i <= 7; i++) {
cpu_state.eaaddr = old_eaaddr + 32 + (i << 4);
x87_ld_frstor(i);
}
}
CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
} else {
/* FXSAVE */
if ((twd & 0x0003) != 0x0003)
ftwb |= 0x01;
if ((twd & 0x000c) != 0x000c)
ftwb |= 0x02;
if ((twd & 0x0030) != 0x0030)
ftwb |= 0x04;
if ((twd & 0x00c0) != 0x00c0)
ftwb |= 0x08;
if ((twd & 0x0300) != 0x0300)
ftwb |= 0x10;
if ((twd & 0x0c00) != 0x0c00)
ftwb |= 0x20;
if ((twd & 0x3000) != 0x3000)
ftwb |= 0x40;
if ((twd & 0xc000) != 0xc000)
ftwb |= 0x80;
writememw(easeg, cpu_state.eaaddr, cpu_state.npxc);
writememw(easeg, cpu_state.eaaddr + 2, cpu_state.npxs);
writememb(easeg, cpu_state.eaaddr + 4, ftwb);
writememw(easeg, cpu_state.eaaddr + 6, (x87_op_off >> 16) << 12);
writememl(easeg, cpu_state.eaaddr + 8, x87_pc_off);
writememw(easeg, cpu_state.eaaddr + 12, x87_pc_seg);
writememl(easeg, cpu_state.eaaddr + 16, x87_op_off);
writememw(easeg, cpu_state.eaaddr + 20, x87_op_seg);
if (cpu_state.ismmx) {
for (i = 0; i <= 7; i++) {
cpu_state.eaaddr = old_eaaddr + 32 + (i << 4);
x87_stmmx(cpu_state.MM[i]);
}
} else {
for (i = 0; i <= 7; i++) {
cpu_state.eaaddr = old_eaaddr + 32 + (i << 4);
x87_st_fsave(i);
}
}
cpu_state.eaaddr = old_eaaddr;
CLOCK_CYCLES((cr0 & 1) ? 56 : 67);
}
return cpu_state.abrt;
}
static int
opFXSAVESTOR_a16(uint32_t fetchdat)
{
if (fpu_softfloat)
return sf_fx_save_stor_common(fetchdat, 16);
return fx_save_stor_common(fetchdat, 16);
}
static int
opFXSAVESTOR_a32(uint32_t fetchdat)
{
if (fpu_softfloat)
return sf_fx_save_stor_common(fetchdat, 32);
return fx_save_stor_common(fetchdat, 32);
}
static int
opHINT_NOP_a16(uint32_t fetchdat)
{
fetch_ea_16(fetchdat);
CLOCK_CYCLES((is486) ? 1 : 3);
PREFETCH_RUN(3, 1, -1, 0, 0, 0, 0, 0);
return 0;
}
static int
opHINT_NOP_a32(uint32_t fetchdat)
{
fetch_ea_32(fetchdat);
CLOCK_CYCLES((is486) ? 1 : 3);
PREFETCH_RUN(3, 1, -1, 0, 0, 0, 0, 0);
return 0;
}
``` | /content/code_sandbox/src/cpu/x86_ops_i686.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 5,195 |
```objective-c
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Miscellaneous x86 CPU Instructions.
*
*
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Sarah Walker, <path_to_url
* Miran Grca, <mgrca8@gmail.com>
*
*
* This program is free software; you can redistribute it and/or modify
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
*
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#ifndef _X86_OPS_H
#define _X86_OPS_H
#define UN_USED(x) (void) (x)
typedef int (*OpFn)(uint32_t fetchdat);
#ifdef USE_DYNAREC
extern void x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f,
const OpFn *dynarec_opcodes,
const OpFn *dynarec_opcodes_0f);
extern const OpFn *x86_dynarec_opcodes;
extern const OpFn *x86_dynarec_opcodes_0f;
extern const OpFn *x86_dynarec_opcodes_d8_a16;
extern const OpFn *x86_dynarec_opcodes_d8_a32;
extern const OpFn *x86_dynarec_opcodes_d9_a16;
extern const OpFn *x86_dynarec_opcodes_d9_a32;
extern const OpFn *x86_dynarec_opcodes_da_a16;
extern const OpFn *x86_dynarec_opcodes_da_a32;
extern const OpFn *x86_dynarec_opcodes_db_a16;
extern const OpFn *x86_dynarec_opcodes_db_a32;
extern const OpFn *x86_dynarec_opcodes_dc_a16;
extern const OpFn *x86_dynarec_opcodes_dc_a32;
extern const OpFn *x86_dynarec_opcodes_dd_a16;
extern const OpFn *x86_dynarec_opcodes_dd_a32;
extern const OpFn *x86_dynarec_opcodes_de_a16;
extern const OpFn *x86_dynarec_opcodes_de_a32;
extern const OpFn *x86_dynarec_opcodes_df_a16;
extern const OpFn *x86_dynarec_opcodes_df_a32;
extern const OpFn *x86_dynarec_opcodes_REPE;
extern const OpFn *x86_dynarec_opcodes_REPNE;
extern const OpFn *x86_dynarec_opcodes_3DNOW;
extern const OpFn dynarec_ops_186[1024];
extern const OpFn dynarec_ops_186_0f[1024];
extern const OpFn dynarec_ops_286[1024];
extern const OpFn dynarec_ops_286_0f[1024];
extern const OpFn dynarec_ops_386[1024];
extern const OpFn dynarec_ops_386_0f[1024];
extern const OpFn dynarec_ops_486_0f[1024];
extern const OpFn dynarec_ops_c486_0f[1024];
extern const OpFn dynarec_ops_stpc_0f[1024];
extern const OpFn dynarec_ops_ibm486_0f[1024];
extern const OpFn dynarec_ops_winchip_0f[1024];
extern const OpFn dynarec_ops_winchip2_0f[1024];
extern const OpFn dynarec_ops_pentium_0f[1024];
extern const OpFn dynarec_ops_pentiummmx_0f[1024];
# ifdef USE_CYRIX_6X86
extern const OpFn dynarec_ops_c6x86_0f[1024];
extern const OpFn dynarec_ops_c6x86mx_0f[1024];
# endif /* USE_CYRIX_6X86 */
extern const OpFn dynarec_ops_k6_0f[1024];
extern const OpFn dynarec_ops_k62_0f[1024];
extern const OpFn dynarec_ops_pentiumpro_0f[1024];
extern const OpFn dynarec_ops_pentium2_0f[1024];
extern const OpFn dynarec_ops_pentium2d_0f[1024];
extern const OpFn dynarec_ops_sf_fpu_287_d9_a16[256];
extern const OpFn dynarec_ops_sf_fpu_287_d9_a32[256];
extern const OpFn dynarec_ops_sf_fpu_287_da_a16[256];
extern const OpFn dynarec_ops_sf_fpu_287_da_a32[256];
extern const OpFn dynarec_ops_sf_fpu_287_db_a16[256];
extern const OpFn dynarec_ops_sf_fpu_287_db_a32[256];
extern const OpFn dynarec_ops_sf_fpu_287_dc_a16[32];
extern const OpFn dynarec_ops_sf_fpu_287_dc_a32[32];
extern const OpFn dynarec_ops_sf_fpu_287_dd_a16[256];
extern const OpFn dynarec_ops_sf_fpu_287_dd_a32[256];
extern const OpFn dynarec_ops_sf_fpu_287_de_a16[256];
extern const OpFn dynarec_ops_sf_fpu_287_de_a32[256];
extern const OpFn dynarec_ops_sf_fpu_287_df_a16[256];
extern const OpFn dynarec_ops_sf_fpu_287_df_a32[256];
extern const OpFn dynarec_ops_sf_fpu_d8_a16[32];
extern const OpFn dynarec_ops_sf_fpu_d8_a32[32];
extern const OpFn dynarec_ops_sf_fpu_d9_a16[256];
extern const OpFn dynarec_ops_sf_fpu_d9_a32[256];
extern const OpFn dynarec_ops_sf_fpu_da_a16[256];
extern const OpFn dynarec_ops_sf_fpu_da_a32[256];
extern const OpFn dynarec_ops_sf_fpu_db_a16[256];
extern const OpFn dynarec_ops_sf_fpu_db_a32[256];
extern const OpFn dynarec_ops_sf_fpu_dc_a16[32];
extern const OpFn dynarec_ops_sf_fpu_dc_a32[32];
extern const OpFn dynarec_ops_sf_fpu_dd_a16[256];
extern const OpFn dynarec_ops_sf_fpu_dd_a32[256];
extern const OpFn dynarec_ops_sf_fpu_de_a16[256];
extern const OpFn dynarec_ops_sf_fpu_de_a32[256];
extern const OpFn dynarec_ops_sf_fpu_df_a16[256];
extern const OpFn dynarec_ops_sf_fpu_df_a32[256];
extern const OpFn dynarec_ops_fpu_287_d9_a16[256];
extern const OpFn dynarec_ops_fpu_287_d9_a32[256];
extern const OpFn dynarec_ops_fpu_287_da_a16[256];
extern const OpFn dynarec_ops_fpu_287_da_a32[256];
extern const OpFn dynarec_ops_fpu_287_db_a16[256];
extern const OpFn dynarec_ops_fpu_287_db_a32[256];
extern const OpFn dynarec_ops_fpu_287_dc_a16[32];
extern const OpFn dynarec_ops_fpu_287_dc_a32[32];
extern const OpFn dynarec_ops_fpu_287_dd_a16[256];
extern const OpFn dynarec_ops_fpu_287_dd_a32[256];
extern const OpFn dynarec_ops_fpu_287_de_a16[256];
extern const OpFn dynarec_ops_fpu_287_de_a32[256];
extern const OpFn dynarec_ops_fpu_287_df_a16[256];
extern const OpFn dynarec_ops_fpu_287_df_a32[256];
extern const OpFn dynarec_ops_fpu_d8_a16[32];
extern const OpFn dynarec_ops_fpu_d8_a32[32];
extern const OpFn dynarec_ops_fpu_d9_a16[256];
extern const OpFn dynarec_ops_fpu_d9_a32[256];
extern const OpFn dynarec_ops_fpu_da_a16[256];
extern const OpFn dynarec_ops_fpu_da_a32[256];
extern const OpFn dynarec_ops_fpu_db_a16[256];
extern const OpFn dynarec_ops_fpu_db_a32[256];
extern const OpFn dynarec_ops_fpu_dc_a16[32];
extern const OpFn dynarec_ops_fpu_dc_a32[32];
extern const OpFn dynarec_ops_fpu_dd_a16[256];
extern const OpFn dynarec_ops_fpu_dd_a32[256];
extern const OpFn dynarec_ops_fpu_de_a16[256];
extern const OpFn dynarec_ops_fpu_de_a32[256];
extern const OpFn dynarec_ops_fpu_df_a16[256];
extern const OpFn dynarec_ops_fpu_df_a32[256];
extern const OpFn dynarec_ops_nofpu_a16[256];
extern const OpFn dynarec_ops_nofpu_a32[256];
extern const OpFn dynarec_ops_sf_fpu_686_da_a16[256];
extern const OpFn dynarec_ops_sf_fpu_686_da_a32[256];
extern const OpFn dynarec_ops_sf_fpu_686_db_a16[256];
extern const OpFn dynarec_ops_sf_fpu_686_db_a32[256];
extern const OpFn dynarec_ops_sf_fpu_686_df_a16[256];
extern const OpFn dynarec_ops_sf_fpu_686_df_a32[256];
extern const OpFn dynarec_ops_fpu_686_da_a16[256];
extern const OpFn dynarec_ops_fpu_686_da_a32[256];
extern const OpFn dynarec_ops_fpu_686_db_a16[256];
extern const OpFn dynarec_ops_fpu_686_db_a32[256];
extern const OpFn dynarec_ops_fpu_686_df_a16[256];
extern const OpFn dynarec_ops_fpu_686_df_a32[256];
extern const OpFn dynarec_ops_REPE[1024];
extern const OpFn dynarec_ops_REPNE[1024];
extern const OpFn dynarec_ops_3DNOW[256];
extern const OpFn dynarec_ops_3DNOWE[256];
#else
extern void x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f);
#endif
extern const OpFn *x86_opcodes;
extern const OpFn *x86_opcodes_0f;
extern const OpFn *x86_opcodes_d8_a16;
extern const OpFn *x86_opcodes_d8_a32;
extern const OpFn *x86_opcodes_d9_a16;
extern const OpFn *x86_opcodes_d9_a32;
extern const OpFn *x86_opcodes_da_a16;
extern const OpFn *x86_opcodes_da_a32;
extern const OpFn *x86_opcodes_db_a16;
extern const OpFn *x86_opcodes_db_a32;
extern const OpFn *x86_opcodes_dc_a16;
extern const OpFn *x86_opcodes_dc_a32;
extern const OpFn *x86_opcodes_dd_a16;
extern const OpFn *x86_opcodes_dd_a32;
extern const OpFn *x86_opcodes_de_a16;
extern const OpFn *x86_opcodes_de_a32;
extern const OpFn *x86_opcodes_df_a16;
extern const OpFn *x86_opcodes_df_a32;
extern const OpFn *x86_opcodes_REPE;
extern const OpFn *x86_opcodes_REPNE;
extern const OpFn *x86_opcodes_3DNOW;
extern const OpFn ops_186[1024];
extern const OpFn ops_186_0f[1024];
extern const OpFn ops_286[1024];
extern const OpFn ops_286_0f[1024];
extern const OpFn ops_386[1024];
extern const OpFn ops_386_0f[1024];
extern const OpFn ops_486_0f[1024];
extern const OpFn ops_c486_0f[1024];
extern const OpFn ops_stpc_0f[1024];
extern const OpFn ops_ibm486_0f[1024];
extern const OpFn ops_winchip_0f[1024];
extern const OpFn ops_winchip2_0f[1024];
extern const OpFn ops_pentium_0f[1024];
extern const OpFn ops_pentiummmx_0f[1024];
#ifdef USE_CYRIX_6X86
extern const OpFn ops_c6x86_0f[1024];
extern const OpFn ops_c6x86mx_0f[1024];
#endif /* USE_CYRIX_6X86 */
extern const OpFn ops_k6_0f[1024];
extern const OpFn ops_k62_0f[1024];
extern const OpFn ops_pentiumpro_0f[1024];
extern const OpFn ops_pentium2_0f[1024];
extern const OpFn ops_pentium2d_0f[1024];
extern const OpFn ops_sf_fpu_287_d9_a16[256];
extern const OpFn ops_sf_fpu_287_d9_a32[256];
extern const OpFn ops_sf_fpu_287_da_a16[256];
extern const OpFn ops_sf_fpu_287_da_a32[256];
extern const OpFn ops_sf_fpu_287_db_a16[256];
extern const OpFn ops_sf_fpu_287_db_a32[256];
extern const OpFn ops_sf_fpu_287_dc_a16[32];
extern const OpFn ops_sf_fpu_287_dc_a32[32];
extern const OpFn ops_sf_fpu_287_dd_a16[256];
extern const OpFn ops_sf_fpu_287_dd_a32[256];
extern const OpFn ops_sf_fpu_287_de_a16[256];
extern const OpFn ops_sf_fpu_287_de_a32[256];
extern const OpFn ops_sf_fpu_287_df_a16[256];
extern const OpFn ops_sf_fpu_287_df_a32[256];
extern const OpFn ops_sf_fpu_d8_a16[32];
extern const OpFn ops_sf_fpu_d8_a32[32];
extern const OpFn ops_sf_fpu_d9_a16[256];
extern const OpFn ops_sf_fpu_d9_a32[256];
extern const OpFn ops_sf_fpu_da_a16[256];
extern const OpFn ops_sf_fpu_da_a32[256];
extern const OpFn ops_sf_fpu_db_a16[256];
extern const OpFn ops_sf_fpu_db_a32[256];
extern const OpFn ops_sf_fpu_dc_a16[32];
extern const OpFn ops_sf_fpu_dc_a32[32];
extern const OpFn ops_sf_fpu_dd_a16[256];
extern const OpFn ops_sf_fpu_dd_a32[256];
extern const OpFn ops_sf_fpu_de_a16[256];
extern const OpFn ops_sf_fpu_de_a32[256];
extern const OpFn ops_sf_fpu_df_a16[256];
extern const OpFn ops_sf_fpu_df_a32[256];
extern const OpFn ops_fpu_287_d9_a16[256];
extern const OpFn ops_fpu_287_d9_a32[256];
extern const OpFn ops_fpu_287_da_a16[256];
extern const OpFn ops_fpu_287_da_a32[256];
extern const OpFn ops_fpu_287_db_a16[256];
extern const OpFn ops_fpu_287_db_a32[256];
extern const OpFn ops_fpu_287_dc_a16[32];
extern const OpFn ops_fpu_287_dc_a32[32];
extern const OpFn ops_fpu_287_dd_a16[256];
extern const OpFn ops_fpu_287_dd_a32[256];
extern const OpFn ops_fpu_287_de_a16[256];
extern const OpFn ops_fpu_287_de_a32[256];
extern const OpFn ops_fpu_287_df_a16[256];
extern const OpFn ops_fpu_287_df_a32[256];
extern const OpFn ops_fpu_d8_a16[32];
extern const OpFn ops_fpu_d8_a32[32];
extern const OpFn ops_fpu_d9_a16[256];
extern const OpFn ops_fpu_d9_a32[256];
extern const OpFn ops_fpu_da_a16[256];
extern const OpFn ops_fpu_da_a32[256];
extern const OpFn ops_fpu_db_a16[256];
extern const OpFn ops_fpu_db_a32[256];
extern const OpFn ops_fpu_dc_a16[32];
extern const OpFn ops_fpu_dc_a32[32];
extern const OpFn ops_fpu_dd_a16[256];
extern const OpFn ops_fpu_dd_a32[256];
extern const OpFn ops_fpu_de_a16[256];
extern const OpFn ops_fpu_de_a32[256];
extern const OpFn ops_fpu_df_a16[256];
extern const OpFn ops_fpu_df_a32[256];
extern const OpFn ops_nofpu_a16[256];
extern const OpFn ops_nofpu_a32[256];
extern const OpFn ops_sf_fpu_686_da_a16[256];
extern const OpFn ops_sf_fpu_686_da_a32[256];
extern const OpFn ops_sf_fpu_686_db_a16[256];
extern const OpFn ops_sf_fpu_686_db_a32[256];
extern const OpFn ops_sf_fpu_686_df_a16[256];
extern const OpFn ops_sf_fpu_686_df_a32[256];
extern const OpFn ops_fpu_686_da_a16[256];
extern const OpFn ops_fpu_686_da_a32[256];
extern const OpFn ops_fpu_686_db_a16[256];
extern const OpFn ops_fpu_686_db_a32[256];
extern const OpFn ops_fpu_686_df_a16[256];
extern const OpFn ops_fpu_686_df_a32[256];
extern const OpFn ops_REPE[1024];
extern const OpFn ops_REPNE[1024];
extern const OpFn ops_3DNOW[256];
extern const OpFn ops_3DNOWE[256];
extern void x86_setopcodes_2386(const OpFn *opcodes, const OpFn *opcodes_0f);
extern const OpFn *x86_2386_opcodes;
extern const OpFn *x86_2386_opcodes_0f;
extern const OpFn *x86_2386_opcodes_d8_a16;
extern const OpFn *x86_2386_opcodes_d8_a32;
extern const OpFn *x86_2386_opcodes_d9_a16;
extern const OpFn *x86_2386_opcodes_d9_a32;
extern const OpFn *x86_2386_opcodes_da_a16;
extern const OpFn *x86_2386_opcodes_da_a32;
extern const OpFn *x86_2386_opcodes_db_a16;
extern const OpFn *x86_2386_opcodes_db_a32;
extern const OpFn *x86_2386_opcodes_dc_a16;
extern const OpFn *x86_2386_opcodes_dc_a32;
extern const OpFn *x86_2386_opcodes_dd_a16;
extern const OpFn *x86_2386_opcodes_dd_a32;
extern const OpFn *x86_2386_opcodes_de_a16;
extern const OpFn *x86_2386_opcodes_de_a32;
extern const OpFn *x86_2386_opcodes_df_a16;
extern const OpFn *x86_2386_opcodes_df_a32;
extern const OpFn *x86_2386_opcodes_REPE;
extern const OpFn *x86_2386_opcodes_REPNE;
extern const OpFn ops_2386_186[1024];
extern const OpFn ops_2386_186_0f[1024];
extern const OpFn ops_2386_286[1024];
extern const OpFn ops_2386_286_0f[1024];
extern const OpFn ops_2386_386[1024];
extern const OpFn ops_2386_386_0f[1024];
extern const OpFn ops_2386_486_0f[1024];
extern const OpFn ops_2386_ibm486_0f[1024];
extern const OpFn ops_2386_sf_fpu_287_d9_a16[256];
extern const OpFn ops_2386_sf_fpu_287_d9_a32[256];
extern const OpFn ops_2386_sf_fpu_287_da_a16[256];
extern const OpFn ops_2386_sf_fpu_287_da_a32[256];
extern const OpFn ops_2386_sf_fpu_287_db_a16[256];
extern const OpFn ops_2386_sf_fpu_287_db_a32[256];
extern const OpFn ops_2386_sf_fpu_287_dc_a16[32];
extern const OpFn ops_2386_sf_fpu_287_dc_a32[32];
extern const OpFn ops_2386_sf_fpu_287_dd_a16[256];
extern const OpFn ops_2386_sf_fpu_287_dd_a32[256];
extern const OpFn ops_2386_sf_fpu_287_de_a16[256];
extern const OpFn ops_2386_sf_fpu_287_de_a32[256];
extern const OpFn ops_2386_sf_fpu_287_df_a16[256];
extern const OpFn ops_2386_sf_fpu_287_df_a32[256];
extern const OpFn ops_2386_sf_fpu_d8_a16[32];
extern const OpFn ops_2386_sf_fpu_d8_a32[32];
extern const OpFn ops_2386_sf_fpu_d9_a16[256];
extern const OpFn ops_2386_sf_fpu_d9_a32[256];
extern const OpFn ops_2386_sf_fpu_da_a16[256];
extern const OpFn ops_2386_sf_fpu_da_a32[256];
extern const OpFn ops_2386_sf_fpu_db_a16[256];
extern const OpFn ops_2386_sf_fpu_db_a32[256];
extern const OpFn ops_2386_sf_fpu_dc_a16[32];
extern const OpFn ops_2386_sf_fpu_dc_a32[32];
extern const OpFn ops_2386_sf_fpu_dd_a16[256];
extern const OpFn ops_2386_sf_fpu_dd_a32[256];
extern const OpFn ops_2386_sf_fpu_de_a16[256];
extern const OpFn ops_2386_sf_fpu_de_a32[256];
extern const OpFn ops_2386_sf_fpu_df_a16[256];
extern const OpFn ops_2386_sf_fpu_df_a32[256];
extern const OpFn ops_2386_fpu_287_d9_a16[256];
extern const OpFn ops_2386_fpu_287_d9_a32[256];
extern const OpFn ops_2386_fpu_287_da_a16[256];
extern const OpFn ops_2386_fpu_287_da_a32[256];
extern const OpFn ops_2386_fpu_287_db_a16[256];
extern const OpFn ops_2386_fpu_287_db_a32[256];
extern const OpFn ops_2386_fpu_287_dc_a16[32];
extern const OpFn ops_2386_fpu_287_dc_a32[32];
extern const OpFn ops_2386_fpu_287_dd_a16[256];
extern const OpFn ops_2386_fpu_287_dd_a32[256];
extern const OpFn ops_2386_fpu_287_de_a16[256];
extern const OpFn ops_2386_fpu_287_de_a32[256];
extern const OpFn ops_2386_fpu_287_df_a16[256];
extern const OpFn ops_2386_fpu_287_df_a32[256];
extern const OpFn ops_2386_fpu_d8_a16[32];
extern const OpFn ops_2386_fpu_d8_a32[32];
extern const OpFn ops_2386_fpu_d9_a16[256];
extern const OpFn ops_2386_fpu_d9_a32[256];
extern const OpFn ops_2386_fpu_da_a16[256];
extern const OpFn ops_2386_fpu_da_a32[256];
extern const OpFn ops_2386_fpu_db_a16[256];
extern const OpFn ops_2386_fpu_db_a32[256];
extern const OpFn ops_2386_fpu_dc_a16[32];
extern const OpFn ops_2386_fpu_dc_a32[32];
extern const OpFn ops_2386_fpu_dd_a16[256];
extern const OpFn ops_2386_fpu_dd_a32[256];
extern const OpFn ops_2386_fpu_de_a16[256];
extern const OpFn ops_2386_fpu_de_a32[256];
extern const OpFn ops_2386_fpu_df_a16[256];
extern const OpFn ops_2386_fpu_df_a32[256];
extern const OpFn ops_2386_nofpu_a16[256];
extern const OpFn ops_2386_nofpu_a32[256];
extern const OpFn ops_2386_REPE[1024];
extern const OpFn ops_2386_REPNE[1024];
extern const OpFn ops_2386_3DNOW[256];
#define FPU_SW_C3 (0x4000) /* condition bit 3 */
#define FPU_SW_C2 (0x0400) /* condition bit 2 */
#define FPU_SW_C1 (0x0200) /* condition bit 1 */
#define FPU_SW_C0 (0x0100) /* condition bit 0 */
#endif /*_X86_OPS_H*/
``` | /content/code_sandbox/src/cpu/x86_ops.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 5,909 |
```objective-c
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* x86 CPU segment emulation header.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
*/
#ifndef EMU_X86SEG_H
#define EMU_X86SEG_H
#ifdef OPS_286_386
extern void x86_doabrt_2386(int x86_abrt);
#ifdef USE_NEW_DYNAREC
extern int loadseg_2386(uint16_t seg, x86seg *s);
#else
extern void loadseg_2386(uint16_t seg, x86seg *s);
#endif
extern void loadcs_2386(uint16_t seg);
extern void loadcsjmp_2386(uint16_t seg, uint32_t old_pc);
#ifdef USE_NEW_DYNAREC
extern void loadcscall_2386(uint16_t seg, uint32_t old_pc);
#else
extern void loadcscall_2386(uint16_t seg);
#endif
extern void pmoderetf_2386(int is32, uint16_t off);
extern void pmodeint_2386(int num, int soft);
extern void pmodeiret_2386(int is32);
extern void taskswitch286_2386(uint16_t seg, uint16_t *segdat, int is32);
/* #define's to avoid long #ifdef blocks in x86_ops_*.h. */
#define op_doabrt x86_doabrt_2386
#define op_loadseg loadseg_2386
#define op_loadcs loadcs_2386
#define op_loadcsjmp loadcsjmp_2386
#define op_loadcscall loadcscall_2386
#define op_pmoderetf pmoderetf_2386
#define op_pmodeint pmodeint_2386
#define op_pmodeiret pmodeiret_2386
#define op_taskswitch taskswitch_2386
#define op_taskswitch286 taskswitch286_2386
#else
extern void x86_doabrt(int x86_abrt);
#ifdef USE_NEW_DYNAREC
extern int loadseg(uint16_t seg, x86seg *s);
#else
extern void loadseg(uint16_t seg, x86seg *s);
#endif
/* The prototype of loadcs_2386() is needed here for reset. */
extern void loadcs_2386(uint16_t seg);
extern void loadcs(uint16_t seg);
extern void loadcsjmp(uint16_t seg, uint32_t old_pc);
#ifdef USE_NEW_DYNAREC
extern void loadcscall(uint16_t seg, uint32_t old_pc);
#else
extern void loadcscall(uint16_t seg);
#endif
extern void pmoderetf(int is32, uint16_t off);
/* The prototype of pmodeint_2386() is needed here for 386_common.c interrupts. */
extern void pmodeint_2386(int num, int soft);
extern void pmodeint(int num, int soft);
extern void pmodeiret(int is32);
extern void taskswitch286(uint16_t seg, uint16_t *segdat, int is32);
/* #define's to avoid long #ifdef blocks in x86_ops_*.h. */
#define op_doabrt x86_doabrt
#define op_loadseg loadseg
#define op_loadcs loadcs
#define op_loadcsjmp loadcsjmp
#define op_loadcscall loadcscall
#define op_pmoderetf pmoderetf
#define op_pmodeint pmodeint
#define op_pmodeiret pmodeiret
#define op_taskswitch286 taskswitch286
#endif
extern void cyrix_write_seg_descriptor_2386(uint32_t addr, x86seg *seg);
extern void cyrix_load_seg_descriptor_2386(uint32_t addr, x86seg *seg);
extern void cyrix_write_seg_descriptor(uint32_t addr, x86seg *seg);
extern void cyrix_load_seg_descriptor(uint32_t addr, x86seg *seg);
#endif /*EMU_X86SEG_H*/
``` | /content/code_sandbox/src/cpu/x86seg.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 937 |
```objective-c
typedef struct
{
int f2xm1;
int fabs;
int fadd, fadd_32, fadd_64;
int fbld;
int fbstp;
int fchs;
int fclex;
int fcom, fcom_32, fcom_64;
int fcos;
int fincdecstp;
int fdisi_eni;
int fdiv, fdiv_32, fdiv_64;
int ffree;
int fadd_i16, fadd_i32;
int fcom_i16, fcom_i32;
int fdiv_i16, fdiv_i32;
int fild_16, fild_32, fild_64;
int fmul_i16, fmul_i32;
int finit;
int fist_16, fist_32, fist_64;
int fld, fld_32, fld_64, fld_80;
int fld_z1, fld_const;
int fldcw;
int fldenv;
int fmul, fmul_32, fmul_64;
int fnop;
int fpatan;
int fprem, fprem1;
int fptan;
int frndint;
int frstor;
int fsave;
int fscale;
int fsetpm;
int fsin_cos, fsincos;
int fsqrt;
int fst, fst_32, fst_64, fst_80;
int fstcw_sw;
int fstenv;
int ftst;
int fucom;
int fwait;
int fxam;
int fxch;
int fxtract;
int fyl2x, fyl2xp1;
} x87_timings_t;
extern const x87_timings_t x87_timings_8087;
extern const x87_timings_t x87_timings_80187;
extern const x87_timings_t x87_timings_287;
extern const x87_timings_t x87_timings_387;
extern const x87_timings_t x87_timings_486;
extern const x87_timings_t x87_concurrency_486;
extern x87_timings_t x87_timings;
extern x87_timings_t x87_concurrency;
``` | /content/code_sandbox/src/cpu/x87_timings.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 496 |
```c
/*Most of the vector instructions here are a total guess.
Some of the timings are based on path_to_url
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include <86box/mem.h>
#include "cpu.h"
#include <86box/machine.h>
#include "x86.h"
#include "x86_ops.h"
#include "x86seg_common.h"
#include "x87_sf.h"
#include "x87.h"
#include "386_common.h"
#include "codegen.h"
#include "codegen_ops.h"
#include "codegen_timing_common.h"
typedef enum uop_type_t {
UOP_ALU = 0, /*Executes in Integer X or Y units*/
UOP_ALUX, /*Executes in Integer X unit*/
UOP_LOAD, /*Executes in Load unit*/
UOP_STORE, /*Executes in Store unit*/
UOP_FLOAD, /*Executes in Load unit*/
UOP_FSTORE, /*Executes in Store unit*/
UOP_MLOAD, /*Executes in Load unit*/
UOP_MSTORE, /*Executes in Store unit*/
UOP_FLOAT, /*Executes in Floating Point unit*/
UOP_MEU, /*Executes in Multimedia unit*/
UOP_MEU_SHIFT, /*Executes in Multimedia unit or ALU X/Y. Uses MMX shifter*/
UOP_MEU_MUL, /*Executes in Multimedia unit or ALU X/Y. Uses MMX/3DNow multiplier*/
UOP_MEU_3DN, /*Executes in Multimedia unit or ALU X/Y. Uses 3DNow ALU*/
UOP_BRANCH, /*Executes in Branch unit*/
UOP_LIMM /*Does not require an execution unit*/
} uop_type_t;
typedef enum decode_type_t {
DECODE_SHORT,
DECODE_LONG,
DECODE_VECTOR
} decode_type_t;
#define MAX_UOPS 10
typedef struct risc86_uop_t {
uop_type_t type;
int throughput;
int latency;
} risc86_uop_t;
typedef struct risc86_instruction_t {
int nr_uops;
decode_type_t decode_type;
risc86_uop_t uop[MAX_UOPS];
} risc86_instruction_t;
static const risc86_instruction_t alu_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t alux_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_alu_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_alux_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t alu_store_op = {
.nr_uops = 3,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t alux_store_op = {
.nr_uops = 3,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t branch_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t limm_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LIMM, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t store_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t bswap_op = {
.nr_uops = 1,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t leave_op = {
.nr_uops = 3,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t lods_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t loop_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t mov_reg_seg_op = {
.nr_uops = 1,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
};
static const risc86_instruction_t movs_op = {
.nr_uops = 4,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t pop_reg_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t pop_mem_op = {
.nr_uops = 3,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t push_imm_op = {
.nr_uops = 1,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 2},
};
static const risc86_instruction_t push_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t push_seg_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t stos_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t test_reg_op = {
.nr_uops = 1,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t test_reg_b_op = {
.nr_uops = 1,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t test_mem_imm_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t test_mem_imm_b_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t xchg_op = {
.nr_uops = 3,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t m3dn_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MEU_3DN, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t mmx_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MEU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t mmx_mul_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t mmx_shift_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MEU_SHIFT, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_3dn_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_MEU_3DN, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_mmx_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_MEU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_mmx_mul_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t load_mmx_shift_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_MEU_SHIFT, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t mload_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MLOAD, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t mstore_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MSTORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t pmul_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t pmul_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t float_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAT, .throughput = 2, .latency = 2}
};
static const risc86_instruction_t load_float_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_FLOAT, .throughput = 2, .latency = 2}
};
static const risc86_instruction_t fstore_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FSTORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t fdiv_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAT, .throughput = 40, .latency = 40}
};
static const risc86_instruction_t fdiv_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAD, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_FLOAT, .throughput = 40, .latency = 40}
};
static const risc86_instruction_t fsin_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAT, .throughput = 62, .latency = 62}
};
static const risc86_instruction_t fsqrt_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAT, .throughput = 41, .latency = 41}
};
static const risc86_instruction_t vector_fldcw_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_FLOAT, .throughput = 8, .latency = 8}
};
static const risc86_instruction_t vector_float_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_FLOAT, .throughput = 2, .latency = 2}
};
static const risc86_instruction_t vector_float_l_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_FLOAT, .throughput = 50, .latency = 50}
};
static const risc86_instruction_t vector_flde_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_FLOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_FLOAD, .throughput = 1, .latency = 2},
.uop[2] = { .type = UOP_FLOAT, .throughput = 2, .latency = 2}
};
static const risc86_instruction_t vector_fste_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_FLOAT, .throughput = 2, .latency = 2},
.uop[1] = { .type = UOP_FSTORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_FSTORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alu1_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alu2_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alu3_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alu6_op = {
.nr_uops = 6,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[4] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[5] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alux1_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alux3_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alux6_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[4] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[5] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alu_store_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alux_store_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_arpl_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3},
.uop[1] = { .type = UOP_ALU, .throughput = 3, .latency = 3}
};
static const risc86_instruction_t vector_bound_op = {
.nr_uops = 4,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_bsx_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 10, .latency = 10}
};
static const risc86_instruction_t vector_call_far_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_cli_sti_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 7, .latency = 7}
};
static const risc86_instruction_t vector_cmps_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_cmpsb_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_cmpxchg_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
};
static const risc86_instruction_t vector_cmpxchg_b_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
};
static const risc86_instruction_t vector_cpuid_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 22, .latency = 22}
};
static const risc86_instruction_t vector_div16_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 10, .latency = 10}
};
static const risc86_instruction_t vector_div16_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_ALUX, .throughput = 10, .latency = 10}
};
static const risc86_instruction_t vector_div32_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 18, .latency = 18}
};
static const risc86_instruction_t vector_div32_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_ALUX, .throughput = 18, .latency = 18}
};
static const risc86_instruction_t vector_emms_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 25, .latency = 25}
};
static const risc86_instruction_t vector_enter_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_ALU, .throughput = 10, .latency = 10}
};
static const risc86_instruction_t vector_femms_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 6, .latency = 6}
};
static const risc86_instruction_t vector_in_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 10, .latency = 11}
};
static const risc86_instruction_t vector_ins_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 10, .latency = 11},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1 },
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1 }
};
static const risc86_instruction_t vector_int_op = {
.nr_uops = 5,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 20, .latency = 20},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1 },
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1 },
.uop[3] = { .type = UOP_STORE, .throughput = 1, .latency = 1 },
.uop[4] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1 }
};
static const risc86_instruction_t vector_iret_op = {
.nr_uops = 5,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[2] = { .type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[3] = { .type = UOP_ALU, .throughput = 20, .latency = 20},
.uop[4] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1 }
};
static const risc86_instruction_t vector_invd_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1000, .latency = 1000}
};
static const risc86_instruction_t vector_jmp_far_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3},
.uop[1] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_load_alu_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_load_alux_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_loop_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_lss_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[2] = { .type = UOP_ALU, .throughput = 3, .latency = 3}
};
static const risc86_instruction_t vector_mov_mem_seg_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_mov_seg_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 3, .latency = 3}
};
static const risc86_instruction_t vector_mov_seg_reg_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3}
};
static const risc86_instruction_t vector_mul_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_mul_mem_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_mul64_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_mul64_mem_op = {
.nr_uops = 4,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_out_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_STORE, .throughput = 10, .latency = 10}
};
static const risc86_instruction_t vector_outs_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1 },
.uop[1] = { .type = UOP_STORE, .throughput = 10, .latency = 10},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1 }
};
static const risc86_instruction_t vector_pusha_op = {
.nr_uops = 8,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[4] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[5] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[6] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[7] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_popa_op = {
.nr_uops = 8,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[4] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[5] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[6] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[7] = { .type = UOP_LOAD, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_popf_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_ALUX, .throughput = 17, .latency = 17}
};
static const risc86_instruction_t vector_push_mem_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_pushf_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_ret_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_retf_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 3, .latency = 3},
.uop[2] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_scas_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_scasb_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_setcc_mem_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_FSTORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_setcc_reg_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_test_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_test_mem_b_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_xchg_mem_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_xlat_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_LOAD, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t vector_wbinvd_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 10000, .latency = 10000}
};
#define INVALID NULL
static const risc86_instruction_t *opcode_timings_k6[256] = {
// clang-format off
/* ADD ADD ADD ADD*/
/*00*/ &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
/* ADD ADD PUSH ES POP ES*/
&alux_op, &alu_op, &push_seg_op, &vector_mov_seg_mem_op,
/* OR OR OR OR*/
&alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
/* OR OR PUSH CS */
&alux_op, &alu_op, &push_seg_op, INVALID,
/* ADC ADC ADC ADC*/
/*10*/ &vector_alux_store_op, &vector_alu_store_op, &vector_load_alux_op, &vector_load_alu_op,
/* ADC ADC PUSH SS POP SS*/
&vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
/* SBB SBB SBB SBB*/
/*10*/ &vector_alux_store_op, &vector_alu_store_op, &vector_load_alux_op, &vector_load_alu_op,
/* SBB SBB PUSH DS POP DS*/
&vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
/* AND AND AND AND*/
/*20*/ &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
/* AND AND DAA*/
&alux_op, &alu_op, INVALID, &vector_alux1_op,
/* SUB SUB SUB SUB*/
&alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
/* SUB SUB DAS*/
&alux_op, &alu_op, INVALID, &vector_alux1_op,
/* XOR XOR XOR XOR*/
/*30*/ &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
/* XOR XOR AAA*/
&alux_op, &alu_op, INVALID, &vector_alux6_op,
/* CMP CMP CMP CMP*/
&load_alux_op, &load_alu_op, &load_alux_op, &load_alu_op,
/* CMP CMP AAS*/
&alux_op, &alu_op, INVALID, &vector_alux6_op,
/* INC EAX INC ECX INC EDX INC EBX*/
/*40*/ &alu_op, &alu_op, &alu_op, &alu_op,
/* INC ESP INC EBP INC ESI INC EDI*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* DEC EAX DEC ECX DEC EDX DEC EBX*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* DEC ESP DEC EBP DEC ESI DEC EDI*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
/*50*/ &store_op, &store_op, &store_op, &store_op,
/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
&store_op, &store_op, &store_op, &store_op,
/* POP EAX POP ECX POP EDX POP EBX*/
&pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
/* POP ESP POP EBP POP ESI POP EDI*/
&pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
/* PUSHA POPA BOUND ARPL*/
/*60*/ &vector_pusha_op, &vector_popa_op, &vector_bound_op, &vector_arpl_op,
INVALID, INVALID, INVALID, INVALID,
/* PUSH imm IMUL PUSH imm IMUL*/
&push_imm_op, &vector_mul_op, &push_imm_op, &vector_mul_op,
/* INSB INSW OUTSB OUTSW*/
&vector_ins_op, &vector_ins_op, &vector_outs_op, &vector_outs_op,
/* Jxx*/
/*70*/ &branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
/*80*/ INVALID, INVALID, INVALID, INVALID,
/* TEST TEST XCHG XCHG*/
&vector_test_mem_b_op, &vector_test_mem_op, &vector_xchg_mem_op, &vector_xchg_mem_op,
/* MOV MOV MOV MOV*/
&store_op, &store_op, &load_op, &load_op,
/* MOV from seg LEA MOV to seg POP*/
&vector_mov_mem_seg_op, &store_op, &vector_mov_seg_mem_op, &pop_mem_op,
/* NOP XCHG XCHG XCHG*/
/*90*/ &limm_op, &xchg_op, &xchg_op, &xchg_op,
/* XCHG XCHG XCHG XCHG*/
&xchg_op, &xchg_op, &xchg_op, &xchg_op,
/* CBW CWD CALL far WAIT*/
&vector_alu1_op, &vector_alu1_op, &vector_call_far_op, &limm_op,
/* PUSHF POPF SAHF LAHF*/
&vector_pushf_op, &vector_popf_op, &vector_alux1_op, &vector_alux1_op,
/* MOV MOV MOV MOV*/
/*a0*/ &load_op, &load_op, &store_op, &store_op,
/* MOVSB MOVSW CMPSB CMPSW*/
&movs_op, &movs_op, &vector_cmpsb_op, &vector_cmps_op,
/* TEST TEST STOSB STOSW*/
&test_reg_b_op, &test_reg_op, &stos_op, &stos_op,
/* LODSB LODSW SCASB SCASW*/
&lods_op, &lods_op, &vector_scasb_op, &vector_scas_op,
/* MOV*/
/*b0*/ &limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
/* RET imm RET*/
/*c0*/ INVALID, INVALID, &vector_ret_op, &vector_ret_op,
/* LES LDS MOV MOV*/
&vector_lss_op, &vector_lss_op, &store_op, &store_op,
/* ENTER LEAVE RETF RETF*/
&vector_enter_op, &leave_op, &vector_retf_op, &vector_retf_op,
/* INT3 INT INTO IRET*/
&vector_int_op, &vector_int_op, &vector_int_op, &vector_iret_op,
/*d0*/ INVALID, INVALID, INVALID, INVALID,
/* AAM AAD SETALC XLAT*/
&vector_alux6_op, &vector_alux3_op, &vector_alux1_op, &vector_xlat_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/* LOOPNE LOOPE LOOP JCXZ*/
/*e0*/ &vector_loop_op, &vector_loop_op, &loop_op, &vector_loop_op,
/* IN AL IN AX OUT_AL OUT_AX*/
&vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
/* CALL JMP JMP JMP*/
&store_op, &branch_op, &vector_jmp_far_op, &branch_op,
/* IN AL IN AX OUT_AL OUT_AX*/
&vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
/* REPNE REPE*/
/*f0*/ INVALID, INVALID, INVALID, INVALID,
/* HLT CMC*/
&vector_alux1_op, &vector_alu2_op, INVALID, INVALID,
/* CLC STC CLI STI*/
&vector_alu1_op, &vector_alu1_op, &vector_cli_sti_op, &vector_cli_sti_op,
/* CLD STD INCDEC*/
&vector_alu1_op, &vector_alu1_op, &alux_store_op, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_mod3[256] = {
// clang-format off
/* ADD ADD ADD ADD*/
/*00*/ &alux_op, &alu_op, &alux_op, &alu_op,
/* ADD ADD PUSH ES POP ES*/
&alux_op, &alu_op, &push_seg_op, &vector_mov_seg_mem_op,
/* OR OR OR OR*/
&alux_op, &alu_op, &alux_op, &alu_op,
/* OR OR PUSH CS */
&alux_op, &alu_op, &push_seg_op, INVALID,
/* ADC ADC ADC ADC*/
/*10*/ &vector_alux1_op, &vector_alu1_op, &vector_alux1_op, &vector_alu1_op,
/* ADC ADC PUSH SS POP SS*/
&vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
/* SBB SBB SBB SBB*/
&vector_alux1_op, &vector_alu1_op, &vector_alux1_op, &vector_alu1_op,
/* SBB SBB PUSH DS POP DS*/
&vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
/* AND AND AND AND*/
/*20*/ &alux_op, &alu_op, &alux_op, &alu_op,
/* AND AND DAA*/
&alux_op, &alu_op, INVALID, &vector_alux1_op,
/* SUB SUB SUB SUB*/
&alux_op, &alu_op, &alux_op, &alu_op,
/* SUB SUB DAS*/
&alux_op, &alu_op, INVALID, &vector_alux1_op,
/* XOR XOR XOR XOR*/
/*30*/ &alux_op, &alu_op, &alux_op, &alu_op,
/* XOR XOR AAA*/
&alux_op, &alu_op, INVALID, &vector_alux6_op,
/* CMP CMP CMP CMP*/
&alux_op, &alu_op, &alux_op, &alu_op,
/* CMP CMP AAS*/
&alux_op, &alu_op, INVALID, &vector_alux6_op,
/* INC EAX INC ECX INC EDX INC EBX*/
/*40*/ &alu_op, &alu_op, &alu_op, &alu_op,
/* INC ESP INC EBP INC ESI INC EDI*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* DEC EAX DEC ECX DEC EDX DEC EBX*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* DEC ESP DEC EBP DEC ESI DEC EDI*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
/*50*/ &store_op, &store_op, &store_op, &store_op,
/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
&store_op, &store_op, &store_op, &store_op,
/* POP EAX POP ECX POP EDX POP EBX*/
&pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
/* POP ESP POP EBP POP ESI POP EDI*/
&pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
/* PUSHA POPA BOUND ARPL*/
/*60*/ &vector_pusha_op, &vector_popa_op, &vector_bound_op, &vector_arpl_op,
INVALID, INVALID, INVALID, INVALID,
/* PUSH imm IMUL PUSH imm IMUL*/
&push_imm_op, &vector_mul_op, &push_imm_op, &vector_mul_op,
/* INSB INSW OUTSB OUTSW*/
&vector_ins_op, &vector_ins_op, &vector_outs_op, &vector_outs_op,
/* Jxx*/
/*70*/ &branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
/*80*/ INVALID, INVALID, INVALID, INVALID,
/* TEST TEST XCHG XCHG*/
&vector_alu1_op, &vector_alu1_op, &vector_alu3_op, &vector_alu3_op,
/* MOV MOV MOV MOV*/
&store_op, &store_op, &load_op, &load_op,
/* MOV from seg LEA MOV to seg POP*/
&mov_reg_seg_op, &store_op, &vector_mov_seg_reg_op, &pop_reg_op,
/* NOP XCHG XCHG XCHG*/
/*90*/ &limm_op, &xchg_op, &xchg_op, &xchg_op,
/* XCHG XCHG XCHG XCHG*/
&xchg_op, &xchg_op, &xchg_op, &xchg_op,
/* CBW CWD CALL far WAIT*/
&vector_alu1_op, &vector_alu1_op, &vector_call_far_op, &limm_op,
/* PUSHF POPF SAHF LAHF*/
&vector_pushf_op, &vector_popf_op, &vector_alux1_op, &vector_alux1_op,
/* MOV MOV MOV MOV*/
/*a0*/ &load_op, &load_op, &store_op, &store_op,
/* MOVSB MOVSW CMPSB CMPSW*/
&movs_op, &movs_op, &vector_cmpsb_op, &vector_cmps_op,
/* TEST TEST STOSB STOSW*/
&test_reg_b_op, &test_reg_op, &stos_op, &stos_op,
/* LODSB LODSW SCASB SCASW*/
&lods_op, &lods_op, &vector_scasb_op, &vector_scas_op,
/* MOV*/
/*b0*/ &limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
/* RET imm RET*/
/*c0*/ INVALID, INVALID, &vector_ret_op, &vector_ret_op,
/* LES LDS MOV MOV*/
&vector_lss_op, &vector_lss_op, &store_op, &store_op,
/* ENTER LEAVE RETF RETF*/
&vector_enter_op, &leave_op, &vector_retf_op, &vector_retf_op,
/* INT3 INT INTO IRET*/
&vector_int_op, &vector_int_op, &vector_int_op, &vector_iret_op,
/*d0*/ INVALID, INVALID, INVALID, INVALID,
/* AAM AAD SETALC XLAT*/
&vector_alux6_op, &vector_alux3_op, &vector_alux1_op, &vector_xlat_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/* LOOPNE LOOPE LOOP JCXZ*/
/*e0*/ &vector_loop_op, &vector_loop_op, &loop_op, &vector_loop_op,
/* IN AL IN AX OUT_AL OUT_AX*/
&vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
/* CALL JMP JMP JMP*/
&store_op, &branch_op, &vector_jmp_far_op, &branch_op,
/* IN AL IN AX OUT_AL OUT_AX*/
&vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
/* REPNE REPE*/
/*f0*/ INVALID, INVALID, INVALID, INVALID,
/* HLT CMC*/
&vector_alux1_op, &vector_alu2_op, INVALID, INVALID,
/* CLC STC CLI STI*/
&vector_alu1_op, &vector_alu1_op, &vector_cli_sti_op, &vector_cli_sti_op,
/* CLD STD INCDEC*/
&vector_alu1_op, &vector_alu1_op, &vector_alux1_op, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_0f[256] = {
// clang-format off
/*00*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
INVALID, &vector_alu6_op, &vector_alu6_op, INVALID,
&vector_invd_op, &vector_wbinvd_op, INVALID, INVALID,
INVALID, &load_op, &vector_femms_op, &load_3dn_op,
/*10*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*20*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
&vector_alu6_op, &vector_alu6_op, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*30*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*40*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*50*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*60*/ &load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
&load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
&load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
INVALID, INVALID, &mload_op, &mload_op,
/*70*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
&load_mmx_op, &load_mmx_op, &load_mmx_op, &vector_emms_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, &mstore_op, &mstore_op,
/*80*/ &branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
/*90*/ &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
&vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
&vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
&vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
/*a0*/ &push_seg_op, &vector_mov_seg_mem_op, &vector_cpuid_op, &vector_load_alu_op,
&vector_alu_store_op, &vector_alu_store_op, INVALID, INVALID,
&push_seg_op, &vector_mov_seg_mem_op, INVALID, &vector_load_alu_op,
&vector_alu_store_op, &vector_alu_store_op, INVALID, &vector_mul_op,
/*b0*/ &vector_cmpxchg_b_op, &vector_cmpxchg_op, &vector_lss_op, &vector_load_alu_op,
&vector_lss_op, &vector_lss_op, &load_alux_op, &load_alu_op,
INVALID, INVALID, &vector_load_alu_op, &vector_load_alu_op,
&vector_bsx_op, &vector_bsx_op, &load_alux_op, &load_alu_op,
/*c0*/ &vector_alux_store_op, &vector_alu_store_op, INVALID, INVALID,
INVALID, INVALID, INVALID, &vector_cmpxchg_op,
&bswap_op, &bswap_op, &bswap_op, &bswap_op,
&bswap_op, &bswap_op, &bswap_op, &bswap_op,
/*d0*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
INVALID, &load_mmx_mul_op, INVALID, INVALID,
&load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
&load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
/*e0*/ &load_mmx_op, &load_mmx_shift_op, &load_mmx_shift_op, INVALID,
INVALID, &pmul_mem_op, INVALID, INVALID,
&load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
&load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
/*f0*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
INVALID, &pmul_mem_op, INVALID, INVALID,
&load_mmx_op, &load_mmx_op, &load_mmx_op, INVALID,
&load_mmx_op, &load_mmx_op, &load_mmx_op, INVALID,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_0f_mod3[256] = {
// clang-format off
/*00*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
INVALID, &vector_alu6_op, &vector_alu6_op, INVALID,
&vector_invd_op, &vector_wbinvd_op, INVALID, INVALID,
INVALID, INVALID, &vector_femms_op, &m3dn_op,
/*10*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*20*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
&vector_alu6_op, &vector_alu6_op, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*30*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*40*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*50*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*60*/ &mmx_op, &mmx_op, &mmx_op, &mmx_op,
&mmx_op, &mmx_op, &mmx_op, &mmx_op,
&mmx_op, &mmx_op, &mmx_op, &mmx_op,
INVALID, INVALID, &mmx_op, &mmx_op,
/*70*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
&mmx_op, &mmx_op, &mmx_op, &vector_emms_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, &mmx_op, &mmx_op,
/*80*/ &branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
/*90*/ &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
&vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
&vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
&vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
/*a0*/ &push_seg_op, &vector_mov_seg_mem_op, &vector_cpuid_op, &vector_alu1_op,
&vector_alu1_op, &vector_alu1_op, INVALID, INVALID,
&push_seg_op, &vector_mov_seg_mem_op, INVALID, &vector_alu1_op,
&vector_alu1_op, &vector_alu1_op, INVALID, &vector_mul_op,
/*b0*/ &vector_cmpxchg_b_op, &vector_cmpxchg_op, &vector_lss_op, &vector_alu1_op,
&vector_lss_op, &vector_lss_op, &alux_op, &alu_op,
INVALID, INVALID, &vector_alu1_op, &vector_alu1_op,
&vector_bsx_op, &vector_bsx_op, &alux_op, &alu_op,
/*c0*/ &vector_alux1_op, &vector_alu1_op, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
&bswap_op, &bswap_op, &bswap_op, &bswap_op,
&bswap_op, &bswap_op, &bswap_op, &bswap_op,
/*d0*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
INVALID, &mmx_mul_op, INVALID, INVALID,
&mmx_op, &mmx_op, INVALID, &mmx_op,
&mmx_op, &mmx_op, INVALID, &mmx_op,
/*e0*/ &mmx_op, &mmx_shift_op, &mmx_shift_op, INVALID,
INVALID, &pmul_op, INVALID, INVALID,
&mmx_op, &mmx_op, INVALID, &mmx_op,
&mmx_op, &mmx_op, INVALID, &mmx_op,
/*f0*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
INVALID, &pmul_op, INVALID, INVALID,
&mmx_op, &mmx_op, &mmx_op, INVALID,
&mmx_op, &mmx_op, &mmx_op, INVALID,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_0f0f[256] = {
// clang-format off
/*00*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, &load_3dn_op, INVALID, INVALID,
/*10*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, &load_3dn_op, INVALID, INVALID,
/*20*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*30*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*40*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*50*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*60*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*70*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*80*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*90*/ &load_3dn_op, INVALID, INVALID, INVALID,
&load_3dn_op, INVALID, &load_3dn_op, &load_3dn_op,
INVALID, INVALID, &load_3dn_op, INVALID,
INVALID, INVALID, &load_3dn_op, INVALID,
/*a0*/ &load_3dn_op, INVALID, INVALID, INVALID,
&load_3dn_op, INVALID, &load_mmx_mul_op, &load_mmx_mul_op,
INVALID, INVALID, &load_3dn_op, INVALID,
INVALID, INVALID, &load_3dn_op, INVALID,
/*b0*/ &load_3dn_op, INVALID, INVALID, INVALID,
&load_mmx_mul_op, INVALID, &load_mmx_mul_op, &load_mmx_mul_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, &load_mmx_op,
/*c0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*d0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*e0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*f0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_0f0f_mod3[256] = {
// clang-format off
/*00*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, &m3dn_op, INVALID, INVALID,
/*10*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, &m3dn_op, INVALID, INVALID,
/*20*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*30*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*40*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*50*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*60*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*70*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*80*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*90*/ &m3dn_op, INVALID, INVALID, INVALID,
&m3dn_op, INVALID, &m3dn_op, &m3dn_op,
INVALID, INVALID, &m3dn_op, INVALID,
INVALID, INVALID, &m3dn_op, INVALID,
/*a0*/ &m3dn_op, INVALID, INVALID, INVALID,
&m3dn_op, INVALID, &mmx_mul_op, &mmx_mul_op,
INVALID, INVALID, &m3dn_op, INVALID,
INVALID, INVALID, &m3dn_op, INVALID,
/*b0*/ &m3dn_op, INVALID, INVALID, INVALID,
&mmx_mul_op, INVALID, &mmx_mul_op, &mmx_mul_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, &mmx_op,
/*c0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*d0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*e0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*f0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_shift[8] = {
// clang-format off
&vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op,
&vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_shift_b[8] = {
// clang-format off
&vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op,
&vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_shift_mod3[8] = {
// clang-format off
&vector_alu1_op, &vector_alu1_op, &vector_alu1_op, &vector_alu1_op,
&alu_op, &alu_op, &alu_op, &alu_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_shift_b_mod3[8] = {
// clang-format off
&vector_alux1_op, &vector_alux1_op, &vector_alux1_op, &vector_alux1_op,
&alux_op, &alux_op, &alux_op, &alux_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_80[8] = {
// clang-format off
&alux_store_op, &alux_store_op, &vector_alux_store_op, &vector_alux_store_op,
&alux_store_op, &alux_store_op, &alux_store_op, &alux_store_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_80_mod3[8] = {
// clang-format off
&alux_op, &alux_op, &alux_store_op, &alux_store_op,
&alux_op, &alux_op, &alux_op, &alux_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_8x[8] = {
// clang-format off
&alu_store_op, &alu_store_op, &vector_alu_store_op, &vector_alu_store_op,
&alu_store_op, &alu_store_op, &alu_store_op, &alu_store_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_8x_mod3[8] = {
// clang-format off
&alu_op, &alu_op, &alu_store_op, &alu_store_op,
&alu_op, &alu_op, &alu_op, &alu_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_f6[8] = {
// clang-format off
/* TST NOT NEG*/
&test_mem_imm_b_op, INVALID, &vector_alux_store_op, &vector_alux_store_op,
/* MUL IMUL DIV IDIV*/
&vector_mul_mem_op, &vector_mul_mem_op, &vector_div16_mem_op, &vector_div16_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_f6_mod3[8] = {
// clang-format off
/* TST NOT NEG*/
&test_reg_b_op, INVALID, &alux_op, &alux_op,
/* MUL IMUL DIV IDIV*/
&vector_mul_op, &vector_mul_op, &vector_div16_op, &vector_div16_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_f7[8] = {
// clang-format off
/* TST NOT NEG*/
&test_mem_imm_op, INVALID, &vector_alu_store_op, &vector_alu_store_op,
/* MUL IMUL DIV IDIV*/
&vector_mul64_mem_op, &vector_mul64_mem_op, &vector_div32_mem_op, &vector_div32_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_f7_mod3[8] = {
// clang-format off
/* TST NOT NEG*/
&test_reg_op, INVALID, &alu_op, &alu_op,
/* MUL IMUL DIV IDIV*/
&vector_mul64_op, &vector_mul64_op, &vector_div32_op, &vector_div32_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_ff[8] = {
// clang-format off
/* INC DEC CALL CALL far*/
&alu_store_op, &alu_store_op, &store_op, &vector_call_far_op,
/* JMP JMP far PUSH*/
&branch_op, &vector_jmp_far_op, &push_mem_op, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_ff_mod3[8] = {
// clang-format off
/* INC DEC CALL CALL far*/
&vector_alu1_op, &vector_alu1_op, &store_op, &vector_call_far_op,
/* JMP JMP far PUSH*/
&branch_op, &vector_jmp_far_op, &vector_push_mem_op, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_d8[8] = {
// clang-format off
/* FADDs FMULs FCOMs FCOMPs*/
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
/* FSUBs FSUBRs FDIVs FDIVRs*/
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_d8_mod3[8] = {
// clang-format off
/* FADD FMUL FCOM FCOMP*/
&float_op, &float_op, &float_op, &float_op,
/* FSUB FSUBR FDIV FDIVR*/
&float_op, &float_op, &fdiv_op, &fdiv_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_d9[8] = {
// clang-format off
/* FLDs FSTs FSTPs*/
&load_float_op, INVALID, &fstore_op, &fstore_op,
/* FLDENV FLDCW FSTENV FSTCW*/
&vector_float_l_op, &vector_fldcw_op, &vector_float_l_op, &vector_float_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_d9_mod3[64] = {
// clang-format off
/*FLD*/
&float_op, &float_op, &float_op, &float_op,
&float_op, &float_op, &float_op, &float_op,
/*FXCH*/
&float_op, &float_op, &float_op, &float_op,
&float_op, &float_op, &float_op, &float_op,
/*FNOP*/
&float_op, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*FSTP*/
&float_op, &float_op, &float_op, &float_op,
&float_op, &float_op, &float_op, &float_op,
/* opFCHS opFABS*/
&float_op, &float_op, INVALID, INVALID,
/* opFTST opFXAM*/
&float_op, &float_op, INVALID, INVALID,
/* opFLD1 opFLDL2T opFLDL2E opFLDPI*/
&float_op, &float_op, &float_op, &float_op,
/* opFLDEG2 opFLDLN2 opFLDZ*/
&float_op, &float_op, &float_op, INVALID,
/* opF2XM1 opFYL2X opFPTAN opFPATAN*/
&fsin_op, &fsin_op, &fsin_op, &fsin_op,
/* opFDECSTP opFINCSTP,*/
INVALID, INVALID, &float_op, &float_op,
/* opFPREM opFSQRT opFSINCOS*/
&fdiv_op, INVALID, &fsqrt_op, &fsin_op,
/* opFRNDINT opFSCALE opFSIN opFCOS*/
&float_op, &fdiv_op, &fsin_op, &fsin_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_da[8] = {
// clang-format off
/* FIADDl FIMULl FICOMl FICOMPl*/
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
/* FISUBl FISUBRl FIDIVl FIDIVRl*/
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_da_mod3[8] = {
// clang-format off
INVALID, INVALID, INVALID, INVALID,
/* FCOMPP*/
INVALID, &float_op, INVALID, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_db[8] = {
// clang-format off
/* FLDil FSTil FSTPil*/
&load_float_op, INVALID, &fstore_op, &fstore_op,
/* FLDe FSTPe*/
INVALID, &vector_flde_op, INVALID, &vector_fste_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_db_mod3[64] = {
// clang-format off
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/* opFNOP opFCLEX opFINIT*/
INVALID, &float_op, &float_op, &float_op,
/* opFNOP opFNOP*/
&float_op, &float_op, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_dc[8] = {
// clang-format off
/* FADDd FMULd FCOMd FCOMPd*/
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
/* FSUBd FSUBRd FDIVd FDIVRd*/
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_dc_mod3[8] = {
// clang-format off
/* opFADDr opFMULr*/
&float_op, &float_op, INVALID, INVALID,
/* opFSUBRr opFSUBr opFDIVRr opFDIVr*/
&float_op, &float_op, &fdiv_op, &fdiv_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_dd[8] = {
// clang-format off
/* FLDd FSTd FSTPd*/
&load_float_op, INVALID, &fstore_op, &fstore_op,
/* FRSTOR FSAVE FSTSW*/
&vector_float_l_op, INVALID, &vector_float_l_op, &vector_float_l_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_dd_mod3[8] = {
// clang-format off
/* FFFREE FST FSTP*/
&float_op, INVALID, &float_op, &float_op,
/* FUCOM FUCOMP*/
&float_op, &float_op, INVALID, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_de[8] = {
// clang-format off
/* FIADDw FIMULw FICOMw FICOMPw*/
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
/* FISUBw FISUBRw FIDIVw FIDIVRw*/
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_de_mod3[8] = {
// clang-format off
/* FADDP FMULP FCOMPP*/
&float_op, &float_op, INVALID, &float_op,
/* FSUBP FSUBRP FDIVP FDIVRP*/
&float_op, &float_op, &fdiv_op, &fdiv_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_df[8] = {
// clang-format off
/* FILDiw FISTiw FISTPiw*/
&load_float_op, INVALID, &fstore_op, &fstore_op,
/* FILDiq FBSTP FISTPiq*/
INVALID, &load_float_op, &vector_float_l_op, &fstore_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k6_df_mod3[8] = {
// clang-format off
INVALID, INVALID, INVALID, INVALID,
/* FSTSW AX*/
&float_op, INVALID, INVALID, INVALID
// clang-format on
};
static uint8_t last_prefix;
static int prefixes;
static int decode_timestamp;
static int last_complete_timestamp;
typedef struct k6_unit_t {
uint32_t uop_mask;
int first_available_cycle;
} k6_unit_t;
static int nr_units;
static k6_unit_t *units;
/*K6 has dedicated MMX unit*/
static k6_unit_t k6_units[] = {
{ .uop_mask = (1 << UOP_ALU) | (1 << UOP_ALUX) }, /*Integer X*/
{ .uop_mask = (1 << UOP_ALU) }, /*Integer Y*/
{ .uop_mask = (1 << UOP_MEU) | (1 << UOP_MEU_SHIFT) | (1 << UOP_MEU_MUL) }, /*Multimedia*/
{ .uop_mask = (1 << UOP_FLOAT) }, /*Floating point*/
{ .uop_mask = (1 << UOP_LOAD) | (1 << UOP_FLOAD) | (1 << UOP_MLOAD) }, /*Load*/
{ .uop_mask = (1 << UOP_STORE) | (1 << UOP_FSTORE) | (1 << UOP_MSTORE) }, /*Store*/
{ .uop_mask = (1 << UOP_BRANCH) } /*Branch*/
};
#define NR_K6_UNITS (sizeof(k6_units) / sizeof(k6_unit_t))
/*K6-2 and later integrate MMX into ALU X & Y, sharing multiplier, shifter and
3DNow ALU between two execution units*/
static k6_unit_t k6_2_units[] = {
{ .uop_mask = (1 << UOP_ALU) | (1 << UOP_ALUX) | (1 << UOP_MEU) | /*Integer X*/
(1 << UOP_MEU_SHIFT) | (1 << UOP_MEU_MUL) | (1 << UOP_MEU_3DN) },
{ .uop_mask = (1 << UOP_ALU) | (1 << UOP_MEU) | /*Integer Y*/
(1 << UOP_MEU_SHIFT) | (1 << UOP_MEU_MUL) | (1 << UOP_MEU_3DN) },
{ .uop_mask = (1 << UOP_FLOAT) }, /*Floating point*/
{ .uop_mask = (1 << UOP_LOAD) | (1 << UOP_FLOAD) | (1 << UOP_MLOAD) }, /*Load*/
{ .uop_mask = (1 << UOP_STORE) | (1 << UOP_FSTORE) | (1 << UOP_MSTORE) }, /*Store*/
{ .uop_mask = (1 << UOP_BRANCH) } /*Branch*/
};
#define NR_K6_2_UNITS (sizeof(k6_2_units) / sizeof(k6_unit_t))
/*First available cycles of shared execution units. Each of these can be submitted
to by ALU X and Y*/
static int mul_first_available_cycle;
static int shift_first_available_cycle;
static int m3dnow_first_available_cycle;
static int
uop_run(const risc86_uop_t *uop, int decode_time)
{
k6_unit_t *best_unit = NULL;
int best_start_cycle = 99999;
/*UOP_LIMM does not require execution*/
if (uop->type == UOP_LIMM)
return decode_time;
/*Handle shared units on K6-2 and later*/
if (units == k6_2_units) {
if (uop->type == UOP_MEU_MUL && decode_time < mul_first_available_cycle)
decode_time = mul_first_available_cycle;
else if (uop->type == UOP_MEU_SHIFT && decode_time < mul_first_available_cycle)
decode_time = shift_first_available_cycle;
else if (uop->type == UOP_MEU_3DN && decode_time < mul_first_available_cycle)
decode_time = m3dnow_first_available_cycle;
}
/*Find execution unit for this uOP*/
for (int c = 0; c < nr_units; c++) {
if (units[c].uop_mask & (1 << uop->type)) {
if (units[c].first_available_cycle < best_start_cycle) {
best_unit = &units[c];
best_start_cycle = units[c].first_available_cycle;
}
}
}
if (!best_unit)
fatal("uop_run: can not find execution unit\n");
if (best_start_cycle < decode_time)
best_start_cycle = decode_time;
best_unit->first_available_cycle = best_start_cycle + uop->throughput;
if (units == k6_2_units) {
if (uop->type == UOP_MEU_MUL)
mul_first_available_cycle = best_start_cycle + uop->throughput;
else if (uop->type == UOP_MEU_SHIFT)
shift_first_available_cycle = best_start_cycle + uop->throughput;
else if (uop->type == UOP_MEU_3DN)
m3dnow_first_available_cycle = best_start_cycle + uop->throughput;
}
return best_start_cycle + uop->throughput;
}
/*The K6 decoder can decode, per clock :
- 1 or 2 'short' instructions, each up to 2 uOPs and 7 bytes long
- 1 'long' instruction, up to 4 uOPs
- 1 'vector' instruction, up to 4 uOPs per cycle, plus (I think) 1 cycle startup delay)
*/
static struct {
int nr_uops;
const risc86_uop_t *uops[4];
/*Earliest time a uop can start. If the timestamp is -1, then the uop is
part of a dependency chain and the start time is the completion time of
the previous uop*/
int earliest_start[4];
} decode_buffer;
#define NR_OPQUADS 6
/*Timestamps of when the last six opquads completed. The K6 scheduler retires
opquads in order, so this is needed to determine when the next can be scheduled*/
static int opquad_completion_timestamp[NR_OPQUADS];
static int next_opquad = 0;
#define NR_REGS 8
/*Timestamp of when last operation on an integer register completed*/
static int reg_available_timestamp[NR_REGS];
/*Timestamp of when last operation on an FPU register completed*/
static int fpu_st_timestamp[8];
/*Completion time of the last uop to be processed. Used to calculate timing of
dependent uop chains*/
static int last_uop_timestamp = 0;
void
decode_flush_k6(void)
{
int uop_timestamp = 0;
/*Decoded opquad can not be submitted if there are no free spaces in the
opquad buffer*/
if (decode_timestamp < opquad_completion_timestamp[next_opquad])
decode_timestamp = opquad_completion_timestamp[next_opquad];
/*Ensure that uops can not be submitted before they have been decoded*/
if (decode_timestamp > last_uop_timestamp)
last_uop_timestamp = decode_timestamp;
/*Submit uops to execution units, and determine the latest completion time*/
for (int c = 0; c < decode_buffer.nr_uops; c++) {
int start_timestamp;
if (decode_buffer.earliest_start[c] == -1)
start_timestamp = last_uop_timestamp;
else
start_timestamp = decode_buffer.earliest_start[c];
last_uop_timestamp = uop_run(decode_buffer.uops[c], start_timestamp);
if (last_uop_timestamp > uop_timestamp)
uop_timestamp = last_uop_timestamp;
}
/*Calculate opquad completion time. Since opquads complete in order, it
must be after the last completion.*/
if (uop_timestamp <= last_complete_timestamp)
last_complete_timestamp = last_complete_timestamp + 1;
else
last_complete_timestamp = uop_timestamp;
/*Advance to next opquad in buffer*/
opquad_completion_timestamp[next_opquad] = last_complete_timestamp;
next_opquad++;
if (next_opquad == NR_OPQUADS)
next_opquad = 0;
decode_timestamp++;
decode_buffer.nr_uops = 0;
}
/*The instruction is only of interest here if it's longer than 7 bytes, as that's the
limit on K6 short decoding*/
static int
codegen_timing_instr_length(uint64_t deps, uint32_t fetchdat, int op_32)
{
int len = prefixes + 1; /*Opcode*/
if (deps & MODRM) {
len++; /*ModR/M*/
if (deps & HAS_IMM8)
len++;
if (deps & HAS_IMM1632)
len += (op_32 & 0x100) ? 4 : 2;
if (op_32 & 0x200) {
if ((fetchdat & 7) == 4 && (fetchdat & 0xc0) != 0xc0) {
/* Has SIB*/
len++;
if ((fetchdat & 0xc0) == 0x40)
len++;
else if ((fetchdat & 0xc0) == 0x80)
len += 4;
else if ((fetchdat & 0x700) == 0x500)
len += 4;
} else {
if ((fetchdat & 0xc0) == 0x40)
len++;
else if ((fetchdat & 0xc0) == 0x80)
len += 4;
else if ((fetchdat & 0xc7) == 0x05)
len += 4;
}
} else {
if ((fetchdat & 0xc0) == 0x40)
len++;
else if ((fetchdat & 0xc0) == 0x80)
len += 2;
else if ((fetchdat & 0xc7) == 0x06)
len += 2;
}
}
return len;
}
static void
decode_instruction(const risc86_instruction_t *ins, uint64_t deps, uint32_t fetchdat, int op_32, int bit8)
{
uint32_t regmask_required;
uint32_t regmask_modified;
int c;
int d;
int earliest_start = 0;
decode_type_t decode_type = ins->decode_type;
int instr_length = codegen_timing_instr_length(deps, fetchdat, op_32);
/*Generate input register mask, and determine the earliest time this
instruction can start. This is not accurate, as this is calculated per
x86 instruction when it should be handled per uop*/
regmask_required = get_dstdep_mask(deps, fetchdat, bit8);
regmask_required |= get_addr_regmask(deps, fetchdat, op_32);
for (c = 0; c < 8; c++) {
if (regmask_required & (1 << c)) {
if (reg_available_timestamp[c] > decode_timestamp)
earliest_start = reg_available_timestamp[c];
}
}
if ((deps & FPU_RW_ST0) && fpu_st_timestamp[0] > decode_timestamp)
earliest_start = fpu_st_timestamp[0];
if ((deps & FPU_RW_ST1) && fpu_st_timestamp[1] > decode_timestamp)
earliest_start = fpu_st_timestamp[1];
if (deps & FPU_RW_STREG) {
int reg = fetchdat & 7;
if (fpu_st_timestamp[reg] > decode_timestamp)
earliest_start = fpu_st_timestamp[reg];
}
/*Short decoders are limited to 7 bytes*/
if (decode_type == DECODE_SHORT && instr_length > 7)
decode_type = DECODE_LONG;
/*Long decoder is limited to 11 bytes*/
else if (instr_length > 11)
decode_type = DECODE_VECTOR;
switch (decode_type) {
case DECODE_SHORT:
if (decode_buffer.nr_uops) {
decode_buffer.uops[decode_buffer.nr_uops] = &ins->uop[0];
decode_buffer.earliest_start[decode_buffer.nr_uops] = earliest_start;
if (ins->nr_uops > 1) {
decode_buffer.uops[decode_buffer.nr_uops + 1] = &ins->uop[1];
decode_buffer.earliest_start[decode_buffer.nr_uops + 1] = -1;
}
decode_buffer.nr_uops += ins->nr_uops;
decode_flush_k6();
} else {
decode_buffer.nr_uops = ins->nr_uops;
decode_buffer.uops[0] = &ins->uop[0];
decode_buffer.earliest_start[0] = earliest_start;
if (ins->nr_uops > 1) {
decode_buffer.uops[1] = &ins->uop[1];
decode_buffer.earliest_start[1] = -1;
}
}
break;
case DECODE_LONG:
if (decode_buffer.nr_uops)
decode_flush_k6();
decode_buffer.nr_uops = ins->nr_uops;
for (c = 0; c < ins->nr_uops; c++) {
decode_buffer.uops[c] = &ins->uop[c];
if (c == 0)
decode_buffer.earliest_start[c] = earliest_start;
else
decode_buffer.earliest_start[c] = -1;
}
decode_flush_k6();
break;
case DECODE_VECTOR:
if (decode_buffer.nr_uops)
decode_flush_k6();
decode_timestamp++;
d = 0;
for (c = 0; c < ins->nr_uops; c++) {
decode_buffer.uops[d] = &ins->uop[c];
if (c == 0)
decode_buffer.earliest_start[d] = earliest_start;
else
decode_buffer.earliest_start[d] = -1;
d++;
if (d == 4) {
d = 0;
decode_buffer.nr_uops = 4;
decode_flush_k6();
}
}
if (d) {
decode_buffer.nr_uops = d;
decode_flush_k6();
}
break;
}
/*Update write timestamps for any output registers*/
regmask_modified = get_dstdep_mask(deps, fetchdat, bit8);
for (c = 0; c < 8; c++) {
if (regmask_modified & (1 << c))
reg_available_timestamp[c] = last_complete_timestamp;
}
if (deps & FPU_POP) {
for (c = 0; c < 7; c++)
fpu_st_timestamp[c] = fpu_st_timestamp[c + 1];
fpu_st_timestamp[7] = 0;
}
if (deps & FPU_POP2) {
for (c = 0; c < 6; c++)
fpu_st_timestamp[c] = fpu_st_timestamp[c + 2];
fpu_st_timestamp[6] = fpu_st_timestamp[7] = 0;
}
if (deps & FPU_PUSH) {
for (c = 0; c < 7; c++)
fpu_st_timestamp[c + 1] = fpu_st_timestamp[c];
fpu_st_timestamp[0] = 0;
}
if (deps & FPU_WRITE_ST0)
fpu_st_timestamp[0] = last_complete_timestamp;
if (deps & FPU_WRITE_ST1)
fpu_st_timestamp[1] = last_complete_timestamp;
if (deps & FPU_WRITE_STREG) {
int reg = fetchdat & 7;
if (deps & FPU_POP)
reg--;
if (reg >= 0 && !(reg == 0 && (deps & FPU_WRITE_ST0)) && !(reg == 1 && (deps & FPU_WRITE_ST1)))
fpu_st_timestamp[reg] = last_complete_timestamp;
}
}
void
codegen_timing_k6_block_start(void)
{
int c;
for (c = 0; c < nr_units; c++)
units[c].first_available_cycle = 0;
mul_first_available_cycle = 0;
shift_first_available_cycle = 0;
m3dnow_first_available_cycle = 0;
decode_timestamp = 0;
last_complete_timestamp = 0;
for (c = 0; c < NR_OPQUADS; c++)
opquad_completion_timestamp[c] = 0;
next_opquad = 0;
for (c = 0; c < NR_REGS; c++)
reg_available_timestamp[c] = 0;
for (c = 0; c < 8; c++)
fpu_st_timestamp[c] = 0;
}
void
codegen_timing_k6_start(void)
{
if (cpu_s->cpu_type == CPU_K6) {
units = k6_units;
nr_units = NR_K6_UNITS;
} else {
units = k6_2_units;
nr_units = NR_K6_2_UNITS;
}
last_prefix = 0;
prefixes = 0;
}
void
codegen_timing_k6_prefix(uint8_t prefix, uint32_t fetchdat)
{
if (prefix != 0x0f)
decode_timestamp++;
last_prefix = prefix;
prefixes++;
}
void
codegen_timing_k6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc)
{
const risc86_instruction_t **ins_table;
const uint64_t *deps;
int mod3 = ((fetchdat & 0xc0) == 0xc0);
int old_last_complete_timestamp = last_complete_timestamp;
int bit8 = !(opcode & 1);
switch (last_prefix) {
case 0x0f:
if (opcode == 0x0f) {
/*3DNow has the actual opcode after ModR/M, SIB and any offset*/
uint32_t opcode_pc = op_pc + 1; /*Byte after ModR/M*/
uint8_t modrm = fetchdat & 0xff;
uint8_t sib = (fetchdat >> 8) & 0xff;
if ((modrm & 0xc0) != 0xc0) {
if (op_32 & 0x200) {
if ((modrm & 7) == 4) {
/* Has SIB*/
opcode_pc++;
if ((modrm & 0xc0) == 0x40)
opcode_pc++;
else if ((modrm & 0xc0) == 0x80)
opcode_pc += 4;
else if ((sib & 0x07) == 0x05)
opcode_pc += 4;
} else {
if ((modrm & 0xc0) == 0x40)
opcode_pc++;
else if ((modrm & 0xc0) == 0x80)
opcode_pc += 4;
else if ((modrm & 0xc7) == 0x05)
opcode_pc += 4;
}
} else {
if ((modrm & 0xc0) == 0x40)
opcode_pc++;
else if ((modrm & 0xc0) == 0x80)
opcode_pc += 2;
else if ((modrm & 0xc7) == 0x06)
opcode_pc += 2;
}
}
opcode = fastreadb(cs + opcode_pc);
ins_table = mod3 ? opcode_timings_k6_0f0f_mod3 : opcode_timings_k6_0f0f;
deps = mod3 ? opcode_deps_0f0f_mod3 : opcode_deps_0f0f;
} else {
ins_table = mod3 ? opcode_timings_k6_0f_mod3 : opcode_timings_k6_0f;
deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
}
break;
case 0xd8:
ins_table = mod3 ? opcode_timings_k6_d8_mod3 : opcode_timings_k6_d8;
deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
opcode = (opcode >> 3) & 7;
break;
case 0xd9:
ins_table = mod3 ? opcode_timings_k6_d9_mod3 : opcode_timings_k6_d9;
deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
break;
case 0xda:
ins_table = mod3 ? opcode_timings_k6_da_mod3 : opcode_timings_k6_da;
deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
opcode = (opcode >> 3) & 7;
break;
case 0xdb:
ins_table = mod3 ? opcode_timings_k6_db_mod3 : opcode_timings_k6_db;
deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
break;
case 0xdc:
ins_table = mod3 ? opcode_timings_k6_dc_mod3 : opcode_timings_k6_dc;
deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
opcode = (opcode >> 3) & 7;
break;
case 0xdd:
ins_table = mod3 ? opcode_timings_k6_dd_mod3 : opcode_timings_k6_dd;
deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
opcode = (opcode >> 3) & 7;
break;
case 0xde:
ins_table = mod3 ? opcode_timings_k6_de_mod3 : opcode_timings_k6_de;
deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
opcode = (opcode >> 3) & 7;
break;
case 0xdf:
ins_table = mod3 ? opcode_timings_k6_df_mod3 : opcode_timings_k6_df;
deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
opcode = (opcode >> 3) & 7;
break;
default:
switch (opcode) {
case 0x80:
case 0x82:
ins_table = mod3 ? opcode_timings_k6_80_mod3 : opcode_timings_k6_80;
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
opcode = (fetchdat >> 3) & 7;
break;
case 0x81:
case 0x83:
ins_table = mod3 ? opcode_timings_k6_8x_mod3 : opcode_timings_k6_8x;
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
opcode = (fetchdat >> 3) & 7;
break;
case 0xc0:
case 0xd0:
case 0xd2:
ins_table = mod3 ? opcode_timings_k6_shift_b_mod3 : opcode_timings_k6_shift_b;
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
opcode = (fetchdat >> 3) & 7;
break;
case 0xc1:
case 0xd1:
case 0xd3:
ins_table = mod3 ? opcode_timings_k6_shift_mod3 : opcode_timings_k6_shift;
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
opcode = (fetchdat >> 3) & 7;
break;
case 0xf6:
ins_table = mod3 ? opcode_timings_k6_f6_mod3 : opcode_timings_k6_f6;
deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
opcode = (fetchdat >> 3) & 7;
break;
case 0xf7:
ins_table = mod3 ? opcode_timings_k6_f7_mod3 : opcode_timings_k6_f7;
deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
opcode = (fetchdat >> 3) & 7;
break;
case 0xff:
ins_table = mod3 ? opcode_timings_k6_ff_mod3 : opcode_timings_k6_ff;
deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
opcode = (fetchdat >> 3) & 7;
break;
default:
ins_table = mod3 ? opcode_timings_k6_mod3 : opcode_timings_k6;
deps = mod3 ? opcode_deps_mod3 : opcode_deps;
break;
}
}
if (ins_table[opcode])
decode_instruction(ins_table[opcode], deps[opcode], fetchdat, op_32, bit8);
else
decode_instruction(&vector_alu1_op, 0, fetchdat, op_32, bit8);
codegen_block_cycles += (last_complete_timestamp - old_last_complete_timestamp);
}
void
codegen_timing_k6_block_end(void)
{
if (decode_buffer.nr_uops) {
int old_last_complete_timestamp = last_complete_timestamp;
decode_flush_k6();
codegen_block_cycles += (last_complete_timestamp - old_last_complete_timestamp);
}
}
int
codegen_timing_k6_jump_cycles(void)
{
if (decode_buffer.nr_uops)
return 1;
return 0;
}
codegen_timing_t codegen_timing_k6 = {
codegen_timing_k6_start,
codegen_timing_k6_prefix,
codegen_timing_k6_opcode,
codegen_timing_k6_block_start,
codegen_timing_k6_block_end,
codegen_timing_k6_jump_cycles
};
``` | /content/code_sandbox/src/cpu/codegen_timing_k6.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 30,257 |
```objective-c
see COPYING for more details
*/
static int
opESCAPE_d8_a16(uint32_t fetchdat)
{
return x86_2386_opcodes_d8_a16[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_d8_a32(uint32_t fetchdat)
{
return x86_2386_opcodes_d8_a32[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_d9_a16(uint32_t fetchdat)
{
return x86_2386_opcodes_d9_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_d9_a32(uint32_t fetchdat)
{
return x86_2386_opcodes_d9_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_da_a16(uint32_t fetchdat)
{
return x86_2386_opcodes_da_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_da_a32(uint32_t fetchdat)
{
return x86_2386_opcodes_da_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_db_a16(uint32_t fetchdat)
{
return x86_2386_opcodes_db_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_db_a32(uint32_t fetchdat)
{
return x86_2386_opcodes_db_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_dc_a16(uint32_t fetchdat)
{
return x86_2386_opcodes_dc_a16[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_dc_a32(uint32_t fetchdat)
{
return x86_2386_opcodes_dc_a32[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_dd_a16(uint32_t fetchdat)
{
return x86_2386_opcodes_dd_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_dd_a32(uint32_t fetchdat)
{
return x86_2386_opcodes_dd_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_de_a16(uint32_t fetchdat)
{
return x86_2386_opcodes_de_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_de_a32(uint32_t fetchdat)
{
return x86_2386_opcodes_de_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_df_a16(uint32_t fetchdat)
{
return x86_2386_opcodes_df_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_df_a32(uint32_t fetchdat)
{
return x86_2386_opcodes_df_a32[fetchdat & 0xff](fetchdat);
}
static int
opWAIT(uint32_t fetchdat)
{
if ((cr0 & 0xa) == 0xa) {
x86_int(7);
return 1;
}
#if 0
if (!cpu_use_dynarec && fpu_softfloat) {
#endif
if (fpu_softfloat) {
if (fpu_state.swd & FPU_SW_Summary) {
if (cr0 & 0x20) {
x86_int(16);
return 1;
}
}
}
CLOCK_CYCLES(4);
return 0;
}
``` | /content/code_sandbox/src/cpu/x86_ops_fpu_2386.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 814 |
```objective-c
static int
opIMUL_w_iw_a16(uint32_t fetchdat)
{
int32_t templ;
int16_t tempw;
int16_t tempw2;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
tempw = geteaw();
if (cpu_state.abrt)
return 1;
tempw2 = getword();
if (cpu_state.abrt)
return 1;
templ = ((int) tempw) * ((int) tempw2);
flags_rebuild();
if ((templ >> 15) != 0 && (templ >> 15) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
cpu_state.regs[cpu_reg].w = templ & 0xffff;
CLOCK_CYCLES((cpu_mod == 3) ? 14 : 17);
PREFETCH_RUN((cpu_mod == 3) ? 14 : 17, 4, rmdat, 1, 0, 0, 0, 0);
return 0;
}
static int
opIMUL_w_iw_a32(uint32_t fetchdat)
{
int32_t templ;
int16_t tempw;
int16_t tempw2;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
tempw = geteaw();
if (cpu_state.abrt)
return 1;
tempw2 = getword();
if (cpu_state.abrt)
return 1;
templ = ((int) tempw) * ((int) tempw2);
flags_rebuild();
if ((templ >> 15) != 0 && (templ >> 15) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
cpu_state.regs[cpu_reg].w = templ & 0xffff;
CLOCK_CYCLES((cpu_mod == 3) ? 14 : 17);
PREFETCH_RUN((cpu_mod == 3) ? 14 : 17, 4, rmdat, 1, 0, 0, 0, 1);
return 0;
}
static int
opIMUL_l_il_a16(uint32_t fetchdat)
{
int64_t temp64;
int32_t templ;
int32_t templ2;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
templ = geteal();
if (cpu_state.abrt)
return 1;
templ2 = getlong();
if (cpu_state.abrt)
return 1;
temp64 = ((int64_t) templ) * ((int64_t) templ2);
flags_rebuild();
if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
cpu_state.regs[cpu_reg].l = temp64 & 0xffffffff;
CLOCK_CYCLES(25);
PREFETCH_RUN(25, 6, rmdat, 0, 1, 0, 0, 0);
return 0;
}
static int
opIMUL_l_il_a32(uint32_t fetchdat)
{
int64_t temp64;
int32_t templ;
int32_t templ2;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
templ = geteal();
if (cpu_state.abrt)
return 1;
templ2 = getlong();
if (cpu_state.abrt)
return 1;
temp64 = ((int64_t) templ) * ((int64_t) templ2);
flags_rebuild();
if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
cpu_state.regs[cpu_reg].l = temp64 & 0xffffffff;
CLOCK_CYCLES(25);
PREFETCH_RUN(25, 6, rmdat, 0, 1, 0, 0, 1);
return 0;
}
static int
opIMUL_w_ib_a16(uint32_t fetchdat)
{
int32_t templ;
int16_t tempw;
int16_t tempw2;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
tempw = geteaw();
if (cpu_state.abrt)
return 1;
tempw2 = getbyte();
if (cpu_state.abrt)
return 1;
if (tempw2 & 0x80)
tempw2 |= 0xff00;
templ = ((int) tempw) * ((int) tempw2);
flags_rebuild();
if ((templ >> 15) != 0 && (templ >> 15) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
cpu_state.regs[cpu_reg].w = templ & 0xffff;
CLOCK_CYCLES((cpu_mod == 3) ? 14 : 17);
PREFETCH_RUN((cpu_mod == 3) ? 14 : 17, 3, rmdat, 1, 0, 0, 0, 0);
return 0;
}
static int
opIMUL_w_ib_a32(uint32_t fetchdat)
{
int32_t templ;
int16_t tempw;
int16_t tempw2;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
tempw = geteaw();
if (cpu_state.abrt)
return 1;
tempw2 = getbyte();
if (cpu_state.abrt)
return 1;
if (tempw2 & 0x80)
tempw2 |= 0xff00;
templ = ((int) tempw) * ((int) tempw2);
flags_rebuild();
if ((templ >> 15) != 0 && (templ >> 15) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
cpu_state.regs[cpu_reg].w = templ & 0xffff;
CLOCK_CYCLES((cpu_mod == 3) ? 14 : 17);
PREFETCH_RUN((cpu_mod == 3) ? 14 : 17, 3, rmdat, 1, 0, 0, 0, 1);
return 0;
}
static int
opIMUL_l_ib_a16(uint32_t fetchdat)
{
int64_t temp64;
int32_t templ;
int32_t templ2;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
templ = geteal();
if (cpu_state.abrt)
return 1;
templ2 = getbyte();
if (cpu_state.abrt)
return 1;
if (templ2 & 0x80)
templ2 |= 0xffffff00;
temp64 = ((int64_t) templ) * ((int64_t) templ2);
flags_rebuild();
if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
cpu_state.regs[cpu_reg].l = temp64 & 0xffffffff;
CLOCK_CYCLES(20);
PREFETCH_RUN(20, 3, rmdat, 0, 1, 0, 0, 0);
return 0;
}
static int
opIMUL_l_ib_a32(uint32_t fetchdat)
{
int64_t temp64;
int32_t templ;
int32_t templ2;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
templ = geteal();
if (cpu_state.abrt)
return 1;
templ2 = getbyte();
if (cpu_state.abrt)
return 1;
if (templ2 & 0x80)
templ2 |= 0xffffff00;
temp64 = ((int64_t) templ) * ((int64_t) templ2);
flags_rebuild();
if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
cpu_state.regs[cpu_reg].l = temp64 & 0xffffffff;
CLOCK_CYCLES(20);
PREFETCH_RUN(20, 3, rmdat, 0, 1, 0, 0, 1);
return 0;
}
static int
opIMUL_w_w_a16(uint32_t fetchdat)
{
int32_t templ;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
templ = (int32_t) (int16_t) cpu_state.regs[cpu_reg].w * (int32_t) (int16_t) geteaw();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].w = templ & 0xFFFF;
flags_rebuild();
if ((templ >> 15) != 0 && (templ >> 15) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
CLOCK_CYCLES(18);
PREFETCH_RUN(18, 2, rmdat, 1, 0, 0, 0, 0);
return 0;
}
static int
opIMUL_w_w_a32(uint32_t fetchdat)
{
int32_t templ;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
templ = (int32_t) (int16_t) cpu_state.regs[cpu_reg].w * (int32_t) (int16_t) geteaw();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].w = templ & 0xFFFF;
flags_rebuild();
if ((templ >> 15) != 0 && (templ >> 15) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
CLOCK_CYCLES(18);
PREFETCH_RUN(18, 2, rmdat, 1, 0, 0, 0, 1);
return 0;
}
static int
opIMUL_l_l_a16(uint32_t fetchdat)
{
int64_t temp64;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp64 = (int64_t) (int32_t) cpu_state.regs[cpu_reg].l * (int64_t) (int32_t) geteal();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].l = temp64 & 0xFFFFFFFF;
flags_rebuild();
if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
CLOCK_CYCLES(30);
PREFETCH_RUN(30, 2, rmdat, 0, 1, 0, 0, 0);
return 0;
}
static int
opIMUL_l_l_a32(uint32_t fetchdat)
{
int64_t temp64;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp64 = (int64_t) (int32_t) cpu_state.regs[cpu_reg].l * (int64_t) (int32_t) geteal();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].l = temp64 & 0xFFFFFFFF;
flags_rebuild();
if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1)
cpu_state.flags |= C_FLAG | V_FLAG;
else
cpu_state.flags &= ~(C_FLAG | V_FLAG);
CLOCK_CYCLES(30);
PREFETCH_RUN(30, 2, rmdat, 0, 1, 0, 0, 1);
return 0;
}
``` | /content/code_sandbox/src/cpu/x86_ops_mul.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 2,945 |
```objective-c
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Definitions for the code generator.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
*
* This program is free software; you can redistribute it and/or modify
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
*
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#ifndef _CODEGEN_PUBLIC_H_
#define _CODEGEN_PUBLIC_H_
#ifndef USE_NEW_DYNAREC
# define PAGE_MASK_INDEX_MASK 3
# define PAGE_MASK_INDEX_SHIFT 10
# define PAGE_MASK_SHIFT 4
#else
# define PAGE_MASK_SHIFT 6
#endif
#define PAGE_MASK_MASK 63
#ifdef USE_NEW_DYNAREC
# define BLOCK_PC_INVALID 0xffffffff
# define BLOCK_INVALID 0
#endif
extern void codegen_init(void);
extern void codegen_flush(void);
/*Current physical page of block being recompiled. -1 if no recompilation taking place */
extern uint32_t recomp_page;
extern int codegen_in_recompile;
#endif
``` | /content/code_sandbox/src/cpu/codegen_public.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 385 |
```c
/*Most of the vector instructions here are a total guess.
Some of the timings are based on path_to_url
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include <86box/mem.h>
#include "cpu.h"
#include <86box/machine.h>
#include "x86.h"
#include "x86_ops.h"
#include "x86seg_common.h"
#include "x87_sf.h"
#include "x87.h"
#include "386_common.h"
#include "codegen.h"
#include "codegen_ops.h"
#include "codegen_timing_common.h"
typedef enum uop_type_t {
UOP_ALU = 0, /*Executes in Integer X or Y units*/
UOP_ALUX, /*Executes in Integer X unit*/
UOP_LOAD, /*Executes in Load unit*/
UOP_STORE, /*Executes in Store unit*/
UOP_FLOAD, /*Executes in Load unit*/
UOP_FSTORE, /*Executes in Store unit*/
UOP_MLOAD, /*Executes in Load unit*/
UOP_MSTORE, /*Executes in Store unit*/
UOP_FLOAT, /*Executes in Floating Point unit*/
UOP_MEU, /*Executes in Multimedia unit*/
UOP_MEU_SHIFT, /*Executes in Multimedia unit or ALU X/Y. Uses MMX shifter*/
UOP_MEU_MUL, /*Executes in Multimedia unit or ALU X/Y. Uses MMX/3DNow multiplier*/
UOP_MEU_3DN, /*Executes in Multimedia unit or ALU X/Y. Uses 3DNow ALU*/
UOP_BRANCH, /*Executes in Branch unit*/
UOP_LIMM /*Does not require an execution unit*/
} uop_type_t;
typedef enum decode_type_t {
DECODE_SHORT,
DECODE_LONG,
DECODE_VECTOR
} decode_type_t;
#define MAX_UOPS 10
typedef struct risc86_uop_t {
uop_type_t type;
int throughput;
int latency;
} risc86_uop_t;
typedef struct risc86_instruction_t {
int nr_uops;
decode_type_t decode_type;
risc86_uop_t uop[MAX_UOPS];
} risc86_instruction_t;
static const risc86_instruction_t alu_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t alux_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_alu_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_alux_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t alu_store_op = {
.nr_uops = 3,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t alux_store_op = {
.nr_uops = 3,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t branch_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t limm_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LIMM, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t store_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t bswap_op = {
.nr_uops = 1,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t leave_op = {
.nr_uops = 3,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t lods_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t loop_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t mov_reg_seg_op = {
.nr_uops = 1,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
};
static const risc86_instruction_t movs_op = {
.nr_uops = 4,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t pop_reg_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t pop_mem_op = {
.nr_uops = 3,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t push_imm_op = {
.nr_uops = 1,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 2},
};
static const risc86_instruction_t push_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t push_seg_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t stos_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t test_reg_op = {
.nr_uops = 1,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t test_reg_b_op = {
.nr_uops = 1,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t test_mem_imm_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t test_mem_imm_b_op = {
.nr_uops = 2,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t xchg_op = {
.nr_uops = 3,
.decode_type = DECODE_LONG,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t m3dn_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MEU_3DN, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t mmx_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MEU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t mmx_mul_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t mmx_shift_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MEU_SHIFT, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_3dn_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_MEU_3DN, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_mmx_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_MEU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t load_mmx_mul_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t load_mmx_shift_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_MEU_SHIFT, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t mload_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MLOAD, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t mstore_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MSTORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t pmul_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t pmul_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t float_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAT, .throughput = 2, .latency = 2}
};
static const risc86_instruction_t load_float_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_FLOAT, .throughput = 2, .latency = 2}
};
static const risc86_instruction_t fstore_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FSTORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t fdiv_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAT, .throughput = 40, .latency = 40}
};
static const risc86_instruction_t fdiv_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAD, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_FLOAT, .throughput = 40, .latency = 40}
};
static const risc86_instruction_t fsin_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAT, .throughput = 62, .latency = 62}
};
static const risc86_instruction_t fsqrt_op = {
.nr_uops = 1,
.decode_type = DECODE_SHORT,
.uop[0] = {.type = UOP_FLOAT, .throughput = 41, .latency = 41}
};
static const risc86_instruction_t vector_fldcw_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_FLOAT, .throughput = 8, .latency = 8}
};
static const risc86_instruction_t vector_float_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_FLOAT, .throughput = 2, .latency = 2}
};
static const risc86_instruction_t vector_float_l_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_FLOAT, .throughput = 50, .latency = 50}
};
static const risc86_instruction_t vector_flde_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_FLOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_FLOAD, .throughput = 1, .latency = 2},
.uop[2] = { .type = UOP_FLOAT, .throughput = 2, .latency = 2}
};
static const risc86_instruction_t vector_fste_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_FLOAT, .throughput = 2, .latency = 2},
.uop[1] = { .type = UOP_FSTORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_FSTORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alu1_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alu2_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alu3_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alu6_op = {
.nr_uops = 6,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[4] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[5] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alux1_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alux3_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alux6_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[4] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[5] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alu_store_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_alux_store_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_arpl_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3},
.uop[1] = { .type = UOP_ALU, .throughput = 3, .latency = 3}
};
static const risc86_instruction_t vector_bound_op = {
.nr_uops = 4,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_bsx_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 10, .latency = 10}
};
static const risc86_instruction_t vector_call_far_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_cli_sti_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 7, .latency = 7}
};
static const risc86_instruction_t vector_cmps_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_cmpsb_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_cmpxchg_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
};
static const risc86_instruction_t vector_cmpxchg_b_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
};
static const risc86_instruction_t vector_cpuid_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 22, .latency = 22}
};
static const risc86_instruction_t vector_div16_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 10, .latency = 10}
};
static const risc86_instruction_t vector_div16_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_ALUX, .throughput = 10, .latency = 10}
};
static const risc86_instruction_t vector_div32_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 18, .latency = 18}
};
static const risc86_instruction_t vector_div32_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_ALUX, .throughput = 18, .latency = 18}
};
static const risc86_instruction_t vector_emms_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 25, .latency = 25}
};
static const risc86_instruction_t vector_enter_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_ALU, .throughput = 10, .latency = 10}
};
static const risc86_instruction_t vector_femms_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 6, .latency = 6}
};
static const risc86_instruction_t vector_in_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 10, .latency = 11}
};
static const risc86_instruction_t vector_ins_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 10, .latency = 11},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1 },
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1 }
};
static const risc86_instruction_t vector_int_op = {
.nr_uops = 5,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 20, .latency = 20},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1 },
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1 },
.uop[3] = { .type = UOP_STORE, .throughput = 1, .latency = 1 },
.uop[4] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1 }
};
static const risc86_instruction_t vector_iret_op = {
.nr_uops = 5,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[2] = { .type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[3] = { .type = UOP_ALU, .throughput = 20, .latency = 20},
.uop[4] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1 }
};
static const risc86_instruction_t vector_invd_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1000, .latency = 1000}
};
static const risc86_instruction_t vector_jmp_far_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3},
.uop[1] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_load_alu_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_load_alux_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_loop_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_lss_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[2] = { .type = UOP_ALU, .throughput = 3, .latency = 3}
};
static const risc86_instruction_t vector_mov_mem_seg_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_mov_seg_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 3, .latency = 3}
};
static const risc86_instruction_t vector_mov_seg_reg_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3}
};
static const risc86_instruction_t vector_mul_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_mul_mem_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_mul64_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_mul64_mem_op = {
.nr_uops = 4,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_out_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_STORE, .throughput = 10, .latency = 10}
};
static const risc86_instruction_t vector_outs_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1 },
.uop[1] = { .type = UOP_STORE, .throughput = 10, .latency = 10},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1 }
};
static const risc86_instruction_t vector_pusha_op = {
.nr_uops = 8,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[4] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[5] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[6] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[7] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_popa_op = {
.nr_uops = 8,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[3] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[4] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[5] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[6] = { .type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[7] = { .type = UOP_LOAD, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_popf_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2 },
.uop[1] = { .type = UOP_ALUX, .throughput = 17, .latency = 17}
};
static const risc86_instruction_t vector_push_mem_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_pushf_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_ret_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_retf_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 3, .latency = 3},
.uop[2] = { .type = UOP_BRANCH, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_scas_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_scasb_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_setcc_mem_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_FSTORE, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_setcc_reg_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_test_mem_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_test_mem_b_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
.uop[1] = { .type = UOP_ALUX, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_xchg_mem_op = {
.nr_uops = 3,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_STORE, .throughput = 1, .latency = 1},
.uop[2] = { .type = UOP_ALU, .throughput = 1, .latency = 1}
};
static const risc86_instruction_t vector_xlat_op = {
.nr_uops = 2,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
.uop[1] = { .type = UOP_LOAD, .throughput = 1, .latency = 2}
};
static const risc86_instruction_t vector_wbinvd_op = {
.nr_uops = 1,
.decode_type = DECODE_VECTOR,
.uop[0] = {.type = UOP_ALU, .throughput = 10000, .latency = 10000}
};
#define INVALID NULL
static const risc86_instruction_t *opcode_timings_k5[256] = {
// clang-format off
/* ADD ADD ADD ADD*/
/*00*/ &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
/* ADD ADD PUSH ES POP ES*/
&alux_op, &alu_op, &push_seg_op, &vector_mov_seg_mem_op,
/* OR OR OR OR*/
&alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
/* OR OR PUSH CS */
&alux_op, &alu_op, &push_seg_op, INVALID,
/* ADC ADC ADC ADC*/
/*10*/ &vector_alux_store_op, &vector_alu_store_op, &vector_load_alux_op, &vector_load_alu_op,
/* ADC ADC PUSH SS POP SS*/
&vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
/* SBB SBB SBB SBB*/
/*10*/ &vector_alux_store_op, &vector_alu_store_op, &vector_load_alux_op, &vector_load_alu_op,
/* SBB SBB PUSH DS POP DS*/
&vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
/* AND AND AND AND*/
/*20*/ &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
/* AND AND DAA*/
&alux_op, &alu_op, INVALID, &vector_alux1_op,
/* SUB SUB SUB SUB*/
&alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
/* SUB SUB DAS*/
&alux_op, &alu_op, INVALID, &vector_alux1_op,
/* XOR XOR XOR XOR*/
/*30*/ &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
/* XOR XOR AAA*/
&alux_op, &alu_op, INVALID, &vector_alux6_op,
/* CMP CMP CMP CMP*/
&load_alux_op, &load_alu_op, &load_alux_op, &load_alu_op,
/* CMP CMP AAS*/
&alux_op, &alu_op, INVALID, &vector_alux6_op,
/* INC EAX INC ECX INC EDX INC EBX*/
/*40*/ &alu_op, &alu_op, &alu_op, &alu_op,
/* INC ESP INC EBP INC ESI INC EDI*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* DEC EAX DEC ECX DEC EDX DEC EBX*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* DEC ESP DEC EBP DEC ESI DEC EDI*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
/*50*/ &store_op, &store_op, &store_op, &store_op,
/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
&store_op, &store_op, &store_op, &store_op,
/* POP EAX POP ECX POP EDX POP EBX*/
&pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
/* POP ESP POP EBP POP ESI POP EDI*/
&pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
/* PUSHA POPA BOUND ARPL*/
/*60*/ &vector_pusha_op, &vector_popa_op, &vector_bound_op, &vector_arpl_op,
INVALID, INVALID, INVALID, INVALID,
/* PUSH imm IMUL PUSH imm IMUL*/
&push_imm_op, &vector_mul_op, &push_imm_op, &vector_mul_op,
/* INSB INSW OUTSB OUTSW*/
&vector_ins_op, &vector_ins_op, &vector_outs_op, &vector_outs_op,
/* Jxx*/
/*70*/ &branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
/*80*/ INVALID, INVALID, INVALID, INVALID,
/* TEST TEST XCHG XCHG*/
&vector_test_mem_b_op, &vector_test_mem_op, &vector_xchg_mem_op, &vector_xchg_mem_op,
/* MOV MOV MOV MOV*/
&store_op, &store_op, &load_op, &load_op,
/* MOV from seg LEA MOV to seg POP*/
&vector_mov_mem_seg_op, &store_op, &vector_mov_seg_mem_op, &pop_mem_op,
/* NOP XCHG XCHG XCHG*/
/*90*/ &limm_op, &xchg_op, &xchg_op, &xchg_op,
/* XCHG XCHG XCHG XCHG*/
&xchg_op, &xchg_op, &xchg_op, &xchg_op,
/* CBW CWD CALL far WAIT*/
&vector_alu1_op, &vector_alu1_op, &vector_call_far_op, &limm_op,
/* PUSHF POPF SAHF LAHF*/
&vector_pushf_op, &vector_popf_op, &vector_alux1_op, &vector_alux1_op,
/* MOV MOV MOV MOV*/
/*a0*/ &load_op, &load_op, &store_op, &store_op,
/* MOVSB MOVSW CMPSB CMPSW*/
&movs_op, &movs_op, &vector_cmpsb_op, &vector_cmps_op,
/* TEST TEST STOSB STOSW*/
&test_reg_b_op, &test_reg_op, &stos_op, &stos_op,
/* LODSB LODSW SCASB SCASW*/
&lods_op, &lods_op, &vector_scasb_op, &vector_scas_op,
/* MOV*/
/*b0*/ &limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
/* RET imm RET*/
/*c0*/ INVALID, INVALID, &vector_ret_op, &vector_ret_op,
/* LES LDS MOV MOV*/
&vector_lss_op, &vector_lss_op, &store_op, &store_op,
/* ENTER LEAVE RETF RETF*/
&vector_enter_op, &leave_op, &vector_retf_op, &vector_retf_op,
/* INT3 INT INTO IRET*/
&vector_int_op, &vector_int_op, &vector_int_op, &vector_iret_op,
/*d0*/ INVALID, INVALID, INVALID, INVALID,
/* AAM AAD SETALC XLAT*/
&vector_alux6_op, &vector_alux3_op, &vector_alux1_op, &vector_xlat_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/* LOOPNE LOOPE LOOP JCXZ*/
/*e0*/ &vector_loop_op, &vector_loop_op, &loop_op, &vector_loop_op,
/* IN AL IN AX OUT_AL OUT_AX*/
&vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
/* CALL JMP JMP JMP*/
&store_op, &branch_op, &vector_jmp_far_op, &branch_op,
/* IN AL IN AX OUT_AL OUT_AX*/
&vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
/* REPNE REPE*/
/*f0*/ INVALID, INVALID, INVALID, INVALID,
/* HLT CMC*/
&vector_alux1_op, &vector_alu2_op, INVALID, INVALID,
/* CLC STC CLI STI*/
&vector_alu1_op, &vector_alu1_op, &vector_cli_sti_op, &vector_cli_sti_op,
/* CLD STD INCDEC*/
&vector_alu1_op, &vector_alu1_op, &alux_store_op, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_mod3[256] = {
// clang-format off
/* ADD ADD ADD ADD*/
/*00*/ &alux_op, &alu_op, &alux_op, &alu_op,
/* ADD ADD PUSH ES POP ES*/
&alux_op, &alu_op, &push_seg_op, &vector_mov_seg_mem_op,
/* OR OR OR OR*/
&alux_op, &alu_op, &alux_op, &alu_op,
/* OR OR PUSH CS */
&alux_op, &alu_op, &push_seg_op, INVALID,
/* ADC ADC ADC ADC*/
/*10*/ &vector_alux1_op, &vector_alu1_op, &vector_alux1_op, &vector_alu1_op,
/* ADC ADC PUSH SS POP SS*/
&vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
/* SBB SBB SBB SBB*/
&vector_alux1_op, &vector_alu1_op, &vector_alux1_op, &vector_alu1_op,
/* SBB SBB PUSH DS POP DS*/
&vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
/* AND AND AND AND*/
/*20*/ &alux_op, &alu_op, &alux_op, &alu_op,
/* AND AND DAA*/
&alux_op, &alu_op, INVALID, &vector_alux1_op,
/* SUB SUB SUB SUB*/
&alux_op, &alu_op, &alux_op, &alu_op,
/* SUB SUB DAS*/
&alux_op, &alu_op, INVALID, &vector_alux1_op,
/* XOR XOR XOR XOR*/
/*30*/ &alux_op, &alu_op, &alux_op, &alu_op,
/* XOR XOR AAA*/
&alux_op, &alu_op, INVALID, &vector_alux6_op,
/* CMP CMP CMP CMP*/
&alux_op, &alu_op, &alux_op, &alu_op,
/* CMP CMP AAS*/
&alux_op, &alu_op, INVALID, &vector_alux6_op,
/* INC EAX INC ECX INC EDX INC EBX*/
/*40*/ &alu_op, &alu_op, &alu_op, &alu_op,
/* INC ESP INC EBP INC ESI INC EDI*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* DEC EAX DEC ECX DEC EDX DEC EBX*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* DEC ESP DEC EBP DEC ESI DEC EDI*/
&alu_op, &alu_op, &alu_op, &alu_op,
/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
/*50*/ &store_op, &store_op, &store_op, &store_op,
/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
&store_op, &store_op, &store_op, &store_op,
/* POP EAX POP ECX POP EDX POP EBX*/
&pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
/* POP ESP POP EBP POP ESI POP EDI*/
&pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
/* PUSHA POPA BOUND ARPL*/
/*60*/ &vector_pusha_op, &vector_popa_op, &vector_bound_op, &vector_arpl_op,
INVALID, INVALID, INVALID, INVALID,
/* PUSH imm IMUL PUSH imm IMUL*/
&push_imm_op, &vector_mul_op, &push_imm_op, &vector_mul_op,
/* INSB INSW OUTSB OUTSW*/
&vector_ins_op, &vector_ins_op, &vector_outs_op, &vector_outs_op,
/* Jxx*/
/*70*/ &branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
/*80*/ INVALID, INVALID, INVALID, INVALID,
/* TEST TEST XCHG XCHG*/
&vector_alu1_op, &vector_alu1_op, &vector_alu3_op, &vector_alu3_op,
/* MOV MOV MOV MOV*/
&store_op, &store_op, &load_op, &load_op,
/* MOV from seg LEA MOV to seg POP*/
&mov_reg_seg_op, &store_op, &vector_mov_seg_reg_op, &pop_reg_op,
/* NOP XCHG XCHG XCHG*/
/*90*/ &limm_op, &xchg_op, &xchg_op, &xchg_op,
/* XCHG XCHG XCHG XCHG*/
&xchg_op, &xchg_op, &xchg_op, &xchg_op,
/* CBW CWD CALL far WAIT*/
&vector_alu1_op, &vector_alu1_op, &vector_call_far_op, &limm_op,
/* PUSHF POPF SAHF LAHF*/
&vector_pushf_op, &vector_popf_op, &vector_alux1_op, &vector_alux1_op,
/* MOV MOV MOV MOV*/
/*a0*/ &load_op, &load_op, &store_op, &store_op,
/* MOVSB MOVSW CMPSB CMPSW*/
&movs_op, &movs_op, &vector_cmpsb_op, &vector_cmps_op,
/* TEST TEST STOSB STOSW*/
&test_reg_b_op, &test_reg_op, &stos_op, &stos_op,
/* LODSB LODSW SCASB SCASW*/
&lods_op, &lods_op, &vector_scasb_op, &vector_scas_op,
/* MOV*/
/*b0*/ &limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
&limm_op, &limm_op, &limm_op, &limm_op,
/* RET imm RET*/
/*c0*/ INVALID, INVALID, &vector_ret_op, &vector_ret_op,
/* LES LDS MOV MOV*/
&vector_lss_op, &vector_lss_op, &store_op, &store_op,
/* ENTER LEAVE RETF RETF*/
&vector_enter_op, &leave_op, &vector_retf_op, &vector_retf_op,
/* INT3 INT INTO IRET*/
&vector_int_op, &vector_int_op, &vector_int_op, &vector_iret_op,
/*d0*/ INVALID, INVALID, INVALID, INVALID,
/* AAM AAD SETALC XLAT*/
&vector_alux6_op, &vector_alux3_op, &vector_alux1_op, &vector_xlat_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/* LOOPNE LOOPE LOOP JCXZ*/
/*e0*/ &vector_loop_op, &vector_loop_op, &loop_op, &vector_loop_op,
/* IN AL IN AX OUT_AL OUT_AX*/
&vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
/* CALL JMP JMP JMP*/
&store_op, &branch_op, &vector_jmp_far_op, &branch_op,
/* IN AL IN AX OUT_AL OUT_AX*/
&vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
/* REPNE REPE*/
/*f0*/ INVALID, INVALID, INVALID, INVALID,
/* HLT CMC*/
&vector_alux1_op, &vector_alu2_op, INVALID, INVALID,
/* CLC STC CLI STI*/
&vector_alu1_op, &vector_alu1_op, &vector_cli_sti_op, &vector_cli_sti_op,
/* CLD STD INCDEC*/
&vector_alu1_op, &vector_alu1_op, &vector_alux1_op, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_0f[256] = {
// clang-format off
/*00*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
INVALID, &vector_alu6_op, &vector_alu6_op, INVALID,
&vector_invd_op, &vector_wbinvd_op, INVALID, INVALID,
INVALID, &load_op, &vector_femms_op, &load_3dn_op,
/*10*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*20*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
&vector_alu6_op, &vector_alu6_op, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*30*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*40*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*50*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*60*/ &load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
&load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
&load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
INVALID, INVALID, &mload_op, &mload_op,
/*70*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
&load_mmx_op, &load_mmx_op, &load_mmx_op, &vector_emms_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, &mstore_op, &mstore_op,
/*80*/ &branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
/*90*/ &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
&vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
&vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
&vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
/*a0*/ &push_seg_op, &vector_mov_seg_mem_op, &vector_cpuid_op, &vector_load_alu_op,
&vector_alu_store_op, &vector_alu_store_op, INVALID, INVALID,
&push_seg_op, &vector_mov_seg_mem_op, INVALID, &vector_load_alu_op,
&vector_alu_store_op, &vector_alu_store_op, INVALID, &vector_mul_op,
/*b0*/ &vector_cmpxchg_b_op, &vector_cmpxchg_op, &vector_lss_op, &vector_load_alu_op,
&vector_lss_op, &vector_lss_op, &load_alux_op, &load_alu_op,
INVALID, INVALID, &vector_load_alu_op, &vector_load_alu_op,
&vector_bsx_op, &vector_bsx_op, &load_alux_op, &load_alu_op,
/*c0*/ &vector_alux_store_op, &vector_alu_store_op, INVALID, INVALID,
INVALID, INVALID, INVALID, &vector_cmpxchg_op,
&bswap_op, &bswap_op, &bswap_op, &bswap_op,
&bswap_op, &bswap_op, &bswap_op, &bswap_op,
/*d0*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
INVALID, &load_mmx_mul_op, INVALID, INVALID,
&load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
&load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
/*e0*/ &load_mmx_op, &load_mmx_shift_op, &load_mmx_shift_op, INVALID,
INVALID, &pmul_mem_op, INVALID, INVALID,
&load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
&load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
/*f0*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
INVALID, &pmul_mem_op, INVALID, INVALID,
&load_mmx_op, &load_mmx_op, &load_mmx_op, INVALID,
&load_mmx_op, &load_mmx_op, &load_mmx_op, INVALID,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_0f_mod3[256] = {
// clang-format off
/*00*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
INVALID, &vector_alu6_op, &vector_alu6_op, INVALID,
&vector_invd_op, &vector_wbinvd_op, INVALID, INVALID,
INVALID, INVALID, &vector_femms_op, &m3dn_op,
/*10*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*20*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
&vector_alu6_op, &vector_alu6_op, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*30*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*40*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*50*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*60*/ &mmx_op, &mmx_op, &mmx_op, &mmx_op,
&mmx_op, &mmx_op, &mmx_op, &mmx_op,
&mmx_op, &mmx_op, &mmx_op, &mmx_op,
INVALID, INVALID, &mmx_op, &mmx_op,
/*70*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
&mmx_op, &mmx_op, &mmx_op, &vector_emms_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, &mmx_op, &mmx_op,
/*80*/ &branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
&branch_op, &branch_op, &branch_op, &branch_op,
/*90*/ &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
&vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
&vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
&vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
/*a0*/ &push_seg_op, &vector_mov_seg_mem_op, &vector_cpuid_op, &vector_alu1_op,
&vector_alu1_op, &vector_alu1_op, INVALID, INVALID,
&push_seg_op, &vector_mov_seg_mem_op, INVALID, &vector_alu1_op,
&vector_alu1_op, &vector_alu1_op, INVALID, &vector_mul_op,
/*b0*/ &vector_cmpxchg_b_op, &vector_cmpxchg_op, &vector_lss_op, &vector_alu1_op,
&vector_lss_op, &vector_lss_op, &alux_op, &alu_op,
INVALID, INVALID, &vector_alu1_op, &vector_alu1_op,
&vector_bsx_op, &vector_bsx_op, &alux_op, &alu_op,
/*c0*/ &vector_alux1_op, &vector_alu1_op, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
&bswap_op, &bswap_op, &bswap_op, &bswap_op,
&bswap_op, &bswap_op, &bswap_op, &bswap_op,
/*d0*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
INVALID, &mmx_mul_op, INVALID, INVALID,
&mmx_op, &mmx_op, INVALID, &mmx_op,
&mmx_op, &mmx_op, INVALID, &mmx_op,
/*e0*/ &mmx_op, &mmx_shift_op, &mmx_shift_op, INVALID,
INVALID, &pmul_op, INVALID, INVALID,
&mmx_op, &mmx_op, INVALID, &mmx_op,
&mmx_op, &mmx_op, INVALID, &mmx_op,
/*f0*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
INVALID, &pmul_op, INVALID, INVALID,
&mmx_op, &mmx_op, &mmx_op, INVALID,
&mmx_op, &mmx_op, &mmx_op, INVALID,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_0f0f[256] = {
// clang-format off
/*00*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, &load_3dn_op, INVALID, INVALID,
/*10*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, &load_3dn_op, INVALID, INVALID,
/*20*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*30*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*40*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*50*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*60*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*70*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*80*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*90*/ &load_3dn_op, INVALID, INVALID, INVALID,
&load_3dn_op, INVALID, &load_3dn_op, &load_3dn_op,
INVALID, INVALID, &load_3dn_op, INVALID,
INVALID, INVALID, &load_3dn_op, INVALID,
/*a0*/ &load_3dn_op, INVALID, INVALID, INVALID,
&load_3dn_op, INVALID, &load_mmx_mul_op, &load_mmx_mul_op,
INVALID, INVALID, &load_3dn_op, INVALID,
INVALID, INVALID, &load_3dn_op, INVALID,
/*b0*/ &load_3dn_op, INVALID, INVALID, INVALID,
&load_mmx_mul_op, INVALID, &load_mmx_mul_op, &load_mmx_mul_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, &load_mmx_op,
/*c0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*d0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*e0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*f0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_0f0f_mod3[256] = {
// clang-format off
/*00*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, &m3dn_op, INVALID, INVALID,
/*10*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, &m3dn_op, INVALID, INVALID,
/*20*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*30*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*40*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*50*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*60*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*70*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*80*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*90*/ &m3dn_op, INVALID, INVALID, INVALID,
&m3dn_op, INVALID, &m3dn_op, &m3dn_op,
INVALID, INVALID, &m3dn_op, INVALID,
INVALID, INVALID, &m3dn_op, INVALID,
/*a0*/ &m3dn_op, INVALID, INVALID, INVALID,
&m3dn_op, INVALID, &mmx_mul_op, &mmx_mul_op,
INVALID, INVALID, &m3dn_op, INVALID,
INVALID, INVALID, &m3dn_op, INVALID,
/*b0*/ &m3dn_op, INVALID, INVALID, INVALID,
&mmx_mul_op, INVALID, &mmx_mul_op, &mmx_mul_op,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, &mmx_op,
/*c0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*d0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*e0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*f0*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_shift[8] = {
// clang-format off
&vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op,
&vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_shift_b[8] = {
// clang-format off
&vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op,
&vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_shift_mod3[8] = {
// clang-format off
&vector_alu1_op, &vector_alu1_op, &vector_alu1_op, &vector_alu1_op,
&alu_op, &alu_op, &alu_op, &alu_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_shift_b_mod3[8] = {
// clang-format off
&vector_alux1_op, &vector_alux1_op, &vector_alux1_op, &vector_alux1_op,
&alux_op, &alux_op, &alux_op, &alux_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_80[8] = {
// clang-format off
&alux_store_op, &alux_store_op, &vector_alux_store_op, &vector_alux_store_op,
&alux_store_op, &alux_store_op, &alux_store_op, &alux_store_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_80_mod3[8] = {
// clang-format off
&alux_op, &alux_op, &alux_store_op, &alux_store_op,
&alux_op, &alux_op, &alux_op, &alux_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_8x[8] = {
// clang-format off
&alu_store_op, &alu_store_op, &vector_alu_store_op, &vector_alu_store_op,
&alu_store_op, &alu_store_op, &alu_store_op, &alu_store_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_8x_mod3[8] = {
// clang-format off
&alu_op, &alu_op, &alu_store_op, &alu_store_op,
&alu_op, &alu_op, &alu_op, &alu_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_f6[8] = {
// clang-format off
/* TST NOT NEG*/
&test_mem_imm_b_op, INVALID, &vector_alux_store_op, &vector_alux_store_op,
/* MUL IMUL DIV IDIV*/
&vector_mul_mem_op, &vector_mul_mem_op, &vector_div16_mem_op, &vector_div16_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_f6_mod3[8] = {
// clang-format off
/* TST NOT NEG*/
&test_reg_b_op, INVALID, &alux_op, &alux_op,
/* MUL IMUL DIV IDIV*/
&vector_mul_op, &vector_mul_op, &vector_div16_op, &vector_div16_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_f7[8] = {
// clang-format off
/* TST NOT NEG*/
&test_mem_imm_op, INVALID, &vector_alu_store_op, &vector_alu_store_op,
/* MUL IMUL DIV IDIV*/
&vector_mul64_mem_op, &vector_mul64_mem_op, &vector_div32_mem_op, &vector_div32_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_f7_mod3[8] = {
// clang-format off
/* TST NOT NEG*/
&test_reg_op, INVALID, &alu_op, &alu_op,
/* MUL IMUL DIV IDIV*/
&vector_mul64_op, &vector_mul64_op, &vector_div32_op, &vector_div32_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_ff[8] = {
// clang-format off
/* INC DEC CALL CALL far*/
&alu_store_op, &alu_store_op, &store_op, &vector_call_far_op,
/* JMP JMP far PUSH*/
&branch_op, &vector_jmp_far_op, &push_mem_op, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_ff_mod3[8] = {
// clang-format off
/* INC DEC CALL CALL far*/
&vector_alu1_op, &vector_alu1_op, &store_op, &vector_call_far_op,
/* JMP JMP far PUSH*/
&branch_op, &vector_jmp_far_op, &vector_push_mem_op, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_d8[8] = {
// clang-format off
/* FADDs FMULs FCOMs FCOMPs*/
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
/* FSUBs FSUBRs FDIVs FDIVRs*/
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_d8_mod3[8] = {
// clang-format off
/* FADD FMUL FCOM FCOMP*/
&float_op, &float_op, &float_op, &float_op,
/* FSUB FSUBR FDIV FDIVR*/
&float_op, &float_op, &fdiv_op, &fdiv_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_d9[8] = {
// clang-format off
/* FLDs FSTs FSTPs*/
&load_float_op, INVALID, &fstore_op, &fstore_op,
/* FLDENV FLDCW FSTENV FSTCW*/
&vector_float_l_op, &vector_fldcw_op, &vector_float_l_op, &vector_float_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_d9_mod3[64] = {
// clang-format off
/*FLD*/
&float_op, &float_op, &float_op, &float_op,
&float_op, &float_op, &float_op, &float_op,
/*FXCH*/
&float_op, &float_op, &float_op, &float_op,
&float_op, &float_op, &float_op, &float_op,
/*FNOP*/
&float_op, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/*FSTP*/
&float_op, &float_op, &float_op, &float_op,
&float_op, &float_op, &float_op, &float_op,
/* opFCHS opFABS*/
&float_op, &float_op, INVALID, INVALID,
/* opFTST opFXAM*/
&float_op, &float_op, INVALID, INVALID,
/* opFLD1 opFLDL2T opFLDL2E opFLDPI*/
&float_op, &float_op, &float_op, &float_op,
/* opFLDEG2 opFLDLN2 opFLDZ*/
&float_op, &float_op, &float_op, INVALID,
/* opF2XM1 opFYL2X opFPTAN opFPATAN*/
&fsin_op, &fsin_op, &fsin_op, &fsin_op,
/* opFDECSTP opFINCSTP,*/
INVALID, INVALID, &float_op, &float_op,
/* opFPREM opFSQRT opFSINCOS*/
&fdiv_op, INVALID, &fsqrt_op, &fsin_op,
/* opFRNDINT opFSCALE opFSIN opFCOS*/
&float_op, &fdiv_op, &fsin_op, &fsin_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_da[8] = {
// clang-format off
/* FIADDl FIMULl FICOMl FICOMPl*/
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
/* FISUBl FISUBRl FIDIVl FIDIVRl*/
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_da_mod3[8] = {
// clang-format off
INVALID, INVALID, INVALID, INVALID,
/* FCOMPP*/
INVALID, &float_op, INVALID, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_db[8] = {
// clang-format off
/* FLDil FSTil FSTPil*/
&load_float_op, INVALID, &fstore_op, &fstore_op,
/* FLDe FSTPe*/
INVALID, &vector_flde_op, INVALID, &vector_fste_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_db_mod3[64] = {
// clang-format off
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/* opFNOP opFCLEX opFINIT*/
INVALID, &float_op, &float_op, &float_op,
/* opFNOP opFNOP*/
&float_op, &float_op, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_dc[8] = {
// clang-format off
/* FADDd FMULd FCOMd FCOMPd*/
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
/* FSUBd FSUBRd FDIVd FDIVRd*/
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_dc_mod3[8] = {
// clang-format off
/* opFADDr opFMULr*/
&float_op, &float_op, INVALID, INVALID,
/* opFSUBRr opFSUBr opFDIVRr opFDIVr*/
&float_op, &float_op, &fdiv_op, &fdiv_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_dd[8] = {
// clang-format off
/* FLDd FSTd FSTPd*/
&load_float_op, INVALID, &fstore_op, &fstore_op,
/* FRSTOR FSAVE FSTSW*/
&vector_float_l_op, INVALID, &vector_float_l_op, &vector_float_l_op
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_dd_mod3[8] = {
// clang-format off
/* FFFREE FST FSTP*/
&float_op, INVALID, &float_op, &float_op,
/* FUCOM FUCOMP*/
&float_op, &float_op, INVALID, INVALID
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_de[8] = {
// clang-format off
/* FIADDw FIMULw FICOMw FICOMPw*/
&load_float_op, &load_float_op, &load_float_op, &load_float_op,
/* FISUBw FISUBRw FIDIVw FIDIVRw*/
&load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_de_mod3[8] = {
// clang-format off
/* FADDP FMULP FCOMPP*/
&float_op, &float_op, INVALID, &float_op,
/* FSUBP FSUBRP FDIVP FDIVRP*/
&float_op, &float_op, &fdiv_op, &fdiv_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_df[8] = {
// clang-format off
/* FILDiw FISTiw FISTPiw*/
&load_float_op, INVALID, &fstore_op, &fstore_op,
/* FILDiq FBSTP FISTPiq*/
INVALID, &load_float_op, &vector_float_l_op, &fstore_op,
// clang-format on
};
static const risc86_instruction_t *opcode_timings_k5_df_mod3[8] = {
// clang-format off
INVALID, INVALID, INVALID, INVALID,
/* FSTSW AX*/
&float_op, INVALID, INVALID, INVALID
// clang-format on
};
static uint8_t last_prefix;
static int prefixes;
static int decode_timestamp;
static int last_complete_timestamp;
typedef struct k5_unit_t {
uint32_t uop_mask;
int first_available_cycle;
} k5_unit_t;
static int nr_units;
static k5_unit_t *units;
/*k5 has dedicated MMX unit*/
static k5_unit_t k5_units[] = {
{ .uop_mask = (1 << UOP_ALU) | (1 << UOP_ALUX) }, /*Integer X*/
{ .uop_mask = (1 << UOP_ALU) }, /*Integer Y*/
{ .uop_mask = (1 << UOP_MEU) | (1 << UOP_MEU_SHIFT) | (1 << UOP_MEU_MUL) }, /*Multimedia*/
{ .uop_mask = (1 << UOP_FLOAT) }, /*Floating point*/
{ .uop_mask = (1 << UOP_LOAD) | (1 << UOP_FLOAD) | (1 << UOP_MLOAD) }, /*Load*/
{ .uop_mask = (1 << UOP_STORE) | (1 << UOP_FSTORE) | (1 << UOP_MSTORE) }, /*Store*/
{ .uop_mask = (1 << UOP_BRANCH) } /*Branch*/
};
#define NR_k5_UNITS (sizeof(k5_units) / sizeof(k5_unit_t))
/*k5-2 and later integrate MMX into ALU X & Y, sharing multiplier, shifter and
3DNow ALU between two execution units*/
static k5_unit_t k5_2_units[] = {
{ .uop_mask = (1 << UOP_ALU) | (1 << UOP_ALUX) | (1 << UOP_MEU) | /*Integer X*/
(1 << UOP_MEU_SHIFT) | (1 << UOP_MEU_MUL) | (1 << UOP_MEU_3DN) },
{ .uop_mask = (1 << UOP_ALU) | (1 << UOP_MEU) | /*Integer Y*/
(1 << UOP_MEU_SHIFT) | (1 << UOP_MEU_MUL) | (1 << UOP_MEU_3DN) },
{ .uop_mask = (1 << UOP_FLOAT) }, /*Floating point*/
{ .uop_mask = (1 << UOP_LOAD) | (1 << UOP_FLOAD) | (1 << UOP_MLOAD) }, /*Load*/
{ .uop_mask = (1 << UOP_STORE) | (1 << UOP_FSTORE) | (1 << UOP_MSTORE) }, /*Store*/
{ .uop_mask = (1 << UOP_BRANCH) } /*Branch*/
};
#define NR_k5_2_UNITS (sizeof(k5_2_units) / sizeof(k5_unit_t))
/*First available cycles of shared execution units. Each of these can be submitted
to by ALU X and Y*/
static int mul_first_available_cycle;
static int shift_first_available_cycle;
static int m3dnow_first_available_cycle;
static int
uop_run(const risc86_uop_t *uop, int decode_time)
{
k5_unit_t *best_unit = NULL;
int best_start_cycle = 99999;
/*UOP_LIMM does not require execution*/
if (uop->type == UOP_LIMM)
return decode_time;
/*Handle shared units on k5-2 and later*/
if (units == k5_2_units) {
if (uop->type == UOP_MEU_MUL && decode_time < mul_first_available_cycle)
decode_time = mul_first_available_cycle;
else if (uop->type == UOP_MEU_SHIFT && decode_time < mul_first_available_cycle)
decode_time = shift_first_available_cycle;
else if (uop->type == UOP_MEU_3DN && decode_time < mul_first_available_cycle)
decode_time = m3dnow_first_available_cycle;
}
/*Find execution unit for this uOP*/
for (int c = 0; c < nr_units; c++) {
if (units[c].uop_mask & (1 << uop->type)) {
if (units[c].first_available_cycle < best_start_cycle) {
best_unit = &units[c];
best_start_cycle = units[c].first_available_cycle;
}
}
}
if (!best_unit)
fatal("uop_run: can not find execution unit\n");
if (best_start_cycle < decode_time)
best_start_cycle = decode_time;
best_unit->first_available_cycle = best_start_cycle + uop->throughput;
if (units == k5_2_units) {
if (uop->type == UOP_MEU_MUL)
mul_first_available_cycle = best_start_cycle + uop->throughput;
else if (uop->type == UOP_MEU_SHIFT)
shift_first_available_cycle = best_start_cycle + uop->throughput;
else if (uop->type == UOP_MEU_3DN)
m3dnow_first_available_cycle = best_start_cycle + uop->throughput;
}
return best_start_cycle + uop->throughput;
}
/*The k5 decoder can decode, per clock :
- 1 or 2 'short' instructions, each up to 2 uOPs and 7 bytes long
- 1 'long' instruction, up to 4 uOPs
- 1 'vector' instruction, up to 4 uOPs per cycle, plus (I think) 1 cycle startup delay)
*/
static struct {
int nr_uops;
const risc86_uop_t *uops[4];
/*Earliest time a uop can start. If the timestamp is -1, then the uop is
part of a dependency chain and the start time is the completion time of
the previous uop*/
int earliest_start[4];
} decode_buffer;
#define NR_OPQUADS 6
/*Timestamps of when the last six opquads completed. The k5 scheduler retires
opquads in order, so this is needed to determine when the next can be scheduled*/
static int opquad_completion_timestamp[NR_OPQUADS];
static int next_opquad = 0;
#define NR_REGS 8
/*Timestamp of when last operation on an integer register completed*/
static int reg_available_timestamp[NR_REGS];
/*Timestamp of when last operation on an FPU register completed*/
static int fpu_st_timestamp[8];
/*Completion time of the last uop to be processed. Used to calculate timing of
dependent uop chains*/
static int last_uop_timestamp = 0;
void
decode_flush_k5(void)
{
int uop_timestamp = 0;
/*Decoded opquad can not be submitted if there are no free spaces in the
opquad buffer*/
if (decode_timestamp < opquad_completion_timestamp[next_opquad])
decode_timestamp = opquad_completion_timestamp[next_opquad];
/*Ensure that uops can not be submitted before they have been decoded*/
if (decode_timestamp > last_uop_timestamp)
last_uop_timestamp = decode_timestamp;
/*Submit uops to execution units, and determine the latest completion time*/
for (int c = 0; c < decode_buffer.nr_uops; c++) {
int start_timestamp;
if (decode_buffer.earliest_start[c] == -1)
start_timestamp = last_uop_timestamp;
else
start_timestamp = decode_buffer.earliest_start[c];
last_uop_timestamp = uop_run(decode_buffer.uops[c], start_timestamp);
if (last_uop_timestamp > uop_timestamp)
uop_timestamp = last_uop_timestamp;
}
/*Calculate opquad completion time. Since opquads complete in order, it
must be after the last completion.*/
if (uop_timestamp <= last_complete_timestamp)
last_complete_timestamp = last_complete_timestamp + 1;
else
last_complete_timestamp = uop_timestamp;
/*Advance to next opquad in buffer*/
opquad_completion_timestamp[next_opquad] = last_complete_timestamp;
next_opquad++;
if (next_opquad == NR_OPQUADS)
next_opquad = 0;
decode_timestamp++;
decode_buffer.nr_uops = 0;
}
/*The instruction is only of interest here if it's longer than 7 bytes, as that's the
limit on k5 short decoding*/
static int
codegen_timing_instr_length(uint64_t deps, uint32_t fetchdat, int op_32)
{
int len = prefixes + 1; /*Opcode*/
if (deps & MODRM) {
len++; /*ModR/M*/
if (deps & HAS_IMM8)
len++;
if (deps & HAS_IMM1632)
len += (op_32 & 0x100) ? 4 : 2;
if (op_32 & 0x200) {
if ((fetchdat & 7) == 4 && (fetchdat & 0xc0) != 0xc0) {
/* Has SIB*/
len++;
if ((fetchdat & 0xc0) == 0x40)
len++;
else if ((fetchdat & 0xc0) == 0x80)
len += 4;
else if ((fetchdat & 0x700) == 0x500)
len += 4;
} else {
if ((fetchdat & 0xc0) == 0x40)
len++;
else if ((fetchdat & 0xc0) == 0x80)
len += 4;
else if ((fetchdat & 0xc7) == 0x05)
len += 4;
}
} else {
if ((fetchdat & 0xc0) == 0x40)
len++;
else if ((fetchdat & 0xc0) == 0x80)
len += 2;
else if ((fetchdat & 0xc7) == 0x06)
len += 2;
}
}
return len;
}
static void
decode_instruction(const risc86_instruction_t *ins, uint64_t deps, uint32_t fetchdat, int op_32, int bit8)
{
uint32_t regmask_required;
uint32_t regmask_modified;
int c;
int d;
int earliest_start = 0;
decode_type_t decode_type = ins->decode_type;
int instr_length = codegen_timing_instr_length(deps, fetchdat, op_32);
/*Generate input register mask, and determine the earliest time this
instruction can start. This is not accurate, as this is calculated per
x86 instruction when it should be handled per uop*/
regmask_required = get_dstdep_mask(deps, fetchdat, bit8);
regmask_required |= get_addr_regmask(deps, fetchdat, op_32);
for (c = 0; c < 8; c++) {
if (regmask_required & (1 << c)) {
if (reg_available_timestamp[c] > decode_timestamp)
earliest_start = reg_available_timestamp[c];
}
}
if ((deps & FPU_RW_ST0) && fpu_st_timestamp[0] > decode_timestamp)
earliest_start = fpu_st_timestamp[0];
if ((deps & FPU_RW_ST1) && fpu_st_timestamp[1] > decode_timestamp)
earliest_start = fpu_st_timestamp[1];
if (deps & FPU_RW_STREG) {
int reg = fetchdat & 7;
if (fpu_st_timestamp[reg] > decode_timestamp)
earliest_start = fpu_st_timestamp[reg];
}
/*Short decoders are limited to 7 bytes*/
if (decode_type == DECODE_SHORT && instr_length > 7)
decode_type = DECODE_LONG;
/*Long decoder is limited to 11 bytes*/
else if (instr_length > 11)
decode_type = DECODE_VECTOR;
switch (decode_type) {
case DECODE_SHORT:
if (decode_buffer.nr_uops) {
decode_buffer.uops[decode_buffer.nr_uops] = &ins->uop[0];
decode_buffer.earliest_start[decode_buffer.nr_uops] = earliest_start;
if (ins->nr_uops > 1) {
decode_buffer.uops[decode_buffer.nr_uops + 1] = &ins->uop[1];
decode_buffer.earliest_start[decode_buffer.nr_uops + 1] = -1;
}
decode_buffer.nr_uops += ins->nr_uops;
decode_flush_k5();
} else {
decode_buffer.nr_uops = ins->nr_uops;
decode_buffer.uops[0] = &ins->uop[0];
decode_buffer.earliest_start[0] = earliest_start;
if (ins->nr_uops > 1) {
decode_buffer.uops[1] = &ins->uop[1];
decode_buffer.earliest_start[1] = -1;
}
}
break;
case DECODE_LONG:
if (decode_buffer.nr_uops)
decode_flush_k5();
decode_buffer.nr_uops = ins->nr_uops;
for (c = 0; c < ins->nr_uops; c++) {
decode_buffer.uops[c] = &ins->uop[c];
if (c == 0)
decode_buffer.earliest_start[c] = earliest_start;
else
decode_buffer.earliest_start[c] = -1;
}
decode_flush_k5();
break;
case DECODE_VECTOR:
if (decode_buffer.nr_uops)
decode_flush_k5();
decode_timestamp++;
d = 0;
for (c = 0; c < ins->nr_uops; c++) {
decode_buffer.uops[d] = &ins->uop[c];
if (c == 0)
decode_buffer.earliest_start[d] = earliest_start;
else
decode_buffer.earliest_start[d] = -1;
d++;
if (d == 4) {
d = 0;
decode_buffer.nr_uops = 4;
decode_flush_k5();
}
}
if (d) {
decode_buffer.nr_uops = d;
decode_flush_k5();
}
break;
}
/*Update write timestamps for any output registers*/
regmask_modified = get_dstdep_mask(deps, fetchdat, bit8);
for (c = 0; c < 8; c++) {
if (regmask_modified & (1 << c))
reg_available_timestamp[c] = last_complete_timestamp;
}
if (deps & FPU_POP) {
for (c = 0; c < 7; c++)
fpu_st_timestamp[c] = fpu_st_timestamp[c + 1];
fpu_st_timestamp[7] = 0;
}
if (deps & FPU_POP2) {
for (c = 0; c < 6; c++)
fpu_st_timestamp[c] = fpu_st_timestamp[c + 2];
fpu_st_timestamp[6] = fpu_st_timestamp[7] = 0;
}
if (deps & FPU_PUSH) {
for (c = 0; c < 7; c++)
fpu_st_timestamp[c + 1] = fpu_st_timestamp[c];
fpu_st_timestamp[0] = 0;
}
if (deps & FPU_WRITE_ST0)
fpu_st_timestamp[0] = last_complete_timestamp;
if (deps & FPU_WRITE_ST1)
fpu_st_timestamp[1] = last_complete_timestamp;
if (deps & FPU_WRITE_STREG) {
int reg = fetchdat & 7;
if (deps & FPU_POP)
reg--;
if (reg >= 0 && !(reg == 0 && (deps & FPU_WRITE_ST0)) && !(reg == 1 && (deps & FPU_WRITE_ST1)))
fpu_st_timestamp[reg] = last_complete_timestamp;
}
}
void
codegen_timing_k5_block_start(void)
{
int c;
for (c = 0; c < nr_units; c++)
units[c].first_available_cycle = 0;
mul_first_available_cycle = 0;
shift_first_available_cycle = 0;
m3dnow_first_available_cycle = 0;
decode_timestamp = 0;
last_complete_timestamp = 0;
for (c = 0; c < NR_OPQUADS; c++)
opquad_completion_timestamp[c] = 0;
next_opquad = 0;
for (c = 0; c < NR_REGS; c++)
reg_available_timestamp[c] = 0;
for (c = 0; c < 8; c++)
fpu_st_timestamp[c] = 0;
}
void
codegen_timing_k5_start(void)
{
if (cpu_s->cpu_type == CPU_K5) {
units = k5_units;
nr_units = NR_k5_UNITS;
} else {
units = k5_2_units;
nr_units = NR_k5_2_UNITS;
}
last_prefix = 0;
prefixes = 0;
}
void
codegen_timing_k5_prefix(uint8_t prefix, uint32_t fetchdat)
{
if (prefix != 0x0f)
decode_timestamp++;
last_prefix = prefix;
prefixes++;
}
void
codegen_timing_k5_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc)
{
const risc86_instruction_t **ins_table;
const uint64_t *deps;
int mod3 = ((fetchdat & 0xc0) == 0xc0);
int old_last_complete_timestamp = last_complete_timestamp;
int bit8 = !(opcode & 1);
switch (last_prefix) {
case 0x0f:
if (opcode == 0x0f) {
/*3DNow has the actual opcode after ModR/M, SIB and any offset*/
uint32_t opcode_pc = op_pc + 1; /*Byte after ModR/M*/
uint8_t modrm = fetchdat & 0xff;
uint8_t sib = (fetchdat >> 8) & 0xff;
if ((modrm & 0xc0) != 0xc0) {
if (op_32 & 0x200) {
if ((modrm & 7) == 4) {
/* Has SIB*/
opcode_pc++;
if ((modrm & 0xc0) == 0x40)
opcode_pc++;
else if ((modrm & 0xc0) == 0x80)
opcode_pc += 4;
else if ((sib & 0x07) == 0x05)
opcode_pc += 4;
} else {
if ((modrm & 0xc0) == 0x40)
opcode_pc++;
else if ((modrm & 0xc0) == 0x80)
opcode_pc += 4;
else if ((modrm & 0xc7) == 0x05)
opcode_pc += 4;
}
} else {
if ((modrm & 0xc0) == 0x40)
opcode_pc++;
else if ((modrm & 0xc0) == 0x80)
opcode_pc += 2;
else if ((modrm & 0xc7) == 0x06)
opcode_pc += 2;
}
}
opcode = fastreadb(cs + opcode_pc);
ins_table = mod3 ? opcode_timings_k5_0f0f_mod3 : opcode_timings_k5_0f0f;
deps = mod3 ? opcode_deps_0f0f_mod3 : opcode_deps_0f0f;
} else {
ins_table = mod3 ? opcode_timings_k5_0f_mod3 : opcode_timings_k5_0f;
deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
}
break;
case 0xd8:
ins_table = mod3 ? opcode_timings_k5_d8_mod3 : opcode_timings_k5_d8;
deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
opcode = (opcode >> 3) & 7;
break;
case 0xd9:
ins_table = mod3 ? opcode_timings_k5_d9_mod3 : opcode_timings_k5_d9;
deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
break;
case 0xda:
ins_table = mod3 ? opcode_timings_k5_da_mod3 : opcode_timings_k5_da;
deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
opcode = (opcode >> 3) & 7;
break;
case 0xdb:
ins_table = mod3 ? opcode_timings_k5_db_mod3 : opcode_timings_k5_db;
deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
break;
case 0xdc:
ins_table = mod3 ? opcode_timings_k5_dc_mod3 : opcode_timings_k5_dc;
deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
opcode = (opcode >> 3) & 7;
break;
case 0xdd:
ins_table = mod3 ? opcode_timings_k5_dd_mod3 : opcode_timings_k5_dd;
deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
opcode = (opcode >> 3) & 7;
break;
case 0xde:
ins_table = mod3 ? opcode_timings_k5_de_mod3 : opcode_timings_k5_de;
deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
opcode = (opcode >> 3) & 7;
break;
case 0xdf:
ins_table = mod3 ? opcode_timings_k5_df_mod3 : opcode_timings_k5_df;
deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
opcode = (opcode >> 3) & 7;
break;
default:
switch (opcode) {
case 0x80:
case 0x82:
ins_table = mod3 ? opcode_timings_k5_80_mod3 : opcode_timings_k5_80;
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
opcode = (fetchdat >> 3) & 7;
break;
case 0x81:
case 0x83:
ins_table = mod3 ? opcode_timings_k5_8x_mod3 : opcode_timings_k5_8x;
deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
opcode = (fetchdat >> 3) & 7;
break;
case 0xc0:
case 0xd0:
case 0xd2:
ins_table = mod3 ? opcode_timings_k5_shift_b_mod3 : opcode_timings_k5_shift_b;
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
opcode = (fetchdat >> 3) & 7;
break;
case 0xc1:
case 0xd1:
case 0xd3:
ins_table = mod3 ? opcode_timings_k5_shift_mod3 : opcode_timings_k5_shift;
deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
opcode = (fetchdat >> 3) & 7;
break;
case 0xf6:
ins_table = mod3 ? opcode_timings_k5_f6_mod3 : opcode_timings_k5_f6;
deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
opcode = (fetchdat >> 3) & 7;
break;
case 0xf7:
ins_table = mod3 ? opcode_timings_k5_f7_mod3 : opcode_timings_k5_f7;
deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
opcode = (fetchdat >> 3) & 7;
break;
case 0xff:
ins_table = mod3 ? opcode_timings_k5_ff_mod3 : opcode_timings_k5_ff;
deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
opcode = (fetchdat >> 3) & 7;
break;
default:
ins_table = mod3 ? opcode_timings_k5_mod3 : opcode_timings_k5;
deps = mod3 ? opcode_deps_mod3 : opcode_deps;
break;
}
}
if (ins_table[opcode])
decode_instruction(ins_table[opcode], deps[opcode], fetchdat, op_32, bit8);
else
decode_instruction(&vector_alu1_op, 0, fetchdat, op_32, bit8);
codegen_block_cycles += (last_complete_timestamp - old_last_complete_timestamp);
}
void
codegen_timing_k5_block_end(void)
{
if (decode_buffer.nr_uops) {
int old_last_complete_timestamp = last_complete_timestamp;
decode_flush_k5();
codegen_block_cycles += (last_complete_timestamp - old_last_complete_timestamp);
}
}
int
codegen_timing_k5_jump_cycles(void)
{
if (decode_buffer.nr_uops)
return 1;
return 0;
}
codegen_timing_t codegen_timing_k5 = {
codegen_timing_k5_start,
codegen_timing_k5_prefix,
codegen_timing_k5_opcode,
codegen_timing_k5_block_start,
codegen_timing_k5_block_end,
codegen_timing_k5_jump_cycles
};
``` | /content/code_sandbox/src/cpu/codegen_timing_k5.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 30,257 |
```objective-c
static int
opMOVZX_w_b_a16(uint32_t fetchdat)
{
uint8_t temp;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteab();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].w = (uint16_t) temp;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 0);
return 0;
}
static int
opMOVZX_w_b_a32(uint32_t fetchdat)
{
uint8_t temp;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteab();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].w = (uint16_t) temp;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 1);
return 0;
}
static int
opMOVZX_l_b_a16(uint32_t fetchdat)
{
uint8_t temp;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteab();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].l = (uint32_t) temp;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 0);
return 0;
}
static int
opMOVZX_l_b_a32(uint32_t fetchdat)
{
uint8_t temp;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteab();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].l = (uint32_t) temp;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 1);
return 0;
}
static int
opMOVZX_w_w_a16(uint32_t fetchdat)
{
uint16_t temp;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteaw();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].w = temp;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 0);
return 0;
}
static int
opMOVZX_w_w_a32(uint32_t fetchdat)
{
uint16_t temp;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteaw();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].w = temp;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 1);
return 0;
}
static int
opMOVZX_l_w_a16(uint32_t fetchdat)
{
uint16_t temp;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteaw();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].l = (uint32_t) temp;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 0);
return 0;
}
static int
opMOVZX_l_w_a32(uint32_t fetchdat)
{
uint16_t temp;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteaw();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].l = (uint32_t) temp;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 1);
return 0;
}
static int
opMOVSX_w_b_a16(uint32_t fetchdat)
{
uint8_t temp;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteab();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].w = (uint16_t) temp;
if (temp & 0x80)
cpu_state.regs[cpu_reg].w |= 0xff00;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 0);
return 0;
}
static int
opMOVSX_w_b_a32(uint32_t fetchdat)
{
uint8_t temp;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteab();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].w = (uint16_t) temp;
if (temp & 0x80)
cpu_state.regs[cpu_reg].w |= 0xff00;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 1);
return 0;
}
static int
opMOVSX_l_b_a16(uint32_t fetchdat)
{
uint8_t temp;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteab();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].l = (uint32_t) temp;
if (temp & 0x80)
cpu_state.regs[cpu_reg].l |= 0xffffff00;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 0);
return 0;
}
static int
opMOVSX_l_b_a32(uint32_t fetchdat)
{
uint8_t temp;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteab();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].l = (uint32_t) temp;
if (temp & 0x80)
cpu_state.regs[cpu_reg].l |= 0xffffff00;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 1);
return 0;
}
static int
opMOVSX_l_w_a16(uint32_t fetchdat)
{
uint16_t temp;
fetch_ea_16(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteaw();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].l = (uint32_t) temp;
if (temp & 0x8000)
cpu_state.regs[cpu_reg].l |= 0xffff0000;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 0);
return 0;
}
static int
opMOVSX_l_w_a32(uint32_t fetchdat)
{
uint16_t temp;
fetch_ea_32(fetchdat);
if (cpu_mod != 3)
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteaw();
if (cpu_state.abrt)
return 1;
cpu_state.regs[cpu_reg].l = (uint32_t) temp;
if (temp & 0x8000)
cpu_state.regs[cpu_reg].l |= 0xffff0000;
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 2, rmdat, (cpu_mod == 3) ? 0 : 1, 0, 0, 0, 1);
return 0;
}
``` | /content/code_sandbox/src/cpu/x86_ops_movx.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 2,145 |
```objective-c
static int
opPADDB_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] += src.b[0];
dst->b[1] += src.b[1];
dst->b[2] += src.b[2];
dst->b[3] += src.b[3];
dst->b[4] += src.b[4];
dst->b[5] += src.b[5];
dst->b[6] += src.b[6];
dst->b[7] += src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDB_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] += src.b[0];
dst->b[1] += src.b[1];
dst->b[2] += src.b[2];
dst->b[3] += src.b[3];
dst->b[4] += src.b[4];
dst->b[5] += src.b[5];
dst->b[6] += src.b[6];
dst->b[7] += src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] += src.w[0];
dst->w[1] += src.w[1];
dst->w[2] += src.w[2];
dst->w[3] += src.w[3];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] += src.w[0];
dst->w[1] += src.w[1];
dst->w[2] += src.w[2];
dst->w[3] += src.w[3];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDD_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->l[0] += src.l[0];
dst->l[1] += src.l[1];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDD_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->l[0] += src.l[0];
dst->l[1] += src.l[1];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDSB_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]);
dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]);
dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]);
dst->sb[3] = SSATB(dst->sb[3] + src.sb[3]);
dst->sb[4] = SSATB(dst->sb[4] + src.sb[4]);
dst->sb[5] = SSATB(dst->sb[5] + src.sb[5]);
dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]);
dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDSB_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]);
dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]);
dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]);
dst->sb[3] = SSATB(dst->sb[3] + src.sb[3]);
dst->sb[4] = SSATB(dst->sb[4] + src.sb[4]);
dst->sb[5] = SSATB(dst->sb[5] + src.sb[5]);
dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]);
dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDUSB_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = USATB(dst->b[0] + src.b[0]);
dst->b[1] = USATB(dst->b[1] + src.b[1]);
dst->b[2] = USATB(dst->b[2] + src.b[2]);
dst->b[3] = USATB(dst->b[3] + src.b[3]);
dst->b[4] = USATB(dst->b[4] + src.b[4]);
dst->b[5] = USATB(dst->b[5] + src.b[5]);
dst->b[6] = USATB(dst->b[6] + src.b[6]);
dst->b[7] = USATB(dst->b[7] + src.b[7]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDUSB_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = USATB(dst->b[0] + src.b[0]);
dst->b[1] = USATB(dst->b[1] + src.b[1]);
dst->b[2] = USATB(dst->b[2] + src.b[2]);
dst->b[3] = USATB(dst->b[3] + src.b[3]);
dst->b[4] = USATB(dst->b[4] + src.b[4]);
dst->b[5] = USATB(dst->b[5] + src.b[5]);
dst->b[6] = USATB(dst->b[6] + src.b[6]);
dst->b[7] = USATB(dst->b[7] + src.b[7]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDSW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]);
dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]);
dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]);
dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDSW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]);
dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]);
dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]);
dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDUSW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] = USATW(dst->w[0] + src.w[0]);
dst->w[1] = USATW(dst->w[1] + src.w[1]);
dst->w[2] = USATW(dst->w[2] + src.w[2]);
dst->w[3] = USATW(dst->w[3] + src.w[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPADDUSW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] = USATW(dst->w[0] + src.w[0]);
dst->w[1] = USATW(dst->w[1] + src.w[1]);
dst->w[2] = USATW(dst->w[2] + src.w[2]);
dst->w[3] = USATW(dst->w[3] + src.w[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMADDWD_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000)
dst->l[0] = 0x80000000;
else
dst->sl[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst->sw[1] * (int32_t) src.sw[1]);
if (dst->l[1] == 0x80008000 && src.l[1] == 0x80008000)
dst->l[1] = 0x80000000;
else
dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMADDWD_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000)
dst->l[0] = 0x80000000;
else
dst->sl[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst->sw[1] * (int32_t) src.sw[1]);
if (dst->l[1] == 0x80008000 && src.l[1] == 0x80008000)
dst->l[1] = 0x80000000;
else
dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMULLW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3)
src = MMX_GETREG(cpu_rm);
else {
SEG_CHECK_READ(cpu_state.ea_seg);
src.l[0] = readmeml(easeg, cpu_state.eaaddr);
src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
if (cpu_state.abrt)
return 0;
CLOCK_CYCLES(1);
}
dst->w[0] *= src.w[0];
dst->w[1] *= src.w[1];
dst->w[2] *= src.w[2];
dst->w[3] *= src.w[3];
CLOCK_CYCLES(1);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMULLW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3)
src = MMX_GETREG(cpu_rm);
else {
SEG_CHECK_READ(cpu_state.ea_seg);
src.l[0] = readmeml(easeg, cpu_state.eaaddr);
src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
if (cpu_state.abrt)
return 0;
CLOCK_CYCLES(1);
}
dst->w[0] *= src.w[0];
dst->w[1] *= src.w[1];
dst->w[2] *= src.w[2];
dst->w[3] *= src.w[3];
CLOCK_CYCLES(1);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMULHW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3)
src = MMX_GETREG(cpu_rm);
else {
SEG_CHECK_READ(cpu_state.ea_seg);
src.l[0] = readmeml(easeg, cpu_state.eaaddr);
src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
if (cpu_state.abrt)
return 0;
CLOCK_CYCLES(1);
}
dst->w[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) >> 16;
dst->w[1] = ((int32_t) dst->sw[1] * (int32_t) src.sw[1]) >> 16;
dst->w[2] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) >> 16;
dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16;
CLOCK_CYCLES(1);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPMULHW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
if (cpu_mod == 3)
src = MMX_GETREG(cpu_rm);
else {
SEG_CHECK_READ(cpu_state.ea_seg);
src.l[0] = readmeml(easeg, cpu_state.eaaddr);
src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4);
if (cpu_state.abrt)
return 0;
CLOCK_CYCLES(1);
}
dst->w[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) >> 16;
dst->w[1] = ((int32_t) dst->sw[1] * (int32_t) src.sw[1]) >> 16;
dst->w[2] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) >> 16;
dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16;
CLOCK_CYCLES(1);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBB_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] -= src.b[0];
dst->b[1] -= src.b[1];
dst->b[2] -= src.b[2];
dst->b[3] -= src.b[3];
dst->b[4] -= src.b[4];
dst->b[5] -= src.b[5];
dst->b[6] -= src.b[6];
dst->b[7] -= src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBB_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] -= src.b[0];
dst->b[1] -= src.b[1];
dst->b[2] -= src.b[2];
dst->b[3] -= src.b[3];
dst->b[4] -= src.b[4];
dst->b[5] -= src.b[5];
dst->b[6] -= src.b[6];
dst->b[7] -= src.b[7];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] -= src.w[0];
dst->w[1] -= src.w[1];
dst->w[2] -= src.w[2];
dst->w[3] -= src.w[3];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] -= src.w[0];
dst->w[1] -= src.w[1];
dst->w[2] -= src.w[2];
dst->w[3] -= src.w[3];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBD_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->l[0] -= src.l[0];
dst->l[1] -= src.l[1];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBD_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->l[0] -= src.l[0];
dst->l[1] -= src.l[1];
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBSB_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]);
dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]);
dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]);
dst->sb[3] = SSATB(dst->sb[3] - src.sb[3]);
dst->sb[4] = SSATB(dst->sb[4] - src.sb[4]);
dst->sb[5] = SSATB(dst->sb[5] - src.sb[5]);
dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]);
dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBSB_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]);
dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]);
dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]);
dst->sb[3] = SSATB(dst->sb[3] - src.sb[3]);
dst->sb[4] = SSATB(dst->sb[4] - src.sb[4]);
dst->sb[5] = SSATB(dst->sb[5] - src.sb[5]);
dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]);
dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBUSB_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = USATB(dst->b[0] - src.b[0]);
dst->b[1] = USATB(dst->b[1] - src.b[1]);
dst->b[2] = USATB(dst->b[2] - src.b[2]);
dst->b[3] = USATB(dst->b[3] - src.b[3]);
dst->b[4] = USATB(dst->b[4] - src.b[4]);
dst->b[5] = USATB(dst->b[5] - src.b[5]);
dst->b[6] = USATB(dst->b[6] - src.b[6]);
dst->b[7] = USATB(dst->b[7] - src.b[7]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBUSB_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = USATB(dst->b[0] - src.b[0]);
dst->b[1] = USATB(dst->b[1] - src.b[1]);
dst->b[2] = USATB(dst->b[2] - src.b[2]);
dst->b[3] = USATB(dst->b[3] - src.b[3]);
dst->b[4] = USATB(dst->b[4] - src.b[4]);
dst->b[5] = USATB(dst->b[5] - src.b[5]);
dst->b[6] = USATB(dst->b[6] - src.b[6]);
dst->b[7] = USATB(dst->b[7] - src.b[7]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBSW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]);
dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]);
dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]);
dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBSW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]);
dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]);
dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]);
dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBUSW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] = USATW(dst->w[0] - src.w[0]);
dst->w[1] = USATW(dst->w[1] - src.w[1]);
dst->w[2] = USATW(dst->w[2] - src.w[2]);
dst->w[3] = USATW(dst->w[3] - src.w[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPSUBUSW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] = USATW(dst->w[0] - src.w[0]);
dst->w[1] = USATW(dst->w[1] - src.w[1]);
dst->w[2] = USATW(dst->w[2] - src.w[2]);
dst->w[3] = USATW(dst->w[3] - src.w[3]);
MMX_SETEXP(cpu_reg);
return 0;
}
``` | /content/code_sandbox/src/cpu/x86_ops_mmx_arith.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 6,701 |
```objective-c
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* x87 FPU instructions core.
*
*
*
* Authors: Sarah Walker, <path_to_url
* Miran Grca, <mgrca8@gmail.com>
*
*/
static int
opFILDiw_a16(uint32_t fetchdat)
{
int16_t temp;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteaw();
if (cpu_state.abrt)
return 1;
x87_push((double) temp);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_16) : (x87_timings.fild_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_16) : (x87_concurrency.fild_16 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
opFILDiw_a32(uint32_t fetchdat)
{
int16_t temp;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
temp = geteaw();
if (cpu_state.abrt)
return 1;
x87_push((double) temp);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_16) : (x87_timings.fild_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_16) : (x87_concurrency.fild_16 * cpu_multi));
return 0;
}
#endif
static int
opFISTiw_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw(x87_fround16(ST(0)));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
return cpu_state.abrt;
}
#ifndef FPU_8087
static int
opFISTiw_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw(x87_fround16(ST(0)));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
return cpu_state.abrt;
}
#endif
static int
opFISTPiw_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw(x87_fround16(ST(0)));
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
opFISTPiw_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteaw(x87_fround16(ST(0)));
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
return 0;
}
#endif
static int
opFILDiq_a16(uint32_t fetchdat)
{
int64_t temp64;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
temp64 = geteaq();
if (cpu_state.abrt)
return 1;
x87_push((double) temp64);
cpu_state.MM[cpu_state.TOP & 7].q = temp64;
FP_TAG_DEFAULT;
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_64) : (x87_timings.fild_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_64) : (x87_concurrency.fild_64 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
opFILDiq_a32(uint32_t fetchdat)
{
int64_t temp64;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
temp64 = geteaq();
if (cpu_state.abrt)
return 1;
x87_push((double) temp64);
cpu_state.MM[cpu_state.TOP & 7].q = temp64;
FP_TAG_DEFAULT;
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_64) : (x87_timings.fild_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_64) : (x87_concurrency.fild_64 * cpu_multi));
return 0;
}
#endif
static int
FBLD_a16(uint32_t fetchdat)
{
uint16_t load_reg_hi = 0xffff;
uint64_t load_reg_lo = BX_CONST64(0xC000000000000000);
int64_t load_val = 0ULL;
uint64_t power;
int sign;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
load_reg_lo = readmemq(easeg, cpu_state.eaaddr);
load_reg_hi = readmemw(easeg, cpu_state.eaaddr + 8);
if (cpu_state.abrt)
return 1;
clear_C1();
sign = (load_reg_hi & 0x8000) != 0;
load_val = 0ULL;
power = 1;
for (int i = 0; i < 16; i++) {
load_val += ((uint64_t) (load_reg_lo & 0xf)) * power;
load_reg_lo >>= 4;
power *= 10;
}
for (int i = 0; i < 2; i++) {
load_val += ((uint64_t) (load_reg_hi & 0xf)) * power;
load_reg_hi >>= 4;
power *= 10;
}
if (sign)
load_val = -load_val;
x87_push((double) load_val);
cpu_state.MM[cpu_state.TOP & 7].q = load_val;
FP_TAG_DEFAULT;
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_64) : (x87_timings.fild_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_64) : (x87_concurrency.fild_64 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
FBLD_a32(uint32_t fetchdat)
{
uint16_t load_reg_hi = 0xffff;
uint64_t load_reg_lo = BX_CONST64(0xC000000000000000);
int64_t load_val = 0ULL;
uint64_t power;
int sign;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
load_reg_lo = readmemq(easeg, cpu_state.eaaddr);
load_reg_hi = readmemw(easeg, cpu_state.eaaddr + 8);
if (cpu_state.abrt)
return 1;
clear_C1();
sign = (load_reg_hi & 0x8000) != 0;
load_val = 0ULL;
power = 1;
for (int i = 0; i < 16; i++) {
load_val += ((uint64_t) (load_reg_lo & 0xf)) * power;
load_reg_lo >>= 4;
power *= 10;
}
for (int i = 0; i < 2; i++) {
load_val += ((uint64_t) (load_reg_hi & 0xf)) * power;
load_reg_hi >>= 4;
power *= 10;
}
if (sign)
load_val = -load_val;
x87_push((double) load_val);
cpu_state.MM[cpu_state.TOP & 7].q = load_val;
FP_TAG_DEFAULT;
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_64) : (x87_timings.fild_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_64) : (x87_concurrency.fild_64 * cpu_multi));
return 0;
}
#endif
static int
FBSTP_a16(uint32_t fetchdat)
{
double dt;
double tempd;
int c;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
tempd = ST(0);
if (tempd < 0.0)
tempd = -tempd;
for (c = 0; c < 9; c++) {
dt = floor(fmod(tempd, 10.0));
uint8_t tempc = (uint8_t) dt;
tempd -= floor(fmod(tempd, 10.0));
tempd /= 10.0;
dt = floor(fmod(tempd, 10.0));
tempc |= ((uint8_t) dt) << 4;
tempd -= floor(fmod(tempd, 10.0));
tempd /= 10.0;
writememb(easeg, cpu_state.eaaddr + c, tempc);
}
dt = floor(fmod(tempd, 10.0));
tempc = (uint8_t) dt;
if (ST(0) < 0.0)
tempc |= 0x80;
writememb(easeg, cpu_state.eaaddr + 9, tempc);
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fbstp) : (x87_timings.fbstp * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fbstp) : (x87_concurrency.fbstp * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
FBSTP_a32(uint32_t fetchdat)
{
double tempd;
int c;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
tempd = ST(0);
if (tempd < 0.0)
tempd = -tempd;
for (c = 0; c < 9; c++) {
uint8_t tempc = (uint8_t) floor(fmod(tempd, 10.0));
tempd -= floor(fmod(tempd, 10.0));
tempd /= 10.0;
tempc |= ((uint8_t) floor(fmod(tempd, 10.0))) << 4;
tempd -= floor(fmod(tempd, 10.0));
tempd /= 10.0;
writememb(easeg, cpu_state.eaaddr + c, tempc);
}
tempc = (uint8_t) floor(fmod(tempd, 10.0));
if (ST(0) < 0.0)
tempc |= 0x80;
writememb(easeg, cpu_state.eaaddr + 9, tempc);
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fbstp) : (x87_timings.fbstp * cpu_multi));
return 0;
}
#endif
static int
FISTPiq_a16(uint32_t fetchdat)
{
int64_t temp64;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (cpu_state.tag[cpu_state.TOP & 7] & TAG_UINT64)
temp64 = cpu_state.MM[cpu_state.TOP & 7].q;
else
temp64 = x87_fround(ST(0));
seteaq(temp64);
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_64) : (x87_timings.fist_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_64) : (x87_concurrency.fist_64 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
FISTPiq_a32(uint32_t fetchdat)
{
int64_t temp64;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (cpu_state.tag[cpu_state.TOP & 7] & TAG_UINT64)
temp64 = cpu_state.MM[cpu_state.TOP & 7].q;
else
temp64 = x87_fround(ST(0));
seteaq(temp64);
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_64) : (x87_timings.fist_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_64) : (x87_concurrency.fist_64 * cpu_multi));
return 0;
}
#endif
static int
opFILDil_a16(uint32_t fetchdat)
{
int32_t templ;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
templ = geteal();
if (cpu_state.abrt)
return 1;
x87_push((double) templ);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_32) : (x87_timings.fild_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_32) : (x87_concurrency.fild_32 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
opFILDil_a32(uint32_t fetchdat)
{
int32_t templ;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
templ = geteal();
if (cpu_state.abrt)
return 1;
x87_push((double) templ);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_32) : (x87_timings.fild_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_32) : (x87_concurrency.fild_32 * cpu_multi));
return 0;
}
#endif
static int
opFISTil_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteal(x87_fround32(ST(0)));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
return cpu_state.abrt;
}
#ifndef FPU_8087
static int
opFISTil_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteal(x87_fround32(ST(0)));
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
return cpu_state.abrt;
}
#endif
static int
opFISTPil_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteal(x87_fround32(ST(0)));
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
opFISTPil_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
seteal(x87_fround32(ST(0)));
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
return 0;
}
#endif
static int
opFLDe_a16(uint32_t fetchdat)
{
double t;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
t = x87_ld80();
if (cpu_state.abrt)
return 1;
x87_push(t);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
opFLDe_a32(uint32_t fetchdat)
{
double t;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
t = x87_ld80();
if (cpu_state.abrt)
return 1;
x87_push(t);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
return 0;
}
#endif
static int
opFSTPe_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
x87_st80(ST(0));
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
opFSTPe_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
x87_st80(ST(0));
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
return 0;
}
#endif
static int
opFLDd_a16(uint32_t fetchdat)
{
x87_td t;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
t.i = geteaq();
if (cpu_state.abrt)
return 1;
x87_push(t.d);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_64) : (x87_timings.fld_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_64) : (x87_concurrency.fld_64 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
opFLDd_a32(uint32_t fetchdat)
{
x87_td t;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
t.i = geteaq();
if (cpu_state.abrt)
return 1;
x87_push(t.d);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_64) : (x87_timings.fld_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_64) : (x87_concurrency.fld_64 * cpu_multi));
return 0;
}
#endif
static int
opFSTd_a16(uint32_t fetchdat)
{
x87_td t;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
t.d = ST(0);
seteaq(t.i);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
return cpu_state.abrt;
}
#ifndef FPU_8087
static int
opFSTd_a32(uint32_t fetchdat)
{
x87_td t;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
t.d = ST(0);
seteaq(t.i);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
return cpu_state.abrt;
}
#endif
static int
opFSTPd_a16(uint32_t fetchdat)
{
x87_td t;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
t.d = ST(0);
seteaq(t.i);
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
opFSTPd_a32(uint32_t fetchdat)
{
x87_td t;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
t.d = ST(0);
seteaq(t.i);
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
return 0;
}
#endif
static int
opFLDs_a16(uint32_t fetchdat)
{
x87_ts ts;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
ts.i = geteal();
if (cpu_state.abrt)
return 1;
x87_push((double) ts.s);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
opFLDs_a32(uint32_t fetchdat)
{
x87_ts ts;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
ts.i = geteal();
if (cpu_state.abrt)
return 1;
x87_push((double) ts.s);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return 0;
}
#endif
static int
opFSTs_a16(uint32_t fetchdat)
{
x87_ts ts;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
ts.s = (float) ST(0);
seteal(ts.i);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return cpu_state.abrt;
}
#ifndef FPU_8087
static int
opFSTs_a32(uint32_t fetchdat)
{
x87_ts ts;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
ts.s = (float) ST(0);
seteal(ts.i);
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return cpu_state.abrt;
}
#endif
static int
opFSTPs_a16(uint32_t fetchdat)
{
x87_ts ts;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
ts.s = (float) ST(0);
seteal(ts.i);
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return 0;
}
#ifndef FPU_8087
static int
opFSTPs_a32(uint32_t fetchdat)
{
x87_ts ts;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
ts.s = (float) ST(0);
seteal(ts.i);
if (cpu_state.abrt)
return 1;
x87_pop();
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
return 0;
}
#endif
``` | /content/code_sandbox/src/cpu/x87_ops_loadstore.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 7,191 |
```objective-c
static int
opPCMPEQB_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0;
dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0;
dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0;
dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPCMPEQB_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0;
dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0;
dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0;
dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPCMPGTB_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0;
dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0;
dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0;
dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPCMPGTB_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0;
dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0;
dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0;
dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPCMPEQW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPCMPEQW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPCMPGTW_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPCMPGTW_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPCMPEQD_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPCMPEQD_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPCMPGTD_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
static int
opPCMPGTD_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = MMX_GETREGP(cpu_reg);
MMX_GETSRC();
dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
MMX_SETEXP(cpu_reg);
return 0;
}
``` | /content/code_sandbox/src/cpu/x86_ops_mmx_cmp.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 2,547 |
```objective-c
#define sf_FPU(name, optype, a_size, load_var, rw, use_var, is_nan, cycle_postfix) \
static int sf_FADD##name##_a##a_size(uint32_t fetchdat) \
{ \
floatx80 a, result; \
struct softfloat_status_t status; \
optype temp; \
FP_ENTER(); \
FPU_check_pending_exceptions(); \
fetch_ea_##a_size(fetchdat); \
SEG_CHECK_READ(cpu_state.ea_seg); \
load_var = rw; \
if (cpu_state.abrt) \
return 1; \
clear_C1(); \
if (IS_TAG_EMPTY(0)) { \
FPU_stack_underflow(fetchdat, 0, 0); \
goto next_ins; \
} \
status = i387cw_to_softfloat_status_word(i387_get_control_word()); \
a = FPU_read_regi(0); \
if (!is_nan) \
result = extF80_add(a, use_var, &status); \
\
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) \
FPU_save_regi(result, 0); \
\
next_ins: \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd##cycle_postfix) : ((x87_timings.fadd##cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd##cycle_postfix) : ((x87_concurrency.fadd##cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int sf_FDIV##name##_a##a_size(uint32_t fetchdat) \
{ \
floatx80 a, result; \
struct softfloat_status_t status; \
optype temp; \
FP_ENTER(); \
FPU_check_pending_exceptions(); \
fetch_ea_##a_size(fetchdat); \
SEG_CHECK_READ(cpu_state.ea_seg); \
load_var = rw; \
if (cpu_state.abrt) \
return 1; \
clear_C1(); \
if (IS_TAG_EMPTY(0)) { \
FPU_stack_underflow(fetchdat, 0, 0); \
goto next_ins; \
} \
status = i387cw_to_softfloat_status_word(i387_get_control_word()); \
a = FPU_read_regi(0); \
if (!is_nan) { \
result = extF80_div(a, use_var, &status); \
} \
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) \
FPU_save_regi(result, 0); \
\
next_ins: \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv##cycle_postfix) : ((x87_timings.fdiv##cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd##cycle_postfix) : ((x87_concurrency.fadd##cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int sf_FDIVR##name##_a##a_size(uint32_t fetchdat) \
{ \
floatx80 a, result; \
struct softfloat_status_t status; \
optype temp; \
FP_ENTER(); \
FPU_check_pending_exceptions(); \
fetch_ea_##a_size(fetchdat); \
SEG_CHECK_READ(cpu_state.ea_seg); \
load_var = rw; \
if (cpu_state.abrt) \
return 1; \
clear_C1(); \
if (IS_TAG_EMPTY(0)) { \
FPU_stack_underflow(fetchdat, 0, 0); \
goto next_ins; \
} \
status = i387cw_to_softfloat_status_word(i387_get_control_word()); \
a = FPU_read_regi(0); \
if (!is_nan) { \
result = extF80_div(use_var, a, &status); \
} \
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) \
FPU_save_regi(result, 0); \
\
next_ins: \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv##cycle_postfix) : ((x87_timings.fdiv##cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv##cycle_postfix) : ((x87_concurrency.fdiv##cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int sf_FMUL##name##_a##a_size(uint32_t fetchdat) \
{ \
floatx80 a, result; \
struct softfloat_status_t status; \
optype temp; \
FP_ENTER(); \
FPU_check_pending_exceptions(); \
fetch_ea_##a_size(fetchdat); \
SEG_CHECK_READ(cpu_state.ea_seg); \
load_var = rw; \
if (cpu_state.abrt) \
return 1; \
clear_C1(); \
if (IS_TAG_EMPTY(0)) { \
FPU_stack_underflow(fetchdat, 0, 0); \
goto next_ins; \
} \
status = i387cw_to_softfloat_status_word(i387_get_control_word()); \
a = FPU_read_regi(0); \
if (!is_nan) { \
result = extF80_mul(a, use_var, &status); \
} \
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) \
FPU_save_regi(result, 0); \
\
next_ins: \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fmul##cycle_postfix) : ((x87_timings.fmul##cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fmul##cycle_postfix) : ((x87_concurrency.fmul##cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int sf_FSUB##name##_a##a_size(uint32_t fetchdat) \
{ \
floatx80 a, result; \
struct softfloat_status_t status; \
optype temp; \
FP_ENTER(); \
FPU_check_pending_exceptions(); \
fetch_ea_##a_size(fetchdat); \
SEG_CHECK_READ(cpu_state.ea_seg); \
load_var = rw; \
if (cpu_state.abrt) \
return 1; \
clear_C1(); \
if (IS_TAG_EMPTY(0)) { \
FPU_stack_underflow(fetchdat, 0, 0); \
goto next_ins; \
} \
status = i387cw_to_softfloat_status_word(i387_get_control_word()); \
a = FPU_read_regi(0); \
if (!is_nan) \
result = extF80_sub(a, use_var, &status); \
\
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) \
FPU_save_regi(result, 0); \
\
next_ins: \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd##cycle_postfix) : ((x87_timings.fadd##cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd##cycle_postfix) : ((x87_concurrency.fadd##cycle_postfix) * cpu_multi)); \
return 0; \
} \
static int sf_FSUBR##name##_a##a_size(uint32_t fetchdat) \
{ \
floatx80 a, result; \
struct softfloat_status_t status; \
optype temp; \
FP_ENTER(); \
FPU_check_pending_exceptions(); \
fetch_ea_##a_size(fetchdat); \
SEG_CHECK_READ(cpu_state.ea_seg); \
load_var = rw; \
if (cpu_state.abrt) \
return 1; \
clear_C1(); \
if (IS_TAG_EMPTY(0)) { \
FPU_stack_underflow(fetchdat, 0, 0); \
goto next_ins; \
} \
status = i387cw_to_softfloat_status_word(i387_get_control_word()); \
a = FPU_read_regi(0); \
if (!is_nan) \
result = extF80_sub(use_var, a, &status); \
\
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) \
FPU_save_regi(result, 0); \
\
next_ins: \
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd##cycle_postfix) : ((x87_timings.fadd##cycle_postfix) * cpu_multi)); \
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd##cycle_postfix) : ((x87_concurrency.fadd##cycle_postfix) * cpu_multi)); \
return 0; \
}
// clang-format off
sf_FPU(s, float32, 16, temp, geteal(), f32_to_extF80(temp, &status), FPU_handle_NaN32(a, temp, &result, &status), _32)
#ifndef FPU_8087
sf_FPU(s, float32, 32, temp, geteal(), f32_to_extF80(temp, &status), FPU_handle_NaN32(a, temp, &result, &status), _32)
#endif
sf_FPU(d, float64, 16, temp, geteaq(), f64_to_extF80(temp, &status), FPU_handle_NaN64(a, temp, &result, &status), _64)
#ifndef FPU_8087
sf_FPU(d, float64, 32, temp, geteaq(), f64_to_extF80(temp, &status), FPU_handle_NaN64(a, temp, &result, &status), _64)
#endif
sf_FPU(iw, uint16_t, 16, temp, geteaw(), i32_to_extF80((int16_t)temp), 0, _i16)
#ifndef FPU_8087
sf_FPU(iw, uint16_t, 32, temp, geteaw(), i32_to_extF80((int16_t)temp), 0, _i16)
#endif
sf_FPU(il, uint32_t, 16, temp, geteal(), i32_to_extF80((int32_t)temp), 0, _i32)
#ifndef FPU_8087
sf_FPU(il, uint32_t, 32, temp, geteal(), i32_to_extF80((int32_t)temp), 0, _i32)
#endif
// clang-format on
static int sf_FADD_st0_stj(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, 0, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(0);
b = FPU_read_regi(fetchdat & 7);
result = extF80_add(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0))
FPU_save_regi(result, 0);
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int
sf_FADD_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(fetchdat & 7);
b = FPU_read_regi(0);
result = extF80_add(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0))
FPU_save_regi(result, fetchdat & 7);
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int
sf_FADDP_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 1);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(fetchdat & 7);
b = FPU_read_regi(0);
result = extF80_add(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, fetchdat & 7);
FPU_pop();
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int
sf_FDIV_st0_stj(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, 0, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(0);
b = FPU_read_regi(fetchdat & 7);
result = extF80_div(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0))
FPU_save_regi(result, 0);
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
static int
sf_FDIV_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(fetchdat & 7);
b = FPU_read_regi(0);
result = extF80_div(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0))
FPU_save_regi(result, fetchdat & 7);
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
static int
sf_FDIVP_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 1);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(fetchdat & 7);
b = FPU_read_regi(0);
result = extF80_div(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, fetchdat & 7);
FPU_pop();
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
static int
sf_FDIVR_st0_stj(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, 0, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(fetchdat & 7);
b = FPU_read_regi(0);
result = extF80_div(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0))
FPU_save_regi(result, 0);
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
static int
sf_FDIVR_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(0);
b = FPU_read_regi(fetchdat & 7);
result = extF80_div(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0))
FPU_save_regi(result, fetchdat & 7);
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
static int
sf_FDIVRP_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 1);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(0);
b = FPU_read_regi(fetchdat & 7);
result = extF80_div(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, fetchdat & 7);
FPU_pop();
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fdiv) : (x87_timings.fdiv * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fdiv) : (x87_concurrency.fdiv * cpu_multi));
return 0;
}
static int
sf_FMUL_st0_stj(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, 0, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(0);
b = FPU_read_regi(fetchdat & 7);
result = extF80_mul(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, 0);
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fmul) : (x87_timings.fmul * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fmul) : (x87_concurrency.fmul * cpu_multi));
return 0;
}
static int
sf_FMUL_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(0);
b = FPU_read_regi(fetchdat & 7);
result = extF80_mul(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, fetchdat & 7);
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fmul) : (x87_timings.fmul * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fmul) : (x87_concurrency.fmul * cpu_multi));
return 0;
}
static int
sf_FMULP_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 1);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(fetchdat & 7);
b = FPU_read_regi(0);
result = extF80_mul(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, fetchdat & 7);
FPU_pop();
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fmul) : (x87_timings.fmul * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fmul) : (x87_concurrency.fmul * cpu_multi));
return 0;
}
static int
sf_FSUB_st0_stj(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, 0, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(0);
b = FPU_read_regi(fetchdat & 7);
result = extF80_sub(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, 0);
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int
sf_FSUB_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(fetchdat & 7);
b = FPU_read_regi(0);
result = extF80_sub(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, fetchdat & 7);
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int
sf_FSUBP_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 1);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(fetchdat & 7);
b = FPU_read_regi(0);
result = extF80_sub(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, fetchdat & 7);
FPU_pop();
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int
sf_FSUBR_st0_stj(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, 0, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(fetchdat & 7);
b = FPU_read_regi(0);
result = extF80_sub(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, 0);
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int
sf_FSUBR_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(0);
b = FPU_read_regi(fetchdat & 7);
result = extF80_sub(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, fetchdat & 7);
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int
sf_FSUBRP_sti_st0(uint32_t fetchdat)
{
floatx80 a;
floatx80 b;
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(fetchdat & 7)) {
FPU_stack_underflow(fetchdat, fetchdat & 7, 1);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
a = FPU_read_regi(0);
b = FPU_read_regi(fetchdat & 7);
result = extF80_sub(a, b, &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, fetchdat & 7);
FPU_pop();
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fadd) : (x87_timings.fadd * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fadd) : (x87_concurrency.fadd * cpu_multi));
return 0;
}
static int
sf_FSQRT(uint32_t fetchdat)
{
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0)) {
FPU_stack_underflow(fetchdat, 0, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
result = extF80_sqrt(FPU_read_regi(0), &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, 0);
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fsqrt) : (x87_timings.fsqrt * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fsqrt) : (x87_concurrency.fsqrt * cpu_multi));
return 0;
}
static int
sf_FRNDINT(uint32_t fetchdat)
{
floatx80 result;
struct softfloat_status_t status;
FP_ENTER();
FPU_check_pending_exceptions();
cpu_state.pc++;
clear_C1();
if (IS_TAG_EMPTY(0)) {
FPU_stack_underflow(fetchdat, 0, 0);
goto next_ins;
}
status = i387cw_to_softfloat_status_word(i387_get_control_word());
result = extF80_roundToInt_normal(FPU_read_regi(0), &status);
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
FPU_save_regi(result, 0);
}
next_ins:
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
return 0;
}
``` | /content/code_sandbox/src/cpu/x87_ops_sf_arith.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 8,547 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
/*your_sha256_hash------------
| Extracts the mantissa of half-precision floating-point value 'a' and
| returns the result as a half-precision floating-point after applying
| the mantissa interval normalization and sign control. The operation is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic.
*your_sha256_hash------------*/
float16 f16_getMant(float16 a, struct softfloat_status_t *status, int sign_ctrl, int interv)
{
bool signA;
int8_t expA;
uint16_t sigA;
struct exp8_sig16 normExpSig;
signA = signF16UI(a);
expA = expF16UI(a);
sigA = fracF16UI(a);
if (expA == 0x1F) {
if (sigA) return softfloat_propagateNaNF16UI(a, 0, status);
if (signA) {
if (sign_ctrl & 0x2) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return defaultNaNF16UI;
}
}
return packToF16UI(~sign_ctrl & signA, 0x1F, 0);
}
if (! expA && (! sigA || softfloat_denormalsAreZeros(status))) {
return packToF16UI(~sign_ctrl & signA, 0x1F, 0);
}
if (signA) {
if (sign_ctrl & 0x2) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return defaultNaNF16UI;
}
}
if (expA == 0) {
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalF16Sig(sigA);
expA = normExpSig.exp;
sigA = normExpSig.sig;
sigA &= 0x3ff;
}
switch(interv) {
case 0x0: // interval [1,2)
expA = 0xF;
break;
case 0x1: // interval [1/2,2)
expA -= 0xF;
expA = 0xF - (expA & 0x1);
break;
case 0x2: // interval [1/2,1)
expA = 0xE;
break;
case 0x3: // interval [3/4,3/2)
expA = 0xF - ((sigA >> 9) & 0x1);
break;
}
return packToF16UI(~sign_ctrl & signA, expA, sigA);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f16_getMant.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 947 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
float128_t softfloat_normRoundPackToF128(bool sign, int32_t exp, uint64_t sig64, uint64_t sig0, struct softfloat_status_t *status)
{
int8_t shiftDist;
struct uint128 sig128;
uint64_t sigExtra;
struct uint128_extra sig128Extra;
float128_t z;
if (! sig64) {
exp -= 64;
sig64 = sig0;
sig0 = 0;
}
shiftDist = softfloat_countLeadingZeros64(sig64) - 15;
exp -= shiftDist;
if (0 <= shiftDist) {
if (shiftDist) {
sig128 = softfloat_shortShiftLeft128(sig64, sig0, shiftDist);
sig64 = sig128.v64;
sig0 = sig128.v0;
}
if ((uint32_t) exp < 0x7FFD) {
z.v64 = packToF128UI64(sign, sig64 | sig0 ? exp : 0, sig64);
z.v0 = sig0;
return z;
}
sigExtra = 0;
} else {
sig128Extra = softfloat_shortShiftRightJam128Extra(sig64, sig0, 0, -shiftDist);
sig64 = sig128Extra.v.v64;
sig0 = sig128Extra.v.v0;
sigExtra = sig128Extra.extra;
}
return softfloat_roundPackToF128(sign, exp, sig64, sig0, sigExtra, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_normRoundPackToF128.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 682 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
#include "softfloat.h"
uint32_t
extF80_to_ui32(extFloat80_t a, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
uint16_t uiA64;
bool sign;
int32_t exp;
uint64_t sig;
int32_t shiftDist;
// handle unsupported extended double-precision floating encodings
if (extF80_isUnsupported(a)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return ui32_fromNaN;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.signExp;
sign = signExtF80UI64(uiA64);
exp = expExtF80UI64(uiA64);
sig = a.signif;
/*your_sha256_hash--------
*your_sha256_hash--------*/
#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow)
if ((exp == 0x7FFF) && (sig & UINT64_C(0x7FFFFFFFFFFFFFFF))) {
#if (ui32_fromNaN == ui32_fromPosOverflow)
sign = 0;
#elif (ui32_fromNaN == ui32_fromNegOverflow)
sign = 1;
#else
softfloat_raiseFlags(status, softfloat_flag_invalid);
return ui32_fromNaN;
#endif
}
#endif
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x4032 - exp;
if (shiftDist <= 0) shiftDist = 1;
sig = softfloat_shiftRightJam64(sig, shiftDist);
return softfloat_roundToUI32(sign, sig, roundingMode, exact, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/extF80_to_ui32.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 734 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "softfloat_types.h"
#ifndef softfloat_shortShiftRight128
struct uint128
softfloat_shortShiftRight128(uint64_t a64, uint64_t a0, uint8_t dist)
{
struct uint128 z;
z.v64 = a64>>dist;
z.v0 = a64<<(-dist & 63) | a0>>dist;
return z;
}
#endif
``` | /content/code_sandbox/src/cpu/softfloat3e/s_shortShiftRight128.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 418 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
#include "specialize.h"
float32 f32_mulAdd(float32 a, float32 b, float32 c, uint8_t op, struct softfloat_status_t *status)
{
bool signA;
int16_t expA;
uint32_t sigA;
bool signB;
int16_t expB;
uint32_t sigB;
bool signC;
int16_t expC;
uint32_t sigC;
bool signProd;
uint32_t magBits, uiA, uiB, uiC, uiZ;
struct exp16_sig32 normExpSig;
int16_t expProd;
uint64_t sigProd;
bool signZ;
int16_t expZ;
uint32_t sigZ;
int16_t expDiff;
uint64_t sig64Z, sig64C;
int8_t shiftDist;
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA = a;
uiB = b;
uiC = c;
/*your_sha256_hash--------
*your_sha256_hash--------*/
signA = signF32UI(uiA);
expA = expF32UI(uiA);
sigA = fracF32UI(uiA);
signB = signF32UI(uiB);
expB = expF32UI(uiB);
sigB = fracF32UI(uiB);
signC = signF32UI(uiC) ^ ((op & softfloat_mulAdd_subC) != 0);
expC = expF32UI(uiC);
sigC = fracF32UI(uiC);
signProd = signA ^ signB ^ ((op & softfloat_mulAdd_subProd) != 0);
/*your_sha256_hash--------
*your_sha256_hash--------*/
bool aisNaN = (expA == 0xFF) && sigA;
bool bisNaN = (expB == 0xFF) && sigB;
bool cisNaN = (expC == 0xFF) && sigC;
if (aisNaN | bisNaN | cisNaN) {
uiZ = (aisNaN | bisNaN) ? softfloat_propagateNaNF32UI(uiA, uiB, status) : 0;
return softfloat_propagateNaNF32UI(uiZ, uiC, status);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (softfloat_denormalsAreZeros(status)) {
if (!expA) sigA = 0;
if (!expB) sigB = 0;
if (!expC) sigC = 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (expA == 0xFF) {
magBits = expB | sigB;
goto infProdArg;
}
if (expB == 0xFF) {
magBits = expA | sigA;
goto infProdArg;
}
if (expC == 0xFF) {
if ((sigA && !expA) || (sigB && !expB)) {
softfloat_raiseFlags(status, softfloat_flag_denormal);
}
return packToF32UI(signC, 0xFF, 0);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (! expA) {
if (! sigA) goto zeroProd;
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalF32Sig(sigA);
expA = normExpSig.exp;
sigA = normExpSig.sig;
}
if (! expB) {
if (! sigB) goto zeroProd;
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalF32Sig(sigB);
expB = normExpSig.exp;
sigB = normExpSig.sig;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
expProd = expA + expB - 0x7E;
sigA = (sigA | 0x00800000)<<7;
sigB = (sigB | 0x00800000)<<7;
sigProd = (uint64_t) sigA * sigB;
if (sigProd < UINT64_C(0x2000000000000000)) {
--expProd;
sigProd <<= 1;
}
signZ = signProd;
if (! expC) {
if (! sigC) {
expZ = expProd - 1;
sigZ = softfloat_shortShiftRightJam64(sigProd, 31);
goto roundPack;
}
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalF32Sig(sigC);
expC = normExpSig.exp;
sigC = normExpSig.sig;
}
sigC = (sigC | 0x00800000)<<6;
/*your_sha256_hash--------
*your_sha256_hash--------*/
expDiff = expProd - expC;
if (signProd == signC) {
/*your_sha256_hash----
*your_sha256_hash----*/
if (expDiff <= 0) {
expZ = expC;
sigZ = sigC + softfloat_shiftRightJam64(sigProd, 32 - expDiff);
} else {
expZ = expProd;
sig64Z = sigProd + softfloat_shiftRightJam64((uint64_t) sigC<<32, expDiff);
sigZ = softfloat_shortShiftRightJam64(sig64Z, 32);
}
if (sigZ < 0x40000000) {
--expZ;
sigZ <<= 1;
}
} else {
/*your_sha256_hash----
*your_sha256_hash----*/
sig64C = (uint64_t) sigC<<32;
if (expDiff < 0) {
signZ = signC;
expZ = expC;
sig64Z = sig64C - softfloat_shiftRightJam64(sigProd, -expDiff);
} else if (! expDiff) {
expZ = expProd;
sig64Z = sigProd - sig64C;
if (! sig64Z) goto completeCancellation;
if (sig64Z & UINT64_C(0x8000000000000000)) {
signZ = ! signZ;
sig64Z = -sig64Z;
}
} else {
expZ = expProd;
sig64Z = sigProd - softfloat_shiftRightJam64(sig64C, expDiff);
}
shiftDist = softfloat_countLeadingZeros64(sig64Z) - 1;
expZ -= shiftDist;
shiftDist -= 32;
if (shiftDist < 0) {
sigZ = softfloat_shortShiftRightJam64(sig64Z, -shiftDist);
} else {
sigZ = (uint32_t) sig64Z<<shiftDist;
}
}
roundPack:
return softfloat_roundPackToF32(signZ, expZ, sigZ, status);
/*your_sha256_hash--------
*your_sha256_hash--------*/
infProdArg:
if (magBits) {
uiZ = packToF32UI(signProd, 0xFF, 0);
if (signProd == signC || expC != 0xFF) {
if ((sigA && !expA) || (sigB && !expB) || (sigC && !expC))
softfloat_raiseFlags(status, softfloat_flag_denormal);
return uiZ;
}
}
softfloat_raiseFlags(status, softfloat_flag_invalid);
uiZ = defaultNaNF32UI;
return softfloat_propagateNaNF32UI(uiZ, uiC, status);
/*your_sha256_hash--------
*your_sha256_hash--------*/
zeroProd:
uiZ = packToF32UI(signC, expC, sigC);
if (!expC && sigC) {
/* Exact zero plus a denormal */
softfloat_raiseFlags(status, softfloat_flag_denormal);
if (softfloat_flushUnderflowToZero(status)) {
softfloat_raiseFlags(status, softfloat_flag_underflow | softfloat_flag_inexact);
return packToF32UI(signC, 0, 0);
}
}
if (! (expC | sigC) && (signProd != signC)) {
completeCancellation:
uiZ = packToF32UI((softfloat_getRoundingMode(status) == softfloat_round_min), 0, 0);
}
return uiZ;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f32_mulAdd.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 2,249 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int64_t f32_to_i64_r_minMag(float32 a, bool exact, struct softfloat_status_t *status)
{
int16_t exp;
uint32_t sig;
int16_t shiftDist;
bool sign;
uint64_t sig64;
int64_t absZ;
/*your_sha256_hash--------
*your_sha256_hash--------*/
exp = expF32UI(a);
sig = fracF32UI(a);
if (softfloat_denormalsAreZeros(status))
if (!exp && sig) sig = 0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0xBE - exp;
if (64 <= shiftDist) {
if (exact && (exp | sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF32UI(a);
if (shiftDist <= 0) {
if (a == packToF32UI(1, 0xBE, 0)) {
return -INT64_C(0x7FFFFFFFFFFFFFFF) - 1;
}
softfloat_raiseFlags(status, softfloat_flag_invalid);
return (exp == 0xFF) && sig
? i64_fromNaN
: sign ? i64_fromNegOverflow : i64_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sig |= 0x00800000;
sig64 = (uint64_t) sig<<40;
absZ = sig64>>shiftDist;
shiftDist = 40 - shiftDist;
if (exact && (shiftDist < 0) && (uint32_t) (sig<<(shiftDist & 31))) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return sign ? -absZ : absZ;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f32_to_i64_r_minMag.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 780 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
/*your_sha256_hash------------
| Interpreting the unsigned integer formed from concatenating 'uiA64' and
| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
| 80-bit extended floating-point value, and assuming at least on of these
| floating-point values is a NaN, returns the bit pattern of the combined NaN
| result. If either original floating-point value is a signaling NaN, the
| invalid exception is raised.
*your_sha256_hash------------*/
extFloat80_t
softfloat_propagateNaNExtF80UI(uint16_t uiA64, uint64_t uiA0, uint16_t uiB64, uint64_t uiB0, struct softfloat_status_t *status)
{
bool isSigNaNA, isSigNaNB;
uint64_t uiNonsigA0, uiNonsigB0;
uint16_t uiMagA64, uiMagB64;
extFloat80_t z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
isSigNaNA = softfloat_isSigNaNExtF80UI(uiA64, uiA0);
isSigNaNB = softfloat_isSigNaNExtF80UI(uiB64, uiB0);
/*your_sha256_hash--------
| Make NaNs non-signaling.
*your_sha256_hash--------*/
uiNonsigA0 = uiA0 | UINT64_C(0xC000000000000000);
uiNonsigB0 = uiB0 | UINT64_C(0xC000000000000000);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (isSigNaNA | isSigNaNB) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
if (isSigNaNA) {
if (isSigNaNB) goto returnLargerMag;
if (isNaNExtF80UI(uiB64, uiB0)) goto returnB;
goto returnA;
} else {
if (isNaNExtF80UI(uiA64, uiA0)) goto returnA;
goto returnB;
}
}
returnLargerMag:
uiMagA64 = uiA64 & 0x7FFF;
uiMagB64 = uiB64 & 0x7FFF;
if (uiMagA64 < uiMagB64) goto returnB;
if (uiMagB64 < uiMagA64) goto returnA;
if (uiA0 < uiB0) goto returnB;
if (uiB0 < uiA0) goto returnA;
if (uiA64 < uiB64) goto returnA;
returnB:
z.signExp = uiB64;
z.signif = uiNonsigB0;
return z;
returnA:
z.signExp = uiA64;
z.signif = uiNonsigA0;
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_propagateNaNExtF80UI.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,012 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
extFloat80_t
extF80_roundToInt(extFloat80_t a, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
uint16_t uiA64, signUI64;
int32_t exp;
uint64_t sigA;
uint16_t uiZ64;
uint64_t sigZ;
uint64_t lastBitMask, roundBitsMask;
// handle unsupported extended double-precision floating encodings
if (extF80_isUnsupported(a)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return packToExtF80_twoargs(defaultNaNExtF80UI64, defaultNaNExtF80UI0);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.signExp;
signUI64 = uiA64 & packToExtF80UI64(1, 0);
exp = expExtF80UI64(uiA64);
sigA = a.signif;
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (0x403E <= exp) {
if ((exp == 0x7FFF) && (uint64_t) (sigA<<1)) {
return softfloat_propagateNaNExtF80UI(uiA64, sigA, 0, 0, status);
}
return a;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (exp <= 0x3FFE) {
if (! exp) {
if ((sigA<<1) == 0) return a;
softfloat_raiseFlags(status, softfloat_flag_denormal);
}
if (exact) softfloat_raiseFlags(status, softfloat_flag_inexact);
switch (roundingMode) {
case softfloat_round_near_even:
if (!(sigA & UINT64_C(0x7FFFFFFFFFFFFFFF))) break;
case softfloat_round_near_maxMag:
if (exp == 0x3FFE) goto mag1;
break;
case softfloat_round_min:
if (signUI64) goto mag1;
break;
case softfloat_round_max:
if (!signUI64) goto mag1;
break;
}
return packToExtF80(signUI64, 0, 0);
mag1:
softfloat_setRoundingUp(status);
return packToExtF80(signUI64, 0x3FFF, UINT64_C(0x8000000000000000));
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiZ64 = signUI64 | exp;
lastBitMask = (uint64_t) 1<<(0x403E - exp);
roundBitsMask = lastBitMask - 1;
sigZ = sigA;
if (roundingMode == softfloat_round_near_maxMag) {
sigZ += lastBitMask>>1;
} else if (roundingMode == softfloat_round_near_even) {
sigZ += lastBitMask>>1;
if (!(sigZ & roundBitsMask)) sigZ &= ~lastBitMask;
} else if (roundingMode == (signUI64 ? softfloat_round_min : softfloat_round_max)) {
sigZ += roundBitsMask;
}
sigZ &= ~roundBitsMask;
if (!sigZ) {
++uiZ64;
sigZ = UINT64_C(0x8000000000000000);
softfloat_setRoundingUp(status);
}
if (sigZ != sigA) {
if (exact) softfloat_raiseFlags(status, softfloat_flag_inexact);
if (sigZ > sigA)
softfloat_setRoundingUp(status);
}
return packToExtF80_twoargs(uiZ64, sigZ);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/extF80_roundToInt.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,180 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
#include "softfloat.h"
extFloat80_t extF80_rem(extFloat80_t a, extFloat80_t b, struct softfloat_status_t *status)
{
uint16_t uiA64;
uint64_t uiA0;
bool signA;
int32_t expA;
uint64_t sigA;
uint16_t uiB64;
uint64_t uiB0;
int32_t expB;
uint64_t sigB;
struct exp32_sig64 normExpSig;
int32_t expDiff;
struct uint128 rem, shiftedSigB;
uint32_t q, recip32;
uint64_t q64;
struct uint128 term, altRem, meanRem;
bool signRem;
// handle unsupported extended double-precision floating encodings
if (extF80_isUnsupported(a) || extF80_isUnsupported(b))
goto invalid;
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.signExp;
uiA0 = a.signif;
signA = signExtF80UI64(uiA64);
expA = expExtF80UI64(uiA64);
sigA = uiA0;
uiB64 = b.signExp;
uiB0 = b.signif;
expB = expExtF80UI64(uiB64);
sigB = uiB0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (expA == 0x7FFF) {
if ((sigA & UINT64_C(0x7FFFFFFFFFFFFFFF)) || ((expB == 0x7FFF) && (sigB & UINT64_C(0x7FFFFFFFFFFFFFFF)))) {
goto propagateNaN;
}
goto invalid;
}
if (expB == 0x7FFF) {
if (sigB & UINT64_C(0x7FFFFFFFFFFFFFFF)) goto propagateNaN;
/*your_sha256_hash----
| Argument b is an infinity. Doubling `expB' is an easy way to ensure
| that `expDiff' later is less than -1, which will result in returning
| a canonicalized version of argument a.
*your_sha256_hash----*/
expB += expB;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (! expB) {
expB = 1;
if (sigB)
softfloat_raiseFlags(status, softfloat_flag_denormal);
}
if (! (sigB & UINT64_C(0x8000000000000000))) {
if (! sigB) goto invalid;
normExpSig = softfloat_normSubnormalExtF80Sig(sigB);
expB += normExpSig.exp;
sigB = normExpSig.sig;
}
if (! expA) {
expA = 1;
if (sigA)
softfloat_raiseFlags(status, softfloat_flag_denormal);
}
if (! (sigA & UINT64_C(0x8000000000000000))) {
if (! sigA) {
expA = 0;
goto copyA;
}
normExpSig = softfloat_normSubnormalExtF80Sig(sigA);
expA += normExpSig.exp;
sigA = normExpSig.sig;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
expDiff = expA - expB;
if (expDiff < -1) goto copyA;
rem = softfloat_shortShiftLeft128(0, sigA, 32);
shiftedSigB = softfloat_shortShiftLeft128(0, sigB, 32);
if (expDiff < 1) {
if (expDiff) {
--expB;
shiftedSigB = softfloat_shortShiftLeft128(0, sigB, 33);
q = 0;
} else {
q = (sigB <= sigA);
if (q) {
rem = softfloat_sub128(rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0);
}
}
} else {
recip32 = softfloat_approxRecip32_1(sigB>>32);
expDiff -= 30;
for (;;) {
q64 = (uint64_t) (uint32_t) (rem.v64>>2) * recip32;
if (expDiff < 0) break;
q = (q64 + 0x80000000)>>32;
rem = softfloat_shortShiftLeft128(rem.v64, rem.v0, 29);
term = softfloat_mul64ByShifted32To128(sigB, q);
rem = softfloat_sub128(rem.v64, rem.v0, term.v64, term.v0);
if (rem.v64 & UINT64_C(0x8000000000000000)) {
rem = softfloat_add128(rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0);
}
expDiff -= 29;
}
/*your_sha256_hash----
| (`expDiff' cannot be less than -29 here.)
*your_sha256_hash----*/
q = (uint32_t) (q64>>32)>>(~expDiff & 31);
rem = softfloat_shortShiftLeft128(rem.v64, rem.v0, expDiff + 30);
term = softfloat_mul64ByShifted32To128(sigB, q);
rem = softfloat_sub128(rem.v64, rem.v0, term.v64, term.v0);
if (rem.v64 & UINT64_C(0x8000000000000000)) {
altRem = softfloat_add128(rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0);
goto selectRem;
}
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
do {
altRem = rem;
++q;
rem = softfloat_sub128(rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0);
} while (! (rem.v64 & UINT64_C(0x8000000000000000)));
selectRem:
meanRem = softfloat_add128(rem.v64, rem.v0, altRem.v64, altRem.v0);
if ((meanRem.v64 & UINT64_C(0x8000000000000000)) || (! (meanRem.v64 | meanRem.v0) && (q & 1))) {
rem = altRem;
}
signRem = signA;
if (rem.v64 & UINT64_C(0x8000000000000000)) {
signRem = ! signRem;
rem = softfloat_sub128(0, 0, rem.v64, rem.v0);
}
return softfloat_normRoundPackToExtF80(signRem, rem.v64 | rem.v0 ? expB + 32 : 0, rem.v64, rem.v0, 80, status);
/*your_sha256_hash--------
*your_sha256_hash--------*/
propagateNaN:
return softfloat_propagateNaNExtF80UI(uiA64, uiA0, uiB64, uiB0, status);
/*your_sha256_hash--------
*your_sha256_hash--------*/
invalid:
softfloat_raiseFlags(status, softfloat_flag_invalid);
return packToExtF80_twoargs(defaultNaNExtF80UI64, defaultNaNExtF80UI0);
/*your_sha256_hash--------
*your_sha256_hash--------*/
copyA:
if (expA < 1) {
sigA >>= 1 - expA;
expA = 0;
}
return packToExtF80(signA, expA, sigA);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/extF80_rem.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 2,073 |
```objective-c
#ifndef EMU_SF_CONFIG_H
#define EMU_SF_CONFIG_H
/*your_sha256_hash------------
| The `LIT64' macro takes as its argument a textual integer literal and
| if necessary ``marks'' the literal as having a 64-bit integer type.
| For example, the GNU C Compiler (`gcc') requires that 64-bit literals be
| appended with the letters `LL' standing for `long long', which is `gcc's
| name for the 64-bit integer type. Some compilers may allow `LIT64' to be
| defined as the identity macro: `#define LIT64( a ) a'.
*your_sha256_hash------------*/
#define BX_CONST64(a) a##LL
#endif /*EMU_SF_CONFIG_H*/
``` | /content/code_sandbox/src/cpu/softfloat3e/config.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 161 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
extern const uint16_t softfloat_approxRecipSqrt_1k0s[];
extern const uint16_t softfloat_approxRecipSqrt_1k1s[];
float16 f16_sqrt(float16 a, struct softfloat_status_t *status)
{
bool signA;
int8_t expA;
uint16_t sigA;
struct exp8_sig16 normExpSig;
int8_t expZ;
int index;
uint16_t r0;
uint32_t ESqrR0;
uint16_t sigma0;
uint16_t recipSqrt16, sigZ, shiftedSigZ;
uint16_t negRem;
/*your_sha256_hash--------
*your_sha256_hash--------*/
signA = signF16UI(a);
expA = expF16UI(a);
sigA = fracF16UI(a);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (expA == 0x1F) {
if (sigA) {
return softfloat_propagateNaNF16UI(a, 0, status);
}
if (! signA) return a;
goto invalid;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (softfloat_denormalsAreZeros(status)) {
if (!expA) {
sigA = 0;
a = packToF16UI(signA, 0, 0);
}
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (signA) {
if (! (expA | sigA)) return a;
goto invalid;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (! expA) {
if (! sigA) return a;
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalF16Sig(sigA);
expA = normExpSig.exp;
sigA = normExpSig.sig;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
expZ = ((expA - 0xF)>>1) + 0xE;
expA &= 1;
sigA |= 0x0400;
index = (sigA>>6 & 0xE) + expA;
r0 = softfloat_approxRecipSqrt_1k0s[index]
- (((uint32_t) softfloat_approxRecipSqrt_1k1s[index] * (sigA & 0x7F)) >>11);
ESqrR0 = ((uint32_t) r0 * r0)>>1;
if (expA) ESqrR0 >>= 1;
sigma0 = ~(uint16_t) ((ESqrR0 * sigA)>>16);
recipSqrt16 = r0 + (((uint32_t) r0 * sigma0)>>25);
if (! (recipSqrt16 & 0x8000)) recipSqrt16 = 0x8000;
sigZ = ((uint32_t) (sigA<<5) * recipSqrt16)>>16;
if (expA) sigZ >>= 1;
/*your_sha256_hash--------
*your_sha256_hash--------*/
++sigZ;
if (! (sigZ & 7)) {
shiftedSigZ = sigZ>>1;
negRem = shiftedSigZ * shiftedSigZ;
sigZ &= ~1;
if (negRem & 0x8000) {
sigZ |= 1;
} else {
if (negRem) --sigZ;
}
}
return softfloat_roundPackToF16(0, expZ, sigZ, status);
/*your_sha256_hash--------
*your_sha256_hash--------*/
invalid:
softfloat_raiseFlags(status, softfloat_flag_invalid);
return defaultNaNF16UI;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f16_sqrt.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,208 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
#include "softfloat.h"
int32_t f32_to_i32(float32 a, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
bool sign;
int16_t exp;
uint32_t sig;
uint64_t sig64;
int16_t shiftDist;
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF32UI(a);
exp = expF32UI(a);
sig = fracF32UI(a);
/*your_sha256_hash--------
*your_sha256_hash--------*/
#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow)
if ((exp == 0xFF) && sig) {
#if (i32_fromNaN == i32_fromPosOverflow)
sign = 0;
#elif (i32_fromNaN == i32_fromNegOverflow)
sign = 1;
#else
softfloat_raiseFlags(status, softfloat_flag_invalid);
return i32_fromNaN;
#endif
}
#endif
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (exp) sig |= 0x00800000;
else if (softfloat_denormalsAreZeros(status)) sig = 0;
sig64 = (uint64_t) sig<<32;
shiftDist = 0xAA - exp;
if (0 < shiftDist) sig64 = softfloat_shiftRightJam64(sig64, shiftDist);
return softfloat_roundToI32(sign, sig64, roundingMode, exact, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f32_to_i32.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 701 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
uint32_t f64_to_ui32_r_minMag(float64 a, bool exact, struct softfloat_status_t *status)
{
int16_t exp;
uint64_t sig;
int16_t shiftDist;
bool sign;
uint32_t z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
exp = expF64UI(a);
sig = fracF64UI(a);
if (softfloat_denormalsAreZeros(status))
if (!exp && sig) sig = 0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x433 - exp;
if (53 <= shiftDist) {
if (exact && (exp | sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF64UI(a);
if (sign || (shiftDist < 21)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return (exp == 0x7FF) && sig
? ui32_fromNaN
: sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sig |= UINT64_C(0x0010000000000000);
z = sig>>shiftDist;
if (exact && ((uint64_t) z<<shiftDist != sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f64_to_ui32_r_minMag.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 703 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
extFloat80_t i32_to_extF80(int32_t a)
{
uint16_t uiZ64;
uint32_t absA;
bool sign;
int8_t shiftDist;
extFloat80_t z;
uiZ64 = 0;
absA = 0;
if (a) {
sign = (a < 0);
absA = sign ? -(uint32_t) a : (uint32_t) a;
shiftDist = softfloat_countLeadingZeros32(absA);
uiZ64 = packToExtF80UI64(sign, 0x401E - shiftDist);
absA <<= shiftDist;
}
z.signExp = uiZ64;
z.signif = (uint64_t) absA<<32;
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/i32_to_extF80.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 529 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All Rights Reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
extFloat80_t ui64_to_extF80(uint64_t a)
{
uint16_t uiZ64;
int8_t shiftDist;
extFloat80_t z;
uiZ64 = 0;
if (a) {
shiftDist = softfloat_countLeadingZeros64(a);
uiZ64 = 0x403E - shiftDist;
a <<= shiftDist;
}
z.signExp = uiZ64;
z.signif = a;
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/ui64_to_extF80.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 459 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
extFloat80_t i64_to_extF80(int64_t a)
{
uint16_t uiZ64;
uint64_t absA;
bool sign;
int8_t shiftDist;
extFloat80_t z;
uiZ64 = 0;
absA = 0;
if (a) {
sign = (a < 0);
absA = sign ? -(uint64_t) a : (uint64_t) a;
shiftDist = softfloat_countLeadingZeros64(absA);
uiZ64 = packToExtF80UI64(sign, 0x403E - shiftDist);
absA <<= shiftDist;
}
z.signExp = uiZ64;
z.signif = absA;
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/i64_to_extF80.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 523 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int64_t f128_to_i64_r_minMag(float128_t a, bool exact, struct softfloat_status_t *status)
{
uint64_t uiA64, uiA0;
bool sign;
int32_t exp;
uint64_t sig64, sig0;
int32_t shiftDist;
int8_t negShiftDist;
uint64_t absZ;
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.v64;
uiA0 = a.v0;
sign = signF128UI64(uiA64);
exp = expF128UI64(uiA64);
sig64 = fracF128UI64(uiA64);
sig0 = uiA0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x402F - exp;
if (shiftDist < 0) {
/*your_sha256_hash----
*your_sha256_hash----*/
if (shiftDist < -14) {
if ((uiA64 == UINT64_C(0xC03E000000000000)) && (sig0 < UINT64_C(0x0002000000000000))) {
if (exact && sig0) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return -INT64_C(0x7FFFFFFFFFFFFFFF) - 1;
}
softfloat_raiseFlags(status, softfloat_flag_invalid);
return (exp == 0x7FFF) && (sig64 | sig0)
? i64_fromNaN
: sign ? i64_fromNegOverflow : i64_fromPosOverflow;
}
/*your_sha256_hash----
*your_sha256_hash----*/
sig64 |= UINT64_C(0x0001000000000000);
negShiftDist = -shiftDist;
absZ = sig64<<negShiftDist | sig0>>(shiftDist & 63);
if (exact && (uint64_t) (sig0<<negShiftDist)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
} else {
/*your_sha256_hash----
*your_sha256_hash----*/
if (49 <= shiftDist) {
if (exact && (exp | sig64 | sig0)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash----
*your_sha256_hash----*/
sig64 |= UINT64_C(0x0001000000000000);
absZ = sig64>>shiftDist;
if (exact && (sig0 || (absZ<<shiftDist != sig64))) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
}
return sign ? -absZ : absZ;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f128_to_i64_r_minMag.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 972 |
```c
/*============================================================================
This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2b.
Written by John R. Hauser. This work was made possible in part by the
International Computer Science Institute, located at Suite 600, 1947 Center
Street, Berkeley, California 94704. Funding was partially provided by the
National Science Foundation under grant MIP-9311980. The original version
of this code was written as part of a project to build a fixed-point vector
processor in collaboration with the University of California at Berkeley,
overseen by Profs. Nelson Morgan and John Wawrzynek. More information
is available through the Web page `path_to_url~jhauser/
arithmetic/SoftFloat.html'.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) the source code for the derivative work includes prominent notice that
the work is derivative, and (2) the source code includes prominent notice with
these four paragraphs for those parts of this code that are retained.
=============================================================================*/
#include "softfloat-specialize.h"
/*============================================================================
* Adapted for Bochs (x86 achitecture simulator) by
* Stanislav Shwartsman [sshwarts at sourceforge net]
* ==========================================================================*/
const int16_t int16_indefinite = (int16_t) 0x8000;
const int32_t int32_indefinite = (int32_t) 0x80000000;
const int64_t int64_indefinite = (int64_t) BX_CONST64(0x8000000000000000);
const uint16_t uint16_indefinite = 0xffff;
const uint32_t uint32_indefinite = 0xffffffff;
const uint64_t uint64_indefinite = BX_CONST64(0xffffffffffffffff);
/*your_sha256_hash------------
| Commonly used half-precision floating point constants
*your_sha256_hash------------*/
const float16 float16_negative_inf = 0xfc00;
const float16 float16_positive_inf = 0x7c00;
const float16 float16_negative_zero = 0x8000;
const float16 float16_positive_zero = 0x0000;
/*your_sha256_hash------------
| The pattern for a default generated half-precision NaN.
*your_sha256_hash------------*/
const float16 float16_default_nan = 0xFE00;
/*your_sha256_hash------------
| Commonly used single-precision floating point constants
*your_sha256_hash------------*/
const float32 float32_negative_inf = 0xff800000;
const float32 float32_positive_inf = 0x7f800000;
const float32 float32_negative_zero = 0x80000000;
const float32 float32_positive_zero = 0x00000000;
const float32 float32_negative_one = 0xbf800000;
const float32 float32_positive_one = 0x3f800000;
const float32 float32_max_float = 0x7f7fffff;
const float32 float32_min_float = 0xff7fffff;
/*your_sha256_hash------------
| The pattern for a default generated single-precision NaN.
*your_sha256_hash------------*/
const float32 float32_default_nan = 0xffc00000;
/*your_sha256_hash------------
| Commonly used single-precision floating point constants
*your_sha256_hash------------*/
const float64 float64_negative_inf = BX_CONST64(0xfff0000000000000);
const float64 float64_positive_inf = BX_CONST64(0x7ff0000000000000);
const float64 float64_negative_zero = BX_CONST64(0x8000000000000000);
const float64 float64_positive_zero = BX_CONST64(0x0000000000000000);
const float64 float64_negative_one = BX_CONST64(0xbff0000000000000);
const float64 float64_positive_one = BX_CONST64(0x3ff0000000000000);
const float64 float64_max_float = BX_CONST64(0x7fefffffffffffff);
const float64 float64_min_float = BX_CONST64(0xffefffffffffffff);
/*your_sha256_hash------------
| The pattern for a default generated double-precision NaN.
*your_sha256_hash------------*/
const float64 float64_default_nan = BX_CONST64(0xFFF8000000000000);
``` | /content/code_sandbox/src/cpu/softfloat3e/softfloat-specialize.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,102 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#ifndef softfloat_shortShiftRightJam64
uint64_t softfloat_shortShiftRightJam64(uint64_t a, uint8_t dist)
{
return a>>dist | ((a & (((uint64_t) 1<<dist) - 1)) != 0);
}
#endif
``` | /content/code_sandbox/src/cpu/softfloat3e/s_shortShiftRightJam64.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 392 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
float16 softfloat_normRoundPackToF16(bool sign, int16_t exp, uint16_t sig, struct softfloat_status_t *status)
{
int8_t shiftDist = softfloat_countLeadingZeros16(sig) - 1;
exp -= shiftDist;
if ((4 <= shiftDist) && ((unsigned int) exp < 0x1D)) {
return packToF16UI(sign, sig ? exp : 0, sig<<(shiftDist - 4));
} else {
return softfloat_roundPackToF16(sign, exp, sig<<shiftDist, status);
}
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_normRoundPackToF16.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 472 |
```objective-c
/*============================================================================
This source file is an extension to the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2b, written for Bochs (x86 achitecture simulator)
floating point emulation.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) the source code for the derivative work includes prominent notice that
the work is derivative, and (2) the source code includes prominent notice with
these four paragraphs for those parts of this code that are retained.
=============================================================================*/
#ifndef _FPU_CONSTANTS_H_
#define _FPU_CONSTANTS_H_
#include "config.h"
// Pentium CPU uses only 68-bit precision M_PI approximation
// #define BETTER_THAN_PENTIUM
/*============================================================================
* Written for Bochs (x86 achitecture simulator) by
* Stanislav Shwartsman [sshwarts at sourceforge net]
* ==========================================================================*/
//////////////////////////////
// PI, PI/2, PI/4 constants
//////////////////////////////
#define FLOATX80_PI_EXP (0x4000)
// 128-bit PI fraction
#ifdef BETTER_THAN_PENTIUM
#define FLOAT_PI_HI (BX_CONST64(0xc90fdaa22168c234))
#define FLOAT_PI_LO (BX_CONST64(0xc4c6628b80dc1cd1))
#else
#define FLOAT_PI_HI (BX_CONST64(0xc90fdaa22168c234))
#define FLOAT_PI_LO (BX_CONST64(0xC000000000000000))
#endif
#define FLOATX80_PI2_EXP (0x3FFF)
#define FLOATX80_PI4_EXP (0x3FFE)
//////////////////////////////
// 3PI/4 constant
//////////////////////////////
#define FLOATX80_3PI4_EXP (0x4000)
// 128-bit 3PI/4 fraction
#ifdef BETTER_THAN_PENTIUM
#define FLOAT_3PI4_HI (BX_CONST64(0x96cbe3f9990e91a7))
#define FLOAT_3PI4_LO (BX_CONST64(0x9394c9e8a0a5159c))
#else
#define FLOAT_3PI4_HI (BX_CONST64(0x96cbe3f9990e91a7))
#define FLOAT_3PI4_LO (BX_CONST64(0x9000000000000000))
#endif
//////////////////////////////
// 1/LN2 constant
//////////////////////////////
#define FLOAT_LN2INV_EXP (0x3FFF)
// 128-bit 1/LN2 fraction
#ifdef BETTER_THAN_PENTIUM
#define FLOAT_LN2INV_HI (BX_CONST64(0xb8aa3b295c17f0bb))
#define FLOAT_LN2INV_LO (BX_CONST64(0xbe87fed0691d3e89))
#else
#define FLOAT_LN2INV_HI (BX_CONST64(0xb8aa3b295c17f0bb))
#define FLOAT_LN2INV_LO (BX_CONST64(0xC000000000000000))
#endif
#endif
``` | /content/code_sandbox/src/cpu/softfloat3e/fpu_constant.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 804 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int64_t extF80_to_i64_r_minMag(extFloat80_t a, bool exact, struct softfloat_status_t *status)
{
uint16_t uiA64;
int32_t exp;
uint64_t sig;
int32_t shiftDist;
bool sign;
int64_t absZ;
// handle unsupported extended double-precision floating encodings
if (extF80_isUnsupported(a)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return i64_fromNaN;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.signExp;
exp = expExtF80UI64(uiA64);
sig = a.signif;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x403E - exp;
if (64 <= shiftDist) {
if (exact && (exp | sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signExtF80UI64(uiA64);
if (shiftDist <= 0) {
if ((uiA64 == packToExtF80UI64(1, 0x403E)) && (sig == UINT64_C(0x8000000000000000))) {
return -INT64_C(0x7FFFFFFFFFFFFFFF) - 1;
}
softfloat_raiseFlags(status, softfloat_flag_invalid);
return
(exp == 0x7FFF) && (sig & UINT64_C(0x7FFFFFFFFFFFFFFF))
? i64_fromNaN
: sign ? i64_fromNegOverflow : i64_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
absZ = sig>>shiftDist;
if (exact && (uint64_t) (sig<<(-shiftDist & 63))) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return sign ? -absZ : absZ;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/extF80_to_i64_r_minMag.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 811 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
float32 softfloat_roundPackToF32(bool sign, int16_t exp, uint32_t sig, struct softfloat_status_t *status)
{
uint8_t roundingMode;
bool roundNearEven;
uint8_t roundIncrement, roundBits;
bool isTiny;
uint32_t uiZ;
uint32_t sigRef;
/*your_sha256_hash--------
*your_sha256_hash--------*/
roundingMode = softfloat_getRoundingMode(status);
roundNearEven = (roundingMode == softfloat_round_near_even);
roundIncrement = 0x40;
if (! roundNearEven && (roundingMode != softfloat_round_near_maxMag)) {
roundIncrement =
(roundingMode == (sign ? softfloat_round_min : softfloat_round_max)) ? 0x7F : 0;
}
roundBits = sig & 0x7F;
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (0xFD <= (unsigned int) exp) {
if (exp < 0) {
/*your_sha256_hash
*your_sha256_hash*/
isTiny = (exp < -1) || (sig + roundIncrement < 0x80000000);
if (isTiny && ! softfloat_isMaskedException(status, softfloat_flag_underflow)) {
softfloat_raiseFlags(status, softfloat_flag_underflow);
exp += 192;
}
else {
sig = softfloat_shiftRightJam32(sig, -exp);
exp = 0;
roundBits = sig & 0x7F;
if (isTiny) {
if (softfloat_flushUnderflowToZero(status)) {
softfloat_raiseFlags(status, softfloat_flag_underflow | softfloat_flag_inexact);
return packToF32UI(sign, 0, 0);
}
if (roundBits) softfloat_raiseFlags(status, softfloat_flag_underflow);
}
}
} else if ((0xFD < exp) || (0x80000000 <= sig + roundIncrement)) {
/*your_sha256_hash
*your_sha256_hash*/
softfloat_raiseFlags(status, softfloat_flag_overflow);
if (roundBits || softfloat_isMaskedException(status, softfloat_flag_overflow)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
if (roundIncrement != 0) softfloat_setRoundingUp(status);
}
uiZ = packToF32UI(sign, 0xFF, 0) - ! roundIncrement;
return uiZ;
}
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sigRef = sig;
sig = (sig + roundIncrement)>>7;
sig &= ~(uint32_t) (! (roundBits ^ 0x40) & roundNearEven);
if (! sig) exp = 0;
if (roundBits) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
if ((sig << 7) > sigRef) softfloat_setRoundingUp(status);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
return packToF32UI(sign, exp, sig);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_roundPackToF32.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,037 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
All Rights Reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "softfloat.h"
float32 ui32_to_f32(uint32_t a, struct softfloat_status_t *status)
{
if (! a) {
return 0;
}
if (a & 0x80000000) {
return softfloat_roundPackToF32(0, 0x9D, a>>1 | (a & 1), status);
} else {
return softfloat_normRoundPackToF32(0, 0x9C, a, status);
}
}
``` | /content/code_sandbox/src/cpu/softfloat3e/ui32_to_f32.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 446 |
```objective-c
/*============================================================================
This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#ifndef _SPECIALIZE_H_
#define _SPECIALIZE_H_
#include <stdbool.h>
#include <stdint.h>
#include "softfloat.h"
/*your_sha256_hash------------
| The values to return on conversions to 32-bit integer formats that raise an
| invalid exception.
*your_sha256_hash------------*/
#define ui32_fromPosOverflow 0xFFFFFFFF
#define ui32_fromNegOverflow 0xFFFFFFFF
#define ui32_fromNaN 0xFFFFFFFF
#define i32_fromPosOverflow (-0x7FFFFFFF - 1)
#define i32_fromNegOverflow (-0x7FFFFFFF - 1)
#define i32_fromNaN (-0x7FFFFFFF - 1)
/*your_sha256_hash------------
| The values to return on conversions to 64-bit integer formats that raise an
| invalid exception.
*your_sha256_hash------------*/
#define ui64_fromPosOverflow UINT64_C(0xFFFFFFFFFFFFFFFF)
#define ui64_fromNegOverflow UINT64_C(0xFFFFFFFFFFFFFFFF)
#define ui64_fromNaN UINT64_C(0xFFFFFFFFFFFFFFFF)
#define i64_fromPosOverflow (-INT64_C(0x7FFFFFFFFFFFFFFF) - 1)
#define i64_fromNegOverflow (-INT64_C(0x7FFFFFFFFFFFFFFF) - 1)
#define i64_fromNaN (-INT64_C(0x7FFFFFFFFFFFFFFF) - 1)
/*your_sha256_hash------------
| "Common NaN" structure, used to transfer NaN representations from one format
| to another.
*your_sha256_hash------------*/
struct commonNaN {
bool sign;
uint64_t v0, v64;
};
#ifdef __cplusplus
extern "C" {
#endif
/*your_sha256_hash------------
| The bit pattern for a default generated 16-bit floating-point NaN.
*your_sha256_hash------------*/
#define defaultNaNF16UI 0xFE00
/*your_sha256_hash------------
| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a
| 16-bit floating-point signaling NaN.
| Note: This macro evaluates its argument more than once.
*your_sha256_hash------------*/
#define softfloat_isSigNaNF16UI(uiA) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF))
/*your_sha256_hash------------
| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts
| this NaN to the common NaN form, and stores the resulting common NaN at the
| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
| exception is raised.
*your_sha256_hash------------*/
void softfloat_f16UIToCommonNaN(uint16_t uiA, struct commonNaN *zPtr, struct softfloat_status_t *status);
/*your_sha256_hash------------
| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point
| NaN, and returns the bit pattern of this value as an unsigned integer.
*your_sha256_hash------------*/
uint16_t softfloat_commonNaNToF16UI(const struct commonNaN *aPtr);
/*your_sha256_hash------------
| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-
| point values, at least one of which is a NaN, returns the bit pattern of
| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
| signaling NaN, the invalid exception is raised.
*your_sha256_hash------------*/
uint16_t
softfloat_propagateNaNF16UI(uint16_t uiA, uint16_t uiB, struct softfloat_status_t *status);
/*your_sha256_hash------------
| The bit pattern for a default generated 32-bit floating-point NaN.
*your_sha256_hash------------*/
#define defaultNaNF32UI 0xFFC00000
/*your_sha256_hash------------
| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a
| 32-bit floating-point signaling NaN.
| Note: This macro evaluates its argument more than once.
*your_sha256_hash------------*/
#define softfloat_isSigNaNF32UI(uiA) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF))
/*your_sha256_hash------------
| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts
| this NaN to the common NaN form, and stores the resulting common NaN at the
| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
| exception is raised.
*your_sha256_hash------------*/
void softfloat_f32UIToCommonNaN(uint32_t uiA, struct commonNaN *zPtr, struct softfloat_status_t *status);
/*your_sha256_hash------------
| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point
| NaN, and returns the bit pattern of this value as an unsigned integer.
*your_sha256_hash------------*/
uint32_t softfloat_commonNaNToF32UI(const struct commonNaN *aPtr);
/*your_sha256_hash------------
| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-
| point values, at least one of which is a NaN, returns the bit pattern of
| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
| signaling NaN, the invalid exception is raised.
*your_sha256_hash------------*/
uint32_t
softfloat_propagateNaNF32UI(uint32_t uiA, uint32_t uiB, struct softfloat_status_t *status);
/*your_sha256_hash------------
| The bit pattern for a default generated 64-bit floating-point NaN.
*your_sha256_hash------------*/
#define defaultNaNF64UI UINT64_C(0xFFF8000000000000)
/*your_sha256_hash------------
| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a
| 64-bit floating-point signaling NaN.
| Note: This macro evaluates its argument more than once.
*your_sha256_hash------------*/
#define softfloat_isSigNaNF64UI(uiA) ((((uiA) & UINT64_C(0x7FF8000000000000)) == UINT64_C(0x7FF0000000000000)) && ((uiA) & UINT64_C(0x0007FFFFFFFFFFFF)))
/*your_sha256_hash------------
| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts
| this NaN to the common NaN form, and stores the resulting common NaN at the
| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
| exception is raised.
*your_sha256_hash------------*/
void softfloat_f64UIToCommonNaN(uint64_t uiA, struct commonNaN *zPtr, struct softfloat_status_t *status);
/*your_sha256_hash------------
| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point
| NaN, and returns the bit pattern of this value as an unsigned integer.
*your_sha256_hash------------*/
uint64_t softfloat_commonNaNToF64UI(const struct commonNaN *aPtr);
/*your_sha256_hash------------
| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-
| point values, at least one of which is a NaN, returns the bit pattern of
| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
| signaling NaN, the invalid exception is raised.
*your_sha256_hash------------*/
uint64_t
softfloat_propagateNaNF64UI(uint64_t uiA, uint64_t uiB, struct softfloat_status_t *status);
/*your_sha256_hash------------
| The bit pattern for a default generated 80-bit extended floating-point NaN.
*your_sha256_hash------------*/
#define defaultNaNExtF80UI64 0xFFFF
#define defaultNaNExtF80UI0 UINT64_C(0xC000000000000000)
/*your_sha256_hash------------
| Returns true when the 80-bit unsigned integer formed from concatenating
| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended
| floating-point signaling NaN.
| Note: This macro evaluates its arguments more than once.
*your_sha256_hash------------*/
#define softfloat_isSigNaNExtF80UI(uiA64, uiA0) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C(0x4000000000000000)) && ((uiA0) & UINT64_C(0x3FFFFFFFFFFFFFFF)))
/*your_sha256_hash------------
| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
| has the bit pattern of an 80-bit extended floating-point NaN, converts
| this NaN to the common NaN form, and stores the resulting common NaN at the
| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
| exception is raised.
*your_sha256_hash------------*/
void softfloat_extF80UIToCommonNaN(uint16_t uiA64, uint64_t uiA0, struct commonNaN *zPtr, struct softfloat_status_t *status);
/*your_sha256_hash------------
| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
| floating-point NaN, and returns the bit pattern of this value as an unsigned
| integer.
*your_sha256_hash------------*/
struct uint128 softfloat_commonNaNToExtF80UI(const struct commonNaN *aPtr);
/*your_sha256_hash------------
| Interpreting the unsigned integer formed from concatenating 'uiA64' and
| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
| 80-bit extended floating-point value, and assuming at least on of these
| floating-point values is a NaN, returns the bit pattern of the combined NaN
| result. If either original floating-point value is a signaling NaN, the
| invalid exception is raised.
*your_sha256_hash------------*/
extFloat80_t
softfloat_propagateNaNExtF80UI(
uint16_t uiA64,
uint64_t uiA0,
uint16_t uiB64,
uint64_t uiB0,
struct softfloat_status_t *status);
/*your_sha256_hash------------
| The bit pattern for a default generated 128-bit floating-point NaN.
*your_sha256_hash------------*/
#define defaultNaNF128UI64 UINT64_C(0xFFFF800000000000)
#define defaultNaNF128UI0 UINT64_C(0)
/*your_sha256_hash------------
| Returns true when the 128-bit unsigned integer formed from concatenating
| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating-
| point signaling NaN.
| Note: This macro evaluates its arguments more than once.
*your_sha256_hash------------*/
#define softfloat_isSigNaNF128UI(uiA64, uiA0) ((((uiA64) & UINT64_C(0x7FFF800000000000)) == UINT64_C(0x7FFF000000000000)) && ((uiA0) || ((uiA64) & UINT64_C(0x00007FFFFFFFFFFF))))
/*your_sha256_hash------------
| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to
| the common NaN form, and stores the resulting common NaN at the location
| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception
| is raised.
*your_sha256_hash------------*/
void softfloat_f128UIToCommonNaN(uint64_t uiA64, uint64_t uiA0, struct commonNaN *zPtr, struct softfloat_status_t *status);
/*your_sha256_hash------------
| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
| NaN, and returns the bit pattern of this value as an unsigned integer.
*your_sha256_hash------------*/
struct uint128 softfloat_commonNaNToF128UI(const struct commonNaN *);
/*your_sha256_hash------------
| Interpreting the unsigned integer formed from concatenating 'uiA64' and
| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the
| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
| 128-bit floating-point value, and assuming at least on of these floating-
| point values is a NaN, returns the bit pattern of the combined NaN result.
| If either original floating-point value is a signaling NaN, the invalid
| exception is raised.
*your_sha256_hash------------*/
struct uint128
softfloat_propagateNaNF128UI(
uint64_t uiA64,
uint64_t uiA0,
uint64_t uiB64,
uint64_t uiB0,
struct softfloat_status_t *status
);
#ifdef __cplusplus
}
#endif
#endif
``` | /content/code_sandbox/src/cpu/softfloat3e/specialize.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 3,216 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
/*your_sha256_hash------------
| Return the result of a floating point scale of the double-precision floating
| point value `a' by multiplying it by 2 power of the double-precision
| floating point value 'b' converted to integral value. If the result cannot
| be represented in double precision, then the proper overflow response (for
| positive scaling operand), or the proper underflow response (for negative
| scaling operand) is issued. The operation is performed according to the
| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*your_sha256_hash------------*/
float64 f64_scalef(float64 a, float64 b, struct softfloat_status_t *status)
{
bool signA;
int16_t expA;
uint64_t sigA;
bool signB;
int16_t expB;
uint64_t sigB;
int shiftCount;
int scale = 0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
signA = signF64UI(a);
expA = expF64UI(a);
sigA = fracF64UI(a);
signB = signF64UI(b);
expB = expF64UI(b);
sigB = fracF64UI(b);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (expB == 0x7FF) {
if (sigB) return softfloat_propagateNaNF64UI(a, b, status);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (softfloat_denormalsAreZeros(status)) {
if (!expA) sigA = 0;
if (!expB) sigB = 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (expA == 0x7FF) {
if (sigA) {
int aIsSignalingNaN = (sigA & UINT64_C(0x0008000000000000)) == 0;
if (aIsSignalingNaN || expB != 0x7FF || sigB)
return softfloat_propagateNaNF64UI(a, b, status);
return signB ? 0 : packToF64UI(0, 0x7FF, 0);
}
if (expB == 0x7FF && signB) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return defaultNaNF64UI;
}
return a;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (! expA) {
if (! sigA) {
if (expB == 0x7FF && ! signB) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return defaultNaNF64UI;
}
return packToF64UI(signA, 0, 0);
}
softfloat_raiseFlags(status, softfloat_flag_denormal);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if ((expB | sigB) == 0) return a;
if (expB == 0x7FF) {
if (signB) return packToF64UI(signA, 0, 0);
return packToF64UI(signA, 0x7FF, 0);
}
if (0x40F <= expB) {
// handle obvious overflow/underflow result
return softfloat_roundPackToF64(signA, signB ? -0x3FF : 0x7FF, sigA, status);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (expB < 0x3FF) {
if (expB == 0)
softfloat_raiseFlags(status, softfloat_flag_denormal);
scale = -signB;
}
else {
sigB |= UINT64_C(0x0010000000000000);
shiftCount = 0x433 - expB;
uint64_t prev_sigB = sigB;
sigB >>= shiftCount;
scale = (int32_t) sigB;
if (signB) {
if ((sigB<<shiftCount) != prev_sigB) scale++;
scale = -scale;
}
if (scale > 0x1000) scale = 0x1000;
if (scale < -0x1000) scale = -0x1000;
}
if (expA != 0) {
sigA |= UINT64_C(0x0010000000000000);
} else {
expA++;
}
expA += scale - 1;
sigA <<= 10;
return softfloat_normRoundPackToF64(signA, expA, sigA, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f64_scalef.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,413 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All Rights Reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
float128_t ui32_to_f128(uint32_t a)
{
uint64_t uiZ64;
int8_t shiftDist;
float128_t z;
uiZ64 = 0;
if (a) {
shiftDist = softfloat_countLeadingZeros32(a) + 17;
uiZ64 = packToF128UI64(0, 0x402E - shiftDist, (uint64_t) a<<shiftDist);
}
z.v64 = uiZ64;
z.v0 = 0;
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/ui32_to_f128.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 473 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "specialize.h"
/*your_sha256_hash------------
| Converts the common NaN pointed to by `aPtr' into a 64-bit floating-point
| NaN, and returns the bit pattern of this value as an unsigned integer.
*your_sha256_hash------------*/
uint64_t softfloat_commonNaNToF64UI(const struct commonNaN *aPtr)
{
return (uint64_t) aPtr->sign<<63 | UINT64_C(0x7FF8000000000000) | aPtr->v64>>12;
}
/*your_sha256_hash------------
| Assuming `uiA' has the bit pattern of a 64-bit floating-point NaN, converts
| this NaN to the common NaN form, and stores the resulting common NaN at the
| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid
| exception is raised.
*your_sha256_hash------------*/
void softfloat_f64UIToCommonNaN(uint64_t uiA, struct commonNaN *zPtr, struct softfloat_status_t *status)
{
if (softfloat_isSigNaNF64UI(uiA)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
}
zPtr->sign = uiA>>63;
zPtr->v64 = uiA<<12;
zPtr->v0 = 0;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_commonNaNToF64UI.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 615 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#ifndef softfloat_shiftRightJam32
uint32_t softfloat_shiftRightJam32(uint32_t a, uint16_t dist)
{
return (dist < 31) ? a>>dist | ((uint32_t) (a<<(-dist & 31)) != 0) : (a != 0);
}
#endif
``` | /content/code_sandbox/src/cpu/softfloat3e/s_shiftRightJam32.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 401 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
uint64_t f32_to_ui64_r_minMag(float32 a, bool exact, struct softfloat_status_t *status)
{
int16_t exp;
uint32_t sig;
int16_t shiftDist;
bool sign;
uint64_t sig64, z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
exp = expF32UI(a);
sig = fracF32UI(a);
if (softfloat_denormalsAreZeros(status))
if (!exp && sig) sig = 0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0xBE - exp;
if (64 <= shiftDist) {
if (exact && (exp | sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF32UI(a);
if (sign || (shiftDist < 0)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return (exp == 0xFF) && sig
? ui64_fromNaN
: sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sig |= 0x00800000;
sig64 = (uint64_t) sig<<40;
z = sig64>>shiftDist;
shiftDist = 40 - shiftDist;
if (exact && (shiftDist < 0) && (uint32_t) (sig<<(shiftDist & 31))) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f32_to_ui64_r_minMag.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 730 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "primitives.h"
#include "primitiveTypes.h"
void softfloat_mul128To256M(uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0, uint64_t *zPtr)
{
struct uint128 p0, p64, p128;
uint64_t z64, z128, z192;
p0 = softfloat_mul64To128(a0, b0);
zPtr[indexWord(4, 0)] = p0.v0;
p64 = softfloat_mul64To128(a64, b0);
z64 = p64.v0 + p0.v64;
z128 = p64.v64 + (z64 < p64.v0);
p128 = softfloat_mul64To128(a64, b64);
z128 += p128.v0;
z192 = p128.v64 + (z128 < p128.v0);
p64 = softfloat_mul64To128(a0, b64);
z64 += p64.v0;
zPtr[indexWord(4, 1)] = z64;
p64.v64 += (z64 < p64.v0);
z128 += p64.v64;
zPtr[indexWord(4, 2)] = z128;
zPtr[indexWord(4, 3)] = z192 + (z128 < p64.v64);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_mul128To256M.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 638 |
```c++
/*============================================================================
This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdio.h>
#include <stdint.h>
#include <86box/86box.h>
#include "../cpu.h"
#include "softfloat-specialize.h"
const floatx80 Const_QNaN = packFloatx80(0, floatx80_default_nan_exp, floatx80_default_nan_fraction);
const floatx80 Const_Z = packFloatx80(0, 0x0000, 0);
const floatx80 Const_1 = packFloatx80(0, 0x3fff, BX_CONST64(0x8000000000000000));
const floatx80 Const_L2T = packFloatx80(0, 0x4000, BX_CONST64(0xd49a784bcd1b8afe));
const floatx80 Const_L2E = packFloatx80(0, 0x3fff, BX_CONST64(0xb8aa3b295c17f0bc));
const floatx80 Const_PI = packFloatx80(0, 0x4000, BX_CONST64(0xc90fdaa22168c235));
const floatx80 Const_LG2 = packFloatx80(0, 0x3ffd, BX_CONST64(0x9a209a84fbcff799));
const floatx80 Const_LN2 = packFloatx80(0, 0x3ffe, BX_CONST64(0xb17217f7d1cf79ac));
const floatx80 Const_INF = packFloatx80(0, 0x7fff, BX_CONST64(0x8000000000000000));
``` | /content/code_sandbox/src/cpu/softfloat3e/consts.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 673 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "softfloat_types.h"
#ifndef softfloat_shiftRightJam128Extra
struct uint128_extra
softfloat_shiftRightJam128Extra(uint64_t a64, uint64_t a0, uint64_t extra, uint32_t dist)
{
uint8_t u8NegDist;
struct uint128_extra z;
u8NegDist = -dist;
if (dist < 64) {
z.v.v64 = a64>>dist;
z.v.v0 = a64<<(u8NegDist & 63) | a0>>dist;
z.extra = a0<<(u8NegDist & 63);
} else {
z.v.v64 = 0;
if (dist == 64) {
z.v.v0 = a64;
z.extra = a0;
} else {
extra |= a0;
if (dist < 128) {
z.v.v0 = a64>>(dist & 63);
z.extra = a64<<(u8NegDist & 63);
} else {
z.v.v0 = 0;
z.extra = (dist == 128) ? a64 : (a64 != 0);
}
}
}
z.extra |= (extra != 0);
return z;
}
#endif
``` | /content/code_sandbox/src/cpu/softfloat3e/s_shiftRightJam128Extra.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 609 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All Rights Reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
float32 ui64_to_f32(uint64_t a, struct softfloat_status_t *status)
{
int8_t shiftDist;
uint32_t sig;
shiftDist = softfloat_countLeadingZeros64(a) - 40;
if (0 <= shiftDist) {
return a ? packToF32UI(0, 0x95 - shiftDist, (uint32_t) a<<shiftDist) : 0;
} else {
shiftDist += 7;
sig = (shiftDist < 0) ? softfloat_shortShiftRightJam64(a, -shiftDist)
: (uint32_t) a<<shiftDist;
return softfloat_roundPackToF32(0, 0x9C - shiftDist, sig, status);
}
}
``` | /content/code_sandbox/src/cpu/softfloat3e/ui64_to_f32.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 517 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
/*your_sha256_hash------------
| Interpreting `uiA' and `uiB' as the bit patterns of two 64-bit floating-
| point values, at least one of which is a NaN, returns the bit pattern of
| the combined NaN result. If either `uiA' or `uiB' has the pattern of a
| signaling NaN, the invalid exception is raised.
*your_sha256_hash------------*/
uint64_t softfloat_propagateNaNF64UI(uint64_t uiA, uint64_t uiB, struct softfloat_status_t *status)
{
bool isSigNaNA;
isSigNaNA = softfloat_isSigNaNF64UI(uiA);
if (isSigNaNA || softfloat_isSigNaNF64UI(uiB)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
if (isSigNaNA) return uiA | UINT64_C(0x0008000000000000);
}
return (isNaNF64UI(uiA) ? uiA : uiB) | UINT64_C(0x0008000000000000);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_propagateNaNF64UI.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 584 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
#include "softfloat.h"
uint64_t f64_to_ui64(float64 a, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
bool sign;
int16_t exp;
uint64_t sig;
int16_t shiftDist;
struct uint64_extra sigExtra;
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF64UI(a);
exp = expF64UI(a);
sig = fracF64UI(a);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (exp) sig |= UINT64_C(0x0010000000000000);
else if (softfloat_denormalsAreZeros(status)) sig = 0;
shiftDist = 0x433 - exp;
if (shiftDist <= 0) {
if (shiftDist < -11) goto invalid;
sigExtra.v = sig<<-shiftDist;
sigExtra.extra = 0;
} else {
sigExtra = softfloat_shiftRightJam64Extra(sig, 0, shiftDist);
}
return softfloat_roundToUI64(sign, sigExtra.v, sigExtra.extra, roundingMode, exact, status);
/*your_sha256_hash--------
*your_sha256_hash--------*/
invalid:
softfloat_raiseFlags(status, softfloat_flag_invalid);
return (exp == 0x7FF) && fracF64UI(a)
? ui64_fromNaN
: sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f64_to_ui64.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 695 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
float64 softfloat_normRoundPackToF64(bool sign, int16_t exp, uint64_t sig, struct softfloat_status_t *status)
{
int8_t shiftDist = softfloat_countLeadingZeros64(sig) - 1;
exp -= shiftDist;
if ((10 <= shiftDist) && ((unsigned int) exp < 0x7FD)) {
return packToF64UI(sign, sig ? exp : 0, sig<<(shiftDist - 10));
} else {
return softfloat_roundPackToF64(sign, exp, sig<<shiftDist, status);
}
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_normRoundPackToF64.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 472 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
float16 f16_range(float16 a, float16 b, bool is_max, bool is_abs, int sign_ctrl, struct softfloat_status_t *status)
{
bool signA;
int8_t expA;
uint16_t sigA;
bool signB;
int8_t expB;
uint16_t sigB;
bool aIsNaN, bIsNaN;
uint16_t z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
signA = signF16UI(a);
expA = expF16UI(a);
sigA = fracF16UI(a);
signB = signF16UI(b);
expB = expF16UI(b);
sigB = fracF16UI(b);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (softfloat_isSigNaNF16UI(a)) {
return softfloat_propagateNaNF16UI(a, 0, status);
}
if (softfloat_isSigNaNF16UI(b)) {
return softfloat_propagateNaNF16UI(b, 0, status);
}
aIsNaN = isNaNF16UI(a);
bIsNaN = isNaNF16UI(b);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (! expA && sigA) {
if (softfloat_denormalsAreZeros(status)) {
a = packToF16UI(signA, 0, 0);
}
else if (! bIsNaN) {
softfloat_raiseFlags(status, softfloat_flag_denormal);
}
}
if (! expB && sigB) {
if (softfloat_denormalsAreZeros(status)) {
b = packToF16UI(signB, 0, 0);
}
else if (! aIsNaN) {
softfloat_raiseFlags(status, softfloat_flag_denormal);
}
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (bIsNaN) {
z = a;
}
else if (aIsNaN) {
z = b;
}
else if (signA != signB && ! is_abs) {
if (! is_max) {
z = signA ? a : b;
} else {
z = signA ? b : a;
}
} else {
float16 tmp_a = a, tmp_b = b;
if (is_abs) {
tmp_a = tmp_a & ~0x8000; // clear the sign bit
tmp_b = tmp_b & ~0x8000;
signA = 0;
}
if (! is_max) {
z = (signA ^ (tmp_a < tmp_b)) ? a : b;
} else {
z = (signA ^ (tmp_a < tmp_b)) ? b : a;
}
}
switch(sign_ctrl) {
case 0:
z = (z & ~0x8000) | (a & 0x8000); // keep sign of a
break;
case 1:
break; // preserve sign of compare result
case 2:
z = z & ~0x8000; // zero out the sign bit
break;
case 3:
z = z | 0x8000; // set the sign bit
break;
}
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f16_range.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,104 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
#include "softfloat.h"
uint64_t f128_to_ui64(float128_t a, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
uint64_t uiA64, uiA0;
bool sign;
int32_t exp;
uint64_t sig64, sig0;
int32_t shiftDist;
struct uint128 sig128;
struct uint64_extra sigExtra;
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.v64;
uiA0 = a.v0;
sign = signF128UI64(uiA64);
exp = expF128UI64(uiA64);
sig64 = fracF128UI64(uiA64);
sig0 = uiA0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x402F - exp;
if (shiftDist <= 0) {
/*your_sha256_hash----
*your_sha256_hash----*/
if (shiftDist < -15) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return
(exp == 0x7FFF) && (sig64 | sig0) ? ui64_fromNaN
: sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;
}
/*your_sha256_hash----
*your_sha256_hash----*/
sig64 |= UINT64_C(0x0001000000000000);
if (shiftDist) {
sig128 = softfloat_shortShiftLeft128(sig64, sig0, -shiftDist);
sig64 = sig128.v64;
sig0 = sig128.v0;
}
} else {
/*your_sha256_hash----
*your_sha256_hash----*/
if (exp) sig64 |= UINT64_C(0x0001000000000000);
sigExtra = softfloat_shiftRightJam64Extra(sig64, sig0, shiftDist);
sig64 = sigExtra.v;
sig0 = sigExtra.extra;
}
return softfloat_roundToUI64(sign, sig64, sig0, roundingMode, exact, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f128_to_ui64.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 832 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int32_t extF80_to_i32_r_minMag(extFloat80_t a, bool exact, struct softfloat_status_t *status)
{
uint16_t uiA64;
int32_t exp;
uint64_t sig;
int32_t shiftDist;
bool sign;
int32_t absZ;
// handle unsupported extended double-precision floating encodings
if (extF80_isUnsupported(a)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return i32_fromNaN;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.signExp;
exp = expExtF80UI64(uiA64);
sig = a.signif;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x403E - exp;
if (64 <= shiftDist) {
if (exact && (exp | sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signExtF80UI64(uiA64);
if (shiftDist < 33) {
if ((uiA64 == packToExtF80UI64(1, 0x401E)) && (sig < UINT64_C(0x8000000100000000))) {
if (exact && (sig & UINT64_C(0x00000000FFFFFFFF))) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return -0x7FFFFFFF - 1;
}
softfloat_raiseFlags(status, softfloat_flag_invalid);
return
(exp == 0x7FFF) && (sig & UINT64_C(0x7FFFFFFFFFFFFFFF))
? i32_fromNaN
: sign ? i32_fromNegOverflow : i32_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
absZ = sig>>shiftDist;
if (exact && ((uint64_t) (uint32_t) absZ<<shiftDist != sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return sign ? -absZ : absZ;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/extF80_to_i32_r_minMag.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 843 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#ifndef softfloat_le128
bool softfloat_le128(uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0)
{
return (a64 < b64) || ((a64 == b64) && (a0 <= b0));
}
#endif
``` | /content/code_sandbox/src/cpu/softfloat3e/s_le128.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 401 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "softfloat.h"
extFloat80_t packToExtF80_twoargs(uint16_t signExp, uint64_t sig)
{
extFloat80_t z;
z.signExp = signExp;
z.signif = sig;
return z;
}
extFloat80_t packToExtF80(bool sign, uint16_t exp, uint64_t sig)
{
extFloat80_t z;
z.signExp = packToExtF80UI64(sign, exp);
z.signif = sig;
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_packToExtF80.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 453 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
#include "specialize.h"
float64 f64_mulAdd(float64 a, float64 b, float64 c, uint8_t op, struct softfloat_status_t *status)
{
bool signA;
int16_t expA;
uint64_t sigA;
bool signB;
int16_t expB;
uint64_t sigB;
bool signC;
int16_t expC;
uint64_t sigC;
bool signZ;
uint64_t magBits, uiA, uiB, uiC, uiZ;
struct exp16_sig64 normExpSig;
int16_t expZ;
struct uint128 sig128Z;
uint64_t sigZ;
int16_t expDiff;
struct uint128 sig128C;
int8_t shiftDist;
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA = a;
uiB = b;
uiC = c;
/*your_sha256_hash--------
*your_sha256_hash--------*/
signA = signF64UI(uiA);
expA = expF64UI(uiA);
sigA = fracF64UI(uiA);
signB = signF64UI(uiB);
expB = expF64UI(uiB);
sigB = fracF64UI(uiB);
signC = signF64UI(uiC) ^ ((op & softfloat_mulAdd_subC) != 0);
expC = expF64UI(uiC);
sigC = fracF64UI(uiC);
signZ = signA ^ signB ^ ((op & softfloat_mulAdd_subProd) != 0);
/*your_sha256_hash--------
*your_sha256_hash--------*/
bool aisNaN = (expA == 0x7FF) && sigA;
bool bisNaN = (expB == 0x7FF) && sigB;
bool cisNaN = (expC == 0x7FF) && sigC;
if (aisNaN | bisNaN | cisNaN) {
uiZ = (aisNaN | bisNaN) ? softfloat_propagateNaNF64UI(uiA, uiB, status) : 0;
return softfloat_propagateNaNF64UI(uiZ, uiC, status);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (softfloat_denormalsAreZeros(status)) {
if (!expA) sigA = 0;
if (!expB) sigB = 0;
if (!expC) sigC = 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (expA == 0x7FF) {
magBits = expB | sigB;
goto infProdArg;
}
if (expB == 0x7FF) {
magBits = expA | sigA;
goto infProdArg;
}
if (expC == 0x7FF) {
if ((sigA && !expA) || (sigB && !expB)) {
softfloat_raiseFlags(status, softfloat_flag_denormal);
}
return packToF64UI(signC, 0x7FF, 0);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (! expA) {
if (! sigA) goto zeroProd;
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalF64Sig(sigA);
expA = normExpSig.exp;
sigA = normExpSig.sig;
}
if (! expB) {
if (! sigB) goto zeroProd;
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalF64Sig(sigB);
expB = normExpSig.exp;
sigB = normExpSig.sig;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
expZ = expA + expB - 0x3FE;
sigA = (sigA | UINT64_C(0x0010000000000000))<<10;
sigB = (sigB | UINT64_C(0x0010000000000000))<<10;
sig128Z = softfloat_mul64To128(sigA, sigB);
if (sig128Z.v64 < UINT64_C(0x2000000000000000)) {
--expZ;
sig128Z = softfloat_add128(sig128Z.v64, sig128Z.v0, sig128Z.v64, sig128Z.v0);
}
if (! expC) {
if (! sigC) {
--expZ;
sigZ = sig128Z.v64<<1 | (sig128Z.v0 != 0);
goto roundPack;
}
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalF64Sig(sigC);
expC = normExpSig.exp;
sigC = normExpSig.sig;
}
sigC = (sigC | UINT64_C(0x0010000000000000))<<9;
/*your_sha256_hash--------
*your_sha256_hash--------*/
expDiff = expZ - expC;
if (expDiff < 0) {
expZ = expC;
if ((signZ == signC) || (expDiff < -1)) {
sig128Z.v64 = softfloat_shiftRightJam64(sig128Z.v64, -expDiff);
} else {
sig128Z = softfloat_shortShiftRightJam128(sig128Z.v64, sig128Z.v0, 1);
}
} else if (expDiff) {
sig128C = softfloat_shiftRightJam128(sigC, 0, expDiff);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (signZ == signC) {
/*your_sha256_hash----
*your_sha256_hash----*/
if (expDiff <= 0) {
sigZ = (sigC + sig128Z.v64) | (sig128Z.v0 != 0);
} else {
sig128Z = softfloat_add128(sig128Z.v64, sig128Z.v0, sig128C.v64, sig128C.v0);
sigZ = sig128Z.v64 | (sig128Z.v0 != 0);
}
if (sigZ < UINT64_C(0x4000000000000000)) {
--expZ;
sigZ <<= 1;
}
} else {
/*your_sha256_hash----
*your_sha256_hash----*/
if (expDiff < 0) {
signZ = signC;
sig128Z = softfloat_sub128(sigC, 0, sig128Z.v64, sig128Z.v0);
} else if (! expDiff) {
sig128Z.v64 = sig128Z.v64 - sigC;
if (! (sig128Z.v64 | sig128Z.v0)) goto completeCancellation;
if (sig128Z.v64 & UINT64_C(0x8000000000000000)) {
signZ = ! signZ;
sig128Z = softfloat_sub128(0, 0, sig128Z.v64, sig128Z.v0);
}
} else {
sig128Z = softfloat_sub128(sig128Z.v64, sig128Z.v0, sig128C.v64, sig128C.v0);
}
/*your_sha256_hash----
*your_sha256_hash----*/
if (! sig128Z.v64) {
expZ -= 64;
sig128Z.v64 = sig128Z.v0;
sig128Z.v0 = 0;
}
shiftDist = softfloat_countLeadingZeros64(sig128Z.v64) - 1;
expZ -= shiftDist;
if (shiftDist < 0) {
sigZ = softfloat_shortShiftRightJam64(sig128Z.v64, -shiftDist);
} else {
sig128Z = softfloat_shortShiftLeft128(sig128Z.v64, sig128Z.v0, shiftDist);
sigZ = sig128Z.v64;
}
sigZ |= (sig128Z.v0 != 0);
}
roundPack:
return softfloat_roundPackToF64(signZ, expZ, sigZ, status);
/*your_sha256_hash--------
*your_sha256_hash--------*/
infProdArg:
if (magBits) {
uiZ = packToF64UI(signZ, 0x7FF, 0);
if (signZ == signC || expC != 0x7FF) {
if ((sigA && !expA) || (sigB && !expB) || (sigC && !expC))
softfloat_raiseFlags(status, softfloat_flag_denormal);
return uiZ;
}
}
softfloat_raiseFlags(status, softfloat_flag_invalid);
uiZ = defaultNaNF64UI;
return softfloat_propagateNaNF64UI(uiZ, uiC, status);
/*your_sha256_hash--------
*your_sha256_hash--------*/
zeroProd:
uiZ = packToF64UI(signC, expC, sigC);
if (!expC && sigC) {
/* Exact zero plus a denormal */
softfloat_raiseFlags(status, softfloat_flag_denormal);
if (softfloat_flushUnderflowToZero(status)) {
softfloat_raiseFlags(status, softfloat_flag_underflow | softfloat_flag_inexact);
return packToF64UI(signC, 0, 0);
}
}
if (! (expC | sigC) && (signZ != signC)) {
completeCancellation:
uiZ = packToF64UI((softfloat_getRoundingMode(status) == softfloat_round_min), 0, 0);
}
return uiZ;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f64_mulAdd.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 2,538 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
float128_t i32_to_f128(int32_t a)
{
uint64_t uiZ64;
bool sign;
uint32_t absA;
int8_t shiftDist;
float128_t z;
uiZ64 = 0;
if (a) {
sign = (a < 0);
absA = sign ? -(uint32_t) a : (uint32_t) a;
shiftDist = softfloat_countLeadingZeros32(absA) + 17;
uiZ64 = packToF128UI64(sign, 0x402E - shiftDist, (uint64_t) absA<<shiftDist);
}
z.v64 = uiZ64;
z.v0 = 0;
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/i32_to_f128.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 514 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int32_t softfloat_roundToI32(bool sign, uint64_t sig, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
uint16_t roundIncrement, roundBits;
uint32_t sig32;
union { uint32_t ui; int32_t i; } uZ;
int32_t z;
uint64_t absSigExact = sig;
/*your_sha256_hash--------
*your_sha256_hash--------*/
roundIncrement = 0x800;
if ((roundingMode != softfloat_round_near_maxMag) && (roundingMode != softfloat_round_near_even)) {
roundIncrement = 0;
if (sign ? (roundingMode == softfloat_round_min) : (roundingMode == softfloat_round_max)) {
roundIncrement = 0xFFF;
}
}
roundBits = sig & 0xFFF;
sig += roundIncrement;
if (sig & UINT64_C(0xFFFFF00000000000)) goto invalid;
sig32 = sig>>12;
if ((roundBits == 0x800) && (roundingMode == softfloat_round_near_even)) {
sig32 &= ~(uint32_t) 1;
}
uZ.ui = sign ? -sig32 : sig32;
z = uZ.i;
if (z && ((z < 0) ^ sign)) goto invalid;
if (roundBits) {
if (exact) softfloat_raiseFlags(status, softfloat_flag_inexact);
if (((uint64_t)sig32 << 12) > absSigExact)
softfloat_setRoundingUp(status);
}
return z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
invalid:
softfloat_raiseFlags(status, softfloat_flag_invalid);
return sign ? i32_fromNegOverflow : i32_fromPosOverflow;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_roundToI32.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 757 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "primitives.h"
extern const uint16_t softfloat_approxRecipSqrt_1k0s[];
extern const uint16_t softfloat_approxRecipSqrt_1k1s[];
uint32_t softfloat_approxRecipSqrt32_1(unsigned int oddExpA, uint32_t a)
{
int index;
uint16_t eps, r0;
uint32_t ESqrR0;
uint32_t sigma0;
uint32_t r;
uint32_t sqrSigma0;
index = (a>>27 & 0xE) + oddExpA;
eps = (uint16_t) (a>>12);
r0 = softfloat_approxRecipSqrt_1k0s[index] - ((softfloat_approxRecipSqrt_1k1s[index] * (uint32_t) eps) >>20);
ESqrR0 = (uint32_t) r0 * r0;
if (! oddExpA) ESqrR0 <<= 1;
sigma0 = ~(uint32_t) (((uint32_t) ESqrR0 * (uint64_t) a)>>23);
r = ((uint32_t) r0<<16) + ((r0 * (uint64_t) sigma0)>>25);
sqrSigma0 = ((uint64_t) sigma0 * sigma0)>>32;
r += ((uint32_t) ((r>>1) + (r>>3) - ((uint32_t) r0<<14)) * (uint64_t) sqrSigma0) >>48;
if (! (r & 0x80000000)) r = 0x80000000;
return r;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_approxRecipSqrt32_1.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 693 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
float128_t softfloat_addMagsF128(uint64_t uiA64, uint64_t uiA0, uint64_t uiB64, uint64_t uiB0, bool signZ, struct softfloat_status_t *status)
{
int32_t expA;
struct uint128 sigA;
int32_t expB;
struct uint128 sigB;
int32_t expDiff;
struct uint128 uiZ, sigZ;
int32_t expZ;
uint64_t sigZExtra;
struct uint128_extra sig128Extra;
expA = expF128UI64(uiA64);
sigA.v64 = fracF128UI64(uiA64);
sigA.v0 = uiA0;
expB = expF128UI64(uiB64);
sigB.v64 = fracF128UI64(uiB64);
sigB.v0 = uiB0;
expDiff = expA - expB;
if (! expDiff) {
if (expA == 0x7FFF) {
if (sigA.v64 | sigA.v0 | sigB.v64 | sigB.v0) goto propagateNaN;
uiZ.v64 = uiA64;
uiZ.v0 = uiA0;
return uiZ;
}
sigZ = softfloat_add128(sigA.v64, sigA.v0, sigB.v64, sigB.v0);
if (! expA) {
uiZ.v64 = packToF128UI64(signZ, 0, sigZ.v64);
uiZ.v0 = sigZ.v0;
return uiZ;
}
expZ = expA;
sigZ.v64 |= UINT64_C(0x0002000000000000);
sigZExtra = 0;
goto shiftRight1;
}
if (expDiff < 0) {
if (expB == 0x7FFF) {
if (sigB.v64 | sigB.v0) goto propagateNaN;
uiZ.v64 = packToF128UI64(signZ, 0x7FFF, 0);
uiZ.v0 = 0;
return uiZ;
}
expZ = expB;
if (expA) {
sigA.v64 |= UINT64_C(0x0001000000000000);
} else {
++expDiff;
sigZExtra = 0;
if (! expDiff) goto newlyAligned;
}
sig128Extra =
softfloat_shiftRightJam128Extra(sigA.v64, sigA.v0, 0, -expDiff);
sigA = sig128Extra.v;
sigZExtra = sig128Extra.extra;
} else {
if (expA == 0x7FFF) {
if (sigA.v64 | sigA.v0) goto propagateNaN;
uiZ.v64 = uiA64;
uiZ.v0 = uiA0;
return uiZ;
}
expZ = expA;
if (expB) {
sigB.v64 |= UINT64_C(0x0001000000000000);
} else {
--expDiff;
sigZExtra = 0;
if (! expDiff) goto newlyAligned;
}
sig128Extra = softfloat_shiftRightJam128Extra(sigB.v64, sigB.v0, 0, expDiff);
sigB = sig128Extra.v;
sigZExtra = sig128Extra.extra;
}
newlyAligned:
sigZ =
softfloat_add128(
sigA.v64 | UINT64_C(0x0001000000000000),
sigA.v0,
sigB.v64,
sigB.v0
);
--expZ;
if (sigZ.v64 < UINT64_C(0x0002000000000000)) goto roundAndPack;
++expZ;
shiftRight1:
sig128Extra = softfloat_shortShiftRightJam128Extra(sigZ.v64, sigZ.v0, sigZExtra, 1);
sigZ = sig128Extra.v;
sigZExtra = sig128Extra.extra;
roundAndPack:
return
softfloat_roundPackToF128(signZ, expZ, sigZ.v64, sigZ.v0, sigZExtra, status);
propagateNaN:
uiZ = softfloat_propagateNaNF128UI(uiA64, uiA0, uiB64, uiB0, status);
return uiZ;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_addMagsF128.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,333 |
```c++
/*============================================================================
This source file is an extension to the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2b, written for Bochs (x86 achitecture simulator)
floating point emulation.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) the source code for the derivative work includes prominent notice that
the work is derivative, and (2) the source code includes prominent notice with
these four paragraphs for those parts of this code that are retained.
=============================================================================*/
/*============================================================================
* Written for Bochs (x86 achitecture simulator) by
* Stanislav Shwartsman [sshwarts at sourceforge net]
* ==========================================================================*/
#include "fpu_trans.h"
#define USE_estimateDiv128To64
#include "softfloat-helpers.h"
#include "specialize.h" // for softfloat_propagateNaNExtF80UI
/* executes single exponent reduction cycle */
static uint64_t remainder_kernel(uint64_t aSig0, uint64_t bSig, int expDiff, uint64_t *zSig0, uint64_t *zSig1)
{
uint128 term, z;
uint64_t aSig1 = 0;
shortShift128Left(aSig1, aSig0, expDiff, &aSig1, &aSig0);
uint64_t q = estimateDiv128To64(aSig1, aSig0, bSig);
term = softfloat_mul64To128(bSig, q);
z = softfloat_sub128(aSig1, aSig0, term.v64, term.v0);
while ((int64_t) z.v64 < 0) {
--q;
z = softfloat_add128(z.v64, z.v0, 0, bSig);
}
*zSig0 = z.v0;
*zSig1 = z.v64;
return q;
}
static int do_fprem(floatx80 a, floatx80 b, floatx80 *r, uint64_t *q, int rounding_mode, struct softfloat_status_t *status)
{
/*your_sha256_hash------------
| The pattern for a default generated extended double-precision NaN.
*your_sha256_hash------------*/
static const floatx80 floatx80_default_nan =
packFloatx80(0, floatx80_default_nan_exp, floatx80_default_nan_fraction);
int32_t aExp, bExp, zExp, expDiff;
uint64_t aSig0, aSig1 = 0, bSig;
int aSign;
struct exp32_sig64 normExpSig;
uint128 term;
*q = 0;
// handle unsupported extended double-precision floating encodings
if (extF80_isUnsupported(a) || extF80_isUnsupported(b)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
*r = floatx80_default_nan;
return -1;
}
aSig0 = extF80_fraction(a);
aExp = extF80_exp(a);
aSign = extF80_sign(a);
bSig = extF80_fraction(b);
bExp = extF80_exp(b);
if (aExp == 0x7FFF) {
if ((aSig0<<1) || ((bExp == 0x7FFF) && (bSig<<1))) {
*r = softfloat_propagateNaNExtF80UI(a.signExp, a.signif, b.signExp, b.signif, status);
return -1;
}
softfloat_raiseFlags(status, softfloat_flag_invalid);
*r = floatx80_default_nan;
return -1;
}
if (bExp == 0x7FFF) {
if (bSig << 1) {
*r = softfloat_propagateNaNExtF80UI(a.signExp, a.signif, b.signExp, b.signif, status);
return -1;
}
if (! aExp && aSig0) {
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalExtF80Sig(aSig0);
aExp = normExpSig.exp + 1;
aSig0 = normExpSig.sig;
*r = (a.signif & BX_CONST64(0x8000000000000000)) ? packToExtF80(aSign, aExp, aSig0) : a;
return 0;
}
*r = a;
return 0;
}
if (! bExp) {
if (! bSig) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
*r = floatx80_default_nan;
return -1;
}
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalExtF80Sig(bSig);
bExp = normExpSig.exp + 1;
bSig = normExpSig.sig;
}
if (! aExp) {
if (! aSig0) {
*r = a;
return 0;
}
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalExtF80Sig(aSig0);
aExp = normExpSig.exp + 1;
aSig0 = normExpSig.sig;
}
expDiff = aExp - bExp;
int overflow = 0;
if (expDiff >= 64) {
int n = (expDiff & 0x1f) | 0x20;
remainder_kernel(aSig0, bSig, n, &aSig0, &aSig1);
zExp = aExp - n;
overflow = 1;
}
else {
zExp = bExp;
if (expDiff < 0) {
if (expDiff < -1) {
*r = (a.signif & BX_CONST64(0x8000000000000000)) ? packToExtF80(aSign, aExp, aSig0) : a;
return 0;
}
shortShift128Right(aSig0, 0, 1, &aSig0, &aSig1);
expDiff = 0;
}
if (expDiff > 0) {
*q = remainder_kernel(aSig0, bSig, expDiff, &aSig0, &aSig1);
}
else {
if (bSig <= aSig0) {
aSig0 -= bSig;
*q = 1;
}
}
if (rounding_mode == softfloat_round_near_even) {
uint64_t term0, term1;
shortShift128Right(bSig, 0, 1, &term0, &term1);
if (! softfloat_lt128(aSig0, aSig1, term0, term1)) {
int lt = softfloat_lt128(term0, term1, aSig0, aSig1);
int eq = softfloat_eq128(aSig0, aSig1, term0, term1);
if ((eq && ((*q) & 1)) || lt) {
aSign = !aSign;
++(*q);
}
if (lt) {
term = softfloat_sub128(bSig, 0, aSig0, aSig1);
aSig0 = term.v64;
aSig1 = term.v0;
}
}
}
}
*r = softfloat_normRoundPackToExtF80(aSign, zExp, aSig0, aSig1, 80, status);
return overflow;
}
/*your_sha256_hash------------
| Returns the remainder of the extended double-precision floating-point value
| `a' with respect to the corresponding value `b'. The operation is performed
| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*your_sha256_hash------------*/
int floatx80_ieee754_remainder(floatx80 a, floatx80 b, floatx80 *r, uint64_t *q, struct softfloat_status_t *status)
{
return do_fprem(a, b, r, q, softfloat_round_near_even, status);
}
/*your_sha256_hash------------
| Returns the remainder of the extended double-precision floating-point value
| `a' with respect to the corresponding value `b'. Unlike previous function
| the function does not compute the remainder specified in the IEC/IEEE
| Standard for Binary Floating-Point Arithmetic. This function operates
| differently from the previous function in the way that it rounds the
| quotient of 'a' divided by 'b' to an integer.
*your_sha256_hash------------*/
int floatx80_remainder(floatx80 a, floatx80 b, floatx80 *r, uint64_t *q, struct softfloat_status_t *status)
{
return do_fprem(a, b, r, q, softfloat_round_to_zero, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/fprem.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 2,115 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int64_t
softfloat_roundToI64(bool sign, uint64_t sig, uint64_t sigExtra, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
union { uint64_t ui; int64_t i; } uZ;
int64_t z;
uint64_t absSigExact = sig;
/*your_sha256_hash--------
*your_sha256_hash--------*/
if ((roundingMode == softfloat_round_near_maxMag) || (roundingMode == softfloat_round_near_even)) {
if (UINT64_C(0x8000000000000000) <= sigExtra) goto increment;
} else {
if (sigExtra
&& (sign ? (roundingMode == softfloat_round_min) : (roundingMode == softfloat_round_max))) {
increment:
++sig;
if (!sig) goto invalid;
if ((sigExtra == UINT64_C(0x8000000000000000)) && (roundingMode == softfloat_round_near_even)) {
sig &= ~(uint64_t) 1;
}
}
}
uZ.ui = sign ? -sig : sig;
z = uZ.i;
if (z && ((z < 0) ^ sign)) goto invalid;
if (sigExtra) {
if (exact) softfloat_raiseFlags(status, softfloat_flag_inexact);
if (sig > absSigExact)
softfloat_setRoundingUp(status);
}
return z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
invalid:
softfloat_raiseFlags(status, softfloat_flag_invalid);
return sign ? i64_fromNegOverflow : i64_fromPosOverflow;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_roundToI64.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 722 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
bool f16_isNaN(float16 a)
{
return isNaNF16UI(a);
}
bool f32_isNaN(float32 a)
{
return isNaNF32UI(a);
}
bool f64_isNaN(float64 a)
{
return isNaNF64UI(a);
}
bool extF80_isNaN(extFloat80_t a)
{
return isNaNExtF80UI(a.signExp, a.signif);
}
bool f128_isNaN(float128_t a)
{
return isNaNF128UI(a.v64, a.v0);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/isNaN.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 457 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
#include "softfloat.h"
float32 softfloat_subMagsF32(uint32_t uiA, uint32_t uiB, struct softfloat_status_t *status)
{
int16_t expA;
uint32_t sigA;
int16_t expB;
uint32_t sigB;
int16_t expDiff;
int32_t sigDiff;
bool signZ;
int8_t shiftDist;
int16_t expZ;
uint32_t sigX, sigY;
/*your_sha256_hash--------
*your_sha256_hash--------*/
expA = expF32UI(uiA);
sigA = fracF32UI(uiA);
expB = expF32UI(uiB);
sigB = fracF32UI(uiB);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (softfloat_denormalsAreZeros(status)) {
if (!expA) sigA = 0;
if (!expB) sigB = 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
expDiff = expA - expB;
if (! expDiff) {
/*your_sha256_hash----
*your_sha256_hash----*/
if (expA == 0xFF) {
if (sigA | sigB) goto propagateNaN;
softfloat_raiseFlags(status, softfloat_flag_invalid);
return defaultNaNF32UI;
}
if (!expA && (sigA | sigB)) softfloat_raiseFlags(status, softfloat_flag_denormal);
sigDiff = sigA - sigB;
if (! sigDiff) {
return packToF32UI((softfloat_getRoundingMode(status) == softfloat_round_min), 0, 0);
}
if (expA) --expA;
signZ = signF32UI(uiA);
if (sigDiff < 0) {
signZ = ! signZ;
sigDiff = -sigDiff;
}
shiftDist = softfloat_countLeadingZeros32(sigDiff) - 8;
expZ = expA - shiftDist;
if (expZ < 0) {
shiftDist = expA;
expZ = 0;
}
if (!expZ && sigDiff) {
if (softfloat_flushUnderflowToZero(status)) {
softfloat_raiseFlags(status, softfloat_flag_underflow | softfloat_flag_inexact);
return packToF32UI(signZ, 0, 0);
}
if (! softfloat_isMaskedException(status, softfloat_flag_underflow)) {
softfloat_raiseFlags(status, softfloat_flag_underflow);
}
}
return packToF32UI(signZ, expZ, sigDiff<<shiftDist);
} else {
/*your_sha256_hash----
*your_sha256_hash----*/
signZ = signF32UI(uiA);
sigA <<= 7;
sigB <<= 7;
if (expDiff < 0) {
/*your_sha256_hash
*your_sha256_hash*/
signZ = ! signZ;
if (expB == 0xFF) {
if (sigB) goto propagateNaN;
if (sigA && !expA) softfloat_raiseFlags(status, softfloat_flag_denormal);
return packToF32UI(signZ, 0xFF, 0);
}
if ((sigA && !expA) || (sigB && !expB))
softfloat_raiseFlags(status, softfloat_flag_denormal);
expZ = expB - 1;
sigX = sigB | 0x40000000;
sigY = sigA + (expA ? 0x40000000 : sigA);
expDiff = -expDiff;
} else {
/*your_sha256_hash
*your_sha256_hash*/
if (expA == 0xFF) {
if (sigA) goto propagateNaN;
if (sigB && !expB) softfloat_raiseFlags(status, softfloat_flag_denormal);
return uiA;
}
if ((sigA && !expA) || (sigB && !expB))
softfloat_raiseFlags(status, softfloat_flag_denormal);
expZ = expA - 1;
sigX = sigA | 0x40000000;
sigY = sigB + (expB ? 0x40000000 : sigB);
}
return
softfloat_normRoundPackToF32(signZ, expZ, sigX - softfloat_shiftRightJam32(sigY, expDiff), status);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
propagateNaN:
return softfloat_propagateNaNF32UI(uiA, uiB, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_subMagsF32.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,391 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
uint32_t f16_to_ui32(float16 a, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
bool sign;
int8_t exp;
uint16_t frac;
uint32_t sig32;
int8_t shiftDist;
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF16UI(a);
exp = expF16UI(a);
frac = fracF16UI(a);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (exp == 0x1F) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return
frac ? ui32_fromNaN
: sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sig32 = frac;
if (exp) {
sig32 |= 0x0400;
shiftDist = exp - 0x19;
if ((0 <= shiftDist) && ! sign) {
return sig32<<shiftDist;
}
shiftDist = exp - 0x0D;
if (0 < shiftDist) sig32 <<= shiftDist;
}
else {
if (softfloat_denormalsAreZeros(status)) sig32 = 0;
}
return softfloat_roundToUI32(sign, sig32, roundingMode, exact, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f16_to_ui32.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 672 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int64_t f16_to_i64(float16 a, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
bool sign;
int8_t exp;
uint16_t frac;
int32_t sig32;
int8_t shiftDist;
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF16UI(a);
exp = expF16UI(a);
frac = fracF16UI(a);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (exp == 0x1F) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return
frac ? i64_fromNaN
: sign ? i64_fromNegOverflow : i64_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sig32 = frac;
if (exp) {
sig32 |= 0x0400;
shiftDist = exp - 0x19;
if (0 <= shiftDist) {
sig32 <<= shiftDist;
return sign ? -sig32 : sig32;
}
shiftDist = exp - 0x0D;
if (0 < shiftDist) sig32 <<= shiftDist;
}
else {
if (softfloat_denormalsAreZeros(status)) sig32 = 0;
}
return softfloat_roundToI32(sign, (uint32_t) sig32, roundingMode, exact, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f16_to_i64.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 683 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
uint64_t extF80_to_ui64_r_minMag(extFloat80_t a, bool exact, struct softfloat_status_t *status)
{
uint16_t uiA64;
int32_t exp;
uint64_t sig;
int32_t shiftDist;
bool sign;
uint64_t z;
// handle unsupported extended double-precision floating encodings
if (extF80_isUnsupported(a)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return ui64_fromNaN;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.signExp;
exp = expExtF80UI64(uiA64);
sig = a.signif;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x403E - exp;
if (64 <= shiftDist) {
if (exact && (exp | sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signExtF80UI64(uiA64);
if (sign || (shiftDist < 0)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return
(exp == 0x7FFF) && (sig & UINT64_C(0x7FFFFFFFFFFFFFFF))
? ui64_fromNaN
: sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
z = sig>>shiftDist;
if (exact && (z<<shiftDist != sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/extF80_to_ui64_r_minMag.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 737 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int32_t f32_to_i32_r_minMag(float32 a, bool exact, struct softfloat_status_t *status)
{
int16_t exp;
uint32_t sig;
int16_t shiftDist;
bool sign;
int32_t absZ;
/*your_sha256_hash--------
*your_sha256_hash--------*/
exp = expF32UI(a);
sig = fracF32UI(a);
if (softfloat_denormalsAreZeros(status))
if (!exp && sig) sig = 0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x9E - exp;
if (32 <= shiftDist) {
if (exact && (exp | sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF32UI(a);
if (shiftDist <= 0) {
if (a == packToF32UI(1, 0x9E, 0)) return -0x7FFFFFFF - 1;
softfloat_raiseFlags(status, softfloat_flag_invalid);
return (exp == 0xFF) && sig
? i32_fromNaN
: sign ? i32_fromNegOverflow : i32_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sig = (sig | 0x00800000)<<8;
absZ = sig>>shiftDist;
if (exact && ((uint32_t) absZ<<shiftDist != sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return sign ? -absZ : absZ;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f32_to_i32_r_minMag.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 739 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
uint64_t f128_to_ui64_r_minMag(float128_t a, bool exact, struct softfloat_status_t *status)
{
uint64_t uiA64, uiA0;
bool sign;
int32_t exp;
uint64_t sig64, sig0;
int32_t shiftDist;
int8_t negShiftDist;
uint64_t z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.v64;
uiA0 = a.v0;
sign = signF128UI64(uiA64);
exp = expF128UI64(uiA64);
sig64 = fracF128UI64(uiA64);
sig0 = uiA0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x402F - exp;
if (shiftDist < 0) {
/*your_sha256_hash----
*your_sha256_hash----*/
if (sign || (shiftDist < -15)) goto invalid;
sig64 |= UINT64_C(0x0001000000000000);
negShiftDist = -shiftDist;
z = sig64<<negShiftDist | sig0>>(shiftDist & 63);
if (exact && (uint64_t) (sig0<<negShiftDist)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
} else {
/*your_sha256_hash----
*your_sha256_hash----*/
if (49 <= shiftDist) {
if (exact && (exp | sig64 | sig0)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash----
*your_sha256_hash----*/
if (sign) goto invalid;
sig64 |= UINT64_C(0x0001000000000000);
z = sig64>>shiftDist;
if (exact && (sig0 || (z<<shiftDist != sig64))) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
}
return z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
invalid:
softfloat_raiseFlags(status, softfloat_flag_invalid);
return
(exp == 0x7FFF) && (sig64 | sig0) ? ui64_fromNaN
: sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f128_to_ui64_r_minMag.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 891 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
uint32_t f32_to_ui32_r_minMag(float32 a, bool exact, struct softfloat_status_t *status)
{
int16_t exp;
uint32_t sig;
int16_t shiftDist;
bool sign;
uint32_t z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
exp = expF32UI(a);
sig = fracF32UI(a);
if (softfloat_denormalsAreZeros(status))
if (!exp && sig) sig = 0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x9E - exp;
if (32 <= shiftDist) {
if (exact && (exp | sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF32UI(a);
if (sign || (shiftDist < 0)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return (exp == 0xFF) && sig
? ui32_fromNaN
: sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sig = (sig | 0x00800000)<<8;
z = sig>>shiftDist;
if (exact && (z<<shiftDist != sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f32_to_ui32_r_minMag.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 697 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
float64 i32_to_f64(int32_t a)
{
bool sign;
uint32_t absA;
int8_t shiftDist;
if (! a) {
return 0;
} else {
sign = (a < 0);
absA = sign ? -(uint32_t) a : (uint32_t) a;
shiftDist = softfloat_countLeadingZeros32(absA) + 21;
return packToF64UI(sign, 0x432 - shiftDist, (uint64_t) absA<<shiftDist);
}
}
``` | /content/code_sandbox/src/cpu/softfloat3e/i32_to_f64.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 478 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
extFloat80_t
softfloat_roundPackToExtF80(bool sign, int32_t exp, uint64_t sig, uint64_t sigExtra, uint8_t roundingPrecision, struct softfloat_status_t *status)
{
uint8_t roundingMode;
bool roundNearEven;
uint64_t roundIncrement, roundMask, roundBits;
bool isTiny, doIncrement;
struct uint64_extra sig64Extra;
uint64_t sigExact;
/*your_sha256_hash--------
*your_sha256_hash--------*/
roundingMode = softfloat_getRoundingMode(status);
roundNearEven = (roundingMode == softfloat_round_near_even);
if (roundingPrecision == 80) goto precision80;
if (roundingPrecision == 64) {
roundIncrement = UINT64_C(0x0000000000000400);
roundMask = UINT64_C(0x00000000000007FF);
} else if (roundingPrecision == 32) {
roundIncrement = UINT64_C(0x0000008000000000);
roundMask = UINT64_C(0x000000FFFFFFFFFF);
} else {
goto precision80;
}
sig |= (sigExtra != 0);
if (! roundNearEven && (roundingMode != softfloat_round_near_maxMag)) {
roundIncrement =
(roundingMode == (sign ? softfloat_round_min : softfloat_round_max)) ? roundMask : 0;
}
roundBits = sig & roundMask;
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (0x7FFD <= (uint32_t) (exp - 1)) {
if (exp <= 0) {
/*your_sha256_hash
*your_sha256_hash*/
isTiny = (exp < 0) || (sig <= (uint64_t) (sig + roundIncrement));
if (isTiny && sig && ! softfloat_isMaskedException(status, softfloat_flag_underflow)) {
softfloat_raiseFlags(status, softfloat_flag_underflow);
exp += 0x6000;
}
else {
sig = softfloat_shiftRightJam64(sig, 1 - exp);
roundBits = sig & roundMask;
sigExact = sig;
sig += roundIncrement;
exp = ((sig & UINT64_C(0x8000000000000000)) != 0);
roundIncrement = roundMask + 1;
if (roundNearEven && (roundBits<<1 == roundIncrement)) {
roundMask |= roundIncrement;
}
sig &= ~roundMask;
if (roundBits) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
if (sig > sigExact) softfloat_setRoundingUp(status);
if (isTiny)
softfloat_raiseFlags(status, softfloat_flag_underflow);
}
return packToExtF80(sign, exp, sig);
}
}
if ((0x7FFE < exp) || ((exp == 0x7FFE) && ((uint64_t) (sig + roundIncrement) < sig))) {
if (! softfloat_isMaskedException(status, softfloat_flag_overflow)) {
softfloat_raiseFlags(status, softfloat_flag_overflow);
exp -= 0x6000;
}
if ((0x7FFE < exp) || ((exp == 0x7FFE) && ((uint64_t) (sig + roundIncrement) < sig))) {
goto overflow;
}
}
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sigExact = sig;
sig = (uint64_t) (sig + roundIncrement);
if (sig < roundIncrement) {
++exp;
sig = UINT64_C(0x8000000000000000);
sigExact >>= 1; // must scale also, or else later tests will fail
}
roundIncrement = roundMask + 1;
if (roundNearEven && (roundBits<<1 == roundIncrement)) {
roundMask |= roundIncrement;
}
sig &= ~roundMask;
if (roundBits) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
if (sig > sigExact) softfloat_setRoundingUp(status);
}
return packToExtF80(sign, exp, sig);
/*your_sha256_hash--------
*your_sha256_hash--------*/
precision80:
doIncrement = (UINT64_C(0x8000000000000000) <= sigExtra);
if (! roundNearEven && (roundingMode != softfloat_round_near_maxMag)) {
doIncrement =
(roundingMode == (sign ? softfloat_round_min : softfloat_round_max)) && sigExtra;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (0x7FFD <= (uint32_t) (exp - 1)) {
if (exp <= 0) {
/*your_sha256_hash
*your_sha256_hash*/
isTiny = (exp < 0) || ! doIncrement || (sig < UINT64_C(0xFFFFFFFFFFFFFFFF));
if (isTiny && sig && ! softfloat_isMaskedException(status, softfloat_flag_underflow)) {
softfloat_raiseFlags(status, softfloat_flag_underflow);
exp += 0x6000;
}
else {
sig64Extra = softfloat_shiftRightJam64Extra(sig, sigExtra, 1 - exp);
exp = 0;
sig = sig64Extra.v;
sigExtra = sig64Extra.extra;
if (sigExtra) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
if (isTiny)
softfloat_raiseFlags(status, softfloat_flag_underflow);
}
doIncrement = (UINT64_C(0x8000000000000000) <= sigExtra);
if (! roundNearEven && (roundingMode != softfloat_round_near_maxMag)) {
doIncrement =
(roundingMode == (sign ? softfloat_round_min : softfloat_round_max)) && sigExtra;
}
if (doIncrement) {
sigExact = sig;
++sig;
sig &= ~(uint64_t) (! (sigExtra & UINT64_C(0x7FFFFFFFFFFFFFFF)) & roundNearEven);
exp = ((sig & UINT64_C(0x8000000000000000)) != 0);
if (sig > sigExact)
softfloat_setRoundingUp(status);
}
return packToExtF80(sign, exp, sig);
}
}
if ((0x7FFE < exp) || ((exp == 0x7FFE) && (sig == UINT64_C(0xFFFFFFFFFFFFFFFF)) && doIncrement)) {
if (! softfloat_isMaskedException(status, softfloat_flag_overflow)) {
softfloat_raiseFlags(status, softfloat_flag_overflow);
exp -= 0x6000;
}
if ((0x7FFE < exp) || ((exp == 0x7FFE) && (sig == UINT64_C(0xFFFFFFFFFFFFFFFF)) && doIncrement)) {
/*your_sha256_hash
*your_sha256_hash*/
roundMask = 0;
overflow:
softfloat_raiseFlags(status, softfloat_flag_overflow | softfloat_flag_inexact);
if (roundNearEven
|| (roundingMode == softfloat_round_near_maxMag)
|| (roundingMode == (sign ? softfloat_round_min : softfloat_round_max))
) {
exp = 0x7FFF;
sig = UINT64_C(0x8000000000000000);
softfloat_setRoundingUp(status);
} else {
exp = 0x7FFE;
sig = ~roundMask;
}
return packToExtF80(sign, exp, sig);
}
}
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (sigExtra) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
if (doIncrement) {
sigExact = sig;
++sig;
if (! sig) {
++exp;
sig = UINT64_C(0x8000000000000000);
sigExact >>= 1; // must scale also, or else later tests will fail
} else {
sig &= ~(uint64_t) (! (sigExtra & UINT64_C(0x7FFFFFFFFFFFFFFF)) & roundNearEven);
}
if (sig > sigExact)
softfloat_setRoundingUp(status);
}
else {
if (! sig) exp = 0;
}
return packToExtF80(sign, exp, sig);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_roundPackToExtF80.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 2,229 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "primitives.h"
const uint16_t softfloat_approxRecip_1k0s[16] = {
0xFFC4, 0xF0BE, 0xE363, 0xD76F, 0xCCAD, 0xC2F0, 0xBA16, 0xB201,
0xAA97, 0xA3C6, 0x9D7A, 0x97A6, 0x923C, 0x8D32, 0x887E, 0x8417
};
const uint16_t softfloat_approxRecip_1k1s[16] = {
0xF0F1, 0xD62C, 0xBFA1, 0xAC77, 0x9C0A, 0x8DDB, 0x8185, 0x76BA,
0x6D3B, 0x64D4, 0x5D5C, 0x56B1, 0x50B6, 0x4B55, 0x4679, 0x4211
};
``` | /content/code_sandbox/src/cpu/softfloat3e/s_approxRecip_1Ks.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 586 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#ifndef softfloat_shiftRightJam64
uint64_t softfloat_shiftRightJam64(uint64_t a, uint32_t dist)
{
return (dist < 63) ? a>>dist | ((uint64_t) (a<<(-dist & 63)) != 0) : (a != 0);
}
#endif
``` | /content/code_sandbox/src/cpu/softfloat3e/s_shiftRightJam64.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 401 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
float32 f32_range(float32 a, float32 b, bool is_max, bool is_abs, int sign_ctrl, struct softfloat_status_t *status)
{
bool signA;
int16_t expA;
uint32_t sigA;
bool signB;
int16_t expB;
uint32_t sigB;
bool aIsNaN, bIsNaN;
uint32_t z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
signA = signF32UI(a);
expA = expF32UI(a);
sigA = fracF32UI(a);
signB = signF32UI(b);
expB = expF32UI(b);
sigB = fracF32UI(b);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (softfloat_isSigNaNF32UI(a)) {
return softfloat_propagateNaNF32UI(a, 0, status);
}
if (softfloat_isSigNaNF32UI(b)) {
return softfloat_propagateNaNF32UI(b, 0, status);
}
aIsNaN = isNaNF32UI(a);
bIsNaN = isNaNF32UI(b);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (! expA && sigA) {
if (softfloat_denormalsAreZeros(status)) {
a = packToF32UI(signA, 0, 0);
}
else if (! bIsNaN) {
softfloat_raiseFlags(status, softfloat_flag_denormal);
}
}
if (! expB && sigB) {
if (softfloat_denormalsAreZeros(status)) {
b = packToF32UI(signB, 0, 0);
}
else if (! aIsNaN) {
softfloat_raiseFlags(status, softfloat_flag_denormal);
}
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (bIsNaN) {
z = a;
}
else if (aIsNaN) {
z = b;
}
else if (signA != signB && ! is_abs) {
if (! is_max) {
z = signA ? a : b;
} else {
z = signA ? b : a;
}
} else {
float32 tmp_a = a, tmp_b = b;
if (is_abs) {
tmp_a = tmp_a & ~0x80000000; // clear the sign bit
tmp_b = tmp_b & ~0x80000000;
signA = 0;
}
if (! is_max) {
z = (signA ^ (tmp_a < tmp_b)) ? a : b;
} else {
z = (signA ^ (tmp_a < tmp_b)) ? b : a;
}
}
switch(sign_ctrl) {
case 0:
z = (z & ~0x80000000) | (a & 0x80000000); // keep sign of a
break;
case 1:
break; // preserve sign of compare result
case 2:
z = z & ~0x80000000; // zero out the sign bit
break;
case 3:
z = z | 0x80000000; // set the sign bit
break;
}
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f32_range.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,110 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
#include "softfloat.h"
uint32_t f128_to_ui32(float128_t a, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
uint64_t uiA64, uiA0;
bool sign;
int32_t exp;
uint64_t sig64;
int32_t shiftDist;
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.v64;
uiA0 = a.v0;
sign = signF128UI64(uiA64);
exp = expF128UI64(uiA64);
sig64 = fracF128UI64(uiA64) | (uiA0 != 0);
/*your_sha256_hash--------
*your_sha256_hash--------*/
#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow)
if ((exp == 0x7FFF) && sig64) {
#if (ui32_fromNaN == ui32_fromPosOverflow)
sign = 0;
#elif (ui32_fromNaN == ui32_fromNegOverflow)
sign = 1;
#else
softfloat_raiseFlags(status, softfloat_flag_invalid);
return ui32_fromNaN;
#endif
}
#endif
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (exp) sig64 |= UINT64_C(0x0001000000000000);
shiftDist = 0x4023 - exp;
if (0 < shiftDist) {
sig64 = softfloat_shiftRightJam64(sig64, shiftDist);
}
return softfloat_roundToUI32(sign, sig64, roundingMode, exact, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f128_to_ui32.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 730 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int32_t f16_to_i32_r_minMag(float16 a, bool exact, struct softfloat_status_t *status)
{
int8_t exp;
uint16_t frac;
int8_t shiftDist;
bool sign;
int32_t alignedSig;
/*your_sha256_hash--------
*your_sha256_hash--------*/
exp = expF16UI(a);
frac = fracF16UI(a);
if (softfloat_denormalsAreZeros(status))
if (!exp && frac) frac = 0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = exp - 0x0F;
if (shiftDist < 0) {
if (exact && (exp | frac)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF16UI(a);
if (exp == 0x1F) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return (exp == 0x1F) && frac
? i32_fromNaN
: sign ? i32_fromNegOverflow : i32_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
alignedSig = (int32_t) (frac | 0x0400)<<shiftDist;
if (exact && (alignedSig & 0x3FF)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
alignedSig >>= 10;
return sign ? -alignedSig : alignedSig;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f16_to_i32_r_minMag.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 714 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
#include "softfloat.h"
int32_t f128_to_i32(float128_t a, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
uint64_t uiA64, uiA0;
bool sign;
int32_t exp;
uint64_t sig64, sig0;
int32_t shiftDist;
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.v64;
uiA0 = a.v0;
sign = signF128UI64(uiA64);
exp = expF128UI64(uiA64);
sig64 = fracF128UI64(uiA64);
sig0 = uiA0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow)
if ((exp == 0x7FFF) && (sig64 | sig0)) {
#if (i32_fromNaN == i32_fromPosOverflow)
sign = 0;
#elif (i32_fromNaN == i32_fromNegOverflow)
sign = 1;
#else
softfloat_raiseFlags(status, softfloat_flag_invalid);
return i32_fromNaN;
#endif
}
#endif
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (exp) sig64 |= UINT64_C(0x0001000000000000);
sig64 |= (sig0 != 0);
shiftDist = 0x4023 - exp;
if (0 < shiftDist) sig64 = softfloat_shiftRightJam64(sig64, shiftDist);
return softfloat_roundToI32(sign, sig64, roundingMode, exact, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f128_to_i32.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 744 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
uint32_t extF80_to_ui32_r_minMag(extFloat80_t a, bool exact, struct softfloat_status_t *status)
{
uint16_t uiA64;
int32_t exp;
uint64_t sig;
int32_t shiftDist;
bool sign;
uint32_t z;
// handle unsupported extended double-precision floating encodings
if (extF80_isUnsupported(a)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return ui32_fromNaN;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.signExp;
exp = expExtF80UI64(uiA64);
sig = a.signif;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x403E - exp;
if (64 <= shiftDist) {
if (exact && (exp | sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signExtF80UI64(uiA64);
if (sign || (shiftDist < 32)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return
(exp == 0x7FFF) && (sig & UINT64_C(0x7FFFFFFFFFFFFFFF))
? ui32_fromNaN
: sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
z = sig>>shiftDist;
if (exact && ((uint64_t) z<<shiftDist != sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/extF80_to_ui32_r_minMag.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 741 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int64_t f64_to_i64_r_minMag(float64 a, bool exact, struct softfloat_status_t *status)
{
bool sign;
int16_t exp;
uint64_t sig;
int16_t shiftDist;
uint64_t absZ;
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF64UI(a);
exp = expF64UI(a);
sig = fracF64UI(a);
if (softfloat_denormalsAreZeros(status))
if (!exp && sig) sig = 0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x433 - exp;
if (shiftDist <= 0) {
/*your_sha256_hash----
*your_sha256_hash----*/
if (shiftDist < -10) {
if (a == packToF64UI(1, 0x43E, 0)) {
return -INT64_C(0x7FFFFFFFFFFFFFFF) - 1;
}
softfloat_raiseFlags(status, softfloat_flag_invalid);
return (exp == 0x7FF) && sig
? i64_fromNaN
: sign ? i64_fromNegOverflow : i64_fromPosOverflow;
}
/*your_sha256_hash----
*your_sha256_hash----*/
sig |= UINT64_C(0x0010000000000000);
absZ = sig<<-shiftDist;
} else {
/*your_sha256_hash----
*your_sha256_hash----*/
if (53 <= shiftDist) {
if (exact && (exp | sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash----
*your_sha256_hash----*/
sig |= UINT64_C(0x0010000000000000);
absZ = sig>>shiftDist;
if (exact && (absZ<<shiftDist != sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
}
return sign ? -absZ : absZ;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f64_to_i64_r_minMag.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 822 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int64_t f16_to_i64_r_minMag(float16 a, bool exact, struct softfloat_status_t *status)
{
int8_t exp;
uint16_t frac;
int8_t shiftDist;
bool sign;
int32_t alignedSig;
/*your_sha256_hash--------
*your_sha256_hash--------*/
exp = expF16UI(a);
frac = fracF16UI(a);
if (softfloat_denormalsAreZeros(status))
if (!exp && frac) frac = 0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = exp - 0x0F;
if (shiftDist < 0) {
if (exact && (exp | frac)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF16UI(a);
if (exp == 0x1F) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return (exp == 0x1F) && frac
? i64_fromNaN
: sign ? i64_fromNegOverflow : i64_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
alignedSig = (int32_t) (frac | 0x0400)<<shiftDist;
if (exact && (alignedSig & 0x3FF)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
alignedSig >>= 10;
return sign ? -alignedSig : alignedSig;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f16_to_i64_r_minMag.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 714 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
#include "softfloat.h"
uint32_t f64_to_ui32(float64 a, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
bool sign;
int16_t exp;
uint64_t sig;
int16_t shiftDist;
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF64UI(a);
exp = expF64UI(a);
sig = fracF64UI(a);
/*your_sha256_hash--------
*your_sha256_hash--------*/
#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow)
if ((exp == 0x7FF) && sig) {
#if (ui32_fromNaN == ui32_fromPosOverflow)
sign = 0;
#elif (ui32_fromNaN == ui32_fromNegOverflow)
sign = 1;
#else
softfloat_raiseFlags(status, softfloat_flag_invalid);
return ui32_fromNaN;
#endif
}
#endif
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (exp) sig |= UINT64_C(0x0010000000000000);
else if (softfloat_denormalsAreZeros(status)) sig = 0;
shiftDist = 0x427 - exp;
if (0 < shiftDist) sig = softfloat_shiftRightJam64(sig, shiftDist);
return softfloat_roundToUI32(sign, sig, roundingMode, exact, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f64_to_ui32.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 688 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
#include "softfloat.h"
float128_t
softfloat_subMagsF128(
uint64_t uiA64,
uint64_t uiA0,
uint64_t uiB64,
uint64_t uiB0,
bool signZ,
struct softfloat_status_t *status
)
{
int32_t expA;
struct uint128 sigA;
int32_t expB;
struct uint128 sigB, sigZ;
int32_t expDiff, expZ;
struct uint128 uiZ;
expA = expF128UI64(uiA64);
sigA.v64 = fracF128UI64(uiA64);
sigA.v0 = uiA0;
expB = expF128UI64(uiB64);
sigB.v64 = fracF128UI64(uiB64);
sigB.v0 = uiB0;
sigA = softfloat_shortShiftLeft128(sigA.v64, sigA.v0, 4);
sigB = softfloat_shortShiftLeft128(sigB.v64, sigB.v0, 4);
expDiff = expA - expB;
if (0 < expDiff) goto expABigger;
if (expDiff < 0) goto expBBigger;
if (expA == 0x7FFF) {
if (sigA.v64 | sigA.v0 | sigB.v64 | sigB.v0) goto propagateNaN;
softfloat_raiseFlags(status, softfloat_flag_invalid);
uiZ.v64 = defaultNaNF128UI64;
uiZ.v0 = defaultNaNF128UI0;
return uiZ;
}
expZ = expA;
if (! expZ) expZ = 1;
if (sigB.v64 < sigA.v64) goto aBigger;
if (sigA.v64 < sigB.v64) goto bBigger;
if (sigB.v0 < sigA.v0) goto aBigger;
if (sigA.v0 < sigB.v0) goto bBigger;
uiZ.v64 = packToF128UI64((softfloat_getRoundingMode(status) == softfloat_round_min), 0, 0);
uiZ.v0 = 0;
return uiZ;
expBBigger:
if (expB == 0x7FFF) {
if (sigB.v64 | sigB.v0) goto propagateNaN;
uiZ.v64 = packToF128UI64(signZ ^ 1, 0x7FFF, 0);
uiZ.v0 = 0;
return uiZ;
}
if (expA) {
sigA.v64 |= UINT64_C(0x0010000000000000);
} else {
++expDiff;
if (! expDiff) goto newlyAlignedBBigger;
}
sigA = softfloat_shiftRightJam128(sigA.v64, sigA.v0, -expDiff);
newlyAlignedBBigger:
expZ = expB;
sigB.v64 |= UINT64_C(0x0010000000000000);
bBigger:
signZ = ! signZ;
sigZ = softfloat_sub128(sigB.v64, sigB.v0, sigA.v64, sigA.v0);
goto normRoundPack;
expABigger:
if (expA == 0x7FFF) {
if (sigA.v64 | sigA.v0) goto propagateNaN;
uiZ.v64 = uiA64;
uiZ.v0 = uiA0;
return uiZ;
}
if (expB) {
sigB.v64 |= UINT64_C(0x0010000000000000);
} else {
--expDiff;
if (! expDiff) goto newlyAlignedABigger;
}
sigB = softfloat_shiftRightJam128(sigB.v64, sigB.v0, expDiff);
newlyAlignedABigger:
expZ = expA;
sigA.v64 |= UINT64_C(0x0010000000000000);
aBigger:
sigZ = softfloat_sub128(sigA.v64, sigA.v0, sigB.v64, sigB.v0);
normRoundPack:
return softfloat_normRoundPackToF128(signZ, expZ - 5, sigZ.v64, sigZ.v0, status);
propagateNaN:
uiZ = softfloat_propagateNaNF128UI(uiA64, uiA0, uiB64, uiB0, status);
return uiZ;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_subMagsF128.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,345 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
uint64_t
softfloat_roundToUI64(bool sign, uint64_t sig, uint64_t sigExtra, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
uint64_t absSigExact = sig;
/*your_sha256_hash--------
*your_sha256_hash--------*/
if ((roundingMode == softfloat_round_near_maxMag) || (roundingMode == softfloat_round_near_even)) {
if (UINT64_C(0x8000000000000000) <= sigExtra) goto increment;
} else {
if (sign) {
if (!(sig | sigExtra)) return 0;
if (roundingMode == softfloat_round_min) goto invalid;
} else {
if ((roundingMode == softfloat_round_max) && sigExtra) {
increment:
++sig;
if (!sig) goto invalid;
if ((sigExtra == UINT64_C(0x8000000000000000)) && (roundingMode == softfloat_round_near_even)) {
sig &= ~(uint64_t) 1;
}
}
}
}
if (sign && sig) goto invalid;
if (sigExtra) {
if (exact) softfloat_raiseFlags(status, softfloat_flag_inexact);
if (sig > absSigExact)
softfloat_setRoundingUp(status);
}
return sig;
/*your_sha256_hash--------
*your_sha256_hash--------*/
invalid:
softfloat_raiseFlags(status, softfloat_flag_invalid);
return sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_roundToUI64.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 696 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
#define SOFTFLOAT_FAST_DIV64TO32
float32 f32_div(float32 a, float32 b, struct softfloat_status_t *status)
{
bool signA;
int16_t expA;
uint32_t sigA;
bool signB;
int16_t expB;
uint32_t sigB;
bool signZ;
struct exp16_sig32 normExpSig;
int16_t expZ;
#ifdef SOFTFLOAT_FAST_DIV64TO32
uint64_t sig64A;
uint32_t sigZ;
#endif
/*your_sha256_hash--------
*your_sha256_hash--------*/
signA = signF32UI(a);
expA = expF32UI(a);
sigA = fracF32UI(a);
signB = signF32UI(b);
expB = expF32UI(b);
sigB = fracF32UI(b);
signZ = signA ^ signB;
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (softfloat_denormalsAreZeros(status)) {
if (!expA) sigA = 0;
if (!expB) sigB = 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (expA == 0xFF) {
if (sigA) goto propagateNaN;
if (expB == 0xFF) {
if (sigB) goto propagateNaN;
goto invalid;
}
if (sigB && !expB)
softfloat_raiseFlags(status, softfloat_flag_denormal);
goto infinity;
}
if (expB == 0xFF) {
if (sigB) goto propagateNaN;
if (sigA && !expA)
softfloat_raiseFlags(status, softfloat_flag_denormal);
goto zero;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (! expB) {
if (! sigB) {
if (! (expA | sigA)) goto invalid;
softfloat_raiseFlags(status, softfloat_flag_infinite);
goto infinity;
}
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalF32Sig(sigB);
expB = normExpSig.exp;
sigB = normExpSig.sig;
}
if (! expA) {
if (! sigA) goto zero;
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalF32Sig(sigA);
expA = normExpSig.exp;
sigA = normExpSig.sig;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
expZ = expA - expB + 0x7E;
sigA |= 0x00800000;
sigB |= 0x00800000;
#ifdef SOFTFLOAT_FAST_DIV64TO32
if (sigA < sigB) {
--expZ;
sig64A = (uint64_t) sigA<<31;
} else {
sig64A = (uint64_t) sigA<<30;
}
sigZ = sig64A / sigB;
if (! (sigZ & 0x3F)) sigZ |= ((uint64_t) sigB * sigZ != sig64A);
#endif
return softfloat_roundPackToF32(signZ, expZ, sigZ, status);
/*your_sha256_hash--------
*your_sha256_hash--------*/
propagateNaN:
return softfloat_propagateNaNF32UI(a, b, status);
/*your_sha256_hash--------
*your_sha256_hash--------*/
invalid:
softfloat_raiseFlags(status, softfloat_flag_invalid);
return defaultNaNF32UI;
/*your_sha256_hash--------
*your_sha256_hash--------*/
infinity:
return packToF32UI(signZ, 0xFF, 0);
/*your_sha256_hash--------
*your_sha256_hash--------*/
zero:
return packToF32UI(signZ, 0, 0);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f32_div.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,246 |
```c++
/*============================================================================
This source file is an extension to the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2b, written for Bochs (x86 achitecture simulator)
floating point emulation.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) the source code for the derivative work includes prominent notice that
the work is derivative, and (2) the source code includes prominent notice with
these four paragraphs for those parts of this code that are retained.
=============================================================================*/
/*============================================================================
* Written for Bochs (x86 achitecture simulator) by
* Stanislav Shwartsman [sshwarts at sourceforge net]
* ==========================================================================*/
#include <assert.h>
#include "softfloat.h"
#include "poly.h"
// 2 3 4 n
// f(x) ~ C + (C * x) + (C * x) + (C * x) + (C * x) + ... + (C * x)
// 0 1 2 3 4 n
//
// -- 2k -- 2k+1
// p(x) = > C * x q(x) = > C * x
// -- 2k -- 2k+1
//
// f(x) ~ [ p(x) + x * q(x) ]
//
float128_t EvalPoly(float128_t x, const float128_t *arr, int n, struct softfloat_status_t *status)
{
float128_t r = arr[--n];
do {
r = f128_mulAdd(r, x, arr[--n], 0, status);
// r = f128_mul(r, x, &status);
// r = f128_add(r, arr[--n], &status);
} while (n > 0);
return r;
}
// 2 4 6 8 2n
// f(x) ~ C + (C * x) + (C * x) + (C * x) + (C * x) + ... + (C * x)
// 0 1 2 3 4 n
//
// -- 4k -- 4k+2
// p(x) = > C * x q(x) = > C * x
// -- 2k -- 2k+1
//
// 2
// f(x) ~ [ p(x) + x * q(x) ]
//
float128_t EvenPoly(float128_t x, const float128_t *arr, int n, softfloat_status_t &status)
{
return EvalPoly(f128_mul(x, x, &status), arr, n, &status);
}
// 3 5 7 9 2n+1
// f(x) ~ (C * x) + (C * x) + (C * x) + (C * x) + (C * x) + ... + (C * x)
// 0 1 2 3 4 n
// 2 4 6 8 2n
// = x * [ C + (C * x) + (C * x) + (C * x) + (C * x) + ... + (C * x)
// 0 1 2 3 4 n
//
// -- 4k -- 4k+2
// p(x) = > C * x q(x) = > C * x
// -- 2k -- 2k+1
//
// 2
// f(x) ~ x * [ p(x) + x * q(x) ]
//
float128_t OddPoly(float128_t x, const float128_t *arr, int n, softfloat_status_t &status)
{
return f128_mul(x, EvenPoly(x, arr, n, status), &status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/poly.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 1,063 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "specialize.h"
/*your_sha256_hash------------
| Converts the common NaN pointed to by `aPtr' into a 16-bit floating-point
| NaN, and returns the bit pattern of this value as an unsigned integer.
*your_sha256_hash------------*/
uint16_t softfloat_commonNaNToF16UI(const struct commonNaN *aPtr)
{
return (uint16_t) aPtr->sign<<15 | 0x7E00 | aPtr->v64>>54;
}
/*your_sha256_hash------------
| Assuming `uiA' has the bit pattern of a 16-bit floating-point NaN, converts
| this NaN to the common NaN form, and stores the resulting common NaN at the
| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid
| exception is raised.
*your_sha256_hash------------*/
void softfloat_f16UIToCommonNaN(uint16_t uiA, struct commonNaN *zPtr, struct softfloat_status_t *status)
{
if (softfloat_isSigNaNF16UI(uiA)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
}
zPtr->sign = uiA>>15;
zPtr->v64 = (uint64_t) uiA<<54;
zPtr->v0 = 0;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_commonNaNToF16UI.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 615 |
```objective-c
/*============================================================================
This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#ifndef _SOFTFLOAT_COMPARE_H_
#define _SOFTFLOAT_COMPARE_H_
#include "softfloat.h"
// ======= float16 ======= //
typedef int (*float16_compare_method)(float16, float16, struct softfloat_status_t *status);
// 0x00
static __inline int f16_eq_ordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation == softfloat_relation_equal);
}
// 0x01
static __inline int f16_lt_ordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation == softfloat_relation_less);
}
// 0x02
static __inline int f16_le_ordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_equal);
}
// 0x03
static __inline int f16_unordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation == softfloat_relation_unordered);
}
// 0x04
static __inline int f16_neq_unordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation != softfloat_relation_equal);
}
// 0x05
static __inline int f16_nlt_unordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation != softfloat_relation_less);
}
// 0x06
static __inline int f16_nle_unordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation != softfloat_relation_less) && (relation != softfloat_relation_equal);
}
// 0x07
static __inline int f16_ordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation != softfloat_relation_unordered);
}
// 0x08
static __inline int f16_eq_unordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation == softfloat_relation_equal) || (relation == softfloat_relation_unordered);
}
// 0x09
static __inline int f16_nge_unordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_unordered);
}
// 0x0a
static __inline int f16_ngt_unordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation != softfloat_relation_greater);
}
// 0x0b
static __inline int f16_false_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
f16_compare_quiet(a, b, status);
return 0;
}
// 0x0c
static __inline int f16_neq_ordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation != softfloat_relation_equal) && (relation != softfloat_relation_unordered);
}
// 0x0d
static __inline int f16_ge_ordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation == softfloat_relation_greater) || (relation == softfloat_relation_equal);
}
// 0x0e
static __inline int f16_gt_ordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation == softfloat_relation_greater);
}
// 0x0f
static __inline int f16_true_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
f16_compare_quiet(a, b, status);
return 1;
}
// 0x10
static __inline int f16_eq_ordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation == softfloat_relation_equal);
}
// 0x11
static __inline int f16_lt_ordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation == softfloat_relation_less);
}
// 0x12
static __inline int f16_le_ordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_equal);
}
// 0x13
static __inline int f16_unordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation == softfloat_relation_unordered);
}
// 0x14
static __inline int f16_neq_unordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation != softfloat_relation_equal);
}
// 0x15
static __inline int f16_nlt_unordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation != softfloat_relation_less);
}
// 0x16
static __inline int f16_nle_unordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation != softfloat_relation_less) && (relation != softfloat_relation_equal);
}
// 0x17
static __inline int f16_ordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation != softfloat_relation_unordered);
}
// 0x18
static __inline int f16_eq_unordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation == softfloat_relation_equal) || (relation == softfloat_relation_unordered);
}
// 0x19
static __inline int f16_nge_unordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_unordered);
}
// 0x1a
static __inline int f16_ngt_unordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation != softfloat_relation_greater);
}
// 0x1b
static __inline int f16_false_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
f16_compare(a, b, status);
return 0;
}
// 0x1c
static __inline int f16_neq_ordered_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare(a, b, status);
return (relation != softfloat_relation_equal) && (relation != softfloat_relation_unordered);
}
// 0x1d
static __inline int f16_ge_ordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation == softfloat_relation_greater) || (relation == softfloat_relation_equal);
}
// 0x1e
static __inline int f16_gt_ordered_quiet(float16 a, float16 b, struct softfloat_status_t *status)
{
int relation = f16_compare_quiet(a, b, status);
return (relation == softfloat_relation_greater);
}
// 0x1f
static __inline int f16_true_signalling(float16 a, float16 b, struct softfloat_status_t *status)
{
f16_compare(a, b, status);
return 1;
}
// ======= float32 ======= //
typedef int (*float32_compare_method)(float32, float32, struct softfloat_status_t *status);
// 0x00
static __inline int f32_eq_ordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation == softfloat_relation_equal);
}
// 0x01
static __inline int f32_lt_ordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation == softfloat_relation_less);
}
// 0x02
static __inline int f32_le_ordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_equal);
}
// 0x03
static __inline int f32_unordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation == softfloat_relation_unordered);
}
// 0x04
static __inline int f32_neq_unordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation != softfloat_relation_equal);
}
// 0x05
static __inline int f32_nlt_unordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation != softfloat_relation_less);
}
// 0x06
static __inline int f32_nle_unordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation != softfloat_relation_less) && (relation != softfloat_relation_equal);
}
// 0x07
static __inline int f32_ordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation != softfloat_relation_unordered);
}
// 0x08
static __inline int f32_eq_unordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation == softfloat_relation_equal) || (relation == softfloat_relation_unordered);
}
// 0x09
static __inline int f32_nge_unordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_unordered);
}
// 0x0a
static __inline int f32_ngt_unordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation != softfloat_relation_greater);
}
// 0x0b
static __inline int f32_false_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
f32_compare_quiet(a, b, status);
return 0;
}
// 0x0c
static __inline int f32_neq_ordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation != softfloat_relation_equal) && (relation != softfloat_relation_unordered);
}
// 0x0d
static __inline int f32_ge_ordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation == softfloat_relation_greater) || (relation == softfloat_relation_equal);
}
// 0x0e
static __inline int f32_gt_ordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation == softfloat_relation_greater);
}
// 0x0f
static __inline int f32_true_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
f32_compare_quiet(a, b, status);
return 1;
}
// 0x10
static __inline int f32_eq_ordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation == softfloat_relation_equal);
}
// 0x11
static __inline int f32_lt_ordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation == softfloat_relation_less);
}
// 0x12
static __inline int f32_le_ordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_equal);
}
// 0x13
static __inline int f32_unordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation == softfloat_relation_unordered);
}
// 0x14
static __inline int f32_neq_unordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation != softfloat_relation_equal);
}
// 0x15
static __inline int f32_nlt_unordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation != softfloat_relation_less);
}
// 0x16
static __inline int f32_nle_unordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation != softfloat_relation_less) && (relation != softfloat_relation_equal);
}
// 0x17
static __inline int f32_ordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation != softfloat_relation_unordered);
}
// 0x18
static __inline int f32_eq_unordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation == softfloat_relation_equal) || (relation == softfloat_relation_unordered);
}
// 0x19
static __inline int f32_nge_unordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_unordered);
}
// 0x1a
static __inline int f32_ngt_unordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation != softfloat_relation_greater);
}
// 0x1b
static __inline int f32_false_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
f32_compare(a, b, status);
return 0;
}
// 0x1c
static __inline int f32_neq_ordered_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare(a, b, status);
return (relation != softfloat_relation_equal) && (relation != softfloat_relation_unordered);
}
// 0x1d
static __inline int f32_ge_ordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation == softfloat_relation_greater) || (relation == softfloat_relation_equal);
}
// 0x1e
static __inline int f32_gt_ordered_quiet(float32 a, float32 b, struct softfloat_status_t *status)
{
int relation = f32_compare_quiet(a, b, status);
return (relation == softfloat_relation_greater);
}
// 0x1f
static __inline int f32_true_signalling(float32 a, float32 b, struct softfloat_status_t *status)
{
f32_compare(a, b, status);
return 1;
}
// ======= float64 ======= //
typedef int (*float64_compare_method)(float64, float64, struct softfloat_status_t *status);
// 0x00
static __inline int f64_eq_ordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation == softfloat_relation_equal);
}
// 0x01
static __inline int f64_lt_ordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation == softfloat_relation_less);
}
// 0x02
static __inline int f64_le_ordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_equal);
}
// 0x03
static __inline int f64_unordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation == softfloat_relation_unordered);
}
// 0x04
static __inline int f64_neq_unordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation != softfloat_relation_equal);
}
// 0x05
static __inline int f64_nlt_unordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation != softfloat_relation_less);
}
// 0x06
static __inline int f64_nle_unordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation != softfloat_relation_less) && (relation != softfloat_relation_equal);
}
// 0x07
static __inline int f64_ordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation != softfloat_relation_unordered);
}
// 0x08
static __inline int f64_eq_unordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation == softfloat_relation_equal) || (relation == softfloat_relation_unordered);
}
// 0x09
static __inline int f64_nge_unordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_unordered);
}
// 0x0a
static __inline int f64_ngt_unordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation != softfloat_relation_greater);
}
// 0x0b
static __inline int f64_false_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
f64_compare_quiet(a, b, status);
return 0;
}
// 0x0c
static __inline int f64_neq_ordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation != softfloat_relation_equal) && (relation != softfloat_relation_unordered);
}
// 0x0d
static __inline int f64_ge_ordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation == softfloat_relation_greater) || (relation == softfloat_relation_equal);
}
// 0x0e
static __inline int f64_gt_ordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation == softfloat_relation_greater);
}
// 0x0f
static __inline int f64_true_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
f64_compare_quiet(a, b, status);
return 1;
}
// 0x10
static __inline int f64_eq_ordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation == softfloat_relation_equal);
}
// 0x11
static __inline int f64_lt_ordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation == softfloat_relation_less);
}
// 0x12
static __inline int f64_le_ordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_equal);
}
// 0x13
static __inline int f64_unordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation == softfloat_relation_unordered);
}
// 0x14
static __inline int f64_neq_unordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation != softfloat_relation_equal);
}
// 0x15
static __inline int f64_nlt_unordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation != softfloat_relation_less);
}
// 0x16
static __inline int f64_nle_unordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation != softfloat_relation_less) && (relation != softfloat_relation_equal);
}
// 0x17
static __inline int f64_ordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation != softfloat_relation_unordered);
}
// 0x18
static __inline int f64_eq_unordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation == softfloat_relation_equal) || (relation == softfloat_relation_unordered);
}
// 0x19
static __inline int f64_nge_unordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation == softfloat_relation_less) || (relation == softfloat_relation_unordered);
}
// 0x1a
static __inline int f64_ngt_unordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation != softfloat_relation_greater);
}
// 0x1b
static __inline int f64_false_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
f64_compare(a, b, status);
return 0;
}
// 0x1c
static __inline int f64_neq_ordered_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare(a, b, status);
return (relation != softfloat_relation_equal) && (relation != softfloat_relation_unordered);
}
// 0x1d
static __inline int f64_ge_ordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation == softfloat_relation_greater) || (relation == softfloat_relation_equal);
}
// 0x1e
static __inline int f64_gt_ordered_quiet(float64 a, float64 b, struct softfloat_status_t *status)
{
int relation = f64_compare_quiet(a, b, status);
return (relation == softfloat_relation_greater);
}
// 0x1f
static __inline int f64_true_signalling(float64 a, float64 b, struct softfloat_status_t *status)
{
f64_compare(a, b, status);
return 1;
}
#endif
``` | /content/code_sandbox/src/cpu/softfloat3e/softfloat-compare.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 6,353 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
int32_t f64_to_i32_r_minMag(float64 a, bool exact, struct softfloat_status_t *status)
{
int16_t exp;
uint64_t sig;
int16_t shiftDist;
bool sign;
int32_t absZ;
/*your_sha256_hash--------
*your_sha256_hash--------*/
exp = expF64UI(a);
sig = fracF64UI(a);
if (softfloat_denormalsAreZeros(status))
if (!exp && sig) sig = 0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x433 - exp;
if (53 <= shiftDist) {
if (exact && (exp | sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF64UI(a);
if (shiftDist < 22) {
if (sign && (exp == 0x41E) && (sig < UINT64_C(0x0000000000200000))) {
if (exact && sig) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return -0x7FFFFFFF - 1;
}
softfloat_raiseFlags(status, softfloat_flag_invalid);
return (exp == 0x7FF) && sig
? i32_fromNaN
: sign ? i32_fromNegOverflow : i32_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sig |= UINT64_C(0x0010000000000000);
absZ = sig>>shiftDist;
if (exact && ((uint64_t) (uint32_t) absZ<<shiftDist != sig)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return sign ? -absZ : absZ;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f64_to_i32_r_minMag.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 783 |
```objective-c
/////////////////////////////////////////////////////////////////////////
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
//
// You should have received a copy of the GNU Lesser General Public
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
//
/////////////////////////////////////////////////////////////////////////
#ifndef _POLY_H_
#define _POLY_H_
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
float128_t EvenPoly(float128_t x, const float128_t *arr, int n, softfloat_status_t &status);
float128_t OddPoly(float128_t x, const float128_t *arr, int n, softfloat_status_t &status);
#else
float128_t EvenPoly(float128_t x, const float128_t *arr, int n, struct softfloat_status_t *status);
float128_t OddPoly(float128_t x, const float128_t *arr, int n, struct float_status_t *status);
#endif // __cplusplus
#ifdef __cplusplus
}
#endif
#endif // _POLY_H_
``` | /content/code_sandbox/src/cpu/softfloat3e/poly.h | objective-c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 304 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
uint32_t f128_to_ui32_r_minMag(float128_t a, bool exact, struct softfloat_status_t *status)
{
uint64_t uiA64, uiA0;
int32_t exp;
uint64_t sig64;
int32_t shiftDist;
bool sign;
uint32_t z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.v64;
uiA0 = a.v0;
exp = expF128UI64(uiA64);
sig64 = fracF128UI64(uiA64) | (uiA0 != 0);
/*your_sha256_hash--------
*your_sha256_hash--------*/
shiftDist = 0x402F - exp;
if (49 <= shiftDist) {
if (exact && (exp | sig64)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return 0;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF128UI64(uiA64);
if (sign || (shiftDist < 17)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return
(exp == 0x7FFF) && sig64 ? ui32_fromNaN
: sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sig64 |= UINT64_C(0x0001000000000000);
z = sig64>>shiftDist;
if (exact && ((uint64_t) z<<shiftDist != sig64)) {
softfloat_raiseFlags(status, softfloat_flag_inexact);
}
return z;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f128_to_ui32_r_minMag.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 736 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
float64 f16_to_f64(float16 a, struct softfloat_status_t *status)
{
bool sign;
int8_t exp;
uint16_t frac;
struct commonNaN commonNaN;
uint64_t uiZ;
struct exp8_sig16 normExpSig;
/*your_sha256_hash--------
*your_sha256_hash--------*/
sign = signF16UI(a);
exp = expF16UI(a);
frac = fracF16UI(a);
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (exp == 0x1F) {
if (frac) {
softfloat_f16UIToCommonNaN(a, &commonNaN, status);
uiZ = softfloat_commonNaNToF64UI(&commonNaN);
} else {
uiZ = packToF64UI(sign, 0x7FF, 0);
}
return uiZ;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (! exp) {
if (! frac || softfloat_denormalsAreZeros(status)) {
return packToF64UI(sign, 0, 0);
}
softfloat_raiseFlags(status, softfloat_flag_denormal);
normExpSig = softfloat_normSubnormalF16Sig(frac);
exp = normExpSig.exp - 1;
frac = normExpSig.sig;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
return packToF64UI(sign, exp + 0x3F0, (uint64_t) frac<<42);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/f16_to_f64.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 700 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "softfloat_types.h"
#ifndef softfloat_shortShiftLeft128
struct uint128
softfloat_shortShiftLeft128(uint64_t a64, uint64_t a0, uint8_t dist)
{
struct uint128 z;
z.v64 = a64<<dist | a0>>(-dist & 63);
z.v0 = a0<<dist;
return z;
}
#endif
``` | /content/code_sandbox/src/cpu/softfloat3e/s_shortShiftLeft128.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 417 |
```c++
/*============================================================================
This source file is an extension to the SoftFloat IEC/IEEE Floating-point
Arithmetic Package, Release 2b, written for Bochs (x86 achitecture simulator)
floating point emulation.
THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
Derivative works are acceptable, even for commercial purposes, so long as
(1) the source code for the derivative work includes prominent notice that
the work is derivative, and (2) the source code includes prominent notice with
these four paragraphs for those parts of this code that are retained.
=============================================================================*/
/*============================================================================
* Written for Bochs (x86 achitecture simulator) by
* Stanislav Shwartsman [sshwarts at sourceforge net]
* ==========================================================================*/
#define FLOAT128
#include "config.h"
#include "fpu_trans.h"
#include "specialize.h"
#include "softfloat-helpers.h"
#include "fpu_constant.h"
#include "poly.h"
static const floatx80 floatx80_one = packFloatx80(0, 0x3fff, BX_CONST64(0x8000000000000000));
static const float128_t float128_one =
packFloat128(BX_CONST64(0x3fff000000000000), BX_CONST64(0x0000000000000000));
static const float128_t float128_two =
packFloat128(BX_CONST64(0x4000000000000000), BX_CONST64(0x0000000000000000));
static const float128_t float128_ln2inv2 =
packFloat128(BX_CONST64(0x400071547652b82f), BX_CONST64(0xe1777d0ffda0d23a));
#define SQRT2_HALF_SIG BX_CONST64(0xb504f333f9de6484)
#define L2_ARR_SIZE 9
static float128_t ln_arr[L2_ARR_SIZE] =
{
PACK_FLOAT_128(0x3fff000000000000, 0x0000000000000000), /* 1 */
PACK_FLOAT_128(0x3ffd555555555555, 0x5555555555555555), /* 3 */
PACK_FLOAT_128(0x3ffc999999999999, 0x999999999999999a), /* 5 */
PACK_FLOAT_128(0x3ffc249249249249, 0x2492492492492492), /* 7 */
PACK_FLOAT_128(0x3ffbc71c71c71c71, 0xc71c71c71c71c71c), /* 9 */
PACK_FLOAT_128(0x3ffb745d1745d174, 0x5d1745d1745d1746), /* 11 */
PACK_FLOAT_128(0x3ffb3b13b13b13b1, 0x3b13b13b13b13b14), /* 13 */
PACK_FLOAT_128(0x3ffb111111111111, 0x1111111111111111), /* 15 */
PACK_FLOAT_128(0x3ffae1e1e1e1e1e1, 0xe1e1e1e1e1e1e1e2) /* 17 */
};
static float128_t poly_ln(float128_t x1, softfloat_status_t &status)
{
/*
//
// 3 5 7 9 11 13 15
// 1+u u u u u u u u
// 1/2 ln --- ~ u + --- + --- + --- + --- + ---- + ---- + ---- =
// 1-u 3 5 7 9 11 13 15
//
// 2 4 6 8 10 12 14
// u u u u u u u
// = u * [ 1 + --- + --- + --- + --- + ---- + ---- + ---- ] =
// 3 5 7 9 11 13 15
//
// 3 3
// -- 4k -- 4k+2
// p(u) = > C * u q(u) = > C * u
// -- 2k -- 2k+1
// k=0 k=0
//
// 1+u 2
// 1/2 ln --- ~ u * [ p(u) + u * q(u) ]
// 1-u
//
*/
return OddPoly(x1, (const float128_t*) ln_arr, L2_ARR_SIZE, status);
}
/* required sqrt(2)/2 < x < sqrt(2) */
static float128_t poly_l2(float128_t x, softfloat_status_t &status)
{
/* using float128 for approximation */
float128_t x_p1 = f128_add(x, float128_one, &status);
float128_t x_m1 = f128_sub(x, float128_one, &status);
x = f128_div(x_m1, x_p1, &status);
x = poly_ln(x, status);
x = f128_mul(x, float128_ln2inv2, &status);
return x;
}
static float128_t poly_l2p1(float128_t x, softfloat_status_t &status)
{
/* using float128 for approximation */
float128_t x_plus2 = f128_add(x, float128_two, &status);
x = f128_div(x, x_plus2, &status);
x = poly_ln(x, status);
x = f128_mul(x, float128_ln2inv2, &status);
return x;
}
// =================================================
// FYL2X Compute y * log (x)
// 2
// =================================================
//
// Uses the following identities:
//
// 1. ----------------------------------------------------------
// ln(x)
// log (x) = -------, ln (x*y) = ln(x) + ln(y)
// 2 ln(2)
//
// 2. ----------------------------------------------------------
// 1+u x-1
// ln (x) = ln -----, when u = -----
// 1-u x+1
//
// 3. ----------------------------------------------------------
// 3 5 7 2n+1
// 1+u u u u u
// ln ----- = 2 [ u + --- + --- + --- + ... + ------ + ... ]
// 1-u 3 5 7 2n+1
//
floatx80 fyl2x(floatx80 a, floatx80 b, softfloat_status_t &status)
{
/*your_sha256_hash------------
| The pattern for a default generated extended double-precision NaN.
*your_sha256_hash------------*/
const floatx80 floatx80_default_nan = packFloatx80(0, floatx80_default_nan_exp, floatx80_default_nan_fraction);
// handle unsupported extended double-precision floating encodings
if (extF80_isUnsupported(a) || extF80_isUnsupported(b)) {
invalid:
softfloat_raiseFlags(&status, softfloat_flag_invalid);
return floatx80_default_nan;
}
uint64_t aSig = extF80_fraction(a);
int32_t aExp = extF80_exp(a);
int aSign = extF80_sign(a);
uint64_t bSig = extF80_fraction(b);
int32_t bExp = extF80_exp(b);
int bSign = extF80_sign(b);
int zSign = bSign ^ 1;
if (aExp == 0x7FFF) {
if ((aSig<<1) || ((bExp == 0x7FFF) && (bSig<<1))) {
return softfloat_propagateNaNExtF80UI(a.signExp, aSig, b.signExp, bSig, &status);
}
if (aSign) goto invalid;
else {
if (! bExp) {
if (! bSig) goto invalid;
softfloat_raiseFlags(&status, softfloat_flag_denormal);
}
return packFloatx80(bSign, 0x7FFF, BX_CONST64(0x8000000000000000));
}
}
if (bExp == 0x7FFF) {
if (bSig << 1)
return softfloat_propagateNaNExtF80UI(a.signExp, aSig, b.signExp, bSig, &status);
if (aSign && (uint64_t)(aExp | aSig)) goto invalid;
if (aSig && ! aExp)
softfloat_raiseFlags(&status, softfloat_flag_denormal);
if (aExp < 0x3FFF) {
return packFloatx80(zSign, 0x7FFF, BX_CONST64(0x8000000000000000));
}
if (aExp == 0x3FFF && ! (aSig<<1)) goto invalid;
return packFloatx80(bSign, 0x7FFF, BX_CONST64(0x8000000000000000));
}
if (! aExp) {
if (! aSig) {
if ((bExp | bSig) == 0) goto invalid;
softfloat_raiseFlags(&status, softfloat_flag_divbyzero);
return packFloatx80(zSign, 0x7FFF, BX_CONST64(0x8000000000000000));
}
if (aSign) goto invalid;
softfloat_raiseFlags(&status, softfloat_flag_denormal);
struct exp32_sig64 normExpSig = softfloat_normSubnormalExtF80Sig(aSig);
aExp = normExpSig.exp + 1;
aSig = normExpSig.sig;
}
if (aSign) goto invalid;
if (! bExp) {
if (! bSig) {
if (aExp < 0x3FFF) return packFloatx80(zSign, 0, 0);
return packFloatx80(bSign, 0, 0);
}
softfloat_raiseFlags(&status, softfloat_flag_denormal);
struct exp32_sig64 normExpSig = softfloat_normSubnormalExtF80Sig(bSig);
bExp = normExpSig.exp + 1;
bSig = normExpSig.sig;
}
if (aExp == 0x3FFF && ! (aSig<<1))
return packFloatx80(bSign, 0, 0);
softfloat_raiseFlags(&status, softfloat_flag_inexact);
int ExpDiff = aExp - 0x3FFF;
aExp = 0;
if (aSig >= SQRT2_HALF_SIG) {
ExpDiff++;
aExp--;
}
/* ******************************** */
/* using float128 for approximation */
/* ******************************** */
float128_t b128 = softfloat_normRoundPackToF128(bSign, bExp-0x10, bSig, 0, &status);
uint64_t zSig0, zSig1;
shortShift128Right(aSig<<1, 0, 16, &zSig0, &zSig1);
float128_t x = packFloat128(0, aExp+0x3FFF, zSig0, zSig1);
x = poly_l2(x, status);
x = f128_add(x, i32_to_f128(ExpDiff), &status);
x = f128_mul(x, b128, &status);
return f128_to_extF80(x, &status);
}
// =================================================
// FYL2XP1 Compute y * log (x + 1)
// 2
// =================================================
//
// Uses the following identities:
//
// 1. ----------------------------------------------------------
// ln(x)
// log (x) = -------
// 2 ln(2)
//
// 2. ----------------------------------------------------------
// 1+u x
// ln (x+1) = ln -----, when u = -----
// 1-u x+2
//
// 3. ----------------------------------------------------------
// 3 5 7 2n+1
// 1+u u u u u
// ln ----- = 2 [ u + --- + --- + --- + ... + ------ + ... ]
// 1-u 3 5 7 2n+1
//
floatx80 fyl2xp1(floatx80 a, floatx80 b, softfloat_status_t &status)
{
int32_t aExp, bExp;
uint64_t aSig, bSig, zSig0, zSig1, zSig2;
int aSign, bSign;
/*your_sha256_hash------------
| The pattern for a default generated extended double-precision NaN.
*your_sha256_hash------------*/
const floatx80 floatx80_default_nan = packFloatx80(0, floatx80_default_nan_exp, floatx80_default_nan_fraction);
// handle unsupported extended double-precision floating encodings
if (extF80_isUnsupported(a) || extF80_isUnsupported(b)) {
invalid:
softfloat_raiseFlags(&status, softfloat_flag_invalid);
return floatx80_default_nan;
}
aSig = extF80_fraction(a);
aExp = extF80_exp(a);
aSign = extF80_sign(a);
bSig = extF80_fraction(b);
bExp = extF80_exp(b);
bSign = extF80_sign(b);
int zSign = aSign ^ bSign;
if (aExp == 0x7FFF) {
if ((aSig<<1) != 0 || ((bExp == 0x7FFF) && (bSig<<1) != 0)) {
return softfloat_propagateNaNExtF80UI(a.signExp, aSig, b.signExp, bSig, &status);
}
if (aSign) goto invalid;
else {
if (! bExp) {
if (! bSig) goto invalid;
softfloat_raiseFlags(&status, softfloat_flag_denormal);
}
return packFloatx80(bSign, 0x7FFF, BX_CONST64(0x8000000000000000));
}
}
if (bExp == 0x7FFF)
{
if (bSig << 1)
return softfloat_propagateNaNExtF80UI(a.signExp, aSig, b.signExp, bSig, &status);
if (! aExp) {
if (! aSig) goto invalid;
softfloat_raiseFlags(&status, softfloat_flag_denormal);
}
return packFloatx80(zSign, 0x7FFF, BX_CONST64(0x8000000000000000));
}
if (! aExp) {
if (! aSig) {
if (bSig && ! bExp) softfloat_raiseFlags(&status, softfloat_flag_denormal);
return packFloatx80(zSign, 0, 0);
}
softfloat_raiseFlags(&status, softfloat_flag_denormal);
struct exp32_sig64 normExpSig = softfloat_normSubnormalExtF80Sig(aSig);
aExp = normExpSig.exp + 1;
aSig = normExpSig.sig;
}
if (! bExp) {
if (! bSig) return packFloatx80(zSign, 0, 0);
softfloat_raiseFlags(&status, softfloat_flag_denormal);
struct exp32_sig64 normExpSig = softfloat_normSubnormalExtF80Sig(bSig);
bExp = normExpSig.exp + 1;
bSig = normExpSig.sig;
}
softfloat_raiseFlags(&status, softfloat_flag_inexact);
if (aSign && aExp >= 0x3FFF)
return a;
if (aExp >= 0x3FFC) // big argument
{
return fyl2x(extF80_add(a, floatx80_one, &status), b, status);
}
// handle tiny argument
if (aExp < FLOATX80_EXP_BIAS-70)
{
// first order approximation, return (a*b)/ln(2)
int32_t zExp = aExp + FLOAT_LN2INV_EXP - 0x3FFE;
mul128By64To192(FLOAT_LN2INV_HI, FLOAT_LN2INV_LO, aSig, &zSig0, &zSig1, &zSig2);
if (0 < (int64_t) zSig0) {
shortShift128Left(zSig0, zSig1, 1, &zSig0, &zSig1);
--zExp;
}
zExp = zExp + bExp - 0x3FFE;
mul128By64To192(zSig0, zSig1, bSig, &zSig0, &zSig1, &zSig2);
if (0 < (int64_t) zSig0) {
shortShift128Left(zSig0, zSig1, 1, &zSig0, &zSig1);
--zExp;
}
return softfloat_roundPackToExtF80(aSign ^ bSign, zExp, zSig0, zSig1, 80, &status);
}
/* ******************************** */
/* using float128 for approximation */
/* ******************************** */
float128_t b128 = softfloat_normRoundPackToF128(bSign, bExp-0x10, bSig, 0, &status);
shortShift128Right(aSig<<1, 0, 16, &zSig0, &zSig1);
float128_t x = packFloat128(aSign, aExp, zSig0, zSig1);
x = poly_l2p1(x, status);
x = f128_mul(x, b128, &status);
return f128_to_extF80(x, &status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/fyl2x.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 4,148 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdbool.h>
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "softfloat.h"
float64 i64_to_f64(int64_t a, struct softfloat_status_t *status)
{
bool sign;
uint64_t absA;
sign = (a < 0);
if (! (a & UINT64_C(0x7FFFFFFFFFFFFFFF))) {
return sign ? packToF64UI(1, 0x43E, 0) : 0;
}
absA = sign ? -(uint64_t) a : (uint64_t) a;
return softfloat_normRoundPackToF64(sign, 0x43C, absA, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/i64_to_f64.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 480 |
```c++
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "primitives.h"
#include "specialize.h"
#include "softfloat.h"
float16 extF80_to_f16(extFloat80_t a, struct softfloat_status_t *status)
{
uint16_t uiA64;
uint64_t uiA0;
bool sign;
int32_t exp;
uint64_t sig;
struct commonNaN commonNaN;
uint16_t uiZ, sig16;
// handle unsupported extended double-precision floating encodings
if (extF80_isUnsupported(a)) {
softfloat_raiseFlags(status, softfloat_flag_invalid);
return defaultNaNF16UI;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
uiA64 = a.signExp;
uiA0 = a.signif;
sign = signExtF80UI64(uiA64);
exp = expExtF80UI64(uiA64);
sig = uiA0;
/*your_sha256_hash--------
*your_sha256_hash--------*/
if (exp == 0x7FFF) {
if (sig & UINT64_C(0x7FFFFFFFFFFFFFFF)) {
softfloat_extF80UIToCommonNaN(uiA64, uiA0, &commonNaN, status);
uiZ = softfloat_commonNaNToF16UI(&commonNaN);
} else {
uiZ = packToF16UI(sign, 0x1F, 0);
}
return uiZ;
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
sig16 = softfloat_shortShiftRightJam64(sig, 49);
if (! (exp | sig16)) {
return packToF16UI(sign, 0, 0);
}
/*your_sha256_hash--------
*your_sha256_hash--------*/
exp -= 0x3FF1;
if (sizeof (int16_t) < sizeof (int32_t)) {
if (exp < -0x40) exp = -0x40;
}
return softfloat_roundPackToF16(sign, exp, sig16, status);
}
``` | /content/code_sandbox/src/cpu/softfloat3e/extF80_to_f16.cc | c++ | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 793 |
```c
/*============================================================================
This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
Package, Release 3e, by John R. Hauser.
University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions, and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions, and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the University nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
=============================================================================*/
#include <stdint.h>
#include "internals.h"
#include "specialize.h"
#include "softfloat.h"
uint32_t
softfloat_roundToUI32(bool sign, uint64_t sig, uint8_t roundingMode, bool exact, struct softfloat_status_t *status)
{
uint16_t roundIncrement, roundBits;
uint32_t z;
uint64_t absSigExact = sig;
/*your_sha256_hash--------
*your_sha256_hash--------*/
roundIncrement = 0x800;
if ((roundingMode != softfloat_round_near_maxMag) && (roundingMode != softfloat_round_near_even)) {
roundIncrement = 0;
if (sign) {
if (!sig) return 0;
if (roundingMode == softfloat_round_min) goto invalid;
} else {
if (roundingMode == softfloat_round_max) roundIncrement = 0xFFF;
}
}
roundBits = sig & 0xFFF;
sig += roundIncrement;
if (sig & UINT64_C(0xFFFFF00000000000)) goto invalid;
z = sig>>12;
if ((roundBits == 0x800) && (roundingMode == softfloat_round_near_even)) {
z &= ~(uint32_t) 1;
}
if (sign && z) goto invalid;
if (roundBits) {
if (exact) softfloat_raiseFlags(status, softfloat_flag_inexact);
if (((uint64_t)z << 12) > absSigExact)
softfloat_setRoundingUp(status);
}
return z;
/*your_sha256_hash--------
*your_sha256_hash--------*/
invalid:
softfloat_raiseFlags(status, softfloat_flag_invalid);
return sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;
}
``` | /content/code_sandbox/src/cpu/softfloat3e/s_roundToUI32.c | c | 2016-06-25T22:29:10 | 2024-08-16T19:09:21 | 86Box | 86Box/86Box | 2,616 | 721 |
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