Add markdown sources

markdown/ORFS_docs/general/AddingNewDesign.md

@@ -0,0 +1,109 @@
+# Adding New Designs to the ORFS
+
+This section explains how to add  verilog designs to ORFS
+repository for a full RTL-GDS flow execution.
+
+The following design example is based on the design `spm` that
+implements a Single-port memory using `gf180` platform. This
+procedure  applies to any design for a given platform you choose.
+
+**Note:** The commands refer to the base directory as
+`OpenROAD-flow-scripts/flow` as the starting point for the flow.
+
+**Step 1:** Create the Verilog source files directory based on
+the top module name.
+
+``` shell
+cd designs/src
+mkdir spm
+cd spm
+vi spm.v
+```
+
+Copy [this](https://raw.githubusercontent.com/The-OpenROAD-Project/OpenLane/master/designs/spm/src/spm.v)
+verilog code into spm.v.
+
+**Step 2:** Create `config.mk` to define design configuration.
+
+``` shell
+cd designs/gf180
+mkdir spm
+cd spm
+vi config.mk
+```
+
+**Step 3:** Define key design parameters in `config.mk`.
+
+```
+export PLATFORM         = gf180
+
+export DESIGN_NAME      = spm
+
+export VERILOG_FILES    = $(sort $(wildcard ./designs/src/$(DESIGN_NICKNAME)/*.v))
+export SDC_FILE         = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
+
+export CORE_UTILIZATION = 40
+export PLACE_DENSITY    = 0.60
+
+export TNS_END_PERCENT  = 100
+```
+
+To customize or add new variables to the `config.mk` refer to the
+other built-in design examples or the flow variables list [here](./FlowVariables.md).
+
+**Step 4:** Define SDC constraints.
+
+``` shell
+cd designs/gf180/spm
+vi constraint.sdc
+```
+
+Edit as required to define design constraints.
+
+```
+current_design spm
+
+set clk_name  core_clock
+set clk_port_name clk
+set clk_period 10
+set clk_io_pct 0.2
+
+set clk_port [get_ports $clk_port_name]
+
+create_clock -name $clk_name -period $clk_period  $clk_port
+
+set non_clock_inputs [lsearch -inline -all -not -exact [all_inputs] $clk_port]
+
+set_input_delay  [expr $clk_period * $clk_io_pct] -clock $clk_name $non_clock_inputs
+set_output_delay [expr $clk_period * $clk_io_pct] -clock $clk_name [all_outputs]
+```
+
+Update only `current_design`, `clk_port_name` and `clk_period` as
+per design requirements. Do not modify the remaining values for the
+default template.
+
+**Step 5:** Add the design name to `Makefile` to run the flow
+with the `make` command.
+
+``` shell
+vi Makefile
+```
+
+Comment (#) any `DESIGN_CONFIG` if already enabled.
+
+Add the following lines to `Makefile` and save the changes.
+``` 
+DESIGN_CONFIG=./designs/gf180/spm/config.mk
+```
+
+Run `make` command to run the flow from RTL to GDSII generation.
+
+``` shell
+make
+```
+
+If you do not want to change `Makefile`, you can simply run,
+
+``` shell
+make DESIGN_CONFIG=./designs/gf180/spm/config.mk
+```

markdown/ORFS_docs/general/CI.md

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+# CI Guide
+
+This document describes the pipelines available to the developers and code
+maintainers in the [Jenkins server](https://jenkins.openroad.tools/). Note
+that pipelines with the suffix `*-Private` are only available to code
+maintainers and The OpenROAD Project members as they can contain confidential
+information. Thus, to access Private pipelines one needs to have authorization
+to access confidential data and be logged in the Jenkins website.
+
+Below there is a list of the available features. Instructions on how to
+navigate Jenkins to access these features are available
+[here](https://docs.google.com/presentation/d/1kWHLjUBFcd0stnDaPNi_pt9WFrrsR7tQ95BGhT1yOvw/edit?usp=sharing).
+
+-   Find your build through Jenkins website or from GitHub.
+-   See test status: Pass/Fail.
+-   Log files for each test.
+-   Build artifacts to reproduce failures.
+-   HTML reports about code coverage and metrics.
+
+## OpenROAD Flow
+
+-   OpenROAD-flow-script-Public [folder]
+    -   `public_tests_all`
+        -   Description: runs flow tests that finish in less than three hours.
+        -   Target: master branch.
+    -   `public_tests_all-pr`
+        -   Description: runs flow tests that finish in less than three hours.
+        -   Target: all open PRs.
+    -   `publish-results-to-dashboard`
+        -   Description: uploads metrics to dashboard website.
+        -   Target: master branch.
+-   OpenROAD-flow-scripts-Nightly-Public
+    -   Description: runs all flow tests including RTLMP designs.
+    -   Target: master branch.
+-   OpenROAD-flow-scripts-Private [folder]
+    -   `public_tests_small`
+        -   Description: runs fast flow tests that finish in less than one hour.
+        -   Target: all branches that are not filed as PR. CI will run for PR
+            branches on the public side after "Ready to Sync Public" workflow.
+-   OpenROAD-flow-scripts-All-Tests-Private
+    -   Description: runs flow tests for private branches.
+    -   Target: secure branches.

markdown/ORFS_docs/general/CODE_OF_CONDUCT.md

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+# Contributor Covenant Code of Conduct
+
+## Our Pledge
+
+We as members, contributors, and leaders pledge to make participation in our
+community a harassment-free experience for everyone, regardless of age, body
+size, visible or invisible disability, ethnicity, sex characteristics, gender
+identity and expression, level of experience, education, socio-economic status,
+nationality, personal appearance, race, religion, or sexual identity
+and orientation.
+
+We pledge to act and interact in ways that contribute to an open, welcoming,
+diverse, inclusive, and healthy community.
+
+## Our Standards
+
+Examples of behavior that contributes to a positive environment for our
+community include:
+
+* Demonstrating empathy and kindness toward other people
+* Being respectful of differing opinions, viewpoints, and experiences
+* Giving and gracefully accepting constructive feedback
+* Accepting responsibility and apologizing to those affected by our mistakes,
+  and learning from the experience
+* Focusing on what is best not just for us as individuals, but for the
+  overall community
+
+Examples of unacceptable behavior include:
+
+* The use of sexualized language or imagery, and sexual attention or
+  advances of any kind
+* Trolling, insulting or derogatory comments, and personal or political attacks
+* Public or private harassment
+* Publishing others' private information, such as a physical or email
+  address, without their explicit permission
+* Other conduct which could reasonably be considered inappropriate in a
+  professional setting
+
+## Enforcement Responsibilities
+
+Community leaders are responsible for clarifying and enforcing our standards of
+acceptable behavior and will take appropriate and fair corrective action in
+response to any behavior that they deem inappropriate, threatening, offensive,
+or harmful.
+
+Community leaders have the right and responsibility to remove, edit, or reject
+comments, commits, code, wiki edits, issues, and other contributions that are
+not aligned to this Code of Conduct, and will communicate reasons for moderation
+decisions when appropriate.
+
+## Scope
+
+This Code of Conduct applies within all community spaces, and also applies when
+an individual is officially representing the community in public spaces.
+Examples of representing our community include using an official e-mail address,
+posting via an official social media account, or acting as an appointed
+representative at an online or offline event.
+
+## Enforcement
+
+Instances of abusive, harassing, or otherwise unacceptable behavior may be
+reported to the community leaders responsible for enforcement at
+complaints@openroad.tools.
+All complaints will be reviewed and investigated promptly and fairly.
+
+All community leaders are obligated to respect the privacy and security of the
+reporter of any incident.
+
+## Enforcement Guidelines
+
+Community leaders will follow these Community Impact Guidelines in determining
+the consequences for any action they deem in violation of this Code of Conduct:
+
+### 1. Correction
+
+**Community Impact**: Use of inappropriate language or other behavior deemed
+unprofessional or unwelcome in the community.
+
+**Consequence**: A private, written warning from community leaders, providing
+clarity around the nature of the violation and an explanation of why the
+behavior was inappropriate. A public apology may be requested.
+
+### 2. Warning
+
+**Community Impact**: A violation through a single incident or series
+of actions.
+
+**Consequence**: A warning with consequences for continued behavior. No
+interaction with the people involved, including unsolicited interaction with
+those enforcing the Code of Conduct, for a specified period of time. This
+includes avoiding interactions in community spaces as well as external channels
+like social media. Violating these terms may lead to a temporary or
+permanent ban.
+
+### 3. Temporary Ban
+
+**Community Impact**: A serious violation of community standards, including
+sustained inappropriate behavior.
+
+**Consequence**: A temporary ban from any sort of interaction or public
+communication with the community for a specified period of time. No public or
+private interaction with the people involved, including unsolicited interaction
+with those enforcing the Code of Conduct, is allowed during this period.
+Violating these terms may lead to a permanent ban.
+
+### 4. Permanent Ban
+
+**Community Impact**: Demonstrating a pattern of violation of community
+standards, including sustained inappropriate behavior,  harassment of an
+individual, or aggression toward or disparagement of classes of individuals.
+
+**Consequence**: A permanent ban from any sort of public interaction within
+the community.
+
+## Attribution
+
+This Code of Conduct is adapted from the [Contributor Covenant version 2.0](https://www.contributor-covenant.org/version/2/0/code_of_conduct.html).
+
+Community Impact Guidelines were inspired by [Mozilla's code of conduct
+enforcement ladder](https://github.com/mozilla/inclusion).
+
+For answers to common questions about this code of conduct, see the FAQ [here](https://www.contributor-covenant.org/faq). Translations are available [here](https://www.contributor-covenant.org/translations).

markdown/ORFS_docs/general/DeveloperGuide.md

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+# Developer Guide
+
+- Integrate a new platform to OpenROAD Flow: [Guide](./PlatformBringUp.md).
+- Adding a new design: [Guide](../user/AddingNewDesign.md).
+- Continuous Integration: [Guide](./CI.md).
+- How do I update the codebase? There are different ways to update your codebase depending on the method you installed it. We provide detailed instructions in this [guide](../user/FAQS.md).
+- How do I contribute? Follow our Git Quickstart guide [here](./GitGuide.md).

markdown/ORFS_docs/general/DockerShell.md

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+Building example design using Docker image
+==========================================
+
+The `docker_shell` script is used as a prefix to launch a command using a OpenROAD docker image.
+
+Also, the current working directory is mapped into the Docker image using the current user's credentials.
+
+Build docker image
+------------------
+
+First build the docker image:
+
+```
+cd OpenROAD-flow-scripts
+./build_openroad.sh
+```
+
+Build an example design and run the GUI:
+
+```
+cd flow
+util/docker_shell make
+util/docker_shell make gui_final
+```
+
+You can also launch an interactive bash session:
+
+```
+util/docker_shell bash
+```
+
+If you need to use a different Docker image than default, override by using the `docker_shell_IMAGE`
+environment variable:
+
+```
+OR_IMAGE=openroad/flow-centos7-builder:v1234 util/docker_shell make
+```
+
+If you have built your OpenROAD Docker image using prebuilt binaries, 
+you might want to source custom paths for your modules as follows.
+
+```
+OR_IMAGE=openroad_prebuilt_image YOSYS_CMD=/oss-cad-suite/bin/yosys util/docker_shell make
+```
+
+Using `docker_shell` from outside of `OpenROAD-flow-scripts/flow` folder
+------------------------------------------------------------------------
+
+If you have designs you are keeping in a git source repository that is not
+a fork of the OpenROAD-flow-scripts git repository, you can still use
+the `docker_shell` script.
+
+Two ways to use `docker_shell`
+
+1. Simply invoke it from the ORFS location.
+2. Copy the script into your source folder. This would allow you
+   to build and publish a Docker image to a private Docker repository
+   and lock the ORFS version to the version of your source code. This
+   gives you a way to deploy updates of ORFS
+   easily, publish a new Docker image, modify the copy of `docker_shell`
+   and create a pull request to possibly test your upgrade on your private
+   build serves.

markdown/ORFS_docs/general/FlowTutorial.md

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+# OpenROAD Flow Scripts Tutorial
+
+## Introduction
+
+This document describes a tutorial to run the complete
+OpenROAD flow from RTL-to-GDS using [OpenROAD Flow
+Scripts](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts).
+It includes examples of useful design and manual usage in key flow
+stages to help users gain a good understanding of the
+[OpenROAD](https://openroad.readthedocs.io/en/latest/main/README.html)
+application flow, data organization, GUI and commands.
+
+This is intended for:
+
+-   Beginners or new users with some understanding of basic VLSI
+    design flow. Users will learn the basics of installation to use
+    OpenROAD-flow-scripts for the complete RTL-to-GDS flow from
+    [here](../index.md#getting-started-with-openroad-flow-scripts).
+-   Users already familiar with the OpenROAD application and flow but would
+    like to learn more about specific features and commands.
+
+## User Guidelines
+
+-   This tutorial requires a specific directory structure built by
+    OpenROAD-flow-scripts (ORFS). Do not modify this structure or
+    underlying files since this will cause problems in the flow execution.
+-   User can run the full RTL-to-GDS flow and learn specific flow
+    sections independently. This allows users to learn the flow and tool
+    capabilities at their own pace, time and preference.
+-   Results shown, such as images or outputs of reports and logs, could
+    vary based on release updates. However, the main flow and command
+    structure should generally apply.
+
+Note: Please submit any problem found under Issues in the GitHub repository
+[here](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/issues).
+
+## Getting Started
+
+This section describes the environment setup to build OpenROAD-flow-scripts
+and get ready to execute the RTL-to-GDS flow of the open-source
+design `ibex` using the `sky130hd` technology.
+
+`ibex` is a 32 bit RISC-V CPU core (`RV32IMC/EMC`) with a two-stage
+pipeline.
+
+### Setting Up The Environment
+
+Use the `bash` shell to run commands and scripts.
+
+#### OpenROAD-flow-scripts Installation
+
+To install OpenROAD-flow-scripts,  refer to the
+[Build or installing ORFS  Dependencies](https://openroad-flow-scripts.readthedocs.io/en/latest/#build-or-installing-orfs-dependencies)
+documentation.
+
+In general, we recommend using `Docker` for an efficient user
+experience. Install OpenROAD-flow-scripts using a docker as described
+here [Build from sources using Docker](../user/BuildWithDocker.md).
+
+:::{Note}
+If you need to update an existing OpenROAD-flow-scripts installation,
+follow instructions from [here](../user/FAQS.md#how-do-i-update-openroad-flow-scripts).
+:::
+
+OpenROAD-flow-scripts installation is complete.
+
+#### Running OpenROAD-flow-scripts inside the Docker
+
+Launch the docker with OpenROAD-flow-scripts container as follows:
+
+```shell
+docker run --rm -it -u $(id -u ${USER}):$(id -g ${USER}) -v $(pwd)/flow:/OpenROAD-flow-scripts/flow openroad/flow-ubuntu22-builder
+```
+
+:::{seealso}
+To launch OpenROAD GUI inside the docker, based on the OS, use the command from [here](../user/BuildWithDocker.md#enable-gui-support).
+:::
+
+Once you are entered into OpenROAD-flow-scripts container run:
+
+```shell
+source env.sh
+```
+
+If your installation is  successful, you will see the following message:
+
+```
+OPENROAD: /OpenROAD-flow-scripts/tools/OpenROAD
+```
+
+#### Verifying the Docker based  Installation
+
+To verify the installation run the built-in example design as follows:
+
+```shell
+cd flow
+make
+```
+
+A successful run end with the log:
+
+```
+[INFO] Writing out GDS/OAS 'results/nangate45/gcd/base/6_1_merged.gds'
+Elapsed time: 0:10.44[h:]min:sec. CPU time: user 2.17 sys 0.54 (26%). Peak memory: 274184KB.
+cp results/nangate45/gcd/base/6_1_merged.gds results/nangate45/gcd/base/6_final.gds
+Log                       Elapsed seconds
+1_1_yosys                          2
+3_3_place_gp                       1
+4_1_cts                            8
+5_2_route                   10
+6_1_merge                         10
+6_report                           3
+```
+
+## Configuring The Design
+
+This section shows how to set up the necessary platform and design
+configuration files to run the complete RTL-to-GDS flow using
+OpenROAD-flow-scripts for `ibex` design.
+
+```shell
+cd flow
+```
+
+### Platform Configuration
+
+View the platform configuration file setup for default variables for
+`sky130hd`.
+
+```shell
+less ./platforms/sky130hd/config.mk
+```
+
+The `config.mk` file has all the required variables for the `sky130`
+platform and hence it is not recommended to change any variable
+definition here. You can view the `sky130hd` platform configuration
+[here](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/platforms/sky130hd/config.mk).
+
+Refer to the [Flow variables](../user/FlowVariables.md) document for
+details on how to use platform and design specific environment variables
+in OpenROAD-flow-scripts to customize and configure your design flow.
+
+### Design Configuration
+
+View the default design configuration of `ibex` design:
+
+```shell
+less ./designs/sky130hd/ibex/config.mk
+```
+
+You can view `ibex` design `config.mk`
+[here](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/designs/sky130hd/ibex/config.mk).
+
+:::{Note} The following design-specific configuration variables are required
+to specify main design inputs such as platform, top-level design name and
+constraints. We will use default configuration variables for this tutorial.
+:::
+
+| Variable Name      | Description                                                                                                                              |
+|--------------------|------------------------------------------------------------------------------------------------------------------------------------------|
+| `PLATFORM`         | Specifies Process design kit.                                                                                                            |
+| `DESIGN_NAME`      | The name of the top-level module of the design                                                                                           |
+| `VERILOG_FILES`    | The path to the design Verilog files or JSON files providing a description of modules (check `yosys -h write_json` for more details).    |
+| `SDC_FILE`         | The path to design `.sdc` file                                                                                                           |
+| `CORE_UTILIZATION` | The core utilization percentage.                                                                                                         |
+| `PLACE_DENSITY`    | The desired placement density of cells. It reflects how spread the cells would be on the core area. 1 = closely dense. 0 = widely spread |
+
+:::{Note} To add a new design to the `flow`, refer to the document
+[here](../user/AddingNewDesign.md). This step is for advanced users.
+If you are a beginner, first understand the flow by completing this
+tutorial and come back to this step later to add a new design.
+:::
+
+### Timing Constraints
+
+View timing constraints specified in the `.sdc` file
+[here](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/designs/sky130hd/ibex/constraint.sdc).
+
+```shell
+less ./designs/sky130hd/ibex/constraint.sdc
+```
+
+For `ibex` design, we simply use the clock definition as follows as a
+minimum required timing constraint.
+
+```tcl
+create_clock -name core_clock -period 17.4 [get_ports {clk_i}]
+```
+
+### Design Input Verilog
+
+The Verilog input files are located in `./designs/src/ibex/`
+
+The design is defined in `ibex_core.v` available
+[here](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/designs/src/ibex/ibex_core.v).
+
+Refer to the `ibex` design `README.md`
+[here](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/designs/src/ibex/README.md).
+
+## Running The Automated RTL-to-GDS Flow
+
+This section describes the complete execution of the design flow from
+RTL-to-GDS. The OpenROAD application executes the entire autonomous flow
+using Tcl scripts that invoke open-sourced tools, from synthesis to the final
+`.gds` file creation, without requiring human intervention. However, in this
+tutorial, the user will learn both the automated and a few interactive ways
+to run Tcl commands for important flow stages.
+
+From the OpenROAD-flow-scripts directory, users can access individual flow
+stages, respective tools and the corresponding `README.md` for tool commands,
+configuration examples using the Tcl interface and other such details.
+
+-   [Synthesis](https://github.com/The-OpenROAD-Project/yosys/blob/master/README.md)
+-   [Database](https://openroad.readthedocs.io/en/latest/main/src/odb/README.html)
+-   [Floorplanning](https://openroad.readthedocs.io/en/latest/main/src/ifp/README.html)
+-   [Pin Placement](https://openroad.readthedocs.io/en/latest/main/src/ppl/README.html)
+-   [Chip-level Connections](https://openroad.readthedocs.io/en/latest/main/src/pad/README.html)
+-   [Macro Placement](https://openroad.readthedocs.io/en/latest/main/src/mpl/README.html)
+-   [Tapcell insertion](https://openroad.readthedocs.io/en/latest/main/src/tap/README.html)
+-   [PDN Analysis](https://openroad.readthedocs.io/en/latest/main/src/pdn/README.html)
+-   [IR Drop Analysis](https://openroad.readthedocs.io/en/latest/main/src/psm/README.html)
+-   [Global Placement](https://openroad.readthedocs.io/en/latest/main/src/gpl/README.html)
+-   [Timing Analysis](https://openroad.readthedocs.io/en/latest/main/src/sta/README.html)
+-   [Detailed Placement](https://openroad.readthedocs.io/en/latest/main/src/dpl/README.html)
+-   [Timing Optimization using Resizer](https://openroad.readthedocs.io/en/latest/main/src/rsz/README.html)
+-   [Clock Tree Synthesis](https://openroad.readthedocs.io/en/latest/main/src/cts/README.html)
+-   [Global Routing](https://openroad.readthedocs.io/en/latest/main/src/grt/README.html)
+-   [Antenna Rule Checker](https://openroad.readthedocs.io/en/latest/main/src/ant/README.html)
+-   [Detail Routing](https://openroad.readthedocs.io/en/latest/main/src/drt/README.html)
+-   [Metall Fill](https://openroad.readthedocs.io/en/latest/main/src/fin/README.html)
+-   [Parasitics Extraction](https://openroad.readthedocs.io/en/latest/main/src/rcx/README.html)
+-   [Layout Generation](https://www.klayout.de/)
+
+### Design Goals
+
+Run the `ibex` design in OpenROAD-flow-scripts automated flow from
+RTL-to-GDS using `sky130hd`. Find `ibex` design details
+[here](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/designs/src/ibex/README.md)
+and the design goals are:
+
+-   Area
+
+```
+Minimum Required Die size: 0 0 798 800 (in micron)
+Core size: 2 2 796 798 (in micron)
+```
+
+-   Timing
+
+```
+Clock period to meet timing: 17.4 (in ns)
+```
+
+`ibex` takes approximately 8 minutes on a machine with 8-cores and 16GB RAM.
+The runtime will vary based on your configuration.
+
+Change your current directory to the `flow` directory.
+
+```shell
+cd flow
+```
+
+Run the complete flow with:
+
+```shell
+make DESIGN_CONFIG=./designs/sky130hd/ibex/config.mk
+```
+
+As the flow executes, check out the OpenROAD-flow-scripts directory contents and their
+significance.
+
+OpenROAD-flow-scripts can generally restart from a previous partial run. If you have errors which prevent restarting the flow, you may try deleting all generated files and start a fresh run. Errors can occur if a tool crashes or is killed while writing a file. The files for `sky130hd/ibex` as an example can be deleted with:
+
+```shell
+make clean_all DESIGN_CONFIG=./designs/sky130hd/ibex/config.mk
+```
+
+You can also delete files related to individual stages of RTL to GDSII conversion like synthesis, floorplanning, macro placement, clock tree synthesis, routing and layout generation with `clean_synth`, `clean_floorplan`, `clean_place`, `clean_cts`, `clean_route`, and `clean_finish`, respectively.
+
+
+### Viewing OpenROAD-flow-scripts Directory Structure And Results
+
+Open a new tab in the terminal and explore the directory structure in
+`flow` by typing `ls` command to view its contents:
+
+```shell
+designs logs Makefile objects platforms reports results scripts test util
+```
+
+Navigate through each of the sub-directories above to understand how
+underlying files are organized.
+
+-   `designs/sky130hd/ibex`
+    Files include: designs make file and SDC file for the `sky130hd`
+    platform and other files for autotuner and metrics.
+
+```
+autotuner.json config.mk constraint_doe.sdc constraint.sdc metadata-base-ok.json rules.json
+```
+
+-   `platforms`
+    Includes public PDKs supported by OpenROAD flow
+
+```
+asap7 nangate45 sky130hd sky130hs sky130io sky130ram
+```
+
+-   `objects/sky130hd/ibex/base`
+    Includes ABC constraints and all the temporary library files used
+    for the completion flow
+
+```
+abc.constr klayout.lyt klayout_tech.lef lib
+```
+
+-   `logs/sky130hd/ibex/base`
+    Logs directory, which contains log files for each flow stage.
+
+| `logs`                 |                        |                       |
+|------------------------|------------------------|-----------------------|
+| `1_1_yosys.log`        | `3_1_place_gp.log`     | `5_2_route.log` |
+| `2_1_floorplan.log`    | `3_2_place_iop.log`    | `6_1_merge.log`       |
+| `2_2_floorplan_io.log` | `3_3_resizer.log`      | `6_report.log`        |
+| `2_3_tdms_place.log`   | `3_4_opendp.log`       |                       |
+| `2_4_floorplan_macro.log`       | `4_1_cts.log`          |                       |
+| `2_5_floorplan_tapcell.log`      | `4_2_cts_fillcell.log` |                       |
+| `2_6_floorplan_pdn.log`          | `5_1_grt.log`    |                       |
+
+
+-   `results/sky130hd/ibex/base`
+    Results directory which contains `.v/.sdc/.odb/.def/.spef` files
+
+| `results`                   |                         |                    |
+|-----------------------------|-------------------------|--------------------|
+| `1_1_yosys.v`               | `3_1_place_gp.odb`      | `5_route.sdc`      |
+| `1_synth.sdc`               | `3_2_place_iop.odb`     | `6_1_fill.odb`     |
+| `1_synth.v`                 | `3_3_place_resized.odb` | `6_1_fill.sdc`     |
+| `2_1_floorplan.odb`         | `3_4_place_dp.odb`      | `6_1_merged.gds`   |
+| `2_2_floorplan_io.odb`      | `3_place.odb`           | `6_final.odb`      |
+| `2_3_floorplan_tdms.odb`    | `3_place.sdc`           | `6_final.gds`      |
+| `2_4_floorplan_macro.odb`   | `4_1_cts.odb`           | `6_final.sdc`      |
+| `2_5_floorplan_tapcell.odb` | `4_2_cts_fillcell.odb`  | `6_final.spef`     |
+| `2_6_floorplan_pdn.odb`     | `4_cts.odb`             | `6_final.v`        |
+| `2_floorplan.odb`           | `4_cts.sdc`             | `output_guide.mod` |
+| `2_floorplan.sdc`           | `4_cts.v`               | `route.guide`      |
+| `2_floorplan.v`             | `5_route.odb`           | `updated_clks.sdc` |
+
+
+-   `reports/sky130hd/ibex/base`
+    Reports directory, which contains congestion report, DRC
+    report, design statistics and antenna log for reference.
+
+| `reports`         |                     |                        |
+|-------------------|---------------------|------------------------|
+| `congestion.rpt`  | `VDD.rpt`           | `VSS.rpt`              |
+| `5_route_drc.rpt` | `final_clocks.webp` | `final_placement.webp` |
+| `antenna.log`     | `final_clocks.webp` | `final.webp`           |
+| `synth_stat.txt`  | `synth_check.txt`   | `final_resizer.webp`   |
+
+The table below briefly describes the reports directory files.
+
+| File Name              | Description                                              |
+|------------------------|----------------------------------------------------------|
+| `congestion.rpt`       | Gloabl routing congestion if occurred.                   |
+| `5_route_drc.rpt`      | DRC violations if occurred.                              |
+| `final_clocks.webp`    | OR extracted image reference after clock tree synthesis. |
+| `final_resizer.webp`   | OR extracted image reference after resizer.              |
+| `synth_check.txt`      | Synthesis warning/error messages.                        |
+| `antenna.log`          | Antenna check log report.                                |
+| `final_placement.webp` | Extracted image after final placement.                   |
+| `final.webp`           | Extracted image after routing.                           |
+| `synth_stat.txt`       | Post synthesis design statistics log saved here.         |
+
+The flow completes with the message below by creating a merged final GDS file.
+
+```
+[INFO] Writing out GDS/OAS
+'results/sky130hd/ibex/base/6_1_merged.gds'
+cp results/sky130hd/ibex/base/6_1_merged.gds
+results/sky130hd/ibex/base/6_final.gds
+```
+
+## Viewing Results And Logs
+
+OpenROAD-flow-scripts prepends a prefix to each flow stage, as shown below, to
+indicate the position in the RTL-GDS flow. This makes it easier to
+understand and debug each flow stage in case of failure.
+
+View `ibex` design logs:
+
+```shell
+ls logs/sky130hd/ibex/base/
+```
+
+The log structure is as follows:
+
+| `logs`                 |                        |                       |
+|------------------------|------------------------|-----------------------|
+| `1_1_yosys.log`        | `3_1_place_gp.log`     | `5_2_route.log` |
+| `2_1_floorplan.log`    | `3_2_place_iop.log`    | `6_1_merge.log`       |
+| `2_2_floorplan_io.log` | `3_3_resizer.log`      | `6_report.log`        |
+| `2_3_tdms_place.log`   | `3_4_opendp.log`       |                       |
+| `2_4_floorplan_macro.log`       | `4_1_cts.log`          |                       |
+| `2_5_floorplan_tapcell.log`      | `4_2_cts_fillcell.log` |                       |
+| `2_6_floorplan_pdn.log`          | `5_1_grt.log`    |                       |
+
+### Area
+
+View design area and its core utilization:
+
+```
+make gui_final
+report_design_area
+```
+
+View the resulting area as:
+
+```
+Design area 191262 u^2 30% utilization.
+```
+
+### Timing
+
+Users can view flow results using the command interface from the shell or
+the OpenROAD GUI to visualize further and debug. Learn more about the
+[GUI](https://openroad.readthedocs.io/en/latest/main/README.html#gui).
+
+```shell
+make gui_final
+```
+
+Use the following commands in the `Tcl Commands` section of GUI:
+
+```tcl
+report_worst_slack
+report_tns
+report_wns
+```
+
+Note the worst slack, total negative slack and worst negative slack:
+
+```
+worst slack -0.99
+tns -1.29
+wns -0.99
+```
+
+Learn more about visualizing and tracing time paths across the design
+hierarchy refer to the OpenROAD [GUI](https://openroad.readthedocs.io/en/latest/main/README.html#gui).
+
+### Power
+
+Use the report command to view individual power components i.e.
+sequential, combinational, macro and power consumed by I/O pads.
+
+```tcl
+report_power
+```
+
+The power output is as follows:
+
+```
+--------------------------------------------------------------------------
+Group                  Internal  Switching    Leakage      Total
+                          Power      Power      Power      Power
+----------------------------------------------------------------
+Sequential             5.58e-03   6.12e-04   1.67e-08   6.19e-03  19.0%
+Combinational          9.23e-03   1.71e-02   4.90e-08   2.63e-02  81.0%
+Macro                  0.00e+00   0.00e+00   0.00e+00   0.00e+00   0.0%
+Pad                    0.00e+00   0.00e+00   0.00e+00   0.00e+00   0.0%
+----------------------------------------------------------------
+Total                  1.48e-02   1.77e-02   6.57e-08   3.25e-02 100.0%
+                          45.6%      54.4%       0.0%
+```
+
+## OpenROAD GUI
+
+The GUI allows users to select, control, highlight and navigate the
+design hierarchy and design objects (nets, pins, instances, paths, etc.)
+through detailed visualization and customization options. Find details
+on how to use the [GUI](https://openroad.readthedocs.io/en/latest/main/README.html#gui). All the windows
+aside from the layout are docking windows that can be undocked.  Also it
+can be closed and reopened from the Windows menu.
+
+
+Note:  When you are using remote access, you will need to include -Y (or -X) option in your command to
+enable X11 applications to function properly over the network. By using the command "ssh -Y" followed
+by the remote servers' address or hostname, you can establish a secure connection and activate X11 forwarding.
+This feature enables you to run graphical programs on the remote server and have their windows display
+on your local machines desktop environment.
+
+
+In this section, learn how to:
+
+1. Visualize design hierarchy
+2. Load ODB files for floorplan and layout visualization
+3. Trace the synthesized clock tree to view hierarchy and buffers
+4. Use heat maps to view congestion and observe the effect of placement
+5. View and trace critical timing paths
+6. Set display control options
+7. Zoom to object from inspector
+
+If you have completed the RTL-GDS flow, then proceed to view the final
+GDS file under results directory `./results/sky130hd/ibex/base/`
+
+For the `ibex` design uncomment the `DESIGN_CONFIG`
+variable in the `Makefile` available [here](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/Makefile).
+
+```
+# DESIGN_CONFIG=./designs/sky130hd/gcd/config.mk
+DESIGN_CONFIG=./designs/sky130hd/ibex/config.mk
+# DESIGN_CONFIG=./designs/sky130hd/aes/config.mk
+```
+
+```shell
+make gui_final
+```
+
+### Viewing Layout Results
+
+The `make gui_final` command target successively reads and loads the
+technology `.odb` files and the parasitics and invokes the
+GUI in these steps:
+
+-   Reads and loads `.odb` files.
+-   Loads `.spef` (parasitics).
+
+The figure below shows the post-routed DEF for the `ibex` design.
+
+![ibex_final_db](./images/ibex_final_db.webp)
+
+### Visualizing Design Objects And Connectivity
+
+Note the `Display Control` window on the LHS that shows buttons
+for color, visibility and selection options for various design
+objects: Layers, Nets, Instances, Blockages, Heatmaps, etc.
+
+The Inspector window on the RHS allows users to inspect details of
+selected design objects and the timing report.
+
+Try selectively displaying (show/hide) various design objects through
+the display control window and observing their impact on the display.
+
+### Tracing The Clock Tree
+
+View the synthesized clock tree for `ibex` design:
+-   From the top Toolbar Click `Windows` -> `Clock Tree Viewer`
+
+![cts_viewer](./images/CTV_update.webp)
+
+On RHS, click `Clock Tree Viewer` and top right corner, click
+`Update` to view the synthesized clock tree of your design.
+
+View clock tree structure below, the user needs to disable the metal
+`Layers` section on LHS as shown below.
+
+![ibex_clock_tree](./images/ibex_clock_tree.webp)
+
+From the top Toolbar, click on the `Windows` menu to select/hide different
+view options of Scripting, Display control, etc.
+
+### Using Heat Maps
+
+From the Menu Bar, Click on `Tools` -> `Heat Maps` -> `Placement Density` to view
+congestion selectively on vertical and horizontal layers.
+
+Expand `Heat Maps` -> `Placement Density` from the Display Control window
+available on LHS of OpenROAD GUI.
+
+View congestion on all layers between 50-100%:
+
+In the `Placement density` setup pop-up window, Select `Minimum` -> `50.00%`
+`Maximum` -> `100.00%`
+
+![placement_heat_map](./images/placement_heatmap.webp)
+
+From `Display Control`, select `Heat Maps` -> `Routing Congestion` as
+follows:
+
+![routing_heat_map](./images/routing_heatmap.webp)
+
+From `Display Control`, select `Heat Maps` -> `Power Density` as
+follows:
+
+![power_heat_map](./images/power_heatmap.webp)
+
+### Viewing Timing Report
+
+Click `Timing` -> `Options` to view and traverse specific timing paths.
+From Toolbar, click on the `Timing` icon, View `Timing Report` window added
+at the right side (RHS) of GUI as shown below.
+
+![Timing report option](./images/ibex_final_db.webp)
+
+In `Timing Report` Select `Paths` -> `Update`, `Paths` should be integer
+numbers. The number of timing paths should be displayed in the current
+window as follows:
+
+![Clock Path Update](./images/clock_path_update.webp)
+
+Select `Setup` or `Hold` tabs and view required arrival times and
+slack for each timing path segment.
+
+For each `Setup` or `Hold` path group, path details have a specific `pin
+name, Time, Delay, Slew and Load` value with the clock to register, register
+to register and register to output data path.
+
+### Using Rulers
+
+A ruler can measure the distance between any two objects in the design or
+metal layer length and width to be measured, etc.
+
+Example of how to measure the distance between VDD and VSS power grid click on:
+
+`Tools` -> `Ruler K`
+
+![Ruler Tool](./images/ruler_tool.png)
+
+Distance between VDD and VSS layer is `11.970`
+
+### DRC Viewer
+
+You can use the GUI to trace DRC violations and fix them.
+
+View DRC violations post routing:
+
+```shell
+less ./reports/sky130hd/ibex/base/5_route_drc.rpt
+```
+
+Any DRC violations are logged in the `5_route_drc.rpt` file, which is
+empty otherwise.
+
+From OpenROAD GUI, Enable the menu options `Windows` -> `DRC Viewer`. A
+`DRC viewer` window is added on the right side (RHS) of the GUI. From
+`DRC Viewer` -> `Load` navigate to `5_route_drc.rpt`
+
+![DRC Report Load](./images/drc_report_load.webp)
+
+By selecting DRC violation details, designers can analyze and fix them. Here
+user will learn how a DRC violation can be traced with the `gcd` design. Refer
+to the following OpenROAD test case for more details.
+
+```shell
+cd ./flow/tutorials/scripts/drt/
+openroad -gui
+```
+
+In the `Tcl Commands` section of GUI:
+
+```tcl
+source drc_issue.tcl
+```
+
+Post detail routing in the log, you can find the number of violations left
+in the design:
+
+```
+[INFO DRT-0199] Number of violations = 7.
+```
+
+Based on `DRC Viewer` steps load `results/5_route_drc.rpt`. GUI as
+follows
+
+![gcd DRC issue load](./images/gcd_drc_issue.webp)
+
+`X mark` in the design highlights DRC violations.
+
+From `DRC Viewer` on RHS `expand` -> `Short`
+
+This shows the number of `violations` in the design. Zoom the design
+for a clean view of the violation:
+
+![View DRC Violation](./images/view_violation.webp)
+
+`output53` has overlaps and this causes the `short violation`.
+
+Open the input DEF file `drc_cts.def` to check the source of the
+overlap.
+
+Note the snippet of DEF file where `output51` and `output53` have
+the same placed coordinates and hence cause the placement violation.
+
+```
+- output51 sky130_fd_sc_hd__clkbuf_1 + PLACED ( 267260 136000 ) N ;
+- output53 sky130_fd_sc_hd__clkbuf_1 + PLACED ( 267260 136000 ) N ;
+```
+
+Use the test case provided in `4_cts.def` with the changes applied for
+updated coordinates as follows:
+
+```
+- output51 sky130_fd_sc_hd__clkbuf_1 + PLACED ( 267260 136000 ) N ;
+- output53 sky130_fd_sc_hd__clkbuf_1 + PLACED ( 124660 266560 ) N ;
+```
+
+Close the current GUI and re-load the GUI with the updated DEF to see
+fixed DRC violation in the design:
+
+```shell
+openroad -gui
+source drc_fix.tcl
+```
+
+In the post detail routing log, the user can find the number of violations
+left in the design:
+
+```
+[INFO DRT-0199] Number of violations = 0.
+```
+
+Routing completed with 0 violations.
+
+### Tcl Command Interface
+
+Execute OpenROAD-flow-scripts Tcl commands from the GUI. Type `help`
+to view Tcl Commands available. In OpenROAD GUI, at the bottom,
+`TCL commands` executable space is available to run the commands.
+For example
+
+View `design area`:
+
+```tcl
+report_design_area
+```
+
+Try the below timing report commands to view timing results interactively:
+
+```tcl
+report_wns
+report_tns
+report_worst_slack
+```
+
+### Customizing The GUI
+
+Customize the GUI by creating your own widgets such as menu bars,
+toolbar buttons, dialog boxes, etc.
+
+Refer to the [GUI](https://openroad.readthedocs.io/en/latest/main/README.html#gui).
+
+Create `Load_LEF` toolbar button in GUI to automatically load
+specified `.lef` files.
+
+```shell
+openroad -gui
+```
+
+![Default GUI](./images/default_gui.webp)
+
+To view `load_lef.tcl`, run the command:
+
+```shell
+less ./flow/tutorials/scripts/gui/load_lef.tcl
+```
+
+```tcl
+proc load_lef_sky130 {} {
+    set FLOW_PATH [exec pwd]
+    read_lef $FLOW_PATH/../../../platforms/sky130hd/lef/sky130_fd_sc_hd.tlef
+    read_lef $FLOW_PATH/../../../platforms/sky130hd/lef/sky130_fd_sc_hd_merged.lef
+}
+create_toolbar_button -name "Load_LEF" -text "Load_LEF" -script {load_lef_sky130} -echo
+```
+
+From OpenROAD GUI `Tcl commands`:
+
+```tcl
+cd ./flow/tutorials/scripts/gui/
+source load_lef.tcl
+```
+
+`Load_LEF` toolbar button added as follows:
+
+![Load LEF toolbar button](./images/Load_LEF_button.webp)
+
+From Toolbar menus, Click on `Load_LEF.` This loads the specified `sky130`
+technology `.tlef` and `merged.lef` file in the current OpenROAD GUI
+as follows:
+
+![sky130 LEF file load](./images/sky130_lef_load.webp)
+
+## Understanding and Analyzing OpenROAD Flow Stages and Results
+
+The OpenROAD flow is fully automated and yet the user can usefully intervene
+to explore, analyze and optimize your design flow for good PPA.
+
+In this section, you will learn specific details of flow stages and
+learn to explore various design configurations and optimizations to
+target specific design goals, i.e., PPA (area, timing, power).
+
+### Synthesis Explorations
+
+#### Area And Timing Optimization
+
+Explore optimization options using synthesis options: `ABC_AREA` and `ABC_SPEED`.
+
+Set `ABC_AREA=1` for area optimization and `ABC_SPEED=1` for timing optimization.
+Update design `config.mk` for each case and re-run the flow to view impact.
+
+To view `ibex` design [config.mk](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/designs/sky130hd/ibex/config.mk).
+
+```
+#Synthesis strategies
+export ABC_AREA = 1
+```
+
+Run `make` command from `flow` directory as follows:
+
+```shell
+make DESIGN_CONFIG=./designs/sky130hd/gcd/config.mk
+```
+
+The `gcd` design synthesis results for area and speed optimizations are shown below:
+
+| Synthesis Statistics  | ABC_SPEED                            | ABC_AREA                             |
+|-----------------------|--------------------------------------|--------------------------------------|
+| `Number of wires`     | 224                                  | 224                                  |
+| `Number of wire bits` | 270                                  | 270                                  |
+| `Number of cells`     | 234                                  | 234                                  |
+| `Chip area`           | 2083.248000                          | 2083.248000                          |
+| `Final Design Area`   | Design area 4295 u^2 6% utilization. | Design area 4074 u^2 6% utilization. |
+
+Note: Results for area optimization should be ideally checked after
+floorplanning to verify the final impact. First, relax the `.sdc` constraint
+and re-run to see area impact. Otherwise, the repair design command will
+increase the area to meet timing regardless of the netlist produced earlier.
+
+### Floorplanning
+
+This section describes OpenROAD-flow-scripts floorplanning and
+placement functions using the GUI.
+
+#### Floorplan Initialization Based On Core And Die Area
+
+Refer to the following OpenROAD built-in examples
+[here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/ifp/test/init_floorplan1.tcl).
+
+Run the following commands in the terminal in OpenROAD tool root directory to build and view the created
+floorplan.
+
+```shell
+cd ../tools/OpenROAD/src/ifp/test/
+openroad -gui
+```
+
+In `Tcl Commands` section GUI:
+
+```tcl
+source init_floorplan1.tcl
+```
+
+View the resulting die area "0 0 1000 1000" and core area "100 100 900 900"
+in microns shown below:
+
+![Absolute Floorplan](./images/absolute_die.webp)
+
+#### Floorplan Based On Core Utilization
+
+Refer to the following OpenROAD built-in examples
+[here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/ifp/test/init_floorplan2.tcl).
+
+Run the following commands in the terminal in OpenROAD tool root directory to view how the floorplan
+initialized:
+
+```shell
+cd ../tools/OpenROAD/src/ifp/test/
+openroad -gui
+```
+
+In the `Tcl Commands` section of the GUI:
+
+```tcl
+source init_floorplan2.tcl
+```
+
+View the resulting core utilization of 30 created following floorplan:
+
+![Relative Floorplan](./images/core_util.webp)
+
+### IO Pin Placement
+
+Place pins on the boundary of the die on the track grid to minimize net
+wirelengths. Pin placement also creates a metal shape for each pin using
+min-area rules.
+
+For designs with unplaced cells, the net wirelength is computed considering
+the center of the die area as the unplaced cells position.
+
+Find pin placement document [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/ppl/README.md).
+
+Refer to the built-in examples [here](https://github.com/The-OpenROAD-Project/OpenROAD/tree/master/src/ppl/test).
+
+Launch openroad GUI by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/ppl/test/
+openroad -gui
+```
+
+Run [place_pin4.tcl](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/ppl/test/place_pin4.tcl) script to view
+pin placement.
+
+From the GUI `Tcl commands` section:
+
+```tcl
+source place_pin4.tcl
+```
+
+View the resulting pin placement in GUI:
+
+![place_pin](./images/place_pin.webp)
+
+In OpenROAD GUI to enlarge `clk` pin placement, hold mouse right button
+as follows and draw sqaure box in specific location:
+
+![pin_zoom](./images/pin_zoom_RC.webp)
+
+Now `clk` pin zoom to clear view as follows:
+
+![pin_zoomed](./images/pin_zoomed.webp)
+
+
+### Chip Level IO Pad Placement
+
+In this section, you will generate an I/O pad ring for the `coyote` design
+using a Tcl script.
+
+ICeWall is a utility to place IO cells around the periphery of a design,
+and associate the IO cells with those present in the netlist of the
+design.
+
+For I/O pad placement using ICeWall refer to the readme file
+[here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/pad/README.md).
+
+Refer to the built-in examples [here](https://github.com/The-OpenROAD-Project/OpenROAD/tree/master/src/pad/test).
+
+Launch openroad GUI by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/pad/test/
+openroad -gui
+```
+
+Run [skywater130_coyote_tc.tcl](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/pad/test/skywater130_coyote_tc.tcl) script
+to view IO pad placement.
+
+From the GUI `Tcl commands` section:
+
+```tcl
+source skywater130_coyote_tc.tcl
+```
+
+View the resulting IO pad ring in GUI:
+
+![coyote pad ring](./images/coyote_pad_ring.webp)
+
+### Power Planning And Analysis
+
+In this section, you will use the design `gcd` to create a
+power grid and run power analysis.
+
+Pdngen is used for power planning. Find the document [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/pdn/README.md).
+
+Refer to the built-in examples [here](https://github.com/The-OpenROAD-Project/OpenROAD/tree/master/src/pdn/test).
+
+Launch openroad GUI by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/pdn/test
+openroad -gui
+```
+
+Run [core_grid_snap.tcl](.(https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/pdn/test/core_grid_snap.tcl)
+to generate power grid for `gcd` design.
+
+```tcl
+source core_grid_snap.tcl
+```
+View the resulting power plan for `gcd` design:
+
+![gcd PDN GUI](./images/gcd_pdn_gui.webp)
+
+#### IR Drop Analysis
+IR drop is the voltage drop in the metal wires constituting the power
+grid before it reaches the power pins of the standard cells. It becomes
+very important to limit the IR drop as it affects the speed of the cells
+and overall performance of the chip.
+
+PDNSim is an open-source static IR analyzer.
+
+Features:
+
+-   Report worst IR drop.
+-   Report worst current density over all nodes and wire segments in
+    the power distribution network, given a placed and PDN-synthesized design.
+-   Check for floating PDN stripes on the power and ground nets.
+-   Spice netlist writer for power distribution network wire segments.
+
+Refer to the built-in examples [here](https://github.com/The-OpenROAD-Project/OpenROAD/tree/master/src/psm/test).
+
+Launch openroad by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/psm/test
+openroad
+```
+
+Run [gcd_test_vdd.tcl](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/psm/test/gcd_test_vdd.tcl)
+to generate IR drop report for `gcd` design.
+
+```tcl
+source gcd_test_vdd.tcl
+```
+
+Find the IR drop report at the end of the log as follows:
+```
+########## IR report #################
+Worstcase voltage: 1.10e+00 V
+Average IR drop  : 1.68e-04 V
+Worstcase IR drop: 2.98e-04 V
+######################################
+```
+
+### Tapcell insertion
+
+Tap cells are non-functional cells that can have a well tie, substrate
+tie or both. They are typically used when most or all of the standard
+cells in the library contain no substrate or well taps. Tap cells help
+tie the VDD and GND levels and thereby prevent drift and latch-up.
+
+The end cap cell or boundary cell is placed at both the ends of each
+placement row to terminate the row. They protect the standard cell
+gate at the boundary from damage during manufacturing.
+
+Tap cells are placed after the macro placement and power rail creation.
+This stage is called the pre-placement stage. Tap cells are placed in a
+regular interval in each row of placement. The maximum distance between
+the tap cells must be as per the DRC rule of that particular technology library.
+
+The figures below show two examples of tapcell insertion. When only the
+`-tapcell_master` and `-endcap_master` masters are given, the tapcell placement
+is similar to Figure 1. When the remaining masters are give, the tapcell
+placement is similar to Figure 2.
+
+Refer to the GUI figures to highlight well tap and end cap cells. The image
+does not differentiate and just shows a bunch of rectangles.
+
+| <img src="./images/tapcell_example1.svg" width=450px> | <img src="./images/tapcell_example2.svg" width=450px> |
+|:--:|:--:|
+| Figure 1: Tapcell insertion representation | Figure 2:  Tapcell insertion around macro representation |
+
+Refer to the following built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/tap/test/gcd_nangate45.tcl)
+to learn about Tap/endcap cell insertion.
+
+To view this in OpenROAD GUI by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/tap/test/
+openroad -gui
+```
+
+In the `Tcl Commands` section of GUI
+
+```tcl
+source gcd_nangate45.tcl
+```
+
+View the resulting tap cell insertion as follows:
+
+![Tap_Cell_Insertion](./images/tapcell_insertion_view.webp)
+
+### Tie Cells
+
+The tie cell is a standard cell, designed specially to provide the high
+or low signal to the input (gate terminal) of any logic gate.
+Where ever netlist is having any pin connected to 0 logic or 1 logic
+(like .A(1'b0) or .IN(1'b1), a tie cell gets inserted there.
+
+Refer to the following built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/ifp/test/tiecells.tcl)
+to learn about Tie cell insertion.
+
+To check this in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/ifp/test/
+openroad
+source tiecells.tcl
+```
+
+Refer the following verilog code which have tie high/low net.
+[here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/ifp/test/tiecells.v)
+```
+AND2_X1 u2 (.A1(r1q), .A2(1'b0), .ZN(u2z0));
+AND2_X1 u3 (.A1(u1z), .A2(1'b1), .ZN(u2z1));
+```
+With following `insert_tiecells` command:
+```
+insert_tiecells LOGIC0_X1/Z -prefix "TIE_ZERO_"
+insert_tiecells LOGIC1_X1/Z
+```
+During floorplan stage, those nets converted to tiecells as follows
+based on library(This is Nangate45 specific):
+```
+[INFO IFP-0030] Inserted 1 tiecells using LOGIC0_X1/Z.
+[INFO IFP-0030] Inserted 1 tiecells using LOGIC1_X1/Z.
+```
+
+### Macro or Standard Cell Placement
+
+#### Macro Placement
+
+In this section, you will explore various placement options for macros
+and standard cells and study the impact on area and timing.
+
+Refer to the following built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/gpl/test/macro01.tcl)
+to learn about macro placement.
+
+Placement density impacts how widely standard cells are placed in the
+core area. To view this in OpenROAD GUI run the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/gpl/test/
+openroad -gui
+```
+
+In the `Tcl Commands` section of GUI
+
+```tcl
+source macro01.tcl
+```
+
+Read the resulting macro placement with a complete core view:
+
+| <img src="./images/macro_place_full_view.webp" width=450px> | <img src="./images/macro_place_close_view.webp" width=450px> |
+|:--:|:--:|
+| Figure 1: With density 0.7 | Figure 2: Zoomed view of macro and std cell placement|
+
+Reduce the placement density and observe the impact on placement, by
+running below command in `Tcl Commands` section of GUI:
+
+```tcl
+global_placement -density 0.6
+```
+
+Read the resulting macro placement with a complete core view:
+
+| <img src="./images/placement_density_06_full.webp" width=450px> | <img src="./images/placement_density_06_zoomed.webp" width=450px> |
+|:--:|:--:|
+| Figure 1: With density 0.6 | Figure 2: Zoomed view of macro and std cell placement |
+
+##### Macro Placement With Halo Spacing
+
+Explore macro placement with halo spacing, refer to the example
+[here]((https://github.com/The-OpenROAD-Project/OpenROAD/tree/master/src/mpl/test/).
+
+Launch GUI by running the following command(s) in the terminal in OpenROAD tool root directory:
+```shell
+cd ../tools/OpenROAD/src/mpl/test
+openroad -gui
+```
+
+In the `Tcl Commands` section of GUI:
+
+```tcl
+source helpers.tcl
+source level3.tcl
+global_placement
+```
+
+DEF file without halo spacing
+
+![gcd without halo spacing](./images/without_halo.webp)
+
+Now increase the halo width for better routing resources.
+
+In the `Tcl Commands` section of GUI:
+
+```tcl
+macro_placement -halo {0.5 0.5}
+```
+
+Overlapping macros placed `0.5` micron H/V halo around macros.
+
+![gcd with halo spacing](./images/with_halo.webp)
+
+#### Defining Placement Density
+
+To learn on placement density strategies for `ibex` design, go to
+`OpenROAD-flow-scripts/flow`. Type:
+
+```shell
+openroad -gui
+```
+
+Enter the following commands in the `Tcl Commands` section of GUI
+
+```tcl
+read_lef ./platforms/sky130hd/lef/sky130_fd_sc_hd.tlef
+read_lef ./platforms/sky130hd/lef/sky130_fd_sc_hd_merged.lef
+read_def ./results/sky130hd/ibex/base/3_place.def
+```
+![ibex placement density 60](./images/ibex_pl_60.webp)
+
+Change `CORE_UTILIZATION` and `PLACE_DENSITY` for the `ibex` design
+`config.mk` as follows.
+
+View `ibex` design `config.mk`
+[here](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/designs/sky130hd/ibex/config.mk).
+
+```
+export CORE_UTILIZATION = 40
+export PLACE_DENSITY_LB_ADDON = 0.1
+```
+
+Re-run the `ibex` design with the below command:
+
+```shell
+make DESIGN_CONFIG=./designs/sky130hd/ibex/config.mk
+```
+
+View the `ibex` design placement density heat map as shown below:
+
+![ibex placement density 50](./images/ibex_pl_50.webp)
+
+So from above, GUI understood that change in `CORE_UTILIZATION` from 20
+to 40 and placement density default 0.60 to 0.50 changes standard cell
+placement became widely spread.
+
+### Timing Optimizations
+
+#### Timing Optimization Using repair_design
+
+The `repair_design` command inserts buffers on nets to repair `max
+slew, max capacitance and max fanout` violations and on long wires to
+reduce RC delay. It also resizes gates to normalize slews. Use
+`estimate_parasitics -placement` before `repair_design` to account
+for estimated post-placement parasitics.
+
+Refer to the built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/rsz/test/repair_slew1.tcl).
+
+Launch GUI by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/rsz/test/
+openroad -gui
+```
+
+Copy and paste the below commands in the `Tcl Commands` section of GUI.
+
+```tcl
+source "helpers.tcl"
+source "hi_fanout.tcl"
+read_liberty Nangate45/Nangate45_typ.lib
+read_lef Nangate45/Nangate45.lef
+set def_file [make_result_file "repair_slew1.def"]
+write_hi_fanout_def $def_file 30
+read_def $def_file
+
+create_clock -period 1 clk1
+set_wire_rc -layer metal3
+
+estimate_parasitics -placement
+set_max_transition .05 [current_design]
+
+puts "Found [sta::max_slew_violation_count] violations"
+```
+
+The number of violations log as:
+
+```
+Found 31 violations
+```
+
+These violations were fixed by:
+
+```tcl
+repair_design
+```
+
+The log is as follows:
+
+```
+[INFO RSZ-0058] Using max wire length 853um.
+[INFO RSZ-0039] Resized 1 instance.
+```
+
+To view violation counts again:
+
+```tcl
+puts "Found [sta::max_slew_violation_count] violations"
+```
+
+The log follows:
+
+```
+Found 0 violations
+```
+
+`repair_design` fixed all 31 violations.
+
+#### Timing Optimization Using repair_timing
+
+The `repair_timing` command repairs setup and hold violations. It was
+run after clock tree synthesis with propagated clocks.
+
+While repairing hold violations, buffers are not inserted since that may
+cause setup violations unless '-allow_setup_violations' is specified.
+Use `-slack_margin` to add additional slack margin.
+
+#### Timing Optimization Based On Multiple Corners
+
+OpenROAD supports multiple corner analysis to calculate worst-case setup
+and hold violations.
+
+Setup time optimization is based on the slow corner or the best case when
+the launch clock arrives later than the data clock.
+Hold time optimization is based on the fast corner or the best case when
+the launch clock arrives earlier than the capture clock.
+
+Refer to the following `gcd` design on `repair_timing` with fast and slow
+corners.
+
+Refer to the built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/test/gcd_sky130hd_fast_slow.tcl).
+
+Run the following commands in the terminal:
+```shell
+cd ../../test/
+openroad
+source gcd_sky130hd_fast_slow.tcl
+```
+
+The resulting `worst slack`, `TNS`:
+
+```
+report_worst_slack -min -digits 3
+worst slack 0.321
+report_worst_slack -max -digits 3
+worst slack -16.005
+report_tns -digits 3
+tns -529.496
+```
+
+#### Fixing Setup Violations
+
+To fix setup timing path violations, use `repair_timing -setup.`
+
+Refer to the following built-in example to learn more about fixing setup
+timing violations.
+
+Refer to the built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/rsz/test/repair_setup4.tcl).
+
+Launch OpenROAD in an interactive mode by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/rsz/test/
+openroad
+```
+
+Copy and paste the following Tcl commands.
+
+```tcl
+define_corners fast slow
+read_liberty -corner slow Nangate45/Nangate45_slow.lib
+read_liberty -corner fast Nangate45/Nangate45_fast.lib
+read_lef Nangate45/Nangate45.lef
+read_def repair_setup1.def
+create_clock -period 0.3 clk
+set_wire_rc -layer metal3
+estimate_parasitics -placement
+report_checks -fields input -digits 3
+```
+
+View the generated timing report with the slack violation.
+
+```
+Startpoint: r1 (rising edge-triggered flip-flop clocked by clk)
+Endpoint: r2 (rising edge-triggered flip-flop clocked by clk)
+Path Group: clk
+Path Type: max
+Corner: slow
+
+   Delay     Time   Description
+-----------------------------------------------------------
+   0.000    0.000   clock clk (rise edge)
+   0.000    0.000   clock network delay (ideal)
+   0.000    0.000 ^ r1/CK (DFF_X1)
+   0.835    0.835 ^ r1/Q (DFF_X1)
+   0.001    0.836 ^ u1/A (BUF_X1)
+   0.196    1.032 ^ u1/Z (BUF_X1)
+   0.001    1.033 ^ u2/A (BUF_X1)
+   0.121    1.154 ^ u2/Z (BUF_X1)
+   0.001    1.155 ^ u3/A (BUF_X1)
+   0.118    1.273 ^ u3/Z (BUF_X1)
+   0.001    1.275 ^ u4/A (BUF_X1)
+   0.118    1.393 ^ u4/Z (BUF_X1)
+   0.001    1.394 ^ u5/A (BUF_X1)
+   0.367    1.761 ^ u5/Z (BUF_X1)
+   0.048    1.809 ^ r2/D (DFF_X1)
+            1.809   data arrival time
+
+   0.300    0.300   clock clk (rise edge)
+   0.000    0.300   clock network delay (ideal)
+   0.000    0.300   clock reconvergence pessimism
+            0.300 ^ r2/CK (DFF_X1)
+  -0.155    0.145   library setup time
+            0.145   data required time
+-----------------------------------------------------------
+            0.145   data required time
+           -1.809   data arrival time
+-----------------------------------------------------------
+           -1.664   slack (VIOLATED)
+
+```
+
+Fix setup violation using:
+
+```tcl
+repair_timing -setup
+```
+
+The log is as follows:
+
+```
+[INFO RSZ-0040] Inserted 4 buffers.
+[INFO RSZ-0041] Resized 16 instances.
+[WARNING RSZ-0062] Unable to repair all setup violations.
+```
+
+Reduce the clock frequency by increasing the clock period to `0.9` and re-run
+`repair_timing` to fix the setup violation warnings. Such timing violations
+are automatically fixed by the `resizer` `post CTS` and `global routing.`
+
+```yvl
+create_clock -period 0.9 clk
+repair_timing -setup
+```
+
+To view timing logs post-repair timing, type:
+
+```tcl
+report_checks -fields input -digits 3
+```
+
+The log is as follows:
+
+```
+Startpoint: r1 (rising edge-triggered flip-flop clocked by clk)
+Endpoint: r2 (rising edge-triggered flip-flop clocked by clk)
+Path Group: clk
+Path Type: max
+Corner: slow
+
+   Delay     Time   Description
+-----------------------------------------------------------
+   0.000    0.000   clock clk (rise edge)
+   0.000    0.000   clock network delay (ideal)
+   0.000    0.000 ^ r1/CK (DFF_X1)
+   0.264    0.264 v r1/Q (DFF_X1)
+   0.002    0.266 v u1/A (BUF_X4)
+   0.090    0.356 v u1/Z (BUF_X4)
+   0.003    0.359 v u2/A (BUF_X8)
+   0.076    0.435 v u2/Z (BUF_X8)
+   0.003    0.438 v u3/A (BUF_X8)
+   0.074    0.512 v u3/Z (BUF_X8)
+   0.003    0.515 v u4/A (BUF_X8)
+   0.077    0.592 v u4/Z (BUF_X8)
+   0.005    0.597 v u5/A (BUF_X16)
+   0.077    0.674 v u5/Z (BUF_X16)
+   0.036    0.710 v r2/D (DFF_X1)
+            0.710   data arrival time
+
+   0.900    0.900   clock clk (rise edge)
+   0.000    0.900   clock network delay (ideal)
+   0.000    0.900   clock reconvergence pessimism
+            0.900 ^ r2/CK (DFF_X1)
+  -0.172    0.728   library setup time
+            0.728   data required time
+-----------------------------------------------------------
+            0.728   data required time
+           -0.710   data arrival time
+-----------------------------------------------------------
+            0.019   slack (MET)
+```
+
+#### Fixing Hold Violations
+
+To fix hold violation for the design, command to use `repair_timing
+-hold`
+
+Refer to the example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/rsz/test/repair_hold10.tcl)
+to learn more about fixing hold violations.
+
+Check hold violation post-global routing using the following Tcl
+commands. Run below steps in terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/rsz/test/
+openroad -gui
+```
+
+Copy and paste the below commands in the `Tcl Commands` section of GUI.
+
+```tcl
+source helpers.tcl
+read_liberty sky130hd/sky130hd_tt.lib
+read_lef sky130hd/sky130hd.tlef
+read_lef sky130hd/sky130hd_std_cell.lef
+read_def repair_hold10.def
+create_clock -period 2 clk
+set_propagated_clock clk
+set_wire_rc -resistance 0.0001 -capacitance 0.00001
+set_routing_layers -signal met1-met5
+global_route
+estimate_parasitics -global_routing
+report_worst_slack -min
+```
+
+Read the resulting worst slack as:
+
+```
+worst slack -1.95
+```
+
+The above worst slack was fixed with:
+
+```tcl
+repair_timing -hold
+```
+
+The log is as follows:
+
+```
+[INFO RSZ-0046] Found 2 endpoints with hold violations.
+[INFO RSZ-0032] Inserted 5 hold buffers.
+```
+
+Re-check the slack value after repair_timing. Type:
+
+```tcl
+report_worst_slack -min
+```
+
+The result worst slack value is as follows:
+
+```
+worst slack 0.16
+```
+
+Note that the worst slack is now met and the hold violation was fixed by
+the resizer.
+
+### Clock Tree Synthesis
+
+To perform clock tree synthesis `clock_tree_synthesis` flow command used.
+The OpenROAD-flow-scripts automatically generates a well-balanced clock tree post-placement.
+In this section, you will learn details about the building and visualize the
+clock tree.
+
+Refer to the built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/cts/test/simple_test.tcl).
+
+Launch OpenROAD GUI by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/cts/test/
+openroad -gui
+```
+
+To build the clock tree, run the following commands in `Tcl Commands` of
+GUI:
+
+```tcl
+read_lef Nangate45/Nangate45.lef
+read_liberty Nangate45/Nangate45_typ.lib
+read_def "16sinks.def"
+create_clock -period 5 clk
+set_wire_rc -clock -layer metal3
+clock_tree_synthesis -root_buf CLKBUF_X3 \
+                     -buf_list CLKBUF_X3 \
+                     -wire_unit 20
+```
+
+Layout view before CTS as follows:
+
+![Layout before CTS](./images/Layout_before_CTS.webp)
+
+Layout view after CTS can be viewed with `Update` option.
+
+![Layout after CTS](./images/Layout_after_CTS.webp)
+
+Here we explore how clock tree buffers are inserted to balance the clock
+tree structure.
+
+Refer to the built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/cts/test/balance_levels.tcl).
+
+Generate a clock- tree that is unbalanced first, then explore the
+creation of a well-balanced clock tree.
+
+Launch OpenROAD GUI by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/cts/test/
+openroad -gui
+```
+
+Use the following commands in the `TCL commands` section of GUI:
+
+```tcl
+source "helpers.tcl"
+source "cts-helpers.tcl"
+read_liberty Nangate45/Nangate45_typ.lib
+read_lef Nangate45/Nangate45.lef
+set block [make_array 300 200000 200000 150]
+sta::db_network_defined
+create_clock -period 5 clk
+set_wire_rc -clock -layer metal5
+```
+
+The clock tree structure is as follows with unbalanced mode.
+
+![Unbalanced Clock tree](./images/unbalanced_clock_tree.webp)
+
+Use the `clock_tree_synthesis` command to balance this clock tree structure
+with buffers. See the format as follows.
+
+```tcl
+clock_tree_synthesis -root_buf CLKBUF_X3 \
+                     -buf_list CLKBUF_X3 \
+                     -wire_unit 20 \
+                     -post_cts_disable \
+                     -sink_clustering_enable \
+                     -distance_between_buffers 100 \
+                     -sink_clustering_size 10 \
+                     -sink_clustering_max_diameter 60 \
+                     -balance_levels \
+                     -num_static_layers 1
+```
+
+To view the balanced clock tree after CTS, in GUI Toolbar, select
+
+`Clock Tree Viewer` and click `Update` to view the resulting clock
+tree in GUI as follows:
+
+![Balanced Clock Tree](./images/balanced_clock_tree.webp)
+
+#### Reporting Clock Skews
+
+The OpenROAD-flow-scripts flow automatically fixes any skew issues that could potentially
+cause hold violations downstream in the timing path.
+
+```tcl
+report_clock_skew
+```
+
+For the `ibex` design, refer to the following logs to view clock skew reports.
+
+```shell
+less logs/sky130hd/ibex/base/4_1_cts.log
+```
+
+```
+cts pre-repair report_clock_skew
+--------------------------------------------------------------------------
+Clock core_clock
+Latency      CRPR       Skew
+_28453_/CLK ^
+   5.92
+_29312_/CLK ^
+   1.41      0.00       4.51
+```
+
+```
+cts post-repair report_clock_skew
+--------------------------------------------------------------------------
+Clock core_clock
+Latency      CRPR       Skew
+_28453_/CLK ^
+   5.92
+_29312_/CLK ^
+   1.41      0.00       4.51
+```
+
+```
+cts final report_clock_skew
+--------------------------------------------------------------------------
+Clock core_clock
+Latency      CRPR       Skew
+_27810_/CLK ^
+   5.97
+_29266_/CLK ^
+   1.41      0.00       4.56
+```
+
+#### Reporting CTS Metrics
+
+Run `report_cts` command to view useful metrics such as number of clock
+roots, number of buffers inserted, number of clock subnets and number of
+sinks.
+
+Refer to the built-in examples [here](https://github.com/The-OpenROAD-Project/OpenROAD/tree/master/src/cts/test).
+
+Run these Tcl commands in the terminal in OpenROAD tool root directory:
+
+```
+cd ../tools/OpenROAD/src/cts/test/
+openroad
+source post_cts_opt.tcl
+report_cts
+```
+
+CTS metrics are as follows for the current design.
+
+```
+[INFO CTS-0003] Total number of Clock Roots: 1.
+[INFO CTS-0004] Total number of Buffers Inserted: 35.
+[INFO CTS-0005] Total number of Clock Subnets: 35.
+[INFO CTS-0006] Total number of Sinks: 301.
+```
+
+### Adding Filler Cells
+
+Filler cells fills gaps between detail-placed instances to connect the
+power and ground rails in the rows. Filler cells have no logical
+connectivity. These cells are provided continuity in the rows for VDD
+and VSS nets and it also contains substrate nwell connection to improve
+substrate biasing.
+
+`filler_masters` is a list of master/macro names to use for
+filling the gaps.
+
+Refer to the following built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/dpl/test/fillers1.tcl)
+to learn about filler cell insertion.
+
+To view this in OpenROAD GUI run the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/grt/test/
+openroad -gui
+```
+
+In the `Tcl Commands` section of GUI,run following commands:
+
+```tcl
+source "helpers.tcl"
+read_lef "Nangate45/Nangate45.lef"
+read_def "gcd.def"
+```
+
+Loaded DEF view without filler insertion:
+
+![Without_Fill_Cell_Insertion](./images/wo_fillcell_insertion.webp)
+
+Run following commands for filler cell insertion:
+```
+set filler_master [list FILLCELL_X1 FILLCELL_X2 FILLCELL_X4 FILLCELL_X8 FILLCELL_X16]
+filler_placement $filler_master
+```
+
+View the resulting fill cell insertion as follows:
+
+![Fill_Cell_Insertion](./images/fillcell_insertion.webp)
+
+Filler cells removed with `remove_fillers` command.
+
+### Global Routing
+
+The global router analyzes available routing resources and automatically
+allocates them to avoid any  H/V  overflow violations for optimal routing. 
+It generates a congestion report for GCells showing total resources, demand,
+utilization, location and the H/V violation status. If there are no violations
+reported then the design can proceed to detail routing.
+
+Refer to the built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/grt/test/gcd.tcl).
+
+Launch OpenROAD GUI by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/grt/test/
+openroad -gui
+```
+
+To run the global routing, run the following commands in `Tcl Commands` of
+GUI:
+
+```tcl
+source gcd.tcl
+```
+
+Routing resource and congestion analysis done with below log:
+```
+[INFO GRT-0096] Final congestion report:
+Layer         Resource        Demand        Usage (%)    Max H / Max V / Total Overflow
+---------------------------------------------------------------------------------------
+metal1           31235          1651            5.29%             0 /  0 /  0
+metal2           24628          1652            6.71%             0 /  0 /  0
+metal3           33120            40            0.12%             0 /  0 /  0
+metal4           15698             0            0.00%             0 /  0 /  0
+metal5           15404             0            0.00%             0 /  0 /  0
+metal6           15642             0            0.00%             0 /  0 /  0
+metal7            4416             0            0.00%             0 /  0 /  0
+metal8            4512             0            0.00%             0 /  0 /  0
+metal9            2208             0            0.00%             0 /  0 /  0
+metal10           2256             0            0.00%             0 /  0 /  0
+---------------------------------------------------------------------------------------
+Total           149119          3343            2.24%             0 /  0 /  0
+
+[INFO GRT-0018] Total wirelength: 10598 um
+[INFO GRT-0014] Routed nets: 563
+```
+
+View the resulting global routing in GUI as follows:
+
+![Global Route](./images/global_route_gcd.webp)
+
+### Detail Routing
+
+TritonRoute is an open-source detailed router for modern industrial designs.
+The router consists of several main building blocks, including pin access
+analysis, track assignment, initial detailed routing, search and repair, and a DRC engine.
+
+Refer to the built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/drt/test/gcd_nangate45.tcl).
+
+Launch OpenROAD GUI by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/drt/test/
+openroad -gui
+```
+
+To run the detail routing, run the following commands in `Tcl Commands` of
+GUI:
+
+```tcl
+read_lef Nangate45/Nangate45_tech.lef
+read_lef Nangate45/Nangate45_stdcell.lef
+read_def gcd_nangate45_preroute.def
+read_guides gcd_nangate45.route_guide
+set_thread_count [expr [exec getconf _NPROCESSORS_ONLN] / 4]
+detailed_route -output_drc results/gcd_nangate45.output.drc.rpt \
+               -output_maze results/gcd_nangate45.output.maze.log \
+               -verbose 1
+write_db gcd_nangate45.odb
+```
+
+For successful routing, DRT will end with 0 violations.
+
+Log as follows:
+
+```
+[INFO DRT-0199]   Number of violations = 0.
+[INFO DRT-0267] cpu time = 00:00:00, elapsed time = 00:00:00, memory = 674.22 (MB), peak = 686.08 (MB)
+Total wire length = 5680 um.
+Total wire length on LAYER metal1 = 19 um.
+Total wire length on LAYER metal2 = 2798 um.
+Total wire length on LAYER metal3 = 2614 um.
+Total wire length on LAYER metal4 = 116 um.
+Total wire length on LAYER metal5 = 63 um.
+Total wire length on LAYER metal6 = 36 um.
+Total wire length on LAYER metal7 = 32 um.
+Total wire length on LAYER metal8 = 0 um.
+Total wire length on LAYER metal9 = 0 um.
+Total wire length on LAYER metal10 = 0 um.
+Total number of vias = 2223.
+Up-via summary (total 2223):.
+
+---------------
+ active       0
+ metal1    1151
+ metal2    1037
+ metal3      22
+ metal4       7
+ metal5       4
+ metal6       2
+ metal7       0
+ metal8       0
+ metal9       0
+---------------
+           2223
+
+
+[INFO DRT-0198] Complete detail routing.
+```
+
+View the resulting detail routing in GUI as follows:
+
+![Detail Routing](./images/sky130_gcd_route.webp)
+
+### Antenna Checker
+
+Antenna Violation occurs when the antenna ratio exceeds a value specified
+in a Process Design Kit (PDK). The antenna ratio is the ratio of the gate
+area to the gate oxide area. The amount of charge collection is determined
+by the area/size of the conductor (gate area).
+
+This tool checks antenna violations and generates a report to indicate violated nets.
+
+Refer to the built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/ant/test/ant_check.tcl).
+
+Launch OpenROAD by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/ant/test/
+openroad
+```
+
+To extract antenna violations, run the following commands:
+
+```tcl
+read_lef ant_check.lef
+read_def ant_check.def
+
+check_antennas -verbose
+puts "violation count = [ant::antenna_violation_count]"
+
+# check if net50 has a violation
+set net "net50"
+puts "Net $net violations: [ant::check_net_violation $net]"
+```
+
+The log as follows:
+
+```
+[INFO ANT-0002] Found 1 net violations.
+[INFO ANT-0001] Found 2 pin violations.
+violation count = 1
+Net net50 violations: 1
+```
+
+### Metal Fill
+
+Metal fill is a mandatory step at advanced nodes to ensure manufacturability
+and high yield. It involves filling the empty or white spaces near the
+design with metal polygons to ensure regular planarization of the wafer.
+
+This module inserts floating metal fill shapes to meet metal density
+design rules while obeying DRC constraints. It is driven by a json
+configuration file.
+
+Command used as follows:
+```tcl
+density_fill -rules <json_file> [-area <list of lx ly ux uy>]
+```
+If -area is not specified, the core area will be used.
+
+To run metal fill post route, run the following:
+```shell
+cd flow/tutorials/scripts/metal_fill
+openroad -gui
+source "helpers.tcl"
+read_db ./5_route.odb
+```
+Layout before adding metal fill is as follows:
+![Detail Routing](./images/sky130_gcd_route.webp)
+
+To add metal fill, run the command:
+```tcl
+density_fill -rules ../../../platforms/sky130hd/fill.json
+```
+
+Layout after adding metal fill insertion is as follows:
+![Metal Fill](./images/metal_fill_view.webp)
+
+Metal fill view can enabled with `Misc` and enable `Fills` check box.
+
+### Parasitics Extraction
+
+OpenRCX is a Parasitic Extraction (PEX, or RCX) tool that works on OpenDB design APIs.
+It extracts routed designs based on the LEF/DEF layout model.
+
+OpenRCX stores resistance, coupling capacitance and ground (i.e., grounded) capacitance
+on OpenDB objects with direct pointers to the associated wire and via db
+objects. Optionally, OpenRCX can generate a `.spef` file.
+
+Refer to the built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/rcx/test/45_gcd.tcl).
+
+Launch OpenROAD tool by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/rcx/test/
+openroad
+```
+
+To run parasitics for gcd design:
+```tcl
+source 45_gcd.tcl
+```
+
+The log as follows:
+```
+[INFO ODB-0222] Reading LEF file: Nangate45/Nangate45.lef
+[INFO ODB-0223]     Created 22 technology layers
+[INFO ODB-0224]     Created 27 technology vias
+[INFO ODB-0225]     Created 135 library cells
+[INFO ODB-0226] Finished LEF file:  Nangate45/Nangate45.lef
+[INFO ODB-0127] Reading DEF file: 45_gcd.def
+[INFO ODB-0128] Design: gcd
+[INFO ODB-0130]     Created 54 pins.
+[INFO ODB-0131]     Created 1820 components and 4618 component-terminals.
+[INFO ODB-0132]     Created 2 special nets and 3640 connections.
+[INFO ODB-0133]     Created 350 nets and 978 connections.
+[INFO ODB-0134] Finished DEF file: 45_gcd.def
+[INFO RCX-0431] Defined process_corner X with ext_model_index 0
+[INFO RCX-0029] Defined extraction corner X
+[INFO RCX-0008] extracting parasitics of gcd ...
+[INFO RCX-0435] Reading extraction model file 45_patterns.rules ...
+[INFO RCX-0436] RC segment generation gcd (max_merge_res 0.0) ...
+[INFO RCX-0040] Final 2656 rc segments
+[INFO RCX-0439] Coupling Cap extraction gcd ...
+[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded.
+[INFO RCX-0043] 1954 wires to be extracted
+[INFO RCX-0442] 48% completion -- 954 wires have been extracted
+[INFO RCX-0442] 100% completion -- 1954 wires have been extracted
+[INFO RCX-0045] Extract 350 nets, 2972 rsegs, 2972 caps, 2876 ccs
+[INFO RCX-0015] Finished extracting gcd.
+[INFO RCX-0016] Writing SPEF ...
+[INFO RCX-0443] 350 nets finished
+[INFO RCX-0017] Finished writing SPEF ...
+```
+
+`45_gcd.spef` viewed in `results` directory.
+
+## Troubleshooting Problems
+
+This section shows you how to troubleshoot commonly occurring problems
+with the flow or any of the underlying application tools.
+
+### Debugging Problems in Global Routing
+
+The global router has a few useful functionalities to understand
+high congestion issues in the designs.
+
+Congestion heatmap can be used on any design, whether it has
+congestion or not. Viewing congestion explained [here](content:heat:maps).
+If the design has congestion issue, it ends with the error;
+```
+[ERROR GRT-0118] Routing congestion too high.
+```
+
+Refer to the built-in example [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/grt/test/congestion5.tcl).
+
+Launch OpenROAD GUI by running the following command(s) in the terminal in OpenROAD tool root directory:
+
+```shell
+cd ../tools/OpenROAD/src/grt/test/
+openroad -gui
+```
+
+To run the global routing, run the following commands in `Tcl Commands` of
+GUI:
+
+```tcl
+source congestion5.tcl
+```
+
+The design fail with routing congestion error as follows:
+![Routing_Congestion](./images/grt_congestion_error.webp)
+
+In the GUI, you can go under `Heat Maps` and mark the
+`Routing Congestion` checkbox to visualize the congestion map.
+![congestion_heatmap](./images/congestion_heatmap_enable.webp)
+
+#### Dump congestion information to a text file
+
+You can create a text file with the congestion information of the
+GCells for further investigation on the GUI. To do that, add the
+`-congestion_report_file file_name` to the `global_route` command, as shown below:
+```tcl
+global_route -guide_file out.guide -congestion_report_file congest.rpt
+```
+
+#### Visualization of overflowing GCells as markers
+
+With the file created with the command described above, you can see more
+details about the congested GCell, like the total resources, utilization,
+location, etc. You can load the file following these steps:
+
+-   step 1: In the `DRC Viewer` window, click on `Load` and select the
+    file with the congestion report.
+-   step 2: A summary of the GCells with congestion is shown in the
+    `DRC Viewer` window. Also, the markers are added to the GUI.
+![GCell_marker](./images/gcell_marker.webp)
+-   step 3: For details on the routing resources information, use the `Inspector` window.
+![zoom_options](./images/zoom_options.webp)
+
+By Clicking `zoom_to` options, you can enlarge the view as follows:
+![zoomto_gcell](./images/zoomto_gcell.webp)

markdown/ORFS_docs/general/FlowVariables.md

@@ -0,0 +1,308 @@
+# Environment Variables for the OpenROAD Flow Scripts
+
+
+Environment variables are used in the OpenROAD flow to define various
+platform, design and tool specific variables to allow finer control and
+user overrides at various flow stages. These are defined in the
+`config.mk` file located in the platform and design specific directories.
+
+### General variables for all stages
+
+| Variable         | Description                                                                        |
+|------------------|------------------------------------------------------------------------------------|
+| `SKIP_REPORT_METRICS`   | If set to 1, then metrics, report_metrics does nothing. Useful to speed up builds. |
+
+## Platform
+
+
+These variables must be defined in the platform specific config file
+located in the OpenROAD-flow-scripts directory of
+`./flow/platforms/<PLATFORM>/config.mk`
+
+
+Note: The variable `PLATFORM_DIR` is set by default based on the `PLATFORM`
+variable. For OpenROAD Flow Scripts we have the following public platforms:
+
+
+-   `sky130hd`
+-   `sky130hs`
+-   `nangate45`
+-   `asap7`
+
+
+## Platform Specific Environment Variables
+
+
+The table below lists the complete set of variables used in each of the
+public platforms supported by the OpenROAD flow.
+
+
+Note:
+-   = indicates default definition assigned by the tool
+-   ?= indicates that the variable value may be reassigned with design `config.mk`
+
+
+| **Configuration Variable**           | **sky130hd** | **sky130hs** | **nangate45** | **asap7** | **gf180** |
+|--------------------------------------|--------------|--------------|---------------|-----------|-----------|
+| Library Setup                        |              |              |               |           |           |
+| `PROCESS`                            | =            | =            | =             | =         | =         |
+| `TECH_LEF`                           | =            | =            | =             | =         | =         |
+| `SC_LEF`                             | =            | =            | =             | =         | =         |
+| `LIB_FILES`                          | =            | =            | =             | =         | =         |
+| `GDS_FILES`                          | =            | =            | =             | =         | =         |
+| `DONT_USE_CELLS`                     | =            | =            | =             | =         | =         |
+| Synthesis                            |              |              |               |           |           |
+| `LATCH_MAP_FILE`                     | =            | =            | =             | =         | =         |
+| `CLKGATE_MAP_FILE`                   | =            | =            | =             | =         | =         |
+| `ADDER_MAP_FILE`                     | ?=           | ?=           | ?=            | ?=        | ?=        |
+| `TIEHI_CELL_AND_PORT`                | =            | =            | =             | =         | =         |
+| `TIELO_CELL_AND_PORT`                | =            | =            | =             | =         | =         |
+| `MIN_BUF_CELL_AND_PORTS`             | =            | =            | =             | =         | =         |
+| `ABC_CLOCK_PERIOD_IN_PS`             | ?=           | ?=           | ?=            | ?=        | ?=        |
+| `ABC_DRIVER_CELL`                    | =            | =            | =             | =         | =         |
+| `ABC_LOAD_IN_FF`                     | =            | =            | =             | =         | =         |
+| Floorplan                            |              |              |               |           |           |
+| `PLACE_SITE`                         | =            | =            | =             | =         | =         |
+| `MAKE_TRACKS`                        | =            | =            | =             | =         | =         |
+| `TAPCELL_TCL`                        | =            | =            | =             | =         | =         |
+| `MACRO_PLACE_HALO`                   | ?=           | ?=           | ?=            | ?=        | ?=        |
+| `MACRO_PLACE_CHANNEL`                | ?=           | ?=           | ?=            | ?=        | ?=        |
+| `PDN_TCL`                            | ?=           | ?=           | ?=            | ?=        | ?=        |
+| `IO_PLACER_H`                        | =            | =            | =             | =         | ?=        |
+| `IO_PLACER_V`                        | =            | =            | =             | =         | ?=        |
+| Placement                            |              |              |               |           |           |
+| `CELL_PAD_IN_SITES_GLOBAL_PLACEMENT` | ?=           | ?=           | ?=            | ?=        | ?=        |
+| `CELL_PAD_IN_SITES_DETAIL_PLACEMENT` | ?=           | ?=           | ?=            | ?=        | ?=        |
+| `PLACE_DENSITY`                      | ?=           | ?=           | ?=            | ?=        | ?=        |
+| `WIRE_RC_LAYER`                      | =            | =            | =             | =         | =         |
+| Clock Tree Synthesis                 |              |              |               |           |           |
+| `CTS_BUF_CELL`                       | =            | =            | =             | =         | =         |
+| `CTS_BUF_DISTANCE`                   | N/A          | N/A          | N/A           | =         | =         |
+| `FILL_CELLS`                         | =            | =            | =             | =         | =         |
+| `SKIP_GATE_CLONING`                  | ?=           | ?=           | ?=            | ?=        | ?=        |
+| `SKIP_PIN_SWAP`                      | ?=           | ?=           | ?=            | ?=        | ?=        |
+| `TNS_END_PERCENT`                    | ?=           | ?=           |               | ?=        | ?=        |
+| `EQUIVALENCE_CHECK`                  | ?=           | ?=           | ?=            | ?=        | ?=        |
+| `REMOVE_CELLS_FOR_EQY`               | ?=           | ?=           | ?=            | ?=        | ?=        |
+| Routing                              |              |              |               |           |           |
+| `KLAYOUT_TECH_FILE`                  | =            | =            | =             | =         | =         |
+| `MAX_ROUTING_LAYER`                  | =            | =            | =             | =         | ?=        |
+| `MIN_ROUTING_LAYER`                  | =            | =            | =             | =         | ?=        |
+| `RCX_RULES`                          | =            | =            | =             | =         | =         |
+| `RECOVER_POWER`                      | ?=           | ?=           | ?=            | ?=        | ?=        |
+
+
+### Library Setup
+
+
+| Variable         | Description                                                                                                                                          |
+|------------------|------------------------------------------------------------------------------------------------------------------------------------------------------|
+| `PROCESS`        | Technology node or process in use.                                                                                                                   |
+| `CORNER`         | Library to select based on corner BC/TC/WC.                                                                                                          |
+| `TECH_LEF`       | A technology LEF file of the PDK that includes all relevant information regarding metal layers, vias, and spacing requirements.                      |
+| `SC_LEF`         | Path to technology standard cell LEF file.                                                                                                           |
+| `GDS_FILES`      | Path to platform GDS files.                                                                                                                          |
+| `LIB_FILES`      | A Liberty file of the standard cell library with PVT characterization, input and output characteristics, timing and power definitions for each cell. |
+| `DONT_USE_CELLS` | Dont use cells eases pin access in detailed routing.                                                                                                 |
+
+
+### Synthesis
+
+
+| Variable                 | Description                                                                                |
+|--------------------------|--------------------------------------------------------------------------------------------|
+| `SYNTH_HIERARCHICAL`     | Enable to Synthesis hierarchically, otherwise considered flat synthesis.                   |
+| `LATCH_MAP_FILE`         | List of latches treated as a black box by Yosys.                                           |
+| `CLKGATE_MAP_FILE`       | List of cells for gating clock treated as a black box by Yosys.                            |
+| `ADDER_MAP_FILE`         | List of adders treated as a black box by Yosys.                                            |
+| `TIEHI_CELL_AND_PORT`    | Tie high cells used in Yosys synthesis to replace a logical 1 in the Netlist.              |
+| `TIELO_CELL_AND_PORT`    | Tie low cells used in Yosys synthesis to replace a logical 0 in the Netlist.               |
+| `MIN_BUF_CELL_AND_PORTS` | Used to insert a buffer cell to pass through wires. Used in synthesis.                     |
+| `ABC_CLOCK_PERIOD_IN_PS` | Clock period to be used by STA during synthesis. Default value read from `constraint.sdc`. |
+| `ABC_DRIVER_CELL`        | Default driver cell used during ABC synthesis.                                             |
+| `ABC_LOAD_IN_FF`         | During synthesis set_load value used.                                                      |
+| `MAX_UNGROUP_SIZE`       | For hierarchical synthesis, we ungroup modules of size given by this variable.             |
+
+
+### Floorplan
+
+
+| Variable              | Description                                                                                                                                                                      |
+|-----------------------|----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
+| `FLOORPLAN_DEF`       | Use the DEF file to initialize floorplan.                                                                                                                                        |
+| `PLACE_SITE`          | Placement site for core cells defined in the technology LEF file.                                                                                                                |
+| `TAPCELL_TCL`         | Path to Endcap and Welltie cells file.                                                                                                                                           |
+| `RTLMP_FLOW`          | Enable the Hierarchical RTLMP flow. By default it is disabled.                                                                                                                   |
+| `MACRO_HALO`          | Specifies keep out distance from macro, in X and Y, to standard cell row.                                                                                                        |
+| `MACRO_PLACEMENT`     | Specifies the path of a file on how to place certain macros manually using read_macro_placement.                                                                                 |
+| `MACRO_PLACEMENT_TCL` | Specifies the path of a TCL file on how to place certain macros manually.                                                                                                        |
+| `MACRO_PLACE_HALO`    | horizontal/vertical halo around macros (microns). Used by automatic macro placement.                                                                               |
+| `MACRO_PLACE_CHANNEL` | horizontal/vertical channel width between macros (microns). Used by automatic macro placement when `RTLMP_FLOW` is disabled. Imagine channel=10 and halo=5. Then macros must be 10 apart but standard cells must be 5 away from a macro.|
+| `MACRO_BLOCKAGE_HALO` | Blockage width overridden from default calculation.                                                                                                                              |
+| `PDN_TCL`             | File path which has a set of power grid policies used by `pdn` to be applied to the design, such as layers to use, stripe width and spacing to generate the actual metal straps. |
+| `MAKE_TRACKS`         | Tcl file that defines add routing tracks to a floorplan.                                                                                                                         |
+| `IO_PLACER_H`         | The metal layer on which to place the I/O pins horizontally (top and bottom of the die).                                                                                         |
+| `IO_PLACER_V`         | The metal layer on which to place the I/O pins vertically (sides of the die).                                                                                                    |
+| `GUI_NO_TIMING`       | Skip loading timing for a faster GUI load.                                                                                                                                       |
+
+
+### Placement
+
+
+| Variable                             | Description                                                                                                                                   |
+|--------------------------------------|-----------------------------------------------------------------------------------------------------------------------------------------------|
+| `HAS_IO_CONSTRAINTS`                 | Skip the initial non-IO based global placement if IO constraints are present.                 		                                       |
+| `CELL_PAD_IN_SITES_GLOBAL_PLACEMENT` | Cell padding on both sides in site widths to ease routability during global placement.                 		                       |
+| `CELL_PAD_IN_SITES_DETAIL_PLACEMENT` | Cell padding on both sides in site widths to ease routability in detail placement.			                                       |
+| `PLACE_DENSITY`                      | The desired placement density of cells. It reflects how spread the cells would be on the core area. 1.0 = closely dense. 0.0 = widely spread. |
+| `PLACE_DENSITY_LB_ADDON`             | Check the lower boundary of the PLACE_DENSITY and add PLACE_DENSITY_LB_ADDON if it exists.                                                    |
+| `REPAIR_PDN_VIA_LAYER`               | Remove power grid vias which generate DRC violations after detailed routing.                                                                  |
+| `GLOBAL_PLACEMENT_ARGS`              | Use additional tuning parameters during global placement other than default args defined in gloabl_place.tcl.                                 |
+| `ENABLE_DPO`                         | Enable detail placement with improve_placement feature.                                                                                       |
+| `DPO_MAX_DISPLACEMENT`               | Specifies how far an instance can be moved when optimizing.                                                                                   |
+| `GPL_TIMING_DRIVEN`                  | Specifies whether the placer should use timing driven placement.                                                                              |
+| `GPL_ROUTABILITY_DRIVEN`             | Specifies whether the placer should use routability driven placement.                                                                         |
+| `CAP_MARGIN`                         | Specifies a capacitance margin when fixing max capacitance violations. This option allow you to overfix.                                      |
+| `SLEW_MARGIN`                        | Specifies a slew margin when fixing max slew violations. This option allow you to overfix.                                                    |
+
+
+### Clock Tree Synthesis (CTS)
+
+
+| Variable              | Description                                                                                                  |
+|-----------------------|--------------------------------------------------------------------------------------------------------------|
+| `CTS_ARGS`            | Override `clock_tree_synthesis` arguments                           |
+| `CTS_BUF_CELL`        | The buffer cell used in the clock tree.                                                                      |
+| `FILL_CELLS`          | Fill cells are used to fill empty sites.    								                                   |
+| `HOLD_SLACK_MARGIN`   | Specifies a time margin for the slack when fixing hold violations. This option allow you to overfix.         |
+| `SETUP_SLACK_MARGIN`  | Specifies a time margin for the slack when fixing setup violations.                                          |
+| `SKIP_GATE_CLONING`   | Do not use gate cloning transform to fix timing violations (default: use gate cloning)                       |
+| `SKIP_PIN_SWAP`       | Do not use pin swapping as a transform to fix timing violations (default: use pin swapping)                  |
+| `TNS_END_PERCENT`     | Specifies how many percent of violating paths to fix [0-100]. Worst path will always be fixed                |
+| `EQUIVALENCE_CHECK`   | Enable running equivalence checks with to verify logical correctness of repair_timing                        |
+| `REMOVE_CELLS_FOR_EQY`| String patterns directly passed to write_verilog -remove_cells <> for equivalence checks                     |
+| `SKIP_CTS_REPAIR_TIMING`| Skipping CTS repair, which can take a long time, can be useful in architectural exploration or when getting CI up and running |
+
+### Routing
+
+
+| Variable              | Description                                                             |
+|-----------------------|---------------------------------------------------------------------------------------------------|
+| `MIN_ROUTING_LAYER`   | The lowest metal layer name to be used in routing.                                                |
+| `MAX_ROUTING_LAYER`   | The highest metal layer name to be used in routing.                                               |
+| `DETAILED_ROUTE_ARGS` | Add additional arguments for debugging purpose during detail route.                               |
+| `MACRO_EXTENSION`     | Sets the number of GCells added to the blockages boundaries from macros.                          |
+| `RECOVER_POWER`       | Specifies how many percent of paths with positive slacks can be slowed for power savings [0-100]. |
+
+
+### Extraction
+
+
+| Variable            | Description                                           |
+|---------------------|-------------------------------------------------------|
+| `RCX_RULES`         | RC Extraction rules file path.                        |
+| `SET_RC_TCL`        | Metal & Via RC definition file path.                  |
+| `FILL_CONFIG`       | JSON rule file for metal fill during chip finishing.  |
+| `KLAYOUT_TECH_FILE` | A mapping from LEF/DEF to GDS using the KLayout tool. |
+| `IR_DROP_LAYER`     | Default metal layer to report IR drop.                |
+
+
+## Design Specific Configuration Variables
+
+
+### Required Variables
+
+
+Following minimum design variables must be defined in the design configuration
+file for each design located in the OpenROAD-flow-scripts directory of
+`./flow/designs/<PLATFORM>/<DESIGN_NAME>/config.mk`
+
+
+| Variable        | Description                                                                                                                                                          |
+|-----------------|----------------------------------------------------------------------------------------------------------------------------------------------------------------------|
+| `PLATFORM`      | Specifies process design kit or technology node to be used.                                                                                                          |
+| `DESIGN_NAME`   | The name of the top-level module of the design.                                                                                                                      |
+| `VERILOG_FILES` | The path to the design Verilog files or JSON files providing a description of modules (check `yosys -h write_json` for more details).                                |
+| `SDC_FILE`      | The path to design constraint (SDC) file.                                                                                                                            |
+
+
+### Optional Variables
+
+
+These are optional variables that may be over-ridden/appended with
+default value from the platform `config.mk` by defining in the design
+configuration file.
+
+
+#### Synthesis
+
+
+| Variable                 | Description                                                                                        |
+|--------------------------|----------------------------------------------------------------------------------------------------|
+| `ADDITIONAL_FILES`       | Additional files to be added to `make issue` archive |
+| `ADDITIONAL_LEFS`        | Hardened macro LEF view files listed here. The LEF information of the macros is immutable and used throughout all stages. Stored in the .odb file. |
+| `ADDITIONAL_LIBS`        | Hardened macro library files listed here. The library information is immutable and used throughout all stages. Not stored in the .odb file. |
+| `ADDITIONAL_GDS`         | Hardened macro GDS files listed here.                                                              |
+| `VERILOG_INCLUDE_DIRS`   | Specifies the include directories for the Verilog input files.                                     |
+| `CORNER`                 | PVT corner library selection. Only available for ASAP7 and GF180 PDK.                                                                 |
+| `DESIGN_NICKNAME`        | DESIGN_NICKNAME just changes the directory name that ORFS outputs to be DESIGN_NICKNAME instead of DESIGN_NAME in case DESIGN_NAME is unwieldy or conflicts with a difference design.                                                                                    |
+| `ABC_AREA`               | Strategies for Yosys ABC synthesis: Area/Speed. Default ABC_SPEED.                                 |
+| `PWR_NETS_VOLTAGES`      | Used for IR Drop calculation.                                                                      |
+| `GND_NETS_VOLTAGES`      | Used for IR Drop calculation.                                                                      |
+| `BLOCKS`                 | Blocks used as hard macros in a hierarchical flow. Do note that you have to specify block-specific inputs file in the directory mentioned by [Makefile](../main/flow/Makefile) |
+| `CDL_FILES`              | Insert additional Circuit Description Language (`.cdl`) netlist files.                             | 
+| `DFF_LIB_FILES`          | Technology mapping liberty files for flip-flops.                                                   |
+| `DONT_USE_LIBS`          | Set liberty files as `dont_use`.                                                                   |
+| `PRESERVE_CELLS`         | Mark modules to keep from getting removed in flattening.                                           |
+| `SYNTH_ARGS`             | Optional synthesis variables for yosys.                                                            |
+| `VERILOG_TOP_PARAMS`     | Apply toplevel params (if exist).                                                                  |
+
+#### Floorplan
+
+
+| Variable              | Description                                                                                                                                                                                                                                |
+|-----------------------|--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
+| `CORE_UTILIZATION`    | The core utilization percentage (0-100). Overrides `DIE_AREA` and `CORE_AREA`.                                                                                                                                                                   |
+| `CORE_ASPECT_RATIO`   | The core aspect ratio (height / width). This values is ignored if `CORE_UTILIZATION` undefined.                                                                                                                                            |
+| `CORE_MARGIN`         | The margin between the core area and die area, in multiples of SITE heights. The margin is applied to each side. This variable is ignored if `CORE_UTILIZATION` is undefined.                                                              |
+| `DIE_AREA`            | The die area specified as a list of lower-left and upper-right corners in microns (X1 Y1 X2 Y2). This variable is ignored if `CORE_UTILIZATION` and `CORE_ASPECT_RATIO` are defined.                                                       |
+| `CORE_AREA`           | The core area specified as a list of lower-left and upper-right corners in microns (X1 Y1 X2 Y2). This variable is ignored if `CORE_UTILIZATION` and `CORE_ASPECT_RATIO` are defined.                                                      |
+| `RESYNTH_AREA_RECOVER` | Enable re-synthesis for area reclaim. |
+| `RESYNTH_TIMING_RECOVER` | Enable re-synthesis for timing optimization. | 
+| `MACRO_HALO_X`         | Set macro halo for x-direction. Only available for ASAP7 PDK. |
+| `MACRO_HALO_Y`         | Set macro halo for y-direction. Only available for ASAP7 PDK. |
+
+## Placement
+
+
+| Variable                 | Description                                                                                        |
+|--------------------------|----------------------------------------------------------------------------------------------------|
+| `MACRO_WRAPPERS`         | The wrapper file that replace existing macros with their wrapped version.                          |
+
+
+## Clock Tree Synthesis
+
+
+| Variable                 | Description                                                                                        |
+|--------------------------|----------------------------------------------------------------------------------------------------|
+| `CTS_BUF_DISTANCE`       | Distance (in microns) between buffers.                                                              |
+| `CTS_CLUSTER_DIAMETER`   | Maximum diameter (in microns) of sink cluster. Default 20.                                         |
+| `CTS_CLUSTER_SIZE`       | Maximum number of sinks per cluster. Default 50.
+
+
+## Routing
+
+
+| Variable                 | Description                                                                                        |
+|--------------------------|----------------------------------------------------------------------------------------------------|
+| `FASTROUTE_TCL`          | Specifies a Tcl scripts with commands to run before FastRoute.                                      |
+
+
+## GDS Streamout
+
+
+| Variable                 | Description                                                                                        |
+|--------------------------|----------------------------------------------------------------------------------------------------|
+| `USE_FILL`               | Whether to perform metal density filling. Default 0 (=off).                                        |
+| `SEAL_GDS`               | Seal macro to place around the design.                                                             |
+

markdown/ORFS_docs/general/Flow_QoR_CI.md

@@ -0,0 +1,12 @@
+# OpenROAD QoR and CI Metrics
+
+## OpenROAD Dashboard 
+
+The [OpenROAD Dashboard](QoRDashboard.md) provides an easy way to explore 
+Quality-of-Results (QoR) over time and describes flow-QoR metrics, such as timing, area, power, etc. 
+
+## Jenkins CI
+
+We use Jenkins as our continuous integration (CI) tool.
+You may use it to find out metrics regarding regression tests.
+See more about accessing and taking advantage of our CI [here](Jenkins.md).

markdown/ORFS_docs/general/GettingInvolved.md

@@ -0,0 +1,101 @@
+# Getting Involved
+
+Thank you for taking the time to read this document and to contribute.
+The OpenROAD project will not reach all of its objectives without help!
+
+Possible ways to contribute in the scope of OpenROAD Flow:
+
+- Open-source PDK information
+- Open-source Designs
+- Useful scripts
+- Star our project and repos so we can see the number of people
+    who are interested
+
+## Licensing Contributions
+
+As much as possible, all contributions should be licensed using the BSD3
+license. You can propose another license if you must, but contributions
+made with BSD3 fit best with the spirit of OpenROAD's permissive open-source
+philosophy. We do have exceptions in the project, but over time we hope
+that all contributions will be BSD3, or some other permissive license such as MIT
+or Apache2.0.
+
+## Contributing Open Source PDK information and Designs
+
+If you have new design or PDK information to contribute, please add this
+to the repo
+[OpenROAD-flow-scripts](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/).
+In the
+[flow directory](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/tree/master/flow)
+you will see a directory for
+[designs](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/tree/master/flow/designs)
+with Makefiles to run them, and one for PDK
+[platforms](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/tree/master/flow/platforms)
+used by the designs. If you add a new PDK platform, be sure to add at
+least one design that uses it.
+
+## Contributing Scripts and Code
+
+We follow the [Google C++ style guide](https://google.github.io/styleguide/cppguide.html).
+If you find code in our project that does *not* follow this guide, then within each file that
+you edit, follow the style in that file.
+
+Please pay careful attention to the
+[tool checklist](https://openroad.readthedocs.io/en/latest/contrib/DeveloperGuide.html#tool-checklist) for all code. If you want
+to add or improve functionality in OpenROAD, please start with the
+top-level [app](https://github.com/The-OpenROAD-Project/OpenROAD/) repo. You
+can see in the `src` directory that submodules exist pointing to tested
+versions of the other relevant repos in the project. Please look at the
+tool workflow in the developer guide [document](DeveloperGuide.md)
+to work with the app and its submodule repos in an efficient way.
+
+Please run clang-format on all the C++ source files that you change, before
+committing. In the root directory of the OpenROAD repository there is the
+file `.clang-format` that defines all coding formatting rules.
+
+Please pay attention to the
+[test directory](https://github.com/The-OpenROAD-Project/OpenROAD/tree/master/test)
+and be sure to add tests for any code changes that you make, using open-source
+PDK and design information. We provide the `nangate45` PDK in
+the OpenROAD-flow-scripts repo to help with this. Pull requests with
+code changes are unlikely to be accepted without accompanying test
+cases. There are many
+[examples](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/test/gcd_nangate45.tcl)
+tests. Each repo has a test directory as well with tests you should run
+and add to if you modify something in one of the submodules.
+
+For changes that claim to improve QoR or PPA, please run many tests and
+ensure that the improvement is not design-specific. There are designs in
+the
+[OpenROAD-flow-scripts](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/)
+repo which can be used unless the improvement is technology-specific.
+
+Do not add runtime or build dependencies without serious thought. For a
+project like OpenROAD with many application subcomponents, the software
+architecture can quickly get out of control. Changes with lots of new
+dependencies which are not necessary are less likely to be integrated.
+
+If you want to add Tcl code to define a new tool command, look at [pdngen](https://github.com/The-OpenROAD-Project/OpenROAD/tree/master/src/pdn)
+as an example of how to do so. Take a look at the
+[CMakeLists file](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/CMakeLists.txt)
+which automatically sources the Tcl code and the
+[Tcl file](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/pdn/src/pdn.tcl)
+itself.
+
+To accept contributions, we require each commit to be made with a DCO (Developer
+Certificate of Origin) attached.
+When you commit you add the `-s` flag to your commit. For example:
+
+``` shell
+git commit -s -m "test dco with -s"
+```
+
+This will append a statement to your commit comment that attests to the DCO. GitHub
+has built in the `-s` option to its command line since use of this is so
+pervasive. The promise is very basic, certifying that you know that you
+have the right to commit the code. Please read the  [full statement
+here](https://developercertificate.org/).
+
+## Questions
+
+Please refer to our [FAQs](../user/FAQS.md).

markdown/ORFS_docs/general/GitGuide.md

@@ -0,0 +1,207 @@
+# Git Quickstart
+
+This tutorial serves as a quickstart to Git and contributing to our repository. If you have not already set up OpenROAD-flow-scripts, please follow the instructions [here](../../index.md#build-or-installing-orfs-dependencies). 
+
+```{tip} This basic tutorial gives instruction for basic password Git authentication.
+If you would like to setup SSH authentication, please follow this [guide](https://help.github.com/set-up-git-redirect).
+```
+
+## Forking
+
+You will need your own fork to work on the code. Go to the `OpenROAD-flow-scripts` project
+[page](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts) and hit the `Fork` button. You will
+want to clone your fork to your machine:
+
+```shell
+git clone https://github.com/your-user-name/OpenROAD-flow-scripts.git
+cd OpenROAD-flow-scripts
+git remote add upstream https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts.git
+git fetch upstream
+```
+
+This creates the directory `OpenROAD-flow-scripts` and connects your repository to
+the upstream (master project) *OpenROAD-flow-scripts* repository.
+
+## Creating a branch
+
+You want your master branch to reflect only production-ready code, so create a
+feature branch for making your changes. For example:
+
+```shell
+git checkout master && git branch shiny-new-feature
+git checkout shiny-new-feature
+# Or equivalently, 
+git checkout master && checkout -b shiny-new-feature 
+```
+
+This changes your working directory to the shiny-new-feature branch.  Keep any
+changes in this branch specific to one bug or feature so it is clear
+what the branch brings to OpenROAD-flow-scripts. You can have many shiny-new-features
+and switch in between them using the git checkout command.
+
+When creating this branch, make sure your master branch is up to date with
+the latest upstream master version. To update your local master branch, you
+can do:
+
+```shell
+git checkout master
+git pull upstream master
+```
+
+When you want to update the feature branch with changes in master after
+you created the branch, check the section on 
+[updating a PR](#updating-your-pull-request).
+
+## Committing your code
+Keep style fixes to a separate commit to make your pull request more readable. Once you've made changes, you can see them by typing:
+
+```shell
+git status
+```
+
+If you have created a new file, it is not being tracked by git. Add it by typing:
+```shell
+git add path/to/file-to-be-added.py
+```
+
+Doing `git status` again should give something like:
+```shell
+# On branch shiny-new-feature
+#
+#       modified:   /relative/path/to/file-you-added.py
+#
+```
+
+Finally, commit your changes to your local repository with an explanatory commit
+message. Do note the `-s` option is needed for developer signoff. 
+```shell
+git commit -s -m "your commit message goes here"
+```
+
+## Pushing your changes
+
+When you want your changes to appear publicly on your GitHub page, push your
+forked feature branch's commits:
+
+```shell
+git push origin shiny-new-feature
+```
+
+Here `origin` is the default name given to your remote repository on GitHub.
+You can see the remote repositories:
+
+```shell
+git remote -v
+```
+
+If you added the upstream repository as described above you will see something
+like:
+
+```shell
+origin  https://github.com/your-user-name/OpenROAD-flow-scripts.git (fetch)
+origin  https://github.com/your-user-name/OpenROAD-flow-scripts.git (push)
+upstream        https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts.git (fetch)
+upstream        https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts.git (push)
+```
+
+Now your code is on GitHub, but it is not yet a part of the OpenROAD-flow-scripts project. For that to
+happen, a pull request needs to be submitted on GitHub.
+
+## Review your code
+
+When you're ready to ask for a code review, file a pull request. Before you do, once
+again make sure that you have followed all the guidelines outlined in the [Developer's Guide](./DeveloperGuide.md)
+regarding code style, tests, performance tests, and documentation. You should also
+double check your branch changes against the branch it was based on:
+
+1. Navigate to your repository on GitHub -- https://github.com/your-user-name/OpenROAD-flow-scripts
+1. Click on `Branches`
+1. Click on the `Compare` button for your feature branch
+1. Select the `base` and `compare` branches, if necessary. This will be `master` and
+   `shiny-new-feature`, respectively.
+
+## Submitting the pull request
+
+If everything looks good, you are ready to make a pull request. A pull request is how
+code from a local repository becomes available to the GitHub community and can be looked
+at and eventually merged into the master version. This pull request and its associated
+changes will eventually be committed to the master branch and available in the next
+release. To submit a pull request:
+
+1. Navigate to your repository on GitHub
+1. Click on the ``Compare & pull request`` button
+1. You can then click on ``Commits`` and ``Files Changed`` to make sure everything looks
+   okay one last time
+1. Write a description of your changes in the ``Preview Discussion`` tab
+1. Click ``Send Pull Request``.
+
+This request then goes to the repository maintainers, and they will review
+the code.
+
+## Updating your pull request
+
+Based on the review you get on your pull request, you will probably need to make
+some changes to the code. In that case, you can make them in your branch,
+add a new commit to that branch, push it to GitHub, and the pull request will be
+automatically updated.  Pushing them to GitHub again is done by:
+
+```shell
+git push origin shiny-new-feature
+```
+
+This will automatically update your pull request with the latest code and restart the
+[Continuous Integration](./CI.md) tests.
+
+Another reason you might need to update your pull request is to solve conflicts
+with changes that have been merged into the master branch since you opened your
+pull request.
+
+To do this, you need to `merge upstream master` in your branch:
+
+```shell
+git checkout shiny-new-feature
+git fetch upstream
+git merge upstream/master
+```
+
+If there are no conflicts (or they could be fixed automatically), a file with a
+default commit message will open, and you can simply save and quit this file.
+
+If there are merge conflicts, you need to solve those conflicts. See 
+this [article](https://help.github.com/articles/resolving-a-merge-conflict-using-the-command-line/)
+for an explanation on how to do this.
+Once the conflicts are merged and the files where the conflicts were solved are
+added, you can run ``git commit`` to save those fixes.
+
+If you have uncommitted changes at the moment you want to update the branch with
+master, you will need to ``stash`` them prior to updating. 
+
+```{seealso}
+See the stash [docs](https://git-scm.com/book/en/v2/Git-Tools-Stashing-and-Cleaning).
+```
+This will effectively store your changes and they can be reapplied after updating.
+
+After the feature branch has been updated locally, you can now update your pull
+request by pushing to the branch on GitHub:
+
+```shell
+git push origin shiny-new-feature
+```
+
+## Tips for a successful pull request
+
+If you have made it to the `Review your code` phase, one of the core contributors may
+take a look. Please note however that a handful of people are responsible for reviewing
+all of the contributions, which can often lead to bottlenecks.
+
+To improve the chances of your pull request being reviewed, you should:
+
+- **Reference an open issue** for non-trivial changes to clarify the PR's purpose
+- **Ensure you have appropriate tests**. These should be the first part of any PR
+- **Keep your pull requests as simple as possible**. Larger PRs take longer to review
+- **Ensure that CI is in a green state**. Reviewers may not even look otherwise
+- **Keep updating your pull request**, either by request or every few days
+
+## Acknowledgements
+
+This page has been adapted from [pandas Developer Guide](https://pandas.pydata.org/docs/development/contributing.html). 

markdown/ORFS_docs/general/InstructionsForAutoTuner.md

@@ -0,0 +1,211 @@
+# Instructions for AutoTuner with Ray
+
+_AutoTuner_ is a "no-human-in-loop" parameter tuning framework for commercial and academic RTL-to-GDS flows.
+AutoTuner provides a generic interface where users can define parameter configuration as JSON objects.
+This enables AutoTuner to easily support various tools and flows. AutoTuner also utilizes [METRICS2.1](https://github.com/ieee-ceda-datc/datc-rdf-Metrics4ML) to capture PPA
+of individual search trials. With the abundant features of METRICS2.1, users can explore various reward functions that steer the flow autotuning to different PPA goals.
+
+AutoTuner provides two main functionalities as follows.
+* Automatic hyperparameter tuning framework for OpenROAD-flow-script (ORFS)
+* Parametric sweeping experiments for ORFS
+
+
+AutoTuner contains top-level Python script for ORFS, each of which implements a different search algorithm. Current supported search algorithms are as follows.
+* Random/Grid Search
+* Population Based Training ([PBT](https://www.deepmind.com/blog/population-based-training-of-neural-networks))
+* Tree Parzen Estimator ([HyperOpt](https://hyperopt.github.io/hyperopt))
+* Bayesian + Multi-Armed Bandit ([AxSearch](https://ax.dev/))
+* Tree Parzen Estimator + Covariance Matrix Adaptation Evolution Strategy ([Optuna](https://optuna.org/))
+* Evolutionary Algorithm ([Nevergrad](https://github.com/facebookresearch/nevergrad))
+
+User-defined coefficient values (`coeff_perform`, `coeff_power`, `coeff_area`) of three objectives to set the direction of tuning are written in the script. Each coefficient is expressed as a global variable at the `get_ppa` function in `PPAImprov` class in the script (`coeff_perform`, `coeff_power`, `coeff_area`). Efforts to optimize each of the objectives are proportional to the specified coefficients.
+
+
+## Setting up AutoTuner
+
+To setup AutoTuner, make sure you have a virtual environment set up with
+Python 3.9.X. There are plenty of ways to do this, we recommend using 
+[Miniconda](https://docs.conda.io/en/latest/miniconda.html),
+which is a free minimal installer for the package manager `conda`. 
+
+```shell
+# set up conda environment
+conda create -n autotuner_env python=3.9
+conda activate autotuner_env
+
+# install requirements
+pip install -r ./tools/AutoTuner/requirements.txt
+```
+
+## Input JSON structure
+
+Sample JSON [file](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/designs/sky130hd/aes/autotuner.json) for Sky130HD `aes` design:  
+
+Alternatively, here is a minimal example to get started:
+
+```json
+{
+    "_SDC_FILE_PATH": "constraint.sdc",
+    "_SDC_CLK_PERIOD": {
+        "type": "float",
+        "minmax": [
+            1.0,
+            3.7439
+        ],
+        "step": 0
+    },
+    "CORE_MARGIN": {
+        "type": "int",
+        "minmax": [
+            2,
+            2
+        ],
+        "step": 0
+    },
+}
+```
+
+* `"_SDC_FILE_PATH"`, `"_SDC_CLK_PERIOD"`, `"CORE_MARGIN"`: Parameter names for sweeping/tuning.
+* `"type"`: Parameter type ("float" or "int") for sweeping/tuning
+* `"minmax"`: Min-to-max range for sweeping/tuning. The unit follows the default value of each technology std cell library.
+* `"step"`: Parameter step within the minmax range. Step 0 for type "float" means continuous step for sweeping/tuning. Step 0 for type "int" means the constant parameter.
+
+## Tunable / sweepable parameters
+
+Tables of parameters that can be swept/tuned in technology platforms supported by ORFS.
+Any variable that can be set from the command line can be used for tune or sweep.
+
+For SDC you can use:
+
+* `_SDC_FILE_PATH`
+  - Path relative to the current JSON file to the SDC file.
+* `_SDC_CLK_PERIOD`
+  - Design clock period. This will create a copy of `_SDC_FILE_PATH` and modify the clock period.
+* `_SDC_UNCERTAINTY`
+  - Clock uncertainty. This will create a copy of `_SDC_FILE_PATH` and modify the clock uncertainty.
+* `_SDC_IO_DELAY`
+  - I/O delay. This will create a copy of `_SDC_FILE_PATH` and modify the I/O delay.
+
+
+For Global Routing parameters that are set on `fastroute.tcl` you can use:
+
+* `_FR_FILE_PATH`
+  - Path relative to the current JSON file to the `fastroute.tcl` file.
+* `_FR_LAYER_ADJUST`
+  - Layer adjustment. This will create a copy of `_FR_FILE_PATH` and modify the layer adjustment for all routable layers, i.e., from `$MIN_ROUTING_LAYER` to `$MAX_ROUTING_LAYER`.
+* `_FR_LAYER_ADJUST_NAME`
+  - Layer adjustment for layer NAME. This will create a copy of `_FR_FILE_PATH` and modify the layer adjustment only for the layer NAME.
+* `_FR_GR_SEED`
+  - Global route random seed. This will create a copy of `_FR_FILE_PATH` and modify the global route random seed.
+
+
+## How to use
+
+### General Information
+
+The `distributed.py` script uses Ray's job scheduling and management to
+fully utilize available hardware resources from a single server 
+configuration, on-premies or over the cloud with multiple CPUs. 
+The two modes of operation: `sweep`, where every possible parameter
+combination in the search space is tested; and `tune`, where we use
+Ray's Tune feature to intelligently search the space and optimize
+hyperparameters using one of the algorithms listed above. The `sweep`
+mode is useful when we want to isolate or test a single or very few
+parameters. On the other hand, `tune` is more suitable for finding
+the best combination of a complex and large number of flow 
+parameters. Both modes rely on user-specified search space that is 
+defined by a `.json` file, they use the same syntax and format, 
+though some features may not be available for sweeping.
+
+```{note}
+The order of the parameters matter. Arguments `--design`, `--platform` and
+`--config` are always required and should precede <mode>.
+```
+
+#### Tune only 
+
+* AutoTuner: `python3 distributed.py tune -h`
+
+Example:
+
+```shell
+python3 distributed.py --design gcd --platform sky130hd \
+                       --config ../designs/sky130hd/gcd/autotuner.json \
+                       tune
+```
+#### Sweep only 
+
+* Parameter sweeping: `python3 distributed.py sweep -h`
+
+Example:
+
+```shell
+python3 distributed.py --design gcd --platform sky130hd \
+                       --config distributed-sweep-example.json \
+                       sweep
+```
+
+
+### Google Cloud Platform (GCP) distribution with Ray
+
+GCP Setup Tutorial coming soon.
+
+
+### List of input arguments
+| Argument                      | Description                                                                                           |
+|-------------------------------|-------------------------------------------------------------------------------------------------------|
+| `--design`                    | Name of the design for Autotuning.                                                                    |
+| `--platform`                  | Name of the platform for Autotuning.                                                                  |
+| `--config`                    | Configuration file that sets which knobs to use for Autotuning.                                       |
+| `--experiment`                | Experiment name. This parameter is used to prefix the FLOW_VARIANT and to set the Ray log destination.|
+| `--resume`                    | Resume previous run.                                                                                  |
+| `--git_clean`                 | Clean binaries and build files. **WARNING**: may lose previous data.                                  |
+| `--git_clone`                 | Force new git clone. **WARNING**: may lose previous data.                                             |
+| `--git_clone_args`            | Additional git clone arguments.                                                                       |
+| `--git_latest`                | Use latest version of OpenROAD app.                                                                   |
+| `--git_or_branch`             | OpenROAD app branch to use.                                                                           |
+| `--git_orfs_branch`           | OpenROAD-flow-scripts branch to use.                                                                  |
+| `--git_url`                   | OpenROAD-flow-scripts repo URL to use.                                                                |
+| `--build_args`                | Additional arguments given to ./build_openroad.sh                                                     |
+| `--algorithm`                 | Search algorithm to use for Autotuning.                                                               |
+| `--eval`                      | Evalaute function to use with search algorithm.  \                                                    |
+| `--samples`                   | Number of samples for tuning.                                                                         |
+| `--iterations`                | Number of iterations for tuning.                                                                      |
+| `--resources_per_trial`       | Number of CPUs to request for each tuning job.                                                        |
+| `--reference`                 | Reference file for use with PPAImprov.                                                                |
+| `--perturbation`              | Perturbation interval for PopulationBasedTraining                                                     |
+| `--seed`                      | Random seed.                                                                                          |
+| `--jobs`                      | Max number of concurrent jobs.                                                                        |
+| `--openroad_threads`          | Max number of threads usable.                                                                         |
+| `--server`                    | The address of Ray server to connect.                                                                 |
+| `--port`                      | The port of Ray server to connect.                                                                    |
+| `-v` or `--verbose`           | Verbosity Level. [0: Only ray status, 1: print stderr, 2: print stdout on top of what is in level 0 and 1. ]                  |
+|                               |                                                                                                       |
+### GUI
+
+Basically, progress is displayed at the terminal where you run, and when all runs are finished, the results are displayed.
+You could find the "Best config found" on the screen.
+
+To use TensorBoard GUI, run `tensorboard --logdir=./<logpath>`. While TensorBoard is running, you can open the webpage `http://localhost:6006/` to see the GUI.
+
+We show three different views possible at the end, namely: `Table View`, `Scatter Plot Matrix View` and `Parallel Coordinate View`.
+
+![Table View](../images/Autotuner_Table_view.webp)
+<p style="text-align: center;">Table View</p>
+
+![Scatter Plot Matrix View](../images/Autotuner_scatter_plot_matrix_view.webp)
+<p style="text-align: center;">Scatter Plot Matrix View</p>
+
+![Parallel Coordinate View](../images/Autotuner_best_parameter_view.webp)
+<p style="text-align: center;">Parallel Coordinate View (best run is in green)</p>
+
+
+## Citation
+
+Please cite the following paper.
+
+* J. Jung, A. B. Kahng, S. Kim and R. Varadarajan, "METRICS2.1 and Flow Tuning in the IEEE CEDA Robust Design Flow and OpenROAD", [(.pdf)](https://vlsicad.ucsd.edu/Publications/Conferences/388/c388.pdf), [(.pptx)](https://vlsicad.ucsd.edu/Publications/Conferences/388/c388.pptx), [(.mp4)](https://vlsicad.ucsd.edu/Publications/Conferences/388/c388.mp4), Proc. ACM/IEEE International Conference on Computer-Aided Design, 2021.
+
+## Acknowledgments
+
+AutoTuner has been developed by UCSD with the OpenROAD Project.

markdown/ORFS_docs/general/Jenkins.md

@@ -0,0 +1,10 @@
+# Jenkins Continuous Integration
+
+The Jenkins website is at [https://jenkins.openroad.tools/](https://jenkins.openroad.tools/). 
+For an in-depth tutorial on how to access the CI metrics, please see
+the [link](https://docs.google.com/presentation/d/1kWHLjUBFcd0stnDaPNi_pt9WFrrsR7tQ95BGhT1yOvw/)
+
+```{Note}
+This document is not static is constantly being updated due to changes 
+in the functionality of Jenkins.
+```

markdown/ORFS_docs/general/Manpage.md

@@ -0,0 +1,86 @@
+# Utilities
+
+The utility module contains the `man` command.
+
+## Commands
+
+```{note}
+- Parameters in square brackets `[-param param]` are optional.
+- Parameters without square brackets `-param2 param2` are required.
+```
+
+## Man installation
+
+The `man` command can be installed optionally as part of the OpenROAD
+binary. For more instructions, please refer to [here](manREADME.md).
+
+### Man
+
+The `man` command in OpenROAD is similar in functionality to Unix
+(and Unix-like operating systems such as Linux) . It is used to 
+display the manual pages for various applications, tools and error 
+messages. These manual pages provide detailed information about how
+to use a particular command or function, along with its syntax and options.
+
+This can be used for a range of commands in different levels as follows:
+- Level 1: Top-level openroad command (e.g. `man openroad`)
+- Level 2: Individual module commands (e.g. `man clock_tree_synthesis`)
+- Level 3: Info, error, warning messages (e.g. `man CTS-0001`)
+
+```tcl
+man
+    name
+    [-manpath manpath]
+    [-no_pager]
+```
+
+#### Options
+
+| Switch Name | Description | 
+| ----- | ----- |
+| `name` | Name of the command/message to query. |
+| `-manpath` | Include optional path to man pages (e.g. ~/OpenROAD/docs/cat). |
+| `-no_pager` | This flag determines whether you wish to see all of the man output at once. Default value is `False`, which shows a buffered output. |
+
+## Example scripts
+
+You may run various commands or message IDs for man pages.
+```
+man openroad
+man clock_tree_synthesis
+man CTS-0005
+```
+
+## Regression tests
+
+There are a set of regression tests in `./test`. For more information, refer to this [section](../../README.md#regression-tests). 
+
+For information regarding the Man page test framework, refer to this
+[link](../../docs/src/test/README.md).
+
+You should also be aware of the [README](../../docs/contrib/ReadmeFormat.md) and [Tcl](../../docs/contrib/TclFormat.md) format enforced to ensure
+accurate parsing of man pages. 
+
+Simply run the following script:
+
+```shell
+./test/regression
+```
+
+## Limitations
+
+## FAQs
+
+Check out
+[GitHub discussion](https://github.com/The-OpenROAD-Project/OpenROAD/discussions/categories/q-a?discussions_q=category%3AQ%26A+utl) about this tool.
+
+## References
+
+## Authors
+
+MAN command is written by Jack Luar with guidance from members of the OpenROAD team,
+including: Cho Moon, Matt Liberty. 
+
+## License
+
+BSD 3-Clause License. See [LICENSE](../../LICENSE) file.

markdown/ORFS_docs/general/Metrics.md

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+# Metrics
+
+The [OpenROAD-flow-scripts](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts)
+repository contains source files (e.g., LEF/DEF, Verilog, SDC, Liberty,
+RC extraction) and configuration files (e.g. `config.mk`) that enable the user to run
+a small set of example designs through our complete RTL-to-GDS flow.
+
+To keep track of the quality of the results, we maintain inside each
+design folder two files:
+
+1. `metadata-base-ok.json` which contains all the relevant
+information extracted from the "golden" execution of the flow (i.e.,
+last known good result).
+
+2. `rules.json` which holds a set of rules that we use to
+evaluate new executions when a change is made.
+
+## Checking against golden
+
+The evaluation checks for key metrics (e.g., worst slack, number of
+DRCs) to ensure that changes do not degrade too much with respect to the
+"golden" values.
+
+After you make a significant change, e.g., fixing a bug in a piece of
+code, or changing some configuration variable
+(`PLACE_DENSITY`), you should review the results and compare
+them with the "golden". To perform the check, you will need to run the
+following command:
+
+``` shell
+cd OpenROAD-flow-scripts/flow
+# the clean_metadata is only required if you need to re-run
+make [clean_metadata] metadata
+```
+
+If the command above yields any error message, please review to
+make sure the change in metrics is expected and justifiable. If so,
+proceed to the next section to update the "golden" reference.
+
+## Update process
+
+Update of the reference files is mandatory if any metrics became worse
+than the values limited by the `rules.json` (see previous
+section on how to perform the check). Also, it is a good idea to update
+the "golden" files if your changes have improved a metric, to ensure that
+the improvement will not be lost in the future.
+
+To update all the reference files:
+
+``` shell
+cd OpenROAD-flow-scripts/flow
+make update_ok
+```
+
+In case you have a special reason to only update one of the files, you
+can do so with the following commands:
+
+``` shell
+# update metadata-base-ok.json file for the design
+make update_metadata
+
+# update rules.json file for the design
+# this will use the current (+ a padding) metadata-base-ok.json
+# the padding ensures that small changes do not break the flow
+make update_rules
+```

markdown/ORFS_docs/general/Notebooks.md

@@ -0,0 +1,19 @@
+# Colab Quickstart
+
+Notebook-based packaging offers three main benefits:
+1. Colab is completely free to use and can be accessed from any web browser.
+1. Colab notebooks can be easily shared with others, making it a great 
+   tool for teams to collaborate and manage OpenROAD design runs. 
+1. The notebook can easily be modified to be used for on-premise servers or 
+   notebook-based cloud providers such as LambdaLabs/Paperspace. 
+
+We provide two notebooks for a quickstart to OpenROAD-flow-scripts functionality 
+as follows:
+
+## OpenROAD-flow-scripts Automated RTL-GDSII Flow
+
+The notebook for the automated flow for `gcd` design in `nangate45` technology node can be found [here](https://colab.research.google.com/drive/1bfcvqOnbw8q7FmSONLw8q7-yBVvKsQot).
+
+## AutoTuner Flow
+
+The notebook for the OpenROAD-flow-scripts AutoTuner flow for `gcd` design in `sky130hd` technology node can be found [here](https://colab.research.google.com/drive/1wye0osn34YVWPvTrfBTftjOfGOtF3ABe).

markdown/ORFS_docs/general/PlatformBringUp.md

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+# Guide to Integrate a New Platform into the OpenROAD Flow
+
+## Overview
+
+This document is a guide for foundry and third party IP providers to
+easily integrate and test a new technology in to the OpenROAD RTL to GDS
+flow. OpenROAD allows you to integrate any PDK (Process Design Kit) for any
+feature size and implement a fully open-sourced RTL-GDSII flow (synthesizable
+Verilog to merged GDSII). The OpenROAD flow has been validated for feature
+sizes down to 7nm and used to design and tapeout over 600 ASIC and SoCs
+to date.
+
+## Prerequisites
+
+To build and add a new platform for OpenROAD, key technology and library
+components must be provided based on the technology node. These are generally
+available as part of the standard design kit provided by a foundry or a
+third-party IP provider.
+
+They include :
+
+*   A standard cell library
+    *   GDS files of all standard cells in the library (or a way to generate
+        them from the layout files, e.g., Magic VLSI layout tool).
+*   A technology LEF file of the PDK being used that includes all relevant
+    information regarding metal layers, vias, and spacing requirements.
+    *   See `flow/platforms/nangate45/lef/NangateOpenCellLibrary.tech.lef`
+        as an example tech LEF file.
+*   A macro LEF file of the standard cell kit that includes MACRO definitions
+    of every cell, pin designations (input/output/inout).
+    *   See `flow/platforms/nangate45/lef/NangateOpenCellLibrary.macro.lef`
+        as an example macro LEF file.
+*   A Liberty file of the standard cell library with PVT characterization,
+    input and output characteristics, timing and power definitions for
+    each cell.
+    *   See `flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib`
+        as an example liberty file.
+*   For KLayout: A mapping from LEF/DEF to GDS `layers:datatypes`
+
+Adding a new platform additionally requires the following:
+
+*   A validated installation of the OpenROAD flow scripts is available. See
+    instructions [here](../index.md#build-or-installing-orfs-dependencies).
+*   A general knowledge of VLSI design and RTL to GDS flows.  OpenROAD
+    implements a fully-automated RTL-GDSII but it requires familiarity with
+    the OpenROAD flow scripts to debug problems.
+
+## Adding a New Platform to OpenROAD
+
+### Setup
+
+This section describes the necessary files and  directories needed to build
+the platform.  All files and directories made/edited are independent of
+each other unless otherwise stated.
+
+### Makefile
+
+Make the following edits  to the Makefile (located in `flow/Makefile`)
+so that OpenROAD can run the flow on a design using the new platform.
+
+At the beginning of the Makefile, there is a block of `DESIGN_CONFIG`
+variables that are commented out. These variables tell OpenROAD which
+design to run and on what platform. `DESIGN_CONFIG` specifically points
+to a `config.mk` file located in the designs directory for the respective
+platform. It is not required to add a `DESIGN_CONFIG` variable for a design
+in the respective platform directly into the Makefile. It is merely a
+convenience to add a `DESIGN_CONFIG` variable in the `Makefile` and can
+instead be set when invoking make. OpenROAD has multiple Verilog designs
+already made which can be used with any platform (see `flow/designs/src`
+for a list of usable designs). For example, a `DESIGN_CONFIG` variable
+using the `gcd` design on a new platform would look as follows:
+
+```{code-block} Makefile
+:caption: Makefile
+DESIGN_CONFIG=./designs/MyNewPlatform/gcd/config.mk
+```
+
+The `config.mk` file will be generated later in the [Design
+Directory](content:design:directory) section of this document.
+
+### Platform Directory
+
+Create a directory for the new technology inside `flow/platforms` to contain
+the necessary files for the OpenROAD flow.
+
+``` shell
+mkdir flow/platforms/MyNewPlatform
+```
+(content:design:directory)=
+### Design Directory
+
+The design directory contains the configuration files for all the designs of
+a specific platform. Create a directory for the new platform in flow/designs
+to contain the relevant files and directories for all the designs for the
+flow in that specific platform. Each design requires its own `config.mk`
+and `constraint.sdc` files.
+
+:::{tip}
+Follow the steps below to create the necessary directories and files.
+Note gcd is just an example and not a required name.
+
+``` shell
+mkdir -p flow/designs/MyNewPlatform/gcd
+touch flow/designs/MyNewPlatform/gcd/config.mk
+touch flow/designs/MyNewPlatform/gcd/constraint.sdc
+```
+This creates two directories MyNewPlatform and `gcd` and two empty files
+`config.mk` and `constraint.sdc` in `flow/designs/MyNewPlatform/gcd`.
+:::
+
+### Platform Configuration
+
+This section describes the necessary files in the platform directory needed
+for the OpenROAD flow. Specifically the `config.mk` file in the platform
+directory has all of the configuration variables that the flow uses. Refer
+to the OpenROAD-flow-scripts documentation for a full list of configuration
+variables that can be set.
+Refer to the [Flow variables](../user/FlowVariables.md) document for details on how to use
+environment variables in OpenROAD-flow-scripts to configure platform and design specific parameters.
+
+For an example of a platform `config.mk` file, refer to
+`flow/platforms/sky130hd/config.mk.`
+
+### Design Configuration
+
+This section describes files in the design directory.
+
+### `config.mk`
+
+The `config.mk` file describes design-specific variables.
+
+For Example:
+
+```
+    DESIGN_NAME
+    PLATFORM
+    VERILOG_FILES
+    SDC_FILE
+    CORE_UTILIZATION
+    CORE_ASPECT_RATIO
+    CORE_MARGIN
+    PLACE_DENSITY
+```
+
+Alternatively, `DIE_AREA` and `CORE_AREA` can be specified instead of
+`CORE_UTILIZATION`, `CORE_ASPECT_RATIO`, and `CORE_MARGIN`. For a complete
+descriptor of all variables see [here](../user/FlowVariables.md).
+
+Following is a sample `config.mk` file for the `gcd` design:
+
+```{code-block} shell
+:caption: config.mk
+export DESIGN_NAME     = gcd
+export PLATFORM        = sky130hd
+
+export VERILOG_FILES = $(sort $(wildcard ./designs/src/$(DESIGN_NAME)/*.v))
+
+export SDC_FILE = ./designs/$(PLATFORM)/$(DESIGN_NAME)/constraint.sdc
+
+export CORE_UTILIZATION  = 30
+export CORE_ASPECT_RATIO = 1
+export CORE_MARGIN       = 2
+export PLACE_DENSITY     = 0.70
+```
+
+### `constraint.sdc`
+
+The `constraint.sdc` file defines timing constraints for the design. The
+`create_clock` command allows you to define clocks that are either connected
+to nets or are virtual and can be customized. The units for `create_clock`
+need to be consistent with the liberty time units. Here’s an example of
+a `constraint.sdc` file which defines a clock `clk` with a period of 8.4
+nanoseconds (nanoseconds being consistent with the liberty time units).
+
+```{code-block} tcl
+:caption: constraint.sdc
+create_clock [get_ports clk] -period 8.4  #Units are in nanoseconds
+```
+
+Refer to the
+[OpenSTA](https://github.com/The-OpenROAD-Project/OpenSTA/blob/master/doc/OpenSTA.pdf)
+User Guide for the full documentation of the `create_clock` command.
+
+### Liberty, LEF, and GDS Files
+
+The liberty, LEF, and GDS files do not technically have to reside inside the
+platform directory of respective technology as long as the paths set in the
+`config.mk` file point to the correct files. However, it is good practice to
+have all relevant files in one localized directory. The `.lib`, `.lef`, and
+`.gds` reside in directories named respectively for the specific technology.
+
+For example:
+``` shell
+mdkir flow/platforms/MyNewPlatform/lib
+mdkir flow/platforms/MyNewPlatform/lef
+mdkir flow/platforms/MyNewPlatform/gds
+```
+
+A merged GDS file may be used instead of adding every individual `.gds`
+file from the standard cell library.
+
+Once the liberty file, tech and macro LEF files, and either the merged
+standard cell GDS or individual standard cell GDS files have been generated,
+place them in their respective directories and set the `lib`, `lef`, and
+`gds` variables in the platform `config.mk` file to the correct paths.
+
+### Clock Gates
+
+Yosys cannot (currently) infer clock gates automatically. However, users can
+manually instantiate clock gates in their RTL using a generic interface. The
+purpose of this interface is to separate platform-specific RTL (also called
+"hardened" RTL) from platform-independent RTL (generic RTL).
+
+This file is only required if you want to instantiate clock gates in your
+design.
+
+To create this module, a gated clock standard cell is required. This standard
+cell is used to create the generic module `OPENROAD_CLKGATE`, as shown below.
+
+```{code-block} verilog
+:caption: cells_clkgate.v
+module OPENROAD_CLKGATE (CK, E, GCK);
+  input  CK;
+  input  E;
+  output GCK;
+
+  <clkgate_std_cell> latch (.CLK(CK), .GATE(E), .GCLK(GCK));
+endmodule
+```
+
+An example instantiation of this module in a user design is shown below.
+
+```{code-block} verilog
+:caption: buffer.v
+// This is not a platform file, this is an example user design
+
+module buffer (clk, enable, in, out);
+
+input        clk, enable;
+input  [7:0] in,
+output [7:0] out
+
+reg  [15:0] buffer_reg;
+wire        gck; // Gated clock
+
+OPENROAD_CLKGATE clkgate (.CK(clk), .E(enable), .GCK(gck));
+
+// Buffer does not change if enable is low
+always @(posedge gck) begin
+  buffer_reg[15:8] <= in;
+  buffer_reg[ 7:0] <= buffer_reg[15:8];
+end
+
+assign out = buffer_reg[ 7:0];
+
+```
+
+### Latches
+
+Yosys can automatically infer latches from RTL, however it requires a behavioral
+Verilog module. Example latch definitions are provided below. `DLATCH_P` is an
+active-high level-sensitive latch and `DLATCH_N` is an active-low
+level-sensitive latch.
+
+This file is only required if you want to infer latches for your design.
+
+```{code-block} verilog
+:caption: cells_latch.v
+module $_DLATCH_P_(input E, input D, output Q);
+  <d_latch_std_cell> _TECHMAP_REPLACE_ (
+    .D (D),
+    .G (E),
+    .Q (Q)
+  );
+endmodule
+
+module $_DLATCH_N_(input E, input D, output Q);
+  <d_latch_std_cell> _TECHMAP_REPLACE_ (
+    .D  (D),
+    .GN (E),
+    .Q  (Q)
+  );
+endmodule
+```
+
+### FastRoute Configuration
+
+FastRoute is the tool used to global-route the design. FastRoute requires a
+Tcl file to set which routing layers will be used for signals, adjust routing
+layer resources, set which routing heuristic to use when routing, etc. It’s
+recommended to use the default `fastroute.tcl` due to its simplicity and
+effectiveness. Following is the default FastRoute configuration file.
+
+```{code-block} tcl
+:caption: fastroute.tcl
+set_global_routing_layer_adjustment $::env(MIN_ROUTING_LAYER)-$::env(MAX_ROUTING_LAYER) 0.5
+set_routing_layers -signal $::env(MIN_ROUTING_LAYER)-$::env(MAX_ROUTING_LAYER)
+```
+
+The first command, `set_global_routing_layer_adjustment`, adjusts the
+routing resources of the design. This effectively reduces the number of
+routing tracks that the global router assumes to exist. By setting it to
+the value of 0.5, this reduced the routing resources of all routing layers
+to 50% which can help with congestion and reduce the challenges for detail
+routing. The second command, `set_routing_layers`, sets the minimum and
+maximum routing layers for signal nets by using the `-signal` option.
+
+More customization can be done to increase the efficiency of global and
+detail route. Refer to the [FastRoute documentation](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/grt/README.md)
+
+### Metal Tracks Configuration
+
+OpenROAD requires a metal track configuration file for use in
+floorplanning. For each metal layer, the x and y offset as well as the x and
+y pitch are defined. To find the pitch and offset for both x and y, refer
+to the `LAYER` definition section for each metal in the tech LEF. Following
+is a generalized metal tracks configuration file with five metal tracks
+defined. **Units are in microns**.
+
+```{code-block} tcl
+:caption: make_tracks.tcl
+make_tracks metal1 -x_offset 0.24 -x_pitch 0.82 -y_offset 0.24 -y_pitch 0.82
+make_tracks metal2 -x_offset 0.28 -x_pitch 0.82 -y_offset 0.28 -y_pitch 0.82
+make_tracks metal3 -x_offset 0.28 -x_pitch 0.82 -y_offset 0.28 -y_pitch 0.82
+make_tracks metal4 -x_offset 0.28 -x_pitch 0.82 -y_offset 0.28 -y_pitch 0.82
+make_tracks metal5 -x_offset 0.28 -x_pitch 0.82 -y_offset 0.28 -y_pitch 0.82
+```
+
+Following is the `LAYER` definition for `metal1` in the `sky130hd` tech LEF.
+``` 
+LAYER met1
+  TYPE ROUTING ;
+  DIRECTION HORIZONTAL ;
+
+  PITCH 0.34 ;
+  OFFSET 0.17 ;
+
+  WIDTH 0.14 ;                     # Met1 1
+  # SPACING 0.14 ;                 # Met1 2
+  # SPACING 0.28 RANGE 3.001 100 ; # Met1 3b
+  SPACINGTABLE
+     PARALLELRUNLENGTH 0
+     WIDTH 0 0.14
+     WIDTH 3 0.28 ;
+  AREA 0.083 ;                     # Met1 6
+  THICKNESS 0.35 ;
+  MINENCLOSEDAREA 0.14 ;
+
+  ANTENNAMODEL OXIDE1 ;
+  ANTENNADIFFSIDEAREARATIO PWL ( ( 0 400 ) ( 0.0125 400 ) ( 0.0225 2609 ) ( 22.5 11600 ) ) ;
+
+  EDGECAPACITANCE 40.567E-6 ;
+  CAPACITANCE CPERSQDIST 25.7784E-6 ;
+  DCCURRENTDENSITY AVERAGE 2.8 ; # mA/um Iavg_max at Tj = 90oC
+  ACCURRENTDENSITY RMS 6.1 ; # mA/um Irms_max at Tj = 90oC
+  MAXIMUMDENSITY 70 ;
+  DENSITYCHECKWINDOW 700 700 ;
+  DENSITYCHECKSTEP 70 ;
+
+  RESISTANCE RPERSQ 0.125 ;
+END met1
+```
+
+In the example above, the x and y pitch for `met1` would be 0.34 and the
+x and y offset would be 0.17.
+
+### PDN Configuration
+
+PDN is a utility that simplifies adding a power grid into the floorplan. With
+specifications given in the PDN configuration file, like which layer to use,
+stripe width and spacing, the utility can generate the metal straps used
+for the power grid. To create and configure a power grid, refer to the
+[PDN documentation](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/pdn/README.md).
+
+### Tapcell Configuration
+
+The tapcell configuration file is used to insert tapcells and endcaps into
+the design. Refer to the [Tapcell](https://github.com/The-OpenROAD-Project/OpenROAD/tree/master/src/tap) documentation
+on how to construct this file.
+
+### setRC Configuration
+
+`setRC` allows the user to define resistances and capacitances for layers
+and vias using the `set_layer_rc` command. There is also a command that
+allows you to set the resistance and capacitance of routing wires using
+the `set_wire_rc`. The units `set_wire_rc` is expecting are per-unit-length
+values. Often, per-unit-length values are available in the PDK user guide. For
+`set_layer_rc`, Liberty units need to be used. Following is a generic example
+of a `setRC` configuration file which sets the resistance and capacitance
+of five metal layers, four vias, one signal wire, and one clock wire.
+
+```{code-block} tcl
+:caption: setRC.tcl
+set_layer_rc -layer M1 -capacitance 1.449e-04 -resistance 8.929e-04
+set_layer_rc -layer M2 -capacitance 1.331e-04 -resistance 8.929e-04
+set_layer_rc -layer M3 -capacitance 1.464e-04 -resistance 1.567e-04
+set_layer_rc -layer M4 -capacitance 1.297e-04 -resistance 1.567e-04
+set_layer_rc -layer M5 -capacitance 1.501e-04 -resistance 1.781e-05
+
+set_layer_rc -via V1 -resistance 9.249146E-3
+set_layer_rc -via V2 -resistance 4.5E-3
+set_layer_rc -via V3 -resistance 3.368786E-3
+set_layer_rc -via V4 -resistance 0.376635E-3
+
+set_wire_rc -signal -layer M2
+set_wire_rc -clock -layer M5
+```
+
+### KLayout
+
+KLayout is used in the OpenROAD flow to provide GDS merging, DRC, and
+LVS. Two files are required for KLayout and they are generated within the
+KLayout GUI. Install KLayout on the host machine since it is not included
+in the OpenROAD build process. Then create the properties and tech files
+as explained below.
+
+### KLayout tech file
+
+Follow these steps to generate the KLayout tech file:
+
+1. Open KLayout in a terminal.
+2. Go to Tools -> Manage Technologies.
+3. Click the + in the bottom left corner to create a new technology.
+4. Set the name for the technology in the box that pops up. You should now see the technology name in the list on the left hand side.
+5. Expand the technology by hitting the arrow and click on General.
+6. Set the base path your platform directory and load the `.lyp` layer properties file that was generated earlier.
+7. On the left hand side under your new technology click Reader Options and then click LEF/DEF on the top bar.
+8. In the LEF+Macro Files section, you add the LEF files by clicking the + button on the right hand side of the box.
+    1. **Note**: Only add your original merged LEF file. Make sure it includes the full path to the LEF file.
+9. In the Production section, scroll down and add the layer map file by hitting the Load File button.
+    1. **Note**: Make sure it includes the full path.
+10. Above in the same section, change the layer name suffix and GDS data type to correspond with the layer map.
+11. Generate the `.lyt` file by right clicking on the new technology name and click on Export Technology.
+12. Save with the extension `.lyt`.
+
+### KLayout properties file
+
+The properties file is not required to obtain a GDS and is merely used for styling purposes inside. Follow these steps to generate the KLayout properties file:
+
+1. Open KLayout.
+2. Install the `tf_import` package.
+    1. Inside KLayout, go to Tools.
+    2. Manage Packages.
+    3. Install New Packages.
+    4. Select `tf_import`.
+        1. If the source of the package is from GitHub, then the file “” needs to be edited to include “source stdio”.
+3. Re-start KLayout.
+4. File -> Import some LEF. Does not matter what LEF; you will just get an error message without one..
+  1. Once selected, go to Options at the bottom left.
+  2. Select your layer map file under the Production tab.
+  3. Go to the LEF+Macro Files tab, then add under Additional LEF files, the merged (original) LEF file in your platform directory.
+  4. Under Macro Layout Files, add the GDS file in your platform directory.
+5. File -> Import Cadence tech file.
+    1. You have to select a tech file (found in the PDK, usually inside the Virtuoso folder).
+    2. KLayout also needs a `.drf` file which is automatically included if it resides in the same directory the cadence tech file was found in (found in the PDK’s Virtuoso folder)..
+6. File -> Save Layer Properties.
+  1. Save as a `.lyp` file in your platform directory.
+
+## Validating the New Platform
+
+To validate the new platform, simply run a design through the flow using
+the new platform. The Makefile should already include the `DESIGN_CONFIG`
+variables for the new platform which were generated in the Setup section
+of the document. Simply uncomment a `DESIGN_CONFIG` variable for the new
+platform in the Makefile, save, and then run `make` in the terminal to run
+the design through the flow. Try a small design first (i.e. `gcd`) so that
+run time is small and you can identify and fix errors faster.
+
+## Authors/Contributors
+
+*   James Stine - Oklahoma State University
+*   Teo Ene - Oklahoma State University
+*   Ricardo Hernandez - Oklahoma State University
+*   Ryan Ridley - Oklahoma State University
+*   Indira Iyer - OpenROAD Project Consultant

markdown/ORFS_docs/general/QoRDashboard.md

@@ -0,0 +1,32 @@
+# Using the OpenROAD Dashboard to track and analyze Quality of Results
+
+The metrics dashboard [(https://dashboard.theopenroadproject.org/)](https://dashboard.theopenroadproject.org/)
+is tailored for RTL-to-GDS flow stages, targeting different designs across
+various platforms. The dashboard comprises two main pages: the trends
+page and the comparison page.
+
+## Trends
+
+The trends page allows users to visualize metric trends through 
+interactive graphs, enabling the selection of platforms, designs, 
+and metrics for each platform. This feature aids in tracking the 
+fluctuations of metrics over time.
+
+![Trends](../images/trends.webp)
+
+## Comparison 
+
+The comparison page lets users compare metrics between branches 
+or commits for a specific platform and its designs. The comparison is 
+shown as a table showcasing the differences between the 
+base source and the test source. This page also offers deeper insights, 
+like the platform summary table that presents statistical trends for 
+different designs within a platform and a summary table that 
+provides insights for the set of selected designs, with added 
+functionality for filtering.
+
+![Comparison](../images/comparison.webp)
+
+These pages combine to create a comprehensive dashboard facilitating 
+data-driven decision-making and performance optimization in the 
+design flow.

markdown/ORFS_docs/general/TutorialHome.md

@@ -0,0 +1,5 @@
+# OpenROAD-flow-scripts tutorial
+
+The links to the main flow tutorial, where we go through each step of 
+the RTL-GDSII flow are as [follows](FlowTutorial.md). We have also provided
+Google Colab packaging for ease of experimentation [here](Notebooks.md).

markdown/ORFS_docs/general/UserGuide.md

@@ -0,0 +1,44 @@
+# User Guide
+
+The OpenROAD Project uses three tools to perform automated RTL-to-GDS layout generation:
+
+1.  [yosys](https://github.com/The-OpenROAD-Project/yosys): Logic
+    Synthesis
+2.  [OpenROAD](https://github.com/The-OpenROAD-Project/OpenROAD):
+    Floorplanning through Detailed Routing
+3.  [KLayout](https://www.klayout.de/): GDS merge, DRC and LVS (public
+    PDKs)
+
+To automate RTL-to-GDS we provide
+[OpenROAD Flow](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts),
+which contains scripts that integrate the three tools.
+
+## Code Organization
+
+The [OpenROAD Flow](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts)
+repository serves as an example RTL-to-GDS flow using the OpenROAD
+tools. The script `build_openroad.sh` in the repository will
+automatically build the OpenROAD toolchain.
+
+The two main directories are:
+
+1. `tools/`: contains the source code for the entire yosys and
+   [OpenROAD App](https://github.com/The-OpenROAD-Project/OpenROAD)
+   (both via submodules) as well as other tools required for the flow.
+3. `flow/`: contains reference recipes and scripts to run designs
+   through the flow. It also contains public platforms and test
+   designs.
+
+## Setup
+
+See [Getting Started](../index.md#getting-started-with-openroad-flow-scripts) guide.
+
+## Using the OpenROAD Flow
+
+See the documentation [here](../tutorials/FlowTutorial.md) for details about the
+flow and how to run designs through the flow.
+
+## Using the OpenROAD App
+
+See the documentation [here](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/README.md) for details about the app and
+the available features and commands.

markdown/ORFS_docs/general/mainREADME.md

@@ -0,0 +1,142 @@
+# OpenROAD Flow
+
+[![Build Status](https://jenkins.openroad.tools/buildStatus/icon?job=OpenROAD-flow-scripts-Public%2Fpublic_tests_all%2Fmaster)](https://jenkins.openroad.tools/view/Public/job/OpenROAD-flow-scripts-Public/job/public_tests_all/job/master/)
+[![Docs](https://readthedocs.org/projects/openroad-flow-scripts/badge/?version=latest)](https://openroad-flow-scripts.readthedocs.io/en/latest/?badge=latest)
+
+OpenROAD-flow-scripts (ORFS) is a fully autonomous, RTL-GDSII flow
+for rapid architecture and design space exploration, early prediction
+of QoR and detailed physical design implementation. However, ORFS
+also enables manual intervention for finer user control of individual
+flow stages through Tcl commands and Python APIs.
+
+```{mermaid}
+:align: center
+
+%%{init: { 'logLevel': 'debug', 'theme': 'dark'
+  } }%%
+timeline
+  title RTL-GDSII Using OpenROAD-flow-scripts
+  Synthesis
+    : Inputs  [RTL, SDC, .lib, .lef]
+    : Logic Synthesis  (Yosys)
+    : Output files  [Netlist, SDC]
+  Floorplan
+    : Floorplan Initialization
+    : IO placement  (random)
+    : Timing-driven mixed-size placement
+    : Macro placement
+    : Tapcell and welltie insertion
+    : PDN generation
+  Placement
+    : Global placement without placed IOs
+    : IO placement  (optimized)
+    : Global placement with placed IOs
+    : Resizing and buffering
+    : Detailed placement
+  CTS : Clock Tree Synthesis
+    : Timing optimization
+    : Filler cell insertion
+  Routing
+    : Global Routing
+    : Detailed Routing
+  Finishing
+    : Metal Fill insertion
+    : Signoff timing report
+    : Generate GDSII  (KLayout)
+    : DRC/LVS check (KLayout)
+```
+
+## Tool Installation
+
+### Docker Based Installation
+
+To ease dependency installation issues, ORFS uses docker images.
+Docker image includes ORFS binaries, applications as well as all
+required dependencies. All of the flow tools are encapsulated
+inside the container image.
+
+If `Docker` is not installed already, install latest docker tool
+based on OS from [here](https://docs.docker.com/engine/install/).
+
+To manage docker as non-root user and verify that you can run
+`docker` commands without `sudo` must complete steps from
+[here](https://docs.docker.com/engine/install/linux-postinstall/).
+
+#### Build ORFS with Docker
+
+Document for detailed steps on docker based installation found
+[here](./docs/user/BuildWithDocker.md).
+
+### Pre-built Binaries
+
+You can download, set up and run ORFS easily with pre-built
+binaries, including OpenROAD, Yosys and Klayout. See instructions
+[here](./docs/user/BuildWithPrebuilt.md).
+
+> **Thanks** to [Precision Innovations](https://precisioninno.com/) for
+> providing and supporting OpenROAD based binaries.
+
+> **Note** Only the latest version of OpenROAD is guaranteed to work with
+> the latest version of ORFS.
+
+> **Disclaimer** The versions of OpenROAD, Yosys and Klayout provided by
+> other third-party vendors are not guaranteed to work with ORFS.
+
+### Build from sources locally
+
+Document for detailed local build from sources and installation steps found [here](./docs/user/BuildLocally.md).
+
+## Using the Flow
+
+- For details about the OpenROAD and the available features and
+  individual flows commands, see the documentation
+  [here](https://openroad.readthedocs.io/en/latest/).
+- For details about automated flow setup, see ORFS docs
+  [here](https://openroad-flow-scripts.readthedocs.io/en/latest/user/GettingStarted.html).
+- Flow tutorial to run the complete OpenROAD based flow from
+  RTL-GDSII, see the tutorial
+  [here](https://openroad-flow-scripts.readthedocs.io/en/latest/tutorials/FlowTutorial.html).
+- To watch ORFS flow tutorial videos, check
+  [here](https://theopenroadproject.org/video).
+
+## Citing this Work
+
+If you use this software in any published work, we would appreciate a citation!
+Please use the following references:
+
+```
+@article{ajayi2019openroad,
+  title={OpenROAD: Toward a Self-Driving, Open-Source Digital Layout Implementation Tool Chain},
+  author={Ajayi, T and Blaauw, D and Chan, TB and Cheng, CK and Chhabria, VA and Choo, DK and Coltella, M and Dobre, S and Dreslinski, R and Foga{\c{c}}a, M and others},
+  journal={Proc. GOMACTECH},
+  pages={1105--1110},
+  year={2019}
+}
+```
+
+A copy of this paper is available
+[here](http://people.ece.umn.edu/users/sachin/conf/gomactech19.pdf) (PDF).
+
+```
+@inproceedings{ajayi2019toward,
+  title={Toward an open-source digital flow: First learnings from the openroad project},
+  author={Ajayi, Tutu and Chhabria, Vidya A and Foga{\c{c}}a, Mateus and Hashemi, Soheil and Hosny, Abdelrahman and Kahng, Andrew B and Kim, Minsoo and Lee, Jeongsup and Mallappa, Uday and Neseem, Marina and others},
+  booktitle={Proceedings of the 56th Annual Design Automation Conference 2019},
+  pages={1--4},
+  year={2019}
+}
+```
+
+A copy of this paper is available
+[here](https://vlsicad.ucsd.edu/Publications/Conferences/371/c371.pdf) (PDF).
+
+If you like the tools, please give us a star on our GitHub repos!
+
+## License
+
+The OpenROAD-flow-scripts repository (build and run scripts) has a BSD 3-Clause License.
+The flow relies on several tools, platforms and designs that each have their own licenses:
+
+- Find the tool license at: `OpenROAD-flow-scripts/tools/{tool}/` or `OpenROAD-flow-scripts/tools/OpenROAD/src/{tool}/`.
+- Find the platform license at: `OpenROAD-flow-scripts/flow/platforms/{platform}/`.
+- Find the design license at: `OpenROAD-flow-scripts/flow/designs/src/{design}/`.

markdown/ORFS_docs/installation/BuildLocally.md

@@ -0,0 +1,56 @@
+# Build from sources locally
+
+## Clone and Install Dependencies
+
+The `setup.sh` script installs all of the dependencies, including OpenROAD dependencies, if they are not already installed.
+
+Supported configurations are: CentOS 7, Ubuntu 20.04, Ubuntu 22.04, RHEL 8,
+Debian 10 and Debian 11.
+
+``` shell
+git clone --recursive https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts
+cd OpenROAD-flow-scripts
+sudo ./setup.sh
+```
+
+## Build
+
+``` shell
+./build_openroad.sh --local
+```
+:::{Note}
+There is a `build_openroad.log` file that is generated with every
+build in the main directory. In case of filing issues, it can be uploaded
+in the "Relevant log output" section of OpenROAD-flow-scripts repo
+[issue form](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/issues/new?assignees=&labels=&template=bug_report_with_orfs.yml).
+:::
+
+## Verify Installation
+
+The binaries should be available on your `$PATH` after setting
+up the environment. The `make` command runs from RTL-GDSII generation for default design `gcd` with `nangate45` PDK. 
+
+``` shell
+source ./env.sh
+yosys -help
+openroad -help
+cd flow
+make
+```
+
+You can view final layout images in OpenROAD GUI using this command.
+
+``` shell
+make gui_final
+```
+
+![gcd_final.webp](../images/gcd_final.webp)
+
+## Compiling and debugging in Visual Studio Code
+
+Set up environment variables using `dev_env.sh`, then start Visual Studio Code. Please ensure [CMake plugins](https://code.visualstudio.com/docs/cpp/cmake-linux) are installed.
+
+``` shell
+. ./dev_env.sh
+code tools/OpenROAD/
+```

markdown/ORFS_docs/installation/BuildWithDocker.md

@@ -0,0 +1,151 @@
+# Build from sources using Docker
+
+## Prerequisites
+
+- For this method you only need to install
+[Docker](https://docs.docker.com/engine/install) on your machine.
+- Ensure that you have sufficient memory allocated to the Virtual Machine (VM)
+as per our system [requirements](../index.md#system-requirements). Refer to
+this [Docker guide](https://docs.docker.com/config/containers/resource_constraints/) for setting CPU cores and memory limits.
+
+:::{Warning}
+The `build_openroad.sh` will use the host number of CPUs to compile `openroad`.
+
+Please check your Docker daemon setup to make sure all host CPUs are
+available. If you are not sure, you can check with the command below. If
+the output number is different from the number of CPUs from your machine,
+then is recommended that you restrict the number of CPUs used by the scripts
+(see instructions below).
+:::
+
+``` shell
+docker run --rm ubuntu:22.04 nproc
+```
+
+### Build Using Docker from pre-built binaries
+
+Courtesy of [Precision Innovations](https://precisioninno.com/),
+they release `.deb` installers of OpenROAD for Ubuntu
+and Debian on a regular basis.
+This greatly helps to reduce the compilation time needed.
+
+We recommend to use a Docker image of a supported OS
+and install OpenROAD using the pre-built binaries from
+Precision Innovations. 
+You can start the container in an interactive mode using 
+the command below. 
+
+```shell
+docker run -it ubuntu:22.04
+```
+
+Now you are ready to install the prebuilt binaries.
+Please refer to the instructions for installing prebuilt binaries
+[here](./BuildWithPrebuilt.md).
+
+### Build Using Docker from sources
+
+Alternatively, if you would like the latest commits from the OpenROAD repositories,
+do follow the instructions below.
+
+
+#### Clone and Build
+
+The following instructions build the docker image with Ubuntu 22.04 as the base OS:
+
+
+``` shell
+git clone --recursive https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts
+cd OpenROAD-flow-scripts
+./build_openroad.sh
+```
+
+You can restrict the number of CPUs with the `-t|--threads N` argument:
+
+``` shell
+./build_openroad.sh --threads N
+```
+
+## Verify Installation
+
+The binaries are only available from inside a Docker container. Here is an example of starting a container from the created Docker image.
+
+``` shell
+docker run --rm -it -u $(id -u ${USER}):$(id -g ${USER}) -v $(pwd)/flow:/OpenROAD-flow-scripts/flow openroad/flow-ubuntu22.04-builder
+```
+
+Then, inside docker:
+
+``` shell
+source ./env.sh
+yosys -help
+openroad -help
+cd flow
+make
+exit
+```
+
+Alternatively you may also use the `docker_shell` utility as follows.
+It is important that you are in the `flow` directory. 
+
+```shell
+cd flow
+util/docker_shell make
+```
+
+## Enable GUI support
+
+To use the GUI feature you will need to start the docker with the
+following command,
+
+For Ubuntu/Debian OS users:
+
+```
+docker run --rm -it \
+           -u $(id -u ${USER}):$(id -g ${USER}) \
+           -v $(pwd)/flow:/OpenROAD-flow-scripts/flow \
+           -e DISPLAY=${DISPLAY} \
+           -v /tmp/.X11-unix:/tmp/.X11-unix \
+           -v ${HOME}/.Xauthority:/.Xauthority \
+           --network host \
+           --security-opt seccomp=unconfined \
+           openroad/flow-$OS_NAME-builder
+```
+
+Running GUI with Docker on Mac OS X users, refer [here](https://cntnr.io/running-guis-with-docker-on-mac-os-x-a14df6a76efc).
+
+Then use:
+
+```
+docker run --rm -it -e DISPLAY=<IP_LIKE_FROM_TUTORIAL>:0 --network host --privileged <IMAGE_NAME>
+```
+
+Alternatively, you may also use the `docker_shell` utility for GUI as follows. 
+It is important that you are in the `flow` directory. 
+
+```shell
+cd flow
+util/docker_shell gui_final
+```
+
+```{note}
+`docker_shell` is a helpful utility to automate the 
+aforementioned Docker commands using the user's parameters. 
+Do refer to the documentation [here](./DockerShell.md).
+```
+
+## Build Docker Image for Different OS
+
+The following instructions build the docker image with a parameterized OS
+in two stages. These are for CI and developers that wish to use an OS other
+than Ubuntu 22.04; regular users should use the steps from previous sections.
+The dev stage installs all dependencies and packages required to run OpenROAD
+and OpenROAD Flow Scripts. The build stage generates all binaries needed to run
+the flow (i.e., `openroad` and `yosys`).
+
+``` shell
+git clone --recursive https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts
+cd OpenROAD-flow-scripts
+./etc/DockerHelper.sh create -target=dev -os=$OS_NAME
+./etc/DockerHelper.sh create -target=builder -os=$OS_NAME
+```

markdown/ORFS_docs/installation/BuildWithPrebuilt.md

@@ -0,0 +1,70 @@
+# Using Pre-built Binaries
+
+## Install Klayout and Yosys
+Please ensure the Klayout version (denoted with `klayoutVersion` variable) is consistent with the one used in [DependencyInstaller script](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/etc/DependencyInstaller.sh). 
+
+Instructions for installing:
+- [Klayout>=0.28.8](https://www.klayout.de/build.html)
+- [Yosys>=0.39](https://github.com/YosysHQ/oss-cad-suite-build/blob/master/README.md#installation)
+
+```{tip} Unfortunately KLayout maintainers do not provide Debian 10/11 compatible packages. You can follow the build-from-sources instruction (Version >=0.25) and Ubuntu 22 instructions [here](https://www.klayout.de/build.html#:~:text=Building%20KLayout%20on%20Linux%20(Version%20%3E%3D%200.25)). 
+```
+
+## Install OpenROAD
+Download pre-built binaries with self-contained dependencies
+included from the Precision Innovations' GitHub releases
+[here](https://github.com/Precision-Innovations/OpenROAD/releases).
+
+Thanks to [Precision Innovations](https://precisioninno.com/) for hosting and maintaining these binaries.
+
+The following platforms are supported currently:
+- Ubuntu 20.04/22.04
+- Debian 10/11
+
+Use the following steps to download:
+
+Step 1: Click on the [Precision Innovations Github releases link](https://github.com/Precision-Innovations/OpenROAD/releases).
+
+Step 2: Download the artifacts for your distribution.
+
+Step 3: Run the install command based on platform use package installer.
+        For example Ubuntu 20.04 use:
+        
+```shell
+sudo apt install ./openroad_2.0_amd64-ubuntu20.04.deb
+```
+
+## Install Klayout and Yosys
+Please ensure the Klayout version (denoted with `klayoutVersion` variable) is consistent with the one used in [DependencyInstaller script](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/etc/DependencyInstaller.sh). 
+
+Instructions for installing:
+- [Klayout>=0.28.8](https://www.klayout.de/build.html)
+- [Yosys>=0.39](https://github.com/YosysHQ/oss-cad-suite-build/blob/master/README.md#installation)
+
+```{tip} Unfortunately KLayout maintainers do not provide Debian 10/11 compatible packages. You can follow the build-from-sources instruction (Version >=0.25) and Ubuntu 22 instructions [here](https://www.klayout.de/build.html#:~:text=Building%20KLayout%20on%20Linux%20(Version%20%3E%3D%200.25)). 
+```
+
+
+## Verify Installation
+You may clone the OpenROAD-flow-scripts repository non-recursively. 
+
+```
+git clone https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts.git
+```
+
+Export path variables accordingly.
+
+```
+# these variables are used in flow/Makefile. Do make sure the yosys path is sourced.
+export OPENROAD_EXE=$(command -v openroad)
+export YOSYS_CMD=$(command -v yosys)
+
+# only if KLayout is built from source
+export LD_LIBRARY_PATH="<klayout_location>/bin:$PATH" 
+
+yosys -help
+openroad -help
+cd flow
+make
+make gui_final
+```

markdown/ORFS_docs/installation/BuildWithWSL.md

@@ -0,0 +1,39 @@
+# Build with WSL
+Windows Subsystem for Linux, or WSL for short is a way for you to mount a Linux-based OS onto your Windows machine, allowing you to build OpenROAD-flow-scripts both locally and via Docker. 
+
+## Install WSL
+Instructions to install WSL can be found [here](https://learn.microsoft.com/en-us/windows/wsl/install). You may use any kernel supported, such as: CentOS 7, Ubuntu 20.04, Ubuntu 22.04, RHEL 8, Debian 10 and Debian 11.
+
+We recommend that users follow the Docker build by continuing onto the guide below. However, if you wish to install locally, you may follow the build locally instructions [here](./BuildLocally.md).
+
+> **TIP**: You may delete your WSL kernel using this [guide](https://pureinfotech.com/remove-linux-distro-wsl/).
+
+
+## Docker configuration
+This section assumes you have set up Docker for Windows already. If not, please refer to the Docker official website for instructions [here](https://docs.docker.com/desktop/install/windows-install/).
+
+You need to enable the following options to allow WSL to use Docker. 
+
+General > Use the WSL 2 Based engine (should be default selection)
+![WSL1](../images/wsl_1.webp)
+
+Resources > WSL integration > Enable integration with my default WSL distro and select "Ubuntu-22.04", or the distribution you installed.  
+![WSL2](../images/wsl_2.webp)
+
+## Accessing WSL
+You may access WSL from the app named "Ubuntu 22.04 LTS". Run the following:
+```
+sudo apt-get update; sudo apt-get upgrade; sudo apt install -y build-essential python3 python3-venv python3-pip make
+```
+Verify if Docker is running
+```
+docker run hello-world
+```
+You should see:
+
+```
+Hello from Docker!
+This message shows that your installation appears to be working correctly.
+```
+
+If everything is successful up to this point, congratulations! You are now ready to follow the [Docker guide](./BuildWithDocker.md) as you have configured a Linux system with necessary dependencies. 

markdown/ORFS_docs/installation/FAQS.md

@@ -0,0 +1,57 @@
+# FAQs
+
+If you cannot find your question/answer here, please file a GitHub issue to
+the appropriate repository or start a discussion.
+
+-   Issues and bugs:
+    -   OpenROAD Flow: <https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/issues>
+    -   OpenROAD with OpenROAD Flow Scripts: <https://github.com/The-OpenROAD-Project/OpenROAD/issues>
+-   Discussions:
+    -   OpenROAD Flow: <https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/discussions>
+
+## How can I contribute?
+
+Thank you for your willingness to contribute. Please see the
+[Getting Involved](../contrib/GettingInvolved) guide.
+
+## How do I update OpenROAD-flow-scripts?
+
+Depending on how you installed OpenROAD-flow-scripts, there are different ways of updating. Regardless, here are the common first steps:
+
+```shell
+cd OpenROAD-flow-scripts
+git checkout master
+git pull
+```
+
+Now your local copy of ORFS should be up-to-date. The next step is to build it again with the following command: 
+
+For WSL/docker based installation, run:
+```shell
+./build_openroad.sh --clean
+```
+
+For local installation, run:
+```shell
+./build_openroad.sh --local --clean
+```
+
+For pre-built binaries, you can run the flow after `git pull` is done.
+
+:::{tip} 
+For development purposes, it is a good practice to work on branches and leave master untouched. 
+- If the branch already exists: `git checkout <BRANCH> && git merge master`
+- If the branch does not exist: `git checkout -b <BRANCH> && git merge master` 
+:::
+
+## How do I update the design reference files?
+
+See how to update using the Metrics [guide](../contrib/Metrics.md).
+
+## How do I get better search results?
+
+As quoted from [ReadTheDocs](https://docs.readthedocs.io/en/stable/server-side-search/syntax.html#special-queries), this documentation is powered by [Simple Query String](https://www.elastic.co/guide/en/elasticsearch/reference/current/query-dsl-simple-query-string-query.html#) from [Elasticsearch](https://www.elastic.co/elasticsearch/). Here are some helpful patterns:
+
+- Exact phrase search: `"global_route"`
+- Prefix query: `GRT-*`, `BUF*`, `report_*`
+- Fuzziness: `~N` (tilde followed by a number) after a word indicates edit distance. Helpful if the exact spelling is unknown. For example: `test~2`, `reportfilename~2`

markdown/ORFS_docs/installation/SupportedOS.md

@@ -0,0 +1,107 @@
+# Welcome to OpenROAD's documentation!
+
+The OpenROAD ("Foundations and Realization of Open, Accessible Design")
+project was launched in June 2018 within the DARPA IDEA program. OpenROAD
+aims to bring down the barriers of cost, expertise and unpredictability that
+currently block designers' access to hardware implementation in advanced
+technologies. The project team (Qualcomm, Arm and multiple universities and
+partners, led by UC San Diego) is developing a fully autonomous, open-source
+tool chain for digital SoC layout generation, focusing on
+the RTL-to-GDSII phase of system-on-chip design. Thus,
+OpenROAD holistically attacks the multiple facets of today's design cost
+crisis: engineering resources, design tool licenses, project schedule,
+and risk.
+
+The IDEA program targets no-human-in-loop (NHIL) design, with 24-hour
+turnaround time and zero loss of power-performance-area (PPA) design quality.
+
+The NHIL target requires tools to adapt and auto-tune successfully to flow
+completion, without (or, with minimal) human intervention. Machine
+intelligence augments human expertise through efficient modeling and
+prediction of flow and optimization outcomes throughout the synthesis, placement
+and routing process. This is complemented by development of metrics
+and machine learning infrastructure.
+
+The 24-hour runtime target implies that problems must be strategically
+decomposed throughout the design process, with clustered and partitioned
+subproblems being solved and recomposed through intelligent distribution
+and management of computational resources. This ensures that the NHIL design
+optimization is performed within its available `[threads * hours]` "box" of
+resources. Decomposition that enables parallel and distributed search over
+cloud resources incurs a quality-of-results loss, but this is subsequently
+recovered through improved flow predictability and enhanced optimization.
+
+For a technical description of the OpenROAD flow, please refer to our DAC-2019 paper:
+[Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project](https://vlsicad.ucsd.edu/Publications/Conferences/371/c371.pdf).
+The paper is also available from [ACM Digital Library](https://dl.acm.org/doi/10.1145/3316781.3326334).
+Other publications and presentations are
+linked [here](https://theopenroadproject.org/publications/).
+
+## Documentation
+
+The OpenROAD Project has two releases:
+
+- Application ([github](https://github.com/The-OpenROAD-Project/OpenROAD)) ([docs](main/README.md)): The application is a standalone binary for digital place and route that can be used by any other RTL-GDSII flow controller.
+- Flow ([github](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts)) ([docs](https://openroad-flow-scripts.readthedocs.io/en/latest/)): This is the native OpenROAD flow that consists of a set of integrated scripts for an autonomous RTL-GDSII flow using OpenROAD and other open-source tools.
+
+## Supported Operating Systems
+
+Note that depending on the installation method, we have varying levels of 
+support for various operating systems. 
+
+Legend:
+- `Y` for supported.
+- `-` for unsupported.
+
+| Operating System | Local Installation | Prebuilt Binaries | Docker Installation | Windows Subsystem for Linux | 
+| --- | --- | --- | --- | --- |
+| Ubuntu 20.04 | `Y` | `Y` | `Y` | `-` |  
+| Ubuntu 22.04 | `Y` | `Y` | `Y` | `-` |
+| CentOS 7     | `Y` | `-` | `Y` | `-` |
+| CentOS 8     | `Y` | `-` | `Y` | `-` |
+| Debian 10    | `Y` | `Y` | `Y` | `-` |
+| Debian 11    | `Y` | `Y` | `Y` | `-` |
+| RHEL         | `Y` | `-` | `Y` | `-` |
+| Windows 10 and above | `-` | `-` | `Y` | `Y` |
+| macOS        | `Y*` | `-` | `Y` | `-` |
+
+```{warning}
+For macOS, local compilation for the modules `par` and `mpl2` are not
+fully supported due to an upstream issue with `or-tools`. We recommend
+Docker installation wherever possible.
+```
+
+## Code of conduct
+
+Please read our code of conduct [here](main/CODE_OF_CONDUCT.md).
+
+## How to contribute
+
+If you are willing to **contribute**, see the
+[Getting Involved](contrib/GettingInvolved.md) section.
+
+If you are a **developer** with EDA background, learn more about how you
+can use OpenROAD as the infrastructure for your tools in the
+[Developer Guide](contrib/DeveloperGuide.md) section.
+
+OpenROAD uses Git for version control and contributions. 
+Get familiarised with a quickstart tutorial to contribution [here](contrib/GitGuide.md).
+
+## How to get in touch
+
+We maintain the following channels for communication:
+
+-   Project homepage and news: <https://theopenroadproject.org>
+-   Twitter: <https://twitter.com/OpenROAD_EDA>
+-   Issues and bugs:
+    -   OpenROAD: <https://github.com/The-OpenROAD-Project/OpenROAD/issues>
+-   Discussions:
+    -   OpenROAD: <https://github.com/The-OpenROAD-Project/OpenROAD/discussions>
+-   Inquiries: openroad@eng.ucsd.edu
+
+See also our [FAQs](user/FAQS.md).
+
+## Site Map
+
+```{tableofcontents}
+```

markdown/ORFS_docs/installation/index2.md

@@ -0,0 +1,264 @@
+# Welcome to the OpenROAD Flow Scripts documentation!
+
+The OpenROAD ("Foundations and Realization of Open, Accessible Design")
+project was launched in June 2018 within the DARPA IDEA program. OpenROAD
+aims to bring down the barriers of cost, expertise and unpredictability that
+currently block designers access to hardware implementation in advanced
+technologies. The project team (Qualcomm, Arm and multiple universities and
+partners, led by UC San Diego) is developing a fully autonomous, open-source
+tool chain for digital SoC layout generation, focusing on the RTL-to-GDSII
+phase of system-on-chip design. Thus, OpenROAD holistically attacks the
+multiple facets of today's design cost crisis: engineering resources,
+design tool licenses, project schedule, and risk.
+
+The IDEA program targets no-human-in-loop (NHIL) design, with 24-hour
+turnaround time and zero loss of power-performance-area (PPA) design quality.
+
+The NHIL target requires tools to adapt and auto-tune successfully to
+flow completion, without (or, with minimal) human intervention. Machine
+intelligence augments human expertise through efficient modeling and
+prediction of flow and optimization outcomes throughout the synthesis,
+placement and routing process. This is complemented by development of
+metrics and machine learning infrastructure.
+
+The 24-hour runtime target implies that problems must be strategically
+decomposed throughout the design process, with clustered and partitioned
+subproblems being solved and recomposed through intelligent distribution
+and management of computational resources. This ensures that the NHIL design
+optimization is performed within its available `[threads * hours]` "box" of
+resources. Decomposition that enables parallel and distributed search over
+cloud resources incurs a quality-of-results loss, but this is subsequently
+recovered through improved flow predictability and enhanced optimization.
+
+Learn more about the project at our website and our resources page
+[here](https://theopenroadproject.org/resources/).
+
+## Getting Started with OpenROAD Flow Scripts
+
+OpenROAD Flow is a full RTL-to-GDS flow built entirely on open-source tools.
+The project aims for automated, no-human-in-the-loop digital circuit design
+with 24-hour turnaround time. For more information, refer to our repository
+[README](mainREADME.md).
+
+```{tip}
+See these [tips](user/FAQS.md#how-do-i-get-better-search-results) to help improve your search results.
+```
+
+### Setup
+
+#### Supported Operating Systems
+
+Note that depending on the installation method, we have varying levels of 
+support for various operating systems. 
+
+Legend:
+- `Y` for supported.
+- `-` for unsupported.
+
+| Operating System | Local Installation | Prebuilt Binaries | Docker Installation | Windows Subsystem for Linux | 
+| --- | --- | --- | --- | --- |
+| Ubuntu 20.04 | `Y` | `Y` | `Y` | `-` |  
+| Ubuntu 22.04 | `Y` | `Y` | `Y` | `-` |
+| CentOS 7     | `Y` | `-` | `Y` | `-` |
+| CentOS 8     | `Y` | `-` | `Y` | `-` |
+| Debian 10    | `Y` | `Y` | `Y` | `-` |
+| Debian 11    | `Y` | `Y` | `Y` | `-` |
+| RHEL         | `Y` | `-` | `Y` | `-` |
+| Windows 10 and above | `-` | `-` | `Y` | `Y` |
+| macOS        | `Y*` | `-` | `Y` | `-` |
+
+```{warning}
+For macOS, local compilation for the modules `par` and `mpl2` are not
+fully supported due to an upstream issue with `or-tools`. We recommend
+Docker installation wherever possible.
+```
+
+
+#### System Requirements
+
+To build the binaries and run `gcd` through the flow:
+
+- Minimum: 1 CPU core and 8GB RAM.
+- Recommended: 4 CPU cores and 16GB of RAM.
+
+```{note}
+`gcd` is a small design, and thus requires less computational power.
+Larger designs may require better hardware.
+
+```
+#### Build or Installing ORFS Dependencies
+
+We support four major ways of installation:
+
+- [Docker](./user/BuildWithDocker.md)
+- [Pre-built Binaries](./user/BuildWithPrebuilt.md)
+- [Windows Subsystem for Linux (WSL)](./user/BuildWithWSL.md)
+- [Local Installation](./user/BuildLocally.md)
+
+You may also choose and use the build script to customise your build process.
+See more in the next section.
+
+##### Build Command and options
+
+``` shell
+./build_openroad.sh --help
+```
+
+Options for `./build_openroad.sh` script
+| Argument                      | Description                                                                           |
+|-------------------------------|---------------------------------------------------------------------------------------|
+| `-h` or `--help`              | Print help message.                                                                   |
+| `-o` or  `--local`            | Build locally instead of building a Docker image.                                     |
+| `-l` or  `--latest`           | Use the head of branch --or_branch or 'master' by default for tools/OpenROAD.         |
+| `--or_branch BRANCH_NAME`     | Use the head of branch BRANCH for tools/OpenROAD.                                     |
+| `--or_repo REPO_URL`          | Use a fork at REPO-URL (https/ssh) for tools/OpenROAD.                                |
+| `--no_init`                   | Skip initializing submodules.                                                         |
+| `-t N` or `--threads N`       | Use N cpus when compiling software.                                                   |
+| `-n` or `--nice`              | Nice all jobs. Use all cpus unless `--threads` is also given, then use N threads.     |
+| `--yosys-args-overwrite`      | Do not use default flags set by this scrip during Yosys compilation.                  |
+| `--yosys-args STRING`         | Aditional compilation flags for Yosys compilation.                                    |
+| `--openroad-args-overwrite`   | Do not use default flags set by this script during OpenROAD app compilation.          |
+| `--openroad-args STRING`      | Aditional compilation flags for OpenROAD app compilation.                             |
+| `--lsoracle-enable`           | Compile LSOracle. Disable by default as it is not currently used on the flow.         |
+| `--lsoracle-args-overwrite`   | Do not use default flags set by this scrip during LSOracle compilation.               |
+| `--lsoracle-args STRING`      | Aditional compilation flags for LSOracle compilation.                                 |
+| `--install-path PATH`         | Path to install tools. Default is `${INSTALL_PATH}`.                                  |
+| `--clean`                     | Call git clean interactively before compile. Useful to remove old build files.        |
+| `--clean-force`               | Call git clean before compile. WARNING: this option will not ask for confirmation. Useful to remove old build files. |
+| `-c` or `--copy-platforms`    | Only applicable for docker builds. Copy platforms to inside docker image.             |
+| `--docker-args-overwrite`     | Only applicable for docker builds. Do not use default flags set by this script for Docker builds.  |
+| `--docker-args STRING`        | Only applicable for docker builds. Additional compilation flags for Docker build.     |
+
+
+### Running a Design
+
+Sample design configurations are available in the `designs` directory.
+You can select a design using either of the following methods:
+
+1. The flow
+   [Makefile](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/Makefile)
+   contains a list of sample design configurations at the top of the
+   file. Uncomment the respective line to select the design.
+2. Specify the design using the shell environment. For example:
+
+```shell
+make DESIGN_CONFIG=./designs/nangate45/swerv/config.mk
+# or
+export DESIGN_CONFIG=./designs/nangate45/swerv/config.mk
+make
+```
+
+By default, the `gcd` design is selected using the
+`nangate45` platform. The resulting GDS will be available at
+`flow/results/nangate45/gcd/6_final.gds`. The flow should take only a few
+minutes to produce a GDS for this design. We recommend implementing this
+design first to validate your flow and tool setup.
+
+### Design exploration and automatic parameter tuning
+
+AutoTuner is an automatic parameter tuning framework capable of performing
+automatic parameter tuning framework for commercial and academic RTL-to-GDS
+flows. The two main functionalities that AutoTuner provides are:
+
+- Automatic hyperparameter tuning framework for OpenROAD-flow-scripts
+- Parametric sweeping experiments for OpenROAD-flow-scripts
+
+```{tip}
+Refer to the detailed [instructions here](./user/InstructionsForAutoTuner.md) for AutoTuner.
+
+```
+
+### Adding a Design
+
+To add a new design to the `flow` directory, refer to the document [here](./user/AddingNewDesign.md).
+
+### Platforms
+
+OpenROAD-flow-scripts supports Verilog to GDS for the following open platforms:
+
+- ASAP7
+- Nangate45 / FreePDK45
+- SKY130
+- GF180
+
+These platforms have a permissive license which allows us to
+redistribute the PDK and OpenROAD platform-specific files. The platform
+files and license(s) are located in `platforms/{platform}`.
+
+OpenROAD-flow-scripts also supports the following proprietary platforms:
+
+- GF55
+- GF12
+- Intel22
+- Intel16
+- TSMC65
+
+The PDKs and platform-specific files for these kits cannot be provided
+due to NDA restrictions. However, if you are able to access these
+platforms, you can create the necessary platform-specific files
+yourself.
+
+Once the platform is set up, you can create a new design configuration with
+information about the design. See sample configurations in the `design`
+directory.
+Refer to the [Flow variables](./user/FlowVariables.md) document for details on how to use
+environment variables in OpenROAD-flow-scripts to configure platform and design specific parameters.
+
+#### Adding a Platform
+
+Refer to the [platform bring up](./contrib/PlatformBringUp.md) documentation
+to set up a new platform for OpenROAD-flow-scripts.
+
+### Implement the Design
+
+Run `make` to perform Verilog to GDS. The final output will be located
+at `flow/results/{platform}/{design_name}/6_final.gds`
+
+### Miscellaneous
+
+#### Smoke-test harness for top-level Verilog designs
+
+1. Drop your Verilog files into `designs/src/harness`
+2. Start the workflow:
+
+```{tip}
+Start with a very small submodule in your design that has only a few pins.
+```
+
+```shell
+make DESIGN_NAME=TopLevelName DESIGN_CONFIG=$(pwd)/designs/harness.mk
+```
+
+## How to contribute
+
+If you are willing to **contribute**, see the
+[Getting Involved](contrib/GettingInvolved.md) section.
+
+If you are a **developer** with EDA background, learn more about how you
+can use OpenROAD as the infrastructure for your tools in the
+[Developer Guide](contrib/DeveloperGuide.md) section.
+
+## How to get in touch
+
+We maintain the following channels for communication:
+
+- Project homepage and news: <https://theopenroadproject.org>
+- Twitter: <https://twitter.com/OpenROAD_EDA>
+- Issues and bugs:
+  - OpenROAD Flow: <https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/issues>
+  - OpenROAD with OpenROAD Flow Scripts: <https://github.com/The-OpenROAD-Project/OpenROAD/issues/>
+- Discussions:
+  - OpenROAD Flow: <https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/discussions>
+- Inquiries: openroad@ucsd.edu
+
+See also our [FAQs](user/FAQS.md).
+
+## Code of conduct
+
+Please read our code of conduct [here](./contrib/CODE_OF_CONDUCT.md).
+
+## Site Map
+
+```{tableofcontents}
+
+```

markdown/OR_docs/general/CI.md

@@ -0,0 +1,59 @@
+# CI Guide
+
+This document describes the pipelines available to the developers and code
+maintainers in the [Jenkins server](https://jenkins.openroad.tools/). Note
+that pipelines with the suffix `*-Private` are only available to code
+maintainers and The OpenROAD Project members as they can contain confidential
+information. Thus, to access Private pipelines one needs to have authorization
+to access confidential data and be logged in the Jenkins website.
+
+Below there is a list of the available features. Instructions on how to
+navigate Jenkins to access these features are available
+[here](https://docs.google.com/presentation/d/1kWHLjUBFcd0stnDaPNi_pt9WFrrsR7tQ95BGhT1yOvw/edit?usp=sharing).
+
+-   Find your build through Jenkins website or from GitHub.
+-   See test status: Pass/Fail.
+-   Log files for each test.
+-   Build artifacts to reproduce failures.
+-   HTML reports about code coverage and metrics.
+
+## OpenROAD App
+
+-   OpenROAD-Coverage-Public
+    -   Description: run dynamic code coverage tool `lconv`.
+    -   Target: master branch.
+    -   Report link [here](https://jenkins.openroad.tools/job/OpenROAD-Coverage-Public/Dynamic_20Code_20Coverage/).
+-   OpenROAD-Coverity-Public
+    -   Description: compile and submit builds to Coverity static code analysis
+        tool.
+    -   Target: master branch.
+    -   Report link [here](https://scan.coverity.com/projects/the-openroad-project-openroad).
+-   OpenROAD-Nightly-Public
+    -   Description: `openroad` unit tests, docker builds, ISPD 2018 and 2019
+        benchmarks for DRT and large unit tests of GPL.
+    -   Target: master branch.
+-   OpenROAD-Public
+    -   Description: `openroad` unit tests and docker builds.
+    -   Target: all branches and open PRs.
+-   OpenROAD-Special-Private
+    -   Description: for developer testing, runs ISPD 2018 and 2019 benchmarks
+        for DRT and large unit tests of GPL.
+    -   Target branches: `TR_*`, `secure-TR_*`, `TR-*`, `secure-TR-*`.
+-   OpenROAD-Private
+    -   Description: `openroad` unit tests and docker builds.
+    -   Target: all branches. Note that PRs will be run on public side after
+        "Ready to Sync Public" workflow.
+
+
+## OpenROAD Flow
+
+-  Information about OpenROAD Flow CI jobs can be found [here](https://openroad-flow-scripts.readthedocs.io/en/latest/contrib/CI.html)
+
+## OpenLane
+
+-   OpenLane-MPW-CI-Public
+    -   Description: test projects to older MPW shuttles with newer OpenLane versions.
+    -   [Repo link](https://github.com/The-OpenROAD-Project/OpenLane-MPW-CI).
+-   OpenLane-Public
+    -   Description: test OpenLane with latest commit from OpenROAD.
+    -   [Repo link](https://github.com/The-OpenROAD-Project/OpenLane).

markdown/OR_docs/general/CodingPractices.md

@@ -0,0 +1,547 @@
+# Coding Practices
+
+List of coding practices.
+
+:::{Note}
+This is a compilation of many idioms in OpenROAD code that are considered undesirable. 
+:::
+
+## C++
+
+### Practice #1
+
+Don't comment out code, instead remove it.
+`git` provides a complete history of
+the code if you want to look backwards. Huge chunks of commented-out
+code make it difficult to read.
+
+### Practice #2
+
+Don't use prefixes on function names or variables. That's what
+namespaces are for.
+
+``` cpp
+namespace fr {
+  class frConstraint
+  class frLef58CutClassConstraint
+  class frShortConstraint
+  class frNonSufficientMetalConstraint
+  class frOffGridConstraint
+  class frMinEnclosedAreaConstraint
+  class frMinStepConstraint
+  class frMinimumcutConstraint
+  class frAreaConstraint
+  class frMinWidthConstraint
+  class frLef58SpacingEndOfLineWithinEndToEndConstraint
+  class frLef58SpacingEndOfLineWithinParallelEdgeConstraint
+  class frLef58SpacingEndOfLineWithinMaxMinLengthConstraint
+  class frLef58SpacingEndOfLineWithinConstraint
+  class frLef58SpacingEndOfLineConstraint
+}
+```
+
+### Practice #3
+
+Namespaces should be all lower case and short. This is an example of a
+poor choice: `namespace TritonCTS`
+
+### Practice #4
+
+Don't use `extern` on function definitions. It is pointless
+in a world with prototypes.
+
+``` cpp
+namespace fr {
+  extern frCoord getGCELLGRIDX();
+  extern frCoord
+  getGCELLGRIDY();
+  extern frCoord getGCELLOFFSETX();
+  extern frCoord
+  getGCELLOFFSETY();
+}
+```
+
+### Practice #5
+
+Don't use prefixes on file names. That's what directories are for.
+
+``` shell
+frDRC.h frDRC_init.cpp frDRC_main.cpp frDRC_setup.cpp frDRC_util.cpp
+```
+
+### Practice #6
+
+Don't name variables `theThingy`, `curThingy` or `myThingy`. It is just
+distracting extraneous verbiage. Just use `thingy`.
+
+``` cpp
+float currXSize;
+float currYSize;
+float currArea;
+float currWS;
+float currWL;
+float currWLnoWts;
+```
+
+### Practice #7
+
+Do not use global variables. All state should be inside of classes.
+Global variables make multi-threading next to impossible and preclude
+having multiple copies of a tool running in the same process. The only
+global variable in `openroad` should be the singleton that Tcl commands
+reference.
+
+``` cpp
+extern std::string DEF_FILE;
+extern std::string GUIDE_FILE;
+extern std::string OUTGUIDE_FILE;
+extern std::string LEF_FILE;
+extern std::string OUTTA_FILE;
+extern std::string OUT_FILE;
+extern std::string DBPROCESSNODE;
+extern std::string OUT_MAZE_FILE;
+extern std::string DRC_RPT_FILE;
+extern int MAX_THREADS ;
+extern int VERBOSE ;
+extern int BOTTOM_ROUTING_LAYER;
+extern bool ALLOW_PIN_AS_FEEDTHROUGH;
+extern bool USENONPREFTRACKS;
+extern bool USEMINSPACING_OBS;
+extern bool RESERVE_VIA_ACCESS;
+extern bool ENABLE_BOUNDARY_MAR_FIX;
+```
+
+### Practice #8
+
+Do not use strings (names) to refer to database or sta objects except in
+user interface code. DEF, SDC, and Verilog all use different names for
+netlist instances and nets, so the names will not always match.
+
+### Practice #9
+
+Do not use continue. Wrap the body in an if instead.
+
+``` cpp
+// instead of
+for(dbInst* inst : block->getInsts() ) {
+  // Skip for standard cells
+  if (inst->getBBox()->getDY() <= cellHeight) { continue; }
+  // code
+}
+// use
+for(dbInst* inst : block->getInsts() ){
+  // Skip for standard cells
+  if (inst->getBBox()->getDY() > cellHeight) {
+    // code
+  }
+}
+```
+
+### Practice #10
+
+Don't put magic numbers in the code. Use a variable with a name that
+captures the intent. Document the units if they exist.
+
+``` cpp
+referenceHpwl_= 446000000;
+coeffV = 1.36;
+coeffV = 1.2;
+double nearest_dist = 99999999999;
+if (dist < rowHeight * 2) {}
+for(int i = 9; i > -1; i--) {}
+if(design_util > 0.6 || num_fixed_nodes > 0) div = 1;
+avail_region_area += (theRect->xUR - theRect->xLL - (int)theRect->xUR % 200 + (int)t  heRect->xLL % 200 - 200) * (theRect->yUR - theRect->yLL - (int)theRect->yUR % 2000 + (int)theRect->yLL % 2000 - 2000);
+```
+
+### Practice #11
+
+Don't copy code fragments. Write functions.
+
+``` cpp
+// 10x
+int x_pos = (int)floor(theCell->x_coord / wsite + 0.5);
+// 15x
+int y_pos = (int)floor(y_coord / rowHeight + 0.5);
+
+// This
+nets[newnetID]->netIDorg = netID;
+nets[newnetID]->numPins = numPins;
+nets[newnetID]->deg = pinInd;
+nets[newnetID]->pinX = (short *)malloc(pinInd* sizeof(short));
+nets[newnetID]->pinY = (short *)malloc(pinInd* sizeof(short));
+nets[newnetID]->pinL = (short *)malloc(pinInd* sizeof(short));
+nets[newnetID]->alpha = alpha;
+
+// Should factor out the array lookup.
+Net *net = nets[newnetID];
+net->netIDorg = netID;
+net->numPins = numPins;
+net->deg = pinInd;
+net->pinX = (short*)malloc(pinInd* sizeof(short));
+net->pinY = (short *)malloc(pinInd* sizeof(short));
+net->pinL = (short *)malloc(pinInd* sizeof(short));
+net->alpha = alpha;
+
+// Same here:
+if (grid[j][k].group != UINT_MAX) {
+  if (grid[j][k].isValid) {
+    if (groups[grid[j][k].group].name == theGroup->name)
+      area += wsite * rowHeight;
+  }
+}
+```
+
+### Practice #12
+
+Don't use logical operators to test for null pointers.
+
+``` cpp
+if (!net) {
+  // code
+}
+
+// should be
+if (net != nullptr) {
+  // code
+}
+```
+
+### Practice #13
+
+Don't use `malloc`. Use `new`. We are writing C++, not C.
+
+### Practice #14
+
+Don't use C style arrays. There is no bounds checks for them so they
+invite subtle memory errors to unwitting programmers who fail to use
+`valgrind`. Use `std::vector` or `std::array`.
+
+### Practice #15
+
+Break long functions into smaller ones, preferably that fit on one
+screen.
+
+### Practice #16
+
+Don't reinvent functions like `round`, `floor`, `abs`, `min`, `max`. Use the std
+versions.
+
+``` cpp
+int size_x = (int)floor(theCell->width / wsite + 0.5);
+```
+
+### Practice #17
+
+Don't use C's stdlib.h `abs`, `fabs` or `fabsf`. They fail miserably if the
+wrong arg type is passed to them. Use `std::abs`.
+
+### Practice #18
+
+Fold code common to multiple loops into the same loop. Each of these
+functions loops over every instance like this:
+
+``` cpp
+legal &= row_check(log);
+legal &= site_check(log);
+for(int i = 0; i < cells.size(); i++) {
+  cell* theCell = &cells[i];
+  legal &= power_line_check(log);
+  legal &= edge_check(log);
+  legal &= placed_check(log);
+  legal &= overlap_check(log);
+}
+// with this loop
+for(int i = 0; i < cells.size(); i++) {
+  cell* theCell = &cells[i];
+}
+```
+
+Instead make one pass over the instances doing each check.
+
+### Practice #19
+
+Don't use `== true`, or `== false`. Boolean expressions already have a
+value of true or false.
+
+``` cpp
+if(found.first == true) {
+  // code
+}
+// is simply
+if(found.first) {
+  // code
+}
+// and
+if(found.first == false) {
+  // code
+}
+// is simply
+if(!found.first) {
+ // code
+}
+```
+
+### Practice #20
+
+Don't nest if statements. Use `&&` on the clauses instead.
+
+``` cpp
+if(grid[j][k].group != UINT_MAX)
+  if(grid[j][k].isValid == true)
+    if(groups[grid[j][k].group].name == theGroup->name)
+```
+
+is simply
+
+``` cpp
+if(grid[j][k].group != UINT_MAX
+   && grid[j][k].isValid
+   && groups[grid[j][k].group].name == theGroup->name)
+```
+
+### Practice #21
+
+Don't call return at the end of a function that does not return a
+value.
+
+### Practice #22
+
+Don't use `<>` to include anything but system headers. Your
+project's headers should never be in `<>`. 
+1. [GCC Include Syntax](https://gcc.gnu.org/onlinedocs/cpp/Include-Syntax.html)
+1. [StackOverflow discussion on "filename" vs \<filename\>](https://stackoverflow.com/questions/21593/what-is-the-difference-between-include-filename-and-include-filename)
+
+These are all wrong:
+
+``` cpp
+#include <odb/db.h>
+#include <sta/liberty/Liberty.hh>
+#include <odb/db.h>
+#include <odb/dbTypes.h>
+#include <odb/defin.h>
+#include <odb/defout.h>
+#include <odb/lefin.h>
+```
+
+### Practice #23
+
+Don't make "include the kitchen sink" headers and include them in
+every source file. This is convenient but slows the builds down
+for everyone. Make each source file include just the headers it actually
+needs.
+
+``` cpp
+// Types.hpp
+#include <sta/liberty/Liberty.hh>
+#include <odb/db.h>
+#include <odb/dbTypes.h>
+// It should be obvious that every source file is not reading def.
+#include <odb/defin.h>
+// or writing it.
+#include <odb/defout.h>
+#include <odb/lefin.h>
+#include "db_sta/dbNetwork.hh"
+#include "db_sta/dbSta.hh"
+```
+
+Note this example also incorrectly uses `<>'s` around OpenROAD headers.
+
+Header files should only include files to support the header. Include
+files necessary for code in the code file, not the header.
+
+In the example below NONE of the system files listed are necessary for
+the header file.
+
+``` cpp
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+#include <limits.h>
+
+unsigned num_nets = 1000;
+unsigned num_terminals = 64;
+unsigned verbose = 0;
+float alpha1 = 1;
+float alpha2 = 0.45;
+float alpha3 = 0;
+float alpha4 = 0;
+float margin = 1.1;
+unsigned seed = 0;
+unsigned root_idx = 0;
+unsigned dist = 2;
+float beta = 1.4;
+bool runOneNet = false;
+unsigned net_num = 0;
+```
+
+### Practice #24
+
+Use class declarations if you are only referring to objects by pointer
+instead of including their complete class definition. This can vastly
+reduce the code the compiler has to process.
+
+``` cpp
+class Network;
+// instead of
+#include "Network.hh"
+```
+
+### Practice #25
+
+Use pragma once instead of `#define` to protect headers from being read
+more than once. The #define symbol has to be unique, which is difficult
+to guarantee.
+
+``` cpp
+// Instead of:
+#ifndef __MACRO_PLACER_HASH_UTIL__
+#define __MACRO_PLACER_HASH_UTIL__
+#endif
+// use
+#pragma once
+```
+
+### Practice #26
+
+Don't put `using namespace` inside a function. 
+
+### Practice #27
+
+Don't nest namespaces.
+
+### Practice #28
+
+Avoid `using namespace`. It increases the likelihood of conflicts
+and doesn't explicity declare what in the namespace is being used. Use
+`using namespace::symbol;` instead. And especially do not use `using namespace std`. 
+
+The following is especially confused because it is trying to "use" the
+symbols in code that are already in the MacroPlace namespace.
+
+``` cpp
+using namespace MacroPlace;
+
+namespace MacroPlace { }
+```
+
+### Practice #29
+
+Use `nullptr` instead of `NULL`. This is the C++
+approved version of the ancient C `#define`.
+
+### Practice #30
+
+Use range iteration. C++ iterators are ugly and verbose.
+
+``` cpp
+// Instead of
+odb::dbSet::iterator nIter;
+for (nIter = nets.begin(); nIter != nets.end(); ++nIter) {
+  odb::dbNet* currNet = *nIter;
+  // code
+}
+// use
+for (odb::dbNet* currNet : nets) {
+  // code
+}
+```
+
+### Practice #31
+
+Don't use end of line comments unless they are very short. 
+
+``` cpp
+for (int x = firstTile._x; x <= lastTile._x; x++) { // Setting capacities of edges completely inside the adjust region according the percentage of reduction
+  // code
+}
+```
+
+### Practice #32
+
+Don't `std::pow` for powers of 2 or for decimal constants.
+
+``` cpp
+// This
+double newCapPerSqr = (_options->getCapPerSqr() * std::pow(10.0, -12));
+// Should be
+double newCapPerSqr = _options->getCapPerSqr() * 1E-12;
+
+// This
+unsigned numberOfTopologies = std::pow(2, numberOfNodes);
+// Should be
+unsigned numberOfTopologies = 1 << numberOfNodes;
+```
+
+## Git
+
+### Practice #33
+
+Don't put /'s in `.gitignore` directory names.
+`test/`
+
+### Practice #34
+
+Don't put file names in `.gitignore` ignored directories.
+`test/results` `test/results/diffs`
+
+### Practice #35
+
+Don't list compile artifacts in `.gitignore`. They all end
+up in the build directory so each file type does not have to appear in
+`.gitignore`.
+
+All of the following are to be avoided:
+
+#### Compiled Object files
+
+`*.slo *.lo *.o *.obj`
+
+#### Precompiled Headers
+
+`*.gch *.pch`
+
+#### Compiled Dynamic libraries
+
+`*.so *.dylib *.dll`
+
+#### Fortran module files
+
+`*.mod *.smod`
+
+#### Compiled Static libraries
+
+`*.lai *.la *.a *.lib`
+
+## CMake
+
+### Practice #35
+
+Don't change compile flags in `cmake` files. These are set at the top
+level and should not be overridden.
+
+``` cmake
+set(CMAKE_CXX_FLAGS "-O3")
+set(CMAKE_CXX_FLAGS_DEBUG "-g -ggdb")
+set(CMAKE_CXX_FLAGS_RELEASE "-O3")
+```
+
+### Practice #36
+
+Don't put /'s in CMake directory names. CMake knows they are directories.
+
+``` cmake
+target_include_directories( ABKCommon PUBLIC ${ABKCOMMON_HOME} src/ )
+```
+
+### Practice #37
+
+Don't use `glob`. Explictly list the files in a group.
+
+``` cmake
+# Instead of
+file(GLOB_RECURSE SRC_FILES ${CMAKE_CURRENT_SOURCE_DIR}/src/*.cpp)
+# should be
+list(REMOVE_ITEM SRC_FILES ${CMAKE_CURRENT_SOURCE_DIR}/src/Main.cpp)
+list(REMOVE_ITEM SRC_FILES ${CMAKE_CURRENT_SOURCE_DIR}/src/Parameters.h)
+list(REMOVE_ITEM SRC_FILES ${CMAKE_CURRENT_SOURCE_DIR}/src/Parameters.cpp)
+```

markdown/OR_docs/general/DatabaseMath.md

@@ -0,0 +1,101 @@
+# Database Math 101
+
+## Introduction
+
+DEF defines the units it uses with the `UNITS` command.
+
+```
+    UNITS DISTANCE MICRONS 1000 ;
+```
+
+Typically the units are 1000 or 2000 database units (DBU) per micron.
+DBUs are integers, so the distance resolution is typically 0.001 um or
+1nm.
+
+OpenDB uses an `int` to represent a DBU, which on most hardware is 4
+bytes. This means a database coordinate can be $\pm 2147483647$, which is
+about $2 \cdot 10^9$ units, corresponding to $2 \cdot 10^6$ or $2$ meters.
+
+## Datatype Choice
+
+This section is important as we cover important math considerations for
+your datatype choice when dealing with large numbers.
+
+### Why not pure int?
+
+Since chip coordinates cannot be negative, it would make sense to use an
+`unsigned int` to represent a distance. This conveys the fact that it
+can never be negative and doubles the maximum possible distance that can
+be represented. The problem, however, is that doing subtraction with unsigned numbers
+is dangerous because the differences can be negative. An unsigned
+negative number looks like a very very big number. So this is a very bad
+idea and leads to bugs.
+
+Note that calculating an area with `int` values is problematic. An
+`int * int` does not fit in an `int`. **Our suggestion is to use `int64_t`
+in this situation.** Although `long` "works", its size is implementation-dependent.
+
+### Why not double?
+
+It has been noticed that some programs use `double` to calculate distances. 
+This can be problematic, as `double` have a mantissa of 52 bits, which means that 
+the largest possible integer value that can be represented without loss is $5\cdot 10^{15}$.
+This is 12 bits less than the largest possible integer value that can be represented 
+by an `int64_t`. As a result, if you are doing an area calculation on a large chip 
+that is more than $\sqrt{5\cdot 10^{15}} = 7\cdot 10^7\ DBU$ on a side, the mantissa of the 
+double will overflow and the result will be truncated.
+
+Not only is a `double` less capable than an `int64_t`, but using it
+tells any reader of the code that the value can be a real number, such as
+$104.23$. So it is extremely misleading.
+
+### Use int only for LEF/DEF Distances
+
+Circling back to LEF, we see that unlike DEF the distances are real
+numbers like 1.3 even though LEF also has a distance unit statement. We
+suspect this is a historical artifact of a mistake made in the early
+definition of the LEF file format. The reason it is a mistake is because
+decimal fractions cannot be represented exactly in binary floating-point.
+For example, $1.1 = 1.00011001100110011...$, a continued fraction.
+
+OpenDB uses `int` to represent LEF distances, just as with DEF. This solves
+the problem by multiplying distances by a decimal constant (distance
+units) to convert the distance to an integer. In the future I would like
+to see OpenDB use a `dbu` typedef instead of `int` everywhere.
+
+### Why not float?
+
+We have also noticed RePlAce, OpenDP, TritonMacroPlace and OpenNPDN all using
+`double` or `float` to represent distances. This can be problematic, as 
+floating-point numbers cannot always represent exact fractions. As a result,
+these tools need to `round` or `floor` the results of their calculations, which 
+can introduce errors. Additionally, some of these tools reinvent the wheel 
+by implementing their own rounding functions, as we shall see in the example below.
+This can lead to inconsistencies and is highly discouraged.
+
+```cpp
+(int) x_coord + 0.5
+```
+
+Worse than using a `double` is using a `float`, because the mantissa
+is only 23 bits, so the maximum exactly representable integer is $8\cdot 10^6$.
+This makes it even less capable than an `int`.
+
+When a value has to be snapped to a grid such as the pitch of a layer,
+the calculation can be done with a simple divide using `int`, which
+`floor` the result. For example, to snap a coordinate to the pitch of a
+layer the following can be used:
+
+``` cpp
+int x, y;
+inst->getOrigin(x, y);
+int pitch = layer->getPitch();
+int x_snap = (x / pitch) * pitch;
+```
+
+The use of rounding in existing code that uses floating-point
+representations is to compensate for the inability to represent floating-point
+fractions exactly. Results like $5.99999999992$ need to be "fixed".
+This problem does not exist if fixed-point arithmetic is used.
+
+

markdown/OR_docs/general/DeveloperGuide.md

@@ -0,0 +1,326 @@
+# Developer Guide
+
+## Tool Philosophy
+
+OpenROAD is a tool to build a chip from synthesizable RTL (Verilog) to
+completed physical layout (manufacturable, tapeout-clean GDSII).
+
+The unifying principle behind the design of OpenROAD is for all of the
+tools to reside in one tool, with one process, and one database. All
+tools in the flow should use Tcl commands exclusively to control them
+instead of external "configuration files". File-based communication
+between tools and forking processes is strongly discouraged. This
+architecture streamlines the construction of a flexible tool flow and
+minimizes the overhead of invoking each tool in the flow.
+
+## Tool File Organization
+
+Every tool follows the following file structure, grouping sources, tests
+and headers together.
+
+- `src/`
+   This folder contains the source files for individual tools.
+ 
+| `src`           | Purpose |
+|-----------------|--------------|
+| `CMakeLists.txt`  | `add_subdirectory` for each tool|
+| `tool/src`       | sources and private headers |
+| `tool/src/CMakeLists.txt` | tool specific CMake file |
+| `tool/include/tool` | exported headers |
+| `tool/test`       | tool tests |
+| `tool/regression` | tool unit tests|
+
+- OpenROAD repository:
+  This folder contains the top-level files for overall compilation. OpenROAD uses [swig](https://swig.org/) that acts as a wrapper for C/C++ programs to be callable in higher-level languages, such as Python and Tcl.
+
+| `OpenROAD`      | Purpose |
+|-----------------|--------------|
+| `CMakeLists.txt` | top-level CMake file |
+| `src/Main.cc`   | main file  |
+| `src/OpenROAD.cc` | OpenROAD class functions |
+| `src/OpenROAD.i`  | top-level swig, includes, tool swig files |
+| `src/OpenROAD.tcl` | basic read/write lef/def/db commands |
+| `include/ord/OpenROAD.hh` | OpenROAD top-level class, has instances of tools |
+
+Some tools such as OpenSTA are submodules, which are simply
+subdirectories in `src/` that are pointers to the git submodule. They are
+intentionally not segregated into a separate module.
+
+The use of submodules for new code integrated into OpenROAD is strongly
+discouraged. Submodules make changes to the underlying infrastructure
+(e.g., OpenSTA) difficult to propagate across the dependent submodule
+repositories.
+
+Where external/third-party code that a tool depends on should be placed
+depends on the nature of the dependency.
+
+-   Libraries - code packaged as a linkable library. Examples are `tcl`,
+    `boost`, `zlib`, `eigen`, `lemon`, `spdlog`.
+
+These should be installed in the build environment and linked by
+OpenROAD. Document these dependencies in the top-level `README.md` file.
+The `Dockerfile` should be updated to illustrate where to find the library
+and how to install it. Adding libraries to the build environment requires
+coordination with system administrators, so that continuous integration hosts ensure
+that environments include the dependency. Advance notification
+should also be given to the development team so that their private build
+environments can be updated.
+
+Each tool CMake file builds a library that is linked by the OpenROAD
+application. The tools should not define a `main()` function. If the
+tool is Tcl only and has no C++ code, it does not need to have a CMake
+file. Tool CMake files should **not** include the following:
+
+- `cmake_minimum_required`
+- `GCC_COVERAGE_COMPILE_FLAGS`
+- `GCC_COVERAGE_LINK_FLAGS`
+- `CMAKE_CXX_FLAGS`
+- `CMAKE_EXE_LINKER_FLAGS`
+
+None of the tools have commands to read or write LEF, DEF, Verilog or
+database files. For consistency, these functions are all provided by the OpenROAD
+framework.
+
+Tools should package all of their state in a single class. An instance of each
+tool class resides in the top-level OpenROAD object. This allows
+multiple tools to exist at the same time. If any tool keeps state in
+global variables (even static), then only one tool can exist at a time. Many
+of the tools being integrated were not built with this goal in mind and
+will only work on one design at a time.
+
+Each tool should use a unique namespace for all of its code. The same
+namespace should be used for Tcl functions, including those defined by a
+swig interface file. Internal Tcl commands stay inside the namespace,
+and user visible Tcl commands should be defined in the global namespace.
+User commands should be simple Tcl commands such as `global_placement`
+that do not create tool instances that must be based to the commands.
+Defining Tcl commands for a tool class is fine for internal commands, but not
+for user visible commands. Commands have an implicit argument of the
+current OpenROAD class object. Functions to get individual tools from
+the OpenROAD object can be defined.
+
+## Initialization (C++ tools only)
+
+The OpenROAD class has pointers to each tool, with functions to get each
+tool. Each tool has (at a minimum) a function to make an instance of the
+tool class, an initialization function that is called after all of
+the tools have been made, and a function to delete the tool. This small
+header does **not** include the class definition for the tool so that
+the OpenROAD framework does not have to know anything about the tool
+internals or include a gigantic header file.
+
+`MakeTool.hh` defines the following:
+
+``` cpp
+Tool *makeTool();
+void initTool(OpenRoad *openroad);
+void deleteTool(Tool *tool);
+```
+
+The `OpenRoad::init()` function calls all of the `makeTool` functions and
+then all of the `initTool()` functions. The `init` functions are called from
+the bottom of the tool dependencies. Each `init` function grabs the state
+it needs out of the `OpenRoad` instance.
+
+## Commands
+
+Tools should provide Tcl commands to control them. Tcl object based tool
+interfaces are not user-friendly. Define Tcl procedures that take
+keyword arguments that reference the `OpenRoad` object to get tool state.
+OpenSTA has Tcl utilities to parse keyword arguments
+(`sta::parse_keyword_args`). See `OpenSTA/tcl/*.tcl` for
+examples. Use swig to define internal functions to C++ functionality.
+
+Tcl files can be included by encoding them in CMake into a string that
+is evaluated at run time (See [`Resizer::init()`](../main/src/rsz/src/Resizer.cc)).
+
+:::{Note}
+Please refer to the top-level Tcl formatting [guide](TclFormat.md).
+Our top-level Tcl files, in particular, have to be formatted in this specific
+manner because of the automatic parsing used to convert the READMEs into
+manpages.
+:::
+
+## Errors
+
+Tools should report errors to the user using the `ord::error` function
+defined in `include/openroad/Error.hh`. `ord::error` throws
+`ord::Exception`. The variables `ord::exit_on_error` and
+`ord::file_continue_on_error` control how the error is handled. If
+`ord::exit_on_error` is `true` then OpenROAD reports the error and exits. If
+the error is encountered while reading a file with the `source` or
+`read_sdc` commands and `ord::file_continue_on_error` is `false` then no
+other commands are read from the file. The default value is `false` for both
+variables.
+
+## Test
+
+Each "tool" has a `/test` directory containing a script named
+`regression` to run "unit" tests. With no arguments it should run
+default unit tests.
+
+No database files should be in tests. Read LEF/DEF/Verilog to make a
+database.
+
+The regression script should not depend on the current working
+directory. It should be able to be run from any directory. Use filenames
+relative to the script name rather the current working directory.
+
+Regression scripts should print a concise summary of test failures. The
+regression script should return an exit code of 0 if there are no
+errors and 1 if there are errors. The script should **not** print
+thousands of lines of internal tool information.
+
+Regression scripts should pass the `-no_init` option to `openroad` so that
+a user's `init` file is not sourced before the tests runs.
+
+Regression scripts should add output files or directories to
+`.gitignore` so that running does not leave the source repository
+"dirty".
+
+The Nangate45 open-source library data used by many tests is in
+`test/Nangate45`. Use the following command to add a link in the tool command:
+
+``` shell
+cd src/<tool>/test
+ln -s ../../../test/Nangate45
+```
+
+After the link is installed, the test script can read the Liberty file
+with the command shown below.
+
+``` tcl
+read_liberty Nangate45/Nangate45_typ.lib
+```
+
+## Building
+
+Instructions for building are available [here](../user/Build.md).
+
+## Example of Adding a Tool to OpenROAD
+
+The patch file "AddTool.patch" illustrates how to add a tool to
+OpenROAD. Use the following commands to add a sample tool:
+
+``` shell
+# first, update existing config files
+patch -p1 < docs/misc/AddTool.patch
+
+# next, create the additional source files of the tool using this command
+patch -p1 < docs/misc/AddToolFiles.patch
+
+# finally, create the regression tests as follows
+cd src/tool/test
+ln -s ../../../test/regression.tcl regression.tcl
+```
+
+This adds a directory `OpenRoad/src/tool` that
+illustrates a tool named "Tool" that uses the file structure described above
+and defines a command to run the tool with keyword and flag arguments as
+illustrated below:
+
+```tcl
+> toolize foo
+Helping 23/6
+Gotta positional_argument1 foo
+Gotta param1 0.000000
+Gotta flag1 false
+
+> toolize -flag1 -key1 2.0 bar
+Helping 23/6
+Gotta positional_argument2 bar
+Gotta param1 2.000000
+Gotta flag1 true
+
+> help toolize
+toolize [-key1 key1] [-flag1] positional_argument1
+```
+
+## Documentation
+
+Tool commands should be documented in the top-level OpenROAD `README.md`
+file. Detailed documentation should be the `tool/README.md` file.
+
+:::{Note}
+Please refer to the README formatting [guide](ReadmeFormat.md).
+Our top-level READMEs, in particular, have to be formatted in this specific
+manner because of the automatic parsing used to convert the READMEs into
+manpages. 
+:::
+
+## Tool Flow Namespace
+
+Tool namespaces are usually three-lettered lowercase letters. 
+
+- Verilog to DB (dbSTA)
+- OpenDB: Open Database ([odb](../main/src/odb/README.md))
+- TritonPart: constraints-driven paritioner ([par](../main/src/par/README.md))
+- Floorplan Initialization ([ifp](../main/src/ifp/README.md))
+- ICeWall chip-level connections ([pad](../main/src/pad/README.md))
+- I/O Placement ([ppl](../main/src/ppl/README.md))
+- PDN Generation ([pdn](../main/src/pdn/README.md))
+- Tapcell and Welltie Insertion ([tap](../main/src/tap/README.md))
+- Triton Macro Placer ([mpl](../main/src/mpl/README.md))
+- Hierarchical Automatic Macro Placer ([mpl2](../main/src/mpl2/README.md))
+- RePlAce Global Placer ([gpl](../main/src/gpl/README.md))
+- Gate resizing and buffering ([rsz](../main/src/rsz/README.md))
+- Detailed placement ([dpl](../main/src/dpl/README.md))
+- Clock tree synthesis ([cts](../main/src/cts/README.md))
+- FastRoute Global routing ([grt](../main/src/grt/README.md))
+- Antenna check and diode insertion ([ant](../main/src/ant/README.md))
+- TritonRoute Detailed routing ([drt](../main/src/drt/README.md))
+- Metal fill insertion ([fin](../main/src/fin/README.md))
+- Design for Test ([dft](../main/src/dft/README.md))
+- OpenRCX Parasitic Extraction ([rcx](../main/src/rcx/README.md))
+- OpenSTA timing/power analyzer ([sta](https://github.com/The-OpenROAD-Project/OpenSTA/blob/master/README.md)
+- Graphical User Interface ([gui](../main/src/gui/README.md))
+- Static IR analyzer ([psm](../main/src/psm/README.md))
+
+## Tool Checklist
+
+Tools should make every attempt to minimize external dependencies.
+Linking libraries other than those currently in use complicates the
+builds and sacrifices the portability of OpenROAD. OpenROAD should be
+portable to many different compiler/operating system versions and
+dependencies make this vastly more complicated.
+
+1. OpenROAD submodules reference tool `openroad` branch head. No git `develop`, `openroad_app`, or `openroad_build` branches.
+1. Submodules used by more than one tool belong in `src/`, not duplicated in each tool repo.
+1. `CMakeLists.txt` does not use add_compile_options include_directories link_directories link_libraries. Use target\_ versions instead. See tips [here](https://gist.github.com/mbinna/c61dbb39bca0e4fb7d1f73b0d66a4fd1).
+1. `CMakeLists.txt` does not use glob. Use explicit lists of source files and headers instead.
+1. `CMakeLists.txt` does not define `CFLAGS` `CMAKE_CXX_FLAGS` `CMAKE_CXX_FLAGS_DEBUG` `CMAKE_CXX_FLAGS_RELEASE`. Let the top level and defaults control these.
+1. No `main.cpp` or main procedure.
+1. No compiler warnings for GCC or Clang with optimization enabled.
+1. Does not call `flute::readLUT` (called once by `openroad`).
+1. Tcl command(s) documented in top level `README.md` in flow order.
+1. Command line tool documentation in tool README.
+1. Conforms to Tcl command naming standards (no camel case).
+1. Does not read configuration files. Use command arguments or support commands.
+1. `.clang-format` at tool root directory to aid foreign programmers.
+1. No `jenkins/`, `Jenkinsfile`, `Dockerfile` in tool directory.
+1. `regression` script named `test/regression` with no arguments that runs tests. Not `tests/regression-tcl.sh`, not `test/run_tests.py` etc.
+1. `regression` script should run independent of current directory. For example, `../test/regression` should work.
+1. `regression` should only print test results or summary, not belch 1000s of lines of output.
+1. Test scripts use OpenROAD tcl commands (not `itcl`, not internal accessors).
+1. `regression` script should only write files in a directory that is in the tool's `.gitignore` so the hierarchy does not have modified files in it as a result or running the regressions.
+1. Regressions report no memory errors with `valgrind` (stretch goal).
+1. Regressions report no memory leaks with `valgrind` (difficult).
+1. Ensure the top-level README and Tcl format are compliant. 
+
+## Code Linting and Formatting
+OpenROAD uses both `clang-tidy` and `clang-format` to perform automatic linting and formatting whenever a pull request is submitted. To run these locally, please first setup Clang Tooling using this [guide](https://clang.llvm.org/docs/HowToSetupToolingForLLVM.html). Thereafter, you may run these commands:
+
+```shell
+cmake . -B build  # generate build files
+# typically only run these commands on files you changed.
+clang-tidy -p ./build source_file.cpp
+clang-format -i -style=file:.clang-format source_file.cpp
+```
+
+## Guidelines
+
+1. Internally, the code should use `int` for all database units and `int64_t`
+for all area calculations. Refer to this [link](DatabaseMath.md) for a more
+detailed writeup on the reasons why this approach is preferred. The only
+place that the database distance units should appear in any program
+should be in the user interface, as microns are easier for humans than DBUs.

markdown/OR_docs/general/GettingInvolved.md

@@ -0,0 +1,87 @@
+# Getting Involved
+
+Thank you for taking the time to read this document and to contribute.
+The OpenROAD project will not reach all of its objectives without help!
+
+Possible ways to contribute to the OpenROAD application:
+
+- Tool improvements
+- New tools
+- Improvements to documentation, including this document
+- Star our project and repos so we can see the number of people
+    who are interested
+
+## Licensing Contributions
+
+As much as possible, all contributions should be licensed using the BSD3
+license. You can propose another license if you must, but contributions
+made with BSD3 fit best with the spirit of OpenROAD's permissive open-source
+philosophy. We do have exceptions in the project, but over time we hope
+that all contributions will be BSD3, or some other permissive license such as MIT
+or Apache2.0.
+
+## Contributing Scripts and Code
+
+We follow the [Google C++ style guide](https://google.github.io/styleguide/cppguide.html).
+If you find code in our project that does *not* follow this guide, then within each file that
+you edit, follow the style in that file.
+
+Please pay careful attention to the
+[tool checklist](DeveloperGuide.md#tool-checklist) for all code. If you want
+to add or improve functionality in OpenROAD, please start with the
+top-level [app](https://github.com/The-OpenROAD-Project/OpenROAD/) repo. You
+can see in the `src` directory that submodules exist pointing to tested
+versions of the other relevant repos in the project. Please look at the
+tool workflow in the developer guide [document](DeveloperGuide.md)
+to work with the app and its submodule repos in an efficient way.
+
+Please run clang-format on all the C++ source files that you change, before
+committing. In the root directory of the OpenROAD repository there is the
+file `.clang-format` that defines all coding formatting rules.
+
+Please pay attention to the
+[test directory](https://github.com/The-OpenROAD-Project/OpenROAD/tree/master/test)
+and be sure to add tests for any code changes that you make, using open-source
+PDK and design information. We provide the `nangate45` PDK in
+the OpenROAD-flow-scripts repo to help with this. Pull requests with
+code changes are unlikely to be accepted without accompanying test
+cases. There are many
+[examples](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/test/gcd_nangate45.tcl)
+tests. Each repo has a test directory as well with tests you should run
+and add to if you modify something in one of the submodules.
+
+For changes that claim to improve QoR or PPA, please run many tests and
+ensure that the improvement is not design-specific. There are designs in
+the
+[OpenROAD-flow-scripts](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/)
+repo which can be used unless the improvement is technology-specific.
+
+Do not add runtime or build dependencies without serious thought. For a
+project like OpenROAD with many application subcomponents, the software
+architecture can quickly get out of control. Changes with lots of new
+dependencies which are not necessary are less likely to be integrated.
+
+If you want to add Tcl code to define a new tool command, look at [pdngen](https://github.com/The-OpenROAD-Project/OpenROAD/tree/master/src/pdn)
+as an example of how to do so. Take a look at the
+[CMake file](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/CMakeLists.txt)
+which automatically sources the Tcl code and the
+[Tcl file](https://github.com/The-OpenROAD-Project/OpenROAD/blob/master/src/pdn/src/pdn.tcl)
+itself.
+
+To accept contributions, we require each commit to be made with a DCO (Developer
+Certificate of Origin) attached.
+When you commit you add the `-s` flag to your commit. For example:
+
+``` shell
+git commit -s -m "test dco with -s"
+```
+
+This will append a statement to your commit comment that attests to the DCO. GitHub
+has built in the `-s` option to its command line since use of this is so
+pervasive. The promise is very basic, certifying that you know that you
+have the right to commit the code. Please read the  [full statement
+here](https://developercertificate.org/).
+
+## Questions
+
+Please refer to our [FAQs](../user/FAQS.md).

markdown/OR_docs/general/GitGuide.md

@@ -0,0 +1,207 @@
+# Git Quickstart
+
+This tutorial serves as a quickstart to Git and contributing to our repository. If you have not already set up OpenROAD, please follow the instructions [here](../user/Build.md). 
+
+```{tip} This basic tutorial gives instruction for basic password Git authentication.
+If you would like to setup SSH authentication, please follow this [guide](https://help.github.com/set-up-git-redirect).
+```
+
+## Forking
+
+You will need your own fork to work on the code. Go to the `OpenROAD` project
+[page](https://github.com/The-OpenROAD-Project/OpenROAD) and hit the `Fork` button. You will
+want to clone your fork to your machine:
+
+```shell
+git clone https://github.com/your-user-name/OpenROAD.git
+cd OpenROAD
+git remote add upstream https://github.com/The-OpenROAD-Project/OpenROAD.git
+git fetch upstream
+```
+
+This creates the directory `OpenROAD` and connects your repository to
+the upstream (master project) *OpenROAD* repository.
+
+## Creating a branch
+
+You want your master branch to reflect only production-ready code, so create a
+feature branch for making your changes. For example:
+
+```shell
+git checkout master && git branch shiny-new-feature
+git checkout shiny-new-feature
+# Or equivalently, 
+git checkout master && checkout -b shiny-new-feature 
+```
+
+This changes your working directory to the shiny-new-feature branch.  Keep any
+changes in this branch specific to one bug or feature so it is clear
+what the branch brings to OpenROAD. You can have many shiny-new-features
+and switch in between them using the git checkout command.
+
+When creating this branch, make sure your master branch is up to date with
+the latest upstream master version. To update your local master branch, you
+can do:
+
+```shell
+git checkout master
+git pull upstream master
+```
+
+When you want to update the feature branch with changes in master after
+you created the branch, check the section on 
+[updating a PR](#updating-your-pull-request).
+
+## Committing your code
+Keep style fixes to a separate commit to make your pull request more readable. Once you've made changes, you can see them by typing:
+
+```shell
+git status
+```
+
+If you have created a new file, it is not being tracked by git. Add it by typing:
+```shell
+git add path/to/file-to-be-added.py
+```
+
+Doing `git status` again should give something like:
+```shell
+# On branch shiny-new-feature
+#
+#       modified:   /relative/path/to/file-you-added.py
+#
+```
+
+Finally, commit your changes to your local repository with an explanatory commit
+message. Do note the `-s` option is needed for developer signoff. 
+```shell
+git commit -s -m "your commit message goes here"
+```
+
+## Pushing your changes
+
+When you want your changes to appear publicly on your GitHub page, push your
+forked feature branch's commits:
+
+```shell
+git push origin shiny-new-feature
+```
+
+Here `origin` is the default name given to your remote repository on GitHub.
+You can see the remote repositories:
+
+```shell
+git remote -v
+```
+
+If you added the upstream repository as described above you will see something
+like:
+
+```shell
+origin  https://github.com/your-user-name/OpenROAD.git (fetch)
+origin  https://github.com/your-user-name/OpenROAD.git (push)
+upstream        https://github.com/The-OpenROAD-Project/OpenROAD.git (fetch)
+upstream        https://github.com/The-OpenROAD-Project/OpenROAD.git (push)
+```
+
+Now your code is on GitHub, but it is not yet a part of the OpenROAD project. For that to
+happen, a pull request needs to be submitted on GitHub.
+
+## Review your code
+
+When you're ready to ask for a code review, file a pull request. Before you do, once
+again make sure that you have followed all the guidelines outlined in the [Developer's Guide](./DeveloperGuide.md)
+regarding code style, tests, performance tests, and documentation. You should also
+double check your branch changes against the branch it was based on:
+
+1. Navigate to your repository on GitHub -- https://github.com/your-user-name/OpenROAD
+1. Click on `Branches`
+1. Click on the `Compare` button for your feature branch
+1. Select the `base` and `compare` branches, if necessary. This will be `master` and
+   `shiny-new-feature`, respectively.
+
+## Submitting the pull request
+
+If everything looks good, you are ready to make a pull request. A pull request is how
+code from a local repository becomes available to the GitHub community and can be looked
+at and eventually merged into the master version. This pull request and its associated
+changes will eventually be committed to the master branch and available in the next
+release. To submit a pull request:
+
+1. Navigate to your repository on GitHub
+1. Click on the ``Compare & pull request`` button
+1. You can then click on ``Commits`` and ``Files Changed`` to make sure everything looks
+   okay one last time
+1. Write a description of your changes in the ``Preview Discussion`` tab
+1. Click ``Send Pull Request``.
+
+This request then goes to the repository maintainers, and they will review
+the code.
+
+## Updating your pull request
+
+Based on the review you get on your pull request, you will probably need to make
+some changes to the code. In that case, you can make them in your branch,
+add a new commit to that branch, push it to GitHub, and the pull request will be
+automatically updated.  Pushing them to GitHub again is done by:
+
+```shell
+git push origin shiny-new-feature
+```
+
+This will automatically update your pull request with the latest code and restart the
+[Continuous Integration](./CI.md) tests.
+
+Another reason you might need to update your pull request is to solve conflicts
+with changes that have been merged into the master branch since you opened your
+pull request.
+
+To do this, you need to `merge upstream master` in your branch:
+
+```shell
+git checkout shiny-new-feature
+git fetch upstream
+git merge upstream/master
+```
+
+If there are no conflicts (or they could be fixed automatically), a file with a
+default commit message will open, and you can simply save and quit this file.
+
+If there are merge conflicts, you need to solve those conflicts. See 
+this [article](https://help.github.com/articles/resolving-a-merge-conflict-using-the-command-line/)
+for an explanation on how to do this.
+Once the conflicts are merged and the files where the conflicts were solved are
+added, you can run ``git commit`` to save those fixes.
+
+If you have uncommitted changes at the moment you want to update the branch with
+master, you will need to ``stash`` them prior to updating. 
+
+```{seealso}
+See the stash [docs](https://git-scm.com/book/en/v2/Git-Tools-Stashing-and-Cleaning).
+```
+This will effectively store your changes and they can be reapplied after updating.
+
+After the feature branch has been updated locally, you can now update your pull
+request by pushing to the branch on GitHub:
+
+```shell
+git push origin shiny-new-feature
+```
+
+## Tips for a successful pull request
+
+If you have made it to the `Review your code` phase, one of the core contributors may
+take a look. Please note however that a handful of people are responsible for reviewing
+all of the contributions, which can often lead to bottlenecks.
+
+To improve the chances of your pull request being reviewed, you should:
+
+- **Reference an open issue** for non-trivial changes to clarify the PR's purpose
+- **Ensure you have appropriate tests**. These should be the first part of any PR
+- **Keep your pull requests as simple as possible**. Larger PRs take longer to review
+- **Ensure that CI is in a green state**. Reviewers may not even look otherwise
+- **Keep updating your pull request**, either by request or every few days
+
+## Acknowledgements
+
+This page has been adapted from [pandas Developer Guide](https://pandas.pydata.org/docs/development/contributing.html). 

markdown/OR_docs/general/Logger.md

@@ -0,0 +1,456 @@
+# Using the Logging Infrastructure
+
+OpenROAD uses [spdlog](https://isocpp.org/blog/2014/11/spdlog) as part
+of logging infrastructure in order to ensure a clear, consistent
+messaging and complete messaging interface. A wrapper formats the prefix
+in the recommended messaging style and limit. A message format is as
+follows:
+
+``` text
+<tool id>-<message id>  <Message body>.
+```
+
+For example,
+
+``` text
+[INFO ODB-0127] Reading DEF file: ./results/asap7/aes/base/4_cts.def
+```
+
+All output from OpenROAD tools should be directed through the logging
+API to ensure that redirection, file logging and execution control flow
+are handled consistently. This also includes messages from any third-party
+tool. Use the 'ord' message ID for third-party tools.
+
+The logging infrastructure also supports generating a
+[JSON](https://www.json.org) file containing design metrics (e.g., area or
+slack). This output is directed to a user-specified file. The OpenROAD
+application has a `-metrics` command line argument to specify the file.
+
+## Handling Messages
+
+OpenROAD supports multiple levels of severity for message outputs:
+critical, error, warning, information and debug. These are supported by
+automatic calls to the logger which will then prefix the appropriate
+severity type to the message.
+
+## C++20 Requirements
+
+In C++20 the logger messages are checked during compile time which introduces
+restrictions around rutime format strings. See [docs](https://fmt.dev/latest/api.html#compile-time-format-string-checks).
+
+OpenROAD uses `spdlog` which uses `fmt_lib` under the hood. Below is an example of
+what is no longer allowed.
+
+In order to make use of runtime format strings, we have introduced a 
+`FMT_RUNTIME` macro in Logger.h. You should use this macro any time you
+pass a dynamic string as the format string 
+
+```c++
+logger_->info("{} {}", a, b); // OK
+
+void blah(std::string template& a) {
+  logger_->info(a, c); // Illegal
+  logger_->info(FMT_RUNTIME(a), c); // Ok
+}
+```
+
+## Messaging Guidelines
+
+In addition to the proper use of message types, follow the guidelines
+below to compose messages for clarity, consistency and other guidelines:
+
+### Grammar
+
+Start with a capital letter and end with a period, besides well-known
+exceptions. Use capital letters for file formats and tool proper names, e.g.,
+LEF, DEF, SPICE, FLUTE.
+
+After the first word's capitalization, do not use capital letters
+(aside from obvious exceptions, such as RSMT, hCut, etc.).
+
+Do not use exclamations. Severity must be communicated by message
+severity and clear implied or explicit action.
+
+Avoid long, verbose messages. Use commas to list and separate clauses in
+messages.
+
+Spellcheck all messages using American English spellings.
+
+Use ellipsis `...` only to indicate a pause, as when some tool is
+running or being initialized.
+
+### Abbreviations and Shortcuts
+
+Use single-word versions when well-accepted / well-understood by users
+and developers. Examples:
+`stdcell, cutline, wirelength, flipchip, padring, bondpad, wirebond, libcell, viarule`.
+
+Do not abbreviate or truncate English words; expand for the sake of clarity.
+
+``` text
+Incorrect:   Num, #;  Tot.
+```
+``` text
+Correct:     Number;  Total
+```
+
+Use acceptable, well-understood abbreviations for brevity. Examples:
+`db, tech, lib, inst, term, params, etc`.
+
+Avoid contractions of action words:
+
+``` text
+Incorrect:   Can't, Can not;  Don't
+```
+``` text
+Correct:     Cannot;  Do not
+```
+
+### Actionability
+
+Messages should communicate a clear, implied or explicit action
+that is necessary for flow continuation or improved quality of results.
+
+``` text
+Example:
+A value for core_area must be specified in the footprint specification, or in the environment variable CORE_AREA.
+```
+
+### Clarity
+
+Messages must be clear and complete, so as to communicate
+necessary and sufficient information and actions. Elaborate specific variables,
+options, and/or parameters to avoid any ambiguity.
+
+``` text
+Example:
+Unrecognized argument $arg, should be one of -pitch, -bump_pin_name, -spacing_to_edge, -cell_name, -bumps_per_tile, -rdl_layer, -rdl_width, -rdl_spacing.
+```
+
+Specify objects clearly in the local context:
+
+``` text
+Example:
+cutWithin is smaller than cutSpacing for ADJACENTCUTS on layer {}. Please check your rule definition.
+
+Incomplete:
+Warning: {} does not have viaDef aligned with layer.
+```
+
+Make any assumptions or use of default values explicit:
+
+``` text
+Example:
+No net slacks found.
+Timing-driven mode disabled.
+
+Incomplete, missing default:
+Utilization exceeds 100%.
+```
+
+Use simple language, and avoid repetitions:
+
+``` text
+Example:
+Missing orientation for cell $cell_ref.
+
+Incorrect:
+No orientation available for orientation of $cell_ref.
+```
+
+### Message Types
+
+OpenROAD supports the following levels of severity through the logger:
+report, debug, information, warning, error and critical.
+
+#### Report
+
+Report messages are output by the tool in the form of a report to the user. Examples
+include timing paths or power analysis results.
+
+Example report message:
+
+``` text
+Path startpoint: $startpoint
+```
+
+#### Debug
+
+Debug messages are only of use to tool developers and not to end users.
+These messages are not shown unless explicitly enabled.
+
+#### Information
+
+Information messages may be used to report metrics, quality of
+results, or program status to the user. Any message which indicates
+runtime problems, such as potential faulty input or other internal
+program issues, should be issued at a higher status level.
+
+Example information messages:
+
+``` text
+Number of input ports: 47
+
+Running optimization iteration 2
+
+Current cell site utilization: 57.1567%
+```
+
+#### Warning
+
+Warnings should be used to indicate atypical runtime conditions that
+may affect quality, but not correctness, of the output. Any conditions
+that affect correctness should be issued at a higher status level.
+
+Example warning messages:
+
+``` text
+Core area utilization is greater than 90%. The generated cell placement may not be routable.
+
+14 outputs are not constrained for max capacitance.
+
+Pin 'A[0]' on instance 'mem01' does not contain antenna information and will not be checked for antenna violations.
+```
+
+#### Error
+
+Error messages should be used to indicate correctness problems.
+Problems with command arguments are a good example of where error messages
+are appropriate. Errors
+exit the current command by throwing an exception that is converted to
+an error in Tcl. Errors that occur while reading a command file stop
+execution of the script commands.
+
+Example error messages:
+
+``` text
+Invalid selection: net 'test0' does not exist in the design.
+
+Cell placement cannot be run before floorplanning.
+
+Argument 'max_routing_layer' expects an integer value from 1 to 10.
+```
+
+#### Critical
+
+Critical messages should be used to indicate correctness problems
+that the program is not able to work around or ignore, and that require
+immediate exiting of the program (abort).
+
+Example critical messages:
+
+``` text
+Database 'chip' has been corrupted and is not recoverable.
+
+Unable to allocate heap memory for array 'vertexIndices'. The required memory size may exceed host machine limits.
+
+Assertion failed: 'nodeVisited == false' on line 122 of example.cpp. Please file a Github issue and attach a testcase.
+```
+
+## Coding
+
+Each status message requires:
+
+- The three letter tool ID
+- The message ID
+- The message string
+- Optionally, additional arguments to fill in placeholders in the
+    message string
+
+Reporting is simply printing and does not require a tool or message ID.
+The tool ID comes from a fixed enumeration of all the tools in the
+system. This enumeration is in `Logger.h`. New abbreviations should be
+added after discussion with the OpenROAD system architects. The abbreviation
+matches the C++ namespace for the tool.
+
+Message IDs are integers. They are expected to be unique for each tool.
+This has the benefit that a message can be mapped to the source code
+unambiguously even if the text is not unique. Maintaining this invariant
+is the tool owner's responsibility. To ensure that the IDs are unique,
+each tool should maintain a file named 'messages.txt' in the top-level
+tool directory, listing the message IDs along with the format string.
+When code that uses a message ID is removed, the ID should be retired by
+removing it from 'messages.txt'. See the utility
+`etc/find_messages.py` to scan a tool directory and write a
+`messages.txt` file.
+
+Spdlog comes with the `fmt` library which supports message formatting in a
+python or [C++20 like style](https://en.cppreference.com/w/cpp/utility/format/formatter#Standard_format_specification).
+
+The message string should not include the tool ID or message ID which
+will automatically be prepended. A trailing newline will automatically
+be added, and hence messages should not end with one. Messages should be written
+as complete sentences and end in a period. Multi-line messages may
+contain embedded new lines.
+
+Some examples:
+
+``` cpp
+logger->report("Path startpoint: {}", startpoint);
+
+logger->error(ODB, 25, "Unable to open LEF file {}.", file_name);
+
+logger->info(DRT, 42, "Routed {} nets in {:3.2f}s.", net_count, elapsed_time);
+```
+
+Tcl functions for reporting messages are defined in the OpenROAD swig
+file `OpenRoad.i`. The message is simply a Tcl string (no C++20
+formatting).
+
+``` cpp
+utl::report "Path startpoint: $startpoint"
+
+utl::error ODB 25 "Unable to open LEF file $file_name."
+
+utl::info DRT 42 "Routed $net_count nets in [format %3.2f $elapsed_time]."
+```
+
+`utl::report` should be used instead of 'puts' so that all output is
+logged.
+
+Calls to the Tcl functions `utl::warn` and `utl::error` with a single
+message argument report with tool `ID UKN` and message `ID 0000`.
+
+Tools use `#include utl/Logger.h` that defines the logger API. The Logger
+instance is owned by the OpenROAD instance. Each tool should retrieve
+the logger instance in the tool init function called after the tool make
+function by the OpenROAD application.
+
+Every tool swig file must include src/Exception.i so that errors thrown
+by `utl::error` are caught at the Tcl command level. Use the following
+swig command before `%inline`.
+
+``` swig
+%include "../../Exception.i"
+```
+
+The logger functions are shown below.
+
+``` cpp
+Logger::report(const std::string& message,
+               const Args&... args)
+Logger::info(ToolId tool,
+             int id,
+             const std::string& message,
+             const Args&... args)
+Logger::warn(ToolId tool,
+             int id,
+             const std::string& message,
+             const Args&... args)
+Logger::error(ToolId tool,
+              int id,
+              const std::string& message,
+              const Args&... args)
+Logger::critical(ToolId tool,
+                 int id,
+                 const std::string& message,
+                 const Args&... args)
+```
+
+The corresponding Tcl functions are shown below.
+
+``` tcl
+utl::report message
+utl::info tool id message
+utl::warn tool id message
+utl::error tool id message
+utl::critical tool id message
+```
+
+Although there is a `utl::critical` function, it is really difficult to
+imagine any circumstances that would justify aborting execution of the
+application in a tcl function.
+
+### Debug Messages
+
+Debug messages have a different programming model. As they are most
+often *not* issued the concern is to avoid slowing down normal
+execution. For this reason such messages are issued by using the
+debugPrint macro. This macro will avoid evaluating its arguments if they
+are not going to be printed. The API is:
+
+``` cpp
+debugPrint(logger, tool, group, level, message, ...);
+```
+
+The `debug()` method of the Logger class should not be called directly.
+No message id is used as these messages are not intended for end users.
+The level is printed as the message id in the output.
+
+The argument types are as for the info/warn/error/critical messages.
+The one additional argument is group which is a `const char*`. Its
+purpose is to allow the enabling of subsets of messages within one
+tool.
+
+Debug messages are enabled with the tcl command:
+`set_debug_level <tool> <group> <level>`
+
+## Metrics
+
+The metrics logging uses a more restricted API since JSON only supports
+specific types. There are a set of overloaded methods of the form:
+
+``` cpp
+metric(ToolId tool,
+       const std::string_view metric,
+       <type> value)
+```
+
+where `<type>` can be `int, double, string, or bool`. This will result
+in the generated JSON:
+
+``` text
+"<tool>-<metric>" : value
+```
+
+String values will be enclosed in double-quotes automatically.
+
+## Converting to Logger
+
+The error functions in `include/openroad/Error.hh` should no longer be
+included or used. Use the corresponding logger functions.
+
+All uses of the tcl functions ord::error and ord::warn should be updated
+call the `utl::error/warn` with a tool ID and message ID. For
+compatibility these are defaulted to `UKN` and `0000` until they are
+updated.
+
+Regression tests should not have any `UKN-0000` messages in their ok
+files. A simple grep should indicate that you still have pending calls
+to pre-logger error/warn functions.
+
+The `cmake` file for the tool must also be updated to include spdlog in
+the link libraries so it can find the header files if they are not in
+the normal system directories.
+
+:::{tip}
+At UCSD, dfm.ucsd.edu is an example of this problem; it has an ancient version of
+spdlog in '/usr/include/spdlog'. Use `module` to install
+spdlog 1.8.1 on dfm.ucsd.edu and check your build there.
+:::
+
+``` cmake
+target_link_libraries(<library_target>
+  PUBLIC
+    utl
+)
+```
+
+## Useful Information
+As tool developers, we can also choose to include useful information to the end user - 
+be it in the form on debugging tips, or solutions to fix the errors/warnings. We compile
+a list of such errors in this [table](../user/MessagesFinal.md). The good thing about
+this page is the ability to encode rich formatting using Markdown, enabling you
+to convey more information than what can be said from the limited messages in code.
+
+To format the information, refer to this [sample GRT information file](../main/src/grt/doc/messages/0118.md).
+In addition, make sure you create the corresponding `docs/messages` folder under the `tool` folder, 
+before creating your Markdown file with the corresponding `NUM`. 
+
+```shell
+cd src/<tool> && mkdir -p doc/messages
+cd doc/messages && touch <NUM>.md
+```
+
+### OpenROAD Tool List
+A full list of tool namespaces can be found [here](DeveloperGuide.md#tool-flow-namespace).

markdown/OR_docs/general/README.md

@@ -0,0 +1,367 @@
+# OpenROAD
+
+[![Build Status](https://jenkins.openroad.tools/buildStatus/icon?job=OpenROAD-Public%2Fmaster)](https://jenkins.openroad.tools/job/OpenROAD-Public/job/master/)
+[![Coverity Scan Status](https://scan.coverity.com/projects/the-openroad-project-openroad/badge.svg)](https://scan.coverity.com/projects/the-openroad-project-openroad)
+[![Documentation Status](https://readthedocs.org/projects/openroad/badge/?version=latest)](https://openroad.readthedocs.io/en/latest/?badge=latest)
+[![CII Best Practices](https://bestpractices.coreinfrastructure.org/projects/5370/badge)](https://bestpractices.coreinfrastructure.org/en/projects/5370)
+
+## About OpenROAD
+
+OpenROAD is the leading open-source, foundational application for
+semiconductor digital design. The OpenROAD flow delivers an
+Autonomous, No-Human-In-Loop (NHIL) flow, 24 hour turnaround from
+RTL-GDSII for rapid design exploration and physical design implementation.
+
+```{mermaid}
+:align: center
+
+%%{
+  init: {
+    'theme': 'neutral',
+    'themeVariables': {
+      'textColor': '#000000',
+      'noteTextColor' : '#000000',
+      'fontSize': '20px'
+    }
+  }
+}%%
+
+flowchart LR
+    b0[                  ] --- b2[ ] --- b4[ ] --- ORFlow --- b1[ ] --- b3[ ] --- b5[                  ]
+    style b0 stroke-width:0px, fill: #FFFFFF00, color:#FFFFFF00
+    style b1 stroke-width:0px, fill: #FFFFFF00
+    style b2 stroke-width:0px, fill: #FFFFFF00
+    style b3 stroke-width:0px, fill: #FFFFFF00
+    style b4 stroke-width:0px, fill: #FFFFFF00
+    style b5 stroke-width:0px, fill: #FFFFFF00, color:#FFFFFF00
+
+    linkStyle 0 stroke-width:0px
+    linkStyle 1 stroke-width:0px
+    linkStyle 2 stroke-width:0px
+    linkStyle 3 stroke-width:0px
+    linkStyle 4 stroke-width:0px
+    linkStyle 5 stroke-width:0px
+
+
+    subgraph ORFlow
+    direction TB
+    style ORFlow fill:#ffffff00, stroke-width:0px
+        A[Verilog\n+ libraries\n + constraints] --> FLOW
+        style A fill:#74c2b5,stroke:#000000,stroke-width:4px
+        subgraph FLOW
+        style FLOW fill:#FFFFFF00,stroke-width:4px
+
+        direction TB
+            B[Synthesis]
+            B --> C[Floorplan]
+            C --> D[Placement]
+            D --> E[Clock Tree Synthesis]
+            E --> F[Routing]
+            F --> G[Finishing]
+            style B fill:#f8cecc,stroke:#000000,stroke-width:4px
+            style C fill:#fff2cc,stroke:#000000,stroke-width:4px
+            style D fill:#cce5ff,stroke:#000000,stroke-width:4px
+            style E fill:#67ab9f,stroke:#000000,stroke-width:4px
+            style F fill:#fa6800,stroke:#000000,stroke-width:4px
+            style G fill:#ff6666,stroke:#000000,stroke-width:4px
+        end
+
+        FLOW --> H[GDSII\n Final Layout]
+        %% H --- H1[ ]
+        %% style H1 stroke-width:0px, fill: #FFFFFF00
+        %% linkStyle 11 stroke-width:0px
+        style H fill:#ff0000,stroke:#000000,stroke-width:4px
+    end
+
+```
+
+
+## OpenROAD Mission
+
+[OpenROAD](https://theopenroadproject.org/) eliminates the barriers
+of cost, schedule risk and uncertainty in hardware design to promote
+open access to rapid, low-cost IC design software and expertise and
+system innovation. The OpenROAD application enables flexible flow
+control through an API with bindings in Tcl and Python.
+
+OpenROAD is used in research and commercial applications such as,
+- [OpenROAD-flow-scripts](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts)
+  from [OpenROAD](https://theopenroadproject.org/)
+- [OpenLane](https://github.com/The-OpenROAD-Project/OpenLane) from
+  [Efabless](https://efabless.com/)
+- [Silicon Compiler](https://github.com/siliconcompiler/siliconcompiler)
+  from [Zero ASIC](https://www.zeroasic.com/)
+- [Hammer](https://docs.hammer-eda.org/en/latest/Examples/openroad-nangate45.html)
+  from [UC Berkeley](https://github.com/ucb-bar)
+- [OpenFASoC](https://github.com/idea-fasoc/OpenFASOC) from
+  [IDEA-FASoC](https://github.com/idea-fasoc) for mixed-signal design flows
+
+OpenROAD fosters a vibrant ecosystem of users through active
+collaboration and partnership through software development and key
+alliances. Our growing user community includes hardware designers,
+software engineers, industry collaborators, VLSI enthusiasts,
+students and researchers.
+
+OpenROAD strongly advocates and enables IC design-based education
+and workforce development initiatives through training content and
+courses across several global universities, the Google-SkyWater
+[shuttles](https://platform.efabless.com/projects/public) also
+includes GlobalFoundries shuttles, design contests and IC design
+workshops. The OpenROAD flow has been successfully used to date
+in over 600 silicon-ready tapeouts for technologies up to 12nm.
+
+## Getting Started with OpenROAD-flow-scripts
+
+OpenROAD provides [OpenROAD-flow-scripts](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts)
+as a native, ready-to-use prototyping and tapeout flow. However,
+it also enables the creation of any custom flow controllers based
+on the underlying tools, database and analysis engines. Please refer to the flow documentation [here](https://openroad-flow-scripts.readthedocs.io/en/latest/).
+
+OpenROAD-flow-scripts (ORFS) is a fully autonomous, RTL-GDSII flow
+for rapid architecture and design space exploration, early prediction
+of QoR and detailed physical design implementation. However, ORFS
+also enables manual intervention for finer user control of individual
+flow stages through Tcl commands and Python APIs.
+
+Figure below shows the main stages of the OpenROAD-flow-scripts:
+
+```{mermaid}
+:align: center
+
+%%{init: { 'logLevel': 'debug', 'theme': 'dark'
+  } }%%
+timeline
+  title RTL-GDSII Using OpenROAD-flow-scripts
+  Synthesis
+    : Inputs  [RTL, SDC, .lib, .lef]
+    : Logic Synthesis  (Yosys)
+    : Output files  [Netlist, SDC]
+  Floorplan
+    : Floorplan Initialization
+    : IO placement  (random)
+    : Timing-driven mixed-size placement
+    : Macro placement
+    : Tapcell and welltie insertion
+    : PDN generation
+  Placement
+    : Global placement without placed IOs
+    : IO placement  (optimized)
+    : Global placement with placed IOs
+    : Resizing and buffering
+    : Detailed placement
+  CTS : Clock Tree Synthesis
+    : Timing optimization
+    : Filler cell insertion
+  Routing
+    : Global Routing
+    : Detailed Routing
+  Finishing
+    : Metal Fill insertion
+    : Signoff timing report
+    : Generate GDSII  (KLayout)
+    : DRC/LVS check (KLayout)
+```
+
+Here are the main steps for a physical design implementation
+using OpenROAD;
+
+- `Floorplanning`
+  - Floorplan initialization - define the chip area, utilization
+  - IO pin placement (for designs without pads)
+  - Tap cell and well tie insertion
+  - PDN- power distribution network creation
+- `Global Placement` 
+  - Macro placement (RAMs, embedded macros)
+  - Standard cell placement
+  - Automatic placement optimization and repair for max slew,
+    max capacitance, and max fanout violations and long wires
+- `Detailed Placement`
+  - Legalize placement - align to grid, adhere to design rules
+  - Incremental timing analysis for early estimates
+- `Clock Tree Synthesis` 
+  - Insert buffers and resize for high fanout nets
+- `Optimize setup/hold timing`
+- `Global Routing`
+  - Antenna repair
+  - Create routing guides
+- `Detailed Routing`
+  - Legalize routes, DRC-correct routing to meet timing, power
+    constraints
+- `Chip Finishing`
+  - Parasitic extraction using OpenRCX
+  - Final timing verification
+  - Final physical verification
+  - Dummy metal fill for manufacturability
+  - Use KLayout or Magic using generated GDS for DRC signoff
+
+### GUI
+
+The OpenROAD GUI is a powerful visualization, analysis, and debugging
+tool with a customizable Tcl interface. The below figures show GUI views for
+various flow stages including floorplanning, placement congestion,
+CTS and post-routed design.
+
+#### Floorplan
+
+![ibex_floorplan.webp](./docs/images/ibex_floorplan.webp)
+
+#### Automatic Hierarchical Macro Placement
+
+![Ariane133](./docs/images/ariane133_mpl2.webp)
+
+#### Placement Congestion Visualization
+
+![pl_congestion.webp](./docs/images/pl_congestion.webp)
+
+#### CTS
+
+![clk_routing.webp](./docs/images/clk_routing.webp)
+
+#### Routing
+
+![ibex_routing.webp](./docs/images/ibex_routing.webp)
+
+### PDK Support
+
+The OpenROAD application is PDK independent. However, it has been tested
+and validated with specific PDKs in the context of various flow
+controllers.
+
+OpenLane supports SkyWater 130nm and GlobalFoundries 180nm.
+
+OpenROAD-flow-scripts supports several public and private PDKs
+including:
+
+#### Open-Source PDKs
+
+-   `GF180` - 180nm
+-   `SKY130` - 130nm
+-   `Nangate45` - 45nm
+-   `ASAP7` - Predictive FinFET 7nm
+
+#### Proprietary PDKs
+
+These PDKS are supported in OpenROAD-flow-scripts only. They are used to
+test and calibrate OpenROAD against commercial platforms and ensure good
+QoR. The PDKs and platform-specific files for these kits cannot be
+provided due to NDA restrictions. However, if you are able to access
+these platforms independently, you can create the necessary
+platform-specific files yourself.
+
+-   `GF55` - 55nm
+-   `GF12` - 12nm
+-   `Intel22` - 22nm
+-   `Intel16` - 16nm
+-   `TSMC65` - 65nm
+
+## Tapeouts
+
+OpenROAD has been used for full physical implementation in over
+600 tapeouts in SKY130 and GF180 through the Google-sponsored,
+Efabless [MPW shuttle](https://efabless.com/open_shuttle_program)
+and [ChipIgnite](https://efabless.com/) programs.
+
+![shuttle.webp](./docs/images/shuttle.webp)
+
+### OpenTitan SoC on GF12LP - Physical design and optimization using OpenROAD
+
+![OpenTitan_SoC.webp](./docs/images/OpenTitan_SoC.webp)
+
+### Continuous Tapeout Integration into CI
+
+The OpenROAD project actively adds successfully taped out MPW shuttle
+designs to the [CI regression
+testing](https://github.com/The-OpenROAD-Project/OpenLane-MPW-CI).
+Examples of designs include Open processor cores, RISC-V based SoCs,
+cryptocurrency miners, robotic app processors, amateur satellite radio
+transceivers, OpenPower-based Microwatt etc.
+
+## Build OpenROAD
+
+To build OpenROAD tools locally in your machine, follow steps
+from [here](../user/Build.md).
+
+## Regression Tests
+
+There are a set of executable regression test scripts in `./test/`.
+
+``` shell
+# run tests for all tools
+./test/regression
+
+# run all flow tests
+./test/regression flow
+
+# run <tool> tests
+./test/regression <tool>
+
+# run all <tool>-specific unit tests
+cd src/<tool>
+./test/regression
+
+# run only <TEST_NAME> for <tool>
+cd src/<tool>
+./test/regression <TEST_NAME>
+```
+
+The flow tests check results such as worst slack against reference values.
+Use `report_flow_metrics [test]...` to see all of the metrics.
+
+``` text
+% report_flow_metrics gcd_nangate45
+                       insts    area util slack_min slack_max  tns_max clk_skew max_slew max_cap max_fanout DPL ANT drv
+gcd_nangate45            368     564  8.8     0.112    -0.015     -0.1    0.004        0       0          0   0   0   0
+```
+
+To update a failing regression, follow the instructions below:
+
+```tcl
+# update log files (i.e. *ok)
+save_ok <TEST_NAME>
+
+# update "*.metrics" for tests that use flow test
+save_flow_metrics <TEST_NAME> 
+
+# update "*.metrics_limits" files
+save_flow_metrics_limits <TEST_NAME>
+```
+
+## Run
+
+``` text
+openroad [-help] [-version] [-no_init] [-exit] [-gui]
+         [-threads count|max] [-log file_name] cmd_file
+  -help              show help and exit
+  -version           show version and exit
+  -no_init           do not read .openroad init file
+  -threads count|max use count threads
+  -no_splash         do not show the license splash at startup
+  -exit              exit after reading cmd_file
+  -gui               start in gui mode
+  -python            start with python interpreter [limited to db operations]
+  -log <file_name>   write a log in <file_name>
+  cmd_file           source cmd_file
+```
+
+OpenROAD sources the Tcl command file `~/.openroad` unless the command
+line option `-no_init` is specified.
+
+OpenROAD then sources the command file `cmd_file` if it is specified on
+the command line. Unless the `-exit` command line flag is specified, it
+enters an interactive Tcl command interpreter.
+
+A list of the available tools/modules included in the OpenROAD app
+and their descriptions are available [here](../contrib/Logger.md#openroad-tool-list).
+
+## Git Quickstart
+OpenROAD uses Git for version control and contributions. 
+Get familiarised with a quickstart tutorial to contribution [here](../contrib/GitGuide.md).
+
+
+## Understanding Warning and Error Messages
+Seeing OpenROAD warnings or errors you do not understand? We have compiled a table of all messages
+and you may potentially find your answer [here](https://openroad.readthedocs.io/en/latest/user/MessagesFinal.html).
+
+## License
+
+BSD 3-Clause License. See [LICENSE](LICENSE) file.

markdown/OR_docs/general/README_2.md

@@ -0,0 +1,84 @@
+# Manpages Test Framework
+
+There are 4 regression tests we conduct for the manpages, namely:
+- Translator
+- Count output files
+- Man functionality check
+- Man-to-Tcl check
+
+There are also 2 CI tests as part of the
+They can be found in `.github/workflows/github-actions-docs-test.yml` file.
+
+## Regression tests 
+
+This is divided into static and dynamic regression tests.
+Static tests are designed to test the script functionality, whereas
+dynamic tests are designed to test the documentation compatibitity with the 
+script and will be housed in individual module folders.
+
+### Static Test
+
+#### Translator
+
+The code file can be found [here](translator.py). 
+The objective of this test is to test if the underlying `README.md`
+file can be converted to roff format via regex extraction. Namely,
+the script checks for equality in the number of function names,
+descriptors, synopsis, options and arguments detected per Tcl command.
+
+#### Man functionality check
+
+The code file can be found [here](man_func.tcl). 
+The objective of this test is to check the functionality of the Tcl
+`man` command implemented within the OpenROAD binary. 
+Mode 1 is where we run `man -manpath <CMD>`, and mode 2
+is where we do not specify the `-manpath` argument and just run
+`man <CMD>`. 
+
+This check makes sure that the files are compiled in the correct location
+and viewable by the `man` command.
+
+### Dynamic Test
+
+For all the tests below, do make sure to update it locally every 
+time you make a change to the `README.md`, update messages, or 
+make a change to the top-level `Tcl` code. 
+
+#### README-messages check
+
+The name of this test is `{MODULE}_readme_msgs_check.py`.
+The objective of this test is to check the number of
+parsed module commands and messages.
+
+### Man-to-Tcl check
+
+The name of this test is `{MODULE}_man_tcl_check.py`
+The objective of this test is to ensure that there are similar counts of 
+command in the following: `proc`, `help`, `man`. 
+
+`proc` and `help` commands are parsed from the Tcl file, whereas
+`man` commands are parsed from the README file. 
+
+## CI tests
+
+These two tests ensure that the documents and top-level Tcl files 
+are formatted properly to catch manpage extraction or compilation errors. 
+
+- Tcl Syntax Parser [code](man_tcl_params.py) 
+- Readme Syntax Parser [code](readme_parser.py)
+
+## New Test Checklist 
+
+Adding a new test called `func`, you must create/update the following:
+- `func.py|tcl`: Test script.
+- `func.ok`: Log output of the test.
+- `.*ok`: Ideal file output of the test (can be `def`, `lef` etc).
+- `regression_tests.tcl`: Update the name of the test. In this case, `func`.
+
+## Authors
+
+Jack Luar (Advisor: Cho Moon)
+
+## License
+
+BSD 3-Clause License. See [LICENSE](../../../LICENSE) file.

markdown/OR_docs/general/ReadmeFormat.md

@@ -0,0 +1,99 @@
+# Tool Name
+
+The top-level READMEs in each tool folder (`~/OpenROAD/src/<tool>/README.md`)
+has to be formatted in this particular manner. For most part, you can copy 
+the format and replace the contents where necessary.
+
+## Commands
+
+```{note}
+- Parameters in square brackets `[-param param]` are optional.
+- Parameters without square brackets `-param2 param2` are required.
+```
+
+### Command ABC
+
+```{note}
+Please add a description, even a one-liner will be sufficient to 
+avoid triggering CI errors.
+```
+
+The `command_abc` command performs...
+
+The developer arguments are...
+
+Note for commands, you must adhere to the top-level Tcl definition
+for the same command. 
+- Arguments: cannot be preceded with dashes 
+- Flags/Keys: verify if it is optional or required, then insert the 
+necessary square brackets. Also, keys have to be followed with a specifier
+whereas flags only require the `-flag` itself.
+
+As far as possible, do place the positional arguments last.
+
+```tcl
+command_abc
+    -key1 key1   
+    [-flag1]
+    [-flagDev]
+    arg1
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `arg1` | Description for `arg1`. |
+| `-key1` | Description for `key1`. |
+| `-flag1` | Description for `flag1`. |
+
+#### Developer Arguments
+
+If there are some developer arguments you want to highlight to the end user
+not to worry about - you can park them in the same level below the main
+`Options` category. 
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-flagDev` | Description for `flagDev`. |
+
+## Useful Developer Commands
+
+If you are a developer, you might find these useful. More details can be found in the [source file]() or the [swig file]().
+
+| Command Name | Description |
+| ----- | ----- |
+| `command_abc_debug` | Debug something. |
+
+## Example scripts
+
+Examples scripts demonstrating ... 
+
+```shell
+./test/asdfg.tcl
+```
+
+## Regression tests
+
+There are a set of regression tests in `./test`. Refer to this [section](../../README.md#regression-tests) for more information.
+
+Simply run the following script: 
+
+```shell
+./test/regression
+```
+
+## Limitations
+
+## FAQs
+
+Check out [GitHub discussion]()
+about this tool.
+
+## Authors
+
+## References
+
+## License
+
+BSD 3-Clause License. See [LICENSE](../../LICENSE) file.

markdown/OR_docs/general/TclFormat.md

@@ -0,0 +1,42 @@
+# Tcl Format
+
+The most important part to take note of are:
+`sta::define_cmd_args` - which defines what is printed when
+a user types `help command` in the OR shell; as well as
+`sta::parse_key_args` - which defines what keys/flags the
+command actually parses.
+
+Let us use `check_antennas` command for an example.
+
+## Specification
+
+```tcl
+sta::define_cmd_args "check_antennas" { [-verbose]\
+                                          [-net net]}
+
+proc check_antennas { args } {
+  sta::parse_key_args "check_antennas" args \
+    keys {-report_file -net} \
+    flags {-verbose -report_violating_nets}
+...
+}
+```
+
+## Do not compile
+
+If you add `;# checker off` behind the command's 
+`sta::define_cmd_args {} ` and `sta::parse_key_args {}` 
+the function will not be compiled in the Manpages and
+included in the doctests.
+
+```tcl
+sta::define_cmd_args "check_antennas" { [-verbose]\
+                                          [-net net]} ;# checker off
+
+proc check_antennas { args } {
+  sta::parse_key_args "check_antennas" args \
+    keys {-report_file -net} \
+    flags {-verbose -report_violating_nets};# checker off
+...
+}
+```

markdown/OR_docs/general/index.md

@@ -0,0 +1,80 @@
+# Welcome to OpenROAD's documentation!
+
+The OpenROAD ("Foundations and Realization of Open, Accessible Design")
+project was launched in June 2018 within the DARPA IDEA program. OpenROAD
+aims to bring down the barriers of cost, expertise and unpredictability that
+currently block designers' access to hardware implementation in advanced
+technologies. The project team (Qualcomm, Arm and multiple universities and
+partners, led by UC San Diego) is developing a fully autonomous, open-source
+tool chain for digital SoC layout generation, focusing on
+the RTL-to-GDSII phase of system-on-chip design. Thus,
+OpenROAD holistically attacks the multiple facets of today's design cost
+crisis: engineering resources, design tool licenses, project schedule,
+and risk.
+
+The IDEA program targets no-human-in-loop (NHIL) design, with 24-hour
+turnaround time and zero loss of power-performance-area (PPA) design quality.
+
+The NHIL target requires tools to adapt and auto-tune successfully to flow
+completion, without (or, with minimal) human intervention. Machine
+intelligence augments human expertise through efficient modeling and
+prediction of flow and optimization outcomes throughout the synthesis, placement
+and routing process. This is complemented by development of metrics
+and machine learning infrastructure.
+
+The 24-hour runtime target implies that problems must be strategically
+decomposed throughout the design process, with clustered and partitioned
+subproblems being solved and recomposed through intelligent distribution
+and management of computational resources. This ensures that the NHIL design
+optimization is performed within its available `[threads * hours]` "box" of
+resources. Decomposition that enables parallel and distributed search over
+cloud resources incurs a quality-of-results loss, but this is subsequently
+recovered through improved flow predictability and enhanced optimization.
+
+For a technical description of the OpenROAD flow, please refer to our DAC-2019 paper:
+[Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project](https://vlsicad.ucsd.edu/Publications/Conferences/371/c371.pdf).
+The paper is also available from [ACM Digital Library](https://dl.acm.org/doi/10.1145/3316781.3326334).
+Other publications and presentations are
+linked [here](https://theopenroadproject.org/publications/).
+
+## Documentation
+
+The OpenROAD Project has two releases:
+
+- Application ([github](https://github.com/The-OpenROAD-Project/OpenROAD)) ([docs](main/README.md)): The application is a standalone binary for digital place and route that can be used by any other RTL-GDSII flow controller.
+- Flow ([github](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts)) ([docs](https://openroad-flow-scripts.readthedocs.io/en/latest/)): This is the native OpenROAD flow that consists of a set of integrated scripts for an autonomous RTL-GDSII flow using OpenROAD and other open-source tools.
+
+## Code of conduct
+
+Please read our code of conduct [here](main/CODE_OF_CONDUCT.md).
+
+## How to contribute
+
+If you are willing to **contribute**, see the
+[Getting Involved](contrib/GettingInvolved.md) section.
+
+If you are a **developer** with EDA background, learn more about how you
+can use OpenROAD as the infrastructure for your tools in the
+[Developer Guide](contrib/DeveloperGuide.md) section.
+
+OpenROAD uses Git for version control and contributions. 
+Get familiarised with a quickstart tutorial to contribution [here](contrib/GitGuide.md).
+
+## How to get in touch
+
+We maintain the following channels for communication:
+
+-   Project homepage and news: <https://theopenroadproject.org>
+-   Twitter: <https://twitter.com/OpenROAD_EDA>
+-   Issues and bugs:
+    -   OpenROAD: <https://github.com/The-OpenROAD-Project/OpenROAD/issues>
+-   Discussions:
+    -   OpenROAD: <https://github.com/The-OpenROAD-Project/OpenROAD/discussions>
+-   Inquiries: openroad@ucsd.edu
+
+See also our [FAQs](user/FAQS.md).
+
+## Site Map
+
+```{tableofcontents}
+```

markdown/OR_docs/general/translator.md

@@ -0,0 +1,245 @@
+# Global Placement
+
+The global placement module in OpenROAD (`gpl`) is based on the open-source
+RePlAce tool, from the paper "Advancing Solution Quality and Routability Validation
+in Global Placement".
+
+Features:
+
+-   Analytic and nonlinear placement algorithm. Solves
+    electrostatic force equations using Nesterov's method.
+    ([link](https://cseweb.ucsd.edu/~jlu/papers/eplace-todaes14/paper.pdf))
+-   Verified with various commercial technologies and research enablements using OpenDB
+    (7/14/16/28/45/55/65nm).
+-   Verified deterministic solution generation with various compilers and OS.
+-   Supports Mixed-size placement mode.
+
+## Commands
+
+```{note}
+- Parameters in square brackets `[-param param]` are optional.
+- Parameters without square brackets `-param2 param2` are required.
+```
+
+### Global Placement
+
+When using the `-timing_driven` flag, `gpl` does a virtual `repair_design` 
+to find slacks and
+weight nets with low slack. It adjusts the worst slacks (modified with 
+`-timing_driven_nets_percentage`) using a multiplier (modified with 
+`-timing_driven_net_weight_max`). The multiplier
+is scaled from the full value for the worst slack, to 1.0 at the
+`timing_driven_nets_percentage` point. Use the `set_wire_rc` command to set
+resistance and capacitance of estimated wires used for timing.
+
+Routability-driven arguments
+- They begin with `-routability`.
+- `-routability_check_overflow`, `-routability_max_density`, `-routability_max_bloat_iter`, `-routability_max_inflation_iter`, `-routability_target_rc_metric`, `-routability_inflation_ratio_coef`, `-routability_max_inflation_ratio`, `-routability_rc_coefficients`
+
+Timing-driven arguments
+- They begin with `-timing_driven`.
+- `-timing_driven_net_reweight_overflow`, `-timing_driven_net_weight_max`, `-timing_driven_nets_percentage`
+
+```tcl
+global_placement
+    [-timing_driven]
+    [-routability_driven]
+    [-disable_timing_driven]
+    [-disable_routability_driven]
+    [-skip_initial_place]
+    [-incremental]
+    [-bin_grid_count grid_count]
+    [-density target_density]
+    [-init_density_penalty init_density_penalty]
+    [-init_wirelength_coef init_wirelength_coef]
+    [-min_phi_coef min_phi_conef]
+    [-max_phi_coef max_phi_coef]
+    [-reference_hpwl reference_hpwl]
+    [-overflow overflow]
+    [-initial_place_max_iter initial_place_max_iter]
+    [-initial_place_max_fanout initial_place_max_fanout]
+    [-pad_left pad_left]
+    [-pad_right pad_right]
+    [-force_cpu]
+    [-skip_io]
+    [-skip_nesterov_place]
+    [-routability_check_overflow routability_check_overflow]
+    [-routability_max_density routability_max_density]
+    [-routability_max_bloat_iter routability_max_bloat_iter]
+    [-routability_max_inflation_iter routability_max_inflation_iter]
+    [-routability_target_rc_metric routability_target_rc_metric]
+    [-routability_inflation_ratio_coef routability_inflation_ratio_coef]
+    [-routability_max_inflation_ratio routability_max_inflation_ratio]
+    [-routability_rc_coefficients routability_rc_coefficients]
+    [-timing_driven_net_reweight_overflow]
+    [-timing_driven_net_weight_max]
+    [-timing_driven_nets_percentage]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-timing_driven` | Enable timing-driven mode. See [link](#timing-driven-arguments) for timing-specific arguments. |
+| `-routability_driven` | Enable routability-driven mode. See [link](#routability-driven-arguments) for routability-specific arguments. |
+| `-skip_initial_place` | Skip the initial placement (Biconjugate gradient stabilized, or BiCGSTAB solving) before Nesterov placement. Initial placement improves HPWL by ~5% on large designs. Equivalent to `-initial_place_max_iter 0`. | 
+| `-incremental` | Enable the incremental global placement. Users would need to tune other parameters (e.g., `init_density_penalty`) with pre-placed solutions. | 
+| `-bin_grid_count` | Set bin grid's counts. The internal heuristic defines the default value. Allowed values are integers `[64,128,256,512,...]`. |
+| `-density` | Set target density. The default value is `0.7` (i.e., 70%). Allowed values are floats `[0, 1]`. |
+| `-init_density_penalty` | Set initial density penalty. The default value is `8e-5`. Allowed values are floats `[1e-6, 1e6]`. |
+| `-init_wirelength_coef` | Set initial wirelength coefficient. The default value is `0.25`. Allowed values are floats. |
+| `-min_phi_coef` | Set `pcof_min` ($\mu_k$ Lower Bound). The default value is `0.95`. Allowed values are floats `[0.95, 1.05]`. |
+| `-max_phi_coef` | Set `pcof_max` ($\mu_k$ Upper Bound). Default value is 1.05. Allowed values are `[1.00-1.20, float]`. |
+| `-overflow` | Set target overflow for termination condition. The default value is `0.1`. Allowed values are floats `[0, 1]`. |
+| `-initial_place_max_iter` | Set maximum iterations in the initial place. The default value is 20. Allowed values are integers `[0, MAX_INT]`. |
+| `-initial_place_max_fanout` | Set net escape condition in initial place when $fanout \geq initial\_place\_max\_fanout$. The default value is 200. Allowed values are integers `[1, MAX_INT]`. |
+| `-pad_left` | Set left padding in terms of number of sites. The default value is 0, and the allowed values are integers `[1, MAX_INT]` |
+| `-pad_right` | Set right padding in terms of number of sites. The default value is 0, and the allowed values are integers `[1, MAX_INT]` |
+| `-force_cpu` | Force to use the CPU solver even if the GPU is available. |
+| `-skip_io` | Flag to ignore the IO ports when computing wirelength during placement. The default value is False, allowed values are boolean. |
+
+#### Routability-Driven Arguments
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-routability_check_overflow` | Set overflow threshold for routability mode. The default value is `0.2`, and the allowed values are floats `[0, 1]`. |
+| `-routability_max_density` | Set density threshold for routability mode. The default value is `0.99`, and the allowed values are floats `[0, 1]`. |
+| `-routability_max_bloat_iter` | Set bloat iteration threshold for routability mode. The default value is `1`, and the allowed values are integers `[1, MAX_INT]`.|
+| `-routability_max_inflation_iter` | Set inflation iteration threshold for routability mode. The default value is `4`, and the allowed values are integers `[1, MAX_INT]`. |
+| `-routability_target_rc_metric` | Set target RC metric for routability mode. The default value is `1.25`, and the allowed values are floats. |
+| `-routability_inflation_ratio_coef` | Set inflation ratio coefficient for routability mode. The default value is `2.5`, and the allowed values are floats. |
+| `-routability_max_inflation_ratio` | Set inflation ratio threshold for routability mode. The default value is `2.5`, and the allowed values are floats. |
+| `-routability_rc_coefficients` | Set routability RC coefficients. It comes in the form of a Tcl List `{k1, k2, k3, k4}`. The default value for each coefficient is `{1.0, 1.0, 0.0, 0.0}` respectively, and the allowed values are floats. |
+
+#### Timing-Driven Arguments
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-timing_driven_net_reweight_overflow` | Set overflow threshold for timing-driven net reweighting. Allowed value is a Tcl list of integers where each number is `[0, 100]`. |
+| `-timing_driven_net_weight_max` | Set the multiplier for the most timing-critical nets. The default value is `1.9`, and the allowed values are floats. |
+| `-timing_driven_nets_percentage` | Set the reweighted percentage of nets in timing-driven mode. The default value is 10. Allowed values are floats `[0, 100]`. |
+
+### Cluster Flops
+
+This command does flop clustering based on parameters.
+
+```tcl
+cluster_flops
+    [-tray_weight tray_weight]\
+    [-timing_weight timing_weight]\
+    [-max_split_size max_split_size]\
+    [-num_paths num_paths]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-tray_weight` | Tray weight, default value is 20.0, type `float`. |
+| `-timing_weight` | Timing weight, default value is 1.0, type `float`. |
+| `-max_split_size` | Maximum split size, default value is -1, type `int`.|
+| `-num_paths` | KIV, default value is 0, type `int`. |
+
+
+## Useful Developer Commands
+
+If you are a developer, you might find these useful. More details can be found in the [source file](./src/replace.cpp) or the [swig file](./src/replace.i).
+
+```
+# debugging global placement 
+global_placement_debug -pause -update -inst -draw_bins -initial
+
+# adds padding and gets global placement uniform target density
+get_global_placement_uniform_density -pad_left -pad_right 
+```
+
+Example scripts demonstrating how to run `gpl` on a sample design on `core01` as follows:
+
+```shell
+./test/core01.tcl
+```
+
+## Regression tests
+
+There are a set of regression tests in `./test`. For more information, refer to this [section](../../README.md#regression-tests).
+
+Simply run the following script:
+
+```shell
+./test/regression
+```
+
+## Limitations
+
+## Using the Python interface to gpl
+
+This API tries to stay close to the API defined in `C++` class `Replace`
+that is located [here](include/gpl/Replace.h).
+
+When initializing a design, a sequence of Python commands might look like
+the following:
+
+```python
+from openroad import Design, Tech
+tech = Tech()
+tech.readLef(...)
+design = Design(tech)
+design.readDef(...)
+gpl = design.getReplace()
+```    
+
+Here is an example of some options / configurations to the global placer.
+(See [Replace.h](include/gpl/Replace.h) for a complete list)
+
+```python
+gpl.setInitialPlaceMaxIter(iter)
+gpl.setSkipIoMode(skip_io)
+gpl.setTimingDrivenMode(timing_driven)
+gpl.setTimingNetWeightMax(weight)
+```
+
+There are some useful Python functions located in the file
+[grt_aux.py](test/grt_aux.py) but these are not considered a part of the *final*
+API and they may change.
+
+## FAQs
+
+Check out [GitHub discussion](https://github.com/The-OpenROAD-Project/OpenROAD/discussions/categories/q-a?discussions_q=category%3AQ%26A+replace+in%3Atitle)
+about this tool.
+
+## References
+
+-   C.-K. Cheng, A. B. Kahng, I. Kang and L. Wang, "RePlAce: Advancing
+    Solution Quality and Routability Validation in Global Placement", IEEE
+    Transactions on Computer-Aided Design of Integrated Circuits and Systems,
+    38(9) (2019), pp. 1717-1730. [(.pdf)](https://vlsicad.ucsd.edu/Publications/Journals/j126.pdf)
+-   J. Lu, P. Chen, C.-C. Chang, L. Sha, D. J.-H. Huang, C.-C. Teng and
+    C.-K. Cheng, "ePlace: Electrostatics based Placement using Fast Fourier
+    Transform and Nesterov's Method", ACM TODAES 20(2) (2015), article 17. [(.pdf)](https://cseweb.ucsd.edu/~jlu/papers/eplace-todaes14/paper.pdf)
+-   J. Lu, H. Zhuang, P. Chen, H. Chang, C.-C. Chang, Y.-C. Wong, L. Sha,
+    D. J.-H. Huang, Y. Luo, C.-C. Teng and C.-K. Cheng, "ePlace-MS:
+    Electrostatics based Placement for Mixed-Size Circuits", IEEE TCAD 34(5)
+    (2015), pp. 685-698. [(.pdf)](https://cseweb.ucsd.edu/~jlu/papers/eplace-ms-tcad14/paper.pdf)
+-   A. B. Kahng, J. Li and L. Wang,   
+    "Improved Flop Tray-Based Design Implementation for Power Reduction",   
+    IEEE/ACM ICCAD, 2016, pp. 20:1-20:8.   
+-   The timing-driven mode has been implemented by
+    Mingyu Woo (only available in [legacy repo in standalone
+    branch](https://github.com/The-OpenROAD-Project/RePlAce/tree/standalone).)
+-   The routability-driven mode has been implemented by Mingyu Woo.
+-   Timing-driven mode re-implementation is ongoing with the current
+    clean-code structure.
+
+ ## Authors
+
+-   Authors/maintainer since Jan 2020: Mingyu Woo (Ph.D. Advisor:
+    Andrew. B. Kahng)
+-   Original open-sourcing of RePlAce: August 2018, by Ilgweon Kang
+    (Ph.D. Advisor: Chung-Kuan Cheng), Lutong Wang (Ph.D. Advisor: Andrew
+    B. Kahng), and Mingyu Woo (Ph.D. Advisor: Andrew B. Kahng).
+-   Also thanks to Dr. Jingwei Lu for open-sourcing the previous
+    ePlace-MS/ePlace project code.
+
+## License
+
+BSD 3-Clause License. See [LICENSE](LICENSE) file.

markdown/OR_docs/installation/Build.md

@@ -0,0 +1,106 @@
+# Installing OpenROAD
+
+## Build
+
+The first step, independent of the build method, is to download the repository:
+
+``` shell
+git clone --recursive https://github.com/The-OpenROAD-Project/OpenROAD.git
+cd OpenROAD
+```
+
+OpenROAD git submodules (cloned by the `--recursive` flag) are located in `src/`.
+
+The default build type is RELEASE to compile optimized code.
+The resulting executable is in `build/src/openroad`.
+
+Optional CMake variables passed as `-D<var>=<value>` arguments to CMake are show below.
+
+| Argument               | Value                     |
+|------------------------|---------------------------|
+| `CMAKE_BUILD_TYPE`     | DEBUG, RELEASE            |
+| `CMAKE_CXX_FLAGS`      | Additional compiler flags |
+| `TCL_LIBRARY`          | Path to Tcl library       |
+| `TCL_HEADER`           | Path to `tcl.h`           |
+| `ZLIB_ROOT`            | Path to `zlib`            |
+| `CMAKE_INSTALL_PREFIX` | Path to install binary    |
+
+> **Note:** There is a `openroad_build.log` file that is generated
+with every build in the build directory. In case of filing issues,
+it can be uploaded in the "Relevant log output" section of OpenROAD
+[issue forms](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/issues/new/choose).
+
+## Install dependencies
+
+You may follow our helper script to install dependencies as follows:
+``` shell
+sudo ./etc/DependencyInstaller.sh
+```
+
+> **WARNING**
+>
+> `etc/DependencyInstaller.sh` defaults to installing system 
+> packages and requires sudo access. These packages can affect
+> your environment. We recommend users install dependencies
+> locally using [setup.sh](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/setup.sh)
+> from OpenROAD-flow-scripts.
+
+### Build Manually
+
+``` shell
+mkdir build && cd build
+cmake ..
+make
+sudo make install 
+```
+
+The default install directory is `/usr/local`.
+To install in a different directory with CMake use:
+
+``` shell
+cmake .. -DCMAKE_INSTALL_PREFIX=<prefix_path>
+```
+
+Alternatively, you can use the `DESTDIR` variable with make.
+
+``` shell
+make DESTDIR=<prefix_path> install
+```
+
+### Build using support script
+
+``` shell
+./etc/Build.sh
+# To build with debug option enabled and if the Tcl library is not on the default path
+./etc/Build.sh -cmake="-DCMAKE_BUILD_TYPE=DEBUG -DTCL_LIB=/path/to/tcl/lib"
+
+# To build manpages
+./etc/Build.sh -build-man
+```
+
+The default install directory is `/usr/local`.
+To install in a different directory use:
+
+``` shell
+./etc/Build.sh -cmake="-DCMAKE_INSTALL_PREFIX=<prefix_path>"
+```
+
+### LTO Options
+By default, OpenROAD is built with link time optimizations enabled.
+This adds about 1 minute to compile times and improves the runtime
+by about 11%. If you would like to disable LTO pass 
+`-DLINK_TIME_OPTIMIZATION=OFF` when generating a build.
+
+### Build with Address Sanitizer
+To enable building with Address Sanitizer, use the argument `-DASAN=ON`.
+Setting the `ASAN` variable to `ON` adds necessary compile and link options
+for using Address Sanitizer.
+
+> **Note:** Address Sanitizer adds instrumentation for detecting memory errors.
+>  Enabling this option will cause OpenROAD to run slower and consume more RAM.
+
+### Build with Prebuilt Binaries
+
+Courtesy of [Precision Innovations](https://precisioninno.com/), there are pre-built binaries
+of OpenROAD with self-contained dependencies released on a regular basis.
+Refer to this [link](https://openroad-flow-scripts.readthedocs.io/en/latest/user/BuildWithPrebuilt.html) here.

markdown/OR_docs/installation/FAQS.md

@@ -0,0 +1,14 @@
+# FAQs
+
+If you cannot find your question/answer here, please file a GitHub issue to
+the appropriate repository or start a discussion.
+
+-   Issues and bugs:
+    -   OpenROAD: <https://github.com/The-OpenROAD-Project/OpenROAD/issues>
+-   Discussions:
+    -   OpenROAD: <https://github.com/The-OpenROAD-Project/OpenROAD/discussions>
+
+## How can I contribute?
+
+Thank you for your willingness to contribute. Please see the
+[Getting Involved](../contrib/GettingInvolved) guide.

markdown/OR_docs/tools/CODE_OF_CONDUCT.md

@@ -0,0 +1,128 @@
+# Contributor Covenant Code of Conduct
+
+## Our Pledge
+
+We as members, contributors, and leaders pledge to make participation in our
+community a harassment-free experience for everyone, regardless of age, body
+size, visible or invisible disability, ethnicity, sex characteristics, gender
+identity and expression, level of experience, education, socio-economic status,
+nationality, personal appearance, race, religion, or sexual identity
+and orientation.
+
+We pledge to act and interact in ways that contribute to an open, welcoming,
+diverse, inclusive, and healthy community.
+
+## Our Standards
+
+Examples of behavior that contributes to a positive environment for our
+community include:
+
+* Demonstrating empathy and kindness toward other people
+* Being respectful of differing opinions, viewpoints, and experiences
+* Giving and gracefully accepting constructive feedback
+* Accepting responsibility and apologizing to those affected by our mistakes,
+  and learning from the experience
+* Focusing on what is best not just for us as individuals, but for the
+  overall community
+
+Examples of unacceptable behavior include:
+
+* The use of sexualized language or imagery, and sexual attention or
+  advances of any kind
+* Trolling, insulting or derogatory comments, and personal or political attacks
+* Public or private harassment
+* Publishing others' private information, such as a physical or email
+  address, without their explicit permission
+* Other conduct which could reasonably be considered inappropriate in a
+  professional setting
+
+## Enforcement Responsibilities
+
+Community leaders are responsible for clarifying and enforcing our standards of
+acceptable behavior and will take appropriate and fair corrective action in
+response to any behavior that they deem inappropriate, threatening, offensive,
+or harmful.
+
+Community leaders have the right and responsibility to remove, edit, or reject
+comments, commits, code, wiki edits, issues, and other contributions that are
+not aligned to this Code of Conduct, and will communicate reasons for moderation
+decisions when appropriate.
+
+## Scope
+
+This Code of Conduct applies within all community spaces, and also applies when
+an individual is officially representing the community in public spaces.
+Examples of representing our community include using an official e-mail address,
+posting via an official social media account, or acting as an appointed
+representative at an online or offline event.
+
+## Enforcement
+
+Instances of abusive, harassing, or otherwise unacceptable behavior may be
+reported to the community leaders responsible for enforcement at
+complaints@openroad.tools.
+All complaints will be reviewed and investigated promptly and fairly.
+
+All community leaders are obligated to respect the privacy and security of the
+reporter of any incident.
+
+## Enforcement Guidelines
+
+Community leaders will follow these Community Impact Guidelines in determining
+the consequences for any action they deem in violation of this Code of Conduct:
+
+### 1. Correction
+
+**Community Impact**: Use of inappropriate language or other behavior deemed
+unprofessional or unwelcome in the community.
+
+**Consequence**: A private, written warning from community leaders, providing
+clarity around the nature of the violation and an explanation of why the
+behavior was inappropriate. A public apology may be requested.
+
+### 2. Warning
+
+**Community Impact**: A violation through a single incident or series
+of actions.
+
+**Consequence**: A warning with consequences for continued behavior. No
+interaction with the people involved, including unsolicited interaction with
+those enforcing the Code of Conduct, for a specified period of time. This
+includes avoiding interactions in community spaces as well as external channels
+like social media. Violating these terms may lead to a temporary or
+permanent ban.
+
+### 3. Temporary Ban
+
+**Community Impact**: A serious violation of community standards, including
+sustained inappropriate behavior.
+
+**Consequence**: A temporary ban from any sort of interaction or public
+communication with the community for a specified period of time. No public or
+private interaction with the people involved, including unsolicited interaction
+with those enforcing the Code of Conduct, is allowed during this period.
+Violating these terms may lead to a permanent ban.
+
+### 4. Permanent Ban
+
+**Community Impact**: Demonstrating a pattern of violation of community
+standards, including sustained inappropriate behavior,  harassment of an
+individual, or aggression toward or disparagement of classes of individuals.
+
+**Consequence**: A permanent ban from any sort of public interaction within
+the community.
+
+## Attribution
+
+This Code of Conduct is adapted from the [Contributor Covenant][homepage],
+version 2.0, available at
+https://www.contributor-covenant.org/version/2/0/code_of_conduct.html.
+
+Community Impact Guidelines were inspired by [Mozilla's code of conduct
+enforcement ladder](https://github.com/mozilla/inclusion).
+
+[homepage]: https://www.contributor-covenant.org
+
+For answers to common questions about this code of conduct, see the FAQ at
+https://www.contributor-covenant.org/faq. Translations are available at
+https://www.contributor-covenant.org/translations.

markdown/OR_docs/tools/README.md

@@ -0,0 +1,367 @@
+# OpenROAD
+
+[![Build Status](https://jenkins.openroad.tools/buildStatus/icon?job=OpenROAD-Public%2Fmaster)](https://jenkins.openroad.tools/job/OpenROAD-Public/job/master/)
+[![Coverity Scan Status](https://scan.coverity.com/projects/the-openroad-project-openroad/badge.svg)](https://scan.coverity.com/projects/the-openroad-project-openroad)
+[![Documentation Status](https://readthedocs.org/projects/openroad/badge/?version=latest)](https://openroad.readthedocs.io/en/latest/?badge=latest)
+[![CII Best Practices](https://bestpractices.coreinfrastructure.org/projects/5370/badge)](https://bestpractices.coreinfrastructure.org/en/projects/5370)
+
+## About OpenROAD
+
+OpenROAD is the leading open-source, foundational application for
+semiconductor digital design. The OpenROAD flow delivers an
+Autonomous, No-Human-In-Loop (NHIL) flow, 24 hour turnaround from
+RTL-GDSII for rapid design exploration and physical design implementation.
+
+```{mermaid}
+:align: center
+
+%%{
+  init: {
+    'theme': 'neutral',
+    'themeVariables': {
+      'textColor': '#000000',
+      'noteTextColor' : '#000000',
+      'fontSize': '20px'
+    }
+  }
+}%%
+
+flowchart LR
+    b0[                  ] --- b2[ ] --- b4[ ] --- ORFlow --- b1[ ] --- b3[ ] --- b5[                  ]
+    style b0 stroke-width:0px, fill: #FFFFFF00, color:#FFFFFF00
+    style b1 stroke-width:0px, fill: #FFFFFF00
+    style b2 stroke-width:0px, fill: #FFFFFF00
+    style b3 stroke-width:0px, fill: #FFFFFF00
+    style b4 stroke-width:0px, fill: #FFFFFF00
+    style b5 stroke-width:0px, fill: #FFFFFF00, color:#FFFFFF00
+
+    linkStyle 0 stroke-width:0px
+    linkStyle 1 stroke-width:0px
+    linkStyle 2 stroke-width:0px
+    linkStyle 3 stroke-width:0px
+    linkStyle 4 stroke-width:0px
+    linkStyle 5 stroke-width:0px
+
+
+    subgraph ORFlow
+    direction TB
+    style ORFlow fill:#ffffff00, stroke-width:0px
+        A[Verilog\n+ libraries\n + constraints] --> FLOW
+        style A fill:#74c2b5,stroke:#000000,stroke-width:4px
+        subgraph FLOW
+        style FLOW fill:#FFFFFF00,stroke-width:4px
+
+        direction TB
+            B[Synthesis]
+            B --> C[Floorplan]
+            C --> D[Placement]
+            D --> E[Clock Tree Synthesis]
+            E --> F[Routing]
+            F --> G[Finishing]
+            style B fill:#f8cecc,stroke:#000000,stroke-width:4px
+            style C fill:#fff2cc,stroke:#000000,stroke-width:4px
+            style D fill:#cce5ff,stroke:#000000,stroke-width:4px
+            style E fill:#67ab9f,stroke:#000000,stroke-width:4px
+            style F fill:#fa6800,stroke:#000000,stroke-width:4px
+            style G fill:#ff6666,stroke:#000000,stroke-width:4px
+        end
+
+        FLOW --> H[GDSII\n Final Layout]
+        %% H --- H1[ ]
+        %% style H1 stroke-width:0px, fill: #FFFFFF00
+        %% linkStyle 11 stroke-width:0px
+        style H fill:#ff0000,stroke:#000000,stroke-width:4px
+    end
+
+```
+
+
+## OpenROAD Mission
+
+[OpenROAD](https://theopenroadproject.org/) eliminates the barriers
+of cost, schedule risk and uncertainty in hardware design to promote
+open access to rapid, low-cost IC design software and expertise and
+system innovation. The OpenROAD application enables flexible flow
+control through an API with bindings in Tcl and Python.
+
+OpenROAD is used in research and commercial applications such as,
+- [OpenROAD-flow-scripts](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts)
+  from [OpenROAD](https://theopenroadproject.org/)
+- [OpenLane](https://github.com/The-OpenROAD-Project/OpenLane) from
+  [Efabless](https://efabless.com/)
+- [Silicon Compiler](https://github.com/siliconcompiler/siliconcompiler)
+  from [Zero ASIC](https://www.zeroasic.com/)
+- [Hammer](https://docs.hammer-eda.org/en/latest/Examples/openroad-nangate45.html)
+  from [UC Berkeley](https://github.com/ucb-bar)
+- [OpenFASoC](https://github.com/idea-fasoc/OpenFASOC) from
+  [IDEA-FASoC](https://github.com/idea-fasoc) for mixed-signal design flows
+
+OpenROAD fosters a vibrant ecosystem of users through active
+collaboration and partnership through software development and key
+alliances. Our growing user community includes hardware designers,
+software engineers, industry collaborators, VLSI enthusiasts,
+students and researchers.
+
+OpenROAD strongly advocates and enables IC design-based education
+and workforce development initiatives through training content and
+courses across several global universities, the Google-SkyWater
+[shuttles](https://platform.efabless.com/projects/public) also
+includes GlobalFoundries shuttles, design contests and IC design
+workshops. The OpenROAD flow has been successfully used to date
+in over 600 silicon-ready tapeouts for technologies up to 12nm.
+
+## Getting Started with OpenROAD-flow-scripts
+
+OpenROAD provides [OpenROAD-flow-scripts](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts)
+as a native, ready-to-use prototyping and tapeout flow. However,
+it also enables the creation of any custom flow controllers based
+on the underlying tools, database and analysis engines. Please refer to the flow documentation [here](https://openroad-flow-scripts.readthedocs.io/en/latest/).
+
+OpenROAD-flow-scripts (ORFS) is a fully autonomous, RTL-GDSII flow
+for rapid architecture and design space exploration, early prediction
+of QoR and detailed physical design implementation. However, ORFS
+also enables manual intervention for finer user control of individual
+flow stages through Tcl commands and Python APIs.
+
+Figure below shows the main stages of the OpenROAD-flow-scripts:
+
+```{mermaid}
+:align: center
+
+%%{init: { 'logLevel': 'debug', 'theme': 'dark'
+  } }%%
+timeline
+  title RTL-GDSII Using OpenROAD-flow-scripts
+  Synthesis
+    : Inputs  [RTL, SDC, .lib, .lef]
+    : Logic Synthesis  (Yosys)
+    : Output files  [Netlist, SDC]
+  Floorplan
+    : Floorplan Initialization
+    : IO placement  (random)
+    : Timing-driven mixed-size placement
+    : Macro placement
+    : Tapcell and welltie insertion
+    : PDN generation
+  Placement
+    : Global placement without placed IOs
+    : IO placement  (optimized)
+    : Global placement with placed IOs
+    : Resizing and buffering
+    : Detailed placement
+  CTS : Clock Tree Synthesis
+    : Timing optimization
+    : Filler cell insertion
+  Routing
+    : Global Routing
+    : Detailed Routing
+  Finishing
+    : Metal Fill insertion
+    : Signoff timing report
+    : Generate GDSII  (KLayout)
+    : DRC/LVS check (KLayout)
+```
+
+Here are the main steps for a physical design implementation
+using OpenROAD;
+
+- `Floorplanning`
+  - Floorplan initialization - define the chip area, utilization
+  - IO pin placement (for designs without pads)
+  - Tap cell and well tie insertion
+  - PDN- power distribution network creation
+- `Global Placement` 
+  - Macro placement (RAMs, embedded macros)
+  - Standard cell placement
+  - Automatic placement optimization and repair for max slew,
+    max capacitance, and max fanout violations and long wires
+- `Detailed Placement`
+  - Legalize placement - align to grid, adhere to design rules
+  - Incremental timing analysis for early estimates
+- `Clock Tree Synthesis` 
+  - Insert buffers and resize for high fanout nets
+- `Optimize setup/hold timing`
+- `Global Routing`
+  - Antenna repair
+  - Create routing guides
+- `Detailed Routing`
+  - Legalize routes, DRC-correct routing to meet timing, power
+    constraints
+- `Chip Finishing`
+  - Parasitic extraction using OpenRCX
+  - Final timing verification
+  - Final physical verification
+  - Dummy metal fill for manufacturability
+  - Use KLayout or Magic using generated GDS for DRC signoff
+
+### GUI
+
+The OpenROAD GUI is a powerful visualization, analysis, and debugging
+tool with a customizable Tcl interface. The below figures show GUI views for
+various flow stages including floorplanning, placement congestion,
+CTS and post-routed design.
+
+#### Floorplan
+
+![ibex_floorplan.webp](./docs/images/ibex_floorplan.webp)
+
+#### Automatic Hierarchical Macro Placement
+
+![Ariane133](./docs/images/ariane133_mpl2.webp)
+
+#### Placement Congestion Visualization
+
+![pl_congestion.webp](./docs/images/pl_congestion.webp)
+
+#### CTS
+
+![clk_routing.webp](./docs/images/clk_routing.webp)
+
+#### Routing
+
+![ibex_routing.webp](./docs/images/ibex_routing.webp)
+
+### PDK Support
+
+The OpenROAD application is PDK independent. However, it has been tested
+and validated with specific PDKs in the context of various flow
+controllers.
+
+OpenLane supports SkyWater 130nm and GlobalFoundries 180nm.
+
+OpenROAD-flow-scripts supports several public and private PDKs
+including:
+
+#### Open-Source PDKs
+
+-   `GF180` - 180nm
+-   `SKY130` - 130nm
+-   `Nangate45` - 45nm
+-   `ASAP7` - Predictive FinFET 7nm
+
+#### Proprietary PDKs
+
+These PDKS are supported in OpenROAD-flow-scripts only. They are used to
+test and calibrate OpenROAD against commercial platforms and ensure good
+QoR. The PDKs and platform-specific files for these kits cannot be
+provided due to NDA restrictions. However, if you are able to access
+these platforms independently, you can create the necessary
+platform-specific files yourself.
+
+-   `GF55` - 55nm
+-   `GF12` - 12nm
+-   `Intel22` - 22nm
+-   `Intel16` - 16nm
+-   `TSMC65` - 65nm
+
+## Tapeouts
+
+OpenROAD has been used for full physical implementation in over
+600 tapeouts in SKY130 and GF180 through the Google-sponsored,
+Efabless [MPW shuttle](https://efabless.com/open_shuttle_program)
+and [ChipIgnite](https://efabless.com/) programs.
+
+![shuttle.webp](./docs/images/shuttle.webp)
+
+### OpenTitan SoC on GF12LP - Physical design and optimization using OpenROAD
+
+![OpenTitan_SoC.webp](./docs/images/OpenTitan_SoC.webp)
+
+### Continuous Tapeout Integration into CI
+
+The OpenROAD project actively adds successfully taped out MPW shuttle
+designs to the [CI regression
+testing](https://github.com/The-OpenROAD-Project/OpenLane-MPW-CI).
+Examples of designs include Open processor cores, RISC-V based SoCs,
+cryptocurrency miners, robotic app processors, amateur satellite radio
+transceivers, OpenPower-based Microwatt etc.
+
+## Build OpenROAD
+
+To build OpenROAD tools locally in your machine, follow steps
+from [here](../user/Build.md).
+
+## Regression Tests
+
+There are a set of executable regression test scripts in `./test/`.
+
+``` shell
+# run tests for all tools
+./test/regression
+
+# run all flow tests
+./test/regression flow
+
+# run <tool> tests
+./test/regression <tool>
+
+# run all <tool>-specific unit tests
+cd src/<tool>
+./test/regression
+
+# run only <TEST_NAME> for <tool>
+cd src/<tool>
+./test/regression <TEST_NAME>
+```
+
+The flow tests check results such as worst slack against reference values.
+Use `report_flow_metrics [test]...` to see all of the metrics.
+
+``` text
+% report_flow_metrics gcd_nangate45
+                       insts    area util slack_min slack_max  tns_max clk_skew max_slew max_cap max_fanout DPL ANT drv
+gcd_nangate45            368     564  8.8     0.112    -0.015     -0.1    0.004        0       0          0   0   0   0
+```
+
+To update a failing regression, follow the instructions below:
+
+```tcl
+# update log files (i.e. *ok)
+save_ok <TEST_NAME>
+
+# update "*.metrics" for tests that use flow test
+save_flow_metrics <TEST_NAME> 
+
+# update "*.metrics_limits" files
+save_flow_metrics_limits <TEST_NAME>
+```
+
+## Run
+
+``` text
+openroad [-help] [-version] [-no_init] [-exit] [-gui]
+         [-threads count|max] [-log file_name] cmd_file
+  -help              show help and exit
+  -version           show version and exit
+  -no_init           do not read .openroad init file
+  -threads count|max use count threads
+  -no_splash         do not show the license splash at startup
+  -exit              exit after reading cmd_file
+  -gui               start in gui mode
+  -python            start with python interpreter [limited to db operations]
+  -log <file_name>   write a log in <file_name>
+  cmd_file           source cmd_file
+```
+
+OpenROAD sources the Tcl command file `~/.openroad` unless the command
+line option `-no_init` is specified.
+
+OpenROAD then sources the command file `cmd_file` if it is specified on
+the command line. Unless the `-exit` command line flag is specified, it
+enters an interactive Tcl command interpreter.
+
+A list of the available tools/modules included in the OpenROAD app
+and their descriptions are available [here](../contrib/Logger.md#openroad-tool-list).
+
+## Git Quickstart
+OpenROAD uses Git for version control and contributions. 
+Get familiarised with a quickstart tutorial to contribution [here](../contrib/GitGuide.md).
+
+
+## Understanding Warning and Error Messages
+Seeing OpenROAD warnings or errors you do not understand? We have compiled a table of all messages
+and you may potentially find your answer [here](https://openroad.readthedocs.io/en/latest/user/MessagesFinal.html).
+
+## License
+
+BSD 3-Clause License. See [LICENSE](LICENSE) file.

markdown/OR_docs/tools/src/README.md

@@ -0,0 +1,193 @@
+# OpenROAD
+
+OpenROAD is run using Tcl scripts. The following commands are used to read
+and write design data.
+
+``` shell
+read_lef [-tech] [-library] filename
+read_def filename
+write_def [-version 5.8|5.7|5.6|5.5|5.4|5.3] filename
+read_verilog filename
+write_verilog filename
+read_db filename
+write_db filename
+write_abstract_lef filename
+```
+
+Use the Tcl `source` command to read commands from a file.
+
+``` shell
+source [-echo] file
+```
+
+If an error is encountered in a command while reading the command file,
+then the error is printed and no more commands are read from the file. If
+`file_continue_on_error` is `1` then OpenROAD will continue reading commands
+after the error.
+
+If `exit_on_error` is `1` then OpenROAD will exit when it encounters an error.
+
+OpenROAD can be used to make a OpenDB database from LEF/DEF, or Verilog
+(flat or hierarchical). Once the database is made it can be saved as a file
+with the `write_db` command. OpenROAD can then read the database with the
+`read_db` command without reading LEF/DEF or Verilog.
+
+The `read_lef` and `read_def` commands can be used to build an OpenDB database
+as shown below. The `read_lef -tech` flag reads the technology portion of a
+LEF file.  The `read_lef -library` flag reads the MACROs in the LEF file.
+If neither of the `-tech` and `-library` flags are specified they default
+to `-tech -library` if no technology has been read and `-library` if a
+technology exists in the database.
+
+``` shell
+read_lef liberty1.lef
+read_def reg1.def
+# Write the db for future runs.
+write_db reg1.db
+```
+
+The `read_verilog` command is used to build an OpenDB database as shown
+below. Multiple Verilog files for a hierarchical design can be read.
+The `link_design` command is used to flatten the design and make a database.
+
+``` shell
+read_lef liberty1.lef
+read_verilog reg1.v
+link_design top
+# Write the db for future runs.
+write_db reg1.db
+```
+
+## Example scripts
+
+Example scripts demonstrating how to run OpenROAD on sample designs can
+be found in /test. Flow tests taking sample designs from synthesizable RTL Verilog
+to detail-routed final layout in the open-source technologies Nangate45 and Sky130HD are
+shown below.
+
+``` shell
+gcd_nangate45.tcl
+aes_nangate45.tcl
+tinyRocket_nangate45.tcl
+gcd_sky130hd.tcl
+aes_sky130hd.tcl
+ibex_sky130hd.tcl
+```
+
+Each of these designs use the common script `flow.tcl`.
+
+## Abstract LEF Support
+
+OpenROAD contains an abstract LEF writer that can take your current design
+and emit an abstract LEF representing the external pins of your design and
+metal obstructions.
+
+
+``` tcl
+write_abstract_lef (-bloat_factor bloat_factor|-bloat_occupied_layers) \
+		   filename
+```
+### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-bloat_factor` | Specifies the bloat factor used when bloating then merging shapes into LEF obstructions. The factor is measured in # of default metal pitches for the respective layer. A factor of `0` will result in detailed LEF obstructions |
+| `-bloat_occupied_layers` | Generates cover obstructions (obstructions over the entire layer) for each layer where shapes are present |
+
+### Examples
+```
+read reg1.db
+
+# Bloat metal shapes by 3 pitches (respectively for every layer) and then merge
+write_abstract_lef -bloat_factor 3 reg1_abstract.lef
+
+# Produce cover obstructions for each layer with shapes present
+write_abstract_lef -bloat_occupied_layers reg1_abstract.lef
+```
+
+### Global Connections
+
+#### Add global connections
+
+The `add_global_connection` command is used to specify how to connect power and ground pins on design instances to the appropriate supplies.
+
+```
+add_global_connection -net net_name \
+                      [-inst_pattern inst_regular_expression] \
+                      -pin_pattern pin_regular_expression \
+                      (-power|-ground) \
+                      [-region region_name]
+```
+
+##### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-net` | Specifies the name of the net in the design to which connections are to be added |
+| `-inst_pattern` | Optional specifies a regular expression to select a set of instances from the design. (Default: .\*) |
+| `-pin_pattern` | Species a regular expression to select pins on the selected instances to connect to the specified net |
+| `-power` | Specifies that the net it a power net |
+| `-ground` | Specifies that the net is a ground net |
+| `-region` | Specifies the name of the region for this rule |
+
+##### Examples
+```
+# Stdcell power/ground pins
+add_global_connection -net VDD -pin_pattern {^VDD$} -power
+add_global_connection -net VSS -pin_pattern {^VSS$} -ground
+
+# SRAM power ground pins
+add_global_connection -net VDD -pin_pattern {^VDDPE$}
+add_global_connection -net VDD -pin_pattern {^VDDCE$}
+add_global_connection -net VSS -pin_pattern {^VSSE$}
+```
+
+#### Perform global connections
+
+The `global_connect` command is used to connect power and ground pins on design instances to the appropriate supplies.
+
+```
+global_connect
+```
+
+#### Clear global connection rules
+
+The `clear_global_connect` command is used remove all defined global connection rules.
+
+```
+clear_global_connect
+```
+
+#### Report global connection rules
+
+The `report_global_connect` command is used print out the currently defined global connection rules.
+
+```
+report_global_connect
+```
+
+#### Report cell type usage
+
+The `report_cell_usage` command is used to print out the usage of cells for each type of cell.
+
+```
+report_cell_usage
+```
+
+## TCL functions
+
+Get the die and core areas as a list in microns: `llx lly urx ury`
+
+```
+ord::get_die_area
+ord::get_core_area
+```
+
+## FAQs
+
+Check out [GitHub discussion](https://github.com/The-OpenROAD-Project/OpenROAD/discussions/categories/q-a?discussions_q=category%3AQ%26A+openroad+in%3Atitle)
+about this tool.
+
+## License
+
+BSD 3-Clause License.

markdown/OR_docs/tools/src/ant/README.md

@@ -0,0 +1,80 @@
+# Antenna Rule Checker
+
+This tool checks antenna violations and generates a report to indicate
+violated nets. See LEF/DEF 5.8 Language Reference, Appendix C,
+"Calculating and Fixing Process Antenna Violations" (p.389) 
+for a [description](https://coriolis.lip6.fr/doc/lefdef/lefdefref/lefdefref.pdf) of antenna violations.
+
+This is an example of the detailed and simple reports of the antenna checker:
+
+| <img src="./doc/images/ant_report_print.png" width=500px> |
+
+Abbreviations Index:
+
+-   `PAR`: Partial Area Ratio
+-   `CAR`: Cumulative Area Ratio
+-   `Area`: Gate Area
+-   `S. Area`: Side Diffusion Area
+-   `C. Area`: Cumulative Gate Area
+-   `C. S. Area`: Cumulative Side (Diffusion) Area
+
+Antenna violations can be repaired after global routing with the `repair_design` command.
+
+## Commands
+
+```{note}
+- Parameters in square brackets `[-param param]` are optional.
+- Parameters without square brackets `-param2 param2` are required.
+```
+
+### Check Antennas
+
+The `check_antennas` command will check for antenna violations.
+
+```tcl
+check_antennas 
+    [-net net] 
+    [-verbose]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-verbose` | Report all antenna calculations for violating nets. |
+| `-net` | Check antennas on the specified net. |
+
+## Regression tests
+
+There are a set of regression tests in `./test`. For more information, refer to this [section](../../README.md#regression-tests).
+
+Simply run the following script:
+
+```shell
+./test/regression
+```
+
+## Limitations
+
+## FAQs
+
+Check out [GitHub discussion](https://github.com/The-OpenROAD-Project/OpenROAD/discussions/categories/q-a?discussions_q=category%3AQ%26A+antenna+in%3Atitle)
+about this tool.
+
+## Algorithm
+
+| <img src="./doc/images/example_ant.png" width=400px> | <img src="./doc/images/step1.png" width=400px> |
+| --- | --- |
+| **Antenna Checker Algorithm**: WireGraph Example | **Step 1**: (a) Start from the root node (ITerm) using upper Via to find a node for a new wire. (b) Save the ITerm area for cumulative gate/diffusion area. |
+| <img src="./doc/images/step2.png" width=400px> | <img src="./doc/images/step3.png" width=400px> |
+| **Step 2**: From the node of the wire, find all the nodes in the wire through segment wires and find the "root" node of this wire. | **Step 3**: (a) From the "root" node of the wire, along the outgoing segment edge that goes to other nodes belonging to this wire, calculate the area of this wire. (b) Then, find all the ITerms below these nodes, except for the root node (directly use an ITerm or lower Vias to find ITerms for lower metals). (c) Sum up the areas of all the ITerms found with the cumulative areas and calculate the PAR of this wire. (d) Add the PAR value and the wire info (layer, Index) into the PAR table. Add the new area to the cumulative areas. |
+| <img src="./doc/images/step4.png" width=400px> | <img src="./doc/images/step5.png" width=400px> |
+| **Step 4**: Find all the upper Vias on this wire (for all the nodes on this wire), and go to the higher-level metal. | **Step 5**: Repeat Steps 2 and 3 for new-found upper-level wires. |
+| <img src="./doc/images/step6.png" width=400px> | <img src="./doc/images/step7.png" width=400px> |
+| **Step 6**: Repeat Steps 4 and 5 until we reach a wire that cannot have upper Vias for its nodes (highest-level metal). | **Step 7**: Pick up another ITerm as a root node and repeat Steps 1 to 6, skipping the wires already in the PAR table. Repeat this for all the ITerms to get a whole PAR table. |
+| <img src="./doc/images/step8.png" width=400px> |
+| **Step 8**: (a) Pick up a gate ITerm and a node of a wire (e.g., M4,1). Find possible paths that connect them, look up the PAR value of the wires along these paths, and add them up to get the CAR of the (gate, wire) pair. (b) Compare to the AntennaRule to see if the CAR violates the rules. (c) Check this for all (gate, wire) pairs. |
+
+## License
+
+BSD 3-Clause License. See [LICENSE](../../LICENSE) file.

markdown/OR_docs/tools/src/cts/README.md

@@ -0,0 +1,167 @@
+# Clock Tree Synthesis
+
+The clock tree synthesis module in OpenROAD (`cts`) is based on TritonCTS
+2.0. It is available from the `clock_tree_synthesis` command. TritonCTS 2.0
+performs on-the-fly characterization. Thus, there is no need to generate
+characterization data. The on-the-fly characterization feature can be optionally
+controlled by parameters specified by the `configure_cts_characterization`
+command. Use `set_wire_rc` command to set the clock routing layer.
+
+## Commands
+
+```{note}
+- Parameters in square brackets `[-param param]` are optional.
+- Parameters without square brackets `-param2 param2` are required.
+```
+
+### Configure CTS Characterization
+
+Configure key CTS characterization parameters, for example maximum slew and capacitance,
+as well as the number of steps they will be divided for characterization.
+
+```tcl
+configure_cts_characterization 
+    [-max_slew max_slew]
+    [-max_cap max_cap]
+    [-slew_steps slew_steps]
+    [-cap_steps cap_steps]
+```
+
+#### Options
+
+| Switch Name | Description | 
+| ----- | ----- |
+| `-max_slew` | Max slew value (in the current time unit) that the characterization will test. If this parameter is omitted, the code would use max slew value for specified buffer in `buf_list` from liberty file. |
+| `-max_cap` | Max capacitance value (in the current capacitance unit) that the characterization will test. If this parameter is omitted, the code would use max cap value for specified buffer in `buf_list` from liberty file. |
+| `-slew_steps` | Number of steps that `max_slew` will be divided into for characterization. The default value is `12`, and the allowed values are integers `[0, MAX_INT]`. |
+| `-cap_steps` | Number of steps that `max_cap` will be divided into for characterization. The default value is `34`, and the allowed values are integers `[0, MAX_INT]`. |
+
+### Clock Tree Synthesis
+
+Perform clock tree synthesis.
+
+```tcl
+clock_tree_synthesis 
+    [-wire_unit wire_unit]
+    [-buf_list <list_of_buffers>]
+    [-root_buf root_buf]
+    [-clk_nets <list_of_clk_nets>]
+    [-tree_buf <buf>]
+    [-distance_between_buffers]
+    [-branching_point_buffers_distance]
+    [-clustering_exponent]
+    [-clustering_unbalance_ratio]
+    [-sink_clustering_size cluster_size]
+    [-sink_clustering_max_diameter max_diameter]
+    [-sink_clustering_enable]
+    [-balance_levels]
+    [-sink_clustering_levels levels]
+    [-num_static_layers]
+    [-sink_clustering_buffer]
+    [-obstruction_aware]
+    [-apply_ndr]
+    [-insertion_delay]
+    [-dont_use_dummy_load]
+    [-sink_buffer_max_cap_derate derate_value]
+    [-delay_buffer_derate derate_value]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-buf_list` | Tcl list of master cells (buffers) that will be considered when making the wire segments (e.g. `{BUFXX, BUFYY}`). |
+| `-root_buffer` | The master cell of the buffer that serves as root for the clock tree. If this parameter is omitted, the first master cell from `-buf_list` is taken. |
+| `-wire_unit` | Minimum unit distance between buffers for a specific wire. If this parameter is omitted, the code gets the value from ten times the height of `-root_buffer`. |
+| `-distance_between_buffers` | Distance (in microns) between buffers that `cts` should use when creating the tree. When using this parameter, the clock tree algorithm is simplified and only uses a fraction of the segments from the LUT. |
+| `-branching_point_buffers_distance` | Distance (in microns) that a branch has to have in order for a buffer to be inserted on a branch end-point. This requires the `-distance_between_buffers` value to be set. |
+| `-clustering_exponent` | Value that determines the power used on the difference between sink and means on the CKMeans clustering algorithm. The default value is `4`, and the allowed values are integers `[0, MAX_INT]`. |
+| `-clustering_unbalance_ratio` | Value determines each cluster's maximum capacity during CKMeans. A value of `0.5` (i.e., 50%) means that each cluster will have exactly half of all sinks for a specific region (half for each branch). The default value is `0.6`, and the allowed values are floats `[0, 1.0]`. |
+| `-sink_clustering_enable` | Enables pre-clustering of sinks to create one level of sub-tree before building H-tree. Each cluster is driven by buffer which becomes end point of H-tree structure. |
+| `-sink_clustering_size` | Specifies the maximum number of sinks per cluster. The default value is `20`, and the allowed values are integers `[0, MAX_INT]`. |
+| `-sink_clustering_max_diameter` | Specifies maximum diameter (in microns) of sink cluster. The default value is `50`, and the allowed values are integers `[0, MAX_INT]`. |
+| `-balance_levels` | Attempt to keep a similar number of levels in the clock tree across non-register cells (e.g., clock-gate or inverter). The default value is `False`, and the allowed values are bool. |
+| `-clk_nets` | String containing the names of the clock roots. If this parameter is omitted, `cts` looks for the clock roots automatically. |
+| `-num_static_layers` | Set the number of static layers. The default value is `0`, and the allowed values are integers `[0, MAX_INT]`. |
+| `-sink_clustering_buffer` | Set the sink clustering buffer(s) to be used. |
+| `-obstruction_aware` | Enables obstruction-aware buffering such that clock buffers are not placed on top of blockages or hard macros. This option may reduce legalizer displacement, leading to better latency, skew or timing QoR.  The default value is `False`, and the allowed values are bool. |
+| `-apply_ndr` | Applies 2X spacing non-default rule to all clock nets except leaf-level nets. The default value is `False`. |
+| `-dont_use_dummy_load` | Don't apply dummy buffer or inverter cells at clock tree leaves to balance loads. The default values is `False`. |
+| `-sink_buffer_max_cap_derate` | Use this option to control automatic buffer selection. To favor strong(weak) drive strength buffers use a small(large) value.  The default value is `0.01`, meaning that buffers are selected by derating max cap limit by 0.01. The value of 1.0 means no derating of max cap limit.  |
+| `-delay_buffer_derate` | This option balances latencies between macro cells and registers by inserting delay buffers.  The default value is `1.0`, meaning all needed delay buffers are inserted.  A value of 0.5 means only half of necessary delay buffers are inserted.  A value of 0.0 means no insertion of delay buffers. |
+
+### Report CTS
+
+This command is used to extract the following metrics after a successful `clock_tree_synthesis` run. 
+- Number of Clock Roots
+- Number of Buffers Inserted
+- Number of Clock Subnets
+- Number of Sinks.  
+
+```tcl
+report_cts 
+    [-out_file file]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-out_file` | The file to save `cts` reports. If this parameter is omitted, the report is streamed to `stdout` and not saved. |
+
+## Useful Developer Commands
+
+If you are a developer, you might find these useful. More details can be found in the [source file](./src/TritonCTS.cpp) or the [swig file](./src/TritonCTS.i).
+
+| Command Name | Description |
+| ----- | ----- | 
+| `clock_tree_synthesis_debug` | Option to plot the CTS to GUI. |
+
+## Example scripts
+
+```
+clock_tree_synthesis -root_buf "BUF_X4" \
+                     -buf_list "BUF_X4" \
+                     -wire_unit 20
+report_cts "file.txt"
+```
+
+## Regression tests
+
+There are a set of regression tests in `./test`. For more information, refer to this [section](../../README.md#regression-tests).
+
+Simply run the following script:
+
+```shell
+./test/regression
+```
+
+## Limitations
+
+## FAQs
+
+Check out
+[GitHub discussion](https://github.com/The-OpenROAD-Project/OpenROAD/discussions/categories/q-a?discussions_q=category%3AQ%26A+cts) about this tool.
+
+## References
+
+1.   [LEMON](https://lemon.cs.elte.hu/trac/lemon) - **L**ibrary for
+    **E**fficient **M**odeling and **O**ptimization in **N**etworks
+1.  Kahng, A. B., Li, J., & Wang, L. (2016, November). Improved flop tray-based design implementation for power reduction. In 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (pp. 1-8). IEEE. [(.pdf)](https://vlsicad.ucsd.edu/Publications/Conferences/344/c344.pdf)
+
+## Authors
+
+TritonCTS 2.0 is written by Mateus Fogaça, PhD student in the Graduate
+Program on Microelectronics from the Federal University of Rio Grande do Sul
+(UFRGS), Brazil. Mr. Fogaça's advisor is Prof. Ricardo Reis.
+
+Many guidance provided by (alphabetic order):
+-  Andrew B. Kahng
+-  Jiajia Li
+-  Kwangsoo Han
+-  Tom Spyrou
+
+## License
+
+BSD 3-Clause License. See [LICENSE](LICENSE) file.
+

markdown/OR_docs/tools/src/dft/README.md

@@ -0,0 +1,121 @@
+# DFT: Design for Testing
+
+The Design for Testing module in OpenROAD (`dft`) is an implementation of Design For Testing.
+New nets and logic are added to allow IC designs to be tested for errors in manufacturing.
+Physical imperfections can cause hard failures and variability can cause timing errors.
+
+A simple DFT insertion consist of the following parts:
+
+* A scan_in pin where the test patterns are shifted in.
+* A scan_out pin where the test patterns are read from.
+* Scan cells that replace flops with registers that allow for testing.
+* One or more scan chains (shift registers created from your scan cells).
+* A scan_enable pin to allow your design to enter and leave the test mode.
+
+## Commands
+
+```{note}
+- Parameters in square brackets `[-param param]` are optional.
+- Parameters without square brackets `-param2 param2` are required.
+```
+
+### Set DFT Config 
+
+The command `set_dft_config` sets the DFT configuration variables.
+
+```tcl
+set_dft_config 
+    [-max_length <int>]
+    [-max_chains <int>]
+    [-clock_mixing <string>]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ---- | ---- |
+| `-max_length` | The maximum number of bits that can be in each scan chain. |
+| `-max_chains` | The maximum number of scan chains that will be generated. This takes priority over `max_length`,
+in `no_mix` clock mode it specifies a maximum number of chains per clock-edge pair. |
+| `-clock_mixing` | How architect will mix the scan flops based on the clock driver. `no_mix`: Creates scan chains with only one type of clock and edge. This may create unbalanced chains. `clock_mix`: Creates scan chains mixing clocks and edges. Falling edge flops are going to be stitched before rising edge. |
+
+### Report DFT Config
+
+Prints the current DFT configuration to be used by `preview_dft` and
+`insert_dft`.
+
+```tcl
+report_dft_config
+```
+
+### Scan replace
+
+Replaces flipflops with equivalent scan flipflops. This will generally be called before
+placement, as it changes the area of cells.
+
+```tcl
+scan_replace
+```
+
+### Preview DFT
+
+Prints a preview of the scan chains that will be stitched by `insert_dft`. Use
+this command to iterate and try different DFT configurations. This command does
+not perform any modification to the design, and should be run after `scan_replace`
+and global placement.
+
+```tcl
+preview_dft
+    [-verbose]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ---- | ---- |
+| `-verbose` | Shows more information about each one of the scan chains that will be created. |
+
+### Insert DFT
+
+Architect scan chains and connect them up in a way that minimises wirelength. As a result, this
+should be run after placement, and after `scan_replace`.
+
+```tcl
+insert_dft
+```
+
+
+## Example scripts
+
+This example will create scan chains with a max length of 10 bits mixing all the
+scan flops in the scan chains.
+
+```
+set_dft_config -max_length 10 -clock_mixing clock_mix
+report_dft_config
+scan_replace
+# Run global placement...
+preview_dft -verbose
+insert_dft
+```
+
+## Regression tests
+
+There are a set of regression tests in `./test`. For more information, refer to this [section](../../README.md#regression-tests).
+
+Simply run the following script:
+
+```shell
+./test/regression
+```
+
+## Limitations
+
+* There are no optimizations for the scan chains. This is a WIP.
+* There is no way to specify existing scan ports to be used by scan insertion.
+* There is currently no way to define a user defined scan path.
+* We can only work with one bit cells.
+
+## License
+
+BSD 3-Clause License. See [LICENSE](../../LICENSE) file.

markdown/OR_docs/tools/src/dpl/README.md

@@ -0,0 +1,178 @@
+# Detailed Placement
+
+The detailed placement module in OpenROAD (`dpl`) is based on OpenDP, or 
+Open-Source Detailed Placement Engine. Its key features are: 
+
+-   Fence region.
+-   Fragmented ROWs.
+
+## Commands
+
+```{note}
+- Parameters in square brackets `[-param param]` are optional.
+- Parameters without square brackets `-param2 param2` are required.
+```
+
+### Detailed Placement
+
+The `detailed_placement` command performs detailed placement of instances
+to legal locations after global placement.
+
+```tcl
+detailed_placement
+    [-max_displacement disp|{disp_x disp_y}]
+    [-disallow_one_site_gaps]
+    [-report_file_name filename]
+```
+
+#### Options
+
+| Switch Name | Description | 
+| ----- | ----- |
+| `-max_displacement` | Max distance that an instance can be moved (in microns) when finding a site where it can be placed. Either set one value for both directions or set `{disp_x disp_y}` for individual directions. The default values are `{0, 0}`, and the allowed values within are integers `[0, MAX_INT]`. |
+| `-disallow_one_site_gaps` | Disable one site gap during placement check. |
+| `-report_file_name` | File name for saving the report to (e.g. `report.json`.) |
+
+### Set Placement Padding
+
+The `set_placement_padding` command sets left and right padding in multiples
+of the row site width. Use the `set_placement_padding` command before
+legalizing placement to leave room for routing. Use the `-global` flag
+for padding that applies to all instances. Use  `-instances`
+for instance-specific padding.  The instances `insts` can be a list of instance
+names, or an instance object returned by the SDC `get_cells` command. To
+specify padding for all instances of a common master, use the `-filter`
+"ref_name == <name>" option to `get_cells`.
+
+```tcl
+set_placement_padding   
+    -global|-masters masters|-instances insts
+    [-right site_count]
+    [-left site_count]
+```
+
+#### Options
+
+```{warning}
+Either one of these flags must be set: `-global | -masters | -instances`.
+The order of preference is `global > masters > instances`
+```
+
+| Switch Name | Description | 
+| ----- | ----- |
+| `-global` | Set padding globally using `left` and `right` values. |
+| `-masters` |  Set padding only for these masters using `left` and `right` values. | 
+| `-instances` | For `-instances`, you will set padding only for these insts using `left` and `right` values. |
+| `-left` | Left padding (in site count). |
+| `-right` | Right padding (in site count). |
+| `instances` | Set padding for these list of instances. Not to be confused with the `-instances` switch above. |
+
+### Filler Placement
+
+The `filler_placement` command fills gaps between detail-placed instances
+to connect the power and ground rails in the rows. `filler_masters` is a
+list of master/macro names to use for filling the gaps. Wildcard matching
+is supported, so `FILL*` will match, e.g., `FILLCELL_X1 FILLCELL_X16 FILLCELL_X2
+FILLCELL_X32 FILLCELL_X4 FILLCELL_X8`.  To specify a different naming prefix
+from `FILLER_` use `-prefix <new prefix>`.
+
+```tcl 
+filler_placement
+    [-prefix prefix]
+    filler_masters
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-prefix` | Prefix to name the filler cells. The default value is `FILLER_`. |
+| `filler_masters` | Filler master cells. | 
+
+### Remove Fillers
+
+This command removes all filler cells.
+
+```tcl
+remove_fillers 
+```
+
+### Check Placement
+
+The `check_placement` command checks the placement legality. It returns
+`0` if the placement is legal.
+
+```tcl
+check_placement
+    [-verbose]
+    [-disallow_one_site_gaps]
+    [-report_file_name filename]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-verbose` | Enable verbose logging. |
+| `-disallow_one_site_gaps` | Disable one site gap during placement check. |
+| `-report_file_name` | File name for saving the report to (e.g. `report.json`. |
+
+### Optimize Mirroring
+
+The `optimize_mirroring` command mirrors instances about the Y axis in
+a weak attempt to reduce the total half-perimeter wirelength (HPWL).
+
+```tcl
+optimize_mirroring
+```
+
+## Useful Developer Commands
+
+If you are a developer, you might find these useful. More details can be found in the [source file](./src/Opendp.cpp) or the [swig file](./src/Opendp.i).
+
+| Command Name | Description |
+| ----- | ----- |
+| `detailed_placement_debug` | Debug detailed placement. |
+| `get_masters_arg` | Get masters from a design. |
+| `get_inst_bbox` | Get bounding box of an instance. |
+| `get_inst_grid_bbox` | Get grid bounding box of an instance. |
+| `format_grid` | Format grid (takes in length `x` and site width `w` as inputs). |
+| `get_row_site` | Get row site name.
+
+## Example scripts
+
+Examples scripts demonstrating how to run `dpl` on a sample design of `aes` as follows:
+
+```shell
+./test/aes.tcl
+```
+
+## Regression tests
+
+There are a set of regression tests in `./test`. Refer to this [section](../../README.md#regression-tests) for more information.
+
+Simply run the following script: 
+
+```shell
+./test/regression
+```
+
+## Limitations
+
+## FAQs
+
+Check out [GitHub discussion](https://github.com/The-OpenROAD-Project/OpenROAD/discussions/categories/q-a?discussions_q=category%3AQ%26A+opendp+in%3Atitle)
+about this tool.
+
+## Authors
+
+-   SangGi Do and Mingyu Woo (respective Ph. D. advisors: Seokhyeong Kang,
+    Andrew B. Kahng).
+-   Rewrite and port to OpenDB/OpenROAD by James Cherry, Parallax Software
+
+## References
+1. Do, S., Woo, M., & Kang, S. (2019, May). Fence-region-aware mixed-height standard cell legalization. In Proceedings of the 2019 on Great Lakes Symposium on VLSI (pp. 259-262). [(.pdf)](https://dl.acm.org/doi/10.1145/3299874.3318012)
+
+## License
+
+BSD 3-Clause License. See [LICENSE](LICENSE) file.

markdown/OR_docs/tools/src/drt/README.md

@@ -0,0 +1,252 @@
+# Detailed Routing
+
+The Detailed Routing (`drt`) module in OpenROAD is based on the open-source
+detailed router, TritonRoute. TritonRoute consists of several main 
+building blocks, including pin access analysis, track assignment,
+initial detailed routing,  search and repair, and a DRC engine.
+The initial development of the
+[router](https://vlsicad.ucsd.edu/Publications/Conferences/363/c363.pdf)
+is inspired by the [ISPD-2018 initial detailed routing
+contest](http://www.ispd.cc/contests/18/).  However, the current framework
+differs and is built from scratch, aiming for an industrial-oriented scalable
+and flexible flow.
+
+TritonRoute provides industry-standard LEF/DEF interface with
+support of [ISPD-2018](http://www.ispd.cc/contests/18/) and
+[ISPD-2019](http://www.ispd.cc/contests/19/) contest-compatible route
+guide format.
+
+## Commands
+
+```{note}
+- Parameters in square brackets `[-param param]` are optional.
+- Parameters without square brackets `-param2 param2` are required.
+```
+
+### Detailed Route
+
+This command performs detailed routing.
+
+Developer arguments
+- `-or_seed`, `-or_k`
+
+Distributed arguments
+- `-distributed` , `-remote_host`, `-remote_port`, `-shared_volume`, `-cloud_size`
+
+```tcl
+detailed_route 
+    [-output_maze filename]
+    [-output_drc filename]
+    [-output_cmap filename]
+    [-output_guide_coverage filename]
+    [-drc_report_iter_step step]
+    [-db_process_node name]
+    [-disable_via_gen]
+    [-droute_end_iter iter]
+    [-via_in_pin_bottom_layer layer]
+    [-via_in_pin_top_layer layer]
+    [-or_seed seed]
+    [-or_k k]
+    [-bottom_routing_layer layer]
+    [-top_routing_layer layer]
+    [-verbose level]
+    [-distributed]
+    [-remote_host rhost]
+    [-remote_port rport]
+    [-shared_volume vol]
+    [-cloud_size sz]
+    [-clean_patches]
+    [-no_pin_access]
+    [-min_access_points count]
+    [-save_guide_updates]
+    [-repair_pdn_vias layer]
+    [-single_step_dr]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-output_maze` | Path to output maze log file (e.g. `output_maze.log`). |
+| `-output_drc` | Path to output DRC report file (e.g. `output_drc.rpt`). |
+| `-output_cmap` | Path to output congestion map file (e.g. `output.cmap`). |
+| `-output_guide_coverage` | Path to output guide coverage file (e.g. `sample_coverage.csv`). |
+| `-drc_report_iter_step` | Report DRC on each iteration which is a multiple of this step. The default value is `0`, and the allowed values are integers `[0, MAX_INT]`. |
+| `-db_process_node` | Specify the process node. |
+| `-disable_via_gen` | Option to diable via generation with bottom and top routing layer. The default value is disabled. | 
+| `-droute_end_iter` | Number of detailed routing iterations. The default value is `-1`, and the allowed values are integers `[1, 64]`. |
+| `-via_in_pin_bottom_layer` | Via-in pin bottom layer name. |
+| `-via_in_pin_top_layer` | Via-in pin top layer name. |
+| `-or_seed` | Refer to developer arguments [here](#developer-arguments). |
+| `-or_k` | Refer to developer arguments [here](#developer-arguments). |
+| `-bottom_routing_layer` | Bottommost routing layer name. |
+| `-top_routing_layer` | Topmost routing layer name. |
+| `-verbose` | Sets verbose mode if the value is greater than 1, else non-verbose mode (must be integer, or error will be triggered.) |
+| `-distributed` | Refer to distributed arguments [here](#distributed-arguments). |
+| `-clean_patches` | Clean unneeded patches during detailed routing. | 
+| `-no_pin_access` | Disables pin access for routing. |
+| `-min_access_points` | Minimum access points for standard cell and macro cell pins. | 
+| `-save_guide_updates` | Flag to save guides updates. |
+| `-repair_pdn_vias` | This option is used for PDKs where M1 and M2 power rails run in parallel. |
+
+#### Developer arguments
+
+Some arguments that are helpful for developers are listed here. 
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-or_seed` | Random seed for the order of nets to reroute. The default value is `-1`, and the allowed values are integers `[0, MAX_INT]`. | 
+| `-or_k` | Number of swaps is given by $k * sizeof(rerouteNets)$. The default value is `0`, and the allowed values are integers `[0, MAX_INT]`. |
+
+### Detailed Route Debugging
+
+The following command and arguments are useful when debugging error
+messages from `drt` and to understand its behavior.
+
+```tcl
+detailed_route_debug 
+    [-pa]
+    [-ta]
+    [-dr]
+    [-maze]
+    [-net name]
+    [-pin name]
+    [-box x1 y1 x2 y2]
+    [-iter iter]
+    [-pa_markers]
+    [-dump_dr]
+    [-dump_dir dir]
+    [-dump_last_worker]
+    [-pa_edge]
+    [-pa_commit]
+    [-write_net_tracks]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-pa` | Enable debug for pin access. |
+| `-ta` | Enable debug for track assignment. |
+| `-dr` | Enable debug for detailed routing. |
+| `-maze` | Enable debug for maze routing. | 
+| `-net` | Enable debug for net name. |
+| `-pin` | Enable debug for pin name. |
+| `-box` | Set the box for debugging given by lower left/upper right coordinates. |
+| `-worker` | Debugs routes that pass through the point `{x, y}`. |
+| `-iter` | Specifies the number of debug iterations. The default value is `0`, and the accepted values are integers `[0, MAX_INT`. |
+| `-pa_markers` | Enable pin access markers. |
+| `-dump_dr` | Filename for detailed routing dump. |
+| `-dump_dir` | Directory for detailed routing dump. |
+| `-pa_edge` | Enable visibility of pin access edges. |
+| `-pa_commit` | Enable visibility of pin access commits. |
+| `-write_net_tracks` | Enable writing of net track assigments. |
+
+### Check Pin Access
+
+This function checks pin access.
+
+```tcl
+pin_access
+    [-db_process_node name]
+    [-bottom_routing_layer layer]
+    [-top_routing_layer layer]
+    [-min_access_points count]
+    [-verbose level]
+    [-distributed]
+    [-remote_host rhost]
+    [-remote_port rport]
+    [-shared_volume vol]
+    [-cloud_size sz]
+```
+
+#### Options
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-db_process_node` | Specify process node. |
+| `-bottom_routing_layer` | Bottommost routing layer. |
+| `-top_routing_layer` | Topmost routing layer. |
+| `-min_access_points` | Minimum number of access points per pin. |
+| `-verbose` | Sets verbose mode if the value is greater than 1, else non-verbose mode (must be integer, or error will be triggered.) |
+| `-distributed` | Refer to distributed arguments [here](#distributed-arguments). |
+
+#### Distributed Arguments
+
+We have compiled all distributed arguments in this section.
+
+```{note}
+Additional setup is required. Please refer to this [guide](./doc/Distributed.md).
+```
+
+| Switch Name | Description |
+| ----- | ----- |
+| `-distributed` | Enable distributed mode with Kubernetes and Google Cloud. |
+| `-remote_host` | The host IP. |
+| `-remote_port` | The value of the port to access from. |
+| `-shared_volume` | The mount path of the nfs shared folder. |
+| `-cloud_size` | The number of workers. |
+
+## Useful Developer Commands
+
+If you are a developer, you might find these useful. More details can be found in the [source file](./src/TritonRoute.cpp) or the [swig file](./src/TritonRoute.i).
+
+| Command Name | Description |
+| ----- | ----- |
+| `detailed_route_set_default_via` | Set default via. |
+| `detailed_route_set_unidirectional_layer` | Set unidirectional layer. |
+| `step_dr` | Refer to function `detailed_route_step_drt`. | 
+| `check_drc` | Refer to function `check_drc_cmd`. |
+
+
+
+## Example scripts
+
+Example script demonstrating how to run TritonRoute on a sample design of `gcd`
+in the Nangate45 technology node.
+
+```shell
+# single machine example 
+./test/gcd_nangate45.tcl
+
+# distributed example
+./test/gcd_nangate45_distributed.tcl
+```
+
+## Regression tests
+
+There are a set of regression tests in `./test`. For more information, refer to this [section](../../README.md#regression-tests). 
+
+Simply run the following script: 
+
+```shell
+./test/regression
+```
+
+## Limitations
+
+## FAQs
+
+Check out [GitHub discussion](https://github.com/The-OpenROAD-Project/OpenROAD/discussions/categories/q-a?discussions_q=category%3AQ%26A+tritonroute+in%3Atitle)
+about this tool.
+
+## References
+
+Please cite the following paper(s) for publication:
+
+1.   A. B. Kahng, L. Wang and B. Xu, "TritonRoute: The Open Source Detailed
+    Router", IEEE Transactions on Computer-Aided Design of Integrated Circuits
+    and Systems (2020), doi:10.1109/TCAD.2020.3003234. [(.pdf)](https://ieeexplore.ieee.org/ielaam/43/9358030/9120211-aam.pdf)
+1.   A. B. Kahng, L. Wang and B. Xu, "The Tao of PAO: Anatomy of a Pin Access
+    Oracle for Detailed Routing", Proc. ACM/IEEE Design Automation Conf., 2020,
+    pp. 1-6. [(.pdf)](https://vlsicad.ucsd.edu/Publications/Conferences/377/c377.pdf)
+
+## Authors
+
+TritonRoute was developed by graduate students Lutong Wang and
+Bangqi Xu from UC San Diego, and serves as the detailed router in the
+[OpenROAD](https://theopenroadproject.org/) project.
+
+## License
+
+BSD 3-Clause License. See [LICENSE](LICENSE) file.