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SpecForge-ext/.github/ISSUE_TEMPLATE/1-bug-report.yaml

@@ -0,0 +1,38 @@
+name: 🐞 Bug report
+description: Create a report to help us reproduce and fix the bug
+title: "[Bug] "
+labels: ['Bug']
+
+body:
+- type: checkboxes
+  attributes:
+    label: Checklist
+    options:
+    - label: 1. I have searched related issues but cannot get the expected help.
+    - label: 2. The bug has not been fixed in the latest version.
+    - label: 3. Please note that if the bug-related issue you submitted lacks corresponding environment info and a minimal reproducible demo, it will be challenging for us to reproduce and resolve the issue, reducing the likelihood of receiving feedback.
+    - label: 4. If the issue you raised is not a bug but a question, please raise a discussion at https://github.com/sgl-project/SpecForge/discussions/new/choose Otherwise, it will be closed.
+    - label: 5. Please use English, otherwise it will be closed.
+- type: textarea
+  attributes:
+    label: Describe the bug
+    description: A clear and concise description of what the bug is.
+  validations:
+    required: true
+- type: textarea
+  attributes:
+    label: Reproduction
+    description: |
+      What command or script did you run? Which **model** are you using?
+    placeholder: |
+      A placeholder for the command.
+  validations:
+    required: true
+- type: textarea
+  attributes:
+    label: Environment
+    description: |
+      Please provide necessary environment information here. Otherwise the issue will be closed.
+    placeholder: Environment here.
+  validations:
+    required: true

SpecForge-ext/.github/ISSUE_TEMPLATE/2-feature-request.yaml

@@ -0,0 +1,23 @@
+name: 🚀 Feature request
+description: Suggest an idea for this project
+title: "[Feature] "
+
+body:
+- type: checkboxes
+  attributes:
+    label: Checklist
+    options:
+    - label: 1. If the issue you raised is not a feature but a question, please raise a discussion at https://github.com/sgl-project/SpecForge/discussions/new/choose Otherwise, it will be closed.
+    - label: 2. Please use English, otherwise it will be closed.
+- type: textarea
+  attributes:
+    label: Motivation
+    description: |
+      A clear and concise description of the motivation of the feature.
+  validations:
+    required: true
+- type: textarea
+  attributes:
+    label: Related resources
+    description: |
+      If there is an official code release or third-party implementations, please also provide the information here, which would be very helpful.

SpecForge-ext/.github/workflows/lint.yaml

@@ -0,0 +1,22 @@
+name: Lint
+
+on: [ pull_request ]
+
+jobs:
+  lint:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v4
+
+      - name: Set up Python
+        uses: actions/setup-python@v4
+        with:
+          python-version: '3.11'
+
+      - name: Install pre-commit hook
+        run: |
+          python -m pip install pre-commit
+          pre-commit install
+
+      - name: Linting
+        run: pre-commit run --all-files --show-diff-on-failure

SpecForge-ext/.github/workflows/publish_docs.yaml

@@ -0,0 +1,72 @@
+name: Release Documentation
+
+on:
+  push:
+    branches:
+      - main
+    paths:
+      - "docs/**"
+      - "version.txt"
+  workflow_dispatch:
+
+concurrency:
+  group: release-docs-${{ github.ref }}
+  cancel-in-progress: true
+
+jobs:
+  deploy-github-pages:
+    runs-on: ubuntu-latest
+    if: github.repository == 'sgl-project/specforge' || github.repository == 'sleepcoo/SpecForge'
+    permissions:
+      contents: write
+    steps:
+      - name: Checkout code
+        uses: actions/checkout@v4
+
+      - name: Setup Python
+        uses: actions/setup-python@v5
+        with:
+          python-version: '3.13'
+
+      - name: Setup Node.js
+        uses: actions/setup-node@v4
+        with:
+          node-version: '20'
+          cache: 'npm'
+          cache-dependency-path: docs/spec_bundle/package-lock.json
+
+      - name: Install dependencies
+        run: |
+          sudo apt-get update && sudo apt-get install -y pandoc parallel retry
+          pip install -r docs/requirements.txt
+
+      - name: Build spec bundle dashboard
+        run: |
+          # Copy logos to public directory
+          cp assets/logo.png docs/spec_bundle/public/logo.png
+          cp docs/_static/imgs/specbundle-logo.png docs/spec_bundle/public/specbundle-logo.png
+          cd docs/spec_bundle
+          npm ci
+          npm run build
+          # Clean up node_modules to prevent Sphinx from processing them
+          rm -rf node_modules
+          cd ..
+
+      - name: Build documentation
+        run: |
+          cd docs
+          make compile
+          make html
+          # Copy SpecBundle to root of output directory
+          mkdir -p _build/html/SpecBundle
+          cp -r spec_bundle/dist/* _build/html/SpecBundle/
+
+      - name: Add .nojekyll file
+        run: |
+          touch ./docs/_build/html/.nojekyll
+
+      - name: Deploy
+        uses: peaceiris/actions-gh-pages@v4
+        with:
+          github_token: ${{ secrets.GITHUB_TOKEN }}
+          publish_dir: ./docs/_build/html

SpecForge-ext/.github/workflows/publish_pypi.yaml

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+name: Publish to PyPI
+
+on:
+  workflow_dispatch:
+
+jobs:
+  build-n-publish:
+    if: github.event_name == 'workflow_dispatch'
+    name: Build and publish Python distributions to PyPI
+    runs-on: ubuntu-latest
+    timeout-minutes: 20
+    environment:
+      name: pypi
+      url: https://pypi.org/p/specforgeee
+    permissions:
+      id-token: write
+    steps:
+    - uses: actions/checkout@v2
+
+    - uses: actions/setup-python@v2
+      with:
+        python-version: '3.11'
+
+    - run: python setup.py sdist build
+
+    # publish to PyPI if executed on the main branch
+    - name: Publish package to PyPI
+      id: publish
+      uses: pypa/gh-action-pypi-publish@release/v1
+      with:
+        user: __token__
+        password: ${{ secrets.PYPI_TOKEN }}
+        verbose: true

SpecForge-ext/.github/workflows/test.yaml

@@ -0,0 +1,63 @@
+name: PR Test
+
+on:
+  pull_request:
+    branches: [ main ]
+  workflow_dispatch:
+
+concurrency:
+  group: pr-test-${{ github.ref }}
+  cancel-in-progress: true
+
+permissions:
+  contents: read
+
+jobs:
+  unit-test:
+    if: (github.repository == 'sgl-project/SpecForge' || github.event_name == 'pull_request') &&
+        github.event.pull_request.draft == false
+    runs-on: [self-hosted]
+    container:
+      image: lmsysorg/sglang:v0.5.5 # we lock to this version to avoid repeated docker pull
+      options: --gpus all --shm-size=2g --rm -v /dev/shm
+    steps:
+      - name: Checkout code
+        uses: actions/checkout@v4
+
+      - name: Restore cache
+        run: |
+          if [ -d /github/home/cache ] && [ ! -z "$(ls -A /github/home/cache/)" ]; then
+            cp -p -r /github/home/cache ./
+          fi
+
+          if [ -d /github/home/sf ] && [ ! -z "$(ls -A /github/home/sf/)" ]; then
+            cp -p -r /github/home/sf ./
+          fi
+
+      - name: Remove flashinfer # this is needed to avoid flashinfer jit compilation makes the program hang
+        run: |
+          rm -rf /github/home/.cache/flashinfer
+
+      - name: Install dependencies
+        shell: bash
+        run: |
+          # if sf venv does not exist, create it
+          if [ ! -d sf ]; then
+            uv venv sf -p 3.11
+          fi
+          source sf/bin/activate
+          uv pip install setuptools
+          MAX_JOBS=8 uv pip install -v ".[fa]" --prerelease=allow --no-build-isolation
+
+      - name: Run test
+        timeout-minutes: 30
+        shell: bash
+        run: |
+          source sf/bin/activate
+          export PYTHONPATH=$PWD
+          python -m unittest discover -s ./tests -p "test_*.py" -v
+
+      - name: Save cache
+        run: |
+          cp -p -r sf /github/home/
+          cp -p -r cache /github/home/

SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/__grp__triton_red_fused_argmax_1.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_red_fused_argmax_1.source": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.source", "triton_red_fused_argmax_1.ttir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.ttir", "triton_red_fused_argmax_1.ttgir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.ttgir", "triton_red_fused_argmax_1.llir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.llir", "triton_red_fused_argmax_1.ptx": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.ptx", "triton_red_fused_argmax_1.cubin": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.cubin", "triton_red_fused_argmax_1.json": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.json"}}

SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.json

@@ -0,0 +1 @@
+{"hash": "d764c4de3a434d91651ee340a32edffa72e41bcb0125e69cee815d3536f2f3ce", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 8, "num_ctas": 1, "num_stages": 1, "warp_size": 32, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "ptx_options": null, "ir_override": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "launch_pdl": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dot_operand_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/workspace/specforge/lib/python3.11/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "instrumentation_mode": "", "triton_version": "3.5.1", "tensordesc_meta": [], "shared": 256, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "profile_scratch_size": 0, "profile_scratch_align": 1, "name": "triton_red_fused_argmax_1"}

SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.llir

@@ -0,0 +1,206 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+target datalayout = "e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-p7:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"
+
+@global_smem = external local_unnamed_addr addrspace(3) global [0 x i8], align 16
+
+; Function Attrs: nounwind
+define ptx_kernel void @triton_red_fused_argmax_1(ptr addrspace(1) %0, ptr addrspace(1) %1, i64 %2, i64 %3, i32 %4, i32 %5, ptr addrspace(1) readnone captures(none) %6, ptr addrspace(1) readnone captures(none) %7) local_unnamed_addr #0 !dbg !4 {
+  %9 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !7
+  %10 = shl i32 %9, 6, !dbg !8
+  %11 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !9
+  %12 = and i32 %11, 252, !dbg !9
+  %13 = lshr exact i32 %12, 2, !dbg !9
+  %14 = or disjoint i32 %13, %10, !dbg !10
+  %15 = icmp slt i32 %14, %4, !dbg !11
+  %16 = and i32 %11, 3, !dbg !12
+  %17 = sext i32 %14 to i64, !dbg !13
+  %.frozen = freeze i64 %2, !dbg !14
+  %18 = sdiv i64 %17, %.frozen, !dbg !14
+  %19 = mul i64 %18, %.frozen, !dbg !13
+  %.decomposed = sub i64 %17, %19, !dbg !13
+  %20 = mul i64 %18, %3, !dbg !15
+  %.idx = mul nsw i64 %.decomposed, 128000
+  %21 = getelementptr i8, ptr addrspace(1) %0, i64 %.idx
+  %invariant.gep = getelementptr float, ptr addrspace(1) %21, i64 %20, !dbg !16
+  %.fr = freeze i1 %15
+  %22 = zext nneg i32 %16 to i64, !dbg !16
+  br i1 %.fr, label %.split.us, label %.split.preheader
+
+.split.preheader:                                 ; preds = %8
+  %invariant.gep11 = getelementptr float, ptr addrspace(1) %invariant.gep, i64 %22, !dbg !16
+  br label %.split, !dbg !16
+
+.split.us:                                        ; preds = %8, %.split.us
+  %indvars.iv7 = phi i64 [ %indvars.iv.next8, %.split.us ], [ 0, %8 ]
+  %23 = phi i32 [ %44, %.split.us ], [ 2147483647, %8 ]
+  %24 = phi float [ %42, %.split.us ], [ 0xFFF0000000000000, %8 ]
+  %25 = or disjoint i64 %indvars.iv7, %22, !dbg !17
+  %gep.us = getelementptr float, ptr addrspace(1) %invariant.gep, i64 %25, !dbg !18
+  %26 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #4, !dbg !19
+  %27 = tail call i32 asm sideeffect "mov.u32 $0, $1;\0A\09@$4 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $2 + 0 ], $3;", "=r,r,l,l,b"(i32 0, ptr addrspace(1) %gep.us, i64 %26, i1 true) #4, !dbg !19
+  %28 = bitcast i32 %27 to float, !dbg !19
+  %29 = fcmp ogt float %24, %28, !dbg !20
+  %30 = fcmp oeq float %24, %28, !dbg !24
+  %31 = fcmp uno float %24, 0.000000e+00, !dbg !25
+  %32 = fcmp uno float %28, 0.000000e+00, !dbg !26
+  %33 = xor i1 %32, true, !dbg !27
+  %34 = and i1 %31, %33, !dbg !28
+  %35 = or i1 %29, %34, !dbg !29
+  %36 = and i1 %31, %32, !dbg !30
+  %37 = or i1 %30, %36, !dbg !31
+  %38 = sext i32 %23 to i64, !dbg !32
+  %39 = icmp sgt i64 %25, %38, !dbg !32
+  %40 = and i1 %39, %37, !dbg !33
+  %41 = or i1 %35, %40, !dbg !34
+  %42 = select i1 %41, float %24, float %28, !dbg !35
+  %43 = trunc nuw nsw i64 %25 to i32, !dbg !36
+  %44 = select i1 %41, i32 %23, i32 %43, !dbg !36
+  %indvars.iv.next8 = add nuw nsw i64 %indvars.iv7, 4, !dbg !16
+  %45 = icmp samesign ult i64 %indvars.iv7, 31996, !dbg !16
+  br i1 %45, label %.split.us, label %.split3.us, !dbg !16
+
+.split:                                           ; preds = %.split.preheader, %.split
+  %indvars.iv = phi i64 [ 0, %.split.preheader ], [ %indvars.iv.next, %.split ]
+  %gep12 = getelementptr float, ptr addrspace(1) %invariant.gep11, i64 %indvars.iv, !dbg !18
+  %46 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #4, !dbg !19
+  %47 = tail call i32 asm sideeffect "mov.u32 $0, $1;\0A\09@$4 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $2 + 0 ], $3;", "=r,r,l,l,b"(i32 0, ptr addrspace(1) %gep12, i64 %46, i1 false) #4, !dbg !19
+  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 4, !dbg !16
+  %48 = icmp samesign ult i64 %indvars.iv, 31996, !dbg !16
+  br i1 %48, label %.split, label %.split3.us, !dbg !16
+
+.split3.us:                                       ; preds = %.split, %.split.us
+  %.us-phi = phi float [ %42, %.split.us ], [ 0xFFF0000000000000, %.split ], !dbg !9
+  %.us-phi4 = phi i32 [ %44, %.split.us ], [ 2147483647, %.split ], !dbg !9
+  %49 = and i32 %11, 63, !dbg !9
+  %50 = or disjoint i32 %10, %49, !dbg !10
+  %51 = icmp slt i32 %50, %4, !dbg !11
+  %52 = bitcast float %.us-phi to i32, !dbg !37
+  %53 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %52, i32 2, i32 31), !dbg !37
+  %54 = bitcast i32 %53 to float, !dbg !37
+  %55 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %.us-phi4, i32 2, i32 31), !dbg !37
+  %56 = fcmp ogt float %.us-phi, %54, !dbg !39
+  %57 = fcmp oeq float %.us-phi, %54, !dbg !40
+  %58 = fcmp uno float %.us-phi, 0.000000e+00, !dbg !41
+  %59 = fcmp uno float %54, 0.000000e+00, !dbg !42
+  %60 = xor i1 %59, true, !dbg !43
+  %61 = and i1 %58, %60, !dbg !44
+  %62 = or i1 %56, %61, !dbg !45
+  %63 = and i1 %58, %59, !dbg !46
+  %64 = or i1 %57, %63, !dbg !47
+  %65 = icmp slt i32 %.us-phi4, %55, !dbg !48
+  %66 = and i1 %65, %64, !dbg !49
+  %67 = or i1 %62, %66, !dbg !50
+  %68 = select i1 %67, float %.us-phi, float %54, !dbg !51
+  %69 = select i1 %67, i32 %.us-phi4, i32 %55, !dbg !52
+  %70 = bitcast float %68 to i32, !dbg !37
+  %71 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %70, i32 1, i32 31), !dbg !37
+  %72 = bitcast i32 %71 to float, !dbg !37
+  %73 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %69, i32 1, i32 31), !dbg !37
+  %74 = fcmp ogt float %68, %72, !dbg !39
+  %75 = fcmp oeq float %68, %72, !dbg !40
+  %76 = fcmp uno float %68, 0.000000e+00, !dbg !41
+  %77 = fcmp uno float %72, 0.000000e+00, !dbg !42
+  %78 = xor i1 %77, true, !dbg !43
+  %79 = and i1 %76, %78, !dbg !44
+  %80 = or i1 %74, %79, !dbg !45
+  %81 = and i1 %77, %76, !dbg !46
+  %82 = or i1 %75, %81, !dbg !47
+  %83 = icmp slt i32 %69, %73, !dbg !48
+  %84 = and i1 %83, %82, !dbg !49
+  %85 = or i1 %80, %84, !dbg !50
+  %86 = select i1 %85, i32 %69, i32 %73, !dbg !52
+  %87 = sext i32 %50 to i64, !dbg !53
+  %88 = getelementptr i64, ptr addrspace(1) %1, i64 %87, !dbg !53
+  %89 = getelementptr inbounds nuw i8, ptr addrspace(3) @global_smem, i32 %12, !dbg !54
+  %90 = insertelement <1 x i32> poison, i32 %86, i64 0, !dbg !54
+  store <1 x i32> %90, ptr addrspace(3) %89, align 4, !dbg !54
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !54
+  %91 = shl nuw nsw i32 %49, 2, !dbg !54
+  %92 = getelementptr inbounds nuw i8, ptr addrspace(3) @global_smem, i32 %91, !dbg !54
+  %93 = load i32, ptr addrspace(3) %92, align 4, !dbg !54
+  %94 = sext i32 %93 to i64, !dbg !54
+  %95 = and i32 %11, 192, !dbg !54
+  %96 = icmp eq i32 %95, 0, !dbg !54
+  %97 = and i1 %96, %51, !dbg !54
+  tail call void asm sideeffect "@$2 st.global.b64 [ $1 + 0 ], { $0 };", "l,l,b"(i64 %94, ptr addrspace(1) %88, i1 %97) #4, !dbg !54
+  ret void, !dbg !55
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 2147483647) i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #1
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #2
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier.cta.sync.aligned.all(i32) #3
+
+attributes #0 = { nounwind "nvvm.reqntid"="256" }
+attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #2 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #3 = { convergent nocallback nounwind }
+attributes #4 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly)
+!1 = !DIFile(filename: "c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py", directory: "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w")
+!2 = !{i32 2, !"Debug Info Version", i32 3}
+!3 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!4 = distinct !DISubprogram(name: "triton_red_fused_argmax_1", linkageName: "triton_red_fused_argmax_1", scope: !1, file: !1, line: 18, type: !5, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
+!5 = !DISubroutineType(cc: DW_CC_normal, types: !6)
+!6 = !{}
+!7 = !DILocation(line: 22, column: 28, scope: !4)
+!8 = !DILocation(line: 22, column: 33, scope: !4)
+!9 = !DILocation(line: 23, column: 44, scope: !4)
+!10 = !DILocation(line: 23, column: 23, scope: !4)
+!11 = !DILocation(line: 24, column: 21, scope: !4)
+!12 = !DILocation(line: 25, column: 37, scope: !4)
+!13 = !DILocation(line: 27, column: 19, scope: !4)
+!14 = !DILocation(line: 28, column: 19, scope: !4)
+!15 = !DILocation(line: 38, column: 56, scope: !4)
+!16 = !DILocation(line: 32, column: 40, scope: !4)
+!17 = !DILocation(line: 33, column: 31, scope: !4)
+!18 = !DILocation(line: 38, column: 34, scope: !4)
+!19 = !DILocation(line: 38, column: 61, scope: !4)
+!20 = !DILocation(line: 144, column: 21, scope: !21, inlinedAt: !23)
+!21 = distinct !DILexicalBlockFile(scope: !4, file: !22, discriminator: 0)
+!22 = !DIFile(filename: "triton_helpers.py", directory: "/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime")
+!23 = !DILocation(line: 41, column: 38, scope: !4)
+!24 = !DILocation(line: 145, column: 23, scope: !21, inlinedAt: !23)
+!25 = !DILocation(line: 147, column: 29, scope: !21, inlinedAt: !23)
+!26 = !DILocation(line: 148, column: 29, scope: !21, inlinedAt: !23)
+!27 = !DILocation(line: 149, column: 31, scope: !21, inlinedAt: !23)
+!28 = !DILocation(line: 149, column: 27, scope: !21, inlinedAt: !23)
+!29 = !DILocation(line: 149, column: 16, scope: !21, inlinedAt: !23)
+!30 = !DILocation(line: 151, column: 27, scope: !21, inlinedAt: !23)
+!31 = !DILocation(line: 151, column: 17, scope: !21, inlinedAt: !23)
+!32 = !DILocation(line: 154, column: 31, scope: !21, inlinedAt: !23)
+!33 = !DILocation(line: 154, column: 21, scope: !21, inlinedAt: !23)
+!34 = !DILocation(line: 154, column: 12, scope: !21, inlinedAt: !23)
+!35 = !DILocation(line: 155, column: 35, scope: !21, inlinedAt: !23)
+!36 = !DILocation(line: 155, column: 69, scope: !21, inlinedAt: !23)
+!37 = !DILocation(line: 165, column: 42, scope: !21, inlinedAt: !38)
+!38 = !DILocation(line: 45, column: 75, scope: !4)
+!39 = !DILocation(line: 144, column: 21, scope: !21, inlinedAt: !38)
+!40 = !DILocation(line: 145, column: 23, scope: !21, inlinedAt: !38)
+!41 = !DILocation(line: 147, column: 29, scope: !21, inlinedAt: !38)
+!42 = !DILocation(line: 148, column: 29, scope: !21, inlinedAt: !38)
+!43 = !DILocation(line: 149, column: 31, scope: !21, inlinedAt: !38)
+!44 = !DILocation(line: 149, column: 27, scope: !21, inlinedAt: !38)
+!45 = !DILocation(line: 149, column: 16, scope: !21, inlinedAt: !38)
+!46 = !DILocation(line: 151, column: 27, scope: !21, inlinedAt: !38)
+!47 = !DILocation(line: 151, column: 17, scope: !21, inlinedAt: !38)
+!48 = !DILocation(line: 154, column: 31, scope: !21, inlinedAt: !38)
+!49 = !DILocation(line: 154, column: 21, scope: !21, inlinedAt: !38)
+!50 = !DILocation(line: 154, column: 12, scope: !21, inlinedAt: !38)
+!51 = !DILocation(line: 155, column: 35, scope: !21, inlinedAt: !38)
+!52 = !DILocation(line: 155, column: 69, scope: !21, inlinedAt: !38)
+!53 = !DILocation(line: 47, column: 25, scope: !4)
+!54 = !DILocation(line: 47, column: 36, scope: !4)
+!55 = !DILocation(line: 47, column: 4, scope: !4)

SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.ptx

@@ -0,0 +1,490 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.7
+.target sm_90a
+.address_size 64
+
+	// .globl	triton_red_fused_argmax_1 // -- Begin function triton_red_fused_argmax_1
+.extern .shared .align 16 .b8 global_smem[];
+                                        // @triton_red_fused_argmax_1
+.visible .entry triton_red_fused_argmax_1(
+	.param .u64 .ptr .global .align 1 triton_red_fused_argmax_1_param_0,
+	.param .u64 .ptr .global .align 1 triton_red_fused_argmax_1_param_1,
+	.param .u64 triton_red_fused_argmax_1_param_2,
+	.param .u64 triton_red_fused_argmax_1_param_3,
+	.param .u32 triton_red_fused_argmax_1_param_4,
+	.param .u32 triton_red_fused_argmax_1_param_5,
+	.param .u64 .ptr .global .align 1 triton_red_fused_argmax_1_param_6,
+	.param .u64 .ptr .global .align 1 triton_red_fused_argmax_1_param_7
+)
+.reqntid 256
+{
+	.reg .pred 	%p<39>;
+	.reg .b32 	%r<55>;
+	.reg .b64 	%rd<54>;
+	.loc	1 18 0                          // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:18:0
+$L__func_begin0:
+	.loc	1 18 0                          // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:18:0
+
+// %bb.0:
+	ld.param.b32 	%r12, [triton_red_fused_argmax_1_param_4];
+$L__tmp0:
+	.loc	1 22 28                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:22:28
+	mov.u32 	%r13, %ctaid.x;
+	.loc	1 22 33                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:22:33
+	shl.b32 	%r1, %r13, 6;
+	ld.param.b64 	%rd20, [triton_red_fused_argmax_1_param_2];
+	.loc	1 23 44                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:23:44
+	mov.u32 	%r2, %tid.x;
+	bfe.u32 	%r4, %r2, 2, 6;
+	.loc	1 23 23                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:23:23
+	or.b32 	%r14, %r4, %r1;
+	.loc	1 25 37                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:25:37
+	and.b32 	%r5, %r2, 3;
+	.loc	1 27 19                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:27:19
+	cvt.s64.s32 	%rd1, %r14;
+	.loc	1 28 19                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:28:19
+	or.b64 	%rd21, %rd1, %rd20;
+	and.b64 	%rd22, %rd21, -4294967296;
+	setp.ne.b64 	%p1, %rd22, 0;
+	cvt.u32.u64 	%r50, %rd1;
+	@%p1 bra 	$L__BB0_2;
+	bra.uni 	$L__BB0_1;
+$L__BB0_2:
+	div.s64 	%rd49, %rd1, %rd20;
+	bra.uni 	$L__BB0_3;
+$L__BB0_1:
+	cvt.u32.u64 	%r15, %rd20;
+	div.u32 	%r17, %r50, %r15;
+	cvt.u64.u32 	%rd49, %r17;
+$L__BB0_3:
+	.loc	1 0 19                          // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:0:19
+	ld.param.b64 	%rd19, [triton_red_fused_argmax_1_param_3];
+	ld.param.b64 	%rd18, [triton_red_fused_argmax_1_param_1];
+	ld.param.b64 	%rd17, [triton_red_fused_argmax_1_param_0];
+	and.b32 	%r3, %r2, 252;
+	.loc	1 32 40                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:32:40
+	cvt.u64.u32 	%rd6, %r5;
+	setp.ge.s32 	%p2, %r50, %r12;
+	@%p2 bra 	$L__BB0_6;
+// %bb.4:                               // %.split.us.preheader
+	shl.b64 	%rd35, %rd19, 2;
+	mul.lo.s64 	%rd36, %rd20, 128000;
+	sub.s64 	%rd37, %rd35, %rd36;
+	mul.lo.s64 	%rd38, %rd49, %rd37;
+	add.s32 	%r26, %r1, %r4;
+	mad.wide.s32 	%rd39, %r26, 128000, %rd38;
+	shl.b64 	%rd40, %rd6, 2;
+	add.s64 	%rd41, %rd39, %rd40;
+	add.s64 	%rd50, %rd17, %rd41;
+	mov.b32 	%r53, 0fFF800000;
+	mov.b32 	%r54, 2147483647;
+	mov.b64 	%rd51, 0;
+$L__BB0_5:                              // %.split.us
+                                        // =>This Inner Loop Header: Depth=1
+	.loc	1 38 34                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:38:34
+	add.s64 	%rd45, %rd6, %rd51;
+	.loc	1 38 61                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:38:61
+	// begin inline asm
+	mov.u64 %rd42, 0x0;
+	createpolicy.fractional.L2::evict_first.b64 %rd42, 1.0;
+	// end inline asm
+	mov.b32 	%r28, 0;
+	mov.pred 	%p5, -1;
+	// begin inline asm
+	mov.u32 %r27, %r28;
+	@%p5 ld.global.L1::evict_first.L2::cache_hint.b32 { %r27 }, [ %rd50 + 0 ], %rd42;
+	// end inline asm
+$L__tmp1:
+	.loc	2 144 21                        // triton_helpers.py:144:21 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	setp.gt.f32 	%p6, %r53, %r27;
+	.loc	2 145 23                        // triton_helpers.py:145:23 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	setp.eq.f32 	%p7, %r53, %r27;
+	.loc	2 147 29                        // triton_helpers.py:147:29 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	setp.nan.f32 	%p8, %r53, %r53;
+	.loc	2 148 29                        // triton_helpers.py:148:29 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	setp.nan.f32 	%p9, %r27, %r27;
+	setp.num.f32 	%p10, %r27, %r27;
+	.loc	2 149 27                        // triton_helpers.py:149:27 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	and.pred 	%p11, %p8, %p10;
+	.loc	2 149 16                        // triton_helpers.py:149:16 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	or.pred 	%p12, %p6, %p11;
+	.loc	2 151 27                        // triton_helpers.py:151:27 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	and.pred 	%p13, %p8, %p9;
+	.loc	2 151 17                        // triton_helpers.py:151:17 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	or.pred 	%p14, %p7, %p13;
+	.loc	2 154 31                        // triton_helpers.py:154:31 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	cvt.s64.s32 	%rd46, %r54;
+	setp.gt.s64 	%p15, %rd45, %rd46;
+	.loc	2 154 21                        // triton_helpers.py:154:21 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	and.pred 	%p16, %p15, %p14;
+	.loc	2 154 12                        // triton_helpers.py:154:12 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	or.pred 	%p17, %p12, %p16;
+	.loc	2 155 35                        // triton_helpers.py:155:35 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	selp.f32 	%r53, %r53, %r27, %p17;
+	cvt.u32.u64 	%r29, %rd45;
+	.loc	2 155 69                        // triton_helpers.py:155:69 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:41:38 ]
+	selp.b32 	%r54, %r54, %r29, %p17;
+$L__tmp2:
+	.loc	1 32 40                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:32:40
+	add.s64 	%rd11, %rd51, 4;
+	add.s64 	%rd50, %rd50, 16;
+	setp.lt.u64 	%p18, %rd51, 31996;
+	mov.b64 	%rd51, %rd11;
+	@%p18 bra 	$L__BB0_5;
+	bra.uni 	$L__BB0_8;
+$L__BB0_6:                              // %.split.preheader
+	shl.b64 	%rd24, %rd19, 2;
+	mul.lo.s64 	%rd25, %rd20, 128000;
+	sub.s64 	%rd26, %rd24, %rd25;
+	mul.lo.s64 	%rd27, %rd49, %rd26;
+	add.s32 	%r19, %r1, %r4;
+	mad.wide.s32 	%rd28, %r19, 128000, %rd27;
+	shl.b64 	%rd29, %rd6, 2;
+	add.s64 	%rd30, %rd28, %rd29;
+	add.s64 	%rd52, %rd17, %rd30;
+	mov.b64 	%rd53, -4;
+$L__BB0_7:                              // %.split
+                                        // =>This Inner Loop Header: Depth=1
+	.loc	1 38 61                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:38:61
+	// begin inline asm
+	mov.u64 %rd31, 0x0;
+	createpolicy.fractional.L2::evict_first.b64 %rd31, 1.0;
+	// end inline asm
+	mov.b32 	%r21, 0;
+	mov.pred 	%p3, 0;
+	// begin inline asm
+	mov.u32 %r20, %r21;
+	@%p3 ld.global.L1::evict_first.L2::cache_hint.b32 { %r20 }, [ %rd52 + 0 ], %rd31;
+	// end inline asm
+	.loc	1 32 40                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:32:40
+	add.s64 	%rd53, %rd53, 4;
+	add.s64 	%rd52, %rd52, 16;
+	setp.lt.u64 	%p4, %rd53, 31996;
+	mov.b32 	%r54, 2147483647;
+	mov.b32 	%r53, 0fFF800000;
+	@%p4 bra 	$L__BB0_7;
+$L__BB0_8:                              // %.split3.us
+	.loc	1 23 44                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:23:44
+	and.b32 	%r30, %r2, 63;
+	.loc	1 23 23                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:23:23
+	or.b32 	%r31, %r1, %r30;
+	.loc	1 24 21                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:24:21
+	setp.lt.s32 	%p20, %r31, %r12;
+$L__tmp3:
+	.loc	2 165 42                        // triton_helpers.py:165:42 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	shfl.sync.bfly.b32 	%r32, %r53, 2, 31, -1;
+	shfl.sync.bfly.b32 	%r33, %r54, 2, 31, -1;
+	.loc	2 144 21                        // triton_helpers.py:144:21 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	setp.gt.f32 	%p21, %r53, %r32;
+	.loc	2 145 23                        // triton_helpers.py:145:23 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	setp.eq.f32 	%p22, %r53, %r32;
+	.loc	2 147 29                        // triton_helpers.py:147:29 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	setp.nan.f32 	%p23, %r53, %r53;
+	.loc	2 148 29                        // triton_helpers.py:148:29 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	setp.nan.f32 	%p24, %r32, %r32;
+	setp.num.f32 	%p25, %r32, %r32;
+	.loc	2 149 27                        // triton_helpers.py:149:27 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	and.pred 	%p26, %p23, %p25;
+	.loc	2 149 16                        // triton_helpers.py:149:16 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	or.pred 	%p27, %p21, %p26;
+	.loc	2 151 27                        // triton_helpers.py:151:27 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	and.pred 	%p28, %p23, %p24;
+	.loc	2 151 17                        // triton_helpers.py:151:17 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	or.pred 	%p29, %p22, %p28;
+	.loc	2 154 31                        // triton_helpers.py:154:31 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	setp.lt.s32 	%p30, %r54, %r33;
+	.loc	2 154 21                        // triton_helpers.py:154:21 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	and.pred 	%p31, %p30, %p29;
+	.loc	2 154 12                        // triton_helpers.py:154:12 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	or.pred 	%p32, %p27, %p31;
+	.loc	2 155 35                        // triton_helpers.py:155:35 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	selp.f32 	%r34, %r53, %r32, %p32;
+	.loc	2 155 69                        // triton_helpers.py:155:69 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	selp.b32 	%r35, %r54, %r33, %p32;
+	.loc	2 165 42                        // triton_helpers.py:165:42 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	shfl.sync.bfly.b32 	%r36, %r34, 1, 31, -1;
+	shfl.sync.bfly.b32 	%r37, %r35, 1, 31, -1;
+	.loc	2 144 21                        // triton_helpers.py:144:21 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	setp.gt.f32 	%p33, %r34, %r36;
+	.loc	2 145 23                        // triton_helpers.py:145:23 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	setp.eq.f32 	%p34, %r34, %r36;
+	.loc	2 147 29                        // triton_helpers.py:147:29 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	setp.nan.f32 	%p35, %r34, %r34;
+	.loc	2 148 29                        // triton_helpers.py:148:29 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	setp.nan.f32 	%p36, %r36, %r36;
+	.loc	2 154 31                        // triton_helpers.py:154:31 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	setp.lt.s32 	%p37, %r35, %r37;
+	.loc	2 155 69                        // triton_helpers.py:155:69 @[ c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:45:75 ]
+	selp.b32 	%r38, %r35, %r37, %p35;
+	selp.b32 	%r39, %r38, %r37, %p36;
+	selp.b32 	%r40, %r35, %r39, %p34;
+	selp.b32 	%r41, %r40, %r37, %p37;
+	selp.b32 	%r42, %r41, %r35, %p36;
+	selp.b32 	%r43, %r42, %r41, %p35;
+	selp.b32 	%r44, %r35, %r43, %p33;
+$L__tmp4:
+	.loc	1 47 25                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:47:25
+	mad.wide.s32 	%rd48, %r31, 8, %rd18;
+	.loc	1 47 36                         // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:47:36
+	mov.b32 	%r45, global_smem;
+	add.s32 	%r46, %r45, %r3;
+	st.shared.b32 	[%r46], %r44;
+	bar.sync 	0;
+	shl.b32 	%r47, %r30, 2;
+	add.s32 	%r48, %r45, %r47;
+	ld.shared.s32 	%rd47, [%r48];
+	and.b32 	%r49, %r2, 192;
+	setp.eq.b32 	%p38, %r49, 0;
+	and.pred 	%p19, %p38, %p20;
+	// begin inline asm
+	@%p19 st.global.b64 [ %rd48 + 0 ], { %rd47 };
+	// end inline asm
+	.loc	1 47 4                          // c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py:47:4
+	ret;
+$L__tmp5:
+$L__func_end0:
+                                        // -- End function
+}
+	.file	1 "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py"
+	.file	2 "/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py"
+	.section	.debug_abbrev
+	{
+.b8 1                                   // Abbreviation Code
+.b8 17                                  // DW_TAG_compile_unit
+.b8 1                                   // DW_CHILDREN_yes
+.b8 37                                  // DW_AT_producer
+.b8 8                                   // DW_FORM_string
+.b8 19                                  // DW_AT_language
+.b8 5                                   // DW_FORM_data2
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 16                                  // DW_AT_stmt_list
+.b8 6                                   // DW_FORM_data4
+.b8 27                                  // DW_AT_comp_dir
+.b8 8                                   // DW_FORM_string
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 2                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 0                                   // DW_CHILDREN_no
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 32                                  // DW_AT_inline
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 3                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 1                                   // DW_CHILDREN_yes
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 4                                   // Abbreviation Code
+.b8 29                                  // DW_TAG_inlined_subroutine
+.b8 0                                   // DW_CHILDREN_no
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 88                                  // DW_AT_call_file
+.b8 11                                  // DW_FORM_data1
+.b8 89                                  // DW_AT_call_line
+.b8 11                                  // DW_FORM_data1
+.b8 87                                  // DW_AT_call_column
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 0                                   // EOM(3)
+	}
+	.section	.debug_info
+	{
+.b32 234                                // Length of Unit
+.b8 2                                   // DWARF version number
+.b8 0
+.b32 .debug_abbrev                      // Offset Into Abbrev. Section
+.b8 8                                   // Address Size (in bytes)
+.b8 1                                   // Abbrev [1] 0xb:0xe3 DW_TAG_compile_unit
+.b8 116                                 // DW_AT_producer
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2                                   // DW_AT_language
+.b8 0
+.b8 99                                  // DW_AT_name
+.b8 52
+.b8 119
+.b8 100
+.b8 104
+.b8 119
+.b8 108
+.b8 117
+.b8 54
+.b8 121
+.b8 98
+.b8 51
+.b8 119
+.b8 99
+.b8 119
+.b8 97
+.b8 122
+.b8 100
+.b8 110
+.b8 122
+.b8 109
+.b8 103
+.b8 122
+.b8 101
+.b8 119
+.b8 105
+.b8 101
+.b8 109
+.b8 118
+.b8 122
+.b8 110
+.b8 120
+.b8 118
+.b8 114
+.b8 114
+.b8 51
+.b8 53
+.b8 50
+.b8 53
+.b8 101
+.b8 111
+.b8 106
+.b8 117
+.b8 112
+.b8 113
+.b8 106
+.b8 108
+.b8 100
+.b8 111
+.b8 53
+.b8 112
+.b8 116
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line                        // DW_AT_stmt_list
+.b8 47                                  // DW_AT_comp_dir
+.b8 119
+.b8 111
+.b8 114
+.b8 107
+.b8 115
+.b8 112
+.b8 97
+.b8 99
+.b8 101
+.b8 47
+.b8 104
+.b8 97
+.b8 110
+.b8 114
+.b8 117
+.b8 105
+.b8 47
+.b8 83
+.b8 112
+.b8 101
+.b8 99
+.b8 70
+.b8 111
+.b8 114
+.b8 103
+.b8 101
+.b8 45
+.b8 101
+.b8 120
+.b8 116
+.b8 47
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 99
+.b8 111
+.b8 109
+.b8 112
+.b8 105
+.b8 108
+.b8 101
+.b8 100
+.b8 95
+.b8 107
+.b8 101
+.b8 114
+.b8 110
+.b8 101
+.b8 108
+.b8 115
+.b8 47
+.b8 52
+.b8 119
+.b8 0
+.b8 2                                   // Abbrev [2] 0x8b:0x1c DW_TAG_subprogram
+.b8 116                                 // DW_AT_name
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 114
+.b8 101
+.b8 100
+.b8 95
+.b8 102
+.b8 117
+.b8 115
+.b8 101
+.b8 100
+.b8 95
+.b8 97
+.b8 114
+.b8 103
+.b8 109
+.b8 97
+.b8 120
+.b8 95
+.b8 49
+.b8 0
+.b8 1                                   // DW_AT_inline
+.b8 3                                   // Abbrev [3] 0xa7:0x46 DW_TAG_subprogram
+.b64 $L__func_begin0                    // DW_AT_low_pc
+.b64 $L__func_end0                      // DW_AT_high_pc
+.b32 139                                // DW_AT_abstract_origin
+.b8 4                                   // Abbrev [4] 0xbc:0x18 DW_TAG_inlined_subroutine
+.b32 139                                // DW_AT_abstract_origin
+.b64 $L__tmp1                           // DW_AT_low_pc
+.b64 $L__tmp2                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 41                                  // DW_AT_call_line
+.b8 38                                  // DW_AT_call_column
+.b8 4                                   // Abbrev [4] 0xd4:0x18 DW_TAG_inlined_subroutine
+.b32 139                                // DW_AT_abstract_origin
+.b64 $L__tmp3                           // DW_AT_low_pc
+.b64 $L__tmp4                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 45                                  // DW_AT_call_line
+.b8 75                                  // DW_AT_call_column
+.b8 0                                   // End Of Children Mark
+.b8 0                                   // End Of Children Mark
+	}
+	.section	.debug_macinfo	{	}

SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.source

@@ -0,0 +1,323 @@
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":18:0)
+#loc35 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":143:0)
+#loc47 = loc(unknown)
+#loc55 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":86:0)
+#loc59 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":63:0)
+#loc68 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":164:0)
+#loc72 = loc("in_ptr0"(#loc))
+#loc73 = loc("out_ptr0"(#loc))
+#loc74 = loc("ks0"(#loc))
+#loc75 = loc("ks1"(#loc))
+#loc76 = loc("xnumel"(#loc))
+#loc77 = loc("r0_numel"(#loc))
+#loc106 = loc("a_value"(#loc35))
+#loc107 = loc("a_index"(#loc35))
+#loc108 = loc("b_value"(#loc35))
+#loc109 = loc("b_index"(#loc35))
+#loc122 = loc("x"(#loc55))
+#loc123 = loc("x"(#loc59))
+#loc124 = loc("value"(#loc68))
+#loc125 = loc("index"(#loc68))
+module {
+  tt.func public @triton_red_fused_argmax_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr0: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %xnumel: i32 loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %r0_numel_0 = arith.constant 32000 : i32 loc(#loc78)
+    %xoffset = tt.get_program_id x : i32 loc(#loc79)
+    %xoffset_1 = arith.constant 64 : i32 loc(#loc80)
+    %xoffset_2 = arith.constant 64 : i32 loc(#loc80)
+    %xoffset_3 = arith.muli %xoffset, %xoffset_2 : i32 loc(#loc80)
+    %xindex = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32> loc(#loc81)
+    %xindex_4 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc82)
+    %xindex_5 = tt.splat %xoffset_3 : i32 -> tensor<64x1xi32> loc(#loc83)
+    %xindex_6 = arith.addi %xindex_5, %xindex_4 : tensor<64x1xi32> loc(#loc83)
+    %xmask = tt.splat %xnumel : i32 -> tensor<64x1xi32> loc(#loc84)
+    %xmask_7 = arith.cmpi slt, %xindex_6, %xmask : tensor<64x1xi32> loc(#loc84)
+    %r0_base = tt.make_range {end = 4 : i32, start = 0 : i32} : tensor<4xi32> loc(#loc85)
+    %r0_base_8 = tt.expand_dims %r0_base {axis = 0 : i32} : tensor<4xi32> -> tensor<1x4xi32> loc(#loc86)
+    %x0 = arith.extsi %xindex_6 : tensor<64x1xi32> to tensor<64x1xi64> loc(#loc87)
+    %x0_9 = tt.splat %ks0 : i64 -> tensor<64x1xi64> loc(#loc87)
+    %x0_10 = arith.remsi %x0, %x0_9 : tensor<64x1xi64> loc(#loc87)
+    %x1 = arith.extsi %xindex_6 : tensor<64x1xi32> to tensor<64x1xi64> loc(#loc88)
+    %x1_11 = tt.splat %ks0 : i64 -> tensor<64x1xi64> loc(#loc88)
+    %x1_12 = arith.divsi %x1, %x1_11 : tensor<64x1xi64> loc(#loc88)
+    %_tmp2 = arith.constant 0xFF800000 : f32 loc(#loc89)
+    %_tmp2_13 = arith.constant dense<0xFF800000> : tensor<64x4xf32> loc(#loc89)
+    %_tmp2_index = arith.constant 2147483647 : i32 loc(#loc90)
+    %_tmp2_index_14 = arith.constant dense<2147483647> : tensor<64x4xi32> loc(#loc90)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc14)
+    %c4_i32 = arith.constant 4 : i32 loc(#loc14)
+    %0 = arith.bitcast %c0_i32 : i32 to i32 loc(#loc14)
+    %1 = arith.bitcast %r0_numel_0 : i32 to i32 loc(#loc14)
+    %2 = arith.bitcast %c4_i32 : i32 to i32 loc(#loc14)
+    %3 = ub.poison : i32 loc(#loc14)
+    %_tmp2_index_15:2 = scf.for %r0_offset = %0 to %1 step %2 iter_args(%_tmp2_16 = %_tmp2_13, %_tmp2_index_17 = %_tmp2_index_14) -> (tensor<64x4xf32>, tensor<64x4xi32>)  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x4xi32> loc(#loc92)
+      %r0_index_18 = arith.addi %r0_index, %r0_base_8 : tensor<1x4xi32> loc(#loc92)
+      %r0_mask = arith.constant dense<32000> : tensor<1x4xi32> loc(#loc93)
+      %r0_mask_19 = arith.cmpi slt, %r0_index_18, %r0_mask : tensor<1x4xi32> loc(#loc93)
+      %tmp0 = arith.constant 32000 : i32 loc(#loc94)
+      %tmp0_20 = arith.constant 32000 : i64 loc(#loc94)
+      %tmp0_21 = arith.constant dense<32000> : tensor<64x1xi64> loc(#loc94)
+      %tmp0_22 = arith.muli %tmp0_21, %x0_10 : tensor<64x1xi64> loc(#loc94)
+      %tmp0_23 = arith.extsi %r0_index_18 : tensor<1x4xi32> to tensor<1x4xi64> loc(#loc95)
+      %tmp0_24 = tt.broadcast %tmp0_23 : tensor<1x4xi64> -> tensor<64x4xi64> loc(#loc95)
+      %tmp0_25 = tt.broadcast %tmp0_22 : tensor<64x1xi64> -> tensor<64x4xi64> loc(#loc95)
+      %tmp0_26 = arith.addi %tmp0_24, %tmp0_25 : tensor<64x4xi64> loc(#loc95)
+      %tmp0_27 = tt.splat %ks1 : i64 -> tensor<64x1xi64> loc(#loc96)
+      %tmp0_28 = arith.muli %tmp0_27, %x1_12 : tensor<64x1xi64> loc(#loc96)
+      %tmp0_29 = tt.broadcast %tmp0_28 : tensor<64x1xi64> -> tensor<64x4xi64> loc(#loc97)
+      %tmp0_30 = arith.addi %tmp0_26, %tmp0_29 : tensor<64x4xi64> loc(#loc97)
+      %tmp0_31 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<64x4x!tt.ptr<f32>> loc(#loc98)
+      %tmp0_32 = tt.addptr %tmp0_31, %tmp0_30 : tensor<64x4x!tt.ptr<f32>>, tensor<64x4xi64> loc(#loc98)
+      %tmp0_33 = tt.broadcast %r0_mask_19 : tensor<1x4xi1> -> tensor<64x4xi1> loc(#loc99)
+      %tmp0_34 = tt.broadcast %xmask_7 : tensor<64x1xi1> -> tensor<64x4xi1> loc(#loc99)
+      %tmp0_35 = arith.andi %tmp0_33, %tmp0_34 : tensor<64x4xi1> loc(#loc99)
+      %tmp0_36 = arith.constant 0.000000e+00 : f32 loc(#loc100)
+      %tmp0_37 = arith.constant dense<0.000000e+00> : tensor<64x4xf32> loc(#loc100)
+      %tmp0_38 = tt.load %tmp0_32, %tmp0_35, %tmp0_37 evictionPolicy = evict_first : tensor<64x4x!tt.ptr<f32>> loc(#loc100)
+      %8:2 = tt.call @torch._inductor.runtime.triton_helpers.maximum_with_index__fp32S64_4S_i32S64_4S_fp32S64_4S_i32S1_4S__(%_tmp2_16, %_tmp2_index_17, %tmp0_38, %r0_index_18) : (tensor<64x4xf32>, tensor<64x4xi32>, tensor<64x4xf32>, tensor<1x4xi32>) -> (tensor<64x4xf32>, tensor<64x4xi32>) loc(#loc24)
+      %_tmp2_39 = tt.broadcast %r0_mask_19 : tensor<1x4xi1> -> tensor<64x4xi1> loc(#loc101)
+      %_tmp2_40 = tt.broadcast %xmask_7 : tensor<64x1xi1> -> tensor<64x4xi1> loc(#loc101)
+      %_tmp2_41 = arith.andi %_tmp2_39, %_tmp2_40 : tensor<64x4xi1> loc(#loc101)
+      %_tmp2_42 = arith.select %_tmp2_41, %8#0, %_tmp2_16 : tensor<64x4xi1>, tensor<64x4xf32> loc(#loc102)
+      %_tmp2_index_43 = tt.broadcast %r0_mask_19 : tensor<1x4xi1> -> tensor<64x4xi1> loc(#loc103)
+      %_tmp2_index_44 = tt.broadcast %xmask_7 : tensor<64x1xi1> -> tensor<64x4xi1> loc(#loc103)
+      %_tmp2_index_45 = arith.andi %_tmp2_index_43, %_tmp2_index_44 : tensor<64x4xi1> loc(#loc103)
+      %_tmp2_index_46 = arith.select %_tmp2_index_45, %8#1, %_tmp2_index_17 : tensor<64x4xi1>, tensor<64x4xi32> loc(#loc104)
+      scf.yield %_tmp2_42, %_tmp2_index_46 : tensor<64x4xf32>, tensor<64x4xi32> loc(#loc29)
+    } loc(#loc126)
+    %4:2 = tt.call @"torch._inductor.runtime.triton_helpers.max_with_index__fp32S64_4S_i32S64_4S__(2,)cconstexpr_1_"(%_tmp2_index_15#0, %_tmp2_index_15#1) : (tensor<64x4xf32>, tensor<64x4xi32>) -> (tensor<64xf32>, tensor<64xi32>) loc(#loc30)
+    %tmp2 = tt.expand_dims %4#1 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc105)
+    %5 = tt.splat %out_ptr0 : !tt.ptr<i64> -> tensor<64x1x!tt.ptr<i64>> loc(#loc32)
+    %6 = tt.addptr %5, %xindex_6 : tensor<64x1x!tt.ptr<i64>>, tensor<64x1xi32> loc(#loc32)
+    %7 = arith.extsi %tmp2 : tensor<64x1xi32> to tensor<64x1xi64> loc(#loc33)
+    tt.store %6, %7, %xmask_7 : tensor<64x1x!tt.ptr<i64>> loc(#loc33)
+    tt.return loc(#loc34)
+  } loc(#loc)
+  tt.func private @torch._inductor.runtime.triton_helpers.maximum_with_index__fp32S64_4S_i32S64_4S_fp32S64_4S_i32S1_4S__(%a_value: tensor<64x4xf32> loc("a_value"(#loc35)), %a_index: tensor<64x4xi32> loc("a_index"(#loc35)), %b_value: tensor<64x4xf32> loc("b_value"(#loc35)), %b_index: tensor<1x4xi32> loc("b_index"(#loc35))) -> (tensor<64x4xf32>, tensor<64x4xi32>) attributes {noinline = false} {
+    %mask = arith.cmpf ogt, %a_value, %b_value : tensor<64x4xf32> loc(#loc127)
+    %equal = arith.cmpf oeq, %a_value, %b_value : tensor<64x4xf32> loc(#loc128)
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.is_floating__fp32S64_4S__(%a_value) : (tensor<64x4xf32>) -> i1 loc(#loc38)
+    %1:2 = scf.if %0 -> (tensor<64x4xi1>, tensor<64x4xi1>) {
+      %a_isnan = arith.cmpf une, %a_value, %a_value : tensor<64x4xf32> loc(#loc112)
+      %b_isnan = arith.cmpf une, %b_value, %b_value : tensor<64x4xf32> loc(#loc113)
+      %mask_4 = arith.constant true loc(#loc114)
+      %mask_5 = arith.constant dense<true> : tensor<64x4xi1> loc(#loc114)
+      %mask_6 = arith.xori %b_isnan, %mask_5 : tensor<64x4xi1> loc(#loc114)
+      %mask_7 = arith.andi %a_isnan, %mask_6 : tensor<64x4xi1> loc(#loc115)
+      %mask_8 = arith.ori %mask, %mask_7 : tensor<64x4xi1> loc(#loc129)
+      %equal_9 = arith.andi %a_isnan, %b_isnan : tensor<64x4xi1> loc(#loc117)
+      %equal_10 = arith.ori %equal, %equal_9 : tensor<64x4xi1> loc(#loc130)
+      scf.yield %mask_8, %equal_10 : tensor<64x4xi1>, tensor<64x4xi1> loc(#loc130)
+    } else {
+      scf.yield %mask, %equal : tensor<64x4xi1>, tensor<64x4xi1> loc(#loc47)
+    } loc(#loc39)
+    %mask_0 = tt.broadcast %b_index : tensor<1x4xi32> -> tensor<64x4xi32> loc(#loc119)
+    %mask_1 = arith.cmpi slt, %a_index, %mask_0 : tensor<64x4xi32> loc(#loc119)
+    %mask_2 = arith.andi %1#1, %mask_1 : tensor<64x4xi1> loc(#loc120)
+    %mask_3 = arith.ori %1#0, %mask_2 : tensor<64x4xi1> loc(#loc121)
+    %2 = arith.select %mask_3, %a_value, %b_value : tensor<64x4xi1>, tensor<64x4xf32> loc(#loc51)
+    %3 = tt.broadcast %b_index : tensor<1x4xi32> -> tensor<64x4xi32> loc(#loc52)
+    %4 = arith.select %mask_3, %a_index, %3 : tensor<64x4xi1>, tensor<64x4xi32> loc(#loc52)
+    tt.return %2, %4 : tensor<64x4xf32>, tensor<64x4xi32> loc(#loc53)
+  ^bb1:  // no predecessors
+    %5 = ub.poison : tensor<64x4xf32> loc(#loc54)
+    %6 = ub.poison : tensor<64x4xi32> loc(#loc54)
+    tt.return %5, %6 : tensor<64x4xf32>, tensor<64x4xi32> loc(#loc54)
+  } loc(#loc35)
+  tt.func private @torch._inductor.runtime.triton_helpers.is_floating__fp32S64_4S__(%x: tensor<64x4xf32> loc("x"(#loc55))) -> i1 attributes {noinline = false} {
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32S64_4S__(%x) : (tensor<64x4xf32>) -> tensor<64x4xf32> loc(#loc56)
+    %true = arith.constant true loc(#loc57)
+    tt.return %true : i1 loc(#loc57)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : i1 loc(#loc58)
+    tt.return %1 : i1 loc(#loc58)
+  } loc(#loc55)
+  tt.func private @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32S64_4S__(%x: tensor<64x4xf32> loc("x"(#loc59))) -> tensor<64x4xf32> attributes {noinline = false} {
+    %0 = tt.call @"triton.language.standard.zeros____(0, 0)cconstexpr_1__(1,)cconstexpr_int1_"() : () -> tensor<1xi1> loc(#loc60)
+    %1 = arith.uitofp %0 : tensor<1xi1> to tensor<1xf32> loc(#loc61)
+    %2 = tt.expand_dims %1 {axis = 0 : i32} : tensor<1xf32> -> tensor<1x1xf32> loc(#loc61)
+    %3 = tt.broadcast %2 : tensor<1x1xf32> -> tensor<64x4xf32> loc(#loc61)
+    %4 = arith.addf %x, %3 : tensor<64x4xf32> loc(#loc61)
+    tt.return %4 : tensor<64x4xf32> loc(#loc62)
+  ^bb1:  // no predecessors
+    %5 = ub.poison : tensor<64x4xf32> loc(#loc63)
+    tt.return %5 : tensor<64x4xf32> loc(#loc63)
+  } loc(#loc59)
+  tt.func private @"triton.language.standard.zeros____(0, 0)cconstexpr_1__(1,)cconstexpr_int1_"() -> tensor<1xi1> attributes {noinline = false} {
+    %false = arith.constant false loc(#loc65)
+    %cst = arith.constant dense<false> : tensor<1xi1> loc(#loc65)
+    tt.return %cst : tensor<1xi1> loc(#loc66)
+  ^bb1:  // no predecessors
+    %0 = ub.poison : tensor<1xi1> loc(#loc67)
+    tt.return %0 : tensor<1xi1> loc(#loc67)
+  } loc(#loc64)
+  tt.func private @"torch._inductor.runtime.triton_helpers.max_with_index__fp32S64_4S_i32S64_4S__(2,)cconstexpr_1_"(%value: tensor<64x4xf32> loc("value"(#loc68)), %index: tensor<64x4xi32> loc("index"(#loc68))) -> (tensor<64xf32>, tensor<64xi32>) attributes {noinline = false} {
+    %0:2 = "tt.reduce"(%value, %index) <{axis = 1 : i32}> ({
+    ^bb0(%arg2: f32 loc(unknown), %arg3: i32 loc(unknown), %arg4: f32 loc(unknown), %arg5: i32 loc(unknown)):
+      %3:2 = tt.call @torch._inductor.runtime.triton_helpers.maximum_with_index__fp32_i32_fp32_i32__(%arg2, %arg3, %arg4, %arg5) : (f32, i32, f32, i32) -> (f32, i32) loc(#loc69)
+      tt.reduce.return %3#0, %3#1 : f32, i32 loc(#loc69)
+    }) : (tensor<64x4xf32>, tensor<64x4xi32>) -> (tensor<64xf32>, tensor<64xi32>) loc(#loc69)
+    tt.return %0#0, %0#1 : tensor<64xf32>, tensor<64xi32> loc(#loc70)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : tensor<64xf32> loc(#loc71)
+    %2 = ub.poison : tensor<64xi32> loc(#loc71)
+    tt.return %1, %2 : tensor<64xf32>, tensor<64xi32> loc(#loc71)
+  } loc(#loc68)
+  tt.func private @torch._inductor.runtime.triton_helpers.maximum_with_index__fp32_i32_fp32_i32__(%a_value: f32 loc("a_value"(#loc35)), %a_index: i32 loc("a_index"(#loc35)), %b_value: f32 loc("b_value"(#loc35)), %b_index: i32 loc("b_index"(#loc35))) -> (f32, i32) attributes {noinline = false} {
+    %mask = arith.cmpf ogt, %a_value, %b_value : f32 loc(#loc127)
+    %equal = arith.cmpf oeq, %a_value, %b_value : f32 loc(#loc128)
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.is_floating__fp32__(%a_value) : (f32) -> i1 loc(#loc38)
+    %1:2 = scf.if %0 -> (i1, i1) {
+      %a_isnan = arith.cmpf une, %a_value, %a_value : f32 loc(#loc112)
+      %b_isnan = arith.cmpf une, %b_value, %b_value : f32 loc(#loc113)
+      %mask_3 = arith.constant true loc(#loc114)
+      %mask_4 = arith.xori %b_isnan, %mask_3 : i1 loc(#loc114)
+      %mask_5 = arith.andi %a_isnan, %mask_4 : i1 loc(#loc115)
+      %mask_6 = arith.ori %mask, %mask_5 : i1 loc(#loc129)
+      %equal_7 = arith.andi %a_isnan, %b_isnan : i1 loc(#loc117)
+      %equal_8 = arith.ori %equal, %equal_7 : i1 loc(#loc130)
+      scf.yield %mask_6, %equal_8 : i1, i1 loc(#loc130)
+    } else {
+      scf.yield %mask, %equal : i1, i1 loc(#loc47)
+    } loc(#loc39)
+    %mask_0 = arith.cmpi slt, %a_index, %b_index : i32 loc(#loc119)
+    %mask_1 = arith.andi %1#1, %mask_0 : i1 loc(#loc120)
+    %mask_2 = arith.ori %1#0, %mask_1 : i1 loc(#loc121)
+    %2 = arith.select %mask_2, %a_value, %b_value : f32 loc(#loc51)
+    %3 = arith.select %mask_2, %a_index, %b_index : i32 loc(#loc52)
+    tt.return %2, %3 : f32, i32 loc(#loc53)
+  ^bb1:  // no predecessors
+    %4 = ub.poison : f32 loc(#loc54)
+    %5 = ub.poison : i32 loc(#loc54)
+    tt.return %4, %5 : f32, i32 loc(#loc54)
+  } loc(#loc35)
+  tt.func private @torch._inductor.runtime.triton_helpers.is_floating__fp32__(%x: f32 loc("x"(#loc55))) -> i1 attributes {noinline = false} {
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32__(%x) : (f32) -> tensor<1xf32> loc(#loc56)
+    %true = arith.constant true loc(#loc57)
+    tt.return %true : i1 loc(#loc57)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : i1 loc(#loc58)
+    tt.return %1 : i1 loc(#loc58)
+  } loc(#loc55)
+  tt.func private @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32__(%x: f32 loc("x"(#loc59))) -> tensor<1xf32> attributes {noinline = false} {
+    %0 = tt.call @"triton.language.standard.zeros____(0, 0)cconstexpr_1__(1,)cconstexpr_int1_"() : () -> tensor<1xi1> loc(#loc60)
+    %1 = arith.uitofp %0 : tensor<1xi1> to tensor<1xf32> loc(#loc61)
+    %2 = tt.splat %x : f32 -> tensor<1xf32> loc(#loc61)
+    %3 = arith.addf %2, %1 : tensor<1xf32> loc(#loc61)
+    tt.return %3 : tensor<1xf32> loc(#loc62)
+  ^bb1:  // no predecessors
+    %4 = ub.poison : tensor<1xf32> loc(#loc63)
+    tt.return %4 : tensor<1xf32> loc(#loc63)
+  } loc(#loc59)
+} loc(#loc)
+#loc1 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":19:15)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:28)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:33)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:36)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:44)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:23)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":24:21)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":25:27)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":25:37)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":27:19)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":28:19)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":29:55)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":30:58)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":32:40)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":33:31)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":34:29)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:47)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:41)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:56)
+#loc20 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:52)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:34)
+#loc22 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:71)
+#loc23 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:61)
+#loc24 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":41:38)
+#loc25 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":43:35)
+#loc26 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":43:54)
+#loc27 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:41)
+#loc28 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:66)
+#loc29 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:8)
+#loc30 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":45:75)
+#loc31 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":46:20)
+#loc32 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:25)
+#loc33 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:36)
+#loc34 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:4)
+#loc36 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":144:21)
+#loc37 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":145:23)
+#loc38 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":146:19)
+#loc39 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":146:7)
+#loc40 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":147:29)
+#loc41 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":148:29)
+#loc42 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:31)
+#loc43 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:27)
+#loc44 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:16)
+#loc45 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:27)
+#loc46 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:17)
+#loc48 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:31)
+#loc49 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:21)
+#loc50 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:12)
+#loc51 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:35)
+#loc52 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:69)
+#loc53 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:11)
+#loc54 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:4)
+#loc56 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:29)
+#loc57 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:11)
+#loc58 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:4)
+#loc60 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:30)
+#loc61 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:15)
+#loc62 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:11)
+#loc63 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:4)
+#loc64 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":118:0)
+#loc65 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:31)
+#loc66 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:11)
+#loc67 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:4)
+#loc69 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":165:42)
+#loc70 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":165:11)
+#loc71 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":165:4)
+#loc78 = loc("r0_numel"(#loc1))
+#loc79 = loc("xoffset"(#loc2))
+#loc80 = loc("xoffset"(#loc3))
+#loc81 = loc("xindex"(#loc4))
+#loc82 = loc("xindex"(#loc5))
+#loc83 = loc("xindex"(#loc6))
+#loc84 = loc("xmask"(#loc7))
+#loc85 = loc("r0_base"(#loc8))
+#loc86 = loc("r0_base"(#loc9))
+#loc87 = loc("x0"(#loc10))
+#loc88 = loc("x1"(#loc11))
+#loc89 = loc("_tmp2"(#loc12))
+#loc90 = loc("_tmp2_index"(#loc13))
+#loc91 = loc("_tmp2"(#loc14))
+#loc92 = loc("r0_index"(#loc15))
+#loc93 = loc("r0_mask"(#loc16))
+#loc94 = loc("tmp0"(#loc17))
+#loc95 = loc("tmp0"(#loc18))
+#loc96 = loc("tmp0"(#loc19))
+#loc97 = loc("tmp0"(#loc20))
+#loc98 = loc("tmp0"(#loc21))
+#loc99 = loc("tmp0"(#loc22))
+#loc100 = loc("tmp0"(#loc23))
+#loc101 = loc("_tmp2"(#loc25))
+#loc102 = loc("_tmp2"(#loc26))
+#loc103 = loc("_tmp2_index"(#loc27))
+#loc104 = loc("_tmp2_index"(#loc28))
+#loc105 = loc("tmp2"(#loc31))
+#loc110 = loc("mask"(#loc36))
+#loc111 = loc("equal"(#loc37))
+#loc112 = loc("a_isnan"(#loc40))
+#loc113 = loc("b_isnan"(#loc41))
+#loc114 = loc("mask"(#loc42))
+#loc115 = loc("mask"(#loc43))
+#loc116 = loc("mask"(#loc44))
+#loc117 = loc("equal"(#loc45))
+#loc118 = loc("equal"(#loc46))
+#loc119 = loc("mask"(#loc48))
+#loc120 = loc("mask"(#loc49))
+#loc121 = loc("mask"(#loc50))
+#loc126 = loc("_tmp2_index"(#loc91))
+#loc127 = loc("mask"(#loc110))
+#loc128 = loc("equal"(#loc111))
+#loc129 = loc("mask"(#loc116))
+#loc130 = loc("equal"(#loc118))

SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.ttgir

@@ -0,0 +1,218 @@
+#blocked = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [8, 4], warpsPerCTA = [8, 1], order = [1, 0]}>
+#blocked1 = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [32, 1], warpsPerCTA = [2, 4], order = [0, 1]}>
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":18:0)
+#loc1 = loc(unknown)
+#loc39 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":45:75)
+#loc44 = loc("in_ptr0"(#loc))
+#loc45 = loc("out_ptr0"(#loc))
+#loc46 = loc("ks0"(#loc))
+#loc47 = loc("ks1"(#loc))
+#loc48 = loc("xnumel"(#loc))
+#loc49 = loc("r0_numel"(#loc))
+#loc85 = loc(callsite(#loc1 at #loc39))
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 8 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_red_fused_argmax_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr0: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %xnumel: i32 loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %cst = arith.constant dense<32000> : tensor<64x1xi64, #blocked> loc(#loc1)
+    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x4xf32, #blocked> loc(#loc1)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc1)
+    %c32000_i32 = arith.constant 32000 : i32 loc(#loc1)
+    %c4_i32 = arith.constant 4 : i32 loc(#loc1)
+    %cst_1 = arith.constant dense<true> : tensor<64x4xi1, #blocked> loc(#loc1)
+    %true = arith.constant true loc(#loc1)
+    %cst_2 = arith.constant dense<32000> : tensor<1x4xi32, #blocked> loc(#loc1)
+    %cst_3 = arith.constant dense<2147483647> : tensor<64x4xi32, #blocked> loc(#loc1)
+    %cst_4 = arith.constant dense<0xFF800000> : tensor<64x4xf32, #blocked> loc(#loc1)
+    %c64_i32 = arith.constant 64 : i32 loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc50)
+    %xoffset_5 = arith.muli %xoffset, %c64_i32 : i32 loc(#loc51)
+    %xindex = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc52)
+    %xindex_6 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc52)
+    %xindex_7 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64x1xi32, #blocked> loc(#loc52)
+    %xindex_8 = tt.expand_dims %xindex_6 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<64x1xi32, #blocked1> loc(#loc52)
+    %xindex_9 = tt.splat %xoffset_5 : i32 -> tensor<64x1xi32, #blocked> loc(#loc53)
+    %xindex_10 = tt.splat %xoffset_5 : i32 -> tensor<64x1xi32, #blocked1> loc(#loc53)
+    %xindex_11 = arith.addi %xindex_9, %xindex_7 : tensor<64x1xi32, #blocked> loc(#loc53)
+    %xindex_12 = arith.addi %xindex_10, %xindex_8 : tensor<64x1xi32, #blocked1> loc(#loc53)
+    %xmask = tt.splat %xnumel : i32 -> tensor<64x1xi32, #blocked> loc(#loc54)
+    %xmask_13 = tt.splat %xnumel : i32 -> tensor<64x1xi32, #blocked1> loc(#loc54)
+    %xmask_14 = arith.cmpi slt, %xindex_11, %xmask : tensor<64x1xi32, #blocked> loc(#loc54)
+    %xmask_15 = arith.cmpi slt, %xindex_12, %xmask_13 : tensor<64x1xi32, #blocked1> loc(#loc54)
+    %r0_base = tt.make_range {end = 4 : i32, start = 0 : i32} : tensor<4xi32, #ttg.slice<{dim = 0, parent = #blocked}>> loc(#loc55)
+    %r0_base_16 = tt.expand_dims %r0_base {axis = 0 : i32} : tensor<4xi32, #ttg.slice<{dim = 0, parent = #blocked}>> -> tensor<1x4xi32, #blocked> loc(#loc55)
+    %x0 = arith.extsi %xindex_11 : tensor<64x1xi32, #blocked> to tensor<64x1xi64, #blocked> loc(#loc56)
+    %x0_17 = tt.splat %ks0 : i64 -> tensor<64x1xi64, #blocked> loc(#loc56)
+    %x0_18 = arith.remsi %x0, %x0_17 : tensor<64x1xi64, #blocked> loc(#loc56)
+    %x1 = arith.divsi %x0, %x0_17 : tensor<64x1xi64, #blocked> loc(#loc57)
+    %tmp0 = arith.muli %x0_18, %cst : tensor<64x1xi64, #blocked> loc(#loc58)
+    %tmp0_19 = tt.broadcast %tmp0 : tensor<64x1xi64, #blocked> -> tensor<64x4xi64, #blocked> loc(#loc59)
+    %tmp0_20 = tt.splat %ks1 : i64 -> tensor<64x1xi64, #blocked> loc(#loc60)
+    %tmp0_21 = arith.muli %tmp0_20, %x1 : tensor<64x1xi64, #blocked> loc(#loc60)
+    %tmp0_22 = tt.broadcast %tmp0_21 : tensor<64x1xi64, #blocked> -> tensor<64x4xi64, #blocked> loc(#loc61)
+    %tmp0_23 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<64x4x!tt.ptr<f32>, #blocked> loc(#loc62)
+    %tmp0_24 = tt.broadcast %xmask_14 : tensor<64x1xi1, #blocked> -> tensor<64x4xi1, #blocked> loc(#loc63)
+    %_tmp2_index:2 = scf.for %r0_offset = %c0_i32 to %c32000_i32 step %c4_i32 iter_args(%_tmp2 = %cst_4, %_tmp2_index_25 = %cst_3) -> (tensor<64x4xf32, #blocked>, tensor<64x4xi32, #blocked>)  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x4xi32, #blocked> loc(#loc65)
+      %r0_index_26 = arith.addi %r0_index, %r0_base_16 : tensor<1x4xi32, #blocked> loc(#loc65)
+      %r0_mask = arith.cmpi slt, %r0_index_26, %cst_2 : tensor<1x4xi32, #blocked> loc(#loc66)
+      %tmp0_27 = arith.extsi %r0_index_26 : tensor<1x4xi32, #blocked> to tensor<1x4xi64, #blocked> loc(#loc59)
+      %tmp0_28 = tt.broadcast %tmp0_27 : tensor<1x4xi64, #blocked> -> tensor<64x4xi64, #blocked> loc(#loc59)
+      %tmp0_29 = arith.addi %tmp0_28, %tmp0_19 : tensor<64x4xi64, #blocked> loc(#loc59)
+      %tmp0_30 = arith.addi %tmp0_29, %tmp0_22 : tensor<64x4xi64, #blocked> loc(#loc61)
+      %tmp0_31 = tt.addptr %tmp0_23, %tmp0_30 : tensor<64x4x!tt.ptr<f32>, #blocked>, tensor<64x4xi64, #blocked> loc(#loc62)
+      %tmp0_32 = tt.broadcast %r0_mask : tensor<1x4xi1, #blocked> -> tensor<64x4xi1, #blocked> loc(#loc63)
+      %tmp0_33 = arith.andi %tmp0_32, %tmp0_24 : tensor<64x4xi1, #blocked> loc(#loc63)
+      %tmp0_34 = tt.load %tmp0_31, %tmp0_33, %cst_0 evictionPolicy = evict_first : tensor<64x4x!tt.ptr<f32>, #blocked> loc(#loc67)
+      %mask = arith.cmpf ogt, %_tmp2, %tmp0_34 : tensor<64x4xf32, #blocked> loc(#loc110)
+      %equal = arith.cmpf oeq, %_tmp2, %tmp0_34 : tensor<64x4xf32, #blocked> loc(#loc111)
+      %a_isnan = arith.cmpf une, %_tmp2, %_tmp2 : tensor<64x4xf32, #blocked> loc(#loc90)
+      %b_isnan = arith.cmpf une, %tmp0_34, %tmp0_34 : tensor<64x4xf32, #blocked> loc(#loc91)
+      %mask_35 = arith.xori %b_isnan, %cst_1 : tensor<64x4xi1, #blocked> loc(#loc92)
+      %mask_36 = arith.andi %a_isnan, %mask_35 : tensor<64x4xi1, #blocked> loc(#loc93)
+      %mask_37 = arith.ori %mask, %mask_36 : tensor<64x4xi1, #blocked> loc(#loc112)
+      %equal_38 = arith.andi %a_isnan, %b_isnan : tensor<64x4xi1, #blocked> loc(#loc95)
+      %equal_39 = arith.ori %equal, %equal_38 : tensor<64x4xi1, #blocked> loc(#loc113)
+      %mask_40 = tt.broadcast %r0_index_26 : tensor<1x4xi32, #blocked> -> tensor<64x4xi32, #blocked> loc(#loc97)
+      %mask_41 = arith.cmpi slt, %_tmp2_index_25, %mask_40 : tensor<64x4xi32, #blocked> loc(#loc97)
+      %mask_42 = arith.andi %equal_39, %mask_41 : tensor<64x4xi1, #blocked> loc(#loc98)
+      %mask_43 = arith.ori %mask_37, %mask_42 : tensor<64x4xi1, #blocked> loc(#loc99)
+      %5 = arith.select %mask_43, %_tmp2, %tmp0_34 : tensor<64x4xi1, #blocked>, tensor<64x4xf32, #blocked> loc(#loc80)
+      %6 = arith.select %mask_43, %_tmp2_index_25, %mask_40 : tensor<64x4xi1, #blocked>, tensor<64x4xi32, #blocked> loc(#loc81)
+      %_tmp2_44 = arith.select %tmp0_33, %5, %_tmp2 : tensor<64x4xi1, #blocked>, tensor<64x4xf32, #blocked> loc(#loc82)
+      %_tmp2_index_45 = arith.select %tmp0_33, %6, %_tmp2_index_25 : tensor<64x4xi1, #blocked>, tensor<64x4xi32, #blocked> loc(#loc83)
+      scf.yield %_tmp2_44, %_tmp2_index_45 : tensor<64x4xf32, #blocked>, tensor<64x4xi32, #blocked> loc(#loc37)
+    } loc(#loc87)
+    %0:2 = "tt.reduce"(%_tmp2_index#0, %_tmp2_index#1) <{axis = 1 : i32}> ({
+    ^bb0(%arg6: f32 loc(callsite(#loc1 at #loc39)), %arg7: i32 loc(callsite(#loc1 at #loc39)), %arg8: f32 loc(callsite(#loc1 at #loc39)), %arg9: i32 loc(callsite(#loc1 at #loc39))):
+      %mask = arith.cmpf ogt, %arg6, %arg8 : f32 loc(#loc114)
+      %equal = arith.cmpf oeq, %arg6, %arg8 : f32 loc(#loc115)
+      %a_isnan = arith.cmpf une, %arg6, %arg6 : f32 loc(#loc100)
+      %b_isnan = arith.cmpf une, %arg8, %arg8 : f32 loc(#loc101)
+      %mask_25 = arith.xori %b_isnan, %true : i1 loc(#loc102)
+      %mask_26 = arith.andi %a_isnan, %mask_25 : i1 loc(#loc103)
+      %mask_27 = arith.ori %mask, %mask_26 : i1 loc(#loc116)
+      %equal_28 = arith.andi %a_isnan, %b_isnan : i1 loc(#loc104)
+      %equal_29 = arith.ori %equal, %equal_28 : i1 loc(#loc117)
+      %mask_30 = arith.cmpi slt, %arg7, %arg9 : i32 loc(#loc105)
+      %mask_31 = arith.andi %equal_29, %mask_30 : i1 loc(#loc106)
+      %mask_32 = arith.ori %mask_27, %mask_31 : i1 loc(#loc107)
+      %5 = arith.select %mask_32, %arg6, %arg8 : f32 loc(#loc108)
+      %6 = arith.select %mask_32, %arg7, %arg9 : i32 loc(#loc109)
+      tt.reduce.return %5, %6 : f32, i32 loc(#loc84)
+    }) : (tensor<64x4xf32, #blocked>, tensor<64x4xi32, #blocked>) -> (tensor<64xf32, #ttg.slice<{dim = 1, parent = #blocked}>>, tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>>) loc(#loc84)
+    %tmp2 = tt.expand_dims %0#1 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64x1xi32, #blocked> loc(#loc86)
+    %1 = tt.splat %out_ptr0 : !tt.ptr<i64> -> tensor<64x1x!tt.ptr<i64>, #blocked1> loc(#loc41)
+    %2 = tt.addptr %1, %xindex_12 : tensor<64x1x!tt.ptr<i64>, #blocked1>, tensor<64x1xi32, #blocked1> loc(#loc41)
+    %3 = ttg.convert_layout %tmp2 : tensor<64x1xi32, #blocked> -> tensor<64x1xi32, #blocked1> loc(#loc42)
+    %4 = arith.extsi %3 : tensor<64x1xi32, #blocked1> to tensor<64x1xi64, #blocked1> loc(#loc42)
+    tt.store %2, %4, %xmask_15 : tensor<64x1x!tt.ptr<i64>, #blocked1> loc(#loc42)
+    tt.return loc(#loc43)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:28)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:33)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:44)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:23)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":24:21)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":25:37)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":27:19)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":28:19)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:47)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:41)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:56)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:52)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:34)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:71)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":32:40)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":33:31)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":34:29)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:61)
+#loc20 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":144:21)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":41:38)
+#loc22 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":145:23)
+#loc23 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":147:29)
+#loc24 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":148:29)
+#loc25 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:31)
+#loc26 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:27)
+#loc27 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:16)
+#loc28 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:27)
+#loc29 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:17)
+#loc30 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:31)
+#loc31 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:21)
+#loc32 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:12)
+#loc33 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:35)
+#loc34 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:69)
+#loc35 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":43:54)
+#loc36 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:66)
+#loc37 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:8)
+#loc38 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":165:42)
+#loc40 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":46:20)
+#loc41 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:25)
+#loc42 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:36)
+#loc43 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:4)
+#loc50 = loc("xoffset"(#loc2))
+#loc51 = loc("xoffset"(#loc3))
+#loc52 = loc("xindex"(#loc4))
+#loc53 = loc("xindex"(#loc5))
+#loc54 = loc("xmask"(#loc6))
+#loc55 = loc("r0_base"(#loc7))
+#loc56 = loc("x0"(#loc8))
+#loc57 = loc("x1"(#loc9))
+#loc58 = loc("tmp0"(#loc10))
+#loc59 = loc("tmp0"(#loc11))
+#loc60 = loc("tmp0"(#loc12))
+#loc61 = loc("tmp0"(#loc13))
+#loc62 = loc("tmp0"(#loc14))
+#loc63 = loc("tmp0"(#loc15))
+#loc64 = loc("_tmp2"(#loc16))
+#loc65 = loc("r0_index"(#loc17))
+#loc66 = loc("r0_mask"(#loc18))
+#loc67 = loc("tmp0"(#loc19))
+#loc68 = loc("mask"(#loc20))
+#loc69 = loc("equal"(#loc22))
+#loc70 = loc("a_isnan"(#loc23))
+#loc71 = loc("b_isnan"(#loc24))
+#loc72 = loc("mask"(#loc25))
+#loc73 = loc("mask"(#loc26))
+#loc74 = loc("mask"(#loc27))
+#loc75 = loc("equal"(#loc28))
+#loc76 = loc("equal"(#loc29))
+#loc77 = loc("mask"(#loc30))
+#loc78 = loc("mask"(#loc31))
+#loc79 = loc("mask"(#loc32))
+#loc80 = loc(callsite(#loc33 at #loc21))
+#loc81 = loc(callsite(#loc34 at #loc21))
+#loc82 = loc("_tmp2"(#loc35))
+#loc83 = loc("_tmp2_index"(#loc36))
+#loc84 = loc(callsite(#loc38 at #loc39))
+#loc86 = loc("tmp2"(#loc40))
+#loc87 = loc("_tmp2_index"(#loc64))
+#loc88 = loc("mask"(#loc68))
+#loc89 = loc("equal"(#loc69))
+#loc90 = loc(callsite(#loc70 at #loc21))
+#loc91 = loc(callsite(#loc71 at #loc21))
+#loc92 = loc(callsite(#loc72 at #loc21))
+#loc93 = loc(callsite(#loc73 at #loc21))
+#loc94 = loc("mask"(#loc74))
+#loc95 = loc(callsite(#loc75 at #loc21))
+#loc96 = loc("equal"(#loc76))
+#loc97 = loc(callsite(#loc77 at #loc21))
+#loc98 = loc(callsite(#loc78 at #loc21))
+#loc99 = loc(callsite(#loc79 at #loc21))
+#loc100 = loc(callsite(#loc70 at #loc84))
+#loc101 = loc(callsite(#loc71 at #loc84))
+#loc102 = loc(callsite(#loc72 at #loc84))
+#loc103 = loc(callsite(#loc73 at #loc84))
+#loc104 = loc(callsite(#loc75 at #loc84))
+#loc105 = loc(callsite(#loc77 at #loc84))
+#loc106 = loc(callsite(#loc78 at #loc84))
+#loc107 = loc(callsite(#loc79 at #loc84))
+#loc108 = loc(callsite(#loc33 at #loc84))
+#loc109 = loc(callsite(#loc34 at #loc84))
+#loc110 = loc(callsite(#loc88 at #loc21))
+#loc111 = loc(callsite(#loc89 at #loc21))
+#loc112 = loc(callsite(#loc94 at #loc21))
+#loc113 = loc(callsite(#loc96 at #loc21))
+#loc114 = loc(callsite(#loc88 at #loc84))
+#loc115 = loc(callsite(#loc89 at #loc84))
+#loc116 = loc(callsite(#loc94 at #loc84))
+#loc117 = loc(callsite(#loc96 at #loc84))

SpecForge-ext/cache/compiled_kernels/triton/7/25SMJXR2INGZCZI64NAKGLW77JZOIG6LAES6NHHOQFOTKNXS6PHA/triton_red_fused_argmax_1.ttir

@@ -0,0 +1,217 @@
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":18:0)
+#loc1 = loc(unknown)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":45:75)
+#loc48 = loc("in_ptr0"(#loc))
+#loc49 = loc("out_ptr0"(#loc))
+#loc50 = loc("ks0"(#loc))
+#loc51 = loc("ks1"(#loc))
+#loc52 = loc("xnumel"(#loc))
+#loc53 = loc("r0_numel"(#loc))
+#loc54 = loc(callsite(#loc1 at #loc2))
+module {
+  tt.func public @triton_red_fused_argmax_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr0: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %xnumel: i32 loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %true = arith.constant true loc(#loc54)
+    %cst = arith.constant dense<true> : tensor<64x4xi1> loc(#loc1)
+    %c4_i32 = arith.constant 4 : i32 loc(#loc3)
+    %c32000_i32 = arith.constant 32000 : i32 loc(#loc3)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc3)
+    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x4xf32> loc(#loc1)
+    %cst_1 = arith.constant dense<32000> : tensor<64x1xi64> loc(#loc1)
+    %cst_2 = arith.constant dense<32000> : tensor<1x4xi32> loc(#loc1)
+    %_tmp2_index = arith.constant dense<2147483647> : tensor<64x4xi32> loc(#loc55)
+    %_tmp2 = arith.constant dense<0xFF800000> : tensor<64x4xf32> loc(#loc56)
+    %c64_i32 = arith.constant 64 : i32 loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc57)
+    %xoffset_3 = arith.muli %xoffset, %c64_i32 : i32 loc(#loc58)
+    %xindex = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32> loc(#loc59)
+    %xindex_4 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc60)
+    %xindex_5 = tt.splat %xoffset_3 : i32 -> tensor<64x1xi32> loc(#loc61)
+    %xindex_6 = arith.addi %xindex_5, %xindex_4 : tensor<64x1xi32> loc(#loc61)
+    %xmask = tt.splat %xnumel : i32 -> tensor<64x1xi32> loc(#loc62)
+    %xmask_7 = arith.cmpi slt, %xindex_6, %xmask : tensor<64x1xi32> loc(#loc62)
+    %r0_base = tt.make_range {end = 4 : i32, start = 0 : i32} : tensor<4xi32> loc(#loc63)
+    %r0_base_8 = tt.expand_dims %r0_base {axis = 0 : i32} : tensor<4xi32> -> tensor<1x4xi32> loc(#loc64)
+    %x0 = arith.extsi %xindex_6 : tensor<64x1xi32> to tensor<64x1xi64> loc(#loc65)
+    %x0_9 = tt.splat %ks0 : i64 -> tensor<64x1xi64> loc(#loc65)
+    %x0_10 = arith.remsi %x0, %x0_9 : tensor<64x1xi64> loc(#loc65)
+    %x1 = arith.divsi %x0, %x0_9 : tensor<64x1xi64> loc(#loc66)
+    %_tmp2_index_11:2 = scf.for %r0_offset = %c0_i32 to %c32000_i32 step %c4_i32 iter_args(%_tmp2_12 = %_tmp2, %_tmp2_index_13 = %_tmp2_index) -> (tensor<64x4xf32>, tensor<64x4xi32>)  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x4xi32> loc(#loc68)
+      %r0_index_14 = arith.addi %r0_index, %r0_base_8 : tensor<1x4xi32> loc(#loc68)
+      %r0_mask = arith.cmpi slt, %r0_index_14, %cst_2 : tensor<1x4xi32> loc(#loc69)
+      %tmp0 = arith.muli %x0_10, %cst_1 : tensor<64x1xi64> loc(#loc70)
+      %tmp0_15 = arith.extsi %r0_index_14 : tensor<1x4xi32> to tensor<1x4xi64> loc(#loc71)
+      %tmp0_16 = tt.broadcast %tmp0_15 : tensor<1x4xi64> -> tensor<64x4xi64> loc(#loc71)
+      %tmp0_17 = tt.broadcast %tmp0 : tensor<64x1xi64> -> tensor<64x4xi64> loc(#loc71)
+      %tmp0_18 = arith.addi %tmp0_16, %tmp0_17 : tensor<64x4xi64> loc(#loc71)
+      %tmp0_19 = tt.splat %ks1 : i64 -> tensor<64x1xi64> loc(#loc72)
+      %tmp0_20 = arith.muli %tmp0_19, %x1 : tensor<64x1xi64> loc(#loc72)
+      %tmp0_21 = tt.broadcast %tmp0_20 : tensor<64x1xi64> -> tensor<64x4xi64> loc(#loc73)
+      %tmp0_22 = arith.addi %tmp0_18, %tmp0_21 : tensor<64x4xi64> loc(#loc73)
+      %tmp0_23 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<64x4x!tt.ptr<f32>> loc(#loc74)
+      %tmp0_24 = tt.addptr %tmp0_23, %tmp0_22 : tensor<64x4x!tt.ptr<f32>>, tensor<64x4xi64> loc(#loc74)
+      %tmp0_25 = tt.broadcast %r0_mask : tensor<1x4xi1> -> tensor<64x4xi1> loc(#loc75)
+      %tmp0_26 = tt.broadcast %xmask_7 : tensor<64x1xi1> -> tensor<64x4xi1> loc(#loc75)
+      %tmp0_27 = arith.andi %tmp0_25, %tmp0_26 : tensor<64x4xi1> loc(#loc75)
+      %tmp0_28 = tt.load %tmp0_24, %tmp0_27, %cst_0 evictionPolicy = evict_first : tensor<64x4x!tt.ptr<f32>> loc(#loc76)
+      %mask = arith.cmpf ogt, %_tmp2_12, %tmp0_28 : tensor<64x4xf32> loc(#loc118)
+      %equal = arith.cmpf oeq, %_tmp2_12, %tmp0_28 : tensor<64x4xf32> loc(#loc119)
+      %a_isnan = arith.cmpf une, %_tmp2_12, %_tmp2_12 : tensor<64x4xf32> loc(#loc98)
+      %b_isnan = arith.cmpf une, %tmp0_28, %tmp0_28 : tensor<64x4xf32> loc(#loc99)
+      %mask_29 = arith.xori %b_isnan, %cst : tensor<64x4xi1> loc(#loc100)
+      %mask_30 = arith.andi %a_isnan, %mask_29 : tensor<64x4xi1> loc(#loc101)
+      %mask_31 = arith.ori %mask, %mask_30 : tensor<64x4xi1> loc(#loc120)
+      %equal_32 = arith.andi %a_isnan, %b_isnan : tensor<64x4xi1> loc(#loc103)
+      %equal_33 = arith.ori %equal, %equal_32 : tensor<64x4xi1> loc(#loc121)
+      %mask_34 = tt.broadcast %r0_index_14 : tensor<1x4xi32> -> tensor<64x4xi32> loc(#loc105)
+      %mask_35 = arith.cmpi slt, %_tmp2_index_13, %mask_34 : tensor<64x4xi32> loc(#loc105)
+      %mask_36 = arith.andi %equal_33, %mask_35 : tensor<64x4xi1> loc(#loc106)
+      %mask_37 = arith.ori %mask_31, %mask_36 : tensor<64x4xi1> loc(#loc107)
+      %4 = arith.select %mask_37, %_tmp2_12, %tmp0_28 : tensor<64x4xi1>, tensor<64x4xf32> loc(#loc89)
+      %5 = arith.select %mask_37, %_tmp2_index_13, %mask_34 : tensor<64x4xi1>, tensor<64x4xi32> loc(#loc90)
+      %_tmp2_38 = arith.select %tmp0_27, %4, %_tmp2_12 : tensor<64x4xi1>, tensor<64x4xf32> loc(#loc91)
+      %_tmp2_index_39 = arith.select %tmp0_27, %5, %_tmp2_index_13 : tensor<64x4xi1>, tensor<64x4xi32> loc(#loc92)
+      scf.yield %_tmp2_38, %_tmp2_index_39 : tensor<64x4xf32>, tensor<64x4xi32> loc(#loc42)
+    } loc(#loc95)
+    %0:2 = "tt.reduce"(%_tmp2_index_11#0, %_tmp2_index_11#1) <{axis = 1 : i32}> ({
+    ^bb0(%arg6: f32 loc(callsite(#loc1 at #loc2)), %arg7: i32 loc(callsite(#loc1 at #loc2)), %arg8: f32 loc(callsite(#loc1 at #loc2)), %arg9: i32 loc(callsite(#loc1 at #loc2))):
+      %mask = arith.cmpf ogt, %arg6, %arg8 : f32 loc(#loc122)
+      %equal = arith.cmpf oeq, %arg6, %arg8 : f32 loc(#loc123)
+      %a_isnan = arith.cmpf une, %arg6, %arg6 : f32 loc(#loc108)
+      %b_isnan = arith.cmpf une, %arg8, %arg8 : f32 loc(#loc109)
+      %mask_12 = arith.xori %b_isnan, %true : i1 loc(#loc110)
+      %mask_13 = arith.andi %a_isnan, %mask_12 : i1 loc(#loc111)
+      %mask_14 = arith.ori %mask, %mask_13 : i1 loc(#loc124)
+      %equal_15 = arith.andi %a_isnan, %b_isnan : i1 loc(#loc112)
+      %equal_16 = arith.ori %equal, %equal_15 : i1 loc(#loc125)
+      %mask_17 = arith.cmpi slt, %arg7, %arg9 : i32 loc(#loc113)
+      %mask_18 = arith.andi %equal_16, %mask_17 : i1 loc(#loc114)
+      %mask_19 = arith.ori %mask_14, %mask_18 : i1 loc(#loc115)
+      %4 = arith.select %mask_19, %arg6, %arg8 : f32 loc(#loc116)
+      %5 = arith.select %mask_19, %arg7, %arg9 : i32 loc(#loc117)
+      tt.reduce.return %4, %5 : f32, i32 loc(#loc93)
+    }) : (tensor<64x4xf32>, tensor<64x4xi32>) -> (tensor<64xf32>, tensor<64xi32>) loc(#loc93)
+    %tmp2 = tt.expand_dims %0#1 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc94)
+    %1 = tt.splat %out_ptr0 : !tt.ptr<i64> -> tensor<64x1x!tt.ptr<i64>> loc(#loc45)
+    %2 = tt.addptr %1, %xindex_6 : tensor<64x1x!tt.ptr<i64>>, tensor<64x1xi32> loc(#loc45)
+    %3 = arith.extsi %tmp2 : tensor<64x1xi32> to tensor<64x1xi64> loc(#loc46)
+    tt.store %2, %3, %xmask_7 : tensor<64x1x!tt.ptr<i64>> loc(#loc46)
+    tt.return loc(#loc47)
+  } loc(#loc)
+} loc(#loc)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":32:40)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":30:58)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":29:55)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:28)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:33)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:36)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:44)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:23)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":24:21)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":25:27)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":25:37)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":27:19)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":28:19)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":33:31)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":34:29)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:47)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:41)
+#loc20 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:56)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:52)
+#loc22 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:34)
+#loc23 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:71)
+#loc24 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:61)
+#loc25 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":144:21)
+#loc26 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":41:38)
+#loc27 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":145:23)
+#loc28 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":147:29)
+#loc29 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":148:29)
+#loc30 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:31)
+#loc31 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:27)
+#loc32 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:16)
+#loc33 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:27)
+#loc34 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:17)
+#loc35 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:31)
+#loc36 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:21)
+#loc37 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:12)
+#loc38 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:35)
+#loc39 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:69)
+#loc40 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":43:54)
+#loc41 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:66)
+#loc42 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:8)
+#loc43 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":165:42)
+#loc44 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":46:20)
+#loc45 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:25)
+#loc46 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:36)
+#loc47 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:4)
+#loc55 = loc("_tmp2_index"(#loc4))
+#loc56 = loc("_tmp2"(#loc5))
+#loc57 = loc("xoffset"(#loc6))
+#loc58 = loc("xoffset"(#loc7))
+#loc59 = loc("xindex"(#loc8))
+#loc60 = loc("xindex"(#loc9))
+#loc61 = loc("xindex"(#loc10))
+#loc62 = loc("xmask"(#loc11))
+#loc63 = loc("r0_base"(#loc12))
+#loc64 = loc("r0_base"(#loc13))
+#loc65 = loc("x0"(#loc14))
+#loc66 = loc("x1"(#loc15))
+#loc67 = loc("_tmp2"(#loc3))
+#loc68 = loc("r0_index"(#loc16))
+#loc69 = loc("r0_mask"(#loc17))
+#loc70 = loc("tmp0"(#loc18))
+#loc71 = loc("tmp0"(#loc19))
+#loc72 = loc("tmp0"(#loc20))
+#loc73 = loc("tmp0"(#loc21))
+#loc74 = loc("tmp0"(#loc22))
+#loc75 = loc("tmp0"(#loc23))
+#loc76 = loc("tmp0"(#loc24))
+#loc77 = loc("mask"(#loc25))
+#loc78 = loc("equal"(#loc27))
+#loc79 = loc("a_isnan"(#loc28))
+#loc80 = loc("b_isnan"(#loc29))
+#loc81 = loc("mask"(#loc30))
+#loc82 = loc("mask"(#loc31))
+#loc83 = loc("mask"(#loc32))
+#loc84 = loc("equal"(#loc33))
+#loc85 = loc("equal"(#loc34))
+#loc86 = loc("mask"(#loc35))
+#loc87 = loc("mask"(#loc36))
+#loc88 = loc("mask"(#loc37))
+#loc89 = loc(callsite(#loc38 at #loc26))
+#loc90 = loc(callsite(#loc39 at #loc26))
+#loc91 = loc("_tmp2"(#loc40))
+#loc92 = loc("_tmp2_index"(#loc41))
+#loc93 = loc(callsite(#loc43 at #loc2))
+#loc94 = loc("tmp2"(#loc44))
+#loc95 = loc("_tmp2_index"(#loc67))
+#loc96 = loc("mask"(#loc77))
+#loc97 = loc("equal"(#loc78))
+#loc98 = loc(callsite(#loc79 at #loc26))
+#loc99 = loc(callsite(#loc80 at #loc26))
+#loc100 = loc(callsite(#loc81 at #loc26))
+#loc101 = loc(callsite(#loc82 at #loc26))
+#loc102 = loc("mask"(#loc83))
+#loc103 = loc(callsite(#loc84 at #loc26))
+#loc104 = loc("equal"(#loc85))
+#loc105 = loc(callsite(#loc86 at #loc26))
+#loc106 = loc(callsite(#loc87 at #loc26))
+#loc107 = loc(callsite(#loc88 at #loc26))
+#loc108 = loc(callsite(#loc79 at #loc93))
+#loc109 = loc(callsite(#loc80 at #loc93))
+#loc110 = loc(callsite(#loc81 at #loc93))
+#loc111 = loc(callsite(#loc82 at #loc93))
+#loc112 = loc(callsite(#loc84 at #loc93))
+#loc113 = loc(callsite(#loc86 at #loc93))
+#loc114 = loc(callsite(#loc87 at #loc93))
+#loc115 = loc(callsite(#loc88 at #loc93))
+#loc116 = loc(callsite(#loc38 at #loc93))
+#loc117 = loc(callsite(#loc39 at #loc93))
+#loc118 = loc(callsite(#loc96 at #loc26))
+#loc119 = loc(callsite(#loc97 at #loc26))
+#loc120 = loc(callsite(#loc102 at #loc26))
+#loc121 = loc(callsite(#loc104 at #loc26))
+#loc122 = loc(callsite(#loc96 at #loc93))
+#loc123 = loc(callsite(#loc97 at #loc93))
+#loc124 = loc(callsite(#loc102 at #loc93))
+#loc125 = loc(callsite(#loc104 at #loc93))

SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/__grp__triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.source": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.source", "triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.ttir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.ttir", "triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.ttgir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.ttgir", "triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.llir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.llir", "triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.ptx": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.ptx", "triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.cubin": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.cubin", "triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.json": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.json"}}

SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.json

@@ -0,0 +1 @@
+{"hash": "fe376ba41d2f05ff2bb7c13c37b09b85f38cb341d26f28c38925cd0f032bd098", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 2, "num_ctas": 1, "num_stages": 1, "warp_size": 32, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "ptx_options": null, "ir_override": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "launch_pdl": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dot_operand_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/workspace/specforge/lib/python3.11/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "instrumentation_mode": "", "triton_version": "3.5.1", "tensordesc_meta": [], "shared": 0, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "profile_scratch_size": 0, "profile_scratch_align": 1, "name": "triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2"}

SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.llir

@@ -0,0 +1,266 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+target datalayout = "e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-p7:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"
+
+@assertFunc_0 = internal constant [8 x i8] c"unknown\00"
+@assertFile_0 = internal constant [114 x i8] c"/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py\00"
+@assertMessage_0 = internal constant [90 x i8] c"index out of bounds: 0 <= tmp15 < 1 + (triton_helpers.div_floor_integer(127 + ks1,  128))\00"
+
+; Function Attrs: noreturn
+declare !dbg !5 void @__assertfail(ptr, ptr, i32, ptr, i64) local_unnamed_addr #0
+
+define ptx_kernel void @triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2(ptr addrspace(1) %0, ptr addrspace(1) %1, ptr addrspace(1) %2, ptr addrspace(1) %3, ptr addrspace(1) %4, i64 %5, i64 %6, i32 %7, i32 %8, ptr addrspace(1) readnone captures(none) %9, ptr addrspace(1) readnone captures(none) %10) local_unnamed_addr #1 !dbg !9 {
+  %12 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !10
+  %13 = icmp samesign ult i32 %12, 32, !dbg !11
+  %14 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !12
+  %15 = and i32 %14, 31, !dbg !12
+  %16 = zext nneg i32 %12 to i64, !dbg !13
+  %17 = mul i64 %5, %16, !dbg !13
+  %18 = icmp sgt i32 %8, 0, !dbg !14
+  br i1 %18, label %.lr.ph, label %._crit_edge, !dbg !14
+
+.lr.ph:                                           ; preds = %11
+  %19 = getelementptr i32, ptr addrspace(1) %0, i64 %17
+  br i1 %13, label %.lr.ph.split, label %.lr.ph.split.us
+
+.lr.ph.split.us:                                  ; preds = %.lr.ph, %.lr.ph.split.us
+  %20 = phi i32 [ %26, %.lr.ph.split.us ], [ 0, %.lr.ph ]
+  %21 = or disjoint i32 %20, %15, !dbg !15
+  %22 = sext i32 %21 to i64, !dbg !16
+  %23 = getelementptr i32, ptr addrspace(1) %19, i64 %22, !dbg !17
+  %24 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #5, !dbg !18
+  %25 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$3 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $1 + 0 ], $2;", "=r,l,l,b"(ptr addrspace(1) %23, i64 %24, i1 false) #5, !dbg !18
+  %26 = add i32 %20, 32, !dbg !14
+  %27 = icmp slt i32 %26, %8, !dbg !14
+  br i1 %27, label %.lr.ph.split.us, label %._crit_edge, !dbg !14
+
+.lr.ph.split:                                     ; preds = %.lr.ph, %.lr.ph.split
+  %28 = phi i64 [ %36, %.lr.ph.split ], [ 0, %.lr.ph ]
+  %29 = phi i32 [ %37, %.lr.ph.split ], [ 0, %.lr.ph ]
+  %30 = or disjoint i32 %29, %15, !dbg !15
+  %31 = icmp slt i32 %30, %8, !dbg !19
+  %32 = sext i32 %30 to i64, !dbg !16
+  %33 = getelementptr i32, ptr addrspace(1) %19, i64 %32, !dbg !17
+  %34 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #5, !dbg !18
+  %35 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$3 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $1 + 0 ], $2;", "=r,l,l,b"(ptr addrspace(1) %33, i64 %34, i1 %31) #5, !dbg !18
+  %narrow16 = select i1 %31, i32 %35, i32 0, !dbg !20
+  %spec.select = sext i32 %narrow16 to i64, !dbg !20
+  %36 = add i64 %28, %spec.select, !dbg !20
+  %37 = add i32 %29, 32, !dbg !14
+  %38 = icmp slt i32 %37, %8, !dbg !14
+  br i1 %38, label %.lr.ph.split, label %._crit_edge, !dbg !14
+
+._crit_edge:                                      ; preds = %.lr.ph.split.us, %.lr.ph.split, %11
+  %.lcssa = phi i64 [ 0, %11 ], [ %36, %.lr.ph.split ], [ 0, %.lr.ph.split.us ], !dbg !21
+  %extelt.offset = lshr i64 %.lcssa, 32, !dbg !22
+  %39 = trunc nuw i64 %extelt.offset to i32, !dbg !22
+  %40 = trunc i64 %.lcssa to i32, !dbg !22
+  %41 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %40, i32 16, i32 31), !dbg !22
+  %42 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %39, i32 16, i32 31), !dbg !22
+  %43 = insertelement <2 x i32> poison, i32 %41, i64 0, !dbg !22
+  %44 = insertelement <2 x i32> %43, i32 %42, i64 1, !dbg !22
+  %45 = bitcast <2 x i32> %44 to i64, !dbg !22
+  %46 = add i64 %.lcssa, %45, !dbg !26
+  %extelt.offset3 = lshr i64 %46, 32, !dbg !22
+  %47 = trunc nuw i64 %extelt.offset3 to i32, !dbg !22
+  %48 = trunc i64 %46 to i32, !dbg !22
+  %49 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %48, i32 8, i32 31), !dbg !22
+  %50 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %47, i32 8, i32 31), !dbg !22
+  %51 = insertelement <2 x i32> poison, i32 %49, i64 0, !dbg !22
+  %52 = insertelement <2 x i32> %51, i32 %50, i64 1, !dbg !22
+  %53 = bitcast <2 x i32> %52 to i64, !dbg !22
+  %54 = add i64 %46, %53, !dbg !26
+  %extelt.offset4 = lshr i64 %54, 32, !dbg !22
+  %55 = trunc nuw i64 %extelt.offset4 to i32, !dbg !22
+  %56 = trunc i64 %54 to i32, !dbg !22
+  %57 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %56, i32 4, i32 31), !dbg !22
+  %58 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %55, i32 4, i32 31), !dbg !22
+  %59 = insertelement <2 x i32> poison, i32 %57, i64 0, !dbg !22
+  %60 = insertelement <2 x i32> %59, i32 %58, i64 1, !dbg !22
+  %61 = bitcast <2 x i32> %60 to i64, !dbg !22
+  %62 = add i64 %54, %61, !dbg !26
+  %extelt.offset5 = lshr i64 %62, 32, !dbg !22
+  %63 = trunc nuw i64 %extelt.offset5 to i32, !dbg !22
+  %64 = trunc i64 %62 to i32, !dbg !22
+  %65 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %64, i32 2, i32 31), !dbg !22
+  %66 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %63, i32 2, i32 31), !dbg !22
+  %67 = insertelement <2 x i32> poison, i32 %65, i64 0, !dbg !22
+  %68 = insertelement <2 x i32> %67, i32 %66, i64 1, !dbg !22
+  %69 = bitcast <2 x i32> %68 to i64, !dbg !22
+  %70 = add i64 %62, %69, !dbg !26
+  %extelt.offset6 = lshr i64 %70, 32, !dbg !22
+  %71 = trunc nuw i64 %extelt.offset6 to i32, !dbg !22
+  %72 = trunc i64 %70 to i32, !dbg !22
+  %73 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %72, i32 1, i32 31), !dbg !22
+  %74 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %71, i32 1, i32 31), !dbg !22
+  %75 = insertelement <2 x i32> poison, i32 %73, i64 0, !dbg !22
+  %76 = insertelement <2 x i32> %75, i32 %74, i64 1, !dbg !22
+  %77 = bitcast <2 x i32> %76 to i64, !dbg !22
+  %78 = add i64 %70, %77, !dbg !26
+  %79 = trunc i64 %78 to i32, !dbg !27
+  %80 = getelementptr i32, ptr addrspace(1) %2, i64 %16, !dbg !28
+  %81 = and i32 %14, 32, !dbg !29
+  %82 = icmp eq i32 %81, 0, !dbg !29
+  %83 = and i32 %14, 63, !dbg !29
+  %84 = icmp eq i32 %83, 0, !dbg !29
+  %85 = and i1 %13, %84, !dbg !29
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %79, ptr addrspace(1) %80, i1 %85) #5, !dbg !29
+  %86 = icmp slt i64 %5, 2, !dbg !30
+  %87 = icmp sgt i64 %5, 1, !dbg !31
+  %88 = select i1 %87, i64 %5, i64 0, !dbg !32
+  %89 = zext i1 %86 to i64, !dbg !33
+  %90 = add i64 %88, %89, !dbg !34
+  %91 = mul i64 %90, %16, !dbg !35
+  %92 = add i64 %5, 1, !dbg !36
+  %93 = add i64 %6, 127, !dbg !37
+  %94 = sdiv i64 %93, 128, !dbg !38
+  %95 = and i64 %93, 127, !dbg !42
+  %.not = icmp ne i64 %95, 0, !dbg !42
+  %96 = icmp slt i64 %93, 0, !dbg !43
+  %narrow = and i1 %96, %.not, !dbg !44
+  %97 = sext i1 %narrow to i64, !dbg !44
+  %98 = add nsw i64 %94, %97, !dbg !44
+  br i1 %18, label %.lr.ph14, label %._crit_edge15, !dbg !45
+
+.lr.ph14:                                         ; preds = %._crit_edge, %119
+  %99 = phi i32 [ %131, %119 ], [ 0, %._crit_edge ]
+  %100 = or disjoint i32 %99, %15, !dbg !46
+  %101 = icmp slt i32 %100, %8, !dbg !47
+  %102 = sext i32 %100 to i64, !dbg !48
+  %103 = add i64 %91, %102, !dbg !48
+  %104 = getelementptr i64, ptr addrspace(1) %1, i64 %103, !dbg !49
+  %105 = and i1 %13, %101, !dbg !50
+  %106 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #5, !dbg !51
+  %107 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$3 ld.global.L1::evict_first.L2::cache_hint.b64 { $0 }, [ $1 + 0 ], $2;", "=l,l,l,b"(ptr addrspace(1) %104, i64 %106, i1 %105) #5, !dbg !51
+  %108 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #5, !dbg !51
+  %109 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$3 ld.global.L1::evict_first.L2::cache_hint.b64 { $0 }, [ $1 + 0 ], $2;", "=l,l,l,b"(ptr addrspace(1) %104, i64 %108, i1 %105) #5, !dbg !51
+  %110 = icmp slt i32 %100, %79, !dbg !52
+  %sext7 = shl i64 %109, 32, !dbg !53
+  %111 = ashr exact i64 %sext7, 32, !dbg !53
+  %112 = select i1 %110, i64 %111, i64 %5, !dbg !53
+  %113 = icmp slt i64 %112, 0, !dbg !54
+  %114 = select i1 %113, i64 %92, i64 0, !dbg !55
+  %115 = add i64 %114, %112, !dbg !55
+  %116 = icmp slt i64 %115, 0, !dbg !56
+  %117 = icmp sgt i64 %115, %98, !dbg !57
+  %.not12 = or i1 %116, %117, !dbg !58
+  %.not9 = and i1 %105, %.not12, !dbg !59
+  br i1 %.not9, label %118, label %119, !dbg !59
+
+118:                                              ; preds = %.lr.ph14
+  tail call void @__assertfail(ptr nonnull @assertMessage_0, ptr nonnull @assertFile_0, i32 59, ptr nonnull @assertFunc_0, i64 1), !dbg !59
+  unreachable, !dbg !59
+
+119:                                              ; preds = %.lr.ph14
+  %sext = shl i64 %107, 32, !dbg !53
+  %120 = ashr exact i64 %sext, 32, !dbg !53
+  %121 = select i1 %110, i64 %120, i64 %5, !dbg !53
+  %122 = icmp slt i64 %121, 0, !dbg !54
+  %123 = select i1 %122, i64 %92, i64 0, !dbg !55
+  %124 = trunc i64 %109 to i32, !dbg !60
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !59
+  %125 = getelementptr i32, ptr addrspace(1) %3, i64 %103, !dbg !61
+  %126 = and i1 %82, %105, !dbg !62
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %124, ptr addrspace(1) %125, i1 %126) #5, !dbg !62
+  %127 = getelementptr i32, ptr addrspace(1) %4, i64 %121, !dbg !63
+  %128 = getelementptr i32, ptr addrspace(1) %127, i64 %123, !dbg !63
+  %129 = getelementptr i32, ptr addrspace(1) %128, i64 %16, !dbg !63
+  %130 = getelementptr i32, ptr addrspace(1) %129, i64 %17, !dbg !63
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 1, ptr addrspace(1) %130, i1 %126) #5, !dbg !64
+  %131 = add i32 %99, 32, !dbg !45
+  %132 = icmp slt i32 %131, %8, !dbg !45
+  br i1 %132, label %.lr.ph14, label %._crit_edge15, !dbg !45
+
+._crit_edge15:                                    ; preds = %119, %._crit_edge
+  ret void, !dbg !65
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 2147483647) i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #2
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x() #2
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #3
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier.cta.sync.aligned.all(i32) #4
+
+attributes #0 = { noreturn }
+attributes #1 = { "nvvm.reqntid"="64" }
+attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #3 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #4 = { convergent nocallback nounwind }
+attributes #5 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3}
+!llvm.ident = !{!4}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly)
+!1 = !DIFile(filename: "cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py", directory: "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge")
+!2 = !{i32 2, !"Debug Info Version", i32 3}
+!3 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!4 = !{!"clang version 3.8.0 (tags/RELEASE_380/final)"}
+!5 = !DISubprogram(name: "__assertfail", linkageName: "__assertfail", scope: !6, file: !6, type: !7, spFlags: DISPFlagOptimized)
+!6 = !DIFile(filename: "<unknown>", directory: "")
+!7 = !DISubroutineType(cc: DW_CC_normal, types: !8)
+!8 = !{}
+!9 = distinct !DISubprogram(name: "triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2", linkageName: "triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2", scope: !1, file: !1, line: 18, type: !7, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
+!10 = !DILocation(line: 22, column: 28, scope: !9)
+!11 = !DILocation(line: 24, column: 21, scope: !9)
+!12 = !DILocation(line: 25, column: 37, scope: !9)
+!13 = !DILocation(line: 35, column: 45, scope: !9)
+!14 = !DILocation(line: 29, column: 40, scope: !9)
+!15 = !DILocation(line: 30, column: 31, scope: !9)
+!16 = !DILocation(line: 35, column: 41, scope: !9)
+!17 = !DILocation(line: 35, column: 34, scope: !9)
+!18 = !DILocation(line: 35, column: 50, scope: !9)
+!19 = !DILocation(line: 31, column: 29, scope: !9)
+!20 = !DILocation(line: 39, column: 48, scope: !9)
+!21 = !DILocation(line: 28, column: 43, scope: !9)
+!22 = !DILocation(line: 291, column: 36, scope: !23, inlinedAt: !25)
+!23 = distinct !DILexicalBlockFile(scope: !9, file: !24, discriminator: 0)
+!24 = !DIFile(filename: "standard.py", directory: "/workspace/specforge/lib/python3.11/site-packages/triton/language")
+!25 = !DILocation(line: 40, column: 25, scope: !9)
+!26 = !DILocation(line: 261, column: 15, scope: !23, inlinedAt: !25)
+!27 = !DILocation(line: 41, column: 19, scope: !9)
+!28 = !DILocation(line: 42, column: 25, scope: !9)
+!29 = !DILocation(line: 42, column: 36, scope: !9)
+!30 = !DILocation(line: 49, column: 60, scope: !9)
+!31 = !DILocation(line: 49, column: 86, scope: !9)
+!32 = !DILocation(line: 49, column: 77, scope: !9)
+!33 = !DILocation(line: 49, scope: !9)
+!34 = !DILocation(line: 49, column: 68, scope: !9)
+!35 = !DILocation(line: 49, column: 45, scope: !9)
+!36 = !DILocation(line: 55, column: 20, scope: !9)
+!37 = !DILocation(line: 59, column: 94, scope: !9)
+!38 = !DILocation(line: 72, column: 16, scope: !39, inlinedAt: !41)
+!39 = distinct !DILexicalBlockFile(scope: !9, file: !40, discriminator: 0)
+!40 = !DIFile(filename: "triton_helpers.py", directory: "/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime")
+!41 = !DILocation(line: 59, column: 100, scope: !9)
+!42 = !DILocation(line: 74, column: 34, scope: !39, inlinedAt: !41)
+!43 = !DILocation(line: 75, column: 25, scope: !39, inlinedAt: !41)
+!44 = !DILocation(line: 75, column: 47, scope: !39, inlinedAt: !41)
+!45 = !DILocation(line: 43, column: 40, scope: !9)
+!46 = !DILocation(line: 44, column: 31, scope: !9)
+!47 = !DILocation(line: 45, column: 29, scope: !9)
+!48 = !DILocation(line: 49, column: 41, scope: !9)
+!49 = !DILocation(line: 49, column: 34, scope: !9)
+!50 = !DILocation(line: 49, column: 103, scope: !9)
+!51 = !DILocation(line: 49, column: 93, scope: !9)
+!52 = !DILocation(line: 52, column: 22, scope: !9)
+!53 = !DILocation(line: 54, column: 37, scope: !9)
+!54 = !DILocation(line: 57, column: 24, scope: !9)
+!55 = !DILocation(line: 58, column: 39, scope: !9)
+!56 = !DILocation(line: 59, column: 32, scope: !9)
+!57 = !DILocation(line: 59, column: 50, scope: !9)
+!58 = !DILocation(line: 59, column: 112, scope: !9)
+!59 = !DILocation(line: 59, column: 130, scope: !9)
+!60 = !DILocation(line: 50, column: 23, scope: !9)
+!61 = !DILocation(line: 61, column: 29, scope: !9)
+!62 = !DILocation(line: 61, column: 94, scope: !9)
+!63 = !DILocation(line: 62, column: 29, scope: !9)
+!64 = !DILocation(line: 62, column: 95, scope: !9)
+!65 = !DILocation(line: 43, column: 4, scope: !9)

SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.ptx

@@ -0,0 +1,640 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.7
+.target sm_90a
+.address_size 64
+
+	// .globl	triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2 // -- Begin function triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2
+.extern .func __assertfail
+(
+	.param .b64 __assertfail_param_0,
+	.param .b64 __assertfail_param_1,
+	.param .b32 __assertfail_param_2,
+	.param .b64 __assertfail_param_3,
+	.param .b64 __assertfail_param_4
+)
+.noreturn;
+.global .align 1 .b8 assertFunc_0[8] = {117, 110, 107, 110, 111, 119, 110};
+.global .align 1 .b8 assertFile_0[114] = {47, 119, 111, 114, 107, 115, 112, 97, 99, 101, 47, 104, 97, 110, 114, 117, 105, 47, 83, 112, 101, 99, 70, 111, 114, 103, 101, 45, 101, 120, 116, 47, 99, 97, 99, 104, 101, 47, 99, 111, 109, 112, 105, 108, 101, 100, 95, 107, 101, 114, 110, 101, 108, 115, 47, 103, 101, 47, 99, 103, 101, 55, 112, 112, 118, 118, 54, 53, 104, 97, 115, 114, 119, 113, 51, 51, 97, 97, 53, 121, 106, 110, 116, 52, 116, 119, 100, 122, 118, 119, 51, 112, 97, 107, 50, 120, 52, 98, 117, 55, 110, 55, 120, 50, 104, 121, 101, 120, 109, 118, 46, 112, 121};
+.global .align 1 .b8 assertMessage_0[90] = {105, 110, 100, 101, 120, 32, 111, 117, 116, 32, 111, 102, 32, 98, 111, 117, 110, 100, 115, 58, 32, 48, 32, 60, 61, 32, 116, 109, 112, 49, 53, 32, 60, 32, 49, 32, 43, 32, 40, 116, 114, 105, 116, 111, 110, 95, 104, 101, 108, 112, 101, 114, 115, 46, 100, 105, 118, 95, 102, 108, 111, 111, 114, 95, 105, 110, 116, 101, 103, 101, 114, 40, 49, 50, 55, 32, 43, 32, 107, 115, 49, 44, 32, 32, 49, 50, 56, 41, 41};
+                                        // @triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2
+.visible .entry triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2(
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_0,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_1,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_2,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_3,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_4,
+	.param .u64 triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_5,
+	.param .u64 triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_6,
+	.param .u32 triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_7,
+	.param .u32 triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_8,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_9,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_10
+)
+.reqntid 64
+{
+	.reg .pred 	%p<32>;
+	.reg .b32 	%r<53>;
+	.reg .b64 	%rd<103>;
+	.loc	1 18 0                          // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:18:0
+$L__func_begin0:
+	.loc	1 18 0                          // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:18:0
+
+// %bb.0:
+	ld.param.b32 	%r12, [triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_8];
+	ld.param.b64 	%rd18, [triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_5];
+	ld.param.b64 	%rd15, [triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_2];
+$L__tmp0:
+	.loc	1 22 28                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:22:28
+	mov.u32 	%r13, %ctaid.x;
+	.loc	1 25 37                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:25:37
+	mov.u32 	%r1, %tid.x;
+	and.b32 	%r2, %r1, 31;
+	.loc	1 35 45                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:35:45
+	cvt.u64.u32 	%rd1, %r13;
+	mul.lo.s64 	%rd2, %rd18, %rd1;
+	.loc	1 29 40                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:29:40
+	setp.lt.s32 	%p2, %r12, 1;
+	mov.b64 	%rd102, 0;
+	cvt.u32.u64 	%r49, %rd1;
+	shl.b64 	%rd100, %rd2, 2;
+	@%p2 bra 	$L__BB0_6;
+// %bb.1:                               // %.lr.ph
+	.loc	1 0 40                          // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:0:40
+	ld.param.b64 	%rd13, [triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_0];
+	.loc	1 24 21                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:24:21
+	setp.lt.u32 	%p3, %r49, 32;
+	add.s64 	%rd3, %rd13, %rd100;
+	@%p3 bra 	$L__BB0_4;
+	bra.uni 	$L__BB0_2;
+$L__BB0_4:                              // %.lr.ph.split.preheader
+	.loc	1 0 21                          // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:0:21
+	mov.b32 	%r51, 0;
+	mov.b64 	%rd102, 0;
+$L__BB0_5:                              // %.lr.ph.split
+                                        // =>This Inner Loop Header: Depth=1
+	.loc	1 31 29                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:31:29
+	add.s32 	%r20, %r2, %r51;
+	setp.lt.s32 	%p6, %r20, %r12;
+	.loc	1 35 34                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:35:34
+	mad.wide.s32 	%rd28, %r20, 4, %rd3;
+	.loc	1 35 50                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:35:50
+	// begin inline asm
+	mov.u64 %rd27, 0x0;
+	createpolicy.fractional.L2::evict_first.b64 %rd27, 1.0;
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r19, 0x0;
+	@%p6 ld.global.L1::evict_first.L2::cache_hint.b32 { %r19 }, [ %rd28 + 0 ], %rd27;
+	// end inline asm
+	.loc	1 39 48                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:39:48
+	selp.b32 	%r21, %r19, 0, %p6;
+	cvt.s64.s32 	%rd30, %r21;
+	add.s64 	%rd102, %rd102, %rd30;
+	.loc	1 29 40                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:29:40
+	add.s32 	%r51, %r51, 32;
+	setp.lt.s32 	%p7, %r51, %r12;
+	@%p7 bra 	$L__BB0_5;
+	bra.uni 	$L__BB0_6;
+$L__BB0_2:                              // %.lr.ph.split.us.preheader
+	.loc	1 0 40                          // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:0:40
+	mov.b32 	%r50, 0;
+$L__BB0_3:                              // %.lr.ph.split.us
+                                        // =>This Inner Loop Header: Depth=1
+	.loc	1 35 41                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:35:41
+	add.s32 	%r17, %r2, %r50;
+	.loc	1 35 34                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:35:34
+	mad.wide.s32 	%rd23, %r17, 4, %rd3;
+	.loc	1 35 50                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:35:50
+	// begin inline asm
+	mov.u64 %rd22, 0x0;
+	createpolicy.fractional.L2::evict_first.b64 %rd22, 1.0;
+	// end inline asm
+	mov.pred 	%p4, 0;
+	// begin inline asm
+	mov.u32 %r16, 0x0;
+	@%p4 ld.global.L1::evict_first.L2::cache_hint.b32 { %r16 }, [ %rd23 + 0 ], %rd22;
+	// end inline asm
+	.loc	1 29 40                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:29:40
+	add.s32 	%r50, %r50, 32;
+	setp.lt.s32 	%p5, %r50, %r12;
+	@%p5 bra 	$L__BB0_3;
+$L__BB0_6:                              // %._crit_edge
+	.loc	1 24 21                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:24:21
+	setp.lt.u32 	%p10, %r49, 32;
+$L__tmp1:
+	.loc	2 291 36                        // standard.py:291:36 @[ cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:40:25 ]
+	mov.b64 	{_, %r24}, %rd102;
+	cvt.u32.u64 	%r25, %rd102;
+	shfl.sync.bfly.b32 	%r26, %r25, 16, 31, -1;
+	shfl.sync.bfly.b32 	%r27, %r24, 16, 31, -1;
+	cvt.u64.u32 	%rd32, %r26;
+	cvt.u64.u32 	%rd33, %r27;
+	shl.b64 	%rd34, %rd33, 32;
+	or.b64 	%rd35, %rd32, %rd34;
+	.loc	2 261 15                        // standard.py:261:15 @[ cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:40:25 ]
+	add.s64 	%rd36, %rd102, %rd35;
+	.loc	2 291 36                        // standard.py:291:36 @[ cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:40:25 ]
+	mov.b64 	{_, %r28}, %rd36;
+	cvt.u32.u64 	%r29, %rd36;
+	shfl.sync.bfly.b32 	%r30, %r29, 8, 31, -1;
+	shfl.sync.bfly.b32 	%r31, %r28, 8, 31, -1;
+	cvt.u64.u32 	%rd37, %r30;
+	cvt.u64.u32 	%rd38, %r31;
+	shl.b64 	%rd39, %rd38, 32;
+	or.b64 	%rd40, %rd37, %rd39;
+	.loc	2 261 15                        // standard.py:261:15 @[ cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:40:25 ]
+	add.s64 	%rd41, %rd36, %rd40;
+	.loc	2 291 36                        // standard.py:291:36 @[ cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:40:25 ]
+	mov.b64 	{_, %r32}, %rd41;
+	cvt.u32.u64 	%r33, %rd41;
+	shfl.sync.bfly.b32 	%r34, %r33, 4, 31, -1;
+	shfl.sync.bfly.b32 	%r35, %r32, 4, 31, -1;
+	cvt.u64.u32 	%rd42, %r34;
+	cvt.u64.u32 	%rd43, %r35;
+	shl.b64 	%rd44, %rd43, 32;
+	or.b64 	%rd45, %rd42, %rd44;
+	.loc	2 261 15                        // standard.py:261:15 @[ cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:40:25 ]
+	add.s64 	%rd46, %rd41, %rd45;
+	.loc	2 291 36                        // standard.py:291:36 @[ cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:40:25 ]
+	mov.b64 	{_, %r36}, %rd46;
+	cvt.u32.u64 	%r37, %rd46;
+	shfl.sync.bfly.b32 	%r38, %r37, 2, 31, -1;
+	shfl.sync.bfly.b32 	%r39, %r36, 2, 31, -1;
+	cvt.u64.u32 	%rd47, %r38;
+	cvt.u64.u32 	%rd48, %r39;
+	shl.b64 	%rd49, %rd48, 32;
+	or.b64 	%rd50, %rd47, %rd49;
+	.loc	2 261 15                        // standard.py:261:15 @[ cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:40:25 ]
+	add.s64 	%rd51, %rd46, %rd50;
+	.loc	2 291 36                        // standard.py:291:36 @[ cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:40:25 ]
+	mov.b64 	{_, %r40}, %rd51;
+	cvt.u32.u64 	%r41, %rd51;
+	shfl.sync.bfly.b32 	%r42, %r41, 1, 31, -1;
+	shfl.sync.bfly.b32 	%r43, %r40, 1, 31, -1;
+	cvt.u64.u32 	%rd52, %r42;
+	.loc	2 261 15                        // standard.py:261:15 @[ cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:40:25 ]
+	add.s64 	%rd53, %rd51, %rd52;
+$L__tmp2:
+	.loc	1 41 19                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:41:19
+	cvt.u32.u64 	%r22, %rd53;
+	.loc	1 42 25                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:42:25
+	shl.b64 	%rd54, %rd1, 2;
+	add.s64 	%rd31, %rd15, %rd54;
+	.loc	1 42 36                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:42:36
+	and.b32 	%r44, %r1, 63;
+	setp.eq.b32 	%p11, %r44, 0;
+	and.pred 	%p8, %p10, %p11;
+	// begin inline asm
+	@%p8 st.global.b32 [ %rd31 + 0 ], { %r22 };
+	// end inline asm
+	.loc	1 43 40                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:43:40
+	@%p2 bra 	$L__BB0_11;
+// %bb.7:                               // %.lr.ph14.preheader
+	.loc	1 0 40                          // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:0:40
+	ld.param.b64 	%rd19, [triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_6];
+	ld.param.b64 	%rd17, [triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_4];
+	ld.param.b64 	%rd16, [triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_3];
+	ld.param.b64 	%rd14, [triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2_param_1];
+	and.b32 	%r8, %r1, 32;
+	setp.lt.s64 	%p12, %rd18, 2;
+	setp.gt.s64 	%p13, %rd18, 1;
+	selp.b64 	%rd55, %rd18, 0, %p13;
+	selp.b64 	%rd56, 1, 0, %p12;
+	add.s64 	%rd57, %rd55, %rd56;
+	mul.lo.s64 	%rd7, %rd57, %rd1;
+	add.s64 	%rd8, %rd18, 1;
+	add.s64 	%rd58, %rd19, 127;
+	shr.s64 	%rd59, %rd58, 63;
+	shr.u64 	%rd60, %rd59, 57;
+	add.s64 	%rd61, %rd58, %rd60;
+	shr.s64 	%rd62, %rd61, 7;
+	and.b64 	%rd63, %rd58, 127;
+	setp.ne.b64 	%p14, %rd63, 0;
+	setp.lt.s64 	%p15, %rd58, 0;
+	and.pred 	%p16, %p15, %p14;
+	selp.b64 	%rd64, -1, 0, %p16;
+	add.s64 	%rd9, %rd62, %rd64;
+	mov.b32 	%r52, 0;
+$L__BB0_8:                              // %.lr.ph14
+                                        // =>This Inner Loop Header: Depth=1
+	.loc	1 45 29                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:45:29
+	add.s32 	%r10, %r2, %r52;
+	setp.lt.s32 	%p20, %r10, %r12;
+	.loc	1 49 41                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:49:41
+	cvt.s64.s32 	%rd73, %r10;
+	add.s64 	%rd10, %rd7, %rd73;
+	.loc	1 49 34                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:49:34
+	shl.b64 	%rd74, %rd10, 3;
+	add.s64 	%rd67, %rd14, %rd74;
+	.loc	1 49 103                        // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:49:103
+	and.pred 	%p18, %p10, %p20;
+	.loc	1 49 93                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:49:93
+	// begin inline asm
+	mov.u64 %rd65, 0x0;
+	createpolicy.fractional.L2::evict_first.b64 %rd65, 1.0;
+	// end inline asm
+	// begin inline asm
+	mov.u64 %rd66, 0x0;
+	@%p18 ld.global.L1::evict_first.L2::cache_hint.b64 { %rd66 }, [ %rd67 + 0 ], %rd65;
+	// end inline asm
+	// begin inline asm
+	mov.u64 %rd69, 0x0;
+	createpolicy.fractional.L2::evict_first.b64 %rd69, 1.0;
+	// end inline asm
+	// begin inline asm
+	mov.u64 %rd70, 0x0;
+	@%p18 ld.global.L1::evict_first.L2::cache_hint.b64 { %rd70 }, [ %rd67 + 0 ], %rd69;
+	// end inline asm
+	.loc	1 52 22                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:52:22
+	setp.lt.s32 	%p21, %r10, %r22;
+	.loc	1 54 37                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:54:37
+	cvt.s64.s32 	%rd75, %rd70;
+	selp.b64 	%rd76, %rd75, %rd18, %p21;
+	.loc	1 58 39                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:58:39
+	shr.s64 	%rd77, %rd76, 63;
+	and.b64 	%rd78, %rd77, %rd8;
+	add.s64 	%rd79, %rd78, %rd76;
+	.loc	1 59 32                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:59:32
+	setp.lt.s64 	%p22, %rd79, 0;
+	.loc	1 59 50                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:59:50
+	setp.gt.s64 	%p23, %rd79, %rd9;
+	.loc	1 59 112                        // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:59:112
+	or.pred 	%p24, %p22, %p23;
+	.loc	1 59 130                        // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:59:130
+	and.pred 	%p25, %p18, %p24;
+	not.pred 	%p26, %p25;
+	@%p26 bra 	$L__BB0_10;
+	bra.uni 	$L__BB0_9;
+$L__BB0_10:                             //   in Loop: Header=BB0_8 Depth=1
+	.loc	1 42 36                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:42:36
+	setp.eq.b32 	%p30, %r8, 0;
+	.loc	1 54 37                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:54:37
+	cvt.s64.s32 	%rd82, %rd66;
+	selp.b64 	%rd83, %rd82, %rd18, %p21;
+	.loc	1 58 39                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:58:39
+	shr.s64 	%rd84, %rd83, 63;
+	and.b64 	%rd85, %rd84, %rd8;
+	.loc	1 50 23                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:50:23
+	cvt.u32.u64 	%r47, %rd70;
+	.loc	1 59 130                        // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:59:130
+	bar.sync 	0;
+	.loc	1 61 29                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:61:29
+	shl.b64 	%rd86, %rd10, 2;
+	add.s64 	%rd80, %rd16, %rd86;
+	.loc	1 61 94                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:61:94
+	and.pred 	%p27, %p30, %p18;
+	// begin inline asm
+	@%p27 st.global.b32 [ %rd80 + 0 ], { %r47 };
+	// end inline asm
+	.loc	1 62 29                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:62:29
+	shl.b64 	%rd87, %rd83, 2;
+	add.s64 	%rd88, %rd17, %rd87;
+	shl.b64 	%rd89, %rd85, 2;
+	add.s64 	%rd90, %rd88, %rd89;
+	add.s64 	%rd92, %rd90, %rd54;
+	add.s64 	%rd81, %rd92, %rd100;
+	mov.b32 	%r48, 1;
+	.loc	1 62 95                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:62:95
+	// begin inline asm
+	@%p27 st.global.b32 [ %rd81 + 0 ], { %r48 };
+	// end inline asm
+	.loc	1 43 40                         // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:43:40
+	add.s32 	%r52, %r52, 32;
+	setp.lt.s32 	%p31, %r52, %r12;
+	@%p31 bra 	$L__BB0_8;
+$L__BB0_11:                             // %._crit_edge15
+	.loc	1 43 4                          // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:43:4
+	ret;
+$L__BB0_9:
+	.loc	1 59 130                        // cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py:59:130
+	{ // callseq 0, 0
+	.param .b64 	param0;
+	.param .b64 	param1;
+	.param .b32 	param2;
+	.param .b64 	param3;
+	.param .b64 	param4;
+	mov.b64 	%rd94, assertFunc_0;
+	cvta.global.u64 	%rd95, %rd94;
+	st.param.b64 	[param3], %rd95;
+	mov.b64 	%rd96, assertFile_0;
+	cvta.global.u64 	%rd97, %rd96;
+	st.param.b64 	[param1], %rd97;
+	mov.b64 	%rd98, assertMessage_0;
+	cvta.global.u64 	%rd99, %rd98;
+	st.param.b64 	[param0], %rd99;
+	st.param.b64 	[param4], 1;
+	st.param.b32 	[param2], 59;
+	call.uni __assertfail, (param0, param1, param2, param3, param4);
+	} // callseq 0
+	trap;
+$L__tmp3:
+$L__func_end0:
+                                        // -- End function
+}
+	.file	1 "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py"
+	.file	2 "/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1                                   // Abbreviation Code
+.b8 17                                  // DW_TAG_compile_unit
+.b8 1                                   // DW_CHILDREN_yes
+.b8 37                                  // DW_AT_producer
+.b8 8                                   // DW_FORM_string
+.b8 19                                  // DW_AT_language
+.b8 5                                   // DW_FORM_data2
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 16                                  // DW_AT_stmt_list
+.b8 6                                   // DW_FORM_data4
+.b8 27                                  // DW_AT_comp_dir
+.b8 8                                   // DW_FORM_string
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 2                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 0                                   // DW_CHILDREN_no
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 32                                  // DW_AT_inline
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 3                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 1                                   // DW_CHILDREN_yes
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 4                                   // Abbreviation Code
+.b8 29                                  // DW_TAG_inlined_subroutine
+.b8 0                                   // DW_CHILDREN_no
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 88                                  // DW_AT_call_file
+.b8 11                                  // DW_FORM_data1
+.b8 89                                  // DW_AT_call_line
+.b8 11                                  // DW_FORM_data1
+.b8 87                                  // DW_AT_call_column
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 0                                   // EOM(3)
+	}
+	.section	.debug_info
+	{
+.b32 281                                // Length of Unit
+.b8 2                                   // DWARF version number
+.b8 0
+.b32 .debug_abbrev                      // Offset Into Abbrev. Section
+.b8 8                                   // Address Size (in bytes)
+.b8 1                                   // Abbrev [1] 0xb:0x112 DW_TAG_compile_unit
+.b8 116                                 // DW_AT_producer
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2                                   // DW_AT_language
+.b8 0
+.b8 99                                  // DW_AT_name
+.b8 103
+.b8 101
+.b8 55
+.b8 112
+.b8 112
+.b8 118
+.b8 118
+.b8 54
+.b8 53
+.b8 104
+.b8 97
+.b8 115
+.b8 114
+.b8 119
+.b8 113
+.b8 51
+.b8 51
+.b8 97
+.b8 97
+.b8 53
+.b8 121
+.b8 106
+.b8 110
+.b8 116
+.b8 52
+.b8 116
+.b8 119
+.b8 100
+.b8 122
+.b8 118
+.b8 119
+.b8 51
+.b8 112
+.b8 97
+.b8 107
+.b8 50
+.b8 120
+.b8 52
+.b8 98
+.b8 117
+.b8 55
+.b8 110
+.b8 55
+.b8 120
+.b8 50
+.b8 104
+.b8 121
+.b8 101
+.b8 120
+.b8 109
+.b8 118
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line                        // DW_AT_stmt_list
+.b8 47                                  // DW_AT_comp_dir
+.b8 119
+.b8 111
+.b8 114
+.b8 107
+.b8 115
+.b8 112
+.b8 97
+.b8 99
+.b8 101
+.b8 47
+.b8 104
+.b8 97
+.b8 110
+.b8 114
+.b8 117
+.b8 105
+.b8 47
+.b8 83
+.b8 112
+.b8 101
+.b8 99
+.b8 70
+.b8 111
+.b8 114
+.b8 103
+.b8 101
+.b8 45
+.b8 101
+.b8 120
+.b8 116
+.b8 47
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 99
+.b8 111
+.b8 109
+.b8 112
+.b8 105
+.b8 108
+.b8 101
+.b8 100
+.b8 95
+.b8 107
+.b8 101
+.b8 114
+.b8 110
+.b8 101
+.b8 108
+.b8 115
+.b8 47
+.b8 103
+.b8 101
+.b8 0
+.b8 2                                   // Abbrev [2] 0x8b:0x63 DW_TAG_subprogram
+.b8 116                                 // DW_AT_name
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 114
+.b8 101
+.b8 100
+.b8 95
+.b8 102
+.b8 117
+.b8 115
+.b8 101
+.b8 100
+.b8 95
+.b8 95
+.b8 116
+.b8 111
+.b8 95
+.b8 99
+.b8 111
+.b8 112
+.b8 121
+.b8 95
+.b8 97
+.b8 114
+.b8 97
+.b8 110
+.b8 103
+.b8 101
+.b8 95
+.b8 105
+.b8 110
+.b8 100
+.b8 101
+.b8 120
+.b8 95
+.b8 112
+.b8 117
+.b8 116
+.b8 95
+.b8 108
+.b8 116
+.b8 95
+.b8 110
+.b8 101
+.b8 119
+.b8 95
+.b8 122
+.b8 101
+.b8 114
+.b8 111
+.b8 115
+.b8 95
+.b8 115
+.b8 99
+.b8 97
+.b8 108
+.b8 97
+.b8 114
+.b8 95
+.b8 116
+.b8 101
+.b8 110
+.b8 115
+.b8 111
+.b8 114
+.b8 95
+.b8 115
+.b8 117
+.b8 109
+.b8 95
+.b8 117
+.b8 110
+.b8 115
+.b8 113
+.b8 117
+.b8 101
+.b8 101
+.b8 122
+.b8 101
+.b8 95
+.b8 118
+.b8 105
+.b8 101
+.b8 119
+.b8 95
+.b8 119
+.b8 104
+.b8 101
+.b8 114
+.b8 101
+.b8 95
+.b8 50
+.b8 0
+.b8 1                                   // DW_AT_inline
+.b8 3                                   // Abbrev [3] 0xee:0x2e DW_TAG_subprogram
+.b64 $L__func_begin0                    // DW_AT_low_pc
+.b64 $L__func_end0                      // DW_AT_high_pc
+.b32 139                                // DW_AT_abstract_origin
+.b8 4                                   // Abbrev [4] 0x103:0x18 DW_TAG_inlined_subroutine
+.b32 139                                // DW_AT_abstract_origin
+.b64 $L__tmp1                           // DW_AT_low_pc
+.b64 $L__tmp2                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 40                                  // DW_AT_call_line
+.b8 25                                  // DW_AT_call_column
+.b8 0                                   // End Of Children Mark
+.b8 0                                   // End Of Children Mark
+	}
+	.section	.debug_macinfo	{	}

SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.source

@@ -0,0 +1,379 @@
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":18:0)
+#loc77 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":285:0)
+#loc79 = loc(unknown)
+#loc82 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":260:0)
+#loc86 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":69:0)
+#loc97 = loc("in_ptr0"(#loc))
+#loc98 = loc("in_ptr1"(#loc))
+#loc99 = loc("out_ptr1"(#loc))
+#loc100 = loc("out_ptr2"(#loc))
+#loc101 = loc("out_ptr3"(#loc))
+#loc102 = loc("ks0"(#loc))
+#loc103 = loc("ks1"(#loc))
+#loc104 = loc("xnumel"(#loc))
+#loc105 = loc("r0_numel"(#loc))
+#loc151 = loc("input"(#loc77))
+#loc152 = loc("a"(#loc82))
+#loc153 = loc("b"(#loc82))
+#loc154 = loc("a"(#loc86))
+module {
+  tt.func public @triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2(%in_ptr0: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %in_ptr1: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("in_ptr1"(#loc)), %out_ptr1: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %out_ptr3: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr3"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc)), %r0_numel: i32 loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %xnumel_0 = arith.constant 32 : i32 loc(#loc106)
+    %xoffset = tt.get_program_id x : i32 loc(#loc107)
+    %xoffset_1 = arith.constant 1 : i32 loc(#loc108)
+    %xoffset_2 = arith.constant 1 : i32 loc(#loc108)
+    %xoffset_3 = arith.muli %xoffset, %xoffset_2 : i32 loc(#loc108)
+    %xindex = tt.make_range {end = 1 : i32, start = 0 : i32} : tensor<1xi32> loc(#loc109)
+    %xindex_4 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<1xi32> -> tensor<1x1xi32> loc(#loc110)
+    %xindex_5 = tt.splat %xoffset_3 : i32 -> tensor<1x1xi32> loc(#loc111)
+    %xindex_6 = arith.addi %xindex_5, %xindex_4 : tensor<1x1xi32> loc(#loc111)
+    %xmask = arith.constant dense<32> : tensor<1x1xi32> loc(#loc112)
+    %xmask_7 = arith.cmpi slt, %xindex_6, %xmask : tensor<1x1xi32> loc(#loc112)
+    %r0_base = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32> loc(#loc113)
+    %r0_base_8 = tt.expand_dims %r0_base {axis = 0 : i32} : tensor<32xi32> -> tensor<1x32xi32> loc(#loc114)
+    %_tmp3 = arith.constant 0 : i64 loc(#loc115)
+    %_tmp3_9 = arith.constant dense<0> : tensor<1x32xi64> loc(#loc115)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc11)
+    %c32_i32 = arith.constant 32 : i32 loc(#loc11)
+    %0 = arith.bitcast %c0_i32 : i32 to i32 loc(#loc11)
+    %1 = arith.bitcast %r0_numel : i32 to i32 loc(#loc11)
+    %2 = arith.bitcast %c32_i32 : i32 to i32 loc(#loc11)
+    %3 = ub.poison : i32 loc(#loc11)
+    %_tmp3_10 = scf.for %r0_offset = %0 to %1 step %2 iter_args(%_tmp3_14 = %_tmp3_9) -> (tensor<1x32xi64>)  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x32xi32> loc(#loc117)
+      %r0_index_15 = arith.addi %r0_index, %r0_base_8 : tensor<1x32xi32> loc(#loc117)
+      %r0_mask = tt.splat %r0_numel : i32 -> tensor<1x32xi32> loc(#loc118)
+      %r0_mask_16 = arith.cmpi slt, %r0_index_15, %r0_mask : tensor<1x32xi32> loc(#loc118)
+      %tmp0 = arith.extsi %xindex_6 : tensor<1x1xi32> to tensor<1x1xi64> loc(#loc119)
+      %tmp0_17 = tt.splat %ks0 : i64 -> tensor<1x1xi64> loc(#loc119)
+      %tmp0_18 = arith.muli %tmp0_17, %tmp0 : tensor<1x1xi64> loc(#loc119)
+      %tmp0_19 = arith.extsi %r0_index_15 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc120)
+      %tmp0_20 = tt.broadcast %tmp0_18 : tensor<1x1xi64> -> tensor<1x32xi64> loc(#loc120)
+      %tmp0_21 = arith.addi %tmp0_19, %tmp0_20 : tensor<1x32xi64> loc(#loc120)
+      %tmp0_22 = tt.splat %in_ptr0 : !tt.ptr<i32> -> tensor<1x32x!tt.ptr<i32>> loc(#loc121)
+      %tmp0_23 = tt.addptr %tmp0_22, %tmp0_21 : tensor<1x32x!tt.ptr<i32>>, tensor<1x32xi64> loc(#loc121)
+      %tmp0_24 = tt.broadcast %xmask_7 : tensor<1x1xi1> -> tensor<1x32xi1> loc(#loc122)
+      %tmp0_25 = arith.andi %r0_mask_16, %tmp0_24 : tensor<1x32xi1> loc(#loc122)
+      %tmp0_26 = arith.constant 0.000000e+00 : f32 loc(#loc123)
+      %tmp0_27 = arith.constant dense<0.000000e+00> : tensor<1x32xf32> loc(#loc123)
+      %tmp0_28 = arith.fptosi %tmp0_27 : tensor<1x32xf32> to tensor<1x32xi32> loc(#loc123)
+      %tmp0_29 = tt.load %tmp0_23, %tmp0_25, %tmp0_28 evictionPolicy = evict_first : tensor<1x32x!tt.ptr<i32>> loc(#loc123)
+      %tmp1 = arith.extsi %tmp0_29 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc124)
+      %tmp4 = arith.addi %_tmp3_14, %tmp1 : tensor<1x32xi64> loc(#loc125)
+      %_tmp3_30 = tt.broadcast %xmask_7 : tensor<1x1xi1> -> tensor<1x32xi1> loc(#loc126)
+      %_tmp3_31 = arith.andi %r0_mask_16, %_tmp3_30 : tensor<1x32xi1> loc(#loc126)
+      %_tmp3_32 = arith.select %_tmp3_31, %tmp4, %_tmp3_14 : tensor<1x32xi1>, tensor<1x32xi64> loc(#loc127)
+      scf.yield %_tmp3_32 : tensor<1x32xi64> loc(#loc23)
+    } loc(#loc116)
+    %tmp3 = tt.call @"triton.language.standard.sum__i64S1_32S__(1,)cconstexpr_1__(2,)cconstexpr_False__(3,)cNone"(%_tmp3_10) : (tensor<1x32xi64>) -> tensor<1xi64> loc(#loc128)
+    %tmp3_11 = tt.expand_dims %tmp3 {axis = 1 : i32} : tensor<1xi64> -> tensor<1x1xi64> loc(#loc129)
+    %tmp5 = arith.trunci %tmp3_11 : tensor<1x1xi64> to tensor<1x1xi32> loc(#loc130)
+    %4 = tt.splat %out_ptr1 : !tt.ptr<i32> -> tensor<1x1x!tt.ptr<i32>> loc(#loc27)
+    %5 = tt.addptr %4, %xindex_6 : tensor<1x1x!tt.ptr<i32>>, tensor<1x1xi32> loc(#loc27)
+    tt.store %5, %tmp5, %xmask_7 : tensor<1x1x!tt.ptr<i32>> loc(#loc28)
+    %c0_i32_12 = arith.constant 0 : i32 loc(#loc29)
+    %c32_i32_13 = arith.constant 32 : i32 loc(#loc29)
+    %6 = arith.bitcast %c0_i32_12 : i32 to i32 loc(#loc29)
+    %7 = arith.bitcast %r0_numel : i32 to i32 loc(#loc29)
+    %8 = arith.bitcast %c32_i32_13 : i32 to i32 loc(#loc29)
+    %9 = ub.poison : i32 loc(#loc29)
+    scf.for %r0_offset = %6 to %7 step %8  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x32xi32> loc(#loc131)
+      %r0_index_14 = arith.addi %r0_index, %r0_base_8 : tensor<1x32xi32> loc(#loc131)
+      %r0_mask = tt.splat %r0_numel : i32 -> tensor<1x32xi32> loc(#loc132)
+      %r0_mask_15 = arith.cmpi slt, %r0_index_14, %r0_mask : tensor<1x32xi32> loc(#loc132)
+      %tmp6 = arith.constant 1 : i32 loc(#loc133)
+      %tmp6_16 = arith.extsi %tmp6 : i32 to i64 loc(#loc133)
+      %tmp6_17 = arith.cmpi sge, %tmp6_16, %ks0 : i64 loc(#loc133)
+      %tmp6_18 = arith.constant 1 : i32 loc(#loc134)
+      %tmp6_19 = arith.constant 1 : i32 loc(#loc134)
+      %tmp6_20 = arith.extui %tmp6_17 : i1 to i32 loc(#loc134)
+      %tmp6_21 = arith.muli %tmp6_19, %tmp6_20 : i32 loc(#loc134)
+      %tmp6_22 = arith.constant 1 : i32 loc(#loc135)
+      %tmp6_23 = arith.extsi %tmp6_22 : i32 to i64 loc(#loc135)
+      %tmp6_24 = arith.cmpi sgt, %ks0, %tmp6_23 : i64 loc(#loc135)
+      %tmp6_25 = arith.extui %tmp6_24 : i1 to i64 loc(#loc136)
+      %tmp6_26 = arith.muli %ks0, %tmp6_25 : i64 loc(#loc136)
+      %tmp6_27 = arith.extsi %tmp6_21 : i32 to i64 loc(#loc137)
+      %tmp6_28 = arith.addi %tmp6_27, %tmp6_26 : i64 loc(#loc137)
+      %tmp6_29 = arith.extsi %xindex_6 : tensor<1x1xi32> to tensor<1x1xi64> loc(#loc138)
+      %tmp6_30 = tt.splat %tmp6_28 : i64 -> tensor<1x1xi64> loc(#loc138)
+      %tmp6_31 = arith.muli %tmp6_29, %tmp6_30 : tensor<1x1xi64> loc(#loc138)
+      %tmp6_32 = arith.extsi %r0_index_14 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc139)
+      %tmp6_33 = tt.broadcast %tmp6_31 : tensor<1x1xi64> -> tensor<1x32xi64> loc(#loc139)
+      %tmp6_34 = arith.addi %tmp6_32, %tmp6_33 : tensor<1x32xi64> loc(#loc139)
+      %tmp6_35 = tt.splat %in_ptr1 : !tt.ptr<i64> -> tensor<1x32x!tt.ptr<i64>> loc(#loc140)
+      %tmp6_36 = tt.addptr %tmp6_35, %tmp6_34 : tensor<1x32x!tt.ptr<i64>>, tensor<1x32xi64> loc(#loc140)
+      %tmp6_37 = tt.broadcast %xmask_7 : tensor<1x1xi1> -> tensor<1x32xi1> loc(#loc141)
+      %tmp6_38 = arith.andi %r0_mask_15, %tmp6_37 : tensor<1x32xi1> loc(#loc141)
+      %tmp6_39 = arith.constant 0.000000e+00 : f32 loc(#loc142)
+      %tmp6_40 = arith.constant dense<0.000000e+00> : tensor<1x32xf32> loc(#loc142)
+      %tmp6_41 = arith.fptosi %tmp6_40 : tensor<1x32xf32> to tensor<1x32xi64> loc(#loc142)
+      %tmp6_42 = tt.load %tmp6_36, %tmp6_38, %tmp6_41 evictionPolicy = evict_first : tensor<1x32x!tt.ptr<i64>> loc(#loc142)
+      %tmp7 = arith.trunci %tmp6_42 : tensor<1x32xi64> to tensor<1x32xi32> loc(#loc143)
+      %tmp9 = tt.broadcast %tmp5 : tensor<1x1xi32> -> tensor<1x32xi32> loc(#loc144)
+      %tmp9_43 = arith.cmpi slt, %r0_index_14, %tmp9 : tensor<1x32xi32> loc(#loc144)
+      %tmp11 = arith.extsi %tmp7 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc145)
+      %tmp11_44 = tt.splat %ks0 : i64 -> tensor<1x32xi64> loc(#loc145)
+      %tmp11_45 = arith.select %tmp9_43, %tmp11, %tmp11_44 : tensor<1x32xi1>, tensor<1x32xi64> loc(#loc145)
+      %tmp12 = arith.constant 1 : i32 loc(#loc146)
+      %tmp12_46 = arith.constant 1 : i64 loc(#loc146)
+      %tmp12_47 = arith.addi %tmp12_46, %ks0 : i64 loc(#loc146)
+      %tmp13 = tt.splat %tmp12_47 : i64 -> tensor<1x32xi64> loc(#loc147)
+      %tmp13_48 = arith.addi %tmp11_45, %tmp13 : tensor<1x32xi64> loc(#loc147)
+      %tmp14 = arith.constant 0 : i32 loc(#loc148)
+      %tmp14_49 = arith.extsi %tmp14 : i32 to i64 loc(#loc148)
+      %tmp14_50 = tt.splat %tmp14_49 : i64 -> tensor<1x32xi64> loc(#loc148)
+      %tmp14_51 = arith.cmpi slt, %tmp11_45, %tmp14_50 : tensor<1x32xi64> loc(#loc148)
+      %tmp15 = arith.select %tmp14_51, %tmp13_48, %tmp11_45 : tensor<1x32xi1>, tensor<1x32xi64> loc(#loc149)
+      %c0_i32_52 = arith.constant 0 : i32 loc(#loc49)
+      %10 = arith.extsi %c0_i32_52 : i32 to i64 loc(#loc49)
+      %11 = tt.splat %10 : i64 -> tensor<1x32xi64> loc(#loc49)
+      %12 = arith.cmpi sle, %11, %tmp15 : tensor<1x32xi64> loc(#loc49)
+      %c127_i32 = arith.constant 127 : i32 loc(#loc50)
+      %c127_i64 = arith.constant 127 : i64 loc(#loc50)
+      %13 = arith.addi %c127_i64, %ks1 : i64 loc(#loc50)
+      %14 = tt.call @"torch._inductor.runtime.triton_helpers.div_floor_integer__i64__(1,)cconstexpr_128_"(%13) : (i64) -> i64 loc(#loc51)
+      %c1_i32 = arith.constant 1 : i32 loc(#loc52)
+      %c1_i64 = arith.constant 1 : i64 loc(#loc52)
+      %15 = arith.addi %c1_i64, %14 : i64 loc(#loc52)
+      %16 = tt.splat %15 : i64 -> tensor<1x32xi64> loc(#loc53)
+      %17 = arith.cmpi slt, %tmp15, %16 : tensor<1x32xi64> loc(#loc53)
+      %18 = arith.andi %12, %17 : tensor<1x32xi1> loc(#loc54)
+      %19 = tt.broadcast %xmask_7 : tensor<1x1xi1> -> tensor<1x32xi1> loc(#loc55)
+      %20 = arith.andi %r0_mask_15, %19 : tensor<1x32xi1> loc(#loc55)
+      %true = arith.constant true loc(#loc56)
+      %cst = arith.constant dense<true> : tensor<1x32xi1> loc(#loc56)
+      %21 = arith.xori %20, %cst : tensor<1x32xi1> loc(#loc56)
+      %22 = arith.ori %18, %21 : tensor<1x32xi1> loc(#loc57)
+      tt.assert %22, "index out of bounds: 0 <= tmp15 < 1 + (triton_helpers.div_floor_integer(127 + ks1,  128))" : tensor<1x32xi1> loc(#loc58)
+      %tmp17 = arith.constant 1 : i32 loc(#loc150)
+      %tmp17_53 = arith.constant dense<1> : tensor<1x1xi32> loc(#loc150)
+      %c1_i32_54 = arith.constant 1 : i32 loc(#loc60)
+      %23 = arith.extsi %c1_i32_54 : i32 to i64 loc(#loc60)
+      %24 = arith.cmpi sge, %23, %ks0 : i64 loc(#loc60)
+      %c1_i32_55 = arith.constant 1 : i32 loc(#loc61)
+      %c1_i32_56 = arith.constant 1 : i32 loc(#loc61)
+      %25 = arith.extui %24 : i1 to i32 loc(#loc61)
+      %26 = arith.muli %c1_i32_56, %25 : i32 loc(#loc61)
+      %c1_i32_57 = arith.constant 1 : i32 loc(#loc62)
+      %27 = arith.extsi %c1_i32_57 : i32 to i64 loc(#loc62)
+      %28 = arith.cmpi sgt, %ks0, %27 : i64 loc(#loc62)
+      %29 = arith.extui %28 : i1 to i64 loc(#loc63)
+      %30 = arith.muli %ks0, %29 : i64 loc(#loc63)
+      %31 = arith.extsi %26 : i32 to i64 loc(#loc64)
+      %32 = arith.addi %31, %30 : i64 loc(#loc64)
+      %33 = arith.extsi %xindex_6 : tensor<1x1xi32> to tensor<1x1xi64> loc(#loc65)
+      %34 = tt.splat %32 : i64 -> tensor<1x1xi64> loc(#loc65)
+      %35 = arith.muli %33, %34 : tensor<1x1xi64> loc(#loc65)
+      %36 = arith.extsi %r0_index_14 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc66)
+      %37 = tt.broadcast %35 : tensor<1x1xi64> -> tensor<1x32xi64> loc(#loc66)
+      %38 = arith.addi %36, %37 : tensor<1x32xi64> loc(#loc66)
+      %39 = tt.splat %out_ptr2 : !tt.ptr<i32> -> tensor<1x32x!tt.ptr<i32>> loc(#loc67)
+      %40 = tt.addptr %39, %38 : tensor<1x32x!tt.ptr<i32>>, tensor<1x32xi64> loc(#loc67)
+      %41 = tt.broadcast %xmask_7 : tensor<1x1xi1> -> tensor<1x32xi1> loc(#loc68)
+      %42 = arith.andi %r0_mask_15, %41 : tensor<1x32xi1> loc(#loc68)
+      tt.store %40, %tmp7, %42 : tensor<1x32x!tt.ptr<i32>> loc(#loc69)
+      %43 = arith.extsi %xindex_6 : tensor<1x1xi32> to tensor<1x1xi64> loc(#loc70)
+      %44 = tt.broadcast %43 : tensor<1x1xi64> -> tensor<1x32xi64> loc(#loc70)
+      %45 = arith.addi %tmp15, %44 : tensor<1x32xi64> loc(#loc70)
+      %46 = arith.extsi %xindex_6 : tensor<1x1xi32> to tensor<1x1xi64> loc(#loc71)
+      %47 = tt.splat %ks0 : i64 -> tensor<1x1xi64> loc(#loc71)
+      %48 = arith.muli %47, %46 : tensor<1x1xi64> loc(#loc71)
+      %49 = tt.broadcast %48 : tensor<1x1xi64> -> tensor<1x32xi64> loc(#loc72)
+      %50 = arith.addi %45, %49 : tensor<1x32xi64> loc(#loc72)
+      %51 = tt.splat %out_ptr3 : !tt.ptr<i32> -> tensor<1x32x!tt.ptr<i32>> loc(#loc73)
+      %52 = tt.addptr %51, %50 : tensor<1x32x!tt.ptr<i32>>, tensor<1x32xi64> loc(#loc73)
+      %53 = tt.broadcast %xmask_7 : tensor<1x1xi1> -> tensor<1x32xi1> loc(#loc74)
+      %54 = arith.andi %r0_mask_15, %53 : tensor<1x32xi1> loc(#loc74)
+      %cst_58 = arith.constant dense<1> : tensor<1x32xi32> loc(#loc75)
+      tt.store %52, %cst_58, %54 : tensor<1x32x!tt.ptr<i32>> loc(#loc75)
+    } loc(#loc29)
+    tt.return loc(#loc76)
+  } loc(#loc)
+  tt.func private @"triton.language.standard.sum__i64S1_32S__(1,)cconstexpr_1__(2,)cconstexpr_False__(3,)cNone"(%input: tensor<1x32xi64> loc("input"(#loc77))) -> tensor<1xi64> attributes {noinline = false} {
+    %0 = "tt.reduce"(%input) <{axis = 1 : i32}> ({
+    ^bb0(%arg1: i64 loc(unknown), %arg2: i64 loc(unknown)):
+      %2 = tt.call @triton.language.standard._sum_combine__i64_i64__(%arg1, %arg2) : (i64, i64) -> i64 loc(#loc78)
+      tt.reduce.return %2 : i64 loc(#loc78)
+    }) : (tensor<1x32xi64>) -> tensor<1xi64> loc(#loc78)
+    tt.return %0 : tensor<1xi64> loc(#loc80)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : tensor<1xi64> loc(#loc81)
+    tt.return %1 : tensor<1xi64> loc(#loc81)
+  } loc(#loc77)
+  tt.func private @triton.language.standard._sum_combine__i64_i64__(%a: i64 loc("a"(#loc82)), %b: i64 loc("b"(#loc82))) -> i64 attributes {noinline = false} {
+    %0 = arith.addi %a, %b : i64 loc(#loc83)
+    tt.return %0 : i64 loc(#loc84)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : i64 loc(#loc85)
+    tt.return %1 : i64 loc(#loc85)
+  } loc(#loc82)
+  tt.func private @"torch._inductor.runtime.triton_helpers.div_floor_integer__i64__(1,)cconstexpr_128_"(%a: i64 loc("a"(#loc86))) -> i64 attributes {noinline = false} {
+    %quot = arith.constant 128 : i32 loc(#loc155)
+    %quot_0 = arith.constant 128 : i64 loc(#loc155)
+    %quot_1 = arith.divsi %a, %quot_0 : i64 loc(#loc155)
+    %remainder = arith.constant 128 : i32 loc(#loc156)
+    %remainder_2 = arith.constant 128 : i64 loc(#loc156)
+    %remainder_3 = arith.remsi %a, %remainder_2 : i64 loc(#loc156)
+    %fixed = arith.constant 0 : i32 loc(#loc157)
+    %fixed_4 = arith.extsi %fixed : i32 to i64 loc(#loc157)
+    %fixed_5 = arith.cmpi ne, %remainder_3, %fixed_4 : i64 loc(#loc157)
+    %fixed_6 = arith.constant 1 : i32 loc(#loc158)
+    %fixed_7 = arith.constant 1 : i64 loc(#loc158)
+    %fixed_8 = arith.subi %quot_1, %fixed_7 : i64 loc(#loc158)
+    %fixed_9 = arith.select %fixed_5, %fixed_8, %quot_1 : i64 loc(#loc159)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc92)
+    %0 = arith.extsi %c0_i32 : i32 to i64 loc(#loc92)
+    %1 = arith.cmpi slt, %a, %0 : i64 loc(#loc92)
+    %false = arith.constant false loc(#loc93)
+    %2 = arith.cmpi ne, %1, %false : i1 loc(#loc93)
+    %3 = arith.select %2, %fixed_9, %quot_1 : i64 loc(#loc94)
+    tt.return %3 : i64 loc(#loc95)
+  ^bb1:  // no predecessors
+    %4 = ub.poison : i64 loc(#loc96)
+    tt.return %4 : i64 loc(#loc96)
+  } loc(#loc86)
+} loc(#loc)
+#loc1 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":19:13)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":22:28)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":22:33)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":23:36)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":23:44)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":23:23)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":24:21)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":25:27)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":25:37)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":28:43)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":29:40)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":30:31)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":31:29)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:45)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:41)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:34)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:60)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:50)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":36:23)
+#loc20 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":38:23)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":39:35)
+#loc22 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":39:48)
+#loc23 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":39:8)
+#loc24 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":40:25)
+#loc25 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":40:28)
+#loc26 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":41:19)
+#loc27 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":42:25)
+#loc28 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":42:36)
+#loc29 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":43:40)
+#loc30 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":44:31)
+#loc31 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":45:29)
+#loc32 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:60)
+#loc33 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:52)
+#loc34 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:86)
+#loc35 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:77)
+#loc36 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:68)
+#loc37 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:45)
+#loc38 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:41)
+#loc39 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:34)
+#loc40 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:103)
+#loc41 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:93)
+#loc42 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":50:23)
+#loc43 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":52:22)
+#loc44 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":54:37)
+#loc45 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":55:20)
+#loc46 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":56:24)
+#loc47 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":57:24)
+#loc48 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":58:39)
+#loc49 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:32)
+#loc50 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:94)
+#loc51 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:100)
+#loc52 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:55)
+#loc53 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:50)
+#loc54 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:42)
+#loc55 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:122)
+#loc56 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:112)
+#loc57 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:110)
+#loc58 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:130)
+#loc59 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":60:35)
+#loc60 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:55)
+#loc61 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:47)
+#loc62 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:81)
+#loc63 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:72)
+#loc64 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:63)
+#loc65 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:40)
+#loc66 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:36)
+#loc67 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:29)
+#loc68 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:104)
+#loc69 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:94)
+#loc70 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:53)
+#loc71 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:62)
+#loc72 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:58)
+#loc73 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:29)
+#loc74 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:105)
+#loc75 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:95)
+#loc76 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":43:4)
+#loc78 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc80 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:11)
+#loc81 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:4)
+#loc83 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc84 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:11)
+#loc85 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:4)
+#loc87 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":72:16)
+#loc88 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":73:20)
+#loc89 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:34)
+#loc90 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:44)
+#loc91 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:47)
+#loc92 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:25)
+#loc93 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:32)
+#loc94 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:47)
+#loc95 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:11)
+#loc96 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:4)
+#loc106 = loc("xnumel"(#loc1))
+#loc107 = loc("xoffset"(#loc2))
+#loc108 = loc("xoffset"(#loc3))
+#loc109 = loc("xindex"(#loc4))
+#loc110 = loc("xindex"(#loc5))
+#loc111 = loc("xindex"(#loc6))
+#loc112 = loc("xmask"(#loc7))
+#loc113 = loc("r0_base"(#loc8))
+#loc114 = loc("r0_base"(#loc9))
+#loc115 = loc("_tmp3"(#loc10))
+#loc116 = loc("_tmp3"(#loc11))
+#loc117 = loc("r0_index"(#loc12))
+#loc118 = loc("r0_mask"(#loc13))
+#loc119 = loc("tmp0"(#loc14))
+#loc120 = loc("tmp0"(#loc15))
+#loc121 = loc("tmp0"(#loc16))
+#loc122 = loc("tmp0"(#loc17))
+#loc123 = loc("tmp0"(#loc18))
+#loc124 = loc("tmp1"(#loc19))
+#loc125 = loc("tmp4"(#loc20))
+#loc126 = loc("_tmp3"(#loc21))
+#loc127 = loc("_tmp3"(#loc22))
+#loc128 = loc("tmp3"(#loc24))
+#loc129 = loc("tmp3"(#loc25))
+#loc130 = loc("tmp5"(#loc26))
+#loc131 = loc("r0_index"(#loc30))
+#loc132 = loc("r0_mask"(#loc31))
+#loc133 = loc("tmp6"(#loc32))
+#loc134 = loc("tmp6"(#loc33))
+#loc135 = loc("tmp6"(#loc34))
+#loc136 = loc("tmp6"(#loc35))
+#loc137 = loc("tmp6"(#loc36))
+#loc138 = loc("tmp6"(#loc37))
+#loc139 = loc("tmp6"(#loc38))
+#loc140 = loc("tmp6"(#loc39))
+#loc141 = loc("tmp6"(#loc40))
+#loc142 = loc("tmp6"(#loc41))
+#loc143 = loc("tmp7"(#loc42))
+#loc144 = loc("tmp9"(#loc43))
+#loc145 = loc("tmp11"(#loc44))
+#loc146 = loc("tmp12"(#loc45))
+#loc147 = loc("tmp13"(#loc46))
+#loc148 = loc("tmp14"(#loc47))
+#loc149 = loc("tmp15"(#loc48))
+#loc150 = loc("tmp17"(#loc59))
+#loc155 = loc("quot"(#loc87))
+#loc156 = loc("remainder"(#loc88))
+#loc157 = loc("fixed"(#loc89))
+#loc158 = loc("fixed"(#loc90))
+#loc159 = loc("fixed"(#loc91))

SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.ttgir

@@ -0,0 +1,270 @@
+#blocked = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 32], warpsPerCTA = [1, 2], order = [0, 1]}>
+#blocked1 = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 32], warpsPerCTA = [2, 1], order = [1, 0]}>
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":18:0)
+#loc1 = loc(unknown)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":40:25)
+#loc68 = loc("in_ptr0"(#loc))
+#loc69 = loc("in_ptr1"(#loc))
+#loc70 = loc("out_ptr1"(#loc))
+#loc71 = loc("out_ptr2"(#loc))
+#loc72 = loc("out_ptr3"(#loc))
+#loc73 = loc("ks0"(#loc))
+#loc74 = loc("ks1"(#loc))
+#loc75 = loc("xnumel"(#loc))
+#loc76 = loc("r0_numel"(#loc))
+#loc91 = loc("tmp3"(#loc18))
+#loc124 = loc(callsite(#loc1 at #loc91))
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 2 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2(%in_ptr0: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %in_ptr1: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("in_ptr1"(#loc)), %out_ptr1: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %out_ptr3: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr3"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc)), %r0_numel: i32 loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %cst = arith.constant dense<0> : tensor<1x32xi64, #blocked> loc(#loc1)
+    %cst_0 = arith.constant dense<0> : tensor<1x32xi64, #blocked1> loc(#loc1)
+    %c1_i64 = arith.constant 1 : i64 loc(#loc1)
+    %c127_i64 = arith.constant 127 : i64 loc(#loc1)
+    %cst_1 = arith.constant dense<true> : tensor<1x32xi1, #blocked1> loc(#loc1)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc1)
+    %c32_i32 = arith.constant 32 : i32 loc(#loc1)
+    %cst_2 = arith.constant dense<0> : tensor<1x32xi32, #blocked1> loc(#loc1)
+    %c0_i64 = arith.constant 0 : i64 loc(#loc1)
+    %c128_i64 = arith.constant 128 : i64 loc(#loc1)
+    %cst_3 = arith.constant dense<1> : tensor<1x32xi32, #blocked> loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc77)
+    %xmask = arith.cmpi slt, %xoffset, %c32_i32 : i32 loc(#loc78)
+    %r0_base = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32, #ttg.slice<{dim = 0, parent = #blocked}>> loc(#loc79)
+    %r0_base_4 = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32, #ttg.slice<{dim = 0, parent = #blocked1}>> loc(#loc79)
+    %r0_base_5 = tt.expand_dims %r0_base {axis = 0 : i32} : tensor<32xi32, #ttg.slice<{dim = 0, parent = #blocked}>> -> tensor<1x32xi32, #blocked> loc(#loc79)
+    %r0_base_6 = tt.expand_dims %r0_base_4 {axis = 0 : i32} : tensor<32xi32, #ttg.slice<{dim = 0, parent = #blocked1}>> -> tensor<1x32xi32, #blocked1> loc(#loc79)
+    %r0_mask = tt.splat %r0_numel : i32 -> tensor<1x32xi32, #blocked1> loc(#loc80)
+    %tmp0 = arith.extsi %xoffset : i32 to i64 loc(#loc81)
+    %tmp0_7 = arith.muli %ks0, %tmp0 : i64 loc(#loc81)
+    %tmp0_8 = tt.splat %tmp0_7 : i64 -> tensor<1x32xi64, #blocked1> loc(#loc121)
+    %tmp0_9 = tt.splat %in_ptr0 : !tt.ptr<i32> -> tensor<1x32x!tt.ptr<i32>, #blocked1> loc(#loc83)
+    %tmp0_10 = tt.splat %xmask : i1 -> tensor<1x32xi1, #blocked1> loc(#loc122)
+    %_tmp3 = scf.for %r0_offset = %c0_i32 to %r0_numel step %c32_i32 iter_args(%_tmp3_31 = %cst_0) -> (tensor<1x32xi64, #blocked1>)  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x32xi32, #blocked1> loc(#loc86)
+      %r0_index_32 = arith.addi %r0_index, %r0_base_6 : tensor<1x32xi32, #blocked1> loc(#loc86)
+      %r0_mask_33 = arith.cmpi slt, %r0_index_32, %r0_mask : tensor<1x32xi32, #blocked1> loc(#loc80)
+      %tmp0_34 = arith.extsi %r0_index_32 : tensor<1x32xi32, #blocked1> to tensor<1x32xi64, #blocked1> loc(#loc82)
+      %tmp0_35 = arith.addi %tmp0_34, %tmp0_8 : tensor<1x32xi64, #blocked1> loc(#loc82)
+      %tmp0_36 = tt.addptr %tmp0_9, %tmp0_35 : tensor<1x32x!tt.ptr<i32>, #blocked1>, tensor<1x32xi64, #blocked1> loc(#loc83)
+      %tmp0_37 = arith.andi %r0_mask_33, %tmp0_10 : tensor<1x32xi1, #blocked1> loc(#loc84)
+      %tmp0_38 = tt.load %tmp0_36, %tmp0_37, %cst_2 evictionPolicy = evict_first : tensor<1x32x!tt.ptr<i32>, #blocked1> loc(#loc87)
+      %tmp1 = arith.extsi %tmp0_38 : tensor<1x32xi32, #blocked1> to tensor<1x32xi64, #blocked1> loc(#loc88)
+      %tmp4 = arith.addi %_tmp3_31, %tmp1 : tensor<1x32xi64, #blocked1> loc(#loc89)
+      %_tmp3_39 = arith.select %tmp0_37, %tmp4, %_tmp3_31 : tensor<1x32xi1, #blocked1>, tensor<1x32xi64, #blocked1> loc(#loc90)
+      scf.yield %_tmp3_39 : tensor<1x32xi64, #blocked1> loc(#loc16)
+    } loc(#loc85)
+    %tmp3 = "tt.reduce"(%_tmp3) <{axis = 1 : i32}> ({
+    ^bb0(%tmp3_31: i64 loc(callsite(#loc1 at #loc91)), %tmp3_32: i64 loc(callsite(#loc1 at #loc91))):
+      %tmp3_33 = arith.addi %tmp3_31, %tmp3_32 : i64 loc(#loc133)
+      tt.reduce.return %tmp3_33 : i64 loc(#loc123)
+    }) : (tensor<1x32xi64, #blocked1>) -> tensor<1xi64, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc123)
+    %0 = ttg.convert_layout %tmp3 : tensor<1xi64, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<1xi64, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc20)
+    %tmp3_11 = tt.expand_dims %0 {axis = 1 : i32} : tensor<1xi64, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<1x1xi64, #blocked> loc(#loc92)
+    %tmp3_12 = tt.expand_dims %tmp3 {axis = 1 : i32} : tensor<1xi64, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<1x1xi64, #blocked1> loc(#loc92)
+    %tmp5 = arith.trunci %tmp3_11 : tensor<1x1xi64, #blocked> to tensor<1x1xi32, #blocked> loc(#loc93)
+    %tmp5_13 = arith.trunci %tmp3_12 : tensor<1x1xi64, #blocked1> to tensor<1x1xi32, #blocked1> loc(#loc93)
+    %1 = tt.addptr %out_ptr1, %xoffset : !tt.ptr<i32>, i32 loc(#loc23)
+    %2 = tt.splat %1 : !tt.ptr<i32> -> tensor<1x1x!tt.ptr<i32>, #blocked> loc(#loc24)
+    %3 = tt.splat %xmask : i1 -> tensor<1x1xi1, #blocked> loc(#loc24)
+    tt.store %2, %tmp5, %3 : tensor<1x1x!tt.ptr<i32>, #blocked> loc(#loc24)
+    %r0_mask_14 = tt.splat %r0_numel : i32 -> tensor<1x32xi32, #blocked> loc(#loc94)
+    %tmp6 = arith.cmpi sle, %ks0, %c1_i64 : i64 loc(#loc95)
+    %tmp6_15 = arith.cmpi sgt, %ks0, %c1_i64 : i64 loc(#loc96)
+    %tmp6_16 = arith.extui %tmp6_15 : i1 to i64 loc(#loc97)
+    %tmp6_17 = arith.muli %ks0, %tmp6_16 : i64 loc(#loc97)
+    %tmp6_18 = arith.extui %tmp6 : i1 to i64 loc(#loc125)
+    %tmp6_19 = arith.addi %tmp6_18, %tmp6_17 : i64 loc(#loc98)
+    %tmp6_20 = arith.muli %tmp0, %tmp6_19 : i64 loc(#loc100)
+    %tmp6_21 = tt.splat %tmp6_20 : i64 -> tensor<1x32xi64, #blocked> loc(#loc126)
+    %tmp6_22 = tt.splat %tmp6_20 : i64 -> tensor<1x32xi64, #blocked1> loc(#loc126)
+    %tmp6_23 = tt.splat %in_ptr1 : !tt.ptr<i64> -> tensor<1x32x!tt.ptr<i64>, #blocked> loc(#loc102)
+    %tmp6_24 = tt.splat %in_ptr1 : !tt.ptr<i64> -> tensor<1x32x!tt.ptr<i64>, #blocked1> loc(#loc102)
+    %tmp6_25 = tt.splat %xmask : i1 -> tensor<1x32xi1, #blocked> loc(#loc127)
+    %tmp9 = tt.broadcast %tmp5 : tensor<1x1xi32, #blocked> -> tensor<1x32xi32, #blocked> loc(#loc104)
+    %tmp9_26 = tt.broadcast %tmp5_13 : tensor<1x1xi32, #blocked1> -> tensor<1x32xi32, #blocked1> loc(#loc104)
+    %tmp11 = tt.splat %ks0 : i64 -> tensor<1x32xi64, #blocked> loc(#loc105)
+    %tmp11_27 = tt.splat %ks0 : i64 -> tensor<1x32xi64, #blocked1> loc(#loc105)
+    %tmp12 = arith.addi %ks0, %c1_i64 : i64 loc(#loc106)
+    %tmp13 = tt.splat %tmp12 : i64 -> tensor<1x32xi64, #blocked> loc(#loc107)
+    %tmp13_28 = tt.splat %tmp12 : i64 -> tensor<1x32xi64, #blocked1> loc(#loc107)
+    %4 = arith.addi %ks1, %c127_i64 : i64 loc(#loc39)
+    %quot = arith.divsi %4, %c128_i64 : i64 loc(#loc128)
+    %remainder = arith.remsi %4, %c128_i64 : i64 loc(#loc129)
+    %fixed = arith.cmpi ne, %remainder, %c0_i64 : i64 loc(#loc130)
+    %fixed_29 = arith.subi %quot, %c1_i64 : i64 loc(#loc131)
+    %fixed_30 = arith.select %fixed, %fixed_29, %quot : i64 loc(#loc132)
+    %5 = arith.cmpi slt, %4, %c0_i64 : i64 loc(#loc113)
+    %6 = arith.select %5, %fixed_30, %quot : i64 loc(#loc114)
+    %7 = arith.addi %6, %c1_i64 : i64 loc(#loc48)
+    %8 = tt.splat %7 : i64 -> tensor<1x32xi64, #blocked1> loc(#loc49)
+    %9 = tt.splat %out_ptr2 : !tt.ptr<i32> -> tensor<1x32x!tt.ptr<i32>, #blocked1> loc(#loc50)
+    %10 = tt.splat %tmp0 : i64 -> tensor<1x32xi64, #blocked> loc(#loc51)
+    %11 = tt.splat %tmp0_7 : i64 -> tensor<1x32xi64, #blocked> loc(#loc115)
+    %12 = tt.splat %out_ptr3 : !tt.ptr<i32> -> tensor<1x32x!tt.ptr<i32>, #blocked> loc(#loc54)
+    scf.for %r0_offset = %c0_i32 to %r0_numel step %c32_i32  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x32xi32, #blocked> loc(#loc116)
+      %r0_index_31 = tt.splat %r0_offset : i32 -> tensor<1x32xi32, #blocked1> loc(#loc116)
+      %r0_index_32 = arith.addi %r0_index, %r0_base_5 : tensor<1x32xi32, #blocked> loc(#loc116)
+      %r0_index_33 = arith.addi %r0_index_31, %r0_base_6 : tensor<1x32xi32, #blocked1> loc(#loc116)
+      %r0_mask_34 = arith.cmpi slt, %r0_index_32, %r0_mask_14 : tensor<1x32xi32, #blocked> loc(#loc94)
+      %r0_mask_35 = arith.cmpi slt, %r0_index_33, %r0_mask : tensor<1x32xi32, #blocked1> loc(#loc94)
+      %tmp6_36 = arith.extsi %r0_index_32 : tensor<1x32xi32, #blocked> to tensor<1x32xi64, #blocked> loc(#loc101)
+      %tmp6_37 = arith.extsi %r0_index_33 : tensor<1x32xi32, #blocked1> to tensor<1x32xi64, #blocked1> loc(#loc101)
+      %tmp6_38 = arith.addi %tmp6_36, %tmp6_21 : tensor<1x32xi64, #blocked> loc(#loc101)
+      %tmp6_39 = arith.addi %tmp6_37, %tmp6_22 : tensor<1x32xi64, #blocked1> loc(#loc101)
+      %tmp6_40 = tt.addptr %tmp6_23, %tmp6_38 : tensor<1x32x!tt.ptr<i64>, #blocked>, tensor<1x32xi64, #blocked> loc(#loc102)
+      %tmp6_41 = tt.addptr %tmp6_24, %tmp6_39 : tensor<1x32x!tt.ptr<i64>, #blocked1>, tensor<1x32xi64, #blocked1> loc(#loc102)
+      %tmp6_42 = arith.andi %r0_mask_34, %tmp6_25 : tensor<1x32xi1, #blocked> loc(#loc103)
+      %tmp6_43 = arith.andi %r0_mask_35, %tmp0_10 : tensor<1x32xi1, #blocked1> loc(#loc103)
+      %tmp6_44 = tt.load %tmp6_40, %tmp6_42, %cst evictionPolicy = evict_first : tensor<1x32x!tt.ptr<i64>, #blocked> loc(#loc117)
+      %tmp6_45 = tt.load %tmp6_41, %tmp6_43, %cst_0 evictionPolicy = evict_first : tensor<1x32x!tt.ptr<i64>, #blocked1> loc(#loc117)
+      %tmp7 = arith.trunci %tmp6_44 : tensor<1x32xi64, #blocked> to tensor<1x32xi32, #blocked> loc(#loc118)
+      %tmp7_46 = arith.trunci %tmp6_45 : tensor<1x32xi64, #blocked1> to tensor<1x32xi32, #blocked1> loc(#loc118)
+      %tmp9_47 = arith.cmpi slt, %r0_index_32, %tmp9 : tensor<1x32xi32, #blocked> loc(#loc104)
+      %tmp9_48 = arith.cmpi slt, %r0_index_33, %tmp9_26 : tensor<1x32xi32, #blocked1> loc(#loc104)
+      %tmp11_49 = arith.extsi %tmp7 : tensor<1x32xi32, #blocked> to tensor<1x32xi64, #blocked> loc(#loc105)
+      %tmp11_50 = arith.extsi %tmp7_46 : tensor<1x32xi32, #blocked1> to tensor<1x32xi64, #blocked1> loc(#loc105)
+      %tmp11_51 = arith.select %tmp9_47, %tmp11_49, %tmp11 : tensor<1x32xi1, #blocked>, tensor<1x32xi64, #blocked> loc(#loc105)
+      %tmp11_52 = arith.select %tmp9_48, %tmp11_50, %tmp11_27 : tensor<1x32xi1, #blocked1>, tensor<1x32xi64, #blocked1> loc(#loc105)
+      %tmp13_53 = arith.addi %tmp11_51, %tmp13 : tensor<1x32xi64, #blocked> loc(#loc107)
+      %tmp13_54 = arith.addi %tmp11_52, %tmp13_28 : tensor<1x32xi64, #blocked1> loc(#loc107)
+      %tmp14 = arith.cmpi slt, %tmp11_51, %cst : tensor<1x32xi64, #blocked> loc(#loc119)
+      %tmp14_55 = arith.cmpi slt, %tmp11_52, %cst_0 : tensor<1x32xi64, #blocked1> loc(#loc119)
+      %tmp15 = arith.select %tmp14, %tmp13_53, %tmp11_51 : tensor<1x32xi1, #blocked>, tensor<1x32xi64, #blocked> loc(#loc120)
+      %tmp15_56 = arith.select %tmp14_55, %tmp13_54, %tmp11_52 : tensor<1x32xi1, #blocked1>, tensor<1x32xi64, #blocked1> loc(#loc120)
+      %13 = arith.cmpi sge, %tmp15_56, %cst_0 : tensor<1x32xi64, #blocked1> loc(#loc61)
+      %14 = arith.cmpi slt, %tmp15_56, %8 : tensor<1x32xi64, #blocked1> loc(#loc49)
+      %15 = arith.andi %13, %14 : tensor<1x32xi1, #blocked1> loc(#loc62)
+      %16 = arith.xori %tmp6_43, %cst_1 : tensor<1x32xi1, #blocked1> loc(#loc63)
+      %17 = arith.ori %15, %16 : tensor<1x32xi1, #blocked1> loc(#loc64)
+      tt.assert %17, "index out of bounds: 0 <= tmp15 < 1 + (triton_helpers.div_floor_integer(127 + ks1,  128))" : tensor<1x32xi1, #blocked1> loc(#loc65)
+      %18 = tt.addptr %9, %tmp6_39 : tensor<1x32x!tt.ptr<i32>, #blocked1>, tensor<1x32xi64, #blocked1> loc(#loc50)
+      tt.store %18, %tmp7_46, %tmp6_43 : tensor<1x32x!tt.ptr<i32>, #blocked1> loc(#loc66)
+      %19 = arith.addi %tmp15, %10 : tensor<1x32xi64, #blocked> loc(#loc51)
+      %20 = arith.addi %19, %11 : tensor<1x32xi64, #blocked> loc(#loc52)
+      %21 = tt.addptr %12, %20 : tensor<1x32x!tt.ptr<i32>, #blocked>, tensor<1x32xi64, #blocked> loc(#loc54)
+      tt.store %21, %cst_3, %tmp6_42 : tensor<1x32x!tt.ptr<i32>, #blocked> loc(#loc20)
+    } loc(#loc55)
+    tt.return loc(#loc67)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":22:28)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":24:21)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":25:37)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":31:29)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:45)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:41)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:34)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:60)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":29:40)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":30:31)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:50)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":36:23)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":38:23)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":39:48)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":39:8)
+#loc17 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc19 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc20 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:95)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":40:28)
+#loc22 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":41:19)
+#loc23 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":42:25)
+#loc24 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":42:36)
+#loc25 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":45:29)
+#loc26 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:60)
+#loc27 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:86)
+#loc28 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:77)
+#loc29 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:68)
+#loc30 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:52)
+#loc31 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:45)
+#loc32 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:41)
+#loc33 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:34)
+#loc34 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:103)
+#loc35 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":52:22)
+#loc36 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":54:37)
+#loc37 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":55:20)
+#loc38 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":56:24)
+#loc39 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:94)
+#loc40 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":72:16)
+#loc41 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:100)
+#loc42 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":73:20)
+#loc43 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:34)
+#loc44 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:44)
+#loc45 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:47)
+#loc46 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:25)
+#loc47 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:47)
+#loc48 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:55)
+#loc49 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:50)
+#loc50 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:29)
+#loc51 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:53)
+#loc52 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:58)
+#loc53 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:62)
+#loc54 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:29)
+#loc55 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":43:40)
+#loc56 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":44:31)
+#loc57 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:93)
+#loc58 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":50:23)
+#loc59 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":57:24)
+#loc60 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":58:39)
+#loc61 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:32)
+#loc62 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:42)
+#loc63 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:112)
+#loc64 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:110)
+#loc65 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:130)
+#loc66 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:94)
+#loc67 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":43:4)
+#loc77 = loc("xoffset"(#loc2))
+#loc78 = loc("xmask"(#loc3))
+#loc79 = loc("r0_base"(#loc4))
+#loc80 = loc("r0_mask"(#loc5))
+#loc81 = loc("tmp0"(#loc6))
+#loc82 = loc("tmp0"(#loc7))
+#loc83 = loc("tmp0"(#loc8))
+#loc84 = loc("tmp0"(#loc9))
+#loc85 = loc("_tmp3"(#loc10))
+#loc86 = loc("r0_index"(#loc11))
+#loc87 = loc("tmp0"(#loc12))
+#loc88 = loc("tmp1"(#loc13))
+#loc89 = loc("tmp4"(#loc14))
+#loc90 = loc("_tmp3"(#loc15))
+#loc92 = loc("tmp3"(#loc21))
+#loc93 = loc("tmp5"(#loc22))
+#loc94 = loc("r0_mask"(#loc25))
+#loc95 = loc("tmp6"(#loc26))
+#loc96 = loc("tmp6"(#loc27))
+#loc97 = loc("tmp6"(#loc28))
+#loc98 = loc("tmp6"(#loc29))
+#loc99 = loc("tmp6"(#loc30))
+#loc100 = loc("tmp6"(#loc31))
+#loc101 = loc("tmp6"(#loc32))
+#loc102 = loc("tmp6"(#loc33))
+#loc103 = loc("tmp6"(#loc34))
+#loc104 = loc("tmp9"(#loc35))
+#loc105 = loc("tmp11"(#loc36))
+#loc106 = loc("tmp12"(#loc37))
+#loc107 = loc("tmp13"(#loc38))
+#loc108 = loc("quot"(#loc40))
+#loc109 = loc("remainder"(#loc42))
+#loc110 = loc("fixed"(#loc43))
+#loc111 = loc("fixed"(#loc44))
+#loc112 = loc("fixed"(#loc45))
+#loc113 = loc(callsite(#loc46 at #loc41))
+#loc114 = loc(callsite(#loc47 at #loc41))
+#loc115 = loc(fused[#loc52, #loc53])
+#loc116 = loc("r0_index"(#loc56))
+#loc117 = loc("tmp6"(#loc57))
+#loc118 = loc("tmp7"(#loc58))
+#loc119 = loc("tmp14"(#loc59))
+#loc120 = loc("tmp15"(#loc60))
+#loc121 = loc(fused[#loc82, #loc81])
+#loc122 = loc(fused[#loc84, #loc78])
+#loc123 = loc(callsite(#loc17 at #loc91))
+#loc125 = loc(fused[#loc98, #loc99])
+#loc126 = loc(fused[#loc101, #loc100])
+#loc127 = loc(fused[#loc103, #loc78])
+#loc128 = loc(callsite(#loc108 at #loc41))
+#loc129 = loc(callsite(#loc109 at #loc41))
+#loc130 = loc(callsite(#loc110 at #loc41))
+#loc131 = loc(callsite(#loc111 at #loc41))
+#loc132 = loc(callsite(#loc112 at #loc41))
+#loc133 = loc(callsite(#loc19 at #loc123))

SpecForge-ext/cache/compiled_kernels/triton/7/7Y3WXJA5F4C76K5XYE6DPME3QXZYZM2B2JXSRQ4JEXGQ6AZL2CMA/triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2.ttir

@@ -0,0 +1,246 @@
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":18:0)
+#loc1 = loc(unknown)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":40:25)
+#loc69 = loc("in_ptr0"(#loc))
+#loc70 = loc("in_ptr1"(#loc))
+#loc71 = loc("out_ptr1"(#loc))
+#loc72 = loc("out_ptr2"(#loc))
+#loc73 = loc("out_ptr3"(#loc))
+#loc74 = loc("ks0"(#loc))
+#loc75 = loc("ks1"(#loc))
+#loc76 = loc("xnumel"(#loc))
+#loc77 = loc("r0_numel"(#loc))
+#loc93 = loc("tmp3"(#loc19))
+#loc126 = loc(callsite(#loc1 at #loc93))
+module {
+  tt.func public @triton_red_fused__to_copy_arange_index_put_lt_new_zeros_scalar_tensor_sum_unsqueeze_view_where_2(%in_ptr0: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %in_ptr1: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("in_ptr1"(#loc)), %out_ptr1: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %out_ptr3: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr3"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc)), %r0_numel: i32 loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %c128_i64 = arith.constant 128 : i64 loc(#loc1)
+    %c0_i64 = arith.constant 0 : i64 loc(#loc1)
+    %cst = arith.constant dense<0> : tensor<1x32xi32> loc(#loc1)
+    %c32_i32 = arith.constant 32 : i32 loc(#loc1)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc1)
+    %cst_0 = arith.constant dense<1> : tensor<1x32xi32> loc(#loc1)
+    %cst_1 = arith.constant dense<true> : tensor<1x32xi1> loc(#loc1)
+    %c127_i64 = arith.constant 127 : i64 loc(#loc1)
+    %c1_i64 = arith.constant 1 : i64 loc(#loc1)
+    %cst_2 = arith.constant dense<0> : tensor<1x32xi64> loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc78)
+    %xmask = arith.cmpi slt, %xoffset, %c32_i32 : i32 loc(#loc79)
+    %xmask_3 = tt.splat %xmask : i1 -> tensor<1x1xi1> loc(#loc79)
+    %r0_base = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32> loc(#loc80)
+    %r0_base_4 = tt.expand_dims %r0_base {axis = 0 : i32} : tensor<32xi32> -> tensor<1x32xi32> loc(#loc81)
+    %_tmp3 = scf.for %r0_offset = %c0_i32 to %r0_numel step %c32_i32 iter_args(%_tmp3_6 = %cst_2) -> (tensor<1x32xi64>)  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x32xi32> loc(#loc83)
+      %r0_index_7 = arith.addi %r0_index, %r0_base_4 : tensor<1x32xi32> loc(#loc83)
+      %r0_mask = tt.splat %r0_numel : i32 -> tensor<1x32xi32> loc(#loc84)
+      %r0_mask_8 = arith.cmpi slt, %r0_index_7, %r0_mask : tensor<1x32xi32> loc(#loc84)
+      %tmp0 = arith.extsi %xoffset : i32 to i64 loc(#loc85)
+      %tmp0_9 = arith.muli %ks0, %tmp0 : i64 loc(#loc85)
+      %tmp0_10 = arith.extsi %r0_index_7 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc86)
+      %tmp0_11 = tt.splat %tmp0_9 : i64 -> tensor<1x32xi64> loc(#loc123)
+      %tmp0_12 = arith.addi %tmp0_10, %tmp0_11 : tensor<1x32xi64> loc(#loc86)
+      %tmp0_13 = tt.splat %in_ptr0 : !tt.ptr<i32> -> tensor<1x32x!tt.ptr<i32>> loc(#loc87)
+      %tmp0_14 = tt.addptr %tmp0_13, %tmp0_12 : tensor<1x32x!tt.ptr<i32>>, tensor<1x32xi64> loc(#loc87)
+      %tmp0_15 = tt.splat %xmask : i1 -> tensor<1x32xi1> loc(#loc124)
+      %tmp0_16 = arith.andi %r0_mask_8, %tmp0_15 : tensor<1x32xi1> loc(#loc88)
+      %tmp0_17 = tt.load %tmp0_14, %tmp0_16, %cst evictionPolicy = evict_first : tensor<1x32x!tt.ptr<i32>> loc(#loc89)
+      %tmp1 = arith.extsi %tmp0_17 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc90)
+      %tmp4 = arith.addi %_tmp3_6, %tmp1 : tensor<1x32xi64> loc(#loc91)
+      %_tmp3_18 = arith.select %tmp0_16, %tmp4, %_tmp3_6 : tensor<1x32xi1>, tensor<1x32xi64> loc(#loc92)
+      scf.yield %_tmp3_18 : tensor<1x32xi64> loc(#loc17)
+    } loc(#loc82)
+    %tmp3 = "tt.reduce"(%_tmp3) <{axis = 1 : i32}> ({
+    ^bb0(%tmp3_6: i64 loc(callsite(#loc1 at #loc93)), %tmp3_7: i64 loc(callsite(#loc1 at #loc93))):
+      %tmp3_8 = arith.addi %tmp3_6, %tmp3_7 : i64 loc(#loc135)
+      tt.reduce.return %tmp3_8 : i64 loc(#loc125)
+    }) : (tensor<1x32xi64>) -> tensor<1xi64> loc(#loc125)
+    %tmp3_5 = tt.expand_dims %tmp3 {axis = 1 : i32} : tensor<1xi64> -> tensor<1x1xi64> loc(#loc94)
+    %tmp5 = arith.trunci %tmp3_5 : tensor<1x1xi64> to tensor<1x1xi32> loc(#loc95)
+    %0 = tt.addptr %out_ptr1, %xoffset : !tt.ptr<i32>, i32 loc(#loc23)
+    %1 = tt.splat %0 : !tt.ptr<i32> -> tensor<1x1x!tt.ptr<i32>> loc(#loc23)
+    tt.store %1, %tmp5, %xmask_3 : tensor<1x1x!tt.ptr<i32>> loc(#loc24)
+    scf.for %r0_offset = %c0_i32 to %r0_numel step %c32_i32  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x32xi32> loc(#loc96)
+      %r0_index_6 = arith.addi %r0_index, %r0_base_4 : tensor<1x32xi32> loc(#loc96)
+      %r0_mask = tt.splat %r0_numel : i32 -> tensor<1x32xi32> loc(#loc97)
+      %r0_mask_7 = arith.cmpi slt, %r0_index_6, %r0_mask : tensor<1x32xi32> loc(#loc97)
+      %tmp6 = arith.cmpi sle, %ks0, %c1_i64 : i64 loc(#loc98)
+      %tmp6_8 = arith.cmpi sgt, %ks0, %c1_i64 : i64 loc(#loc99)
+      %tmp6_9 = arith.extui %tmp6_8 : i1 to i64 loc(#loc100)
+      %tmp6_10 = arith.muli %ks0, %tmp6_9 : i64 loc(#loc100)
+      %tmp6_11 = arith.extui %tmp6 : i1 to i64 loc(#loc127)
+      %tmp6_12 = arith.addi %tmp6_11, %tmp6_10 : i64 loc(#loc101)
+      %tmp6_13 = arith.extsi %xoffset : i32 to i64 loc(#loc103)
+      %tmp6_14 = arith.muli %tmp6_13, %tmp6_12 : i64 loc(#loc103)
+      %tmp6_15 = arith.extsi %r0_index_6 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc104)
+      %tmp6_16 = tt.splat %tmp6_14 : i64 -> tensor<1x32xi64> loc(#loc128)
+      %tmp6_17 = arith.addi %tmp6_15, %tmp6_16 : tensor<1x32xi64> loc(#loc104)
+      %tmp6_18 = tt.splat %in_ptr1 : !tt.ptr<i64> -> tensor<1x32x!tt.ptr<i64>> loc(#loc105)
+      %tmp6_19 = tt.addptr %tmp6_18, %tmp6_17 : tensor<1x32x!tt.ptr<i64>>, tensor<1x32xi64> loc(#loc105)
+      %tmp6_20 = tt.splat %xmask : i1 -> tensor<1x32xi1> loc(#loc129)
+      %tmp6_21 = arith.andi %r0_mask_7, %tmp6_20 : tensor<1x32xi1> loc(#loc106)
+      %tmp6_22 = tt.load %tmp6_19, %tmp6_21, %cst_2 evictionPolicy = evict_first : tensor<1x32x!tt.ptr<i64>> loc(#loc107)
+      %tmp7 = arith.trunci %tmp6_22 : tensor<1x32xi64> to tensor<1x32xi32> loc(#loc108)
+      %tmp9 = tt.broadcast %tmp5 : tensor<1x1xi32> -> tensor<1x32xi32> loc(#loc109)
+      %tmp9_23 = arith.cmpi slt, %r0_index_6, %tmp9 : tensor<1x32xi32> loc(#loc109)
+      %tmp11 = arith.extsi %tmp7 : tensor<1x32xi32> to tensor<1x32xi64> loc(#loc110)
+      %tmp11_24 = tt.splat %ks0 : i64 -> tensor<1x32xi64> loc(#loc110)
+      %tmp11_25 = arith.select %tmp9_23, %tmp11, %tmp11_24 : tensor<1x32xi1>, tensor<1x32xi64> loc(#loc110)
+      %tmp12 = arith.addi %ks0, %c1_i64 : i64 loc(#loc111)
+      %tmp13 = tt.splat %tmp12 : i64 -> tensor<1x32xi64> loc(#loc112)
+      %tmp13_26 = arith.addi %tmp11_25, %tmp13 : tensor<1x32xi64> loc(#loc112)
+      %tmp14 = arith.cmpi slt, %tmp11_25, %cst_2 : tensor<1x32xi64> loc(#loc113)
+      %tmp15 = arith.select %tmp14, %tmp13_26, %tmp11_25 : tensor<1x32xi1>, tensor<1x32xi64> loc(#loc114)
+      %2 = arith.cmpi sge, %tmp15, %cst_2 : tensor<1x32xi64> loc(#loc45)
+      %3 = arith.addi %ks1, %c127_i64 : i64 loc(#loc46)
+      %quot = arith.divsi %3, %c128_i64 : i64 loc(#loc130)
+      %remainder = arith.remsi %3, %c128_i64 : i64 loc(#loc131)
+      %fixed = arith.cmpi ne, %remainder, %c0_i64 : i64 loc(#loc132)
+      %fixed_27 = arith.subi %quot, %c1_i64 : i64 loc(#loc133)
+      %fixed_28 = arith.select %fixed, %fixed_27, %quot : i64 loc(#loc134)
+      %4 = arith.cmpi slt, %3, %c0_i64 : i64 loc(#loc120)
+      %5 = arith.select %4, %fixed_28, %quot : i64 loc(#loc121)
+      %6 = arith.addi %5, %c1_i64 : i64 loc(#loc55)
+      %7 = tt.splat %6 : i64 -> tensor<1x32xi64> loc(#loc56)
+      %8 = arith.cmpi slt, %tmp15, %7 : tensor<1x32xi64> loc(#loc56)
+      %9 = arith.andi %2, %8 : tensor<1x32xi1> loc(#loc57)
+      %10 = arith.xori %tmp6_21, %cst_1 : tensor<1x32xi1> loc(#loc58)
+      %11 = arith.ori %9, %10 : tensor<1x32xi1> loc(#loc59)
+      tt.assert %11, "index out of bounds: 0 <= tmp15 < 1 + (triton_helpers.div_floor_integer(127 + ks1,  128))" : tensor<1x32xi1> loc(#loc60)
+      %12 = tt.splat %out_ptr2 : !tt.ptr<i32> -> tensor<1x32x!tt.ptr<i32>> loc(#loc61)
+      %13 = tt.addptr %12, %tmp6_17 : tensor<1x32x!tt.ptr<i32>>, tensor<1x32xi64> loc(#loc61)
+      tt.store %13, %tmp7, %tmp6_21 : tensor<1x32x!tt.ptr<i32>> loc(#loc62)
+      %14 = tt.splat %tmp6_13 : i64 -> tensor<1x32xi64> loc(#loc63)
+      %15 = arith.addi %tmp15, %14 : tensor<1x32xi64> loc(#loc63)
+      %16 = arith.muli %ks0, %tmp6_13 : i64 loc(#loc64)
+      %17 = tt.splat %16 : i64 -> tensor<1x32xi64> loc(#loc122)
+      %18 = arith.addi %15, %17 : tensor<1x32xi64> loc(#loc65)
+      %19 = tt.splat %out_ptr3 : !tt.ptr<i32> -> tensor<1x32x!tt.ptr<i32>> loc(#loc66)
+      %20 = tt.addptr %19, %18 : tensor<1x32x!tt.ptr<i32>>, tensor<1x32xi64> loc(#loc66)
+      tt.store %20, %cst_0, %tmp6_21 : tensor<1x32x!tt.ptr<i32>> loc(#loc67)
+    } loc(#loc25)
+    tt.return loc(#loc68)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":22:28)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":24:21)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":25:27)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":25:37)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":29:40)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":30:31)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":31:29)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:45)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:41)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:34)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:60)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":35:50)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":36:23)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":38:23)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":39:48)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":39:8)
+#loc18 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc20 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":40:28)
+#loc22 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":41:19)
+#loc23 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":42:25)
+#loc24 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":42:36)
+#loc25 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":43:40)
+#loc26 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":44:31)
+#loc27 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":45:29)
+#loc28 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:60)
+#loc29 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:86)
+#loc30 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:77)
+#loc31 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:68)
+#loc32 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:52)
+#loc33 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:45)
+#loc34 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:41)
+#loc35 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:34)
+#loc36 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:103)
+#loc37 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":49:93)
+#loc38 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":50:23)
+#loc39 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":52:22)
+#loc40 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":54:37)
+#loc41 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":55:20)
+#loc42 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":56:24)
+#loc43 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":57:24)
+#loc44 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":58:39)
+#loc45 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:32)
+#loc46 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:94)
+#loc47 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":72:16)
+#loc48 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:100)
+#loc49 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":73:20)
+#loc50 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:34)
+#loc51 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:44)
+#loc52 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":74:47)
+#loc53 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:25)
+#loc54 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":75:47)
+#loc55 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:55)
+#loc56 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:50)
+#loc57 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:42)
+#loc58 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:112)
+#loc59 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:110)
+#loc60 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":59:130)
+#loc61 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:29)
+#loc62 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":61:94)
+#loc63 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:53)
+#loc64 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:62)
+#loc65 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:58)
+#loc66 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:29)
+#loc67 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":62:95)
+#loc68 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/ge/cge7ppvv65hasrwq33aa5yjnt4twdzvw3pak2x4bu7n7x2hyexmv.py":43:4)
+#loc78 = loc("xoffset"(#loc2))
+#loc79 = loc("xmask"(#loc3))
+#loc80 = loc("r0_base"(#loc4))
+#loc81 = loc("r0_base"(#loc5))
+#loc82 = loc("_tmp3"(#loc6))
+#loc83 = loc("r0_index"(#loc7))
+#loc84 = loc("r0_mask"(#loc8))
+#loc85 = loc("tmp0"(#loc9))
+#loc86 = loc("tmp0"(#loc10))
+#loc87 = loc("tmp0"(#loc11))
+#loc88 = loc("tmp0"(#loc12))
+#loc89 = loc("tmp0"(#loc13))
+#loc90 = loc("tmp1"(#loc14))
+#loc91 = loc("tmp4"(#loc15))
+#loc92 = loc("_tmp3"(#loc16))
+#loc94 = loc("tmp3"(#loc21))
+#loc95 = loc("tmp5"(#loc22))
+#loc96 = loc("r0_index"(#loc26))
+#loc97 = loc("r0_mask"(#loc27))
+#loc98 = loc("tmp6"(#loc28))
+#loc99 = loc("tmp6"(#loc29))
+#loc100 = loc("tmp6"(#loc30))
+#loc101 = loc("tmp6"(#loc31))
+#loc102 = loc("tmp6"(#loc32))
+#loc103 = loc("tmp6"(#loc33))
+#loc104 = loc("tmp6"(#loc34))
+#loc105 = loc("tmp6"(#loc35))
+#loc106 = loc("tmp6"(#loc36))
+#loc107 = loc("tmp6"(#loc37))
+#loc108 = loc("tmp7"(#loc38))
+#loc109 = loc("tmp9"(#loc39))
+#loc110 = loc("tmp11"(#loc40))
+#loc111 = loc("tmp12"(#loc41))
+#loc112 = loc("tmp13"(#loc42))
+#loc113 = loc("tmp14"(#loc43))
+#loc114 = loc("tmp15"(#loc44))
+#loc115 = loc("quot"(#loc47))
+#loc116 = loc("remainder"(#loc49))
+#loc117 = loc("fixed"(#loc50))
+#loc118 = loc("fixed"(#loc51))
+#loc119 = loc("fixed"(#loc52))
+#loc120 = loc(callsite(#loc53 at #loc48))
+#loc121 = loc(callsite(#loc54 at #loc48))
+#loc122 = loc(fused[#loc65, #loc64])
+#loc123 = loc(fused[#loc86, #loc85])
+#loc124 = loc(fused[#loc88, #loc79])
+#loc125 = loc(callsite(#loc18 at #loc93))
+#loc127 = loc(fused[#loc101, #loc102])
+#loc128 = loc(fused[#loc104, #loc103])
+#loc129 = loc(fused[#loc106, #loc79])
+#loc130 = loc(callsite(#loc115 at #loc48))
+#loc131 = loc(callsite(#loc116 at #loc48))
+#loc132 = loc(callsite(#loc117 at #loc48))
+#loc133 = loc(callsite(#loc118 at #loc48))
+#loc134 = loc(callsite(#loc119 at #loc48))
+#loc135 = loc(callsite(#loc20 at #loc125))

SpecForge-ext/cache/compiled_kernels/triton/7/A7DYCXJM4X5DHYLAIRTU6BFB3S5UCV3W4C27BWQBJGXYAG3NWQWA/triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.json

@@ -0,0 +1 @@
+{"hash": "07c7815d2ce5fa33e16044674f04a1dcbb415776e0b5f0da0149af801b6db42c", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 4, "num_ctas": 1, "num_stages": 1, "warp_size": 32, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "ptx_options": null, "ir_override": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "launch_pdl": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dot_operand_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/workspace/specforge/lib/python3.11/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "instrumentation_mode": "", "triton_version": "3.5.1", "tensordesc_meta": [], "shared": 2048, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "profile_scratch_size": 0, "profile_scratch_align": 1, "name": "triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3"}

SpecForge-ext/cache/compiled_kernels/triton/7/A7DYCXJM4X5DHYLAIRTU6BFB3S5UCV3W4C27BWQBJGXYAG3NWQWA/triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.ttgir

@@ -0,0 +1,841 @@
+#blocked = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [32, 1], warpsPerCTA = [1, 4], order = [0, 1]}>
+#blocked1 = #ttg.blocked<{sizePerThread = [1, 4], threadsPerWarp = [8, 4], warpsPerCTA = [4, 1], order = [1, 0]}>
+#linear = #ttg.linear<{register = [[0, 4], [0, 8]], lane = [[1, 0], [2, 0], [4, 0], [8, 0], [16, 0]], warp = [[0, 1], [0, 2]], block = []}>
+#linear1 = #ttg.linear<{register = [[2, 0, 0], [4, 0, 0]], lane = [[8, 0, 0], [16, 0, 0], [32, 0, 0], [64, 0, 0], [128, 0, 0]], warp = [[0, 1, 0], [1, 0, 0]], block = []}>
+#linear2 = #ttg.linear<{register = [[1, 0, 0], [2, 0, 0]], lane = [[4, 0, 0], [8, 0, 0], [16, 0, 0], [32, 0, 0], [64, 0, 0]], warp = [[0, 0, 1], [0, 1, 0]], block = []}>
+#linear3 = #ttg.linear<{register = [[0, 1, 0], [1, 0, 0]], lane = [[2, 0, 0], [4, 0, 0], [8, 0, 0], [16, 0, 0], [32, 0, 0]], warp = [[0, 0, 1], [0, 0, 2]], block = []}>
+#linear4 = #ttg.linear<{register = [[0, 0, 4], [0, 1, 0]], lane = [[1, 0, 0], [2, 0, 0], [4, 0, 0], [8, 0, 0], [16, 0, 0]], warp = [[0, 0, 1], [0, 0, 2]], block = []}>
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":18:0)
+#loc1 = loc(unknown)
+#loc19 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":662:12)
+#loc20 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":41:67)
+#loc24 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":634:73)
+#loc28 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":538:51)
+#loc33 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":539:53)
+#loc42 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":548:50)
+#loc47 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":551:51)
+#loc67 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":45:26)
+#loc77 = loc("in_ptr0"(#loc))
+#loc78 = loc("out_ptr2"(#loc))
+#loc79 = loc("out_ptr3"(#loc))
+#loc80 = loc("xnumel"(#loc))
+#loc81 = loc("r0_numel"(#loc))
+#loc99 = loc(callsite(#loc19 at #loc20))
+#loc105 = loc("ileft"(#loc28))
+#loc109 = loc("iright"(#loc33))
+#loc118 = loc("left_idx"(#loc42))
+#loc123 = loc("right_idx"(#loc47))
+#loc143 = loc("tmp11"(#loc67))
+#loc149 = loc(callsite(#loc24 at #loc99))
+#loc153 = loc(callsite(#loc1 at #loc143))
+#loc157 = loc(callsite(#loc105 at #loc149))
+#loc161 = loc(callsite(#loc109 at #loc149))
+#loc169 = loc(callsite(#loc118 at #loc149))
+#loc174 = loc(callsite(#loc123 at #loc149))
+#loc194 = loc(callsite(#loc1 at #loc157))
+#loc196 = loc(callsite(#loc1 at #loc161))
+#loc199 = loc(callsite(#loc1 at #loc169))
+#loc202 = loc(callsite(#loc1 at #loc174))
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 4 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3(%in_ptr0: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr2: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %out_ptr3: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr3"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %cst = arith.constant dense<0> : tensor<32x16xi32, #linear> loc(#loc1)
+    %cst_0 = arith.constant dense<0> : tensor<32x16xi64, #blocked> loc(#loc1)
+    %c32_i32 = arith.constant 32 : i32 loc(#loc1)
+    %cst_1 = arith.constant dense<32> : tensor<32x1xi32, #blocked> loc(#loc1)
+    %cst_2 = arith.constant dense<32> : tensor<32x1xi32, #blocked1> loc(#loc1)
+    %cst_3 = arith.constant dense<16> : tensor<32x1xi32, #blocked> loc(#loc1)
+    %cst_4 = arith.constant dense<16> : tensor<32x1xi32, #blocked1> loc(#loc1)
+    %cst_5 = arith.constant dense<17> : tensor<1x16xi32, #blocked> loc(#loc1)
+    %cst_6 = arith.constant dense<272> : tensor<32x1xi32, #blocked> loc(#loc1)
+    %cst_7 = arith.constant dense<1> : tensor<1x2x1xi32, #linear1> loc(#loc1)
+    %cst_8 = arith.constant dense<1> : tensor<1x2x1xi32, #linear2> loc(#loc1)
+    %cst_9 = arith.constant dense<1> : tensor<1x2x1xi32, #linear3> loc(#loc1)
+    %cst_10 = arith.constant dense<1> : tensor<1x2x1xi32, #linear4> loc(#loc1)
+    %cst_11 = arith.constant dense<0> : tensor<32x16xi32, #blocked> loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc82)
+    %xoffset_12 = arith.muli %xoffset, %c32_i32 : i32 loc(#loc83)
+    %xindex = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc84)
+    %xindex_13 = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc84)
+    %xindex_14 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<32xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<32x1xi32, #blocked> loc(#loc84)
+    %xindex_15 = tt.expand_dims %xindex_13 {axis = 1 : i32} : tensor<32xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<32x1xi32, #blocked1> loc(#loc84)
+    %xindex_16 = tt.splat %xoffset_12 : i32 -> tensor<32x1xi32, #blocked> loc(#loc85)
+    %xindex_17 = tt.splat %xoffset_12 : i32 -> tensor<32x1xi32, #blocked1> loc(#loc85)
+    %xindex_18 = arith.addi %xindex_16, %xindex_14 : tensor<32x1xi32, #blocked> loc(#loc85)
+    %xindex_19 = arith.addi %xindex_17, %xindex_15 : tensor<32x1xi32, #blocked1> loc(#loc85)
+    %xmask = arith.cmpi slt, %xindex_18, %cst_1 : tensor<32x1xi32, #blocked> loc(#loc86)
+    %xmask_20 = arith.cmpi slt, %xindex_19, %cst_2 : tensor<32x1xi32, #blocked1> loc(#loc86)
+    %r0_index = tt.make_range {end = 16 : i32, start = 0 : i32} : tensor<16xi32, #ttg.slice<{dim = 0, parent = #blocked}>> loc(#loc87)
+    %r0_index_21 = tt.make_range {end = 16 : i32, start = 0 : i32} : tensor<16xi32, #ttg.slice<{dim = 0, parent = #linear}>> loc(#loc87)
+    %r0_index_22 = tt.make_range {end = 16 : i32, start = 0 : i32} : tensor<16xi32, #ttg.slice<{dim = 0, parent = #blocked1}>> loc(#loc87)
+    %r0_index_23 = tt.expand_dims %r0_index {axis = 0 : i32} : tensor<16xi32, #ttg.slice<{dim = 0, parent = #blocked}>> -> tensor<1x16xi32, #blocked> loc(#loc87)
+    %r0_index_24 = tt.expand_dims %r0_index_21 {axis = 0 : i32} : tensor<16xi32, #ttg.slice<{dim = 0, parent = #linear}>> -> tensor<1x16xi32, #linear> loc(#loc87)
+    %r0_index_25 = tt.expand_dims %r0_index_22 {axis = 0 : i32} : tensor<16xi32, #ttg.slice<{dim = 0, parent = #blocked1}>> -> tensor<1x16xi32, #blocked1> loc(#loc87)
+    %x0 = arith.remsi %xindex_18, %cst_3 : tensor<32x1xi32, #blocked> loc(#loc88)
+    %x1 = arith.divsi %xindex_18, %cst_3 : tensor<32x1xi32, #blocked> loc(#loc89)
+    %tmp0 = arith.muli %r0_index_23, %cst_5 : tensor<1x16xi32, #blocked> loc(#loc90)
+    %tmp0_26 = tt.broadcast %x0 : tensor<32x1xi32, #blocked> -> tensor<32x16xi32, #blocked> loc(#loc91)
+    %tmp0_27 = tt.broadcast %tmp0 : tensor<1x16xi32, #blocked> -> tensor<32x16xi32, #blocked> loc(#loc91)
+    %tmp0_28 = arith.addi %tmp0_26, %tmp0_27 : tensor<32x16xi32, #blocked> loc(#loc91)
+    %tmp0_29 = arith.muli %x1, %cst_6 : tensor<32x1xi32, #blocked> loc(#loc92)
+    %tmp0_30 = tt.broadcast %tmp0_29 : tensor<32x1xi32, #blocked> -> tensor<32x16xi32, #blocked> loc(#loc93)
+    %tmp0_31 = arith.addi %tmp0_28, %tmp0_30 : tensor<32x16xi32, #blocked> loc(#loc93)
+    %tmp0_32 = tt.splat %in_ptr0 : !tt.ptr<i32> -> tensor<32x16x!tt.ptr<i32>, #blocked> loc(#loc94)
+    %tmp0_33 = tt.addptr %tmp0_32, %tmp0_31 : tensor<32x16x!tt.ptr<i32>, #blocked>, tensor<32x16xi32, #blocked> loc(#loc94)
+    %tmp0_34 = tt.broadcast %xmask : tensor<32x1xi1, #blocked> -> tensor<32x16xi1, #blocked> loc(#loc95)
+    %tmp0_35 = tt.broadcast %xmask_20 : tensor<32x1xi1, #blocked1> -> tensor<32x16xi1, #blocked1> loc(#loc95)
+    %tmp0_36 = tt.load %tmp0_33, %tmp0_34, %cst_11 : tensor<32x16x!tt.ptr<i32>, #blocked> loc(#loc95)
+    %tmp2 = arith.trunci %r0_index_24 : tensor<1x16xi32, #linear> to tensor<1x16xi16, #linear> loc(#loc96)
+    %tmp4 = tt.broadcast %tmp2 : tensor<1x16xi16, #linear> -> tensor<32x16xi16, #linear> loc(#loc97)
+    %flip = tt.make_range {end = 2 : i32, start = 0 : i32} : tensor<2xi32, #ttg.slice<{dim = 0, parent = #ttg.slice<{dim = 2, parent = #linear2}>}>> loc(#loc146)
+    %flip_37 = tt.make_range {end = 2 : i32, start = 0 : i32} : tensor<2xi32, #ttg.slice<{dim = 0, parent = #ttg.slice<{dim = 2, parent = #linear1}>}>> loc(#loc146)
+    %flip_38 = tt.make_range {end = 2 : i32, start = 0 : i32} : tensor<2xi32, #ttg.slice<{dim = 0, parent = #ttg.slice<{dim = 2, parent = #linear3}>}>> loc(#loc146)
+    %flip_39 = tt.make_range {end = 2 : i32, start = 0 : i32} : tensor<2xi32, #ttg.slice<{dim = 0, parent = #ttg.slice<{dim = 2, parent = #linear4}>}>> loc(#loc146)
+    %flip_40 = tt.expand_dims %flip {axis = 0 : i32} : tensor<2xi32, #ttg.slice<{dim = 0, parent = #ttg.slice<{dim = 2, parent = #linear2}>}>> -> tensor<1x2xi32, #ttg.slice<{dim = 2, parent = #linear2}>> loc(#loc146)
+    %flip_41 = tt.expand_dims %flip_37 {axis = 0 : i32} : tensor<2xi32, #ttg.slice<{dim = 0, parent = #ttg.slice<{dim = 2, parent = #linear1}>}>> -> tensor<1x2xi32, #ttg.slice<{dim = 2, parent = #linear1}>> loc(#loc146)
+    %flip_42 = tt.expand_dims %flip_38 {axis = 0 : i32} : tensor<2xi32, #ttg.slice<{dim = 0, parent = #ttg.slice<{dim = 2, parent = #linear3}>}>> -> tensor<1x2xi32, #ttg.slice<{dim = 2, parent = #linear3}>> loc(#loc146)
+    %flip_43 = tt.expand_dims %flip_39 {axis = 0 : i32} : tensor<2xi32, #ttg.slice<{dim = 0, parent = #ttg.slice<{dim = 2, parent = #linear4}>}>> -> tensor<1x2xi32, #ttg.slice<{dim = 2, parent = #linear4}>> loc(#loc146)
+    %flip_44 = tt.expand_dims %flip_40 {axis = 2 : i32} : tensor<1x2xi32, #ttg.slice<{dim = 2, parent = #linear2}>> -> tensor<1x2x1xi32, #linear2> loc(#loc146)
+    %flip_45 = tt.expand_dims %flip_41 {axis = 2 : i32} : tensor<1x2xi32, #ttg.slice<{dim = 2, parent = #linear1}>> -> tensor<1x2x1xi32, #linear1> loc(#loc146)
+    %flip_46 = tt.expand_dims %flip_42 {axis = 2 : i32} : tensor<1x2xi32, #ttg.slice<{dim = 2, parent = #linear3}>> -> tensor<1x2x1xi32, #linear3> loc(#loc146)
+    %flip_47 = tt.expand_dims %flip_43 {axis = 2 : i32} : tensor<1x2xi32, #ttg.slice<{dim = 2, parent = #linear4}>> -> tensor<1x2x1xi32, #linear4> loc(#loc146)
+    %flip_48 = tt.broadcast %flip_44 : tensor<1x2x1xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc147)
+    %flip_49 = tt.reshape %flip_48 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #blocked> loc(#loc148)
+    %flip_50 = tt.reshape %flip_48 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc148)
+    %y = tt.reshape %tmp0_36 : tensor<32x16xi32, #blocked> -> tensor<256x2x1xi32, #linear1> loc(#loc154)
+    %left_mask = arith.subi %cst_7, %flip_45 : tensor<1x2x1xi32, #linear1> loc(#loc155)
+    %left_mask_51 = arith.subi %cst_8, %flip_44 : tensor<1x2x1xi32, #linear2> loc(#loc155)
+    %left_mask_52 = arith.subi %cst_9, %flip_46 : tensor<1x2x1xi32, #linear3> loc(#loc155)
+    %left_mask_53 = arith.subi %cst_10, %flip_47 : tensor<1x2x1xi32, #linear4> loc(#loc155)
+    %ileft = tt.broadcast %left_mask : tensor<1x2x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc156)
+    %ileft_54 = arith.muli %y, %ileft : tensor<256x2x1xi32, #linear1> loc(#loc156)
+    %ileft_55 = "tt.reduce"(%ileft_54) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_419: i32 loc(callsite(#loc1 at #loc157)), %ileft_420: i32 loc(callsite(#loc1 at #loc157))):
+      %ileft_421 = arith.addi %ileft_419, %ileft_420 : i32 loc(#loc203)
+      tt.reduce.return %ileft_421 : i32 loc(#loc193)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc193)
+    %ileft_56 = tt.expand_dims %ileft_55 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc158)
+    %ileft_57 = tt.broadcast %ileft_56 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc159)
+    %iright = tt.broadcast %flip_45 : tensor<1x2x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc160)
+    %iright_58 = arith.muli %y, %iright : tensor<256x2x1xi32, #linear1> loc(#loc160)
+    %iright_59 = "tt.reduce"(%iright_58) <{axis = 1 : i32}> ({
+    ^bb0(%iright_419: i32 loc(callsite(#loc1 at #loc161)), %iright_420: i32 loc(callsite(#loc1 at #loc161))):
+      %iright_421 = arith.addi %iright_419, %iright_420 : i32 loc(#loc204)
+      tt.reduce.return %iright_421 : i32 loc(#loc195)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc195)
+    %iright_60 = tt.expand_dims %iright_59 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc162)
+    %iright_61 = tt.broadcast %iright_60 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc163)
+    %ileft_62 = tt.reshape %ileft_57 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #blocked> loc(#loc164)
+    %ileft_63 = tt.reshape %ileft_57 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc164)
+    %iright_64 = tt.reshape %iright_61 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #blocked> loc(#loc165)
+    %iright_65 = tt.reshape %iright_61 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc165)
+    %y_idx = tt.reshape %tmp4 : tensor<32x16xi16, #linear> -> tensor<256x2x1xi16, #linear1> loc(#loc166)
+    %left_idx = arith.trunci %left_mask : tensor<1x2x1xi32, #linear1> to tensor<1x2x1xi16, #linear1> loc(#loc167)
+    %left_idx_66 = tt.broadcast %left_idx : tensor<1x2x1xi16, #linear1> -> tensor<256x2x1xi16, #linear1> loc(#loc168)
+    %left_idx_67 = arith.muli %y_idx, %left_idx_66 : tensor<256x2x1xi16, #linear1> loc(#loc168)
+    %input = arith.extsi %left_idx_67 : tensor<256x2x1xi16, #linear1> to tensor<256x2x1xi32, #linear1> loc(#loc197)
+    %left_idx_68 = "tt.reduce"(%input) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_419: i32 loc(callsite(#loc1 at #loc169)), %left_idx_420: i32 loc(callsite(#loc1 at #loc169))):
+      %left_idx_421 = arith.addi %left_idx_419, %left_idx_420 : i32 loc(#loc205)
+      tt.reduce.return %left_idx_421 : i32 loc(#loc198)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc198)
+    %left_idx_69 = tt.expand_dims %left_idx_68 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc170)
+    %left_idx_70 = tt.broadcast %left_idx_69 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc171)
+    %right_idx = arith.trunci %flip_45 : tensor<1x2x1xi32, #linear1> to tensor<1x2x1xi16, #linear1> loc(#loc172)
+    %right_idx_71 = tt.broadcast %right_idx : tensor<1x2x1xi16, #linear1> -> tensor<256x2x1xi16, #linear1> loc(#loc173)
+    %right_idx_72 = arith.muli %y_idx, %right_idx_71 : tensor<256x2x1xi16, #linear1> loc(#loc173)
+    %input_73 = arith.extsi %right_idx_72 : tensor<256x2x1xi16, #linear1> to tensor<256x2x1xi32, #linear1> loc(#loc200)
+    %right_idx_74 = "tt.reduce"(%input_73) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_419: i32 loc(callsite(#loc1 at #loc174)), %right_idx_420: i32 loc(callsite(#loc1 at #loc174))):
+      %right_idx_421 = arith.addi %right_idx_419, %right_idx_420 : i32 loc(#loc206)
+      tt.reduce.return %right_idx_421 : i32 loc(#loc201)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc201)
+    %right_idx_75 = tt.expand_dims %right_idx_74 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc175)
+    %right_idx_76 = tt.broadcast %right_idx_75 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc176)
+    %left_idx_77 = tt.reshape %left_idx_70 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #blocked> loc(#loc177)
+    %left_idx_78 = tt.reshape %left_idx_70 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc177)
+    %right_idx_79 = tt.reshape %right_idx_76 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #blocked> loc(#loc178)
+    %right_idx_80 = tt.reshape %right_idx_76 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc178)
+    %cond = arith.cmpi slt, %ileft_62, %iright_64 : tensor<32x16xi32, #blocked> loc(#loc179)
+    %cond_81 = arith.cmpi slt, %ileft_63, %iright_65 : tensor<32x16xi32, #linear> loc(#loc179)
+    %eq = arith.cmpi eq, %ileft_62, %iright_64 : tensor<32x16xi32, #blocked> loc(#loc180)
+    %eq_82 = arith.cmpi eq, %ileft_63, %iright_65 : tensor<32x16xi32, #linear> loc(#loc180)
+    %cond_83 = arith.cmpi sgt, %left_idx_77, %right_idx_79 : tensor<32x16xi32, #blocked> loc(#loc181)
+    %cond_84 = arith.cmpi sgt, %left_idx_78, %right_idx_80 : tensor<32x16xi32, #linear> loc(#loc181)
+    %cond_85 = arith.andi %eq, %cond_83 : tensor<32x16xi1, #blocked> loc(#loc182)
+    %cond_86 = arith.andi %eq_82, %cond_84 : tensor<32x16xi1, #linear> loc(#loc182)
+    %cond_87 = arith.ori %cond, %cond_85 : tensor<32x16xi1, #blocked> loc(#loc183)
+    %cond_88 = arith.ori %cond_81, %cond_86 : tensor<32x16xi1, #linear> loc(#loc183)
+    %cond_89 = arith.extui %cond_87 : tensor<32x16xi1, #blocked> to tensor<32x16xi32, #blocked> loc(#loc184)
+    %cond_90 = arith.extui %cond_88 : tensor<32x16xi1, #linear> to tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_91 = arith.xori %cond_89, %flip_49 : tensor<32x16xi32, #blocked> loc(#loc184)
+    %cond_92 = arith.xori %cond_90, %flip_50 : tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_93 = arith.cmpi ne, %cond_91, %cst_11 : tensor<32x16xi32, #blocked> loc(#loc185)
+    %cond_94 = arith.cmpi ne, %cond_92, %cst : tensor<32x16xi32, #linear> loc(#loc185)
+    %ret = arith.xori %ileft_62, %iright_64 : tensor<32x16xi32, #blocked> loc(#loc186)
+    %ret_95 = arith.select %cond_93, %ret, %cst_11 : tensor<32x16xi1, #blocked>, tensor<32x16xi32, #blocked> loc(#loc187)
+    %ret_96 = arith.xori %tmp0_36, %ret_95 : tensor<32x16xi32, #blocked> loc(#loc188)
+    %ret_97 = ttg.convert_layout %ret_96 : tensor<32x16xi32, #blocked> -> tensor<32x16xi32, #linear> loc(#loc188)
+    %new_idxs = arith.xori %left_idx_78, %right_idx_80 : tensor<32x16xi32, #linear> loc(#loc189)
+    %new_idxs_98 = arith.select %cond_94, %new_idxs, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc190)
+    %new_idxs_99 = arith.extsi %tmp2 : tensor<1x16xi16, #linear> to tensor<1x16xi32, #linear> loc(#loc191)
+    %new_idxs_100 = tt.broadcast %new_idxs_99 : tensor<1x16xi32, #linear> -> tensor<32x16xi32, #linear> loc(#loc191)
+    %new_idxs_101 = arith.xori %new_idxs_100, %new_idxs_98 : tensor<32x16xi32, #linear> loc(#loc191)
+    %flip_102 = tt.broadcast %flip_46 : tensor<1x2x1xi32, #linear3> -> tensor<64x2x4xi32, #linear3> loc(#loc147)
+    %flip_103 = tt.reshape %flip_102 : tensor<64x2x4xi32, #linear3> -> tensor<32x16xi32, #linear> loc(#loc148)
+    %y_104 = tt.reshape %ret_96 : tensor<32x16xi32, #blocked> -> tensor<128x2x2xi32, #linear2> loc(#loc154)
+    %ileft_105 = tt.broadcast %left_mask_51 : tensor<1x2x1xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc156)
+    %ileft_106 = arith.muli %y_104, %ileft_105 : tensor<128x2x2xi32, #linear2> loc(#loc156)
+    %ileft_107 = "tt.reduce"(%ileft_106) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_419: i32 loc(callsite(#loc1 at #loc157)), %ileft_420: i32 loc(callsite(#loc1 at #loc157))):
+      %ileft_421 = arith.addi %ileft_419, %ileft_420 : i32 loc(#loc203)
+      tt.reduce.return %ileft_421 : i32 loc(#loc193)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc193)
+    %ileft_108 = tt.expand_dims %ileft_107 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc158)
+    %ileft_109 = tt.broadcast %ileft_108 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc159)
+    %iright_110 = arith.muli %y_104, %flip_48 : tensor<128x2x2xi32, #linear2> loc(#loc160)
+    %iright_111 = "tt.reduce"(%iright_110) <{axis = 1 : i32}> ({
+    ^bb0(%iright_419: i32 loc(callsite(#loc1 at #loc161)), %iright_420: i32 loc(callsite(#loc1 at #loc161))):
+      %iright_421 = arith.addi %iright_419, %iright_420 : i32 loc(#loc204)
+      tt.reduce.return %iright_421 : i32 loc(#loc195)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc195)
+    %iright_112 = tt.expand_dims %iright_111 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc162)
+    %iright_113 = tt.broadcast %iright_112 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc163)
+    %ileft_114 = tt.reshape %ileft_109 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc164)
+    %iright_115 = tt.reshape %iright_113 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc165)
+    %y_idx_116 = tt.reshape %new_idxs_101 : tensor<32x16xi32, #linear> -> tensor<128x2x2xi32, #linear2> loc(#loc166)
+    %left_idx_117 = arith.muli %y_idx_116, %ileft_105 : tensor<128x2x2xi32, #linear2> loc(#loc168)
+    %left_idx_118 = "tt.reduce"(%left_idx_117) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_419: i32 loc(callsite(#loc1 at #loc169)), %left_idx_420: i32 loc(callsite(#loc1 at #loc169))):
+      %left_idx_421 = arith.addi %left_idx_419, %left_idx_420 : i32 loc(#loc205)
+      tt.reduce.return %left_idx_421 : i32 loc(#loc198)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc198)
+    %left_idx_119 = tt.expand_dims %left_idx_118 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc170)
+    %left_idx_120 = tt.broadcast %left_idx_119 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc171)
+    %right_idx_121 = arith.muli %y_idx_116, %flip_48 : tensor<128x2x2xi32, #linear2> loc(#loc173)
+    %right_idx_122 = "tt.reduce"(%right_idx_121) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_419: i32 loc(callsite(#loc1 at #loc174)), %right_idx_420: i32 loc(callsite(#loc1 at #loc174))):
+      %right_idx_421 = arith.addi %right_idx_419, %right_idx_420 : i32 loc(#loc206)
+      tt.reduce.return %right_idx_421 : i32 loc(#loc201)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc201)
+    %right_idx_123 = tt.expand_dims %right_idx_122 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc175)
+    %right_idx_124 = tt.broadcast %right_idx_123 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc176)
+    %left_idx_125 = tt.reshape %left_idx_120 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc177)
+    %right_idx_126 = tt.reshape %right_idx_124 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc178)
+    %cond_127 = arith.cmpi slt, %ileft_114, %iright_115 : tensor<32x16xi32, #linear> loc(#loc179)
+    %eq_128 = arith.cmpi eq, %ileft_114, %iright_115 : tensor<32x16xi32, #linear> loc(#loc180)
+    %cond_129 = arith.cmpi sgt, %left_idx_125, %right_idx_126 : tensor<32x16xi32, #linear> loc(#loc181)
+    %cond_130 = arith.andi %eq_128, %cond_129 : tensor<32x16xi1, #linear> loc(#loc182)
+    %cond_131 = arith.ori %cond_127, %cond_130 : tensor<32x16xi1, #linear> loc(#loc183)
+    %cond_132 = arith.extui %cond_131 : tensor<32x16xi1, #linear> to tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_133 = arith.xori %cond_132, %flip_103 : tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_134 = arith.cmpi ne, %cond_133, %cst : tensor<32x16xi32, #linear> loc(#loc185)
+    %ret_135 = arith.xori %ileft_114, %iright_115 : tensor<32x16xi32, #linear> loc(#loc186)
+    %ret_136 = arith.select %cond_134, %ret_135, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc187)
+    %ret_137 = arith.xori %ret_97, %ret_136 : tensor<32x16xi32, #linear> loc(#loc188)
+    %new_idxs_138 = arith.xori %left_idx_125, %right_idx_126 : tensor<32x16xi32, #linear> loc(#loc189)
+    %new_idxs_139 = arith.select %cond_134, %new_idxs_138, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc190)
+    %new_idxs_140 = arith.xori %new_idxs_101, %new_idxs_139 : tensor<32x16xi32, #linear> loc(#loc191)
+    %y_141 = tt.reshape %ret_137 : tensor<32x16xi32, #linear> -> tensor<256x2x1xi32, #linear1> loc(#loc154)
+    %ileft_142 = arith.muli %y_141, %ileft : tensor<256x2x1xi32, #linear1> loc(#loc156)
+    %ileft_143 = "tt.reduce"(%ileft_142) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_419: i32 loc(callsite(#loc1 at #loc157)), %ileft_420: i32 loc(callsite(#loc1 at #loc157))):
+      %ileft_421 = arith.addi %ileft_419, %ileft_420 : i32 loc(#loc203)
+      tt.reduce.return %ileft_421 : i32 loc(#loc193)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc193)
+    %ileft_144 = tt.expand_dims %ileft_143 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc158)
+    %ileft_145 = tt.broadcast %ileft_144 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc159)
+    %iright_146 = arith.muli %y_141, %iright : tensor<256x2x1xi32, #linear1> loc(#loc160)
+    %iright_147 = "tt.reduce"(%iright_146) <{axis = 1 : i32}> ({
+    ^bb0(%iright_419: i32 loc(callsite(#loc1 at #loc161)), %iright_420: i32 loc(callsite(#loc1 at #loc161))):
+      %iright_421 = arith.addi %iright_419, %iright_420 : i32 loc(#loc204)
+      tt.reduce.return %iright_421 : i32 loc(#loc195)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc195)
+    %iright_148 = tt.expand_dims %iright_147 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc162)
+    %iright_149 = tt.broadcast %iright_148 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc163)
+    %ileft_150 = tt.reshape %ileft_145 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc164)
+    %iright_151 = tt.reshape %iright_149 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc165)
+    %y_idx_152 = tt.reshape %new_idxs_140 : tensor<32x16xi32, #linear> -> tensor<256x2x1xi32, #linear1> loc(#loc166)
+    %left_idx_153 = arith.muli %y_idx_152, %ileft : tensor<256x2x1xi32, #linear1> loc(#loc168)
+    %left_idx_154 = "tt.reduce"(%left_idx_153) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_419: i32 loc(callsite(#loc1 at #loc169)), %left_idx_420: i32 loc(callsite(#loc1 at #loc169))):
+      %left_idx_421 = arith.addi %left_idx_419, %left_idx_420 : i32 loc(#loc205)
+      tt.reduce.return %left_idx_421 : i32 loc(#loc198)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc198)
+    %left_idx_155 = tt.expand_dims %left_idx_154 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc170)
+    %left_idx_156 = tt.broadcast %left_idx_155 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc171)
+    %right_idx_157 = arith.muli %y_idx_152, %iright : tensor<256x2x1xi32, #linear1> loc(#loc173)
+    %right_idx_158 = "tt.reduce"(%right_idx_157) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_419: i32 loc(callsite(#loc1 at #loc174)), %right_idx_420: i32 loc(callsite(#loc1 at #loc174))):
+      %right_idx_421 = arith.addi %right_idx_419, %right_idx_420 : i32 loc(#loc206)
+      tt.reduce.return %right_idx_421 : i32 loc(#loc201)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc201)
+    %right_idx_159 = tt.expand_dims %right_idx_158 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc175)
+    %right_idx_160 = tt.broadcast %right_idx_159 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc176)
+    %left_idx_161 = tt.reshape %left_idx_156 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc177)
+    %right_idx_162 = tt.reshape %right_idx_160 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc178)
+    %cond_163 = arith.cmpi slt, %ileft_150, %iright_151 : tensor<32x16xi32, #linear> loc(#loc179)
+    %eq_164 = arith.cmpi eq, %ileft_150, %iright_151 : tensor<32x16xi32, #linear> loc(#loc180)
+    %cond_165 = arith.cmpi sgt, %left_idx_161, %right_idx_162 : tensor<32x16xi32, #linear> loc(#loc181)
+    %cond_166 = arith.andi %eq_164, %cond_165 : tensor<32x16xi1, #linear> loc(#loc182)
+    %cond_167 = arith.ori %cond_163, %cond_166 : tensor<32x16xi1, #linear> loc(#loc183)
+    %cond_168 = arith.extui %cond_167 : tensor<32x16xi1, #linear> to tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_169 = arith.xori %cond_168, %flip_103 : tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_170 = arith.cmpi ne, %cond_169, %cst : tensor<32x16xi32, #linear> loc(#loc185)
+    %ret_171 = arith.xori %ileft_150, %iright_151 : tensor<32x16xi32, #linear> loc(#loc186)
+    %ret_172 = arith.select %cond_170, %ret_171, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc187)
+    %ret_173 = arith.xori %ret_137, %ret_172 : tensor<32x16xi32, #linear> loc(#loc188)
+    %new_idxs_174 = arith.xori %left_idx_161, %right_idx_162 : tensor<32x16xi32, #linear> loc(#loc189)
+    %new_idxs_175 = arith.select %cond_170, %new_idxs_174, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc190)
+    %new_idxs_176 = arith.xori %new_idxs_140, %new_idxs_175 : tensor<32x16xi32, #linear> loc(#loc191)
+    %flip_177 = tt.broadcast %flip_47 : tensor<1x2x1xi32, #linear4> -> tensor<32x2x8xi32, #linear4> loc(#loc147)
+    %flip_178 = tt.reshape %flip_177 : tensor<32x2x8xi32, #linear4> -> tensor<32x16xi32, #linear> loc(#loc148)
+    %y_179 = tt.reshape %ret_173 : tensor<32x16xi32, #linear> -> tensor<64x2x4xi32, #linear3> loc(#loc154)
+    %ileft_180 = tt.broadcast %left_mask_52 : tensor<1x2x1xi32, #linear3> -> tensor<64x2x4xi32, #linear3> loc(#loc156)
+    %ileft_181 = arith.muli %y_179, %ileft_180 : tensor<64x2x4xi32, #linear3> loc(#loc156)
+    %ileft_182 = "tt.reduce"(%ileft_181) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_419: i32 loc(callsite(#loc1 at #loc157)), %ileft_420: i32 loc(callsite(#loc1 at #loc157))):
+      %ileft_421 = arith.addi %ileft_419, %ileft_420 : i32 loc(#loc203)
+      tt.reduce.return %ileft_421 : i32 loc(#loc193)
+    }) : (tensor<64x2x4xi32, #linear3>) -> tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> loc(#loc193)
+    %ileft_183 = tt.expand_dims %ileft_182 {axis = 1 : i32} : tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> -> tensor<64x1x4xi32, #linear3> loc(#loc158)
+    %ileft_184 = tt.broadcast %ileft_183 : tensor<64x1x4xi32, #linear3> -> tensor<64x2x4xi32, #linear3> loc(#loc159)
+    %iright_185 = arith.muli %y_179, %flip_102 : tensor<64x2x4xi32, #linear3> loc(#loc160)
+    %iright_186 = "tt.reduce"(%iright_185) <{axis = 1 : i32}> ({
+    ^bb0(%iright_419: i32 loc(callsite(#loc1 at #loc161)), %iright_420: i32 loc(callsite(#loc1 at #loc161))):
+      %iright_421 = arith.addi %iright_419, %iright_420 : i32 loc(#loc204)
+      tt.reduce.return %iright_421 : i32 loc(#loc195)
+    }) : (tensor<64x2x4xi32, #linear3>) -> tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> loc(#loc195)
+    %iright_187 = tt.expand_dims %iright_186 {axis = 1 : i32} : tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> -> tensor<64x1x4xi32, #linear3> loc(#loc162)
+    %iright_188 = tt.broadcast %iright_187 : tensor<64x1x4xi32, #linear3> -> tensor<64x2x4xi32, #linear3> loc(#loc163)
+    %ileft_189 = tt.reshape %ileft_184 : tensor<64x2x4xi32, #linear3> -> tensor<32x16xi32, #linear> loc(#loc164)
+    %iright_190 = tt.reshape %iright_188 : tensor<64x2x4xi32, #linear3> -> tensor<32x16xi32, #linear> loc(#loc165)
+    %y_idx_191 = tt.reshape %new_idxs_176 : tensor<32x16xi32, #linear> -> tensor<64x2x4xi32, #linear3> loc(#loc166)
+    %left_idx_192 = arith.muli %y_idx_191, %ileft_180 : tensor<64x2x4xi32, #linear3> loc(#loc168)
+    %left_idx_193 = "tt.reduce"(%left_idx_192) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_419: i32 loc(callsite(#loc1 at #loc169)), %left_idx_420: i32 loc(callsite(#loc1 at #loc169))):
+      %left_idx_421 = arith.addi %left_idx_419, %left_idx_420 : i32 loc(#loc205)
+      tt.reduce.return %left_idx_421 : i32 loc(#loc198)
+    }) : (tensor<64x2x4xi32, #linear3>) -> tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> loc(#loc198)
+    %left_idx_194 = tt.expand_dims %left_idx_193 {axis = 1 : i32} : tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> -> tensor<64x1x4xi32, #linear3> loc(#loc170)
+    %left_idx_195 = tt.broadcast %left_idx_194 : tensor<64x1x4xi32, #linear3> -> tensor<64x2x4xi32, #linear3> loc(#loc171)
+    %right_idx_196 = arith.muli %y_idx_191, %flip_102 : tensor<64x2x4xi32, #linear3> loc(#loc173)
+    %right_idx_197 = "tt.reduce"(%right_idx_196) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_419: i32 loc(callsite(#loc1 at #loc174)), %right_idx_420: i32 loc(callsite(#loc1 at #loc174))):
+      %right_idx_421 = arith.addi %right_idx_419, %right_idx_420 : i32 loc(#loc206)
+      tt.reduce.return %right_idx_421 : i32 loc(#loc201)
+    }) : (tensor<64x2x4xi32, #linear3>) -> tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> loc(#loc201)
+    %right_idx_198 = tt.expand_dims %right_idx_197 {axis = 1 : i32} : tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> -> tensor<64x1x4xi32, #linear3> loc(#loc175)
+    %right_idx_199 = tt.broadcast %right_idx_198 : tensor<64x1x4xi32, #linear3> -> tensor<64x2x4xi32, #linear3> loc(#loc176)
+    %left_idx_200 = tt.reshape %left_idx_195 : tensor<64x2x4xi32, #linear3> -> tensor<32x16xi32, #linear> loc(#loc177)
+    %right_idx_201 = tt.reshape %right_idx_199 : tensor<64x2x4xi32, #linear3> -> tensor<32x16xi32, #linear> loc(#loc178)
+    %cond_202 = arith.cmpi slt, %ileft_189, %iright_190 : tensor<32x16xi32, #linear> loc(#loc179)
+    %eq_203 = arith.cmpi eq, %ileft_189, %iright_190 : tensor<32x16xi32, #linear> loc(#loc180)
+    %cond_204 = arith.cmpi sgt, %left_idx_200, %right_idx_201 : tensor<32x16xi32, #linear> loc(#loc181)
+    %cond_205 = arith.andi %eq_203, %cond_204 : tensor<32x16xi1, #linear> loc(#loc182)
+    %cond_206 = arith.ori %cond_202, %cond_205 : tensor<32x16xi1, #linear> loc(#loc183)
+    %cond_207 = arith.extui %cond_206 : tensor<32x16xi1, #linear> to tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_208 = arith.xori %cond_207, %flip_178 : tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_209 = arith.cmpi ne, %cond_208, %cst : tensor<32x16xi32, #linear> loc(#loc185)
+    %ret_210 = arith.xori %ileft_189, %iright_190 : tensor<32x16xi32, #linear> loc(#loc186)
+    %ret_211 = arith.select %cond_209, %ret_210, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc187)
+    %ret_212 = arith.xori %ret_173, %ret_211 : tensor<32x16xi32, #linear> loc(#loc188)
+    %new_idxs_213 = arith.xori %left_idx_200, %right_idx_201 : tensor<32x16xi32, #linear> loc(#loc189)
+    %new_idxs_214 = arith.select %cond_209, %new_idxs_213, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc190)
+    %new_idxs_215 = arith.xori %new_idxs_176, %new_idxs_214 : tensor<32x16xi32, #linear> loc(#loc191)
+    %y_216 = tt.reshape %ret_212 : tensor<32x16xi32, #linear> -> tensor<128x2x2xi32, #linear2> loc(#loc154)
+    %ileft_217 = arith.muli %y_216, %ileft_105 : tensor<128x2x2xi32, #linear2> loc(#loc156)
+    %ileft_218 = "tt.reduce"(%ileft_217) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_419: i32 loc(callsite(#loc1 at #loc157)), %ileft_420: i32 loc(callsite(#loc1 at #loc157))):
+      %ileft_421 = arith.addi %ileft_419, %ileft_420 : i32 loc(#loc203)
+      tt.reduce.return %ileft_421 : i32 loc(#loc193)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc193)
+    %ileft_219 = tt.expand_dims %ileft_218 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc158)
+    %ileft_220 = tt.broadcast %ileft_219 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc159)
+    %iright_221 = arith.muli %y_216, %flip_48 : tensor<128x2x2xi32, #linear2> loc(#loc160)
+    %iright_222 = "tt.reduce"(%iright_221) <{axis = 1 : i32}> ({
+    ^bb0(%iright_419: i32 loc(callsite(#loc1 at #loc161)), %iright_420: i32 loc(callsite(#loc1 at #loc161))):
+      %iright_421 = arith.addi %iright_419, %iright_420 : i32 loc(#loc204)
+      tt.reduce.return %iright_421 : i32 loc(#loc195)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc195)
+    %iright_223 = tt.expand_dims %iright_222 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc162)
+    %iright_224 = tt.broadcast %iright_223 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc163)
+    %ileft_225 = tt.reshape %ileft_220 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc164)
+    %iright_226 = tt.reshape %iright_224 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc165)
+    %y_idx_227 = tt.reshape %new_idxs_215 : tensor<32x16xi32, #linear> -> tensor<128x2x2xi32, #linear2> loc(#loc166)
+    %left_idx_228 = arith.muli %y_idx_227, %ileft_105 : tensor<128x2x2xi32, #linear2> loc(#loc168)
+    %left_idx_229 = "tt.reduce"(%left_idx_228) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_419: i32 loc(callsite(#loc1 at #loc169)), %left_idx_420: i32 loc(callsite(#loc1 at #loc169))):
+      %left_idx_421 = arith.addi %left_idx_419, %left_idx_420 : i32 loc(#loc205)
+      tt.reduce.return %left_idx_421 : i32 loc(#loc198)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc198)
+    %left_idx_230 = tt.expand_dims %left_idx_229 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc170)
+    %left_idx_231 = tt.broadcast %left_idx_230 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc171)
+    %right_idx_232 = arith.muli %y_idx_227, %flip_48 : tensor<128x2x2xi32, #linear2> loc(#loc173)
+    %right_idx_233 = "tt.reduce"(%right_idx_232) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_419: i32 loc(callsite(#loc1 at #loc174)), %right_idx_420: i32 loc(callsite(#loc1 at #loc174))):
+      %right_idx_421 = arith.addi %right_idx_419, %right_idx_420 : i32 loc(#loc206)
+      tt.reduce.return %right_idx_421 : i32 loc(#loc201)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc201)
+    %right_idx_234 = tt.expand_dims %right_idx_233 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc175)
+    %right_idx_235 = tt.broadcast %right_idx_234 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc176)
+    %left_idx_236 = tt.reshape %left_idx_231 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc177)
+    %right_idx_237 = tt.reshape %right_idx_235 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc178)
+    %cond_238 = arith.cmpi slt, %ileft_225, %iright_226 : tensor<32x16xi32, #linear> loc(#loc179)
+    %eq_239 = arith.cmpi eq, %ileft_225, %iright_226 : tensor<32x16xi32, #linear> loc(#loc180)
+    %cond_240 = arith.cmpi sgt, %left_idx_236, %right_idx_237 : tensor<32x16xi32, #linear> loc(#loc181)
+    %cond_241 = arith.andi %eq_239, %cond_240 : tensor<32x16xi1, #linear> loc(#loc182)
+    %cond_242 = arith.ori %cond_238, %cond_241 : tensor<32x16xi1, #linear> loc(#loc183)
+    %cond_243 = arith.extui %cond_242 : tensor<32x16xi1, #linear> to tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_244 = arith.xori %cond_243, %flip_178 : tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_245 = arith.cmpi ne, %cond_244, %cst : tensor<32x16xi32, #linear> loc(#loc185)
+    %ret_246 = arith.xori %ileft_225, %iright_226 : tensor<32x16xi32, #linear> loc(#loc186)
+    %ret_247 = arith.select %cond_245, %ret_246, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc187)
+    %ret_248 = arith.xori %ret_212, %ret_247 : tensor<32x16xi32, #linear> loc(#loc188)
+    %new_idxs_249 = arith.xori %left_idx_236, %right_idx_237 : tensor<32x16xi32, #linear> loc(#loc189)
+    %new_idxs_250 = arith.select %cond_245, %new_idxs_249, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc190)
+    %new_idxs_251 = arith.xori %new_idxs_215, %new_idxs_250 : tensor<32x16xi32, #linear> loc(#loc191)
+    %y_252 = tt.reshape %ret_248 : tensor<32x16xi32, #linear> -> tensor<256x2x1xi32, #linear1> loc(#loc154)
+    %ileft_253 = arith.muli %y_252, %ileft : tensor<256x2x1xi32, #linear1> loc(#loc156)
+    %ileft_254 = "tt.reduce"(%ileft_253) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_419: i32 loc(callsite(#loc1 at #loc157)), %ileft_420: i32 loc(callsite(#loc1 at #loc157))):
+      %ileft_421 = arith.addi %ileft_419, %ileft_420 : i32 loc(#loc203)
+      tt.reduce.return %ileft_421 : i32 loc(#loc193)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc193)
+    %ileft_255 = tt.expand_dims %ileft_254 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc158)
+    %ileft_256 = tt.broadcast %ileft_255 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc159)
+    %iright_257 = arith.muli %y_252, %iright : tensor<256x2x1xi32, #linear1> loc(#loc160)
+    %iright_258 = "tt.reduce"(%iright_257) <{axis = 1 : i32}> ({
+    ^bb0(%iright_419: i32 loc(callsite(#loc1 at #loc161)), %iright_420: i32 loc(callsite(#loc1 at #loc161))):
+      %iright_421 = arith.addi %iright_419, %iright_420 : i32 loc(#loc204)
+      tt.reduce.return %iright_421 : i32 loc(#loc195)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc195)
+    %iright_259 = tt.expand_dims %iright_258 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc162)
+    %iright_260 = tt.broadcast %iright_259 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc163)
+    %ileft_261 = tt.reshape %ileft_256 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc164)
+    %iright_262 = tt.reshape %iright_260 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc165)
+    %y_idx_263 = tt.reshape %new_idxs_251 : tensor<32x16xi32, #linear> -> tensor<256x2x1xi32, #linear1> loc(#loc166)
+    %left_idx_264 = arith.muli %y_idx_263, %ileft : tensor<256x2x1xi32, #linear1> loc(#loc168)
+    %left_idx_265 = "tt.reduce"(%left_idx_264) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_419: i32 loc(callsite(#loc1 at #loc169)), %left_idx_420: i32 loc(callsite(#loc1 at #loc169))):
+      %left_idx_421 = arith.addi %left_idx_419, %left_idx_420 : i32 loc(#loc205)
+      tt.reduce.return %left_idx_421 : i32 loc(#loc198)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc198)
+    %left_idx_266 = tt.expand_dims %left_idx_265 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc170)
+    %left_idx_267 = tt.broadcast %left_idx_266 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc171)
+    %right_idx_268 = arith.muli %y_idx_263, %iright : tensor<256x2x1xi32, #linear1> loc(#loc173)
+    %right_idx_269 = "tt.reduce"(%right_idx_268) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_419: i32 loc(callsite(#loc1 at #loc174)), %right_idx_420: i32 loc(callsite(#loc1 at #loc174))):
+      %right_idx_421 = arith.addi %right_idx_419, %right_idx_420 : i32 loc(#loc206)
+      tt.reduce.return %right_idx_421 : i32 loc(#loc201)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc201)
+    %right_idx_270 = tt.expand_dims %right_idx_269 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc175)
+    %right_idx_271 = tt.broadcast %right_idx_270 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc176)
+    %left_idx_272 = tt.reshape %left_idx_267 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc177)
+    %right_idx_273 = tt.reshape %right_idx_271 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc178)
+    %cond_274 = arith.cmpi slt, %ileft_261, %iright_262 : tensor<32x16xi32, #linear> loc(#loc179)
+    %eq_275 = arith.cmpi eq, %ileft_261, %iright_262 : tensor<32x16xi32, #linear> loc(#loc180)
+    %cond_276 = arith.cmpi sgt, %left_idx_272, %right_idx_273 : tensor<32x16xi32, #linear> loc(#loc181)
+    %cond_277 = arith.andi %eq_275, %cond_276 : tensor<32x16xi1, #linear> loc(#loc182)
+    %cond_278 = arith.ori %cond_274, %cond_277 : tensor<32x16xi1, #linear> loc(#loc183)
+    %cond_279 = arith.extui %cond_278 : tensor<32x16xi1, #linear> to tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_280 = arith.xori %cond_279, %flip_178 : tensor<32x16xi32, #linear> loc(#loc184)
+    %cond_281 = arith.cmpi ne, %cond_280, %cst : tensor<32x16xi32, #linear> loc(#loc185)
+    %ret_282 = arith.xori %ileft_261, %iright_262 : tensor<32x16xi32, #linear> loc(#loc186)
+    %ret_283 = arith.select %cond_281, %ret_282, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc187)
+    %ret_284 = arith.xori %ret_248, %ret_283 : tensor<32x16xi32, #linear> loc(#loc188)
+    %new_idxs_285 = arith.xori %left_idx_272, %right_idx_273 : tensor<32x16xi32, #linear> loc(#loc189)
+    %new_idxs_286 = arith.select %cond_281, %new_idxs_285, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc190)
+    %new_idxs_287 = arith.xori %new_idxs_251, %new_idxs_286 : tensor<32x16xi32, #linear> loc(#loc191)
+    %y_288 = tt.reshape %ret_284 : tensor<32x16xi32, #linear> -> tensor<32x2x8xi32, #linear4> loc(#loc154)
+    %ileft_289 = tt.broadcast %left_mask_53 : tensor<1x2x1xi32, #linear4> -> tensor<32x2x8xi32, #linear4> loc(#loc156)
+    %ileft_290 = arith.muli %y_288, %ileft_289 : tensor<32x2x8xi32, #linear4> loc(#loc156)
+    %ileft_291 = "tt.reduce"(%ileft_290) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_419: i32 loc(callsite(#loc1 at #loc157)), %ileft_420: i32 loc(callsite(#loc1 at #loc157))):
+      %ileft_421 = arith.addi %ileft_419, %ileft_420 : i32 loc(#loc203)
+      tt.reduce.return %ileft_421 : i32 loc(#loc193)
+    }) : (tensor<32x2x8xi32, #linear4>) -> tensor<32x8xi32, #ttg.slice<{dim = 1, parent = #linear4}>> loc(#loc193)
+    %ileft_292 = tt.expand_dims %ileft_291 {axis = 1 : i32} : tensor<32x8xi32, #ttg.slice<{dim = 1, parent = #linear4}>> -> tensor<32x1x8xi32, #linear4> loc(#loc158)
+    %ileft_293 = tt.broadcast %ileft_292 : tensor<32x1x8xi32, #linear4> -> tensor<32x2x8xi32, #linear4> loc(#loc159)
+    %iright_294 = arith.muli %y_288, %flip_177 : tensor<32x2x8xi32, #linear4> loc(#loc160)
+    %iright_295 = "tt.reduce"(%iright_294) <{axis = 1 : i32}> ({
+    ^bb0(%iright_419: i32 loc(callsite(#loc1 at #loc161)), %iright_420: i32 loc(callsite(#loc1 at #loc161))):
+      %iright_421 = arith.addi %iright_419, %iright_420 : i32 loc(#loc204)
+      tt.reduce.return %iright_421 : i32 loc(#loc195)
+    }) : (tensor<32x2x8xi32, #linear4>) -> tensor<32x8xi32, #ttg.slice<{dim = 1, parent = #linear4}>> loc(#loc195)
+    %iright_296 = tt.expand_dims %iright_295 {axis = 1 : i32} : tensor<32x8xi32, #ttg.slice<{dim = 1, parent = #linear4}>> -> tensor<32x1x8xi32, #linear4> loc(#loc162)
+    %iright_297 = tt.broadcast %iright_296 : tensor<32x1x8xi32, #linear4> -> tensor<32x2x8xi32, #linear4> loc(#loc163)
+    %ileft_298 = tt.reshape %ileft_293 : tensor<32x2x8xi32, #linear4> -> tensor<32x16xi32, #linear> loc(#loc164)
+    %iright_299 = tt.reshape %iright_297 : tensor<32x2x8xi32, #linear4> -> tensor<32x16xi32, #linear> loc(#loc165)
+    %y_idx_300 = tt.reshape %new_idxs_287 : tensor<32x16xi32, #linear> -> tensor<32x2x8xi32, #linear4> loc(#loc166)
+    %left_idx_301 = arith.muli %y_idx_300, %ileft_289 : tensor<32x2x8xi32, #linear4> loc(#loc168)
+    %left_idx_302 = "tt.reduce"(%left_idx_301) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_419: i32 loc(callsite(#loc1 at #loc169)), %left_idx_420: i32 loc(callsite(#loc1 at #loc169))):
+      %left_idx_421 = arith.addi %left_idx_419, %left_idx_420 : i32 loc(#loc205)
+      tt.reduce.return %left_idx_421 : i32 loc(#loc198)
+    }) : (tensor<32x2x8xi32, #linear4>) -> tensor<32x8xi32, #ttg.slice<{dim = 1, parent = #linear4}>> loc(#loc198)
+    %left_idx_303 = tt.expand_dims %left_idx_302 {axis = 1 : i32} : tensor<32x8xi32, #ttg.slice<{dim = 1, parent = #linear4}>> -> tensor<32x1x8xi32, #linear4> loc(#loc170)
+    %left_idx_304 = tt.broadcast %left_idx_303 : tensor<32x1x8xi32, #linear4> -> tensor<32x2x8xi32, #linear4> loc(#loc171)
+    %right_idx_305 = arith.muli %y_idx_300, %flip_177 : tensor<32x2x8xi32, #linear4> loc(#loc173)
+    %right_idx_306 = "tt.reduce"(%right_idx_305) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_419: i32 loc(callsite(#loc1 at #loc174)), %right_idx_420: i32 loc(callsite(#loc1 at #loc174))):
+      %right_idx_421 = arith.addi %right_idx_419, %right_idx_420 : i32 loc(#loc206)
+      tt.reduce.return %right_idx_421 : i32 loc(#loc201)
+    }) : (tensor<32x2x8xi32, #linear4>) -> tensor<32x8xi32, #ttg.slice<{dim = 1, parent = #linear4}>> loc(#loc201)
+    %right_idx_307 = tt.expand_dims %right_idx_306 {axis = 1 : i32} : tensor<32x8xi32, #ttg.slice<{dim = 1, parent = #linear4}>> -> tensor<32x1x8xi32, #linear4> loc(#loc175)
+    %right_idx_308 = tt.broadcast %right_idx_307 : tensor<32x1x8xi32, #linear4> -> tensor<32x2x8xi32, #linear4> loc(#loc176)
+    %left_idx_309 = tt.reshape %left_idx_304 : tensor<32x2x8xi32, #linear4> -> tensor<32x16xi32, #linear> loc(#loc177)
+    %right_idx_310 = tt.reshape %right_idx_308 : tensor<32x2x8xi32, #linear4> -> tensor<32x16xi32, #linear> loc(#loc178)
+    %cond_311 = arith.cmpi slt, %ileft_298, %iright_299 : tensor<32x16xi32, #linear> loc(#loc179)
+    %eq_312 = arith.cmpi eq, %ileft_298, %iright_299 : tensor<32x16xi32, #linear> loc(#loc180)
+    %cond_313 = arith.cmpi sgt, %left_idx_309, %right_idx_310 : tensor<32x16xi32, #linear> loc(#loc181)
+    %cond_314 = arith.andi %eq_312, %cond_313 : tensor<32x16xi1, #linear> loc(#loc182)
+    %cond_315 = arith.ori %cond_311, %cond_314 : tensor<32x16xi1, #linear> loc(#loc183)
+    %ret_316 = arith.xori %ileft_298, %iright_299 : tensor<32x16xi32, #linear> loc(#loc186)
+    %ret_317 = arith.select %cond_315, %ret_316, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc187)
+    %ret_318 = arith.xori %ret_284, %ret_317 : tensor<32x16xi32, #linear> loc(#loc188)
+    %new_idxs_319 = arith.xori %left_idx_309, %right_idx_310 : tensor<32x16xi32, #linear> loc(#loc189)
+    %new_idxs_320 = arith.select %cond_315, %new_idxs_319, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc190)
+    %new_idxs_321 = arith.xori %new_idxs_287, %new_idxs_320 : tensor<32x16xi32, #linear> loc(#loc191)
+    %y_322 = tt.reshape %ret_318 : tensor<32x16xi32, #linear> -> tensor<64x2x4xi32, #linear3> loc(#loc154)
+    %ileft_323 = arith.muli %y_322, %ileft_180 : tensor<64x2x4xi32, #linear3> loc(#loc156)
+    %ileft_324 = "tt.reduce"(%ileft_323) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_419: i32 loc(callsite(#loc1 at #loc157)), %ileft_420: i32 loc(callsite(#loc1 at #loc157))):
+      %ileft_421 = arith.addi %ileft_419, %ileft_420 : i32 loc(#loc203)
+      tt.reduce.return %ileft_421 : i32 loc(#loc193)
+    }) : (tensor<64x2x4xi32, #linear3>) -> tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> loc(#loc193)
+    %ileft_325 = tt.expand_dims %ileft_324 {axis = 1 : i32} : tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> -> tensor<64x1x4xi32, #linear3> loc(#loc158)
+    %ileft_326 = tt.broadcast %ileft_325 : tensor<64x1x4xi32, #linear3> -> tensor<64x2x4xi32, #linear3> loc(#loc159)
+    %iright_327 = arith.muli %y_322, %flip_102 : tensor<64x2x4xi32, #linear3> loc(#loc160)
+    %iright_328 = "tt.reduce"(%iright_327) <{axis = 1 : i32}> ({
+    ^bb0(%iright_419: i32 loc(callsite(#loc1 at #loc161)), %iright_420: i32 loc(callsite(#loc1 at #loc161))):
+      %iright_421 = arith.addi %iright_419, %iright_420 : i32 loc(#loc204)
+      tt.reduce.return %iright_421 : i32 loc(#loc195)
+    }) : (tensor<64x2x4xi32, #linear3>) -> tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> loc(#loc195)
+    %iright_329 = tt.expand_dims %iright_328 {axis = 1 : i32} : tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> -> tensor<64x1x4xi32, #linear3> loc(#loc162)
+    %iright_330 = tt.broadcast %iright_329 : tensor<64x1x4xi32, #linear3> -> tensor<64x2x4xi32, #linear3> loc(#loc163)
+    %ileft_331 = tt.reshape %ileft_326 : tensor<64x2x4xi32, #linear3> -> tensor<32x16xi32, #linear> loc(#loc164)
+    %iright_332 = tt.reshape %iright_330 : tensor<64x2x4xi32, #linear3> -> tensor<32x16xi32, #linear> loc(#loc165)
+    %y_idx_333 = tt.reshape %new_idxs_321 : tensor<32x16xi32, #linear> -> tensor<64x2x4xi32, #linear3> loc(#loc166)
+    %left_idx_334 = arith.muli %y_idx_333, %ileft_180 : tensor<64x2x4xi32, #linear3> loc(#loc168)
+    %left_idx_335 = "tt.reduce"(%left_idx_334) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_419: i32 loc(callsite(#loc1 at #loc169)), %left_idx_420: i32 loc(callsite(#loc1 at #loc169))):
+      %left_idx_421 = arith.addi %left_idx_419, %left_idx_420 : i32 loc(#loc205)
+      tt.reduce.return %left_idx_421 : i32 loc(#loc198)
+    }) : (tensor<64x2x4xi32, #linear3>) -> tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> loc(#loc198)
+    %left_idx_336 = tt.expand_dims %left_idx_335 {axis = 1 : i32} : tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> -> tensor<64x1x4xi32, #linear3> loc(#loc170)
+    %left_idx_337 = tt.broadcast %left_idx_336 : tensor<64x1x4xi32, #linear3> -> tensor<64x2x4xi32, #linear3> loc(#loc171)
+    %right_idx_338 = arith.muli %y_idx_333, %flip_102 : tensor<64x2x4xi32, #linear3> loc(#loc173)
+    %right_idx_339 = "tt.reduce"(%right_idx_338) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_419: i32 loc(callsite(#loc1 at #loc174)), %right_idx_420: i32 loc(callsite(#loc1 at #loc174))):
+      %right_idx_421 = arith.addi %right_idx_419, %right_idx_420 : i32 loc(#loc206)
+      tt.reduce.return %right_idx_421 : i32 loc(#loc201)
+    }) : (tensor<64x2x4xi32, #linear3>) -> tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> loc(#loc201)
+    %right_idx_340 = tt.expand_dims %right_idx_339 {axis = 1 : i32} : tensor<64x4xi32, #ttg.slice<{dim = 1, parent = #linear3}>> -> tensor<64x1x4xi32, #linear3> loc(#loc175)
+    %right_idx_341 = tt.broadcast %right_idx_340 : tensor<64x1x4xi32, #linear3> -> tensor<64x2x4xi32, #linear3> loc(#loc176)
+    %left_idx_342 = tt.reshape %left_idx_337 : tensor<64x2x4xi32, #linear3> -> tensor<32x16xi32, #linear> loc(#loc177)
+    %right_idx_343 = tt.reshape %right_idx_341 : tensor<64x2x4xi32, #linear3> -> tensor<32x16xi32, #linear> loc(#loc178)
+    %cond_344 = arith.cmpi slt, %ileft_331, %iright_332 : tensor<32x16xi32, #linear> loc(#loc179)
+    %eq_345 = arith.cmpi eq, %ileft_331, %iright_332 : tensor<32x16xi32, #linear> loc(#loc180)
+    %cond_346 = arith.cmpi sgt, %left_idx_342, %right_idx_343 : tensor<32x16xi32, #linear> loc(#loc181)
+    %cond_347 = arith.andi %eq_345, %cond_346 : tensor<32x16xi1, #linear> loc(#loc182)
+    %cond_348 = arith.ori %cond_344, %cond_347 : tensor<32x16xi1, #linear> loc(#loc183)
+    %ret_349 = arith.xori %ileft_331, %iright_332 : tensor<32x16xi32, #linear> loc(#loc186)
+    %ret_350 = arith.select %cond_348, %ret_349, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc187)
+    %ret_351 = arith.xori %ret_318, %ret_350 : tensor<32x16xi32, #linear> loc(#loc188)
+    %new_idxs_352 = arith.xori %left_idx_342, %right_idx_343 : tensor<32x16xi32, #linear> loc(#loc189)
+    %new_idxs_353 = arith.select %cond_348, %new_idxs_352, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc190)
+    %new_idxs_354 = arith.xori %new_idxs_321, %new_idxs_353 : tensor<32x16xi32, #linear> loc(#loc191)
+    %y_355 = tt.reshape %ret_351 : tensor<32x16xi32, #linear> -> tensor<128x2x2xi32, #linear2> loc(#loc154)
+    %ileft_356 = arith.muli %y_355, %ileft_105 : tensor<128x2x2xi32, #linear2> loc(#loc156)
+    %ileft_357 = "tt.reduce"(%ileft_356) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_419: i32 loc(callsite(#loc1 at #loc157)), %ileft_420: i32 loc(callsite(#loc1 at #loc157))):
+      %ileft_421 = arith.addi %ileft_419, %ileft_420 : i32 loc(#loc203)
+      tt.reduce.return %ileft_421 : i32 loc(#loc193)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc193)
+    %ileft_358 = tt.expand_dims %ileft_357 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc158)
+    %ileft_359 = tt.broadcast %ileft_358 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc159)
+    %iright_360 = arith.muli %y_355, %flip_48 : tensor<128x2x2xi32, #linear2> loc(#loc160)
+    %iright_361 = "tt.reduce"(%iright_360) <{axis = 1 : i32}> ({
+    ^bb0(%iright_419: i32 loc(callsite(#loc1 at #loc161)), %iright_420: i32 loc(callsite(#loc1 at #loc161))):
+      %iright_421 = arith.addi %iright_419, %iright_420 : i32 loc(#loc204)
+      tt.reduce.return %iright_421 : i32 loc(#loc195)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc195)
+    %iright_362 = tt.expand_dims %iright_361 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc162)
+    %iright_363 = tt.broadcast %iright_362 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc163)
+    %ileft_364 = tt.reshape %ileft_359 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc164)
+    %iright_365 = tt.reshape %iright_363 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc165)
+    %y_idx_366 = tt.reshape %new_idxs_354 : tensor<32x16xi32, #linear> -> tensor<128x2x2xi32, #linear2> loc(#loc166)
+    %left_idx_367 = arith.muli %y_idx_366, %ileft_105 : tensor<128x2x2xi32, #linear2> loc(#loc168)
+    %left_idx_368 = "tt.reduce"(%left_idx_367) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_419: i32 loc(callsite(#loc1 at #loc169)), %left_idx_420: i32 loc(callsite(#loc1 at #loc169))):
+      %left_idx_421 = arith.addi %left_idx_419, %left_idx_420 : i32 loc(#loc205)
+      tt.reduce.return %left_idx_421 : i32 loc(#loc198)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc198)
+    %left_idx_369 = tt.expand_dims %left_idx_368 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc170)
+    %left_idx_370 = tt.broadcast %left_idx_369 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc171)
+    %right_idx_371 = arith.muli %y_idx_366, %flip_48 : tensor<128x2x2xi32, #linear2> loc(#loc173)
+    %right_idx_372 = "tt.reduce"(%right_idx_371) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_419: i32 loc(callsite(#loc1 at #loc174)), %right_idx_420: i32 loc(callsite(#loc1 at #loc174))):
+      %right_idx_421 = arith.addi %right_idx_419, %right_idx_420 : i32 loc(#loc206)
+      tt.reduce.return %right_idx_421 : i32 loc(#loc201)
+    }) : (tensor<128x2x2xi32, #linear2>) -> tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> loc(#loc201)
+    %right_idx_373 = tt.expand_dims %right_idx_372 {axis = 1 : i32} : tensor<128x2xi32, #ttg.slice<{dim = 1, parent = #linear2}>> -> tensor<128x1x2xi32, #linear2> loc(#loc175)
+    %right_idx_374 = tt.broadcast %right_idx_373 : tensor<128x1x2xi32, #linear2> -> tensor<128x2x2xi32, #linear2> loc(#loc176)
+    %left_idx_375 = tt.reshape %left_idx_370 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc177)
+    %right_idx_376 = tt.reshape %right_idx_374 : tensor<128x2x2xi32, #linear2> -> tensor<32x16xi32, #linear> loc(#loc178)
+    %cond_377 = arith.cmpi slt, %ileft_364, %iright_365 : tensor<32x16xi32, #linear> loc(#loc179)
+    %eq_378 = arith.cmpi eq, %ileft_364, %iright_365 : tensor<32x16xi32, #linear> loc(#loc180)
+    %cond_379 = arith.cmpi sgt, %left_idx_375, %right_idx_376 : tensor<32x16xi32, #linear> loc(#loc181)
+    %cond_380 = arith.andi %eq_378, %cond_379 : tensor<32x16xi1, #linear> loc(#loc182)
+    %cond_381 = arith.ori %cond_377, %cond_380 : tensor<32x16xi1, #linear> loc(#loc183)
+    %ret_382 = arith.xori %ileft_364, %iright_365 : tensor<32x16xi32, #linear> loc(#loc186)
+    %ret_383 = arith.select %cond_381, %ret_382, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc187)
+    %ret_384 = arith.xori %ret_351, %ret_383 : tensor<32x16xi32, #linear> loc(#loc188)
+    %new_idxs_385 = arith.xori %left_idx_375, %right_idx_376 : tensor<32x16xi32, #linear> loc(#loc189)
+    %new_idxs_386 = arith.select %cond_381, %new_idxs_385, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc190)
+    %new_idxs_387 = arith.xori %new_idxs_354, %new_idxs_386 : tensor<32x16xi32, #linear> loc(#loc191)
+    %y_388 = tt.reshape %ret_384 : tensor<32x16xi32, #linear> -> tensor<256x2x1xi32, #linear1> loc(#loc154)
+    %ileft_389 = arith.muli %y_388, %ileft : tensor<256x2x1xi32, #linear1> loc(#loc156)
+    %ileft_390 = "tt.reduce"(%ileft_389) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_419: i32 loc(callsite(#loc1 at #loc157)), %ileft_420: i32 loc(callsite(#loc1 at #loc157))):
+      %ileft_421 = arith.addi %ileft_419, %ileft_420 : i32 loc(#loc203)
+      tt.reduce.return %ileft_421 : i32 loc(#loc193)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc193)
+    %ileft_391 = tt.expand_dims %ileft_390 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc158)
+    %ileft_392 = tt.broadcast %ileft_391 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc159)
+    %iright_393 = arith.muli %y_388, %iright : tensor<256x2x1xi32, #linear1> loc(#loc160)
+    %iright_394 = "tt.reduce"(%iright_393) <{axis = 1 : i32}> ({
+    ^bb0(%iright_419: i32 loc(callsite(#loc1 at #loc161)), %iright_420: i32 loc(callsite(#loc1 at #loc161))):
+      %iright_421 = arith.addi %iright_419, %iright_420 : i32 loc(#loc204)
+      tt.reduce.return %iright_421 : i32 loc(#loc195)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc195)
+    %iright_395 = tt.expand_dims %iright_394 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc162)
+    %iright_396 = tt.broadcast %iright_395 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc163)
+    %ileft_397 = tt.reshape %ileft_392 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc164)
+    %iright_398 = tt.reshape %iright_396 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc165)
+    %y_idx_399 = tt.reshape %new_idxs_387 : tensor<32x16xi32, #linear> -> tensor<256x2x1xi32, #linear1> loc(#loc166)
+    %left_idx_400 = arith.muli %y_idx_399, %ileft : tensor<256x2x1xi32, #linear1> loc(#loc168)
+    %left_idx_401 = "tt.reduce"(%left_idx_400) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_419: i32 loc(callsite(#loc1 at #loc169)), %left_idx_420: i32 loc(callsite(#loc1 at #loc169))):
+      %left_idx_421 = arith.addi %left_idx_419, %left_idx_420 : i32 loc(#loc205)
+      tt.reduce.return %left_idx_421 : i32 loc(#loc198)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc198)
+    %left_idx_402 = tt.expand_dims %left_idx_401 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc170)
+    %left_idx_403 = tt.broadcast %left_idx_402 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc171)
+    %right_idx_404 = arith.muli %y_idx_399, %iright : tensor<256x2x1xi32, #linear1> loc(#loc173)
+    %right_idx_405 = "tt.reduce"(%right_idx_404) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_419: i32 loc(callsite(#loc1 at #loc174)), %right_idx_420: i32 loc(callsite(#loc1 at #loc174))):
+      %right_idx_421 = arith.addi %right_idx_419, %right_idx_420 : i32 loc(#loc206)
+      tt.reduce.return %right_idx_421 : i32 loc(#loc201)
+    }) : (tensor<256x2x1xi32, #linear1>) -> tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> loc(#loc201)
+    %right_idx_406 = tt.expand_dims %right_idx_405 {axis = 1 : i32} : tensor<256x1xi32, #ttg.slice<{dim = 1, parent = #linear1}>> -> tensor<256x1x1xi32, #linear1> loc(#loc175)
+    %right_idx_407 = tt.broadcast %right_idx_406 : tensor<256x1x1xi32, #linear1> -> tensor<256x2x1xi32, #linear1> loc(#loc176)
+    %left_idx_408 = tt.reshape %left_idx_403 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc177)
+    %right_idx_409 = tt.reshape %right_idx_407 : tensor<256x2x1xi32, #linear1> -> tensor<32x16xi32, #linear> loc(#loc178)
+    %cond_410 = arith.cmpi slt, %ileft_397, %iright_398 : tensor<32x16xi32, #linear> loc(#loc179)
+    %eq_411 = arith.cmpi eq, %ileft_397, %iright_398 : tensor<32x16xi32, #linear> loc(#loc180)
+    %cond_412 = arith.cmpi sgt, %left_idx_408, %right_idx_409 : tensor<32x16xi32, #linear> loc(#loc181)
+    %cond_413 = arith.andi %eq_411, %cond_412 : tensor<32x16xi1, #linear> loc(#loc182)
+    %cond_414 = arith.ori %cond_410, %cond_413 : tensor<32x16xi1, #linear> loc(#loc183)
+    %new_idxs_415 = arith.xori %left_idx_408, %right_idx_409 : tensor<32x16xi32, #linear> loc(#loc189)
+    %new_idxs_416 = arith.select %cond_414, %new_idxs_415, %cst : tensor<32x16xi1, #linear>, tensor<32x16xi32, #linear> loc(#loc190)
+    %new_idxs_417 = arith.xori %new_idxs_387, %new_idxs_416 : tensor<32x16xi32, #linear> loc(#loc191)
+    %tmp7 = arith.extsi %tmp0_36 : tensor<32x16xi32, #blocked> to tensor<32x16xi64, #blocked> loc(#loc141)
+    %tmp10 = arith.select %tmp0_34, %tmp7, %cst_0 : tensor<32x16xi1, #blocked>, tensor<32x16xi64, #blocked> loc(#loc142)
+    %tmp11 = "tt.reduce"(%tmp10) <{axis = 1 : i32}> ({
+    ^bb0(%tmp11_419: i64 loc(callsite(#loc1 at #loc143)), %tmp11_420: i64 loc(callsite(#loc1 at #loc143))):
+      %tmp11_421 = arith.addi %tmp11_419, %tmp11_420 : i64 loc(#loc192)
+      tt.reduce.return %tmp11_421 : i64 loc(#loc152)
+    }) : (tensor<32x16xi64, #blocked>) -> tensor<32xi64, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc152)
+    %tmp11_418 = tt.expand_dims %tmp11 {axis = 1 : i32} : tensor<32xi64, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<32x1xi64, #blocked> loc(#loc144)
+    %tmp14 = arith.trunci %tmp11_418 : tensor<32x1xi64, #blocked> to tensor<32x1xi32, #blocked> loc(#loc145)
+    %0 = arith.muli %xindex_19, %cst_4 : tensor<32x1xi32, #blocked1> loc(#loc70)
+    %1 = tt.broadcast %r0_index_25 : tensor<1x16xi32, #blocked1> -> tensor<32x16xi32, #blocked1> loc(#loc71)
+    %2 = tt.broadcast %0 : tensor<32x1xi32, #blocked1> -> tensor<32x16xi32, #blocked1> loc(#loc71)
+    %3 = arith.addi %1, %2 : tensor<32x16xi32, #blocked1> loc(#loc71)
+    %4 = tt.splat %out_ptr2 : !tt.ptr<i32> -> tensor<32x16x!tt.ptr<i32>, #blocked1> loc(#loc72)
+    %5 = tt.addptr %4, %3 : tensor<32x16x!tt.ptr<i32>, #blocked1>, tensor<32x16xi32, #blocked1> loc(#loc72)
+    %6 = ttg.convert_layout %new_idxs_417 : tensor<32x16xi32, #linear> -> tensor<32x16xi32, #blocked1> loc(#loc73)
+    tt.store %5, %6, %tmp0_35 : tensor<32x16x!tt.ptr<i32>, #blocked1> loc(#loc73)
+    %7 = tt.splat %out_ptr3 : !tt.ptr<i32> -> tensor<32x1x!tt.ptr<i32>, #blocked> loc(#loc74)
+    %8 = tt.addptr %7, %xindex_18 : tensor<32x1x!tt.ptr<i32>, #blocked>, tensor<32x1xi32, #blocked> loc(#loc74)
+    tt.store %8, %tmp14, %xmask : tensor<32x1x!tt.ptr<i32>, #blocked> loc(#loc75)
+    tt.return loc(#loc76)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":24:28)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":24:33)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":25:44)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":25:23)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":26:21)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":27:38)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":33:19)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":34:19)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:38)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:35)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:49)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:45)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:30)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:54)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":38:19)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":40:33)
+#loc18 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":627:44)
+#loc21 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":627:60)
+#loc22 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":627:68)
+#loc23 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":533:22)
+#loc25 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":537:21)
+#loc26 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":538:40)
+#loc27 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc29 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc30 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":538:65)
+#loc31 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":538:78)
+#loc32 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":539:41)
+#loc34 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":539:67)
+#loc35 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":539:80)
+#loc36 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":540:30)
+#loc37 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":541:32)
+#loc38 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":546:29)
+#loc39 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":548:36)
+#loc40 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":548:23)
+#loc41 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":290:25)
+#loc43 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":548:53)
+#loc44 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":548:66)
+#loc45 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":551:37)
+#loc46 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":551:23)
+#loc48 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":551:54)
+#loc49 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":551:67)
+#loc50 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":553:36)
+#loc51 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":554:38)
+#loc52 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":574:22)
+#loc53 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":591:21)
+#loc54 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":594:40)
+#loc55 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":594:29)
+#loc56 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":594:23)
+#loc57 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":599:19)
+#loc58 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":599:28)
+#loc59 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":600:38)
+#loc60 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":600:46)
+#loc61 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":600:15)
+#loc62 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":601:48)
+#loc63 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":601:59)
+#loc64 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":601:22)
+#loc65 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":42:19)
+#loc66 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":44:34)
+#loc68 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":45:29)
+#loc69 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":48:21)
+#loc70 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":49:35)
+#loc71 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":49:32)
+#loc72 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":49:25)
+#loc73 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":49:47)
+#loc74 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":50:25)
+#loc75 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":50:37)
+#loc76 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":50:4)
+#loc82 = loc("xoffset"(#loc2))
+#loc83 = loc("xoffset"(#loc3))
+#loc84 = loc("xindex"(#loc4))
+#loc85 = loc("xindex"(#loc5))
+#loc86 = loc("xmask"(#loc6))
+#loc87 = loc("r0_index"(#loc7))
+#loc88 = loc("x0"(#loc8))
+#loc89 = loc("x1"(#loc9))
+#loc90 = loc("tmp0"(#loc10))
+#loc91 = loc("tmp0"(#loc11))
+#loc92 = loc("tmp0"(#loc12))
+#loc93 = loc("tmp0"(#loc13))
+#loc94 = loc("tmp0"(#loc14))
+#loc95 = loc("tmp0"(#loc15))
+#loc96 = loc("tmp2"(#loc16))
+#loc97 = loc("tmp4"(#loc17))
+#loc98 = loc("flip"(#loc18))
+#loc100 = loc("flip"(#loc21))
+#loc101 = loc("flip"(#loc22))
+#loc102 = loc("y"(#loc23))
+#loc103 = loc("left_mask"(#loc25))
+#loc104 = loc("ileft"(#loc26))
+#loc106 = loc("ileft"(#loc30))
+#loc107 = loc("ileft"(#loc31))
+#loc108 = loc("iright"(#loc32))
+#loc110 = loc("iright"(#loc34))
+#loc111 = loc("iright"(#loc35))
+#loc112 = loc("ileft"(#loc36))
+#loc113 = loc("iright"(#loc37))
+#loc114 = loc("y_idx"(#loc38))
+#loc115 = loc("left_idx"(#loc39))
+#loc116 = loc("left_idx"(#loc40))
+#loc117 = loc("input"(#loc41))
+#loc119 = loc("left_idx"(#loc43))
+#loc120 = loc("left_idx"(#loc44))
+#loc121 = loc("right_idx"(#loc45))
+#loc122 = loc("right_idx"(#loc46))
+#loc124 = loc("right_idx"(#loc48))
+#loc125 = loc("right_idx"(#loc49))
+#loc126 = loc("left_idx"(#loc50))
+#loc127 = loc("right_idx"(#loc51))
+#loc128 = loc("cond"(#loc52))
+#loc129 = loc("eq"(#loc53))
+#loc130 = loc("cond"(#loc54))
+#loc131 = loc("cond"(#loc55))
+#loc132 = loc("cond"(#loc56))
+#loc133 = loc("cond"(#loc57))
+#loc134 = loc("cond"(#loc58))
+#loc135 = loc("ret"(#loc59))
+#loc136 = loc("ret"(#loc60))
+#loc137 = loc("ret"(#loc61))
+#loc138 = loc("new_idxs"(#loc62))
+#loc139 = loc("new_idxs"(#loc63))
+#loc140 = loc("new_idxs"(#loc64))
+#loc141 = loc("tmp7"(#loc65))
+#loc142 = loc("tmp10"(#loc66))
+#loc144 = loc("tmp11"(#loc68))
+#loc145 = loc("tmp14"(#loc69))
+#loc146 = loc(callsite(#loc98 at #loc99))
+#loc147 = loc(callsite(#loc100 at #loc99))
+#loc148 = loc(callsite(#loc101 at #loc99))
+#loc150 = loc("cond"(#loc128))
+#loc151 = loc("eq"(#loc129))
+#loc152 = loc(callsite(#loc27 at #loc143))
+#loc154 = loc(callsite(#loc102 at #loc149))
+#loc155 = loc(callsite(#loc103 at #loc149))
+#loc156 = loc(callsite(#loc104 at #loc149))
+#loc158 = loc(callsite(#loc106 at #loc149))
+#loc159 = loc(callsite(#loc107 at #loc149))
+#loc160 = loc(callsite(#loc108 at #loc149))
+#loc162 = loc(callsite(#loc110 at #loc149))
+#loc163 = loc(callsite(#loc111 at #loc149))
+#loc164 = loc(callsite(#loc112 at #loc149))
+#loc165 = loc(callsite(#loc113 at #loc149))
+#loc166 = loc(callsite(#loc114 at #loc149))
+#loc167 = loc(callsite(#loc115 at #loc149))
+#loc168 = loc(callsite(#loc116 at #loc149))
+#loc170 = loc(callsite(#loc119 at #loc149))
+#loc171 = loc(callsite(#loc120 at #loc149))
+#loc172 = loc(callsite(#loc121 at #loc149))
+#loc173 = loc(callsite(#loc122 at #loc149))
+#loc175 = loc(callsite(#loc124 at #loc149))
+#loc176 = loc(callsite(#loc125 at #loc149))
+#loc177 = loc(callsite(#loc126 at #loc149))
+#loc178 = loc(callsite(#loc127 at #loc149))
+#loc179 = loc(callsite(#loc150 at #loc149))
+#loc180 = loc(callsite(#loc151 at #loc149))
+#loc181 = loc(callsite(#loc130 at #loc149))
+#loc182 = loc(callsite(#loc131 at #loc149))
+#loc183 = loc(callsite(#loc132 at #loc149))
+#loc184 = loc(callsite(#loc133 at #loc149))
+#loc185 = loc(callsite(#loc134 at #loc149))
+#loc186 = loc(callsite(#loc135 at #loc149))
+#loc187 = loc(callsite(#loc136 at #loc149))
+#loc188 = loc(callsite(#loc137 at #loc149))
+#loc189 = loc(callsite(#loc138 at #loc149))
+#loc190 = loc(callsite(#loc139 at #loc149))
+#loc191 = loc(callsite(#loc140 at #loc149))
+#loc192 = loc(callsite(#loc29 at #loc152))
+#loc193 = loc(callsite(#loc27 at #loc157))
+#loc195 = loc(callsite(#loc27 at #loc161))
+#loc197 = loc(callsite(#loc117 at #loc169))
+#loc198 = loc(callsite(#loc27 at #loc169))
+#loc200 = loc(callsite(#loc117 at #loc174))
+#loc201 = loc(callsite(#loc27 at #loc174))
+#loc203 = loc(callsite(#loc29 at #loc193))
+#loc204 = loc(callsite(#loc29 at #loc195))
+#loc205 = loc(callsite(#loc29 at #loc198))
+#loc206 = loc(callsite(#loc29 at #loc201))

SpecForge-ext/cache/compiled_kernels/triton/7/A7DYCXJM4X5DHYLAIRTU6BFB3S5UCV3W4C27BWQBJGXYAG3NWQWA/triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.ttir

@@ -0,0 +1,799 @@
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":18:0)
+#loc1 = loc(unknown)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":41:67)
+#loc23 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":662:12)
+#loc28 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":634:73)
+#loc32 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":538:51)
+#loc37 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":539:53)
+#loc46 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":548:50)
+#loc51 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":551:51)
+#loc70 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":45:26)
+#loc80 = loc("in_ptr0"(#loc))
+#loc81 = loc("out_ptr2"(#loc))
+#loc82 = loc("out_ptr3"(#loc))
+#loc83 = loc("xnumel"(#loc))
+#loc84 = loc("r0_numel"(#loc))
+#loc106 = loc(callsite(#loc23 at #loc2))
+#loc113 = loc("ileft"(#loc32))
+#loc117 = loc("iright"(#loc37))
+#loc126 = loc("left_idx"(#loc46))
+#loc131 = loc("right_idx"(#loc51))
+#loc150 = loc("tmp11"(#loc70))
+#loc157 = loc(callsite(#loc28 at #loc106))
+#loc161 = loc(callsite(#loc1 at #loc150))
+#loc165 = loc(callsite(#loc113 at #loc157))
+#loc169 = loc(callsite(#loc117 at #loc157))
+#loc177 = loc(callsite(#loc126 at #loc157))
+#loc182 = loc(callsite(#loc131 at #loc157))
+#loc202 = loc(callsite(#loc1 at #loc165))
+#loc204 = loc(callsite(#loc1 at #loc169))
+#loc207 = loc(callsite(#loc1 at #loc177))
+#loc210 = loc(callsite(#loc1 at #loc182))
+module {
+  tt.func public @triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3(%in_ptr0: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr2: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %out_ptr3: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr3"(#loc)), %xnumel: i32 {tt.divisibility = 16 : i32} loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %cst = arith.constant dense<1> : tensor<1x2x1xi32> loc(#loc85)
+    %cst_0 = arith.constant dense<0> : tensor<32x16xi32> loc(#loc1)
+    %tmp10 = arith.constant dense<0> : tensor<32x16xi64> loc(#loc86)
+    %tmp0 = arith.constant dense<272> : tensor<32x1xi32> loc(#loc87)
+    %tmp0_1 = arith.constant dense<17> : tensor<1x16xi32> loc(#loc88)
+    %cst_2 = arith.constant dense<16> : tensor<32x1xi32> loc(#loc1)
+    %xmask = arith.constant dense<32> : tensor<32x1xi32> loc(#loc89)
+    %c32_i32 = arith.constant 32 : i32 loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc90)
+    %xoffset_3 = arith.muli %xoffset, %c32_i32 : i32 loc(#loc91)
+    %xindex = tt.make_range {end = 32 : i32, start = 0 : i32} : tensor<32xi32> loc(#loc92)
+    %xindex_4 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<32xi32> -> tensor<32x1xi32> loc(#loc93)
+    %xindex_5 = tt.splat %xoffset_3 : i32 -> tensor<32x1xi32> loc(#loc94)
+    %xindex_6 = arith.addi %xindex_5, %xindex_4 : tensor<32x1xi32> loc(#loc94)
+    %xmask_7 = arith.cmpi slt, %xindex_6, %xmask : tensor<32x1xi32> loc(#loc89)
+    %r0_index = tt.make_range {end = 16 : i32, start = 0 : i32} : tensor<16xi32> loc(#loc95)
+    %r0_index_8 = tt.expand_dims %r0_index {axis = 0 : i32} : tensor<16xi32> -> tensor<1x16xi32> loc(#loc96)
+    %x0 = arith.remsi %xindex_6, %cst_2 : tensor<32x1xi32> loc(#loc97)
+    %x1 = arith.divsi %xindex_6, %cst_2 : tensor<32x1xi32> loc(#loc98)
+    %tmp0_9 = arith.muli %r0_index_8, %tmp0_1 : tensor<1x16xi32> loc(#loc88)
+    %tmp0_10 = tt.broadcast %x0 : tensor<32x1xi32> -> tensor<32x16xi32> loc(#loc99)
+    %tmp0_11 = tt.broadcast %tmp0_9 : tensor<1x16xi32> -> tensor<32x16xi32> loc(#loc99)
+    %tmp0_12 = arith.addi %tmp0_10, %tmp0_11 : tensor<32x16xi32> loc(#loc99)
+    %tmp0_13 = arith.muli %x1, %tmp0 : tensor<32x1xi32> loc(#loc87)
+    %tmp0_14 = tt.broadcast %tmp0_13 : tensor<32x1xi32> -> tensor<32x16xi32> loc(#loc100)
+    %tmp0_15 = arith.addi %tmp0_12, %tmp0_14 : tensor<32x16xi32> loc(#loc100)
+    %tmp0_16 = tt.splat %in_ptr0 : !tt.ptr<i32> -> tensor<32x16x!tt.ptr<i32>> loc(#loc101)
+    %tmp0_17 = tt.addptr %tmp0_16, %tmp0_15 : tensor<32x16x!tt.ptr<i32>>, tensor<32x16xi32> loc(#loc101)
+    %tmp0_18 = tt.broadcast %xmask_7 : tensor<32x1xi1> -> tensor<32x16xi1> loc(#loc102)
+    %tmp0_19 = tt.load %tmp0_17, %tmp0_18, %cst_0 : tensor<32x16x!tt.ptr<i32>> loc(#loc102)
+    %tmp2 = arith.trunci %r0_index_8 : tensor<1x16xi32> to tensor<1x16xi16> loc(#loc103)
+    %tmp4 = tt.broadcast %tmp2 : tensor<1x16xi16> -> tensor<32x16xi16> loc(#loc104)
+    %flip = tt.make_range {end = 2 : i32, start = 0 : i32} : tensor<2xi32> loc(#loc153)
+    %flip_20 = tt.expand_dims %flip {axis = 0 : i32} : tensor<2xi32> -> tensor<1x2xi32> loc(#loc154)
+    %flip_21 = tt.expand_dims %flip_20 {axis = 2 : i32} : tensor<1x2xi32> -> tensor<1x2x1xi32> loc(#loc154)
+    %flip_22 = tt.broadcast %flip_21 : tensor<1x2x1xi32> -> tensor<128x2x2xi32> loc(#loc155)
+    %flip_23 = tt.reshape %flip_22 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc156)
+    %y = tt.reshape %tmp0_19 : tensor<32x16xi32> -> tensor<256x2x1xi32> loc(#loc162)
+    %left_mask = arith.subi %cst, %flip_21 : tensor<1x2x1xi32> loc(#loc163)
+    %ileft = tt.broadcast %left_mask : tensor<1x2x1xi32> -> tensor<256x2x1xi32> loc(#loc164)
+    %ileft_24 = arith.muli %y, %ileft : tensor<256x2x1xi32> loc(#loc164)
+    %ileft_25 = "tt.reduce"(%ileft_24) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_377: i32 loc(callsite(#loc1 at #loc165)), %ileft_378: i32 loc(callsite(#loc1 at #loc165))):
+      %ileft_379 = arith.addi %ileft_377, %ileft_378 : i32 loc(#loc211)
+      tt.reduce.return %ileft_379 : i32 loc(#loc201)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc201)
+    %ileft_26 = tt.expand_dims %ileft_25 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc166)
+    %ileft_27 = tt.broadcast %ileft_26 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc167)
+    %iright = tt.broadcast %flip_21 : tensor<1x2x1xi32> -> tensor<256x2x1xi32> loc(#loc168)
+    %iright_28 = arith.muli %y, %iright : tensor<256x2x1xi32> loc(#loc168)
+    %iright_29 = "tt.reduce"(%iright_28) <{axis = 1 : i32}> ({
+    ^bb0(%iright_377: i32 loc(callsite(#loc1 at #loc169)), %iright_378: i32 loc(callsite(#loc1 at #loc169))):
+      %iright_379 = arith.addi %iright_377, %iright_378 : i32 loc(#loc212)
+      tt.reduce.return %iright_379 : i32 loc(#loc203)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc203)
+    %iright_30 = tt.expand_dims %iright_29 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc170)
+    %iright_31 = tt.broadcast %iright_30 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc171)
+    %ileft_32 = tt.reshape %ileft_27 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc172)
+    %iright_33 = tt.reshape %iright_31 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc173)
+    %y_idx = tt.reshape %tmp4 : tensor<32x16xi16> -> tensor<256x2x1xi16> loc(#loc174)
+    %left_idx = arith.trunci %left_mask : tensor<1x2x1xi32> to tensor<1x2x1xi16> loc(#loc175)
+    %left_idx_34 = tt.broadcast %left_idx : tensor<1x2x1xi16> -> tensor<256x2x1xi16> loc(#loc176)
+    %left_idx_35 = arith.muli %y_idx, %left_idx_34 : tensor<256x2x1xi16> loc(#loc176)
+    %input = arith.extsi %left_idx_35 : tensor<256x2x1xi16> to tensor<256x2x1xi32> loc(#loc205)
+    %left_idx_36 = "tt.reduce"(%input) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_377: i32 loc(callsite(#loc1 at #loc177)), %left_idx_378: i32 loc(callsite(#loc1 at #loc177))):
+      %left_idx_379 = arith.addi %left_idx_377, %left_idx_378 : i32 loc(#loc213)
+      tt.reduce.return %left_idx_379 : i32 loc(#loc206)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc206)
+    %left_idx_37 = tt.expand_dims %left_idx_36 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc178)
+    %left_idx_38 = tt.broadcast %left_idx_37 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc179)
+    %right_idx = arith.trunci %flip_21 : tensor<1x2x1xi32> to tensor<1x2x1xi16> loc(#loc180)
+    %right_idx_39 = tt.broadcast %right_idx : tensor<1x2x1xi16> -> tensor<256x2x1xi16> loc(#loc181)
+    %right_idx_40 = arith.muli %y_idx, %right_idx_39 : tensor<256x2x1xi16> loc(#loc181)
+    %input_41 = arith.extsi %right_idx_40 : tensor<256x2x1xi16> to tensor<256x2x1xi32> loc(#loc208)
+    %right_idx_42 = "tt.reduce"(%input_41) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_377: i32 loc(callsite(#loc1 at #loc182)), %right_idx_378: i32 loc(callsite(#loc1 at #loc182))):
+      %right_idx_379 = arith.addi %right_idx_377, %right_idx_378 : i32 loc(#loc214)
+      tt.reduce.return %right_idx_379 : i32 loc(#loc209)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc209)
+    %right_idx_43 = tt.expand_dims %right_idx_42 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc183)
+    %right_idx_44 = tt.broadcast %right_idx_43 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc184)
+    %left_idx_45 = tt.reshape %left_idx_38 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc185)
+    %right_idx_46 = tt.reshape %right_idx_44 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc186)
+    %cond = arith.cmpi slt, %ileft_32, %iright_33 : tensor<32x16xi32> loc(#loc187)
+    %eq = arith.cmpi eq, %ileft_32, %iright_33 : tensor<32x16xi32> loc(#loc188)
+    %cond_47 = arith.cmpi sgt, %left_idx_45, %right_idx_46 : tensor<32x16xi32> loc(#loc189)
+    %cond_48 = arith.andi %eq, %cond_47 : tensor<32x16xi1> loc(#loc190)
+    %cond_49 = arith.ori %cond, %cond_48 : tensor<32x16xi1> loc(#loc191)
+    %cond_50 = arith.extui %cond_49 : tensor<32x16xi1> to tensor<32x16xi32> loc(#loc192)
+    %cond_51 = arith.xori %cond_50, %flip_23 : tensor<32x16xi32> loc(#loc192)
+    %cond_52 = arith.cmpi ne, %cond_51, %cst_0 : tensor<32x16xi32> loc(#loc193)
+    %ret = arith.xori %ileft_32, %iright_33 : tensor<32x16xi32> loc(#loc194)
+    %ret_53 = arith.select %cond_52, %ret, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc195)
+    %ret_54 = arith.xori %tmp0_19, %ret_53 : tensor<32x16xi32> loc(#loc196)
+    %new_idxs = arith.xori %left_idx_45, %right_idx_46 : tensor<32x16xi32> loc(#loc197)
+    %new_idxs_55 = arith.select %cond_52, %new_idxs, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc198)
+    %new_idxs_56 = arith.extsi %tmp2 : tensor<1x16xi16> to tensor<1x16xi32> loc(#loc199)
+    %new_idxs_57 = tt.broadcast %new_idxs_56 : tensor<1x16xi32> -> tensor<32x16xi32> loc(#loc199)
+    %new_idxs_58 = arith.xori %new_idxs_57, %new_idxs_55 : tensor<32x16xi32> loc(#loc199)
+    %flip_59 = tt.broadcast %flip_21 : tensor<1x2x1xi32> -> tensor<64x2x4xi32> loc(#loc155)
+    %flip_60 = tt.reshape %flip_59 : tensor<64x2x4xi32> -> tensor<32x16xi32> loc(#loc156)
+    %y_61 = tt.reshape %ret_54 : tensor<32x16xi32> -> tensor<128x2x2xi32> loc(#loc162)
+    %ileft_62 = tt.broadcast %left_mask : tensor<1x2x1xi32> -> tensor<128x2x2xi32> loc(#loc164)
+    %ileft_63 = arith.muli %y_61, %ileft_62 : tensor<128x2x2xi32> loc(#loc164)
+    %ileft_64 = "tt.reduce"(%ileft_63) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_377: i32 loc(callsite(#loc1 at #loc165)), %ileft_378: i32 loc(callsite(#loc1 at #loc165))):
+      %ileft_379 = arith.addi %ileft_377, %ileft_378 : i32 loc(#loc211)
+      tt.reduce.return %ileft_379 : i32 loc(#loc201)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc201)
+    %ileft_65 = tt.expand_dims %ileft_64 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc166)
+    %ileft_66 = tt.broadcast %ileft_65 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc167)
+    %iright_67 = arith.muli %y_61, %flip_22 : tensor<128x2x2xi32> loc(#loc168)
+    %iright_68 = "tt.reduce"(%iright_67) <{axis = 1 : i32}> ({
+    ^bb0(%iright_377: i32 loc(callsite(#loc1 at #loc169)), %iright_378: i32 loc(callsite(#loc1 at #loc169))):
+      %iright_379 = arith.addi %iright_377, %iright_378 : i32 loc(#loc212)
+      tt.reduce.return %iright_379 : i32 loc(#loc203)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc203)
+    %iright_69 = tt.expand_dims %iright_68 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc170)
+    %iright_70 = tt.broadcast %iright_69 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc171)
+    %ileft_71 = tt.reshape %ileft_66 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc172)
+    %iright_72 = tt.reshape %iright_70 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc173)
+    %y_idx_73 = tt.reshape %new_idxs_58 : tensor<32x16xi32> -> tensor<128x2x2xi32> loc(#loc174)
+    %left_idx_74 = arith.muli %y_idx_73, %ileft_62 : tensor<128x2x2xi32> loc(#loc176)
+    %left_idx_75 = "tt.reduce"(%left_idx_74) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_377: i32 loc(callsite(#loc1 at #loc177)), %left_idx_378: i32 loc(callsite(#loc1 at #loc177))):
+      %left_idx_379 = arith.addi %left_idx_377, %left_idx_378 : i32 loc(#loc213)
+      tt.reduce.return %left_idx_379 : i32 loc(#loc206)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc206)
+    %left_idx_76 = tt.expand_dims %left_idx_75 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc178)
+    %left_idx_77 = tt.broadcast %left_idx_76 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc179)
+    %right_idx_78 = arith.muli %y_idx_73, %flip_22 : tensor<128x2x2xi32> loc(#loc181)
+    %right_idx_79 = "tt.reduce"(%right_idx_78) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_377: i32 loc(callsite(#loc1 at #loc182)), %right_idx_378: i32 loc(callsite(#loc1 at #loc182))):
+      %right_idx_379 = arith.addi %right_idx_377, %right_idx_378 : i32 loc(#loc214)
+      tt.reduce.return %right_idx_379 : i32 loc(#loc209)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc209)
+    %right_idx_80 = tt.expand_dims %right_idx_79 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc183)
+    %right_idx_81 = tt.broadcast %right_idx_80 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc184)
+    %left_idx_82 = tt.reshape %left_idx_77 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc185)
+    %right_idx_83 = tt.reshape %right_idx_81 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc186)
+    %cond_84 = arith.cmpi slt, %ileft_71, %iright_72 : tensor<32x16xi32> loc(#loc187)
+    %eq_85 = arith.cmpi eq, %ileft_71, %iright_72 : tensor<32x16xi32> loc(#loc188)
+    %cond_86 = arith.cmpi sgt, %left_idx_82, %right_idx_83 : tensor<32x16xi32> loc(#loc189)
+    %cond_87 = arith.andi %eq_85, %cond_86 : tensor<32x16xi1> loc(#loc190)
+    %cond_88 = arith.ori %cond_84, %cond_87 : tensor<32x16xi1> loc(#loc191)
+    %cond_89 = arith.extui %cond_88 : tensor<32x16xi1> to tensor<32x16xi32> loc(#loc192)
+    %cond_90 = arith.xori %cond_89, %flip_60 : tensor<32x16xi32> loc(#loc192)
+    %cond_91 = arith.cmpi ne, %cond_90, %cst_0 : tensor<32x16xi32> loc(#loc193)
+    %ret_92 = arith.xori %ileft_71, %iright_72 : tensor<32x16xi32> loc(#loc194)
+    %ret_93 = arith.select %cond_91, %ret_92, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc195)
+    %ret_94 = arith.xori %ret_54, %ret_93 : tensor<32x16xi32> loc(#loc196)
+    %new_idxs_95 = arith.xori %left_idx_82, %right_idx_83 : tensor<32x16xi32> loc(#loc197)
+    %new_idxs_96 = arith.select %cond_91, %new_idxs_95, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc198)
+    %new_idxs_97 = arith.xori %new_idxs_58, %new_idxs_96 : tensor<32x16xi32> loc(#loc199)
+    %y_98 = tt.reshape %ret_94 : tensor<32x16xi32> -> tensor<256x2x1xi32> loc(#loc162)
+    %ileft_99 = arith.muli %y_98, %ileft : tensor<256x2x1xi32> loc(#loc164)
+    %ileft_100 = "tt.reduce"(%ileft_99) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_377: i32 loc(callsite(#loc1 at #loc165)), %ileft_378: i32 loc(callsite(#loc1 at #loc165))):
+      %ileft_379 = arith.addi %ileft_377, %ileft_378 : i32 loc(#loc211)
+      tt.reduce.return %ileft_379 : i32 loc(#loc201)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc201)
+    %ileft_101 = tt.expand_dims %ileft_100 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc166)
+    %ileft_102 = tt.broadcast %ileft_101 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc167)
+    %iright_103 = arith.muli %y_98, %iright : tensor<256x2x1xi32> loc(#loc168)
+    %iright_104 = "tt.reduce"(%iright_103) <{axis = 1 : i32}> ({
+    ^bb0(%iright_377: i32 loc(callsite(#loc1 at #loc169)), %iright_378: i32 loc(callsite(#loc1 at #loc169))):
+      %iright_379 = arith.addi %iright_377, %iright_378 : i32 loc(#loc212)
+      tt.reduce.return %iright_379 : i32 loc(#loc203)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc203)
+    %iright_105 = tt.expand_dims %iright_104 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc170)
+    %iright_106 = tt.broadcast %iright_105 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc171)
+    %ileft_107 = tt.reshape %ileft_102 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc172)
+    %iright_108 = tt.reshape %iright_106 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc173)
+    %y_idx_109 = tt.reshape %new_idxs_97 : tensor<32x16xi32> -> tensor<256x2x1xi32> loc(#loc174)
+    %left_idx_110 = arith.muli %y_idx_109, %ileft : tensor<256x2x1xi32> loc(#loc176)
+    %left_idx_111 = "tt.reduce"(%left_idx_110) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_377: i32 loc(callsite(#loc1 at #loc177)), %left_idx_378: i32 loc(callsite(#loc1 at #loc177))):
+      %left_idx_379 = arith.addi %left_idx_377, %left_idx_378 : i32 loc(#loc213)
+      tt.reduce.return %left_idx_379 : i32 loc(#loc206)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc206)
+    %left_idx_112 = tt.expand_dims %left_idx_111 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc178)
+    %left_idx_113 = tt.broadcast %left_idx_112 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc179)
+    %right_idx_114 = arith.muli %y_idx_109, %iright : tensor<256x2x1xi32> loc(#loc181)
+    %right_idx_115 = "tt.reduce"(%right_idx_114) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_377: i32 loc(callsite(#loc1 at #loc182)), %right_idx_378: i32 loc(callsite(#loc1 at #loc182))):
+      %right_idx_379 = arith.addi %right_idx_377, %right_idx_378 : i32 loc(#loc214)
+      tt.reduce.return %right_idx_379 : i32 loc(#loc209)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc209)
+    %right_idx_116 = tt.expand_dims %right_idx_115 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc183)
+    %right_idx_117 = tt.broadcast %right_idx_116 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc184)
+    %left_idx_118 = tt.reshape %left_idx_113 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc185)
+    %right_idx_119 = tt.reshape %right_idx_117 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc186)
+    %cond_120 = arith.cmpi slt, %ileft_107, %iright_108 : tensor<32x16xi32> loc(#loc187)
+    %eq_121 = arith.cmpi eq, %ileft_107, %iright_108 : tensor<32x16xi32> loc(#loc188)
+    %cond_122 = arith.cmpi sgt, %left_idx_118, %right_idx_119 : tensor<32x16xi32> loc(#loc189)
+    %cond_123 = arith.andi %eq_121, %cond_122 : tensor<32x16xi1> loc(#loc190)
+    %cond_124 = arith.ori %cond_120, %cond_123 : tensor<32x16xi1> loc(#loc191)
+    %cond_125 = arith.extui %cond_124 : tensor<32x16xi1> to tensor<32x16xi32> loc(#loc192)
+    %cond_126 = arith.xori %cond_125, %flip_60 : tensor<32x16xi32> loc(#loc192)
+    %cond_127 = arith.cmpi ne, %cond_126, %cst_0 : tensor<32x16xi32> loc(#loc193)
+    %ret_128 = arith.xori %ileft_107, %iright_108 : tensor<32x16xi32> loc(#loc194)
+    %ret_129 = arith.select %cond_127, %ret_128, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc195)
+    %ret_130 = arith.xori %ret_94, %ret_129 : tensor<32x16xi32> loc(#loc196)
+    %new_idxs_131 = arith.xori %left_idx_118, %right_idx_119 : tensor<32x16xi32> loc(#loc197)
+    %new_idxs_132 = arith.select %cond_127, %new_idxs_131, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc198)
+    %new_idxs_133 = arith.xori %new_idxs_97, %new_idxs_132 : tensor<32x16xi32> loc(#loc199)
+    %flip_134 = tt.broadcast %flip_21 : tensor<1x2x1xi32> -> tensor<32x2x8xi32> loc(#loc155)
+    %flip_135 = tt.reshape %flip_134 : tensor<32x2x8xi32> -> tensor<32x16xi32> loc(#loc156)
+    %y_136 = tt.reshape %ret_130 : tensor<32x16xi32> -> tensor<64x2x4xi32> loc(#loc162)
+    %ileft_137 = tt.broadcast %left_mask : tensor<1x2x1xi32> -> tensor<64x2x4xi32> loc(#loc164)
+    %ileft_138 = arith.muli %y_136, %ileft_137 : tensor<64x2x4xi32> loc(#loc164)
+    %ileft_139 = "tt.reduce"(%ileft_138) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_377: i32 loc(callsite(#loc1 at #loc165)), %ileft_378: i32 loc(callsite(#loc1 at #loc165))):
+      %ileft_379 = arith.addi %ileft_377, %ileft_378 : i32 loc(#loc211)
+      tt.reduce.return %ileft_379 : i32 loc(#loc201)
+    }) : (tensor<64x2x4xi32>) -> tensor<64x4xi32> loc(#loc201)
+    %ileft_140 = tt.expand_dims %ileft_139 {axis = 1 : i32} : tensor<64x4xi32> -> tensor<64x1x4xi32> loc(#loc166)
+    %ileft_141 = tt.broadcast %ileft_140 : tensor<64x1x4xi32> -> tensor<64x2x4xi32> loc(#loc167)
+    %iright_142 = arith.muli %y_136, %flip_59 : tensor<64x2x4xi32> loc(#loc168)
+    %iright_143 = "tt.reduce"(%iright_142) <{axis = 1 : i32}> ({
+    ^bb0(%iright_377: i32 loc(callsite(#loc1 at #loc169)), %iright_378: i32 loc(callsite(#loc1 at #loc169))):
+      %iright_379 = arith.addi %iright_377, %iright_378 : i32 loc(#loc212)
+      tt.reduce.return %iright_379 : i32 loc(#loc203)
+    }) : (tensor<64x2x4xi32>) -> tensor<64x4xi32> loc(#loc203)
+    %iright_144 = tt.expand_dims %iright_143 {axis = 1 : i32} : tensor<64x4xi32> -> tensor<64x1x4xi32> loc(#loc170)
+    %iright_145 = tt.broadcast %iright_144 : tensor<64x1x4xi32> -> tensor<64x2x4xi32> loc(#loc171)
+    %ileft_146 = tt.reshape %ileft_141 : tensor<64x2x4xi32> -> tensor<32x16xi32> loc(#loc172)
+    %iright_147 = tt.reshape %iright_145 : tensor<64x2x4xi32> -> tensor<32x16xi32> loc(#loc173)
+    %y_idx_148 = tt.reshape %new_idxs_133 : tensor<32x16xi32> -> tensor<64x2x4xi32> loc(#loc174)
+    %left_idx_149 = arith.muli %y_idx_148, %ileft_137 : tensor<64x2x4xi32> loc(#loc176)
+    %left_idx_150 = "tt.reduce"(%left_idx_149) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_377: i32 loc(callsite(#loc1 at #loc177)), %left_idx_378: i32 loc(callsite(#loc1 at #loc177))):
+      %left_idx_379 = arith.addi %left_idx_377, %left_idx_378 : i32 loc(#loc213)
+      tt.reduce.return %left_idx_379 : i32 loc(#loc206)
+    }) : (tensor<64x2x4xi32>) -> tensor<64x4xi32> loc(#loc206)
+    %left_idx_151 = tt.expand_dims %left_idx_150 {axis = 1 : i32} : tensor<64x4xi32> -> tensor<64x1x4xi32> loc(#loc178)
+    %left_idx_152 = tt.broadcast %left_idx_151 : tensor<64x1x4xi32> -> tensor<64x2x4xi32> loc(#loc179)
+    %right_idx_153 = arith.muli %y_idx_148, %flip_59 : tensor<64x2x4xi32> loc(#loc181)
+    %right_idx_154 = "tt.reduce"(%right_idx_153) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_377: i32 loc(callsite(#loc1 at #loc182)), %right_idx_378: i32 loc(callsite(#loc1 at #loc182))):
+      %right_idx_379 = arith.addi %right_idx_377, %right_idx_378 : i32 loc(#loc214)
+      tt.reduce.return %right_idx_379 : i32 loc(#loc209)
+    }) : (tensor<64x2x4xi32>) -> tensor<64x4xi32> loc(#loc209)
+    %right_idx_155 = tt.expand_dims %right_idx_154 {axis = 1 : i32} : tensor<64x4xi32> -> tensor<64x1x4xi32> loc(#loc183)
+    %right_idx_156 = tt.broadcast %right_idx_155 : tensor<64x1x4xi32> -> tensor<64x2x4xi32> loc(#loc184)
+    %left_idx_157 = tt.reshape %left_idx_152 : tensor<64x2x4xi32> -> tensor<32x16xi32> loc(#loc185)
+    %right_idx_158 = tt.reshape %right_idx_156 : tensor<64x2x4xi32> -> tensor<32x16xi32> loc(#loc186)
+    %cond_159 = arith.cmpi slt, %ileft_146, %iright_147 : tensor<32x16xi32> loc(#loc187)
+    %eq_160 = arith.cmpi eq, %ileft_146, %iright_147 : tensor<32x16xi32> loc(#loc188)
+    %cond_161 = arith.cmpi sgt, %left_idx_157, %right_idx_158 : tensor<32x16xi32> loc(#loc189)
+    %cond_162 = arith.andi %eq_160, %cond_161 : tensor<32x16xi1> loc(#loc190)
+    %cond_163 = arith.ori %cond_159, %cond_162 : tensor<32x16xi1> loc(#loc191)
+    %cond_164 = arith.extui %cond_163 : tensor<32x16xi1> to tensor<32x16xi32> loc(#loc192)
+    %cond_165 = arith.xori %cond_164, %flip_135 : tensor<32x16xi32> loc(#loc192)
+    %cond_166 = arith.cmpi ne, %cond_165, %cst_0 : tensor<32x16xi32> loc(#loc193)
+    %ret_167 = arith.xori %ileft_146, %iright_147 : tensor<32x16xi32> loc(#loc194)
+    %ret_168 = arith.select %cond_166, %ret_167, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc195)
+    %ret_169 = arith.xori %ret_130, %ret_168 : tensor<32x16xi32> loc(#loc196)
+    %new_idxs_170 = arith.xori %left_idx_157, %right_idx_158 : tensor<32x16xi32> loc(#loc197)
+    %new_idxs_171 = arith.select %cond_166, %new_idxs_170, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc198)
+    %new_idxs_172 = arith.xori %new_idxs_133, %new_idxs_171 : tensor<32x16xi32> loc(#loc199)
+    %y_173 = tt.reshape %ret_169 : tensor<32x16xi32> -> tensor<128x2x2xi32> loc(#loc162)
+    %ileft_174 = arith.muli %y_173, %ileft_62 : tensor<128x2x2xi32> loc(#loc164)
+    %ileft_175 = "tt.reduce"(%ileft_174) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_377: i32 loc(callsite(#loc1 at #loc165)), %ileft_378: i32 loc(callsite(#loc1 at #loc165))):
+      %ileft_379 = arith.addi %ileft_377, %ileft_378 : i32 loc(#loc211)
+      tt.reduce.return %ileft_379 : i32 loc(#loc201)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc201)
+    %ileft_176 = tt.expand_dims %ileft_175 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc166)
+    %ileft_177 = tt.broadcast %ileft_176 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc167)
+    %iright_178 = arith.muli %y_173, %flip_22 : tensor<128x2x2xi32> loc(#loc168)
+    %iright_179 = "tt.reduce"(%iright_178) <{axis = 1 : i32}> ({
+    ^bb0(%iright_377: i32 loc(callsite(#loc1 at #loc169)), %iright_378: i32 loc(callsite(#loc1 at #loc169))):
+      %iright_379 = arith.addi %iright_377, %iright_378 : i32 loc(#loc212)
+      tt.reduce.return %iright_379 : i32 loc(#loc203)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc203)
+    %iright_180 = tt.expand_dims %iright_179 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc170)
+    %iright_181 = tt.broadcast %iright_180 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc171)
+    %ileft_182 = tt.reshape %ileft_177 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc172)
+    %iright_183 = tt.reshape %iright_181 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc173)
+    %y_idx_184 = tt.reshape %new_idxs_172 : tensor<32x16xi32> -> tensor<128x2x2xi32> loc(#loc174)
+    %left_idx_185 = arith.muli %y_idx_184, %ileft_62 : tensor<128x2x2xi32> loc(#loc176)
+    %left_idx_186 = "tt.reduce"(%left_idx_185) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_377: i32 loc(callsite(#loc1 at #loc177)), %left_idx_378: i32 loc(callsite(#loc1 at #loc177))):
+      %left_idx_379 = arith.addi %left_idx_377, %left_idx_378 : i32 loc(#loc213)
+      tt.reduce.return %left_idx_379 : i32 loc(#loc206)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc206)
+    %left_idx_187 = tt.expand_dims %left_idx_186 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc178)
+    %left_idx_188 = tt.broadcast %left_idx_187 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc179)
+    %right_idx_189 = arith.muli %y_idx_184, %flip_22 : tensor<128x2x2xi32> loc(#loc181)
+    %right_idx_190 = "tt.reduce"(%right_idx_189) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_377: i32 loc(callsite(#loc1 at #loc182)), %right_idx_378: i32 loc(callsite(#loc1 at #loc182))):
+      %right_idx_379 = arith.addi %right_idx_377, %right_idx_378 : i32 loc(#loc214)
+      tt.reduce.return %right_idx_379 : i32 loc(#loc209)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc209)
+    %right_idx_191 = tt.expand_dims %right_idx_190 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc183)
+    %right_idx_192 = tt.broadcast %right_idx_191 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc184)
+    %left_idx_193 = tt.reshape %left_idx_188 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc185)
+    %right_idx_194 = tt.reshape %right_idx_192 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc186)
+    %cond_195 = arith.cmpi slt, %ileft_182, %iright_183 : tensor<32x16xi32> loc(#loc187)
+    %eq_196 = arith.cmpi eq, %ileft_182, %iright_183 : tensor<32x16xi32> loc(#loc188)
+    %cond_197 = arith.cmpi sgt, %left_idx_193, %right_idx_194 : tensor<32x16xi32> loc(#loc189)
+    %cond_198 = arith.andi %eq_196, %cond_197 : tensor<32x16xi1> loc(#loc190)
+    %cond_199 = arith.ori %cond_195, %cond_198 : tensor<32x16xi1> loc(#loc191)
+    %cond_200 = arith.extui %cond_199 : tensor<32x16xi1> to tensor<32x16xi32> loc(#loc192)
+    %cond_201 = arith.xori %cond_200, %flip_135 : tensor<32x16xi32> loc(#loc192)
+    %cond_202 = arith.cmpi ne, %cond_201, %cst_0 : tensor<32x16xi32> loc(#loc193)
+    %ret_203 = arith.xori %ileft_182, %iright_183 : tensor<32x16xi32> loc(#loc194)
+    %ret_204 = arith.select %cond_202, %ret_203, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc195)
+    %ret_205 = arith.xori %ret_169, %ret_204 : tensor<32x16xi32> loc(#loc196)
+    %new_idxs_206 = arith.xori %left_idx_193, %right_idx_194 : tensor<32x16xi32> loc(#loc197)
+    %new_idxs_207 = arith.select %cond_202, %new_idxs_206, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc198)
+    %new_idxs_208 = arith.xori %new_idxs_172, %new_idxs_207 : tensor<32x16xi32> loc(#loc199)
+    %y_209 = tt.reshape %ret_205 : tensor<32x16xi32> -> tensor<256x2x1xi32> loc(#loc162)
+    %ileft_210 = arith.muli %y_209, %ileft : tensor<256x2x1xi32> loc(#loc164)
+    %ileft_211 = "tt.reduce"(%ileft_210) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_377: i32 loc(callsite(#loc1 at #loc165)), %ileft_378: i32 loc(callsite(#loc1 at #loc165))):
+      %ileft_379 = arith.addi %ileft_377, %ileft_378 : i32 loc(#loc211)
+      tt.reduce.return %ileft_379 : i32 loc(#loc201)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc201)
+    %ileft_212 = tt.expand_dims %ileft_211 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc166)
+    %ileft_213 = tt.broadcast %ileft_212 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc167)
+    %iright_214 = arith.muli %y_209, %iright : tensor<256x2x1xi32> loc(#loc168)
+    %iright_215 = "tt.reduce"(%iright_214) <{axis = 1 : i32}> ({
+    ^bb0(%iright_377: i32 loc(callsite(#loc1 at #loc169)), %iright_378: i32 loc(callsite(#loc1 at #loc169))):
+      %iright_379 = arith.addi %iright_377, %iright_378 : i32 loc(#loc212)
+      tt.reduce.return %iright_379 : i32 loc(#loc203)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc203)
+    %iright_216 = tt.expand_dims %iright_215 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc170)
+    %iright_217 = tt.broadcast %iright_216 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc171)
+    %ileft_218 = tt.reshape %ileft_213 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc172)
+    %iright_219 = tt.reshape %iright_217 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc173)
+    %y_idx_220 = tt.reshape %new_idxs_208 : tensor<32x16xi32> -> tensor<256x2x1xi32> loc(#loc174)
+    %left_idx_221 = arith.muli %y_idx_220, %ileft : tensor<256x2x1xi32> loc(#loc176)
+    %left_idx_222 = "tt.reduce"(%left_idx_221) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_377: i32 loc(callsite(#loc1 at #loc177)), %left_idx_378: i32 loc(callsite(#loc1 at #loc177))):
+      %left_idx_379 = arith.addi %left_idx_377, %left_idx_378 : i32 loc(#loc213)
+      tt.reduce.return %left_idx_379 : i32 loc(#loc206)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc206)
+    %left_idx_223 = tt.expand_dims %left_idx_222 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc178)
+    %left_idx_224 = tt.broadcast %left_idx_223 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc179)
+    %right_idx_225 = arith.muli %y_idx_220, %iright : tensor<256x2x1xi32> loc(#loc181)
+    %right_idx_226 = "tt.reduce"(%right_idx_225) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_377: i32 loc(callsite(#loc1 at #loc182)), %right_idx_378: i32 loc(callsite(#loc1 at #loc182))):
+      %right_idx_379 = arith.addi %right_idx_377, %right_idx_378 : i32 loc(#loc214)
+      tt.reduce.return %right_idx_379 : i32 loc(#loc209)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc209)
+    %right_idx_227 = tt.expand_dims %right_idx_226 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc183)
+    %right_idx_228 = tt.broadcast %right_idx_227 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc184)
+    %left_idx_229 = tt.reshape %left_idx_224 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc185)
+    %right_idx_230 = tt.reshape %right_idx_228 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc186)
+    %cond_231 = arith.cmpi slt, %ileft_218, %iright_219 : tensor<32x16xi32> loc(#loc187)
+    %eq_232 = arith.cmpi eq, %ileft_218, %iright_219 : tensor<32x16xi32> loc(#loc188)
+    %cond_233 = arith.cmpi sgt, %left_idx_229, %right_idx_230 : tensor<32x16xi32> loc(#loc189)
+    %cond_234 = arith.andi %eq_232, %cond_233 : tensor<32x16xi1> loc(#loc190)
+    %cond_235 = arith.ori %cond_231, %cond_234 : tensor<32x16xi1> loc(#loc191)
+    %cond_236 = arith.extui %cond_235 : tensor<32x16xi1> to tensor<32x16xi32> loc(#loc192)
+    %cond_237 = arith.xori %cond_236, %flip_135 : tensor<32x16xi32> loc(#loc192)
+    %cond_238 = arith.cmpi ne, %cond_237, %cst_0 : tensor<32x16xi32> loc(#loc193)
+    %ret_239 = arith.xori %ileft_218, %iright_219 : tensor<32x16xi32> loc(#loc194)
+    %ret_240 = arith.select %cond_238, %ret_239, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc195)
+    %ret_241 = arith.xori %ret_205, %ret_240 : tensor<32x16xi32> loc(#loc196)
+    %new_idxs_242 = arith.xori %left_idx_229, %right_idx_230 : tensor<32x16xi32> loc(#loc197)
+    %new_idxs_243 = arith.select %cond_238, %new_idxs_242, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc198)
+    %new_idxs_244 = arith.xori %new_idxs_208, %new_idxs_243 : tensor<32x16xi32> loc(#loc199)
+    %y_245 = tt.reshape %ret_241 : tensor<32x16xi32> -> tensor<32x2x8xi32> loc(#loc162)
+    %ileft_246 = tt.broadcast %left_mask : tensor<1x2x1xi32> -> tensor<32x2x8xi32> loc(#loc164)
+    %ileft_247 = arith.muli %y_245, %ileft_246 : tensor<32x2x8xi32> loc(#loc164)
+    %ileft_248 = "tt.reduce"(%ileft_247) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_377: i32 loc(callsite(#loc1 at #loc165)), %ileft_378: i32 loc(callsite(#loc1 at #loc165))):
+      %ileft_379 = arith.addi %ileft_377, %ileft_378 : i32 loc(#loc211)
+      tt.reduce.return %ileft_379 : i32 loc(#loc201)
+    }) : (tensor<32x2x8xi32>) -> tensor<32x8xi32> loc(#loc201)
+    %ileft_249 = tt.expand_dims %ileft_248 {axis = 1 : i32} : tensor<32x8xi32> -> tensor<32x1x8xi32> loc(#loc166)
+    %ileft_250 = tt.broadcast %ileft_249 : tensor<32x1x8xi32> -> tensor<32x2x8xi32> loc(#loc167)
+    %iright_251 = arith.muli %y_245, %flip_134 : tensor<32x2x8xi32> loc(#loc168)
+    %iright_252 = "tt.reduce"(%iright_251) <{axis = 1 : i32}> ({
+    ^bb0(%iright_377: i32 loc(callsite(#loc1 at #loc169)), %iright_378: i32 loc(callsite(#loc1 at #loc169))):
+      %iright_379 = arith.addi %iright_377, %iright_378 : i32 loc(#loc212)
+      tt.reduce.return %iright_379 : i32 loc(#loc203)
+    }) : (tensor<32x2x8xi32>) -> tensor<32x8xi32> loc(#loc203)
+    %iright_253 = tt.expand_dims %iright_252 {axis = 1 : i32} : tensor<32x8xi32> -> tensor<32x1x8xi32> loc(#loc170)
+    %iright_254 = tt.broadcast %iright_253 : tensor<32x1x8xi32> -> tensor<32x2x8xi32> loc(#loc171)
+    %ileft_255 = tt.reshape %ileft_250 : tensor<32x2x8xi32> -> tensor<32x16xi32> loc(#loc172)
+    %iright_256 = tt.reshape %iright_254 : tensor<32x2x8xi32> -> tensor<32x16xi32> loc(#loc173)
+    %y_idx_257 = tt.reshape %new_idxs_244 : tensor<32x16xi32> -> tensor<32x2x8xi32> loc(#loc174)
+    %left_idx_258 = arith.muli %y_idx_257, %ileft_246 : tensor<32x2x8xi32> loc(#loc176)
+    %left_idx_259 = "tt.reduce"(%left_idx_258) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_377: i32 loc(callsite(#loc1 at #loc177)), %left_idx_378: i32 loc(callsite(#loc1 at #loc177))):
+      %left_idx_379 = arith.addi %left_idx_377, %left_idx_378 : i32 loc(#loc213)
+      tt.reduce.return %left_idx_379 : i32 loc(#loc206)
+    }) : (tensor<32x2x8xi32>) -> tensor<32x8xi32> loc(#loc206)
+    %left_idx_260 = tt.expand_dims %left_idx_259 {axis = 1 : i32} : tensor<32x8xi32> -> tensor<32x1x8xi32> loc(#loc178)
+    %left_idx_261 = tt.broadcast %left_idx_260 : tensor<32x1x8xi32> -> tensor<32x2x8xi32> loc(#loc179)
+    %right_idx_262 = arith.muli %y_idx_257, %flip_134 : tensor<32x2x8xi32> loc(#loc181)
+    %right_idx_263 = "tt.reduce"(%right_idx_262) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_377: i32 loc(callsite(#loc1 at #loc182)), %right_idx_378: i32 loc(callsite(#loc1 at #loc182))):
+      %right_idx_379 = arith.addi %right_idx_377, %right_idx_378 : i32 loc(#loc214)
+      tt.reduce.return %right_idx_379 : i32 loc(#loc209)
+    }) : (tensor<32x2x8xi32>) -> tensor<32x8xi32> loc(#loc209)
+    %right_idx_264 = tt.expand_dims %right_idx_263 {axis = 1 : i32} : tensor<32x8xi32> -> tensor<32x1x8xi32> loc(#loc183)
+    %right_idx_265 = tt.broadcast %right_idx_264 : tensor<32x1x8xi32> -> tensor<32x2x8xi32> loc(#loc184)
+    %left_idx_266 = tt.reshape %left_idx_261 : tensor<32x2x8xi32> -> tensor<32x16xi32> loc(#loc185)
+    %right_idx_267 = tt.reshape %right_idx_265 : tensor<32x2x8xi32> -> tensor<32x16xi32> loc(#loc186)
+    %cond_268 = arith.cmpi slt, %ileft_255, %iright_256 : tensor<32x16xi32> loc(#loc187)
+    %eq_269 = arith.cmpi eq, %ileft_255, %iright_256 : tensor<32x16xi32> loc(#loc188)
+    %cond_270 = arith.cmpi sgt, %left_idx_266, %right_idx_267 : tensor<32x16xi32> loc(#loc189)
+    %cond_271 = arith.andi %eq_269, %cond_270 : tensor<32x16xi1> loc(#loc190)
+    %cond_272 = arith.ori %cond_268, %cond_271 : tensor<32x16xi1> loc(#loc191)
+    %ret_273 = arith.xori %ileft_255, %iright_256 : tensor<32x16xi32> loc(#loc194)
+    %ret_274 = arith.select %cond_272, %ret_273, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc195)
+    %ret_275 = arith.xori %ret_241, %ret_274 : tensor<32x16xi32> loc(#loc196)
+    %new_idxs_276 = arith.xori %left_idx_266, %right_idx_267 : tensor<32x16xi32> loc(#loc197)
+    %new_idxs_277 = arith.select %cond_272, %new_idxs_276, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc198)
+    %new_idxs_278 = arith.xori %new_idxs_244, %new_idxs_277 : tensor<32x16xi32> loc(#loc199)
+    %y_279 = tt.reshape %ret_275 : tensor<32x16xi32> -> tensor<64x2x4xi32> loc(#loc162)
+    %ileft_280 = arith.muli %y_279, %ileft_137 : tensor<64x2x4xi32> loc(#loc164)
+    %ileft_281 = "tt.reduce"(%ileft_280) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_377: i32 loc(callsite(#loc1 at #loc165)), %ileft_378: i32 loc(callsite(#loc1 at #loc165))):
+      %ileft_379 = arith.addi %ileft_377, %ileft_378 : i32 loc(#loc211)
+      tt.reduce.return %ileft_379 : i32 loc(#loc201)
+    }) : (tensor<64x2x4xi32>) -> tensor<64x4xi32> loc(#loc201)
+    %ileft_282 = tt.expand_dims %ileft_281 {axis = 1 : i32} : tensor<64x4xi32> -> tensor<64x1x4xi32> loc(#loc166)
+    %ileft_283 = tt.broadcast %ileft_282 : tensor<64x1x4xi32> -> tensor<64x2x4xi32> loc(#loc167)
+    %iright_284 = arith.muli %y_279, %flip_59 : tensor<64x2x4xi32> loc(#loc168)
+    %iright_285 = "tt.reduce"(%iright_284) <{axis = 1 : i32}> ({
+    ^bb0(%iright_377: i32 loc(callsite(#loc1 at #loc169)), %iright_378: i32 loc(callsite(#loc1 at #loc169))):
+      %iright_379 = arith.addi %iright_377, %iright_378 : i32 loc(#loc212)
+      tt.reduce.return %iright_379 : i32 loc(#loc203)
+    }) : (tensor<64x2x4xi32>) -> tensor<64x4xi32> loc(#loc203)
+    %iright_286 = tt.expand_dims %iright_285 {axis = 1 : i32} : tensor<64x4xi32> -> tensor<64x1x4xi32> loc(#loc170)
+    %iright_287 = tt.broadcast %iright_286 : tensor<64x1x4xi32> -> tensor<64x2x4xi32> loc(#loc171)
+    %ileft_288 = tt.reshape %ileft_283 : tensor<64x2x4xi32> -> tensor<32x16xi32> loc(#loc172)
+    %iright_289 = tt.reshape %iright_287 : tensor<64x2x4xi32> -> tensor<32x16xi32> loc(#loc173)
+    %y_idx_290 = tt.reshape %new_idxs_278 : tensor<32x16xi32> -> tensor<64x2x4xi32> loc(#loc174)
+    %left_idx_291 = arith.muli %y_idx_290, %ileft_137 : tensor<64x2x4xi32> loc(#loc176)
+    %left_idx_292 = "tt.reduce"(%left_idx_291) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_377: i32 loc(callsite(#loc1 at #loc177)), %left_idx_378: i32 loc(callsite(#loc1 at #loc177))):
+      %left_idx_379 = arith.addi %left_idx_377, %left_idx_378 : i32 loc(#loc213)
+      tt.reduce.return %left_idx_379 : i32 loc(#loc206)
+    }) : (tensor<64x2x4xi32>) -> tensor<64x4xi32> loc(#loc206)
+    %left_idx_293 = tt.expand_dims %left_idx_292 {axis = 1 : i32} : tensor<64x4xi32> -> tensor<64x1x4xi32> loc(#loc178)
+    %left_idx_294 = tt.broadcast %left_idx_293 : tensor<64x1x4xi32> -> tensor<64x2x4xi32> loc(#loc179)
+    %right_idx_295 = arith.muli %y_idx_290, %flip_59 : tensor<64x2x4xi32> loc(#loc181)
+    %right_idx_296 = "tt.reduce"(%right_idx_295) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_377: i32 loc(callsite(#loc1 at #loc182)), %right_idx_378: i32 loc(callsite(#loc1 at #loc182))):
+      %right_idx_379 = arith.addi %right_idx_377, %right_idx_378 : i32 loc(#loc214)
+      tt.reduce.return %right_idx_379 : i32 loc(#loc209)
+    }) : (tensor<64x2x4xi32>) -> tensor<64x4xi32> loc(#loc209)
+    %right_idx_297 = tt.expand_dims %right_idx_296 {axis = 1 : i32} : tensor<64x4xi32> -> tensor<64x1x4xi32> loc(#loc183)
+    %right_idx_298 = tt.broadcast %right_idx_297 : tensor<64x1x4xi32> -> tensor<64x2x4xi32> loc(#loc184)
+    %left_idx_299 = tt.reshape %left_idx_294 : tensor<64x2x4xi32> -> tensor<32x16xi32> loc(#loc185)
+    %right_idx_300 = tt.reshape %right_idx_298 : tensor<64x2x4xi32> -> tensor<32x16xi32> loc(#loc186)
+    %cond_301 = arith.cmpi slt, %ileft_288, %iright_289 : tensor<32x16xi32> loc(#loc187)
+    %eq_302 = arith.cmpi eq, %ileft_288, %iright_289 : tensor<32x16xi32> loc(#loc188)
+    %cond_303 = arith.cmpi sgt, %left_idx_299, %right_idx_300 : tensor<32x16xi32> loc(#loc189)
+    %cond_304 = arith.andi %eq_302, %cond_303 : tensor<32x16xi1> loc(#loc190)
+    %cond_305 = arith.ori %cond_301, %cond_304 : tensor<32x16xi1> loc(#loc191)
+    %ret_306 = arith.xori %ileft_288, %iright_289 : tensor<32x16xi32> loc(#loc194)
+    %ret_307 = arith.select %cond_305, %ret_306, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc195)
+    %ret_308 = arith.xori %ret_275, %ret_307 : tensor<32x16xi32> loc(#loc196)
+    %new_idxs_309 = arith.xori %left_idx_299, %right_idx_300 : tensor<32x16xi32> loc(#loc197)
+    %new_idxs_310 = arith.select %cond_305, %new_idxs_309, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc198)
+    %new_idxs_311 = arith.xori %new_idxs_278, %new_idxs_310 : tensor<32x16xi32> loc(#loc199)
+    %y_312 = tt.reshape %ret_308 : tensor<32x16xi32> -> tensor<128x2x2xi32> loc(#loc162)
+    %ileft_313 = arith.muli %y_312, %ileft_62 : tensor<128x2x2xi32> loc(#loc164)
+    %ileft_314 = "tt.reduce"(%ileft_313) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_377: i32 loc(callsite(#loc1 at #loc165)), %ileft_378: i32 loc(callsite(#loc1 at #loc165))):
+      %ileft_379 = arith.addi %ileft_377, %ileft_378 : i32 loc(#loc211)
+      tt.reduce.return %ileft_379 : i32 loc(#loc201)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc201)
+    %ileft_315 = tt.expand_dims %ileft_314 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc166)
+    %ileft_316 = tt.broadcast %ileft_315 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc167)
+    %iright_317 = arith.muli %y_312, %flip_22 : tensor<128x2x2xi32> loc(#loc168)
+    %iright_318 = "tt.reduce"(%iright_317) <{axis = 1 : i32}> ({
+    ^bb0(%iright_377: i32 loc(callsite(#loc1 at #loc169)), %iright_378: i32 loc(callsite(#loc1 at #loc169))):
+      %iright_379 = arith.addi %iright_377, %iright_378 : i32 loc(#loc212)
+      tt.reduce.return %iright_379 : i32 loc(#loc203)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc203)
+    %iright_319 = tt.expand_dims %iright_318 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc170)
+    %iright_320 = tt.broadcast %iright_319 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc171)
+    %ileft_321 = tt.reshape %ileft_316 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc172)
+    %iright_322 = tt.reshape %iright_320 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc173)
+    %y_idx_323 = tt.reshape %new_idxs_311 : tensor<32x16xi32> -> tensor<128x2x2xi32> loc(#loc174)
+    %left_idx_324 = arith.muli %y_idx_323, %ileft_62 : tensor<128x2x2xi32> loc(#loc176)
+    %left_idx_325 = "tt.reduce"(%left_idx_324) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_377: i32 loc(callsite(#loc1 at #loc177)), %left_idx_378: i32 loc(callsite(#loc1 at #loc177))):
+      %left_idx_379 = arith.addi %left_idx_377, %left_idx_378 : i32 loc(#loc213)
+      tt.reduce.return %left_idx_379 : i32 loc(#loc206)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc206)
+    %left_idx_326 = tt.expand_dims %left_idx_325 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc178)
+    %left_idx_327 = tt.broadcast %left_idx_326 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc179)
+    %right_idx_328 = arith.muli %y_idx_323, %flip_22 : tensor<128x2x2xi32> loc(#loc181)
+    %right_idx_329 = "tt.reduce"(%right_idx_328) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_377: i32 loc(callsite(#loc1 at #loc182)), %right_idx_378: i32 loc(callsite(#loc1 at #loc182))):
+      %right_idx_379 = arith.addi %right_idx_377, %right_idx_378 : i32 loc(#loc214)
+      tt.reduce.return %right_idx_379 : i32 loc(#loc209)
+    }) : (tensor<128x2x2xi32>) -> tensor<128x2xi32> loc(#loc209)
+    %right_idx_330 = tt.expand_dims %right_idx_329 {axis = 1 : i32} : tensor<128x2xi32> -> tensor<128x1x2xi32> loc(#loc183)
+    %right_idx_331 = tt.broadcast %right_idx_330 : tensor<128x1x2xi32> -> tensor<128x2x2xi32> loc(#loc184)
+    %left_idx_332 = tt.reshape %left_idx_327 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc185)
+    %right_idx_333 = tt.reshape %right_idx_331 : tensor<128x2x2xi32> -> tensor<32x16xi32> loc(#loc186)
+    %cond_334 = arith.cmpi slt, %ileft_321, %iright_322 : tensor<32x16xi32> loc(#loc187)
+    %eq_335 = arith.cmpi eq, %ileft_321, %iright_322 : tensor<32x16xi32> loc(#loc188)
+    %cond_336 = arith.cmpi sgt, %left_idx_332, %right_idx_333 : tensor<32x16xi32> loc(#loc189)
+    %cond_337 = arith.andi %eq_335, %cond_336 : tensor<32x16xi1> loc(#loc190)
+    %cond_338 = arith.ori %cond_334, %cond_337 : tensor<32x16xi1> loc(#loc191)
+    %ret_339 = arith.xori %ileft_321, %iright_322 : tensor<32x16xi32> loc(#loc194)
+    %ret_340 = arith.select %cond_338, %ret_339, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc195)
+    %ret_341 = arith.xori %ret_308, %ret_340 : tensor<32x16xi32> loc(#loc196)
+    %new_idxs_342 = arith.xori %left_idx_332, %right_idx_333 : tensor<32x16xi32> loc(#loc197)
+    %new_idxs_343 = arith.select %cond_338, %new_idxs_342, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc198)
+    %new_idxs_344 = arith.xori %new_idxs_311, %new_idxs_343 : tensor<32x16xi32> loc(#loc199)
+    %y_345 = tt.reshape %ret_341 : tensor<32x16xi32> -> tensor<256x2x1xi32> loc(#loc162)
+    %ileft_346 = arith.muli %y_345, %ileft : tensor<256x2x1xi32> loc(#loc164)
+    %ileft_347 = "tt.reduce"(%ileft_346) <{axis = 1 : i32}> ({
+    ^bb0(%ileft_377: i32 loc(callsite(#loc1 at #loc165)), %ileft_378: i32 loc(callsite(#loc1 at #loc165))):
+      %ileft_379 = arith.addi %ileft_377, %ileft_378 : i32 loc(#loc211)
+      tt.reduce.return %ileft_379 : i32 loc(#loc201)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc201)
+    %ileft_348 = tt.expand_dims %ileft_347 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc166)
+    %ileft_349 = tt.broadcast %ileft_348 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc167)
+    %iright_350 = arith.muli %y_345, %iright : tensor<256x2x1xi32> loc(#loc168)
+    %iright_351 = "tt.reduce"(%iright_350) <{axis = 1 : i32}> ({
+    ^bb0(%iright_377: i32 loc(callsite(#loc1 at #loc169)), %iright_378: i32 loc(callsite(#loc1 at #loc169))):
+      %iright_379 = arith.addi %iright_377, %iright_378 : i32 loc(#loc212)
+      tt.reduce.return %iright_379 : i32 loc(#loc203)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc203)
+    %iright_352 = tt.expand_dims %iright_351 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc170)
+    %iright_353 = tt.broadcast %iright_352 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc171)
+    %ileft_354 = tt.reshape %ileft_349 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc172)
+    %iright_355 = tt.reshape %iright_353 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc173)
+    %y_idx_356 = tt.reshape %new_idxs_344 : tensor<32x16xi32> -> tensor<256x2x1xi32> loc(#loc174)
+    %left_idx_357 = arith.muli %y_idx_356, %ileft : tensor<256x2x1xi32> loc(#loc176)
+    %left_idx_358 = "tt.reduce"(%left_idx_357) <{axis = 1 : i32}> ({
+    ^bb0(%left_idx_377: i32 loc(callsite(#loc1 at #loc177)), %left_idx_378: i32 loc(callsite(#loc1 at #loc177))):
+      %left_idx_379 = arith.addi %left_idx_377, %left_idx_378 : i32 loc(#loc213)
+      tt.reduce.return %left_idx_379 : i32 loc(#loc206)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc206)
+    %left_idx_359 = tt.expand_dims %left_idx_358 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc178)
+    %left_idx_360 = tt.broadcast %left_idx_359 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc179)
+    %right_idx_361 = arith.muli %y_idx_356, %iright : tensor<256x2x1xi32> loc(#loc181)
+    %right_idx_362 = "tt.reduce"(%right_idx_361) <{axis = 1 : i32}> ({
+    ^bb0(%right_idx_377: i32 loc(callsite(#loc1 at #loc182)), %right_idx_378: i32 loc(callsite(#loc1 at #loc182))):
+      %right_idx_379 = arith.addi %right_idx_377, %right_idx_378 : i32 loc(#loc214)
+      tt.reduce.return %right_idx_379 : i32 loc(#loc209)
+    }) : (tensor<256x2x1xi32>) -> tensor<256x1xi32> loc(#loc209)
+    %right_idx_363 = tt.expand_dims %right_idx_362 {axis = 1 : i32} : tensor<256x1xi32> -> tensor<256x1x1xi32> loc(#loc183)
+    %right_idx_364 = tt.broadcast %right_idx_363 : tensor<256x1x1xi32> -> tensor<256x2x1xi32> loc(#loc184)
+    %left_idx_365 = tt.reshape %left_idx_360 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc185)
+    %right_idx_366 = tt.reshape %right_idx_364 : tensor<256x2x1xi32> -> tensor<32x16xi32> loc(#loc186)
+    %cond_367 = arith.cmpi slt, %ileft_354, %iright_355 : tensor<32x16xi32> loc(#loc187)
+    %eq_368 = arith.cmpi eq, %ileft_354, %iright_355 : tensor<32x16xi32> loc(#loc188)
+    %cond_369 = arith.cmpi sgt, %left_idx_365, %right_idx_366 : tensor<32x16xi32> loc(#loc189)
+    %cond_370 = arith.andi %eq_368, %cond_369 : tensor<32x16xi1> loc(#loc190)
+    %cond_371 = arith.ori %cond_367, %cond_370 : tensor<32x16xi1> loc(#loc191)
+    %new_idxs_372 = arith.xori %left_idx_365, %right_idx_366 : tensor<32x16xi32> loc(#loc197)
+    %new_idxs_373 = arith.select %cond_371, %new_idxs_372, %cst_0 : tensor<32x16xi1>, tensor<32x16xi32> loc(#loc198)
+    %new_idxs_374 = arith.xori %new_idxs_344, %new_idxs_373 : tensor<32x16xi32> loc(#loc199)
+    %tmp7 = arith.extsi %tmp0_19 : tensor<32x16xi32> to tensor<32x16xi64> loc(#loc149)
+    %tmp10_375 = arith.select %tmp0_18, %tmp7, %tmp10 : tensor<32x16xi1>, tensor<32x16xi64> loc(#loc86)
+    %tmp11 = "tt.reduce"(%tmp10_375) <{axis = 1 : i32}> ({
+    ^bb0(%tmp11_377: i64 loc(callsite(#loc1 at #loc150)), %tmp11_378: i64 loc(callsite(#loc1 at #loc150))):
+      %tmp11_379 = arith.addi %tmp11_377, %tmp11_378 : i64 loc(#loc200)
+      tt.reduce.return %tmp11_379 : i64 loc(#loc160)
+    }) : (tensor<32x16xi64>) -> tensor<32xi64> loc(#loc160)
+    %tmp11_376 = tt.expand_dims %tmp11 {axis = 1 : i32} : tensor<32xi64> -> tensor<32x1xi64> loc(#loc151)
+    %tmp14 = arith.trunci %tmp11_376 : tensor<32x1xi64> to tensor<32x1xi32> loc(#loc152)
+    %0 = arith.muli %xindex_6, %cst_2 : tensor<32x1xi32> loc(#loc73)
+    %1 = tt.broadcast %r0_index_8 : tensor<1x16xi32> -> tensor<32x16xi32> loc(#loc74)
+    %2 = tt.broadcast %0 : tensor<32x1xi32> -> tensor<32x16xi32> loc(#loc74)
+    %3 = arith.addi %1, %2 : tensor<32x16xi32> loc(#loc74)
+    %4 = tt.splat %out_ptr2 : !tt.ptr<i32> -> tensor<32x16x!tt.ptr<i32>> loc(#loc75)
+    %5 = tt.addptr %4, %3 : tensor<32x16x!tt.ptr<i32>>, tensor<32x16xi32> loc(#loc75)
+    tt.store %5, %new_idxs_374, %tmp0_18 : tensor<32x16x!tt.ptr<i32>> loc(#loc76)
+    %6 = tt.splat %out_ptr3 : !tt.ptr<i32> -> tensor<32x1x!tt.ptr<i32>> loc(#loc77)
+    %7 = tt.addptr %6, %xindex_6 : tensor<32x1x!tt.ptr<i32>>, tensor<32x1xi32> loc(#loc77)
+    tt.store %7, %tmp14, %xmask_7 : tensor<32x1x!tt.ptr<i32>> loc(#loc78)
+    tt.return loc(#loc79)
+  } loc(#loc)
+} loc(#loc)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":44:34)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:49)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:38)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":26:21)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":24:28)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":24:33)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":25:36)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":25:44)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":25:23)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":27:28)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":27:38)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":33:19)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":34:19)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:35)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:45)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:30)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":36:54)
+#loc20 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":38:19)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":40:33)
+#loc22 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":627:41)
+#loc24 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":627:44)
+#loc25 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":627:60)
+#loc26 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":627:68)
+#loc27 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":533:22)
+#loc29 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":537:21)
+#loc30 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":538:40)
+#loc31 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc33 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc34 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":538:65)
+#loc35 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":538:78)
+#loc36 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":539:41)
+#loc38 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":539:67)
+#loc39 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":539:80)
+#loc40 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":540:30)
+#loc41 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":541:32)
+#loc42 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":546:29)
+#loc43 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":548:36)
+#loc44 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":548:23)
+#loc45 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":290:25)
+#loc47 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":548:53)
+#loc48 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":548:66)
+#loc49 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":551:37)
+#loc50 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":551:23)
+#loc52 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":551:54)
+#loc53 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":551:67)
+#loc54 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":553:36)
+#loc55 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":554:38)
+#loc56 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":574:22)
+#loc57 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":591:21)
+#loc58 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":594:40)
+#loc59 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":594:29)
+#loc60 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":594:23)
+#loc61 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":599:19)
+#loc62 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":599:28)
+#loc63 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":600:38)
+#loc64 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":600:46)
+#loc65 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":600:15)
+#loc66 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":601:48)
+#loc67 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":601:59)
+#loc68 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":601:22)
+#loc69 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":42:19)
+#loc71 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":45:29)
+#loc72 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":48:21)
+#loc73 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":49:35)
+#loc74 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":49:32)
+#loc75 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":49:25)
+#loc76 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":49:47)
+#loc77 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":50:25)
+#loc78 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":50:37)
+#loc79 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/pe/cpecz443wnneogc65oicauauoytwy7k6ryeyv24laczmux6pdi2b.py":50:4)
+#loc85 = loc(callsite(#loc1 at #loc2))
+#loc86 = loc("tmp10"(#loc3))
+#loc87 = loc("tmp0"(#loc4))
+#loc88 = loc("tmp0"(#loc5))
+#loc89 = loc("xmask"(#loc6))
+#loc90 = loc("xoffset"(#loc7))
+#loc91 = loc("xoffset"(#loc8))
+#loc92 = loc("xindex"(#loc9))
+#loc93 = loc("xindex"(#loc10))
+#loc94 = loc("xindex"(#loc11))
+#loc95 = loc("r0_index"(#loc12))
+#loc96 = loc("r0_index"(#loc13))
+#loc97 = loc("x0"(#loc14))
+#loc98 = loc("x1"(#loc15))
+#loc99 = loc("tmp0"(#loc16))
+#loc100 = loc("tmp0"(#loc17))
+#loc101 = loc("tmp0"(#loc18))
+#loc102 = loc("tmp0"(#loc19))
+#loc103 = loc("tmp2"(#loc20))
+#loc104 = loc("tmp4"(#loc21))
+#loc105 = loc("flip"(#loc22))
+#loc107 = loc("flip"(#loc24))
+#loc108 = loc("flip"(#loc25))
+#loc109 = loc("flip"(#loc26))
+#loc110 = loc("y"(#loc27))
+#loc111 = loc("left_mask"(#loc29))
+#loc112 = loc("ileft"(#loc30))
+#loc114 = loc("ileft"(#loc34))
+#loc115 = loc("ileft"(#loc35))
+#loc116 = loc("iright"(#loc36))
+#loc118 = loc("iright"(#loc38))
+#loc119 = loc("iright"(#loc39))
+#loc120 = loc("ileft"(#loc40))
+#loc121 = loc("iright"(#loc41))
+#loc122 = loc("y_idx"(#loc42))
+#loc123 = loc("left_idx"(#loc43))
+#loc124 = loc("left_idx"(#loc44))
+#loc125 = loc("input"(#loc45))
+#loc127 = loc("left_idx"(#loc47))
+#loc128 = loc("left_idx"(#loc48))
+#loc129 = loc("right_idx"(#loc49))
+#loc130 = loc("right_idx"(#loc50))
+#loc132 = loc("right_idx"(#loc52))
+#loc133 = loc("right_idx"(#loc53))
+#loc134 = loc("left_idx"(#loc54))
+#loc135 = loc("right_idx"(#loc55))
+#loc136 = loc("cond"(#loc56))
+#loc137 = loc("eq"(#loc57))
+#loc138 = loc("cond"(#loc58))
+#loc139 = loc("cond"(#loc59))
+#loc140 = loc("cond"(#loc60))
+#loc141 = loc("cond"(#loc61))
+#loc142 = loc("cond"(#loc62))
+#loc143 = loc("ret"(#loc63))
+#loc144 = loc("ret"(#loc64))
+#loc145 = loc("ret"(#loc65))
+#loc146 = loc("new_idxs"(#loc66))
+#loc147 = loc("new_idxs"(#loc67))
+#loc148 = loc("new_idxs"(#loc68))
+#loc149 = loc("tmp7"(#loc69))
+#loc151 = loc("tmp11"(#loc71))
+#loc152 = loc("tmp14"(#loc72))
+#loc153 = loc(callsite(#loc105 at #loc106))
+#loc154 = loc(callsite(#loc107 at #loc106))
+#loc155 = loc(callsite(#loc108 at #loc106))
+#loc156 = loc(callsite(#loc109 at #loc106))
+#loc158 = loc("cond"(#loc136))
+#loc159 = loc("eq"(#loc137))
+#loc160 = loc(callsite(#loc31 at #loc150))
+#loc162 = loc(callsite(#loc110 at #loc157))
+#loc163 = loc(callsite(#loc111 at #loc157))
+#loc164 = loc(callsite(#loc112 at #loc157))
+#loc166 = loc(callsite(#loc114 at #loc157))
+#loc167 = loc(callsite(#loc115 at #loc157))
+#loc168 = loc(callsite(#loc116 at #loc157))
+#loc170 = loc(callsite(#loc118 at #loc157))
+#loc171 = loc(callsite(#loc119 at #loc157))
+#loc172 = loc(callsite(#loc120 at #loc157))
+#loc173 = loc(callsite(#loc121 at #loc157))
+#loc174 = loc(callsite(#loc122 at #loc157))
+#loc175 = loc(callsite(#loc123 at #loc157))
+#loc176 = loc(callsite(#loc124 at #loc157))
+#loc178 = loc(callsite(#loc127 at #loc157))
+#loc179 = loc(callsite(#loc128 at #loc157))
+#loc180 = loc(callsite(#loc129 at #loc157))
+#loc181 = loc(callsite(#loc130 at #loc157))
+#loc183 = loc(callsite(#loc132 at #loc157))
+#loc184 = loc(callsite(#loc133 at #loc157))
+#loc185 = loc(callsite(#loc134 at #loc157))
+#loc186 = loc(callsite(#loc135 at #loc157))
+#loc187 = loc(callsite(#loc158 at #loc157))
+#loc188 = loc(callsite(#loc159 at #loc157))
+#loc189 = loc(callsite(#loc138 at #loc157))
+#loc190 = loc(callsite(#loc139 at #loc157))
+#loc191 = loc(callsite(#loc140 at #loc157))
+#loc192 = loc(callsite(#loc141 at #loc157))
+#loc193 = loc(callsite(#loc142 at #loc157))
+#loc194 = loc(callsite(#loc143 at #loc157))
+#loc195 = loc(callsite(#loc144 at #loc157))
+#loc196 = loc(callsite(#loc145 at #loc157))
+#loc197 = loc(callsite(#loc146 at #loc157))
+#loc198 = loc(callsite(#loc147 at #loc157))
+#loc199 = loc(callsite(#loc148 at #loc157))
+#loc200 = loc(callsite(#loc33 at #loc160))
+#loc201 = loc(callsite(#loc31 at #loc165))
+#loc203 = loc(callsite(#loc31 at #loc169))
+#loc205 = loc(callsite(#loc125 at #loc177))
+#loc206 = loc(callsite(#loc31 at #loc177))
+#loc208 = loc(callsite(#loc125 at #loc182))
+#loc209 = loc(callsite(#loc31 at #loc182))
+#loc211 = loc(callsite(#loc33 at #loc201))
+#loc212 = loc(callsite(#loc33 at #loc203))
+#loc213 = loc(callsite(#loc33 at #loc206))
+#loc214 = loc(callsite(#loc33 at #loc209))

SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/__grp__triton_red_fused_argmax_1.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_red_fused_argmax_1.source": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.source", "triton_red_fused_argmax_1.ttir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.ttir", "triton_red_fused_argmax_1.ttgir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.ttgir", "triton_red_fused_argmax_1.llir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.llir", "triton_red_fused_argmax_1.ptx": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.ptx", "triton_red_fused_argmax_1.cubin": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.cubin", "triton_red_fused_argmax_1.json": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.json"}}

SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.json

@@ -0,0 +1 @@
+{"hash": "0e4cc76a2ea35b5a309428a12917c533732d30887808410cf8726b5bed41ff40", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 16, "num_ctas": 1, "num_stages": 1, "warp_size": 32, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "ptx_options": null, "ir_override": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "launch_pdl": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dot_operand_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/workspace/specforge/lib/python3.11/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "instrumentation_mode": "", "triton_version": "3.5.1", "tensordesc_meta": [], "shared": 1024, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "profile_scratch_size": 0, "profile_scratch_align": 1, "name": "triton_red_fused_argmax_1"}

SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.llir

@@ -0,0 +1,1166 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+target datalayout = "e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-p7:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"
+
+@global_smem = external addrspace(3) global [0 x i8], align 16
+
+; Function Attrs: nounwind
+define ptx_kernel void @triton_red_fused_argmax_1(ptr addrspace(1) %0, ptr addrspace(1) %1, i64 %2, i64 %3, i32 %4, i32 %5, ptr addrspace(1) readnone captures(none) %6, ptr addrspace(1) readnone captures(none) %7) local_unnamed_addr #0 !dbg !4 {
+  %9 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !7
+  %10 = shl i32 %9, 6, !dbg !8
+  %11 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !9
+  %12 = and i32 %11, 448, !dbg !9
+  %13 = and i32 %11, 63, !dbg !9
+  %14 = lshr exact i32 %12, 6, !dbg !9
+  %15 = or disjoint i32 %14, 8, !dbg !9
+  %16 = or disjoint i32 %14, 16, !dbg !9
+  %17 = or disjoint i32 %14, 24, !dbg !9
+  %18 = insertelement <4 x i32> poison, i32 %14, i64 0, !dbg !9
+  %19 = shufflevector <4 x i32> %18, <4 x i32> poison, <4 x i32> zeroinitializer, !dbg !9
+  %20 = or disjoint <4 x i32> %19, <i32 56, i32 48, i32 40, i32 32>, !dbg !9
+  %21 = insertelement <8 x i32> poison, i32 %17, i64 4, !dbg !10
+  %22 = insertelement <8 x i32> %21, i32 %16, i64 5, !dbg !10
+  %23 = insertelement <8 x i32> %22, i32 %15, i64 6, !dbg !10
+  %24 = insertelement <8 x i32> %23, i32 %14, i64 7, !dbg !10
+  %25 = shufflevector <4 x i32> %20, <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !10
+  %26 = shufflevector <8 x i32> %25, <8 x i32> %24, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>, !dbg !10
+  %27 = insertelement <8 x i32> poison, i32 %10, i64 0, !dbg !10
+  %28 = shufflevector <8 x i32> %27, <8 x i32> poison, <8 x i32> zeroinitializer, !dbg !10
+  %29 = or disjoint <8 x i32> %26, %28, !dbg !10
+  %30 = insertelement <8 x i32> poison, i32 %4, i64 0, !dbg !11
+  %31 = shufflevector <8 x i32> %30, <8 x i32> poison, <8 x i32> zeroinitializer, !dbg !11
+  %32 = icmp slt <8 x i32> %29, %31, !dbg !11
+  %33 = extractelement <8 x i32> %29, i64 7, !dbg !12
+  %34 = sext i32 %33 to i64, !dbg !12
+  %35 = extractelement <8 x i32> %29, i64 6, !dbg !12
+  %36 = sext i32 %35 to i64, !dbg !12
+  %37 = extractelement <8 x i32> %29, i64 5, !dbg !12
+  %38 = sext i32 %37 to i64, !dbg !12
+  %39 = extractelement <8 x i32> %29, i64 4, !dbg !12
+  %40 = sext i32 %39 to i64, !dbg !12
+  %41 = extractelement <8 x i32> %29, i64 3, !dbg !12
+  %42 = sext i32 %41 to i64, !dbg !12
+  %43 = extractelement <8 x i32> %29, i64 2, !dbg !12
+  %44 = sext i32 %43 to i64, !dbg !12
+  %45 = extractelement <8 x i32> %29, i64 1, !dbg !12
+  %46 = sext i32 %45 to i64, !dbg !12
+  %47 = extractelement <8 x i32> %29, i64 0, !dbg !12
+  %48 = sext i32 %47 to i64, !dbg !12
+  %.frozen = freeze i64 %34, !dbg !13
+  %.frozen70 = freeze i64 %2, !dbg !13
+  %49 = sdiv i64 %.frozen, %.frozen70, !dbg !13
+  %50 = mul i64 %49, %.frozen70, !dbg !12
+  %.decomposed = sub i64 %.frozen, %50, !dbg !12
+  %.frozen71 = freeze i64 %36, !dbg !13
+  %.frozen72 = freeze i64 %2, !dbg !13
+  %51 = sdiv i64 %.frozen71, %.frozen72, !dbg !13
+  %52 = mul i64 %51, %.frozen72, !dbg !12
+  %.decomposed73 = sub i64 %.frozen71, %52, !dbg !12
+  %.frozen74 = freeze i64 %38, !dbg !13
+  %.frozen75 = freeze i64 %2, !dbg !13
+  %53 = sdiv i64 %.frozen74, %.frozen75, !dbg !13
+  %54 = mul i64 %53, %.frozen75, !dbg !12
+  %.decomposed76 = sub i64 %.frozen74, %54, !dbg !12
+  %.frozen77 = freeze i64 %40, !dbg !13
+  %.frozen78 = freeze i64 %2, !dbg !13
+  %55 = sdiv i64 %.frozen77, %.frozen78, !dbg !13
+  %56 = mul i64 %55, %.frozen78, !dbg !12
+  %.decomposed79 = sub i64 %.frozen77, %56, !dbg !12
+  %.frozen80 = freeze i64 %42, !dbg !13
+  %.frozen81 = freeze i64 %2, !dbg !13
+  %57 = sdiv i64 %.frozen80, %.frozen81, !dbg !13
+  %58 = mul i64 %57, %.frozen81, !dbg !12
+  %.decomposed82 = sub i64 %.frozen80, %58, !dbg !12
+  %.frozen83 = freeze i64 %44, !dbg !13
+  %.frozen84 = freeze i64 %2, !dbg !13
+  %59 = sdiv i64 %.frozen83, %.frozen84, !dbg !13
+  %60 = mul i64 %59, %.frozen84, !dbg !12
+  %.decomposed85 = sub i64 %.frozen83, %60, !dbg !12
+  %.frozen86 = freeze i64 %46, !dbg !13
+  %.frozen87 = freeze i64 %2, !dbg !13
+  %61 = sdiv i64 %.frozen86, %.frozen87, !dbg !13
+  %62 = mul i64 %61, %.frozen87, !dbg !12
+  %.decomposed88 = sub i64 %.frozen86, %62, !dbg !12
+  %.frozen89 = freeze i64 %48, !dbg !13
+  %.frozen90 = freeze i64 %2, !dbg !13
+  %63 = sdiv i64 %.frozen89, %.frozen90, !dbg !13
+  %64 = mul i64 %63, %.frozen90, !dbg !12
+  %.decomposed91 = sub i64 %.frozen89, %64, !dbg !12
+  %65 = mul i64 %49, %3, !dbg !14
+  %66 = mul i64 %51, %3, !dbg !14
+  %67 = mul i64 %53, %3, !dbg !14
+  %68 = mul i64 %55, %3, !dbg !14
+  %69 = mul i64 %57, %3, !dbg !14
+  %70 = mul i64 %59, %3, !dbg !14
+  %71 = mul i64 %61, %3, !dbg !14
+  %72 = mul i64 %63, %3, !dbg !14
+  %.idx = mul nsw i64 %.decomposed, 128000
+  %73 = getelementptr i8, ptr addrspace(1) %0, i64 %.idx
+  %invariant.gep = getelementptr float, ptr addrspace(1) %73, i64 %65, !dbg !15
+  %.idx1 = mul nsw i64 %.decomposed73, 128000
+  %74 = getelementptr i8, ptr addrspace(1) %0, i64 %.idx1
+  %invariant.gep9 = getelementptr float, ptr addrspace(1) %74, i64 %66, !dbg !15
+  %.idx2 = mul nsw i64 %.decomposed76, 128000
+  %75 = getelementptr i8, ptr addrspace(1) %0, i64 %.idx2
+  %invariant.gep11 = getelementptr float, ptr addrspace(1) %75, i64 %67, !dbg !15
+  %.idx3 = mul nsw i64 %.decomposed79, 128000
+  %76 = getelementptr i8, ptr addrspace(1) %0, i64 %.idx3
+  %invariant.gep13 = getelementptr float, ptr addrspace(1) %76, i64 %68, !dbg !15
+  %.idx4 = mul nsw i64 %.decomposed82, 128000
+  %77 = getelementptr i8, ptr addrspace(1) %0, i64 %.idx4
+  %invariant.gep15 = getelementptr float, ptr addrspace(1) %77, i64 %69, !dbg !15
+  %.idx5 = mul nsw i64 %.decomposed85, 128000
+  %78 = getelementptr i8, ptr addrspace(1) %0, i64 %.idx5
+  %invariant.gep17 = getelementptr float, ptr addrspace(1) %78, i64 %70, !dbg !15
+  %.idx6 = mul nsw i64 %.decomposed88, 128000
+  %79 = getelementptr i8, ptr addrspace(1) %0, i64 %.idx6
+  %invariant.gep19 = getelementptr float, ptr addrspace(1) %79, i64 %71, !dbg !15
+  %.idx7 = mul nsw i64 %.decomposed91, 128000
+  %80 = getelementptr i8, ptr addrspace(1) %0, i64 %.idx7
+  %invariant.gep21 = getelementptr float, ptr addrspace(1) %80, i64 %72, !dbg !15
+  %81 = zext nneg i32 %13 to i64, !dbg !15
+  %82 = extractelement <8 x i1> %32, i64 0, !dbg !16
+  %83 = extractelement <8 x i1> %32, i64 1, !dbg !16
+  %84 = extractelement <8 x i1> %32, i64 2, !dbg !16
+  %85 = extractelement <8 x i1> %32, i64 3, !dbg !16
+  %86 = extractelement <8 x i1> %32, i64 4, !dbg !16
+  %87 = extractelement <8 x i1> %32, i64 5, !dbg !16
+  %88 = extractelement <8 x i1> %32, i64 6, !dbg !16
+  %89 = extractelement <8 x i1> %32, i64 7, !dbg !16
+  br label %90, !dbg !15
+
+90:                                               ; preds = %8, %90
+  %indvars.iv = phi i64 [ 0, %8 ], [ %indvars.iv.next, %90 ]
+  %91 = phi <8 x float> [ splat (float 0xFFF0000000000000), %8 ], [ %139, %90 ]
+  %92 = phi <8 x i32> [ splat (i32 2147483647), %8 ], [ %140, %90 ]
+  %93 = or disjoint i64 %indvars.iv, %81, !dbg !17
+  %gep = getelementptr float, ptr addrspace(1) %invariant.gep, i64 %93, !dbg !18
+  %gep10 = getelementptr float, ptr addrspace(1) %invariant.gep9, i64 %93, !dbg !18
+  %gep12 = getelementptr float, ptr addrspace(1) %invariant.gep11, i64 %93, !dbg !18
+  %gep14 = getelementptr float, ptr addrspace(1) %invariant.gep13, i64 %93, !dbg !18
+  %gep16 = getelementptr float, ptr addrspace(1) %invariant.gep15, i64 %93, !dbg !18
+  %gep18 = getelementptr float, ptr addrspace(1) %invariant.gep17, i64 %93, !dbg !18
+  %gep20 = getelementptr float, ptr addrspace(1) %invariant.gep19, i64 %93, !dbg !18
+  %gep22 = getelementptr float, ptr addrspace(1) %invariant.gep21, i64 %93, !dbg !18
+  %94 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #4, !dbg !16
+  %95 = tail call i32 asm sideeffect "mov.u32 $0, $1;\0A\09@$4 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $2 + 0 ], $3;", "=r,r,l,l,b"(i32 0, ptr addrspace(1) %gep, i64 %94, i1 %89) #4, !dbg !16
+  %96 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #4, !dbg !16
+  %97 = tail call i32 asm sideeffect "mov.u32 $0, $1;\0A\09@$4 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $2 + 0 ], $3;", "=r,r,l,l,b"(i32 0, ptr addrspace(1) %gep10, i64 %96, i1 %88) #4, !dbg !16
+  %98 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #4, !dbg !16
+  %99 = tail call i32 asm sideeffect "mov.u32 $0, $1;\0A\09@$4 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $2 + 0 ], $3;", "=r,r,l,l,b"(i32 0, ptr addrspace(1) %gep12, i64 %98, i1 %87) #4, !dbg !16
+  %100 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #4, !dbg !16
+  %101 = tail call i32 asm sideeffect "mov.u32 $0, $1;\0A\09@$4 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $2 + 0 ], $3;", "=r,r,l,l,b"(i32 0, ptr addrspace(1) %gep14, i64 %100, i1 %86) #4, !dbg !16
+  %102 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #4, !dbg !16
+  %103 = tail call i32 asm sideeffect "mov.u32 $0, $1;\0A\09@$4 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $2 + 0 ], $3;", "=r,r,l,l,b"(i32 0, ptr addrspace(1) %gep16, i64 %102, i1 %85) #4, !dbg !16
+  %104 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #4, !dbg !16
+  %105 = tail call i32 asm sideeffect "mov.u32 $0, $1;\0A\09@$4 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $2 + 0 ], $3;", "=r,r,l,l,b"(i32 0, ptr addrspace(1) %gep18, i64 %104, i1 %84) #4, !dbg !16
+  %106 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #4, !dbg !16
+  %107 = tail call i32 asm sideeffect "mov.u32 $0, $1;\0A\09@$4 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $2 + 0 ], $3;", "=r,r,l,l,b"(i32 0, ptr addrspace(1) %gep20, i64 %106, i1 %83) #4, !dbg !16
+  %108 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_first.b64 $0, 1.0;", "=l"() #4, !dbg !16
+  %109 = tail call i32 asm sideeffect "mov.u32 $0, $1;\0A\09@$4 ld.global.L1::evict_first.L2::cache_hint.b32 { $0 }, [ $2 + 0 ], $3;", "=r,r,l,l,b"(i32 0, ptr addrspace(1) %gep22, i64 %108, i1 %82) #4, !dbg !16
+  %110 = fcmp uno <8 x float> %91, zeroinitializer, !dbg !19
+  %111 = trunc nuw nsw i64 %93 to i32, !dbg !23
+  %112 = insertelement <8 x i32> poison, i32 %109, i64 0, !dbg !16
+  %113 = insertelement <8 x i32> %112, i32 %107, i64 1, !dbg !16
+  %114 = insertelement <8 x i32> %113, i32 %105, i64 2, !dbg !16
+  %115 = insertelement <8 x i32> %114, i32 %103, i64 3, !dbg !16
+  %116 = insertelement <8 x i32> %115, i32 %101, i64 4, !dbg !16
+  %117 = insertelement <8 x i32> %116, i32 %99, i64 5, !dbg !16
+  %118 = insertelement <8 x i32> %117, i32 %97, i64 6, !dbg !16
+  %119 = insertelement <8 x i32> %118, i32 %95, i64 7, !dbg !16
+  %120 = bitcast <8 x i32> %119 to <8 x float>, !dbg !16
+  %121 = fcmp ogt <8 x float> %91, %120, !dbg !24
+  %122 = fcmp oeq <8 x float> %91, %120, !dbg !25
+  %123 = fcmp uno <8 x float> %120, zeroinitializer, !dbg !26
+  %124 = xor <8 x i1> %123, splat (i1 true), !dbg !27
+  %125 = and <8 x i1> %110, %124, !dbg !28
+  %126 = or <8 x i1> %121, %125, !dbg !29
+  %127 = and <8 x i1> %110, %123, !dbg !30
+  %128 = or <8 x i1> %122, %127, !dbg !31
+  %129 = insertelement <8 x i64> poison, i64 %93, i64 0, !dbg !32
+  %130 = shufflevector <8 x i64> %129, <8 x i64> poison, <8 x i32> zeroinitializer, !dbg !32
+  %131 = sext <8 x i32> %92 to <8 x i64>, !dbg !32
+  %132 = icmp sgt <8 x i64> %130, %131, !dbg !32
+  %133 = and <8 x i1> %132, %128, !dbg !33
+  %134 = or <8 x i1> %126, %133, !dbg !34
+  %135 = select <8 x i1> %134, <8 x float> %91, <8 x float> %120, !dbg !35
+  %136 = insertelement <8 x i32> poison, i32 %111, i64 0, !dbg !23
+  %137 = shufflevector <8 x i32> %136, <8 x i32> poison, <8 x i32> zeroinitializer, !dbg !23
+  %138 = select <8 x i1> %134, <8 x i32> %92, <8 x i32> %137, !dbg !23
+  %139 = select <8 x i1> %32, <8 x float> %135, <8 x float> %91, !dbg !36
+  %140 = select <8 x i1> %32, <8 x i32> %138, <8 x i32> %92, !dbg !37
+  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 64, !dbg !15
+  %141 = icmp samesign ult i64 %indvars.iv, 31936, !dbg !15
+  br i1 %141, label %90, label %142, !dbg !15
+
+142:                                              ; preds = %90
+  %143 = or disjoint i32 %10, %13, !dbg !10
+  %144 = icmp slt i32 %143, %4, !dbg !11
+  %145 = and i32 %11, 31, !dbg !9
+  %146 = lshr i32 %11, 5, !dbg !9
+  %147 = extractelement <8 x float> %139, i64 7, !dbg !38
+  %148 = bitcast float %147 to i32, !dbg !38
+  %149 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %148, i32 16, i32 31), !dbg !38
+  %150 = bitcast i32 %149 to float, !dbg !38
+  %151 = extractelement <8 x i32> %140, i64 7, !dbg !38
+  %152 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %151, i32 16, i32 31), !dbg !38
+  %153 = fcmp ogt float %147, %150, !dbg !40
+  %154 = fcmp oeq float %147, %150, !dbg !41
+  %155 = fcmp uno <8 x float> %139, zeroinitializer, !dbg !42
+  %156 = fcmp uno float %150, 0.000000e+00, !dbg !43
+  %157 = xor i1 %156, true, !dbg !44
+  %158 = extractelement <8 x i1> %155, i64 7, !dbg !45
+  %159 = and i1 %158, %157, !dbg !46
+  %160 = or i1 %153, %159, !dbg !47
+  %161 = and i1 %158, %156, !dbg !45
+  %162 = or i1 %154, %161, !dbg !48
+  %163 = icmp slt i32 %151, %152, !dbg !49
+  %164 = and i1 %163, %162, !dbg !50
+  %165 = or i1 %160, %164, !dbg !51
+  %166 = select i1 %165, float %147, float %150, !dbg !52
+  %167 = select i1 %165, i32 %151, i32 %152, !dbg !53
+  %168 = bitcast float %166 to i32, !dbg !38
+  %169 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %168, i32 8, i32 31), !dbg !38
+  %170 = bitcast i32 %169 to float, !dbg !38
+  %171 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %167, i32 8, i32 31), !dbg !38
+  %172 = fcmp ogt float %166, %170, !dbg !40
+  %173 = fcmp oeq float %166, %170, !dbg !41
+  %174 = fcmp uno float %166, 0.000000e+00, !dbg !42
+  %175 = fcmp uno float %170, 0.000000e+00, !dbg !43
+  %176 = xor i1 %175, true, !dbg !44
+  %177 = and i1 %174, %176, !dbg !46
+  %178 = or i1 %172, %177, !dbg !47
+  %179 = and i1 %175, %174, !dbg !45
+  %180 = or i1 %173, %179, !dbg !48
+  %181 = icmp slt i32 %167, %171, !dbg !49
+  %182 = and i1 %181, %180, !dbg !50
+  %183 = or i1 %178, %182, !dbg !51
+  %184 = select i1 %183, float %166, float %170, !dbg !52
+  %185 = select i1 %183, i32 %167, i32 %171, !dbg !53
+  %186 = bitcast float %184 to i32, !dbg !38
+  %187 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %186, i32 4, i32 31), !dbg !38
+  %188 = bitcast i32 %187 to float, !dbg !38
+  %189 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %185, i32 4, i32 31), !dbg !38
+  %190 = fcmp ogt float %184, %188, !dbg !40
+  %191 = fcmp oeq float %184, %188, !dbg !41
+  %192 = fcmp uno float %184, 0.000000e+00, !dbg !42
+  %193 = fcmp uno float %188, 0.000000e+00, !dbg !43
+  %194 = xor i1 %193, true, !dbg !44
+  %195 = and i1 %192, %194, !dbg !46
+  %196 = or i1 %190, %195, !dbg !47
+  %197 = and i1 %193, %192, !dbg !45
+  %198 = or i1 %191, %197, !dbg !48
+  %199 = icmp slt i32 %185, %189, !dbg !49
+  %200 = and i1 %199, %198, !dbg !50
+  %201 = or i1 %196, %200, !dbg !51
+  %202 = select i1 %201, float %184, float %188, !dbg !52
+  %203 = select i1 %201, i32 %185, i32 %189, !dbg !53
+  %204 = bitcast float %202 to i32, !dbg !38
+  %205 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %204, i32 2, i32 31), !dbg !38
+  %206 = bitcast i32 %205 to float, !dbg !38
+  %207 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %203, i32 2, i32 31), !dbg !38
+  %208 = fcmp ogt float %202, %206, !dbg !40
+  %209 = fcmp oeq float %202, %206, !dbg !41
+  %210 = fcmp uno float %202, 0.000000e+00, !dbg !42
+  %211 = fcmp uno float %206, 0.000000e+00, !dbg !43
+  %212 = xor i1 %211, true, !dbg !44
+  %213 = and i1 %210, %212, !dbg !46
+  %214 = or i1 %208, %213, !dbg !47
+  %215 = and i1 %211, %210, !dbg !45
+  %216 = or i1 %209, %215, !dbg !48
+  %217 = icmp slt i32 %203, %207, !dbg !49
+  %218 = and i1 %217, %216, !dbg !50
+  %219 = or i1 %214, %218, !dbg !51
+  %220 = select i1 %219, float %202, float %206, !dbg !52
+  %221 = select i1 %219, i32 %203, i32 %207, !dbg !53
+  %222 = bitcast float %220 to i32, !dbg !38
+  %223 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %222, i32 1, i32 31), !dbg !38
+  %224 = bitcast i32 %223 to float, !dbg !38
+  %225 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %221, i32 1, i32 31), !dbg !38
+  %226 = fcmp ogt float %220, %224, !dbg !40
+  %227 = fcmp oeq float %220, %224, !dbg !41
+  %228 = fcmp uno float %220, 0.000000e+00, !dbg !42
+  %229 = fcmp uno float %224, 0.000000e+00, !dbg !43
+  %230 = xor i1 %229, true, !dbg !44
+  %231 = and i1 %228, %230, !dbg !46
+  %232 = or i1 %226, %231, !dbg !47
+  %233 = and i1 %229, %228, !dbg !45
+  %234 = or i1 %227, %233, !dbg !48
+  %235 = icmp slt i32 %221, %225, !dbg !49
+  %236 = and i1 %235, %234, !dbg !50
+  %237 = or i1 %232, %236, !dbg !51
+  %238 = select i1 %237, i32 %221, i32 %225, !dbg !53
+  %239 = extractelement <8 x float> %139, i64 6, !dbg !38
+  %240 = bitcast float %239 to i32, !dbg !38
+  %241 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %240, i32 16, i32 31), !dbg !38
+  %242 = bitcast i32 %241 to float, !dbg !38
+  %243 = extractelement <8 x i32> %140, i64 6, !dbg !38
+  %244 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %243, i32 16, i32 31), !dbg !38
+  %245 = fcmp ogt float %239, %242, !dbg !40
+  %246 = fcmp oeq float %239, %242, !dbg !41
+  %247 = fcmp uno float %242, 0.000000e+00, !dbg !43
+  %248 = xor i1 %247, true, !dbg !44
+  %249 = extractelement <8 x i1> %155, i64 6, !dbg !45
+  %250 = and i1 %249, %248, !dbg !46
+  %251 = or i1 %245, %250, !dbg !47
+  %252 = and i1 %249, %247, !dbg !45
+  %253 = or i1 %246, %252, !dbg !48
+  %254 = icmp slt i32 %243, %244, !dbg !49
+  %255 = and i1 %254, %253, !dbg !50
+  %256 = or i1 %251, %255, !dbg !51
+  %257 = select i1 %256, float %239, float %242, !dbg !52
+  %258 = select i1 %256, i32 %243, i32 %244, !dbg !53
+  %259 = bitcast float %257 to i32, !dbg !38
+  %260 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %259, i32 8, i32 31), !dbg !38
+  %261 = bitcast i32 %260 to float, !dbg !38
+  %262 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %258, i32 8, i32 31), !dbg !38
+  %263 = fcmp ogt float %257, %261, !dbg !40
+  %264 = fcmp oeq float %257, %261, !dbg !41
+  %265 = fcmp uno float %257, 0.000000e+00, !dbg !42
+  %266 = fcmp uno float %261, 0.000000e+00, !dbg !43
+  %267 = xor i1 %266, true, !dbg !44
+  %268 = and i1 %265, %267, !dbg !46
+  %269 = or i1 %263, %268, !dbg !47
+  %270 = and i1 %266, %265, !dbg !45
+  %271 = or i1 %264, %270, !dbg !48
+  %272 = icmp slt i32 %258, %262, !dbg !49
+  %273 = and i1 %272, %271, !dbg !50
+  %274 = or i1 %269, %273, !dbg !51
+  %275 = select i1 %274, float %257, float %261, !dbg !52
+  %276 = select i1 %274, i32 %258, i32 %262, !dbg !53
+  %277 = bitcast float %275 to i32, !dbg !38
+  %278 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %277, i32 4, i32 31), !dbg !38
+  %279 = bitcast i32 %278 to float, !dbg !38
+  %280 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %276, i32 4, i32 31), !dbg !38
+  %281 = fcmp ogt float %275, %279, !dbg !40
+  %282 = fcmp oeq float %275, %279, !dbg !41
+  %283 = fcmp uno float %275, 0.000000e+00, !dbg !42
+  %284 = fcmp uno float %279, 0.000000e+00, !dbg !43
+  %285 = xor i1 %284, true, !dbg !44
+  %286 = and i1 %283, %285, !dbg !46
+  %287 = or i1 %281, %286, !dbg !47
+  %288 = and i1 %284, %283, !dbg !45
+  %289 = or i1 %282, %288, !dbg !48
+  %290 = icmp slt i32 %276, %280, !dbg !49
+  %291 = and i1 %290, %289, !dbg !50
+  %292 = or i1 %287, %291, !dbg !51
+  %293 = select i1 %292, float %275, float %279, !dbg !52
+  %294 = select i1 %292, i32 %276, i32 %280, !dbg !53
+  %295 = bitcast float %293 to i32, !dbg !38
+  %296 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %295, i32 2, i32 31), !dbg !38
+  %297 = bitcast i32 %296 to float, !dbg !38
+  %298 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %294, i32 2, i32 31), !dbg !38
+  %299 = fcmp ogt float %293, %297, !dbg !40
+  %300 = fcmp oeq float %293, %297, !dbg !41
+  %301 = fcmp uno float %293, 0.000000e+00, !dbg !42
+  %302 = fcmp uno float %297, 0.000000e+00, !dbg !43
+  %303 = xor i1 %302, true, !dbg !44
+  %304 = and i1 %301, %303, !dbg !46
+  %305 = or i1 %299, %304, !dbg !47
+  %306 = and i1 %302, %301, !dbg !45
+  %307 = or i1 %300, %306, !dbg !48
+  %308 = icmp slt i32 %294, %298, !dbg !49
+  %309 = and i1 %308, %307, !dbg !50
+  %310 = or i1 %305, %309, !dbg !51
+  %311 = select i1 %310, float %293, float %297, !dbg !52
+  %312 = select i1 %310, i32 %294, i32 %298, !dbg !53
+  %313 = bitcast float %311 to i32, !dbg !38
+  %314 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %313, i32 1, i32 31), !dbg !38
+  %315 = bitcast i32 %314 to float, !dbg !38
+  %316 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %312, i32 1, i32 31), !dbg !38
+  %317 = fcmp ogt float %311, %315, !dbg !40
+  %318 = fcmp oeq float %311, %315, !dbg !41
+  %319 = fcmp uno float %311, 0.000000e+00, !dbg !42
+  %320 = fcmp uno float %315, 0.000000e+00, !dbg !43
+  %321 = xor i1 %320, true, !dbg !44
+  %322 = and i1 %319, %321, !dbg !46
+  %323 = or i1 %317, %322, !dbg !47
+  %324 = and i1 %320, %319, !dbg !45
+  %325 = or i1 %318, %324, !dbg !48
+  %326 = icmp slt i32 %312, %316, !dbg !49
+  %327 = and i1 %326, %325, !dbg !50
+  %328 = or i1 %323, %327, !dbg !51
+  %329 = select i1 %328, i32 %312, i32 %316, !dbg !53
+  %330 = extractelement <8 x float> %139, i64 5, !dbg !38
+  %331 = bitcast float %330 to i32, !dbg !38
+  %332 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %331, i32 16, i32 31), !dbg !38
+  %333 = bitcast i32 %332 to float, !dbg !38
+  %334 = extractelement <8 x i32> %140, i64 5, !dbg !38
+  %335 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %334, i32 16, i32 31), !dbg !38
+  %336 = fcmp ogt float %330, %333, !dbg !40
+  %337 = fcmp oeq float %330, %333, !dbg !41
+  %338 = fcmp uno float %333, 0.000000e+00, !dbg !43
+  %339 = xor i1 %338, true, !dbg !44
+  %340 = extractelement <8 x i1> %155, i64 5, !dbg !45
+  %341 = and i1 %340, %339, !dbg !46
+  %342 = or i1 %336, %341, !dbg !47
+  %343 = and i1 %340, %338, !dbg !45
+  %344 = or i1 %337, %343, !dbg !48
+  %345 = icmp slt i32 %334, %335, !dbg !49
+  %346 = and i1 %345, %344, !dbg !50
+  %347 = or i1 %342, %346, !dbg !51
+  %348 = select i1 %347, float %330, float %333, !dbg !52
+  %349 = select i1 %347, i32 %334, i32 %335, !dbg !53
+  %350 = bitcast float %348 to i32, !dbg !38
+  %351 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %350, i32 8, i32 31), !dbg !38
+  %352 = bitcast i32 %351 to float, !dbg !38
+  %353 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %349, i32 8, i32 31), !dbg !38
+  %354 = fcmp ogt float %348, %352, !dbg !40
+  %355 = fcmp oeq float %348, %352, !dbg !41
+  %356 = fcmp uno float %348, 0.000000e+00, !dbg !42
+  %357 = fcmp uno float %352, 0.000000e+00, !dbg !43
+  %358 = xor i1 %357, true, !dbg !44
+  %359 = and i1 %356, %358, !dbg !46
+  %360 = or i1 %354, %359, !dbg !47
+  %361 = and i1 %357, %356, !dbg !45
+  %362 = or i1 %355, %361, !dbg !48
+  %363 = icmp slt i32 %349, %353, !dbg !49
+  %364 = and i1 %363, %362, !dbg !50
+  %365 = or i1 %360, %364, !dbg !51
+  %366 = select i1 %365, float %348, float %352, !dbg !52
+  %367 = select i1 %365, i32 %349, i32 %353, !dbg !53
+  %368 = bitcast float %366 to i32, !dbg !38
+  %369 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %368, i32 4, i32 31), !dbg !38
+  %370 = bitcast i32 %369 to float, !dbg !38
+  %371 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %367, i32 4, i32 31), !dbg !38
+  %372 = fcmp ogt float %366, %370, !dbg !40
+  %373 = fcmp oeq float %366, %370, !dbg !41
+  %374 = fcmp uno float %366, 0.000000e+00, !dbg !42
+  %375 = fcmp uno float %370, 0.000000e+00, !dbg !43
+  %376 = xor i1 %375, true, !dbg !44
+  %377 = and i1 %374, %376, !dbg !46
+  %378 = or i1 %372, %377, !dbg !47
+  %379 = and i1 %375, %374, !dbg !45
+  %380 = or i1 %373, %379, !dbg !48
+  %381 = icmp slt i32 %367, %371, !dbg !49
+  %382 = and i1 %381, %380, !dbg !50
+  %383 = or i1 %378, %382, !dbg !51
+  %384 = select i1 %383, float %366, float %370, !dbg !52
+  %385 = select i1 %383, i32 %367, i32 %371, !dbg !53
+  %386 = bitcast float %384 to i32, !dbg !38
+  %387 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %386, i32 2, i32 31), !dbg !38
+  %388 = bitcast i32 %387 to float, !dbg !38
+  %389 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %385, i32 2, i32 31), !dbg !38
+  %390 = fcmp ogt float %384, %388, !dbg !40
+  %391 = fcmp oeq float %384, %388, !dbg !41
+  %392 = fcmp uno float %384, 0.000000e+00, !dbg !42
+  %393 = fcmp uno float %388, 0.000000e+00, !dbg !43
+  %394 = xor i1 %393, true, !dbg !44
+  %395 = and i1 %392, %394, !dbg !46
+  %396 = or i1 %390, %395, !dbg !47
+  %397 = and i1 %393, %392, !dbg !45
+  %398 = or i1 %391, %397, !dbg !48
+  %399 = icmp slt i32 %385, %389, !dbg !49
+  %400 = and i1 %399, %398, !dbg !50
+  %401 = or i1 %396, %400, !dbg !51
+  %402 = select i1 %401, float %384, float %388, !dbg !52
+  %403 = select i1 %401, i32 %385, i32 %389, !dbg !53
+  %404 = bitcast float %402 to i32, !dbg !38
+  %405 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %404, i32 1, i32 31), !dbg !38
+  %406 = bitcast i32 %405 to float, !dbg !38
+  %407 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %403, i32 1, i32 31), !dbg !38
+  %408 = fcmp ogt float %402, %406, !dbg !40
+  %409 = fcmp oeq float %402, %406, !dbg !41
+  %410 = fcmp uno float %402, 0.000000e+00, !dbg !42
+  %411 = fcmp uno float %406, 0.000000e+00, !dbg !43
+  %412 = xor i1 %411, true, !dbg !44
+  %413 = and i1 %410, %412, !dbg !46
+  %414 = or i1 %408, %413, !dbg !47
+  %415 = and i1 %411, %410, !dbg !45
+  %416 = or i1 %409, %415, !dbg !48
+  %417 = icmp slt i32 %403, %407, !dbg !49
+  %418 = and i1 %417, %416, !dbg !50
+  %419 = or i1 %414, %418, !dbg !51
+  %420 = select i1 %419, i32 %403, i32 %407, !dbg !53
+  %421 = extractelement <8 x float> %139, i64 4, !dbg !38
+  %422 = bitcast float %421 to i32, !dbg !38
+  %423 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %422, i32 16, i32 31), !dbg !38
+  %424 = bitcast i32 %423 to float, !dbg !38
+  %425 = extractelement <8 x i32> %140, i64 4, !dbg !38
+  %426 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %425, i32 16, i32 31), !dbg !38
+  %427 = fcmp ogt float %421, %424, !dbg !40
+  %428 = fcmp oeq float %421, %424, !dbg !41
+  %429 = fcmp uno float %424, 0.000000e+00, !dbg !43
+  %430 = xor i1 %429, true, !dbg !44
+  %431 = extractelement <8 x i1> %155, i64 4, !dbg !45
+  %432 = and i1 %431, %430, !dbg !46
+  %433 = or i1 %427, %432, !dbg !47
+  %434 = and i1 %431, %429, !dbg !45
+  %435 = or i1 %428, %434, !dbg !48
+  %436 = icmp slt i32 %425, %426, !dbg !49
+  %437 = and i1 %436, %435, !dbg !50
+  %438 = or i1 %433, %437, !dbg !51
+  %439 = select i1 %438, float %421, float %424, !dbg !52
+  %440 = select i1 %438, i32 %425, i32 %426, !dbg !53
+  %441 = bitcast float %439 to i32, !dbg !38
+  %442 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %441, i32 8, i32 31), !dbg !38
+  %443 = bitcast i32 %442 to float, !dbg !38
+  %444 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %440, i32 8, i32 31), !dbg !38
+  %445 = fcmp ogt float %439, %443, !dbg !40
+  %446 = fcmp oeq float %439, %443, !dbg !41
+  %447 = fcmp uno float %439, 0.000000e+00, !dbg !42
+  %448 = fcmp uno float %443, 0.000000e+00, !dbg !43
+  %449 = xor i1 %448, true, !dbg !44
+  %450 = and i1 %447, %449, !dbg !46
+  %451 = or i1 %445, %450, !dbg !47
+  %452 = and i1 %448, %447, !dbg !45
+  %453 = or i1 %446, %452, !dbg !48
+  %454 = icmp slt i32 %440, %444, !dbg !49
+  %455 = and i1 %454, %453, !dbg !50
+  %456 = or i1 %451, %455, !dbg !51
+  %457 = select i1 %456, float %439, float %443, !dbg !52
+  %458 = select i1 %456, i32 %440, i32 %444, !dbg !53
+  %459 = bitcast float %457 to i32, !dbg !38
+  %460 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %459, i32 4, i32 31), !dbg !38
+  %461 = bitcast i32 %460 to float, !dbg !38
+  %462 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %458, i32 4, i32 31), !dbg !38
+  %463 = fcmp ogt float %457, %461, !dbg !40
+  %464 = fcmp oeq float %457, %461, !dbg !41
+  %465 = fcmp uno float %457, 0.000000e+00, !dbg !42
+  %466 = fcmp uno float %461, 0.000000e+00, !dbg !43
+  %467 = xor i1 %466, true, !dbg !44
+  %468 = and i1 %465, %467, !dbg !46
+  %469 = or i1 %463, %468, !dbg !47
+  %470 = and i1 %466, %465, !dbg !45
+  %471 = or i1 %464, %470, !dbg !48
+  %472 = icmp slt i32 %458, %462, !dbg !49
+  %473 = and i1 %472, %471, !dbg !50
+  %474 = or i1 %469, %473, !dbg !51
+  %475 = select i1 %474, float %457, float %461, !dbg !52
+  %476 = select i1 %474, i32 %458, i32 %462, !dbg !53
+  %477 = bitcast float %475 to i32, !dbg !38
+  %478 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %477, i32 2, i32 31), !dbg !38
+  %479 = bitcast i32 %478 to float, !dbg !38
+  %480 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %476, i32 2, i32 31), !dbg !38
+  %481 = fcmp ogt float %475, %479, !dbg !40
+  %482 = fcmp oeq float %475, %479, !dbg !41
+  %483 = fcmp uno float %475, 0.000000e+00, !dbg !42
+  %484 = fcmp uno float %479, 0.000000e+00, !dbg !43
+  %485 = xor i1 %484, true, !dbg !44
+  %486 = and i1 %483, %485, !dbg !46
+  %487 = or i1 %481, %486, !dbg !47
+  %488 = and i1 %484, %483, !dbg !45
+  %489 = or i1 %482, %488, !dbg !48
+  %490 = icmp slt i32 %476, %480, !dbg !49
+  %491 = and i1 %490, %489, !dbg !50
+  %492 = or i1 %487, %491, !dbg !51
+  %493 = select i1 %492, float %475, float %479, !dbg !52
+  %494 = select i1 %492, i32 %476, i32 %480, !dbg !53
+  %495 = bitcast float %493 to i32, !dbg !38
+  %496 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %495, i32 1, i32 31), !dbg !38
+  %497 = bitcast i32 %496 to float, !dbg !38
+  %498 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %494, i32 1, i32 31), !dbg !38
+  %499 = fcmp ogt float %493, %497, !dbg !40
+  %500 = fcmp oeq float %493, %497, !dbg !41
+  %501 = fcmp uno float %493, 0.000000e+00, !dbg !42
+  %502 = fcmp uno float %497, 0.000000e+00, !dbg !43
+  %503 = xor i1 %502, true, !dbg !44
+  %504 = and i1 %501, %503, !dbg !46
+  %505 = or i1 %499, %504, !dbg !47
+  %506 = and i1 %502, %501, !dbg !45
+  %507 = or i1 %500, %506, !dbg !48
+  %508 = icmp slt i32 %494, %498, !dbg !49
+  %509 = and i1 %508, %507, !dbg !50
+  %510 = or i1 %505, %509, !dbg !51
+  %511 = select i1 %510, i32 %494, i32 %498, !dbg !53
+  %512 = extractelement <8 x float> %139, i64 3, !dbg !38
+  %513 = bitcast float %512 to i32, !dbg !38
+  %514 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %513, i32 16, i32 31), !dbg !38
+  %515 = bitcast i32 %514 to float, !dbg !38
+  %516 = extractelement <8 x i32> %140, i64 3, !dbg !38
+  %517 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %516, i32 16, i32 31), !dbg !38
+  %518 = fcmp ogt float %512, %515, !dbg !40
+  %519 = fcmp oeq float %512, %515, !dbg !41
+  %520 = fcmp uno float %515, 0.000000e+00, !dbg !43
+  %521 = xor i1 %520, true, !dbg !44
+  %522 = extractelement <8 x i1> %155, i64 3, !dbg !45
+  %523 = and i1 %522, %521, !dbg !46
+  %524 = or i1 %518, %523, !dbg !47
+  %525 = and i1 %522, %520, !dbg !45
+  %526 = or i1 %519, %525, !dbg !48
+  %527 = icmp slt i32 %516, %517, !dbg !49
+  %528 = and i1 %527, %526, !dbg !50
+  %529 = or i1 %524, %528, !dbg !51
+  %530 = select i1 %529, float %512, float %515, !dbg !52
+  %531 = select i1 %529, i32 %516, i32 %517, !dbg !53
+  %532 = bitcast float %530 to i32, !dbg !38
+  %533 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %532, i32 8, i32 31), !dbg !38
+  %534 = bitcast i32 %533 to float, !dbg !38
+  %535 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %531, i32 8, i32 31), !dbg !38
+  %536 = fcmp ogt float %530, %534, !dbg !40
+  %537 = fcmp oeq float %530, %534, !dbg !41
+  %538 = fcmp uno float %530, 0.000000e+00, !dbg !42
+  %539 = fcmp uno float %534, 0.000000e+00, !dbg !43
+  %540 = xor i1 %539, true, !dbg !44
+  %541 = and i1 %538, %540, !dbg !46
+  %542 = or i1 %536, %541, !dbg !47
+  %543 = and i1 %539, %538, !dbg !45
+  %544 = or i1 %537, %543, !dbg !48
+  %545 = icmp slt i32 %531, %535, !dbg !49
+  %546 = and i1 %545, %544, !dbg !50
+  %547 = or i1 %542, %546, !dbg !51
+  %548 = select i1 %547, float %530, float %534, !dbg !52
+  %549 = select i1 %547, i32 %531, i32 %535, !dbg !53
+  %550 = bitcast float %548 to i32, !dbg !38
+  %551 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %550, i32 4, i32 31), !dbg !38
+  %552 = bitcast i32 %551 to float, !dbg !38
+  %553 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %549, i32 4, i32 31), !dbg !38
+  %554 = fcmp ogt float %548, %552, !dbg !40
+  %555 = fcmp oeq float %548, %552, !dbg !41
+  %556 = fcmp uno float %548, 0.000000e+00, !dbg !42
+  %557 = fcmp uno float %552, 0.000000e+00, !dbg !43
+  %558 = xor i1 %557, true, !dbg !44
+  %559 = and i1 %556, %558, !dbg !46
+  %560 = or i1 %554, %559, !dbg !47
+  %561 = and i1 %557, %556, !dbg !45
+  %562 = or i1 %555, %561, !dbg !48
+  %563 = icmp slt i32 %549, %553, !dbg !49
+  %564 = and i1 %563, %562, !dbg !50
+  %565 = or i1 %560, %564, !dbg !51
+  %566 = select i1 %565, float %548, float %552, !dbg !52
+  %567 = select i1 %565, i32 %549, i32 %553, !dbg !53
+  %568 = bitcast float %566 to i32, !dbg !38
+  %569 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %568, i32 2, i32 31), !dbg !38
+  %570 = bitcast i32 %569 to float, !dbg !38
+  %571 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %567, i32 2, i32 31), !dbg !38
+  %572 = fcmp ogt float %566, %570, !dbg !40
+  %573 = fcmp oeq float %566, %570, !dbg !41
+  %574 = fcmp uno float %566, 0.000000e+00, !dbg !42
+  %575 = fcmp uno float %570, 0.000000e+00, !dbg !43
+  %576 = xor i1 %575, true, !dbg !44
+  %577 = and i1 %574, %576, !dbg !46
+  %578 = or i1 %572, %577, !dbg !47
+  %579 = and i1 %575, %574, !dbg !45
+  %580 = or i1 %573, %579, !dbg !48
+  %581 = icmp slt i32 %567, %571, !dbg !49
+  %582 = and i1 %581, %580, !dbg !50
+  %583 = or i1 %578, %582, !dbg !51
+  %584 = select i1 %583, float %566, float %570, !dbg !52
+  %585 = select i1 %583, i32 %567, i32 %571, !dbg !53
+  %586 = bitcast float %584 to i32, !dbg !38
+  %587 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %586, i32 1, i32 31), !dbg !38
+  %588 = bitcast i32 %587 to float, !dbg !38
+  %589 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %585, i32 1, i32 31), !dbg !38
+  %590 = fcmp ogt float %584, %588, !dbg !40
+  %591 = fcmp oeq float %584, %588, !dbg !41
+  %592 = fcmp uno float %584, 0.000000e+00, !dbg !42
+  %593 = fcmp uno float %588, 0.000000e+00, !dbg !43
+  %594 = xor i1 %593, true, !dbg !44
+  %595 = and i1 %592, %594, !dbg !46
+  %596 = or i1 %590, %595, !dbg !47
+  %597 = and i1 %593, %592, !dbg !45
+  %598 = or i1 %591, %597, !dbg !48
+  %599 = icmp slt i32 %585, %589, !dbg !49
+  %600 = and i1 %599, %598, !dbg !50
+  %601 = or i1 %596, %600, !dbg !51
+  %602 = select i1 %601, i32 %585, i32 %589, !dbg !53
+  %603 = extractelement <8 x float> %139, i64 2, !dbg !38
+  %604 = bitcast float %603 to i32, !dbg !38
+  %605 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %604, i32 16, i32 31), !dbg !38
+  %606 = bitcast i32 %605 to float, !dbg !38
+  %607 = extractelement <8 x i32> %140, i64 2, !dbg !38
+  %608 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %607, i32 16, i32 31), !dbg !38
+  %609 = fcmp ogt float %603, %606, !dbg !40
+  %610 = fcmp oeq float %603, %606, !dbg !41
+  %611 = fcmp uno float %606, 0.000000e+00, !dbg !43
+  %612 = xor i1 %611, true, !dbg !44
+  %613 = extractelement <8 x i1> %155, i64 2, !dbg !45
+  %614 = and i1 %613, %612, !dbg !46
+  %615 = or i1 %609, %614, !dbg !47
+  %616 = and i1 %613, %611, !dbg !45
+  %617 = or i1 %610, %616, !dbg !48
+  %618 = icmp slt i32 %607, %608, !dbg !49
+  %619 = and i1 %618, %617, !dbg !50
+  %620 = or i1 %615, %619, !dbg !51
+  %621 = select i1 %620, float %603, float %606, !dbg !52
+  %622 = select i1 %620, i32 %607, i32 %608, !dbg !53
+  %623 = bitcast float %621 to i32, !dbg !38
+  %624 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %623, i32 8, i32 31), !dbg !38
+  %625 = bitcast i32 %624 to float, !dbg !38
+  %626 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %622, i32 8, i32 31), !dbg !38
+  %627 = fcmp ogt float %621, %625, !dbg !40
+  %628 = fcmp oeq float %621, %625, !dbg !41
+  %629 = fcmp uno float %621, 0.000000e+00, !dbg !42
+  %630 = fcmp uno float %625, 0.000000e+00, !dbg !43
+  %631 = xor i1 %630, true, !dbg !44
+  %632 = and i1 %629, %631, !dbg !46
+  %633 = or i1 %627, %632, !dbg !47
+  %634 = and i1 %630, %629, !dbg !45
+  %635 = or i1 %628, %634, !dbg !48
+  %636 = icmp slt i32 %622, %626, !dbg !49
+  %637 = and i1 %636, %635, !dbg !50
+  %638 = or i1 %633, %637, !dbg !51
+  %639 = select i1 %638, float %621, float %625, !dbg !52
+  %640 = select i1 %638, i32 %622, i32 %626, !dbg !53
+  %641 = bitcast float %639 to i32, !dbg !38
+  %642 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %641, i32 4, i32 31), !dbg !38
+  %643 = bitcast i32 %642 to float, !dbg !38
+  %644 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %640, i32 4, i32 31), !dbg !38
+  %645 = fcmp ogt float %639, %643, !dbg !40
+  %646 = fcmp oeq float %639, %643, !dbg !41
+  %647 = fcmp uno float %639, 0.000000e+00, !dbg !42
+  %648 = fcmp uno float %643, 0.000000e+00, !dbg !43
+  %649 = xor i1 %648, true, !dbg !44
+  %650 = and i1 %647, %649, !dbg !46
+  %651 = or i1 %645, %650, !dbg !47
+  %652 = and i1 %648, %647, !dbg !45
+  %653 = or i1 %646, %652, !dbg !48
+  %654 = icmp slt i32 %640, %644, !dbg !49
+  %655 = and i1 %654, %653, !dbg !50
+  %656 = or i1 %651, %655, !dbg !51
+  %657 = select i1 %656, float %639, float %643, !dbg !52
+  %658 = select i1 %656, i32 %640, i32 %644, !dbg !53
+  %659 = bitcast float %657 to i32, !dbg !38
+  %660 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %659, i32 2, i32 31), !dbg !38
+  %661 = bitcast i32 %660 to float, !dbg !38
+  %662 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %658, i32 2, i32 31), !dbg !38
+  %663 = fcmp ogt float %657, %661, !dbg !40
+  %664 = fcmp oeq float %657, %661, !dbg !41
+  %665 = fcmp uno float %657, 0.000000e+00, !dbg !42
+  %666 = fcmp uno float %661, 0.000000e+00, !dbg !43
+  %667 = xor i1 %666, true, !dbg !44
+  %668 = and i1 %665, %667, !dbg !46
+  %669 = or i1 %663, %668, !dbg !47
+  %670 = and i1 %666, %665, !dbg !45
+  %671 = or i1 %664, %670, !dbg !48
+  %672 = icmp slt i32 %658, %662, !dbg !49
+  %673 = and i1 %672, %671, !dbg !50
+  %674 = or i1 %669, %673, !dbg !51
+  %675 = select i1 %674, float %657, float %661, !dbg !52
+  %676 = select i1 %674, i32 %658, i32 %662, !dbg !53
+  %677 = bitcast float %675 to i32, !dbg !38
+  %678 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %677, i32 1, i32 31), !dbg !38
+  %679 = bitcast i32 %678 to float, !dbg !38
+  %680 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %676, i32 1, i32 31), !dbg !38
+  %681 = fcmp ogt float %675, %679, !dbg !40
+  %682 = fcmp oeq float %675, %679, !dbg !41
+  %683 = fcmp uno float %675, 0.000000e+00, !dbg !42
+  %684 = fcmp uno float %679, 0.000000e+00, !dbg !43
+  %685 = xor i1 %684, true, !dbg !44
+  %686 = and i1 %683, %685, !dbg !46
+  %687 = or i1 %681, %686, !dbg !47
+  %688 = and i1 %684, %683, !dbg !45
+  %689 = or i1 %682, %688, !dbg !48
+  %690 = icmp slt i32 %676, %680, !dbg !49
+  %691 = and i1 %690, %689, !dbg !50
+  %692 = or i1 %687, %691, !dbg !51
+  %693 = select i1 %692, i32 %676, i32 %680, !dbg !53
+  %694 = extractelement <8 x float> %139, i64 1, !dbg !38
+  %695 = bitcast float %694 to i32, !dbg !38
+  %696 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %695, i32 16, i32 31), !dbg !38
+  %697 = bitcast i32 %696 to float, !dbg !38
+  %698 = extractelement <8 x i32> %140, i64 1, !dbg !38
+  %699 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %698, i32 16, i32 31), !dbg !38
+  %700 = fcmp ogt float %694, %697, !dbg !40
+  %701 = fcmp oeq float %694, %697, !dbg !41
+  %702 = fcmp uno float %697, 0.000000e+00, !dbg !43
+  %703 = xor i1 %702, true, !dbg !44
+  %704 = extractelement <8 x i1> %155, i64 1, !dbg !45
+  %705 = and i1 %704, %703, !dbg !46
+  %706 = or i1 %700, %705, !dbg !47
+  %707 = and i1 %704, %702, !dbg !45
+  %708 = or i1 %701, %707, !dbg !48
+  %709 = icmp slt i32 %698, %699, !dbg !49
+  %710 = and i1 %709, %708, !dbg !50
+  %711 = or i1 %706, %710, !dbg !51
+  %712 = select i1 %711, float %694, float %697, !dbg !52
+  %713 = select i1 %711, i32 %698, i32 %699, !dbg !53
+  %714 = bitcast float %712 to i32, !dbg !38
+  %715 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %714, i32 8, i32 31), !dbg !38
+  %716 = bitcast i32 %715 to float, !dbg !38
+  %717 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %713, i32 8, i32 31), !dbg !38
+  %718 = fcmp ogt float %712, %716, !dbg !40
+  %719 = fcmp oeq float %712, %716, !dbg !41
+  %720 = fcmp uno float %712, 0.000000e+00, !dbg !42
+  %721 = fcmp uno float %716, 0.000000e+00, !dbg !43
+  %722 = xor i1 %721, true, !dbg !44
+  %723 = and i1 %720, %722, !dbg !46
+  %724 = or i1 %718, %723, !dbg !47
+  %725 = and i1 %721, %720, !dbg !45
+  %726 = or i1 %719, %725, !dbg !48
+  %727 = icmp slt i32 %713, %717, !dbg !49
+  %728 = and i1 %727, %726, !dbg !50
+  %729 = or i1 %724, %728, !dbg !51
+  %730 = select i1 %729, float %712, float %716, !dbg !52
+  %731 = select i1 %729, i32 %713, i32 %717, !dbg !53
+  %732 = bitcast float %730 to i32, !dbg !38
+  %733 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %732, i32 4, i32 31), !dbg !38
+  %734 = bitcast i32 %733 to float, !dbg !38
+  %735 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %731, i32 4, i32 31), !dbg !38
+  %736 = fcmp ogt float %730, %734, !dbg !40
+  %737 = fcmp oeq float %730, %734, !dbg !41
+  %738 = fcmp uno float %730, 0.000000e+00, !dbg !42
+  %739 = fcmp uno float %734, 0.000000e+00, !dbg !43
+  %740 = xor i1 %739, true, !dbg !44
+  %741 = and i1 %738, %740, !dbg !46
+  %742 = or i1 %736, %741, !dbg !47
+  %743 = and i1 %739, %738, !dbg !45
+  %744 = or i1 %737, %743, !dbg !48
+  %745 = icmp slt i32 %731, %735, !dbg !49
+  %746 = and i1 %745, %744, !dbg !50
+  %747 = or i1 %742, %746, !dbg !51
+  %748 = select i1 %747, float %730, float %734, !dbg !52
+  %749 = select i1 %747, i32 %731, i32 %735, !dbg !53
+  %750 = bitcast float %748 to i32, !dbg !38
+  %751 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %750, i32 2, i32 31), !dbg !38
+  %752 = bitcast i32 %751 to float, !dbg !38
+  %753 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %749, i32 2, i32 31), !dbg !38
+  %754 = fcmp ogt float %748, %752, !dbg !40
+  %755 = fcmp oeq float %748, %752, !dbg !41
+  %756 = fcmp uno float %748, 0.000000e+00, !dbg !42
+  %757 = fcmp uno float %752, 0.000000e+00, !dbg !43
+  %758 = xor i1 %757, true, !dbg !44
+  %759 = and i1 %756, %758, !dbg !46
+  %760 = or i1 %754, %759, !dbg !47
+  %761 = and i1 %757, %756, !dbg !45
+  %762 = or i1 %755, %761, !dbg !48
+  %763 = icmp slt i32 %749, %753, !dbg !49
+  %764 = and i1 %763, %762, !dbg !50
+  %765 = or i1 %760, %764, !dbg !51
+  %766 = select i1 %765, float %748, float %752, !dbg !52
+  %767 = select i1 %765, i32 %749, i32 %753, !dbg !53
+  %768 = bitcast float %766 to i32, !dbg !38
+  %769 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %768, i32 1, i32 31), !dbg !38
+  %770 = bitcast i32 %769 to float, !dbg !38
+  %771 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %767, i32 1, i32 31), !dbg !38
+  %772 = fcmp ogt float %766, %770, !dbg !40
+  %773 = fcmp oeq float %766, %770, !dbg !41
+  %774 = fcmp uno float %766, 0.000000e+00, !dbg !42
+  %775 = fcmp uno float %770, 0.000000e+00, !dbg !43
+  %776 = xor i1 %775, true, !dbg !44
+  %777 = and i1 %774, %776, !dbg !46
+  %778 = or i1 %772, %777, !dbg !47
+  %779 = and i1 %775, %774, !dbg !45
+  %780 = or i1 %773, %779, !dbg !48
+  %781 = icmp slt i32 %767, %771, !dbg !49
+  %782 = and i1 %781, %780, !dbg !50
+  %783 = or i1 %778, %782, !dbg !51
+  %784 = select i1 %783, i32 %767, i32 %771, !dbg !53
+  %785 = extractelement <8 x float> %139, i64 0, !dbg !38
+  %786 = bitcast float %785 to i32, !dbg !38
+  %787 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %786, i32 16, i32 31), !dbg !38
+  %788 = bitcast i32 %787 to float, !dbg !38
+  %789 = extractelement <8 x i32> %140, i64 0, !dbg !38
+  %790 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %789, i32 16, i32 31), !dbg !38
+  %791 = fcmp ogt float %785, %788, !dbg !40
+  %792 = fcmp oeq float %785, %788, !dbg !41
+  %793 = fcmp uno float %788, 0.000000e+00, !dbg !43
+  %794 = xor i1 %793, true, !dbg !44
+  %795 = extractelement <8 x i1> %155, i64 0, !dbg !45
+  %796 = and i1 %795, %794, !dbg !46
+  %797 = or i1 %791, %796, !dbg !47
+  %798 = and i1 %795, %793, !dbg !45
+  %799 = or i1 %792, %798, !dbg !48
+  %800 = icmp slt i32 %789, %790, !dbg !49
+  %801 = and i1 %800, %799, !dbg !50
+  %802 = or i1 %797, %801, !dbg !51
+  %803 = select i1 %802, float %785, float %788, !dbg !52
+  %804 = select i1 %802, i32 %789, i32 %790, !dbg !53
+  %805 = bitcast float %803 to i32, !dbg !38
+  %806 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %805, i32 8, i32 31), !dbg !38
+  %807 = bitcast i32 %806 to float, !dbg !38
+  %808 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %804, i32 8, i32 31), !dbg !38
+  %809 = fcmp ogt float %803, %807, !dbg !40
+  %810 = fcmp oeq float %803, %807, !dbg !41
+  %811 = fcmp uno float %803, 0.000000e+00, !dbg !42
+  %812 = fcmp uno float %807, 0.000000e+00, !dbg !43
+  %813 = xor i1 %812, true, !dbg !44
+  %814 = and i1 %811, %813, !dbg !46
+  %815 = or i1 %809, %814, !dbg !47
+  %816 = and i1 %812, %811, !dbg !45
+  %817 = or i1 %810, %816, !dbg !48
+  %818 = icmp slt i32 %804, %808, !dbg !49
+  %819 = and i1 %818, %817, !dbg !50
+  %820 = or i1 %815, %819, !dbg !51
+  %821 = select i1 %820, float %803, float %807, !dbg !52
+  %822 = select i1 %820, i32 %804, i32 %808, !dbg !53
+  %823 = bitcast float %821 to i32, !dbg !38
+  %824 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %823, i32 4, i32 31), !dbg !38
+  %825 = bitcast i32 %824 to float, !dbg !38
+  %826 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %822, i32 4, i32 31), !dbg !38
+  %827 = fcmp ogt float %821, %825, !dbg !40
+  %828 = fcmp oeq float %821, %825, !dbg !41
+  %829 = fcmp uno float %821, 0.000000e+00, !dbg !42
+  %830 = fcmp uno float %825, 0.000000e+00, !dbg !43
+  %831 = xor i1 %830, true, !dbg !44
+  %832 = and i1 %829, %831, !dbg !46
+  %833 = or i1 %827, %832, !dbg !47
+  %834 = and i1 %830, %829, !dbg !45
+  %835 = or i1 %828, %834, !dbg !48
+  %836 = icmp slt i32 %822, %826, !dbg !49
+  %837 = and i1 %836, %835, !dbg !50
+  %838 = or i1 %833, %837, !dbg !51
+  %839 = select i1 %838, float %821, float %825, !dbg !52
+  %840 = select i1 %838, i32 %822, i32 %826, !dbg !53
+  %841 = bitcast float %839 to i32, !dbg !38
+  %842 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %841, i32 2, i32 31), !dbg !38
+  %843 = bitcast i32 %842 to float, !dbg !38
+  %844 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %840, i32 2, i32 31), !dbg !38
+  %845 = fcmp ogt float %839, %843, !dbg !40
+  %846 = fcmp oeq float %839, %843, !dbg !41
+  %847 = fcmp uno float %839, 0.000000e+00, !dbg !42
+  %848 = fcmp uno float %843, 0.000000e+00, !dbg !43
+  %849 = xor i1 %848, true, !dbg !44
+  %850 = and i1 %847, %849, !dbg !46
+  %851 = or i1 %845, %850, !dbg !47
+  %852 = and i1 %848, %847, !dbg !45
+  %853 = or i1 %846, %852, !dbg !48
+  %854 = icmp slt i32 %840, %844, !dbg !49
+  %855 = and i1 %854, %853, !dbg !50
+  %856 = or i1 %851, %855, !dbg !51
+  %857 = select i1 %856, float %839, float %843, !dbg !52
+  %858 = select i1 %856, i32 %840, i32 %844, !dbg !53
+  %859 = bitcast float %857 to i32, !dbg !38
+  %860 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %859, i32 1, i32 31), !dbg !38
+  %861 = bitcast i32 %860 to float, !dbg !38
+  %862 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %858, i32 1, i32 31), !dbg !38
+  %863 = fcmp ogt float %857, %861, !dbg !40
+  %864 = fcmp oeq float %857, %861, !dbg !41
+  %865 = fcmp uno float %857, 0.000000e+00, !dbg !42
+  %866 = fcmp uno float %861, 0.000000e+00, !dbg !43
+  %867 = xor i1 %866, true, !dbg !44
+  %868 = and i1 %865, %867, !dbg !46
+  %869 = or i1 %863, %868, !dbg !47
+  %870 = and i1 %866, %865, !dbg !45
+  %871 = or i1 %864, %870, !dbg !48
+  %872 = icmp slt i32 %858, %862, !dbg !49
+  %873 = and i1 %872, %871, !dbg !50
+  %874 = or i1 %869, %873, !dbg !51
+  %875 = select i1 %874, i32 %858, i32 %862, !dbg !53
+  %876 = and i32 %146, 1, !dbg !38
+  %877 = icmp eq i32 %145, 0, !dbg !38
+  %878 = lshr exact i32 %12, 5, !dbg !38
+  %879 = or disjoint i32 %878, %876, !dbg !38
+  %880 = getelementptr float, ptr addrspace(3) @global_smem, i32 %879, !dbg !38
+  %881 = select i1 %237, i32 %222, i32 %223, !dbg !52
+  %882 = insertelement <1 x i32> poison, i32 %881, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %880, <1 x i32> %882, i1 %877) #4, !dbg !38
+  %883 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %879, !dbg !38
+  %884 = insertelement <1 x i32> poison, i32 %238, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %883, <1 x i32> %884, i1 %877) #4, !dbg !38
+  %885 = shl nuw nsw i32 %15, 1, !dbg !38
+  %886 = or disjoint i32 %885, %876, !dbg !38
+  %887 = getelementptr float, ptr addrspace(3) @global_smem, i32 %886, !dbg !38
+  %888 = select i1 %328, i32 %313, i32 %314, !dbg !52
+  %889 = insertelement <1 x i32> poison, i32 %888, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %887, <1 x i32> %889, i1 %877) #4, !dbg !38
+  %890 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %886, !dbg !38
+  %891 = insertelement <1 x i32> poison, i32 %329, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %890, <1 x i32> %891, i1 %877) #4, !dbg !38
+  %892 = shl nuw nsw i32 %16, 1, !dbg !38
+  %893 = or disjoint i32 %892, %876, !dbg !38
+  %894 = getelementptr float, ptr addrspace(3) @global_smem, i32 %893, !dbg !38
+  %895 = select i1 %419, i32 %404, i32 %405, !dbg !52
+  %896 = insertelement <1 x i32> poison, i32 %895, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %894, <1 x i32> %896, i1 %877) #4, !dbg !38
+  %897 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %893, !dbg !38
+  %898 = insertelement <1 x i32> poison, i32 %420, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %897, <1 x i32> %898, i1 %877) #4, !dbg !38
+  %899 = shl nuw nsw i32 %17, 1, !dbg !38
+  %900 = or disjoint i32 %899, %876, !dbg !38
+  %901 = getelementptr float, ptr addrspace(3) @global_smem, i32 %900, !dbg !38
+  %902 = select i1 %510, i32 %495, i32 %496, !dbg !52
+  %903 = insertelement <1 x i32> poison, i32 %902, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %901, <1 x i32> %903, i1 %877) #4, !dbg !38
+  %904 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %900, !dbg !38
+  %905 = insertelement <1 x i32> poison, i32 %511, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %904, <1 x i32> %905, i1 %877) #4, !dbg !38
+  %906 = extractelement <4 x i32> %20, i64 3, !dbg !38
+  %907 = shl nuw nsw i32 %906, 1, !dbg !38
+  %908 = or disjoint i32 %907, %876, !dbg !38
+  %909 = getelementptr float, ptr addrspace(3) @global_smem, i32 %908, !dbg !38
+  %910 = select i1 %601, i32 %586, i32 %587, !dbg !52
+  %911 = insertelement <1 x i32> poison, i32 %910, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %909, <1 x i32> %911, i1 %877) #4, !dbg !38
+  %912 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %908, !dbg !38
+  %913 = insertelement <1 x i32> poison, i32 %602, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %912, <1 x i32> %913, i1 %877) #4, !dbg !38
+  %914 = extractelement <4 x i32> %20, i64 2, !dbg !38
+  %915 = shl nuw nsw i32 %914, 1, !dbg !38
+  %916 = or disjoint i32 %915, %876, !dbg !38
+  %917 = getelementptr float, ptr addrspace(3) @global_smem, i32 %916, !dbg !38
+  %918 = select i1 %692, i32 %677, i32 %678, !dbg !52
+  %919 = insertelement <1 x i32> poison, i32 %918, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %917, <1 x i32> %919, i1 %877) #4, !dbg !38
+  %920 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %916, !dbg !38
+  %921 = insertelement <1 x i32> poison, i32 %693, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %920, <1 x i32> %921, i1 %877) #4, !dbg !38
+  %922 = extractelement <4 x i32> %20, i64 1, !dbg !38
+  %923 = shl nuw nsw i32 %922, 1, !dbg !38
+  %924 = or disjoint i32 %923, %876, !dbg !38
+  %925 = getelementptr float, ptr addrspace(3) @global_smem, i32 %924, !dbg !38
+  %926 = select i1 %783, i32 %768, i32 %769, !dbg !52
+  %927 = insertelement <1 x i32> poison, i32 %926, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %925, <1 x i32> %927, i1 %877) #4, !dbg !38
+  %928 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %924, !dbg !38
+  %929 = insertelement <1 x i32> poison, i32 %784, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %928, <1 x i32> %929, i1 %877) #4, !dbg !38
+  %930 = extractelement <4 x i32> %20, i64 0, !dbg !38
+  %931 = shl nuw nsw i32 %930, 1, !dbg !38
+  %932 = or disjoint i32 %931, %876, !dbg !38
+  %933 = getelementptr float, ptr addrspace(3) @global_smem, i32 %932, !dbg !38
+  %934 = select i1 %874, i32 %859, i32 %860, !dbg !52
+  %935 = insertelement <1 x i32> poison, i32 %934, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %933, <1 x i32> %935, i1 %877) #4, !dbg !38
+  %936 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %932, !dbg !38
+  %937 = insertelement <1 x i32> poison, i32 %875, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %936, <1 x i32> %937, i1 %877) #4, !dbg !38
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !38
+  %938 = icmp samesign ult i32 %11, 128, !dbg !38
+  %939 = getelementptr float, ptr addrspace(3) @global_smem, i32 %11, !dbg !38
+  %940 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %939, i1 %938) #4, !dbg !38
+  %941 = bitcast i32 %940 to float, !dbg !38
+  %942 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %11, !dbg !38
+  %943 = tail call i32 asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %942, i1 %938) #4, !dbg !38
+  %944 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %940, i32 1, i32 31), !dbg !38
+  %945 = bitcast i32 %944 to float, !dbg !38
+  %946 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %943, i32 1, i32 31), !dbg !38
+  %947 = fcmp ogt float %941, %945, !dbg !40
+  %948 = fcmp oeq float %941, %945, !dbg !41
+  %949 = fcmp uno float %941, 0.000000e+00, !dbg !42
+  %950 = fcmp uno float %945, 0.000000e+00, !dbg !43
+  %951 = xor i1 %950, true, !dbg !44
+  %952 = and i1 %949, %951, !dbg !46
+  %953 = or i1 %947, %952, !dbg !47
+  %954 = and i1 %949, %950, !dbg !45
+  %955 = or i1 %948, %954, !dbg !48
+  %956 = icmp slt i32 %943, %946, !dbg !49
+  %957 = and i1 %956, %955, !dbg !50
+  %958 = or i1 %953, %957, !dbg !51
+  %959 = select i1 %958, i32 %943, i32 %946, !dbg !53
+  %960 = and i32 %11, 897, !dbg !38
+  %961 = icmp eq i32 %960, 0, !dbg !38
+  %962 = select i1 %958, i32 %940, i32 %944, !dbg !52
+  %963 = insertelement <1 x i32> poison, i32 %962, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %939, <1 x i32> %963, i1 %961) #4, !dbg !38
+  %964 = insertelement <1 x i32> poison, i32 %959, i64 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %942, <1 x i32> %964, i1 %961) #4, !dbg !38
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !38
+  %965 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %878, !dbg !38
+  %966 = load i32, ptr addrspace(3) %965, align 8, !dbg !38
+  %967 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %885, !dbg !38
+  %968 = load i32, ptr addrspace(3) %967, align 8, !dbg !38
+  %969 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %892, !dbg !38
+  %970 = load i32, ptr addrspace(3) %969, align 8, !dbg !38
+  %971 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %899, !dbg !38
+  %972 = load i32, ptr addrspace(3) %971, align 8, !dbg !38
+  %973 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %907, !dbg !38
+  %974 = load i32, ptr addrspace(3) %973, align 8, !dbg !38
+  %975 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %915, !dbg !38
+  %976 = load i32, ptr addrspace(3) %975, align 8, !dbg !38
+  %977 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %923, !dbg !38
+  %978 = load i32, ptr addrspace(3) %977, align 8, !dbg !38
+  %979 = getelementptr i32, ptr addrspace(3) getelementptr (i8, ptr addrspace(3) @global_smem, i32 512), i32 %931, !dbg !38
+  %980 = load i32, ptr addrspace(3) %979, align 8, !dbg !38
+  %981 = sext i32 %143 to i64, !dbg !54
+  %982 = getelementptr i64, ptr addrspace(1) %1, i64 %981, !dbg !54
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !55
+  %983 = lshr exact i32 %12, 2, !dbg !55
+  %984 = getelementptr inbounds nuw i8, ptr addrspace(3) @global_smem, i32 %983, !dbg !55
+  %985 = insertelement <4 x i32> poison, i32 %966, i64 0, !dbg !55
+  %986 = insertelement <4 x i32> %985, i32 %968, i64 1, !dbg !55
+  %987 = insertelement <4 x i32> %986, i32 %970, i64 2, !dbg !55
+  %988 = insertelement <4 x i32> %987, i32 %972, i64 3, !dbg !55
+  store <4 x i32> %988, ptr addrspace(3) %984, align 16, !dbg !55
+  %989 = getelementptr inbounds nuw i8, ptr addrspace(3) %984, i32 128, !dbg !55
+  %990 = insertelement <4 x i32> poison, i32 %974, i64 0, !dbg !55
+  %991 = insertelement <4 x i32> %990, i32 %976, i64 1, !dbg !55
+  %992 = insertelement <4 x i32> %991, i32 %978, i64 2, !dbg !55
+  %993 = insertelement <4 x i32> %992, i32 %980, i64 3, !dbg !55
+  store <4 x i32> %993, ptr addrspace(3) %989, align 16, !dbg !55
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !55
+  %994 = shl nuw nsw i32 %11, 4, !dbg !55
+  %995 = and i32 %994, 112, !dbg !55
+  %996 = lshr i32 %11, 1, !dbg !55
+  %997 = and i32 %996, 12, !dbg !55
+  %998 = shl nuw nsw i32 %11, 2, !dbg !55
+  %999 = and i32 %998, 128, !dbg !55
+  %1000 = getelementptr inbounds nuw i8, ptr addrspace(3) @global_smem, i32 %995, !dbg !55
+  %1001 = getelementptr inbounds nuw i8, ptr addrspace(3) %1000, i32 %999, !dbg !55
+  %1002 = getelementptr inbounds nuw i8, ptr addrspace(3) %1001, i32 %997, !dbg !55
+  %1003 = load i32, ptr addrspace(3) %1002, align 4, !dbg !55
+  %1004 = sext i32 %1003 to i64, !dbg !55
+  %1005 = icmp eq i32 %12, 0, !dbg !55
+  %1006 = and i1 %1005, %144, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b64 [ $1 + 0 ], { $0 };", "l,l,b"(i64 %1004, ptr addrspace(1) %982, i1 %1006) #4, !dbg !55
+  ret void, !dbg !56
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 2147483647) i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #1
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #2
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier.cta.sync.aligned.all(i32) #3
+
+attributes #0 = { nounwind "nvvm.reqntid"="512" }
+attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #2 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #3 = { convergent nocallback nounwind }
+attributes #4 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly)
+!1 = !DIFile(filename: "c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py", directory: "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w")
+!2 = !{i32 2, !"Debug Info Version", i32 3}
+!3 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!4 = distinct !DISubprogram(name: "triton_red_fused_argmax_1", linkageName: "triton_red_fused_argmax_1", scope: !1, file: !1, line: 18, type: !5, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
+!5 = !DISubroutineType(cc: DW_CC_normal, types: !6)
+!6 = !{}
+!7 = !DILocation(line: 22, column: 28, scope: !4)
+!8 = !DILocation(line: 22, column: 33, scope: !4)
+!9 = !DILocation(line: 23, column: 44, scope: !4)
+!10 = !DILocation(line: 23, column: 23, scope: !4)
+!11 = !DILocation(line: 24, column: 21, scope: !4)
+!12 = !DILocation(line: 27, column: 19, scope: !4)
+!13 = !DILocation(line: 28, column: 19, scope: !4)
+!14 = !DILocation(line: 38, column: 56, scope: !4)
+!15 = !DILocation(line: 32, column: 40, scope: !4)
+!16 = !DILocation(line: 38, column: 61, scope: !4)
+!17 = !DILocation(line: 33, column: 31, scope: !4)
+!18 = !DILocation(line: 38, column: 34, scope: !4)
+!19 = !DILocation(line: 147, column: 29, scope: !20, inlinedAt: !22)
+!20 = distinct !DILexicalBlockFile(scope: !4, file: !21, discriminator: 0)
+!21 = !DIFile(filename: "triton_helpers.py", directory: "/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime")
+!22 = !DILocation(line: 41, column: 38, scope: !4)
+!23 = !DILocation(line: 155, column: 69, scope: !20, inlinedAt: !22)
+!24 = !DILocation(line: 144, column: 21, scope: !20, inlinedAt: !22)
+!25 = !DILocation(line: 145, column: 23, scope: !20, inlinedAt: !22)
+!26 = !DILocation(line: 148, column: 29, scope: !20, inlinedAt: !22)
+!27 = !DILocation(line: 149, column: 31, scope: !20, inlinedAt: !22)
+!28 = !DILocation(line: 149, column: 27, scope: !20, inlinedAt: !22)
+!29 = !DILocation(line: 149, column: 16, scope: !20, inlinedAt: !22)
+!30 = !DILocation(line: 151, column: 27, scope: !20, inlinedAt: !22)
+!31 = !DILocation(line: 151, column: 17, scope: !20, inlinedAt: !22)
+!32 = !DILocation(line: 154, column: 31, scope: !20, inlinedAt: !22)
+!33 = !DILocation(line: 154, column: 21, scope: !20, inlinedAt: !22)
+!34 = !DILocation(line: 154, column: 12, scope: !20, inlinedAt: !22)
+!35 = !DILocation(line: 155, column: 35, scope: !20, inlinedAt: !22)
+!36 = !DILocation(line: 43, column: 54, scope: !4)
+!37 = !DILocation(line: 44, column: 66, scope: !4)
+!38 = !DILocation(line: 165, column: 42, scope: !20, inlinedAt: !39)
+!39 = !DILocation(line: 45, column: 75, scope: !4)
+!40 = !DILocation(line: 144, column: 21, scope: !20, inlinedAt: !39)
+!41 = !DILocation(line: 145, column: 23, scope: !20, inlinedAt: !39)
+!42 = !DILocation(line: 147, column: 29, scope: !20, inlinedAt: !39)
+!43 = !DILocation(line: 148, column: 29, scope: !20, inlinedAt: !39)
+!44 = !DILocation(line: 149, column: 31, scope: !20, inlinedAt: !39)
+!45 = !DILocation(line: 151, column: 27, scope: !20, inlinedAt: !39)
+!46 = !DILocation(line: 149, column: 27, scope: !20, inlinedAt: !39)
+!47 = !DILocation(line: 149, column: 16, scope: !20, inlinedAt: !39)
+!48 = !DILocation(line: 151, column: 17, scope: !20, inlinedAt: !39)
+!49 = !DILocation(line: 154, column: 31, scope: !20, inlinedAt: !39)
+!50 = !DILocation(line: 154, column: 21, scope: !20, inlinedAt: !39)
+!51 = !DILocation(line: 154, column: 12, scope: !20, inlinedAt: !39)
+!52 = !DILocation(line: 155, column: 35, scope: !20, inlinedAt: !39)
+!53 = !DILocation(line: 155, column: 69, scope: !20, inlinedAt: !39)
+!54 = !DILocation(line: 47, column: 25, scope: !4)
+!55 = !DILocation(line: 47, column: 36, scope: !4)
+!56 = !DILocation(line: 47, column: 4, scope: !4)

SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.source

@@ -0,0 +1,323 @@
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":18:0)
+#loc35 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":143:0)
+#loc47 = loc(unknown)
+#loc55 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":86:0)
+#loc59 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":63:0)
+#loc68 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":164:0)
+#loc72 = loc("in_ptr0"(#loc))
+#loc73 = loc("out_ptr0"(#loc))
+#loc74 = loc("ks0"(#loc))
+#loc75 = loc("ks1"(#loc))
+#loc76 = loc("xnumel"(#loc))
+#loc77 = loc("r0_numel"(#loc))
+#loc106 = loc("a_value"(#loc35))
+#loc107 = loc("a_index"(#loc35))
+#loc108 = loc("b_value"(#loc35))
+#loc109 = loc("b_index"(#loc35))
+#loc122 = loc("x"(#loc55))
+#loc123 = loc("x"(#loc59))
+#loc124 = loc("value"(#loc68))
+#loc125 = loc("index"(#loc68))
+module {
+  tt.func public @triton_red_fused_argmax_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr0: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %xnumel: i32 loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %r0_numel_0 = arith.constant 32000 : i32 loc(#loc78)
+    %xoffset = tt.get_program_id x : i32 loc(#loc79)
+    %xoffset_1 = arith.constant 64 : i32 loc(#loc80)
+    %xoffset_2 = arith.constant 64 : i32 loc(#loc80)
+    %xoffset_3 = arith.muli %xoffset, %xoffset_2 : i32 loc(#loc80)
+    %xindex = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32> loc(#loc81)
+    %xindex_4 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc82)
+    %xindex_5 = tt.splat %xoffset_3 : i32 -> tensor<64x1xi32> loc(#loc83)
+    %xindex_6 = arith.addi %xindex_5, %xindex_4 : tensor<64x1xi32> loc(#loc83)
+    %xmask = tt.splat %xnumel : i32 -> tensor<64x1xi32> loc(#loc84)
+    %xmask_7 = arith.cmpi slt, %xindex_6, %xmask : tensor<64x1xi32> loc(#loc84)
+    %r0_base = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32> loc(#loc85)
+    %r0_base_8 = tt.expand_dims %r0_base {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32> loc(#loc86)
+    %x0 = arith.extsi %xindex_6 : tensor<64x1xi32> to tensor<64x1xi64> loc(#loc87)
+    %x0_9 = tt.splat %ks0 : i64 -> tensor<64x1xi64> loc(#loc87)
+    %x0_10 = arith.remsi %x0, %x0_9 : tensor<64x1xi64> loc(#loc87)
+    %x1 = arith.extsi %xindex_6 : tensor<64x1xi32> to tensor<64x1xi64> loc(#loc88)
+    %x1_11 = tt.splat %ks0 : i64 -> tensor<64x1xi64> loc(#loc88)
+    %x1_12 = arith.divsi %x1, %x1_11 : tensor<64x1xi64> loc(#loc88)
+    %_tmp2 = arith.constant 0xFF800000 : f32 loc(#loc89)
+    %_tmp2_13 = arith.constant dense<0xFF800000> : tensor<64x64xf32> loc(#loc89)
+    %_tmp2_index = arith.constant 2147483647 : i32 loc(#loc90)
+    %_tmp2_index_14 = arith.constant dense<2147483647> : tensor<64x64xi32> loc(#loc90)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc14)
+    %c64_i32 = arith.constant 64 : i32 loc(#loc14)
+    %0 = arith.bitcast %c0_i32 : i32 to i32 loc(#loc14)
+    %1 = arith.bitcast %r0_numel_0 : i32 to i32 loc(#loc14)
+    %2 = arith.bitcast %c64_i32 : i32 to i32 loc(#loc14)
+    %3 = ub.poison : i32 loc(#loc14)
+    %_tmp2_index_15:2 = scf.for %r0_offset = %0 to %1 step %2 iter_args(%_tmp2_16 = %_tmp2_13, %_tmp2_index_17 = %_tmp2_index_14) -> (tensor<64x64xf32>, tensor<64x64xi32>)  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x64xi32> loc(#loc92)
+      %r0_index_18 = arith.addi %r0_index, %r0_base_8 : tensor<1x64xi32> loc(#loc92)
+      %r0_mask = arith.constant dense<32000> : tensor<1x64xi32> loc(#loc93)
+      %r0_mask_19 = arith.cmpi slt, %r0_index_18, %r0_mask : tensor<1x64xi32> loc(#loc93)
+      %tmp0 = arith.constant 32000 : i32 loc(#loc94)
+      %tmp0_20 = arith.constant 32000 : i64 loc(#loc94)
+      %tmp0_21 = arith.constant dense<32000> : tensor<64x1xi64> loc(#loc94)
+      %tmp0_22 = arith.muli %tmp0_21, %x0_10 : tensor<64x1xi64> loc(#loc94)
+      %tmp0_23 = arith.extsi %r0_index_18 : tensor<1x64xi32> to tensor<1x64xi64> loc(#loc95)
+      %tmp0_24 = tt.broadcast %tmp0_23 : tensor<1x64xi64> -> tensor<64x64xi64> loc(#loc95)
+      %tmp0_25 = tt.broadcast %tmp0_22 : tensor<64x1xi64> -> tensor<64x64xi64> loc(#loc95)
+      %tmp0_26 = arith.addi %tmp0_24, %tmp0_25 : tensor<64x64xi64> loc(#loc95)
+      %tmp0_27 = tt.splat %ks1 : i64 -> tensor<64x1xi64> loc(#loc96)
+      %tmp0_28 = arith.muli %tmp0_27, %x1_12 : tensor<64x1xi64> loc(#loc96)
+      %tmp0_29 = tt.broadcast %tmp0_28 : tensor<64x1xi64> -> tensor<64x64xi64> loc(#loc97)
+      %tmp0_30 = arith.addi %tmp0_26, %tmp0_29 : tensor<64x64xi64> loc(#loc97)
+      %tmp0_31 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<64x64x!tt.ptr<f32>> loc(#loc98)
+      %tmp0_32 = tt.addptr %tmp0_31, %tmp0_30 : tensor<64x64x!tt.ptr<f32>>, tensor<64x64xi64> loc(#loc98)
+      %tmp0_33 = tt.broadcast %r0_mask_19 : tensor<1x64xi1> -> tensor<64x64xi1> loc(#loc99)
+      %tmp0_34 = tt.broadcast %xmask_7 : tensor<64x1xi1> -> tensor<64x64xi1> loc(#loc99)
+      %tmp0_35 = arith.andi %tmp0_33, %tmp0_34 : tensor<64x64xi1> loc(#loc99)
+      %tmp0_36 = arith.constant 0.000000e+00 : f32 loc(#loc100)
+      %tmp0_37 = arith.constant dense<0.000000e+00> : tensor<64x64xf32> loc(#loc100)
+      %tmp0_38 = tt.load %tmp0_32, %tmp0_35, %tmp0_37 evictionPolicy = evict_first : tensor<64x64x!tt.ptr<f32>> loc(#loc100)
+      %8:2 = tt.call @torch._inductor.runtime.triton_helpers.maximum_with_index__fp32S64_64S_i32S64_64S_fp32S64_64S_i32S1_64S__(%_tmp2_16, %_tmp2_index_17, %tmp0_38, %r0_index_18) : (tensor<64x64xf32>, tensor<64x64xi32>, tensor<64x64xf32>, tensor<1x64xi32>) -> (tensor<64x64xf32>, tensor<64x64xi32>) loc(#loc24)
+      %_tmp2_39 = tt.broadcast %r0_mask_19 : tensor<1x64xi1> -> tensor<64x64xi1> loc(#loc101)
+      %_tmp2_40 = tt.broadcast %xmask_7 : tensor<64x1xi1> -> tensor<64x64xi1> loc(#loc101)
+      %_tmp2_41 = arith.andi %_tmp2_39, %_tmp2_40 : tensor<64x64xi1> loc(#loc101)
+      %_tmp2_42 = arith.select %_tmp2_41, %8#0, %_tmp2_16 : tensor<64x64xi1>, tensor<64x64xf32> loc(#loc102)
+      %_tmp2_index_43 = tt.broadcast %r0_mask_19 : tensor<1x64xi1> -> tensor<64x64xi1> loc(#loc103)
+      %_tmp2_index_44 = tt.broadcast %xmask_7 : tensor<64x1xi1> -> tensor<64x64xi1> loc(#loc103)
+      %_tmp2_index_45 = arith.andi %_tmp2_index_43, %_tmp2_index_44 : tensor<64x64xi1> loc(#loc103)
+      %_tmp2_index_46 = arith.select %_tmp2_index_45, %8#1, %_tmp2_index_17 : tensor<64x64xi1>, tensor<64x64xi32> loc(#loc104)
+      scf.yield %_tmp2_42, %_tmp2_index_46 : tensor<64x64xf32>, tensor<64x64xi32> loc(#loc29)
+    } loc(#loc126)
+    %4:2 = tt.call @"torch._inductor.runtime.triton_helpers.max_with_index__fp32S64_64S_i32S64_64S__(2,)cconstexpr_1_"(%_tmp2_index_15#0, %_tmp2_index_15#1) : (tensor<64x64xf32>, tensor<64x64xi32>) -> (tensor<64xf32>, tensor<64xi32>) loc(#loc30)
+    %tmp2 = tt.expand_dims %4#1 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc105)
+    %5 = tt.splat %out_ptr0 : !tt.ptr<i64> -> tensor<64x1x!tt.ptr<i64>> loc(#loc32)
+    %6 = tt.addptr %5, %xindex_6 : tensor<64x1x!tt.ptr<i64>>, tensor<64x1xi32> loc(#loc32)
+    %7 = arith.extsi %tmp2 : tensor<64x1xi32> to tensor<64x1xi64> loc(#loc33)
+    tt.store %6, %7, %xmask_7 : tensor<64x1x!tt.ptr<i64>> loc(#loc33)
+    tt.return loc(#loc34)
+  } loc(#loc)
+  tt.func private @torch._inductor.runtime.triton_helpers.maximum_with_index__fp32S64_64S_i32S64_64S_fp32S64_64S_i32S1_64S__(%a_value: tensor<64x64xf32> loc("a_value"(#loc35)), %a_index: tensor<64x64xi32> loc("a_index"(#loc35)), %b_value: tensor<64x64xf32> loc("b_value"(#loc35)), %b_index: tensor<1x64xi32> loc("b_index"(#loc35))) -> (tensor<64x64xf32>, tensor<64x64xi32>) attributes {noinline = false} {
+    %mask = arith.cmpf ogt, %a_value, %b_value : tensor<64x64xf32> loc(#loc127)
+    %equal = arith.cmpf oeq, %a_value, %b_value : tensor<64x64xf32> loc(#loc128)
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.is_floating__fp32S64_64S__(%a_value) : (tensor<64x64xf32>) -> i1 loc(#loc38)
+    %1:2 = scf.if %0 -> (tensor<64x64xi1>, tensor<64x64xi1>) {
+      %a_isnan = arith.cmpf une, %a_value, %a_value : tensor<64x64xf32> loc(#loc112)
+      %b_isnan = arith.cmpf une, %b_value, %b_value : tensor<64x64xf32> loc(#loc113)
+      %mask_4 = arith.constant true loc(#loc114)
+      %mask_5 = arith.constant dense<true> : tensor<64x64xi1> loc(#loc114)
+      %mask_6 = arith.xori %b_isnan, %mask_5 : tensor<64x64xi1> loc(#loc114)
+      %mask_7 = arith.andi %a_isnan, %mask_6 : tensor<64x64xi1> loc(#loc115)
+      %mask_8 = arith.ori %mask, %mask_7 : tensor<64x64xi1> loc(#loc129)
+      %equal_9 = arith.andi %a_isnan, %b_isnan : tensor<64x64xi1> loc(#loc117)
+      %equal_10 = arith.ori %equal, %equal_9 : tensor<64x64xi1> loc(#loc130)
+      scf.yield %mask_8, %equal_10 : tensor<64x64xi1>, tensor<64x64xi1> loc(#loc130)
+    } else {
+      scf.yield %mask, %equal : tensor<64x64xi1>, tensor<64x64xi1> loc(#loc47)
+    } loc(#loc39)
+    %mask_0 = tt.broadcast %b_index : tensor<1x64xi32> -> tensor<64x64xi32> loc(#loc119)
+    %mask_1 = arith.cmpi slt, %a_index, %mask_0 : tensor<64x64xi32> loc(#loc119)
+    %mask_2 = arith.andi %1#1, %mask_1 : tensor<64x64xi1> loc(#loc120)
+    %mask_3 = arith.ori %1#0, %mask_2 : tensor<64x64xi1> loc(#loc121)
+    %2 = arith.select %mask_3, %a_value, %b_value : tensor<64x64xi1>, tensor<64x64xf32> loc(#loc51)
+    %3 = tt.broadcast %b_index : tensor<1x64xi32> -> tensor<64x64xi32> loc(#loc52)
+    %4 = arith.select %mask_3, %a_index, %3 : tensor<64x64xi1>, tensor<64x64xi32> loc(#loc52)
+    tt.return %2, %4 : tensor<64x64xf32>, tensor<64x64xi32> loc(#loc53)
+  ^bb1:  // no predecessors
+    %5 = ub.poison : tensor<64x64xf32> loc(#loc54)
+    %6 = ub.poison : tensor<64x64xi32> loc(#loc54)
+    tt.return %5, %6 : tensor<64x64xf32>, tensor<64x64xi32> loc(#loc54)
+  } loc(#loc35)
+  tt.func private @torch._inductor.runtime.triton_helpers.is_floating__fp32S64_64S__(%x: tensor<64x64xf32> loc("x"(#loc55))) -> i1 attributes {noinline = false} {
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32S64_64S__(%x) : (tensor<64x64xf32>) -> tensor<64x64xf32> loc(#loc56)
+    %true = arith.constant true loc(#loc57)
+    tt.return %true : i1 loc(#loc57)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : i1 loc(#loc58)
+    tt.return %1 : i1 loc(#loc58)
+  } loc(#loc55)
+  tt.func private @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32S64_64S__(%x: tensor<64x64xf32> loc("x"(#loc59))) -> tensor<64x64xf32> attributes {noinline = false} {
+    %0 = tt.call @"triton.language.standard.zeros____(0, 0)cconstexpr_1__(1,)cconstexpr_int1_"() : () -> tensor<1xi1> loc(#loc60)
+    %1 = arith.uitofp %0 : tensor<1xi1> to tensor<1xf32> loc(#loc61)
+    %2 = tt.expand_dims %1 {axis = 0 : i32} : tensor<1xf32> -> tensor<1x1xf32> loc(#loc61)
+    %3 = tt.broadcast %2 : tensor<1x1xf32> -> tensor<64x64xf32> loc(#loc61)
+    %4 = arith.addf %x, %3 : tensor<64x64xf32> loc(#loc61)
+    tt.return %4 : tensor<64x64xf32> loc(#loc62)
+  ^bb1:  // no predecessors
+    %5 = ub.poison : tensor<64x64xf32> loc(#loc63)
+    tt.return %5 : tensor<64x64xf32> loc(#loc63)
+  } loc(#loc59)
+  tt.func private @"triton.language.standard.zeros____(0, 0)cconstexpr_1__(1,)cconstexpr_int1_"() -> tensor<1xi1> attributes {noinline = false} {
+    %false = arith.constant false loc(#loc65)
+    %cst = arith.constant dense<false> : tensor<1xi1> loc(#loc65)
+    tt.return %cst : tensor<1xi1> loc(#loc66)
+  ^bb1:  // no predecessors
+    %0 = ub.poison : tensor<1xi1> loc(#loc67)
+    tt.return %0 : tensor<1xi1> loc(#loc67)
+  } loc(#loc64)
+  tt.func private @"torch._inductor.runtime.triton_helpers.max_with_index__fp32S64_64S_i32S64_64S__(2,)cconstexpr_1_"(%value: tensor<64x64xf32> loc("value"(#loc68)), %index: tensor<64x64xi32> loc("index"(#loc68))) -> (tensor<64xf32>, tensor<64xi32>) attributes {noinline = false} {
+    %0:2 = "tt.reduce"(%value, %index) <{axis = 1 : i32}> ({
+    ^bb0(%arg2: f32 loc(unknown), %arg3: i32 loc(unknown), %arg4: f32 loc(unknown), %arg5: i32 loc(unknown)):
+      %3:2 = tt.call @torch._inductor.runtime.triton_helpers.maximum_with_index__fp32_i32_fp32_i32__(%arg2, %arg3, %arg4, %arg5) : (f32, i32, f32, i32) -> (f32, i32) loc(#loc69)
+      tt.reduce.return %3#0, %3#1 : f32, i32 loc(#loc69)
+    }) : (tensor<64x64xf32>, tensor<64x64xi32>) -> (tensor<64xf32>, tensor<64xi32>) loc(#loc69)
+    tt.return %0#0, %0#1 : tensor<64xf32>, tensor<64xi32> loc(#loc70)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : tensor<64xf32> loc(#loc71)
+    %2 = ub.poison : tensor<64xi32> loc(#loc71)
+    tt.return %1, %2 : tensor<64xf32>, tensor<64xi32> loc(#loc71)
+  } loc(#loc68)
+  tt.func private @torch._inductor.runtime.triton_helpers.maximum_with_index__fp32_i32_fp32_i32__(%a_value: f32 loc("a_value"(#loc35)), %a_index: i32 loc("a_index"(#loc35)), %b_value: f32 loc("b_value"(#loc35)), %b_index: i32 loc("b_index"(#loc35))) -> (f32, i32) attributes {noinline = false} {
+    %mask = arith.cmpf ogt, %a_value, %b_value : f32 loc(#loc127)
+    %equal = arith.cmpf oeq, %a_value, %b_value : f32 loc(#loc128)
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.is_floating__fp32__(%a_value) : (f32) -> i1 loc(#loc38)
+    %1:2 = scf.if %0 -> (i1, i1) {
+      %a_isnan = arith.cmpf une, %a_value, %a_value : f32 loc(#loc112)
+      %b_isnan = arith.cmpf une, %b_value, %b_value : f32 loc(#loc113)
+      %mask_3 = arith.constant true loc(#loc114)
+      %mask_4 = arith.xori %b_isnan, %mask_3 : i1 loc(#loc114)
+      %mask_5 = arith.andi %a_isnan, %mask_4 : i1 loc(#loc115)
+      %mask_6 = arith.ori %mask, %mask_5 : i1 loc(#loc129)
+      %equal_7 = arith.andi %a_isnan, %b_isnan : i1 loc(#loc117)
+      %equal_8 = arith.ori %equal, %equal_7 : i1 loc(#loc130)
+      scf.yield %mask_6, %equal_8 : i1, i1 loc(#loc130)
+    } else {
+      scf.yield %mask, %equal : i1, i1 loc(#loc47)
+    } loc(#loc39)
+    %mask_0 = arith.cmpi slt, %a_index, %b_index : i32 loc(#loc119)
+    %mask_1 = arith.andi %1#1, %mask_0 : i1 loc(#loc120)
+    %mask_2 = arith.ori %1#0, %mask_1 : i1 loc(#loc121)
+    %2 = arith.select %mask_2, %a_value, %b_value : f32 loc(#loc51)
+    %3 = arith.select %mask_2, %a_index, %b_index : i32 loc(#loc52)
+    tt.return %2, %3 : f32, i32 loc(#loc53)
+  ^bb1:  // no predecessors
+    %4 = ub.poison : f32 loc(#loc54)
+    %5 = ub.poison : i32 loc(#loc54)
+    tt.return %4, %5 : f32, i32 loc(#loc54)
+  } loc(#loc35)
+  tt.func private @torch._inductor.runtime.triton_helpers.is_floating__fp32__(%x: f32 loc("x"(#loc55))) -> i1 attributes {noinline = false} {
+    %0 = tt.call @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32__(%x) : (f32) -> tensor<1xf32> loc(#loc56)
+    %true = arith.constant true loc(#loc57)
+    tt.return %true : i1 loc(#loc57)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : i1 loc(#loc58)
+    tt.return %1 : i1 loc(#loc58)
+  } loc(#loc55)
+  tt.func private @torch._inductor.runtime.triton_helpers.promote_to_tensor__fp32__(%x: f32 loc("x"(#loc59))) -> tensor<1xf32> attributes {noinline = false} {
+    %0 = tt.call @"triton.language.standard.zeros____(0, 0)cconstexpr_1__(1,)cconstexpr_int1_"() : () -> tensor<1xi1> loc(#loc60)
+    %1 = arith.uitofp %0 : tensor<1xi1> to tensor<1xf32> loc(#loc61)
+    %2 = tt.splat %x : f32 -> tensor<1xf32> loc(#loc61)
+    %3 = arith.addf %2, %1 : tensor<1xf32> loc(#loc61)
+    tt.return %3 : tensor<1xf32> loc(#loc62)
+  ^bb1:  // no predecessors
+    %4 = ub.poison : tensor<1xf32> loc(#loc63)
+    tt.return %4 : tensor<1xf32> loc(#loc63)
+  } loc(#loc59)
+} loc(#loc)
+#loc1 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":19:15)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:28)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:33)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:36)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:44)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:23)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":24:21)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":25:27)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":25:37)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":27:19)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":28:19)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":29:55)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":30:58)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":32:40)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":33:31)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":34:29)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:47)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:41)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:56)
+#loc20 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:52)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:34)
+#loc22 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:71)
+#loc23 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:61)
+#loc24 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":41:38)
+#loc25 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":43:35)
+#loc26 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":43:54)
+#loc27 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:41)
+#loc28 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:66)
+#loc29 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:8)
+#loc30 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":45:75)
+#loc31 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":46:20)
+#loc32 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:25)
+#loc33 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:36)
+#loc34 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:4)
+#loc36 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":144:21)
+#loc37 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":145:23)
+#loc38 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":146:19)
+#loc39 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":146:7)
+#loc40 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":147:29)
+#loc41 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":148:29)
+#loc42 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:31)
+#loc43 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:27)
+#loc44 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:16)
+#loc45 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:27)
+#loc46 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:17)
+#loc48 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:31)
+#loc49 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:21)
+#loc50 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:12)
+#loc51 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:35)
+#loc52 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:69)
+#loc53 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:11)
+#loc54 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:4)
+#loc56 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:29)
+#loc57 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:11)
+#loc58 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":87:4)
+#loc60 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:30)
+#loc61 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:15)
+#loc62 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:11)
+#loc63 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":65:4)
+#loc64 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":118:0)
+#loc65 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:31)
+#loc66 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:11)
+#loc67 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":127:4)
+#loc69 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":165:42)
+#loc70 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":165:11)
+#loc71 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":165:4)
+#loc78 = loc("r0_numel"(#loc1))
+#loc79 = loc("xoffset"(#loc2))
+#loc80 = loc("xoffset"(#loc3))
+#loc81 = loc("xindex"(#loc4))
+#loc82 = loc("xindex"(#loc5))
+#loc83 = loc("xindex"(#loc6))
+#loc84 = loc("xmask"(#loc7))
+#loc85 = loc("r0_base"(#loc8))
+#loc86 = loc("r0_base"(#loc9))
+#loc87 = loc("x0"(#loc10))
+#loc88 = loc("x1"(#loc11))
+#loc89 = loc("_tmp2"(#loc12))
+#loc90 = loc("_tmp2_index"(#loc13))
+#loc91 = loc("_tmp2"(#loc14))
+#loc92 = loc("r0_index"(#loc15))
+#loc93 = loc("r0_mask"(#loc16))
+#loc94 = loc("tmp0"(#loc17))
+#loc95 = loc("tmp0"(#loc18))
+#loc96 = loc("tmp0"(#loc19))
+#loc97 = loc("tmp0"(#loc20))
+#loc98 = loc("tmp0"(#loc21))
+#loc99 = loc("tmp0"(#loc22))
+#loc100 = loc("tmp0"(#loc23))
+#loc101 = loc("_tmp2"(#loc25))
+#loc102 = loc("_tmp2"(#loc26))
+#loc103 = loc("_tmp2_index"(#loc27))
+#loc104 = loc("_tmp2_index"(#loc28))
+#loc105 = loc("tmp2"(#loc31))
+#loc110 = loc("mask"(#loc36))
+#loc111 = loc("equal"(#loc37))
+#loc112 = loc("a_isnan"(#loc40))
+#loc113 = loc("b_isnan"(#loc41))
+#loc114 = loc("mask"(#loc42))
+#loc115 = loc("mask"(#loc43))
+#loc116 = loc("mask"(#loc44))
+#loc117 = loc("equal"(#loc45))
+#loc118 = loc("equal"(#loc46))
+#loc119 = loc("mask"(#loc48))
+#loc120 = loc("mask"(#loc49))
+#loc121 = loc("mask"(#loc50))
+#loc126 = loc("_tmp2_index"(#loc91))
+#loc127 = loc("mask"(#loc110))
+#loc128 = loc("equal"(#loc111))
+#loc129 = loc("mask"(#loc116))
+#loc130 = loc("equal"(#loc118))

SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.ttgir

@@ -0,0 +1,217 @@
+#blocked = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 32], warpsPerCTA = [8, 2], order = [1, 0]}>
+#blocked1 = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [32, 1], warpsPerCTA = [2, 8], order = [0, 1]}>
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":18:0)
+#loc1 = loc(unknown)
+#loc39 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":45:75)
+#loc44 = loc("in_ptr0"(#loc))
+#loc45 = loc("out_ptr0"(#loc))
+#loc46 = loc("ks0"(#loc))
+#loc47 = loc("ks1"(#loc))
+#loc48 = loc("xnumel"(#loc))
+#loc49 = loc("r0_numel"(#loc))
+#loc85 = loc(callsite(#loc1 at #loc39))
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 16 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_red_fused_argmax_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr0: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %xnumel: i32 loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %cst = arith.constant dense<32000> : tensor<64x1xi64, #blocked> loc(#loc1)
+    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x64xf32, #blocked> loc(#loc1)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc1)
+    %c32000_i32 = arith.constant 32000 : i32 loc(#loc1)
+    %cst_1 = arith.constant dense<true> : tensor<64x64xi1, #blocked> loc(#loc1)
+    %true = arith.constant true loc(#loc1)
+    %cst_2 = arith.constant dense<32000> : tensor<1x64xi32, #blocked> loc(#loc1)
+    %cst_3 = arith.constant dense<2147483647> : tensor<64x64xi32, #blocked> loc(#loc1)
+    %cst_4 = arith.constant dense<0xFF800000> : tensor<64x64xf32, #blocked> loc(#loc1)
+    %c64_i32 = arith.constant 64 : i32 loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc50)
+    %xoffset_5 = arith.muli %xoffset, %c64_i32 : i32 loc(#loc51)
+    %xindex = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc52)
+    %xindex_6 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc52)
+    %xindex_7 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64x1xi32, #blocked> loc(#loc52)
+    %xindex_8 = tt.expand_dims %xindex_6 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<64x1xi32, #blocked1> loc(#loc52)
+    %xindex_9 = tt.splat %xoffset_5 : i32 -> tensor<64x1xi32, #blocked> loc(#loc53)
+    %xindex_10 = tt.splat %xoffset_5 : i32 -> tensor<64x1xi32, #blocked1> loc(#loc53)
+    %xindex_11 = arith.addi %xindex_9, %xindex_7 : tensor<64x1xi32, #blocked> loc(#loc53)
+    %xindex_12 = arith.addi %xindex_10, %xindex_8 : tensor<64x1xi32, #blocked1> loc(#loc53)
+    %xmask = tt.splat %xnumel : i32 -> tensor<64x1xi32, #blocked> loc(#loc54)
+    %xmask_13 = tt.splat %xnumel : i32 -> tensor<64x1xi32, #blocked1> loc(#loc54)
+    %xmask_14 = arith.cmpi slt, %xindex_11, %xmask : tensor<64x1xi32, #blocked> loc(#loc54)
+    %xmask_15 = arith.cmpi slt, %xindex_12, %xmask_13 : tensor<64x1xi32, #blocked1> loc(#loc54)
+    %r0_base = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 0, parent = #blocked}>> loc(#loc55)
+    %r0_base_16 = tt.expand_dims %r0_base {axis = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 0, parent = #blocked}>> -> tensor<1x64xi32, #blocked> loc(#loc55)
+    %x0 = arith.extsi %xindex_11 : tensor<64x1xi32, #blocked> to tensor<64x1xi64, #blocked> loc(#loc56)
+    %x0_17 = tt.splat %ks0 : i64 -> tensor<64x1xi64, #blocked> loc(#loc56)
+    %x0_18 = arith.remsi %x0, %x0_17 : tensor<64x1xi64, #blocked> loc(#loc56)
+    %x1 = arith.divsi %x0, %x0_17 : tensor<64x1xi64, #blocked> loc(#loc57)
+    %tmp0 = arith.muli %x0_18, %cst : tensor<64x1xi64, #blocked> loc(#loc58)
+    %tmp0_19 = tt.broadcast %tmp0 : tensor<64x1xi64, #blocked> -> tensor<64x64xi64, #blocked> loc(#loc59)
+    %tmp0_20 = tt.splat %ks1 : i64 -> tensor<64x1xi64, #blocked> loc(#loc60)
+    %tmp0_21 = arith.muli %tmp0_20, %x1 : tensor<64x1xi64, #blocked> loc(#loc60)
+    %tmp0_22 = tt.broadcast %tmp0_21 : tensor<64x1xi64, #blocked> -> tensor<64x64xi64, #blocked> loc(#loc61)
+    %tmp0_23 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<64x64x!tt.ptr<f32>, #blocked> loc(#loc62)
+    %tmp0_24 = tt.broadcast %xmask_14 : tensor<64x1xi1, #blocked> -> tensor<64x64xi1, #blocked> loc(#loc63)
+    %_tmp2_index:2 = scf.for %r0_offset = %c0_i32 to %c32000_i32 step %c64_i32 iter_args(%_tmp2 = %cst_4, %_tmp2_index_25 = %cst_3) -> (tensor<64x64xf32, #blocked>, tensor<64x64xi32, #blocked>)  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x64xi32, #blocked> loc(#loc65)
+      %r0_index_26 = arith.addi %r0_index, %r0_base_16 : tensor<1x64xi32, #blocked> loc(#loc65)
+      %r0_mask = arith.cmpi slt, %r0_index_26, %cst_2 : tensor<1x64xi32, #blocked> loc(#loc66)
+      %tmp0_27 = arith.extsi %r0_index_26 : tensor<1x64xi32, #blocked> to tensor<1x64xi64, #blocked> loc(#loc59)
+      %tmp0_28 = tt.broadcast %tmp0_27 : tensor<1x64xi64, #blocked> -> tensor<64x64xi64, #blocked> loc(#loc59)
+      %tmp0_29 = arith.addi %tmp0_28, %tmp0_19 : tensor<64x64xi64, #blocked> loc(#loc59)
+      %tmp0_30 = arith.addi %tmp0_29, %tmp0_22 : tensor<64x64xi64, #blocked> loc(#loc61)
+      %tmp0_31 = tt.addptr %tmp0_23, %tmp0_30 : tensor<64x64x!tt.ptr<f32>, #blocked>, tensor<64x64xi64, #blocked> loc(#loc62)
+      %tmp0_32 = tt.broadcast %r0_mask : tensor<1x64xi1, #blocked> -> tensor<64x64xi1, #blocked> loc(#loc63)
+      %tmp0_33 = arith.andi %tmp0_32, %tmp0_24 : tensor<64x64xi1, #blocked> loc(#loc63)
+      %tmp0_34 = tt.load %tmp0_31, %tmp0_33, %cst_0 evictionPolicy = evict_first : tensor<64x64x!tt.ptr<f32>, #blocked> loc(#loc67)
+      %mask = arith.cmpf ogt, %_tmp2, %tmp0_34 : tensor<64x64xf32, #blocked> loc(#loc110)
+      %equal = arith.cmpf oeq, %_tmp2, %tmp0_34 : tensor<64x64xf32, #blocked> loc(#loc111)
+      %a_isnan = arith.cmpf une, %_tmp2, %_tmp2 : tensor<64x64xf32, #blocked> loc(#loc90)
+      %b_isnan = arith.cmpf une, %tmp0_34, %tmp0_34 : tensor<64x64xf32, #blocked> loc(#loc91)
+      %mask_35 = arith.xori %b_isnan, %cst_1 : tensor<64x64xi1, #blocked> loc(#loc92)
+      %mask_36 = arith.andi %a_isnan, %mask_35 : tensor<64x64xi1, #blocked> loc(#loc93)
+      %mask_37 = arith.ori %mask, %mask_36 : tensor<64x64xi1, #blocked> loc(#loc112)
+      %equal_38 = arith.andi %a_isnan, %b_isnan : tensor<64x64xi1, #blocked> loc(#loc95)
+      %equal_39 = arith.ori %equal, %equal_38 : tensor<64x64xi1, #blocked> loc(#loc113)
+      %mask_40 = tt.broadcast %r0_index_26 : tensor<1x64xi32, #blocked> -> tensor<64x64xi32, #blocked> loc(#loc97)
+      %mask_41 = arith.cmpi slt, %_tmp2_index_25, %mask_40 : tensor<64x64xi32, #blocked> loc(#loc97)
+      %mask_42 = arith.andi %equal_39, %mask_41 : tensor<64x64xi1, #blocked> loc(#loc98)
+      %mask_43 = arith.ori %mask_37, %mask_42 : tensor<64x64xi1, #blocked> loc(#loc99)
+      %5 = arith.select %mask_43, %_tmp2, %tmp0_34 : tensor<64x64xi1, #blocked>, tensor<64x64xf32, #blocked> loc(#loc80)
+      %6 = arith.select %mask_43, %_tmp2_index_25, %mask_40 : tensor<64x64xi1, #blocked>, tensor<64x64xi32, #blocked> loc(#loc81)
+      %_tmp2_44 = arith.select %tmp0_33, %5, %_tmp2 : tensor<64x64xi1, #blocked>, tensor<64x64xf32, #blocked> loc(#loc82)
+      %_tmp2_index_45 = arith.select %tmp0_33, %6, %_tmp2_index_25 : tensor<64x64xi1, #blocked>, tensor<64x64xi32, #blocked> loc(#loc83)
+      scf.yield %_tmp2_44, %_tmp2_index_45 : tensor<64x64xf32, #blocked>, tensor<64x64xi32, #blocked> loc(#loc37)
+    } loc(#loc87)
+    %0:2 = "tt.reduce"(%_tmp2_index#0, %_tmp2_index#1) <{axis = 1 : i32}> ({
+    ^bb0(%arg6: f32 loc(callsite(#loc1 at #loc39)), %arg7: i32 loc(callsite(#loc1 at #loc39)), %arg8: f32 loc(callsite(#loc1 at #loc39)), %arg9: i32 loc(callsite(#loc1 at #loc39))):
+      %mask = arith.cmpf ogt, %arg6, %arg8 : f32 loc(#loc114)
+      %equal = arith.cmpf oeq, %arg6, %arg8 : f32 loc(#loc115)
+      %a_isnan = arith.cmpf une, %arg6, %arg6 : f32 loc(#loc100)
+      %b_isnan = arith.cmpf une, %arg8, %arg8 : f32 loc(#loc101)
+      %mask_25 = arith.xori %b_isnan, %true : i1 loc(#loc102)
+      %mask_26 = arith.andi %a_isnan, %mask_25 : i1 loc(#loc103)
+      %mask_27 = arith.ori %mask, %mask_26 : i1 loc(#loc116)
+      %equal_28 = arith.andi %a_isnan, %b_isnan : i1 loc(#loc104)
+      %equal_29 = arith.ori %equal, %equal_28 : i1 loc(#loc117)
+      %mask_30 = arith.cmpi slt, %arg7, %arg9 : i32 loc(#loc105)
+      %mask_31 = arith.andi %equal_29, %mask_30 : i1 loc(#loc106)
+      %mask_32 = arith.ori %mask_27, %mask_31 : i1 loc(#loc107)
+      %5 = arith.select %mask_32, %arg6, %arg8 : f32 loc(#loc108)
+      %6 = arith.select %mask_32, %arg7, %arg9 : i32 loc(#loc109)
+      tt.reduce.return %5, %6 : f32, i32 loc(#loc84)
+    }) : (tensor<64x64xf32, #blocked>, tensor<64x64xi32, #blocked>) -> (tensor<64xf32, #ttg.slice<{dim = 1, parent = #blocked}>>, tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>>) loc(#loc84)
+    %tmp2 = tt.expand_dims %0#1 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64x1xi32, #blocked> loc(#loc86)
+    %1 = tt.splat %out_ptr0 : !tt.ptr<i64> -> tensor<64x1x!tt.ptr<i64>, #blocked1> loc(#loc41)
+    %2 = tt.addptr %1, %xindex_12 : tensor<64x1x!tt.ptr<i64>, #blocked1>, tensor<64x1xi32, #blocked1> loc(#loc41)
+    %3 = ttg.convert_layout %tmp2 : tensor<64x1xi32, #blocked> -> tensor<64x1xi32, #blocked1> loc(#loc42)
+    %4 = arith.extsi %3 : tensor<64x1xi32, #blocked1> to tensor<64x1xi64, #blocked1> loc(#loc42)
+    tt.store %2, %4, %xmask_15 : tensor<64x1x!tt.ptr<i64>, #blocked1> loc(#loc42)
+    tt.return loc(#loc43)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:28)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:33)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:44)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:23)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":24:21)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":25:37)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":27:19)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":28:19)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:47)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:41)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:56)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:52)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:34)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:71)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":32:40)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":33:31)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":34:29)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:61)
+#loc20 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":144:21)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":41:38)
+#loc22 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":145:23)
+#loc23 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":147:29)
+#loc24 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":148:29)
+#loc25 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:31)
+#loc26 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:27)
+#loc27 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:16)
+#loc28 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:27)
+#loc29 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:17)
+#loc30 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:31)
+#loc31 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:21)
+#loc32 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:12)
+#loc33 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:35)
+#loc34 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:69)
+#loc35 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":43:54)
+#loc36 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:66)
+#loc37 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:8)
+#loc38 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":165:42)
+#loc40 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":46:20)
+#loc41 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:25)
+#loc42 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:36)
+#loc43 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:4)
+#loc50 = loc("xoffset"(#loc2))
+#loc51 = loc("xoffset"(#loc3))
+#loc52 = loc("xindex"(#loc4))
+#loc53 = loc("xindex"(#loc5))
+#loc54 = loc("xmask"(#loc6))
+#loc55 = loc("r0_base"(#loc7))
+#loc56 = loc("x0"(#loc8))
+#loc57 = loc("x1"(#loc9))
+#loc58 = loc("tmp0"(#loc10))
+#loc59 = loc("tmp0"(#loc11))
+#loc60 = loc("tmp0"(#loc12))
+#loc61 = loc("tmp0"(#loc13))
+#loc62 = loc("tmp0"(#loc14))
+#loc63 = loc("tmp0"(#loc15))
+#loc64 = loc("_tmp2"(#loc16))
+#loc65 = loc("r0_index"(#loc17))
+#loc66 = loc("r0_mask"(#loc18))
+#loc67 = loc("tmp0"(#loc19))
+#loc68 = loc("mask"(#loc20))
+#loc69 = loc("equal"(#loc22))
+#loc70 = loc("a_isnan"(#loc23))
+#loc71 = loc("b_isnan"(#loc24))
+#loc72 = loc("mask"(#loc25))
+#loc73 = loc("mask"(#loc26))
+#loc74 = loc("mask"(#loc27))
+#loc75 = loc("equal"(#loc28))
+#loc76 = loc("equal"(#loc29))
+#loc77 = loc("mask"(#loc30))
+#loc78 = loc("mask"(#loc31))
+#loc79 = loc("mask"(#loc32))
+#loc80 = loc(callsite(#loc33 at #loc21))
+#loc81 = loc(callsite(#loc34 at #loc21))
+#loc82 = loc("_tmp2"(#loc35))
+#loc83 = loc("_tmp2_index"(#loc36))
+#loc84 = loc(callsite(#loc38 at #loc39))
+#loc86 = loc("tmp2"(#loc40))
+#loc87 = loc("_tmp2_index"(#loc64))
+#loc88 = loc("mask"(#loc68))
+#loc89 = loc("equal"(#loc69))
+#loc90 = loc(callsite(#loc70 at #loc21))
+#loc91 = loc(callsite(#loc71 at #loc21))
+#loc92 = loc(callsite(#loc72 at #loc21))
+#loc93 = loc(callsite(#loc73 at #loc21))
+#loc94 = loc("mask"(#loc74))
+#loc95 = loc(callsite(#loc75 at #loc21))
+#loc96 = loc("equal"(#loc76))
+#loc97 = loc(callsite(#loc77 at #loc21))
+#loc98 = loc(callsite(#loc78 at #loc21))
+#loc99 = loc(callsite(#loc79 at #loc21))
+#loc100 = loc(callsite(#loc70 at #loc84))
+#loc101 = loc(callsite(#loc71 at #loc84))
+#loc102 = loc(callsite(#loc72 at #loc84))
+#loc103 = loc(callsite(#loc73 at #loc84))
+#loc104 = loc(callsite(#loc75 at #loc84))
+#loc105 = loc(callsite(#loc77 at #loc84))
+#loc106 = loc(callsite(#loc78 at #loc84))
+#loc107 = loc(callsite(#loc79 at #loc84))
+#loc108 = loc(callsite(#loc33 at #loc84))
+#loc109 = loc(callsite(#loc34 at #loc84))
+#loc110 = loc(callsite(#loc88 at #loc21))
+#loc111 = loc(callsite(#loc89 at #loc21))
+#loc112 = loc(callsite(#loc94 at #loc21))
+#loc113 = loc(callsite(#loc96 at #loc21))
+#loc114 = loc(callsite(#loc88 at #loc84))
+#loc115 = loc(callsite(#loc89 at #loc84))
+#loc116 = loc(callsite(#loc94 at #loc84))
+#loc117 = loc(callsite(#loc96 at #loc84))

SpecForge-ext/cache/compiled_kernels/triton/7/BZGMO2ROUNNVUMEUFCQSSF6FGNZS2MEIPAEECDHYOJVVX3KB75AA/triton_red_fused_argmax_1.ttir

@@ -0,0 +1,213 @@
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":18:0)
+#loc1 = loc(unknown)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":45:75)
+#loc47 = loc("in_ptr0"(#loc))
+#loc48 = loc("out_ptr0"(#loc))
+#loc49 = loc("ks0"(#loc))
+#loc50 = loc("ks1"(#loc))
+#loc51 = loc("xnumel"(#loc))
+#loc52 = loc("r0_numel"(#loc))
+#loc53 = loc(callsite(#loc1 at #loc2))
+module {
+  tt.func public @triton_red_fused_argmax_1(%in_ptr0: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr0: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("out_ptr0"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %xnumel: i32 loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %true = arith.constant true loc(#loc53)
+    %cst = arith.constant dense<true> : tensor<64x64xi1> loc(#loc1)
+    %c32000_i32 = arith.constant 32000 : i32 loc(#loc3)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc3)
+    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x64xf32> loc(#loc1)
+    %cst_1 = arith.constant dense<32000> : tensor<64x1xi64> loc(#loc1)
+    %cst_2 = arith.constant dense<32000> : tensor<1x64xi32> loc(#loc1)
+    %_tmp2_index = arith.constant dense<2147483647> : tensor<64x64xi32> loc(#loc54)
+    %_tmp2 = arith.constant dense<0xFF800000> : tensor<64x64xf32> loc(#loc55)
+    %c64_i32 = arith.constant 64 : i32 loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc56)
+    %xoffset_3 = arith.muli %xoffset, %c64_i32 : i32 loc(#loc57)
+    %xindex = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32> loc(#loc58)
+    %xindex_4 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc59)
+    %xindex_5 = tt.splat %xoffset_3 : i32 -> tensor<64x1xi32> loc(#loc60)
+    %xindex_6 = arith.addi %xindex_5, %xindex_4 : tensor<64x1xi32> loc(#loc60)
+    %xmask = tt.splat %xnumel : i32 -> tensor<64x1xi32> loc(#loc61)
+    %xmask_7 = arith.cmpi slt, %xindex_6, %xmask : tensor<64x1xi32> loc(#loc61)
+    %r0_base = tt.expand_dims %xindex {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32> loc(#loc62)
+    %x0 = arith.extsi %xindex_6 : tensor<64x1xi32> to tensor<64x1xi64> loc(#loc63)
+    %x0_8 = tt.splat %ks0 : i64 -> tensor<64x1xi64> loc(#loc63)
+    %x0_9 = arith.remsi %x0, %x0_8 : tensor<64x1xi64> loc(#loc63)
+    %x1 = arith.divsi %x0, %x0_8 : tensor<64x1xi64> loc(#loc64)
+    %_tmp2_index_10:2 = scf.for %r0_offset = %c0_i32 to %c32000_i32 step %c64_i32 iter_args(%_tmp2_11 = %_tmp2, %_tmp2_index_12 = %_tmp2_index) -> (tensor<64x64xf32>, tensor<64x64xi32>)  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x64xi32> loc(#loc66)
+      %r0_index_13 = arith.addi %r0_index, %r0_base : tensor<1x64xi32> loc(#loc66)
+      %r0_mask = arith.cmpi slt, %r0_index_13, %cst_2 : tensor<1x64xi32> loc(#loc67)
+      %tmp0 = arith.muli %x0_9, %cst_1 : tensor<64x1xi64> loc(#loc68)
+      %tmp0_14 = arith.extsi %r0_index_13 : tensor<1x64xi32> to tensor<1x64xi64> loc(#loc69)
+      %tmp0_15 = tt.broadcast %tmp0_14 : tensor<1x64xi64> -> tensor<64x64xi64> loc(#loc69)
+      %tmp0_16 = tt.broadcast %tmp0 : tensor<64x1xi64> -> tensor<64x64xi64> loc(#loc69)
+      %tmp0_17 = arith.addi %tmp0_15, %tmp0_16 : tensor<64x64xi64> loc(#loc69)
+      %tmp0_18 = tt.splat %ks1 : i64 -> tensor<64x1xi64> loc(#loc70)
+      %tmp0_19 = arith.muli %tmp0_18, %x1 : tensor<64x1xi64> loc(#loc70)
+      %tmp0_20 = tt.broadcast %tmp0_19 : tensor<64x1xi64> -> tensor<64x64xi64> loc(#loc71)
+      %tmp0_21 = arith.addi %tmp0_17, %tmp0_20 : tensor<64x64xi64> loc(#loc71)
+      %tmp0_22 = tt.splat %in_ptr0 : !tt.ptr<f32> -> tensor<64x64x!tt.ptr<f32>> loc(#loc72)
+      %tmp0_23 = tt.addptr %tmp0_22, %tmp0_21 : tensor<64x64x!tt.ptr<f32>>, tensor<64x64xi64> loc(#loc72)
+      %tmp0_24 = tt.broadcast %r0_mask : tensor<1x64xi1> -> tensor<64x64xi1> loc(#loc73)
+      %tmp0_25 = tt.broadcast %xmask_7 : tensor<64x1xi1> -> tensor<64x64xi1> loc(#loc73)
+      %tmp0_26 = arith.andi %tmp0_24, %tmp0_25 : tensor<64x64xi1> loc(#loc73)
+      %tmp0_27 = tt.load %tmp0_23, %tmp0_26, %cst_0 evictionPolicy = evict_first : tensor<64x64x!tt.ptr<f32>> loc(#loc74)
+      %mask = arith.cmpf ogt, %_tmp2_11, %tmp0_27 : tensor<64x64xf32> loc(#loc116)
+      %equal = arith.cmpf oeq, %_tmp2_11, %tmp0_27 : tensor<64x64xf32> loc(#loc117)
+      %a_isnan = arith.cmpf une, %_tmp2_11, %_tmp2_11 : tensor<64x64xf32> loc(#loc96)
+      %b_isnan = arith.cmpf une, %tmp0_27, %tmp0_27 : tensor<64x64xf32> loc(#loc97)
+      %mask_28 = arith.xori %b_isnan, %cst : tensor<64x64xi1> loc(#loc98)
+      %mask_29 = arith.andi %a_isnan, %mask_28 : tensor<64x64xi1> loc(#loc99)
+      %mask_30 = arith.ori %mask, %mask_29 : tensor<64x64xi1> loc(#loc118)
+      %equal_31 = arith.andi %a_isnan, %b_isnan : tensor<64x64xi1> loc(#loc101)
+      %equal_32 = arith.ori %equal, %equal_31 : tensor<64x64xi1> loc(#loc119)
+      %mask_33 = tt.broadcast %r0_index_13 : tensor<1x64xi32> -> tensor<64x64xi32> loc(#loc103)
+      %mask_34 = arith.cmpi slt, %_tmp2_index_12, %mask_33 : tensor<64x64xi32> loc(#loc103)
+      %mask_35 = arith.andi %equal_32, %mask_34 : tensor<64x64xi1> loc(#loc104)
+      %mask_36 = arith.ori %mask_30, %mask_35 : tensor<64x64xi1> loc(#loc105)
+      %4 = arith.select %mask_36, %_tmp2_11, %tmp0_27 : tensor<64x64xi1>, tensor<64x64xf32> loc(#loc87)
+      %5 = arith.select %mask_36, %_tmp2_index_12, %mask_33 : tensor<64x64xi1>, tensor<64x64xi32> loc(#loc88)
+      %_tmp2_37 = arith.select %tmp0_26, %4, %_tmp2_11 : tensor<64x64xi1>, tensor<64x64xf32> loc(#loc89)
+      %_tmp2_index_38 = arith.select %tmp0_26, %5, %_tmp2_index_12 : tensor<64x64xi1>, tensor<64x64xi32> loc(#loc90)
+      scf.yield %_tmp2_37, %_tmp2_index_38 : tensor<64x64xf32>, tensor<64x64xi32> loc(#loc41)
+    } loc(#loc93)
+    %0:2 = "tt.reduce"(%_tmp2_index_10#0, %_tmp2_index_10#1) <{axis = 1 : i32}> ({
+    ^bb0(%arg6: f32 loc(callsite(#loc1 at #loc2)), %arg7: i32 loc(callsite(#loc1 at #loc2)), %arg8: f32 loc(callsite(#loc1 at #loc2)), %arg9: i32 loc(callsite(#loc1 at #loc2))):
+      %mask = arith.cmpf ogt, %arg6, %arg8 : f32 loc(#loc120)
+      %equal = arith.cmpf oeq, %arg6, %arg8 : f32 loc(#loc121)
+      %a_isnan = arith.cmpf une, %arg6, %arg6 : f32 loc(#loc106)
+      %b_isnan = arith.cmpf une, %arg8, %arg8 : f32 loc(#loc107)
+      %mask_11 = arith.xori %b_isnan, %true : i1 loc(#loc108)
+      %mask_12 = arith.andi %a_isnan, %mask_11 : i1 loc(#loc109)
+      %mask_13 = arith.ori %mask, %mask_12 : i1 loc(#loc122)
+      %equal_14 = arith.andi %a_isnan, %b_isnan : i1 loc(#loc110)
+      %equal_15 = arith.ori %equal, %equal_14 : i1 loc(#loc123)
+      %mask_16 = arith.cmpi slt, %arg7, %arg9 : i32 loc(#loc111)
+      %mask_17 = arith.andi %equal_15, %mask_16 : i1 loc(#loc112)
+      %mask_18 = arith.ori %mask_13, %mask_17 : i1 loc(#loc113)
+      %4 = arith.select %mask_18, %arg6, %arg8 : f32 loc(#loc114)
+      %5 = arith.select %mask_18, %arg7, %arg9 : i32 loc(#loc115)
+      tt.reduce.return %4, %5 : f32, i32 loc(#loc91)
+    }) : (tensor<64x64xf32>, tensor<64x64xi32>) -> (tensor<64xf32>, tensor<64xi32>) loc(#loc91)
+    %tmp2 = tt.expand_dims %0#1 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc92)
+    %1 = tt.splat %out_ptr0 : !tt.ptr<i64> -> tensor<64x1x!tt.ptr<i64>> loc(#loc44)
+    %2 = tt.addptr %1, %xindex_6 : tensor<64x1x!tt.ptr<i64>>, tensor<64x1xi32> loc(#loc44)
+    %3 = arith.extsi %tmp2 : tensor<64x1xi32> to tensor<64x1xi64> loc(#loc45)
+    tt.store %2, %3, %xmask_7 : tensor<64x1x!tt.ptr<i64>> loc(#loc45)
+    tt.return loc(#loc46)
+  } loc(#loc)
+} loc(#loc)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":32:40)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":30:58)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":29:55)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:28)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":22:33)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:36)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:44)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":23:23)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":24:21)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":25:37)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":27:19)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":28:19)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":33:31)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":34:29)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:47)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:41)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:56)
+#loc20 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:52)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:34)
+#loc22 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:71)
+#loc23 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":38:61)
+#loc24 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":144:21)
+#loc25 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":41:38)
+#loc26 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":145:23)
+#loc27 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":147:29)
+#loc28 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":148:29)
+#loc29 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:31)
+#loc30 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:27)
+#loc31 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":149:16)
+#loc32 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:27)
+#loc33 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":151:17)
+#loc34 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:31)
+#loc35 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:21)
+#loc36 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":154:12)
+#loc37 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:35)
+#loc38 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":155:69)
+#loc39 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":43:54)
+#loc40 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:66)
+#loc41 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":44:8)
+#loc42 = loc("/workspace/specforge/lib/python3.11/site-packages/torch/_inductor/runtime/triton_helpers.py":165:42)
+#loc43 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":46:20)
+#loc44 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:25)
+#loc45 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:36)
+#loc46 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/4w/c4wdhwlu6yb3wcwazdnzmgzewiemvznxvrr3525eojupqjldo5pt.py":47:4)
+#loc54 = loc("_tmp2_index"(#loc4))
+#loc55 = loc("_tmp2"(#loc5))
+#loc56 = loc("xoffset"(#loc6))
+#loc57 = loc("xoffset"(#loc7))
+#loc58 = loc("xindex"(#loc8))
+#loc59 = loc("xindex"(#loc9))
+#loc60 = loc("xindex"(#loc10))
+#loc61 = loc("xmask"(#loc11))
+#loc62 = loc("r0_base"(#loc12))
+#loc63 = loc("x0"(#loc13))
+#loc64 = loc("x1"(#loc14))
+#loc65 = loc("_tmp2"(#loc3))
+#loc66 = loc("r0_index"(#loc15))
+#loc67 = loc("r0_mask"(#loc16))
+#loc68 = loc("tmp0"(#loc17))
+#loc69 = loc("tmp0"(#loc18))
+#loc70 = loc("tmp0"(#loc19))
+#loc71 = loc("tmp0"(#loc20))
+#loc72 = loc("tmp0"(#loc21))
+#loc73 = loc("tmp0"(#loc22))
+#loc74 = loc("tmp0"(#loc23))
+#loc75 = loc("mask"(#loc24))
+#loc76 = loc("equal"(#loc26))
+#loc77 = loc("a_isnan"(#loc27))
+#loc78 = loc("b_isnan"(#loc28))
+#loc79 = loc("mask"(#loc29))
+#loc80 = loc("mask"(#loc30))
+#loc81 = loc("mask"(#loc31))
+#loc82 = loc("equal"(#loc32))
+#loc83 = loc("equal"(#loc33))
+#loc84 = loc("mask"(#loc34))
+#loc85 = loc("mask"(#loc35))
+#loc86 = loc("mask"(#loc36))
+#loc87 = loc(callsite(#loc37 at #loc25))
+#loc88 = loc(callsite(#loc38 at #loc25))
+#loc89 = loc("_tmp2"(#loc39))
+#loc90 = loc("_tmp2_index"(#loc40))
+#loc91 = loc(callsite(#loc42 at #loc2))
+#loc92 = loc("tmp2"(#loc43))
+#loc93 = loc("_tmp2_index"(#loc65))
+#loc94 = loc("mask"(#loc75))
+#loc95 = loc("equal"(#loc76))
+#loc96 = loc(callsite(#loc77 at #loc25))
+#loc97 = loc(callsite(#loc78 at #loc25))
+#loc98 = loc(callsite(#loc79 at #loc25))
+#loc99 = loc(callsite(#loc80 at #loc25))
+#loc100 = loc("mask"(#loc81))
+#loc101 = loc(callsite(#loc82 at #loc25))
+#loc102 = loc("equal"(#loc83))
+#loc103 = loc(callsite(#loc84 at #loc25))
+#loc104 = loc(callsite(#loc85 at #loc25))
+#loc105 = loc(callsite(#loc86 at #loc25))
+#loc106 = loc(callsite(#loc77 at #loc91))
+#loc107 = loc(callsite(#loc78 at #loc91))
+#loc108 = loc(callsite(#loc79 at #loc91))
+#loc109 = loc(callsite(#loc80 at #loc91))
+#loc110 = loc(callsite(#loc82 at #loc91))
+#loc111 = loc(callsite(#loc84 at #loc91))
+#loc112 = loc(callsite(#loc85 at #loc91))
+#loc113 = loc(callsite(#loc86 at #loc91))
+#loc114 = loc(callsite(#loc37 at #loc91))
+#loc115 = loc(callsite(#loc38 at #loc91))
+#loc116 = loc(callsite(#loc94 at #loc25))
+#loc117 = loc(callsite(#loc95 at #loc25))
+#loc118 = loc(callsite(#loc100 at #loc25))
+#loc119 = loc(callsite(#loc102 at #loc25))
+#loc120 = loc(callsite(#loc94 at #loc91))
+#loc121 = loc(callsite(#loc95 at #loc91))
+#loc122 = loc(callsite(#loc100 at #loc91))
+#loc123 = loc(callsite(#loc102 at #loc91))

SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/__grp__triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.source": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.source", "triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.ttir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.ttir", "triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.ttgir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.ttgir", "triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.llir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.llir", "triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.ptx": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.ptx", "triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.cubin": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.cubin", "triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.json": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.json"}}

SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.llir

@@ -0,0 +1,318 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+target datalayout = "e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-p7:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"
+
+@global_smem = external addrspace(3) global [0 x i8], align 16
+
+; Function Attrs: nounwind
+define ptx_kernel void @triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1(ptr addrspace(1) %0, ptr addrspace(1) %1, ptr addrspace(1) %2, i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8, i32 %9, i32 %10, ptr addrspace(1) readnone captures(none) %11, ptr addrspace(1) readnone captures(none) %12) local_unnamed_addr #0 !dbg !4 {
+  %14 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !7
+  %15 = icmp slt i32 %14, %9, !dbg !8
+  %16 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !9
+  %17 = and i32 %16, 384, !dbg !9
+  %18 = zext nneg i32 %14 to i64, !dbg !10
+  %.frozen = freeze i64 %3, !dbg !10
+  %19 = sdiv i64 %18, %.frozen, !dbg !10
+  %20 = srem i64 %19, %4, !dbg !11
+  %21 = mul i64 %19, %.frozen, !dbg !12
+  %.decomposed = sub i64 %18, %21, !dbg !12
+  %22 = sdiv i64 %18, %7, !dbg !13
+  %23 = shl nsw i64 %20, 7, !dbg !14
+  %24 = shl nuw nsw i64 %.decomposed, 7, !dbg !15
+  %25 = getelementptr i64, ptr addrspace(1) %0, i64 %22, !dbg !16
+  %26 = and i32 %16, 127
+  %27 = zext nneg i32 %26 to i64
+  %28 = or disjoint i64 %24, %27
+  %29 = icmp slt i64 %28, %6
+  %30 = icmp sge i64 %28, %8
+  %31 = tail call i64 @llvm.smin.i64(i64 %8, i64 0)
+  %32 = sub nsw i64 %.decomposed, %20
+  %33 = shl nsw i64 %32, 7
+  %34 = zext nneg i32 %17 to i64, !dbg !17
+  %35 = zext nneg i32 %26 to i64, !dbg !17
+  %36 = zext nneg i32 %16 to i64, !dbg !17
+  %37 = insertelement <2 x i1> poison, i1 %15, i64 0, !dbg !18
+  %38 = shufflevector <2 x i1> %37, <2 x i1> poison, <2 x i32> zeroinitializer, !dbg !18
+  %39 = insertelement <2 x i1> poison, i1 %29, i64 0, !dbg !19
+  %40 = shufflevector <2 x i1> %39, <2 x i1> poison, <2 x i32> zeroinitializer, !dbg !19
+  %41 = insertelement <2 x i64> poison, i64 %23, i64 0, !dbg !20
+  %42 = shufflevector <2 x i64> %41, <2 x i64> poison, <2 x i32> zeroinitializer, !dbg !20
+  %43 = insertelement <2 x i64> poison, i64 %5, i64 0, !dbg !21
+  %44 = shufflevector <2 x i64> %43, <2 x i64> poison, <2 x i32> zeroinitializer, !dbg !21
+  %45 = insertelement <2 x i64> poison, i64 %28, i64 0, !dbg !22
+  %46 = shufflevector <2 x i64> %45, <2 x i64> poison, <2 x i32> zeroinitializer, !dbg !22
+  %47 = insertelement <2 x i1> poison, i1 %30, i64 0, !dbg !23
+  %48 = shufflevector <2 x i1> %47, <2 x i1> poison, <2 x i32> zeroinitializer, !dbg !23
+  %49 = insertelement <2 x i64> poison, i64 %33, i64 0, !dbg !24
+  %50 = shufflevector <2 x i64> %49, <2 x i64> poison, <2 x i32> zeroinitializer, !dbg !24
+  %51 = insertelement <2 x i64> poison, i64 %8, i64 0, !dbg !25
+  %52 = shufflevector <2 x i64> %51, <2 x i64> poison, <2 x i32> zeroinitializer, !dbg !25
+  br label %53, !dbg !17
+
+53:                                               ; preds = %13, %53
+  %indvars.iv = phi i64 [ 0, %13 ], [ %indvars.iv.next, %53 ]
+  %54 = phi <2 x i64> [ zeroinitializer, %13 ], [ %113, %53 ]
+  %55 = or disjoint i64 %indvars.iv, %34, !dbg !26
+  %56 = or disjoint i64 %indvars.iv, %36, !dbg !26
+  %57 = lshr exact i64 %55, 7, !dbg !27
+  %58 = lshr i64 %56, 7, !dbg !27
+  %59 = trunc nuw nsw i64 %58 to i32, !dbg !27
+  %60 = or i32 %59, 4, !dbg !27
+  %61 = zext nneg i32 %60 to i64, !dbg !20
+  %62 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_last.b64 $0, 1.0;", "=l"() #5, !dbg !28
+  %63 = sub nsw i64 %35, %57, !dbg !29
+  %64 = sub nsw i32 %26, %60, !dbg !29
+  %65 = sext i32 %64 to i64, !dbg !30
+  %66 = insertelement <2 x i64> poison, i64 %57, i64 0, !dbg !20
+  %67 = insertelement <2 x i64> %66, i64 %61, i64 1, !dbg !20
+  %68 = or disjoint <2 x i64> %42, %67, !dbg !20
+  %69 = icmp slt <2 x i64> %68, %44, !dbg !21
+  %70 = and <2 x i1> %40, %69, !dbg !19
+  %71 = icmp sge <2 x i64> %68, %46, !dbg !22
+  %72 = extractelement <2 x i1> %70, i64 0, !dbg !31
+  %73 = and i1 %15, %72, !dbg !31
+  %74 = extractelement <2 x i1> %70, i64 1, !dbg !31
+  %75 = and i1 %15, %74, !dbg !31
+  %76 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$3 ld.global.L1::evict_last.L2::cache_hint.b64 { $0 }, [ $1 + 0 ], $2;", "=l,l,l,b"(ptr addrspace(1) %25, i64 %62, i1 %73) #5, !dbg !28
+  %77 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09createpolicy.fractional.L2::evict_last.b64 $0, 1.0;", "=l"() #5, !dbg !28
+  %78 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$3 ld.global.L1::evict_last.L2::cache_hint.b64 { $0 }, [ $1 + 0 ], $2;", "=l,l,l,b"(ptr addrspace(1) %25, i64 %77, i1 %75) #5, !dbg !28
+  %79 = insertelement <2 x i64> poison, i64 %76, i64 0, !dbg !32
+  %80 = insertelement <2 x i64> %79, i64 %78, i64 1, !dbg !32
+  %81 = icmp slt <2 x i64> %46, %80, !dbg !32
+  %82 = icmp slt <2 x i64> %68, %80, !dbg !33
+  %83 = and <2 x i1> %81, %82, !dbg !34
+  %84 = and <2 x i1> %71, %83, !dbg !35
+  %85 = srem i64 %28, %8, !dbg !36
+  %.not = icmp eq i64 %85, 0, !dbg !37
+  %86 = select i1 %.not, i64 0, i64 %31, !dbg !38
+  %87 = add nsw i64 %86, %85, !dbg !38
+  %88 = insertelement <2 x i64> poison, i64 %87, i64 0, !dbg !39
+  %89 = shufflevector <2 x i64> %88, <2 x i64> poison, <2 x i32> zeroinitializer, !dbg !39
+  %90 = icmp slt <2 x i64> %89, %80, !dbg !39
+  %91 = insertelement <2 x i64> poison, i64 %63, i64 0, !dbg !24
+  %92 = insertelement <2 x i64> %91, i64 %65, i64 1, !dbg !24
+  %93 = add nsw <2 x i64> %50, %92, !dbg !24
+  %94 = srem <2 x i64> %93, %52, !dbg !25
+  %95 = icmp ne <2 x i64> %94, zeroinitializer, !dbg !40
+  %96 = extractelement <2 x i64> %94, i64 0, !dbg !41
+  %97 = xor i64 %96, %8, !dbg !41
+  %98 = extractelement <2 x i64> %94, i64 1, !dbg !41
+  %99 = xor i64 %98, %8, !dbg !41
+  %100 = insertelement <2 x i64> poison, i64 %97, i64 0, !dbg !41
+  %101 = insertelement <2 x i64> %100, i64 %99, i64 1, !dbg !41
+  %102 = icmp slt <2 x i64> %101, zeroinitializer, !dbg !41
+  %103 = and <2 x i1> %95, %102, !dbg !42
+  %104 = select <2 x i1> %103, <2 x i64> %52, <2 x i64> zeroinitializer, !dbg !43
+  %105 = sub <2 x i64> zeroinitializer, %104, !dbg !44
+  %106 = icmp eq <2 x i64> %94, %105, !dbg !44
+  %107 = and <2 x i1> %90, %106, !dbg !23
+  %108 = and <2 x i1> %48, %107, !dbg !23
+  %109 = or <2 x i1> %84, %108, !dbg !45
+  %110 = select <2 x i1> %38, <2 x i1> %70, <2 x i1> zeroinitializer, !dbg !18
+  %111 = select <2 x i1> %110, <2 x i1> %109, <2 x i1> zeroinitializer, !dbg !18
+  %112 = zext <2 x i1> %111 to <2 x i64>, !dbg !18
+  %113 = add <2 x i64> %54, %112, !dbg !18
+  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1024, !dbg !17
+  %114 = icmp samesign ult i64 %indvars.iv, 15360, !dbg !17
+  br i1 %114, label %53, label %115, !dbg !17
+
+115:                                              ; preds = %53
+  %116 = and i32 %16, 31, !dbg !9
+  %117 = lshr i32 %16, 5, !dbg !9
+  %shift = shufflevector <2 x i64> %113, <2 x i64> poison, <2 x i32> <i32 1, i32 poison>, !dbg !46
+  %foldExtExtBinop = add <2 x i64> %113, %shift, !dbg !46
+  %118 = extractelement <2 x i64> %foldExtExtBinop, i64 0, !dbg !46
+  %119 = bitcast <2 x i64> %foldExtExtBinop to <4 x i32>, !dbg !50
+  %120 = extractelement <4 x i32> %119, i64 1, !dbg !50
+  %121 = trunc i64 %118 to i32, !dbg !50
+  %122 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %121, i32 16, i32 31), !dbg !50
+  %123 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %120, i32 16, i32 31), !dbg !50
+  %124 = insertelement <2 x i32> poison, i32 %122, i64 0, !dbg !50
+  %125 = insertelement <2 x i32> %124, i32 %123, i64 1, !dbg !50
+  %126 = bitcast <2 x i32> %125 to i64, !dbg !50
+  %127 = add i64 %118, %126, !dbg !46
+  %extelt.offset1 = lshr i64 %127, 32, !dbg !50
+  %128 = trunc nuw i64 %extelt.offset1 to i32, !dbg !50
+  %129 = trunc i64 %127 to i32, !dbg !50
+  %130 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %129, i32 8, i32 31), !dbg !50
+  %131 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %128, i32 8, i32 31), !dbg !50
+  %132 = insertelement <2 x i32> poison, i32 %130, i64 0, !dbg !50
+  %133 = insertelement <2 x i32> %132, i32 %131, i64 1, !dbg !50
+  %134 = bitcast <2 x i32> %133 to i64, !dbg !50
+  %135 = add i64 %127, %134, !dbg !46
+  %extelt.offset2 = lshr i64 %135, 32, !dbg !50
+  %136 = trunc nuw i64 %extelt.offset2 to i32, !dbg !50
+  %137 = trunc i64 %135 to i32, !dbg !50
+  %138 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %137, i32 4, i32 31), !dbg !50
+  %139 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %136, i32 4, i32 31), !dbg !50
+  %140 = insertelement <2 x i32> poison, i32 %138, i64 0, !dbg !50
+  %141 = insertelement <2 x i32> %140, i32 %139, i64 1, !dbg !50
+  %142 = bitcast <2 x i32> %141 to i64, !dbg !50
+  %143 = add i64 %135, %142, !dbg !46
+  %extelt.offset3 = lshr i64 %143, 32, !dbg !50
+  %144 = trunc nuw i64 %extelt.offset3 to i32, !dbg !50
+  %145 = trunc i64 %143 to i32, !dbg !50
+  %146 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %145, i32 2, i32 31), !dbg !50
+  %147 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %144, i32 2, i32 31), !dbg !50
+  %148 = insertelement <2 x i32> poison, i32 %146, i64 0, !dbg !50
+  %149 = insertelement <2 x i32> %148, i32 %147, i64 1, !dbg !50
+  %150 = bitcast <2 x i32> %149 to i64, !dbg !50
+  %151 = add i64 %143, %150, !dbg !46
+  %extelt.offset4 = lshr i64 %151, 32, !dbg !50
+  %152 = trunc nuw i64 %extelt.offset4 to i32, !dbg !50
+  %153 = trunc i64 %151 to i32, !dbg !50
+  %154 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %153, i32 1, i32 31), !dbg !50
+  %155 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %152, i32 1, i32 31), !dbg !50
+  %156 = insertelement <2 x i32> poison, i32 %154, i64 0, !dbg !50
+  %157 = insertelement <2 x i32> %156, i32 %155, i64 1, !dbg !50
+  %158 = bitcast <2 x i32> %157 to i64, !dbg !50
+  %159 = add i64 %151, %158, !dbg !46
+  %160 = and i32 %117, 15, !dbg !50
+  %161 = icmp eq i32 %116, 0, !dbg !50
+  %162 = getelementptr i64, ptr addrspace(3) @global_smem, i32 %160, !dbg !50
+  %163 = insertelement <1 x i64> poison, i64 %159, i64 0, !dbg !50
+  tail call void asm sideeffect "@$2 st.shared.b64 [ $0 + 0 ], $1;", "r,l,b"(ptr addrspace(3) %162, <1 x i64> %163, i1 %161) #5, !dbg !50
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !50
+  %164 = icmp samesign ult i32 %16, 16, !dbg !50
+  %165 = getelementptr i64, ptr addrspace(3) @global_smem, i32 %16, !dbg !50
+  %166 = tail call i64 asm sideeffect "@$2 ld.shared.b64 $0, [ $1 + 0 ];", "=l,r,b"(ptr addrspace(3) %165, i1 %164) #5, !dbg !50
+  %extelt.offset5 = lshr i64 %166, 32, !dbg !50
+  %167 = trunc nuw i64 %extelt.offset5 to i32, !dbg !50
+  %168 = trunc i64 %166 to i32, !dbg !50
+  %169 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %168, i32 8, i32 31), !dbg !50
+  %170 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %167, i32 8, i32 31), !dbg !50
+  %171 = insertelement <2 x i32> poison, i32 %169, i64 0, !dbg !50
+  %172 = insertelement <2 x i32> %171, i32 %170, i64 1, !dbg !50
+  %173 = bitcast <2 x i32> %172 to i64, !dbg !50
+  %174 = add i64 %166, %173, !dbg !46
+  %extelt.offset6 = lshr i64 %174, 32, !dbg !50
+  %175 = trunc nuw i64 %extelt.offset6 to i32, !dbg !50
+  %176 = trunc i64 %174 to i32, !dbg !50
+  %177 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %176, i32 4, i32 31), !dbg !50
+  %178 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %175, i32 4, i32 31), !dbg !50
+  %179 = insertelement <2 x i32> poison, i32 %177, i64 0, !dbg !50
+  %180 = insertelement <2 x i32> %179, i32 %178, i64 1, !dbg !50
+  %181 = bitcast <2 x i32> %180 to i64, !dbg !50
+  %182 = add i64 %174, %181, !dbg !46
+  %extelt.offset7 = lshr i64 %182, 32, !dbg !50
+  %183 = trunc nuw i64 %extelt.offset7 to i32, !dbg !50
+  %184 = trunc i64 %182 to i32, !dbg !50
+  %185 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %184, i32 2, i32 31), !dbg !50
+  %186 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %183, i32 2, i32 31), !dbg !50
+  %187 = insertelement <2 x i32> poison, i32 %185, i64 0, !dbg !50
+  %188 = insertelement <2 x i32> %187, i32 %186, i64 1, !dbg !50
+  %189 = bitcast <2 x i32> %188 to i64, !dbg !50
+  %190 = add i64 %182, %189, !dbg !46
+  %extelt.offset8 = lshr i64 %190, 32, !dbg !50
+  %191 = trunc nuw i64 %extelt.offset8 to i32, !dbg !50
+  %192 = trunc i64 %190 to i32, !dbg !50
+  %193 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %192, i32 1, i32 31), !dbg !50
+  %194 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %191, i32 1, i32 31), !dbg !50
+  %195 = insertelement <2 x i32> poison, i32 %193, i64 0, !dbg !50
+  %196 = insertelement <2 x i32> %195, i32 %194, i64 1, !dbg !50
+  %197 = bitcast <2 x i32> %196 to i64, !dbg !50
+  %198 = add i64 %190, %197, !dbg !46
+  %199 = icmp eq i32 %16, 0, !dbg !50
+  %200 = insertelement <1 x i64> poison, i64 %198, i64 0, !dbg !50
+  tail call void asm sideeffect "@$2 st.shared.b64 [ $0 + 0 ], $1;", "r,l,b"(ptr addrspace(3) %165, <1 x i64> %200, i1 %199) #5, !dbg !50
+  tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0), !dbg !50
+  %201 = load i64, ptr addrspace(3) @global_smem, align 16, !dbg !50
+  %202 = add i64 %201, -1, !dbg !51
+  %203 = icmp ult i64 %202, 16383, !dbg !51
+  %204 = zext i1 %203 to i32, !dbg !52
+  %205 = icmp eq i64 %201, 16384, !dbg !53
+  %206 = zext i1 %205 to i32, !dbg !52
+  %207 = getelementptr i32, ptr addrspace(1) %1, i64 %18, !dbg !54
+  %208 = and i32 %16, 511, !dbg !55
+  %209 = icmp eq i32 %208, 0, !dbg !55
+  %210 = and i1 %209, %15, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %204, ptr addrspace(1) %207, i1 %210) #5, !dbg !55
+  %211 = getelementptr i32, ptr addrspace(1) %2, i64 %18, !dbg !56
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %206, ptr addrspace(1) %211, i1 %210) #5, !dbg !57
+  ret void, !dbg !58
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 2147483647) i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #1
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #2
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier.cta.sync.aligned.all(i32) #3
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare i64 @llvm.smin.i64(i64, i64) #4
+
+attributes #0 = { nounwind "nvvm.reqntid"="512" }
+attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #2 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #3 = { convergent nocallback nounwind }
+attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #5 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2, !3}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly)
+!1 = !DIFile(filename: "cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py", directory: "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx")
+!2 = !{i32 2, !"Debug Info Version", i32 3}
+!3 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!4 = distinct !DISubprogram(name: "triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1", linkageName: "triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1", scope: !1, file: !1, line: 18, type: !5, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
+!5 = !DISubroutineType(cc: DW_CC_normal, types: !6)
+!6 = !{}
+!7 = !DILocation(line: 22, column: 28, scope: !4)
+!8 = !DILocation(line: 24, column: 21, scope: !4)
+!9 = !DILocation(line: 25, column: 37, scope: !4)
+!10 = !DILocation(line: 27, column: 21, scope: !4)
+!11 = !DILocation(line: 27, column: 28, scope: !4)
+!12 = !DILocation(line: 28, column: 19, scope: !4)
+!13 = !DILocation(line: 29, column: 19, scope: !4)
+!14 = !DILocation(line: 39, column: 26, scope: !4)
+!15 = !DILocation(line: 42, column: 26, scope: !4)
+!16 = !DILocation(line: 49, column: 35, scope: !4)
+!17 = !DILocation(line: 32, column: 40, scope: !4)
+!18 = !DILocation(line: 86, column: 50, scope: !4)
+!19 = !DILocation(line: 45, column: 22, scope: !4)
+!20 = !DILocation(line: 39, column: 22, scope: !4)
+!21 = !DILocation(line: 41, column: 22, scope: !4)
+!22 = !DILocation(line: 48, column: 23, scope: !4)
+!23 = !DILocation(line: 79, column: 24, scope: !4)
+!24 = !DILocation(line: 69, column: 51, scope: !4)
+!25 = !DILocation(line: 70, column: 25, scope: !4)
+!26 = !DILocation(line: 33, column: 31, scope: !4)
+!27 = !DILocation(line: 37, column: 27, scope: !4)
+!28 = !DILocation(line: 49, column: 77, scope: !4)
+!29 = !DILocation(line: 69, column: 24, scope: !4)
+!30 = !DILocation(line: 69, column: 38, scope: !4)
+!31 = !DILocation(line: 49, column: 94, scope: !4)
+!32 = !DILocation(line: 50, column: 23, scope: !4)
+!33 = !DILocation(line: 51, column: 23, scope: !4)
+!34 = !DILocation(line: 52, column: 24, scope: !4)
+!35 = !DILocation(line: 53, column: 23, scope: !4)
+!36 = !DILocation(line: 58, column: 24, scope: !4)
+!37 = !DILocation(line: 60, column: 25, scope: !4)
+!38 = !DILocation(line: 66, column: 39, scope: !4)
+!39 = !DILocation(line: 67, column: 24, scope: !4)
+!40 = !DILocation(line: 71, column: 25, scope: !4)
+!41 = !DILocation(line: 73, column: 25, scope: !4)
+!42 = !DILocation(line: 74, column: 24, scope: !4)
+!43 = !DILocation(line: 76, column: 39, scope: !4)
+!44 = !DILocation(line: 78, column: 25, scope: !4)
+!45 = !DILocation(line: 80, column: 24, scope: !4)
+!46 = !DILocation(line: 261, column: 15, scope: !47, inlinedAt: !49)
+!47 = distinct !DILexicalBlockFile(scope: !4, file: !48, discriminator: 0)
+!48 = !DIFile(filename: "standard.py", directory: "/workspace/specforge/lib/python3.11/site-packages/triton/language")
+!49 = !DILocation(line: 87, column: 27, scope: !4)
+!50 = !DILocation(line: 291, column: 36, scope: !47, inlinedAt: !49)
+!51 = !DILocation(line: 92, column: 20, scope: !4)
+!52 = !DILocation(line: 0, scope: !4)
+!53 = !DILocation(line: 95, column: 21, scope: !4)
+!54 = !DILocation(line: 98, column: 25, scope: !4)
+!55 = !DILocation(line: 98, column: 37, scope: !4)
+!56 = !DILocation(line: 99, column: 25, scope: !4)
+!57 = !DILocation(line: 99, column: 37, scope: !4)
+!58 = !DILocation(line: 99, column: 4, scope: !4)

SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.ptx

@@ -0,0 +1,736 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.7
+.target sm_90a
+.address_size 64
+
+	// .globl	triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1 // -- Begin function triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1
+.extern .shared .align 16 .b8 global_smem[];
+                                        // @triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1
+.visible .entry triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1(
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_0,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_1,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_2,
+	.param .u64 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_3,
+	.param .u64 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_4,
+	.param .u64 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_5,
+	.param .u64 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_6,
+	.param .u64 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_7,
+	.param .u64 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_8,
+	.param .u32 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_9,
+	.param .u32 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_10,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_11,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_12
+)
+.reqntid 512
+{
+	.reg .pred 	%p<53>;
+	.reg .b32 	%r<76>;
+	.reg .b64 	%rd<162>;
+	.loc	1 18 0                          // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:18:0
+$L__func_begin0:
+	.loc	1 18 0                          // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:18:0
+
+// %bb.0:
+	ld.param.b64 	%rd47, [triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_4];
+$L__tmp0:
+	.loc	1 22 28                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:22:28
+	mov.u32 	%r7, %ctaid.x;
+	.loc	1 27 21                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:27:21
+	cvt.u64.u32 	%rd1, %r7;
+	ld.param.b64 	%rd52, [triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_3];
+	and.b64 	%rd53, %rd52, -4294967296;
+	setp.ne.b64 	%p11, %rd53, 0;
+	cvt.u32.u64 	%r74, %rd1;
+	@%p11 bra 	$L__BB0_2;
+	bra.uni 	$L__BB0_1;
+$L__BB0_2:
+	div.s64 	%rd153, %rd1, %rd52;
+	bra.uni 	$L__BB0_3;
+$L__BB0_1:
+	cvt.u32.u64 	%r8, %rd52;
+	div.u32 	%r10, %r74, %r8;
+	cvt.u64.u32 	%rd153, %r10;
+$L__BB0_3:
+	.loc	1 0 21                          // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:0:21
+	ld.param.b64 	%rd50, [triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_7];
+	.loc	1 27 28                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:27:28
+	or.b64 	%rd54, %rd153, %rd47;
+	and.b64 	%rd55, %rd54, -4294967296;
+	setp.ne.b64 	%p12, %rd55, 0;
+	@%p12 bra 	$L__BB0_5;
+	bra.uni 	$L__BB0_4;
+$L__BB0_5:
+	rem.s64 	%rd154, %rd153, %rd47;
+	bra.uni 	$L__BB0_6;
+$L__BB0_4:
+	cvt.u32.u64 	%r11, %rd47;
+	cvt.u32.u64 	%r12, %rd153;
+	rem.u32 	%r13, %r12, %r11;
+	cvt.u64.u32 	%rd154, %r13;
+$L__BB0_6:
+	.loc	1 0 28                          // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:0:28
+	ld.param.b32 	%r6, [triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_9];
+	ld.param.b64 	%rd51, [triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_8];
+	ld.param.b64 	%rd49, [triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_6];
+	ld.param.b64 	%rd44, [triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_0];
+	mov.u32 	%r1, %tid.x;
+	.loc	1 28 19                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:28:19
+	mul.lo.s64 	%rd56, %rd153, %rd52;
+	sub.s64 	%rd9, %rd1, %rd56;
+	.loc	1 29 19                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:29:19
+	and.b64 	%rd57, %rd50, -4294967296;
+	setp.ne.b64 	%p13, %rd57, 0;
+	@%p13 bra 	$L__BB0_8;
+	bra.uni 	$L__BB0_7;
+$L__BB0_8:
+	div.s64 	%rd155, %rd1, %rd50;
+	bra.uni 	$L__BB0_9;
+$L__BB0_7:
+	cvt.u32.u64 	%r14, %rd50;
+	div.u32 	%r16, %r74, %r14;
+	cvt.u64.u32 	%rd155, %r16;
+$L__BB0_9:
+	.loc	1 0 19                          // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:0:19
+	ld.param.b64 	%rd48, [triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_5];
+	ld.param.b64 	%rd46, [triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_2];
+	ld.param.b64 	%rd45, [triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1_param_1];
+	.loc	1 24 21                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:24:21
+	setp.lt.s32 	%p1, %r74, %r6;
+	.loc	1 39 26                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:39:26
+	shl.b64 	%rd16, %rd154, 7;
+	.loc	1 42 26                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:42:26
+	shl.b64 	%rd61, %rd9, 7;
+	.loc	1 49 35                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:49:35
+	shl.b64 	%rd62, %rd155, 3;
+	add.s64 	%rd70, %rd44, %rd62;
+	and.b32 	%r2, %r1, 127;
+	cvt.u64.u32 	%rd63, %r2;
+	or.b64 	%rd20, %rd61, %rd63;
+	setp.lt.s64 	%p3, %rd20, %rd49;
+	setp.ge.s64 	%p5, %rd20, %rd51;
+	min.s64 	%rd15, %rd51, 0;
+	sub.s64 	%rd64, %rd9, %rd154;
+	shl.b64 	%rd22, %rd64, 7;
+	.loc	1 32 40                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:32:40
+	cvt.u64.u32 	%rd65, %r1;
+	shr.u64 	%rd66, %rd65, 7;
+	cvt.u32.u64 	%r75, %rd66;
+	shr.u32 	%r18, %r1, 7;
+	cvt.u64.u32 	%rd67, %r18;
+	and.b64 	%rd157, %rd67, 3;
+	sub.s64 	%rd156, %rd63, %rd157;
+	mov.b64 	%rd159, 0;
+	mov.b64 	%rd158, -1024;
+	mov.b64 	%rd160, %rd159;
+	bra.uni 	$L__BB0_10;
+$L__BB0_12:                             //   in Loop: Header=BB0_10 Depth=1
+	.loc	1 58 24                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:58:24
+	rem.s64 	%rd161, %rd20, %rd51;
+$L__BB0_13:                             //   in Loop: Header=BB0_10 Depth=1
+	.loc	1 0 0                           // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:0
+	sub.s32 	%r21, %r2, %r20;
+	cvt.s64.s32 	%rd33, %r21;
+	.loc	1 60 25                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:60:25
+	setp.eq.b64 	%p24, %rd161, 0;
+	.loc	1 66 39                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:66:39
+	selp.b64 	%rd83, 0, %rd15, %p24;
+	add.s64 	%rd84, %rd83, %rd161;
+	.loc	1 67 24                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:67:24
+	setp.lt.s64 	%p25, %rd84, %rd69;
+	setp.lt.s64 	%p26, %rd84, %rd73;
+	.loc	1 69 51                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:69:51
+	add.s64 	%rd85, %rd22, %rd33;
+	add.s64 	%rd86, %rd22, %rd156;
+	.loc	1 70 25                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:70:25
+	rem.s64 	%rd87, %rd86, %rd51;
+	rem.s64 	%rd88, %rd85, %rd51;
+	.loc	1 71 25                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:71:25
+	setp.ne.b64 	%p27, %rd88, 0;
+	setp.ne.b64 	%p28, %rd87, 0;
+	.loc	1 73 25                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:73:25
+	xor.b64 	%rd89, %rd87, %rd51;
+	xor.b64 	%rd90, %rd88, %rd51;
+	.loc	1 76 39                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:76:39
+	shr.s64 	%rd91, %rd89, 63;
+	and.b64 	%rd92, %rd91, %rd51;
+	selp.b64 	%rd93, %rd92, 0, %p28;
+	shr.s64 	%rd94, %rd90, 63;
+	and.b64 	%rd95, %rd94, %rd51;
+	selp.b64 	%rd96, %rd95, 0, %p27;
+	.loc	1 78 25                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:78:25
+	neg.s64 	%rd97, %rd96;
+	neg.s64 	%rd98, %rd93;
+	setp.eq.b64 	%p29, %rd87, %rd98;
+	setp.eq.b64 	%p30, %rd88, %rd97;
+	.loc	1 79 24                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:79:24
+	and.pred 	%p31, %p26, %p30;
+	and.pred 	%p33, %p25, %p29;
+	and.pred 	%p35, %p5, %p33;
+	and.pred 	%p36, %p5, %p31;
+	.loc	1 80 24                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:80:24
+	or.pred 	%p37, %p10, %p36;
+	or.pred 	%p38, %p9, %p35;
+	.loc	1 86 50                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:86:50
+	and.pred 	%p41, %p14, %p38;
+	and.pred 	%p42, %p15, %p37;
+	selp.b64 	%rd99, 1, 0, %p42;
+	selp.b64 	%rd100, 1, 0, %p41;
+	add.s64 	%rd159, %rd159, %rd100;
+	add.s64 	%rd160, %rd160, %rd99;
+	.loc	1 32 40                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:32:40
+	add.s64 	%rd158, %rd158, 1024;
+	add.s32 	%r75, %r75, 8;
+	add.s64 	%rd157, %rd157, 8;
+	add.s64 	%rd156, %rd156, -8;
+	setp.lt.u64 	%p43, %rd158, 15360;
+	@%p43 bra 	$L__BB0_10;
+	bra.uni 	$L__BB0_14;
+$L__BB0_10:                             // =>This Inner Loop Header: Depth=1
+	.loc	1 37 27                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:37:27
+	or.b32 	%r20, %r75, 4;
+	.loc	1 39 22                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:39:22
+	cvt.u64.u32 	%rd76, %r20;
+	.loc	1 49 77                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:49:77
+	// begin inline asm
+	mov.u64 %rd68, 0x0;
+	createpolicy.fractional.L2::evict_last.b64 %rd68, 1.0;
+	// end inline asm
+	.loc	1 39 22                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:39:22
+	or.b64 	%rd77, %rd16, %rd76;
+	or.b64 	%rd78, %rd16, %rd157;
+	.loc	1 41 22                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:41:22
+	setp.lt.s64 	%p17, %rd78, %rd48;
+	setp.lt.s64 	%p18, %rd77, %rd48;
+	.loc	1 45 22                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:45:22
+	and.pred 	%p8, %p3, %p18;
+	and.pred 	%p7, %p3, %p17;
+	.loc	1 48 23                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:48:23
+	setp.ge.s64 	%p19, %rd77, %rd20;
+	setp.ge.s64 	%p20, %rd78, %rd20;
+	.loc	1 49 94                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:49:94
+	and.pred 	%p14, %p1, %p7;
+	and.pred 	%p15, %p1, %p8;
+	.loc	1 49 77                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:49:77
+	// begin inline asm
+	mov.u64 %rd69, 0x0;
+	@%p14 ld.global.L1::evict_last.L2::cache_hint.b64 { %rd69 }, [ %rd70 + 0 ], %rd68;
+	// end inline asm
+	// begin inline asm
+	mov.u64 %rd72, 0x0;
+	createpolicy.fractional.L2::evict_last.b64 %rd72, 1.0;
+	// end inline asm
+	// begin inline asm
+	mov.u64 %rd73, 0x0;
+	@%p15 ld.global.L1::evict_last.L2::cache_hint.b64 { %rd73 }, [ %rd70 + 0 ], %rd72;
+	// end inline asm
+	.loc	1 52 24                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:52:24
+	max.s64 	%rd79, %rd20, %rd77;
+	setp.lt.s64 	%p21, %rd79, %rd73;
+	max.s64 	%rd80, %rd20, %rd78;
+	setp.lt.s64 	%p22, %rd80, %rd69;
+	.loc	1 53 23                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:53:23
+	and.pred 	%p9, %p20, %p22;
+	and.pred 	%p10, %p19, %p21;
+	.loc	1 58 24                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:58:24
+	or.b64 	%rd81, %rd20, %rd51;
+	and.b64 	%rd82, %rd81, -4294967296;
+	setp.ne.b64 	%p23, %rd82, 0;
+	@%p23 bra 	$L__BB0_12;
+// %bb.11:                              //   in Loop: Header=BB0_10 Depth=1
+	cvt.u32.u64 	%r22, %rd51;
+	cvt.u32.u64 	%r23, %rd20;
+	rem.u32 	%r24, %r23, %r22;
+	cvt.u64.u32 	%rd161, %r24;
+	bra.uni 	$L__BB0_13;
+$L__BB0_14:
+	.loc	1 25 37                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:25:37
+	and.b32 	%r31, %r1, 31;
+$L__tmp1:
+	.loc	2 261 15                        // standard.py:261:15 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	add.s64 	%rd106, %rd159, %rd160;
+	mov.b64 	{_, %r32}, %rd106;
+	.loc	2 291 36                        // standard.py:291:36 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	cvt.u32.u64 	%r33, %rd106;
+	shfl.sync.bfly.b32 	%r34, %r33, 16, 31, -1;
+	shfl.sync.bfly.b32 	%r35, %r32, 16, 31, -1;
+	cvt.u64.u32 	%rd107, %r34;
+	cvt.u64.u32 	%rd108, %r35;
+	shl.b64 	%rd109, %rd108, 32;
+	or.b64 	%rd110, %rd107, %rd109;
+	.loc	2 261 15                        // standard.py:261:15 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	add.s64 	%rd111, %rd106, %rd110;
+	.loc	2 291 36                        // standard.py:291:36 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	mov.b64 	{_, %r36}, %rd111;
+	cvt.u32.u64 	%r37, %rd111;
+	shfl.sync.bfly.b32 	%r38, %r37, 8, 31, -1;
+	shfl.sync.bfly.b32 	%r39, %r36, 8, 31, -1;
+	cvt.u64.u32 	%rd112, %r38;
+	cvt.u64.u32 	%rd113, %r39;
+	shl.b64 	%rd114, %rd113, 32;
+	or.b64 	%rd115, %rd112, %rd114;
+	.loc	2 261 15                        // standard.py:261:15 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	add.s64 	%rd116, %rd111, %rd115;
+	.loc	2 291 36                        // standard.py:291:36 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	mov.b64 	{_, %r40}, %rd116;
+	cvt.u32.u64 	%r41, %rd116;
+	shfl.sync.bfly.b32 	%r42, %r41, 4, 31, -1;
+	shfl.sync.bfly.b32 	%r43, %r40, 4, 31, -1;
+	cvt.u64.u32 	%rd117, %r42;
+	cvt.u64.u32 	%rd118, %r43;
+	shl.b64 	%rd119, %rd118, 32;
+	or.b64 	%rd120, %rd117, %rd119;
+	.loc	2 261 15                        // standard.py:261:15 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	add.s64 	%rd121, %rd116, %rd120;
+	.loc	2 291 36                        // standard.py:291:36 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	mov.b64 	{_, %r44}, %rd121;
+	cvt.u32.u64 	%r45, %rd121;
+	shfl.sync.bfly.b32 	%r46, %r45, 2, 31, -1;
+	shfl.sync.bfly.b32 	%r47, %r44, 2, 31, -1;
+	cvt.u64.u32 	%rd122, %r46;
+	cvt.u64.u32 	%rd123, %r47;
+	shl.b64 	%rd124, %rd123, 32;
+	or.b64 	%rd125, %rd122, %rd124;
+	.loc	2 261 15                        // standard.py:261:15 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	add.s64 	%rd126, %rd121, %rd125;
+	.loc	2 291 36                        // standard.py:291:36 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	mov.b64 	{_, %r48}, %rd126;
+	cvt.u32.u64 	%r49, %rd126;
+	shfl.sync.bfly.b32 	%r50, %r49, 1, 31, -1;
+	shfl.sync.bfly.b32 	%r51, %r48, 1, 31, -1;
+	cvt.u64.u32 	%rd127, %r50;
+	cvt.u64.u32 	%rd128, %r51;
+	shl.b64 	%rd129, %rd128, 32;
+	or.b64 	%rd130, %rd127, %rd129;
+	.loc	2 261 15                        // standard.py:261:15 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	add.s64 	%rd101, %rd126, %rd130;
+	.loc	2 291 36                        // standard.py:291:36 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	setp.eq.b32 	%p44, %r31, 0;
+	shr.u32 	%r52, %r1, 2;
+	and.b32 	%r53, %r52, 120;
+	mov.b32 	%r54, global_smem;
+	add.s32 	%r25, %r54, %r53;
+	// begin inline asm
+	@%p44 st.shared.b64 [ %r25 + 0 ], %rd101;
+	// end inline asm
+	bar.sync 	0;
+	setp.lt.u32 	%p45, %r1, 16;
+	shl.b32 	%r55, %r1, 3;
+	add.s32 	%r26, %r54, %r55;
+	// begin inline asm
+	@%p45 ld.shared.b64 %rd102, [ %r26 + 0 ];
+	// end inline asm
+	mov.b64 	{_, %r56}, %rd102;
+	cvt.u32.u64 	%r57, %rd102;
+	shfl.sync.bfly.b32 	%r58, %r57, 8, 31, -1;
+	shfl.sync.bfly.b32 	%r59, %r56, 8, 31, -1;
+	cvt.u64.u32 	%rd131, %r58;
+	cvt.u64.u32 	%rd132, %r59;
+	shl.b64 	%rd133, %rd132, 32;
+	or.b64 	%rd134, %rd131, %rd133;
+	.loc	2 261 15                        // standard.py:261:15 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	add.s64 	%rd135, %rd102, %rd134;
+	.loc	2 291 36                        // standard.py:291:36 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	mov.b64 	{_, %r60}, %rd135;
+	cvt.u32.u64 	%r61, %rd135;
+	shfl.sync.bfly.b32 	%r62, %r61, 4, 31, -1;
+	shfl.sync.bfly.b32 	%r63, %r60, 4, 31, -1;
+	cvt.u64.u32 	%rd136, %r62;
+	cvt.u64.u32 	%rd137, %r63;
+	shl.b64 	%rd138, %rd137, 32;
+	or.b64 	%rd139, %rd136, %rd138;
+	.loc	2 261 15                        // standard.py:261:15 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	add.s64 	%rd140, %rd135, %rd139;
+	.loc	2 291 36                        // standard.py:291:36 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	mov.b64 	{_, %r64}, %rd140;
+	cvt.u32.u64 	%r65, %rd140;
+	shfl.sync.bfly.b32 	%r66, %r65, 2, 31, -1;
+	shfl.sync.bfly.b32 	%r67, %r64, 2, 31, -1;
+	cvt.u64.u32 	%rd141, %r66;
+	cvt.u64.u32 	%rd142, %r67;
+	shl.b64 	%rd143, %rd142, 32;
+	or.b64 	%rd144, %rd141, %rd143;
+	.loc	2 261 15                        // standard.py:261:15 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	add.s64 	%rd145, %rd140, %rd144;
+	.loc	2 291 36                        // standard.py:291:36 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	mov.b64 	{_, %r68}, %rd145;
+	cvt.u32.u64 	%r69, %rd145;
+	shfl.sync.bfly.b32 	%r70, %r69, 1, 31, -1;
+	shfl.sync.bfly.b32 	%r71, %r68, 1, 31, -1;
+	cvt.u64.u32 	%rd146, %r70;
+	cvt.u64.u32 	%rd147, %r71;
+	shl.b64 	%rd148, %rd147, 32;
+	or.b64 	%rd149, %rd146, %rd148;
+	.loc	2 261 15                        // standard.py:261:15 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	add.s64 	%rd103, %rd145, %rd149;
+	.loc	2 291 36                        // standard.py:291:36 @[ cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:87:27 ]
+	setp.eq.b32 	%p46, %r1, 0;
+	// begin inline asm
+	@%p46 st.shared.b64 [ %r26 + 0 ], %rd103;
+	// end inline asm
+	bar.sync 	0;
+	ld.shared.b64 	%rd150, [global_smem];
+$L__tmp2:
+	.loc	1 92 20                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:92:20
+	add.s64 	%rd151, %rd150, -1;
+	setp.lt.u64 	%p50, %rd151, 16383;
+	.loc	1 0 0                           // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:0
+	selp.b32 	%r28, 1, 0, %p50;
+	.loc	1 95 21                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:95:21
+	setp.eq.b64 	%p51, %rd150, 16384;
+	.loc	1 0 0                           // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:0
+	selp.b32 	%r29, 1, 0, %p51;
+	.loc	1 98 25                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:98:25
+	shl.b64 	%rd152, %rd1, 2;
+	add.s64 	%rd104, %rd45, %rd152;
+	.loc	1 98 37                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:98:37
+	and.b32 	%r72, %r1, 511;
+	setp.eq.b32 	%p52, %r72, 0;
+	and.pred 	%p47, %p52, %p1;
+	// begin inline asm
+	@%p47 st.global.b32 [ %rd104 + 0 ], { %r28 };
+	// end inline asm
+	.loc	1 99 25                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:99:25
+	add.s64 	%rd105, %rd46, %rd152;
+	.loc	1 99 37                         // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:99:37
+	// begin inline asm
+	@%p47 st.global.b32 [ %rd105 + 0 ], { %r29 };
+	// end inline asm
+	.loc	1 99 4                          // cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py:99:4
+	ret;
+$L__tmp3:
+$L__func_end0:
+                                        // -- End function
+}
+	.file	1 "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py"
+	.file	2 "/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1                                   // Abbreviation Code
+.b8 17                                  // DW_TAG_compile_unit
+.b8 1                                   // DW_CHILDREN_yes
+.b8 37                                  // DW_AT_producer
+.b8 8                                   // DW_FORM_string
+.b8 19                                  // DW_AT_language
+.b8 5                                   // DW_FORM_data2
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 16                                  // DW_AT_stmt_list
+.b8 6                                   // DW_FORM_data4
+.b8 27                                  // DW_AT_comp_dir
+.b8 8                                   // DW_FORM_string
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 2                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 0                                   // DW_CHILDREN_no
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 32                                  // DW_AT_inline
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 3                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 1                                   // DW_CHILDREN_yes
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 4                                   // Abbreviation Code
+.b8 29                                  // DW_TAG_inlined_subroutine
+.b8 0                                   // DW_CHILDREN_no
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 88                                  // DW_AT_call_file
+.b8 11                                  // DW_FORM_data1
+.b8 89                                  // DW_AT_call_line
+.b8 11                                  // DW_FORM_data1
+.b8 87                                  // DW_AT_call_column
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 0                                   // EOM(3)
+	}
+	.section	.debug_info
+	{
+.b32 307                                // Length of Unit
+.b8 2                                   // DWARF version number
+.b8 0
+.b32 .debug_abbrev                      // Offset Into Abbrev. Section
+.b8 8                                   // Address Size (in bytes)
+.b8 1                                   // Abbrev [1] 0xb:0x12c DW_TAG_compile_unit
+.b8 116                                 // DW_AT_producer
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2                                   // DW_AT_language
+.b8 0
+.b8 99                                  // DW_AT_name
+.b8 106
+.b8 120
+.b8 116
+.b8 101
+.b8 122
+.b8 120
+.b8 52
+.b8 52
+.b8 118
+.b8 109
+.b8 113
+.b8 104
+.b8 54
+.b8 50
+.b8 50
+.b8 102
+.b8 51
+.b8 116
+.b8 112
+.b8 109
+.b8 97
+.b8 107
+.b8 108
+.b8 111
+.b8 102
+.b8 53
+.b8 54
+.b8 98
+.b8 114
+.b8 52
+.b8 101
+.b8 121
+.b8 108
+.b8 116
+.b8 51
+.b8 110
+.b8 122
+.b8 52
+.b8 97
+.b8 52
+.b8 54
+.b8 107
+.b8 97
+.b8 118
+.b8 118
+.b8 122
+.b8 50
+.b8 103
+.b8 119
+.b8 113
+.b8 119
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line                        // DW_AT_stmt_list
+.b8 47                                  // DW_AT_comp_dir
+.b8 119
+.b8 111
+.b8 114
+.b8 107
+.b8 115
+.b8 112
+.b8 97
+.b8 99
+.b8 101
+.b8 47
+.b8 104
+.b8 97
+.b8 110
+.b8 114
+.b8 117
+.b8 105
+.b8 47
+.b8 83
+.b8 112
+.b8 101
+.b8 99
+.b8 70
+.b8 111
+.b8 114
+.b8 103
+.b8 101
+.b8 45
+.b8 101
+.b8 120
+.b8 116
+.b8 47
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 99
+.b8 111
+.b8 109
+.b8 112
+.b8 105
+.b8 108
+.b8 101
+.b8 100
+.b8 95
+.b8 107
+.b8 101
+.b8 114
+.b8 110
+.b8 101
+.b8 108
+.b8 115
+.b8 47
+.b8 106
+.b8 120
+.b8 0
+.b8 2                                   // Abbrev [2] 0x8b:0x7d DW_TAG_subprogram
+.b8 116                                 // DW_AT_name
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 114
+.b8 101
+.b8 100
+.b8 95
+.b8 102
+.b8 117
+.b8 115
+.b8 101
+.b8 100
+.b8 95
+.b8 95
+.b8 116
+.b8 111
+.b8 95
+.b8 99
+.b8 111
+.b8 112
+.b8 121
+.b8 95
+.b8 97
+.b8 114
+.b8 97
+.b8 110
+.b8 103
+.b8 101
+.b8 95
+.b8 98
+.b8 105
+.b8 116
+.b8 119
+.b8 105
+.b8 115
+.b8 101
+.b8 95
+.b8 97
+.b8 110
+.b8 100
+.b8 95
+.b8 98
+.b8 105
+.b8 116
+.b8 119
+.b8 105
+.b8 115
+.b8 101
+.b8 95
+.b8 111
+.b8 114
+.b8 95
+.b8 99
+.b8 111
+.b8 110
+.b8 115
+.b8 116
+.b8 97
+.b8 110
+.b8 116
+.b8 95
+.b8 112
+.b8 97
+.b8 100
+.b8 95
+.b8 110
+.b8 100
+.b8 95
+.b8 101
+.b8 113
+.b8 95
+.b8 103
+.b8 101
+.b8 95
+.b8 103
+.b8 116
+.b8 95
+.b8 105
+.b8 110
+.b8 100
+.b8 101
+.b8 120
+.b8 95
+.b8 108
+.b8 116
+.b8 95
+.b8 112
+.b8 101
+.b8 114
+.b8 109
+.b8 117
+.b8 116
+.b8 101
+.b8 95
+.b8 114
+.b8 101
+.b8 109
+.b8 97
+.b8 105
+.b8 110
+.b8 100
+.b8 101
+.b8 114
+.b8 95
+.b8 115
+.b8 117
+.b8 98
+.b8 95
+.b8 115
+.b8 117
+.b8 109
+.b8 95
+.b8 118
+.b8 105
+.b8 101
+.b8 119
+.b8 95
+.b8 49
+.b8 0
+.b8 1                                   // DW_AT_inline
+.b8 3                                   // Abbrev [3] 0x108:0x2e DW_TAG_subprogram
+.b64 $L__func_begin0                    // DW_AT_low_pc
+.b64 $L__func_end0                      // DW_AT_high_pc
+.b32 139                                // DW_AT_abstract_origin
+.b8 4                                   // Abbrev [4] 0x11d:0x18 DW_TAG_inlined_subroutine
+.b32 139                                // DW_AT_abstract_origin
+.b64 $L__tmp1                           // DW_AT_low_pc
+.b64 $L__tmp2                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 87                                  // DW_AT_call_line
+.b8 27                                  // DW_AT_call_column
+.b8 0                                   // End Of Children Mark
+.b8 0                                   // End Of Children Mark
+	}
+	.section	.debug_macinfo	{	}

SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.source

@@ -0,0 +1,418 @@
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":18:0)
+#loc97 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":285:0)
+#loc99 = loc(unknown)
+#loc102 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":260:0)
+#loc106 = loc("in_ptr0"(#loc))
+#loc107 = loc("out_ptr1"(#loc))
+#loc108 = loc("out_ptr2"(#loc))
+#loc109 = loc("ks0"(#loc))
+#loc110 = loc("ks1"(#loc))
+#loc111 = loc("ks2"(#loc))
+#loc112 = loc("ks3"(#loc))
+#loc113 = loc("ks4"(#loc))
+#loc114 = loc("ks5"(#loc))
+#loc115 = loc("xnumel"(#loc))
+#loc116 = loc("r0_numel"(#loc))
+#loc207 = loc("input"(#loc97))
+#loc208 = loc("a"(#loc102))
+#loc209 = loc("b"(#loc102))
+module {
+  tt.func public @triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1(%in_ptr0: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr1: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %ks2: i64 loc("ks2"(#loc)), %ks3: i64 loc("ks3"(#loc)), %ks4: i64 loc("ks4"(#loc)), %ks5: i64 loc("ks5"(#loc)), %xnumel: i32 loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %r0_numel_0 = arith.constant 16384 : i32 loc(#loc117)
+    %xoffset = tt.get_program_id x : i32 loc(#loc118)
+    %xoffset_1 = arith.constant 1 : i32 loc(#loc119)
+    %xoffset_2 = arith.constant 1 : i32 loc(#loc119)
+    %xoffset_3 = arith.muli %xoffset, %xoffset_2 : i32 loc(#loc119)
+    %xindex = tt.make_range {end = 1 : i32, start = 0 : i32} : tensor<1xi32> loc(#loc120)
+    %xindex_4 = tt.expand_dims %xindex {axis = 1 : i32} : tensor<1xi32> -> tensor<1x1xi32> loc(#loc121)
+    %xindex_5 = tt.splat %xoffset_3 : i32 -> tensor<1x1xi32> loc(#loc122)
+    %xindex_6 = arith.addi %xindex_5, %xindex_4 : tensor<1x1xi32> loc(#loc122)
+    %xmask = tt.splat %xnumel : i32 -> tensor<1x1xi32> loc(#loc123)
+    %xmask_7 = arith.cmpi slt, %xindex_6, %xmask : tensor<1x1xi32> loc(#loc123)
+    %r0_base = tt.make_range {end = 1024 : i32, start = 0 : i32} : tensor<1024xi32> loc(#loc124)
+    %r0_base_8 = tt.expand_dims %r0_base {axis = 0 : i32} : tensor<1024xi32> -> tensor<1x1024xi32> loc(#loc125)
+    %x1 = arith.extsi %xindex_6 : tensor<1x1xi32> to tensor<1x1xi64> loc(#loc126)
+    %x1_9 = tt.splat %ks0 : i64 -> tensor<1x1xi64> loc(#loc126)
+    %x1_10 = arith.divsi %x1, %x1_9 : tensor<1x1xi64> loc(#loc126)
+    %x1_11 = tt.splat %ks1 : i64 -> tensor<1x1xi64> loc(#loc127)
+    %x1_12 = arith.remsi %x1_10, %x1_11 : tensor<1x1xi64> loc(#loc127)
+    %x0 = arith.extsi %xindex_6 : tensor<1x1xi32> to tensor<1x1xi64> loc(#loc128)
+    %x0_13 = tt.splat %ks0 : i64 -> tensor<1x1xi64> loc(#loc128)
+    %x0_14 = arith.remsi %x0, %x0_13 : tensor<1x1xi64> loc(#loc128)
+    %x2 = arith.extsi %xindex_6 : tensor<1x1xi32> to tensor<1x1xi64> loc(#loc129)
+    %x2_15 = tt.splat %ks4 : i64 -> tensor<1x1xi64> loc(#loc129)
+    %x2_16 = arith.divsi %x2, %x2_15 : tensor<1x1xi64> loc(#loc129)
+    %_tmp46 = arith.constant 0 : i64 loc(#loc130)
+    %_tmp46_17 = arith.constant dense<0> : tensor<1x1024xi64> loc(#loc130)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc15)
+    %c1024_i32 = arith.constant 1024 : i32 loc(#loc15)
+    %0 = arith.bitcast %c0_i32 : i32 to i32 loc(#loc15)
+    %1 = arith.bitcast %r0_numel_0 : i32 to i32 loc(#loc15)
+    %2 = arith.bitcast %c1024_i32 : i32 to i32 loc(#loc15)
+    %3 = ub.poison : i32 loc(#loc15)
+    %_tmp46_18 = scf.for %r0_offset = %0 to %1 step %2 iter_args(%_tmp46_22 = %_tmp46_17) -> (tensor<1x1024xi64>)  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x1024xi32> loc(#loc132)
+      %r0_index_23 = arith.addi %r0_index, %r0_base_8 : tensor<1x1024xi32> loc(#loc132)
+      %r0_mask = arith.constant dense<16384> : tensor<1x1024xi32> loc(#loc133)
+      %r0_mask_24 = arith.cmpi slt, %r0_index_23, %r0_mask : tensor<1x1024xi32> loc(#loc133)
+      %r0_4 = arith.constant 128 : i32 loc(#loc134)
+      %r0_4_25 = arith.constant 128 : i32 loc(#loc134)
+      %r0_4_26 = arith.constant dense<128> : tensor<1x1024xi32> loc(#loc134)
+      %r0_4_27 = arith.divsi %r0_index_23, %r0_4_26 : tensor<1x1024xi32> loc(#loc134)
+      %r0_3 = arith.constant 128 : i32 loc(#loc135)
+      %r0_3_28 = arith.constant 128 : i32 loc(#loc135)
+      %r0_3_29 = arith.constant dense<128> : tensor<1x1024xi32> loc(#loc135)
+      %r0_3_30 = arith.remsi %r0_index_23, %r0_3_29 : tensor<1x1024xi32> loc(#loc135)
+      %tmp0 = arith.constant 128 : i32 loc(#loc136)
+      %tmp0_31 = arith.constant 128 : i64 loc(#loc136)
+      %tmp0_32 = arith.constant dense<128> : tensor<1x1xi64> loc(#loc136)
+      %tmp0_33 = arith.muli %tmp0_32, %x1_12 : tensor<1x1xi64> loc(#loc136)
+      %tmp0_34 = arith.extsi %r0_4_27 : tensor<1x1024xi32> to tensor<1x1024xi64> loc(#loc137)
+      %tmp0_35 = tt.broadcast %tmp0_33 : tensor<1x1xi64> -> tensor<1x1024xi64> loc(#loc137)
+      %tmp0_36 = arith.addi %tmp0_34, %tmp0_35 : tensor<1x1024xi64> loc(#loc137)
+      %tmp2 = tt.splat %ks2 : i64 -> tensor<1x1024xi64> loc(#loc138)
+      %tmp2_37 = arith.cmpi slt, %tmp0_36, %tmp2 : tensor<1x1024xi64> loc(#loc138)
+      %tmp3 = arith.constant 128 : i32 loc(#loc139)
+      %tmp3_38 = arith.constant 128 : i64 loc(#loc139)
+      %tmp3_39 = arith.constant dense<128> : tensor<1x1xi64> loc(#loc139)
+      %tmp3_40 = arith.muli %tmp3_39, %x0_14 : tensor<1x1xi64> loc(#loc139)
+      %tmp3_41 = arith.extsi %r0_3_30 : tensor<1x1024xi32> to tensor<1x1024xi64> loc(#loc140)
+      %tmp3_42 = tt.broadcast %tmp3_40 : tensor<1x1xi64> -> tensor<1x1024xi64> loc(#loc140)
+      %tmp3_43 = arith.addi %tmp3_41, %tmp3_42 : tensor<1x1024xi64> loc(#loc140)
+      %tmp5 = tt.splat %ks3 : i64 -> tensor<1x1024xi64> loc(#loc141)
+      %tmp5_44 = arith.cmpi slt, %tmp3_43, %tmp5 : tensor<1x1024xi64> loc(#loc141)
+      %tmp6 = arith.andi %tmp2_37, %tmp5_44 : tensor<1x1024xi1> loc(#loc142)
+      %tmp7 = arith.constant 128 : i32 loc(#loc143)
+      %tmp7_45 = arith.constant 128 : i64 loc(#loc143)
+      %tmp7_46 = arith.constant dense<128> : tensor<1x1xi64> loc(#loc143)
+      %tmp7_47 = arith.muli %tmp7_46, %x1_12 : tensor<1x1xi64> loc(#loc143)
+      %tmp7_48 = arith.extsi %r0_4_27 : tensor<1x1024xi32> to tensor<1x1024xi64> loc(#loc144)
+      %tmp7_49 = tt.broadcast %tmp7_47 : tensor<1x1xi64> -> tensor<1x1024xi64> loc(#loc144)
+      %tmp7_50 = arith.addi %tmp7_48, %tmp7_49 : tensor<1x1024xi64> loc(#loc144)
+      %tmp8 = arith.constant 128 : i32 loc(#loc145)
+      %tmp8_51 = arith.constant 128 : i64 loc(#loc145)
+      %tmp8_52 = arith.constant dense<128> : tensor<1x1xi64> loc(#loc145)
+      %tmp8_53 = arith.muli %tmp8_52, %x0_14 : tensor<1x1xi64> loc(#loc145)
+      %tmp8_54 = arith.extsi %r0_3_30 : tensor<1x1024xi32> to tensor<1x1024xi64> loc(#loc146)
+      %tmp8_55 = tt.broadcast %tmp8_53 : tensor<1x1xi64> -> tensor<1x1024xi64> loc(#loc146)
+      %tmp8_56 = arith.addi %tmp8_54, %tmp8_55 : tensor<1x1024xi64> loc(#loc146)
+      %tmp9 = arith.cmpi sge, %tmp7_50, %tmp8_56 : tensor<1x1024xi64> loc(#loc147)
+      %tmp10 = tt.broadcast %x2_16 : tensor<1x1xi64> -> tensor<1x1024xi64> loc(#loc148)
+      %tmp10_57 = tt.splat %in_ptr0 : !tt.ptr<i64> -> tensor<1x1024x!tt.ptr<i64>> loc(#loc149)
+      %tmp10_58 = tt.addptr %tmp10_57, %tmp10 : tensor<1x1024x!tt.ptr<i64>>, tensor<1x1024xi64> loc(#loc149)
+      %tmp10_59 = arith.andi %r0_mask_24, %tmp6 : tensor<1x1024xi1> loc(#loc150)
+      %tmp10_60 = tt.broadcast %xmask_7 : tensor<1x1xi1> -> tensor<1x1024xi1> loc(#loc151)
+      %tmp10_61 = arith.andi %tmp10_59, %tmp10_60 : tensor<1x1024xi1> loc(#loc151)
+      %tmp10_62 = arith.constant 0.000000e+00 : f32 loc(#loc152)
+      %tmp10_63 = arith.constant dense<0.000000e+00> : tensor<1x1024xf32> loc(#loc152)
+      %tmp10_64 = arith.fptosi %tmp10_63 : tensor<1x1024xf32> to tensor<1x1024xi64> loc(#loc152)
+      %tmp10_65 = tt.load %tmp10_58, %tmp10_61, %tmp10_64 evictionPolicy = evict_last : tensor<1x1024x!tt.ptr<i64>> loc(#loc152)
+      %tmp11 = arith.cmpi slt, %tmp8_56, %tmp10_65 : tensor<1x1024xi64> loc(#loc153)
+      %tmp12 = arith.cmpi slt, %tmp7_50, %tmp10_65 : tensor<1x1024xi64> loc(#loc154)
+      %tmp13 = arith.andi %tmp11, %tmp12 : tensor<1x1024xi1> loc(#loc155)
+      %tmp14 = arith.andi %tmp9, %tmp13 : tensor<1x1024xi1> loc(#loc156)
+      %tmp15 = arith.constant false loc(#loc157)
+      %tmp15_66 = arith.constant dense<false> : tensor<1x1xi1> loc(#loc157)
+      %tmp16 = arith.constant dense<false> : tensor<1x1024xi1> loc(#loc158)
+      %tmp16_67 = arith.ori %tmp16, %tmp14 : tensor<1x1024xi1> loc(#loc158)
+      %tmp17 = tt.splat %ks5 : i64 -> tensor<1x1024xi64> loc(#loc159)
+      %tmp18 = arith.cmpi sge, %tmp8_56, %tmp17 : tensor<1x1024xi64> loc(#loc160)
+      %tmp19 = arith.remsi %tmp8_56, %tmp17 : tensor<1x1024xi64> loc(#loc161)
+      %tmp20 = arith.constant 0 : i32 loc(#loc162)
+      %tmp20_68 = arith.constant dense<0> : tensor<1x1xi32> loc(#loc162)
+      %tmp21 = arith.extsi %tmp20_68 : tensor<1x1xi32> to tensor<1x1xi64> loc(#loc163)
+      %tmp21_69 = tt.broadcast %tmp21 : tensor<1x1xi64> -> tensor<1x1024xi64> loc(#loc163)
+      %tmp21_70 = arith.cmpi ne, %tmp19, %tmp21_69 : tensor<1x1024xi64> loc(#loc163)
+      %tmp22 = arith.constant 0 : i32 loc(#loc164)
+      %tmp22_71 = arith.extsi %tmp22 : i32 to i64 loc(#loc164)
+      %tmp22_72 = tt.splat %tmp22_71 : i64 -> tensor<1x1024xi64> loc(#loc164)
+      %tmp22_73 = arith.cmpi slt, %tmp19, %tmp22_72 : tensor<1x1024xi64> loc(#loc164)
+      %tmp23 = arith.constant 0 : i32 loc(#loc165)
+      %tmp23_74 = arith.extsi %tmp23 : i32 to i64 loc(#loc165)
+      %tmp23_75 = tt.splat %tmp23_74 : i64 -> tensor<1x1024xi64> loc(#loc165)
+      %tmp23_76 = arith.cmpi slt, %tmp17, %tmp23_75 : tensor<1x1024xi64> loc(#loc165)
+      %tmp24 = arith.cmpi ne, %tmp22_73, %tmp23_76 : tensor<1x1024xi1> loc(#loc166)
+      %tmp25 = arith.andi %tmp21_70, %tmp24 : tensor<1x1024xi1> loc(#loc167)
+      %tmp26 = arith.addi %tmp19, %tmp17 : tensor<1x1024xi64> loc(#loc168)
+      %tmp27 = arith.select %tmp25, %tmp26, %tmp19 : tensor<1x1024xi1>, tensor<1x1024xi64> loc(#loc169)
+      %tmp28 = arith.cmpi slt, %tmp27, %tmp10_65 : tensor<1x1024xi64> loc(#loc170)
+      %tmp29 = arith.andi %tmp18, %tmp28 : tensor<1x1024xi1> loc(#loc171)
+      %tmp30 = arith.constant -1 : i32 loc(#loc172)
+      %tmp30_77 = arith.constant -1 : i32 loc(#loc172)
+      %tmp30_78 = arith.constant dense<-1> : tensor<1x1024xi32> loc(#loc172)
+      %tmp30_79 = arith.muli %tmp30_78, %r0_4_27 : tensor<1x1024xi32> loc(#loc172)
+      %tmp30_80 = arith.addi %r0_3_30, %tmp30_79 : tensor<1x1024xi32> loc(#loc173)
+      %tmp30_81 = arith.constant -128 : i32 loc(#loc174)
+      %tmp30_82 = arith.constant -128 : i64 loc(#loc174)
+      %tmp30_83 = arith.constant dense<-128> : tensor<1x1xi64> loc(#loc174)
+      %tmp30_84 = arith.muli %tmp30_83, %x1_12 : tensor<1x1xi64> loc(#loc174)
+      %tmp30_85 = arith.extsi %tmp30_80 : tensor<1x1024xi32> to tensor<1x1024xi64> loc(#loc175)
+      %tmp30_86 = tt.broadcast %tmp30_84 : tensor<1x1xi64> -> tensor<1x1024xi64> loc(#loc175)
+      %tmp30_87 = arith.addi %tmp30_85, %tmp30_86 : tensor<1x1024xi64> loc(#loc175)
+      %tmp30_88 = arith.constant 128 : i32 loc(#loc176)
+      %tmp30_89 = arith.constant 128 : i64 loc(#loc176)
+      %tmp30_90 = arith.constant dense<128> : tensor<1x1xi64> loc(#loc176)
+      %tmp30_91 = arith.muli %tmp30_90, %x0_14 : tensor<1x1xi64> loc(#loc176)
+      %tmp30_92 = tt.broadcast %tmp30_91 : tensor<1x1xi64> -> tensor<1x1024xi64> loc(#loc177)
+      %tmp30_93 = arith.addi %tmp30_87, %tmp30_92 : tensor<1x1024xi64> loc(#loc177)
+      %tmp31 = arith.remsi %tmp30_93, %tmp17 : tensor<1x1024xi64> loc(#loc178)
+      %tmp32 = arith.extsi %tmp20_68 : tensor<1x1xi32> to tensor<1x1xi64> loc(#loc179)
+      %tmp32_94 = tt.broadcast %tmp32 : tensor<1x1xi64> -> tensor<1x1024xi64> loc(#loc179)
+      %tmp32_95 = arith.cmpi ne, %tmp31, %tmp32_94 : tensor<1x1024xi64> loc(#loc179)
+      %tmp33 = arith.constant 0 : i32 loc(#loc180)
+      %tmp33_96 = arith.extsi %tmp33 : i32 to i64 loc(#loc180)
+      %tmp33_97 = tt.splat %tmp33_96 : i64 -> tensor<1x1024xi64> loc(#loc180)
+      %tmp33_98 = arith.cmpi slt, %tmp31, %tmp33_97 : tensor<1x1024xi64> loc(#loc180)
+      %tmp34 = arith.cmpi ne, %tmp33_98, %tmp23_76 : tensor<1x1024xi1> loc(#loc181)
+      %tmp35 = arith.andi %tmp32_95, %tmp34 : tensor<1x1024xi1> loc(#loc182)
+      %tmp36 = arith.addi %tmp31, %tmp17 : tensor<1x1024xi64> loc(#loc183)
+      %tmp37 = arith.select %tmp35, %tmp36, %tmp31 : tensor<1x1024xi1>, tensor<1x1024xi64> loc(#loc184)
+      %tmp38 = arith.constant 0 : i64 loc(#loc185)
+      %tmp38_99 = arith.constant dense<0> : tensor<1x1xi64> loc(#loc185)
+      %tmp39 = arith.constant dense<0> : tensor<1x1024xi64> loc(#loc186)
+      %tmp39_100 = arith.cmpi eq, %tmp37, %tmp39 : tensor<1x1024xi64> loc(#loc186)
+      %tmp40 = arith.andi %tmp29, %tmp39_100 : tensor<1x1024xi1> loc(#loc187)
+      %tmp41 = arith.ori %tmp16_67, %tmp40 : tensor<1x1024xi1> loc(#loc188)
+      %tmp42 = arith.constant false loc(#loc189)
+      %tmp42_101 = arith.constant dense<false> : tensor<1x1024xi1> loc(#loc189)
+      %tmp43 = arith.select %tmp6, %tmp41, %tmp42_101 : tensor<1x1024xi1>, tensor<1x1024xi1> loc(#loc190)
+      %tmp44 = arith.extui %tmp43 : tensor<1x1024xi1> to tensor<1x1024xi64> loc(#loc191)
+      %tmp47 = arith.addi %_tmp46_22, %tmp44 : tensor<1x1024xi64> loc(#loc192)
+      %_tmp46_102 = tt.broadcast %xmask_7 : tensor<1x1xi1> -> tensor<1x1024xi1> loc(#loc193)
+      %_tmp46_103 = arith.andi %r0_mask_24, %_tmp46_102 : tensor<1x1024xi1> loc(#loc193)
+      %_tmp46_104 = arith.select %_tmp46_103, %tmp47, %_tmp46_22 : tensor<1x1024xi1>, tensor<1x1024xi64> loc(#loc194)
+      scf.yield %_tmp46_104 : tensor<1x1024xi64> loc(#loc79)
+    } loc(#loc131)
+    %tmp46 = tt.call @"triton.language.standard.sum__i64S1_1024S__(1,)cconstexpr_1__(2,)cconstexpr_False__(3,)cNone"(%_tmp46_18) : (tensor<1x1024xi64>) -> tensor<1xi64> loc(#loc195)
+    %tmp46_19 = tt.expand_dims %tmp46 {axis = 1 : i32} : tensor<1xi64> -> tensor<1x1xi64> loc(#loc196)
+    %tmp48 = arith.constant 0 : i64 loc(#loc197)
+    %tmp48_20 = arith.constant dense<0> : tensor<1x1xi64> loc(#loc197)
+    %tmp49 = arith.cmpi sgt, %tmp46_19, %tmp48_20 : tensor<1x1xi64> loc(#loc198)
+    %tmp50 = arith.constant 16384 : i64 loc(#loc199)
+    %tmp50_21 = arith.constant dense<16384> : tensor<1x1xi64> loc(#loc199)
+    %tmp51 = arith.cmpi slt, %tmp46_19, %tmp50_21 : tensor<1x1xi64> loc(#loc200)
+    %tmp52 = arith.andi %tmp49, %tmp51 : tensor<1x1xi1> loc(#loc201)
+    %tmp53 = arith.extui %tmp52 : tensor<1x1xi1> to tensor<1x1xi8> loc(#loc202)
+    %tmp54 = arith.extsi %tmp53 : tensor<1x1xi8> to tensor<1x1xi32> loc(#loc203)
+    %tmp55 = arith.cmpi eq, %tmp46_19, %tmp50_21 : tensor<1x1xi64> loc(#loc204)
+    %tmp56 = arith.extui %tmp55 : tensor<1x1xi1> to tensor<1x1xi8> loc(#loc205)
+    %tmp57 = arith.extsi %tmp56 : tensor<1x1xi8> to tensor<1x1xi32> loc(#loc206)
+    %4 = tt.splat %out_ptr1 : !tt.ptr<i32> -> tensor<1x1x!tt.ptr<i32>> loc(#loc92)
+    %5 = tt.addptr %4, %xindex_6 : tensor<1x1x!tt.ptr<i32>>, tensor<1x1xi32> loc(#loc92)
+    tt.store %5, %tmp54, %xmask_7 : tensor<1x1x!tt.ptr<i32>> loc(#loc93)
+    %6 = tt.splat %out_ptr2 : !tt.ptr<i32> -> tensor<1x1x!tt.ptr<i32>> loc(#loc94)
+    %7 = tt.addptr %6, %xindex_6 : tensor<1x1x!tt.ptr<i32>>, tensor<1x1xi32> loc(#loc94)
+    tt.store %7, %tmp57, %xmask_7 : tensor<1x1x!tt.ptr<i32>> loc(#loc95)
+    tt.return loc(#loc96)
+  } loc(#loc)
+  tt.func private @"triton.language.standard.sum__i64S1_1024S__(1,)cconstexpr_1__(2,)cconstexpr_False__(3,)cNone"(%input: tensor<1x1024xi64> loc("input"(#loc97))) -> tensor<1xi64> attributes {noinline = false} {
+    %0 = "tt.reduce"(%input) <{axis = 1 : i32}> ({
+    ^bb0(%arg1: i64 loc(unknown), %arg2: i64 loc(unknown)):
+      %2 = tt.call @triton.language.standard._sum_combine__i64_i64__(%arg1, %arg2) : (i64, i64) -> i64 loc(#loc98)
+      tt.reduce.return %2 : i64 loc(#loc98)
+    }) : (tensor<1x1024xi64>) -> tensor<1xi64> loc(#loc98)
+    tt.return %0 : tensor<1xi64> loc(#loc100)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : tensor<1xi64> loc(#loc101)
+    tt.return %1 : tensor<1xi64> loc(#loc101)
+  } loc(#loc97)
+  tt.func private @triton.language.standard._sum_combine__i64_i64__(%a: i64 loc("a"(#loc102)), %b: i64 loc("b"(#loc102))) -> i64 attributes {noinline = false} {
+    %0 = arith.addi %a, %b : i64 loc(#loc103)
+    tt.return %0 : i64 loc(#loc104)
+  ^bb1:  // no predecessors
+    %1 = ub.poison : i64 loc(#loc105)
+    tt.return %1 : i64 loc(#loc105)
+  } loc(#loc102)
+} loc(#loc)
+#loc1 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":19:15)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":22:28)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":22:33)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":23:36)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":23:44)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":23:23)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":24:21)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":25:27)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":25:37)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":27:21)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":27:28)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":28:19)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":29:19)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":30:44)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":32:40)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":33:31)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":34:29)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":37:27)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":38:27)
+#loc20 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":39:26)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":39:22)
+#loc22 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":41:22)
+#loc23 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":42:26)
+#loc24 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":42:22)
+#loc25 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":44:22)
+#loc26 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":45:22)
+#loc27 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":46:26)
+#loc28 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":46:22)
+#loc29 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":47:26)
+#loc30 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":47:22)
+#loc31 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":48:23)
+#loc32 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:55)
+#loc33 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:35)
+#loc34 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:87)
+#loc35 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:94)
+#loc36 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:77)
+#loc37 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":50:23)
+#loc38 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":51:23)
+#loc39 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":52:24)
+#loc40 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":53:23)
+#loc41 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":54:39)
+#loc42 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":55:24)
+#loc43 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":56:37)
+#loc44 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":57:24)
+#loc45 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":58:24)
+#loc46 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":59:35)
+#loc47 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":60:25)
+#loc48 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":61:92)
+#loc49 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":62:92)
+#loc50 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":63:25)
+#loc51 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":64:24)
+#loc52 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":65:24)
+#loc53 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":66:39)
+#loc54 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":67:24)
+#loc55 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":68:24)
+#loc56 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:29)
+#loc57 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:24)
+#loc58 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:45)
+#loc59 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:38)
+#loc60 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:55)
+#loc61 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:51)
+#loc62 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":70:25)
+#loc63 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":71:25)
+#loc64 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":72:92)
+#loc65 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":73:25)
+#loc66 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":74:24)
+#loc67 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":75:24)
+#loc68 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":76:39)
+#loc69 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":77:35)
+#loc70 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":78:25)
+#loc71 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":79:24)
+#loc72 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":80:24)
+#loc73 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":81:44)
+#loc74 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":82:38)
+#loc75 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":83:25)
+#loc76 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":85:25)
+#loc77 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":86:36)
+#loc78 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":86:50)
+#loc79 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":86:8)
+#loc80 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":87:27)
+#loc81 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":87:30)
+#loc82 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":88:31)
+#loc83 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":89:20)
+#loc84 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":90:35)
+#loc85 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":91:20)
+#loc86 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":92:20)
+#loc87 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":93:21)
+#loc88 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":94:21)
+#loc89 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":95:21)
+#loc90 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":96:21)
+#loc91 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":97:21)
+#loc92 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":98:25)
+#loc93 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":98:37)
+#loc94 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":99:25)
+#loc95 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":99:37)
+#loc96 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":99:4)
+#loc98 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc100 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:11)
+#loc101 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:4)
+#loc103 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc104 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:11)
+#loc105 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:4)
+#loc117 = loc("r0_numel"(#loc1))
+#loc118 = loc("xoffset"(#loc2))
+#loc119 = loc("xoffset"(#loc3))
+#loc120 = loc("xindex"(#loc4))
+#loc121 = loc("xindex"(#loc5))
+#loc122 = loc("xindex"(#loc6))
+#loc123 = loc("xmask"(#loc7))
+#loc124 = loc("r0_base"(#loc8))
+#loc125 = loc("r0_base"(#loc9))
+#loc126 = loc("x1"(#loc10))
+#loc127 = loc("x1"(#loc11))
+#loc128 = loc("x0"(#loc12))
+#loc129 = loc("x2"(#loc13))
+#loc130 = loc("_tmp46"(#loc14))
+#loc131 = loc("_tmp46"(#loc15))
+#loc132 = loc("r0_index"(#loc16))
+#loc133 = loc("r0_mask"(#loc17))
+#loc134 = loc("r0_4"(#loc18))
+#loc135 = loc("r0_3"(#loc19))
+#loc136 = loc("tmp0"(#loc20))
+#loc137 = loc("tmp0"(#loc21))
+#loc138 = loc("tmp2"(#loc22))
+#loc139 = loc("tmp3"(#loc23))
+#loc140 = loc("tmp3"(#loc24))
+#loc141 = loc("tmp5"(#loc25))
+#loc142 = loc("tmp6"(#loc26))
+#loc143 = loc("tmp7"(#loc27))
+#loc144 = loc("tmp7"(#loc28))
+#loc145 = loc("tmp8"(#loc29))
+#loc146 = loc("tmp8"(#loc30))
+#loc147 = loc("tmp9"(#loc31))
+#loc148 = loc("tmp10"(#loc32))
+#loc149 = loc("tmp10"(#loc33))
+#loc150 = loc("tmp10"(#loc34))
+#loc151 = loc("tmp10"(#loc35))
+#loc152 = loc("tmp10"(#loc36))
+#loc153 = loc("tmp11"(#loc37))
+#loc154 = loc("tmp12"(#loc38))
+#loc155 = loc("tmp13"(#loc39))
+#loc156 = loc("tmp14"(#loc40))
+#loc157 = loc("tmp15"(#loc41))
+#loc158 = loc("tmp16"(#loc42))
+#loc159 = loc("tmp17"(#loc43))
+#loc160 = loc("tmp18"(#loc44))
+#loc161 = loc("tmp19"(#loc45))
+#loc162 = loc("tmp20"(#loc46))
+#loc163 = loc("tmp21"(#loc47))
+#loc164 = loc("tmp22"(#loc48))
+#loc165 = loc("tmp23"(#loc49))
+#loc166 = loc("tmp24"(#loc50))
+#loc167 = loc("tmp25"(#loc51))
+#loc168 = loc("tmp26"(#loc52))
+#loc169 = loc("tmp27"(#loc53))
+#loc170 = loc("tmp28"(#loc54))
+#loc171 = loc("tmp29"(#loc55))
+#loc172 = loc("tmp30"(#loc56))
+#loc173 = loc("tmp30"(#loc57))
+#loc174 = loc("tmp30"(#loc58))
+#loc175 = loc("tmp30"(#loc59))
+#loc176 = loc("tmp30"(#loc60))
+#loc177 = loc("tmp30"(#loc61))
+#loc178 = loc("tmp31"(#loc62))
+#loc179 = loc("tmp32"(#loc63))
+#loc180 = loc("tmp33"(#loc64))
+#loc181 = loc("tmp34"(#loc65))
+#loc182 = loc("tmp35"(#loc66))
+#loc183 = loc("tmp36"(#loc67))
+#loc184 = loc("tmp37"(#loc68))
+#loc185 = loc("tmp38"(#loc69))
+#loc186 = loc("tmp39"(#loc70))
+#loc187 = loc("tmp40"(#loc71))
+#loc188 = loc("tmp41"(#loc72))
+#loc189 = loc("tmp42"(#loc73))
+#loc190 = loc("tmp43"(#loc74))
+#loc191 = loc("tmp44"(#loc75))
+#loc192 = loc("tmp47"(#loc76))
+#loc193 = loc("_tmp46"(#loc77))
+#loc194 = loc("_tmp46"(#loc78))
+#loc195 = loc("tmp46"(#loc80))
+#loc196 = loc("tmp46"(#loc81))
+#loc197 = loc("tmp48"(#loc82))
+#loc198 = loc("tmp49"(#loc83))
+#loc199 = loc("tmp50"(#loc84))
+#loc200 = loc("tmp51"(#loc85))
+#loc201 = loc("tmp52"(#loc86))
+#loc202 = loc("tmp53"(#loc87))
+#loc203 = loc("tmp54"(#loc88))
+#loc204 = loc("tmp55"(#loc89))
+#loc205 = loc("tmp56"(#loc90))
+#loc206 = loc("tmp57"(#loc91))

SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.ttgir

@@ -0,0 +1,280 @@
+#blocked = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 32], warpsPerCTA = [1, 16], order = [0, 1]}>
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":18:0)
+#loc1 = loc(unknown)
+#loc63 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":87:27)
+#loc79 = loc("in_ptr0"(#loc))
+#loc80 = loc("out_ptr1"(#loc))
+#loc81 = loc("out_ptr2"(#loc))
+#loc82 = loc("ks0"(#loc))
+#loc83 = loc("ks1"(#loc))
+#loc84 = loc("ks2"(#loc))
+#loc85 = loc("ks3"(#loc))
+#loc86 = loc("ks4"(#loc))
+#loc87 = loc("ks5"(#loc))
+#loc88 = loc("xnumel"(#loc))
+#loc89 = loc("r0_numel"(#loc))
+#loc149 = loc("tmp46"(#loc63))
+#loc164 = loc(callsite(#loc1 at #loc149))
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 16 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1(%in_ptr0: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr1: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %ks2: i64 loc("ks2"(#loc)), %ks3: i64 loc("ks3"(#loc)), %ks4: i64 loc("ks4"(#loc)), %ks5: i64 loc("ks5"(#loc)), %xnumel: i32 loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %cst = arith.constant dense<128> : tensor<1x1024xi32, #blocked> loc(#loc1)
+    %cst_0 = arith.constant dense<16384> : tensor<1x1024xi32, #blocked> loc(#loc1)
+    %c-128_i64 = arith.constant -128 : i64 loc(#loc1)
+    %c0_i64 = arith.constant 0 : i64 loc(#loc1)
+    %c128_i64 = arith.constant 128 : i64 loc(#loc1)
+    %c1024_i32 = arith.constant 1024 : i32 loc(#loc1)
+    %c16384_i32 = arith.constant 16384 : i32 loc(#loc1)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc1)
+    %cst_1 = arith.constant dense<16384> : tensor<1x1xi64, #blocked> loc(#loc1)
+    %cst_2 = arith.constant dense<0> : tensor<1x1xi64, #blocked> loc(#loc1)
+    %cst_3 = arith.constant dense<false> : tensor<1x1024xi1, #blocked> loc(#loc1)
+    %cst_4 = arith.constant dense<0> : tensor<1x1024xi64, #blocked> loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc90)
+    %xmask = arith.cmpi slt, %xoffset, %xnumel : i32 loc(#loc91)
+    %r0_base = tt.make_range {end = 1024 : i32, start = 0 : i32} : tensor<1024xi32, #ttg.slice<{dim = 0, parent = #blocked}>> loc(#loc92)
+    %r0_base_5 = tt.expand_dims %r0_base {axis = 0 : i32} : tensor<1024xi32, #ttg.slice<{dim = 0, parent = #blocked}>> -> tensor<1x1024xi32, #blocked> loc(#loc92)
+    %x1 = arith.extsi %xoffset : i32 to i64 loc(#loc93)
+    %x1_6 = arith.divsi %x1, %ks0 : i64 loc(#loc93)
+    %x1_7 = arith.remsi %x1_6, %ks1 : i64 loc(#loc94)
+    %x0 = arith.remsi %x1, %ks0 : i64 loc(#loc95)
+    %x2 = arith.divsi %x1, %ks4 : i64 loc(#loc96)
+    %tmp0 = arith.muli %x1_7, %c128_i64 : i64 loc(#loc97)
+    %tmp0_8 = tt.splat %tmp0 : i64 -> tensor<1x1024xi64, #blocked> loc(#loc159)
+    %tmp2 = tt.splat %ks2 : i64 -> tensor<1x1024xi64, #blocked> loc(#loc99)
+    %tmp3 = arith.muli %x0, %c128_i64 : i64 loc(#loc100)
+    %tmp3_9 = tt.splat %tmp3 : i64 -> tensor<1x1024xi64, #blocked> loc(#loc160)
+    %tmp5 = tt.splat %ks3 : i64 -> tensor<1x1024xi64, #blocked> loc(#loc102)
+    %tmp10 = tt.addptr %in_ptr0, %x2 : !tt.ptr<i64>, i64 loc(#loc103)
+    %tmp10_10 = tt.splat %xmask : i1 -> tensor<1x1024xi1, #blocked> loc(#loc161)
+    %tmp10_11 = tt.splat %tmp10 : !tt.ptr<i64> -> tensor<1x1024x!tt.ptr<i64>, #blocked> loc(#loc105)
+    %tmp17 = tt.splat %ks5 : i64 -> tensor<1x1024xi64, #blocked> loc(#loc106)
+    %tmp23 = arith.cmpi slt, %ks5, %c0_i64 : i64 loc(#loc107)
+    %tmp23_12 = tt.splat %tmp23 : i1 -> tensor<1x1024xi1, #blocked> loc(#loc107)
+    %tmp30 = arith.muli %x1_7, %c-128_i64 : i64 loc(#loc108)
+    %tmp30_13 = tt.splat %tmp30 : i64 -> tensor<1x1024xi64, #blocked> loc(#loc162)
+    %_tmp46 = scf.for %_tmp46_15 = %c0_i32 to %c16384_i32 step %c1024_i32 iter_args(%arg12 = %cst_4) -> (tensor<1x1024xi64, #blocked>)  : i32 {
+      %r0_index = tt.splat %_tmp46_15 : i32 -> tensor<1x1024xi32, #blocked> loc(#loc111)
+      %r0_index_16 = arith.addi %r0_index, %r0_base_5 : tensor<1x1024xi32, #blocked> loc(#loc111)
+      %r0_mask = arith.cmpi slt, %r0_index_16, %cst_0 : tensor<1x1024xi32, #blocked> loc(#loc112)
+      %r0_4 = arith.divsi %r0_index_16, %cst : tensor<1x1024xi32, #blocked> loc(#loc113)
+      %r0_3 = arith.remsi %r0_index_16, %cst : tensor<1x1024xi32, #blocked> loc(#loc114)
+      %tmp0_17 = arith.extsi %r0_4 : tensor<1x1024xi32, #blocked> to tensor<1x1024xi64, #blocked> loc(#loc98)
+      %tmp0_18 = arith.addi %tmp0_17, %tmp0_8 : tensor<1x1024xi64, #blocked> loc(#loc98)
+      %tmp2_19 = arith.cmpi slt, %tmp0_18, %tmp2 : tensor<1x1024xi64, #blocked> loc(#loc99)
+      %tmp3_20 = arith.extsi %r0_3 : tensor<1x1024xi32, #blocked> to tensor<1x1024xi64, #blocked> loc(#loc101)
+      %tmp3_21 = arith.addi %tmp3_20, %tmp3_9 : tensor<1x1024xi64, #blocked> loc(#loc101)
+      %tmp5_22 = arith.cmpi slt, %tmp3_21, %tmp5 : tensor<1x1024xi64, #blocked> loc(#loc102)
+      %tmp6 = arith.andi %tmp2_19, %tmp5_22 : tensor<1x1024xi1, #blocked> loc(#loc115)
+      %tmp9 = arith.cmpi sge, %tmp0_18, %tmp3_21 : tensor<1x1024xi64, #blocked> loc(#loc116)
+      %tmp10_23 = arith.andi %r0_mask, %tmp6 : tensor<1x1024xi1, #blocked> loc(#loc117)
+      %tmp10_24 = arith.andi %tmp10_23, %tmp10_10 : tensor<1x1024xi1, #blocked> loc(#loc104)
+      %tmp10_25 = tt.load %tmp10_11, %tmp10_24, %cst_4 evictionPolicy = evict_last : tensor<1x1024x!tt.ptr<i64>, #blocked> loc(#loc105)
+      %tmp11 = arith.cmpi slt, %tmp3_21, %tmp10_25 : tensor<1x1024xi64, #blocked> loc(#loc118)
+      %tmp12 = arith.cmpi slt, %tmp0_18, %tmp10_25 : tensor<1x1024xi64, #blocked> loc(#loc119)
+      %tmp13 = arith.andi %tmp11, %tmp12 : tensor<1x1024xi1, #blocked> loc(#loc120)
+      %tmp14 = arith.andi %tmp9, %tmp13 : tensor<1x1024xi1, #blocked> loc(#loc121)
+      %tmp18 = arith.cmpi sge, %tmp3_21, %tmp17 : tensor<1x1024xi64, #blocked> loc(#loc122)
+      %tmp19 = arith.remsi %tmp3_21, %tmp17 : tensor<1x1024xi64, #blocked> loc(#loc123)
+      %tmp21 = arith.cmpi ne, %tmp19, %cst_4 : tensor<1x1024xi64, #blocked> loc(#loc124)
+      %tmp22 = arith.cmpi slt, %tmp19, %cst_4 : tensor<1x1024xi64, #blocked> loc(#loc125)
+      %tmp24 = arith.cmpi ne, %tmp22, %tmp23_12 : tensor<1x1024xi1, #blocked> loc(#loc126)
+      %tmp25 = arith.andi %tmp21, %tmp24 : tensor<1x1024xi1, #blocked> loc(#loc127)
+      %tmp26 = arith.addi %tmp19, %tmp17 : tensor<1x1024xi64, #blocked> loc(#loc128)
+      %tmp27 = arith.select %tmp25, %tmp26, %tmp19 : tensor<1x1024xi1, #blocked>, tensor<1x1024xi64, #blocked> loc(#loc129)
+      %tmp28 = arith.cmpi slt, %tmp27, %tmp10_25 : tensor<1x1024xi64, #blocked> loc(#loc130)
+      %tmp29 = arith.andi %tmp18, %tmp28 : tensor<1x1024xi1, #blocked> loc(#loc131)
+      %tmp30_26 = arith.subi %r0_3, %r0_4 : tensor<1x1024xi32, #blocked> loc(#loc132)
+      %tmp30_27 = arith.extsi %tmp30_26 : tensor<1x1024xi32, #blocked> to tensor<1x1024xi64, #blocked> loc(#loc109)
+      %tmp30_28 = arith.addi %tmp30_27, %tmp30_13 : tensor<1x1024xi64, #blocked> loc(#loc109)
+      %tmp30_29 = arith.addi %tmp30_28, %tmp3_9 : tensor<1x1024xi64, #blocked> loc(#loc133)
+      %tmp31 = arith.remsi %tmp30_29, %tmp17 : tensor<1x1024xi64, #blocked> loc(#loc134)
+      %tmp32 = arith.cmpi ne, %tmp31, %cst_4 : tensor<1x1024xi64, #blocked> loc(#loc135)
+      %tmp33 = arith.cmpi slt, %tmp31, %cst_4 : tensor<1x1024xi64, #blocked> loc(#loc136)
+      %tmp34 = arith.cmpi ne, %tmp33, %tmp23_12 : tensor<1x1024xi1, #blocked> loc(#loc137)
+      %tmp35 = arith.andi %tmp32, %tmp34 : tensor<1x1024xi1, #blocked> loc(#loc138)
+      %tmp36 = arith.addi %tmp31, %tmp17 : tensor<1x1024xi64, #blocked> loc(#loc139)
+      %tmp37 = arith.select %tmp35, %tmp36, %tmp31 : tensor<1x1024xi1, #blocked>, tensor<1x1024xi64, #blocked> loc(#loc140)
+      %tmp39 = arith.cmpi eq, %tmp37, %cst_4 : tensor<1x1024xi64, #blocked> loc(#loc141)
+      %tmp40 = arith.andi %tmp29, %tmp39 : tensor<1x1024xi1, #blocked> loc(#loc142)
+      %tmp41 = arith.ori %tmp14, %tmp40 : tensor<1x1024xi1, #blocked> loc(#loc143)
+      %tmp43 = arith.select %tmp6, %tmp41, %cst_3 : tensor<1x1024xi1, #blocked>, tensor<1x1024xi1, #blocked> loc(#loc144)
+      %tmp44 = arith.extui %tmp43 : tensor<1x1024xi1, #blocked> to tensor<1x1024xi64, #blocked> loc(#loc145)
+      %tmp47 = arith.addi %arg12, %tmp44 : tensor<1x1024xi64, #blocked> loc(#loc146)
+      %_tmp46_30 = arith.andi %r0_mask, %tmp10_10 : tensor<1x1024xi1, #blocked> loc(#loc147)
+      %_tmp46_31 = arith.select %_tmp46_30, %tmp47, %arg12 : tensor<1x1024xi1, #blocked>, tensor<1x1024xi64, #blocked> loc(#loc148)
+      scf.yield %_tmp46_31 : tensor<1x1024xi64, #blocked> loc(#loc61)
+    } loc(#loc110)
+    %tmp46 = "tt.reduce"(%_tmp46) <{axis = 1 : i32}> ({
+    ^bb0(%tmp46_15: i64 loc(callsite(#loc1 at #loc149)), %tmp46_16: i64 loc(callsite(#loc1 at #loc149))):
+      %tmp46_17 = arith.addi %tmp46_15, %tmp46_16 : i64 loc(#loc167)
+      tt.reduce.return %tmp46_17 : i64 loc(#loc163)
+    }) : (tensor<1x1024xi64, #blocked>) -> tensor<1xi64, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc163)
+    %tmp46_14 = tt.expand_dims %tmp46 {axis = 1 : i32} : tensor<1xi64, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<1x1xi64, #blocked> loc(#loc150)
+    %tmp49 = arith.cmpi sgt, %tmp46_14, %cst_2 : tensor<1x1xi64, #blocked> loc(#loc151)
+    %tmp51 = arith.cmpi slt, %tmp46_14, %cst_1 : tensor<1x1xi64, #blocked> loc(#loc152)
+    %tmp52 = arith.andi %tmp49, %tmp51 : tensor<1x1xi1, #blocked> loc(#loc153)
+    %tmp54 = arith.extui %tmp52 : tensor<1x1xi1, #blocked> to tensor<1x1xi32, #blocked> loc(#loc165)
+    %tmp55 = arith.cmpi eq, %tmp46_14, %cst_1 : tensor<1x1xi64, #blocked> loc(#loc156)
+    %tmp57 = arith.extui %tmp55 : tensor<1x1xi1, #blocked> to tensor<1x1xi32, #blocked> loc(#loc166)
+    %0 = tt.addptr %out_ptr1, %xoffset : !tt.ptr<i32>, i32 loc(#loc74)
+    %1 = tt.splat %0 : !tt.ptr<i32> -> tensor<1x1x!tt.ptr<i32>, #blocked> loc(#loc75)
+    %2 = tt.splat %xmask : i1 -> tensor<1x1xi1, #blocked> loc(#loc75)
+    tt.store %1, %tmp54, %2 : tensor<1x1x!tt.ptr<i32>, #blocked> loc(#loc75)
+    %3 = tt.addptr %out_ptr2, %xoffset : !tt.ptr<i32>, i32 loc(#loc76)
+    %4 = tt.splat %3 : !tt.ptr<i32> -> tensor<1x1x!tt.ptr<i32>, #blocked> loc(#loc77)
+    tt.store %4, %tmp57, %2 : tensor<1x1x!tt.ptr<i32>, #blocked> loc(#loc77)
+    tt.return loc(#loc78)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":22:28)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":24:21)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":25:37)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":27:21)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":27:28)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":28:19)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":29:19)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":39:26)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":39:22)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":41:22)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":42:26)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":42:22)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":44:22)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:35)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:94)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:77)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":56:37)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":62:92)
+#loc20 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:45)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:38)
+#loc22 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":32:40)
+#loc23 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":33:31)
+#loc24 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":34:29)
+#loc25 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":37:27)
+#loc26 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":38:27)
+#loc27 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":45:22)
+#loc28 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":48:23)
+#loc29 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:87)
+#loc30 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":50:23)
+#loc31 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":51:23)
+#loc32 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":52:24)
+#loc33 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":53:23)
+#loc34 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":57:24)
+#loc35 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":58:24)
+#loc36 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":60:25)
+#loc37 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":61:92)
+#loc38 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":63:25)
+#loc39 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":64:24)
+#loc40 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":65:24)
+#loc41 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":66:39)
+#loc42 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":67:24)
+#loc43 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":68:24)
+#loc44 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:24)
+#loc45 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:51)
+#loc46 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":70:25)
+#loc47 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":71:25)
+#loc48 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":72:92)
+#loc49 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":73:25)
+#loc50 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":74:24)
+#loc51 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":75:24)
+#loc52 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":76:39)
+#loc53 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":78:25)
+#loc54 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":79:24)
+#loc55 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":80:24)
+#loc56 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":82:38)
+#loc57 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":83:25)
+#loc58 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":85:25)
+#loc59 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":86:36)
+#loc60 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":86:50)
+#loc61 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":86:8)
+#loc62 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc64 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc65 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":87:30)
+#loc66 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":89:20)
+#loc67 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":91:20)
+#loc68 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":92:20)
+#loc69 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":94:21)
+#loc70 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":93:21)
+#loc71 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":95:21)
+#loc72 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":97:21)
+#loc73 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":96:21)
+#loc74 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":98:25)
+#loc75 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":98:37)
+#loc76 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":99:25)
+#loc77 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":99:37)
+#loc78 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":99:4)
+#loc90 = loc("xoffset"(#loc2))
+#loc91 = loc("xmask"(#loc3))
+#loc92 = loc("r0_base"(#loc4))
+#loc93 = loc("x1"(#loc5))
+#loc94 = loc("x1"(#loc6))
+#loc95 = loc("x0"(#loc7))
+#loc96 = loc("x2"(#loc8))
+#loc97 = loc("tmp0"(#loc9))
+#loc98 = loc("tmp0"(#loc10))
+#loc99 = loc("tmp2"(#loc11))
+#loc100 = loc("tmp3"(#loc12))
+#loc101 = loc("tmp3"(#loc13))
+#loc102 = loc("tmp5"(#loc14))
+#loc103 = loc("tmp10"(#loc15))
+#loc104 = loc("tmp10"(#loc16))
+#loc105 = loc("tmp10"(#loc17))
+#loc106 = loc("tmp17"(#loc18))
+#loc107 = loc("tmp23"(#loc19))
+#loc108 = loc("tmp30"(#loc20))
+#loc109 = loc("tmp30"(#loc21))
+#loc110 = loc("_tmp46"(#loc22))
+#loc111 = loc("r0_index"(#loc23))
+#loc112 = loc("r0_mask"(#loc24))
+#loc113 = loc("r0_4"(#loc25))
+#loc114 = loc("r0_3"(#loc26))
+#loc115 = loc("tmp6"(#loc27))
+#loc116 = loc("tmp9"(#loc28))
+#loc117 = loc("tmp10"(#loc29))
+#loc118 = loc("tmp11"(#loc30))
+#loc119 = loc("tmp12"(#loc31))
+#loc120 = loc("tmp13"(#loc32))
+#loc121 = loc("tmp14"(#loc33))
+#loc122 = loc("tmp18"(#loc34))
+#loc123 = loc("tmp19"(#loc35))
+#loc124 = loc("tmp21"(#loc36))
+#loc125 = loc("tmp22"(#loc37))
+#loc126 = loc("tmp24"(#loc38))
+#loc127 = loc("tmp25"(#loc39))
+#loc128 = loc("tmp26"(#loc40))
+#loc129 = loc("tmp27"(#loc41))
+#loc130 = loc("tmp28"(#loc42))
+#loc131 = loc("tmp29"(#loc43))
+#loc132 = loc("tmp30"(#loc44))
+#loc133 = loc("tmp30"(#loc45))
+#loc134 = loc("tmp31"(#loc46))
+#loc135 = loc("tmp32"(#loc47))
+#loc136 = loc("tmp33"(#loc48))
+#loc137 = loc("tmp34"(#loc49))
+#loc138 = loc("tmp35"(#loc50))
+#loc139 = loc("tmp36"(#loc51))
+#loc140 = loc("tmp37"(#loc52))
+#loc141 = loc("tmp39"(#loc53))
+#loc142 = loc("tmp40"(#loc54))
+#loc143 = loc("tmp41"(#loc55))
+#loc144 = loc("tmp43"(#loc56))
+#loc145 = loc("tmp44"(#loc57))
+#loc146 = loc("tmp47"(#loc58))
+#loc147 = loc("_tmp46"(#loc59))
+#loc148 = loc("_tmp46"(#loc60))
+#loc150 = loc("tmp46"(#loc65))
+#loc151 = loc("tmp49"(#loc66))
+#loc152 = loc("tmp51"(#loc67))
+#loc153 = loc("tmp52"(#loc68))
+#loc154 = loc("tmp54"(#loc69))
+#loc155 = loc("tmp53"(#loc70))
+#loc156 = loc("tmp55"(#loc71))
+#loc157 = loc("tmp57"(#loc72))
+#loc158 = loc("tmp56"(#loc73))
+#loc159 = loc(fused[#loc98, #loc97])
+#loc160 = loc(fused[#loc101, #loc100])
+#loc161 = loc(fused[#loc104, #loc91])
+#loc162 = loc(fused[#loc109, #loc108])
+#loc163 = loc(callsite(#loc62 at #loc149))
+#loc165 = loc(fused[#loc154, #loc155])
+#loc166 = loc(fused[#loc157, #loc158])
+#loc167 = loc(callsite(#loc64 at #loc163))

SpecForge-ext/cache/compiled_kernels/triton/7/DE6XSSYLS7BWGGS4UO3WTFWZCN6OVYXIHMGZ5KR7P3YWZXLVATDQ/triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1.ttir

@@ -0,0 +1,283 @@
+#loc = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":18:0)
+#loc1 = loc(unknown)
+#loc65 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":87:27)
+#loc81 = loc("in_ptr0"(#loc))
+#loc82 = loc("out_ptr1"(#loc))
+#loc83 = loc("out_ptr2"(#loc))
+#loc84 = loc("ks0"(#loc))
+#loc85 = loc("ks1"(#loc))
+#loc86 = loc("ks2"(#loc))
+#loc87 = loc("ks3"(#loc))
+#loc88 = loc("ks4"(#loc))
+#loc89 = loc("ks5"(#loc))
+#loc90 = loc("xnumel"(#loc))
+#loc91 = loc("r0_numel"(#loc))
+#loc153 = loc("tmp46"(#loc65))
+#loc168 = loc(callsite(#loc1 at #loc153))
+module {
+  tt.func public @triton_red_fused__to_copy_arange_bitwise_and_bitwise_or_constant_pad_nd_eq_ge_gt_index_lt_permute_remainder_sub_sum_view_1(%in_ptr0: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("in_ptr0"(#loc)), %out_ptr1: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr1"(#loc)), %out_ptr2: !tt.ptr<i32> {tt.divisibility = 16 : i32} loc("out_ptr2"(#loc)), %ks0: i64 loc("ks0"(#loc)), %ks1: i64 loc("ks1"(#loc)), %ks2: i64 loc("ks2"(#loc)), %ks3: i64 loc("ks3"(#loc)), %ks4: i64 loc("ks4"(#loc)), %ks5: i64 loc("ks5"(#loc)), %xnumel: i32 loc("xnumel"(#loc)), %r0_numel: i32 {tt.divisibility = 16 : i32} loc("r0_numel"(#loc))) attributes {noinline = false} {
+    %c-128_i64 = arith.constant -128 : i64 loc(#loc1)
+    %c0_i64 = arith.constant 0 : i64 loc(#loc1)
+    %c128_i64 = arith.constant 128 : i64 loc(#loc1)
+    %c1024_i32 = arith.constant 1024 : i32 loc(#loc2)
+    %c16384_i32 = arith.constant 16384 : i32 loc(#loc2)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc2)
+    %tmp50 = arith.constant dense<16384> : tensor<1x1xi64> loc(#loc92)
+    %cst = arith.constant dense<0> : tensor<1x1xi64> loc(#loc1)
+    %cst_0 = arith.constant dense<false> : tensor<1x1024xi1> loc(#loc1)
+    %cst_1 = arith.constant dense<128> : tensor<1x1024xi32> loc(#loc1)
+    %cst_2 = arith.constant dense<16384> : tensor<1x1024xi32> loc(#loc1)
+    %cst_3 = arith.constant dense<0> : tensor<1x1024xi64> loc(#loc1)
+    %xoffset = tt.get_program_id x : i32 loc(#loc93)
+    %xmask = arith.cmpi slt, %xoffset, %xnumel : i32 loc(#loc94)
+    %xmask_4 = tt.splat %xmask : i1 -> tensor<1x1xi1> loc(#loc94)
+    %r0_base = tt.make_range {end = 1024 : i32, start = 0 : i32} : tensor<1024xi32> loc(#loc95)
+    %r0_base_5 = tt.expand_dims %r0_base {axis = 0 : i32} : tensor<1024xi32> -> tensor<1x1024xi32> loc(#loc96)
+    %x1 = arith.extsi %xoffset : i32 to i64 loc(#loc97)
+    %x1_6 = arith.divsi %x1, %ks0 : i64 loc(#loc97)
+    %x1_7 = arith.remsi %x1_6, %ks1 : i64 loc(#loc98)
+    %x0 = arith.remsi %x1, %ks0 : i64 loc(#loc99)
+    %x2 = arith.divsi %x1, %ks4 : i64 loc(#loc100)
+    %_tmp46 = scf.for %r0_offset = %c0_i32 to %c16384_i32 step %c1024_i32 iter_args(%_tmp46_9 = %cst_3) -> (tensor<1x1024xi64>)  : i32 {
+      %r0_index = tt.splat %r0_offset : i32 -> tensor<1x1024xi32> loc(#loc102)
+      %r0_index_10 = arith.addi %r0_index, %r0_base_5 : tensor<1x1024xi32> loc(#loc102)
+      %r0_mask = arith.cmpi slt, %r0_index_10, %cst_2 : tensor<1x1024xi32> loc(#loc103)
+      %r0_4 = arith.divsi %r0_index_10, %cst_1 : tensor<1x1024xi32> loc(#loc104)
+      %r0_3 = arith.remsi %r0_index_10, %cst_1 : tensor<1x1024xi32> loc(#loc105)
+      %tmp0 = arith.muli %x1_7, %c128_i64 : i64 loc(#loc106)
+      %tmp0_11 = arith.extsi %r0_4 : tensor<1x1024xi32> to tensor<1x1024xi64> loc(#loc107)
+      %tmp0_12 = tt.splat %tmp0 : i64 -> tensor<1x1024xi64> loc(#loc163)
+      %tmp0_13 = arith.addi %tmp0_11, %tmp0_12 : tensor<1x1024xi64> loc(#loc107)
+      %tmp2 = tt.splat %ks2 : i64 -> tensor<1x1024xi64> loc(#loc108)
+      %tmp2_14 = arith.cmpi slt, %tmp0_13, %tmp2 : tensor<1x1024xi64> loc(#loc108)
+      %tmp3 = arith.muli %x0, %c128_i64 : i64 loc(#loc109)
+      %tmp3_15 = arith.extsi %r0_3 : tensor<1x1024xi32> to tensor<1x1024xi64> loc(#loc110)
+      %tmp3_16 = tt.splat %tmp3 : i64 -> tensor<1x1024xi64> loc(#loc164)
+      %tmp3_17 = arith.addi %tmp3_15, %tmp3_16 : tensor<1x1024xi64> loc(#loc110)
+      %tmp5 = tt.splat %ks3 : i64 -> tensor<1x1024xi64> loc(#loc111)
+      %tmp5_18 = arith.cmpi slt, %tmp3_17, %tmp5 : tensor<1x1024xi64> loc(#loc111)
+      %tmp6 = arith.andi %tmp2_14, %tmp5_18 : tensor<1x1024xi1> loc(#loc112)
+      %tmp9 = arith.cmpi sge, %tmp0_13, %tmp3_17 : tensor<1x1024xi64> loc(#loc113)
+      %tmp10 = tt.addptr %in_ptr0, %x2 : !tt.ptr<i64>, i64 loc(#loc114)
+      %tmp10_19 = tt.splat %tmp10 : !tt.ptr<i64> -> tensor<1x1024x!tt.ptr<i64>> loc(#loc114)
+      %tmp10_20 = arith.andi %r0_mask, %tmp6 : tensor<1x1024xi1> loc(#loc115)
+      %tmp10_21 = tt.splat %xmask : i1 -> tensor<1x1024xi1> loc(#loc165)
+      %tmp10_22 = arith.andi %tmp10_20, %tmp10_21 : tensor<1x1024xi1> loc(#loc116)
+      %tmp10_23 = tt.load %tmp10_19, %tmp10_22, %cst_3 evictionPolicy = evict_last : tensor<1x1024x!tt.ptr<i64>> loc(#loc117)
+      %tmp11 = arith.cmpi slt, %tmp3_17, %tmp10_23 : tensor<1x1024xi64> loc(#loc118)
+      %tmp12 = arith.cmpi slt, %tmp0_13, %tmp10_23 : tensor<1x1024xi64> loc(#loc119)
+      %tmp13 = arith.andi %tmp11, %tmp12 : tensor<1x1024xi1> loc(#loc120)
+      %tmp14 = arith.andi %tmp9, %tmp13 : tensor<1x1024xi1> loc(#loc121)
+      %tmp17 = tt.splat %ks5 : i64 -> tensor<1x1024xi64> loc(#loc122)
+      %tmp18 = arith.cmpi sge, %tmp3_17, %tmp17 : tensor<1x1024xi64> loc(#loc123)
+      %tmp19 = arith.remsi %tmp3_17, %tmp17 : tensor<1x1024xi64> loc(#loc124)
+      %tmp21 = arith.cmpi ne, %tmp19, %cst_3 : tensor<1x1024xi64> loc(#loc125)
+      %tmp22 = arith.cmpi slt, %tmp19, %cst_3 : tensor<1x1024xi64> loc(#loc126)
+      %tmp23 = arith.cmpi slt, %ks5, %c0_i64 : i64 loc(#loc127)
+      %tmp23_24 = tt.splat %tmp23 : i1 -> tensor<1x1024xi1> loc(#loc127)
+      %tmp24 = arith.cmpi ne, %tmp22, %tmp23_24 : tensor<1x1024xi1> loc(#loc128)
+      %tmp25 = arith.andi %tmp21, %tmp24 : tensor<1x1024xi1> loc(#loc129)
+      %tmp26 = arith.addi %tmp19, %tmp17 : tensor<1x1024xi64> loc(#loc130)
+      %tmp27 = arith.select %tmp25, %tmp26, %tmp19 : tensor<1x1024xi1>, tensor<1x1024xi64> loc(#loc131)
+      %tmp28 = arith.cmpi slt, %tmp27, %tmp10_23 : tensor<1x1024xi64> loc(#loc132)
+      %tmp29 = arith.andi %tmp18, %tmp28 : tensor<1x1024xi1> loc(#loc133)
+      %tmp30 = arith.subi %r0_3, %r0_4 : tensor<1x1024xi32> loc(#loc134)
+      %tmp30_25 = arith.muli %x1_7, %c-128_i64 : i64 loc(#loc135)
+      %tmp30_26 = arith.extsi %tmp30 : tensor<1x1024xi32> to tensor<1x1024xi64> loc(#loc136)
+      %tmp30_27 = tt.splat %tmp30_25 : i64 -> tensor<1x1024xi64> loc(#loc166)
+      %tmp30_28 = arith.addi %tmp30_26, %tmp30_27 : tensor<1x1024xi64> loc(#loc136)
+      %tmp30_29 = arith.addi %tmp30_28, %tmp3_16 : tensor<1x1024xi64> loc(#loc137)
+      %tmp31 = arith.remsi %tmp30_29, %tmp17 : tensor<1x1024xi64> loc(#loc138)
+      %tmp32 = arith.cmpi ne, %tmp31, %cst_3 : tensor<1x1024xi64> loc(#loc139)
+      %tmp33 = arith.cmpi slt, %tmp31, %cst_3 : tensor<1x1024xi64> loc(#loc140)
+      %tmp34 = arith.cmpi ne, %tmp33, %tmp23_24 : tensor<1x1024xi1> loc(#loc141)
+      %tmp35 = arith.andi %tmp32, %tmp34 : tensor<1x1024xi1> loc(#loc142)
+      %tmp36 = arith.addi %tmp31, %tmp17 : tensor<1x1024xi64> loc(#loc143)
+      %tmp37 = arith.select %tmp35, %tmp36, %tmp31 : tensor<1x1024xi1>, tensor<1x1024xi64> loc(#loc144)
+      %tmp39 = arith.cmpi eq, %tmp37, %cst_3 : tensor<1x1024xi64> loc(#loc145)
+      %tmp40 = arith.andi %tmp29, %tmp39 : tensor<1x1024xi1> loc(#loc146)
+      %tmp41 = arith.ori %tmp14, %tmp40 : tensor<1x1024xi1> loc(#loc147)
+      %tmp43 = arith.select %tmp6, %tmp41, %cst_0 : tensor<1x1024xi1>, tensor<1x1024xi1> loc(#loc148)
+      %tmp44 = arith.extui %tmp43 : tensor<1x1024xi1> to tensor<1x1024xi64> loc(#loc149)
+      %tmp47 = arith.addi %_tmp46_9, %tmp44 : tensor<1x1024xi64> loc(#loc150)
+      %_tmp46_30 = arith.andi %r0_mask, %tmp10_21 : tensor<1x1024xi1> loc(#loc151)
+      %_tmp46_31 = arith.select %_tmp46_30, %tmp47, %_tmp46_9 : tensor<1x1024xi1>, tensor<1x1024xi64> loc(#loc152)
+      scf.yield %_tmp46_31 : tensor<1x1024xi64> loc(#loc63)
+    } loc(#loc101)
+    %tmp46 = "tt.reduce"(%_tmp46) <{axis = 1 : i32}> ({
+    ^bb0(%tmp46_9: i64 loc(callsite(#loc1 at #loc153)), %tmp46_10: i64 loc(callsite(#loc1 at #loc153))):
+      %tmp46_11 = arith.addi %tmp46_9, %tmp46_10 : i64 loc(#loc171)
+      tt.reduce.return %tmp46_11 : i64 loc(#loc167)
+    }) : (tensor<1x1024xi64>) -> tensor<1xi64> loc(#loc167)
+    %tmp46_8 = tt.expand_dims %tmp46 {axis = 1 : i32} : tensor<1xi64> -> tensor<1x1xi64> loc(#loc154)
+    %tmp49 = arith.cmpi sgt, %tmp46_8, %cst : tensor<1x1xi64> loc(#loc155)
+    %tmp51 = arith.cmpi slt, %tmp46_8, %tmp50 : tensor<1x1xi64> loc(#loc156)
+    %tmp52 = arith.andi %tmp49, %tmp51 : tensor<1x1xi1> loc(#loc157)
+    %tmp54 = arith.extui %tmp52 : tensor<1x1xi1> to tensor<1x1xi32> loc(#loc169)
+    %tmp55 = arith.cmpi eq, %tmp46_8, %tmp50 : tensor<1x1xi64> loc(#loc160)
+    %tmp57 = arith.extui %tmp55 : tensor<1x1xi1> to tensor<1x1xi32> loc(#loc170)
+    %0 = tt.addptr %out_ptr1, %xoffset : !tt.ptr<i32>, i32 loc(#loc76)
+    %1 = tt.splat %0 : !tt.ptr<i32> -> tensor<1x1x!tt.ptr<i32>> loc(#loc76)
+    tt.store %1, %tmp54, %xmask_4 : tensor<1x1x!tt.ptr<i32>> loc(#loc77)
+    %2 = tt.addptr %out_ptr2, %xoffset : !tt.ptr<i32>, i32 loc(#loc78)
+    %3 = tt.splat %2 : !tt.ptr<i32> -> tensor<1x1x!tt.ptr<i32>> loc(#loc78)
+    tt.store %3, %tmp57, %xmask_4 : tensor<1x1x!tt.ptr<i32>> loc(#loc79)
+    tt.return loc(#loc80)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":32:40)
+#loc3 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":90:35)
+#loc4 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":22:28)
+#loc5 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":24:21)
+#loc6 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":25:27)
+#loc7 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":25:37)
+#loc8 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":27:21)
+#loc9 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":27:28)
+#loc10 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":28:19)
+#loc11 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":29:19)
+#loc12 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":33:31)
+#loc13 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":34:29)
+#loc14 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":37:27)
+#loc15 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":38:27)
+#loc16 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":39:26)
+#loc17 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":39:22)
+#loc18 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":41:22)
+#loc19 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":42:26)
+#loc20 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":42:22)
+#loc21 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":44:22)
+#loc22 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":45:22)
+#loc23 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":48:23)
+#loc24 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:35)
+#loc25 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:87)
+#loc26 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:94)
+#loc27 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":49:77)
+#loc28 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":50:23)
+#loc29 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":51:23)
+#loc30 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":52:24)
+#loc31 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":53:23)
+#loc32 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":56:37)
+#loc33 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":57:24)
+#loc34 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":58:24)
+#loc35 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":60:25)
+#loc36 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":61:92)
+#loc37 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":62:92)
+#loc38 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":63:25)
+#loc39 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":64:24)
+#loc40 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":65:24)
+#loc41 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":66:39)
+#loc42 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":67:24)
+#loc43 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":68:24)
+#loc44 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:24)
+#loc45 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:45)
+#loc46 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:38)
+#loc47 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":69:51)
+#loc48 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":70:25)
+#loc49 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":71:25)
+#loc50 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":72:92)
+#loc51 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":73:25)
+#loc52 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":74:24)
+#loc53 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":75:24)
+#loc54 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":76:39)
+#loc55 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":78:25)
+#loc56 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":79:24)
+#loc57 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":80:24)
+#loc58 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":82:38)
+#loc59 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":83:25)
+#loc60 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":85:25)
+#loc61 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":86:36)
+#loc62 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":86:50)
+#loc63 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":86:8)
+#loc64 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":291:36)
+#loc66 = loc("/workspace/specforge/lib/python3.11/site-packages/triton/language/standard.py":261:15)
+#loc67 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":87:30)
+#loc68 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":89:20)
+#loc69 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":91:20)
+#loc70 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":92:20)
+#loc71 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":94:21)
+#loc72 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":93:21)
+#loc73 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":95:21)
+#loc74 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":97:21)
+#loc75 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":96:21)
+#loc76 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":98:25)
+#loc77 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":98:37)
+#loc78 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":99:25)
+#loc79 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":99:37)
+#loc80 = loc("/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/jx/cjxtezx44vmqh622f3tpmaklof56br4eylt3nz4a46kavvz2gwqw.py":99:4)
+#loc92 = loc("tmp50"(#loc3))
+#loc93 = loc("xoffset"(#loc4))
+#loc94 = loc("xmask"(#loc5))
+#loc95 = loc("r0_base"(#loc6))
+#loc96 = loc("r0_base"(#loc7))
+#loc97 = loc("x1"(#loc8))
+#loc98 = loc("x1"(#loc9))
+#loc99 = loc("x0"(#loc10))
+#loc100 = loc("x2"(#loc11))
+#loc101 = loc("_tmp46"(#loc2))
+#loc102 = loc("r0_index"(#loc12))
+#loc103 = loc("r0_mask"(#loc13))
+#loc104 = loc("r0_4"(#loc14))
+#loc105 = loc("r0_3"(#loc15))
+#loc106 = loc("tmp0"(#loc16))
+#loc107 = loc("tmp0"(#loc17))
+#loc108 = loc("tmp2"(#loc18))
+#loc109 = loc("tmp3"(#loc19))
+#loc110 = loc("tmp3"(#loc20))
+#loc111 = loc("tmp5"(#loc21))
+#loc112 = loc("tmp6"(#loc22))
+#loc113 = loc("tmp9"(#loc23))
+#loc114 = loc("tmp10"(#loc24))
+#loc115 = loc("tmp10"(#loc25))
+#loc116 = loc("tmp10"(#loc26))
+#loc117 = loc("tmp10"(#loc27))
+#loc118 = loc("tmp11"(#loc28))
+#loc119 = loc("tmp12"(#loc29))
+#loc120 = loc("tmp13"(#loc30))
+#loc121 = loc("tmp14"(#loc31))
+#loc122 = loc("tmp17"(#loc32))
+#loc123 = loc("tmp18"(#loc33))
+#loc124 = loc("tmp19"(#loc34))
+#loc125 = loc("tmp21"(#loc35))
+#loc126 = loc("tmp22"(#loc36))
+#loc127 = loc("tmp23"(#loc37))
+#loc128 = loc("tmp24"(#loc38))
+#loc129 = loc("tmp25"(#loc39))
+#loc130 = loc("tmp26"(#loc40))
+#loc131 = loc("tmp27"(#loc41))
+#loc132 = loc("tmp28"(#loc42))
+#loc133 = loc("tmp29"(#loc43))
+#loc134 = loc("tmp30"(#loc44))
+#loc135 = loc("tmp30"(#loc45))
+#loc136 = loc("tmp30"(#loc46))
+#loc137 = loc("tmp30"(#loc47))
+#loc138 = loc("tmp31"(#loc48))
+#loc139 = loc("tmp32"(#loc49))
+#loc140 = loc("tmp33"(#loc50))
+#loc141 = loc("tmp34"(#loc51))
+#loc142 = loc("tmp35"(#loc52))
+#loc143 = loc("tmp36"(#loc53))
+#loc144 = loc("tmp37"(#loc54))
+#loc145 = loc("tmp39"(#loc55))
+#loc146 = loc("tmp40"(#loc56))
+#loc147 = loc("tmp41"(#loc57))
+#loc148 = loc("tmp43"(#loc58))
+#loc149 = loc("tmp44"(#loc59))
+#loc150 = loc("tmp47"(#loc60))
+#loc151 = loc("_tmp46"(#loc61))
+#loc152 = loc("_tmp46"(#loc62))
+#loc154 = loc("tmp46"(#loc67))
+#loc155 = loc("tmp49"(#loc68))
+#loc156 = loc("tmp51"(#loc69))
+#loc157 = loc("tmp52"(#loc70))
+#loc158 = loc("tmp54"(#loc71))
+#loc159 = loc("tmp53"(#loc72))
+#loc160 = loc("tmp55"(#loc73))
+#loc161 = loc("tmp57"(#loc74))
+#loc162 = loc("tmp56"(#loc75))
+#loc163 = loc(fused[#loc107, #loc106])
+#loc164 = loc(fused[#loc110, #loc109])
+#loc165 = loc(fused[#loc116, #loc94])
+#loc166 = loc(fused[#loc136, #loc135])
+#loc167 = loc(callsite(#loc64 at #loc153))
+#loc169 = loc(fused[#loc158, #loc159])
+#loc170 = loc(fused[#loc161, #loc162])
+#loc171 = loc(callsite(#loc66 at #loc167))

SpecForge-ext/cache/compiled_kernels/triton/7/EB4J5U2HKNQBLXRWK6B5L6ATOH55AWD3MB7P63KH5AKRGRDZER7A/__grp__triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.source": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/EB4J5U2HKNQBLXRWK6B5L6ATOH55AWD3MB7P63KH5AKRGRDZER7A/triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.source", "triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.ttir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/EB4J5U2HKNQBLXRWK6B5L6ATOH55AWD3MB7P63KH5AKRGRDZER7A/triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.ttir", "triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.ttgir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/EB4J5U2HKNQBLXRWK6B5L6ATOH55AWD3MB7P63KH5AKRGRDZER7A/triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.ttgir", "triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.llir": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/EB4J5U2HKNQBLXRWK6B5L6ATOH55AWD3MB7P63KH5AKRGRDZER7A/triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.llir", "triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.ptx": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/EB4J5U2HKNQBLXRWK6B5L6ATOH55AWD3MB7P63KH5AKRGRDZER7A/triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.ptx", "triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.cubin": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/EB4J5U2HKNQBLXRWK6B5L6ATOH55AWD3MB7P63KH5AKRGRDZER7A/triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.cubin", "triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.json": "/workspace/hanrui/SpecForge-ext/cache/compiled_kernels/triton/7/EB4J5U2HKNQBLXRWK6B5L6ATOH55AWD3MB7P63KH5AKRGRDZER7A/triton_per_fused__to_copy_clone_slice_sort_sum_transpose_3.json"}}