fix: address codex review BLOCKERs and SHOULD-FIXes; update KNOWN_ISSUES
Browse files- KNOWN_ISSUES.md +40 -64
- README.md +13 -6
- trit_gemv.cu +11 -0
- trit_gemv_standalone.cu +66 -4
KNOWN_ISSUES.md
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# Known
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``
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`
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### 4. `get_gpu_name(char* buf, int buflen)` has no null/length guard
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**Where:** [`trit_gemv_standalone.cu:700`](trit_gemv_standalone.cu#L700)
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Calling with `buf == nullptr` or `buflen <= 0` is immediate UB on the host side. Trivial fix; pending.
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### 5. CUDA error returns are not surfaced
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**Where:** several places in `trit_gemv_standalone.cu` where `set_l2_persist`, kernel launches, and helper calls drop `cudaError_t` returns
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If a kernel launch fails (e.g., bad shapes that pass the (missing) input validation), the failure is silent until the next `cudaDeviceSynchronize()` or `cudaGetLastError()`. The public functions return `void` and have no error-reporting path.
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Workaround: call `cuda_sync()` after each operation and check `cudaGetLastError()` from your wrapper.
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### 6. Reduction wastes 31 lanes per group
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**Where:** [`trit_gemv.cu:223-232`](trit_gemv.cu#L223), [`trit_gemv.cu:279-286`](trit_gemv.cu#L279)
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After the warp reduction, only lane 0 multiplies by the group scale and accumulates into `row_acc`. The other 31 lanes idle for the scale/add path. This is correct, just leaves performance on the table relative to the deferred-reduction design used in `k_d3_hardened` (`trit_gemv_standalone.cu:493`).
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The headline 7.8× number is from the deferred-reduction path, so this only matters if you use the educational `trit_gemv_uniform` / `trit_gemv_variable` kernels directly.
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## NIT
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### 7. Multiple prototype kernels in production file
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`trit_gemv_standalone.cu` contains v9, v27, v28, v29, `k_d3_hardened`, plus the non-deferred kernels — a development history rather than a clean public surface. The `k_v29_pipeline` / `trit_pipeline` path was broken (passed nullptr for required arrays) and was removed in commit prior to this release. The remaining prototypes (`k_v27`, `k_v29`, `k_v28`) are still wired through public C functions; they work, but the API surface is wider than needed. A future revision will trim to one canonical entry per depth.
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# Known limitations — tritllm-kernel
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Items previously raised in code review have been addressed:
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- The implicit one-warp-per-block launch contract in the educational kernels
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is now an early-return guard: kernels return without writing if launched
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with `blockDim.x != 32` or `in_features % 64 != 0`.
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- The dead `trit_pipeline` / `k_v29_pipeline` path was removed.
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- The C API now validates pointers, dimensions, and the
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`cols / GROUP_SIZE == num_groups` invariant, and reports the result via
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`trit_gemv_get_last_error()`. CUDA launch errors are captured into the same
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channel.
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- `get_gpu_name(buf, buflen)` now refuses null pointers and `buflen <= 0`.
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This document lists what remains.
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## Design tradeoff (not a bug)
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### Lane-0 scale-and-add in `trit_gemv_uniform` / `trit_gemv_variable`
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**Where:** [`trit_gemv.cu:223-232, 279-286`](trit_gemv.cu#L223)
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After the warp reduction in the educational kernels, only lane 0 multiplies
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the group sum by the scale and accumulates into `row_acc`. The other 31 lanes
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are idle for the scale/add path. This is correct, just slow — the published
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paper benchmarks are produced by the deferred-reduction kernel
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`k_d3_hardened` in `trit_gemv_standalone.cu`, which does not have this
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limitation.
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The `trit_gemv_uniform` / `trit_gemv_variable` kernels in `trit_gemv.cu` are
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kept as a smaller, single-file reference implementation that is easier to read
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and reason about. If you need maximum throughput, use the C API in
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`trit_gemv_standalone.cu`.
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## Future cleanup
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The C API in `trit_gemv_standalone.cu` exposes several historical kernel
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variants (`v9`, `v27`, `v28`, `v29`, plus `k_d3_hardened` via
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`trit_gemv_d3_int8_dp4a`). They all work, but the public API is wider than
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needed. A future release will trim to one canonical entry point per depth
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(`trit_gemv_d1`, `trit_gemv_d2`, `trit_gemv_d3`, `trit_gemv_d4`).
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README.md
CHANGED
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@@ -91,14 +91,21 @@ void get_gpu_name(char* buf, int buflen);
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void cuda_sync();
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```
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##
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## Citation
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void cuda_sync();
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```
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## Error reporting
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All `extern "C"` entry points return `void`, so per-call status is delivered through a separate channel:
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```c
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int trit_gemv_get_last_error();
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```
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Returns `0` on success. Negative values are host-side argument-validation failures (`TRIT_ERR_NULL_PTR`, `TRIT_ERR_BAD_DIM`, `TRIT_ERR_BAD_GROUP`, `TRIT_ERR_BAD_BUFFER`). Positive values are `cudaError_t` codes captured from the most recent kernel launch.
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The host-side validator in each entry point checks pointer non-null, positive dimensions, `cols % 64 == 0`, and `cols / 64 == num_groups`. If validation fails, no kernel is launched, the error is recorded, and the call returns silently.
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## Known limitations
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The educational kernels in `trit_gemv.cu` use a lane-0 scale-and-add reduction that idles 31 lanes per group. This is a deliberate readability tradeoff — the headline 7.8× number is from the deferred-reduction `k_d3_hardened` kernel in `trit_gemv_standalone.cu`. See [KNOWN_ISSUES.md](KNOWN_ISSUES.md) for details and a planned API-cleanup item.
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## Citation
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trit_gemv.cu
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@@ -178,6 +178,10 @@ __device__ __forceinline__ float trit_mac_d4(
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// Simplified version: uniform depth across all groups in a tensor
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// (variable-depth version below)
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__global__ void trit_gemv_uniform(
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const uint32_t* __restrict__ packed_trits, // packed trit data
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const float* __restrict__ scales, // [num_groups] FP16 stored as float
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int out_features,
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int depth // uniform depth 1-4
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) {
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int row = blockIdx.x; // one block per output row
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if (row >= out_features) return;
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* Variable-depth version: each group can have a different depth.
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* Uses a depth map and offset table to handle mixed-depth tensors.
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*/
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__global__ void trit_gemv_variable(
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const uint32_t* __restrict__ packed_trits,
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const float* __restrict__ scales,
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int in_features,
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int out_features
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) {
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int row = blockIdx.x;
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if (row >= out_features) return;
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// Simplified version: uniform depth across all groups in a tensor
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// (variable-depth version below)
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// Launch contract: blockDim.x == 32 (one warp per block), in_features % 64 == 0.
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// The kernel uses lane = threadIdx.x and a full-warp shuffle mask, so larger
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// blocks would alias the lane index and race on y[row]. Trailing partial groups
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// are an unsupported shape, not silently dropped.
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__global__ void trit_gemv_uniform(
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const uint32_t* __restrict__ packed_trits, // packed trit data
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const float* __restrict__ scales, // [num_groups] FP16 stored as float
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int out_features,
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int depth // uniform depth 1-4
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) {
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if (blockDim.x != WARP_SIZE) return; // launch contract: 1 warp/block
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if (in_features % GROUP_SIZE) return; // launch contract: K mod 64 == 0
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int row = blockIdx.x; // one block per output row
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if (row >= out_features) return;
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* Variable-depth version: each group can have a different depth.
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* Uses a depth map and offset table to handle mixed-depth tensors.
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*/
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// Launch contract: blockDim.x == 32 (one warp per block), in_features % 64 == 0.
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__global__ void trit_gemv_variable(
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const uint32_t* __restrict__ packed_trits,
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const float* __restrict__ scales,
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int in_features,
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int out_features
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) {
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if (blockDim.x != WARP_SIZE) return;
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if (in_features % GROUP_SIZE) return;
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int row = blockIdx.x;
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if (row >= out_features) return;
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trit_gemv_standalone.cu
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// C API — callable from any language via dlopen/ctypes/FFI
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// ============================================================
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extern "C" {
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// v27: d2 int4-packed + dp4a (champion for GPU)
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// pt: [rows * ng * 8] int32 (int4 packed weights)
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// ws: [rows * ng] float32 (weight scales)
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float* y, int cols, int rows, int num_groups,
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int use_l2_persist
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) {
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if (use_l2_persist) {
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set_l2_persist((void*)pt, (size_t)rows * num_groups * 8 * sizeof(int32_t));
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}
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k_v27<<<(rows + V27_RPB - 1) / V27_RPB, V27_BS>>>(
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(const uint32_t*)pt, ws, (const uint32_t*)xt, xs, y, cols, rows, num_groups);
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if (use_l2_persist) {
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clear_l2_persist();
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}
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const float* x, float* y,
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int cols, int rows, int depth
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) {
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k_v9<<<(rows + V9R - 1) / V9R, V9BS>>>(
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(const uint32_t*)pt, sc, x, y, cols, rows, depth);
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}
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// v29: d2 unsigned int4 + bias trick (no sign extension)
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float* y, int cols, int rows, int num_groups,
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int use_l2_persist
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) {
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if (use_l2_persist) {
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set_l2_persist((void*)pt, (size_t)rows * num_groups * 8 * sizeof(int32_t));
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}
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@@ -404,6 +453,7 @@ void trit_gemv_d2_bias(
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(const uint32_t*)xt_e, (const uint32_t*)xt_o,
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(const int*)x_bias, xs,
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y, cols, rows, num_groups);
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if (use_l2_persist) {
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clear_l2_persist();
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}
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@@ -418,6 +468,8 @@ void trit_gemv_d2_fast(
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float* y, int cols, int rows, int num_groups,
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int use_l2_persist
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) {
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if (use_l2_persist) {
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set_l2_persist((void*)pt, (size_t)rows * num_groups * 8 * sizeof(int32_t));
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}
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(const uint32_t*)pt, ws,
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(const uint32_t*)xt_e, (const uint32_t*)xt_o, xs,
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y, cols, rows, num_groups);
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if (use_l2_persist) {
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clear_l2_persist();
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}
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@@ -542,11 +595,14 @@ void trit_gemv_d3_int8_dp4a(
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float* y, int cols, int rows, int num_groups,
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int use_l2_persist
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) {
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if (use_l2_persist) {
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set_l2_persist((void*)wt, (size_t)rows * num_groups * 16 * sizeof(int32_t));
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}
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k_d3_hardened<<<(rows + D3H_RPB - 1) / D3H_RPB, D3H_BS>>>(
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(const uint32_t*)wt, ws, (const uint32_t*)xt, xs, y, cols, rows, num_groups);
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if (use_l2_persist) {
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clear_l2_persist();
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}
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@@ -559,17 +615,20 @@ void trit_gemv_pipeline_bench(
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float* y, int cols, int rows, int num_groups,
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int n_repeats, int use_l2_persist
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) {
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if (use_l2_persist) {
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set_l2_persist((void*)pt, (size_t)rows * num_groups * 8 * sizeof(int32_t));
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}
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// Launch n_repeats sequential v28 kernels in the SAME stream
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//
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for (int i = 0; i < n_repeats; i++) {
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k_v28<<<(rows + V28_RPB - 1) / V28_RPB, V28_BS>>>(
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(const uint32_t*)pt, ws,
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(const uint32_t*)xt_e, (const uint32_t*)xt_o, xs,
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y, cols, rows, num_groups);
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}
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if (use_l2_persist) {
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clear_l2_persist();
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}
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@@ -582,10 +641,13 @@ int get_l2_cache_bytes() {
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return prop.l2CacheSize;
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}
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// Query GPU name
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void get_gpu_name(char* buf, int buflen) {
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cudaDeviceProp prop;
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cudaGetDeviceProperties(&prop, 0);
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strncpy(buf, prop.name, buflen - 1);
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buf[buflen - 1] = '\0';
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}
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// C API — callable from any language via dlopen/ctypes/FFI
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// ============================================================
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// Error codes for the last_error reporting channel.
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// 0 = success
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// negative = host-side argument validation failure (no kernel was launched)
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// positive = cudaError_t value from a kernel launch or runtime call
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#define TRIT_OK 0
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#define TRIT_ERR_NULL_PTR -1
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#define TRIT_ERR_BAD_DIM -2
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#define TRIT_ERR_BAD_GROUP -3 // num_groups != cols / GROUP_SIZE
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#define TRIT_ERR_BAD_BUFFER -4 // buf too small / invalid
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// Last-error slot. Set by every public entrypoint; read via trit_gemv_get_last_error().
|
| 364 |
+
static int g_last_error = TRIT_OK;
|
| 365 |
+
|
| 366 |
+
// Host-side argument validation. Returns 0 on success, negative on failure.
|
| 367 |
+
// Sets g_last_error and returns 1 (truthy) on failure for use in `if (validate(...)) return;`.
|
| 368 |
+
static inline int trit_validate_gemv(
|
| 369 |
+
const void* pt, const void* ws, const void* y,
|
| 370 |
+
int cols, int rows, int num_groups
|
| 371 |
+
) {
|
| 372 |
+
if (!pt || !ws || !y) { g_last_error = TRIT_ERR_NULL_PTR; return 1; }
|
| 373 |
+
if (cols <= 0 || rows <= 0 || num_groups <= 0) { g_last_error = TRIT_ERR_BAD_DIM; return 1; }
|
| 374 |
+
if (cols % GROUP_SIZE != 0) { g_last_error = TRIT_ERR_BAD_DIM; return 1; }
|
| 375 |
+
if (cols / GROUP_SIZE != num_groups) { g_last_error = TRIT_ERR_BAD_GROUP; return 1; }
|
| 376 |
+
return 0;
|
| 377 |
+
}
|
| 378 |
+
|
| 379 |
+
// Capture cudaGetLastError() after a kernel launch into g_last_error.
|
| 380 |
+
static inline void trit_capture_launch_status() {
|
| 381 |
+
cudaError_t e = cudaGetLastError();
|
| 382 |
+
g_last_error = (e == cudaSuccess) ? TRIT_OK : (int)e;
|
| 383 |
+
}
|
| 384 |
+
|
| 385 |
extern "C" {
|
| 386 |
|
| 387 |
+
// Returns the error code from the most recent public-API call.
|
| 388 |
+
// 0 means success. Negative codes are host-side validation failures
|
| 389 |
+
// (TRIT_ERR_*); positive codes are cudaError_t values from CUDA itself.
|
| 390 |
+
int trit_gemv_get_last_error() {
|
| 391 |
+
return g_last_error;
|
| 392 |
+
}
|
| 393 |
+
|
| 394 |
// v27: d2 int4-packed + dp4a (champion for GPU)
|
| 395 |
// pt: [rows * ng * 8] int32 (int4 packed weights)
|
| 396 |
// ws: [rows * ng] float32 (weight scales)
|
|
|
|
| 403 |
float* y, int cols, int rows, int num_groups,
|
| 404 |
int use_l2_persist
|
| 405 |
) {
|
| 406 |
+
if (trit_validate_gemv(pt, ws, y, cols, rows, num_groups)) return;
|
| 407 |
+
if (!xt || !xs) { g_last_error = TRIT_ERR_NULL_PTR; return; }
|
| 408 |
if (use_l2_persist) {
|
| 409 |
set_l2_persist((void*)pt, (size_t)rows * num_groups * 8 * sizeof(int32_t));
|
| 410 |
}
|
| 411 |
k_v27<<<(rows + V27_RPB - 1) / V27_RPB, V27_BS>>>(
|
| 412 |
(const uint32_t*)pt, ws, (const uint32_t*)xt, xs, y, cols, rows, num_groups);
|
| 413 |
+
trit_capture_launch_status();
|
| 414 |
if (use_l2_persist) {
|
| 415 |
clear_l2_persist();
|
| 416 |
}
|
|
|
|
| 426 |
const float* x, float* y,
|
| 427 |
int cols, int rows, int depth
|
| 428 |
) {
|
| 429 |
+
if (!pt || !sc || !x || !y) { g_last_error = TRIT_ERR_NULL_PTR; return; }
|
| 430 |
+
if (cols <= 0 || rows <= 0) { g_last_error = TRIT_ERR_BAD_DIM; return; }
|
| 431 |
+
if (cols % GROUP_SIZE != 0) { g_last_error = TRIT_ERR_BAD_DIM; return; }
|
| 432 |
+
if (depth < 1 || depth > 4) { g_last_error = TRIT_ERR_BAD_DIM; return; }
|
| 433 |
k_v9<<<(rows + V9R - 1) / V9R, V9BS>>>(
|
| 434 |
(const uint32_t*)pt, sc, x, y, cols, rows, depth);
|
| 435 |
+
trit_capture_launch_status();
|
| 436 |
}
|
| 437 |
|
| 438 |
// v29: d2 unsigned int4 + bias trick (no sign extension)
|
|
|
|
| 443 |
float* y, int cols, int rows, int num_groups,
|
| 444 |
int use_l2_persist
|
| 445 |
) {
|
| 446 |
+
if (trit_validate_gemv(pt, ws, y, cols, rows, num_groups)) return;
|
| 447 |
+
if (!xt_e || !xt_o || !x_bias || !xs) { g_last_error = TRIT_ERR_NULL_PTR; return; }
|
| 448 |
if (use_l2_persist) {
|
| 449 |
set_l2_persist((void*)pt, (size_t)rows * num_groups * 8 * sizeof(int32_t));
|
| 450 |
}
|
|
|
|
| 453 |
(const uint32_t*)xt_e, (const uint32_t*)xt_o,
|
| 454 |
(const int*)x_bias, xs,
|
| 455 |
y, cols, rows, num_groups);
|
| 456 |
+
trit_capture_launch_status();
|
| 457 |
if (use_l2_persist) {
|
| 458 |
clear_l2_persist();
|
| 459 |
}
|
|
|
|
| 468 |
float* y, int cols, int rows, int num_groups,
|
| 469 |
int use_l2_persist
|
| 470 |
) {
|
| 471 |
+
if (trit_validate_gemv(pt, ws, y, cols, rows, num_groups)) return;
|
| 472 |
+
if (!xt_e || !xt_o || !xs) { g_last_error = TRIT_ERR_NULL_PTR; return; }
|
| 473 |
if (use_l2_persist) {
|
| 474 |
set_l2_persist((void*)pt, (size_t)rows * num_groups * 8 * sizeof(int32_t));
|
| 475 |
}
|
|
|
|
| 477 |
(const uint32_t*)pt, ws,
|
| 478 |
(const uint32_t*)xt_e, (const uint32_t*)xt_o, xs,
|
| 479 |
y, cols, rows, num_groups);
|
| 480 |
+
trit_capture_launch_status();
|
| 481 |
if (use_l2_persist) {
|
| 482 |
clear_l2_persist();
|
| 483 |
}
|
|
|
|
| 595 |
float* y, int cols, int rows, int num_groups,
|
| 596 |
int use_l2_persist
|
| 597 |
) {
|
| 598 |
+
if (trit_validate_gemv(wt, ws, y, cols, rows, num_groups)) return;
|
| 599 |
+
if (!xt || !xs) { g_last_error = TRIT_ERR_NULL_PTR; return; }
|
| 600 |
if (use_l2_persist) {
|
| 601 |
set_l2_persist((void*)wt, (size_t)rows * num_groups * 16 * sizeof(int32_t));
|
| 602 |
}
|
| 603 |
k_d3_hardened<<<(rows + D3H_RPB - 1) / D3H_RPB, D3H_BS>>>(
|
| 604 |
(const uint32_t*)wt, ws, (const uint32_t*)xt, xs, y, cols, rows, num_groups);
|
| 605 |
+
trit_capture_launch_status();
|
| 606 |
if (use_l2_persist) {
|
| 607 |
clear_l2_persist();
|
| 608 |
}
|
|
|
|
| 615 |
float* y, int cols, int rows, int num_groups,
|
| 616 |
int n_repeats, int use_l2_persist
|
| 617 |
) {
|
| 618 |
+
if (trit_validate_gemv(pt, ws, y, cols, rows, num_groups)) return;
|
| 619 |
+
if (!xt_e || !xt_o || !xs || n_repeats <= 0) { g_last_error = TRIT_ERR_NULL_PTR; return; }
|
| 620 |
if (use_l2_persist) {
|
| 621 |
set_l2_persist((void*)pt, (size_t)rows * num_groups * 8 * sizeof(int32_t));
|
| 622 |
}
|
| 623 |
+
// Launch n_repeats sequential v28 kernels in the SAME stream — measures
|
| 624 |
+
// the L2-reuse benefit of back-to-back launches sharing weights.
|
| 625 |
for (int i = 0; i < n_repeats; i++) {
|
| 626 |
k_v28<<<(rows + V28_RPB - 1) / V28_RPB, V28_BS>>>(
|
| 627 |
(const uint32_t*)pt, ws,
|
| 628 |
(const uint32_t*)xt_e, (const uint32_t*)xt_o, xs,
|
| 629 |
y, cols, rows, num_groups);
|
| 630 |
}
|
| 631 |
+
trit_capture_launch_status();
|
| 632 |
if (use_l2_persist) {
|
| 633 |
clear_l2_persist();
|
| 634 |
}
|
|
|
|
| 641 |
return prop.l2CacheSize;
|
| 642 |
}
|
| 643 |
|
| 644 |
+
// Query GPU name. `buf` must be a writable buffer of `buflen >= 1` bytes.
|
| 645 |
+
// On invalid input, the call is a no-op and g_last_error is set.
|
| 646 |
void get_gpu_name(char* buf, int buflen) {
|
| 647 |
+
if (!buf || buflen <= 0) { g_last_error = TRIT_ERR_BAD_BUFFER; return; }
|
| 648 |
cudaDeviceProp prop;
|
| 649 |
+
cudaError_t e = cudaGetDeviceProperties(&prop, 0);
|
| 650 |
+
if (e != cudaSuccess) { g_last_error = (int)e; buf[0] = '\0'; return; }
|
| 651 |
strncpy(buf, prop.name, buflen - 1);
|
| 652 |
buf[buflen - 1] = '\0';
|
| 653 |
}
|