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$assert BATCH_TILE % 8 == 0 |
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$assert BATCH_TILE >= 8 |
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$SIMD_TILE = BATCH_TILE |
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#include <assert.h> |
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#include <arm_neon.h> |
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#include <xnnpack/common.h> |
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#include <xnnpack/vcvt.h> |
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void xnn_f32_f16_vcvt_ukernel__neon_x${BATCH_TILE}( |
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size_t batch, |
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const float* input, |
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void* output, |
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const union xnn_f32_f16_cvt_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS |
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{ |
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assert(batch != 0); |
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assert(batch % sizeof(float) == 0); |
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assert(input != NULL); |
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assert(output != NULL); |
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const uint32x4_t vexp_bias = vld1q_dup_u32(¶ms->neon.exp_bias); |
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const float32x4_t vscale_to_inf = vld1q_dup_f32(¶ms->neon.scale_to_inf); |
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const uint32x4_t vexpw_max = vld1q_dup_u32(¶ms->neon.expw_max); |
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const float32x4_t vscale_to_zero = vld1q_dup_f32(¶ms->neon.scale_to_zero); |
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const uint32x4_t vbias_min = vdupq_n_u32(UINT32_C(0x40000000)); |
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const uint16x8_t vexph_mask = vdupq_n_u16(UINT16_C(0x7C00)); |
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const uint16x8_t vmanth_mask = vdupq_n_u16(UINT16_C(0x0FFF)); |
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const uint16x8_t vsignh_mask = vdupq_n_u16(UINT16_C(0x8000)); |
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const uint16x8_t vnanh = vdupq_n_u16(UINT16_C(0x7E00)); |
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uint16_t* o = (uint16_t*) output; |
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for (; batch >= ${BATCH_TILE} * sizeof(float); batch -= ${BATCH_TILE} * sizeof(float)) { |
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$for N in range(2*SIMD_TILE): |
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const float32x4_t vx${N} = vld1q_f32(input); input += 4; |
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$for N in range(2*SIMD_TILE): |
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const float32x4_t vabsx${N} = vabsq_f32(vx${N}); |
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$for N in range(2*SIMD_TILE): |
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uint32x4_t vbias${N} = vaddq_u32(vreinterpretq_u32_f32(vabsx${N}), vexp_bias); |
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$for N in range(2*SIMD_TILE): |
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float32x4_t vf${N} = vmulq_f32(vabsx${N}, vscale_to_inf); |
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$for N in range(2*SIMD_TILE): |
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const uint32x4_t vnanmaskw${N} = vcgtq_u32(vreinterpretq_u32_f32(vabsx${N}), vexpw_max); |
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$for N in range(2*SIMD_TILE): |
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vbias${N} = vandq_u32(vbias${N}, vexpw_max); |
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$for N in range(2*SIMD_TILE): |
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vf${N} = vmulq_f32(vf${N}, vscale_to_zero); |
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$for N in range(SIMD_TILE): |
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const uint16x8_t vnanmaskh${N} = vcombine_u16(vmovn_u32(vnanmaskw${2*N}), vmovn_u32(vnanmaskw${2*N+1})); |
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$for N in range(2*SIMD_TILE): |
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vbias${N} = vmaxq_u32(vbias${N}, vbias_min); |
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$for N in range(2*SIMD_TILE): |
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vf${N} = vaddq_f32(vf${N}, vreinterpretq_f32_u32(vbias${N})); |
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$for N in range(SIMD_TILE): |
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uint16x8_t vexph${N} = vcombine_u16(vshrn_n_u32(vreinterpretq_u32_f32(vf${2*N}), 13), vshrn_n_u32(vreinterpretq_u32_f32(vf${2*N+1}), 13)); |
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$for N in range(SIMD_TILE): |
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uint16x8_t vmanth${N} = vcombine_u16(vmovn_u32(vreinterpretq_u32_f32(vf${2*N})), vmovn_u32(vreinterpretq_u32_f32(vf${2*N+1}))); |
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$for N in range(SIMD_TILE): |
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uint16x8_t vsignh${N} = vcombine_u16(vshrn_n_u32(vreinterpretq_u32_f32(vx${2*N}), 16), vshrn_n_u32(vreinterpretq_u32_f32(vx${2*N+1}), 16)); |
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$for N in range(SIMD_TILE): |
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vexph${N} = vandq_u16(vexph${N}, vexph_mask); |
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$for N in range(SIMD_TILE): |
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vmanth${N} = vandq_u16(vmanth${N}, vmanth_mask); |
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$for N in range(SIMD_TILE): |
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vsignh${N} = vandq_u16(vsignh${N}, vsignh_mask); |
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$for N in range(SIMD_TILE): |
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uint16x8_t vh${N} = vaddq_u16(vmanth${N}, vexph${N}); |
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$for N in range(SIMD_TILE): |
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vh${N} = vbslq_u16(vnanmaskh${N}, vnanh, vh${N}); |
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$for N in range(SIMD_TILE): |
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vh${N} = vorrq_u16(vh${N}, vsignh${N}); |
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$for N in range(SIMD_TILE): |
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vst1q_u16(o, vh${N}); o += 8; |
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} |
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for (; batch >= 4 * sizeof(float); batch -= 4 * sizeof(float)) { |
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const float32x4_t vx = vld1q_f32(input); input += 4; |
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const float32x4_t vabsx = vabsq_f32(vx); |
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uint32x4_t vbias = vaddq_u32(vreinterpretq_u32_f32(vabsx), vexp_bias); |
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float32x4_t vf = vmulq_f32(vabsx, vscale_to_inf); |
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const uint32x4_t vnanmaskw = vcgtq_u32(vreinterpretq_u32_f32(vabsx), vexpw_max); |
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vbias = vandq_u32(vbias, vexpw_max); |
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vf = vmulq_f32(vf, vscale_to_zero); |
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const uint16x4_t vnanmaskh = vmovn_u32(vnanmaskw); |
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vbias = vmaxq_u32(vbias, vbias_min); |
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vf = vaddq_f32(vf, vreinterpretq_f32_u32(vbias)); |
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uint16x4_t vexph = vshrn_n_u32(vreinterpretq_u32_f32(vf), 13); |
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uint16x4_t vmanth = vmovn_u32(vreinterpretq_u32_f32(vf)); |
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uint16x4_t vsignh = vshrn_n_u32(vreinterpretq_u32_f32(vx), 16); |
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vexph = vand_u16(vexph, vget_low_u16(vexph_mask)); |
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vmanth = vand_u16(vmanth, vget_low_u16(vmanth_mask)); |
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vsignh = vand_u16(vsignh, vget_low_u16(vsignh_mask)); |
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uint16x4_t vh = vadd_u16(vmanth, vexph); |
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vh = vbsl_u16(vnanmaskh, vget_low_u16(vnanh), vh); |
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vh = vorr_u16(vh, vsignh); |
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vst1_u16(o, vh); o += 4; |
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} |
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if XNN_UNLIKELY(batch != 0) { |
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assert(batch % sizeof(float) == 0); |
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assert(batch >= 1 * sizeof(float)); |
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assert(batch <= 3 * sizeof(float)); |
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const float32x4_t vx = vld1q_f32(input); |
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const float32x4_t vabsx = vabsq_f32(vx); |
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uint32x4_t vbias = vaddq_u32(vreinterpretq_u32_f32(vabsx), vexp_bias); |
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float32x4_t vf = vmulq_f32(vabsx, vscale_to_inf); |
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const uint32x4_t vnanmaskw = vcgtq_u32(vreinterpretq_u32_f32(vabsx), vexpw_max); |
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vbias = vandq_u32(vbias, vexpw_max); |
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vf = vmulq_f32(vf, vscale_to_zero); |
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const uint16x4_t vnanmaskh = vmovn_u32(vnanmaskw); |
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vbias = vmaxq_u32(vbias, vbias_min); |
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vf = vaddq_f32(vf, vreinterpretq_f32_u32(vbias)); |
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uint16x4_t vexph = vshrn_n_u32(vreinterpretq_u32_f32(vf), 13); |
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uint16x4_t vmanth = vmovn_u32(vreinterpretq_u32_f32(vf)); |
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uint16x4_t vsignh = vshrn_n_u32(vreinterpretq_u32_f32(vx), 16); |
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vexph = vand_u16(vexph, vget_low_u16(vexph_mask)); |
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vmanth = vand_u16(vmanth, vget_low_u16(vmanth_mask)); |
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vsignh = vand_u16(vsignh, vget_low_u16(vsignh_mask)); |
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uint16x4_t vh = vadd_u16(vmanth, vexph); |
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vh = vbsl_u16(vnanmaskh, vget_low_u16(vnanh), vh); |
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vh = vorr_u16(vh, vsignh); |
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if (batch & (2 * sizeof(float))) { |
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vst1_lane_u32((void*) o, vreinterpret_u32_u16(vh), 0); o += 2; |
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vh = vext_u16(vh, vh, 2); |
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} |
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if (batch & (1 * sizeof(float))) { |
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vst1_lane_u16(o, vh, 0); |
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} |
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} |
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} |
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