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#include <assert.h> |
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#include <immintrin.h> |
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#include <xnnpack/common.h> |
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#include <xnnpack/intrinsics-polyfill.h> |
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#include <xnnpack/vunary.h> |
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void xnn_f16_vsigmoid_ukernel__avx2_rr1_p2_div_x64( |
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size_t batch, |
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const void* input, |
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void* output, |
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const union xnn_f16_sigmoid_params params[restrict XNN_MIN_ELEMENTS(1)]) |
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{ |
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assert(batch != 0); |
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assert(batch % sizeof(uint16_t) == 0); |
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assert(input != NULL); |
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assert(output != NULL); |
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const __m256 vsign_mask = _mm256_load_ps(params->avx2_rr1_p2.sign_mask); |
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const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p2.magic_bias); |
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const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p2.log2e); |
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const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2); |
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const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p2.c2); |
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const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p2.c1); |
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const __m256 vone = _mm256_load_ps(params->avx2_rr1_p2.one); |
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const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p2.denorm_cutoff); |
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const uint16_t* i = (const uint16_t*) input; |
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uint16_t* o = (uint16_t*) output; |
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for (; batch >= 64 * sizeof(uint16_t); batch -= 64 * sizeof(uint16_t)) { |
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const __m256 vx0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i)); |
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const __m256 vx1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 8))); |
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const __m256 vx2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 16))); |
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const __m256 vx3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 24))); |
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const __m256 vx4 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 32))); |
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const __m256 vx5 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 40))); |
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const __m256 vx6 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 48))); |
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const __m256 vx7 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 56))); |
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i += 64; |
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const __m256 vz0 = _mm256_or_ps(vx0, vsign_mask); |
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const __m256 vz1 = _mm256_or_ps(vx1, vsign_mask); |
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const __m256 vz2 = _mm256_or_ps(vx2, vsign_mask); |
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const __m256 vz3 = _mm256_or_ps(vx3, vsign_mask); |
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const __m256 vz4 = _mm256_or_ps(vx4, vsign_mask); |
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const __m256 vz5 = _mm256_or_ps(vx5, vsign_mask); |
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const __m256 vz6 = _mm256_or_ps(vx6, vsign_mask); |
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const __m256 vz7 = _mm256_or_ps(vx7, vsign_mask); |
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__m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias); |
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__m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias); |
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__m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias); |
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__m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias); |
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__m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias); |
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__m256 vn5 = _mm256_fmadd_ps(vz5, vlog2e, vmagic_bias); |
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__m256 vn6 = _mm256_fmadd_ps(vz6, vlog2e, vmagic_bias); |
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__m256 vn7 = _mm256_fmadd_ps(vz7, vlog2e, vmagic_bias); |
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const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23)); |
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const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23)); |
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const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23)); |
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const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23)); |
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const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23)); |
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const __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn5), 23)); |
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const __m256 vs6 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn6), 23)); |
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const __m256 vs7 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn7), 23)); |
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vn0 = _mm256_sub_ps(vn0, vmagic_bias); |
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vn1 = _mm256_sub_ps(vn1, vmagic_bias); |
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vn2 = _mm256_sub_ps(vn2, vmagic_bias); |
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vn3 = _mm256_sub_ps(vn3, vmagic_bias); |
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vn4 = _mm256_sub_ps(vn4, vmagic_bias); |
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vn5 = _mm256_sub_ps(vn5, vmagic_bias); |
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vn6 = _mm256_sub_ps(vn6, vmagic_bias); |
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vn7 = _mm256_sub_ps(vn7, vmagic_bias); |
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__m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0); |
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__m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1); |
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__m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2); |
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__m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3); |
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__m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4); |
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__m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vz5); |
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__m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2, vz6); |
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__m256 vt7 = _mm256_fmadd_ps(vn7, vminus_ln2, vz7); |
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const __m256 vp0 = _mm256_fmadd_ps(vc2, vt0, vc1); |
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const __m256 vp1 = _mm256_fmadd_ps(vc2, vt1, vc1); |
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const __m256 vp2 = _mm256_fmadd_ps(vc2, vt2, vc1); |
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const __m256 vp3 = _mm256_fmadd_ps(vc2, vt3, vc1); |
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const __m256 vp4 = _mm256_fmadd_ps(vc2, vt4, vc1); |
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const __m256 vp5 = _mm256_fmadd_ps(vc2, vt5, vc1); |
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const __m256 vp6 = _mm256_fmadd_ps(vc2, vt6, vc1); |
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const __m256 vp7 = _mm256_fmadd_ps(vc2, vt7, vc1); |
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vt0 = _mm256_mul_ps(vt0, vs0); |
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vt1 = _mm256_mul_ps(vt1, vs1); |
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vt2 = _mm256_mul_ps(vt2, vs2); |
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vt3 = _mm256_mul_ps(vt3, vs3); |
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vt4 = _mm256_mul_ps(vt4, vs4); |
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vt5 = _mm256_mul_ps(vt5, vs5); |
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vt6 = _mm256_mul_ps(vt6, vs6); |
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vt7 = _mm256_mul_ps(vt7, vs7); |
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const __m256 ve0 = _mm256_fmadd_ps(vt0, vp0, vs0); |
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const __m256 ve1 = _mm256_fmadd_ps(vt1, vp1, vs1); |
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const __m256 ve2 = _mm256_fmadd_ps(vt2, vp2, vs2); |
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const __m256 ve3 = _mm256_fmadd_ps(vt3, vp3, vs3); |
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const __m256 ve4 = _mm256_fmadd_ps(vt4, vp4, vs4); |
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const __m256 ve5 = _mm256_fmadd_ps(vt5, vp5, vs5); |
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const __m256 ve6 = _mm256_fmadd_ps(vt6, vp6, vs6); |
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const __m256 ve7 = _mm256_fmadd_ps(vt7, vp7, vs7); |
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const __m256 vd0 = _mm256_add_ps(ve0, vone); |
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const __m256 vd1 = _mm256_add_ps(ve1, vone); |
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const __m256 vd2 = _mm256_add_ps(ve2, vone); |
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const __m256 vd3 = _mm256_add_ps(ve3, vone); |
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const __m256 vd4 = _mm256_add_ps(ve4, vone); |
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const __m256 vd5 = _mm256_add_ps(ve5, vone); |
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const __m256 vd6 = _mm256_add_ps(ve6, vone); |
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const __m256 vd7 = _mm256_add_ps(ve7, vone); |
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__m256 vf0 = _mm256_div_ps(ve0, vd0); |
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__m256 vf1 = _mm256_div_ps(ve1, vd1); |
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__m256 vf2 = _mm256_div_ps(ve2, vd2); |
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__m256 vf3 = _mm256_div_ps(ve3, vd3); |
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__m256 vf4 = _mm256_div_ps(ve4, vd4); |
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__m256 vf5 = _mm256_div_ps(ve5, vd5); |
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__m256 vf6 = _mm256_div_ps(ve6, vd6); |
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__m256 vf7 = _mm256_div_ps(ve7, vd7); |
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vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vz0, vdenorm_cutoff, _CMP_LT_OS), vf0); |
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vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vz1, vdenorm_cutoff, _CMP_LT_OS), vf1); |
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vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vz2, vdenorm_cutoff, _CMP_LT_OS), vf2); |
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vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vz3, vdenorm_cutoff, _CMP_LT_OS), vf3); |
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vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vz4, vdenorm_cutoff, _CMP_LT_OS), vf4); |
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vf5 = _mm256_andnot_ps(_mm256_cmp_ps(vz5, vdenorm_cutoff, _CMP_LT_OS), vf5); |
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vf6 = _mm256_andnot_ps(_mm256_cmp_ps(vz6, vdenorm_cutoff, _CMP_LT_OS), vf6); |
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vf7 = _mm256_andnot_ps(_mm256_cmp_ps(vz7, vdenorm_cutoff, _CMP_LT_OS), vf7); |
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vf0 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf0), vf0, vx0); |
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vf1 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf1), vf1, vx1); |
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vf2 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf2), vf2, vx2); |
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vf3 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf3), vf3, vx3); |
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vf4 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf4), vf4, vx4); |
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vf5 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf5), vf5, vx5); |
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vf6 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf6), vf6, vx6); |
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vf7 = _mm256_blendv_ps(_mm256_sub_ps(vone, vf7), vf7, vx7); |
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_mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf0, _MM_FROUND_TO_NEAREST_INT)); |
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_mm_storeu_si128((__m128i*) (o + 8), _mm256_cvtps_ph(vf1, _MM_FROUND_TO_NEAREST_INT)); |
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_mm_storeu_si128((__m128i*) (o + 16), _mm256_cvtps_ph(vf2, _MM_FROUND_TO_NEAREST_INT)); |
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_mm_storeu_si128((__m128i*) (o + 24), _mm256_cvtps_ph(vf3, _MM_FROUND_TO_NEAREST_INT)); |
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_mm_storeu_si128((__m128i*) (o + 32), _mm256_cvtps_ph(vf4, _MM_FROUND_TO_NEAREST_INT)); |
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_mm_storeu_si128((__m128i*) (o + 40), _mm256_cvtps_ph(vf5, _MM_FROUND_TO_NEAREST_INT)); |
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_mm_storeu_si128((__m128i*) (o + 48), _mm256_cvtps_ph(vf6, _MM_FROUND_TO_NEAREST_INT)); |
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_mm_storeu_si128((__m128i*) (o + 56), _mm256_cvtps_ph(vf7, _MM_FROUND_TO_NEAREST_INT)); |
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o += 64; |
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} |
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for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) { |
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const __m256 vx = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i)); |
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i += 8; |
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const __m256 vz = _mm256_or_ps(vx, vsign_mask); |
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__m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias); |
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const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23)); |
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vn = _mm256_sub_ps(vn, vmagic_bias); |
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__m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz); |
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const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1); |
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vt = _mm256_mul_ps(vt, vs); |
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const __m256 ve = _mm256_fmadd_ps(vt, vp, vs); |
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const __m256 vd = _mm256_add_ps(ve, vone); |
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__m256 vf = _mm256_div_ps(ve, vd); |
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vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf); |
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vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx); |
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_mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf, _MM_FROUND_TO_NEAREST_INT)); |
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o += 8; |
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} |
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if XNN_UNLIKELY(batch != 0) { |
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assert(batch >= 1 * sizeof(uint16_t)); |
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assert(batch <= 7 * sizeof(uint16_t)); |
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const __m256 vx = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i)); |
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const __m256 vz = _mm256_or_ps(vx, vsign_mask); |
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__m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias); |
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const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23)); |
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vn = _mm256_sub_ps(vn, vmagic_bias); |
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__m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz); |
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const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1); |
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vt = _mm256_mul_ps(vt, vs); |
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const __m256 ve = _mm256_fmadd_ps(vt, vp, vs); |
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const __m256 vd = _mm256_add_ps(ve, vone); |
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__m256 vf = _mm256_div_ps(ve, vd); |
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vf = _mm256_andnot_ps(_mm256_cmp_ps(vz, vdenorm_cutoff, _CMP_LT_OS), vf); |
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vf = _mm256_blendv_ps(_mm256_sub_ps(vone, vf), vf, vx); |
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__m128i vh = _mm256_cvtps_ph(vf, _MM_FROUND_TO_NEAREST_INT); |
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if (batch & (4 * sizeof(uint16_t))) { |
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_mm_storel_epi64((__m128i*) o, vh); |
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vh = _mm_unpackhi_epi64(vh, vh); |
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o += 4; |
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} |
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if (batch & (2 * sizeof(uint16_t))) { |
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_mm_storeu_si32(o, vh); |
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vh = _mm_srli_epi64(vh, 32); |
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o += 2; |
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} |
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if (batch & (1 * sizeof(uint16_t))) { |
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*o = (uint16_t) _mm_extract_epi16(vh, 0); |
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} |
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} |
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} |
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