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$assert BATCH_TILE % 8 == 0 |
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$assert BATCH_TILE >= 8 |
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$SIMD_TILE = BATCH_TILE |
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$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ" |
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$assert OP in ["RNDNE", "RNDZ", "RNDU", "RNDD"] |
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#include <assert.h> |
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#include <arm_neon.h> |
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#include <xnnpack/common.h> |
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#include <xnnpack/math.h> |
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#include <xnnpack/vunary.h> |
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$VRNDQ_F16 = { |
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$ "RNDNE": "vrndnq_f16", |
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$ "RNDZ": "vrndq_f16", |
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$ "RNDU": "vrndpq_f16", |
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$ "RNDD": "vrndmq_f16", |
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$}[OP] |
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void xnn_f16_v${OP.lower()}_ukernel__neonfp16arith_x${BATCH_TILE}( |
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size_t batch, |
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const void* input, |
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void* output, |
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const union xnn_f16_rnd_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS |
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{ |
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assert(batch != 0); |
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assert(batch % sizeof(uint16_t) == 0); |
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assert(input != NULL); |
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assert(output != NULL); |
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const uint16_t* i = (const uint16_t*) input; |
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uint16_t* o = (uint16_t*) output; |
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$if BATCH_TILE > 8: |
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for (; batch >= ${BATCH_TILE} * sizeof(uint16_t); batch -= ${BATCH_TILE} * sizeof(uint16_t)) { |
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$for N in range(SIMD_TILE): |
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float16x8_t vacc${ABC[N]} = vreinterpretq_f16_u16(vld1q_u16(i)); i += 8; |
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$for N in range(SIMD_TILE): |
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vacc${ABC[N]} = ${VRNDQ_F16}(vacc${ABC[N]}); |
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$for N in range(SIMD_TILE): |
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vst1q_u16(o, vreinterpretq_u16_f16(vacc${ABC[N]})); o += 8; |
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} |
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for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) { |
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float16x8_t vacc = vreinterpretq_f16_u16(vld1q_u16(i)); i += 8; |
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vacc = ${VRNDQ_F16}(vacc); |
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vst1q_u16(o, vreinterpretq_u16_f16(vacc)); o += 8; |
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} |
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if XNN_UNLIKELY(batch != 0) { |
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float16x8_t vacc = vreinterpretq_f16_u16(vld1q_u16(i)); |
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vacc = ${VRNDQ_F16}(vacc); |
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float16x4_t vacc_lo = vget_low_f16(vacc); |
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if (batch & (4 * sizeof(uint16_t))) { |
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vst1_u16(o, vreinterpret_u16_f16(vacc_lo)); o += 4; |
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vacc_lo = vget_high_f16(vacc); |
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} |
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if (batch & (2 * sizeof(uint16_t))) { |
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vst1_lane_u32((void*) o, vreinterpret_u32_f16(vacc_lo), 0); o += 2; |
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vacc_lo = vext_f16(vacc_lo, vacc_lo, 2); |
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} |
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if (batch & (1 * sizeof(uint16_t))) { |
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vst1_lane_u16(o, vreinterpret_u16_f16(vacc_lo), 0); |
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} |
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} |
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} |
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