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$assert BATCH_TILE % 8 == 0 |
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$assert BATCH_TILE >= 8 |
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$SIMD_TILE = BATCH_TILE |
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$assert ACCUMULATORS <= SIMD_TILE |
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$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ" |
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#include <assert.h> |
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#include <arm_neon.h> |
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#include <xnnpack/common.h> |
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#include <xnnpack/reduce.h> |
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$ACC_SUFFIX = "" if ACCUMULATORS == 1 else "_acc%d" % ACCUMULATORS |
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void xnn_f16_rsum_ukernel__neonfp16arith_x${BATCH_TILE}${ACC_SUFFIX}( |
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size_t batch, |
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const void* input, |
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void* output, |
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const union xnn_f16_scale_params params[restrict XNN_MIN_ELEMENTS(1)]) |
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{ |
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assert(batch != 0); |
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assert(batch % sizeof(uint16_t) == 0); |
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assert(input != NULL); |
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assert(output != NULL); |
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const uint16_t* i = (const uint16_t*) input; |
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uint16_t* o = (uint16_t*) output; |
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$for A in range(ACCUMULATORS): |
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float16x8_t vacc${A} = vreinterpretq_f16_u16(vmovq_n_u16(0)); |
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$if BATCH_TILE > 8: |
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for (; batch >= ${BATCH_TILE} * sizeof(uint16_t); batch -= ${BATCH_TILE} * sizeof(uint16_t)) { |
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$for N in range(SIMD_TILE): |
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const float16x8_t vt${N} = vreinterpretq_f16_u16(vld1q_u16(i)); i += 8; |
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$for N in range(SIMD_TILE): |
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vacc${N % ACCUMULATORS} = vaddq_f16(vacc${N % ACCUMULATORS}, vt${N}); |
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} |
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$if ACCUMULATORS > 1: |
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$ACC_SLICE = 1 |
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$while ACC_SLICE < ACCUMULATORS: |
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$for A in range(0, ACCUMULATORS, ACC_SLICE * 2): |
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$if A + ACC_SLICE < ACCUMULATORS: |
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vacc${A} = vaddq_f16(vacc${A}, vacc${A + ACC_SLICE}); |
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$ACC_SLICE *= 2 |
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for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) { |
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const float16x8_t vt = vreinterpretq_f16_u16(vld1q_u16(i)); i += 8; |
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vacc0 = vaddq_f16(vacc0, vt); |
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} |
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const float16x4_t vscale = vreinterpret_f16_u16(vld1_dup_u16(¶ms->fp16arith.scale)); |
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float16x4_t vacc = vadd_f16(vget_low_f16(vacc0), vget_high_f16(vacc0)); |
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if XNN_UNLIKELY(batch & (4 * sizeof(uint16_t))) { |
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const float16x4_t vt = vreinterpret_f16_u16(vld1_u16(i)); i += 4; |
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vacc = vadd_f16(vacc, vt); |
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} |
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vacc = vpadd_f16(vacc, vacc); |
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if XNN_UNLIKELY(batch & (2 * sizeof(uint16_t))) { |
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const float16x4_t vt = vreinterpret_f16_u32(vld1_dup_u32((const void*) i)); i += 2; |
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vacc = vadd_f16(vacc, vt); |
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} |
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vacc = vpadd_f16(vacc, vacc); |
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if XNN_UNLIKELY(batch & (1 * sizeof(uint16_t))) { |
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const float16x4_t vt = vreinterpret_f16_u16(vld1_dup_u16(i)); |
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vacc = vadd_f16(vacc, vt); |
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} |
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vacc = vmul_f16(vacc, vscale); |
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vst1_lane_u16(o, vreinterpret_u16_f16(vacc), 0); |
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} |
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