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// Copyright 2022 Google LLC |
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// |
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// This source code is licensed under the BSD-style license found in the |
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// LICENSE file in the root directory of this source tree. |
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// Register usage |
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// A0 x8 v0 |
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// B x5 v20 v21 v22 v23 |
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// C0 x6 v24 v25 |
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// clamp v4, v5 |
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BEGIN_FUNCTION xnn_f16_igemm_minmax_ukernel_1x16__asm_aarch64_neonfp16arith_ld32 |
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LDP x10, x11, [sp] |
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LDP x12, x8, [sp, 16] |
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LD2R {v4.8h, v5.8h}, [x8] |
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0: |
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LDR q24, [x5], 16 |
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LDR q25, [x5], 16 |
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MOVI v26.8h, 0 // second set of C for pipelining FMLA |
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MOVI v27.8h, 0 |
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MOV x9, x3 // p = ks |
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1: |
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LDR x8, [x4], 8 |
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CMP x8, x12 // if a0 == zero |
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ADD x8, x8, x11 // a0 += a_offset |
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CSEL x8, x12, x8, EQ // a0 = zero, else += a0 + a_offset |
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SUBS x0, x2, 4 // k = kc - 4 |
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B.LO 4f |
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.p2align 3 |
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2: |
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LDR s0, [x8], 4 |
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LDR q20, [x5, 0] |
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LDR q21, [x5, 16] |
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LDR q22, [x5, 32] |
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LDR q23, [x5, 48] |
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SUBS x0, x0, 4 |
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FMLA v24.8h, v20.8h, v0.h[0] |
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FMLA v25.8h, v21.8h, v0.h[0] |
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FMLA v26.8h, v22.8h, v0.h[1] |
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FMLA v27.8h, v23.8h, v0.h[1] |
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ADD x5, x5, 64 |
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B.HS 2b |
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TBNZ x0, 1, 4f |
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3: |
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SUBS x9, x9, 8 // ks -= MR * sizeof(void*) |
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B.HI 1b |
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FADD v24.8h, v24.8h, v26.8h |
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FADD v25.8h, v25.8h, v27.8h |
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FMAX v24.8h, v24.8h, v4.8h |
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FMAX v25.8h, v25.8h, v4.8h |
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FMIN v24.8h, v24.8h, v5.8h |
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FMIN v25.8h, v25.8h, v5.8h |
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SUBS x1, x1, 16 |
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B.LO 5f |
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STP q24, q25, [x6] |
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ADD x6, x6, x10 |
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SUB x4, x4, x3 // a -= ks |
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B.HI 0b |
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RET |
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4: |
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LDR h0, [x8], 2 |
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LDR q20, [x5], 16 |
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LDR q21, [x5], 16 |
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FMLA v24.8h, v20.8h, v0.h[0] |
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FMLA v25.8h, v21.8h, v0.h[0] |
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B 3b |
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5: |
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TBZ x1, 3, 6f |
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STR q24, [x6], 16 |
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MOV v24.16b, v25.16b |
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6: |
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TBZ x1, 2, 7f |
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STR d24, [x6], 8 |
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DUP d24, v24.d[1] |
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7: |
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TBZ x1, 1, 8f |
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STR s24, [x6], 4 |
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DUP s24, v24.s[1] |
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8: |
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TBZ x1, 0, 9f |
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STR h24, [x6] |
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9: |
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RET |
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END_FUNCTION xnn_f16_igemm_minmax_ukernel_1x16__asm_aarch64_neonfp16arith_ld32 |
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.section ".note.GNU-stack","",%progbits |
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