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$assert BATCH_TILE % 2 == 0 |
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$assert BATCH_TILE >= 2 |
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$SIMD_TILE = BATCH_TILE |
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#include <assert.h> |
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#include <stddef.h> |
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#include <stdint.h> |
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#include <hexagon_protos.h> |
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#include <hexagon_types.h> |
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#include <xnnpack/vsquareabs.h> |
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void xnn_cs16_vsquareabs_ukernel__hexagon_x${BATCH_TILE}( |
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size_t batch, |
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const int16_t* input, |
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uint32_t* output) XNN_OOB_READS |
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{ |
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assert(batch != 0); |
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assert(batch % (sizeof(int16_t) * 2) == 0); |
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assert(input != NULL); |
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assert(output != NULL); |
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const HEXAGON_Vect64* i = (const HEXAGON_Vect64*) input; |
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HEXAGON_Vect64* o = (HEXAGON_Vect64*) output; |
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$if BATCH_TILE > 2: |
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for (; batch >= ${BATCH_TILE * 2} * sizeof(int16_t); batch -= ${BATCH_TILE * 2} * sizeof(int16_t)) { |
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$for N in range(SIMD_TILE): |
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HEXAGON_Vect64 vacc${N} = *i++; |
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$for N in range(SIMD_TILE): |
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vacc${N} = Q6_P_vdmpy_PP_sat(vacc${N}, vacc${N}); |
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$for N in range(SIMD_TILE): |
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*o++ = vacc${N}; |
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} |
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for (; batch >= 4 * sizeof(int16_t); batch -= 4 * sizeof(int16_t)) { |
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HEXAGON_Vect64 vacc = *i++; |
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vacc = Q6_P_vdmpy_PP_sat(vacc, vacc); |
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*o++ = vacc; |
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} |
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if XNN_LIKELY(batch != 0) { |
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assert(batch == 2 * sizeof(int16_t)); |
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const HEXAGON_Vect32 vi = *((const HEXAGON_Vect32*) i); |
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HEXAGON_Vect32 vacc = Q6_R_mpy_RlRl(vi, vi); |
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vacc = Q6_R_mpyacc_RhRh_sat(vacc, vi, vi); |
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*((HEXAGON_Vect32*) o) = vacc; |
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} |
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} |
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