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#include <assert.h> |
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#include <arm_neon.h> |
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#include <xnnpack/gavgpool.h> |
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void xnn_f16_gavgpool_minmax_ukernel_7x__neonfp16arith_c8( |
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size_t rows, |
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size_t channels, |
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const void* input, |
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size_t input_stride, |
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const void* zero, |
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void* output, |
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const union xnn_f16_scaleminmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS |
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{ |
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assert(rows != 0); |
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assert(rows <= 7); |
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assert(channels != 0); |
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const uint16_t* i0 = input; |
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const uint16_t* i1 = (const uint16_t*) ((uintptr_t) i0 + input_stride); |
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if XNN_UNPREDICTABLE(rows < 2) { |
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i1 = (const uint16_t*) zero; |
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} |
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const uint16_t* i2 = (const uint16_t*) ((uintptr_t) i1 + input_stride); |
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if XNN_UNPREDICTABLE(rows <= 2) { |
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i2 = (const uint16_t*) zero; |
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} |
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const uint16_t* i3 = (const uint16_t*) ((uintptr_t) i2 + input_stride); |
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if XNN_UNPREDICTABLE(rows < 4) { |
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i3 = (const uint16_t*) zero; |
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} |
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const uint16_t* i4 = (const uint16_t*) ((uintptr_t) i3 + input_stride); |
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if XNN_UNPREDICTABLE(rows <= 4) { |
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i4 = (const uint16_t*) zero; |
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} |
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const uint16_t* i5 = (const uint16_t*) ((uintptr_t) i4 + input_stride); |
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if XNN_UNPREDICTABLE(rows < 6) { |
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i5 = (const uint16_t*) zero; |
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} |
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const uint16_t* i6 = (const uint16_t*) ((uintptr_t) i5 + input_stride); |
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if XNN_UNPREDICTABLE(rows <= 6) { |
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i6 = (const uint16_t*) zero; |
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} |
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const float16x8_t vscale = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->fp16arith.scale)); |
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const float16x8_t vmin = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->fp16arith.min)); |
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const float16x8_t vmax = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->fp16arith.max)); |
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for (; channels >= 8; channels -= 8) { |
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const float16x8_t vi0x01234567 = vreinterpretq_f16_u16(vld1q_u16(i0)); i0 += 8; |
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const float16x8_t vi1x01234567 = vreinterpretq_f16_u16(vld1q_u16(i1)); i1 += 8; |
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const float16x8_t vi2x01234567 = vreinterpretq_f16_u16(vld1q_u16(i2)); i2 += 8; |
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float16x8_t vacc01234567 = vaddq_f16(vi0x01234567, vi1x01234567); |
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const float16x8_t vi3x01234567 = vreinterpretq_f16_u16(vld1q_u16(i3)); i3 += 8; |
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vacc01234567 = vaddq_f16(vacc01234567, vi2x01234567); |
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const float16x8_t vi4x01234567 = vreinterpretq_f16_u16(vld1q_u16(i4)); i4 += 8; |
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vacc01234567 = vaddq_f16(vacc01234567, vi3x01234567); |
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const float16x8_t vi5x01234567 = vreinterpretq_f16_u16(vld1q_u16(i5)); i5 += 8; |
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vacc01234567 = vaddq_f16(vacc01234567, vi4x01234567); |
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const float16x8_t vi6x01234567 = vreinterpretq_f16_u16(vld1q_u16(i6)); i6 += 8; |
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vacc01234567 = vaddq_f16(vacc01234567, vi5x01234567); |
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vacc01234567 = vaddq_f16(vacc01234567, vi6x01234567); |
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vacc01234567 = vmulq_f16(vacc01234567, vscale); |
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vacc01234567 = vmaxq_f16(vacc01234567, vmin); |
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vacc01234567 = vminq_f16(vacc01234567, vmax); |
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vst1q_u16(output, vreinterpretq_u16_f16(vacc01234567)); output = (uint16_t*) output + 8; |
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} |
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if XNN_UNLIKELY(channels != 0) { |
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{ |
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const float16x8_t vi0x01234567 = vreinterpretq_f16_u16(vld1q_u16(i0)); i0 += 8; |
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const float16x8_t vi1x01234567 = vreinterpretq_f16_u16(vld1q_u16(i1)); i1 += 8; |
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const float16x8_t vi2x01234567 = vreinterpretq_f16_u16(vld1q_u16(i2)); i2 += 8; |
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float16x8_t vacc01234567 = vaddq_f16(vi0x01234567, vi1x01234567); |
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const float16x8_t vi3x01234567 = vreinterpretq_f16_u16(vld1q_u16(i3)); i3 += 8; |
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vacc01234567 = vaddq_f16(vacc01234567, vi2x01234567); |
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const float16x8_t vi4x01234567 = vreinterpretq_f16_u16(vld1q_u16(i4)); i4 += 8; |
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vacc01234567 = vaddq_f16(vacc01234567, vi3x01234567); |
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const float16x8_t vi5x01234567 = vreinterpretq_f16_u16(vld1q_u16(i5)); i5 += 8; |
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vacc01234567 = vaddq_f16(vacc01234567, vi4x01234567); |
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const float16x8_t vi6x01234567 = vreinterpretq_f16_u16(vld1q_u16(i6)); i6 += 8; |
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vacc01234567 = vaddq_f16(vacc01234567, vi5x01234567); |
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vacc01234567 = vaddq_f16(vacc01234567, vi6x01234567); |
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vacc01234567 = vmulq_f16(vacc01234567, vscale); |
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vacc01234567 = vmaxq_f16(vacc01234567, vmin); |
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vacc01234567 = vminq_f16(vacc01234567, vmax); |
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float16x4_t vacc0123 = vget_low_f16(vacc01234567); |
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if (channels & 4) { |
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vst1_u16(output, vreinterpret_u16_f16(vacc0123)); output = (uint16_t*) output + 4; |
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vacc0123 = vget_high_f16(vacc01234567); |
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} |
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if (channels & 2) { |
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vst1_lane_u32(output, vreinterpret_u32_f16(vacc0123), 0); output = (uint16_t*) output + 2; |
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vacc0123 = vext_f16(vacc0123, vacc0123, 2); |
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} |
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if (channels & 1) { |
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vst1_lane_u16(output, vreinterpret_u16_f16(vacc0123), 0); output = (uint16_t*) output + 1; |
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} |
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} |
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} |
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} |
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