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#include <assert.h> |
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#include <arm_neon.h> |
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#include <xnnpack/dwconv.h> |
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#include <xnnpack/intrinsics-polyfill.h> |
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#include <xnnpack/math.h> |
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void xnn_f16_dwconv2d_chw_ukernel_3x3p1__neonfp16arith_1x8_acc3( |
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size_t input_height, |
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size_t input_width, |
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const void* input, |
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const void* weights, |
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const void* zero, |
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void* output, |
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uint32_t padding_top, |
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const union xnn_f16_chw_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS |
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{ |
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assert(input_height != 0); |
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assert(input_width != 0); |
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assert(input_width % sizeof(uint16_t) == 0); |
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assert(padding_top == 1); |
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#if XNN_ARCH_ARM64 |
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const uint16x8x2_t vminmax = vld2q_dup_u16(¶ms->neonfp16arith_stride1.min); |
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const float16x8_t vmin = vreinterpretq_f16_u16(vminmax.val[0]); |
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const float16x8_t vmax = vreinterpretq_f16_u16(vminmax.val[1]); |
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#else |
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const uint16x4x2_t vminmax = vld2_dup_u16(¶ms->neonfp16arith_stride1.min); |
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const float16x8_t vmin = vreinterpretq_f16_u16(vcombine_u16(vminmax.val[0], vminmax.val[0])); |
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const float16x8_t vmax = vreinterpretq_f16_u16(vcombine_u16(vminmax.val[1], vminmax.val[1])); |
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#endif |
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const uint16x8_t vmask = vld1q_u16(params->neonfp16arith_stride1.mask); |
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const uint16_t* w = (const uint16_t*) weights; |
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const float16x8_t vw01234567 = vreinterpretq_f16_u16(vld1q_u16(w)); |
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const float16x4_t vw89 = vreinterpret_f16_u32(vld1_dup_u32((const void*) (w + 8))); |
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const size_t input_decrement = round_up_po2(input_width, 8 * sizeof(uint16_t)); |
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const uint16_t* i0 = zero; |
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const uint16_t* i1 = input; |
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const uint16_t* i2 = (const uint16_t*) ((uintptr_t) i1 + input_width); |
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uint16_t* o0 = output; |
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size_t output_height = input_height; |
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do { |
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if XNN_UNPREDICTABLE(output_height < 2) { |
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i2 = zero; |
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} |
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float16x8_t vi0x01234567 = vreinterpretq_f16_u16(vmovq_n_u16(0)); |
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float16x8_t vi1x01234567 = vreinterpretq_f16_u16(vmovq_n_u16(0)); |
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float16x8_t vi2x01234567 = vreinterpretq_f16_u16(vmovq_n_u16(0)); |
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float16x8_t vi0x89ABCDEF = vreinterpretq_f16_u16(vld1q_u16(i0)); i0 += 8; |
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float16x8_t vi1x89ABCDEF = vreinterpretq_f16_u16(vld1q_u16(i1)); i1 += 8; |
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float16x8_t vi2x89ABCDEF = vreinterpretq_f16_u16(vld1q_u16(i2)); i2 += 8; |
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size_t w = input_width; |
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for (; w > 8 * sizeof(uint16_t); w -= 8 * sizeof(uint16_t)) { |
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float16x8_t vo0p0 = vdupq_lane_f16(vget_low_f16(vw01234567), 0); |
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const float16x8_t vi0xGHIJKLMN = vreinterpretq_f16_u16(vld1q_u16(i0)); i0 += 8; |
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const float16x8_t vi1xGHIJKLMN = vreinterpretq_f16_u16(vld1q_u16(i1)); i1 += 8; |
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const float16x8_t vi2xGHIJKLMN = vreinterpretq_f16_u16(vld1q_u16(i2)); i2 += 8; |
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#if XNN_ARCH_ARM64 |
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vo0p0 = vfmaq_laneq_f16(vo0p0, vi0x89ABCDEF, vw01234567, 2); |
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#else |
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vo0p0 = vmlaq_lane_f16(vo0p0, vi0x89ABCDEF, vget_low_f16(vw01234567), 2); |
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#endif |
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float16x8_t vo0p1 = vmulq_lane_f16(vi1x89ABCDEF, vget_high_f16(vw01234567), 1); |
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float16x8_t vo0p2 = vmulq_lane_f16(vi2x89ABCDEF, vw89, 0); |
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const float16x8_t vi0x789ABCDE = vextq_f16(vi0x01234567, vi0x89ABCDEF, 7); |
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const float16x8_t vi1x789ABCDE = vextq_f16(vi1x01234567, vi1x89ABCDEF, 7); |
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const float16x8_t vi2x789ABCDE = vextq_f16(vi2x01234567, vi2x89ABCDEF, 7); |
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#if XNN_ARCH_ARM64 |
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vo0p0 = vfmaq_laneq_f16(vo0p0, vi0x789ABCDE, vw01234567, 1); |
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#else |
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vo0p0 = vmlaq_lane_f16(vo0p0, vi0x789ABCDE, vget_low_f16(vw01234567), 1); |
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#endif |
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#if XNN_ARCH_ARM64 |
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vo0p1 = vfmaq_laneq_f16(vo0p1, vi1x789ABCDE, vw01234567, 4); |
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#else |
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vo0p1 = vmlaq_lane_f16(vo0p1, vi1x789ABCDE, vget_high_f16(vw01234567), 0); |
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#endif |
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#if XNN_ARCH_ARM64 |
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vo0p2 = vfmaq_laneq_f16(vo0p2, vi2x789ABCDE, vw01234567, 7); |
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#else |
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vo0p2 = vmlaq_lane_f16(vo0p2, vi2x789ABCDE, vget_high_f16(vw01234567), 3); |
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#endif |
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vi0x01234567 = vi0x89ABCDEF; |
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vi1x01234567 = vi1x89ABCDEF; |
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vi2x01234567 = vi2x89ABCDEF; |
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const float16x8_t vi0x9ABCDEFG = vextq_f16(vi0x89ABCDEF, vi0xGHIJKLMN, 1); |
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const float16x8_t vi1x9ABCDEFG = vextq_f16(vi1x89ABCDEF, vi1xGHIJKLMN, 1); |
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const float16x8_t vi2x9ABCDEFG = vextq_f16(vi2x89ABCDEF, vi2xGHIJKLMN, 1); |
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#if XNN_ARCH_ARM64 |
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vo0p0 = vfmaq_laneq_f16(vo0p0, vi0x9ABCDEFG, vw01234567, 3); |
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#else |
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vo0p0 = vmlaq_lane_f16(vo0p0, vi0x9ABCDEFG, vget_low_f16(vw01234567), 3); |
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#endif |
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#if XNN_ARCH_ARM64 |
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vo0p1 = vfmaq_laneq_f16(vo0p1, vi1x9ABCDEFG, vw01234567, 6); |
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#else |
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vo0p1 = vmlaq_lane_f16(vo0p1, vi1x9ABCDEFG, vget_high_f16(vw01234567), 2); |
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#endif |
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#if XNN_ARCH_ARM64 |
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vo0p2 = vfmaq_lane_f16(vo0p2, vi2x9ABCDEFG, vw89, 1); |
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#else |
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vo0p2 = vmlaq_lane_f16(vo0p2, vi2x9ABCDEFG, vw89, 1); |
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#endif |
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vi0x89ABCDEF = vi0xGHIJKLMN; |
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vi1x89ABCDEF = vi1xGHIJKLMN; |
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vi2x89ABCDEF = vi2xGHIJKLMN; |
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vo0p0 = vaddq_f16(vo0p0, vo0p1); |
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vo0p0 = vaddq_f16(vo0p0, vo0p2); |
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float16x8_t vo0 = vmaxq_f16(vo0p0, vmin); |
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vo0 = vminq_f16(vo0, vmax); |
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vst1q_u16(o0, vreinterpretq_u16_f16(vo0)); o0 += 8; |
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} |
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assert(w >= 1 * sizeof(uint16_t)); |
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assert(w <= 8 * sizeof(uint16_t)); |
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{ |
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float16x8_t vo0p0 = vdupq_lane_f16(vget_low_f16(vw01234567), 0); |
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vi0x89ABCDEF = vreinterpretq_f16_u16(vandq_u16(vmask, vreinterpretq_u16_f16(vi0x89ABCDEF))); |
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vi1x89ABCDEF = vreinterpretq_f16_u16(vandq_u16(vmask, vreinterpretq_u16_f16(vi1x89ABCDEF))); |
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vi2x89ABCDEF = vreinterpretq_f16_u16(vandq_u16(vmask, vreinterpretq_u16_f16(vi2x89ABCDEF))); |
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#if XNN_ARCH_ARM64 |
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vo0p0 = vfmaq_laneq_f16(vo0p0, vi0x89ABCDEF, vw01234567, 2); |
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#else |
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vo0p0 = vmlaq_lane_f16(vo0p0, vi0x89ABCDEF, vget_low_f16(vw01234567), 2); |
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#endif |
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float16x8_t vo0p1 = vmulq_lane_f16(vi1x89ABCDEF, vget_high_f16(vw01234567), 1); |
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float16x8_t vo0p2 = vmulq_lane_f16(vi2x89ABCDEF, vw89, 0); |
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const float16x8_t vi0x789ABCDE = vextq_f16(vi0x01234567, vi0x89ABCDEF, 7); |
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const float16x8_t vi1x789ABCDE = vextq_f16(vi1x01234567, vi1x89ABCDEF, 7); |
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const float16x8_t vi2x789ABCDE = vextq_f16(vi2x01234567, vi2x89ABCDEF, 7); |
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#if XNN_ARCH_ARM64 |
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vo0p0 = vfmaq_laneq_f16(vo0p0, vi0x789ABCDE, vw01234567, 1); |
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#else |
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vo0p0 = vmlaq_lane_f16(vo0p0, vi0x789ABCDE, vget_low_f16(vw01234567), 1); |
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#endif |
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#if XNN_ARCH_ARM64 |
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vo0p1 = vfmaq_laneq_f16(vo0p1, vi1x789ABCDE, vw01234567, 4); |
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#else |
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vo0p1 = vmlaq_lane_f16(vo0p1, vi1x789ABCDE, vget_high_f16(vw01234567), 0); |
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#endif |
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#if XNN_ARCH_ARM64 |
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vo0p2 = vfmaq_laneq_f16(vo0p2, vi2x789ABCDE, vw01234567, 7); |
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#else |
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vo0p2 = vmlaq_lane_f16(vo0p2, vi2x789ABCDE, vget_high_f16(vw01234567), 3); |
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#endif |
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const float16x8_t vzero = vreinterpretq_f16_u16(vmovq_n_u16(0)); |
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const float16x8_t vi0x9ABCDEFG = vextq_f16(vi0x89ABCDEF, vzero, 1); |
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const float16x8_t vi1x9ABCDEFG = vextq_f16(vi1x89ABCDEF, vzero, 1); |
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const float16x8_t vi2x9ABCDEFG = vextq_f16(vi2x89ABCDEF, vzero, 1); |
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#if XNN_ARCH_ARM64 |
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vo0p0 = vfmaq_laneq_f16(vo0p0, vi0x9ABCDEFG, vw01234567, 3); |
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#else |
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vo0p0 = vmlaq_lane_f16(vo0p0, vi0x9ABCDEFG, vget_low_f16(vw01234567), 3); |
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#endif |
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#if XNN_ARCH_ARM64 |
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vo0p1 = vfmaq_laneq_f16(vo0p1, vi1x9ABCDEFG, vw01234567, 6); |
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#else |
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vo0p1 = vmlaq_lane_f16(vo0p1, vi1x9ABCDEFG, vget_high_f16(vw01234567), 2); |
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#endif |
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#if XNN_ARCH_ARM64 |
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vo0p2 = vfmaq_lane_f16(vo0p2, vi2x9ABCDEFG, vw89, 1); |
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#else |
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vo0p2 = vmlaq_lane_f16(vo0p2, vi2x9ABCDEFG, vw89, 1); |
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#endif |
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vo0p0 = vaddq_f16(vo0p0, vo0p1); |
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vo0p0 = vaddq_f16(vo0p0, vo0p2); |
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float16x8_t vo0 = vmaxq_f16(vo0p0, vmin); |
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vo0 = vminq_f16(vo0, vmax); |
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if XNN_LIKELY(w == 8 * sizeof(uint16_t)) { |
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vst1q_u16(o0, vreinterpretq_u16_f16(vo0)); o0 += 8; |
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} else { |
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float16x4_t vo0_lo = vget_low_f16(vo0); |
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if (w & (4 * sizeof(uint16_t))) { |
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vst1_u16(o0, vreinterpret_u16_f16(vo0_lo)); o0 += 4; |
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vo0_lo = vget_high_f16(vo0); |
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} |
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if (w & (2 * sizeof(uint16_t))) { |
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vst1_lane_u32((void*) o0, vreinterpret_u32_f16(vo0_lo), 0); o0 += 2; |
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vo0_lo = vext_f16(vo0_lo, vo0_lo, 2); |
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} |
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if (w & (1 * sizeof(uint16_t))) { |
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vst1_lane_u16(o0, vreinterpret_u16_f16(vo0_lo), 0); o0 += 1; |
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} |
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} |
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} |
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i0 = (const uint16_t*) ((uintptr_t) i1 - input_decrement); |
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i1 = (const uint16_t*) ((uintptr_t) i2 - input_decrement); |
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i2 = (const uint16_t*) ((uintptr_t) i1 + input_width); |
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} while (--output_height != 0); |
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} |
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