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#include <assert.h> |
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#include <arm_neon.h> |
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#include <xnnpack/common.h> |
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#include <xnnpack/vcvt.h> |
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void xnn_f32_f16_vcvt_ukernel__neon_x16( |
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size_t batch, |
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const float* input, |
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void* output, |
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const union xnn_f32_f16_cvt_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS |
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{ |
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assert(batch != 0); |
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assert(batch % sizeof(float) == 0); |
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assert(input != NULL); |
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assert(output != NULL); |
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const uint32x4_t vexp_bias = vld1q_dup_u32(¶ms->neon.exp_bias); |
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const float32x4_t vscale_to_inf = vld1q_dup_f32(¶ms->neon.scale_to_inf); |
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const uint32x4_t vexpw_max = vld1q_dup_u32(¶ms->neon.expw_max); |
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const float32x4_t vscale_to_zero = vld1q_dup_f32(¶ms->neon.scale_to_zero); |
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const uint32x4_t vbias_min = vdupq_n_u32(UINT32_C(0x40000000)); |
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const uint16x8_t vexph_mask = vdupq_n_u16(UINT16_C(0x7C00)); |
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const uint16x8_t vmanth_mask = vdupq_n_u16(UINT16_C(0x0FFF)); |
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const uint16x8_t vsignh_mask = vdupq_n_u16(UINT16_C(0x8000)); |
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const uint16x8_t vnanh = vdupq_n_u16(UINT16_C(0x7E00)); |
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uint16_t* o = (uint16_t*) output; |
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for (; batch >= 16 * sizeof(float); batch -= 16 * sizeof(float)) { |
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const float32x4_t vx0 = vld1q_f32(input); input += 4; |
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const float32x4_t vx1 = vld1q_f32(input); input += 4; |
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const float32x4_t vx2 = vld1q_f32(input); input += 4; |
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const float32x4_t vx3 = vld1q_f32(input); input += 4; |
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const float32x4_t vabsx0 = vabsq_f32(vx0); |
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const float32x4_t vabsx1 = vabsq_f32(vx1); |
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const float32x4_t vabsx2 = vabsq_f32(vx2); |
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const float32x4_t vabsx3 = vabsq_f32(vx3); |
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uint32x4_t vbias0 = vaddq_u32(vreinterpretq_u32_f32(vabsx0), vexp_bias); |
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uint32x4_t vbias1 = vaddq_u32(vreinterpretq_u32_f32(vabsx1), vexp_bias); |
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uint32x4_t vbias2 = vaddq_u32(vreinterpretq_u32_f32(vabsx2), vexp_bias); |
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uint32x4_t vbias3 = vaddq_u32(vreinterpretq_u32_f32(vabsx3), vexp_bias); |
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float32x4_t vf0 = vmulq_f32(vabsx0, vscale_to_inf); |
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float32x4_t vf1 = vmulq_f32(vabsx1, vscale_to_inf); |
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float32x4_t vf2 = vmulq_f32(vabsx2, vscale_to_inf); |
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float32x4_t vf3 = vmulq_f32(vabsx3, vscale_to_inf); |
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const uint32x4_t vnanmaskw0 = vcgtq_u32(vreinterpretq_u32_f32(vabsx0), vexpw_max); |
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const uint32x4_t vnanmaskw1 = vcgtq_u32(vreinterpretq_u32_f32(vabsx1), vexpw_max); |
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const uint32x4_t vnanmaskw2 = vcgtq_u32(vreinterpretq_u32_f32(vabsx2), vexpw_max); |
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const uint32x4_t vnanmaskw3 = vcgtq_u32(vreinterpretq_u32_f32(vabsx3), vexpw_max); |
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vbias0 = vandq_u32(vbias0, vexpw_max); |
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vbias1 = vandq_u32(vbias1, vexpw_max); |
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vbias2 = vandq_u32(vbias2, vexpw_max); |
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vbias3 = vandq_u32(vbias3, vexpw_max); |
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vf0 = vmulq_f32(vf0, vscale_to_zero); |
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vf1 = vmulq_f32(vf1, vscale_to_zero); |
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vf2 = vmulq_f32(vf2, vscale_to_zero); |
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vf3 = vmulq_f32(vf3, vscale_to_zero); |
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const uint16x8_t vnanmaskh0 = vcombine_u16(vmovn_u32(vnanmaskw0), vmovn_u32(vnanmaskw1)); |
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const uint16x8_t vnanmaskh1 = vcombine_u16(vmovn_u32(vnanmaskw2), vmovn_u32(vnanmaskw3)); |
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vbias0 = vmaxq_u32(vbias0, vbias_min); |
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vbias1 = vmaxq_u32(vbias1, vbias_min); |
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vbias2 = vmaxq_u32(vbias2, vbias_min); |
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vbias3 = vmaxq_u32(vbias3, vbias_min); |
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vf0 = vaddq_f32(vf0, vreinterpretq_f32_u32(vbias0)); |
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vf1 = vaddq_f32(vf1, vreinterpretq_f32_u32(vbias1)); |
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vf2 = vaddq_f32(vf2, vreinterpretq_f32_u32(vbias2)); |
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vf3 = vaddq_f32(vf3, vreinterpretq_f32_u32(vbias3)); |
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uint16x8_t vexph0 = vcombine_u16(vshrn_n_u32(vreinterpretq_u32_f32(vf0), 13), vshrn_n_u32(vreinterpretq_u32_f32(vf1), 13)); |
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uint16x8_t vexph1 = vcombine_u16(vshrn_n_u32(vreinterpretq_u32_f32(vf2), 13), vshrn_n_u32(vreinterpretq_u32_f32(vf3), 13)); |
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uint16x8_t vmanth0 = vcombine_u16(vmovn_u32(vreinterpretq_u32_f32(vf0)), vmovn_u32(vreinterpretq_u32_f32(vf1))); |
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uint16x8_t vmanth1 = vcombine_u16(vmovn_u32(vreinterpretq_u32_f32(vf2)), vmovn_u32(vreinterpretq_u32_f32(vf3))); |
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uint16x8_t vsignh0 = vcombine_u16(vshrn_n_u32(vreinterpretq_u32_f32(vx0), 16), vshrn_n_u32(vreinterpretq_u32_f32(vx1), 16)); |
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uint16x8_t vsignh1 = vcombine_u16(vshrn_n_u32(vreinterpretq_u32_f32(vx2), 16), vshrn_n_u32(vreinterpretq_u32_f32(vx3), 16)); |
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vexph0 = vandq_u16(vexph0, vexph_mask); |
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vexph1 = vandq_u16(vexph1, vexph_mask); |
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vmanth0 = vandq_u16(vmanth0, vmanth_mask); |
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vmanth1 = vandq_u16(vmanth1, vmanth_mask); |
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vsignh0 = vandq_u16(vsignh0, vsignh_mask); |
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vsignh1 = vandq_u16(vsignh1, vsignh_mask); |
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uint16x8_t vh0 = vaddq_u16(vmanth0, vexph0); |
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uint16x8_t vh1 = vaddq_u16(vmanth1, vexph1); |
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vh0 = vbslq_u16(vnanmaskh0, vnanh, vh0); |
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vh1 = vbslq_u16(vnanmaskh1, vnanh, vh1); |
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vh0 = vorrq_u16(vh0, vsignh0); |
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vh1 = vorrq_u16(vh1, vsignh1); |
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vst1q_u16(o, vh0); o += 8; |
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vst1q_u16(o, vh1); o += 8; |
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} |
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for (; batch >= 4 * sizeof(float); batch -= 4 * sizeof(float)) { |
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const float32x4_t vx = vld1q_f32(input); input += 4; |
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const float32x4_t vabsx = vabsq_f32(vx); |
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uint32x4_t vbias = vaddq_u32(vreinterpretq_u32_f32(vabsx), vexp_bias); |
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float32x4_t vf = vmulq_f32(vabsx, vscale_to_inf); |
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const uint32x4_t vnanmaskw = vcgtq_u32(vreinterpretq_u32_f32(vabsx), vexpw_max); |
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vbias = vandq_u32(vbias, vexpw_max); |
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vf = vmulq_f32(vf, vscale_to_zero); |
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const uint16x4_t vnanmaskh = vmovn_u32(vnanmaskw); |
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vbias = vmaxq_u32(vbias, vbias_min); |
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vf = vaddq_f32(vf, vreinterpretq_f32_u32(vbias)); |
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uint16x4_t vexph = vshrn_n_u32(vreinterpretq_u32_f32(vf), 13); |
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uint16x4_t vmanth = vmovn_u32(vreinterpretq_u32_f32(vf)); |
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uint16x4_t vsignh = vshrn_n_u32(vreinterpretq_u32_f32(vx), 16); |
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vexph = vand_u16(vexph, vget_low_u16(vexph_mask)); |
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vmanth = vand_u16(vmanth, vget_low_u16(vmanth_mask)); |
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vsignh = vand_u16(vsignh, vget_low_u16(vsignh_mask)); |
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uint16x4_t vh = vadd_u16(vmanth, vexph); |
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vh = vbsl_u16(vnanmaskh, vget_low_u16(vnanh), vh); |
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vh = vorr_u16(vh, vsignh); |
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vst1_u16(o, vh); o += 4; |
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} |
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if XNN_UNLIKELY(batch != 0) { |
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assert(batch % sizeof(float) == 0); |
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assert(batch >= 1 * sizeof(float)); |
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assert(batch <= 3 * sizeof(float)); |
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const float32x4_t vx = vld1q_f32(input); |
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const float32x4_t vabsx = vabsq_f32(vx); |
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uint32x4_t vbias = vaddq_u32(vreinterpretq_u32_f32(vabsx), vexp_bias); |
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float32x4_t vf = vmulq_f32(vabsx, vscale_to_inf); |
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const uint32x4_t vnanmaskw = vcgtq_u32(vreinterpretq_u32_f32(vabsx), vexpw_max); |
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vbias = vandq_u32(vbias, vexpw_max); |
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vf = vmulq_f32(vf, vscale_to_zero); |
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const uint16x4_t vnanmaskh = vmovn_u32(vnanmaskw); |
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vbias = vmaxq_u32(vbias, vbias_min); |
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vf = vaddq_f32(vf, vreinterpretq_f32_u32(vbias)); |
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uint16x4_t vexph = vshrn_n_u32(vreinterpretq_u32_f32(vf), 13); |
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uint16x4_t vmanth = vmovn_u32(vreinterpretq_u32_f32(vf)); |
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uint16x4_t vsignh = vshrn_n_u32(vreinterpretq_u32_f32(vx), 16); |
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vexph = vand_u16(vexph, vget_low_u16(vexph_mask)); |
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vmanth = vand_u16(vmanth, vget_low_u16(vmanth_mask)); |
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vsignh = vand_u16(vsignh, vget_low_u16(vsignh_mask)); |
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uint16x4_t vh = vadd_u16(vmanth, vexph); |
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vh = vbsl_u16(vnanmaskh, vget_low_u16(vnanh), vh); |
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vh = vorr_u16(vh, vsignh); |
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if (batch & (2 * sizeof(float))) { |
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vst1_lane_u32((void*) o, vreinterpret_u32_u16(vh), 0); o += 2; |
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vh = vext_u16(vh, vh, 2); |
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} |
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if (batch & (1 * sizeof(float))) { |
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vst1_lane_u16(o, vh, 0); |
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} |
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} |
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} |
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