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#include <assert.h> |
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#include <arm_neon.h> |
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#include <xnnpack/common.h> |
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#include <xnnpack/gemm.h> |
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#include <xnnpack/intrinsics-polyfill.h> |
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void xnn_f16_gemminc_minmax_ukernel_1x8__neonfp16arith_ld64( |
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size_t mr, |
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size_t nc, |
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size_t kc, |
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const void* restrict a, |
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size_t a_stride, |
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const void* restrict w, |
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void* restrict c, |
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size_t cm_stride, |
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size_t cn_stride, |
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const void* restrict acc, |
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const union xnn_f16_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) |
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{ |
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assert(mr != 0); |
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assert(mr <= 1); |
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assert(nc != 0); |
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assert(kc != 0); |
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assert(kc % sizeof(uint16_t) == 0); |
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assert(a != NULL); |
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assert(w != NULL); |
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assert(c != NULL); |
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assert(acc != NULL); |
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const uint16_t* a0 = (const uint16_t*) a; |
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uint16_t* c0 = (uint16_t*) c; |
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do { |
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float16x8_t vacc0x01234567 = vreinterpretq_f16_u16(vld1q_u16(acc)); acc = (const void*) ((uintptr_t) acc + sizeof(float16x8_t)); |
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size_t k = kc; |
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while (k >= 4 * sizeof(uint16_t)) { |
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const float16x4_t va0 = vreinterpret_f16_u16(vld1_u16(a0)); a0 += 4; |
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const float16x8_t vb01234567c0 = vreinterpretq_f16_u16(vld1q_u16(w)); w = (const void*) ((uintptr_t) w + sizeof(float16x8_t)); |
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#if XNN_ARCH_ARM64 |
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vacc0x01234567 = vfmaq_lane_f16(vacc0x01234567, vb01234567c0, va0, 0); |
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#else |
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vacc0x01234567 = vmlaq_lane_f16(vacc0x01234567, vb01234567c0, va0, 0); |
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#endif |
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const float16x8_t vb01234567c1 = vreinterpretq_f16_u16(vld1q_u16(w)); w = (const void*) ((uintptr_t) w + sizeof(float16x8_t)); |
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#if XNN_ARCH_ARM64 |
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vacc0x01234567 = vfmaq_lane_f16(vacc0x01234567, vb01234567c1, va0, 1); |
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#else |
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vacc0x01234567 = vmlaq_lane_f16(vacc0x01234567, vb01234567c1, va0, 1); |
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#endif |
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const float16x8_t vb01234567c2 = vreinterpretq_f16_u16(vld1q_u16(w)); w = (const void*) ((uintptr_t) w + sizeof(float16x8_t)); |
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#if XNN_ARCH_ARM64 |
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vacc0x01234567 = vfmaq_lane_f16(vacc0x01234567, vb01234567c2, va0, 2); |
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#else |
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vacc0x01234567 = vmlaq_lane_f16(vacc0x01234567, vb01234567c2, va0, 2); |
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#endif |
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const float16x8_t vb01234567c3 = vreinterpretq_f16_u16(vld1q_u16(w)); w = (const void*) ((uintptr_t) w + sizeof(float16x8_t)); |
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#if XNN_ARCH_ARM64 |
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vacc0x01234567 = vfmaq_lane_f16(vacc0x01234567, vb01234567c3, va0, 3); |
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#else |
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vacc0x01234567 = vmlaq_lane_f16(vacc0x01234567, vb01234567c3, va0, 3); |
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#endif |
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k -= 4 * sizeof(uint16_t); |
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} |
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if XNN_UNLIKELY(k != 0) { |
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do { |
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const float16x8_t va0 = vreinterpretq_f16_u16(vld1q_dup_u16(a0)); a0 += 1; |
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const float16x8_t vb01234567 = vreinterpretq_f16_u16(vld1q_u16(w)); w = (const void*) ((uintptr_t) w + sizeof(float16x8_t)); |
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vacc0x01234567 = vfmaq_f16(vacc0x01234567, va0, vb01234567); |
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k -= sizeof(uint16_t); |
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} while (k != 0); |
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} |
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const float16x8_t vmin = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->fp16arith.min)); |
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vacc0x01234567 = vmaxq_f16(vacc0x01234567, vmin); |
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const float16x8_t vmax = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->fp16arith.max)); |
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vacc0x01234567 = vminq_f16(vacc0x01234567, vmax); |
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if XNN_LIKELY(nc >= 8) { |
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vst1q_u16(c0, vreinterpretq_u16_f16(vacc0x01234567)); |
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c0 = (uint16_t*) ((uintptr_t) c0 + cn_stride); |
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a0 = (const uint16_t*) ((uintptr_t) a0 - kc); |
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nc -= 8; |
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} else { |
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float16x4_t vacc0x0123 = vget_low_f16(vacc0x01234567); |
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if (nc & 4) { |
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vst1_u16(c0, vreinterpret_u16_f16(vacc0x0123)); c0 += 4; |
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vacc0x0123 = vget_high_f16(vacc0x01234567); |
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} |
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if (nc & 2) { |
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vst1_lane_u32((void*) c0, vreinterpret_u32_f16(vacc0x0123), 0); c0 += 2; |
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vacc0x0123 = vext_f16(vacc0x0123, vacc0x0123, 2); |
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} |
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if (nc & 1) { |
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vst1_lane_u16(c0, vreinterpret_u16_f16(vacc0x0123), 0); |
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} |
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nc = 0; |
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} |
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} while (nc != 0); |
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} |
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