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/* Registers a driver with the ACPI bus. Searches the namespace for all devices that match the driver's criteria and binds. Returns zero for success or a negative error status for failure. */ | int acpi_bus_register_driver(struct acpi_driver *driver) | /* Registers a driver with the ACPI bus. Searches the namespace for all devices that match the driver's criteria and binds. Returns zero for success or a negative error status for failure. */
int acpi_bus_register_driver(struct acpi_driver *driver) | {
int ret;
if (acpi_disabled)
return -ENODEV;
driver->drv.name = driver->name;
driver->drv.bus = &acpi_bus_type;
driver->drv.owner = driver->owner;
ret = driver_register(&driver->drv);
return ret;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Enable the output direction of the specified GPIO. */ | int32_t gpio_direction_output(gpio_desc *desc, uint8_t value) | /* Enable the output direction of the specified GPIO. */
int32_t gpio_direction_output(gpio_desc *desc, uint8_t value) | {
int32_t ret;
uint16_t pin;
uint8_t port;
gpio_get_portpin(desc, &port, &pin);
ret = adi_gpio_OutputEnable(port, pin, true);
if(ret != ADI_GPIO_SUCCESS)
return ret;
if(value == GPIO_HIGH)
return adi_gpio_SetHigh(port, pin);
else
return adi_gpio_SetLow(port, pin);
} | analogdevicesinc/EVAL-ADICUP3029 | C++ | Other | 36 |
/* Check whether this blit is still active, performing necessary locking. */ | static int via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue) | /* Check whether this blit is still active, performing necessary locking. */
static int via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue) | {
unsigned long irqsave;
uint32_t slot;
int active;
spin_lock_irqsave(&blitq->blit_lock, irqsave);
active = ((blitq->done_blit_handle - handle) > (1 << 23)) &&
((blitq->cur_blit_handle - handle) <= (1 << 23));
if (queue && active) {
slot = handle - blitq->done_blit_handle + blitq->cur -1;
if (slot >= VIA_NUM_BLIT_SLOTS) {
slot -= VIA_NUM_BLIT_SLOTS;
}
*queue = blitq->blit_queue + slot;
}
spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
return active;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This function installs a notification service to be called back when a given interface is installed or reinstalled. The purpose of the service is to publish an interface that other parties can use to call additional PPIs that may materialize later. */ | EFI_STATUS EFIAPI PeiNotifyPpi(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_NOTIFY_DESCRIPTOR *NotifyList) | /* This function installs a notification service to be called back when a given interface is installed or reinstalled. The purpose of the service is to publish an interface that other parties can use to call additional PPIs that may materialize later. */
EFI_STATUS EFIAPI PeiNotifyPpi(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_NOTIFY_DESCRIPTOR *NotifyList) | {
return InternalPeiNotifyPpi (PeiServices, NotifyList, FALSE);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Initializes an AES configuration structure to defaults.
Initializes the specified AES configuration structure to a set of known default values. */ | void aes_get_config_defaults(struct aes_config *const p_cfg) | /* Initializes an AES configuration structure to defaults.
Initializes the specified AES configuration structure to a set of known default values. */
void aes_get_config_defaults(struct aes_config *const p_cfg) | {
Assert(p_cfg);
p_cfg->encrypt_mode = AES_ENCRYPTION;
p_cfg->key_size = AES_KEY_SIZE_128;
p_cfg->start_mode = AES_MANUAL_START;
p_cfg->opmode = AES_ECB_MODE;
p_cfg->cfb_size = AES_CFB_SIZE_128;
p_cfg->lod = false;
p_cfg->gtag_en = false;
p_cfg->processing_delay = 0;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Check the WP status in CR0 register. This bit is used to lock or unlock write access to pages marked as read-only. */ | BOOLEAN IsReadOnlyPageWriteProtected(VOID) | /* Check the WP status in CR0 register. This bit is used to lock or unlock write access to pages marked as read-only. */
BOOLEAN IsReadOnlyPageWriteProtected(VOID) | {
IA32_CR0 Cr0;
if (!IsInSmm ()) {
Cr0.UintN = AsmReadCr0 ();
return (BOOLEAN)(Cr0.Bits.WP != 0);
}
return FALSE;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Note that we rely on the fact that port can have only one child and therefore only one child registration request can be pending. Additionally, children are registered by driver's connect() handler so there can't be a grandchild pending registration together with a child. */ | static struct serio* serio_get_pending_child(struct serio *parent) | /* Note that we rely on the fact that port can have only one child and therefore only one child registration request can be pending. Additionally, children are registered by driver's connect() handler so there can't be a grandchild pending registration together with a child. */
static struct serio* serio_get_pending_child(struct serio *parent) | {
struct serio_event *event;
struct serio *serio, *child = NULL;
unsigned long flags;
spin_lock_irqsave(&serio_event_lock, flags);
list_for_each_entry(event, &serio_event_list, node) {
if (event->type == SERIO_REGISTER_PORT) {
serio = event->object;
if (serio->parent == parent) {
child = serio;
break;
}
}
}
spin_unlock_irqrestore(&serio_event_lock, flags);
return child;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Checks whether the specified ETHERNET MAC flag is set or not. */ | FlagStatus ETH_GetMacFlagStatus(uint32_t ETH_MAC_FLAG) | /* Checks whether the specified ETHERNET MAC flag is set or not. */
FlagStatus ETH_GetMacFlagStatus(uint32_t ETH_MAC_FLAG) | {
FlagStatus bitstatus = RESET;
assert_param(IS_ETH_MAC_GET_FLAG(ETH_MAC_FLAG));
if ((ETH->MACINTSTS & ETH_MAC_FLAG) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* In a fault condition, pins which have not been configured to be suppressed via a call to */ | void PWMOutputFaultLevel(uint32_t ui32Base, uint32_t ui32PWMOutBits, bool bDriveHigh) | /* In a fault condition, pins which have not been configured to be suppressed via a call to */
void PWMOutputFaultLevel(uint32_t ui32Base, uint32_t ui32PWMOutBits, bool bDriveHigh) | {
ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
ASSERT(!(ui32PWMOutBits & ~(PWM_OUT_0_BIT | PWM_OUT_1_BIT | PWM_OUT_2_BIT |
PWM_OUT_3_BIT | PWM_OUT_4_BIT | PWM_OUT_5_BIT |
PWM_OUT_6_BIT | PWM_OUT_7_BIT)));
if(bDriveHigh == true)
{
HWREG(ui32Base + PWM_O_FAULTVAL) |= ui32PWMOutBits;
}
else
{
HWREG(ui32Base + PWM_O_FAULTVAL) &= ~(ui32PWMOutBits);
}
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* Returns the current SPIx Transmission FIFO filled level. */ | uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef *SPIx) | /* Returns the current SPIx Transmission FIFO filled level. */
uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef *SPIx) | {
return (uint16_t)((SPIx->SR & SPI_SR_FTLVL));
} | ajhc/demo-cortex-m3 | C++ | null | 38 |
/* Parses the bs_info field to extract the block partitioning used in block switching mode, refer to ISO/IEC 14496-3, section 11.6.2. */ | static void parse_bs_info(const uint32_t bs_info, unsigned int n, unsigned int div, unsigned int **div_blocks, unsigned int *num_blocks) | /* Parses the bs_info field to extract the block partitioning used in block switching mode, refer to ISO/IEC 14496-3, section 11.6.2. */
static void parse_bs_info(const uint32_t bs_info, unsigned int n, unsigned int div, unsigned int **div_blocks, unsigned int *num_blocks) | {
if (n < 31 && ((bs_info << n) & 0x40000000)) {
n *= 2;
div += 1;
parse_bs_info(bs_info, n + 1, div, div_blocks, num_blocks);
parse_bs_info(bs_info, n + 2, div, div_blocks, num_blocks);
} else {
**div_blocks = div;
(*div_blocks)++;
(*num_blocks)++;
}
} | DC-SWAT/DreamShell | C++ | null | 404 |
/* This is the fast, non-transforming version for backing filesystems which do not implement the address space operations write_begin and write_end. It uses the write file operation which should be present on all writeable filesystems. */ | static int do_lo_send_direct_write(struct loop_device *lo, struct bio_vec *bvec, loff_t pos, struct page *page) | /* This is the fast, non-transforming version for backing filesystems which do not implement the address space operations write_begin and write_end. It uses the write file operation which should be present on all writeable filesystems. */
static int do_lo_send_direct_write(struct loop_device *lo, struct bio_vec *bvec, loff_t pos, struct page *page) | {
ssize_t bw = __do_lo_send_write(lo->lo_backing_file,
kmap(bvec->bv_page) + bvec->bv_offset,
bvec->bv_len, pos);
kunmap(bvec->bv_page);
cond_resched();
return bw;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* UNhashes ip_vs_dest from ip_vs_rtable. should be called with locked tables. */ | static int ip_vs_rs_unhash(struct ip_vs_dest *dest) | /* UNhashes ip_vs_dest from ip_vs_rtable. should be called with locked tables. */
static int ip_vs_rs_unhash(struct ip_vs_dest *dest) | {
if (!list_empty(&dest->d_list)) {
list_del(&dest->d_list);
INIT_LIST_HEAD(&dest->d_list);
}
return 1;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Set or reset Slave chip csn signal output. */ | void exSPI_CSInternalSelected(SPI_TypeDef *spi, FunctionalState state) | /* Set or reset Slave chip csn signal output. */
void exSPI_CSInternalSelected(SPI_TypeDef *spi, FunctionalState state) | {
(state) ? CLEAR_BIT(spi->NSSR, SPI_NSSR_NSS) : SET_BIT(spi->NSSR, SPI_NSSR_NSS);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function only supports blocking execution of the command. */ | EFI_STATUS EFIAPI NvmePassThru(IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This, IN UINT32 NamespaceId, IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet) | /* Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function only supports blocking execution of the command. */
EFI_STATUS EFIAPI NvmePassThru(IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This, IN UINT32 NamespaceId, IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet) | {
PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
EFI_STATUS Status;
if ((This == NULL) || (Packet == NULL)) {
return EFI_INVALID_PARAMETER;
}
Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_NVME_PASSTHRU (This);
if ((NamespaceId > Private->ControllerData->Nn) &&
(NamespaceId != (UINT32)-1))
{
return EFI_INVALID_PARAMETER;
}
Status = NvmePassThruExecute (
Private,
NamespaceId,
Packet
);
return Status;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Wrap TCPP0203 read function to Bus IO function. */ | static int32_t TCPP0203_ReadRegWrap(void *handle, uint8_t Reg, uint8_t *pData, uint8_t Length) | /* Wrap TCPP0203 read function to Bus IO function. */
static int32_t TCPP0203_ReadRegWrap(void *handle, uint8_t Reg, uint8_t *pData, uint8_t Length) | {
TCPP0203_Object_t *pObj = (TCPP0203_Object_t *)handle;
return pObj->IO.ReadReg(pObj->IO.Address, Reg, pData, Length);
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Enables or disables the selected ADC automatic injected group conversion after regular one. */ | void ADC_EnableAutoInjectedConv(ADC_Module *ADCx, FunctionalState Cmd) | /* Enables or disables the selected ADC automatic injected group conversion after regular one. */
void ADC_EnableAutoInjectedConv(ADC_Module *ADCx, FunctionalState Cmd) | {
assert_param(IsAdcModule(ADCx));
assert_param(IS_FUNCTIONAL_STATE(Cmd));
if (Cmd != DISABLE)
{
ADCx->CTRL1 |= CR1_JAUTO_Set;
}
else
{
ADCx->CTRL1 &= CR1_JAUTO_Reset;
}
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Write 4 bytes to Trace Hub MMIO addr + 0x0. */ | VOID EFIAPI MipiSystWriteD32(IN VOID *MipiSystHandle, IN UINT32 Data) | /* Write 4 bytes to Trace Hub MMIO addr + 0x0. */
VOID EFIAPI MipiSystWriteD32(IN VOID *MipiSystHandle, IN UINT32 Data) | {
MIPI_SYST_HANDLE *MipiSystH;
MipiSystH = (MIPI_SYST_HANDLE *)MipiSystHandle;
MmioWrite32 ((UINTN)(MipiSystH->systh_platform.TraceHubPlatformData.MmioAddr + 0x0), Data);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Fetch an array of SHORT or SSHORT values. */ | static int TIFFFetchShortArray(TIFF *, TIFFDirEntry *, uint16 *) | /* Fetch an array of SHORT or SSHORT values. */
static int TIFFFetchShortArray(TIFF *, TIFFDirEntry *, uint16 *) | {
if (dir->tdir_count <= 2) {
if (tif->tif_header.tiff_magic == TIFF_BIGENDIAN) {
switch (dir->tdir_count) {
case 2: v[1] = dir->tdir_offset & 0xffff;
case 1: v[0] = dir->tdir_offset >> 16;
}
} else {
switch (dir->tdir_count) {
case 2: v[1] = dir->tdir_offset >> 16;
case 1: v[0] = dir->tdir_offset & 0xffff;
}
}
return (1);
} else
return (TIFFFetchData(tif, dir, (char *)v) != 0);
} | alibaba/AliOS-Things | C++ | Apache License 2.0 | 4,536 |
/* This function retrieves the user readable name of a driver in the form of a Unicode string. If the driver specified by This has a user readable name in the language specified by Language, then a pointer to the driver name is returned in DriverName, and EFI_SUCCESS is returned. If the driver specified by This does not support the language specified by Language, then EFI_UNSUPPORTED is returned. */ | EFI_STATUS EFIAPI SerialComponentNameGetDriverName(IN EFI_COMPONENT_NAME_PROTOCOL *This, IN CHAR8 *Language, OUT CHAR16 **DriverName) | /* This function retrieves the user readable name of a driver in the form of a Unicode string. If the driver specified by This has a user readable name in the language specified by Language, then a pointer to the driver name is returned in DriverName, and EFI_SUCCESS is returned. If the driver specified by This does not support the language specified by Language, then EFI_UNSUPPORTED is returned. */
EFI_STATUS EFIAPI SerialComponentNameGetDriverName(IN EFI_COMPONENT_NAME_PROTOCOL *This, IN CHAR8 *Language, OUT CHAR16 **DriverName) | {
return LookupUnicodeString2 (
Language,
This->SupportedLanguages,
mSerialDriverNameTable,
DriverName,
(BOOLEAN)(This == &gPciSioSerialComponentName)
);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* This is specific to the HPT366 UDMA chipset by HighPoint|Triones Technologies, Inc. */ | static void hpt366_dma_lost_irq(ide_drive_t *drive) | /* This is specific to the HPT366 UDMA chipset by HighPoint|Triones Technologies, Inc. */
static void hpt366_dma_lost_irq(ide_drive_t *drive) | {
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
u8 mcr1 = 0, mcr3 = 0, scr1 = 0;
pci_read_config_byte(dev, 0x50, &mcr1);
pci_read_config_byte(dev, 0x52, &mcr3);
pci_read_config_byte(dev, 0x5a, &scr1);
printk("%s: (%s) mcr1=0x%02x, mcr3=0x%02x, scr1=0x%02x\n",
drive->name, __func__, mcr1, mcr3, scr1);
if (scr1 & 0x10)
pci_write_config_byte(dev, 0x5a, scr1 & ~0x10);
ide_dma_lost_irq(drive);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Read a buffer of data to a selected endpoint. */ | void USB_ReadDataFromEP(USB_EP_T ep, uint8_t *rBuf, uint32_t rLen) | /* Read a buffer of data to a selected endpoint. */
void USB_ReadDataFromEP(USB_EP_T ep, uint8_t *rBuf, uint32_t rLen) | {
uint32_t i;
uint16_t *addrEP;
uint16_t tmp;
rLen = (rLen + 1) >> 1;
addrEP = (uint16_t *)(USB_ReadEPRxAddr(ep) + USB_PMA_ADDR);
for(i = 0; i < rLen; i++)
{
tmp = *addrEP++;
*rBuf++ = tmp & 0XFF;
*rBuf++ = (tmp >> 8) & 0xff;
}
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Converts a text device path node to CDROM device path structure. */ | EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextCDROM(CHAR16 *TextDeviceNode) | /* Converts a text device path node to CDROM device path structure. */
EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextCDROM(CHAR16 *TextDeviceNode) | {
CHAR16 *EntryStr;
CHAR16 *StartStr;
CHAR16 *SizeStr;
CDROM_DEVICE_PATH *CDROMDevPath;
EntryStr = GetNextParamStr (&TextDeviceNode);
StartStr = GetNextParamStr (&TextDeviceNode);
SizeStr = GetNextParamStr (&TextDeviceNode);
CDROMDevPath = (CDROM_DEVICE_PATH *) CreateDeviceNode (
MEDIA_DEVICE_PATH,
MEDIA_CDROM_DP,
(UINT16) sizeof (CDROM_DEVICE_PATH)
);
CDROMDevPath->BootEntry = (UINT32) Strtoi (EntryStr);
Strtoi64 (StartStr, &CDROMDevPath->PartitionStart);
Strtoi64 (SizeStr, &CDROMDevPath->PartitionSize);
return (EFI_DEVICE_PATH_PROTOCOL *) CDROMDevPath;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Compute a SID to use for labeling a new subject or object in the class @tclass based on a SID pair (@ssid, @tsid). Return -EINVAL if any of the parameters are invalid, -ENOMEM if insufficient memory is available, or %0 if the new SID was computed successfully. */ | int security_transition_sid(u32 ssid, u32 tsid, u16 tclass, u32 *out_sid) | /* Compute a SID to use for labeling a new subject or object in the class @tclass based on a SID pair (@ssid, @tsid). Return -EINVAL if any of the parameters are invalid, -ENOMEM if insufficient memory is available, or %0 if the new SID was computed successfully. */
int security_transition_sid(u32 ssid, u32 tsid, u16 tclass, u32 *out_sid) | {
return security_compute_sid(ssid, tsid, tclass, AVTAB_TRANSITION,
out_sid, true);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Detach and unregister the encoder. The go7007 struct won't be freed until v4l2 finishes releasing its resources and all associated fds are closed by applications. */ | void go7007_remove(struct go7007 *go) | /* Detach and unregister the encoder. The go7007 struct won't be freed until v4l2 finishes releasing its resources and all associated fds are closed by applications. */
void go7007_remove(struct go7007 *go) | {
if (go->i2c_adapter_online) {
if (i2c_del_adapter(&go->i2c_adapter) == 0)
go->i2c_adapter_online = 0;
else
v4l2_err(&go->v4l2_dev,
"error removing I2C adapter!\n");
}
if (go->audio_enabled)
go7007_snd_remove(go);
go7007_v4l2_remove(go);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Configures the alternate function of a GPIO pin. */ | void GPIOPinConfigure(unsigned long ulPinConfig) | /* Configures the alternate function of a GPIO pin. */
void GPIOPinConfigure(unsigned long ulPinConfig) | {
unsigned long ulBase, ulShift;
xASSERT(((ulPinConfig >> 12) & 0xf) <= 5 );
ulBase = g_pulIPRSTRegs[(ulPinConfig >> 12) & 0xf];
ulShift = (ulPinConfig >> 8) & 0xf;
if(ulPinConfig & 0x1)
{
xHWREG(ulBase) |= (0x1 << ulShift);
}
else
{
xHWREG(ulBase) &= ~(0x1 << ulShift);
}
if(ulPinConfig & 0x10)
{
xHWREG(ulBase) |= (0x1 << (ulShift + 8));
}
else
{
xHWREG(ulBase) &= ~(0x1 << (ulShift + 8));
}
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* This function check if the system has resumed from IWDG reset. */ | void Check_IWDG_Reset(void) | /* This function check if the system has resumed from IWDG reset. */
void Check_IWDG_Reset(void) | {
if (LL_RCC_IsActiveFlag_IWDGRST())
{
LL_RCC_ClearResetFlags();
LED_On();
while(ubKeyPressed != 1)
{
}
ubKeyPressed = 0;
}
} | STMicroelectronics/STM32CubeF4 | C++ | Other | 789 |
/* Map the capabilities and adapter info DMA buffers to avoid runtime failures. Return 1 on error, 0 on success. */ | static int map_persist_bufs(struct ibmvscsi_host_data *hostdata) | /* Map the capabilities and adapter info DMA buffers to avoid runtime failures. Return 1 on error, 0 on success. */
static int map_persist_bufs(struct ibmvscsi_host_data *hostdata) | {
hostdata->caps_addr = dma_map_single(hostdata->dev, &hostdata->caps,
sizeof(hostdata->caps), DMA_BIDIRECTIONAL);
if (dma_mapping_error(hostdata->dev, hostdata->caps_addr)) {
dev_err(hostdata->dev, "Unable to map capabilities buffer!\n");
return 1;
}
hostdata->adapter_info_addr = dma_map_single(hostdata->dev,
&hostdata->madapter_info,
sizeof(hostdata->madapter_info),
DMA_BIDIRECTIONAL);
if (dma_mapping_error(hostdata->dev, hostdata->adapter_info_addr)) {
dev_err(hostdata->dev, "Unable to map adapter info buffer!\n");
dma_unmap_single(hostdata->dev, hostdata->caps_addr,
sizeof(hostdata->caps), DMA_BIDIRECTIONAL);
return 1;
}
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* param base CSI peripheral base address. param fifo The FIFO DMA reques to enable or disable. param enable True to enable, false to disable. */ | void CSI_EnableFifoDmaRequest(CSI_Type *base, csi_fifo_t fifo, bool enable) | /* param base CSI peripheral base address. param fifo The FIFO DMA reques to enable or disable. param enable True to enable, false to disable. */
void CSI_EnableFifoDmaRequest(CSI_Type *base, csi_fifo_t fifo, bool enable) | {
uint32_t cr3 = 0U;
if (0U != ((uint32_t)fifo & (uint32_t)kCSI_RxFifo))
{
cr3 |= CSI_CSICR3_DMA_REQ_EN_RFF_MASK;
}
if (0U != ((uint32_t)fifo & (uint32_t)kCSI_StatFifo))
{
cr3 |= CSI_CSICR3_DMA_REQ_EN_SFF_MASK;
}
if (enable)
{
CSI_REG_CR3(base) |= cr3;
}
else
{
CSI_REG_CR3(base) &= ~cr3;
}
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Accelerometer Y-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range .. */ | int32_t lsm6dso_xl_usr_offset_y_get(stmdev_ctx_t *ctx, uint8_t *buff) | /* Accelerometer Y-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range .. */
int32_t lsm6dso_xl_usr_offset_y_get(stmdev_ctx_t *ctx, uint8_t *buff) | {
int32_t ret;
ret = lsm6dso_read_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
return ret;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Event handler for the USB_DeviceAttached event. This indicates that a device has been attached to the host, and starts the library USB task to begin the enumeration and USB management process. */ | void EVENT_USB_Host_DeviceAttached(void) | /* Event handler for the USB_DeviceAttached event. This indicates that a device has been attached to the host, and starts the library USB task to begin the enumeration and USB management process. */
void EVENT_USB_Host_DeviceAttached(void) | {
puts_P(PSTR(ESC_FG_GREEN "Device Attached.\r\n" ESC_FG_WHITE));
LEDs_SetAllLEDs(LEDMASK_USB_ENUMERATING);
} | prusa3d/Prusa-Firmware-Buddy | C++ | Other | 1,019 |
/* When double tap recognition is enabled, this register expresses the maximum time between two consecutive detected taps to determine a double tap event. The default value of these bits is 0000b which corresponds to 16*ODR_XL time. If the DUR bits are set to a different value, 1LSB corresponds to 32*ODR_XL time.. */ | int32_t lsm6dso_tap_dur_get(stmdev_ctx_t *ctx, uint8_t *val) | /* When double tap recognition is enabled, this register expresses the maximum time between two consecutive detected taps to determine a double tap event. The default value of these bits is 0000b which corresponds to 16*ODR_XL time. If the DUR bits are set to a different value, 1LSB corresponds to 32*ODR_XL time.. */
int32_t lsm6dso_tap_dur_get(stmdev_ctx_t *ctx, uint8_t *val) | {
lsm6dso_int_dur2_t reg;
int32_t ret;
ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)®, 1);
*val = reg.dur;
return ret;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Get the length of the free space of the specific socket buffer. */ | UINT32 SockGetFreeSpace(IN SOCKET *Sock, IN UINT32 Which) | /* Get the length of the free space of the specific socket buffer. */
UINT32 SockGetFreeSpace(IN SOCKET *Sock, IN UINT32 Which) | {
UINT32 BufferCC;
SOCK_BUFFER *SockBuffer;
ASSERT (Sock != NULL && ((SOCK_SND_BUF == Which) || (SOCK_RCV_BUF == Which)));
if (SOCK_SND_BUF == Which) {
SockBuffer = &(Sock->SndBuffer);
} else {
SockBuffer = &(Sock->RcvBuffer);
}
BufferCC = (SockBuffer->DataQueue)->BufSize;
if (BufferCC >= SockBuffer->HighWater) {
return 0;
}
return SockBuffer->HighWater - BufferCC;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Moves the PHY to the HALTED state in response to a read or write error, and tells the controller the link is down. Must not be called from interrupt context, or while the phydev->lock is held. */ | static void phy_error(struct phy_device *phydev) | /* Moves the PHY to the HALTED state in response to a read or write error, and tells the controller the link is down. Must not be called from interrupt context, or while the phydev->lock is held. */
static void phy_error(struct phy_device *phydev) | {
mutex_lock(&phydev->lock);
phydev->state = PHY_HALTED;
mutex_unlock(&phydev->lock);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* xtime calculation The value is multiplied by 0x02. This is implemented at the byte level as a left shift and XOR with 0x1b if the MSB of the value (before) shifting is 1. */ | uint8_t xtime(uint8_t value) | /* xtime calculation The value is multiplied by 0x02. This is implemented at the byte level as a left shift and XOR with 0x1b if the MSB of the value (before) shifting is 1. */
uint8_t xtime(uint8_t value) | {
if ( value >> 7 ){
value = value << 1;
return ( value ^ 0x1b );
}else{
return value << 1;
}
} | memfault/zero-to-main | C++ | null | 200 |
/* IMPORTANT: This function aborts on error, thus it must not be used with untrusted arguments. */ | QObject* qobject_from_jsonf(const char *string,...) | /* IMPORTANT: This function aborts on error, thus it must not be used with untrusted arguments. */
QObject* qobject_from_jsonf(const char *string,...) | {
QObject *obj;
va_list ap;
va_start(ap, string);
obj = qobject_from_jsonv(string, &ap);
va_end(ap);
assert(obj != NULL);
return obj;
} | ve3wwg/teensy3_qemu | C++ | Other | 15 |
/* ks8695_get_link - Retrieve link status of network interface @ndev: The network interface to retrive the link status of. */ | static u32 ks8695_get_link(struct net_device *ndev) | /* ks8695_get_link - Retrieve link status of network interface @ndev: The network interface to retrive the link status of. */
static u32 ks8695_get_link(struct net_device *ndev) | {
struct ks8695_priv *ksp = netdev_priv(ndev);
u32 ctrl;
switch (ksp->dtype) {
case KS8695_DTYPE_HPNA:
return 1;
case KS8695_DTYPE_WAN:
ctrl = readl(ksp->phyiface_regs + KS8695_WMC);
return ctrl & WMC_WLS;
case KS8695_DTYPE_LAN:
return -EOPNOTSUPP;
}
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Returns: the first element in the #GList, or NULL if the #GList has no elements */ | GList* g_list_first(GList *list) | /* Returns: the first element in the #GList, or NULL if the #GList has no elements */
GList* g_list_first(GList *list) | {
if (list)
{
while (list->prev)
list = list->prev;
}
return list;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Writes more than one byte to the EEPROM with a single WRITE cycle (Page WRITE sequence). */ | uint32_t sEE_WritePage(uint8_t *pBuffer, uint16_t WriteAddr, uint16_t *NumByteToWrite) | /* Writes more than one byte to the EEPROM with a single WRITE cycle (Page WRITE sequence). */
uint32_t sEE_WritePage(uint8_t *pBuffer, uint16_t WriteAddr, uint16_t *NumByteToWrite) | {
sEE_WriteEnable();
sEE_CS_LOW();
sEE_SendByte(sEE_CMD_WRITE | (uint8_t)((WriteAddr & 0x0100)>>5));
sEE_SendByte(WriteAddr & 0xFF);
while ((*NumByteToWrite)--)
{
sEE_SendByte(*pBuffer);
pBuffer++;
}
sEE_CS_HIGH();
sEE_WaitEepromStandbyState();
sEE_WriteDisable();
return 0;
} | avem-labs/Avem | C++ | MIT License | 1,752 |
/* param base PWM peripheral base address param subModule PWM submodule to configure param prescaler Set prescaler value */ | void PWM_SetClockMode(PWM_Type *base, pwm_submodule_t subModule, pwm_clock_prescale_t prescaler) | /* param base PWM peripheral base address param subModule PWM submodule to configure param prescaler Set prescaler value */
void PWM_SetClockMode(PWM_Type *base, pwm_submodule_t subModule, pwm_clock_prescale_t prescaler) | {
uint16_t reg = base->SM[subModule].CTRL;
if (0U != (base->MCTRL & PWM_MCTRL_LDOK(1UL << (uint8_t)subModule)))
{
base->MCTRL |= PWM_MCTRL_CLDOK(1UL << (uint8_t)subModule);
}
reg &= ~(uint16_t)PWM_CTRL_PRSC_MASK;
reg |= PWM_CTRL_PRSC(prescaler);
base->SM[subModule].CTRL = reg;
base->SM[subModule].CTRL |= PWM_CTRL_LDMOD_MASK;
base->MCTRL |= PWM_MCTRL_LDOK(1UL << (uint8_t)subModule);
base->SM[subModule].CTRL = reg;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Enable circular option for double buffered compare values.
Enable circular option for the double buffered channel compare values. On each UPDATE condition, the contents of CCBx and CCx are switched, meaning that the contents of CCBx are transferred to CCx and the contents of CCx are transferred to CCBx. */ | enum status_code tcc_enable_circular_buffer_compare(struct tcc_module *const module_inst, enum tcc_match_capture_channel channel_index) | /* Enable circular option for double buffered compare values.
Enable circular option for the double buffered channel compare values. On each UPDATE condition, the contents of CCBx and CCx are switched, meaning that the contents of CCBx are transferred to CCx and the contents of CCx are transferred to CCBx. */
enum status_code tcc_enable_circular_buffer_compare(struct tcc_module *const module_inst, enum tcc_match_capture_channel channel_index) | {
Assert(module_inst);
Assert(module_inst->hw);
Tcc *const tcc_module = module_inst->hw;
uint8_t module_index = _tcc_get_inst_index(tcc_module);
if (channel_index > 3) {
return STATUS_ERR_INVALID_ARG;
}
if (channel_index >= _tcc_cc_nums[module_index]) {
return STATUS_ERR_INVALID_ARG;
}
tcc_module->WAVE.reg |= (TCC_WAVE_CICCEN0 << channel_index);
return STATUS_OK;
} | memfault/zero-to-main | C++ | null | 200 |
/* Register the Service E and all its Characteristics... */ | void service_e_2_init(void) | /* Register the Service E and all its Characteristics... */
void service_e_2_init(void) | {
bt_gatt_service_register(&service_e_2_svc);
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* Return TRUE if we can write a file with the given GArray of encapsulation types and the given bitmask of comment types. */ | gboolean wtap_dump_can_write(const GArray *file_encaps, guint32 required_comment_types) | /* Return TRUE if we can write a file with the given GArray of encapsulation types and the given bitmask of comment types. */
gboolean wtap_dump_can_write(const GArray *file_encaps, guint32 required_comment_types) | {
int ft;
for (ft = 0; ft < WTAP_NUM_FILE_TYPES_SUBTYPES; ft++) {
if (wtap_dump_can_write_format(ft, file_encaps, required_comment_types)) {
return TRUE;
}
}
return FALSE;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* @twsi: The MVTWSI register structure to use. @tick: The duration of a clock cycle at the current I2C speed. */ | static int twsi_stop(struct mvtwsi_registers *twsi, uint tick) | /* @twsi: The MVTWSI register structure to use. @tick: The duration of a clock cycle at the current I2C speed. */
static int twsi_stop(struct mvtwsi_registers *twsi, uint tick) | {
int control, stop_status;
int status = 0;
int timeout = 1000;
control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
do {
stop_status = readl(&twsi->status);
if (stop_status == MVTWSI_STATUS_IDLE)
break;
ndelay(tick);
} while (timeout--);
control = readl(&twsi->control);
if (stop_status != MVTWSI_STATUS_IDLE)
status = mvtwsi_error(MVTWSI_ERROR_TIMEOUT,
control, status, MVTWSI_STATUS_IDLE);
return status;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* reset camera sensor through GPIO on SMD board */ | void sensor_reset(void) | /* reset camera sensor through GPIO on SMD board */
void sensor_reset(void) | {
int32_t reset_occupy = 1000, reset_delay = 1000;
sensor_standby(0);
BW_IOMUXC_SW_MUX_CTL_PAD_SD1_DATA1_MUX_MODE(BV_IOMUXC_SW_MUX_CTL_PAD_SD1_DATA1_MUX_MODE__ALT5);
gpio_set_direction(GPIO_PORT1, 17, GPIO_GDIR_OUTPUT);
gpio_set_level(GPIO_PORT1, 17, GPIO_LOW_LEVEL);
hal_delay_us(reset_occupy);
gpio_set_level(GPIO_PORT1, 17, GPIO_HIGH_LEVEL);
hal_delay_us(reset_delay);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Disables a basic capture on the designed capture unit. */ | void HRTIM_SimpleCaptureStop(HRTIM_TypeDef *HRTIMx, uint32_t TimerIdx, uint32_t CaptureChannel) | /* Disables a basic capture on the designed capture unit. */
void HRTIM_SimpleCaptureStop(HRTIM_TypeDef *HRTIMx, uint32_t TimerIdx, uint32_t CaptureChannel) | {
assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
switch (CaptureChannel)
{
case HRTIM_CAPTUREUNIT_1:
{
HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
}
break;
case HRTIM_CAPTUREUNIT_2:
{
HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
}
break;
default:
break;
}
if ((HRTIMx->HRTIM_TIMERx[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) &&
(HRTIMx->HRTIM_TIMERx[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE))
{
__HRTIM_DISABLE(HRTIMx, TimerIdxToTimerId[TimerIdx]);
}
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Set a single color register. Return != 0 for invalid regno. */ | static int g364fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int transp, struct fb_info *info) | /* Set a single color register. Return != 0 for invalid regno. */
static int g364fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int transp, struct fb_info *info) | {
volatile unsigned int *ptr = (volatile unsigned int *) CLR_PAL_REG;
if (regno > 255)
return 1;
red >>= 8;
green >>= 8;
blue >>= 8;
ptr[regno << 1] = (red << 16) | (green << 8) | blue;
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Returns: the value of @symbol in the given scope, or NULL if @symbol is not bound in the given scope. */ | gpointer g_scanner_scope_lookup_symbol(GScanner *scanner, guint scope_id, const gchar *symbol) | /* Returns: the value of @symbol in the given scope, or NULL if @symbol is not bound in the given scope. */
gpointer g_scanner_scope_lookup_symbol(GScanner *scanner, guint scope_id, const gchar *symbol) | {
GScannerKey *key;
g_return_val_if_fail (scanner != NULL, NULL);
if (!symbol)
return NULL;
key = g_scanner_lookup_internal (scanner, scope_id, symbol);
if (key)
return key->value;
else
return NULL;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* sunxi_lcd_dsi_clk_enable - enable dsi clk. @screen_id: The index of screen. */ | s32 sunxi_lcd_dsi_clk_enable(u32 screen_id) | /* sunxi_lcd_dsi_clk_enable - enable dsi clk. @screen_id: The index of screen. */
s32 sunxi_lcd_dsi_clk_enable(u32 screen_id) | {
if (g_lcd_drv.src_ops.sunxi_lcd_dsi_clk_enable)
return g_lcd_drv.src_ops.sunxi_lcd_dsi_clk_enable(screen_id, 1);
return -1;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Request the current MAC addresses of the device (the working mac addresses). (the function is Blocking until response received) */ | NMI_API sint8 m2m_wifi_get_mac_address(uint8 *pu8MacAddr0, uint8 *pu8MacAddr1) | /* Request the current MAC addresses of the device (the working mac addresses). (the function is Blocking until response received) */
NMI_API sint8 m2m_wifi_get_mac_address(uint8 *pu8MacAddr0, uint8 *pu8MacAddr1) | {
sint8 ret = M2M_SUCCESS;
uint8* pu8MacAddrBuf = guCtrlStruct.au8MacAddressDpl;
ret = hif_chip_wake();
if(ret == M2M_SUCCESS)
{
ret = nmi_get_mac_address(pu8MacAddrBuf);
if(ret == M2M_SUCCESS)
{
ret = hif_chip_sleep();
m2m_memcpy(pu8MacAddr0, pu8MacAddrBuf, 6);
m2m_memcpy(pu8MacAddr1, pu8MacAddrBuf+6, 6);
}
}
return ret;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* This is the callback from RPC telling us whether a reply was received or some error occurred (timeout or socket shutdown). */ | static void nfs_readpage_result_full(struct rpc_task *task, void *calldata) | /* This is the callback from RPC telling us whether a reply was received or some error occurred (timeout or socket shutdown). */
static void nfs_readpage_result_full(struct rpc_task *task, void *calldata) | {
struct nfs_read_data *data = calldata;
if (nfs_readpage_result(task, data) != 0)
return;
if (task->tk_status < 0)
return;
nfs_readpage_truncate_uninitialised_page(data);
nfs_readpage_set_pages_uptodate(data);
nfs_readpage_retry(task, data);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* flush - flush the FIFO to reach a clean state @pl022: SSP driver private data structure */ | static int flush(struct pl022 *pl022) | /* flush - flush the FIFO to reach a clean state @pl022: SSP driver private data structure */
static int flush(struct pl022 *pl022) | {
unsigned long limit = loops_per_jiffy << 1;
dev_dbg(&pl022->adev->dev, "flush\n");
do {
while (readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE)
readw(SSP_DR(pl022->virtbase));
} while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_BSY) && limit--);
return limit;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* param base LPUART peripheral base address. param handle LPUART handle pointer. param count Send bytes count. retval kStatus_NoTransferInProgress No send in progress. retval kStatus_InvalidArgument Parameter is invalid. retval kStatus_Success Get successfully through the parameter */ | status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count) | /* param base LPUART peripheral base address. param handle LPUART handle pointer. param count Send bytes count. retval kStatus_NoTransferInProgress No send in progress. retval kStatus_InvalidArgument Parameter is invalid. retval kStatus_Success Get successfully through the parameter */
status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count) | {
assert(NULL != handle);
assert(NULL != count);
if ((uint8_t)kLPUART_TxIdle == handle->txState)
{
return kStatus_NoTransferInProgress;
}
*count = handle->txDataSizeAll - handle->txDataSize;
return kStatus_Success;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Event-specific data can be emitted through the (optional) 'data' parameter. */ | void monitor_protocol_event(MonitorEvent event, QObject *data) | /* Event-specific data can be emitted through the (optional) 'data' parameter. */
void monitor_protocol_event(MonitorEvent event, QObject *data) | {
QDict *qmp;
const char *event_name;
assert(event < QEVENT_MAX);
event_name = monitor_event_names[event];
assert(event_name != NULL);
qmp = qdict_new();
timestamp_put(qmp);
qdict_put(qmp, "event", qstring_from_str(event_name));
if (data) {
qobject_incref(data);
qdict_put_obj(qmp, "data", data);
}
trace_monitor_protocol_event(event, event_name, qmp);
monitor_protocol_event_queue(event, QOBJECT(qmp));
QDECREF(qmp);
} | ve3wwg/teensy3_qemu | C | Other | 15 |
/* If DateTime1 is NULL, then return -2. If DateTime2 is NULL, then return -2. If DateTime1 == DateTime2, then return 0 If DateTime1 > DateTime2, then return 1 If DateTime1 < DateTime2, then return -1 */ | INT32 EFIAPI X509CompareDateTime(IN CONST VOID *DateTime1, IN CONST VOID *DateTime2) | /* If DateTime1 is NULL, then return -2. If DateTime2 is NULL, then return -2. If DateTime1 == DateTime2, then return 0 If DateTime1 > DateTime2, then return 1 If DateTime1 < DateTime2, then return -1 */
INT32 EFIAPI X509CompareDateTime(IN CONST VOID *DateTime1, IN CONST VOID *DateTime2) | {
CALL_CRYPTO_SERVICE (X509CompareDateTime, (DateTime1, DateTime2), FALSE);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* param base FlexIO I2S peripheral base address. param handle FlexIO I2S DMA handle pointer. param count Bytes received. retval kStatus_Success Succeed get the transfer count. retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress. */ | status_t FLEXIO_I2S_TransferGetReceiveCountEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, size_t *count) | /* param base FlexIO I2S peripheral base address. param handle FlexIO I2S DMA handle pointer. param count Bytes received. retval kStatus_Success Succeed get the transfer count. retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress. */
status_t FLEXIO_I2S_TransferGetReceiveCountEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, size_t *count) | {
assert(handle);
status_t status = kStatus_Success;
if (handle->state != kFLEXIO_I2S_Busy)
{
status = kStatus_NoTransferInProgress;
}
else
{
*count = handle->transferSize[handle->queueDriver] -
(uint32_t)handle->nbytes *
EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel);
}
return status;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Transmit one frame.
Notice that possible parity/stop bits in asynchronous mode are not considered part of specified frame bit length. */ | void LEUART_Tx(LEUART_TypeDef *leuart, uint8_t data) | /* Transmit one frame.
Notice that possible parity/stop bits in asynchronous mode are not considered part of specified frame bit length. */
void LEUART_Tx(LEUART_TypeDef *leuart, uint8_t data) | {
while (!(leuart->STATUS & LEUART_STATUS_TXBL))
;
LEUART_Sync(leuart, LEUART_SYNCBUSY_TXDATA);
leuart->TXDATA = (uint32_t)data;
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* Find out if an alias is on the given list. */ | BOOLEAN InternalIsAliasOnList(IN CONST CHAR16 *Alias, IN CONST LIST_ENTRY *List) | /* Find out if an alias is on the given list. */
BOOLEAN InternalIsAliasOnList(IN CONST CHAR16 *Alias, IN CONST LIST_ENTRY *List) | {
ALIAS_LIST *Node;
ASSERT (Alias != NULL);
for ( Node = (ALIAS_LIST *)GetFirstNode (List)
; !IsNull (List, &Node->Link)
; Node = (ALIAS_LIST *)GetNextNode (List, &Node->Link)
)
{
ASSERT (Node->CommandString != NULL);
ASSERT (Node->Alias != NULL);
if (StrCmp (Node->Alias, Alias) == 0) {
return (TRUE);
}
}
return (FALSE);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Initiates a write packet operation.
Writes a data packet to the specified slave address on the I */ | enum status_code i2c_master_write_packet_job(struct i2c_master_module *const module, struct i2c_master_packet *const packet) | /* Initiates a write packet operation.
Writes a data packet to the specified slave address on the I */
enum status_code i2c_master_write_packet_job(struct i2c_master_module *const module, struct i2c_master_packet *const packet) | {
Assert(module);
Assert(module->hw);
Assert(packet);
if (module->buffer_remaining > 0) {
return STATUS_BUSY;
}
module->send_stop = true;
module->send_nack = true;
return _i2c_master_write_packet(module, packet);
} | memfault/zero-to-main | C++ | null | 200 |
/* De-initialises an PWM interface, Turns off an PWM hardware interface */ | int32_t hal_pwm_finalize(pwm_dev_t *pwm) | /* De-initialises an PWM interface, Turns off an PWM hardware interface */
int32_t hal_pwm_finalize(pwm_dev_t *pwm) | {
_HAL_PWM_PRIV_T *_cfg = (_HAL_PWM_PRIV_T *)pwm->priv;
if (_cfg) {
if (_cfg->start == 1) {
hal_pwm_stop(pwm);
}
free(_cfg);
pwm->priv = NULL;
}
return 0;
} | alibaba/AliOS-Things | C++ | Apache License 2.0 | 4,536 |
/* Fast approximation to the trigonometric cosine function for Q31 data. */ | q31_t arm_cos_q31(q31_t x) | /* Fast approximation to the trigonometric cosine function for Q31 data. */
q31_t arm_cos_q31(q31_t x) | {
q31_t cosVal;
int32_t index;
q31_t a, b;
q31_t fract;
x += 0x20000000;
if(x < 0)
{
x = x + 0x80000000;
}
index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
a = sinTable_q31[index];
b = sinTable_q31[index+1];
cosVal = (q63_t)(0x80000000-fract)*a >> 32;
cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract*b)) >> 32);
return cosVal << 1;
} | MaJerle/stm32f429 | C++ | null | 2,036 |
/* We can add another packet to a transmit queue if the packet pointer pointed to by the TxAdd pointer has PKT_IN_USE clear in its address. */ | int can_add_transmit(struct PKT __iomem **PktP, struct Port *PortP) | /* We can add another packet to a transmit queue if the packet pointer pointed to by the TxAdd pointer has PKT_IN_USE clear in its address. */
int can_add_transmit(struct PKT __iomem **PktP, struct Port *PortP) | {
struct PKT __iomem *tp;
*PktP = tp = (struct PKT __iomem *) RIO_PTR(PortP->Caddr, readw(PortP->TxAdd));
return !((unsigned long) tp & PKT_IN_USE);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This routine checks to ensure that the attached device's VID and PID matches Google's for Android devices. */ | uint8_t ProcessDeviceDescriptor(void) | /* This routine checks to ensure that the attached device's VID and PID matches Google's for Android devices. */
uint8_t ProcessDeviceDescriptor(void) | {
USB_Descriptor_Device_t DeviceDescriptor;
if (USB_Host_GetDeviceDescriptor(&DeviceDescriptor) != HOST_SENDCONTROL_Successful)
return DevControlError;
if (DeviceDescriptor.Header.Type != DTYPE_Device)
return InvalidDeviceDataReturned;
if ((DeviceDescriptor.ProductID != ANDROID_ACCESSORY_PRODUCT_ID) &&
(DeviceDescriptor.ProductID != ANDROID_ACCESSORY_ADB_PRODUCT_ID))
{
return NonAccessoryModeAndroidDevice;
}
return AccessoryModeAndroidDevice;
} | prusa3d/Prusa-Firmware-Buddy | C++ | Other | 1,019 |
/* param handle DMA handle pointer. The DMA handle stores callback function and parameters. param base DMA peripheral base address. param channel DMA channel number. */ | void DMA_CreateHandle(dma_handle_t *handle, DMA_Type *base, uint32_t channel) | /* param handle DMA handle pointer. The DMA handle stores callback function and parameters. param base DMA peripheral base address. param channel DMA channel number. */
void DMA_CreateHandle(dma_handle_t *handle, DMA_Type *base, uint32_t channel) | {
assert((NULL != handle) && (channel < (uint32_t)FSL_FEATURE_DMA_NUMBER_OF_CHANNELSn(base)));
uint32_t dmaInstance;
uint32_t startChannel = 0;
dmaInstance = DMA_GetInstance(base);
startChannel = DMA_GetVirtualStartChannel(base);
(void)memset(handle, 0, sizeof(*handle));
handle->base = base;
handle->channel = (uint8_t)channel;
s_DMAHandle[startChannel + channel] = handle;
(void)EnableIRQ(s_dmaIRQNumber[dmaInstance]);
DMA_EnableChannelInterrupts(handle->base, channel);
} | ARMmbed/DAPLink | C++ | Apache License 2.0 | 2,140 |
/* Clears or safeguards the OCREF6 signal on an external event. */ | void TIM_ClearOC6Ref(TIM_TypeDef *TIMx, uint16_t TIM_OCClear) | /* Clears or safeguards the OCREF6 signal on an external event. */
void TIM_ClearOC6Ref(TIM_TypeDef *TIMx, uint16_t TIM_OCClear) | {
uint32_t tmpccmr3 = 0;
assert_param(IS_TIM_LIST4_PERIPH(TIMx));
assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
tmpccmr3 = TIMx->CCMR3;
tmpccmr3 &= (uint32_t)~TIM_CCMR3_OC6CE;
tmpccmr3 |= ((uint32_t)TIM_OCClear << 8);
TIMx->CCMR3 = tmpccmr3;
} | avem-labs/Avem | C++ | MIT License | 1,752 |
/* This function retrieves the WiFi interface's MAC address. */ | WIFI_Status_t WIFI_GetMAC_Address(uint8_t *mac) | /* This function retrieves the WiFi interface's MAC address. */
WIFI_Status_t WIFI_GetMAC_Address(uint8_t *mac) | {
WIFI_Status_t ret = WIFI_STATUS_ERROR;
if(ES_WIFI_GetMACAddress(&EsWifiObj, mac) == ES_WIFI_STATUS_OK)
{
ret = WIFI_STATUS_OK;
}
return ret;
} | STMicroelectronics/STM32CubeF4 | C++ | Other | 789 |
/* Start a commit of the current running transaction (if any). Returns true if a transaction is going to be committed (or is currently already committing), and fills its tid in at *ptid */ | int journal_start_commit(journal_t *journal, tid_t *ptid) | /* Start a commit of the current running transaction (if any). Returns true if a transaction is going to be committed (or is currently already committing), and fills its tid in at *ptid */
int journal_start_commit(journal_t *journal, tid_t *ptid) | {
int ret = 0;
spin_lock(&journal->j_state_lock);
if (journal->j_running_transaction) {
tid_t tid = journal->j_running_transaction->t_tid;
__log_start_commit(journal, tid);
if (ptid)
*ptid = tid;
ret = 1;
} else if (journal->j_committing_transaction) {
if (ptid)
*ptid = journal->j_committing_transaction->t_tid;
ret = 1;
}
spin_unlock(&journal->j_state_lock);
return ret;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Writes the data to flash through a flash block manager. Note that this function also checks that no data is programmed outside the flash memory region, so the bootloader can never be overwritten. */ | blt_bool FlashWrite(blt_addr addr, blt_int32u len, blt_int8u *data) | /* Writes the data to flash through a flash block manager. Note that this function also checks that no data is programmed outside the flash memory region, so the bootloader can never be overwritten. */
blt_bool FlashWrite(blt_addr addr, blt_int32u len, blt_int8u *data) | {
blt_bool result = BLT_TRUE;
blt_addr base_addr;
if ((len - 1) > (FLASH_END_ADDRESS - addr))
{
result = BLT_FALSE;
}
if (result == BLT_TRUE)
{
if ((FlashGetSectorIdx(addr) == FLASH_INVALID_SECTOR_IDX) || \
(FlashGetSectorIdx(addr+len-1) == FLASH_INVALID_SECTOR_IDX))
{
result = BLT_FALSE;
}
}
if (result == BLT_TRUE)
{
base_addr = (addr/FLASH_WRITE_BLOCK_SIZE)*FLASH_WRITE_BLOCK_SIZE;
if (base_addr == flashLayout[0].sector_start)
{
result = FlashAddToBlock(&bootBlockInfo, addr, data, len);
}
else
{
result = FlashAddToBlock(&blockInfo, addr, data, len);
}
}
return result;
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* Enables the wake-on-LAN feature of the MAC controller. */ | void EMACWoLEnter(uint32_t ui32Base) | /* Enables the wake-on-LAN feature of the MAC controller. */
void EMACWoLEnter(uint32_t ui32Base) | {
ASSERT(ui32Base == EMAC0_BASE);
while(HWREG(ui32Base + EMAC_O_DMARIS) == EMAC_DMARIS_TI)
{
}
HWREG(ui32Base + EMAC_O_CFG) &= ~EMAC_CFG_TE;
HWREG(ui32Base + EMAC_O_DMAOPMODE) &= ~EMAC_DMAOPMODE_ST;
while((HWREG(ui32Base + EMAC_O_STATUS) & EMAC_STATUS_RX_FIFO_LEVEL_MASK) ==
EMAC_STATUS_RX_FIFO_EMPTY)
{
}
HWREG(ui32Base + EMAC_O_DMAOPMODE) &= ~EMAC_DMAOPMODE_SR;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Clear keys and decryption status for the specified interface */ | void airpcap_if_clear_decryption_settings(airpcap_if_info_t *info_if) | /* Clear keys and decryption status for the specified interface */
void airpcap_if_clear_decryption_settings(airpcap_if_info_t *info_if) | {
if (info_if != NULL)
{
if (info_if->keysCollection != NULL)
{
g_free(info_if->keysCollection);
info_if->keysCollection = NULL;
}
info_if->keysCollectionSize = 0;
info_if->DecryptionOn = AIRPCAP_DECRYPTION_OFF;
info_if->saved = FALSE;
}
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* See the "PLL Configuration Register Description" in the SSD2828 datasheet. */ | static u32 construct_pll_config(u32 desired_pll_freq_kbps, u32 reference_freq_khz) | /* See the "PLL Configuration Register Description" in the SSD2828 datasheet. */
static u32 construct_pll_config(u32 desired_pll_freq_kbps, u32 reference_freq_khz) | {
u32 div_factor = 1, mul_factor, fr = 0;
u32 output_freq_kbps;
while (reference_freq_khz / (div_factor + 1) >= 5000)
div_factor++;
if (div_factor > 31)
div_factor = 31;
mul_factor = DIV_ROUND_UP(desired_pll_freq_kbps * div_factor,
reference_freq_khz);
output_freq_kbps = reference_freq_khz * mul_factor / div_factor;
if (output_freq_kbps >= 501000)
fr = 3;
else if (output_freq_kbps >= 251000)
fr = 2;
else if (output_freq_kbps >= 126000)
fr = 1;
return (fr << 14) | (div_factor << 8) | mul_factor;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Unlink class from active chain. Note that this same procedure is done directly in cbq_dequeue* during round-robin procedure. */ | static void cbq_deactivate_class(struct cbq_class *this) | /* Unlink class from active chain. Note that this same procedure is done directly in cbq_dequeue* during round-robin procedure. */
static void cbq_deactivate_class(struct cbq_class *this) | {
struct cbq_sched_data *q = qdisc_priv(this->qdisc);
int prio = this->cpriority;
struct cbq_class *cl;
struct cbq_class *cl_prev = q->active[prio];
do {
cl = cl_prev->next_alive;
if (cl == this) {
cl_prev->next_alive = cl->next_alive;
cl->next_alive = NULL;
if (cl == q->active[prio]) {
q->active[prio] = cl_prev;
if (cl == q->active[prio]) {
q->active[prio] = NULL;
q->activemask &= ~(1<<prio);
return;
}
}
return;
}
} while ((cl_prev = cl) != q->active[prio]);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Locking: caller holds exclusive termios_rwsem (or locking is not required) */ | static void reset_buffer_flags(struct n_tty_data *ldata) | /* Locking: caller holds exclusive termios_rwsem (or locking is not required) */
static void reset_buffer_flags(struct n_tty_data *ldata) | {
ldata->read_head = ldata->canon_head = ldata->read_tail = 0;
ldata->echo_head = ldata->echo_tail = ldata->echo_commit = 0;
ldata->commit_head = 0;
ldata->echo_mark = 0;
ldata->line_start = 0;
ldata->erasing = 0;
rt_memset(ldata->read_flags, 0, RT_TTY_BUF);
ldata->push = 0;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Configure DAC (DAC instance: DAC1, DAC instance channel: channel1 ) and GPIO used by DAC channel. */ | void Configure_DAC(void) | /* Configure DAC (DAC instance: DAC1, DAC instance channel: channel1 ) and GPIO used by DAC channel. */
void Configure_DAC(void) | {
LL_DAC_InitTypeDef DAC_InitStruct;
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_4, LL_GPIO_MODE_ANALOG);
NVIC_SetPriority(TIM6_DAC_IRQn, 0);
NVIC_EnableIRQ(TIM6_DAC_IRQn);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DAC1);
DAC_InitStruct.TriggerSource = LL_DAC_TRIG_EXT_TIM6_TRGO;
DAC_InitStruct.WaveAutoGeneration = LL_DAC_WAVE_AUTO_GENERATION_NONE;
DAC_InitStruct.OutputBuffer = LL_DAC_OUTPUT_BUFFER_ENABLE;
LL_DAC_Init(DAC1, LL_DAC_CHANNEL_1, &DAC_InitStruct);
LL_DAC_EnableDMAReq(DAC1, LL_DAC_CHANNEL_1);
LL_DAC_EnableIT_DMAUDR1(DAC1);
} | STMicroelectronics/STM32CubeF4 | C++ | Other | 789 |
/* fc_plogi_get_maxframe() - Get the maximum payload from the common service parameters in a FLOGI frame @flp: The FLOGI payload @maxval: The maximum frame size upper limit; this may be less than what is in the service parameters */ | static unsigned int fc_plogi_get_maxframe(struct fc_els_flogi *flp, unsigned int maxval) | /* fc_plogi_get_maxframe() - Get the maximum payload from the common service parameters in a FLOGI frame @flp: The FLOGI payload @maxval: The maximum frame size upper limit; this may be less than what is in the service parameters */
static unsigned int fc_plogi_get_maxframe(struct fc_els_flogi *flp, unsigned int maxval) | {
unsigned int mfs;
mfs = ntohs(flp->fl_csp.sp_bb_data) & FC_SP_BB_DATA_MASK;
if (mfs >= FC_SP_MIN_MAX_PAYLOAD && mfs < maxval)
maxval = mfs;
mfs = ntohs(flp->fl_cssp[3 - 1].cp_rdfs);
if (mfs >= FC_SP_MIN_MAX_PAYLOAD && mfs < maxval)
maxval = mfs;
return maxval;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Config DMA to make register-to-register transfer copying the timestamp value. */ | void config_dma(void) | /* Config DMA to make register-to-register transfer copying the timestamp value. */
void config_dma(void) | {
configure_dma_resource(&example_resource);
setup_transfer_descriptor(&example_descriptor);
dma_add_descriptor(&example_resource, &example_descriptor);
} | memfault/zero-to-main | C++ | null | 200 |
/* Cause the function described by call_data to be executed on the passed cpu. When the function has finished, increment the finished field of call_data. */ | void octeon_send_ipi_single(int cpu, unsigned int action) | /* Cause the function described by call_data to be executed on the passed cpu. When the function has finished, increment the finished field of call_data. */
void octeon_send_ipi_single(int cpu, unsigned int action) | {
int coreid = cpu_logical_map(cpu);
cvmx_write_csr(CVMX_CIU_MBOX_SETX(coreid), action);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Caller must make sure that @ind is valid and will stay that way. */ | static ext3_fsblk_t ext3_find_near(struct inode *inode, Indirect *ind) | /* Caller must make sure that @ind is valid and will stay that way. */
static ext3_fsblk_t ext3_find_near(struct inode *inode, Indirect *ind) | {
struct ext3_inode_info *ei = EXT3_I(inode);
__le32 *start = ind->bh ? (__le32*) ind->bh->b_data : ei->i_data;
__le32 *p;
ext3_fsblk_t bg_start;
ext3_grpblk_t colour;
for (p = ind->p - 1; p >= start; p--) {
if (*p)
return le32_to_cpu(*p);
}
if (ind->bh)
return ind->bh->b_blocknr;
bg_start = ext3_group_first_block_no(inode->i_sb, ei->i_block_group);
colour = (current->pid % 16) *
(EXT3_BLOCKS_PER_GROUP(inode->i_sb) / 16);
return bg_start + colour;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Note: drivers must ensure that all regulator_enable calls made on this regulator source are balanced by regulator_disable calls prior to calling this function. */ | void regulator_put(struct regulator *regulator) | /* Note: drivers must ensure that all regulator_enable calls made on this regulator source are balanced by regulator_disable calls prior to calling this function. */
void regulator_put(struct regulator *regulator) | {
struct regulator_dev *rdev;
if (regulator == NULL || IS_ERR(regulator))
return;
mutex_lock(®ulator_list_mutex);
rdev = regulator->rdev;
if (regulator->dev) {
sysfs_remove_link(&rdev->dev.kobj, regulator->supply_name);
kfree(regulator->supply_name);
device_remove_file(regulator->dev, ®ulator->dev_attr);
kfree(regulator->dev_attr.attr.name);
}
list_del(®ulator->list);
kfree(regulator);
rdev->open_count--;
rdev->exclusive = 0;
module_put(rdev->owner);
mutex_unlock(®ulator_list_mutex);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* dma_region_init - clear out all fields but do not allocate anything */ | void dma_region_init(struct dma_region *dma) | /* dma_region_init - clear out all fields but do not allocate anything */
void dma_region_init(struct dma_region *dma) | {
dma->kvirt = NULL;
dma->dev = NULL;
dma->n_pages = 0;
dma->n_dma_pages = 0;
dma->sglist = NULL;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* initialise the external interrupts used by a unit of this type */ | void __init unit_init_IRQ(void) | /* initialise the external interrupts used by a unit of this type */
void __init unit_init_IRQ(void) | {
unsigned int extnum;
for (extnum = 0; extnum < NR_XIRQS; extnum++) {
switch (GET_XIRQ_TRIGGER(extnum)) {
case XIRQ_TRIGGER_HILEVEL:
case XIRQ_TRIGGER_LOWLEVEL:
set_intr_postackable(XIRQ2IRQ(extnum));
break;
default:
break;
}
}
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Free any allocated pages, and free the array of page pointers. */ | static void free_device(struct nandsim *ns) | /* Free any allocated pages, and free the array of page pointers. */
static void free_device(struct nandsim *ns) | {
int i;
if (ns->cfile) {
kfree(ns->file_buf);
vfree(ns->pages_written);
filp_close(ns->cfile, NULL);
return;
}
if (ns->pages) {
for (i = 0; i < ns->geom.pgnum; i++) {
if (ns->pages[i].byte)
kmem_cache_free(ns->nand_pages_slab,
ns->pages[i].byte);
}
kmem_cache_destroy(ns->nand_pages_slab);
vfree(ns->pages);
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This routine is invoked to disable device interrupt and disassociate the driver's interrupt handler(s) from interrupt vector(s) to device with SLI-4 interface spec. Depending on the interrupt mode, the driver will release the interrupt vector(s) for the message signaled interrupt. */ | static void lpfc_sli4_disable_intr(struct lpfc_hba *phba) | /* This routine is invoked to disable device interrupt and disassociate the driver's interrupt handler(s) from interrupt vector(s) to device with SLI-4 interface spec. Depending on the interrupt mode, the driver will release the interrupt vector(s) for the message signaled interrupt. */
static void lpfc_sli4_disable_intr(struct lpfc_hba *phba) | {
if (phba->intr_type == MSIX)
lpfc_sli4_disable_msix(phba);
else if (phba->intr_type == MSI)
lpfc_sli4_disable_msi(phba);
else if (phba->intr_type == INTx)
free_irq(phba->pcidev->irq, phba);
phba->intr_type = NONE;
phba->sli.slistat.sli_intr = 0;
return;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This heart beat timer of IP4 service instance times out all of its IP4 children's received-but-not-delivered and transmitted-but-not-recycle packets, and provides time input for its IGMP protocol. */ | VOID EFIAPI Ip4TimerTicking(IN EFI_EVENT Event, IN VOID *Context) | /* This heart beat timer of IP4 service instance times out all of its IP4 children's received-but-not-delivered and transmitted-but-not-recycle packets, and provides time input for its IGMP protocol. */
VOID EFIAPI Ip4TimerTicking(IN EFI_EVENT Event, IN VOID *Context) | {
IP4_SERVICE *IpSb;
IpSb = (IP4_SERVICE *)Context;
NET_CHECK_SIGNATURE (IpSb, IP4_SERVICE_SIGNATURE);
Ip4PacketTimerTicking (IpSb);
Ip4IgmpTicking (IpSb);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* This is the entry for flash write. Check, if we work on NAND FLASH, if so build an kvec and write it via vritev */ | int jffs2_flash_write(struct jffs2_sb_info *c, loff_t ofs, size_t len, size_t *retlen, const u_char *buf) | /* This is the entry for flash write. Check, if we work on NAND FLASH, if so build an kvec and write it via vritev */
int jffs2_flash_write(struct jffs2_sb_info *c, loff_t ofs, size_t len, size_t *retlen, const u_char *buf) | {
struct kvec vecs[1];
if (!jffs2_is_writebuffered(c))
return jffs2_flash_direct_write(c, ofs, len, retlen, buf);
vecs[0].iov_base = (unsigned char *) buf;
vecs[0].iov_len = len;
return jffs2_flash_writev(c, vecs, 1, ofs, retlen, 0);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Returns the opaque pointer to a physical disk context. */ | OPAL_DISK* HiiGetOpalDiskCB(UINT8 DiskIndex) | /* Returns the opaque pointer to a physical disk context. */
OPAL_DISK* HiiGetOpalDiskCB(UINT8 DiskIndex) | {
VOID *Ctx;
OPAL_DRIVER_DEVICE *Tmp;
Ctx = HiiGetDiskContextCB (DiskIndex);
if (Ctx == NULL) {
return NULL;
}
Tmp = (OPAL_DRIVER_DEVICE *)Ctx;
return &Tmp->OpalDisk;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* param tcd Point to the TCD structure. param mask The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type. */ | void EDMA_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask) | /* param tcd Point to the TCD structure. param mask The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type. */
void EDMA_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask) | {
assert(tcd != NULL);
if (mask & kEDMA_MajorInterruptEnable)
{
tcd->CSR |= DMA_CSR_INTMAJOR_MASK;
}
if (mask & kEDMA_HalfInterruptEnable)
{
tcd->CSR |= DMA_CSR_INTHALF_MASK;
}
} | nanoframework/nf-interpreter | C++ | MIT License | 293 |
/* The function is used for initializing of the nboot context data structure. It should be called prior to any other calls of nboot API. */ | nboot_status_t NBOOT_ContextInit(nboot_context_t *context) | /* The function is used for initializing of the nboot context data structure. It should be called prior to any other calls of nboot API. */
nboot_status_t NBOOT_ContextInit(nboot_context_t *context) | {
assert(BOOTLOADER_API_TREE_POINTER);
return BOOTLOADER_API_TREE_POINTER->nbootDriver->nboot_context_init(context);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ` */ | int strncmp(const char *s1, const char *s2, size_t n) | /* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ` */
int strncmp(const char *s1, const char *s2, size_t n) | {
if (n == 0)
return (0);
do {
if (*s1 != *s2++)
return (*(const unsigned char *)s1 -
*(const unsigned char *)(s2 - 1));
if (*s1++ == 0)
break;
} while (--n != 0);
return (0);
} | DC-SWAT/DreamShell | C++ | null | 404 |
/* Compare all the sysfs values of two mappings */ | static int mapping_cmpsysfs(struct if_mapping *ifnode, struct if_mapping *target) | /* Compare all the sysfs values of two mappings */
static int mapping_cmpsysfs(struct if_mapping *ifnode, struct if_mapping *target) | {
int findex;
int match = 1;
for(findex = 0; findex < sysfs_global.filenum; findex++)
{
if(ifnode->sysfs[findex] != NULL)
if((target->sysfs[findex] == NULL) ||
(fnmatch(ifnode->sysfs[findex], target->sysfs[findex],
FNM_CASEFOLD)))
match = 0;
}
return(!match);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Computes and returns the elapsed ticks since PreviousTick. The value of PreviousTick is overwritten with the current performance counter value. */ | UINT64 XhcGetElapsedTicks(IN OUT UINT64 *PreviousTick) | /* Computes and returns the elapsed ticks since PreviousTick. The value of PreviousTick is overwritten with the current performance counter value. */
UINT64 XhcGetElapsedTicks(IN OUT UINT64 *PreviousTick) | {
UINT64 CurrentTick;
UINT64 Delta;
CurrentTick = GetPerformanceCounter ();
if (mXhciPerformanceCounterStartValue < mXhciPerformanceCounterEndValue) {
if (*PreviousTick > CurrentTick) {
Delta = (mXhciPerformanceCounterEndValue - *PreviousTick) + CurrentTick;
} else {
Delta = CurrentTick - *PreviousTick;
}
} else {
if (*PreviousTick < CurrentTick) {
Delta = (mXhciPerformanceCounterStartValue - CurrentTick) + *PreviousTick;
} else {
Delta = *PreviousTick - CurrentTick;
}
}
*PreviousTick = CurrentTick;
return Delta;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Retrieve the pci bus information given the bus number. */ | static u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address) | /* Retrieve the pci bus information given the bus number. */
static u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address) | {
struct ia64_sal_retval ret_stuff;
ret_stuff.status = 0;
ret_stuff.v0 = 0;
SAL_CALL_NOLOCK(ret_stuff,
(u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
(u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
return ret_stuff.v0;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* s w a p F r e e */ | returnValue Bounds_swapFree(Bounds *_THIS, int number1, int number2) | /* s w a p F r e e */
returnValue Bounds_swapFree(Bounds *_THIS, int number1, int number2) | {
if ( ( number1 < 0 ) || ( number1 >= _THIS->n ) || ( number2 < 0 ) || ( number2 >= _THIS->n ) )
return THROWERROR( RET_INDEX_OUT_OF_BOUNDS );
return Bounds_swapIndex( _THIS,Bounds_getFree( _THIS ),number1,number2 );
} | DanielMartensson/EmbeddedLapack | C++ | MIT License | 129 |
/* Timeout function for dasd devices. This is used for different purposes 1) missing interrupt handler for normal operation 2) delayed start of request where start_IO failed with -EBUSY 3) timeout for missing state change interrupts The head of the ccw queue will have status DASD_CQR_IN_IO for 1), DASD_CQR_QUEUED for 2) and 3). */ | static void dasd_device_timeout(unsigned long) | /* Timeout function for dasd devices. This is used for different purposes 1) missing interrupt handler for normal operation 2) delayed start of request where start_IO failed with -EBUSY 3) timeout for missing state change interrupts The head of the ccw queue will have status DASD_CQR_IN_IO for 1), DASD_CQR_QUEUED for 2) and 3). */
static void dasd_device_timeout(unsigned long) | {
unsigned long flags;
struct dasd_device *device;
device = (struct dasd_device *) ptr;
spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
dasd_device_remove_stop_bits(device, DASD_STOPPED_PENDING);
spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
dasd_schedule_device_bh(device);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Build a netlink message to change classifier attributes */ | int rtnl_cls_build_change_request(struct rtnl_cls *cls, int flags, struct nl_msg **result) | /* Build a netlink message to change classifier attributes */
int rtnl_cls_build_change_request(struct rtnl_cls *cls, int flags, struct nl_msg **result) | {
return cls_build(cls, RTM_NEWTFILTER, NLM_F_REPLACE | flags, result);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* The function returns whether or not the device is Opal Locked. TRUE means that the device is partially or fully locked. This will perform a Level 0 Discovery and parse the locking feature descriptor */ | BOOLEAN OpalDeviceLocked(OPAL_DISK_SUPPORT_ATTRIBUTE *SupportedAttributes, TCG_LOCKING_FEATURE_DESCRIPTOR *LockingFeature) | /* The function returns whether or not the device is Opal Locked. TRUE means that the device is partially or fully locked. This will perform a Level 0 Discovery and parse the locking feature descriptor */
BOOLEAN OpalDeviceLocked(OPAL_DISK_SUPPORT_ATTRIBUTE *SupportedAttributes, TCG_LOCKING_FEATURE_DESCRIPTOR *LockingFeature) | {
NULL_CHECK (SupportedAttributes);
NULL_CHECK (LockingFeature);
if (!OpalFeatureEnabled (SupportedAttributes, LockingFeature)) {
return FALSE;
}
return LockingFeature->Locked;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* This function retrieves the WiFi interface's MAC address. */ | WIFI_Status_t WIFI_GetMAC_Address(uint8_t *mac) | /* This function retrieves the WiFi interface's MAC address. */
WIFI_Status_t WIFI_GetMAC_Address(uint8_t *mac) | {
WIFI_Status_t ret = WIFI_STATUS_ERROR;
if(EsWifiObj.Product_ID[0] == 0)
{
return ret;
}
if(ES_WIFI_GetMACAddress(&EsWifiObj, mac) == ES_WIFI_STATUS_OK)
{
ret = WIFI_STATUS_OK;
}
return ret;
} | nanoframework/nf-interpreter | C++ | MIT License | 293 |
/* We set the PCIE flag because the lower bandwidth on PCIe vs HyperTransport can affect some user packet algorithms. */ | static int ipath_ht_get_base_info(struct ipath_portdata *pd, void *kbase) | /* We set the PCIE flag because the lower bandwidth on PCIe vs HyperTransport can affect some user packet algorithms. */
static int ipath_ht_get_base_info(struct ipath_portdata *pd, void *kbase) | {
struct ipath_base_info *kinfo = kbase;
kinfo->spi_runtime_flags |= IPATH_RUNTIME_HT |
IPATH_RUNTIME_PIO_REGSWAPPED;
if (pd->port_dd->ipath_minrev < 4)
kinfo->spi_runtime_flags |= IPATH_RUNTIME_RCVHDR_COPY;
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Returns the number of remaining data units in the current DMAy Channelx transfer. */ | uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef *DMAy_Channelx) | /* Returns the number of remaining data units in the current DMAy Channelx transfer. */
uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef *DMAy_Channelx) | {
assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
return ((uint16_t)(DMAy_Channelx->CNDTR));
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Returns: (transfer full): the #GTypeClass for the type of @extension */ | GTypeClass* g_io_extension_ref_class(GIOExtension *extension) | /* Returns: (transfer full): the #GTypeClass for the type of @extension */
GTypeClass* g_io_extension_ref_class(GIOExtension *extension) | {
return g_type_class_ref (extension->type);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |