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/* Returns the number of sg lists actually used, zero if the sg lists is NULL, or -ENOMEM if the mapping failed. */ | int scsi_dma_map(struct scsi_cmnd *cmd) | /* Returns the number of sg lists actually used, zero if the sg lists is NULL, or -ENOMEM if the mapping failed. */
int scsi_dma_map(struct scsi_cmnd *cmd) | {
int nseg = 0;
if (scsi_sg_count(cmd)) {
struct device *dev = cmd->device->host->dma_dev;
nseg = dma_map_sg(dev, scsi_sglist(cmd), scsi_sg_count(cmd),
cmd->sc_data_direction);
if (unlikely(!nseg))
return -ENOMEM;
}
return nseg;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Receives a byte that has been sent to the I2C Master. */ | uint32_t I2CMasterDataGet(uint32_t ui32Base) | /* Receives a byte that has been sent to the I2C Master. */
uint32_t I2CMasterDataGet(uint32_t ui32Base) | {
ASSERT(_I2CBaseValid(ui32Base));
return (HWREG(ui32Base + I2C_O_MDR));
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* If this interface is not supported, then return FALSE. */ | BOOLEAN EFIAPI Sha256HashAll(IN CONST VOID *Data, IN UINTN DataSize, OUT UINT8 *HashValue) | /* If this interface is not supported, then return FALSE. */
BOOLEAN EFIAPI Sha256HashAll(IN CONST VOID *Data, IN UINTN DataSize, OUT UINT8 *HashValue) | {
INT32 Ret;
if (HashValue == NULL) {
return FALSE;
}
if ((Data == NULL) && (DataSize != 0)) {
return FALSE;
}
Ret = mbedtls_sha256_ret (Data, DataSize, HashValue, FALSE);
if (Ret != 0) {
return FALSE;
}
return TRUE;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Reads a single byte from the NVM using the flash access registers. */ | static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset, u8 *data) | /* Reads a single byte from the NVM using the flash access registers. */
static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset, u8 *data) | {
s32 ret_val;
u16 word = 0;
ret_val = e1000_read_flash_data_ich8lan(hw, offset, 1, &word);
if (ret_val)
return ret_val;
*data = (u8)word;
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Read BMA180 device ID and revision numbers.
This function reads the accelerometer hardware identification registers and returns these values in the specified data structure. */ | static bool bma180_device_id(sensor_hal_t *hal, sensor_data_t *data) | /* Read BMA180 device ID and revision numbers.
This function reads the accelerometer hardware identification registers and returns these values in the specified data structure. */
static bool bma180_device_id(sensor_hal_t *hal, sensor_data_t *data) | {
data->device.id = sensor_bus_get(hal, BMA180_CHIP_ID);
data->device.version = sensor_bus_get(hal, BMA180_CHIP_VERSION);
return true;
} | memfault/zero-to-main | C++ | null | 200 |
/* Save the save the mapping database to NV variable. */ | EFI_STATUS CommitChanges(IN EFI_CALLBACK_INFO *Private, IN UINT16 KeyValue, IN PLAT_OVER_MNGR_DATA *FakeNvData) | /* Save the save the mapping database to NV variable. */
EFI_STATUS CommitChanges(IN EFI_CALLBACK_INFO *Private, IN UINT16 KeyValue, IN PLAT_OVER_MNGR_DATA *FakeNvData) | {
EFI_STATUS Status;
UINTN Index;
UINTN SelectedDriverImageNum;
EFI_DEVICE_PATH_PROTOCOL *LoadedImageDevicePath;
DeleteDriverImage (mControllerDevicePathProtocol[mSelectedCtrIndex], NULL, &mMappingDataBase);
for (SelectedDriverImageNum = 0; SelectedDriverImageNum < mSelectedDriverImageNum; SelectedDriverImageNum++) {
Index = FakeNvData->DriOrder[SelectedDriverImageNum] - 1;
LoadedImageDevicePath = NULL;
Status = gBS->HandleProtocol (
mDriverImageHandleBuffer[Index],
&gEfiLoadedImageDevicePathProtocolGuid,
(VOID **)&LoadedImageDevicePath
);
ASSERT (LoadedImageDevicePath != NULL);
InsertDriverImage (
mControllerDevicePathProtocol[mSelectedCtrIndex],
LoadedImageDevicePath,
&mMappingDataBase,
(UINT32)SelectedDriverImageNum + 1
);
}
Status = SaveOverridesMapping (&mMappingDataBase);
return Status;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* find_domain Note: we use struct pci_dev->dev.archdata.iommu stores the info */ | static struct dmar_domain* find_domain(struct pci_dev *pdev) | /* find_domain Note: we use struct pci_dev->dev.archdata.iommu stores the info */
static struct dmar_domain* find_domain(struct pci_dev *pdev) | {
struct device_domain_info *info;
info = pdev->dev.archdata.iommu;
if (info)
return info->domain;
return NULL;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Fix up the linear direct mapping of the kernel to avoid cache attribute conflicts. */ | int ioremap_change_attr(unsigned long vaddr, unsigned long size, unsigned long prot_val) | /* Fix up the linear direct mapping of the kernel to avoid cache attribute conflicts. */
int ioremap_change_attr(unsigned long vaddr, unsigned long size, unsigned long prot_val) | {
unsigned long nrpages = size >> PAGE_SHIFT;
int err;
switch (prot_val) {
case _PAGE_CACHE_UC:
default:
err = _set_memory_uc(vaddr, nrpages);
break;
case _PAGE_CACHE_WC:
err = _set_memory_wc(vaddr, nrpages);
break;
case _PAGE_CACHE_WB:
err = _set_memory_wb(vaddr, nrpages);
break;
}
return err;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* param base FlexCAN peripheral base address. param mbIdx The Message Buffer index. param enable Enable/disable Tx Message Buffer. */ | void FLEXCAN_SetTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable) | /* param base FlexCAN peripheral base address. param mbIdx The Message Buffer index. param enable Enable/disable Tx Message Buffer. */
void FLEXCAN_SetTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable) | {
assert(mbIdx <= (base->MCR & CAN_MCR_MAXMB_MASK));
assert(!FLEXCAN_IsMbOccupied(base, mbIdx));
if (enable)
{
base->MB[mbIdx].CS = CAN_CS_CODE(kFLEXCAN_TxMbInactive);
}
else
{
base->MB[mbIdx].CS = 0;
}
base->MB[mbIdx].ID = 0x0;
base->MB[mbIdx].WORD0 = 0x0;
base->MB[mbIdx].WORD1 = 0x0;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* brief Gets the slave transfer status during a non-blocking transfer. param base The LPI2C peripheral base address. param handle Pointer to i2c_slave_handle_t structure. param count Pointer to a value to hold the number of bytes transferred. May be NULL if the count is not required. retval #kStatus_Success retval #kStatus_NoTransferInProgress */ | status_t LPI2C_SlaveTransferGetCount(LPI2C_Type *base, lpi2c_slave_handle_t *handle, size_t *count) | /* brief Gets the slave transfer status during a non-blocking transfer. param base The LPI2C peripheral base address. param handle Pointer to i2c_slave_handle_t structure. param count Pointer to a value to hold the number of bytes transferred. May be NULL if the count is not required. retval #kStatus_Success retval #kStatus_NoTransferInProgress */
status_t LPI2C_SlaveTransferGetCount(LPI2C_Type *base, lpi2c_slave_handle_t *handle, size_t *count) | {
status_t status = kStatus_Success;
assert(NULL != handle);
if (count == NULL)
{
status = kStatus_InvalidArgument;
}
else if (!handle->isBusy)
{
*count = 0;
status = kStatus_NoTransferInProgress;
}
else
{
*count = handle->transferredCount;
}
return status;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Callback from a channel when it can accept more to transmit. This should be called at BH/softirq level, not interrupt level. */ | void ppp_output_wakeup(struct ppp_channel *chan) | /* Callback from a channel when it can accept more to transmit. This should be called at BH/softirq level, not interrupt level. */
void ppp_output_wakeup(struct ppp_channel *chan) | {
struct channel *pch = chan->ppp;
if (!pch)
return;
ppp_channel_push(pch);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* We have to be cautious here. We have seen BIOSes with DMI pointers pointing to completely the wrong place for example */ | static void dmi_table(u8 *buf, int len, int num, void(*decode)(const struct dmi_header *, void *), void *private_data) | /* We have to be cautious here. We have seen BIOSes with DMI pointers pointing to completely the wrong place for example */
static void dmi_table(u8 *buf, int len, int num, void(*decode)(const struct dmi_header *, void *), void *private_data) | {
u8 *data = buf;
int i = 0;
while ((i < num) && (data - buf + sizeof(struct dmi_header)) <= len) {
const struct dmi_header *dm = (const struct dmi_header *)data;
data += dm->length;
while ((data - buf < len - 1) && (data[0] || data[1]))
data++;
if (data - buf < len - 1)
decode(dm, private_data);
data += 2;
i++;
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* For alternative state transitions and more details please refer to the design doc. */ | void vxge_hw_ring_rxd_free(struct __vxge_hw_ring *ring, void *rxdh) | /* For alternative state transitions and more details please refer to the design doc. */
void vxge_hw_ring_rxd_free(struct __vxge_hw_ring *ring, void *rxdh) | {
struct __vxge_hw_channel *channel;
channel = &ring->channel;
vxge_hw_channel_dtr_free(channel, rxdh);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* since we can't use printk, dump numbers (as hex), n = # bits */ | __init void early_shadow_reg(unsigned long reg, unsigned int n) | /* since we can't use printk, dump numbers (as hex), n = # bits */
__init void early_shadow_reg(unsigned long reg, unsigned int n) | {
int i;
char ascii[11] = " 0x";
n = n / 4;
reg = reg << ((8 - n) * 4);
n += 3;
for (i = 3; i <= n ; i++) {
ascii[i] = hex_asc_lo(reg >> 28);
reg <<= 4;
}
early_shadow_write(NULL, ascii, n);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Pack two data bytes into single value and take into account sign bit. */ | static int16_t dht_convert_data(dht_sensor_type_t sensor_type, uint8_t msb, uint8_t lsb) | /* Pack two data bytes into single value and take into account sign bit. */
static int16_t dht_convert_data(dht_sensor_type_t sensor_type, uint8_t msb, uint8_t lsb) | {
int16_t data;
if (sensor_type == DHT_TYPE_DHT22) {
data = msb & 0x7F;
data <<= 8;
data |= lsb;
if (msb & BIT(7)) {
data = 0 - data;
}
}
else {
data = msb * 10;
}
return data;
} | RavenSystem/esp-homekit-devices | C++ | Other | 2,577 |
/* This function is used to poll for the DRQ bit clear in the Status Register. DRQ is cleared when the device is finished transferring data. So this function is called after data transfer is finished. */ | EFI_STATUS EFIAPI DRQClear(IN EFI_PCI_IO_PROTOCOL *PciIo, IN EFI_IDE_REGISTERS *IdeRegisters, IN UINT64 Timeout) | /* This function is used to poll for the DRQ bit clear in the Status Register. DRQ is cleared when the device is finished transferring data. So this function is called after data transfer is finished. */
EFI_STATUS EFIAPI DRQClear(IN EFI_PCI_IO_PROTOCOL *PciIo, IN EFI_IDE_REGISTERS *IdeRegisters, IN UINT64 Timeout) | {
UINT64 Delay;
UINT8 StatusRegister;
BOOLEAN InfiniteWait;
ASSERT (PciIo != NULL);
ASSERT (IdeRegisters != NULL);
if (Timeout == 0) {
InfiniteWait = TRUE;
} else {
InfiniteWait = FALSE;
}
Delay = DivU64x32 (Timeout, 1000) + 1;
do {
StatusRegister = IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus);
if ((StatusRegister & ATA_STSREG_BSY) == 0) {
if ((StatusRegister & ATA_STSREG_DRQ) == ATA_STSREG_DRQ) {
return EFI_DEVICE_ERROR;
} else {
return EFI_SUCCESS;
}
}
MicroSecondDelay (100);
Delay--;
} while (InfiniteWait || (Delay > 0));
return EFI_TIMEOUT;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* param base LPSPI peripheral base address. param handle LPSPI handle pointer to lpspi_master_edma_handle_t. param callback LPSPI callback. param userData callback function parameter. param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t. param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t. */ | void LPSPI_MasterTransferCreateHandleEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_master_edma_transfer_callback_t callback, void *userData, edma_handle_t *edmaRxRegToRxDataHandle, edma_handle_t *edmaTxDataToTxRegHandle) | /* param base LPSPI peripheral base address. param handle LPSPI handle pointer to lpspi_master_edma_handle_t. param callback LPSPI callback. param userData callback function parameter. param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t. param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t. */
void LPSPI_MasterTransferCreateHandleEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_master_edma_transfer_callback_t callback, void *userData, edma_handle_t *edmaRxRegToRxDataHandle, edma_handle_t *edmaTxDataToTxRegHandle) | {
assert(handle);
assert(edmaRxRegToRxDataHandle);
assert(edmaTxDataToTxRegHandle);
memset(handle, 0, sizeof(*handle));
uint32_t instance = LPSPI_GetInstance(base);
s_lpspiMasterEdmaPrivateHandle[instance].base = base;
s_lpspiMasterEdmaPrivateHandle[instance].handle = handle;
handle->callback = callback;
handle->userData = userData;
handle->edmaRxRegToRxDataHandle = edmaRxRegToRxDataHandle;
handle->edmaTxDataToTxRegHandle = edmaTxDataToTxRegHandle;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Pushes a column information table on top of the stack. If the table isn't built yet, call the creator function and stores a reference to it on the cursor structure. */ | static void _pushtable(lua_State *L, cur_data *cur, size_t off, creator func) | /* Pushes a column information table on top of the stack. If the table isn't built yet, call the creator function and stores a reference to it on the cursor structure. */
static void _pushtable(lua_State *L, cur_data *cur, size_t off, creator func) | {
func (L, cur);
lua_pushvalue (L, -1);
*ref = luaL_ref (L, LUA_REGISTRYINDEX);
}
} | DC-SWAT/DreamShell | C++ | null | 404 |
/* Unlock the Flash Program and Erase Controller, upper Bank.
This enables write access to the upper bank of the Flash memory in XL devices. It is locked by default on reset. */ | void flash_unlock_upper(void) | /* Unlock the Flash Program and Erase Controller, upper Bank.
This enables write access to the upper bank of the Flash memory in XL devices. It is locked by default on reset. */
void flash_unlock_upper(void) | {
if (DESIG_FLASH_SIZE > 512) {
FLASH_CR2 |= FLASH_CR_LOCK;
FLASH_KEYR2 = FLASH_KEYR_KEY1;
FLASH_KEYR2 = FLASH_KEYR_KEY2;
}
} | insane-adding-machines/unicore-mx | C++ | GNU General Public License v3.0 | 50 |
/* Forces or releases Low Speed APB (APB1) peripheral reset. */ | void RCC_EnableAPB1PeriphReset(uint32_t RCC_APB1Periph, FunctionalState Cmd) | /* Forces or releases Low Speed APB (APB1) peripheral reset. */
void RCC_EnableAPB1PeriphReset(uint32_t RCC_APB1Periph, FunctionalState Cmd) | {
assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph));
assert_param(IS_FUNCTIONAL_STATE(Cmd));
if (Cmd != DISABLE)
{
RCC->APB1PRST |= RCC_APB1Periph;
}
else
{
RCC->APB1PRST &= ~RCC_APB1Periph;
}
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* get SPI CRC send value or receive value */ | uint16_t spi_crc_get(uint32_t spi_periph, uint8_t spi_crc) | /* get SPI CRC send value or receive value */
uint16_t spi_crc_get(uint32_t spi_periph, uint8_t spi_crc) | {
if(SPI_CRC_TX == spi_crc) {
return ((uint16_t)(SPI_TCRC(spi_periph)));
} else {
return ((uint16_t)(SPI_RCRC(spi_periph)));
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Returns a field of bits that indicates non zero ac blocks for this macro block */ | uint32_t calc_cbp_plain(const int16_t codes[6 *64]) | /* Returns a field of bits that indicates non zero ac blocks for this macro block */
uint32_t calc_cbp_plain(const int16_t codes[6 *64]) | {
int i, j;
uint32_t cbp = 0;
for (i = 0; i < 6; i++) {
for (j=1; j<64;j++) {
if (codes[64*i+j]) {
cbp |= 1 << (5-i);
break;
}
}
}
return cbp;
} | DC-SWAT/DreamShell | C++ | null | 404 |
/* Retrieve the max bus number that is assigned to the Root Bridge hierarchy. It can support the case that there are multiple bus ranges. */ | UINT16 PciGetMaxBusNumber(IN PCI_IO_DEVICE *Bridge) | /* Retrieve the max bus number that is assigned to the Root Bridge hierarchy. It can support the case that there are multiple bus ranges. */
UINT16 PciGetMaxBusNumber(IN PCI_IO_DEVICE *Bridge) | {
PCI_IO_DEVICE *RootBridge;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BusNumberRanges;
UINT64 MaxNumberInRange;
RootBridge = Bridge;
while (RootBridge->Parent != NULL) {
RootBridge = RootBridge->Parent;
}
MaxNumberInRange = 0;
BusNumberRanges = RootBridge->BusNumberRanges;
while (BusNumberRanges->Desc != ACPI_END_TAG_DESCRIPTOR) {
MaxNumberInRange = BusNumberRanges->AddrRangeMin + BusNumberRanges->AddrLen - 1;
BusNumberRanges++;
}
return (UINT16)MaxNumberInRange;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Common handling for a write to a "cpus" or "mems" file. */ | static int cpuset_write_resmask(struct cgroup *cgrp, struct cftype *cft, const char *buf) | /* Common handling for a write to a "cpus" or "mems" file. */
static int cpuset_write_resmask(struct cgroup *cgrp, struct cftype *cft, const char *buf) | {
int retval = 0;
struct cpuset *cs = cgroup_cs(cgrp);
struct cpuset *trialcs;
if (!cgroup_lock_live_group(cgrp))
return -ENODEV;
trialcs = alloc_trial_cpuset(cs);
if (!trialcs)
return -ENOMEM;
switch (cft->private) {
case FILE_CPULIST:
retval = update_cpumask(cs, trialcs, buf);
break;
case FILE_MEMLIST:
retval = update_nodemask(cs, trialcs, buf);
break;
default:
retval = -EINVAL;
break;
}
free_trial_cpuset(trialcs);
cgroup_unlock();
return retval;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* UART MSP De-Initialization This function freeze the hardware resources used in this example. */ | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) | /* UART MSP De-Initialization This function freeze the hardware resources used in this example. */
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) | {
if(huart->Instance==USART2)
{
__HAL_RCC_USART2_CLK_DISABLE();
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_15);
}
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* This function is called by the TCP/IP stack when an IP packet should be sent. It calls the function called low_level_output() to do the actual transmission of the packet. */ | static err_t xemacpsif_output(struct netif *netif, struct pbuf *p, const ip_addr_t *ipaddr) | /* This function is called by the TCP/IP stack when an IP packet should be sent. It calls the function called low_level_output() to do the actual transmission of the packet. */
static err_t xemacpsif_output(struct netif *netif, struct pbuf *p, const ip_addr_t *ipaddr) | {
return etharp_output(netif, p, ipaddr);
} | ua1arn/hftrx | C++ | null | 69 |
/* The @handler_id has to be a valid id of a signal handler that is connected to a signal of @instance and is currently blocked. */ | void g_signal_handler_unblock(gpointer instance, gulong handler_id) | /* The @handler_id has to be a valid id of a signal handler that is connected to a signal of @instance and is currently blocked. */
void g_signal_handler_unblock(gpointer instance, gulong handler_id) | {
Handler *handler;
g_return_if_fail (G_TYPE_CHECK_INSTANCE (instance));
g_return_if_fail (handler_id > 0);
SIGNAL_LOCK ();
handler = handler_lookup (instance, handler_id, NULL, NULL);
if (handler)
{
if (handler->block_count)
handler->block_count -= 1;
else
g_warning (G_STRLOC ": handler '%lu' of instance '%p' is not blocked", handler_id, instance);
}
else
g_warning ("%s: instance '%p' has no handler with id '%lu'", G_STRLOC, instance, handler_id);
SIGNAL_UNLOCK ();
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Get NumOfBits of bits out from mBitBuf. Fill mBitBuf with subsequent NumOfBits of bits from source. Returns NumOfBits of bits that are popped out. */ | UINT32 GetBits(IN SCRATCH_DATA *Sd, IN UINT16 NumOfBits) | /* Get NumOfBits of bits out from mBitBuf. Fill mBitBuf with subsequent NumOfBits of bits from source. Returns NumOfBits of bits that are popped out. */
UINT32 GetBits(IN SCRATCH_DATA *Sd, IN UINT16 NumOfBits) | {
UINT32 OutBits;
OutBits = (UINT32)(Sd->mBitBuf >> (BITBUFSIZ - NumOfBits));
FillBuf (Sd, NumOfBits);
return OutBits;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Perform basic hardware initialization at boot.
This needs to be run from the very beginning. So the init priority has to be 0 (zero). */ | static int stm32f0_init(void) | /* Perform basic hardware initialization at boot.
This needs to be run from the very beginning. So the init priority has to be 0 (zero). */
static int stm32f0_init(void) | {
SystemCoreClock = 8000000;
return 0;
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* Disables HFRC auto-adjustment.
This function disables HFRC auto-adjustment. */ | void am_hal_clkgen_hfrc_adjust_disable(void) | /* Disables HFRC auto-adjustment.
This function disables HFRC auto-adjustment. */
void am_hal_clkgen_hfrc_adjust_disable(void) | {
AM_REG(CLKGEN, HFADJ) =
AM_REG_CLKGEN_HFADJ_HFADJ_GAIN_Gain_of_1_in_2 |
AM_REG_CLKGEN_HFADJ_HFWARMUP_1SEC |
AM_REG_CLKGEN_HFADJ_HFXTADJ(AM_REG_CLKGEN_HFADJ_HFXTADJ_DEFAULT) |
AM_REG_CLKGEN_HFADJ_HFADJCK_4SEC |
AM_REG_CLKGEN_HFADJ_HFADJEN_DIS;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Note that 40Hz input device can eat up about 10% CPU at 800MHZ */ | static void lis3lv02d_get_xyz(struct lis3lv02d *lis3, int *x, int *y, int *z) | /* Note that 40Hz input device can eat up about 10% CPU at 800MHZ */
static void lis3lv02d_get_xyz(struct lis3lv02d *lis3, int *x, int *y, int *z) | {
int position[3];
int i;
mutex_lock(&lis3->mutex);
position[0] = lis3->read_data(lis3, OUTX);
position[1] = lis3->read_data(lis3, OUTY);
position[2] = lis3->read_data(lis3, OUTZ);
mutex_unlock(&lis3->mutex);
for (i = 0; i < 3; i++)
position[i] = (position[i] * lis3->scale) / LIS3_ACCURACY;
*x = lis3lv02d_get_axis(lis3->ac.x, position);
*y = lis3lv02d_get_axis(lis3->ac.y, position);
*z = lis3lv02d_get_axis(lis3->ac.z, position);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Clear the Erase Sequence Error Flag.
This flag is set when an erase operation is performed with control register has not been correctly set. */ | void flash_clear_erserr_flag(void) | /* Clear the Erase Sequence Error Flag.
This flag is set when an erase operation is performed with control register has not been correctly set. */
void flash_clear_erserr_flag(void) | {
FLASH_SR |= FLASH_SR_ERSERR;
} | libopencm3/libopencm3 | C++ | GNU General Public License v3.0 | 2,931 |
/* If HmacSha384Context is NULL, then return FALSE. If HmacValue is NULL, then return FALSE. If this interface is not supported, then return FALSE. */ | BOOLEAN EFIAPI HmacSha384Final(IN OUT VOID *HmacSha384Context, OUT UINT8 *HmacValue) | /* If HmacSha384Context is NULL, then return FALSE. If HmacValue is NULL, then return FALSE. If this interface is not supported, then return FALSE. */
BOOLEAN EFIAPI HmacSha384Final(IN OUT VOID *HmacSha384Context, OUT UINT8 *HmacValue) | {
CALL_CRYPTO_SERVICE (HmacSha384Final, (HmacSha384Context, HmacValue), FALSE);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Converts a text device path node to Logic Unit device path structure. */ | EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextUnit(IN CHAR16 *TextDeviceNode) | /* Converts a text device path node to Logic Unit device path structure. */
EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextUnit(IN CHAR16 *TextDeviceNode) | {
CHAR16 *LunStr;
DEVICE_LOGICAL_UNIT_DEVICE_PATH *LogicalUnit;
LunStr = GetNextParamStr (&TextDeviceNode);
LogicalUnit = (DEVICE_LOGICAL_UNIT_DEVICE_PATH *)CreateDeviceNode (
MESSAGING_DEVICE_PATH,
MSG_DEVICE_LOGICAL_UNIT_DP,
(UINT16)sizeof (DEVICE_LOGICAL_UNIT_DEVICE_PATH)
);
LogicalUnit->Lun = (UINT8)Strtoi (LunStr);
return (EFI_DEVICE_PATH_PROTOCOL *)LogicalUnit;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Reads the additive increments programmed into the HW congestion control table. */ | void t3_get_cong_cntl_tab(struct adapter *adap, unsigned short incr[NMTUS][NCCTRL_WIN]) | /* Reads the additive increments programmed into the HW congestion control table. */
void t3_get_cong_cntl_tab(struct adapter *adap, unsigned short incr[NMTUS][NCCTRL_WIN]) | {
unsigned int mtu, w;
for (mtu = 0; mtu < NMTUS; ++mtu)
for (w = 0; w < NCCTRL_WIN; ++w) {
t3_write_reg(adap, A_TP_CCTRL_TABLE,
0xffff0000 | (mtu << 5) | w);
incr[mtu][w] = t3_read_reg(adap, A_TP_CCTRL_TABLE) &
0x1fff;
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Count keys in array part of table 't': Fill 'nums' with number of keys that will go into corresponding slice and return total number of non-nil keys. */ | static unsigned int numusearray(const Table *t, unsigned int *nums) | /* Count keys in array part of table 't': Fill 'nums' with number of keys that will go into corresponding slice and return total number of non-nil keys. */
static unsigned int numusearray(const Table *t, unsigned int *nums) | {
unsigned int lc = 0;
unsigned int lim = ttlg;
if (lim > t->sizearray) {
lim = t->sizearray;
if (i > lim)
break;
}
for (; i <= lim; i++) {
if (!ttisnil(&t->array[i-1]))
lc++;
}
nums[lg] += lc;
ause += lc;
}
return ause;
} | nodemcu/nodemcu-firmware | C++ | MIT License | 7,566 |
/* Returns: #GParamSpec content of @value, should be unreferenced when no longer needed. */ | GParamSpec* g_value_dup_param(const GValue *value) | /* Returns: #GParamSpec content of @value, should be unreferenced when no longer needed. */
GParamSpec* g_value_dup_param(const GValue *value) | {
g_return_val_if_fail (G_VALUE_HOLDS_PARAM (value), NULL);
return value->data[0].v_pointer ? g_param_spec_ref (value->data[0].v_pointer) : NULL;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Configure the internal OSCULP32K oscillator clock source.
Configures the Ultra Low Power 32KHz internal RC oscillator with the given configuration settings. */ | void system_clock_source_osculp32k_set_config(struct system_clock_source_osculp32k_config *const config) | /* Configure the internal OSCULP32K oscillator clock source.
Configures the Ultra Low Power 32KHz internal RC oscillator with the given configuration settings. */
void system_clock_source_osculp32k_set_config(struct system_clock_source_osculp32k_config *const config) | {
OSC32KCTRL_OSCULP32K_Type temp = OSC32KCTRL->OSCULP32K;
temp.bit.WRTLOCK = config->write_once;
OSC32KCTRL->OSCULP32K = temp;
} | memfault/zero-to-main | C++ | null | 200 |
/* Read the value for the AMP gain control. */ | static int speaker_unmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) | /* Read the value for the AMP gain control. */
static int speaker_unmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) | {
ucontrol->value.integer.value[0] = spk_unmute;
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Function that handles the received data when the i.MX is used in Slave mode. If the requested address size is 1 or 2 bytes, it does nothing. If the requested address size is 4 bytes, then it writes to the memory location of the i.MX. */ | int32_t imx6_slave_receive(const imx_i2c_request_t *rq) | /* Function that handles the received data when the i.MX is used in Slave mode. If the requested address size is 1 or 2 bytes, it does nothing. If the requested address size is 4 bytes, then it writes to the memory location of the i.MX. */
int32_t imx6_slave_receive(const imx_i2c_request_t *rq) | {
int32_t ret = 0;
uint32_t data_address;
uint32_t r_data = 0;
uint8_t addr_sz = rq->reg_addr_sz;
s_masterDidWrite = true;
if(addr_sz == 4)
{
data_address = (uint32_t) ((rq->buffer[0] << 24) | (rq->buffer[1] << 16) |
(rq->buffer[2] << 8) | rq->buffer[3]);
r_data = (rq->buffer[addr_sz+3] << 24) | (rq->buffer[addr_sz+2] << 16) |
(rq->buffer[addr_sz+1] << 8) | rq->buffer[addr_sz];
writel(r_data, data_address);
}
return ret;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Check whether a handle is a valid EFI_HANDLE */ | EFI_STATUS UnitTestValidateHandle(IN EFI_HANDLE UserHandle) | /* Check whether a handle is a valid EFI_HANDLE */
EFI_STATUS UnitTestValidateHandle(IN EFI_HANDLE UserHandle) | {
IHANDLE *Handle;
LIST_ENTRY *Link;
if (UserHandle == NULL) {
return EFI_INVALID_PARAMETER;
}
for (Link = gHandleList.BackLink; Link != &gHandleList; Link = Link->BackLink) {
Handle = CR (Link, IHANDLE, AllHandles, EFI_HANDLE_SIGNATURE);
if (Handle == (IHANDLE *)UserHandle) {
return EFI_SUCCESS;
}
}
return EFI_INVALID_PARAMETER;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Increment the object use_count. Return 1 if successful or 0 otherwise. Note that once an object's use_count reached 0, the RCU freeing was already registered and the object should no longer be used. This function must be called under the protection of rcu_read_lock(). */ | static int get_object(struct kmemleak_object *object) | /* Increment the object use_count. Return 1 if successful or 0 otherwise. Note that once an object's use_count reached 0, the RCU freeing was already registered and the object should no longer be used. This function must be called under the protection of rcu_read_lock(). */
static int get_object(struct kmemleak_object *object) | {
return atomic_inc_not_zero(&object->use_count);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* After a card is removed, spectrum_cs_release() will unregister the device, and release the PCMCIA configuration. If the device is still open, this will be postponed until it is closed. */ | static void spectrum_cs_release(struct pcmcia_device *link) | /* After a card is removed, spectrum_cs_release() will unregister the device, and release the PCMCIA configuration. If the device is still open, this will be postponed until it is closed. */
static void spectrum_cs_release(struct pcmcia_device *link) | {
struct orinoco_private *priv = link->priv;
unsigned long flags;
spin_lock_irqsave(&priv->lock, flags);
priv->hw_unavailable++;
spin_unlock_irqrestore(&priv->lock, flags);
pcmcia_disable_device(link);
if (priv->hw.iobase)
ioport_unmap(priv->hw.iobase);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Waits until the RTC Time and Date registers (RTC_TR and RTC_DR) are synchronized with RTC APB clock. */ | ErrorStatus RTC_WaitForSynchro(void) | /* Waits until the RTC Time and Date registers (RTC_TR and RTC_DR) are synchronized with RTC APB clock. */
ErrorStatus RTC_WaitForSynchro(void) | {
__IO uint32_t synchrocounter = 0;
ErrorStatus status = ERROR;
uint32_t synchrostatus = 0x00;
RTC->WPR = 0xCA;
RTC->WPR = 0x53;
RTC->ISR &= (uint32_t)RTC_RSF_MASK;
do
{
synchrostatus = RTC->ISR & RTC_ISR_RSF;
synchrocounter++;
} while((synchrocounter != SYNCHRO_TIMEOUT) && (synchrostatus == 0x00));
if ((RTC->ISR & RTC_ISR_RSF) != RESET)
{
status = SUCCESS;
}
else
{
status = ERROR;
}
RTC->WPR = 0xFF;
return (status);
} | MaJerle/stm32f429 | C++ | null | 2,036 |
/* Write the string representation of the context associated with @sid into a dynamically allocated string of the correct size. Set @scontext to point to this string and set @scontext_len to the length of the string. */ | int security_sid_to_context(u32 sid, char **scontext, u32 *scontext_len) | /* Write the string representation of the context associated with @sid into a dynamically allocated string of the correct size. Set @scontext to point to this string and set @scontext_len to the length of the string. */
int security_sid_to_context(u32 sid, char **scontext, u32 *scontext_len) | {
return security_sid_to_context_core(sid, scontext, scontext_len, 0);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* This function forces the software reset of the complete HWICAP device. All the registers will return to the default value and the FIFO is also flushed as a part of this software reset. */ | void fifo_icap_reset(struct hwicap_drvdata *drvdata) | /* This function forces the software reset of the complete HWICAP device. All the registers will return to the default value and the FIFO is also flushed as a part of this software reset. */
void fifo_icap_reset(struct hwicap_drvdata *drvdata) | {
u32 reg_data;
reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET);
out_be32(drvdata->base_address + XHI_CR_OFFSET,
reg_data | XHI_CR_SW_RESET_MASK);
out_be32(drvdata->base_address + XHI_CR_OFFSET,
reg_data & (~XHI_CR_SW_RESET_MASK));
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* The default time out value is 5 seconds. If IP has retrieved the default address, the UDP is reconfigured. */ | BOOLEAN Mtftp4GetMapping(IN MTFTP4_PROTOCOL *Instance, IN UDP_IO *UdpIo, IN EFI_UDP4_CONFIG_DATA *UdpCfgData) | /* The default time out value is 5 seconds. If IP has retrieved the default address, the UDP is reconfigured. */
BOOLEAN Mtftp4GetMapping(IN MTFTP4_PROTOCOL *Instance, IN UDP_IO *UdpIo, IN EFI_UDP4_CONFIG_DATA *UdpCfgData) | {
MTFTP4_SERVICE *Service;
EFI_IP4_MODE_DATA Ip4Mode;
EFI_UDP4_PROTOCOL *Udp;
EFI_STATUS Status;
ASSERT (Instance->Config.UseDefaultSetting);
Service = Instance->Service;
Udp = UdpIo->Protocol.Udp4;
Status = gBS->SetTimer (
Service->TimerToGetMap,
TimerRelative,
MTFTP4_TIME_TO_GETMAP * TICKS_PER_SECOND
);
if (EFI_ERROR (Status)) {
return FALSE;
}
while (EFI_ERROR (gBS->CheckEvent (Service->TimerToGetMap))) {
Udp->Poll (Udp);
if (!EFI_ERROR (Udp->GetModeData (Udp, NULL, &Ip4Mode, NULL, NULL)) &&
Ip4Mode.IsConfigured)
{
Udp->Configure (Udp, NULL);
return (BOOLEAN)(Udp->Configure (Udp, UdpCfgData) == EFI_SUCCESS);
}
}
return FALSE;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* This routine will be called to send a FDISC command. */ | static void bfa_fcs_vport_do_fdisc(struct bfa_fcs_vport_s *vport) | /* This routine will be called to send a FDISC command. */
static void bfa_fcs_vport_do_fdisc(struct bfa_fcs_vport_s *vport) | {
bfa_lps_fdisc(vport->lps, vport,
bfa_pport_get_maxfrsize(__vport_bfa(vport)),
__vport_pwwn(vport), __vport_nwwn(vport));
vport->vport_stats.fdisc_sent++;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Try to post the "msg" to the mailbox */ | err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg) | /* Try to post the "msg" to the mailbox */
err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg) | {
if (rt_mb_send(*mbox, (rt_ubase_t)msg) == RT_EOK)
return ERR_OK;
return ERR_MEM;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Set the low pass filter configuration.
This function sets the low pass filter configuration and reset the filter output. */ | void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config) | /* Set the low pass filter configuration.
This function sets the low pass filter configuration and reset the filter output. */
void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config) | {
float32 tStar;
float32 T = 1 / config->cutOffFrequency;
tStar = 1 / (T / config->samplingTime + 1);
filter->a = config->gain * tStar;
filter->b = tStar;
filter->out = 0;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Return: true if the link is up, else false */ | static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie) | /* Return: true if the link is up, else false */
static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie) | {
uint32_t pscr = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_PSCR);
return pscr & XILINX_PCIE_REG_PSCR_LNKUP;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* param handle codec handle. param config codec configuration. return kStatus_Success is success, else initial failed. */ | status_t HAL_CODEC_CS42448_Init(void *handle, void *config) | /* param handle codec handle. param config codec configuration. return kStatus_Success is success, else initial failed. */
status_t HAL_CODEC_CS42448_Init(void *handle, void *config) | {
assert((config != NULL) && (handle != NULL));
status_t ret = kStatus_Success;
codec_config_t *codecConfig = (codec_config_t *)config;
cs42448_config_t *devConfig = (cs42448_config_t *)(codecConfig->codecDevConfig);
cs42448_handle_t *devHandle = (cs42448_handle_t *)((uint32_t)(((codec_handle_t *)handle)->codecDevHandle));
((codec_handle_t *)handle)->codecCapability = &s_cs42448_capability;
ret = CS42448_Init(devHandle, devConfig);
if (ret != kStatus_Success)
{
return ret;
}
return kStatus_Success;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* This file is part of the Simba project. */ | static int test_init(void) | /* This file is part of the Simba project. */
static int test_init(void) | {
BTASSERT(pin_module_init() == 0);
BTASSERT(pin_module_init() == 0);
return (0);
} | eerimoq/simba | C++ | Other | 337 |
/* Should be called with the mm_sem of the vma hold. */ | struct page* alloc_page_vma(gfp_t gfp, struct vm_area_struct *vma, unsigned long addr) | /* Should be called with the mm_sem of the vma hold. */
struct page* alloc_page_vma(gfp_t gfp, struct vm_area_struct *vma, unsigned long addr) | {
struct mempolicy *pol = get_vma_policy(current, vma, addr);
struct zonelist *zl;
if (unlikely(pol->mode == MPOL_INTERLEAVE)) {
unsigned nid;
nid = interleave_nid(pol, vma, addr, PAGE_SHIFT);
mpol_cond_put(pol);
return alloc_page_interleave(gfp, 0, nid);
}
zl = policy_zonelist(gfp, pol);
if (unlikely(mpol_needs_cond_ref(pol))) {
struct page *page = __alloc_pages_nodemask(gfp, 0,
zl, policy_nodemask(gfp, pol));
__mpol_put(pol);
return page;
}
return __alloc_pages_nodemask(gfp, 0, zl, policy_nodemask(gfp, pol));
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Returns: TRUE if the character has an assigned value */ | gboolean g_unichar_isdefined(gunichar c) | /* Returns: TRUE if the character has an assigned value */
gboolean g_unichar_isdefined(gunichar c) | {
return !IS (TYPE(c),
OR (G_UNICODE_UNASSIGNED,
OR (G_UNICODE_SURROGATE,
0)));
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* TIM_Base MSP Initialization This function configures the hardware resources used in this example. */ | void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim_base) | /* TIM_Base MSP Initialization This function configures the hardware resources used in this example. */
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim_base) | {
if(htim_base->Instance==TIM2)
{
__HAL_RCC_TIM2_CLK_ENABLE();
}
else if(htim_base->Instance==TIM3)
{
__HAL_RCC_TIM3_CLK_ENABLE();
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* This comparator searches for the next Interface descriptor of the correct Audio Streaming Class, Subclass and Protocol values. */ | uint8_t DComp_NextAudioStreamInterface(void *CurrentDescriptor) | /* This comparator searches for the next Interface descriptor of the correct Audio Streaming Class, Subclass and Protocol values. */
uint8_t DComp_NextAudioStreamInterface(void *CurrentDescriptor) | {
USB_Descriptor_Header_t* Header = DESCRIPTOR_PCAST(CurrentDescriptor, USB_Descriptor_Header_t);
if (Header->Type == DTYPE_Interface)
{
USB_Descriptor_Interface_t* Interface = DESCRIPTOR_PCAST(CurrentDescriptor, USB_Descriptor_Interface_t);
if ((Interface->Class == AUDIO_CSCP_AudioClass) &&
(Interface->SubClass == AUDIO_CSCP_AudioStreamingSubclass) &&
(Interface->Protocol == AUDIO_CSCP_StreamingProtocol))
{
return DESCRIPTOR_SEARCH_Found;
}
}
return DESCRIPTOR_SEARCH_NotFound;
} | prusa3d/Prusa-Firmware-Buddy | C++ | Other | 1,019 |
/* configure the length of regular channel group or inserted channel group */ | void adc_channel_length_config(uint32_t adc_periph, uint8_t adc_channel_group, uint32_t length) | /* configure the length of regular channel group or inserted channel group */
void adc_channel_length_config(uint32_t adc_periph, uint8_t adc_channel_group, uint32_t length) | {
switch(adc_channel_group){
case ADC_REGULAR_CHANNEL:
ADC_RSQ0(adc_periph) &= ~((uint32_t)ADC_RSQ0_RL);
ADC_RSQ0(adc_periph) |= RSQ0_RL((uint32_t)(length - ADC_CHANNEL_LENGTH_SUBTRACT_ONE));
break;
case ADC_INSERTED_CHANNEL:
ADC_ISQ(adc_periph) &= ~((uint32_t)ADC_ISQ_IL);
ADC_ISQ(adc_periph) |= ISQ_IL((uint32_t)(length - ADC_CHANNEL_LENGTH_SUBTRACT_ONE));
break;
default:
break;
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Fills each i2cConfig member with its default value. */ | void I2C_ConfigStructInit(I2C_Config_T *i2cConfig) | /* Fills each i2cConfig member with its default value. */
void I2C_ConfigStructInit(I2C_Config_T *i2cConfig) | {
i2cConfig->timing = 0;
i2cConfig->address1 = 0;
i2cConfig->mode = I2C_MODE_I2C;
i2cConfig->analogfilter = I2C_ANALOG_FILTER_ENABLE;
i2cConfig->digitalfilter = I2C_DIGITAL_FILTER_0;
i2cConfig->ack = I2C_ACK_DISABLE;
i2cConfig->ackaddress = I2C_ACK_ADDRESS_7BIT;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Return the interface index for the netif with name or NETIF_NO_INDEX if not found/on error */ | u8_t netif_name_to_index(const char *name) | /* Return the interface index for the netif with name or NETIF_NO_INDEX if not found/on error */
u8_t netif_name_to_index(const char *name) | {
struct netif *netif = netif_find(name);
if (netif != NULL) {
return netif_get_index(netif);
}
return NETIF_NO_INDEX;
} | ua1arn/hftrx | C++ | null | 69 |
/* Called when initializing the driver. We register the driver with the platform. */ | static int __init davinci_emac_init(void) | /* Called when initializing the driver. We register the driver with the platform. */
static int __init davinci_emac_init(void) | {
return platform_driver_register(&davinci_emac_driver);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* param base I2C base pointer. param handle pointer to i2c_slave_handle_t structure. param count Number of bytes transferred so far by the non-blocking transaction. retval kStatus_InvalidArgument count is Invalid. retval kStatus_Success Successfully return the count. */ | status_t I2C_SlaveTransferGetCount(I2C_Type *base, i2c_slave_handle_t *handle, size_t *count) | /* param base I2C base pointer. param handle pointer to i2c_slave_handle_t structure. param count Number of bytes transferred so far by the non-blocking transaction. retval kStatus_InvalidArgument count is Invalid. retval kStatus_Success Successfully return the count. */
status_t I2C_SlaveTransferGetCount(I2C_Type *base, i2c_slave_handle_t *handle, size_t *count) | {
assert(NULL != handle);
if (NULL == count)
{
return kStatus_InvalidArgument;
}
if (false == handle->isBusy)
{
*count = 0;
return kStatus_NoTransferInProgress;
}
*count = handle->transfer.transferredCount;
return kStatus_Success;
} | ARMmbed/DAPLink | C++ | Apache License 2.0 | 2,140 |
/* Pass control to next thread that is in state READY. */ | osStatus osThreadYield(void) | /* Pass control to next thread that is in state READY. */
osStatus osThreadYield(void) | {
return osErrorISR;
}
return __svcThreadYield();
} | labapart/polymcu | C++ | null | 201 |
/* Intel FPGA PCIe port uses BAR0 of RC's configuration space as the translation from PCI bus to native BUS. Entire DDR region is mapped into PCIe space using these registers, so it can be reached by DMA from EP devices. The BAR0 of bridge should be hidden during enumeration to avoid the sizing and resource allocation by PCIe core. */ | static bool intel_fpga_pcie_hide_rc_bar(struct intel_fpga_pcie *pcie, pci_dev_t bdf, int offset) | /* Intel FPGA PCIe port uses BAR0 of RC's configuration space as the translation from PCI bus to native BUS. Entire DDR region is mapped into PCIe space using these registers, so it can be reached by DMA from EP devices. The BAR0 of bridge should be hidden during enumeration to avoid the sizing and resource allocation by PCIe core. */
static bool intel_fpga_pcie_hide_rc_bar(struct intel_fpga_pcie *pcie, pci_dev_t bdf, int offset) | {
if (IS_ROOT_PORT(pcie, bdf) && PCI_DEV(bdf) == 0 &&
PCI_FUNC(bdf) == 0 && offset == PCI_BASE_ADDRESS_0)
return true;
return false;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Routine: misc_init_r Description: Configure zoom board specific configurations */ | int misc_init_r(void) | /* Routine: misc_init_r Description: Configure zoom board specific configurations */
int misc_init_r(void) | {
twl4030_power_init();
twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
omap_die_id_display();
twl4030_power_reset_init();
return 0;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Sets the specified pixel to the given color. !!! Only works in 24-bits packed mode for now. !!! */ | void LCDD_DrawPixel(void *pBuffer, unsigned int x, unsigned int y, unsigned int color) | /* Sets the specified pixel to the given color. !!! Only works in 24-bits packed mode for now. !!! */
void LCDD_DrawPixel(void *pBuffer, unsigned int x, unsigned int y, unsigned int color) | {
unsigned short color16 = RGB24ToRGB16(color);
LCD_SetCursor(pBuffer, x, y);
LCD_WriteRAM_Prepare(pBuffer);
LCD_WriteRAM(pBuffer, color16);
} | apopple/Pandaboard-FreeRTOS | C++ | null | 25 |
/* Atomically swap in the new signal mask, and wait for a signal. */ | long sys_sigsuspend(old_sigset_t mask) | /* Atomically swap in the new signal mask, and wait for a signal. */
long sys_sigsuspend(old_sigset_t mask) | {
mask &= _BLOCKABLE;
spin_lock_irq(¤t->sighand->siglock);
current->saved_sigmask = current->blocked;
siginitset(¤t->blocked, mask);
recalc_sigpending();
spin_unlock_irq(¤t->sighand->siglock);
current->state = TASK_INTERRUPTIBLE;
schedule();
set_restore_sigmask();
return -ERESTARTNOHAND;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* note This function must be called when the lock is not disabled. */ | void XRDC2_LockPeriphExclAccess(XRDC2_Type *base, xrdc2_periph_t periph) | /* note This function must be called when the lock is not disabled. */
void XRDC2_LockPeriphExclAccess(XRDC2_Type *base, xrdc2_periph_t periph) | {
uint8_t curDomainID;
uint32_t pac = XRDC2_GET_PAC((uint32_t)periph);
uint32_t pdac = XRDC2_GET_PDAC((uint32_t)periph);
volatile uint32_t *lockReg = &(base->PACI_PDACJ[pac][pdac].PAC_PDAC_W1);
curDomainID = XRDC2_GetCurrentMasterDomainId(base);
while (true)
{
*lockReg = XRDC2_EAL_LOCKED;
if (curDomainID == XRDC2_GetPeriphExclAccessLockDomainOwner(base, periph))
{
break;
}
}
return;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* The callback function that is executed when "help" is entered. This is the only default command that is always present. */ | static portBASE_TYPE prvHelpCommand(signed char *pcWriteBuffer, size_t xWriteBufferLen, const signed char *pcCommandString) | /* The callback function that is executed when "help" is entered. This is the only default command that is always present. */
static portBASE_TYPE prvHelpCommand(signed char *pcWriteBuffer, size_t xWriteBufferLen, const signed char *pcCommandString) | {
static const xCommandLineInputListItem * pxCommand = NULL;
signed portBASE_TYPE xReturn;
( void ) pcCommandString;
if( pxCommand == NULL )
{
pxCommand = &xRegisteredCommands;
}
strncpy( ( char * ) pcWriteBuffer, ( const char * ) pxCommand->pxCommandLineDefinition->pcHelpString, xWriteBufferLen );
pxCommand = pxCommand->pxNext;
if( pxCommand == NULL )
{
xReturn = pdFALSE;
}
else
{
xReturn = pdTRUE;
}
return xReturn;
} | apopple/Pandaboard-FreeRTOS | C++ | null | 25 |
/* Read the TC interrupt mask for the specified channel. */ | uint32_t tc_get_interrupt_mask(Tc *p_tc, uint32_t ul_channel) | /* Read the TC interrupt mask for the specified channel. */
uint32_t tc_get_interrupt_mask(Tc *p_tc, uint32_t ul_channel) | {
TcChannel *tc_channel;
Assert(p_tc);
Assert(ul_channel <
(sizeof(p_tc->TC_CHANNEL) / sizeof(p_tc->TC_CHANNEL[0])));
tc_channel = p_tc->TC_CHANNEL + ul_channel;
return tc_channel->TC_IMR;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Determines if there are any characters in the receive FIFO. */ | tBoolean UARTCharsAvail(unsigned long ulBase) | /* Determines if there are any characters in the receive FIFO. */
tBoolean UARTCharsAvail(unsigned long ulBase) | {
ASSERT(UARTBaseValid(ulBase));
return((HWREG(ulBase + UART_O_FR) & UART_FR_RXFE) ? false : true);
} | watterott/WebRadio | C++ | null | 71 |
/* This function is a callback that a driver registers to do cleanup when the UnloadImage boot service function is called. */ | EFI_STATUS EFIAPI _DriverUnloadHandler(EFI_HANDLE ImageHandle) | /* This function is a callback that a driver registers to do cleanup when the UnloadImage boot service function is called. */
EFI_STATUS EFIAPI _DriverUnloadHandler(EFI_HANDLE ImageHandle) | {
EFI_STATUS Status;
Status = ProcessModuleUnloadList (ImageHandle);
if (!EFI_ERROR (Status)) {
ProcessLibraryDestructorList (ImageHandle, gMmst);
}
return Status;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Set the slave select pins of the specified SPI port. */ | void SPISSSet(unsigned long ulBase) | /* Set the slave select pins of the specified SPI port. */
void SPISSSet(unsigned long ulBase) | {
xASSERT((ulBase == SPI0_BASE) || (ulBase == SPI1_BASE));
xHWREG(ulBase + SPI_CNTRL0) |= SPI_CNTRL0_SELOEN;
xHWREG(ulBase + SPI_CNTRL0) |= SPI_CNTRL0_SSELC;
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Port info, read from the /proc file system. */ | static int stli_proc_show(struct seq_file *m, void *v) | /* Port info, read from the /proc file system. */
static int stli_proc_show(struct seq_file *m, void *v) | {
struct stlibrd *brdp;
struct stliport *portp;
unsigned int brdnr, portnr, totalport;
totalport = 0;
seq_printf(m, "%s: version %s\n", stli_drvtitle, stli_drvversion);
for (brdnr = 0; (brdnr < stli_nrbrds); brdnr++) {
brdp = stli_brds[brdnr];
if (brdp == NULL)
continue;
if (brdp->state == 0)
continue;
totalport = brdnr * STL_MAXPORTS;
for (portnr = 0; (portnr < brdp->nrports); portnr++,
totalport++) {
portp = brdp->ports[portnr];
if (portp == NULL)
continue;
stli_portinfo(m, brdp, portp, totalport);
}
}
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* I2C Enable dual addressing mode for the Peripheral.
Both OAR1 and OAR2 are recognised in 7-bit addressing mode. */ | void i2c_enable_dual_addressing_mode(uint32_t i2c) | /* I2C Enable dual addressing mode for the Peripheral.
Both OAR1 and OAR2 are recognised in 7-bit addressing mode. */
void i2c_enable_dual_addressing_mode(uint32_t i2c) | {
I2C_OAR2(i2c) |= I2C_OAR2_ENDUAL;
} | insane-adding-machines/unicore-mx | C++ | GNU General Public License v3.0 | 50 |
/* Configures the TIMx Output Compare 1 Fast feature. */ | void TIM_OC1FastConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCFast) | /* Configures the TIMx Output Compare 1 Fast feature. */
void TIM_OC1FastConfig(TIM_TypeDef *TIMx, uint16_t TIM_OCFast) | {
uint16_t tmpccmr1 = 0;
assert_param(IS_TIM_LIST1_PERIPH(TIMx));
assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
tmpccmr1 = TIMx->CCMR1;
tmpccmr1 &= (uint16_t)~TIM_CCMR1_OC1FE;
tmpccmr1 |= TIM_OCFast;
TIMx->CCMR1 = tmpccmr1;
} | MaJerle/stm32f429 | C++ | null | 2,036 |
/* The return value is the disposition of the chunk. */ | sctp_disposition_t sctp_sf_do_5_2_2_dupinit(const struct sctp_endpoint *ep, const struct sctp_association *asoc, const sctp_subtype_t type, void *arg, sctp_cmd_seq_t *commands) | /* The return value is the disposition of the chunk. */
sctp_disposition_t sctp_sf_do_5_2_2_dupinit(const struct sctp_endpoint *ep, const struct sctp_association *asoc, const sctp_subtype_t type, void *arg, sctp_cmd_seq_t *commands) | {
return sctp_sf_do_unexpected_init(ep, asoc, type, arg, commands);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Gets a data element from the SPI interface. */ | void SPIDataRead(unsigned long ulBase, unsigned long *pulRData, unsigned long ulLen) | /* Gets a data element from the SPI interface. */
void SPIDataRead(unsigned long ulBase, unsigned long *pulRData, unsigned long ulLen) | {
unsigned long i;
xASSERT((ulBase == SPI0_BASE) || (ulBase == SPI1_BASE));
xASSERT(pulRData);
for(i = 0; i < ulLen; i++)
{
pulRData[i] = xSPISingleDataReadWrite(ulBase, 0xFFFF);
}
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Init the Comp n Interrupt Callback function.
param of pfnCallback */ | void ACMPIntCallbackInit(unsigned long ulBase, unsigned long ulCompID, xtEventCallback pfnCallback) | /* Init the Comp n Interrupt Callback function.
param of pfnCallback */
void ACMPIntCallbackInit(unsigned long ulBase, unsigned long ulCompID, xtEventCallback pfnCallback) | {
xASSERT(ulBase == ACMP_BASE);
xASSERT((ulCompID == xACMP_0) || (ulCompID == xACMP_1));
switch(ulCompID)
{
case xACMP_0:
{
g_pfnACMPHandlerCallbacks[0] = pfnCallback;
break;
}
case xACMP_1:
{
g_pfnACMPHandlerCallbacks[1] = pfnCallback;
break;
}
}
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Read the EEPROM for the default values for flow control and store the values. */ | static s32 igb_set_default_fc(struct e1000_hw *hw) | /* Read the EEPROM for the default values for flow control and store the values. */
static s32 igb_set_default_fc(struct e1000_hw *hw) | {
s32 ret_val = 0;
u16 nvm_data;
ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &nvm_data);
if (ret_val) {
hw_dbg("NVM Read Error\n");
goto out;
}
if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0)
hw->fc.requested_mode = e1000_fc_none;
else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) ==
NVM_WORD0F_ASM_DIR)
hw->fc.requested_mode = e1000_fc_tx_pause;
else
hw->fc.requested_mode = e1000_fc_full;
out:
return ret_val;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This function is derived from PowerPC code (timebase clock frequency). On ARM it returns the number of timer ticks per second. */ | ulong get_tbclk(void) | /* This function is derived from PowerPC code (timebase clock frequency). On ARM it returns the number of timer ticks per second. */
ulong get_tbclk(void) | {
ulong tbclk;
tbclk = CONFIG_SYS_HZ;
return tbclk;
} | EmcraftSystems/u-boot | C++ | Other | 181 |
/* Control frame filtering configuration is indicated by one of the following values which may be extracted from the returned value using the mask */ | uint32_t EMACFrameFilterGet(uint32_t ui32Base) | /* Control frame filtering configuration is indicated by one of the following values which may be extracted from the returned value using the mask */
uint32_t EMACFrameFilterGet(uint32_t ui32Base) | {
return (HWREG(ui32Base + EMAC_O_FRAMEFLTR) & VALID_FRMFILTER_FLAGS);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Is there a pagecache struct page at the given (mapping, offset) tuple? If yes, increment its refcount and return it; if no, return NULL. */ | struct page* find_get_page(struct address_space *mapping, pgoff_t offset) | /* Is there a pagecache struct page at the given (mapping, offset) tuple? If yes, increment its refcount and return it; if no, return NULL. */
struct page* find_get_page(struct address_space *mapping, pgoff_t offset) | {
void **pagep;
struct page *page;
rcu_read_lock();
repeat:
page = NULL;
pagep = radix_tree_lookup_slot(&mapping->page_tree, offset);
if (pagep) {
page = radix_tree_deref_slot(pagep);
if (unlikely(!page || page == RADIX_TREE_RETRY))
goto repeat;
if (!page_cache_get_speculative(page))
goto repeat;
if (unlikely(page != *pagep)) {
page_cache_release(page);
goto repeat;
}
}
rcu_read_unlock();
return page;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This is a mostly non-blocking flush. Not suitable for data-integrity purposes - I/O may not be started against all dirty pages. */ | int filemap_flush(struct address_space *mapping) | /* This is a mostly non-blocking flush. Not suitable for data-integrity purposes - I/O may not be started against all dirty pages. */
int filemap_flush(struct address_space *mapping) | {
return __filemap_fdatawrite(mapping, WB_SYNC_NONE);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Dissects the Event Packet specified in Section 2.3.9 Note: many of the fields in this packet move from PTP/IP to PTP layer of the stack. Work will need to be done in future iterations to make this compatible with PTP/USB. */ | void dissect_ptpIP_start_data(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, guint16 *offset) | /* Dissects the Event Packet specified in Section 2.3.9 Note: many of the fields in this packet move from PTP/IP to PTP layer of the stack. Work will need to be done in future iterations to make this compatible with PTP/USB. */
void dissect_ptpIP_start_data(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, guint16 *offset) | {
guint64 dataLen;
col_set_str(
pinfo->cinfo,
COL_INFO,
"Start Data Packet ");
dissect_ptp_transactionID(tvb, pinfo, tree, offset);
dataLen = tvb_get_letoh64(tvb, *offset);
proto_tree_add_item(tree, hf_ptp_totalDataLength, tvb, *offset, 8, ENC_LITTLE_ENDIAN);
*offset += 8;
if (dataLen == G_GUINT64_CONSTANT(0xFFFFFFFFFFFFFFFF))
{
col_append_str(
pinfo->cinfo,
COL_INFO,
" Data Length Unknown");
}
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Search a Question in Form scope using its QuestionId. */ | FORM_BROWSER_STATEMENT* IdToQuestion2(IN FORM_BROWSER_FORM *Form, IN UINT16 QuestionId) | /* Search a Question in Form scope using its QuestionId. */
FORM_BROWSER_STATEMENT* IdToQuestion2(IN FORM_BROWSER_FORM *Form, IN UINT16 QuestionId) | {
LIST_ENTRY *Link;
FORM_BROWSER_STATEMENT *Question;
if ((QuestionId == 0) || (Form == NULL)) {
return NULL;
}
Link = GetFirstNode (&Form->StatementListHead);
while (!IsNull (&Form->StatementListHead, Link)) {
Question = FORM_BROWSER_STATEMENT_FROM_LINK (Link);
if (Question->QuestionId == QuestionId) {
return Question;
}
Link = GetNextNode (&Form->StatementListHead, Link);
}
return NULL;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Selects the source of the master clock, internal or external. */ | void I2SMasterClockSelect(unsigned long ulBase, unsigned long ulMClock) | /* Selects the source of the master clock, internal or external. */
void I2SMasterClockSelect(unsigned long ulBase, unsigned long ulMClock) | {
unsigned long ulConfig;
ASSERT(ulBase == I2S0_BASE);
ASSERT((ulMClock & (I2S_TX_MCLK_EXT | I2S_RX_MCLK_EXT)) == ulMClock);
ulConfig = HWREG(ulBase + I2S_O_CFG) &
~(I2S_TX_MCLK_EXT | I2S_RX_MCLK_EXT);
HWREG(ulBase + I2S_O_CFG) = ulConfig | ulMClock;
} | watterott/WebRadio | C++ | null | 71 |
/* Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */ | FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY) | /* Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */
FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY) | {
FLASH_Status status = FLASH_COMPLETE;
assert_param(IS_OB_IWDG_SOURCE(OB_IWDG));
assert_param(IS_OB_STOP_SOURCE(OB_STOP));
assert_param(IS_OB_STDBY_SOURCE(OB_STDBY));
FLASH->OPTKEYR = FLASH_KEY1;
FLASH->OPTKEYR = FLASH_KEY2;
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status == FLASH_COMPLETE)
{
FLASH->CR |= CR_OPTPG_Set;
OB->USER = OB_IWDG | (uint16_t)(OB_STOP | (uint16_t)(OB_STDBY | ((uint16_t)0xF8)));
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status != FLASH_TIMEOUT)
{
FLASH->CR &= CR_OPTPG_Reset;
}
}
return status;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* This function checks if the card is present or not. */ | s32 XSdPs_CheckCardDetect(XSdPs *InstancePtr) | /* This function checks if the card is present or not. */
s32 XSdPs_CheckCardDetect(XSdPs *InstancePtr) | {
u32 PresentStateReg;
s32 Status;
if ((InstancePtr->HC_Version == XSDPS_HC_SPEC_V3) &&
((InstancePtr->Host_Caps & XSDPS_CAPS_SLOT_TYPE_MASK)
== XSDPS_CAPS_EMB_SLOT)) {
Status = XST_SUCCESS;
goto RETURN_PATH;
}
if(InstancePtr->Config.CardDetect != 0U) {
PresentStateReg = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
XSDPS_PRES_STATE_OFFSET);
if ((PresentStateReg & XSDPS_PSR_CARD_INSRT_MASK) == 0U) {
Status = XST_FAILURE;
goto RETURN_PATH;
}
}
Status = XST_SUCCESS;
RETURN_PATH:
return Status;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Check at least one bit of a given protect bitfield is set */ | bool lv_obj_is_protected(const lv_obj_t *obj, uint8_t prot) | /* Check at least one bit of a given protect bitfield is set */
bool lv_obj_is_protected(const lv_obj_t *obj, uint8_t prot) | {
return (obj->protect & prot) == 0 ? false : true ;
} | RavenSystem/esp-homekit-devices | C++ | Other | 2,577 |
/* Mask DRDY on pin (both XL & Gyro) until filter settling ends (XL and Gyro independently masked).. */ | int32_t lsm6dsl_filter_settling_mask_get(stmdev_ctx_t *ctx, uint8_t *val) | /* Mask DRDY on pin (both XL & Gyro) until filter settling ends (XL and Gyro independently masked).. */
int32_t lsm6dsl_filter_settling_mask_get(stmdev_ctx_t *ctx, uint8_t *val) | {
lsm6dsl_ctrl4_c_t ctrl4_c;
int32_t ret;
ret = lsm6dsl_read_reg(ctx, LSM6DSL_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
*val = ctrl4_c.drdy_mask;
return ret;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Prepares the picture to be saved in microSD. */ | static void Prepare_Picture(void) | /* Prepares the picture to be saved in microSD. */
static void Prepare_Picture(void) | {
uint32_t x_counter = 0, y_counter = 0;
uint32_t address = SRAM_DEVICE_ADDR;
uint16_t tmp = 0;
address += (((BSP_LCD_GetXSize() - 80) * (BSP_LCD_GetYSize() - 81)) * 2);
BSP_SRAM_Init();
for(y_counter = 10; y_counter < (BSP_LCD_GetYSize() - 70); y_counter++)
{
for(x_counter = 70; x_counter < (BSP_LCD_GetXSize() - 10); x_counter++)
{
tmp = BSP_LCD_ReadPixel(x_counter, y_counter);
BSP_SRAM_WriteData(address, &tmp, 1);
address += 2;
}
address -= 4*(BSP_LCD_GetXSize() - 80);
}
} | STMicroelectronics/STM32CubeF4 | C++ | Other | 789 |
/* Get the Rising Latched PWM counter of the PWM module.
The */ | unsigned long PWMCAPRisingCounterGet(unsigned long ulBase, unsigned long ulChannel) | /* Get the Rising Latched PWM counter of the PWM module.
The */
unsigned long PWMCAPRisingCounterGet(unsigned long ulBase, unsigned long ulChannel) | {
unsigned long ulChannelTemp;
ulChannelTemp = (ulBase == PWMA_BASE) ? ulChannel : (ulChannel - 4);
xASSERT(ulBase == PWMA_BASE);
xASSERT(((ulChannelTemp >= 0) || (ulChannelTemp <= 3)));
return xHWREG(ulBase + PWM_CRLR0 + ulChannelTemp * 8);
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Request the memory region(s) being used by 'port' */ | static int pl010_request_port(struct uart_port *port) | /* Request the memory region(s) being used by 'port' */
static int pl010_request_port(struct uart_port *port) | {
return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
!= NULL ? 0 : -EBUSY;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Check if there is dragging with an input device or not (for LV_INDEV_TYPE_POINTER and LV_INDEV_TYPE_BUTTON) */ | bool lv_indev_is_dragging(const lv_indev_t *indev) | /* Check if there is dragging with an input device or not (for LV_INDEV_TYPE_POINTER and LV_INDEV_TYPE_BUTTON) */
bool lv_indev_is_dragging(const lv_indev_t *indev) | {
if(indev == NULL) return false;
if(indev->driver.type != LV_INDEV_TYPE_POINTER && indev->driver.type != LV_INDEV_TYPE_BUTTON) return false;
return indev->proc.drag_in_prog == 0 ? false : true;
} | RavenSystem/esp-homekit-devices | C++ | Other | 2,577 |
/* dccp_feat_server_ccid_dependencies - Resolve CCID-dependent features It is the server which resolves the dependencies once the CCID has been fully negotiated. If no CCID has been negotiated, it uses the default CCID. */ | int dccp_feat_server_ccid_dependencies(struct dccp_request_sock *dreq) | /* dccp_feat_server_ccid_dependencies - Resolve CCID-dependent features It is the server which resolves the dependencies once the CCID has been fully negotiated. If no CCID has been negotiated, it uses the default CCID. */
int dccp_feat_server_ccid_dependencies(struct dccp_request_sock *dreq) | {
struct list_head *fn = &dreq->dreq_featneg;
struct dccp_feat_entry *entry;
u8 is_local, ccid;
for (is_local = 0; is_local <= 1; is_local++) {
entry = dccp_feat_list_lookup(fn, DCCPF_CCID, is_local);
if (entry != NULL && !entry->empty_confirm)
ccid = entry->val.sp.vec[0];
else
ccid = dccp_feat_default_value(DCCPF_CCID);
if (dccp_feat_propagate_ccid(fn, ccid, is_local))
return -1;
}
return 0;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Disable direction change to up interrupt (UPIE). @rmtoll IER UPIE LPTIM_DisableIT_UP. */ | void LPTIM_DisableIT_UP(LPTIM_Module *LPTIMx) | /* Disable direction change to up interrupt (UPIE). @rmtoll IER UPIE LPTIM_DisableIT_UP. */
void LPTIM_DisableIT_UP(LPTIM_Module *LPTIMx) | {
CLEAR_BIT(LPTIMx->INTEN, LPTIM_INTEN_UPIE);
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Checks the DATA phase transfer and launch the next step The next step can be a CSW packet or a endpoint reset in case of STALL. */ | static void uhi_msc_data_transfered(usb_add_t add, usb_ep_t ep, uhd_trans_status_t status, iram_size_t nb_transfered) | /* Checks the DATA phase transfer and launch the next step The next step can be a CSW packet or a endpoint reset in case of STALL. */
static void uhi_msc_data_transfered(usb_add_t add, usb_ep_t ep, uhd_trans_status_t status, iram_size_t nb_transfered) | {
usb_ep_t endp;
UNUSED(add);
UNUSED(ep);
UNUSED(nb_transfered);
if (status != UHD_TRANS_NOERROR) {
if (status == UHD_TRANS_STALL) {
if (uhi_msc_cbw.bmCBWFlags & USB_CBW_DIRECTION_IN) {
endp = uhi_msc_dev_sel->ep_in;
} else {
endp = uhi_msc_dev_sel->ep_out;
}
uhi_msc_reset_endpoint(endp, uhi_msc_data_csw_rst_stall);
return;
}
uhi_msc_scsi_sub_callback(false);
return;
}
uhi_msc_csw_wait();
return;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Send a block of data out the i/o port as 4-byte quantities, appending trailing zeroes on the last if required. */ | STATIC VOID BIov_Send(IN char *Data, IN UINT32 Len) | /* Send a block of data out the i/o port as 4-byte quantities, appending trailing zeroes on the last if required. */
STATIC VOID BIov_Send(IN char *Data, IN UINT32 Len) | {
UINT32 *LData;
LData = (UINT32 *)Data;
while (Len > sizeof (UINT32)) {
IoWrite32 (FW_PORT, *LData++);
Len -= sizeof (UINT32);
}
if (Len > 0) {
IoWrite32 (FW_PORT, BIov_Send_Rem (LData, Len));
}
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Enters STOP mode.
The function is used to disable the WakeUp Pin functionality. */ | void SysCtlStopModeConfig(unsigned long ulConfig) | /* Enters STOP mode.
The function is used to disable the WakeUp Pin functionality. */
void SysCtlStopModeConfig(unsigned long ulConfig) | {
xHWREG(PWR_CR) &= ~(PWR_CR_PDDS | PWR_CR_LPDS);
xHWREG(PWR_CR) |= (ulConfig & PWR_CR_LPDS);
xHWREG(NVIC_SYS_CTRL) |= NVIC_SYS_CTRL_SLEEPDEEP;
if(ulConfig & SYSCTL_STOP_WFI)
{
xCPUwfi();
}
else
{
xCPUwfe();
}
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |