Example embodiments relate to methods of forming a dielectric layer and to methods of manufacturing a semiconductor device using the same. 
Semiconductor devices utilizing memory cell capacitive elements preferably exhibit both high response speeds and large cell capacitances.  Thus, research in the fabrication of such devices have largely focused on efforts to achieve increased device integration, reliability and response speeds, while at the same time realizing sufficient capacitance in a limited cell area. 
For example, a dielectric layer of a capacitor may be formed using a material having a high dielectric constant, i.e., a high-k material.  In order to both sufficient device integration and favorable electrical characteristics, the dielectric layer exhibit both favorable step-coverage and high capacitance properties.