This invention relates to a small size semiconductor device as typified by WCSP (Wafer-level Chip Size Package) manufactured by forming a plurality of circuit elements on a semiconductor wafer and dividing the semiconductor wafer into individual pieces.  This invention also relates to a manufacturing method of the semiconductor device. 
Recently, there is a strong need for reducing the size and thickness of a semiconductor device on which semiconductor elements are mounted.  In particular, a CSP (Chip Scale Package) type semiconductor device is mainly used as a thin semiconductor chip.  The CSP semiconductor device includes spherical bump electrodes disposed on the upper surface thereof. 
A manufacturing method of the conventional CSP type semiconductor device will be described below.  Circuit elements are formed on the upper surface of a semiconductor wafer.  An insulation layer is formed to cover the circuit elements on the upper surface of the semiconductor wafer.  Electrode pads are formed on the insulation layer so that the electrode pads are electrically connected to the circuit elements.  A surface protection film is formed on the insulation layer and on the edges of the electrode pads.  An interlayer insulation film with through-holes (reaching the electrode pads) are formed on the surface protection film, and a base metal layer is formed on the interlayer insulation film.  Connection wirings composed of copper (Cu) or the like are formed on the base metal layer so that the connection wirings reach electrode-forming areas (on which post electrodes are to be formed) from the electrode pads.  The post electrodes (composed of copper or the like) having the height of approximately 100 μm are formed on the base metal layer by means of photolithography.  Then, the semiconductor wafer is placed in a sealed mold, and epoxy resin is injected into the sealed mold to cover the upper side of the semiconductor wafer, so that a sealing layer is formed.  The surface of the sealing layer is polished so that end surfaces (i.e., post end surfaces) of the post electrodes are exposed.  Hemispheric bump electrodes are formed on the post end surfaces.  Then, the semiconductor wafer is divided into individual pieces, with the result that the semiconductor device is manufactured.  Such a manufacturing method is disclosed in, for example, Japanese Laid-Open Patent Publication No.  2003-60120 (see paragraphs 0047-0066 and FIGS.  7-10) hereinafter referred to as Patent Publication No.  1. 
Another manufacturing method of the conventional CSP type semiconductor device will be described below.  Electrode pads are formed to be electrically connected to the circuit elements formed on the upper surface of a semiconductor wafer.  A surface protection film is formed to cover the side surfaces of the electrode pads.  An interlayer insulation film with through-holes (reaching the electrode pads) is formed on the surface protection film.  A metal thin-film layer is formed to cover the through holes and the interlayer insulation film.  Post electrodes of copper are formed on the metal thin-film layer.  Then, the metal thin-film layer is patterned, to thereby form connection wirings.  Further, an insulation layer of photosensitive polyimide is formed by photolithography to cover the connection wirings, the interlayer insulation film and side surfaces of the post electrodes (near the ends of the post electrodes) so that end surfaces of the post electrodes are exposed.  A sealing layer of photosensitive sealing resin is formed on the upper side of the semiconductor wafer, in order to enhance the contact between the insulation layer and the post electrodes, and to thereby prevent the disconnection between the connection wirings and the post electrodes.  Such a manufacturing method is disclosed in, for example, Japanese Laid-Open Patent Publication No.  2001-135742 (see paragraphs 0021-0032, 0048-0053 and FIGS.  2-3) hereinafter referred to as Patent Publication No.  2. 
However, in the conventional art disclosed in Patent Publication No.  1, since the side surfaces of the post electrodes are sealed by the sealing resin of epoxy resin, it is difficult to ensure sufficient adhesion between the side surface of each post electrode and the sealing resin.  Therefore, when the bump electrodes are bonded to the post electrodes in the mounting process of the semiconductor device on the mounting substrate, a difference in thermal expansion between the semiconductor device and the mounting substrate causes an external force to be concentrated on the post electrodes via the bump electrodes, with the result that the post electrodes and the sealing layer may separate from each other.  In such a case, moisture in the air or the like may intrude through gaps between the post electrodes and the sealing layer, and may cause corrosion of the electrode posts or connection wirings.  If an external force is repeatedly applied to the corroded connection wirings or the like, the disconnection of the connection wirings may occur, or crack may be generated on the lower layer.  Thus, the reliability of connection of the semiconductor device may be degraded. 
This problem is noticeable particularly when the post electrodes are formed of copper. 
In the conventional art disclosed in Patent Publication No.  2, the connection wirings, the interlayer insulation film and the post electrodes are covered by the insulation layer of photosensitive polyimide, and is sealed by the sealing layer of photosensitive sealing resin.  Such an arrangement is effective in preventing the separation between the post electrodes and the insulation layer.  However, both of the photosensitive polyimide and the photosensitive sealing resin transmit light.  Therefore, if the semiconductor device is exposed to light after the semiconductor device is mounted on the mounting substrate, the memory of the circuit elements may be erased by ultraviolet rays.