Q:

What is lead-in termination? 

This term is mentioned in the Micron Application Note: Hardware Tips for Point-to-Point System Design on page 10 (...For signals with lead-in termination...), however I've been struggling to find out exactly what lead-in termination means. 
It's quite a difficult google search term: I finally found a reference to "Lead-in vs loaded routing" in this, one of the last pages. 
Searching for "Lead in vs loaded routing" gives 3 results, one of which is the above, the other two are not particularly helpful. 
Can anyone explain what lead-in termination is, or point to me to a book, or a synonym that's more widely used? 

A:

For Un-buffered DIMMs (UDIMM) the CLK, CTRL and ADD/CMD topologies are 
divided into two segments  The segments between the 
connector and the first DRAM are termed as the lead-in section while the segments 
between the first DRAM and the last DRAM to the termination are termed as the 
loaded section.   In order to reduce the impedance mismatch seen at the first DRAM, 
the lead-in section is a lower impedance trace (typically 40 ohms) while the loaded 
section is 60 ohms.   For Registered DIMMs (RDIMM) the post register nets are typically routed with same trace impedance. 
From Micron material

