Q:

Avoiding CUDA thread divergence for MISD type operation

As part of a bigger code, I have a CUDA RK4 solver that integrates a large number of ODEs (Can be 1000+) in parallel.  One step of this operation is calculating 'xdot', which is different for each equation (or data element).  As of now, I have a switch-case branching setup to calculate the value for each data element in the kernel.  All the different threads use the same 3-6 data elements to calculate their output, but in a different way.  For example, for thread 1, it could be
xdot = data[0]*data[0] + data[1];
while for thread 2 it could be,
xdot = -2*data[0] + data[2];
and so on.  
So if I have a hundred data elements, the execution path is different for each of them. 
Is there any way to avoid/decrease the thread-divergence penalty in such a scenario? 
Would running only one thread per block be of any help ? 

A:

Running one thread per block simply nulls 31/32 threads in the single warp you launch and wastes a lot of cycles and opportunities to hide latency.  I would never recommend it, no matter how much branch divergence penalty your code incurred.  
Your application sounds pretty orthognal to the basic CUDA programming paradigm and there really isn't going to be much you can do to avoid branch divergence penalties.  One approach which could slightly improve things would be to perform some prior analysis of the expressions for each equation and group those with common arithmetic terms together.  Recent hardware can run a number of kernels simultaneously, so it might be profitable to group calculations sharing like terms into different kernels and launch them simultaneously, rather than a single large kernel.  CUDA supports C++ templating, and that can be a good way of generating a lot of kernel code from a relatively narrow base and make a lot of logic statically evaluable, which can help the compiler.  But don't expect miracles - your problem is probay better suited to a different architecture than the GPU (Intel's Xeon Phi, for example).