This disclosure relate to precharge signal generator of semiconductor memory device. 
General operations for generating a precharge signal from an auto-precharge read or write command in a semiconductor memory device are shown in FIGS.  1 and 2. 
Referring to FIG.  1, a procedure for generating the precharge signal in the condition that an active command is re-input after an input of the active command and the auto-precharge read or write command is as follows. 
First, when the active command ACT_COM is input at time A1, then a bank access signal BA is activated to a high level.  Following this, at a predetermined period, a delayed active signal ACTd is activated to a high level. 
Next, if the auto-precharge read or write command is input at a time A2, then an auto-precharge command AP_COM is generated as a low level pulse.  The low level pulse of the auto-precharge command AP_COM then enables a precharge signal PCG1 to be generated as a high level pulse X. The high level pulse X of the precharge signal PCG1 results in making the bank access signal BA and the delayed active signal ACTd to become inactivated at low levels to precharge the semiconductor memory device. 
After that, if the active command ACT_COM is re-input at a time A3, then the bank access signal BA is re-activated at a high level and, after a predetermined period, the delayed active signal ACTd is re-activated to a high level to normally conduct an active operation of the semiconductor memory device. 
In another procedure, generating the precharge signal in the condition that an active command is re-input after an illegal input of a precharge command since the active command and the auto-precharge read or write command have been input, can be explained by referring to FIG.  2. 
First, when the precharge command PCG_COM is improperly input at a time B2, the bank access signal BA is activated at a high level and, after a predetermined period, the delayed active signal ACTd is subsequently inactivated into a high level. 
Next, if the precharge command PCG_COM is improperly input at time B2, then the bank access signal BA and the delayed active signal ACTd are subsequently inactivated into low levels after a predetermined period. 
Next, if either the auto-precharge read command or the auto-precharge write command is improperly input at a time B3, then the auto-precharge command AP_COM is generated at a low level pulse.  The low level pulse of the auto-precharge command AP_COM enables the precharge signal PCG1 to be generated at a high level pulse Y.
Afterward, if the active command ACT_COM is re-input at time B4, then the bank access signal BA is again activated at a high level and, after a predetermined period, then the delayed active signal ACTd is again activated at a high level. 
However, because the bank access signal BA and the delayed active signal ACTd, which have been activated in high levels at the time B3, are all inactivated to low levels in response to the precharge signal PCG1 of the high level pulse Y, then active operations are abnormally terminated.