For the past several decades, the scaling of features in integrated circuits has been a driving force behind an ever-growing semiconductor industry.  Scaling to smaller and smaller features enables increased densities of functional units on the limited real estate of semiconductor chips.  For example, shrinking transistor size allows for the incorporation of an increased number of memory or logic devices on a chip, lending to the fabrication of products with increased capacity.  The drive for ever-more capacity, however, is not without issue.  The necessity to optimize the performance of each device becomes increasingly significant. 
Integrated circuits commonly include electrically conductive microelectronic structures, which are known in the arts as vias, to electrically connect metal lines or other interconnects above the vias to metal lines or other interconnects below the vias.  Vias are typically formed by a lithographic process.  Representatively, a photoresist layer may be spin coated over a dielectric layer, the photoresist layer may be exposed to patterned actinic radiation through a patterned mask, and then the exposed layer may be developed in order to form an opening in the photoresist layer.  Next, an opening for the via may be etched in the dielectric layer by using the opening in the photoresist layer as an etch mask.  This opening is referred to as a via opening.  Finally, the via opening may be filled with one or more metals or other conductive materials to form the via. 
In the past, the sizes and the spacing of vias has progressively decreased, and it is expected that in the future the sizes and the spacing of the vias will continue to progressively decrease, for at least some types of integrated circuits (e.g., advanced microprocessors, chipset components, graphics chips, etc.).  One measure of the size of the vias is the critical dimension of the via opening.  One measure of the spacing of the vias is the via pitch.  Via pitch represents the center-to-center distance between the closest adjacent vias. 
However, improvements are needed in the area of via manufacturing technologies.