1.  Field
The present embodiments relate to power converters for electronic devices.  More specifically, the present embodiments relate to techniques for performing zero voltage switching in flyback converters with variable input voltages. 
2.  Related Art
Flyback converters may be used to convert alternating current (AC) to direct current (DC) in low-power applications such as mobile phone chargers and/or laptop computer power adaptors.  For example, an external power supply (e.g., power brick) for a laptop computer may use a flyback converter to convert AC mains power from a power outlet into low-voltage DC that can be used by components in the laptop computer. 
Power losses in a flyback converter may include conduction losses caused by the conduction of current within the components (e.g., transformers, switches, etc.)  of the flyback converter, as well as switching losses resulting from the switching of diodes and/or metal-oxide-semiconductor field-effect transistors (MOSFETs) in the flyback converter.  Such power losses may reduce the efficiency of the flyback converter, and in turn, generate heat that causes the temperature of the flyback converter to approach and/or exceed the peak operating temperature for the flyback converter.  Consequently, power losses in the flyback converter may adversely affect the efficient and/or safe operation of the flyback converter. 
To mitigate such power losses, zero voltage switching (ZVS) may be performed in the flyback converter.  For example, a ZVS technique may reduce the switching losses of the flyback converter's primary MOSFET by discharging the drain-to-source capacitance of the primary MOSFET before switching the primary MOSFET from an off-state to an on-state.  However, ZVS techniques in flyback converters are typically configured for use with only low-line or high-line input voltages. 
As a result, ZVS techniques may generate additional power losses if the flyback converters are operated with input voltages for which the ZVS techniques are not configured.  For example, low-line ZVS may employ a quasi-resonant (QR) mode that discharges the drain-to-source capacitance of the primary MOSFET without using a negative peak current.  On the other hand, high-line ZVS may use a combination of the QR mode with a negative peak current at the secondary MOSFET to discharge the drain-to-source capacitance of the primary MOSFET prior to switching the primary MOSFET.  Use of high-line ZVS with a low-line input voltage may thus produce additional current in the flyback converter, which increases the conduction losses within the flyback converter without reducing the switching loss of the primary MOSFET. 
Hence, what is needed is a mechanism for efficiently performing ZVS in flyback converters with variable input voltages.