A digital synthesis technique is frequently used to implement pulse shaping circuitry.  In a multi-level transmission system, a typical desired pulse shape may extend over a long period of time but for practical reasons is truncated to M separate intervals in order to be stored in read-only-memory (ROM).  The ROM stores information representing pulse shapes (in the form of binary samples) for each of M intervals.  For example, on L-level transmission system requires L different sets of shapes.  Consequently, this approach requires M (the number of intervals in time) times L (the number of levels in volts) ROM storage devices.  Depending on the number of intervals M and the number of levels L, the total number of ROM memory devices can be quite high. 
In digital synthesis of pulse shapes, the samples retrieved from ROM that represent the predetermined pulse shapes are typically weighted depending on symbol weighting factors for each level L. The weighting is typically performed by digital multipliers which generally requires complex circuitry to implement which in turn can become quite expensive. 
Thus, a need exists for a digital synthesizer that reduces memory requirements and also eliminates the need for complex multipliers to perform weighting of binary samples.