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- In order to distinguish between TX/RX channels and sound channels, the term "channel" in the context of the I2S driver only refers to TX/RX channels. Meanwhile, sound channels are referred to as "slots". I2S Mode Categorization """""""""""""""""""""""" I2S communication modes are categorized into the following three modes. Note that: - **Standard mode**: Standard mode always has two slots, it can support Philips, MSB, and PCM (short frame sync) formats. Please refer to :component_file:`esp_driver_i2s/include/driver/i2s_std.h` for more details. - **PDM mode**: PDM mode only supports two slots with 16-bit data width, but the configurations of PDM TX and PDM RX are slightly different. For PDM TX, the sample rate can be set by :cpp:member:`i2s_pdm_tx_clk_config_t::sample_rate`, and its clock frequency depends on the up-sampling configuration. For PDM RX, the sample rate can be set by :cpp:member:`i2s_pdm_rx_clk_config_t::sample_rate`, and its clock frequency depends on the down-sampling configuration.

Please refer to :component_file:`esp_driver_i2s/include/driver/i2s_pdm.h` for details. - **TDM mode**: TDM mode can support up to 16 slots. It can work in Philips, MSB, PCM (short frame sync), and PCM (long frame sync) formats. Please refer to :component_file:`esp_driver_i2s/include/driver/i2s_tdm.h` for details. When allocating a new channel in a specific mode, users should initialize that channel by its corresponding function. It is strongly recommended to use the helper macros to generate the default configurations in case the default values are changed in the future. Independent Slot and Clock Configuration """""""""""""""""""""""""""""""""""""""" The slot configurations and clock configurations can be configured separately. - Call :cpp:func:`i2s_channel_init_std_mode`, :cpp:func:`i2s_channel_init_pdm_rx_mode`, :cpp:func:`i2s_channel_init_pdm_tx_mode`, or :cpp:func:`i2s_channel_init_tdm_mode` to initialize the slot/clock/gpio_pin configurations. - Calling :cpp:func:`i2s_channel_reconfig_std_slot`, :cpp:func:`i2s_channel_reconfig_pdm_rx_slot`, :cpp:func:`i2s_channel_reconfig_pdm_tx_slot`, or :cpp:func:`i2s_channel_reconfig_tdm_slot` can change the slot configurations after initialization.

- Calling :cpp:func:`i2s_channel_reconfig_std_clock`, :cpp:func:`i2s_channel_reconfig_pdm_rx_clock`, :cpp:func:`i2s_channel_reconfig_pdm_tx_clock`, or :cpp:func:`i2s_channel_reconfig_tdm_clock` can change the clock configurations after initialization. - Calling :cpp:func:`i2s_channel_reconfig_std_gpio`, :cpp:func:`i2s_channel_reconfig_pdm_rx_gpio`, :cpp:func:`i2s_channel_reconfig_pdm_tx_gpio`, or :cpp:func:`i2s_channel_reconfig_tdm_gpio` can change the GPIO configurations after initialization. Misc """" - States and state-machine are adopted in the new I2S driver to avoid APIs called in wrong state. - ADC and DAC modes are removed. They are only supported in their own drivers and the legacy I2S driver. Breaking Changes in Usage To use the new I2S driver, please follow these steps: .. only:: SOC_TWAI_SUPPORTED TWAI Driver The deprecated ``CAN`` peripheral driver is removed. Please use ``TWAI`` driver instead (i.e., include ``driver/twai.

h`` in your application). Register Access Macros Previously, all register access macros could be used as expressions, so the following was allowed:: uint32_t val = REG_SET_BITS(reg, bits, mask); In ESP-IDF v5.0, register access macros which write or read-modify-write the register can no longer be used as expressions, and can only be used as statements. This applies to the following macros: ``REG_WRITE``, ``REG_SET_BIT``, ``REG_CLR_BIT``, ``REG_SET_BITS``, ``REG_SET_FIELD``, ``WRITE_PERI_REG``, ``CLEAR_PERI_REG_MASK``, ``SET_PERI_REG_MASK``, ``SET_PERI_REG_BITS``. To store the value which would have been written into the register, split the operation as follows:: uint32_t new_val = REG_READ(reg) | mask; REG_WRITE(reg, new_val); To get the value of the register after modification (which may be different from the value written), add an explicit read:: REG_SET_BITS(reg, bits, mask); uint32_t new_val = REG_READ(reg);

Provisioning Protocomm The ``pop`` field in the :cpp:func:`protocomm_set_security` API is now deprecated. Please use the ``sec_params`` field instead of ``pop``. This parameter should contain the structure (including the security parameters) as required by the protocol version used. For example, when using security version 2, the ``sec_params`` parameter should contain the pointer to the structure of type :cpp:type:`protocomm_security2_params_t`. Wi-Fi Provisioning .. list:: ESP Local Control The ``pop`` field in the :cpp:type:`esp_local_ctrl_proto_sec_cfg_t` API is now deprecated. Please use the ``sec_params`` field instead of ``pop``. This field should contain the structure (containing the security parameters) as required by the protocol version used. For example, when using security version 2, the ``sec_params`` field should contain pointer to the structure of type :cpp:type:`esp_local_ctrl_security2_params_t`.

Bluetooth Low Energy Bluedroid The following Bluedroid macros, types, and functions have been renamed: - :component_file:`bt/host/bluedroid/api/include/api/esp_gap_ble_api.h` - In :cpp:enum:`esp_gap_ble_cb_event_t`: - ``ESP_GAP_BLE_SET_PREFERED_DEFAULT_PHY_COMPLETE_EVT`` renamed to ``ESP_GAP_BLE_SET_PREFERRED_DEFAULT_PHY_COMPLETE_EVT`` - ``ESP_GAP_BLE_SET_PREFERED_PHY_COMPLETE_EVT`` renamed to ``ESP_GAP_BLE_SET_PREFERRED_PHY_COMPLETE_EVT`` - ``ESP_GAP_BLE_CHANNEL_SELETE_ALGORITHM_EVT`` renamed to ``ESP_GAP_BLE_CHANNEL_SELECT_ALGORITHM_EVT`` - ``esp_ble_wl_opration_t`` renamed to :cpp:enum:`esp_ble_wl_operation_t` - ``esp_ble_gap_cb_param_t.pkt_data_lenth_cmpl`` renamed to ``pkt_data_length_cmpl`` - ``esp_ble_gap_cb_param_t.update_whitelist_cmpl.wl_opration`` renamed to ``wl_operation`` - ``esp_ble_gap_set_prefered_default_phy`` renamed to :cpp:func:`esp_ble_gap_set_preferred_default_phy` - ``esp_ble_gap_set_prefered_phy`` renamed to :cpp:func:`esp_ble_gap_set_preferred_phy` - :component_file:`bt/host/bluedroid/api/include/api/esp_gatt_defs.

h` - In :cpp:enum:`esp_gatt_status_t`: - ``ESP_GATT_ENCRYPED_MITM`` renamed to ``ESP_GATT_ENCRYPTED_MITM`` - ``ESP_GATT_ENCRYPED_NO_MITM`` renamed to ``ESP_GATT_ENCRYPTED_NO_MITM`` Nimble The following Nimble APIs have been removed: - :component_file:`bt/host/nimble/esp-hci/include/esp_nimble_hci.h` - Remove ``esp_err_t esp_nimble_hci_and_controller_init(void)`` - Controller initialization, enable and HCI initialization calls have been moved to `nimble_port_init`. This function can be deleted directly. - Remove ``esp_err_t esp_nimble_hci_and_controller_deinit(void)`` - Controller deinitialization, disable and HCI deinitialization calls have been moved to `nimble_port_deinit`. This function can be deleted directly. ESP-BLE-MESH The following ESP-BLE-MESH macro has been renamed: - :component_file:`bt/esp_ble_mesh/api/esp_ble_mesh_defs.h` - In :cpp:enum:`esp_ble_mesh_prov_cb_event_t`: - ``ESP_BLE_MESH_PROVISIONER_DRIECT_ERASE_SETTINGS_COMP_EVT`` renamed to ``ESP_BLE_MESH_PROVISIONER_DIRECT_ERASE_SETTINGS_COMP_EVT``

Migration from 5.1 to 5.2 .. toctree:: :maxdepth: 1 bluetooth-classic gcc :SOC_IEEE802154_SUPPORTED: ieee802154 peripherals protocols storage system :SOC_WIFI_SUPPORTED: wifi

WiFi WiFi Enterprise Security APIs defined in `esp_wpa2.h` have been deprecated. Please use newer APIs from `esp_eap_client.h`. WiFi Disconnect Reason Codes For the event WIFI_EVENT_STA_DISCONNECTED, the original reason code WIFI_REASON_NO_AP_FOUND has been split as follows: - REASON_NO_AP_FOUND(original and still used in some scenarios) - REASON_NO_AP_FOUND_IN_RSSI_THRESHOLD - REASON_NO_AP_FOUND_IN_AUTHMODE_THRESHOLD - REASON_NO_AP_FOUND_W_COMPATIBLE_SECURITY For details, please refer to :ref:`esp_wifi_reason_code`.

GCC *** GCC Version The previous GCC version was GCC 12.2.0. This has now been upgraded to GCC 13.2.0 on all targets. Users that need to port their code from GCC 12.2.0 to 13.2.0 should refer to the series of official GCC porting guides listed below: Common Porting Problems and Fixes ``stdio.h`` No Longer Includes ``sys/types.h`` Issue Compilation errors may occur in code that previously worked with the old toolchain. For example: .. code-block:: c #include clock_t var; // error: expected specifier-qualifier-list before 'clock_t' Solution To resolve this issue, the correct header must be included. Refactor the code like this: .. code-block:: c #include clock_t var;

System FreeRTOS IDF FreeRTOS Upgrade The IDF FreeRTOS kernel (which is a dual-core SMP implementation of FreeRTOS) has been upgraded to be based on Vanilla FreeRTOS v10.5.1. With this upgrade, the design and implementation of IDF FreeRTOS has also been changed significantly. As a result, users should take not of the following changes to kernel behavior and API: - When enabling single-core mode via the :ref:`CONFIG_FREERTOS_UNICORE` option, the kernel's behavior will now be identical to Vanilla FreeRTOS (see :ref:`freertos-idf-single-core` for more details). - For SMP related APIs that were added by IDF FreeRTOS, checks on ``xCoreID`` arguments are now stricter. Providing out of range values for ``xCoreID`` arguments will now trigger an assert. - The following SMP related APIs are now deprecated and replaced due to naming consistency reasons: - ``xTaskGetAffinity()`` is deprecated, call :cpp:func:`xTaskGetCoreID` instead. - ``xTaskGetIdleTaskHandleForCPU()`` is deprecated, call :cpp:func:`xTaskGetIdleTaskHandleForCore` instead.

- ``xTaskGetCurrentTaskHandleForCPU()`` is deprecated, call :cpp:func:`xTaskGetCurrentTaskHandleForCore` instead. Task Snapshot The Task Snapshot API has been made private due to a lack of a practical way for the API to be used from user code (the scheduler must be halted before the API can be called). .. only:: CONFIG_IDF_TARGET_ARCH_XTENSA Xtensa A number of legacy include paths for Xtensa headers have been deprecated: - ``#include "freertos/xtensa_api.h"`` is deprecated, please use ``#include "xtensa_api.h"`` instead. - ``#include "freertos/xtensa_context.h"`` is deprecated, please use ``#include "xtensa_context.h"`` instead. - ``#include "freertos/xtensa_timer.h"`` is deprecated, please use ``#include "xtensa_timer.h"`` instead. Panic Handler Behavior The choice ``CONFIG_ESP_SYSTEM_PANIC_GDBSTUB`` in the configuration option :ref:`CONFIG_ESP_SYSTEM_PANIC` has been made dependent on whether the ``esp_gdbstub`` component is included in the build.

When trimming the list of components in the build using ``set(COMPONENTS main)``, ``esp_gdbstub`` component has to be added to this list of components to make the ``CONFIG_ESP_SYSTEM_PANIC_GDBSTUB`` option available.

Bluetooth Classic Bluedroid The following Bluedroid API have been removed: - :component_file:`bt/host/bluedroid/api/include/api/esp_bt_main.h` - Remove ``esp_err_t esp_bluedroid_init(void)`` - Bluedroid stack initialization API has been replaced by ``esp_err_t esp_bluedroid_init_with_cfg(esp_bluedroid_config_t *cfg)``. Macro ``BT_BLUEDROID_INIT_CONFIG_DEFAULT()`` provides the default configuration for the initialization. The original function can be deleted directly.

Protocols CoAP CoAP examples have been moved to `idf-extra-components `__ repository. HTTP2 http2_request example has been moved to `idf-extra-components `__ repository.

Storage NVS Encryption - For SoCs with the HMAC peripheral (``SOC_HMAC_SUPPORTED``), turning on :doc:`../../../security/flash-encryption` will no longer automatically turn on :doc:`../../../api-reference/storage/nvs_encryption`. - You will need to explicitly turn on NVS encryption and select the required scheme (flash encryption-based or HMAC peripheral-based). You can select the HMAC peripheral-based scheme (:ref:`CONFIG_NVS_SEC_KEY_PROTECTION_SCHEME`), even if flash encryption is not enabled. - SoCs without the HMAC peripheral will still automatically turn on NVS encryption when flash encryption is enabled.

Peripherals .. only:: SOC_UART_SUPPORTED UART - :c:macro:`UART_FIFO_LEN` is deprecated. Please use :c:macro:`UART_HW_FIFO_LEN` instead. .. only:: SOC_I2C_SUPPORTED I2C --- I2C driver has been redesigned (see :doc:`I2C API Reference `), which aims to unify the interface and extend the usage of I2C peripheral. Although it is recommended to use the new driver APIs, the legacy driver is still available in the previous include path ``driver/i2c.h``. The major breaking changes in concept and usage are listed as follows: Major Changes in Concepts ~~~~~~~~~~~~~~~~~~~~~~~~~ - ``i2c_config_t`` which was used to configure the I2C bus, but it doesn't really tell whether to configure master or slave. So in the new design, master and slave initialization are separate, user can call ``i2c_master_bus_config_t`` or ``i2c_slave_config_t``. - ``i2c_mode_t`` which was used to tell whether I2C controller works in slave mode or master mode. This enumerator has been deprecated.

In the new driver, users don'tneed to manually set the mode anymore since master and slave APIs are different. - ``i2c_rw_t`` which was used to tell whether I2C master controller is performing a `write` or a `read` operation. This is now deprecated. - ``i2c_addr_mode_t`` was renamed to ``i2c_addr_bit_len_t``. - In the legacy driver, operations needed to be chained with a command list (dynamically or statically created). The new driver now handles this internally, making the operations more size and space efficient. - Capability flags like ``I2C_SCLK_SRC_FLAG_FOR_NOMAL`` are used to select clock source in the legacy driver. In the new driver, users can select clock source directly. Major Changes in Usage ~~~~~~~~~~~~~~~~~~~~~~ - I2C bus initialization is done in two parts: first, initialization of the bus with :cpp:func:`i2c_new_master_bus`, then, initialization of the I2C device with :cpp:func:`i2c_master_bus_add_device`. - ``i2c_reset_tx_fifo`` and ``i2c_reset_rx_fifo`` have been removed, since it is never required to reset the fifo by users.

Whole bus can still be reset by calling ``i2c_master_bus_reset``. - ``i2c_cmd_link_xxx`` functions have been removed, user doesn't need to use link to link commands on its own. - ``i2c_master_write_to_device`` has been renamed to ``i2c_master_transmit``. - ``i2c_master_read_from_device`` has been renamed to ``i2c_master_receive``. - ``i2c_master_write_read_device`` has been renamed to ``i2c_master_transmit_receive`` - ``i2c_slave_write_buffer`` has been renamed to ``i2c_slave_transmit`` - ``i2c_slave_read_buffer`` has been renamed to ``i2c_slave_receive``

IEEE 802.15.4 Receive Handle Done User must call the function :cpp:func:`esp_ieee802154_receive_handle_done` to notify 802.15.4 driver after the received frame is handled. Otherwise the frame buffer will not be freed for future use.

Migration from 5.2 to 5.3 .. toctree:: :maxdepth: 1 bluetooth-low-energy peripherals security storage system

System Power Management Unit Testing In the past versions of Unity framework, it was possible to omit a semicolon at the end of a ``TEST_ASSERT_*`` macro statement. This is no longer the case in the newer version of Unity, used in IDF v5.3. For example, the following code: .. code-block:: c TEST_ASSERT(some_func() == ESP_OK) will now result in a compilation error. To fix this, add a semicolon at the end of the statement: TEST_ASSERT(some_func() == ESP_OK); Partition Table Partition Table generation tool has been fixed to ensure that the size of partition of type ``app`` is having flash sector (minimum erase size) aligned size (please see :ref:`partition-offset-and-size`). If the partition does not have aligned size, partition table generator tool will raise an error. This fix ensures that OTA updates for a case where the file size is close or equal to the size of partition works correctly (erase operation does not go beyond the partition size). In case you have the ``app`` partition size which is not a multiple of the 4 KB then please note that while migrating to ESP-IDF 5.

3, you must align this size to its lower 4 KB boundary for the build to succeed. This does not impact the partition table for existing devices as such but ensures that generated firmware size remains within the OTA update capablilty limit.

Storage VFS --- The UART implementation of VFS operators has been moved from `vfs` component to `esp_driver_uart` component. APIs with `esp_vfs_dev_uart_` prefix are all deprecated, replaced with new APIs in `uart_vfs.h` starting with `uart_vfs_dev_` prefix. Specifically, - ``esp_vfs_dev_uart_register`` has been renamed to ``uart_vfs_dev_register`` - ``esp_vfs_dev_uart_port_set_rx_line_endings`` has been renamed to ``uart_vfs_dev_port_set_rx_line_endings`` - ``esp_vfs_dev_uart_port_set_tx_line_endings`` has been renamed to ``uart_vfs_dev_port_set_tx_line_endings`` - ``esp_vfs_dev_uart_use_nonblocking`` has been renamed to ``uart_vfs_dev_use_nonblocking`` - ``esp_vfs_dev_uart_use_driver`` has been renamed to ``uart_vfs_dev_use_driver`` For compatibility, `vfs` component still registers `esp_driver_uart` as its private dependency. In other words, you do not need to modify the CMake file of an existing project.

Peripherals Drivers In order to control the dependence of other components on drivers at a smaller granularity, the original peripheral drivers under the ``driver`` component were split into separate components: - `esp_driver_gptimer` - Driver for general purpose timers - `esp_driver_pcnt` - Driver for pulse counter - `esp_driver_gpio` - Driver for GPIO - `esp_driver_spi` - Driver for GPSPI - `esp_driver_mcpwm` - Driver for Motor Control PWM - `esp_driver_sdmmc` - Driver for SDMMC - `esp_driver_sdspi` - Driver for SDSPI - `esp_driver_sdio` - Driver for SDIO - `esp_driver_ana_cmpr` - Driver for Analog Comparator - `esp_driver_i2s` - Driver for I2S - `esp_driver_dac` - Driver for DAC - `esp_driver_rmt` - Driver for RMT - `esp_driver_tsens` - Driver for Temperature Sensor - `esp_driver_sdm` - Driver for Sigma-Delta Modulator - `esp_driver_i2c` - Driver for I2C - `esp_driver_uart` - Driver for UART - `esp_driver_ledc` - Driver for LEDC - `esp_driver_parlio` - Driver for Parallel IO - `esp_driver_usb_serial_jtag` - Driver for USB_SERIAL_JTAG For compatibility, the original ``driver`` component is still treated as an all-in-one component by registering these `esp_driver_xyz` components as its public dependencies.

In other words, you do not need to modify the CMake file of an existing project, but you now have a way to specify the specific peripheral driver that your project depends on. Originally, you may have used **linker.lf** to specify the link location of some driver functions in memory space, but now, because the location of the driver files have been moved, you need to make changes your **linker.lf** file accordingly. For example, a linker.lf file with the following entries: .. code-block:: none [mapping:my_mapping_scheme] archive: libdriver.a entries: gpio (noflash) Should be changed to: .. code-block:: none [mapping:my_mapping_scheme] archive: libesp_driver_gpio.a entries: gpio (noflash) Secure Element The ATECC608A secure element interfacing example has been moved to `ESP Cryptoauthlib Repository `_ on GitHub. This example is also part of the `esp-cryptoauthlib `_ in the component manager registry.

Bluetooth Low Energy Bluedroid The following Bluedroid APIs have been removed: - :component_file:`bt/host/bluedroid/api/include/api/esp_gap_ble_api.h` - Remove ``esp_err_t esp_ble_gap_set_device_name(const char *name)`` - Local device name setting calls have been moved to :cpp:func:`esp_bt_dev_set_device_name`. This function can be deleted directly. - Remove ``esp_err_t esp_ble_gap_get_device_name(void)`` - Local device name getting calls have been moved to :cpp:func:`esp_bt_dev_get_device_name`. This function can be deleted directly.

Security .. only:: SOC_FLASH_ENC_SUPPORTED Platform security features When flash encryption is enabled, encrypt only the app image that is present partition of type app, instead of encrypting the whole partition. This can help to optimize the encryption time required during the first boot. This could be configured using the config ``CONFIG_SECURE_FLASH_ENCRYPT_ONLY_IMAGE_LEN_IN_APP_PART``, which is enabled by default from ESP-IDF v5.3 and is disabled for all earlier releases to avoid any breaking behaviour.

Security Guides Overview .. toctree:: :maxdepth: 1 security Features .. toctree:: :maxdepth: 1 flash-encryption :esp32: secure-boot-v1 secure-boot-v2 Workflows .. toctree:: :maxdepth: 1 host-based-security-workflows

Host-Based Security Workflows {IDF_TARGET_CRYPT_CNT:default="SPI_BOOT_CRYPT_CNT",esp32="FLASH_CRYPT_CNT"} {IDF_TARGET_CRYPT_CNT_MAX_VAL:default="7",esp32="127"} {IDF_TARGET_SBV2_DEFAULT_SCHEME:default="RSA", esp32c2="ECDSA (V2)"} Introduction It is recommended to have an uninterrupted power supply while enabling security features on ESP32 SoCs. Power failures during the secure manufacturing process could cause issues that are hard to debug and, in some cases, may cause permanent boot-up failures. This guide highlights an approach where security features are enabled with the assistance of an external host machine. Security workflows are broken down into various stages and key material is generated on the host machine; thus, allowing greater recovery chances in case of power or other failures. It also offers better timings for secure manufacturing, e.g., in the case of encryption of firmware on the host machine vs. on the device. Goals #. Simplify the traditional workflow with stepwise instructions.

#. Design a more flexible workflow as compared to the traditional firmware-based workflow. #. Improve reliability by dividing the workflow into small operations. #. Eliminate dependency on :ref:`second-stage-bootloader` (firmware bootloader). Pre-requisite .. code:: bash pip install esptool Scope Security Workflows .. _enable-flash-encryption-and-secure-boot-v2-externally: Enable Flash Encryption and Secure Boot V2 Externally .. important:: It is recommended to enable both Flash Encryption and Secure Boot V2 for a production use case. When enabling the Flash Encryption and Secure Boot V2 externally we need to enable them in the following order: #. Enable the Flash Encryption feature by following the steps listed in :ref:`enable-flash-encryption-externally`. #. Enable the Secure Boot V2 feature by following the steps listed in :ref:`enable-secure-boot-v2-externally`. The reason for this order is as follows: To enable the Secure Boot (SB) V2, it is necessary to keep the SB V2 key readable.

To protect the key's readability, the write protection for ``RD_DIS`` (``ESP_EFUSE_WR_DIS_RD_DIS``) is applied. However, this action poses a challenge when attempting to enable Flash Encryption, as the Flash Encryption (FE) key needs to remain unreadable. This conflict arises because the ``RD_DIS`` is already write-protected, making it impossible to read protect the FE key. .. _enable-flash-encryption-externally: Enable Flash Encryption Externally In this case, all the eFuses related to flash encryption are written with help of the espefuse tool. More details about flash encryption can be found in the :doc:`Flash Encryption Guide ` See how to check :ref:`flash-encryption-status`. In this case, the flash on the chip must be erased and flash encryption must not be enabled. The chip can be erased by running: .. code:: bash esptool.py --port PORT erase_flash A random flash encryption key can be generated by running: .. only:: not SOC_FLASH_ENCRYPTION_XTS_AES .

. code-block:: bash espsecure.py generate_flash_encryption_key my_flash_encryption_key.bin .. only:: SOC_FLASH_ENCRYPTION_XTS_AES_256 If :ref:`Size of generated AES-XTS key ` is AES-128 (256-bit key): .. code-block:: bash espsecure.py generate_flash_encryption_key my_flash_encryption_key.bin else if :ref:`Size of generated AES-XTS key ` is AES-256 (512-bit key): .. code-block:: bash espsecure.py generate_flash_encryption_key --keylen 512 my_flash_encryption_key.bin .. only:: SOC_FLASH_ENCRYPTION_XTS_AES_128 and not SOC_FLASH_ENCRYPTION_XTS_AES_256 and not SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK .. code-block:: bash espsecure.py generate_flash_encryption_key my_flash_encryption_key.bin .. only:: SOC_FLASH_ENCRYPTION_XTS_AES_128 and SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK If :ref:`Size of generated AES-XTS key ` is AES-128 (256-bit key): .. code-block:: bash espsecure.py generate_flash_encryption_key my_flash_encryption_key.

bin else if :ref:`Size of generated AES-XTS key ` is AES-128 key derived from 128 bits (SHA256(128 bits)): .. code-block:: bash espsecure.py generate_flash_encryption_key --keylen 128 my_flash_encryption_key.bin This action **cannot be reverted**. It can be done by running: .. only:: not SOC_FLASH_ENCRYPTION_XTS_AES .. code-block:: bash espefuse.py --port PORT burn_key flash_encryption my_flash_encryption_key.bin .. only:: SOC_FLASH_ENCRYPTION_XTS_AES_256 .. code-block:: bash espefuse.py --port PORT burn_key BLOCK my_flash_encryption_key.bin KEYPURPOSE where ``BLOCK`` is a free keyblock between ``BLOCK_KEY0`` and ``BLOCK_KEY5``. And ``KEYPURPOSE`` is either ``XTS_AES_256_KEY_1``, ``XTS_AES_256_KEY_2``, ``XTS_AES_128_KEY``. See `{IDF_TARGET_NAME} Technical Reference Manual `_ for a description of the key purposes. For AES-128 (256-bit key) - ``XTS_AES_128_KEY``: .. code-block:: bash espefuse.py --port PORT burn_key BLOCK my_flash_encryption_key.

bin XTS_AES_128_KEY For AES-256 (512-bit key) - ``XTS_AES_256_KEY_1`` and ``XTS_AES_256_KEY_2``. ``espefuse.py`` supports burning both these two key purposes together with a 512-bit key to two separate key blocks via the virtual key purpose ``XTS_AES_256_KEY``. When this is used ``espefuse.py`` will burn the first 256 bits of the key to the specified ``BLOCK`` and burn the corresponding block key purpose to ``XTS_AES_256_KEY_1``. The last 256 bits of the key will be burned to the first free key block after ``BLOCK`` and the corresponding block key purpose to ``XTS_AES_256_KEY_2`` .. code-block:: bash espefuse.py --port PORT burn_key BLOCK my_flash_encryption_key.bin XTS_AES_256_KEY If you wish to specify exactly which two blocks are used then it is possible to divide the key into two 256-bit keys, and manually burn each half with ``XTS_AES_256_KEY_1`` and ``XTS_AES_256_KEY_2`` as key purposes: .. code-block:: bash split -b 32 my_flash_encryption_key.

bin my_flash_encryption_key.bin espefuse.py --port PORT burn_key BLOCK my_flash_encryption_key.bin.aa XTS_AES_256_KEY_1 espefuse.py --port PORT burn_key BLOCK+1 my_flash_encryption_key.bin.ab XTS_AES_256_KEY_2 .. only:: SOC_FLASH_ENCRYPTION_XTS_AES_128 and not SOC_FLASH_ENCRYPTION_XTS_AES_256 and not SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK .. code-block:: bash espefuse.py --port PORT burn_key BLOCK my_flash_encryption_key.bin XTS_AES_128_KEY where ``BLOCK`` is a free keyblock between ``BLOCK_KEY0`` and ``BLOCK_KEY5``. .. only:: SOC_FLASH_ENCRYPTION_XTS_AES_128 and SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK For AES-128 (256-bit key) - ``XTS_AES_128_KEY`` (the ``XTS_KEY_LENGTH_256`` eFuse will be burn to 1): .. code-block:: bash espefuse.py --port PORT burn_key BLOCK_KEY0 flash_encryption_key256.bin XTS_AES_128_KEY For AES-128 key derived from 128 bits (SHA256(128 bits)) - ``XTS_AES_128_KEY_DERIVED_FROM_128_EFUSE_BITS``. The FE key will be written in the lower part of eFuse BLOCK_KEY0.

The upper 128 bits are not used and will remain available for reading by software. Using the special mode of the espefuse tool, shown in the ``For burning both keys together`` section below, the user can write their data to it using any espefuse commands. .. code-block:: bash espefuse.py --port PORT burn_key BLOCK_KEY0 flash_encryption_key128.bin XTS_AES_128_KEY_DERIVED_FROM_128_EFUSE_BITS For burning both keys together (Secure Boot and Flash Encryption): .. code-block:: bash espefuse.py --port PORT --chip esp32c2 burn_key_digest secure_boot_signing_key.pem \ burn_key BLOCK_KEY0 flash_encryption_key128.bin XTS_AES_128_KEY_DERIVED_FROM_128_EFUSE_BITS .. only:: SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK .. warning:: For the {IDF_TARGET_NAME} BLOCK9 (BLOCK_KEY5) can not be used by XTS_AES keys. If you only want to enable flash encryption in **Development** mode and want to keep the ability to disable it in the future, Update the {IDF_TARGET_CRYPT_CNT} value in the below command from {IDF_TARGET_CRYPT_CNT_MAX_VAL} to 0x1 (not recommended for production).

.. code-block:: bash espefuse.py --port PORT --chip {IDF_TARGET_PATH_NAME} burn_efuse {IDF_TARGET_CRYPT_CNT} {IDF_TARGET_CRYPT_CNT_MAX_VAL} .. only:: esp32 In the case of {IDF_TARGET_NAME}, you also need to burn the ``FLASH_CRYPT_CONFIG``. It can be done by running: .. code-block:: bash espefuse.py --port PORT --chip {IDF_TARGET_PATH_NAME} burn_efuse FLASH_CRYPT_CONFIG 0xF .. note:: At this point, the flash encryption on the device has been enabled. You may test the flash encryption process as given in step 5. Please note that the security-related eFuses have not been burned at this point. It is recommended that they should be burned in production use cases as explained in step 6. The bootloader and the application binaries for the project must be built with Flash Encryption Release mode with default configurations. Flash encryption Release mode can be set in the menuconfig as follows: .. list:: - :ref:`Enable flash encryption on boot ` :esp32: - :ref:`Select Release mode ` (Note that once Release mode is selected, the ``DISABLE_DL_ENCRYPT`` and ``DISABLE_DL_DECRYPT`` eFuse bits will be burned to disable flash encryption hardware in ROM Download Mode.

) :esp32: - :ref:`Select UART ROM download mode (Permanently disabled (recommended)) ` (Note that this option is only available when :ref:`CONFIG_ESP32_REV_MIN` is set to 3 (ESP32 V3).) The default choice is to keep UART ROM download mode enabled, however it is recommended to permanently disable this mode to reduce the options available to an attacker. :not esp32: - :ref:`Select Release mode ` (Note that once Release mode is selected, the ``EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT`` eFuse bit will be burned to disable flash encryption hardware in ROM Download Mode.) :not esp32: - :ref:`Select UART ROM download mode (Permanently switch to Secure mode (recommended)) `. This is the default option and is recommended. It is also possible to change this configuration setting to permanently disable UART ROM download mode, if this mode is not needed. - :ref:`Select the appropriate bootloader log verbosity ` - Save the configuration and exit. The binaries can be encrypted on the host machine by running: .

. only:: esp32 .. code-block:: bash espsecure.py encrypt_flash_data --keyfile my_flash_encryption_key.bin --address 0x1000 --output bootloader-enc.bin build/bootloader/bootloader.bin espsecure.py encrypt_flash_data --keyfile my_flash_encryption_key.bin --address 0x8000 --output partition-table-enc.bin build/partition_table/partition-table.bin espsecure.py encrypt_flash_data --keyfile my_flash_encryption_key.bin --address 0x10000 --output my-app-enc.bin build/my-app.bin .. only:: not esp32 .. code-block:: bash espsecure.py encrypt_flash_data --aes_xts --keyfile my_flash_encryption_key.bin --address 0x0 --output bootloader-enc.bin build/my-app.bin espsecure.py encrypt_flash_data --aes_xts --keyfile my_flash_encryption_key.bin --address 0x8000 --output partition-table-enc.bin build/partition_table/partition-table.bin espsecure.py encrypt_flash_data --aes_xts --keyfile my_flash_encryption_key.bin --address 0x10000 --output my-app-enc.

bin build/my-app.bin The above files can then be flashed to their respective offset using ``esptool.py``. To see all of the command line options recommended for ``esptool.py``, see the output printed when ``idf.py build`` succeeds. In the above command the offsets are used for a sample firmware, the actual offset for your firmware can be obtained by checking the partition table entry or by running `idf.py partition-table`. When the application contains the following partition: ``otadata``, ``nvs_encryption_keys`` they need to be encrypted as well. Please refer to :ref:`encrypted-partitions` for more details about encrypted partitions. .. note:: If the flashed ciphertext file is not recognized by the {IDF_TARGET_NAME} when it boots, check that the keys match and that the command line arguments match exactly, including the correct offset. It is important to provide the correct offset as the ciphertext changes when the offset changes. .. only:: esp32 If your ESP32 uses non-default :ref:`FLASH_CRYPT_CONFIG value in eFuse ` then you will need to pass the ``--flash_crypt_conf`` argument to ``espsecure.

py`` to set the matching value. This will not happen if the device configured flash encryption by itself but may happen when burning eFuses manually to enable flash encryption. The command ``espsecure.py decrypt_flash_data`` can be used with the same options (and different input/output files), to decrypt ciphertext flash contents or a previously encrypted file. A) Burn security eFuses: .. important:: For production use cases, it is highly recommended to burn all the eFuses listed below. .. list:: :esp32: - ``DISABLE_DL_ENCRYPT``: Disable the UART bootloader encryption access. :esp32: - ``DISABLE_DL_DECRYPT``: Disable the UART bootloader decryption access. :esp32: - ``DISABLE_DL_CACHE``: Disable the UART bootloader flash cache access. :esp32: - ``JTAG_DISABLE``: Disable the JTAG :SOC_EFUSE_DIS_BOOT_REMAP: - ``DIS_BOOT_REMAP``: Disable capability to Remap ROM to RAM address space :SOC_EFUSE_DIS_DOWNLOAD_ICACHE: - ``DIS_DOWNLOAD_ICACHE``: Disable UART cache :SOC_EFUSE_DIS_DOWNLOAD_DCACHE: - ``DIS_DOWNLOAD_DCACHE``: Disable UART cache.

:SOC_EFUSE_HARD_DIS_JTAG: - ``HARD_DIS_JTAG``: Hard disable JTAG peripheral :SOC_EFUSE_DIS_DIRECT_BOOT:- ``DIS_DIRECT_BOOT``: Disable direct boot (legacy SPI boot mode) :SOC_EFUSE_DIS_LEGACY_SPI_BOOT: - ``DIS_LEGACY_SPI_BOOT``: Disable legacy SPI boot mode :SOC_EFUSE_DIS_USB_JTAG: - ``DIS_USB_JTAG``: Disable USB switch to JTAG :SOC_EFUSE_DIS_PAD_JTAG: - ``DIS_PAD_JTAG``: Disable JTAG permanently :not esp32: - ``DIS_DOWNLOAD_MANUAL_ENCRYPT``: Disable UART bootloader encryption access :SOC_EFUSE_DIS_DOWNLOAD_MSPI: - ``DIS_DOWNLOAD_MSPI``: Disable the MSPI access in download mode The respective eFuses can be burned by running: .. code:: bash espefuse.py burn_efuse --port PORT EFUSE_NAME 0x1 .. note:: Please update the EFUSE_NAME with the eFuse that you need to burn. Multiple eFuses can be burned at the same time by appending them to the above command (e.g., EFUSE_NAME VAL EFUSE_NAME2 VAL2). More documentation about `espefuse.

py` can be found `here `_. B) Write protect security eFuses: After burning the respective eFuses we need to write_protect the security configurations .. only:: esp32 .. code:: bash espefuse.py --port PORT write_protect_efuse MAC .. note:: The write disable bit for MAC also write disables DIS_CACHE which is required to prevent accidental burning of this bit. C) Disable UART ROM DL mode: .. warning:: Please burn the following bit at the very end. After this bit is burned, the espefuse tool can no longer be used to burn additional eFuses. .. list:: - ``UART_DOWNLOAD_DIS`` : Disable the UART ROM Download mode. The eFuse can be burned by running: .. code:: bash espefuse.py --port PORT burn_efuse UART_DOWNLOAD_DIS .. only:: not esp32 .. code:: bash espefuse.py --port PORT write_protect_efuse DIS_ICACHE .. note:: The write protection of above eFuse also write protects multiple other eFuses, Please refer to the {IDF_TARGET_NAME} eFuse table for more details.

C) Enable Security Download mode: .. warning:: Please burn the following bit at the very end. After this bit is burned, the espefuse tool can no longer be used to burn additional eFuses. .. list:: - ``ENABLE_SECURITY_DOWNLOAD``: Enable Secure ROM download mode The eFuse can be burned by running: .. code:: bash espefuse.py --port PORT burn_efuse ENABLE_SECURITY_DOWNLOAD .. important:: Once the flash encryption has been enabled for the device, the key **must be deleted immediately**. This ensures that the host cannot produce encrypted binaries for the same device going forward. This step is important to reduce the vulnerability of the flash encryption key. Flash Encryption Guidelines ~~~~~~~~~~~~~~~~~~~~~~~~~~~ .. _enable-secure-boot-v2-externally: Enable Secure Boot V2 Externally In this workflow, we shall use ``espsecure`` tool to generate signing keys and use the ``espefuse`` tool to burn the relevant eFuses.

The details about the Secure Boot V2 process can be found at :doc:`Secure Boot V2 Guide ` .. only:: esp32 or SOC_SECURE_BOOT_V2_RSA The Secure Boot V2 signing key for the RSA3072 scheme can be generated by running: .. code:: bash espsecure.py generate_signing_key --version 2 --scheme rsa3072 secure_boot_signing_key.pem .. only:: SOC_SECURE_BOOT_V2_ECC The Secure Boot V2 signing key for ECDSA scheme can be generated by running: .. code:: bash espsecure.py generate_signing_key --version 2 --scheme ecdsa256 secure_boot_signing_key.pem The scheme in the above command can be changed to ``ecdsa192`` to generate ecdsa192 private key. .. only:: SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS A total of 3 keys can be used for Secure Boot V2 at once. These should be computed independently and stored separately. The same command with different key file names can be used to generate multiple Secure Boot V2 signing keys. It is recommended to use multiple keys in order to reduce dependency on a single key.

The public key digest for the private key generated in the previous step can be generated by running: .. code:: bash espsecure.py digest_sbv2_public_key --keyfile secure_boot_signing_key.pem --output digest.bin .. only:: SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS In case of multiple digests, each digest should be kept in a separate file. The public key digest can be burned in the eFuse by running: .. only:: esp32 .. code:: bash espefuse.py --port PORT --chip esp32 burn_key secure_boot_v2 digest.bin .. only:: esp32c2 .. code:: bash espefuse.py --port PORT --chip esp32c2 burn_key KEY_BLOCK0 SECURE_BOOT_DIGEST digest.bin .. only:: SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS .. code:: bash espefuse.py --port PORT --chip {IDF_TARGET_PATH_NAME} burn_key BLOCK SECURE_BOOT_DIGEST0 digest.bin where ``BLOCK`` is a free keyblock between ``BLOCK_KEY0`` and ``BLOCK_KEY5``. In case of multiple digests, the other digests can be burned sequentially by changing the key purpose to ``SECURE_BOOT_DIGEST1`` and ``SECURE_BOOT_DIGEST2`` respectively.

Secure Boot V2 eFuse can be enabled by running: .. only:: esp32 .. code:: bash espefuse.py --port PORT --chip esp32 burn_efuse ABS_DONE_1 .. only:: not esp32 .. code:: bash espefuse.py --port PORT --chip {IDF_TARGET_PATH_NAME} burn_efuse SECURE_BOOT_EN .. note:: At this stage the secure boot V2 has been enabled for the {IDF_TARGET_NAME}. The ROM bootloader shall now verify the authenticity of the :ref:`second-stage-bootloader` on every bootup. You may test the secure boot process by executing Steps 5 & 6. Please note that security-related eFuses have not been burned at this point. For production use cases, all security-related eFuses must be burned as given in step 7. By default, the ROM bootloader would only verify the :ref:`second-stage-bootloader` (firmware bootloader). The firmware bootloader would verify the app partition only when the :ref:`CONFIG_SECURE_BOOT` option is enabled (and :ref:`CONFIG_SECURE_BOOT_VERSION` is set to ``SECURE_BOOT_V2_ENABLED``) while building the bootloader.

a) Open the :ref:`project-configuration-menu`, in "Security features" set "Enable hardware Secure Boot in bootloader" to enable Secure Boot. .. only:: esp32 For ESP32, Secure Boot V2 is available only for ESP32 ECO3 onwards. To view the "Secure Boot V2" option the chip revision should be changed to revision v3.0 (ECO3). To change the chip revision, set "Minimum Supported ESP32 Revision" to "Rev 3.0 (ECO3)" in "Component Config" -> "Hardware Settings" -> "Chip Revision". .. only:: SOC_SECURE_BOOT_V2_RSA or SOC_SECURE_BOOT_V2_ECC The "Secure Boot V2" option will be selected and the "App Signing Scheme" will be set to {IDF_TARGET_SBV2_DEFAULT_SCHEME} by default. b) Disable the option :ref:`CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES` for the project in the :ref:`project-configuration-menu`. This shall make sure that all the generated binaries are secure padded and unsigned. This step is done to avoid generating signed binaries as we are going to manually sign the binaries using ``espsecure`` tool.

After the above configurations, the bootloader and application binaries can be built with ``idf.py build`` command. The Secure Boot V2 workflow only verifies the ``bootloader`` and ``application`` binaries, hence only those binaries need to be signed. The other binaries (e.g., ``partition-table.bin``) can be flashed as they are generated in the build stage. The ``bootloader.bin`` and ``app.bin`` binaries can be signed by running: .. code:: bash espsecure.py sign_data --version 2 --keyfile secure_boot_signing_key.pem --output bootloader-signed.bin build/bootloader/bootloader.bin espsecure.py sign_data --version 2 --keyfile secure_boot_signing_key.pem --output my-app-signed.bin build/my-app.bin .. only:: SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS If multiple keys secure boot keys are to be used then the same signed binary can be appended with a signature block signed with the new key as follows: .. code:: bash espsecure.py sign_data --keyfile secure_boot_signing_key2.

pem --version 2 --append_signatures -o bootloader-signed2.bin bootloader-signed.bin espsecure.py sign_data --keyfile secure_boot_signing_key2.pem --version 2 --append_signatures -o my-app-signed2.bin my-app-signed.bin The same process can be repeated for the third key. Note that the names of the input and output files must not be the same. The signatures attached to a binary can be checked by running: .. code:: bash espsecure.py signature_info_v2 bootloader-signed.bin The above files along with other binaries (e.g., partition table) can then be flashed to their respective offset using ``esptool.py``. To see all of the command line options recommended for ``esptool.py``, see the output printed when ``idf.py build`` succeeds. The flash offset for your firmware can be obtained by checking the partition table entry or by running ``idf.py partition-table``. A) Burn security eFuses: .. important:: For production use cases, it is highly recommended to burn all the eFuses listed below.

.. list:: :esp32: - ``JTAG_DISABLE``: Disable the JTAG :SOC_EFUSE_DIS_BOOT_REMAP: - ``DIS_BOOT_REMAP``: Disable capability to Remap ROM to RAM address space :SOC_EFUSE_HARD_DIS_JTAG: - ``HARD_DIS_JTAG``: Hard disable JTAG peripheral :SOC_EFUSE_SOFT_DIS_JTAG: - ``SOFT_DIS_JTAG``: Disable software access to JTAG peripheral :SOC_EFUSE_DIS_DIRECT_BOOT:- ``DIS_DIRECT_BOOT``: Disable direct boot (legacy SPI boot mode) :SOC_EFUSE_DIS_LEGACY_SPI_BOOT: - ``DIS_LEGACY_SPI_BOOT``: Disable legacy SPI boot mode :SOC_EFUSE_DIS_USB_JTAG: - ``DIS_USB_JTAG``: Disable USB switch to JTAG :SOC_EFUSE_DIS_PAD_JTAG: - ``DIS_PAD_JTAG``: Disable JTAG permanently :SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS: - ``SECURE_BOOT_AGGRESSIVE_REVOKE``: Aggressive revocation of key digests, see :ref:`secure-boot-v2-aggressive-key-revocation` for more details. The respective eFuses can be burned by running: .. code:: bash espefuse.py burn_efuse --port PORT EFUSE_NAME 0x1 .

. note:: Please update the EFUSE_NAME with the eFuse that you need to burn. Multiple eFuses can be burned at the same time by appending them to the above command (e.g., EFUSE_NAME VAL EFUSE_NAME2 VAL2). More documentation about `espefuse.py` can be found `here `_ B) Secure Boot V2-related eFuses: i) Disable the ability for read protection: The secure boot digest burned in the eFuse must be kept readable otherwise secure boot operation would result in a failure. To prevent the accidental enabling of read protection for this key block we need to burn the following eFuse: .. code:: bash espefuse.py -p $ESPPORT write_protect_efuse RD_DIS .. important:: After this eFuse has been burned, read protection cannot be enabled for any key. E.g., if flash encryption which requires read protection for its key is not enabled at this point then it cannot be enabled afterwards. Please ensure that no eFuse keys are going to need read protection after this.

.. only:: SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS ii) Revoke key digests: The unused digest slots need to be revoked when we are burning the secure boot key. The respective slots can be revoked by running .. code:: bash espefuse.py --port PORT --chip {IDF_TARGET_PATH_NAME} burn_efuse EFUSE_REVOKE_BIT The ``EFUSE_REVOKE_BIT`` in the above command can be ``SECURE_BOOT_KEY_REVOKE0`` or ``SECURE_BOOT_KEY_REVOKE1`` or ``SECURE_BOOT_KEY_REVOKE2``. Please note that only the unused key digests must be revoked. Once revoked, the respective digest cannot be used again. .. only:: esp32 C) Disable UART ROM DL mode: .. warning:: Please burn the following bit at the very end. After this bit is burned, the espefuse tool can no longer be used to burn additional eFuses. .. list:: - ``UART_DOWNLOAD_DIS`` : Disable the UART ROM Download mode. The eFuse can be burned by running: .. code:: bash espefuse.

py --port PORT burn_efuse UART_DOWNLOAD_DIS .. only:: not esp32 C) Enable Security Download mode: .. warning:: Please burn the following bit at the very end. After this bit is burned, the espefuse tool can no longer be used to burn additional eFuses. .. list:: - ``ENABLE_SECURITY_DOWNLOAD``: Enable Secure ROM download mode The eFuse can be burned by running: .. code:: bash espefuse.py --port PORT burn_efuse ENABLE_SECURITY_DOWNLOAD Secure Boot V2 Guidelines ~~~~~~~~~~~~~~~~~~~~~~~~~ .. only:: SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS

Secure Boot .. important:: All references in this document are related to Secure Boot V1, i.e., the AES-based Secure Boot Scheme. For ESP32 v3.0 onwards, the preferred secure boot scheme is :doc:`secure-boot-v2`. Please refer to :doc:`secure-boot-v2` for ESP32 v3.0 or ESP32-S2. Secure boot is a feature for ensuring only your code can run on the chip. Data loaded from flash is verified on each reset. Secure boot is separate from the :doc:`flash-encryption` feature, and you can use secure boot without encrypting the flash contents. However, for a secure environment, both should be used simultaneously. See :ref:`secure-boot-and-flash-encr` for more details. .. important:: Enabling secure boot limits your options for further updates of your {IDF_TARGET_NAME}. Make sure to read this document thoroughly and understand the implications of enabling secure boot. Background - Most data is stored in flash. Flash access does not need to be protected from physical access for secure boot to function, because critical data is stored in eFuses internal to the chip and is non-software-accessible.

- eFuses are used to store the secure boot information permanently. The secure boot key is stored in eFuse BLOCK2, and also, a single eFuse bit ABS_DONE_0 is burned, or written to 1, to permanently enable secure boot on the chip. For more details on eFuses, see *{IDF_TARGET_NAME} Technical Reference Manual* > *eFuse Controller (EFUSE)* [`PDF `__]. - To understand the secure boot process, please familiarize yourself with the standard :doc:`../api-guides/startup`. - Both stages of the boot process, including initial software bootloader load and subsequent partition & app loading, are verified by the secure boot process, in a chain of trust relationship. Secure Boot Process Overview This is a high-level overview of the secure boot process. Step-by-step instructions are supplied under :ref:`secure-boot-how-to`. Further in-depth details are supplied under :ref:`secure-boot-technical-details`: - Hardware secure boot support generates a device-secure bootloader key and a secure digest.

The secure bootloader key is generated with the help of the hardware RNG, and then stored in eFuse with read and write protection enabled. The digest is derived from the key, an initialization vector (IV), and the bootloader image contents. - The secure digest is flashed at offset 0x0 in the flash. - Depending on Secure Boot Configuration, eFuses are burned to disable JTAG and the ROM BASIC interpreter. It is **strongly recommended** that these options are turned on. - Bootloader permanently enables secure boot by burning the ABS_DONE_0 eFuse. The software bootloader then becomes protected. After this point, the chip will only boot a bootloader image if the digest matches. Keys The following keys are used by the secure boot process: - The secure bootloader key is a 256-bit AES key that is stored in eFuse block 2. The bootloader can generate this key itself from the internal hardware random number generator, and you do not need to supply it. It is optionally possible to supply this key, see :ref:`secure-boot-reflashable`.

The eFuse holding this key is read and write protected before the secure boot is enabled to prevent further software access of the key. - By default, the eFuse Block 2 Coding Scheme is ``None`` and a 256-bit key is stored in this block. On some versions of {IDF_TARGET_NAME}s, the Coding Scheme is set to ``3/4 Encoding`` with CODING_SCHEME eFuse has value 1, and a 192-bit key must be stored in this block. .. only:: esp32 For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *eFuse Controller (EFUSE)* > *System Parameter coding_scheme* [`PDF `__]. The algorithm operates on a 256-bit key in all cases. 192-bit keys are extended by repeating some bits, see :ref:`secure-bootloader-digest-algorithm`. - ``secure boot signing key`` is a standard ECDSA public/private key pair in PEM format, see :ref:`secure-boot-image-signing-algorithm`. - The public key from this key pair is compiled into the software bootloader. It is only used for signature verification purposes and not signature creation.

This public key is used to verify the second stage of booting, including the partition table and app image, before booting continues. The public key can be freely distributed; it does not need to be kept secret. - The private key from this key pair **must be securely kept private**, as anyone who has this key can authenticate to any bootloader that is configured with a secure boot and the matching public key. Bootloader Size Enabling secure boot and/or flash encryption will increase the size of the bootloader, which might require updating the partition table offset. See :ref:`bootloader-size`. .. _secure-boot-how-to: How to Enable Secure Boot .. important:: A signing key generated this way will use the best random number source available to the OS and its Python installation, i.e., `/dev/urandom` on OSX/Linux and `CryptGenRandom()` on Windows. If this random number source is weak, then the private key will be weak. .. important:: For production environments, we recommend generating the key pair using OpenSSL or another industry-standard encryption program.

See :ref:`secure-boot-generate-key` for more details. .. _secure-boot-resume-normal-flashing: .. note:: ``idf.py flash`` does not flash the bootloader if secure boot is enabled. .. note:: The secure boot will not be enabled until after a valid partition table and app image have been flashed. This is to prevent accidents before the system is fully configured. .. note:: If {IDF_TARGET_NAME} is reset or powered down during the first boot, it will start the process again on the next boot. .. _secure-boot-reflashable: Reflashable Software Bootloader Configuration ``Secure Boot: One-Time Flash`` is the recommended configuration for production devices. In this mode, each device gets a unique key that is never stored outside the device. However, an alternative mode :ref:`CONFIG_SECURE_BOOTLOADER_MODE` is also available. This mode allows you to supply a binary key file that is used for the secure bootloader key. As you have the key file, you can generate new bootloader images and secure boot digests for them.

In the ESP-IDF build process, this 256-bit key file is derived from the ECDSA app signing key generated by the user, see the :ref:`secure-boot-generate-key` step below. This private key's SHA-256 digest is used as the secure bootloader key in eFuse, as-is for Coding Scheme ``None``, or truncated to 192 bytes for ``3/4 Encoding``. This is a convenience so you only need to generate or protect a single private key. .. note:: Although it is possible, we strongly recommend not generating one secure boot key and flashing it to every device in a production environment. The ``One-Time Flash`` option is recommended for production environments. To enable a reflashable bootloader: .. _secure-boot-generate-key: Generating Secure Boot Signing Key The build system will prompt you with a command to generate a new signing key via ``espsecure.py generate_signing_key``. This uses the python-ecdsa library, which in turn uses Python's ``os.urandom()`` as a random number source. The strength of the signing key is proportional to the random number source of the system, and the correctness of the algorithm used.

For production devices, we recommend generating signing keys from a system with a quality entropy source and using the best available EC key generation utilities. For example, to generate a signing key using the OpenSSL command line: .. code-block:: openssl ecparam -name prime256v1 -genkey -noout -out my_secure_boot_signing_key.pem Remember that the strength of the secure boot system depends on keeping the signing key private. .. _remote-sign-image: Remote Signing of Images For production builds, it can be good practice to use a remote signing server rather than have the signing key on the build machine, which is the default ESP-IDF secure boot configuration. The ``espsecure.py`` command line program can be used to sign app images & partition table data for secure boot, on a remote system. To use remote signing, disable the option ``Sign binaries during build``. The private signing key does not need to be present on the build system. However, the public signature verification key is required because it is compiled into the bootloader, and can be used to verify image signatures during OTA updates.

To extract the public key from the private key: .. code-block:: espsecure.py extract_public_key --keyfile PRIVATE_SIGNING_KEY PUBLIC_VERIFICATION_KEY The path to the public signature verification key needs to be specified in the menuconfig under ``Secure boot public signature verification key`` in order to build the secure bootloader. After the app image and partition table are built, the build system will print signing steps using ``espsecure.py``: .. code-block:: espsecure.py sign_data --keyfile PRIVATE_SIGNING_KEY BINARY_FILE The above command appends the image signature to the existing binary. You can use the `--output` argument to write the signed binary to a separate file: .. code-block:: espsecure.py sign_data --keyfile PRIVATE_SIGNING_KEY --output SIGNED_BINARY_FILE BINARY_FILE Secure Boot Best Practices .. _secure-boot-technical-details: Technical Details The following sections contain low-level reference descriptions of various secure boot elements: .

. _secure-boot-hardware-support: Secure Boot Hardware Support ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The first stage of secure boot verification, i.e., checking the software bootloader, is done via hardware. The {IDF_TARGET_NAME}'s secure boot support hardware can perform three basic operations: .. _secure-bootloader-digest-algorithm: Secure Bootloader Digest Algorithm ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Starting with an "image" of binary data as input, this algorithm generates a digest as output. The digest is sometimes referred to as an "abstract" in hardware documentation. For a Python version of this algorithm, see the ``espsecure.py`` tool in the :component:`/esptool_py` directory. Specifically, the ``digest_secure_bootloader`` command. Items marked with (^) are to fulfill hardware restrictions, as opposed to cryptographic restrictions. - Reverse the byte order of the plaintext input block. (^) - Apply AES256 in ECB mode to the plaintext block. - Reverse the byte order of the ciphertext output block.

(^) - Append to the overall ciphertext output. Output digest is 192 bytes of data: the 128-byte IV, followed by the 64-byte SHA-512 digest. .. _secure-boot-image-signing-algorithm: Image Signing Algorithm ~~~~~~~~~~~~~~~~~~~~~~~ Deterministic ECDSA as specified by `RFC 6979 `_. - Curve is NIST256p. OpenSSL calls this curve prime256v1, and it is also sometimes called secp256r1. - The hash function is SHA256. - The key format used for storage is PEM. - In the bootloader, the public key for signature verification is flashed as 64 raw bytes. - Image signature is 68 bytes: a 4-byte version word (currently zero), followed by 64 bytes of signature data. These 68 bytes are appended to an app image or partition table data. Manual Commands ~~~~~~~~~~~~~~~ Secure boot is integrated into the ESP-IDF build system, so ``idf.py build`` will automatically sign an app image if secure boot is enabled. ``idf.py bootloader`` will produce a bootloader digest if menuconfig is configured for it.

However, it is possible to use the ``espsecure.py`` tool to make standalone signatures and digests. To sign a binary image: .. code-block:: espsecure.py sign_data --keyfile ./my_signing_key.pem --output ./image_signed.bin image-unsigned.bin The keyfile is the PEM file containing an ECDSA private signing key. To generate a bootloader digest: .. code-block:: espsecure.py digest_secure_bootloader --keyfile ./securebootkey.bin --output ./bootloader-digest.bin build/bootloader/bootloader.bin The keyfile is the 32-byte raw secure boot key for the device. The output of the ``espsecure.py digest_secure_bootloader`` command is a single file that contains both the digest and the bootloader appended to it. To flash the combined digest plus bootloader to the device: .. code-block:: esptool.py write_flash 0x0 bootloader-digest.bin .. _secure-boot-and-flash-encr: Secure Boot & Flash Encryption If secure boot is used without :doc:`flash-encryption`, it is possible to launch a ``time-of-check to time-of-use`` attack, where flash contents are swapped after the image is verified and running.

Therefore, it is recommended to use both features together. .. _signed-app-verify: Signed App Verification Without Hardware Secure Boot The integrity of apps can be checked even without enabling the hardware secure boot option. This option uses the same app signature scheme as hardware secure boot, but unlike hardware secure boot, it does not prevent the bootloader from being physically updated. This means that the device can be secured against remote network access, but not physical access. Compared to using hardware secure boot, this option is much simpler to implement. See :ref:`signed-app-verify-how-to` for step-by-step instructions. An app can be verified on update and, optionally, be verified on boot. - Verification on update: When enabled, the signature is automatically checked whenever the ``esp_ota_ops.h`` APIs are used for OTA updates. If hardware secure boot is enabled, this option is always enabled and cannot be disabled. If hardware secure boot is not enabled, this option still adds significant security against network-based attackers by preventing spoofing of OTA updates.

- Verification on boot: When enabled, the bootloader will be compiled with code to verify that an app is signed before booting it. If hardware secure boot is enabled, this option is always enabled and cannot be disabled. If hardware secure boot is not enabled, this option does not add significant security by itself so most users will want to leave it disabled. .. _signed-app-verify-how-to: How To Enable Signed App Verification ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ In this case, the private signing key should be generated by following instructions in :ref:`secure-boot-generate-key`; the public verification key and signed image should be generated by following instructions in :ref:`remote-sign-image`. Advanced Features JTAG Debugging ~~~~~~~~~~~~~~ By default, when secure boot is enabled, JTAG debugging is disabled via eFuse. The bootloader does this on the first boot, at the same time it enables secure boot. See :ref:`jtag-debugging-security-features` for more information about using JTAG Debugging with either secure boot or signed app verification enabled.

:orphan: Secure Boot V2 {IDF_TARGET_SBV2_SCHEME:default="RSA-PSS", esp32c2="ECDSA", esp32c6="RSA-PSS or ECDSA", esp32h2="RSA-PSS or ECDSA", esp32p4="RSA-PSS or ECDSA"} {IDF_TARGET_SBV2_KEY:default="RSA-3072", esp32c2="ECDSA-256 or ECDSA-192", esp32c6="RSA-3072, ECDSA-256, or ECDSA-192", esp32h2="RSA-3072, ECDSA-256, or ECDSA-192", esp32p4="RSA-3072, ECDSA-256, or ECDSA-192"} {IDF_TARGET_SECURE_BOOT_OPTION_TEXT:default="", esp32c6="RSA is recommended because of faster verification time. You can choose between RSA and ECDSA scheme from the menu.", esp32h2="RSA is recommended because of faster verification time. You can choose between RSA and ECDSA scheme from the menu.", esp32p4="RSA is recommended because of faster verification time. You can choose between RSA and ECDSA scheme from the menu."} {IDF_TARGET_ECO_VERSION:default="", esp32="(ECO 3 onwards)", esp32c3="(ECO 3 onwards)"} {IDF_TARGET_RSA_TIME:default="", esp32c6="~2.7 ms", esp32h2="~4.5 ms"} {IDF_TARGET_ECDSA_TIME:default="", esp32c6="~21.

5 ms", esp32h2="~36 ms"} {IDF_TARGET_CPU_FREQ:default="", esp32c6="160 MHz", esp32h2="96 MHz"} {IDF_TARGET_SBV2_DEFAULT_SCHEME:default="RSA", esp32c2="ECDSA (V2)"} .. important:: This document is about Secure Boot V2, supported on {IDF_TARGET_NAME} {IDF_TARGET_ECO_VERSION} .. only:: esp32 For ESP32 before ECO3, refer to :doc:`secure-boot-v1`. It is recommended that users use Secure Boot V2 if they have a chip version that supports it. Secure Boot V2 is safer and more flexible than Secure Boot V1. Secure Boot V2 uses {IDF_TARGET_SBV2_SCHEME} based app and bootloader (:ref:`second-stage-bootloader`) verification. This document can also be used as a reference for signing apps using the {IDF_TARGET_SBV2_SCHEME} scheme without signing the bootloader. .. only:: esp32 ``Secure Boot V2`` and RSA scheme (``App Signing Scheme``) options are available for ESP32 from ECO3 onwards. To use these options in menuconfig, set :ref:`CONFIG_ESP32_REV_MIN` greater than or equal to `Rev 3`.

.. only:: esp32c3 ``Secure Boot V2`` is available for ESP32-C3 from ECO3 onwards. To use these options in menuconfig, set :ref:`CONFIG_ESP32C3_REV_MIN` greater than or equal to `Rev 3`. Background Secure Boot protects a device from running any unauthorized (i.e., unsigned) code by checking that each piece of software that is being booted is signed. On an {IDF_TARGET_NAME}, these pieces of software include the second stage bootloader and each application binary. Note that the first stage bootloader does not require signing as it is ROM code thus cannot be changed. .. only:: esp32 or (SOC_SECURE_BOOT_V2_RSA and not SOC_SECURE_BOOT_V2_ECC) A RSA based Secure Boot verification scheme (Secure Boot V2) is implemented on {IDF_TARGET_NAME} {IDF_TARGET_ECO_VERSION}. .. only:: SOC_SECURE_BOOT_V2_ECC and not SOC_SECURE_BOOT_V2_RSA A ECC based Secure Boot verification scheme (Secure Boot V2) has been introduce on {IDF_TARGET_NAME} .. only:: SOC_SECURE_BOOT_V2_RSA and SOC_SECURE_BOOT_V2_ECC {IDF_TARGET_NAME} has provision to choose between a {IDF_TARGET_SBV2_SCHEME} based secure boot verification scheme.

The Secure Boot process on the {IDF_TARGET_NAME} involves the following steps: Advantages - The {IDF_TARGET_SBV2_SCHEME} public key is stored on the device. The corresponding {IDF_TARGET_SBV2_SCHEME} private key is kept at a secret place and is never accessed by the device. .. only:: esp32 or esp32c2 - Only one public key can be generated and stored in the chip during manufacturing. .. only:: SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS - Up to three public keys can be generated and stored in the chip during manufacturing. - {IDF_TARGET_NAME} provides the facility to permanently revoke individual public keys. This can be configured conservatively or aggressively. - Conservatively - The old key is revoked after the bootloader and application have successfully migrated to a new key. Aggressively - The key is revoked as soon as verification with this key fails. - Same image format and signature verification method is applied for applications and software bootloader. - No secrets are stored on the device.

Therefore, it is immune to passive side-channel attacks (timing or power analysis, etc.) Secure Boot V2 Process This is an overview of the Secure Boot V2 Process. Instructions how to enable Secure Boot are supplied in section :ref:`secure-boot-v2-howto`. Secure Boot V2 verifies the bootloader image and application binary images using a dedicated *signature block*. Each image has a separately generated signature block which is appended to the end of the image. .. only:: esp32 Only one signature block can be appended to the bootloader or application image in ESP32 ECO3. .. only:: esp32c2 Only one signature block can be appended to the bootloader or application image in {IDF_TARGET_NAME} .. only:: SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS Up to 3 signature blocks can be appended to the bootloader or application image in {IDF_TARGET_NAME}. Each signature block contains a signature of the preceding image as well as the corresponding {IDF_TARGET_SBV2_KEY} public key. For more details about the format, refer to :ref:`signature-block-format`.

A digest of the {IDF_TARGET_SBV2_KEY} public key is stored in the eFuse. The application image is not only verified on every boot but also on each over the air (OTA) update. If the currently selected OTA app image cannot be verified, the bootloader will fall back and look for another correctly signed application image. The Secure Boot V2 process follows these steps: .. _signature-block-format: Signature Block Format The signature block starts on a 4 KB aligned boundary and has a flash sector of its own. The signature is calculated over all bytes in the image including the padding bytes (:ref:`secure_padding`). .. only:: SOC_SECURE_BOOT_V2_RSA and SOC_SECURE_BOOT_V2_ECC .. note:: {IDF_TARGET_NAME} has a provision to choose between RSA scheme and ECDSA scheme. Only one scheme can be used per device. ECDSA provides similar security strength, compared to RSA, with shorter key lengths. Current estimates are that ECDSA with curve P-256 has an approximate equivalent strength to RSA with 3072-bit keys.

However, ECDSA signature verification takes considerably more amount of time as compared to RSA signature verification. RSA is recommended for use cases where fast bootup time is required whereas ECDSA is recommended for use cases where shorter key length is required. .. only:: not esp32p4 .. list-table:: Comparison between signature verification time :widths: 10 10 20 :header-rows: 1 - **Time** - **CPU Frequency** - {IDF_TARGET_RSA_TIME} - {IDF_TARGET_CPU_FREQ} - {IDF_TARGET_ECDSA_TIME} - {IDF_TARGET_CPU_FREQ} The above table compares the time taken to verify a signature in a particular scheme. It does not indicate the bootup time. The content of each signature block is shown in the following table: .. only:: esp32 or SOC_SECURE_BOOT_V2_RSA .. list-table:: Content of a RSA Signature Block :widths: 10 10 40 :header-rows: 1 - **Size (bytes)** - **Description** - 1 - Magic byte - 1 - Version number byte (currently 0x02), 0x01 is for Secure Boot V1.

- 2 - Padding bytes, Reserved. Should be zero. - 32 - SHA-256 hash of only the image content, not including the signature block. - 384 - RSA Public Modulus used for signature verification. (value ‘n’ in RFC8017). - 4 - RSA Public Exponent used for signature verification (value ‘e’ in RFC8017). - 384 - Pre-calculated R, derived from ‘n’. - 4 - Pre-calculated M’, derived from ‘n’ - 384 - RSA-PSS Signature result (section 8.1.1 of RFC8017) of image content, computed using following PSS parameters: SHA256 hash, MGF1 function, salt length 32 bytes, default trailer field (0xBC). - 4 - CRC32 of the preceding 1196 bytes. - 16 - Zero padding to length 1216 bytes. .. note:: R and M' are used for hardware-assisted Montgomery Multiplication. .. only:: SOC_SECURE_BOOT_V2_ECC .. list-table:: Content of a ECDSA Signature Block :widths: 10 10 40 :header-rows: 1 - **Size (bytes)** - **Description** - 1 - Magic byte.

- 1 - Version number byte (currently 0x03). - 2 - Padding bytes, Reserved. Should be zero. - 32 - SHA-256 hash of only the image content, not including the signature block. - 1 - Curve ID (1 for NIST192p curve. 2 for NIST256p curve). - 64 - ECDSA Public key: 32 byte X coordinate followed by 32 byte Y coordinate. - 64 - ECDSA Signature result (section 5.3.2 of RFC6090) of the image content: 32 byte R component followed by 32 byte S component. - 1031 - Reserved. - 4 - CRC32 of the preceding 1196 bytes. - 16 - Zero padding to length 1216 bytes. The remainder of the signature sector is erased flash (0xFF) which allows writing other signature blocks after previous signature block. .. _secure_padding: Secure Padding In Secure Boot V2 scheme, the application image is padded to the flash MMU page size boundary to ensure that only verified contents are mapped in the internal address space.

This is known as secure padding. Signature of the image is calculated after padding and then signature block (4KB) gets appended to the image. .. list:: - Default flash MMU page size is 64KB :SOC_MMU_PAGE_SIZE_CONFIGURABLE: - {IDF_TARGET_NAME} supports configurable flash MMU page size, it (``CONFIG_MMU_PAGE_SIZE``) gets set based on the :ref:`CONFIG_ESPTOOLPY_FLASHSIZE` - Secure padding is applied through the option ``--secure-pad-v2`` in the ``elf2image`` conversion using ``esptool.py`` Following table explains the Secure Boot V2 signed image with secure padding and signature block appended: .. list-table:: Contents of a signed application :widths: 20 20 20 :header-rows: 1 - **Size (KB)** - **Description** - 580 - Unsigned application size (as an example) - 60 - Secure padding (aligned to next 64KB boundary) - 4 - Signature block .. note:: Please note that the application image always starts on the next flash MMU page size boundary (default 64KB) and hence the space left over after the signature block shown above can be utilized to store any other data partitions (e.

g., ``nvs``). .. _verify_signature-block: Verifying a Signature Block A signature block is "valid" if the first byte is 0xe7 and a valid CRC32 is stored at offset 1196. Otherwise it is invalid. .. _verify_image: Verifying an Image An image is "verified" if the public key stored in any signature block is valid for this device, and if the stored signature is valid for the image data read from flash. .. only:: esp32 or (SOC_SECURE_BOOT_V2_RSA and not SOC_SECURE_BOOT_V2_ECC) .. only:: SOC_SECURE_BOOT_V2_ECC and not SOC_SECURE_BOOT_V2_RSA .. only:: SOC_SECURE_BOOT_V2_ECC and SOC_SECURE_BOOT_V2_RSA Bootloader Size Enabling Secure boot and/or flash encryption will increase the size of bootloader, which might require updating partition table offset. See :ref:`bootloader-size`. In the case when :ref:`CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES` is disabled, the bootloader is sector padded (4KB) using the ``--pad-to-size`` option in ``elf2image`` command of ``esptool``. .. _efuse-usage: eFuse Usage .

. only:: esp32 ESP32-ECO3: - ABS_DONE_1 - Enables Secure Boot protection on boot. - BLK2 - Stores the SHA-256 digest of the public key. SHA-256 hash of public key modulus, exponent, pre-calculated R & M' values (represented as 776 bytes – offsets 36 to 812 - as per the :ref:`signature-block-format`) is written to an eFuse key block. The write-protection bit must be set, but the read-protection bit must not. .. only:: not esp32 - SECURE_BOOT_EN - Enables Secure Boot protection on boot. .. only:: SOC_EFUSE_KEY_PURPOSE_FIELD - KEY_PURPOSE_X - Set the purpose of the key block on {IDF_TARGET_NAME} by programming SECURE_BOOT_DIGESTX (X = 0, 1, 2) into KEY_PURPOSE_X (X = 0, 1, 2, 3, 4, 5). Example: If KEY_PURPOSE_2 is set to SECURE_BOOT_DIGEST1, then BLOCK_KEY2 will have the Secure Boot V2 public key digest. The write-protection bit must be set (this field does not have a read-protection bit). - BLOCK_KEYX - The block contains the data corresponding to its purpose programmed in KEY_PURPOSE_X.

Stores the SHA-256 digest of the public key. SHA-256 hash of public key modulus, exponent, pre-calculated R & M' values (represented as 776 bytes – offsets 36 to 812 - as per the :ref:`signature-block-format`) is written to an eFuse key block. The write-protection bit must be set, but the read-protection bit must not. - KEY_REVOKEX - The revocation bits corresponding to each of the 3 key block. Ex. Setting KEY_REVOKE2 revokes the key block whose key purpose is SECURE_BOOT_DIGEST2. - SECURE_BOOT_AGGRESSIVE_REVOKE - Enables aggressive revocation of keys. The key is revoked as soon as verification with this key fails. To ensure no trusted keys can be added later by an attacker, each unused key digest slot should be revoked (KEY_REVOKEX). It will be checked during app startup in :cpp:func:`esp_secure_boot_init_checks` and fixed unless :ref:`CONFIG_SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS` is enabled. The key(s) must be readable in order to give software access to it. If the key(s) is read-protected then the software reads the key(s) as all zeros and the signature verification process will fail, and the boot process will be aborted.

.. _secure-boot-v2-howto: How To Enable Secure Boot V2 .. only:: esp32 .. only:: SOC_SECURE_BOOT_V2_RSA or SOC_SECURE_BOOT_V2_ECC .. important:: A signing key generated this way will use the best random number source available to the OS and its Python installation (`/dev/urandom` on OSX/Linux and `CryptGenRandom()` on Windows). If this random number source is weak, then the private key will be weak. .. important:: For production environments, we recommend generating the key pair using openssl or another industry standard encryption program. See :ref:`secure-boot-v2-generate-key` for more details. .. note:: ``idf.py flash`` does not flash the bootloader if Secure Boot is enabled. .. note:: Secure boot will not be enabled until after a valid partition table and app image have been flashed. This is to prevent accidents before the system is fully configured. .. note:: If the {IDF_TARGET_NAME} is reset or powered down during the first boot, it will start the process again on the next boot.

Restrictions After Secure Boot Is Enabled - Any updated bootloader or app will need to be signed with a key matching the digest already stored in eFuse. - After Secure Boot is enabled, no further eFuses can be read protected. (If :doc:`/security/flash-encryption` is enabled then the bootloader will ensure that any flash encryption key generated on first boot will already be read protected.) If :ref:`CONFIG_SECURE_BOOT_INSECURE` is enabled then this behavior can be disabled, but this is not recommended. - Please note that enabling Secure Boot or flash encryption disables the USB-OTG USB stack in the ROM, disallowing updates via the serial emulation or Device Firmware Update (DFU) on that port. .. _secure-boot-v2-generate-key: Generating Secure Boot Signing Key The build system will prompt you with a command to generate a new signing key via ``espsecure.py generate_signing_key``. .. only:: esp32 or SOC_SECURE_BOOT_V2_RSA The ``--version 2`` parameter will generate the RSA 3072 private key for Secure Boot V2.

Additionally ``--scheme rsa3072`` can be passed as well to generate RSA 3072 private key .. only:: SOC_SECURE_BOOT_V2_ECC Select the ECDSA scheme by passing ``--version 2 --scheme ecdsa256`` or ``--version 2 --scheme ecdsa192`` to generate corresponding ECDSA private key The strength of the signing key is proportional to (a) the random number source of the system, and (b) the correctness of the algorithm used. For production devices, we recommend generating signing keys from a system with a quality entropy source, and using the best available {IDF_TARGET_SBV2_SCHEME} key generation utilities. For example, to generate a signing key using the openssl command line: .. only:: esp32 or SOC_SECURE_BOOT_V2_RSA For RSA 3072 .. only:: SOC_SECURE_BOOT_V2_ECC For ECC NIST192p curve For ECC NIST256p curve Remember that the strength of the Secure Boot system depends on keeping the signing key private. .. _remote-sign-v2-image: Remote Signing of Images Signing Using ``espsecure.

py`` ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ For production builds, it can be good practice to use a remote signing server rather than have the signing key on the build machine (which is the default esp-idf Secure Boot configuration). The espsecure.py command line program can be used to sign app images & partition table data for Secure Boot, on a remote system. To use remote signing, disable the option :ref:`CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES` and build the firmware. The private signing key does not need to be present on the build system. After the app image and partition table are built, the build system will print signing steps using espsecure.py:: espsecure.py sign_data BINARY_FILE --version 2 --keyfile PRIVATE_SIGNING_KEY The above command appends the image signature to the existing binary. You can use the `--output` argument to write the signed binary to a separate file:: espsecure.py sign_data --version 2 --keyfile PRIVATE_SIGNING_KEY --output SIGNED_BINARY_FILE BINARY_FILE Signing Using Pre-calculated Signatures ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ If you have valid pre-calculated signatures generated for an image and their corresponding public keys, you can use these signatures to generate a signature sector and append it to the image.

Note that the pre-calculated signature should be calculated over all bytes in the image including the secure-padding bytes. In such cases, the firmware image should be built by disabling the option :ref:`CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES`. This image will be secure-padded and to generate a signed binary use the following command:: espsecure.py sign_data --version 2 --pub-key PUBLIC_SIGNING_KEY --signature SIGNATURE_FILE --output SIGNED_BINARY_FILE BINARY_FILE The above command verifies the signature, generates a signature block (refer to :ref:`signature-block-format`) and appends it to the binary file. Signing Using an External Hardware Security Module (HSM) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ For security reasons, you might also use an external Hardware Security Module (HSM) to store your private signing key, which cannot be accessed directly but has an interface to generate the signature of a binary file and its corresponding public key. In such cases, disable the option :ref:`CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES` and build the firmware.

This secure-padded image then can be used to supply the external HSM for generating a signature. Refer to `Signing using an External HSM `_ to generate a signed image. .. only:: SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS .. note:: For all the above three remote signing workflows, the signed binary is written to the filename provided to the ``--output`` argument and the option ``--append_signatures`` allows us to append multiple signatures (up to 3) the image. .. only:: not SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS .. note:: For all the above three remote signing workflows, the signed binary is written to the filename provided to the ``--output`` argument. Secure Boot Best Practices .. only:: SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS Key Management Multiple Keys espsecure.py sign_data -k secure_boot_signing_key2.pem -v 2 --append_signatures -o signed_bootloader.bin build/bootloader/bootloader.bin espsecure.py signature_info_v2 datafile.bin Key Revocation .

. note:: Note that enabling the config :ref:`CONFIG_SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS` only makes sure that the **app** does not revoke the unused digest slots. But if you plan to enable secure boot during the fist boot up, the bootloader will intentionally revoke the unused digest slots while enabling secure boot, even if the above config is enabled because keeping the unused key slots un-revoked would a security hazard. In case for any development workflow if you need to avoid this revocation, you should enable secure boot externally (:ref:`enable-secure-boot-v2-externally`) rather than enabling it during the boot up, so that the bootloader would not need to enable secure boot and thus you could avoid its revocation strategy. Conservative Approach: ~~~~~~~~~~~~~~~~~~~~~~ Assuming a trusted private key (N-1) has been compromised, to update to new key pair (N). .. _secure-boot-v2-aggressive-key-revocation: Aggressive Approach: ~~~~~~~~~~~~~~~~~~~~ ROM code has an additional feature of revoking a public key digest if the signature verification fails.

To enable this feature, you need to burn SECURE_BOOT_AGGRESSIVE_REVOKE efuse or enable :ref:`CONFIG_SECURE_BOOT_ENABLE_AGGRESSIVE_KEY_REVOKE` Key revocation is not applicable unless secure boot is successfully enabled. Also, a key is not revoked in case of invalid signature block or invalid image digest, it is only revoked in case the signature verification fails, i.e., revoke key only if failure in step 3 of :ref:`verify_image` Once a key is revoked, it can never be used for verfying a signature of an image. This feature provides strong resistance against physical attacks on the device. However, this could also brick the device permanently if all the keys are revoked because of signature verification failure. .. _secure-boot-v2-technical-details: Technical Details The following sections contain low-level reference descriptions of various Secure Boot elements: Manual Commands ~~~~~~~~~~~~~~~ Secure boot is integrated into the esp-idf build system, so ``idf.py build`` will sign an app image and ``idf.

py bootloader`` will produce a signed bootloader if secure signed binaries on build is enabled. However, it is possible to use the ``espsecure.py`` tool to make standalone signatures and digests. To sign a binary image:: espsecure.py sign_data --version 2 --keyfile ./my_signing_key.pem --output ./image_signed.bin image-unsigned.bin Keyfile is the PEM file containing an {IDF_TARGET_SBV2_KEY} private signing key. .. _secure-boot-v2-and-flash-encr: Secure Boot & Flash Encryption If Secure Boot is used without :doc:`flash-encryption`, it is possible to launch "time-of-check to time-of-use" attack, where flash contents are swapped after the image is verified and running. Therefore, it is recommended to use both the features together. .. only:: esp32c2 .. important:: {IDF_TARGET_NAME} has only one eFuse key block, which is used for both keys: Secure Boot and Flash Encryption. The eFuse key block can only be burned once. Therefore these keys should be burned together at the same time.

Please note that "Secure Boot" and "Flash Encryption" can not be enabled separately as subsequent writes to eFuse key block shall return an error. .. _signed-app-verify-v2: Signed App Verification Without Hardware Secure Boot The Secure Boot V2 signature of apps can be checked on OTA update, without enabling the hardware Secure Boot option. This option uses the same app signature scheme as Secure Boot V2, but unlike hardware Secure Boot it does not prevent an attacker who can write to flash from bypassing the signature protection. This may be desirable in cases where the delay of Secure Boot verification on startup is unacceptable, and/or where the threat model does not include physical access or attackers writing to bootloader or app partitions in flash. In this mode, the public key which is present in the signature block of the currently running app will be used to verify the signature of a newly updated app. (The signature on the running app is not verified during the update process, it is assumed to be valid.

) In this way the system creates a chain of trust from the running app to the newly updated app. For this reason, it is essential that the initial app flashed to the device is also signed. A check is run on app startup and the app will abort if no signatures are found. This is to try and prevent a situation where no update is possible. The app should have only one valid signature block in the first position. Note again that, unlike hardware Secure Boot V2, the signature of the running app is not verified on boot. The system only verifies a signature block in the first position and ignores any other appended signatures. .. only:: not esp32 Although multiple trusted keys are supported when using hardware Secure Boot, only the first public key in the signature block is used to verify updates if signature checking without Secure Boot is configured. If multiple trusted public keys are required, it is necessary to enable the full Secure Boot feature instead. .. note:: In general, it is recommended to use full hardware Secure Boot unless certain that this option is sufficient for application security needs.

.. _signed-app-verify-v2-howto: How To Enable Signed App Verification ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .. only:: esp32 .. only:: SOC_SECURE_BOOT_V2_RSA and not SOC_SECURE_BOOT_V2_ECC .. only:: SOC_SECURE_BOOT_V2_ECC and not SOC_SECURE_BOOT_V2_RSA .. only:: SOC_SECURE_BOOT_V2_RSA and SOC_SECURE_BOOT_V2_ECC .. warning:: It is very important that all apps flashed have been signed, either during the build or after the build. Advanced Features JTAG Debugging ~~~~~~~~~~~~~~ By default, when Secure Boot is enabled then JTAG debugging is disabled via eFuse. The bootloader does this on first boot, at the same time it enables Secure Boot. See :ref:`jtag-debugging-security-features` for more information about using JTAG Debugging with either Secure Boot or signed app verification enabled.

Flash Encryption {IDF_TARGET_CRYPT_CNT:default="SPI_BOOT_CRYPT_CNT",esp32="FLASH_CRYPT_CNT"} {IDF_TARGET_ESP32_V3_ONLY:default="", esp32="(ESP32 V3 only)"} {IDF_TARGET_ENCRYPT_COMMAND:default="espsecure.py encrypt_flash_data --aes_xts", esp32="espsecure.py encrypt_flash_data"} This is a quick start guide to {IDF_TARGET_NAME}'s flash encryption feature. Using application code as an example, it demonstrates how to test and verify flash encryption operations during development and production. Introduction Flash encryption is intended for encrypting the contents of the {IDF_TARGET_NAME}'s off-chip flash memory. Once this feature is enabled, firmware is flashed as plaintext, and then the data is encrypted in place on the first boot. As a result, physical readout of flash will not be sufficient to recover most flash contents. .. only:: esp32 :doc:`Secure Boot ` is a separate feature which can be used together with flash encryption to create an even more secure environment. .

. important:: For production use, flash encryption should be enabled in the "Release" mode only. .. important:: Enabling flash encryption limits the options for further updates of {IDF_TARGET_NAME}. Before using this feature, read the document and make sure to understand the implications. .. _encrypted-partitions: Encrypted Partitions With flash encryption enabled, the following types of data are encrypted by default: - :ref:`second-stage-bootloader` (Firmware Bootloader) - Partition Table - :ref:`nvs_encr_key_partition` - Otadata - All ``app`` type partitions Other types of data can be encrypted conditionally: - Any partition marked with the ``encrypted`` flag in the partition table. For details, see :ref:`encrypted-partition-flag`. - Secure Boot bootloader digest if Secure Boot is enabled (see below). .. _flash-encryption-efuse: Relevant eFuses The flash encryption operation is controlled by various eFuses available on {IDF_TARGET_NAME}. The list of eFuses and their descriptions is given in the table below.

The names in eFuse column are also used by espefuse.py tool. For usage in the eFuse API, modify the name by adding ``ESP_EFUSE_``, for example: esp_efuse_read_field_bit(ESP_EFUSE_DISABLE_DL_ENCRYPT). .. Comment: As text in cells of list-table header rows does not wrap, it is necessary to make 0 header rows and apply bold typeface to the first row. Otherwise, the table goes beyond the html page limits on the right. .. only:: not SOC_FLASH_ENCRYPTION_XTS_AES .. list-table:: eFuses Used in Flash Encryption :widths: 25 40 10 :header-rows: 0 - **Description** - **Bit Depth** - Controls actual number of block1 bits used to derive final 256-bit AES key. Possible values: ``0`` for 256 bits, ``1`` for 192 bits, ``2`` for 128 bits. Final AES key is derived based on the ``FLASH_CRYPT_CONFIG`` value. - 2 - AES key storage. - 256 bit key block - Controls the AES encryption process. - 4 - If set, disables flash encryption operation while running in Firmware Download mode.

- 1 - If set, disables flash decryption while running in UART Firmware Download mode. - 1 - A :math:`2^n` number that indicating whether the contents of flash have been encrypted. With each successive unencrypted flash update (e.g., flashing a new unencrypted binary) and encryption of the flash (via the :ref:`Enable flash encryption on boot ` option), the next MSB of ``{IDF_TARGET_CRYPT_CNT}`` is set. - 7 .. only:: SOC_FLASH_ENCRYPTION_XTS_AES_256 .. list-table:: eFuses Used in Flash Encryption :widths: 25 40 10 :header-rows: 0 - **Description** - **Bit Depth** - AES key storage. N is between 0 and 5. - One 256 bit key block for XTS_AES_128, Two 256 bit key blocks for XTS_AES_256 (512 bit total) - Controls the purpose of eFuse block ``BLOCK_KEYN``, where N is between 0 and 5. Possible values: ``2`` for ``XTS_AES_256_KEY_1`` , ``3`` for ``XTS_AES_256_KEY_2``, and ``4`` for ``XTS_AES_128_KEY``.

Final AES key is derived based on the value of one or two of these purpose eFuses. For a detailed description of the possible combinations, see *{IDF_TARGET_NAME} Technical Reference Manual* > *External Memory Encryption and Decryption (XTS_AES)* [`PDF `__]. - 4 - If set, disables flash encryption when in download bootmodes. - 1 - Enables encryption and decryption, when an SPI boot mode is set. Feature is enabled if 1 or 3 bits are set in the eFuse, disabled otherwise. - 3 .. only:: SOC_FLASH_ENCRYPTION_XTS_AES_128 and not SOC_FLASH_ENCRYPTION_XTS_AES_256 and not SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK .. list-table:: eFuses Used in Flash Encryption :widths: 25 40 10 :header-rows: 0 - **Description** - **Bit Depth** - AES key storage. N is between 0 and 5. - 256 bit key block - Control the purpose of eFuse block ``BLOCK_KEYN``, where N is between 0 and 5. For flash encryption, the only valid value is ``4`` for ``XTS_AES_128_KEY``.