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} | [XLA] Stop duplicating broadcasts before host memory offloading.
`HostOffloader` will do this as needed. As a result, `HostOffloadLegalize` no longer needs to differentiate between pre/post LayoutAssignment.
This requires a change to `TpuCopyNormalizer` to change copies of `"AllocateBuffer"` to clones of `"AllocateBuffer"`. That is because `"AllocateBuffer"` will create a host tensor and host-to-host copies are not supported.
Reverts changelist 641225077
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13523 from ROCm:ci_hotfit_20240607 931ddf1d5b87c85c3fe1d825665015882d50ef42
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} | PR #13391: [NVIDIA] Disable the bias reuse when gemm users > 1
Imported from GitHub PR https://github.com/openxla/xla/pull/13391
We encountered a new use case where our reset of the `output to operand aliasing` won't be reached when the gemm users > 1 and that additional user does another amax-like ops.
This PR fix it and the corresponding unit test is included.
cc. @philipphack @reedwm @hx89
Copybara import of the project:
--
362671affabad98c9d38d28af48e0127c1ed1586 by kaixih <kaixih@nvidia.com>:
Disable the bias reuse when gemm users > 1
--
02daf802271927bd48b07a1253779ba451ea8bca by kaixih <kaixih@nvidia.com>:
Rename the test
Merging this change closes #13391
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13391 from kaixih:fix_fp8_bias_reuse 02daf802271927bd48b07a1253779ba451ea8bca
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} | [tsl] forward TSL logging to Absl logging
Remove the LOG primitives in "default" and just rely on Absl.
These primitives were created when binary size was a concern.
That concern is not an issue anymore, so remove the primitives
and rely on Absl's logging.
With this change code can now depend on Absl directly, except
when needing some parts of Absl that aren't yet in OSS, namely VLOG.
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} | 1. Combine sharding candidates from both operands 0 and 1 of a gather ops to obtain better candidates for the latter. This mirrors the handling of gather ops in sharding_propagation.cc. Some changes to sharding_propagation to make a couple functions visible for usage from auto-sharding.
2. Remove an unnecessary function declaration from auto_sharding.h
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--Integrate GpuTopology into PjRtTopologyDescription to represent multi-host GPU topologies
--Utilize GlobalTopology to build GpuTopology during PjRt client creation
--Update relevant tests
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Include the unstacker pass in the compiler with a flag.
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} | PR #12975: [XLA:CPU][oneDNN] Fix failures in onednn_matmul_tests
Imported from GitHub PR https://github.com/openxla/xla/pull/12975
This PR fixes failures seen in onednn_matmul_tests
Copybara import of the project:
--
6ff6bd59a20fdabaf450134d6b449348a7a3c2ed by Kanvi Khanna <kanvi.khanna@intel.com>:
Fix failures in onednn_matmul_tests
Merging this change closes #12975
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/12975 from Intel-tensorflow:kanvi/fix_mm_tests 6ff6bd59a20fdabaf450134d6b449348a7a3c2ed
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} | [XLA:GPU] Renaming AddressComputationFusionRewriter to DynamicSliceFusionRewriter
"AddressComputation" is confusing, it simply fuses dynamic slice (and dynamic update slice) into other thunks via buffer assignment tricks
Reverts 58a97840542bac9be1aeae91d7ee7c12ee321d71
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} | Integrate LLVM at llvm/llvm-project@392ca64893dc
Updates LLVM usage to match
[392ca64893dc](https://github.com/llvm/llvm-project/commit/392ca64893dc)
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} | Delete XLACompatibleSharding and replace with `jax.sharding.Sharding`.
As of this change, `XLACompatibleSharding` is an alias of `jax.sharding.Sharding` but it will be deprecated in a follow up change.
Why do this?
* All shardings JAX has are XLA Compatible. The reason why `Sharding` was created was to allow non-xla shardings but that's not happened in the past 2 years. So let's simplify!
* Having these 2 types makes things very confusing. One example is:
* `jax.jit` only accepts XLACompatibleShardings.
* `jax.device_put` accepts `jax.sharding.Sharding` but if you use `device_put` inside `jax.jit` with a memory_kind then you can only pass `XLACompatibleSharding`. This is contradicting and confusing and we can simplify.
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} | Support having "srcs" from other packages in tflite_cc_library_with_c_headers_test
and in cc_library_with_tflite_with_c_headers_test.
This avoids a build error when invoking those macros with multiple
"srcs" with different package names but the same unqualified target
name.
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} | [xla:cpu] Use Eigen thread pool to execute ThunkExecutor tasks
There few mutex contention points that do not allow to get expected performance improvement. After they are removed this should be a nearly linear (number pf threads) speedup vs the baseline.
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"@2chayma Could you please ensure that you have a TensorFlow version compatible with your Python version ? Please follow this [guide](https://www.tensorflow.org/install/pip) for compatibility. Kindly provide more details on the reported issue?\r\nThank you!"
] | "2024-06-04T17:39:39" | "2024-06-07T07:18:45" | null | NONE | null | null | null | PS C:\Users\HP-MSi> & C:/Users/HP-MSi/AppData/Local/Programs/Python/Python312/python.exe c:/Users/HP-MSi/Desktop/MP2IASER/S4/Tâches/chokri/LSTM1.py
Traceback (most recent call last):
File "C:\Users\HP-MSi\AppData\Local\Programs\Python\Python312\Lib\site-packages\tensorflow\python\pywrap_tensorflow.py", line 70, in <module>
from tensorflow.python._pywrap_tensorflow_internal import *
ImportError: DLL load failed while importing _pywrap_tensorflow_internal: Une routine d’initialisation d’une bibliothèque de liens dynamiques (DLL) a échoué.
During handling of the above exception, another exception occurred:
Traceback (most recent call last):
File "c:\Users\HP-MSi\Desktop\MP2IASER\S4\Tâches\chokri\LSTM1.py", line 10, in <module>
import tensorflow as tf
File "C:\Users\HP-MSi\AppData\Local\Programs\Python\Python312\Lib\site-packages\tensorflow\__init__.py", line 38, in <module>
from tensorflow.python import pywrap_tensorflow as _pywrap_tensorflow # pylint: disable=unused-import
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "C:\Users\HP-MSi\AppData\Local\Programs\Python\Python312\Lib\site-packages\tensorflow\python\pywrap_tensorflow.py", line 85, in <module>
raise ImportError(
ImportError: Traceback (most recent call last):
File "C:\Users\HP-MSi\AppData\Local\Programs\Python\Python312\Lib\site-packages\tensorflow\python\pywrap_tensorflow.py", line 70, in <module>
from tensorflow.python._pywrap_tensorflow_internal import *
ImportError: DLL load failed while importing _pywrap_tensorflow_internal: Une routine d’initialisation d’une bibliothèque de liens dynamiques (DLL) a échoué.
Failed to load the native TensorFlow runtime.
See https://www.tensorflow.org/install/errors for some common causes and solutions.
If you need help, create an issue at https://github.com/tensorflow/tensorflow/issues and include the entire stack trace above this error message.
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} | [XLA:GPU] Renaming AddressComputationFusion to DynamicSliceFusion
"AddressComputation" is confusing, it simply fuses dynamic slice (and dynamic update slice) into other thunks via buffer assignment tricks
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} | Provide a dummy implementation for nnapi_delegate_c_api for Windows/iOS,
just like we do for nnapi_delegate.
This required also passing `tflite_copts()` in the BUILD file
in order to get the correct definition for `TFL_CAPI_EXPORT`.
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} | PR #13289: [XLA:CPU] [oneDNN] Fix accuracy issue with layernorm fusion
Imported from GitHub PR https://github.com/openxla/xla/pull/13289
This PR fixes the accuracy issue seen with F16 ViT model by adding a default value for epsilon. It also adds a slight variation seen for TF layernorm pattern in XLA for F32,BF16,F16.
Copybara import of the project:
--
f7adf21334c812be1052fc966339aa6308910e81 by Kanvi Khanna <kanvi.khanna@intel.com>:
Update TF layernorm pattern for f16
Add default value for epsilon which fixes accuracy
Add tests
Merging this change closes #13289
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13289 from Intel-tensorflow:kanvi/Fix_LN_accuracy f7adf21334c812be1052fc966339aa6308910e81
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} | [XLA:GPU][MLIR-based emitters] Remove Tiling from mlir_reduction.
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} | [XLA:GPU] Move SoftMax output tile size calculation to TritonFusion.
We have the same logic that finds reduce in a SoftMax fusion duplicated to calculate tile sizes and launch dimensions. It's better to have everything in TritonFusion, so we can also get tile sizes in Cost Model.
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/12975 from Intel-tensorflow:kanvi/fix_mm_tests 6ff6bd59a20fdabaf450134d6b449348a7a3c2ed
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} | PR #12537: [XLA:CPU][oneDNN][BugFix] Add axis support to oneDNN softmax rewriter
Imported from GitHub PR https://github.com/openxla/xla/pull/12537
This PR fixes :
XLA Issue : https://github.com/openxla/xla/issues/11772
corresponding JAX issue : https://github.com/google/jax/issues/20856
Accuracy fix :
This PR adds support for softmax axis other than -1, previously oneDNN softmax was always executed with axis = -1 (last dimension)
Accuracy issue is observed from JAX 0.4.22 till last release, with current main branch we don't see accuracy issue as the JAX softmax HLO pattern changed (https://github.com/google/jax/pull/20643) and HLO pattern is not re-written to oneDNN softmax. Hence, this PR also adjusts the oneDNN softmax pattern to recognize new HLO pattern and rewrite into oneDNN softmax custom call.
Copybara import of the project:
--
b983bd61044bf52838661057f570e9e218803549 by Sachin Muradi <sachin.muradi@intel.com>:
Add axis support
--
07f7d14aa1f00676b21e8c1f48719fe7e56bcfd2 by Sachin Muradi <sachin.muradi@intel.com>:
address more comments + optional broadcast
Merging this change closes #12537
Reverts dbf3cd351cdac416d635a9725746f4bcd96ffd83
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/12537 from Intel-tensorflow:sachin/softmax-axis de9d6bd36272962faf76077f594649d229bb727a
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} | Add lowerings for vector transfers.
Only in-bounds, maskless, 1d transfers are supported. We'll
probably need masks eventually, but not yet.
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13265 from openxla:refactor_runner 04cb8447c90d46f171e5a0f0261e81f8690d1ab4
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Imported from GitHub PR https://github.com/openxla/xla/pull/13372
Copybara import of the project:
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88982aceca5dcd81c8b99f3a5a9d8e46a5ab843f by Ilia Sergachev <isergachev@nvidia.com>:
[GPU] Fix autotuner_util_test.
Merging this change closes #13372
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13372 from openxla:fix_autotuner_util_test 88982aceca5dcd81c8b99f3a5a9d8e46a5ab843f
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Imported from GitHub PR https://github.com/openxla/xla/pull/13241
Copybara import of the project:
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99192a7119725e1b80153f8b29a229acb191c4f7 by Ilia Sergachev <isergachev@nvidia.com>:
[GPU] Fail on conflicting autotuning results.
Merging this change closes #13241
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13241 from openxla:fail_on_result_conflict 99192a7119725e1b80153f8b29a229acb191c4f7
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} | [XLA] [NFC] Simplify FunctionalHloRunner interface
The FunctionalHloRunner API claims to support multiple modules, but they are
actually ignored and only one is used, plus all the callers only ever pass one
module.
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} | PR #13265: [GPU][NFC] Outline multihost HLO runner creation logic to enable better tests.
Imported from GitHub PR https://github.com/openxla/xla/pull/13265
Copybara import of the project:
--
d687c6f117ba11d98653288fb0c1cb8cebd61ed6 by Ilia Sergachev <isergachev@nvidia.com>:
Give GPU compiler class access to PJRT key-value store.
--
04cb8447c90d46f171e5a0f0261e81f8690d1ab4 by Ilia Sergachev <isergachev@nvidia.com>:
[GPU][NFC] Outline multihost HLO runner creation logic to enable better tests.
Merging this change closes #13265
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13265 from openxla:refactor_runner 04cb8447c90d46f171e5a0f0261e81f8690d1ab4
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} | PR #12964: [XLA:CPU][oneDNN] Block elementwise linear fusion for non-scalar multipliers
Imported from GitHub PR https://github.com/openxla/xla/pull/12964
This PR addresses a potential bug by prohibiting Elementwise Linear operation for non-scalar multipliers. Additionally, the PR includes a test to ensure that the rewrite does not occur in such scenarios.
Copybara import of the project:
--
07d335c90fb348d8aaced74d9d007e9254b01f00 by Akhil Goel <akhil.goel@intel.com>:
Block elementwise linear fusion for non-scalar multipliers
Merging this change closes #12964
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/12964 from Intel-tensorflow:akhil/elt_linear_bugfix 07d335c90fb348d8aaced74d9d007e9254b01f00
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} | PR #13265: [GPU][NFC] Outline multihost HLO runner creation logic to enable better tests.
Imported from GitHub PR https://github.com/openxla/xla/pull/13265
Copybara import of the project:
--
d687c6f117ba11d98653288fb0c1cb8cebd61ed6 by Ilia Sergachev <isergachev@nvidia.com>:
Give GPU compiler class access to PJRT key-value store.
--
04cb8447c90d46f171e5a0f0261e81f8690d1ab4 by Ilia Sergachev <isergachev@nvidia.com>:
[GPU][NFC] Outline multihost HLO runner creation logic to enable better tests.
Merging this change closes #13265
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13265 from openxla:refactor_runner 04cb8447c90d46f171e5a0f0261e81f8690d1ab4
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} | PR #13360: [oneDNN][BugFix] Fix dtype utility function for F16 AVX2 DL extension
Imported from GitHub PR https://github.com/openxla/xla/pull/13360
Intel's Efficiency cores do not support AVX512 instructions. However, some of them do support lower precisions (BF16/FP16) by converting to and from FP32. Due to the lack of Byte and Word instruction set support, the current condition check always returns False, even on supporting E-cores. This PR fixes the condition to correctly return True on all compatible hardware.
Copybara import of the project:
--
d138f97cb5004b199e626d4f705e50269b79e160 by Akhil Goel <akhil.goel@intel.com>:
Fix AVX2 FP16
Merging this change closes #13360
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13360 from Intel-tensorflow:akhil/vnni2_fp16 d138f97cb5004b199e626d4f705e50269b79e160
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} | PR #13301: [Bug-fix][XLA:CPU][oneDNN] Fix BINARY_ADD fusion to Dot
Imported from GitHub PR https://github.com/openxla/xla/pull/13301
This PR fixes a bug reported for JAX (https://github.com/openxla/xla/issues/13054)
Copybara import of the project:
--
47d5bde8eab607d0fe9b60c6fd82d95365c8169f by mdfaijul <md.faijul.amin@intel.com>:
Make addend rank same to dot.
Merging this change closes #13301
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13301 from Intel-tensorflow:amin/bug-fix-jax 47d5bde8eab607d0fe9b60c6fd82d95365c8169f
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Updates LLVM usage to match
[392ca64893dc](https://github.com/llvm/llvm-project/commit/392ca64893dc)
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} | [XLA:GPU][MLIR-based emitters] Merge MlirReductionInfo into MlirReductionFusion.
Next CL will remove Tiling.
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} | PR #13106: Fix a bug in AsyncAllocator memory pools access setting.
Imported from GitHub PR https://github.com/openxla/xla/pull/13106
The original code uses the wrong parameter `i` for `cuDeviceCanAccessPeer()`, which can cause undefined behavior when `(*all_ids_)[i] != platform_device_id`, for example, virtual devices are used. Should use `(*all_ids_)[i].value()` to represent the previous pool id.
Also, add a judgment to skip the pool initialization process if it's already initialized previously. This can happen in some cases, such as when multiple virtual devices are created from one physical GPU, the virtual devices will actually share the same CUDA memory pool.
Same PR from TensorFlow repo: https://github.com/tensorflow/tensorflow/pull/67373.
Copybara import of the project:
--
c70708185d10508fe03d4ee760f8640908dcf7f0 by Robin Zhang <robinz@nvidia.com>:
memory pools access initialization
Merging this change closes #13106
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13106 from buptzyb:asyncpool c70708185d10508fe03d4ee760f8640908dcf7f0
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} | [XLA:GPU] Disable broken tests in `cudnn_norm_rewriter_test.cc`.
Running these tests seems to cause OOB shape accesses.
Filed https://github.com/openxla/xla/issues/13361 to track work on re-enabling
them.
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} | Filter out tests with tag requires-gpu-amd and requires-gpu-nvidia.
We should not try to run them on MacOS CPU.
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} | [xla:runtime] Add BufferUse to track buffer slice read/write conflicts
This already exists in gpu backends here: https://github.com/openxla/xla/blob/e308cd376175de82627d29a959cea5cf458b5ea4/xla/service/gpu/runtime/command_buffer_cmd.h#L80-L97. Moving to shared component in preparation for runtime unification.
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} | [xla:cpu] Add support for conditional thunk
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} | fix the missing dependency on `bad_indices_policy`
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13253 from lingzhi98:lingzhi/fix_inplace_fusion d2e7f3565c8476f77c74004c6aceb1a29eb951fc
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} | PR #12892: Add collective-permute-valid-iteration-annotator
Imported from GitHub PR https://github.com/openxla/xla/pull/12892
This patch adds the `collective-permute-valid-iteration-annotator` pass.
If a while loop is known to be a pipelined while loop, has a known trip count and increments with step=1, then this pass annotates the `collective-permute` operations within the while loop with valid iterations for each GPU. This is only done when the source-target pairs of the `collective-permute` operation form a forward or backward cycle.
For example, if the trip count is 10 (iteration 0 to 9), with step=1, and the source-target pairs of a `collective-permute` operation are `{{0,1},{1,2},{2,3},{3,0}}`, then this pass would annotate such operation with `_xla_send_recv_validation="{{0,6},{1,7},{2,8},{3,9}}"`. This annotation means that
- for GPU index 0, the valid iterations are 0,1,2,3,4,5,6.
- for GPU index 1, the valid iterations are 1,2,3,4,5,6,7.
- for GPU index 2, the valid iterations are 2,3,4,5,6,7,8.
- for GPU index 3, the valid iterations are 3,4,5,6,7,8,9.
The index in the list denotes the device index and the bounds {start,end} are inclusive.
Copybara import of the project:
--
f5714a8053db0892c950b1e5268f249ff64b2e7b by Shraiysh Vaishay <svaishay@nvidia.com>:
Add collective-permute-valid-iteration-annotator
This patch adds the `collective-permute-valid-iteration-annotator` pass.
If a while loop is known to be a pipelined while loop, has a known trip count
and increments with step=1, then this pass annotates the `collective-permute`
operations within the while loop with valid iterations for each GPU. This is only done
when the source-target pairs of the `collective-permute` operation form a forward or
backward cycle.
For example, if the trip count is 10 (iteration 0 to 9), with step=1, and the source-target
pairs of a `collective-permute` operation are `{{0,1},{1,2},{2,3},{3,0}}`, then this pass
would annotate such operation with `_xla_send_recv_validation="{{0,6},{1,7},{2,8},{3,9}}"`.
This annotation means that
- for GPU index 0, the valid iterations are 0,1,2,3,4,5,6.
- for GPU index 1, the valid iterations are 1,2,3,4,5,6,7.
- for GPU index 2, the valid iterations are 2,3,4,5,6,7,8.
- for GPU index 3, the valid iterations are 3,4,5,6,7,8,9.
The index in the list denotes the device index and the bounds {start,end} are inclusive.
Merging this change closes #12892
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/12892 from shraiysh:CR-valid-iteration-annotator f5714a8053db0892c950b1e5268f249ff64b2e7b
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"Thanks for your pull request! It looks like this may be your first contribution to a Google open source project. Before we can look at your pull request, you'll need to sign a Contributor License Agreement (CLA).\n\nView this [failed invocation](https://github.com/tensorflow/tensorflow/pull/69107/checks?check_run_id=25769099220) of the CLA check for more information.\n\nFor the most up to date status, view the checks section at the bottom of the pull request."
] | "2024-06-04T05:23:58" | "2024-06-04T07:14:50" | "2024-06-04T07:14:49" | NONE | null | true | {
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} | PR #13253: Make correct fusion decision for inplace fusion
Imported from GitHub PR https://github.com/openxla/xla/pull/13253
There exist bug when making fusion decision for inplace fusion. Current implementation does not consider non-elementwise ops in consumer and will lead to inplace conflict in some specific case. Detailed information can be seen in the added test.
Copybara import of the project:
--
fdde9d42774f5185ef0f38eb4b6972316953b1dc by Zhou, Lingzhi <lingzhi.zhou@intel.com>:
make correct fusion decision for inplace fusion
--
d2e7f3565c8476f77c74004c6aceb1a29eb951fc by Zhou, Lingzhi <lingzhi.zhou@intel.com>:
comment
Merging this change closes #13253
FUTURE_COPYBARA_INTEGRATE_REVIEW=https://github.com/openxla/xla/pull/13253 from lingzhi98:lingzhi/fix_inplace_fusion d2e7f3565c8476f77c74004c6aceb1a29eb951fc
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"Hi **@PhyllisJi** ,\r\n- Sorry for the dealy, Please post this issue on [keras-team/keras repo.](https://github.com/keras-team/keras/issues)\r\nTo know more see;\r\n[https://discuss.tensorflow.org/t/keras-project-moved-to-new-repository-in-https-github-com-keras-team-keras/1999](https://discuss.tensorflow.org/t/keras-project-moved-to-new-repository-in-https-github-com-keras-team-keras/1999).\r\n\r\nThank you!"
] | "2024-06-04T04:38:01" | "2024-06-10T05:55:46" | null | NONE | null | null | null | ### Issue type
Documentation Bug
### Have you reproduced the bug with TensorFlow Nightly?
Yes
### Source
source
### TensorFlow version
tf 2.14.0
### Custom code
Yes
### OS platform and distribution
Ubuntu 20.04
### Mobile device
_No response_
### Python version
_No response_
### Bazel version
_No response_
### GCC/compiler version
_No response_
### CUDA/cuDNN version
_No response_
### GPU model and memory
_No response_
### Current behavior?
Throw Error:
```
tensorflow.python.framework.errors_impl.InvalidArgumentError: Exception encountered when calling layer 'conv4_mutated' (type Conv1DTranspose).
{{function_node __wrapped__Conv2DBackpropInput_device_/job:localhost/replica:0/task:0/device:CPU:0}} Current CPU implementations do not yet support dilation rates larger than 1. [Op:Conv2DBackpropInput] name:
Call arguments received by layer 'conv4_mutated' (type Conv1DTranspose):
• inputs=tf.Tensor(shape=(2, 2048, 64), dtype=float32)
```
Also, I'm not quite sure why the error message relates to Conv2DBackpropInput
### Standalone code to reproduce the issue
```shell
import tensorflow as tf
import numpy as np
import os
os.environ['CUDA_VISIBLE_DEVICES'] = ''
def Model_HqTi1yjRFc7Dz1RLSJOvA9XX16R5Wp01(x):
x = tf.keras.Input(shape=x)
_x = x
_zeropadding_x = tf.keras.layers.ZeroPadding1D(padding=(0, 0))(x)
x = tf.keras.layers.Conv1D(filters=64, kernel_size=1, strides=1, padding="valid", data_format="channels_last", dilation_rate=1, groups=1, use_bias=True, name="conv1")(_zeropadding_x)
x = tf.keras.layers.BatchNormalization(axis=-1, epsilon=1e-05, momentum=0.9, center=True, scale=True, name="bn1")(x)
x = tf.nn.relu(x)
_zeropadding_x = tf.keras.layers.ZeroPadding1D(padding=(0, 0))(x)
x = tf.keras.layers.Conv1D(filters=64, kernel_size=1, strides=1, padding="valid", data_format="channels_last", dilation_rate=1, groups=1, use_bias=True, name="conv2")(_zeropadding_x)
x = tf.keras.layers.BatchNormalization(axis=-1, epsilon=1e-05, momentum=0.9, center=True, scale=True, name="bn2")(x)
x = tf.nn.relu(x)
_zeropadding_x = tf.keras.layers.ZeroPadding1D(padding=(0, 0))(x)
x = tf.keras.layers.Conv1D(filters=64, kernel_size=1, strides=1, padding="valid", data_format="channels_last", dilation_rate=1, groups=1, use_bias=True, name="conv3")(_zeropadding_x)
x = tf.keras.layers.BatchNormalization(axis=-1, epsilon=1e-05, momentum=0.9, center=True, scale=True, name="bn3")(x)
x = tf.keras.activations.relu(x)
_zeropadding_x = tf.keras.layers.ZeroPadding1D(padding=(0, 0))(x)
x = tf.keras.layers.Conv1DTranspose(filters=128, kernel_size=1, strides=1, padding="valid", output_padding=0, data_format="channels_last", dilation_rate=8, use_bias=True, name="conv4_mutated")(x)
x = x
model = tf.keras.models.Model(inputs=_x, outputs=x)
return model
def go():
with tf.device('/CPU:0'):
shape = [2, 3, 2048]
_numpy = np.random.random(shape).astype(np.float32)
tf_input = tf.convert_to_tensor(_numpy.transpose(0, 2, 1), dtype=tf.float32)
tf_model = Model_HqTi1yjRFc7Dz1RLSJOvA9XX16R5Wp01(tf_input.shape[1:])
tf_output = tf_model(tf_input)
go()
```
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"@PhyllisJi,\r\nAFAIK the argument Groups should A positive int specifying the number of groups in which the input is split along the channel axis. Each group is convolved separately with `filters // groups` filters. The output is the concatenation of all the `groups` results along the channel axis.\r\n\r\nAlso the Input channels and `filters` provided must both be divisible by `groups`. Here you are trying with the groups=0 which is not divisible. And also it is working as intended in the Tensorflow 2.16. Kindly find the gist of it [here](https://colab.research.google.com/gist/tilakrayal/93ebecc9d54fd953439d4feddabbfcc0/untitled1933.ipynb).\r\n\r\nhttps://keras.io/api/layers/convolution_layers/convolution1d/\r\n\r\nThank you!"
] | "2024-06-04T04:26:00" | "2024-06-05T06:00:39" | null | NONE | null | null | null | ### Issue type
Bug
### Have you reproduced the bug with TensorFlow Nightly?
Yes
### Source
source
### TensorFlow version
tf 2.14.0
### Custom code
Yes
### OS platform and distribution
Ubuntu 20.04
### Mobile device
_No response_
### Python version
_No response_
### Bazel version
_No response_
### GCC/compiler version
_No response_
### CUDA/cuDNN version
_No response_
### GPU model and memory
_No response_
### Current behavior?
tf.keras.layers.Conv1D still works fine when groups is set to 0.
With the same parameter settings, pytorch throws the following exception:
```
ValueError: groups must be a positive integer
```
### Standalone code to reproduce the issue
```shell
import tensorflow as tf
conv_layer = tf.keras.layers.Conv1D(
filters=64,
kernel_size=1,
strides=1,
padding="valid",
data_format="channels_last",
dilation_rate=1,
groups=0,
use_bias=True,
name="conv2"
)
input_tensor = tf.keras.Input(shape=(32, 3))
output_tensor = conv_layer(input_tensor)
print(output_tensor.shape)
```
### Relevant log output
_No response_ | {
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] | null | [] | "2024-06-04T02:40:48" | "2024-06-10T12:26:00" | null | NONE | null | null | null | ### Issue type
Documentation Bug
### Have you reproduced the bug with TensorFlow Nightly?
Yes
### Source
binary
### TensorFlow version
tf 2.14.0
### Custom code
Yes
### OS platform and distribution
Ubuntu 20.04
### Mobile device
_No response_
### Python version
3.10
### Bazel version
_No response_
### GCC/compiler version
_No response_
### CUDA/cuDNN version
_No response_
### GPU model and memory
_No response_
### Current behavior?
The current documentation describes dilation_rate parameter as：
```
an integer, specifying the dilation rate for all spatial dimensions for dilated convolution. Specifying different dilation rates for different dimensions is not supported. Currently, specifying any dilation_rate value != 1 is incompatible with specifying any stride value != 1.
```
And when we set dilation_rate to a tuple, the error message is reported as：
```
ValueError: Exception encountered when calling layer "conv7" (type Conv2DTranspose).
Expected the 2 dimensions of the `dilation_rate` argument to be equal to each other. Received: dilation_rate=(9, 7)
```
In addition, the documentation describes _strides_ as having to be integers, but the code actually constrains them to have to be positive integers.
```
An integer or tuple/list of 2 integers, specifying the strides of the convolution along the height and width. Can be a single integer to specify the same value for all spatial dimensions. Specifying any stride value != 1 is incompatible with specifying any dilation_rate value != 1.
```
```
ValueError: The `strides` argument must be a tuple of 2 integers. Received: (7, -1) including {-1} that does not satisfy the requirement `>= 0`.
```
The constrains of output_padding and kernel_size are also not mentioned.
```
ValueError: The `kernel_size` argument must be a tuple of 2 integers. Received: (-1, -1) including {-1} that does not satisfy the requirement `> 0`.
ValueError: The `1st entry of padding` argument must be a tuple of 2 integers. Received: (-1, -1) including {-1} that does not satisfy the requirement `>= 0`.
```
### Standalone code to reproduce the issue
```shell
import tensorflow as tf
conv_layer = tf.keras.layers.Conv2DTranspose(
filters=6,
kernel_size=(1, 1),
strides=(1, 1),
padding="valid",
data_format="channels_last",
dilation_rate=(9, 7),
groups=1,
use_bias=True,
name="conv7"
)
input_tensor = tf.keras.Input(shape=(32, 32, 3))
output_tensor = conv_layer(input_tensor)
```
```shell
import tensorflow as tf
conv_layer = tf.keras.layers.Conv2DTranspose(
filters=6,
kernel_size=(1, 1),
strides=(7, -1),
padding="valid",
data_format="channels_last",
dilation_rate=(9, 7),
groups=1,
use_bias=True,
name="conv7"
)
input_tensor = tf.keras.Input(shape=(32, 32, 3))
output_tensor = conv_layer(input_tensor)
```
### Relevant log output
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} | Add a SetProto in addition to ToProto on {Shape,Tile,SplitConfig,Layout}.
This saves a copy when the output is nested in a proto on an arena.
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} | Introduce `Client::CopyArrays()` for batched device-to-device copy
This CL introduces an IFRT client API that transfers a list of IFRT arrays to a set of new devices and memory kind.
The API is intentionally designed to impose a constraint that all arrays in a single call must share the same destination devices and memory kind. The rationale is that we don't expect batching benefit across transfers that do not share the same set of source/destination devices. Callers can always invoke `CopyArrays` multiple times if they have multiple sets of destination devices.
This API is intended as a batched version of `Array::Reshard()` (now marked as deprecated), but with a narrower interface that allows just device and memory kind changes and not "resharding". Since none of the existing IFRT implementations currently implement true resharding, we expect `Client::CopyArrays()` to be a sufficient replacement of `Array::Reshard()` for the current use case. The actual resharding is a much more involved operation that may deserve an API that is closer to execution than transfer and can be reintroduced with a separate design.
Since `CopyArrays` takes a device list instead of a sharding object, `Sharding` objects of the returned arrays must be created internally by `CopyArrays`. This makes it impossible for the caller to control the instance of `Sharding` objects to be used for returned arrays, unlike `Array::Reshard` which takes `std::shared_ptr<const Sharding>`. We may revisit the design once `DeviceList` virtualization happens.
PjRT-IFRT and IFRT Proxy implement `CopyArrays` by calling `Array::Reshard`. In future, we may implement a more efficient `CopyArrays` for IFRT Proxy.
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} | Rename TfLiteOperatorCreateWithData to TfLiteOperatorCreate.
And drop the old TfLiteOperatorCreate function.
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