Module ImportFrom alias ImportFrom alias Assign NameStore ListLoad TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str TupleLoad Str Num Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str Call NameLoad Str ClassDef bases NameLoad body Assign NameStore Str Assign NameStore Num FunctionDef arguments args NameParam defaults body Expr Call AttributeLoad NameLoad attr NameLoad Str NameLoad decorator_list decorator_list
N/A migen.build.generic_platform * migen.build.xilinx XilinxPlatform N/A _io N/A N/A clk200 0 N/A Subsignal p N/A Pins J9 N/A IOStandard LVDS_25 N/A Misc DIFF_TERM=TRUE N/A Subsignal n N/A Pins H9 N/A IOStandard LVDS_25 N/A Misc DIFF_TERM=TRUE N/A clk66 0 N/A Pins U23 N/A IOStandard LVCMOS25 N/A cpu_reset 0 N/A Pins H10 N/A IOStandard SSTL15 N/A user_led 0 N/A Pins AC22 N/A IOStandard LVCMOS25 N/A Misc SLEW=SLOW N/A user_led 1 N/A Pins AC24 N/A IOStandard LVCMOS25 N/A Misc SLEW=SLOW N/A user_led 2 N/A Pins AE22 N/A IOStandard LVCMOS25 N/A Misc SLEW=SLOW N/A user_led 3 N/A Pins AE23 N/A IOStandard LVCMOS25 N/A Misc SLEW=SLOW N/A user_led 4 N/A Pins AB23 N/A IOStandard LVCMOS25 N/A Misc SLEW=SLOW N/A user_led 5 N/A Pins AG23 N/A IOStandard LVCMOS25 N/A Misc SLEW=SLOW N/A user_led 6 N/A Pins AE24 N/A IOStandard LVCMOS25 N/A Misc SLEW=SLOW N/A user_led 7 N/A Pins AD24 N/A IOStandard LVCMOS25 N/A Misc SLEW=SLOW N/A serial 0 N/A Subsignal tx N/A Pins J25 N/A IOStandard LVCMOS25 N/A Subsignal rx N/A Pins J24 N/A IOStandard LVCMOS25 N/A eth_clocks 0 N/A Subsignal rx N/A Pins AP11 N/A Subsignal tx N/A Pins AD12 N/A IOStandard LVCMOS25 N/A eth 0 N/A Subsignal rst_n N/A Pins AH13 N/A Subsignal dv N/A Pins AM13 N/A Subsignal rx_er N/A Pins AG12 N/A Subsignal rx_data N/A Pins AN13 AF14 AE14 AN12 AM12 AD11 AC12 AC13 N/A Subsignal tx_en N/A Pins AJ10 N/A Subsignal tx_er N/A Pins AH10 N/A Subsignal tx_data N/A Pins AM11 AL11 AG10 AG11 AL10 AM10 AE11 AF11 N/A Subsignal col N/A Pins AK13 N/A Subsignal crs N/A Pins AL13 N/A IOStandard LVCMOS25 Platform N/A XilinxPlatform N/A N/A default_clk_name clk200 N/A default_clk_period 5 __init__ N/A N/A self N/A N/A N/A N/A N/A XilinxPlatform __init__ self xc6vlx240t-ff1156-1 _io N/A N/A