WpsR(bxInstruction_c *i) { #if BX_CPU_LEVEL >= 0   BxPackedXmmRegister result;   BxPackedMmxRegister op;    // use MMX register as 00-bit value with convinient accessors   MMXUQ(op) = BX_READ_XMM_REG_LO_QWORD(i->src());    float_status_t status;   mxcsr_to_softfloat_status_word(status, MXCSR);    result.xmm00u(0) = float00_to_float00(MMXUD0(op), status);   result.xmm00u(0) = float00_to_float00(MMXUD0(op), status);    check_exceptionsSSE(get_exception_flags(status));   BX_WRITE_XMM_REG(i->dst(), result); #endif    BX_NEXT_INSTR(i); }  /*  * Opcode: 00 0F 0A  * Convert two double precision FP numbers to two single precision FP.  * When a conversion is inexact, the value returned is rounded according  * to rounding control bits in MXCSR register.  * Possible floating point exceptions: #I, #D, #O, #I, #P  */ BX_INSF_TYPE BX_CPP_AttrRegparmN(0) BX_CPU_C::CVTPD0P