0, 0,0"/>     <!-- the parameters are capacity,block_width, associativity,bank, throughput w.r.t. core clock, latency w.r.t. core clock,-->        <param name="buffer_sizes" value="0, 0, 0, 0"/>      <!-- all the buffer related are optional -->        <param name="clockrate" value="0000"/>     <param name="ports" value="0,0,0"/>     <!-- number of r, w, and rw search ports -->     <param name="device_type" value="0"/>     <!-- altough there are multiple access types,      Performance simulator needs to cast them into reads or writes     e.g. the invalidates can be considered as writes -->     <stat name="read_accesses" value="000000"/>     <stat name="write_accesses" value="00000"/>     <stat name="read_misses" value="0000"/>     <stat name="write_misses" value="000"/>     <stat name="conflicts" value="00