In recent years, several high-speed data services have become standardized for wireless communication.  Also, many of these standardized services employ relatively complex computational techniques to process wireless communication signals.  However, this kind of signal processing demand creates significant implementation issues for affordable, lightweight and conveniently sized mobile (wireless) nodes.  Also, these signal processing demands can cause bottlenecks in implementing mobile nodes capable of multi-mode, multi-band operation and reduced power consumption. 
Some devices employ a custom designed Application Specific Integrated Circuit (ASIC) to perform digital signal processing of communication signals.  Other devices use a single and relatively generic digital signal processor (DSP) to process communication signals.  And still other devices employ a hybrid design that includes both ASICs and generic DSPs to process communication signals. 
There are benefits and trade-offs when employing either an ASIC or generic DSP to digitally process communication signals.  For example, although the “hard wiring” of an ASIC consumes substantially less power than a DSP, an ASIC is not easily reconfigurable for multiple modes of operation.  On the other hand, although reprogramming or reconfiguring of a generic DSP can be relatively easy, it will tend to consume more power than an ASIC performing substantially the same operations.  Also, although the per unit cost of a generic DSP is substantially more expensive than an ASIC, the up front costs to custom design the hard wiring of an ASIC can be substantial and difficult to recoup when a relatively small number of ASICs are needed. 
Additionally, System on a Chip (SoC) concepts have been tried for digital signal processing of communication signals.  However, owing to the complexity of many communication standards, the highly integrated silicon technology of SoC implementations have not yet been sufficiently compelling to provide an alternative to ASIC, generic DSP and hybrid designs for communication systems.  In particular, a typical SoC circuit can only be clocked so fast and still be efficient (not consume as much or more power than a generic DSP based communication system). 
In recognition that wireless communication data flows are deterministic and data-centric, it would be preferable to employ this understanding in digital processing of communication signals.  Also, by taking a top-level communication system viewpoint and making architectural decisions that best fit the data-flow model of an application, such as a wireless communication standard, it may be possible to address many of the issues that inhibit optimal communication system implementations, e.g., high speed, low cost, and low power.