The present invention concerns a method of fabricating a semiconductor device, and more particularly, a method of forming Phosphor Silicate Glass (hereinafter referred to as PSG) layers by chemical vapor deposition (hereinafter referred to as CVD). 
The PSG layer is widely used in the semiconductor fabrication process. 
With reference to the attached drawings, the PSG layers formed by the conventional method will firstly be considered.  FIGS.  1(A) and (B) illustrate an example of the PSG layers formed on a semiconductor substrate, which is etched, and FIG.  2 illustrates the distribution of the concentration according to the depths of the PSG layers.  Referring to FIG.  1(A), PSG layers 12a, 12b, 12c are formed on a semiconductor substrate 10 by the conventional CVD.  The boundary surfaces of the layers are designated as the reference numerals a, b, c, d sequentially from above.  As shown by the reference numeral 20 in FIG.  2, the phosphorous concentration is constant regardless of the depths of the PSG layers. 
However, if the PSG layers are subjected to heat treatment, and reflowing, the phosphorous concentration of each layer, as shown by the reference numeral 30 in FIG.  2, has an irregular distribution, and particularly is reduced in the boundary surfaces. 
On the other hand, if the phosphorous concentration becomes different according to the latters, the etching speed of each layer also becomes different.  Namely, after forming a photoresist pattern on the uppermost surface of PSG layers by the conventional photolithography, if the PSG layers 12c and 12b are subjected to isotropic etching, and the PSG layer 12a to anisotropic etching, at the boundary surfaces a, b, c, d are sharp edges produced 13, 14, 16, 18 as shown in FIG.  1(B).  Such sharp edges serve as a main cause to result in the cut-off phenomenon when vapor-depositing a different layer on the PSG layers.