A communication system is comprised, at a minimum, of a transmitter and a receiver interconnected by a transmission channel.  In the communication system, a communication signal is transmitted by the transmitter upon the transmission channel to be received by the receiver.  In a radio communication system, the transmission channel comprises a radio frequency channel defined by a range of frequencies of the electromagnetic frequency spectrum.  A transmitter operative in a radio communication system must convert the communication signal into a form suitable for transmission upon the radio-frequency channel. 
Conversion of the communication signal into the form suitable for transmission upon the radio frequency (RF) channel is effectuated by a process referred to as modulation.  In such a process, the communication signal is impressed upon an RF carrier signal.  The resultant signal is commonly referred to as a modulated carrier signal.  The transmitter includes circuitry operative to perform such a modulation process. 
The receiver of the radio communication contains circuitry analogous to, but operative in a manner reverse with that of, the circuitry of the transmitter.  The receiver is operative to perform a process referred to as demodulation. 
In radio communication systems, such as cellular telephony, specific modulation schemes are employed to minimize the frequency spectrum necessary for communication and thereby maximize the call capacity of the radio communication system.  The modulation schemes utilized usually involve converting the communication signal into discrete form, and the resultant modulated signal is typically of a reduced frequency spectrum. 
One method of transmitting a communication signal in discrete form is through the use of quadrature modulation.  In quadrature modulation, the binary data stream of the encoded communication signal is separated into bit pairs.  Such bit pairs are utilized to cause phase shifts of the RF carrier signal in increments such as plus or minus .pi./4 radians or plus or minus 3.pi./4 radians, according to the values of the individual bit pairs of the encoded signal. 
The phase shifts are effectuated by applying the binary data stream comprised of the bit pairs to a pair of mixer circuits.  A sine component of a carrier signal is applied to an input of a first mixer circuit, and a cosine component of a carrier signal is applied to an input of a second mixer circuit.  The sine and cosine components of the carrier signal are in a relative phase relationship of ninety degrees with one another, or phase quadrature.  A quadrature generator is utilized to generate and apply the sine and cosine components of the carrier signal to the first and second mixer circuits of the pair of mixer circuits, respectively. 
In many radio communication systems, a heterodyne architecture is used for the transmitter and receiver in order to reduce the susceptibility to interfering signals that may be present.  In a heterodyne architecture, frequency conversion to an intermediate frequency (IF) is first performed to obtain the filter selectivity needed to reject interfering signals.  Conversion to an IF aids in the selectivity process and allows the selectivity to be achieved with physically realizable filters.  A drawback to the heterodyne architecture is that the conversion to an IF requires extra circuit complexity, more power consumption, and more physical space.  The filters used are usually ceramic filters or surface acoustic wave (SAW) filters, which are both expensive and physically large. 
To circumvent the drawbacks of a heterodyne architecture, a direct conversion architecture is employed.  In a direct conversion architecture, there is no IF.  For example, a direct conversion transmitter converts the baseband modulation inputs directly to the transmit RF signal.  The direct conversion receiver downconverts the received RF signal directly to baseband. 
One major drawback to the direct conversion approach, however, is that remodulation of the voltage controlled oscillator (VCO) can occur.  Since there is no IF generated, the power amplifier (PA) output of the transmitter is at the same frequency as the VCO that generates the RF carrier signal.  When a portion of the PA output signal is coupled back onto the VCO (either through radiation or a conductive leakage path), injection locking occurs.  The PA output signal then modulates the VCO in an undesired fashion, and gross error results in the modulated transmit signal. 
One method that has been employed in the prior art to eliminate the remodulation effect in a direct conversion architecture is the use of an offset loop.  The basic structure of a direct conversion quadrature modulation transmitter employing an offset loop is shown in FIG.  1.  A first RF signal generated from an RF VCO 116 is applied to an offset mixer 114 and mixed with an offset frequency signal generated by an offset VCO 112.  The RF carrier signal produced from the offset mixer 114 is then filtered through RF filter 110 and applied to a quadrature signal generator system 108.  The quadrature signal generator system 108 generates a pair of signals in phase quadrature (i.e. 90 degree phase difference).  A first output of the quadrature signal generator system 108 is applied to a carrier signal input 120 of a first mixer circuit 104, and a second output of the quadrature signal generator system 108 is applied to a carrier signal input 122 of a second mixer circuit 106.  A first modulation signal, I, is applied to a modulation input 100 of the first mixer circuit 104, and a second modulation signal, Q, is applied to a modulation input 102 of the second mixer circuit 106.  The modulated transmit signal produced at the modulator output 118 is applied to RF Transmit block 132, which may be comprised of power control circuitry and a power amplifier.  The final output signal is produced at transmitter output 134. 
In the direct conversion transmitter employing an offset loop, the RF VCO 116 and the offset VCO 112 operate at different frequencies than the ultimate transmit frequency emanating from the transmitter output 134, so the RF VCO 116 and the offset VCO 112 are immune to remodulation.  The modulation signals are converted directly to the transmit frequency (i.e. there is no IF) so IF filtering is not needed.  Because of the mixing between the RF VCO 116 signal and the offset VCO 112 signal, however, RF filter 110 is needed to reduce spurious signals generated in the offset loop.  Also, extra circuitry and power consumption are needed for the offset mixer 114 and the offset VCO 112. 
A method that has been used in the prior art to obviate the need for an offset loop in a direct conversion transmitter is operation of an RF VCO at twice the frequency of the transmit signal frequency.  The RF signal produced by the RF VCO is applied to a quadrature signal generator system to both divide the frequency of the RF signal in half and generate a pair of signals in phase quadrature.  Having the RF VCO operate at twice the transmit frequency reduces the susceptibility of the RF VCO to remodulation and removes the necessity for an offset loop, thereby reducing size, power consumption, and cost. 
In a direct conversion radio transceiver, an important aspect of the system is the quadrature signal generation.  A prior art method for quadrature signal generation is shown in FIG.  2.  The method uses a flip-flop pair comprised of first and second flip-flops, the first flip-flop being a master flip-flop 204 and the second flip-flop a slave flip-flop 208.  An output of master flip-flop 204 is applied on line 212 to an input of slave flip-flop 208.  An inverted output of slave flip-flop 208 is applied on line 216 to an input of master flip-flop 204. 
Clock oscillator 228 generates a clock signal on line 232 which is applied to an input of master flip-flop 204 and inverted, by way of an inverting input 236 of slave flip-flop 208, and then applied to flip-flop 208. 
Outputs generated by master flip-flop 204 and slave flip-flop 208 are also generated on lines 220 and 224, respectively.  The signals generated on lines 220 and 224 are of substantially the same frequency but offset in phase.  When the clock signal generated by clock oscillator is of exactly a 50--50 duty cycle, the signals generated on lines 220 and 224 are in a quadrature phase relationship. 
A byproduct of the quadrature signal generation method shown in FIG.  2 is that the frequency of the signals appearing on lines 220 and 224 is divided in half.  Developing quadrature signals utilizing a master-slave flip-flop pair can thus be a method for implementing a direct conversion transmitter having a VCO with reduced susceptibility to remodulation.  The RF VCO operates at twice the transmit frequency and is applied to the quadrature signal generator, and the signals from the quadrature signal generator are in phase quadrature and are divided in half to the desired transmit frequency. 
The frequency performance of the flip-flop pair is dependent upon the load for which it is driving.  For example, in FIG.  2, as the capacitance on lines 220 and 224 of the flip-flop pair increases, the maximum frequency that the flip-flop pair can operate decreases.  Therefore, with a given capacitive load, a frequency is ultimately reached where the flip-flop pair can no longer accurately track edge transitions of the clock signal, and the flip-flop pair no longer functions properly.  When differential quadrature signals are extracted from the flip-flop pair, the capacitive load is even greater.  Therefore, a way to increase the frequency performance of the flip-flop pair is to reduce the capacitive loading.  There is, however, a limit to the amount of reduction in the capacitive loading that can be achieved and therefore a limit to the maximum frequency of operation of the quadrature signal generation system employing a flip-flop pair. 
What is needed, therefore, is a quadrature signal generator system with extended frequency performance that can be used in a direct conversion communication system to both divide the frequency of the RF VCO carrier signal in half and generate signals in phase quadrature. 
FIG.  6 is a circuit diagram of a prior art passive phase shift network 600.  The passive phase shift network 600 has two resistors 601 and 603 forming a resistor pair (R pair) and two capacitors 605 and 607 forming a capacitor pair (C pair).  The R pair and the C pair are connected together in a bridge arrangement as is well known in the art.  The passive phase shift network 600 receives differential input signals X(0.degree.)  and X(180.degree.)  at terminals 609 and 609, respectively, and produces differential output signals Y(0.degree.)  and Y(180.degree.)  at terminals 611 and 613, respectively.  The passive phase shift network 600 is represented by the following Laplace transfer function Y(0.degree.)/X(0.degree.)=(1-sRC)/(1+sRC).  This transfer function is a first order all-pass function, with phase angle of -2tan.sup.-1 (wRC).  When w=1/RC, the differential output signals Y(0.degree.)  and Y(180.degree.)  are in phase quadrature relative to the differential input signals X(0.degree.)  and X(180.degree.),  respectively, when the differential input signals X(0.degree.)  and X(180.degree.)  are sinusoidal.  The phase shift network 600 is passive because the phase quadrature relationship between the differential output signals Y(0.degree.)  and Y(180.degree.)  and the differential input signals X(0.degree.)  and X(180.degree.)  is fixed. 
The phase quadrature relationship between the differential output signals Y(0.degree.)  and Y(180.degree.)  and the differential input signals X(0.degree.)  and X(180.degree.)  can varied about ideal phase quadrature by varying either the R pair or C pair in the bridge arrangement.  For example, the C pair may be implemented as voltage-variable capacitors in the form of integrated reverse-biased NPN junctions.  However, voltage-variable capacitors in the form of integrated reverse-biased NPN junctions do not have the sensitivity (.increment. C per .increment. V) needed to allow complete integration of the quadrature generator.  The sensitivity must be large enough to cover the make tolerance of the R pair and the C pair which determine the quadrature frequency. 
FIG.  7 is a circuit diagram of a prior art variable phase shift network 700.  The variable phase shift network 700 implements each resistor of the R pair 601 and 603 as voltage-variable resistors in the form of FETS 701 and 703, respectively, operating in their linear region.  A control voltage, Vcntl, controls each of the FETS 701 and 703 to vary the phase quadrature relationship between the differential output signals Y(0.degree.)  and Y(180.degree.)  and the differential input signals X(0.degree.)  and X(180.degree.)  about ideal phase quadrature.  To achieve a maximum operating frequency the variable phase shift network 700 is designed for a minimum insertion loss (i.e. a minimum drain-source resistance (R.sub.ds)) which requires using a FET with large width/length (W/L) gate ratio.  However, the large gate ratio introduces parasitic capacitances that severely limits the maximum operating frequency for a given integrated circuit process. 
Patent application UK 2196195A teaches using varactors as variable capacitive elements.  Since current integrated circuit processes do not typically permit varactors, this implementation would require discrete parts external to an integrated circuit.  Further, this application teaches using a single-ended input signal and therefore does not compensate for even order distortion generated in the varactors.  Therefore, it does not produce the waveform symmetry required for accurately detecting quadrature in an exclusive-OR feedback phase locked loop (PLL) and it is not suitable for precision quadrature mixing applications. 
Electronics Letters, May 10, 1984, Vol.20 No.10 teaches a PLL phase shift network.  This PLL phase shift network uses a FET as a variable resistor element and receives a single-ended input signal.  Therefore, this design suffers from the same problems as discussed with the FETs in FIG.  7 and the single ended signal in patent application UK 2196195A.
Accordingly, there is a further need for a quadrature generator having a variable phase shift network that splits a signal into components whose phase is varied about ideal quadrature, that has a sensitivity range large enough to cover the make tolerances of all the elements determining an absolute phase shift to permit integration of the quadrature generator on a custom integrated circuit, that has a wide range of operating frequencies and that overcomes the imbalance created by single-ended signals.