To improve the performance of a processing system, a Single Instruction, Multiple Data (SIMD) instruction is simultaneously executed for multiple operands of data in a single instruction period.  For example, an eight-channel SIMD execution engine might simultaneously execute an instruction for eight 32-bit operands of data, each operand being mapped to a unique compute channel of the SIMD execution engine.  Moreover, one or more registers in a register file may be used by SIMD instructions, and each register may have fixed locations associated with execution channels (e.g., a number of eight-word registers could be provided for an eight-channel SIMD execution engine, each word in a register being assigned to a different execution channel).  An ability to efficiently and flexibly access register information in different ways may further improve the performance of a SIMD execution engine.