Delta-sigma D/A converters have at least one delta-sigma modulator of first or higher order.  Delta-sigma modulators are basically known from the state of the art.  Delta-sigma modulators process a (digital valued or analog) input signal and convert such into a binary, clock signal time discrete, output signal, wherein the output signal always enters into the processing of the input signal.  The clock rate, with which a delta-sigma modulator is operated and with which the output signal is output, is, as a rule, markedly greater than the data rate of the input signal and also greater than in the case of many other D/A converters (principle of over-sampling).  The output signal can assume during each clock cycle exactly one of two values, which are referred to as “1” and “0”.  Accordingly, the output signal is formed by a stream of “1”s and “0”s, wherein the data rate, with which these values are output corresponds to the clock rate of the delta-sigma modulator.  The output signal of a delta-sigma modulator is frequently also referred to as a bit stream.  The average value of the output signal of the delta-sigma modulator corresponds to the value of the input signal. 
Delta-sigma modulators are frequently applied in high resolution D/A converters, since these, due to the principle of over-sampling, provide a high signal to noise ratio.  Furthermore, delta-sigma modulators are relatively simply implementable in an ASIC (application specific integrated circuit), a CPLD (complex programmable logic device), and/or in an FPGA (field programmable gate array).  In the case of use in a D/A converter, the input signal of the delta-sigma modulator is digital valued.  The output signal of the delta-sigma modulator, which, as a rule, is formed by a bit stream, is filtered by an analog, low-pass filter, so that an analog signal is obtained, whose value corresponds to the digital input value of the input signal. 
Depending on the input value of the (digital valued) input signal to be displayed, in a delta-sigma D/A converter, the output signal of the delta-sigma modulator has an different relationship of “1”s and “0”s.  In this way, also the frequency, with which a change between “1”s and “0”s occurs, depends on the input value to be displayed.  This will now be explained with reference to FIGS.  1a-1c, in which, in each case, the output signal OS of a delta-sigma modulator is plotted versus time t. The clock cycles are indicated on the time axis.  For example, the minimum input value presentable in the output signal of the delta-sigma modulator is represented by a series of “0”s, as shown in FIG.  1a.  The maximum presentable input value is represented by a series of “1”s, as shown in FIG.  1b.  In both cases, the output signal has a frequency of 0 Hz (minimum frequency).  The maximum frequency in the output signal is reached, when, in the output signal of the delta-sigma modulator, the “0”s and the “1”s alternate with each clock signal, as such is presented in FIG.  1c.  Depending on the input value to be represented, thus, the frequency of the output signal varies in this relatively large frequency range. 
Analog low-pass filters are, as a rule, designed for a relatively narrow frequency range, in which it then achieves a very good filter characteristic curve.  The larger the separation of the actual frequency from this optimal frequency range, the poorer, as a rule, is the filter characteristic curve.  Since the frequency of the output signal of the delta-sigma modulator can vary over a broad region, it was necessary previously in delta-sigma D/A converters that relatively complex, analog, low-pass filters be applied for filtering the output signal.  A further problem is that in the output signal the edges (rising and falling edges) extend, as a rule, not so ideally at right angles to the abscissa, this being illustrated in FIG.  1c.  Rather, there arises in the region of the edges (compare rising edges 2 and falling edges 3 in FIGS.  1c and 1d) frequently a distortion, this being illustrated, by way of example, in FIG.  1d.  Due to the distortion, the signal deviates in the region of the edges 2, 3 from an ideal rectangular signal.  Frequently, the output signal is transmitted through a galvanic isolation, before it is fed to the analog, low-pass filter.  This leads, as a rule, to an additional distortion of the edges 2, 3.  The distortion of the edges 2, 3 leads to an error.  For example, an analog low-pass filtering occurs, as a rule, in such a way that the area under the signal to be filtered is averaged over time.  Due to the distortion, there arises in the case of this averaging, respectively low-pass filtering, a deviation compared with an ideal, rectangular signal.  Additionally problematic is that this error varies with the number of edges.  Since the frequency of the output signal of the delta-sigma modulator and therewith the number the edges (per unit time) can vary over a large range, the error occurring from the distortion cannot be simply corrected by a constant offset. 
This problem is present especially in cases, in which a digital valued, measured value or a digitally valued, actuating value is to be converted into an analog voltage or electrical current.  Especially, in the case of this application, an as exact as possible conversion with high linearity is desired. 
On the basis of these considerations, an object of the present invention is to provide a delta-sigma D/A converter, which enables, over the range of the input value to be displayed for the input signal, an as exact as possible digital to analog conversion, without that complex (analog) filtering must be applied and/or complex error correction performed.