1.  Industrial Field
The present invention relates to electron beam lithography for use in producing large scale integrated circuits (LSIs), and is particularly applicable to a high-throughput electron beam lithography system and method capable of improving productivity while accomplishing a fine patterning ability. 
2.  Description of the Prior Art
LSI patterns are being formed in smaller, finer sizes and at higher degrees of integration than ever before, and it is further desired to realize patterning even finer than the resolution limit of light lithography employed thus far.  Lithography that can satisfy this fine patterning desire has been achieved by electron beam lithography technology.  However, known electron beam lithography technology has suffered from the problems of slow processing speed and poor productivity.  One known technique for improving the productivity of such lithography technology, to obtain a higher throughput, is described in Japanese Patent Laid-Open No.  29981/1979, entitled "Electron Beam Irradiation Apparatus". 
The basic concept of a high-throughput lithography method can be simply described by comparison with a conventional electron beam lithography method.  FIG.  4 illustrates a lithography system and method based on a variable shaped technique which is a conventional electron beam lithography method.  According to this lithography method, an electron beam 13 emitted like a shower from a gun 4 is shaped into a square form through a first aperture 5 having a square hole, and a square shaped beam 13' is focused on a second aperture plate 8' using a first lens 6 and a shaping deflector 7.  The electron beam is formed into a square beam of any size by the second aperture plate 8' by adjusting the overlapping of the electron beam 13' and a square opening 14".  A square shaped beam 13" that is formed is reduction-projected onto a predetermined position on a sample 12 while maintaining a precise focusing through a projection lens 9, a static deflector 10, and an objective lens 11.  According to this conventional variable shaped lithography method, the pattern to be delineated is divided into squares of dissimilar sizes which are then delineated one by one.  With the conventional method, therefore, even those patterns that are much repeated as shown, for example, on the sample 12 of FIG.  4 are all delineated by the same method.  Accordingly, this conventional method requires a great number of beam "shots" and an extended period of time for lithography processing. 
One way to improve the throughput is shown in FIG.  3, where desired lithography pattern elements 14' are formed in the second aperture plate 8 in advance.  The electron beam 13' is shaped into pattern elements 14' and the pattern is delineated by repeating the cell projection of the thus shaped electron beams.  The above lithography method makes it possible to greatly decrease the number of shots and to shorten the time for lithography processing.  It is particularly effective for delineating memory LSIs such as DRAMs in which most of the patterns have periodicity, and makes it possible to increase the processing speed.