Analog-to-digital converters such as flash and folding use amplifier arrays to parallel process an input value.  Interpolation can be used to generate intermediate values between two adjacent amplifiers in the array.  For example, in a folding ADC architecture, folding can be used to reduce component count (such as the number of comparators), and the folded amplifier array output can be interpolated to recover resolution. 
Resistive interpolation uses two or more resistors between adjacent amplifiers to provide one or more interpolation (intermediate) values between the amplifier-driven outputs.  FIG.  1A illustrates a portion of a two-stage cascaded resistor interpolator, providing interpolation-by-3.  The schematic can represent single-ended signals, or polarities of differential signals. 
Stage N amplifiers A1 and A2 drive nodes D1 and D2, with the series-coupled interpolation resistors R/R′/R providing intermediate interpolation nodes I1 and I2.  The interpolation resistors need not be of the same resistance value, as indicated by R and R′.
The Stage N amplifier-driven nodes D1/D2 and interpolation nodes I1/I2 provide the Stage N driven and interpolated outputs.  The Stage N outputs are inputs to the Stage N+1 amplifiers at driven nodes, with interpolated nodes in between. 
FIG.  1B illustrates voltage inputs for amplifiers A1 and A2, VIN,1 and VIN,2, and the resulting outputs: driven outputs VOUT,D1 and VOUT,D2 from the driven nodes D1 and D2; and interpolation (intermediate) outputs VOUT,I1 and VOUT,I2 from the interpolated nodes I1 and I2.  The interpolated voltages VOUT,I1 and VOUT,I2 have values intermediate the amplifier outputs VOUT,D1 and VOUT,D2. 
FIG.  1C illustrates the two-stage resistor interpolator with the stage nodes aligned (and numbered).  As configured, a Stage N amplifier/node A6/6 drives the corresponding Stage N+1 amplifier/node A6/6 with a driven output, and the adjacent Stage N interpolation nodes 5 and 7 drive the Stage N+1 amplifier/nodes A3/3 and A9/9 with interpolated outputs, with interpolation resistors/nodes between the driven nodes.