1.  Field of the Invention
The present invention relates to a semiconductor device including a delay circuit, and particularly to a semiconductor device in which a determination can still be made as to whether or not a delay time is within a specified value even when a delay time of the delay circuit is a minute value, and to a method of testing such a semiconductor device. 
2.  Description of Related Art
Some semiconductor devices include a delay circuit for delaying an external signal.  For example, a Dynamic Random Access Memory (DRAM) controller delays by a predetermined phase a data strobe signal inputted from a Synchronous Dynamic Random Access Memory (SDRAM) in a DLL (Delayed Looked Loop) circuit, and stores the data inputted from the SDRAM by use of the signal that has thus been delayed. 
In a delay circuit represented by these DLL circuits, cases may arise where a delay time extending beyond a specified value occurs due to an abnormal condition prevailing at a time that a semiconductor device is manufactured.  In this context, an abnormal condition at a time of manufacturing way, for example, mean occurrences such as fluctuations in capacity value, short-circuits, and deformed patterns caused by foreign matter attaching itself to a delay circuit.  Therefore, when the functioning of a semiconductor is tested, a delay time of a delay circuit can be measured with the use of a tester, and a semiconductor device having a delay circuit whose delay time extends beyond a specified value can accordingly be singled out as a defective product. 
Further, Japanese unexamined patent publication No.  2002-286805 is disclosed as related art of the above.