#NEWLINE# def test_data_instructions( self ) : #NEWLINE# #INDENT# instr_samples = [ [ 'mov r0, r1' ] , [ 'mov r3, r8' ] , [ 'mov r5, r8' ] , [ 'and r0, r1, r2' ] , [ 'and r0, r6, #0x33' ] , [ 'orr r3, r5, r8' ] , [ 'orr r3, r5, #0x79' ] , [ 'orr r3, r5, r8, lsl #0x19' ] , [ 'eor r3, r5, r8' ] , [ 'eor r8, r4, r5, lsl r6' ] , [ 'eor r8, r4, r5, lsl #0x11' ] , [ 'add r8, r9, r11' ] , [ 'sub r0, r3, r12' ] , [ 'rsb r0, r3, r12' ] , [ 'cmp r3, r12' ] , [ 'cmn r3, r12' ] , [ 'mov r8, r5, lsl r6' ] , [ 'eor r8, r4, r5, lsl r6' ] , [ 'mul r3, r4, r8' ] , [ 'mov r8, #0' , 'mul r3, r4, r8' ] , [ 'mul r3, r4, r4' ] , [ 'mvn r3, r8' ] , [ 'lsl r2, r4, #0x0' ] , [ 'lsl r2, r4, #0x1' ] , [ 'lsl r2, r4, #10' ] , [ 'lsl r2, r4, #31' ] , [ 'movs r0, #0' ] , [ 'movs r0, #-10' ] , [ 'mov r0, #0x7FFFFFFF' , 'mov r1, r0' , 'adds r3, r0, r1' ] , [ 'mov r0, #0x7FFFFFFF' , 'mov r1, r0' , 'subs r3, r0, r1' ] , [ 'mov r0, #0x00FFFFFF' , 'add r1, r0, #10' , 'subs r3, r0, r1' ] , [ 'mov r0, #0x00FFFFFF' , 'add r1, r0, #10' , 'rsbs r3, r0, r1' ] , [ 'mov r0, #0xFFFFFFFF' , 'adds r3, r0, #10' ] , [ 'mov r0, #0x7FFFFFFF' , 'mov r1,  #5' , 'adds r3, r0, r1' ] , [ 'mov r0, #0x80000000' , 'mov r1,  #5' , 'subs r3, r0, r1' ] , [ 'mov r0, #0x80000000' , 'mov r1,  #5' , 'rsbs r3, r0, r1' ] , [ 'lsls r2, r4, #0x0' ] , [ 'lsls r2, r4, #0x1' ] , [ 'lsls r2, r4, #10' ] , [ 'lsls r2, r4, #31' ] ] #NEWLINE# for instr in instr_samples : #NEWLINE# #INDENT# self . __test_asm_instruction ( instr )