func ADDPD(mx, x operand.Op) (*intrep.Instruction, error) {
	switch {
	case operand.IsXMM(mx) && operand.IsXMM(x):
		return &intrep.Instruction{
			Opcode:   "ADDPD",
			Operands: []operand.Op{mx, x},
			Inputs:   []operand.Op{mx, x},
			Outputs:  []operand.Op{x},
			ISA:      []string{"SSE2"},
		}, nil
	case operand.IsM128(mx) && operand.IsXMM(x):
		return &intrep.Instruction{
			Opcode:   "ADDPD",
			Operands: []operand.Op{mx, x},
			Inputs:   []operand.Op{mx, x},
			Outputs:  []operand.Op{x},
			ISA:      []string{"SSE2"},
		}, nil
	}
	return nil, errors.New("ADDPD: bad operands")
}
ADDPD: Add Packed Double-Precision Floating-Point Values.

Forms:

ADDPD xmm  xmm
ADDPD m128 xmm
package x86
import (
	"errors"
	intrep "github.com/mmcloughlin/avo/ir"
	"github.com/mmcloughlin/avo/operand"
	"github.com/mmcloughlin/avo/reg"
)
func ADCB(imr, amr operand.Op) (*intrep.Instruction, error) {
	switch {
	case operand.IsIMM8(imr) && operand.IsAL(amr):
		return &intrep.Instruction{
			Opcode:   "ADCB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsR8(amr):
		return &intrep.Instruction{
			Opcode:   "ADCB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsR8(imr) && operand.IsR8(amr):
		return &intrep.Instruction{
			Opcode:   "ADCB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{imr, amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsM8(imr) && operand.IsR8(amr):
		return &intrep.Instruction{
			Opcode:   "ADCB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{imr, amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsM8(amr):
		return &intrep.Instruction{
			Opcode:   "ADCB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsR8(imr) && operand.IsM8(amr):
		return &intrep.Instruction{
			Opcode:   "ADCB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{imr, amr},
			Outputs:  []operand.Op{amr},
		}, nil
	}
	return nil, errors.New("ADCB: bad operands")
}
func ADCL(imr, emr operand.Op) (*intrep.Instruction, error) {
	switch {
	case operand.IsIMM32(imr) && operand.IsEAX(emr):
		return &intrep.Instruction{
			Opcode:   "ADCL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsR32(emr):
		return &intrep.Instruction{
			Opcode:   "ADCL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsIMM32(imr) && operand.IsR32(emr):
		return &intrep.Instruction{
			Opcode:   "ADCL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsR32(imr) && operand.IsR32(emr):
		return &intrep.Instruction{
			Opcode:   "ADCL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{imr, emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsM32(imr) && operand.IsR32(emr):
		return &intrep.Instruction{
			Opcode:   "ADCL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{imr, emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsM32(emr):
		return &intrep.Instruction{
			Opcode:   "ADCL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsIMM32(imr) && operand.IsM32(emr):
		return &intrep.Instruction{
			Opcode:   "ADCL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsR32(imr) && operand.IsM32(emr):
		return &intrep.Instruction{
			Opcode:   "ADCL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{imr, emr},
			Outputs:  []operand.Op{emr},
		}, nil
	}
	return nil, errors.New("ADCL: bad operands")
}
func ADCQ(imr, mr operand.Op) (*intrep.Instruction, error) {
	switch {
	case operand.IsIMM32(imr) && operand.IsRAX(mr):
		return &intrep.Instruction{
			Opcode:   "ADCQ",
			Operands: []operand.Op{imr, mr},
			Inputs:   []operand.Op{mr},
			Outputs:  []operand.Op{mr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsR64(mr):
		return &intrep.Instruction{
			Opcode:   "ADCQ",
			Operands: []operand.Op{imr, mr},
			Inputs:   []operand.Op{mr},
			Outputs:  []operand.Op{mr},
		}, nil
	case operand.IsIMM32(imr) && operand.IsR64(mr):
		return &intrep.Instruction{
			Opcode:   "ADCQ",
			Operands: []operand.Op{imr, mr},
			Inputs:   []operand.Op{mr},
			Outputs:  []operand.Op{mr},
		}, nil
	case operand.IsR64(imr) && operand.IsR64(mr):
		return &intrep.Instruction{
			Opcode:   "ADCQ",
			Operands: []operand.Op{imr, mr},
			Inputs:   []operand.Op{imr, mr},
			Outputs:  []operand.Op{mr},
		}, nil
	case operand.IsM64(imr) && operand.IsR64(mr):
		return &intrep.Instruction{
			Opcode:   "ADCQ",
			Operands: []operand.Op{imr, mr},
			Inputs:   []operand.Op{imr, mr},
			Outputs:  []operand.Op{mr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsM64(mr):
		return &intrep.Instruction{
			Opcode:   "ADCQ",
			Operands: []operand.Op{imr, mr},
			Inputs:   []operand.Op{mr},
			Outputs:  []operand.Op{mr},
		}, nil
	case operand.IsIMM32(imr) && operand.IsM64(mr):
		return &intrep.Instruction{
			Opcode:   "ADCQ",
			Operands: []operand.Op{imr, mr},
			Inputs:   []operand.Op{mr},
			Outputs:  []operand.Op{mr},
		}, nil
	case operand.IsR64(imr) && operand.IsM64(mr):
		return &intrep.Instruction{
			Opcode:   "ADCQ",
			Operands: []operand.Op{imr, mr},
			Inputs:   []operand.Op{imr, mr},
			Outputs:  []operand.Op{mr},
		}, nil
	}
	return nil, errors.New("ADCQ: bad operands")
}
func ADCW(imr, amr operand.Op) (*intrep.Instruction, error) {
	switch {
	case operand.IsIMM16(imr) && operand.IsAX(amr):
		return &intrep.Instruction{
			Opcode:   "ADCW",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsR16(amr):
		return &intrep.Instruction{
			Opcode:   "ADCW",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsIMM16(imr) && operand.IsR16(amr):
		return &intrep.Instruction{
			Opcode:   "ADCW",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsR16(imr) && operand.IsR16(amr):
		return &intrep.Instruction{
			Opcode:   "ADCW",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{imr, amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsM16(imr) && operand.IsR16(amr):
		return &intrep.Instruction{
			Opcode:   "ADCW",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{imr, amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsM16(amr):
		return &intrep.Instruction{
			Opcode:   "ADCW",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsIMM16(imr) && operand.IsM16(amr):
		return &intrep.Instruction{
			Opcode:   "ADCW",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsR16(imr) && operand.IsM16(amr):
		return &intrep.Instruction{
			Opcode:   "ADCW",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{imr, amr},
			Outputs:  []operand.Op{amr},
		}, nil
	}
	return nil, errors.New("ADCW: bad operands")
}
func ADCXL(mr, r operand.Op) (*intrep.Instruction, error) {
	switch {
	case operand.IsR32(mr) && operand.IsR32(r):
		return &intrep.Instruction{
			Opcode:   "ADCXL",
			Operands: []operand.Op{mr, r},
			Inputs:   []operand.Op{mr, r},
			Outputs:  []operand.Op{r},
			ISA:      []string{"ADX"},
		}, nil
	case operand.IsM32(mr) && operand.IsR32(r):
		return &intrep.Instruction{
			Opcode:   "ADCXL",
			Operands: []operand.Op{mr, r},
			Inputs:   []operand.Op{mr, r},
			Outputs:  []operand.Op{r},
			ISA:      []string{"ADX"},
		}, nil
	}
	return nil, errors.New("ADCXL: bad operands")
}
func ADCXQ(mr, r operand.Op) (*intrep.Instruction, error) {
	switch {
	case operand.IsR64(mr) && operand.IsR64(r):
		return &intrep.Instruction{
			Opcode:   "ADCXQ",
			Operands: []operand.Op{mr, r},
			Inputs:   []operand.Op{mr, r},
			Outputs:  []operand.Op{r},
			ISA:      []string{"ADX"},
		}, nil
	case operand.IsM64(mr) && operand.IsR64(r):
		return &intrep.Instruction{
			Opcode:   "ADCXQ",
			Operands: []operand.Op{mr, r},
			Inputs:   []operand.Op{mr, r},
			Outputs:  []operand.Op{r},
			ISA:      []string{"ADX"},
		}, nil
	}
	return nil, errors.New("ADCXQ: bad operands")
}
func ADDB(imr, amr operand.Op) (*intrep.Instruction, error) {
	switch {
	case operand.IsIMM8(imr) && operand.IsAL(amr):
		return &intrep.Instruction{
			Opcode:   "ADDB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsR8(amr):
		return &intrep.Instruction{
			Opcode:   "ADDB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsR8(imr) && operand.IsR8(amr):
		return &intrep.Instruction{
			Opcode:   "ADDB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{imr, amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsM8(imr) && operand.IsR8(amr):
		return &intrep.Instruction{
			Opcode:   "ADDB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{imr, amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsM8(amr):
		return &intrep.Instruction{
			Opcode:   "ADDB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{amr},
			Outputs:  []operand.Op{amr},
		}, nil
	case operand.IsR8(imr) && operand.IsM8(amr):
		return &intrep.Instruction{
			Opcode:   "ADDB",
			Operands: []operand.Op{imr, amr},
			Inputs:   []operand.Op{imr, amr},
			Outputs:  []operand.Op{amr},
		}, nil
	}
	return nil, errors.New("ADDB: bad operands")
}
func ADDL(imr, emr operand.Op) (*intrep.Instruction, error) {
	switch {
	case operand.IsIMM32(imr) && operand.IsEAX(emr):
		return &intrep.Instruction{
			Opcode:   "ADDL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsR32(emr):
		return &intrep.Instruction{
			Opcode:   "ADDL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsIMM32(imr) && operand.IsR32(emr):
		return &intrep.Instruction{
			Opcode:   "ADDL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsR32(imr) && operand.IsR32(emr):
		return &intrep.Instruction{
			Opcode:   "ADDL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{imr, emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsM32(imr) && operand.IsR32(emr):
		return &intrep.Instruction{
			Opcode:   "ADDL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{imr, emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsIMM8(imr) && operand.IsM32(emr):
		return &intrep.Instruction{
			Opcode:   "ADDL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsIMM32(imr) && operand.IsM32(emr):
		return &intrep.Instruction{
			Opcode:   "ADDL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{emr},
			Outputs:  []operand.Op{emr},
		}, nil
	case operand.IsR32(imr) && operand.IsM32(emr):
		return &intrep.Instruction{
			Opcode:   "ADDL",
			Operands: []operand.Op{imr, emr},
			Inputs:   []operand.Op{imr, emr},
			Outputs:  []operand.Op{emr},
		}, nil
	}
	return nil, errors.New("ADDL: bad operands")
}