[Admin] Fix outdated LTX upscaler

Show app version and ref_t2v trigger

Align face ID app with RoPE reference conditioning

update example 2 prompt for new face

swap example 2 face (face_2.png)

aspect ratio: animate matches input; new-scene 4:3 default w/ ratio dropdown; drop parens from mode labels

remove enhancer option; new frontal-face examples (CC0 from repo-to-space-example-inputs)

add example face face_ex3.jpg

add example face face_ex2.jpg

add example face face_ex1.jpg

card: note distilled model

UI: distilled-model note in description, remove mode/prompt info hints, duration max 8s

cleanup: accurate native-pack comments; drop dead cudaMallocAsync mempool poke

native pack (OffloadMode.NONE) + default native allocator + fraction=1.0 (fast, no offload latency)

wrap generation in inference_mode (streaming autograd fix); default enhancer off (device bug)

CPU offload: skip module-scope pack so shared checkpoint blob survives for streaming

fix #1: OffloadMode.CPU — stream transformer so resident drops, activation hoard fits

fix #2: cudaMallocAsync + fraction=1.0 + mempool release threshold 8GB (stop pool accumulation)

native allocator (expandable_segments) + fraction=1.0: reuse freed blocks (cudaMallocAsync accumulated to OOM)

raise per-process memory fraction to 1.0 (ZeroGPU caps fork below MIG slice)

Run transformer in bf16 (fp8 upcast-on-forward churn OOMs diffusion on MIG)

Free Gemma before diffusion (build-use-free) to fit VRAM

ZeroGPU MIG: use cudaMallocAsync allocator (native caching allocator NVML query asserts)

diag: log GPU size/mem/allocator backend in fork to diagnose NVML assert

ZeroGPU: expandable_segments to fix NVML_SUCCESS allocator assert on fp8 matmul

fp8 fuse: fall back to CPU SR when Triton has no real device

fp8 fuse on CPU at module scope (ZeroGPU parent has no real CUDA for Triton)

app.py: LTX-2.3 distilled + in-space Gemma + source_phase overlap + xlarge

requirements for upstream LTX-2.3 port

Port to official upstream LTX-2.3 code (transformer/VAE/vocoder) + BFS source_phase

LTX-2.3: disable unsupported vocoder (silent video), keep joint AV denoising

LTX-2.3 VAE: drop 3 vestigial per-channel-stat buffers (fix meta-tensor crash)

Switch base to LTX-2.3-22b (the checkpoint the Face-ID LoRA was trained on)

Add mcp dependency (gradio[mcp] extra)

Add MCP support: mcp_server=True + tool docstring

Fix LoRA quality: stochastic-rounding fp8 fuse on CPU (match GPU kernel)

ZeroGPU: load/fuse on CPU so .to('cuda') gets hijacked in parent

ZeroGPU: preload models at module scope (fix ephemeral-fork warmup)

Apply Face-ID LoRA correctly: overlap + source-phase reference conditioning (distilled.py)

Apply Face-ID LoRA correctly: overlap + source-phase reference conditioning (pipeline_utils.py)

Apply Face-ID LoRA correctly: overlap + source-phase reference conditioning (model.py)

Apply Face-ID LoRA correctly: overlap + source-phase reference conditioning (reference_overlap.py)

Apply Face-ID LoRA correctly: overlap + source-phase reference conditioning (modality.py)

Apply Face-ID LoRA correctly: overlap + source-phase reference conditioning (app: wire reference + ref_t2v prefix)

Warmup once at startup, fix example images, add text-only scene mode

Cache VAE/vocoder/upsampler builds across requests

Warm-start + cache pipeline models to cut first-request latency

Update app.py

Upload ltx-pipelines package

Upload ltx-core package