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arxiv:2411.16341

From CISC to RISC: language-model guided assembly transpilation

Published on Nov 25
· Submitted by ahmedheakl on Nov 26
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Abstract

The transition from x86 to ARM architecture is becoming increasingly common across various domains, primarily driven by ARM's energy efficiency and improved performance across traditional sectors. However, this ISA shift poses significant challenges, mainly due to the extensive legacy ecosystem of x86 software and lack of portability across proprietary ecosystems and software stacks. This paper introduces CRT, a lightweight LLM-based transpiler that automatically converts x86 assembly to ARM assembly. Our approach bridges the fundamental architectural gap between x86's CISC-based and ARM's RISC-based computing paradigms while preserving program semantics and optimizing performance. We evaluate CRT on diverse real-world applications, achieving 79.25% translation accuracy from x86 to ARMv5 on our comprehensive test suite, and an 88.68% accuracy from x86 to RISC-V. In practical deployments on Apple M2 hardware (ARMv8), our transpiled code achieves 1.73times speedup compared to Apple's Rosetta 2 virtualization engine, while delivering 2.41times memory efficiency and 1.47times better energy consumption. Through testing and analysis, we show that CRT successfully navigates the CISC/RISC divide and generates correctly executable RISC code despite machine ``language'' barriers. We release our code, models, training datasets, and benchmarks at: https://ahmedheakl.github.io/asm2asm/.

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The transition from x86 to ARM architecture is becoming increasingly common across various domains, primarily driven by ARM's energy efficiency and improved performance across traditional sectors. However, this ISA shift poses significant challenges, mainly due to the extensive legacy ecosystem of x86 software, and lack of portability across proprietary ecosystems and software stacks. This paper introduces CRT, a lightweight LLM-based transpiler that automatically converts x86 assembly to ARM assembly. Our approach bridges the fundamental architectural gap between x86's CISC-based and ARM's RISC-based computing paradigms while preserving program semantics and optimizing performance.
We evaluate CRT on diverse real-world applications, achieving 79.25% translation accuracy from x86 to ARMv5 on our comprehensive test suite, and a 88.68% accuracy from x86 to RISC-V. In practical deployments on Apple M2 hardware (ARMv8), our transpiled code achieves 1.73x speedup compared to Apple's Rosetta 2 virtualization engine, while delivering 2.41x memory efficiency and 1.47x better energy consumption. Through testing and analysis, we show that CRT successfully navigates the CISC/RISC divide, and generates correctly executable RISC code despite machine ''language'' barriers. We release our code, models, training datasets, and benchmarks here

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Nice job. What do you mean by 88% accuracy? Surely when re-compiling binaries it's either 100% or 0%? I.E either it compiles or it doesn't, there is no in-between. Are you saying it compiles 88% of cases or are you saying it always compiles but the control flow is only 88% accurate (i.e it may introduce bugs)

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Hi @MichaelBarryUK ,

Thanks for your question. The accuracy mentioned in our paper is test cases accuracy. The code generated by our transpiler is 100% executable (i.e. it has no syntax errors). You will find a nice analysis in the paper of what type of errors our transpiler produced to fail 12% of the time.

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