KIIT College of Engineering, Gurgaon Lesson planning for the semester started w.e.f. 16th July 2018 Academic Session 2018-19 Name of Institute: KIIT College of Engineering, Gurgaon Name of teacher with Designation: Mr. Sharvan Kumar (Asst. Professor) Department: Computer Science & Engineering Class: B.Tech CSE-5th Semester Subject Name: Computer Organization and Architecture Subject Code: CSE-210 F Month Class Number of Days Topics/ Chapter covered Academic Activity Test/ Assignment July+August CSE-V Semester 2 Boolean algebra and Logic gates, Combinational logic blocks(Adders, Multiplexers, Encoders, de-coder), Point Presentations , Lab Experiments and Quiz Assignment : 1 Class Test : 1 2 Sequential logic blocks(Latches, Flip-Flops, Registers, Counters) 2 Store program control concept, Flynn’s classification of computers (SISD, MISD, MIMD); 3 Multilevel viewpoint of a machine: digital logic, micro architecture, ISA, operating systems, high level language; structured organization; 3 CPU, caches, main memory, secondary memory units & I/O; 3 Performance metrics; MIPS, MFLOPS. August CSE-V Semester 1 Instruction set based classification of processors Power Point Presentations, Lab Experiments Assignment : 2 Class Test : 2 2 (RISC, CISC, and their comparison); 2 addressing modes: register, immediate, direct, indirect, indexed; 2 Operations in the instruction set; Arithmetic and Logical, Data Transfer, Control Flow; 1 Instruction set formats (fixed, variable, hybrid); 2 Language of the machine: 8086 1 Simulation using MSAM. September CSE-V Semester 2 CPU Architecture types (accumulator, register, stack, memory/ register) 2 detailed data path of a typical register based CPU 1 Fetch-Decode-Execute cycle (typically 3 to 5 stage);
2 microinstruction sequencing, implementation of control unit, Enhancing performance with pipelining. 2 The need for a memory hierarchy (Locality of reference principle, Memory hierarchy in practice: Cache, main memory and secondary memory, 2 Memory parameters: access/ cycle time, cost per bit); October+ November CSE-V Semester 2 Main memory (Semiconductor RAM & ROM organization, memory expansion, Static & dynamic memory types); Power Point Presentations, Lab Experiments Assignment : 4 Class Test : 4 2 Cache memory (Associative & direct mapped cache organizations. 1 of parallelism (Exploitation of concurrency, throughput enhancement); Amdahl’s law; 1 Instruction level parallelism (pipelining, super scaling –basic features); 2 Processor parallelism (Multiprocessor systems overview). 2 Instruction codes, computer register, computer instructions, timing and control, instruction cycle, type of instructions, memory reference, register reference. I/O reference, 2 Basics of Logic Design, accumulator logic, Control memory, address sequencing, micro-instruction formats, micro-program sequencer, 2 Stack Organization, Instruction Formats, Types of interrupts; Memory Hierarchy. Total Lectures 46 Text Books: 1 Computer Organization and Design, 2nd Ed., by David A. Patterson and John L. 2. Hennessy, Morgan 1997, Kauffmann. Computer Architecture and Organization, 3rd Edi, by John P. Hayes, 1998, TMH. Reference books: Operating Systems Internals and Design Principles by William Stallings,4th edition, 2001, Prentice-Hall Upper Saddle River, New Jersey Computer Organization, 5th Edi, by Carl Hamacher, Zvonko Vranesic,2002, Safwat Zaky.