.ibs FILE ├── File Header Section │ ├── [IBIS Ver] │ ├── [Comment Char] │ ├── [File Name] │ ├── [File Rev] │ ├── [Date] │ ├── [Source] │ ├── [Notes] │ ├── [Disclaimer] │ └── [Copyright] │ ├── [Component] Si_location, Timing_location │ ├── [Manufacturer] │ ├── [Package] R_pkg, L_pkg, C_pkg │ ├── [Pin] signal_name, model_name, R_pin, │ │ L_pin, C_pin │ ├── [Package Model] │ │ └── [Alternate Package Models] │ │ └── [End Alternate Package Models] │ │ │ ├── [Pin Mapping] pulldown_ref, pullup_ref, │ │ gnd_clamp_ref, power_clamp_ref, │ │ ext_ref │ ├── [Diff Pin] inv_pin, vdiff, tdelay_typ, │ │ tdelay_min, tdelay_max │ ├── [Series Pin Mapping] pin_2, model_name, │ │ function_table_group │ ├── [Series Switch Groups] On, Off │ │ │ ├── [Node Declarations] │ │ └── [End Node Declarations] │ │ │ ├── [Circuit Call] Signal_pin, Diff_signal_pins, │ │ │ Series_pins, Port_map │ │ └── [End Circuit Call] │ │ │ └── [Begin EMI Component] Domain, Cpd, C_Heatsink_gnd, │ │ C_Heatsink_float │ ├── [Pin EMI] domain_name, clock_div │ ├── [Pin Domain EMI] percentage │ └── [End EMI Component] │ ├── [Model Selector] KEYWORD
│ ├── [Model Data] │ │ ├── [Resistance Matrix] Banded_matrix, Sparse_matrix, │ │ │ │ Full_matrix │ │ │ ├── [Bandwidth] │ │ │ └── [Row] │ │ │ │ │ ├── [Inductance Matrix] Banded_matrix, Sparse_matrix, │ │ │ │ Full_matrix │ │ │ ├── [Bandwidth] │ │ │ └── [Row] │ │ │ │ │ ├── [Capacitance Matrix] Banded_matrix, Sparse_matrix, │ │ │ │ Full_matrix │ │ │ ├── [Bandwidth] │ │ │ └── [Row] │ │ │ │ │ └── [End Model Data] │ │ │ └── [End Package Model] │ └── [End] .ebd FILE ├── File Header Section │ ├── [IBIS Ver] │ ├── [Comment Char] │ ├── [File Name] │ ├── [File Rev] │ ├── [Date] │ ├── [Source] │ ├── │ ├── [Disclaimer] │ └── [Copyright] │ ├── [Begin Board Description] │ ├── [Manufacturer] │ ├── [Number of Pins] │ ├── [Pin List] signal_name │ ├── [Path Description] Len, L, R, C, Fork, Endfork, Pin, │ │ Node │ ├── [Reference Designator Map] │ └── [End Board Description] │ └── [End]
Example: | variable typ min max [Temperature Range] 27.0 -50 130.0 Keyword: [Voltage Range] Required: Yes, if [Pullup Reference], [Pulldown Reference], [POWER Clamp Reference], and [GND Clamp Reference] are not present Description: Defines the power supply voltage tolerance over which the model is intended to operate. It also specifies the default voltage rail to which the [Pullup] and [POWER Clamp] I-V data is referenced. Usage Rules: Provide actual voltages (not percentages) in the typ, min, max format. “NA” is allowed for the min and max values only. Other Notes: If the [Voltage Range] keyword is not present, then all four of the keywords described below must be present: [Pullup Reference], [Pulldown Reference], [POWER Clamp Reference], and [GND Clamp Reference]. If the [Voltage Range] is present, the other keywords are optional and may or may not be used as required. It is legal (although redundant) for an optional keyword to specify the same voltage as specified by the [Voltage Range] keyword. Example: | variable typ min max [Voltage 5.0V 4.5V 5.5V Keyword: [Pullup Reference] Required: Yes, if the [Voltage Range] keyword is not present Description: Defines a voltage rail than that defined by the [Voltage Range] keyword as the reference voltage for the [Pullup] I-V data. Usage Rules: Provide actual voltages (not percentages) in the typ, min, max format. “NA” is allowed for the min and max values only. Notes: This keyword, if present, also defines the voltage range over which the typ, min, and max dV/dt_r values are derived. Example: | variable typ min max [Pullup Reference] 5.0V 4.5V 5.5V Keyword: [Pulldown Reference] Required: Yes, if the [Voltage Range] keyword is not present
Table 4 through Table 7 summarizes the bus hold initializations and switching transitions: Table – Bus Hold without Off_Delay – Initialization Initial Vdie Value Initial Bus Hold Submodel State <= V_trigger_r & < V_trigger_f low => V_trigger_f & > V_trigger_r high Recommendations if neither or both conditions above are satisfied <= (V_trigger_f + V_trigger_r)/2 low > (V_trigger_f + V_trigger_r)/2 high Table – Bus Hold without Off_Delay - Transitions Prior Bus Hold Submodel State Vdie transition through V_trigger_r/f Bus Hold Transition Low V_trigger_r low-to-high Low V_trigger_f no change High V_trigger_r no change High V_trigger_f high-to-low Table – Bus Hold with Off_Delay (Requires Either [Pullup] or [Pulldown] Only) - Initialization [Pullup] or [Pulldown] Table Initial Bus Hold Submodel State (Off Mode) [Pullup] low [Pulldown] high Table – Bus Hold with Off_Delay (Requires Either [Pullup] or [Pulldown] Only) - Transitions Prior Bus Hold Submodel State Vdie transition through V_trigger_r/f Bus Hold Transition Off_delay Transition Low V_trigger_r low-to-high high-to-low
Usage Rules: The keyword is followed by the name of the board level component. If the .ebd file contains more than one [Begin Board Description] keyword, then each name must be unique. The length of the component name must not exceed 40 characters in length, and blank characters are allowed. For every [Begin Board Description] keyword there must be a matching [End Board Description] keyword. Example: [Begin Board Description] 16Meg X 8 SIMM Module Keyword: [Manufacturer] Required: Yes Description: Declares the manufacturer of the components(s) that use this .ebd file. Usage Rules: Following the keyword is the manufacturer’s name. It must not exceed 40 characters, and can include blank characters. Each manufacturer must use a consistent name in all .ebd files. Example: [Manufacturer] Quality SIMM Corp. Keyword: [Number Of Pins] Required: Yes Description: the parser the number of pins to expect. Pins are any externally accessible electrical connection to the component. Usage Rules: The field must be a positive decimal integer. Note: The simulator must not limit the Number Of Pins to any value less than 1,000. The [Number Of Pins] keyword must be positioned before the [Pin List] keyword. Example: [Number Of Pins] 128 Keyword: [Pin List] Required: Yes Description: Tells the parser the pin names of the user accessible pins. It also informs the parser which pins are connected to power and ground. Sub-Params: signal_name Usage Rules: Following the [Pin List] keyword are two columns. The first column lists the pin name while the second lists the data book name of the signal connected to that pin. There must be as many pin_name/signal_name rows as there are pins given by the preceding [Number Of Pins] keyword. Pin names must be the alphanumeric external pin names of the part. The pin names cannot exceed eight characters in length. Any pin associated with a signal name that begins with “GND” or “POWER” will be interpreted as connecting to the boards ground or power plane. In