yusuke1997/dblp-id-title huggingface dataset:
New design methodology with efficient prediction of quality metrics for logic level design towards dynamic reconfigurable logic
Applying neural networks to performance estimation of embedded software
NP-SARC: Scalable network processing in the SARC multi-core FPGA platform
Task scheduling with fault-tolerance in real-time heterogeneous systems
Fault-tolerant hexagonal arithmetic array processors
An energy-efficient near-data processing accelerator for DNNs to optimize memory accesses
Functional programming of a robot motion control
A parallel markovian model reliability algorithm for hypercube networks
Integrated commitment protocol for parallel transaction processing in real-time systems
UMFS: An efficient user-space file system for non-volatile memory
HEA-PAS: A hybrid energy allocation strategy for parallel applications scheduling on heterogeneous computing systems
A co-processor for unification in prolog: The microprogramming level
Evaluating the reliability of computational grids from the end user's point of view
Mapping real-time motion estimation type algorithms to memory efficient, programmable multi-processor architectures
Efficient adaptive bandwidth allocation for deadline-aware online admission control in centralized time-sensitive networking
Reinforcement learning-driven address mapping and caching for flash-based remote sensing image processing
Evaluating computation/communication balance in an object recognition task
An improved register-transfer level functional partitioning approach for testability
A comprehensive review on hardware implementations of lattice-based cryptographic schemes
The fault-tolerant architecture of the safe system
RISC, a microprocessor architecture for GaAs technology
A design methodology of microprogrammed controllers for custom CMOS IC's
Bounding carry-in interference for synchronous parallel tasks under global fixed-priority scheduling
Cluster-based multicore real-time mixed-criticality scheduling
Animating Pascal programs on microcomputers
Process scenario discovery from event logs based on activity and timing information
A transmission window technique for CAN networks
Using term dependencies of a thesaurus in the fuzzy set model
3D network-on-chip design for embedded ubiquitous computing systems
Memory hierarchy performance measurement of commercial dual-core desktop processors
A D-graph based approach for verifying response time of "critical" programs
Agents for information retrieval: Issues of mobility and coordination
An improved reconfiguration algorithm for degradable VLSI/WSI arrays
Achieving high degree of concurrency in multidatabase transaction scheduling: MTOS
Enhancing Internet of Things Security using Software-Defined Networking
Soft core based embedded systems in critical aerospace applications
A language environment for asic design
Switch fabric design for high performance IP routers: A survey
VISUAL: An object oriented language for image understanding
State space modelling in the design of robust software for distributed systems: A case study
Efficient task scheduling for runtime reconfigurable systems
An improved mechanism for flow rule installation in-band SDN
Implementation and evaluation of a microthread architecture
Virtualized real-time workloads in containers and virtual machines
A systematic methodology to migrate complex real-time software systems to multi-core platforms
MBSNN: A multi-branch scalable neural network for resource-constrained IoT devices
On the design space exploration through the Hellfire Framework
Real-time parallel processing in high energy physics: architecture of the Blitzen data acquisition system
Fault-tolerant routing in multiply twisted cube topology
Reduction of fault detection costs through a BDD formalism
Verification of the VLSI-/370 microprocessor
Extending conventional languages by distributed/concurrent exception resolution
Video streaming applications in wireless camera networks: A change detection based approach targeted to 6LoWPAN
Ability-aware knowledge distillation for resource-constrained embedded devices
Group-oriented catalog allocation in heterogeneous distributed database systems
Dual-mode floating-point multiplier architectures with parallel operations
Communications-oriented development of component-based vehicular distributed real-time embedded systems
Pipelined circuit switching: Analysis for the torus with non-uniform traffic
Real-time signal processing in embedded systems
Read disturbance issue and design techniques for nanoscale STT-MRAM
Latency upper bound for data chains of real-time periodic tasks
Fault-tolerance of cellular processing arrays: Algorithmic methods for yield enhancement and reliability
Using design space exploration for finding schedules with guaranteed reaction times of synchronous programs on multi-core architecture
TCADer: A Tightly Coupled Accelerator Design framework for heterogeneous system with hardware/software co-design
A concurrency control model for real-time distributed collaboration
Using temporal logic specifications to debug parallel programs
The Precomputed-Branch architecture: Efficient branches with compiler support
Edge intelligence in motion: Mobility-aware dynamic DNN inference service migration with downtime in mobile edge computing
Optimum reserved resource allocation scheme for handoff in CDMA cellular system
High-performance adaptive routing for networks with arbitrary topology
Distributing pixmap images among parallel disk arrays
COMPASS - A tool for evaluation of compression strategies for embedded processors
CFIO: A conflict-free I/O mechanism to fully exploit internal parallelism for Open-Channel SSDs
A survey on silicon PUFs
Grammar-based design of embedded systems
An analysis of communication and multiprogramming in the Helios operating system
A framework for scheduling dependent programs on GPU architectures
Diagnosability of system faults with propagation under asymmetric invalidation
Special issue on energy-efficient many-core embedded systems and architectures (SI: NoCArc18)
Execution replay of parallel procedural programs
A High-Speed Integrated building emulation engine based on discrete event simulation
Cache-related preemption delay via useful cache blocks: Survey and redefinition
A contribution to classification and evaluation of structures for parallel computers
FSR: A host-storage collaborative mechanism for data path optimization of NDP operations
Evaluation of dynamic binary translation techniques for full system virtualisation on ARMv7-A
Architecture design of a RISC-processor for prolog
On the specification and implementation of X.25 using CSP and OCCAM
LE-GEMM: A lightweight emulation-based GEMM with precision refinement on GPU
A multi-model based microservices identification approach
Modelling and performance assessment of large ATM switching networks on loosely-coupled parallel processors
Parallel collocation modelling: A case study in developing efficient parallel codes
Blocking analysis of suspension-based protocols for parallel real-time tasks under global fixed-priority scheduling
EVFL: An explainable vertical federated learning for data-oriented Artificial Intelligence systems
A banked-promotion translation lookaside buffer system
Heuristic functions for static task allocation
ML-driven classification scheme for dynamic interference-aware resource scheduling in cloud infrastructures
Unishyper: A Rust-based unikernel enhancing reliability and efficiency of embedded systems
A lattice-based designated-server public-key authenticated encryption with keyword search
Vampix, a multimicroprocessor control system adaptable to special complex machines
Allocation and scheduling of SystemJ programs on chip multiprocessors with weighted TDMA scheduling
Software-based self-testing of microprocessors
3D hardware packages for parallel architectures
Implementation issues of the Hough Transform
Efficient communication support in predictable heterogeneous MPSoC designs for streaming applications
An independently working computer peripheral generating robot arm trajectories
Effect of transient faults on gracefully degrading processor arrays
Scheduler architecture for knowledge based measuring systems
DLL-conscious instruction fetch optimization for SMT processors
Equation-based TCP-friendly congestion control under lossy environment
A survey on modeling and improving reliability of DNN algorithms and accelerators
Implications of architecture and implementation choices on timing analysis of automotive CAN networks
A modula-2-like systems programming language and its implementation
Online cycle detection for models with mode-dependent input and output dependencies
Editorial Embedded Software Design for 3D Graphics Visualization
Distributed system design using Ada as a tool for prototyping
Near-optimal energy-efficient partial-duplication task mapping of real-time parallel applications
Exploring the design space of programmable regular expression matching accelerators
An HMAC-based authentication scheme for network coding with support for error correction and rogue node identification
ALU design and processor branch architecture
ESPITI
Symbolic identification of shared memory based bank conflicts for GPUs
Integrated sensors to an assembly robot using a distributed control network
A decomposition-based approach to optimization of TTP-based distributed embedded systems
A scalable organization for distributed directories
Data dependency reduction for high-performance FPGA implementation of DEFLATE compression algorithm
REDB: Real-time enhancement of Docker containers via memory bank partitioning in multicore systems
EDF-based Energy-Efficient Probabilistic Imprecise Mixed-Criticality Scheduling
Efficient bypass in mesh and torus NoCs
Hardware support for the tumult real-time scheduler
Reliability-oriented design of on-board satellite boot software against single event effects
Automatic machine status prediction in the era of Industry 4.0: Case study of machines in a spring factory
Exploring parallelization techniques based on OpenMP in H.264/AVC encoder for embedded multi-core processor
Resource-awareness on heterogeneous MPSoCs for image processing
Adapting the concept of artificial DNA and hormone system to AUTOSAR environments
Performance studies of multi-transputer architectures with static and dynamic links
Composition-based Cache simulation for structure reorganization
Three approaches to interprocedural dynamic slicing
Lyapunov optimized energy-efficient dynamic offloading with queue length constraints
Accelerating data filtering for database using FPGA
Middleware for the Internet of Things: A survey on requirements, enabling technologies, and solutions
Task mapping and scheduling for network-on-chip based multi-core platform with transient faults
Program development within the mathematician's devil
Evaluation and optimization of a peer-to-peer video-on-demand system
A comparison of some processor farm architectures
FLOPSYNC-QACS: Quantization-aware clock synchronization for wireless sensor networks
Fast heterogeneous computing architectures for smart antennas
An OCCAM circle generator program implemented in VLSI
Towards a multiple-ISA embedded system
Towards transferable adversarial attacks on vision transformers for image classification
On the methodology of three-way structured merge in version control systems: Top-down, bottom-up, or both
A survey of energy-aware scheduling in mixed-criticality systems
Architecture and programming of two generations video signal processors
Methodology for ensuring high reliability of VLSI systems
A blockchain-based attribute-based signcryption scheme to secure data sharing in the cloud
Colored Petri Net model with automatic parallelization on real-time multicore architectures
Delay insensitive micro-pipelined combinational logic
Efficient implementation of regular parallel adders for binary signed digit number representations
Heterogeneous distributed and parallel architectures: Hardware, software and design tools
Network traffic classification based on federated semi-supervised learning
The design of open structure engineering databases
Multi-objective module partitioning design for dynamic and partial reconfigurable system-on-chip using genetic algorithm
The problems of designing a conversation scheme for concurrent object oriented languages
Scalable in-memory mapping of Boolean functions in memristive crossbar array using simulated annealing
CBFF: A cloud-blockchain fusion framework ensuring data accountability for multi-cloud environments
Learning feed-forward and recurrent fuzzy systems: A genetic approach
Improving cache locking performance of modern embedded systems via the addition of a miss table at the L2 cache level
Improved analysis and optimal priority assignment for communicating threads on uni-processor
Systolic arrays architecture for computing the time-frequency spectrum
Validation of Patient Headache Care Education System (PHCES) using a software reuse reference model
A survey on versatile embedded Machine Learning hardware acceleration
A survey on applications and architectural-optimizations of Micron's Automata Processor
Horizontally divided signature files on a parallel machine architecture
Autodiagnostics for transputer systems
Session A3: System specification I
Introduction to special issue on embedded systems architecture and applications
RoBMEX: ROS-based modelling framework for end-users and experts
Programming support for IC design in ULA technology
An in-depth analysis on traffic flooding attacks detection and system using data mining techniques
Dynamic application allocation with resource balancing on NoC based many-core embedded systems
Methods for distributed unicast in hypercubes
Parallel implementation of local averaging for image processing
Bus-contention aware WCRT analysis for the 3-phase task model considering a work-conserving bus arbitration scheme
On the bandwidth of asynchronous multiprocessors
A systematic analysis of power saving techniques for wireless network-on-chip architectures
Improved A* search: A bandwidth allocation algorithm for Linux traffic control based on Hierarchical Token Bucket
A language coprocessor as a HLL directed architecture
Lane scheduling around crossroads for edge computing based autonomous driving
MULTS: A multi-cloud fault-tolerant architecture to manage transient servers in cloud computing
Parameterization of efficient dynamic reconfigurable trees
Branch-directed and pointer-based data cache prefetching
A model-based framework for software portability and verification in embedded power management systems
STATS: A framework for microprocessor and system-level design space exploration
A survey of techniques for optimizing transformer inference
Behavioral circuit description on system level
Smart contract-based security architecture for collaborative services in municipal smart cities
Time-constrained scheduling of large pipelined datapaths
Fine grained, direct access file system support for storage class memory
Anomaly detection based on random matrix theory for industrial power systems
A new Mixed Radix Conversion algorithm MRC-II
Response time prediction in object-based, parallel embedded systems
ESPITI - a european challenge
An efficient bandwidth-adaptive gradient compression algorithm for distributed training of deep neural networks
Dynamic objects: Supporting fast and easy run-time reconfiguration in FPGAs
Multi-layer reconfigurable transputer systems with distributed control of link connections
Introduction to the special section on Real time computing and distributed systems
Session E4: Real Time Systems II
A transputer-based gate-level fault simulator
Subversion resistant identity-based signature
Fixed priority scheduling of tasks with arbitrary precedence constraints in distributed hard real-time systems
Instruction level redundant number computations for fast data intensive processing in asynchronous processors
Data consistency in a multiprocessor system with 'store in' cache concept
A true concurrency semantics for parallel programs
Temporal control improvement of hidden Markov models for automatic speech recognition
A study of the dynamic behaviour of some workload allocation algorithms by means of catastrophe theory
Energy efficient EDF-VD-based mixed-criticality scheduling with shared resources
State-based real-time analysis of SDF applications on MPSoCs with shared communication resources
Automated level-based clustering of dataflow actors for controlled scheduling complexity
Techniques for mapping tasks to machines in heterogeneous computing systems
FPGA-based architecture for the real-time computation of 2-D convolution with large kernel size
Flow control support for efficient realization of the EDA model
Intrusion-tolerant fine-grained authorization for Internet applications
Parallel processing in machine automation
A microprogrammed machine for the concurrent Euclid language
Traceable and revocable multi-authority attribute-based keyword search for cloud storage
High performance NoC synthesis using analytical modeling and simulation with optimal power and minimal IC area
MLED: A multiple abstraction level graphical editor
Parallel processing in embedded real-time systems
Buffer management control in data transport network node
Branch-aware data variable allocation for energy optimization of hybrid SRAM+NVM SPM ☆
Supporting component-based failover units in middleware for distributed real-time and embedded systems
Scheduling tasks sharing files on heterogeneous master-slave platforms
A fault tolerant RPC mechanism based on IP multicasting
ESP, a structure synthesis program
Parallel systems engineering
A development and verification framework for the SegBus platform
A real-time concurrency control algorithm: Use of multiversion and precedence relationships
A unifying approach to clientship, delegation and inheritance in object oriented languages
HDA: Hierarchical and dependency-aware task mapping for network-on-chip based embedded systems
SMILE: A scalable microcontroller library element
Computing in smart toys and the related Internet of Things (IoT) applications
Optimization decomposition approach for layered QoS scheduling in grid computing
HPC the easy way: new technologies for high performance application development and deployment
Hypermeshes: implementation and performance
PROOFS: Application engineering based on formal methods
Use of mathematical procedures for the task of power measurement and the corresponding VLSI-realization
SEAMERS: A Semi-partitioned Energy-Aware scheduler for heterogeneous MulticorEReal-time Systems
Edge-based auditing method for data security in resource-constrained Internet of Things
BQProfit: Budget and QoS aware task offloading and resource allocation for Profit maximization under MEC platform
Distributed Age-of-Information optimization in edge computing for Internet of Vehicles
Fuzzy logic based objective image quality assessment with FPGA implementation
Cost and makespan-aware workflow scheduling in hybrid clouds
Online stable matching as a means of allocating distributed resources
Microcomputer modeling and optimization with dBASE
Parallel compiler generation
Ontology-based multi-site software development methodology and tools
Artificial neural networks
Multiobjective optimization using analytical models of GaAs high-speed digital circuits
Parallel simulation of multilayered neural networks on distributed-memory multiprocessors
Group system: An efficient dynamic memory management scheme for real-time systems
Hardware design methodology using lightweight dataflow and its integration with low power techniques
Multicast communication in wormhole-routed 2D torus networks with hamiltonian cycle model
Distributed differentially-private learning with communication efficiency
System identification using evolutionary Markov chain Monte Carlo
Collaborative optimization of offloading and pricing strategies in dynamic MEC system via Stackelberg game
Design space exploration for partially reconfigurable architectures in real-time systems
Systolic arrays in adaptive digital filters
A power-efficient TCAM architecture for network forwarding tables
Automatically controlled pan-tilt smart camera with FPGA based image analysis system dedicated to real-time tracking of a moving object
Achieving low write latency through new stealth program operation supporting early write completion in NAND flash memory
Buffer flush and address mapping scheme for flash memory solid-state disk
Register array processor
SINOF: A dynamic-static combined framework for dynamic binary translation
An efficient method for record management in flash memory environment
Nis-PoW: Non-interactive secure Proof of Ownership for cloud storage
Data layouts impacts on the compilation of the communications for a synchronous MSIMD machine
Conformance testing of X-25 packet level
Fast and efficient FPGA implementation of connected operators
On the routing of signals in parallel processor meshes
Fault tolerant programming for network based parallel computing
Delay time computation for an active star topology local area network
EBIAC: Efficient biometric identity-based access control for wireless body area networks
Improving DSP software productivity using an optimising Pascal compiler for the AT&T DSP32C
TAM: Temporal agent model for real-time distributed systems
Generative AI-based pipeline architecture for increasing training efficiency in intelligent weed control systems
A survey and taxonomy of congestion control mechanisms in wireless network on chip
CORBA-based distributed and replicated resource repository architecture for hierarchically configurable home network
Contention-aware workflow scheduling on heterogeneous computing systems with shared buses
Reachability analysis of Hybrid Rebeca models
Modeling and performance analysis of dual head disk structure
Functionally partitioned module-based programmable architecture for wireless base-band processing
Strategy for power efficient combined task and data parallelism exploration illustrated on a QSDPCM video codec
Secure user authentication mechanism for IoT-enabled Wireless Sensor Networks based on multiple Bloom filters
A higher level of behavioural specification: An example in interval temporal logic
An FPGA-based coprocessor for real-time fieldbus traffic scheduling - architecture and implementation
Parallel software engineering
A slot swapping protocol for time-critical internetworking
Performance comparison of high-level algebraic nets distributed simulation protocols
Source - A debugging tool for ParMod
Blockchain-based authentication for IIoT devices with PUF
Towards the homogeneous access and use of PKI solutions: Design and implementation of a WS-XKMS server
Efficient synthesis of distributed vector multipliers
Random test program generation for verification and validation of the Samsung Reconfigurable Processor
On the analysis and design of manufacturing systems
A lightweight encrypted deduplication scheme supporting backup
A few open problems and solutions for software technologies for dependable distributed systems
Letter from the short notes editor, Euromicro 87
Efficient hybrid polling for ultra-low latency storage devices
Matrix-based software test data decompression for systems-on-a-chip
Parallel solution of state-estimation on an IBM ring network
Schedulability analysis and stack size minimization with preemption thresholds and mixed-criticality scheduling
An environment for teaching "program design" by exercises
Energy-aware reliability guarantee scheduling with semi-clairvoyant in mixed-criticality systems
Preference-oriented real-time scheduling and its application in fault-tolerant systems
CASS: Criticality-Aware Standby-Sparing for real-time systems
On the design of hypermesh interconnection networks for multicomputers
Middleware transaction manager in multidatabase management systems
A low complexity approach for fault detection in C-testable orthogonal VLSI arrays
Network conscious design of distributed real-time systems
Blockchain-based auditing with data self-repair: From centralized system to distributed storage
A pipelined VLSI-based structure for the reconstruction of three-dimensional images from projections
A survey on machine learning-based malware detection in executable files