yusuke1997/dblp-id-title huggingface dataset:
A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface
A recurrent fuzzy cellular neural network system with automatic structure and template learning
Background interstage gain calibration technique for pipelined ADCs
Interpolated Candidate Motion Vectors for Boundary Matching Error Concealment Technique in Video
Finding the Most Influential Nodes in Pinning Controllability of Complex Networks
A Wide-Range On-Chip Leakage Sensor Using a Current-Frequency Converting Technique in 65-nm Technology Node
Accurate Dead-Time Control for Synchronous Buck Converter With Fast Error Sensing Circuits
Pseudo-Linear Analysis of Bang-Bang Controlled Timing Circuits
Lₚ-Stability of a Class of Volterra Systems
Closed-Form Orthogonal DFT Eigenvectors Generated by Complete Generalized Legendre Sequence
A fully integrated dual-channel log-domain programmable preamplifier and filter for an implantable cardiac pacemaker
Time-Domain Analysis of Passive Mixer Impedance: A Switched-Capacitor Approach
H ∞ Relay Tracking Control of Multiagent Systems With the Assistance of a Voronoi Diagram
A Censored Sample Mean Approach to Nonparametric Identification of Nonlinearities in Wiener Systems
eTag: Tag-Comparison in Memory to Achieve Direct Data Access based on eDRAM to Improve Energy Efficiency of DRAM Cache
Efficient Shuffle Network Architecture and Application for WiMAX LDPC Decoders
An Improved PWM-Based Sliding-Mode Controller for a DC-DC Cascade Boost Converter
Highly Compact Interconnect Test Patterns for Crosstalk and Static Faults
Bulk Switching Instrumentation Amplifier for a High-Impedance Source in Neural Signal Recording
A Uniform Modeling Method Based on Open-Circuit Faults Analysis for NPC-Three-Level Converter
Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving
A Fast-Transient Low-Dropout Regulator With Load-Tracking Impedance Adjustment and Loop-Gain Boosting Technique
A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOI
Improved Free-Weighting Matrix Approach for Stability Analysis of Discrete-Time Recurrent Neural Networks With Time-Varying Delay
Active gate control of series connected IGBTs using positive current feedback technique
Digital noise-shaping of residues in dual-quantization sigma-delta modulators
Multiple Cell Upset Correction in Memories Using Difference Set Codes
Fault Tolerance Analysis for Switched Systems Via Global Passivity
Design and Analysis of Monolithic Step-Down SC Power Converter With Subthreshold DPWM Control for Self-Powered Wireless Sensors
Disturbance-Observer-Based Robust Synchronization Control for a Class of Fractional-Order Chaotic Systems
Improved Feedback Theory
A Low-Power Signal-Dependent Sampling Technique: Analysis, Implementation, and Applications
Analytical design method for optimal equiripple comb FIR filters
A 122-mW Low-Power Multiresolution Spectrum-Sensing IC With Self-Deactivated Partial Swing Techniques
Low-Dropout Voltage Source: An Alternative Approach for Low-Dropout Voltage Regulators
Power and Area-Efficient Adaptive Equalization at Microwave Frequencies
Quantized Spiking Neuron With A/D Conversion Functions
A Novel Method for Guaranteed Overflow Oscillation Elimination in Digital Filters Subject to Quantization
Enhanced Power-Delivered-to-Load Through Planar Multiple-Harmonic Wireless Power Transmission
Temporal Coverage Analysis for Dynamic Verification
An Efficient Interpolation-Based Chase BCH Decoder
Bio-inspired compact cell circuit for reaction-diffusion systems
A Generalized Window Approach for Designing Transmultiplexers
An Integrated Transient Enhancement Circuit Suitable for Buck Converter With Large Output Capacitor
One-Shot Refresh: A Low-Power Low-Congestion Approach for Dynamic Memories
Projected least-squares algorithms for constrained FIR filter design
Current Feedback Compensation Circuit for 2T1C LED Displays: Method
Fundamental Limitations of Continuous-Time Delta-Sigma Modulators Due to Clock Jitter
Adaptive algorithms for a two-channel structure employing allpass filters, with applications to polarization mode dispersion compensation
An Interpolating Digitally Controlled Oscillator for a Wide-Range All-Digital PLL
A novel pole-zero compensation scheme using unbalanced differential pairs
Stability and Bifurcation Analysis of Arbitrarily High-Dimensional Genetic Regulatory Networks With Hub Structure and Bidirectional Coupling
BiCMOS-Based Compensation: Toward Fully Curvature-Corrected Bandgap Reference Circuits
A CMOS Highly Linear Digitally Programmable Active-RC Design Approach
Error Control and Limit Cycle Elimination in Event-Driven Piecewise Linear Analog Functional Models
Optimized Active Disturbance Rejection Control for DC-DC Buck Converters With Uncertainties Using a Reduced-Order GPI Observer
Frequency-dependent harmonic-distortion analysis of a linearized cross-coupled CMOS OTA and its application to OTA-C filters
A 1-V analog CMOS front-end for detecting QRS complexes in a cardiac signal
A Phase-Calibration Method for Vector-Sum Phase Shifters Using a Self-Generated LUT
Subnanosecond Pulse Generators for Impulsive Wireless Power Transmission and Reception
On-Chip Digital Inductor Current Sensor for Monolithic Digitally Controlled DC-DC Converter
Fault-Tolerant Control for Nonlinear Markovian Jump Systems via Proportional and Derivative Sliding Mode Observer Technique
A New Single h and Multi-h CPM Transmitter
Dynamic Event-Triggered State Observers for a Class of Nonlinear Systems With Time Delays and Disturbances
Consensus Tracking of Multi-Agent Systems With Lipschitz-Type Node Dynamics and Switching Topologies
NR-DCSK: A Noise Reduction Differential Chaos Shift Keying System
LMI-Based Stability Criteria With Auxiliary Matrices for Delayed Recurrent Neural Networks
Complete stability of cellular neural networks with time-varying delays
Optimized Charge Pump With Clock Booster for Reduced Rise Time or Silicon Area
Quantizer Nonoverload Criteria in Sigma-Delta Modulators
Designing an Ultralow-Voltage Phase-Locked Loop Using a Bulk-Driven Technique
A novel common-subexpression-elimination method for synthesizing fixed-point FIR filters
Accurate Estimation of CMOS Power Consumption Considering Glitches by Using Waveform Lookup
A Further Study on Output Feedback ℋ ∞ Control for Discrete-Time Systems
Static Differential NCL Gates: Toward Low Power
GBOPCAD: A Synthesis Tool for High-Performance Gain-Boosted Opamp Design
Low-Order Spectral Analysis of the Kirchhoff Matrix for a Probabilistic Graph With a Prescribed Expected Degree Sequence
Analysis and Design of the Classical CMOS Schmitt Trigger in Subthreshold Operation
Verifying Rollett's Proviso on Active Devices Under Arbitrary Passive Embeddings
Interference Cancellation in Broadband Wireless Systems Utilizing Phase-Aligned Injection-Locked Oscillators
Design Trade-offs in Ultra-Low-Power Digital Nanoscale CMOS
A Fully-On-Chip Analog Low-Dropout Regulator With Negative Charge Pump for Low-Voltage Applications
Comments on "Semi-Blind Channel Estimation and Equalization for MIMO Space-Time Coded OFDM"
Using Stacked Bitlines and Hybrid ROM Cells to Form ROM and SRAM-ROM With Increased Storage Density
A Fully Integrated CMOS Active Bandpass Filter for Multiband RF Front-Ends
A 0.45-V MOSFETs-Based Temperature Sensor Front-End in 90 nm CMOS With a Noncalibrated ± 3.5°C 3σ Relative Inaccuracy From -55°C to 105°C
On Basic Boolean Function Graphene Nanoribbon Conductance Mapping
A Quantitative Approach for Direct Synthesis of Bandpass Filters Composed of Transversal Resonators
Analyzing the effect of the phase-jitter in the operation of second order phase-locked loops
An Odd Phase CDR With Phase Interpolator Trimming
Matrix-Based Algorithms for the Optimal Design of Variable Fractional Delay FIR Filters
Mixed p-z approach for time-domain analysis of voltage source inverters with periodic pulsewidth modulation
Cell Weighting and Gate Inductive Peaking Techniques for Wideband Noise Suppression in Distributed Amplifiers
A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs
A Nano-Watt ECG Feature Extraction Engine in 65-nm Technology
NISC-Based Soft-Input-Soft-Output Demapper
Fast Multiple Inverse Transforms With Low-Cost Hardware Sharing Design for Multistandard Video Decoding
CSDC: a new complexity reduction technique for multiplierless implementation of digital FIR filters
Background Calibration of Pipelined ADCs Via Decision Boundary Gap Estimation
Efficient Digital Implementation of Extreme Learning Machines for Classification
High-Throughput Memory-Based Architecture for DHT Using a New Convolutional Formulation
All Digital-Quadrature-Modulator Based Wideband Wireless Transmitters
High-Performance Pipelined Architecture of Point Multiplication on Koblitz Curves
An 8-bit 800- μħbox W 1.23-MS/s Successive Approximation ADC in SOI CMOS
Efficient Coding Schemes for Fault-Tolerant Parallel Filters
Synthesis of Ternary Logic Circuits Using 2: 1 Multiplexers
A 0.19 mm 2 10 b 2.3 GS/s 12-Way Time-Interleaved Pipelined-SAR ADC in 65-nm CMOS
Building Conflict-Free FFT Schedules
An on-line ICA-mixture-model-based self-constructing fuzzy neural network
Conformal Hybrid Solar and Electromagnetic (EM) Energy Harvesting Rectenna
Distributed Model Predictive Consensus of Heterogeneous Time-Varying Multi-Agent Systems: With and Without Self-Triggered Mechanism
Slicing FIFOs for On-Chip Memory Bandwidth Exhaustion
Design of Multiplierless Lattice QMF: Structure and Algorithm Development
Time-to-Digital Converter With Sample-and-Hold and Quantization Noise Scrambling Using Harmonics in Ring Oscillators
A Bit-Plane Decomposition Matrix-Based VLSI Integer Transform Architecture for HEVC
A Robust Adaptive Identification of Sinusoidal Signal With Unknown Frequency
A Parameter-Perturbation Method for Chaos Control to Stabilizing UPOs
Structural DMR: A Technique for Implementation of Soft-Error-Tolerant FIR Filters
Stochastic Analysis of the Normalized Subband Adaptive Filter Algorithm
Fault Rate Analysis: Breaking Masked AES Hardware Implementations Efficiently
Advancing Nonvolatile Computing With Nonvolatile NCFET Latches and Flip-Flops
Low-Complexity 2-D Digital FIR Filters Using Polyphase Decomposition and Farrow Structure
Global exponential convergence of multitime-scale neural networks
General Control Considerations for Input-Series Connected DC/DC Converters
Complex-Network Modeling of a Call Network
New Continuous-Time Multibit Sigma-Delta Modulators With Low Sensitivity to Clock Jitter
In Memoriam: M. Robert Aaron (1922-2007)
Characterizing the Convergence of a Distributed Consensus Algorithm via Relative Hull
A 2.25-2.7 GHz Area-Efficient Subharmonically Injection-Locked Fractional-N Frequency Synthesizer With a Fast-Converging Correlation Loop
Designing Protograph-Based LDPC Codes for Iterative Receivers on M-ary DCSK Systems
A Double-Node-Upset Self-Recoverable Latch Design for High Performance and Low Power Application
A Low-Voltage Micropower Asynchronous Multiplier With Shift-Add Multiplication Approach
An 8-Bit 2.1-mW 350-MS/s SAR ADC With 1.5 b/cycle Redundancy in 65-nm CMOS
A 10-Gb/s Adaptive Look-Ahead Decision Feedback Equalizer With an Eye-Opening Monitor
A Simple Way for Substrate Noise Modeling in Mixed-Signal ICs
High-Isolation and Wide-Stopband SIW Diplexer Using Mixed Electric and Magnetic Coupling
Digital Systems Power Management for High Performance Mixed Signal Platforms
A 4-GHz All Digital PLL With Low-Power TDC and Phase-Error Compensation
A Flexible Geometric Mean Decomposition Processor for MIMO Communication Systems
A Local Nonlinear Model for the Approximation and Identification of a Class of Systems
On Parallelepiped-Shaped Passbands for Multidimensional Nonseparable bf Mth-Band Low-Pass Filters
Modular Pipeline Architecture for Accelerating Join Operation in RDBMS
An Ultralow-Power 10-Gbits/s LVDS Output Driver
A Sub-1.0-V On-Chip CMOS Thermometer With a Folded Temperature Sensor for Low-Power Mobile DRAM
A Time-Based Technique for Testing LC-Tank Oscillators
A Five-Decade Dynamic-Range Ambient-Light-Independent Calibrated Signed-Spatial-Contrast AER Retina With 0.1-ms Latency and Optional Time-to-First-Spike Mode
A Low-Spur MASH Delta-Sigma Modulator With an Adaptive Length Extension Technique
Overclocking nand Flash Memory I/O Link in LDPC-Based SSDs
Multi-Plet Two-Channel Perfect Reconstruction FIR and Causal Stable IIR Filter Banks
A Design-Optimized Continuous-Time Delta-Sigma ADC for WLAN Applications
Event-Triggered Synchronization for Nonlinear Multi-Agent Systems With Sampled Data
3-D Nanoarchitectures With Carbon Nanotube Mechanical Switches for Future On-Chip Network Beyond CMOS Architecture
FPN Attenuation by Reset-Drain Actuation in the Linear-Logarithmic Active Pixel Sensor
Experimental Verification of the Impact of Analog CMS on CIS Readout Noise
Very Low-Complexity Hardware Interleaver for Turbo Decoding
Neuromorphic Architecture With 1M Memristive Synapses for Detection of Weakly Correlated Inputs
Low-voltage CMOS current-mode preamplifier: analysis and design
An Analytical Framework and Approximation Strategy for Efficient Implementation of Distributed Arithmetic-Based Inner-Product Architectures
Force-balance interface circuit based on floating MOSFET capacitors for micro-machined capacitive accelerometers
Packet-Based State Feedback Control Under DoS Attacks in Cyber-Physical Systems
Dual Low-Voltage IC Design for High-Voltage Floating Gate Drives
A High Image-Rejection SC Quadrature Bandpass DSM for Low-IF Receivers
S-Type Locally Active Memristor-Based Periodic and Chaotic Oscillators
Using Modified Bessel Functions for Analysis of Nonlinear Effects in a MOS Transistor Operating in Moderate Inversion
Improved Chopping in Continuous-Time Delta-Sigma Converters Using FIR Feedback and N-Path Techniques
Design and Hardware Implementation of Neuromorphic Systems With RRAM Synapses and Threshold-Controlled Neurons for Pattern Recognition
A Multi-Rate Burst-Mode CDR Using a GVCO With Symmetric Loops for Instantaneous Phase Locking in 65-nm CMOS
Architectures and Circuit Techniques for Multi-Purpose Digital Phase Lock Loops
Contention resolution algorithm for common subexpression elimination in digital filter design
A Dual-Output Switched Capacitor DC-DC Buck Converter Using Adaptive Time Multiplexing Technique in 65-nm CMOS
A Digital Neuromorphic Realization of Pair-Based and Triplet-Based Spike-Timing-Dependent Synaptic Plasticity
Constrained PI Tracking Control for Output Probability Distributions Based on Two-Step Neural Networks
A 40.4-dB Range, 0.73-dB Step, and 0.07-dB Error Programmable Gain Amplifier Using Gain Error Shifting Technique
An Optimality-Based Repetitive Control Algorithm for Discrete-Time Systems
Magnetic Adder Based on Racetrack Memory
An RNS Implementation of an F p Elliptic Curve Point Multiplier
A 5 GHz Fractional-N ADC-Based Digital Phase-Locked Loops With -243.8 dB FOM
A Batteryless Single-Inductor Boost Converter With 190 mV Self-Startup Voltage for Thermal Energy Harvesting Over a Wide Temperature Range
Leader-Following Consensus in Second-Order Multiagent Systems via Event-Triggered Control With Nonperiodic Sampled Data
1.5-V Complex Filters Using Current Mirrors
On Full-Connectivity Properties of Locally Connected Oscillatory Networks
Area-Efficient ESD-Transient Detection Circuit With Smaller Capacitance for On-Chip Power-Rail ESD Protection in CMOS ICs
Memristor Emulator for Memristor Circuit Applications
An Analog BJT-Tuned Maximum Power Point Tracking Technique for PV Systems
Efficient Channel Estimator With Angle-Division Multiple Access
A Modified Hysteresis-Modulation-Based Sliding Mode Control for Improved Performance in Hybrid DC-DC Boost Converter
A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications
Chaotic Communication Based on the Particle-in-a-Box Electronic Circuit
Compensation Network Optimal Design Based on Evolutionary Algorithm for Inductive Power Transfer System
A Coupled Memcapacitor Emulator-Based Relaxation Oscillator
Estimation of Carrier Frequency Offset With I/Q Mismatch Using Pseudo-Offset Injection in OFDM Systems
A High-Gain 1.75-GHz Dual-Inductor Transimpedance Amplifier With Gate Noise Suppression for Fast Radiation Detection
Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits
A Robust Local Positive Feedback Based Performance Enhancement Strategy for Non-Recycling Folded Cascode OTA
OFDM Multitone Signal Generation Technique for Analog Circuitry Test Characterization
A Multirate Switched-Current Filter Using Class-AB Cascoded Memory
An Efficient Implementation of the NewHope Key Exchange on FPGAs
A Clock-Harvesting Receiver Using 3G CDMA Signals in the 1900-MHz Band
Preventing Global Convergence Failure in Mixed-Signal Systems via Indeterminate State ('X') Elimination
Restoration of controllable hysteresis in partially depleted SOI CMOS Schmitt trigger circuits
Ultra-Low Power VLSI Circuit Design Demystified and Explained: A Tutorial
The Design of an RS Decoder Based on the mCS-RiBM Algorithm for 100 Gb/s Optical Communication Systems
A High-Efficiency GaN Doherty Power Amplifier With Blended Class-EF Mode and Load-Pull Technique
A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration
A SAR-ADC-Assisted DC-DC Buck Converter With Fast Transient Recovery
Post-Nonlinear Blind Extraction in the Presence of Ill-Conditioned Mixing
A High-Performance Fast Switching Charge Dump Assisted Class-K ast Audio Amplifier
Packet-switched on-chip interconnection network for system-on-chip applications
0.7-V Three-Stage Class-AB CMOS Operational Transconductance Amplifier
A New Approach to H ∞ Filter Design for Systems With Time-Varying State Delay
OCTAN: An On-Chip Training Algorithm for Memristive Neuromorphic Circuits
A Tunable Metamaterial Resonator Using Varactor Diodes to Facilitate the Design of Reconfigurable Microwave Circuits
A 300-µW Audio ΔΣ Modulator With 100.5-dB DR Using Dynamic Bias Inverter
On Two-Phase Switched-Capacitor Multipliers With Minimum Circuit Area
One-Dimensional Nonlinear Model for Producing Chaos
Wireless-Power-Transfer System Using Near-Field Capacitively Coupled Resonators
Asymptotic Limits of Negative Group Delay in Active Resonator-Based Distributed Circuits
An Area-Efficient 96.5%-Peak-Efficiency Cross-Coupled Voltage Doubler With Minimum Supply of 0.8 V
The Editor's Corner
A 20 GS/s 1.2 V 0.13 muhboxm CMOS Switched Cascode Track-and-Hold Amplifier
Design and Implementation of Low Complexity 2-D Variable Digital FIR Filters Using Single-Parameter-Tunable 2-D Farrow Structure
A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter Suppression
Toward a CPFLOW-based algorithm to compute all the type-1 load-flow solutions in electric power systems
A 0.04% BER Strong PUF With Cell-Bias-Based CRPs Filtering and Background Offset Calibration
2×VDD 40-nm CMOS Output Buffer With Slew Rate Self-Adjustment Using Leakage Compensation
Maximum Total Correntropy Diffusion Adaptation Over Networks With Noisy Links
Design of Low-Voltage Digital Building Blocks and ADCs for Energy-Efficient Systems
Tunable Class AB CMOS Gm-C Filter Based on Quasi-Floating Gate Techniques
Control of Fast Scale Bifurcations in Power-Factor Correction Converters
The Virtual Trackpad: An Electromyography-Based, Wireless, Real-Time, Low-Power, Embedded Hand-Gesture-Recognition System Using an Event-Driven Artificial Neural Network
An Error Amplifier With a Low Power Multi-Mode Voltage Clamper for Transient Enhancement and High Reliability
Simple Two-Transistor Single-Supply Resistor-Capacitor Chaotic Oscillator
Virtual Channel Optimization for Overloaded MIMO Systems
On the Theory and Design of a Class of PR Uniform and Recombination Nonuniform Causal-Stable IIR Cosine Modulated Filter Banks
Power Management System for Online Low Power RF Energy Harvesting Optimization
Coherence of Noisy Double-Integrator Networks Without Velocity Measurements
Guest Editorial for the Special Issue on Software-Defined Radio Transceivers and Circuits for 5G Wireless Communications
Advanced Control for Very Fast DC-DC Converters Based on Hysteresis of the C out Current
Analytical Method for Computation of Phase-Detector Characteristic
Analysis of the Bridged T-Coil Circuit Using the Extra-Element Theorem
A High-Voltage Closed-Loop SC Interface for a ± 50 g Capacitive Micro-Accelerometer With 112.4 dB Dynamic Range
CMOS current-mode divider and its applications
Power Inductors Behavioral Modeling Revisited
Analytical and Experimental Study of Wide Tuning Range mm-Wave CMOS LC-VCOs
Frequency-Domain Analysis of N-Path Filters Using Conversion Matrices
Comments on "Chaotic Characteristics Analysis and Circuit Implementation for a Fractional-Order System"
Fast and Generic Inversion Architectures Over GF(2 m ) Using Modified Itoh-Tsujii Algorithms
A Digital Implementation of a Dual-Path Time-to-Time Integrator
Design of Sparse FIR Filters With Reduced Effective Length
Guest Editorial Special Section on the IEEE International Symposium on Circuits and Systems 2019
Controlling the Ćuk Converter Using Polytopic Lyapunov Functions
Global stability of a class of neural networks with time-varying delay
Impact of Time Delays on Power System Stability
Data-Dependent Delays as a Barrier Against Power Attacks
A CMOS Low Noise, Chopper Stabilized Low-Dropout Regulator With Current-Mode Feedback Error Amplifier
Stabilization of a Class of Linear Systems With Input Delay and the Zero Distribution of Their Characteristic Equations
A 0.07 mm 2 Asynchronous Logic CMOS Pulsed Receiver Based on Radio Events Self-Synchronization
General Lyapunov Functions for Consensus of Nonlinear Multiagent Systems
Optimal Power Flow on DC Microgrids: A Quadratic Convex Approximation
Chaos in a Single Op-Amp-Based Jerk Circuit: Experiments and Simulations
A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits
A Monte Carlo Particle Model Associated with Neural Networks for Tracking Problem
Variation Aware Sleep Vector Selection in Dual V t Dynamic OR Circuits for Low Leakage Register File Design
A 0.4-V Subnanowatt 8-Bit 1-kS/s SAR ADC in 65-nm CMOS for Wireless Sensor Applications
A Linear Time-Varying Controller for Synchronization of LÜ Chaotic Systems With One Input
Switchable Dual-Band Filter With Common Quarter-Wavelength Resonators
Single/multi-band Wilkinson-type power dividers with embedded transversal filtering sections and application to channelized filters
A Switchless SiGe BiCMOS Bidirectional Amplifier for Wideband Radar Applications
State Estimation for General Complex Dynamical Networks With Packet Loss
A 10-MS/s-to-100-kS/s Power-Scalable Fully Differential CBSC 10-Bit Pipelined ADC With Adaptive Biasing
Analysis of Clock-Jitter Effects in Continuous-Time Delta Sigma Modulators Using Discrete-Time Models
Observer-Based Distributed Secure Consensus Control of a Class of Linear Multi-Agent Systems Subject to Random Attacks
Adaptive Diffusion Processes of Time-Varying Local Information on Networks
Multiplierless Implementation of an Aliasing-Free Digital Pulsewidth Modulator
Component-Efficient Multiphase Switched-Capacitor DC-DC Converter With Configurable Conversion Ratios for LCD Driver Applications
Towards a Dependable True Random Number Generator With Self-Repair Capabilities
Input-to-State Stability for Nonlinear Systems With Large Delay Periods Based on Switching Techniques
Yield enhancement with optimal area allocation for ratio-critical analog circuits
An Easy Pure Algebraic Method for Partial Fraction Expansion of Rational Functions With Multiple High-Order Poles
Analysis and Optimization of SFDR in Differential Active-RC Filters
Numerical Approach to Compute the Power Flow Solution of Hybrid Generation, Transmission and Distribution Systems
Event-Triggered Protocol for the Consensus of Multi-Agent Systems With State-Dependent Nonlinear Coupling
Eigenfunctions of Fourier and Fractional Fourier Transforms With Complex Offsets and Parameters