yusuke1997/dblp-id-title huggingface dataset:
A New Unbiased FIR Filter With Improved Robustness Based on Frobenius Norm With Exponential Weight
Analysis and Design of Passive Polyphase Filters
A Wide Tuning Range, Low Phase Noise, and Area Efficient Dual-Band Millimeter-Wave CMOS VCO Based on Switching Cores
Theoretical Foundations of Memristor Cellular Nonlinear Networks: Memcomputing With Bistable-Like Memristors
A Calibration Technique for Very Low Current and Compact Tunable Neuromorphic Cells: Application to 5-bit 20-nA DACs
Design and Implementation of Flexible and Reconfigurable SDF-Based FFT Chip Architecture With Changeable-Radix Processing Elements
Wide-Linear-Range Subthreshold OTA for Low-Power, Low-Voltage, and Low-Frequency Applications
An RC time constant auto-tuning structure for high linearity continuous-time ΣΔ modulators and active filters
A Forward-Body-Bias CMOS LNA With Ultra-Low Device Junction Leakage Using Intrinsic Self-Balanced Pseudo Resistor
Digitally Assisted RF-Analog Self Interference Cancellation for Wideband Full-Duplex Radios
A 20-Gb/s Transmitter With Adaptive Preemphasis in 65-nm CMOS Technology
A Wide-Band Power-Efficient Inductive Wireless Link for Implantable Microelectronic Devices Using Multiple Carriers
Minimax Design of Low-Complexity Even-Order Variable Fractional-Delay Filters Using Second-Order Cone Programming
Feedforward Phase Noise Cancellation Exploiting a Sub-Sampling Phase Detector
Offline Training Improvement of Inverter-Based Memristive Neural Networks Using Inverter Voltage Characteristic Smoothing
Hopf Bifurcation and Its Control in the One-Cycle Controlled Cuk Converter
Highly Adaptive Transducer Interface Circuit for Multiparameter Microsystems
An HDMI Cable Equalizer With Self-Generated Energy Ratio Adaptation Scheme
Design of a Wide-Tuning-Range Lithium Tantalate Low-Phase-Noise Voltage-Controlled Oscillator
Corrections to "Design of Two-Dimensional Recursive Filters Using Genetic Algorithms"
TPWL Simulation of Large Nonlinear Circuits Using Subspace Angle-Based Adaptive Sampling
High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier
Analysis and Characterization of the Effects of Clock Jitter in A/D Converters for Subsampling
Linear Controllers for the Stabilization of Unknown Steady States of Chaotic Systems
Bipartite Tracking Consensus of Linear Multi-Agent Systems With a Dynamic Leader
An On-Chip-Trainable Gaussian-Kernel Analog Support Vector Machine
An Energy-Efficient SAR ADC With Event-Triggered Error Correction
Second-order neural core for bioinspired focal-plane dynamic image processing in CMOS
Boundedness and stability for nonautonomous bidirectional associative neural networks with delay
Adaptive PI Control for Synchronization of Complex Networks With Stochastic Coupling and Nonlinear Dynamics
A High IIP2 Mixer Enhanced by a New Calibration Technique for Zero-IF Receivers
Efficient Fault-Tolerant Design for Parallel Matched Filters
A Note From the Editor-in-Chief
Efficient VLSI Architectures for Coupled-Layered Regenerating Codes
Filtering of Markovian Jump Delay Systems Based on a New Performance Index
Nanopower Subthreshold MCML in Submicrometer CMOS Technology
Design and Implementation of a Sliding-Mode Controller for Low-Dropout/Linear Regulator
A Multiphase Timing-Skew Calibration Technique Using Zero-Crossing Detection
Highly linear 2.5-V CMOS ΣΔ modulator for ADSL+
A 12.77-MHz 31 ppm/°C On-Chip RC Relaxation Oscillator With Digital Compensation Technique
High-Efficiency Processing Schedule for Parallel Turbo Decoders Using QPP Interleaver
A Double-Isolated DC-DC Converter Based on Integrated LC Resonant Barriers
Ultra-High Density Monolithic 3-D FinFET SRAM With Enhanced Read Stability
A Compact Calibration Model for Linearizing CMOS Sample-and-Hold Circuits
An Integrated Dual-Mode CMOS Power Amplifier With Linearizing Body Network
Design of multiplierless, high-performance, wavelet filter banks with image compression applications
Digital Frequency Synthesizer Based on Two Coprime Moduli DDS
A New High Drive Class-AB FVF-Based Second Generation Voltage Conveyor
Globally Stable Synchronization of Chaotic Systems Based on Norm Observers Connected in Cascade
High-order multibit modulators and pseudo data-weighted-averaging in low-oversampling ΔΣ ADCs for broad-band applications
Linearity-Enhanced Ring Amplifier Using Adaptive Slew-Rate Feed-Forward Path
A background comparator calibration technique for flash analog-to-digital converters
An On-Chip Built-in Linearity Estimation Methodology and Hardware Implementation
Experimental Study of Locking Phenomena on Oscillating Rings Implemented in Logic Devices
A 0.3-mW/Ch 1.25 V Piezo-Resistance Digital ROIC for Liquid-Dispensing MEMS
A Fully Integrated Variable-Gain Multi- tanh Low-Noise Amplifier for Tunable FM Radio Receiver Front-End
Bifurcation Analysis in Weakly-Coupled Inductive Power Transfer Systems
Passivity Analysis of Neural Networks With Time-Varying Delays
An Automatic Loop Gain Control Algorithm for Bang-Bang CDRs
PMCC: Fast and Accurate System-Level Power Modeling for Processors on Heterogeneous SoC
A matched filter design by charge-domain operations
Analysis of Mixed-Element Structures Formed With Shunt Capacitors Separated by Transmission Lines
Analysis and Design of N-Path Band-Pass Filters With Negative Base Band Resistance
A Wirelessly Powered CMOS Electrochemical Sensing Interface With Power-Aware RF-DC Power Management
High Order Mismatch Shaping for Low Oversampling Rates
A 1-GS/s 11-Bit SAR-Assisted Pipeline ADC With 59-dB SNDR in 65-nm CMOS
Accurate Rotations Based on Coefficient Scaling
Self-Tuning Position-Tracking Controller for Two-Wheeled Mobile Balancing Robots
A High-Throughput Energy-Efficient Implementation of Successive Cancellation Decoder for Polar Codes Using Combinational Logic
A Low-Power OFDM-Based Wake-Up Mechanism for IoE Applications
Codesign of Electrically Short Antenna-Electronics Interfaces in the Receiving Mode
Cochlea-Based RF Channelizing Filters
A Four-Channel 32-Gb/s Transceiver With Current-Recycling Output Driver and On-Chip AC Coupling in 65-nm CMOS Process
Linearly Tunable CMOS OTA With Constant Dynamic Range Using Source-Degenerated Current Mirrors
A New Stability Criterion for a Partial Element Equivalent Circuit Model of Neutral Type
Semi-Tensor Product of Matrices Approach to the Problem of Fault Detection for Discrete Event Systems (DESs)
1.2-V Energy-Efficient Wireless CMOS Potentiostat for Amperometric Measurements
An RFID-Based Closed-Loop Wireless Power Transmission System for Biomedical Applications
Broadband Doherty Power Amplifier Based on Asymmetric Load Matching Networks
A High-Precision Resistor-Less CMOS Compensated Bandgap Reference Based on Successive Voltage-Step Compensation
Designing Anti-Jamming Receivers for NR-DCSK Systems Utilizing ICA, WPD, and VMD Methods
Memoryless Wide-Dynamic-Range CMOS Image Sensor Using Nonfully Depleted PPD-Storage Dual Capture
Multiscroll Chaotic Oscillators: The Nonautonomous Approach
Robust Active Noise Control Design by Optimal Weighted Least Squares Approach
Symbolic Analysis of Switching Systems: Application to Bifurcation Analysis of DC/DC Switching Converters
A Baud-Rate Timing Recovery Scheme With a Dual-Function Analog Filter
Transformer-Based Current-Reuse Armstrong and Armstrong-Colpitts VCOs
An On-Line Calibration Technique for Mismatch Errors in High-Speed DACs
Improved bounded-real-lemma representation and H ∞ control of systems with polytopic uncertainties
Stability and Bifurcation Analysis of a Class of Networked Dynamical Systems
A Neuromorphic VLSI Head Direction Cell System
Variation-Resilient Building Blocks for Ultra-Low-Energy Sub-Threshold Design
A 490-pW SAR Temperature Sensor With a Leakage-Based Bandgap-Vth Reference
Enabling Computational Storage Through FPGA Neural Network Accelerator for Enterprise SSD
CMOS Millimeter-Wave Ultra-Wideband Bandpass Filter With Three Reflection-Zeros Using Compact Single TFMS Coupled-Line Hairpin Unit
A Class of Piecewise Linear Systems Without Equilibria With 3-D Grid Multiscroll Chaotic Attractors
An Area-Efficient CMOS Time-to-Digital Converter Based on a Pulse-Shrinking Scheme
New compact CMOS continuous-time low-Voltage analog rank-order filter architecture
High-Purity and Wide-Range Signal Generator for Bioimpedance Spectroscopy
Noise-Free Maximum Correntropy Criterion Algorithm in Non-Gaussian Environment
Sub-nH Inductor Modeling and Design in 90-nm CMOS Technology for Millimeter-Wave Applications
Nano-Power CMOS Voltage Reference for RF-Powered Systems
Broadband Matching Bounds for Coupled Loads
Correction to "A Low-Offset Low-Noise Sigma-Delta Modulator With Pseudorandom Chopper-Stabilization Technique"
Digital Background Calibration for Pipelined ADCs Based on Comparator Decision Time Quantization
Practical Determination of Individual Element Resistive States in Selectorless RRAM Arrays
Analysis and Design of a High Voltage Integrated Class-B Amplifier for Ultra-Sound Transducers
Bidirectional Single-Inductor Dual-Supply Converter With Automatic State-Transition for IoT Applications
Suppression of Undesired Attractors in a Self-Oscillating H-Bridge Parallel Resonant Converters Under Zero Current Switching Control
A High-Frequency Transconductor Using a Robust Nonlinearity Cancellation
A Wideband Inductorless LNA With Local Feedback and Noise Cancelling for Low-Power Low-Voltage Applications
Phase Noise Modeling for Integrated PLLs in FMCW Radar
Partially Parallel Encoder Architecture for Long Polar Codes
Editorial: One Year at the Helm
A Class-AB/D Audio Power Amplifier for Mobile Applications Integrated Into a 2.5G/3G Baseband Processor
Impulse-Based Scheme for Crystal-Less ULP Radios
Design of 60- and 77-GHz Narrow-Bandpass Filters in CMOS Technology
An Ultralow-Power Low-Voltage Class-AB Fully Differential OpAmp for Long-Life Autonomous Portable Equipment
Tester-Assisted Calibration and Screening for Digitally-Calibrated ADCs
Invariant Measures of Tunable Chaotic Sources: Robustness Analysis and Efficient Estimation
Dynamic Dual-Reference Sensing Scheme for Deep Submicrometer STT-MRAM
CAR-Lite: A Multi-Rate Cochlear Model on FPGA for Spike-Based Sound Encoding
Optimization-based design and implementation of multidimensional zero-phase IIR filters
A Digital Neuromorphic Realization of the 2-D Wilson Neuron Model
CNFET With Process Imperfection: Impact on Circuit-Level Yield and Device Optimization
Itemization and Track Limitations of Fan-Out-Free Functions for Static CMOS Functional Cells
Reconfigurable High-Order Moving-Average Filter Using Inverter-Based Variable Transconductance Amplifiers
A 0.4-V 0.66-fJ/Cycle Retentive True-Single-Phase-Clock 18T Flip-Flop in 28-nm Fully-Depleted SOI CMOS
An AC-DC Rectifier With Active and Non-Overlapping Control for Piezoelectric Vibration Energy Harvesting
High-Speed Hardware Implementation of Fixed and Runtime Variable Window Length 1-D Median Filters
Flocking of Multi-Agent Non-Holonomic Systems With Proximity Graphs
Analysis of the Spur Characteristics of Edge-Combining DLL-Based Frequency Multipliers
SAR-Controlled Adaptive Off-Time Technique Without Sensing Resistor for Achieving High Efficiency and Accuracy LED Lighting System
Hardware Implementation and Performance Analysis of Resource Efficient Probabilistic Hard Decision LDPC Decoders
Analytical Settling Noise Models of Single-Loop Sigma-Delta ADCs
New multirate bandpass sigma-delta modulators
A Data Capturing Method for Buses on Chip
Fast identification of autoregressive signals from noisy observations
Guest Editorial for the Special Issue on Ultra-Low-Voltage VLSI Circuits and Systems for Green Computing
Ultimate Boundedness of Nonautonomous Dynamical Complex Networks Under Impulsive Control
Low 1/f 3 Noise Corner LC-VCO Design Using Flicker Noise Filtering Technique in 22nm FD-SOI
A Reduced Output Ringing CMOS Buffer
An 11b 70-MHz 1.2-mm 2 49-mW 0.18-μm CMOS ADC with on-chip current/voltage references
Mixed-Radix Algorithm for the Computation of Forward and Inverse MDCTs
Design Method for High-Order Sigma-Delta Modulator Stabilized by Departure Angles Designed to Keep Root Loci in Unit Circle
A comparative analysis of parallel delta-sigma ADC architectures
Continuous-Flow Matrix Transposition Using Memories
High-Accuracy Current Memory in HV CMOS Technology
Leakage Biased pMOS Sleep Switch Dynamic Circuits
A Digitally Controlled Oscillator With Wide Frequency Range and Low Supply Sensitivity
Periodic Event-Triggered Dynamic Output Feedback Dissipative Control With Stochastic Detection
An Improved DCM-Based Tunable True Random Number Generator for Xilinx FPGA
Bipartite Consensus for Descriptor Multiagent Systems With Antagonistic Interactions
A Soft-Defined Pulse Width Modulation Approach - Part II: System Modeling
A 10-Gb/s Inductorless CMOS Analog Equalizer With an Interleaved Active Feedback Topology
An Efficient FFT Engine With Reduced Addressing Logic
Maximally Flat CIC Compensation Filter: Design and Multiplierless Implementation
Dynamics and Stability Issues of a Discretized Sliding-Mode Controlled DC-DC Buck Converter Governed by Fixed-Event-Time Switching
Decision Feedback Equalizer Architectures With Multiple Continuous-Time Infinite Impulse Response Filters
Asymptotic Output Tracking of Probabilistic Boolean Control Networks
A Novel Split-Radix Fast Algorithm for 2-D Discrete Hartley Transform
Pascal Filters
Finite Alphabet Iterative Decoders for LDPC Codes: Optimization, Architecture and Analysis
Further Results on Induced l ∞ RH FIR Filtering
Improved-Variable-Forgetting-Factor Recursive Algorithm Based on the Logarithmic Cost for Volterra System Identification
Dynamic Load Balancing and Reactive Power Compensation Switch Embedded in Power Meters
Optimized Memristor-Based Multipliers
A Hopf Resonator for 2-D Artificial Cochlea: Piecewise Linear Model and Digital Implementation
An Injection-Locked Frequency-Tracking Σ∆ Direct Digital Frequency Synthesizer
A Fine-Grained Pipelined 2-D Convolver for High-Performance Applications
A 37- $\mu \text{W}$ , Binary-Weighted PGA Based on a Novel Degeneration Transistor-Ladder
An All-MOS High-Linearity Voltage-to-Frequency Converter Chip With 520-kHz/V Sensitivity
A 0.13-µm CMOS Low-Power Capacitor-Less LDO Regulator Using Bulk-Modulation Technique
Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs
An Efficient Pre-Traceback Architecture for the Viterbi Decoder Targeting Wireless Communication Applications
A Canonical Piecewise-Linear Representation Theorem: Geometrical Structures Determine Representation Capability
AER EAR: A Matched Silicon Cochlea Pair With Address Event Representation Interface
A Describing Function Study of Saturated Quantization and Its Application to the Stability Analysis of Multi-Bit Sigma Delta Modulators
"Split ADC" Background Linearization of VCO-Based ADCs
A Crystal-Less Temperature-Independent Reconfigurable Transmitter Targeted for High-Temperature Wireless Acoustic Telemetry Applications
Embeddable Circuit for Orientation Independent Processing in Ultra Low-Power Tri-Axial Inertial Sensors
Design and Analysis of a 94-GHz CMOS Down-Conversion Mixer With CCPT-RL-Based IF Load
Hysteresis Switching Control of the Ćuk Converter Operating in Discontinuous Conduction Modes
Digital Distortion-Free PWM and Click Modulation
A Model-Agnostic Technique for Simulating Per-Element Distortion Contributions
A Fast-Transient Response Digital Low-Dropout Regulator With Dual-Modes Tuning Technique
Low-Frequency Hopf Bifurcation and Its Effects on Stability Margin in Three-Phase PFC Power Supplies Connected to Non-Ideal Power Grid
Dual-Band N-Way Series Power Divider Using CRLH-TL Metamaterials With Application in Feeding Dual-Band Linear Broadside Array Antenna With Reduced Beam Squinting
Variable Structure Modeling and Design of Switched-Capacitor Converters
Efficiently searching the important input variables using Bayesian discriminant
Fine-Grain Dynamic Energy Tracking for System on Chip
A Generalized Data-Weighted Averaging Algorithm
Event-Driven Data Acquisition and Digital Signal Processing - A Tutorial
Carry Chains for Ultra High-Speed SiGe HBT Adders
On the Parameter Estimation of 2-D Moving Average Random Fields
Fabrication Cost Analysis for Contactless 3-D ICs
Template Design for Cellular Nonlinear Networks With 1-Bit Weights
A Low-Power CT Incremental 3rd Order ΣΔ ADC for Biosensor Applications
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS
An Adaptive Event-Triggered Synchronization Approach for Chaotic Lur'e Systems Subject to Aperiodic Sampled Data
Distributed Higher Order Consensus Protocols in Multiagent Dynamical Systems
Mitigating ISI Through Self-Calibrating Continuous-Time Equalization
Power-Efficient Hybrid Energy Harvesting System for Harnessing Ambient Vibrations
Circulating Current Suppression of Parallel Photovoltaic Grid-Connected Converters
Performance Improvement of a Boost LED Driver With High Voltage Gain for Edge-Lit LED Backlights
Source Extraction in Bandwidth Constrained Wireless Sensor Networks
A Reconfigurable Microwave Combline Filter
A compact f-f model of high-dimensional piecewise-linear function over a degenerate intersection
A Low-Power Interface for Capacitive Sensors With PWM Output and Intrinsic Low Pass Characteristic
A Novel Design for a Memristor-Based or Gate
Time-Domain Analysis of a Lossy Nonuniform Transmission Line
Bit-Interleaving-Enabled 8T SRAM With Shared Data-Aware Write and Reference-Based Sense Amplifier
A new floating current-controlled positive resistance using mixed translinear cells
Displaying-Synchronous Open-Loop External Compensation for Active-Matrix Light Emitting Diode Displays
Fast and Accurate Analysis of Supply Noise Effects in PLL With Noise Interactions
Tunable Quasi-Circulator Based on a Compact Fully-Reconfigurable 180° Hybrid for Full-Duplex Transceivers
A Low Power Trainable Neuromorphic Integrated Circuit That Is Tolerant to Device Mismatch
Hierarchical 3-D Floorplanning Algorithm for Wirelength Optimization
Anti-Imaging Time-Mode Filter Design Using a PLL Structure With Transfer Function DFT
A Novel Method for Synthesizing an Automatic Matching Network and Its Control Unit
Binary Discrete Cosine and Hartley Transforms
Exploiting Weak PUFs From Data Converter Nonlinearity - E.g., A Multibit CT ΔΣ Modulator
THD of Closed-Loop Analog PWM Class-D Amplifiers
A CMOS Single-Chip Gas Recognition Circuit for Metal Oxide Gas Sensor Arrays
Over-Voltage Suppression Methods for the MMC-VSC-HVDC Wind Farm Integration System
Finite Horizon H INFINITY Filtering With Initial Condition
Design of complex-coefficient variable digital filters using successive vector-array decomposition
Finite-Time Consensus for Linear Multi-Agent Systems Using Data-Driven Terminal ILC
A 1.58 Gbps/W 0.40 Gbps/mm2 ASIC Implementation of MMSE Detection for $128\times 8~64$ -QAM Massive MIMO in 65 nm CMOS
High Gain Active Neutral Point Clamped Seven-Level Self-Voltage Balancing Inverter
Guest Editorial Selected Papers From the IEEE Asia Pacific Conference of Circuits and Systems 2018 and the IEEE International Conference on Electronics, Circuits and Systems 2018
On the Convergence Behavior of the Affine Projection Algorithm for Adaptive Filters
Pipelined Discrete Wavelet Transform Architecture Scanning Dual Lines
An All-Digital Large-N Audio Frequency Synthesizer for HDMI Applications
Power-Performance Tradeoff Analysis of CML-Based High-Speed Transmitter Designs Using Circuit-Level Optimization
Variable-Conversion-Ratio Switched-Capacitor-Voltage-Multiplier/Divider DC-DC Converter
Decomposition of the Nodal Conductance Matrix of a Planar Resistive Grid and Derivation of Its Eigenvalues and Eigenvectors Using the Kronecker Product and Sum With Application to CNN Image Filters
Low-voltage high-drive CMOS current feedback op-amp
Modeling CMOS Ring Oscillator Performance as a Randomness Source
Stability Preserving Model Reduction Technique and Error Bounds Using Frequency-Limited Gramians for Discrete-Time Systems
A 25-35 GHz Neutralized Continuous Class-F CMOS Power Amplifier for 5G Mobile Communications Achieving 26% Modulation PAE at 1.5 Gb/s and 46.4% Peak PAE
A CMOS 140-mW fourth-order continuous-time low-pass filter stabilized with a class AB common-mode feedback operating at 550 MHz
An Improved Two-Step Binary Logarithmic Converter for FPGAs
Current-Charge-Pump Residue Amplification for Ultra-Low-Power Pipelined ADCs
An Adaptive All-Digital Blind Compensation of Dual-TIADC Frequency-Response Mismatch Based on Complex Signal Correlations
Power-Combining Class-E Amplifier With Finite Choke
A 0.6-107 µW Energy-Scalable Processor for Directly Analyzing Compressively-Sensed EEG
A novel approach to the estimation of the long-range dependence parameter
A Digital Predistortion System With Extended Correction Bandwidth With Application to LTE-A Nonlinear Power Amplifiers
Environment-Adaptive Concurrent Companding and Bias Control for Efficient Power-Amplifier Operation
Analysis of Class-DE Amplifier With Linear and Nonlinear Shunt Capacitances at 25% Duty Ratio
A Simple Planar Dual-Band Bandpass Filter With Multiple Transmission Poles and Zeros
A Fast Converging Normalization Unit for Stochastic Computing
Equalizer Design and Performance Trade-Offs in ADC-Based Serial Links
Current Mode Image Sensor With Two Transistors per Pixel
Investigation of Modes in Double-Tuned LC-VCOs
Analysis of High-Performance Fast Feedthrough Logic Families in CMOS
Robust Harmonic-Probe Method for the Simulation of Oscillators
CMOS-Photonics Codesign of an Integrated DAC-Less PAM-4 Silicon Photonic Transmitter
A High-Accuracy Detection and Estimation Method of Intermodulated Sinusoids
SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS
Multifunction Residue Architectures for Cryptography
The Development of Silicon for AI: Different Design Approaches
A New High-Level Synthesis Methodology of Cascaded Continuous-Time Sigma Delta Modulators
A frequency compensation scheme for LDO voltage regulators
Efficient CORDIC Algorithms and Architectures for Low Area and High Throughput Implementation
Analysis and Investigation of Internal AC Frequency to Minimize AC Current Magnitude and Reactive Power Circulation in Chain-Link Modular Multilevel Direct DC-DC Converters
A new LMI condition for delay-dependent asymptotic stability of delayed Hopfield neural networks
A Low-Power 8-GS/s Comparator for High-Speed Analog-to-Digital Conversion in $0.13\mu$ m CMOS Technology
A Single-Inductor Eight-Channel Output DC-DC Converter With Time-Limited Power Distribution Control and Single Shared Hysteresis Comparator
Adaptive Circuit Design Using Independently Biased Back-Gated Double-Gate MOSFETS
Low-error carry-free fixed-width multipliers with low-cost compensation circuits
Recursive Algorithms for Modulated and Extended Lapped Transforms
A Charge-Redistribution Phase-Domain ADC Using an IQ-Assisted Binary-Search Algorithm
Development and Applications of Biomimetic Neuronal Networks Toward BrainMorphic Artificial Intelligence
Effect of CFOA nonidealities in Miller integrator cells
Statistical Analysis of ENOB and Yield in Binary Weighted ADCs and DACS With Random Element Mismatch
A CMOS High-Voltage Transmitter IC for Ultrasound Medical Imaging Applications
A 2.4-GHz Low-Flicker-Noise CMOS Sub-Harmonic Receiver
Guest Editorial - Special Section on the 2013 IEEE Custom Integrated Circuits Conference (CICC 2013)
A 2-nW 1.1-V self-biased current reference in CMOS technology
Designing a Novel Adaptive Impulsive Observer for Nonlinear Continuous Systems Using LMIs
2X Super-Resolution Hardware Using Edge-Orientation-Based Linear Mapping for Real-Time 4K UHD 60 fps Video Applications
The Impact of Input-Mismatch on Flying-Adder Direct Period Synthesizer Output Jitter
An Area- and Power-Efficient I ref Compensation Technique for Voltage-Mode R-2R DACs
Mechanism of Synchronization in Frequency Dividers
Network Science Meets Circuit Theory: Resistance Distance, Kirchhoff Index, and Foster's Theorems With Generalizations and Unification
Benefits of Using VCO-OTAs to Construct TIAs in Wideband Current-Mode Receivers Over Inverter-Based OTAs
A 0.6 V Resistance-Locked Loop Embedded Digital Low Dropout Regulator in 40 nm CMOS With 80.5% Power Supply Rejection Improvement