yusuke1997/dblp-id-title huggingface dataset:
A Novel PWC Spiking Neuron Model: Neuron-Like Bifurcation Scenarios and Responses
Aperiodic Sampled-Data Control for Exponential Stabilization of Delayed Neural Networks: A Refined Two-Sided Looped-Functional Approach
A 1.62/2.7-Gb/s Adaptive Transmitter With Two-Tap Preemphasis Using a Propagation-Time Detector
Theory of Double Ladder Lumped Circuits With Degenerate Band Edge
A Buck Converter With Reduced Output Spurs Using Asynchronous Frequency Hopping
Signal Detection in Generalized Gaussian Noise by Nonlinear Wavelet Denoising
A ±0.5% Precision On-Chip Frequency Reference With Programmable Switch Array for Crystal-Less Applications
Influence of Jitter on Limit Cycles in Bang-Bang Clock and Data Recovery Circuits
Inducing Chaos in Electronic Circuits by Resonant Perturbations
Effect of jitter on asynchronous sampling with finite number of samples
Predicting Subharmonic Oscillation of Voltage-Mode Switching Converters Using a Circuit-Oriented Geometrical Approach
A 65 nm CMOS Power Amplifier With Peak PAE above 18.9% From 57 to 66 GHz Using Synthesized Transformer-Based Matching Network
A 25 Gb/s 65-nm CMOS Low-Power Laser Diode Driver With Mutually Coupled Peaking Inductors for Optical Interconnects
A 28.8-MHz 23-dBm-IIP3 3.2-mW Sallen-Key Fourth-Order Filter With Out-of-Band Zeros Cancellation
Finite-Time Bipartite Tracking Control for Double-Integrator Networked Systems With Cooperative and Antagonistic Interactions
Polar Compiler: Auto-Generator of Hardware Architectures for Polar Encoders
The design of high-order bandpass sigma-delta modulators using low-spread single-stage structure
Corrections to "Exact and Numerically Stable Closed-Form Expressions for Potential Coefficients of Rectangular Conductors"
In-Probe Ultrasound Beamformer Utilizing Switched-Current Analog RAM
Switched-Capacitor Level-Shifting Technique With Sampling Noise Reduction for Rail-to-Rail Input Range Instrumentation Amplifiers
A Memristive Multiplier Using Semi-Serial IMPLY-Based Adder
An Energy-Efficient Level Shifter for Ultra Low-Voltage Digital LSIs
A study of interference in synchronous systems
Analysis and Optimization of Transformer-Based Power Combining for Back-Off Efficiency Enhancement
An On-Chip Self-Characterization of a Digital-to-Time Converter by Embedding it in a First-Order ΔΣ Loop
A Pulse Energy Injection Inverter for the Switch-Mode Inductive Power Transfer System
High-Speed Architecture Design of Tomlinson-Harashima Precoders
PN-Assisted Deterministic Digital Background Calibration of Multistage Split-Pipelined ADC
A Delay-Line-Based Voltage-to-Duty-Cycle Controller for High-Frequency PWM Switching Converters
A floating-gate comparator with automatic offset adaptation for 10-bit data conversion
High-Performance Switched-Capacitor Boost-Buck Integrated Power Converters
EMI-Related Common-Mode (CM) Noise Analysis and Prediction of High-Speed Source-Series Terminated (SST) I/O Driver in System-on-Package (SOP)
A 990-µW 1.6-GHz PLL Based on a Novel Supply-Regulated Active-Loop-Filter VCO
Real-time call admission control for packet-switched networking by cellular neural networks
Computation of Pinched Hysteresis Loop Area From Memristance-vs-State Map
A Heterogeneous Reconfigurable Cell Array for MIMO Signal Processing
Design and Application of Faithfully Rounded and Truncated Multipliers With Combined Deletion, Reduction, Truncation, and Rounding
Operation of the Classical CMOS Schmitt Trigger As an Ultra-Low-Voltage Amplifier
High-Accuracy Compressed Sensing Decoder Based on Adaptive (ℓ 0 , ℓ 1 ) Complex Approximate Message Passing: Cross-layer Design
Accurate Hardware-Efficient Logarithm Circuit
Real-Time Digital PWM With Zero Baseband Distortion and Low Switching Frequency
Rank Determination by Winner-Take-All Circuit for Rank Modulation Memory
Normalized-Full-Scale-Referencing Digital-Domain Linearity Calibration for SAR ADC
Multi-Parameter Regularization Methods for High-Resolution Image Reconstruction With Displacement Errors
A 40-MHz Double Differential-Pair CMOS OTA With -hbox60-dB IM3
A biologically inspired analog IC for visual collision detection
Passive and Active Elements Using Fractional L beta C alpha Circuit
On Monotonic and Nonmonotonic Step Responses in Fractional Order Systems
Exact Time-Domain Second-Order Adjoint-Sensitivity Computation for Linear Circuit Analysis and Optimization
Analysis of a 5.5-V Class-D Stage Used in +30-dBm Outphasing RF PAs in 130- and 65-nm CMOS
A 65-nm 25.1-ns 30.7-fJ Robust Subthreshold Level Shifter With Wide Conversion Range
ZVS Double-Ended Ćuk Converter
Recognition and Vulnerability Analysis of Key Nodes in Power Grid Based on Complex Network Centrality
Design and Stability Analysis of a Frequency Controlled Sliding-Mode Buck Converter
Stochastic noise Process enhancement of Hopfield neural networks
An 8-Bit Single-Ended Ultra-Low-Power SAR ADC With a Novel DAC Switching Method and a Counter-Based Digital Control Circuitry
Memristor Circuits: Pulse Programming via Invariant Manifolds
An Order-Statistics Based Matching Strategy for Circuit Components in Data Converters
Efficient Implementation of k-Nearest Neighbor Classifier Using Vote Count Circuit
Analysis and Design of CMOS Received Signal Strength Indicator
Discrete Lyapunov Exponent and Resistance to Differential Cryptanalysis
A Wide Locking-Range Frequency Divider for LMDS Applications
Optimization and Hardware Implementation of Image and Video Watermarking for Low-Cost Applications
VLSI Implementation of a High-Throughput Soft-Bit-Flipping Decoder for Geometric LDPC Codes
SEA-SSD: A Storage Engine Assisted SSD With Application-Coupled Simulation Platform
A Condition of Equivalence Between Bus Injection and Branch Flow Models in Radial Networks
A 16-Channel Low-Power Nonuniform Spaced Filter Bank Core for Digital Hearing Aids
System-Level Analysis of Far-Field Radio Frequency Power Delivery for mm-Sized Sensor Nodes
On Designing Time-Varying Delay Feedback Controllers for Master-Slave Synchronization of Lur'e Systems
Impulsive Synchronization of Chaotic Lur'e Systems by Linear Static Measurement Feedback: An LMI Approach
High-Order Mismatch-Shaped Segmented Multibit ΔΣ DACs With Arbitrary Unit Weights
A Superregenerative QPSK Receiver
Observer-Controller Digital PLL
A -40 °C to 120 °C, 169 ppm/°C Nano-Ampere CMOS Current Reference
RF circuit implications of moderate inversion enhanced linear region in MOSFETs
Layered LDPC Decoders With Efficient Memory Access Scheduling and Mapping and Built-In Support for Pipeline Hazards Mitigation
A VLSI High-Performance Priority Encoder Using Standard CMOS Library
Design and Optimization of a Class-E Amplifier for a Loosely Coupled Planar Wireless Power System
RFID Regulator Design Insensitive to Supply Voltage Ripple and Temperature Variation
Low-Noise CMOS TGC Amplifier With Adaptive Gain Control for Ultrasound Imaging Receivers
Simulations of Memristors Using the Poincaré Map Approach
An On-Chip Loopback Block for RF Transceiver Built-In Test
Analytical Stability Condition of the Latency Insertion Method for Nonuniform G LC Circuits
Improving the bandwidth gain-independence and accuracy of the current feedback amplifier
Phase Noise of a Class of Ring Oscillators Having Unsaturated Outputs With Focus on Cycle-to-Cycle Correlation
Derivative Level-Crossing Sampling
Innovative Theory on Multiband NGD Topology Based on Feedback-Loop Power Combiner
A Min-Sum Iterative Decoder Based on Pulsewidth Message Encoding
Observations Concerning the Generation of Spurious Tones in Digital Delta-Sigma Modulators Followed by a Memoryless Nonlinearity
An Optimized Architecture of HEVC Core Transform Using Real-Valued DCT Coefficients
System and Circuit Design for an MB-OFDM UWB Frequency Synthesizer
Hardware Implementation of the Preprocessing QR-Decomposition for the Soft-Output MIMO Detection With Multiple Tree Traversals
Rail-to-Rail Input Pipelined ADC Incorporating Multistage Signal Mapping
Guest Editorial: Special Section on the 2014 IEEE Custom Integrated Circuits Conference (CICC 2014)
Fault Detection for Linear Discrete Time-Varying Systems With Multiplicative Noise: The Finite-Horizon Case
Observations Concerning the Locking Range in a Complementary Differential LC Injection-Locked Frequency Divider - Part I: Qualitative Analysis
Dual-Band Transmission-Line Resistance Compression Network and Its Application to Rectifiers
Passive Multiterminal Networks Without Transformers
Design of Linear-Phase Notch Filters Based on the OMP Scheme and the Chebyshev Window
Nonlinear discrete-time analysis of the fixed frequency switch-mode DC-DC converters dynamics
FPGA-Based Design for Online Computation of Multivariate Empirical Mode Decomposition
Minimization of quantization noise amplification in biorthogonal subband coders
Current-Mode Linear Transformation Filters Using Current Mirrors
A 4.6-ppm/°C High-Order Curvature Compensated Bandgap Reference for BMIC
Graphical Representation of the Power Transfer Efficiency of Lumped-Element Circuits Based on Hyperbolic Geometry
Terminal-Time Synchronization of Multiple Vehicles Under Discrete-Time Communication Networks With Directed Switching Topologies
Low-Power Wireless Transceiver With 67-nW Differential Pulse-Position Modulation Transmitter
Optimized Trellis-Based Min-Max Decoder for NB-LDPC Codes
An EScheduler-Based Data Dependence Analysis and Task Scheduling for Parallel Circuit Simulation
Selective Sampling Versus Attenuation for Interference Mitigation in Broadband Receivers
A Deep Investigation of the Synchronization Mechanisms in LC-CMOS Frequency Dividers
An Automatic Antenna Tuning System Using Only RF Signal Amplitudes
Analog IC Design in Ultra-Thin Oxide CMOS Technologies With Significant Direct Tunneling-Induced Gate Current
Pipelined Cartesian-to-Polar Coordinate Conversion Based on SRT Division
Design of CML Ring Oscillators With Low Supply Sensitivity
An Image Frequency Rejection Filter for SAW-Less GPS Receivers
Nonnegative Edge Quasi-Consensus of Networked Dynamical Systems
VLSI Implementation of a Low-Cost High-Quality Image Scaling Processor
A novel method for two-dimensional frequency estimation
Analysis of 3-Level Bandpass Sigma-Delta Modulators With 2-Level Output
Stability Analysis of Aperiodic Sampled-Data Systems: A Switched Polytopic System Method
Battery Management Technique to Reduce Standby Energy Consumption in Ultra-Low Power IoT and Sensory Applications
The Potential of FinFETs for Analog and RF Circuit Applications
Energy-Efficient Nonvolatile SRAM Design Based on Resistive Switching Multi-Level Cells
Transient Behavior and Phase Noise Performance of Pulsed-Harmonic Oscillators
Adaptive perception with locally adaptable sensor array
The Hardware and Algorithm Co-Design for Energy-Efficient DNN Processor on Edge/Mobile Devices
Prediction of Electromagnetic Interference Noise in SiC MOSFET Module
A 4-W Master-Slave Switching Amplitude Modulator for Class-E1 EDGE Polar Transmitters
Fault-Tolerant Master-Slave Synchronization for Lur'e Systems Using Time-Delay Feedback Control
Homeostatic Fault Tolerance in Spiking Neural Networks: A Dynamic Hardware Perspective
A Sub-µW Bandgap Reference Circuit With an Inherent Curvature-Compensation Property
An Optimum Injection-Timing Tracking Loop for 5-GHz, 1.13-mW/GHz RO-Based Injection-Locked PLL With 152-fs Integrated Jitter
An INL Yield Model of the Digital-to-Analog Converter
The Local Convergence of Boolean Networks With Disturbances
A fully automated recurrent neural network for unknown dynamic system identification and control
Chebyshev Design of Linear-Phase FIR Filters With Linear Equality Constraints
The Effects of Inter-Symbol Interference in Dynamic Element Matching DACs
A State-Space Phase-Noise Model for Nonlinear MEMS Oscillators Employing Automatic Amplitude Control
Control of a Planar System With Quantized and Saturated Input/Output
A Delay-Range-Dependent Approach to Design State Estimator for Discrete-Time Recurrent Neural Networks With Interval Time-Varying Delay
Synthesis of static and dynamic multiple-input translinear element networks
Low-Complexity MIMO Detection: A Mixture of Basic Techniques for Near-Optimal Error Rate
A 6-bit 1-GS/s Two-Step SAR ADC in 40-nm CMOS
Geometric Algebra Correntropy: Definition and Application to Robust Adaptive Filtering
A Novel Approach to Reliable Control of Piecewise Affine Systems With Actuator Faults
On the Relationships Between Input and Output Stability in Two-Ports
An Efficient Technique to Protect Serial Shift Registers Against Soft Errors
Design of Generalized PI Observers for Descriptor Linear Systems
Efficient Behavioral Simulation of Charge-Pump Phase-Locked Loops
Accurate Supercapacitor Modeling for Energy Harvesting Wireless Sensor Nodes
Synchronizing Redundant Cores in a Dynamic DMR Multicore Architecture
An Observer-Based Fixed-Time Consensus Control for Second-Order Multi-Agent Systems With Disturbances
A Novel Integer-Bit Estimation Scheme in Digital Filters Based on Probabilistic Behavior of Signals in the Internal Nodes
A two-stage angle-rotation architecture and its error analysis for efficient digital mixer implementation
A 23.4 mW 68 dB Dynamic Range Low Band CMOS Hybrid Tracking Filter for ATSC Digital TV Tuner Adopting RC and Gm-C Topology
A 0.76-pJ/Pulse 0.1-1 Gpps Microwatt IR-UWB CMOS Pulse Generator With Adaptive PSD Control Using a Limited Monocycle Precharge Technique
A V-Band Ultra Low Power Sub-Harmonic I/Q Down-Conversion Mixer Using Current Re-Used Technique
Hardware-Oriented Algorithm for Quaternion-Valued Matrix Decomposition
A Voltage Regulator-Assisted Lightweight AES Implementation Against DPA Attacks
A Triangular Common Subexpression Elimination Algorithm With Reduced Logic Operators in FIR Filter
Design of Low-Power High-Performance 2-4 and 4-16 Mixed-Logic Line Decoders
Current-Recycling Complex Filter for Bluetooth-Low-Energy Applications
Large Within-Die Gate Delay Variations in Sub-Threshold Logic Circuits at Low Temperature
A tissue impedance measurement chip for myocardial ischemia detection
A Time-Division Multiplexing Signaling Scheme for Inter-Symbol/Channel Interference Reduction in Low-Power Multi-Drop Memory Links
The Reduction of the Duration of the Transient Response in a Class of Continuous-Time LTV Filters
Application-specific instruction set processor for SoC implementation of modern signal processing algorithms
A 0.18-muhboxm CMOS GFSK Analog Front End Using a Bessel-Based Quadrature Discriminator With On-Chip Automatic Tuning
Circuit Approaches to Nonlinear-ISI Mitigation in Noise-Shaped Bandpass D/A Conversion
Comparison and Extension of Approximate 4-2 Compressors for Low-Power Approximate Multipliers
A Millimeter-Wave Reconfigurable On-Chip Coupler With Tunable Power-Dividing Ratios in 0.13- $\mu$ m BiCMOS Technology
On the General Mathematical Framework, Calibration/Compensation Method, and Applications of Non-Ideal Software Defined Harmonics Rejection Transceivers
A Subsampling Quadrature Σ∆ Modulator Based on Distributed Resonators for Use in Radio Receiver
A Real-Time and Hardware-Efficient Processor for Skeleton-Based Action Recognition With Lightweight Convolutional Neural Network
Wireless Power Transfer With Zero-Phase-Difference Capacitance Control
Practical charge-transfer amplifier design architectures for low-power flash A/D converters
Semi-Supervised Broad Learning System Based on Manifold Regularization and Broad Network
A clock and data recovery circuit with programmable multi-level phase detector characteristics and a built-in jitter monitor
Multi-Beam Spatio-Spectral Beamforming Receiver for Wideband Phased Arrays
Real-Time PPG Signal Quality Assessment System for Improving Battery Life and False Alarms
Distortion Analysis of a Three-Terminal MOS-Based Discrete-Time Parametric Amplifier
Subsampling Mismatch Noise Cancellation for High-Speed Continuous-Time DACs
An Improved Seven-Level PUC Inverter Topology With Voltage Boosting
Hypergraph Based Minimum Arborescence Algorithm for the Optimization and Reoptimization of Multiple Constant Multiplications
Blind identification of IIR systems based on special SIMO model
A Hybrid Analog-to-Digital Conversion Algorithm With Sub-Radix and Multiple Quantization Thresholds
Discriminating Multiple Nearby Targets Using Single-Ping Ultrasonic Scene Mapping
A Probabilistic Prediction-Based Fixed-Width Booth Multiplier for Approximate Computing
An Integrated Switching DC-DC Converter With Dual-Mode Pulse-Train/PWM Control
A Complex Variable Fractional-Delay FIR Filter Structure
Observer Design for Lipschitz Nonlinear Systems: The Discrete-Time Case
A 0.31-pJ/bit 20-Gb/s DFE With 1 Discrete Tap and 2 IIR Filters Feedback in 40-nm-LP CMOS
N-Dimensional Approximation of Euclidean Distance
A Combined Analytical-Numerical Methodology for Predicting Subharmonic Oscillation in H-Bridge Inverters Under Double Edge Modulation
Frequency-Channelized Mismatch-Shaped Quadrature Data Converters for Carrier Aggregation in MU-MIMO LTE-A
Bipartite Consensus on Matrix-Valued Weighted Networks
Aliasing-Free Digital Pulse-Width Modulation for Burst-Mode RF Transmitters
Risk Analysis on Multi-Granular Flow Network for Software Integration Testing
On the Foundations of Stability Analysis of Power Systems in Time Scales
A Low-Latency QRD-RLS Architecture for High-Throughput Adaptive Applications
Analog VLSI Circuit Implementation of an Adaptive Neuromorphic Olfaction Chip
Fixed-Time Bipartite Consensus Tracking of Fractional-Order Multi-Agent Systems With a Dynamic Leader
Efficient IP routing table VLSI design for multigigabit routers
Design of a GF(64)-LDPC Decoder Based on the EMS Algorithm
Modeling of Retention Time for High-Speed Embedded Dynamic Random Access Memories
A Low Power Receiver Front-End Design With Tunable Notch Filter for TX Leakage and Blocker Suppression
Phase Transition Analysis of Dual-Mode Standing-Rotary Traveling-Wave Oscillator
Low-Power Spectral-Line Clock Recovery Algorithm for SDR Applications
Correlation-Based Frequency-Response Mismatch Compensation of Quad-TIADC Using Real Samples
Carbon Nanotube Electronics: Design of High-Performance and Low-Power Digital Circuits
A 33-ppm/°C 240-nW 40-nm CMOS Wakeup Timer Based on a Bang-Bang Digital-Intensive Frequency-Locked-Loop for IoT Applications
A Robust and Fast Digital Background Calibration Technique for Pipelined ADCs
Generating the Closed-Form Second-Order Characteristics of Analog Differential Cells by Symbolic Perturbation
An efficient formulation for substrate parasitic extraction accounting for nonuniform current distribution
Joint Polynomial and Look-Up-Table Predistortion Power Amplifier Linearization
Time-Interleaved Multirate Sigma-Delta Modulators
A 0.6-V 10-bit 200-kS/s SAR ADC With Higher Side-Reset-and-Set Switching Scheme and Hybrid CAP-MOS DAC
Quantifying Importance of Edges in Networks
A 0.22-0.89 mW Low-Power and Highly-Secure Always-On Face Recognition Processor With Adversarial Attack Prevention
Generalized Quadrature Data Weighted Averaging
Control of MEMS Vibration Modes With Pulsed Digital Oscillators: Part I - Theory
A new design topology for low-voltage CMOS current feedback amplifiers
A +20 dBm Highly Efficient Linear Outphasing Class-E PA Without AM/AM and AM/PM Characterization Requirements
Ultralow-Power Bioimpedance IC With Intermediate Frequency Shifting Chopper
A new two-stage sharpened comb decimator
A Unified Tractable Approach for Random Drifts on Dynamical Networks
Highly Efficient Monolithic Class E SiGe Power Amplifier Design at 900 and 2400 MHz
Wideband CMOS Amplifier Design: Time-Domain Considerations
Design and Analysis of 2.4 GHz 30~µW CMOS LNAs for Wearable WSN Applications
Controlling a unified chaotic system to hyperchaotic
H 2 Filtering for Discrete-Time Nonlinear Singularly Perturbed Systems
Understanding the Basic Advantages of Bulk FinFETs for Sub- and Near-Threshold Logic Circuits From Device Measurements
Influence of Amplitude Fluctuations on the Noise-Induced Frequency Shift of Noisy Oscillators
Optimization of Driver Preemphasis for On-Chip Interconnects
A DC-50 GHz CMOS Switched-Type Attenuator With Capacitive Compensation Technique
Switching Schemes for Reducing Capacitor Mismatch Sensitivity of Quasi-Passive Cyclic DAC
Low-Power DT ΔΣ Modulators Using SC Passive Filters in 65 nm CMOS
Analysis and Correction of Combined Channel Mismatch Effects in Frequency-Interleaved ADCs
A SPT Treatment to the Realization of the Sign-LMS Based Adaptive Filters
Probe Based Shooting Method to Find Stable and Unstable Limit Cycles of Strongly Nonlinear High-Q Oscillators
An Energy-Efficient Dual-Field Elliptic Curve Cryptography Processor for Internet of Things Applications
Performance bounds of forgetting factor least-squares algorithms for time-varying systems with finite measurement data
A Programmable Majority Logic Array Using Molecular Scale Electronics
A Wireless Power Interface for Rechargeable Battery Operated Medical Implants
A 93.4% Efficiency 8-mV Offset Voltage Constant On-Time Buck Converter With an Offset Cancellation Technique
Multiuser detectors for synchronous DS-CDMA systems based on a recursive p-norm convex relaxation approach
Asynchronous Finite-Time Filtering of Networked Switched Systems and its Application: an Event-Driven Method
An Encryption Scheme Based on Synchronization of Two-Layered Complex Dynamical Networks
Derivation of a Small-Signal Harmonic Model for Closed-Loop Power Converters Based on the State-Variable Sensitivity Method
Efficient Implementation of Iterative Polynomial Matrix EVD Algorithms Exploiting Structural Redundancy and Parallelisation
Delay-Dependent Globally Exponential Stability Criteria for Static Neural Networks: An LMI Approach
Differential log-domain filters with high-gain common-mode feedback
A content-based methodology for power-aware motion estimation architecture
NEMS-Based Functional Unit Power-Gating: Design, Analysis, and Optimization
RF and Microwave Fractional Differentiator Based on Photonics
7 TOPS/W Cellular Neural Network Processor Core for Intelligent Internet-of-Things
Digitally Assisted On-Chip Body Bias Tuning Scheme for Ultra Low-Power VLSI Systems
A ± 3 ppm/°C Single-Trim Switched Capacitor Bandgap Reference for Battery Monitoring Applications
Design of a Monolithic Automatic Substrate/Supply Multiplexer for DVS-Enabled Adaptive Power Converters
Design and FPGA Implementation of Reconfigurable Linear-Phase Digital Filter With Wide Cutoff Frequency Range and Narrow Transition Bandwidth
Analysis and Design of Fully Integrated High-Power Parallel-Circuit Class-E CMOS Power Amplifiers
A Novel Single-Inductor Injection-Locked Frequency Divider by Three With Dual-Injection Secondary Locking
Improving the Security of Chaotic Synchronization With a Delta-Modulated Cryptographic Technique
Comments on "Self-Checking Carry-Select Adder Design Based on Two-Rail Encoding"
Designing Efficient Codecs for Bus-Invert Berger Code for Fully Asymmetric Communication
On Quantized Analog Compressive Sensing Methods for Efficient Resonator Frequency Estimation
A Double Zeros Compensated Direct Fast Feedback Current Driver for Medium to Large AMOLED Displays
A log-domain μbeamformer for medical ultrasound imaging systems
A Delta-Sigma PLL-Based Spread-Spectrum Clock Generator With a Ditherless Fractional Topology
Shooting by a Two-Step Galerkin Method
A Multi-Mode Power Gating Structure for Low-Voltage Deep-Submicron CMOS ICs
Quantization Error Spectra Structure of a DTC Synthesizer via the DFT Axis Scaling Property
Adaptive Body Bias Aware Implementation for Ultra-Low-Voltage Designs in 22FDX Technology
A 0.5-5-GHz Wide-Range Multiphase DLL With a Calibrated Charge Pump
A Polyphase Filter Design for Continuous-Time Quadrature Bandpass Sigma-Delta Modulators
New Improved Algorithms for Compressive Sensing Based on ℓ p Norm
A 7.4-MHz Tri-Mode DC-DC Buck Converter With Load Current Prediction Scheme and Seamless Mode Transition for IoT Applications
An Ultralow-Power Fast-Transient Capacitor-Free Low-Dropout Regulator With Assistant Push-Pull Output Stage
Harmonic Balance Based on Two-Step Galerkin Method
Design approach using tunnel diodes for lowering power in differential comparators
A Programmable Sustaining Amplifier for Flexible Multimode MEMS-Referenced Oscillators