yusuke1997/dblp-id-title huggingface dataset:
Verification oriented approach to concurrent microprogramming with the language C-MIDDLE
Reachability analysis of large circuits using disjunctive partitioning and partial iterative squaring
An object oriented design and simulation system for VLSI
Crown-scheduling of sets of parallelizable tasks for robustness and energy-elasticity on many-core systems with discrete dynamic voltage and frequency scaling
Secure task-worker matching and privacy-preserving scheme for blockchain-based federated crowdsourcing
Darwin: A neuromorphic hardware co-processor based on spiking neural networks
Parallelising C++-programs for transputer systems
Simulated and measured performance evaluation of RISC-based SoC platforms in network processing applications
Integrating methods for the design of real-time systems
Attribute-based searchable encrypted scheme with edge computing for Industrial Internet of Things
Towards amalgamating high-level synthesis and proof systems
A systematic review of multi-factor authentication in digital payment systems: NIST standards alignment and industry implementation analysis
Expert system design for symptom based diagnosis in local area networks
A multi-transputer-net as a hardware simulation environment
Benchmarking mesh and hierarchical bus networks in system-on-chip context
Process to processor mapping within the mathematician's Devil
A conditional abortable priority ceiling protocol for scheduling mixed real-time tasks
Multilayered neural network implementation on transputer systolic array
A framework for the synthesis of hardware from occam
A secure and privacy preserving lightweight authentication scheme for smart-grid communication using elliptic curve cryptography
On computing the 2-D discrete cosine transform using rotations
Asynchronous microprocessors: From high level model to FPGA implementation
Application of the novel associative programmable array-structure multi-match-PLA in synthesis of decomposed finite state machines
Some computer graphics algorithms and their hardware realization
Space optimal solution for data reordering in streaming applications on NoC based MPSoC
Democratic learning: hardware/software co-design for lightweight blockchain-secured on-device machine learning
A cellular architecture dedicated to neural net emulation
A survey on program-state retention for transiently-powered systems
Circulating shared-registers for multiprocessor systems
A novel FPGA local interconnect test scheme and automatic TC derivation/generation
A new framework for remote sensing image super-resolution: Sparse representation-based method by processing dictionaries with multi-type features
RedScarf : an open-source multi-platform simulation environment for performance evaluation of Networks-on-Chip
The conversation deadlock problem in client-server model
Hybrid differential privacy based federated learning for Internet of Things
A placing and routing tool implemented in Prolog
On the use of OR-BDDs for test generation
Optimizing the implementation of real-time Simulink models onto distributed automotive architectures
Permutation routing in optical MIN with minimum number of stages
Estimating micro-PLC execution time for time critical system design
A Survey of Edge Caching Security: Framework, Methods, and Challenges
Hypertextual applications development tools
Providing spatial isolation for Mixed-Criticality Systems
SimTrOS: A heterogenous abstraction level simulator for multicore synchronization in real-time systems
MOHAQ: Multi-Objective Hardware-Aware Quantization of recurrent neural networks
Vehicular network processor design for scalability & automation: Elastic Gateway SoC concept & builder
Introduction to the Special Issue on Testing, prototyping, and debugging of multi-core architectures
Direct control with radial basis function networks: Stability analysis and applications
SECP-AKE: Secure and efficient certificateless-password-based authenticated key exchange protocol for smart healthcare systems
A continuous leakage-resilient CCA secure identity-based key encapsulation mechanism in the standard model
Timing analysis for DCFL/SDCFL VLSI circuits
Function Placement Approaches in Serverless Computing: A Survey
The logic design language and verification environment for the VLSI-/370
Comments on "A blockchain-based attribute-based signcryption scheme to secure data sharing in the cloud"
PHDFS: Optimizing I/O performance of HDFS in deep learning cloud computing platform
Genetic engineering versus natural evolution: Genetic algorithms with deterministic operators
Systolic architecture for the calculation of the correlation coefficients
Automatic synthesis of structural HDL descriptions from graphic specification of embedded asics
Design and implementation of a portable kernel for real-time applications
Optimal exploration of the unrolling degree for software pipelining
A memory-mapped interprocessor communication architecture using FIFO RAMs
A simulation method for parallel computer architectures
HyFAR: A hypervisor-based fault tolerance approach for heterogeneous automotive real-time systems
An optical switching architecture for hierarchical group communication
A concurrency control scheme for nested transactions
Root cause analysis of soft-error-induced failures from hardware and software perspectives
A server bypass architecture for hopscotch hashing key-value store on DRAM-NVM memories
Trade-offs of certified fixed-point code synthesis for linear algebra basic blocks
Towards a content-centric approach to crowd-sensing in vehicular clouds
A real-time image compressor using a modular signal-processing system employing occam and the transputer
Semantic multigranularity locking and its performance in object-oriented database systems
A hybrid knowledge-based approach to information retrieval
Design optimization of WirelessHART networks in Cyber-Physical Systems
WEnSIBR: Compression using dynamic bases supported with encoding and zone wise wear leveling for NVMs
MTS-LSTDM: Multi-Time-Scale Long Short-Term Double Memory for power load forecasting
Informer homed routing fault tolerance mechanism for wireless sensor networks
Characterizing and representing workloads for parallel computer architectures
Arithmetical logical unit design for a processor with BILBO techniques: Functional simulation and test strategies
Scheduling in a continuous area-time design space
Implementation of an intelligent SAR image registration system
A survey of techniques for improving error-resilience of DRAM
Designing efficient accelerator of depthwise separable convolutional neural network on FPGA
A2E2: Aerial-assisted energy-efficient edge sensing in intelligent public transportation systems
Incorporating memory layout in the modeling of message passing programs
Generating parallel programs from skeleton based specifications
The determination of angular values and parameters in flat surfaces: from the mathematical approach to the CORDIC architecture
The use of economic agents under price driven mechanism in grid resource management
Domain-specific scenarios for refinement-based methods
Class-based request control system in multimedia contents service
A blockchain-based secure data sharing scheme with efficient attribute revocation
NULL convention multiply and accumulate unit with conditional rounding, scaling, and saturation
Efficient and privacy-preserving outsourced unbounded inner product computation in cloud computing
Accelerating CNN Inference on ASICs: A Survey
An efficient immersion-based watershed transform method and its prototype architecture
An output queueing analysis of multipath ATM switches
Design of a transputer network for searching neighbours in M.D. simulations
Harmless, a hardware architecture description language dedicated to real-time embedded system simulation
A Blockchain-based access control scheme with multiple attribute authorities for secure cloud data sharing
Timing-accurate scheduling and allocation for parallel I/O operations in real-time systems
Feed-Forward learning algorithm for resistive memories
Intermediate code for the sequential Prolog machine PEK
Energy and buffer aware application mapping for networks-on-chip with self similar traffic
The power impact of hardware and software actuators on self-adaptable many-core systems
A knowledge-based approach for the development of concurrent software
Speculative trivialization point advancing in high-performance processors
Systool-systolic array programming tool
A framework for mastering heterogeneity in multi-layer security information and event correlation
The design of distributed, software fault tolerant, real-time systems incorporating decision mechanisms
ASTOR - An architecture of special purpose processing units with distributed control and message passing
Locality aspects and cache memory utility in microcomputers
Exploiting primary/backup mechanism for energy efficiency in dependable real-time systems
A scheme for multiple on-chip signature checking for embedded SRAMS
Protection and routing algorithms for network management : The case of transmission networks
Visual query language for object-oriented databases: OQD
Guest editorial: Special issue on the 2020 IEEE symposium on real-time distributed computing (ISORC)
Kassandra: A framework for distributed simulation of heterogeneous cooperating objects
Binary convolutional neural network acceleration framework for rapid system prototyping
Performance evaluation package for UNIX III systems
Evaluation framework for energy-aware multiprocessor scheduling in real-Time systems
An interoperable and flat Industrial Internet of Things architecture for low latency data collection in manufacturing systems
PED: Probabilistic Energy-efficient Deadline-aware scheduler for heterogeneous SoCs
Complex event models for automotive embedded systems
Power optimization techniques for associative processors
The parallel program development environment CDL/ACL for cellular processing
A two-level programming strategy for distributed systems
PriRPT: Practical blockchain-based privacy-preserving reporting system with rewards
Residue number system to binary converter for the moduli set (2 n-1 , 2 n -1, 2 n +1)
On blockchain integration into mobile crowdsensing via smart embedded devices: A comprehensive survey
Scheduling hard real-time tasks with tolerance of multiple processor failures
A system service for distributed programming and execution in communication-oriented distributed operating media
Mul_STK: Efficient and privacy-preserving query with spatio-temporal-keyword multiple attributes in cloud computing
Live migration of compiled Wasm modules across the Compute Continuum
A hybrid distributed mutual exclusion algorithm
Techniques for on-demand structural redundancy for massively parallel processor arrays
GraphA: An efficient ReRAM-based architecture to accelerate large scale graph processing
Verification of network end-to-end latencies for adaptive ethernet-based cyber-physical systems
On communications performance and processor efficiency
Some performance figures for the G-Machine and its optimisations
Occam implementation of process-to-processor mapping on the Hathi-2 transputer system
Decentralized computation offloading via multi-agent deep reinforcement learning for NOMA-assisted mobile edge computing with energy harvesting devices
The master-slave paradigm on heterogeneous systems: A dynamic programming approach for the optimal mapping
DeepGlobal: A framework for global robustness verification of feedforward neural networks
Multicast communication in wormhole-routed symmetric networks with hamiltonian cycle model
Testability and path testing strategies
Protocol description and simulation in the OCCAM programming language
An energy-efficient delay reduction technique for supporting WLAN-based VoIP in SmartPhone
Heterogeneous online/offline signcryption for secure communication in Internet of Things
MCPAP: A MSIS-based conditional privacy-preserving authentication protocol for smart grids
An online dynamic pricing framework for resource allocation in edge computing
A machine learning assisted data placement mechanism for hybrid storage systems
Asynchronous vs. synchronous interfacing to time-triggered communication systems
A novel reconfigurable router for QoS guarantees in real-time NoC-based MPSoCs
Formal reasoning about switch-level MOS descriptions
Practicable live container migrations in high performance computing clouds: Diskless, iterative, and connection-persistent
Extending database programming language with declarative querying facilities
A survey on application mapping strategies for Network-on-Chip design
Code Scheduling Methods for some architectural features in PIPE
An application specific environment for the simulation of interacting particle systems
Special issue on Evolutionary computing
Watchdog processors in parallel systems
Blockchain-based batch authentication protocol for Internet of Vehicles
Host-diagnosis algorithms for parallel systems
Energy-efficient scheduling for parallel applications with reliability and time constraints on heterogeneous distributed systems
Optimum design of fault-tolerant arithmetic array processors by using data coding
A clocking technique for FPGA pipelined designs
Design space exploration of an open-source, IP-reusable, scalable floating-point engine for embedded applications
A heuristic fault-tolerant routing algorithm in mesh using rectilinear-monotone polygonal fault blocks
A survey on hardware accelerators: Taxonomy, trends, challenges, and perspectives
Dependability assessment of by-wire control systems using fault injection
A framework for virtually transparent monitoring of parallel programs
Recent improvements on the concept of conditional critical regions
Bit-error-rate aware sensing-error correction interaction in spintronic MRAM
A reconfigurable boolean n-cube architecture under faults
Special issue on Reliable Software Technologies (AEiC2022)
Attestation of integrity of overlay networks
Design of a reconfigurable parallel RISC-machine
CoqMatrix: Formal matrix library with multiple models in Coq
CISC versus RISC processors for graphics: A simulation study
FPGA based acceleration of game theory algorithm in edge computing for autonomous driving
MCED-H: An efficient scheduling policy for energy harvesting mixed-criticality real-time systems
Converstion modules: A methodological approach to the design of real-time applications
An efficient signcryption of heterogeneous systems for Internet of Vehicles
Design of real time systems. - A method and a tool
Genetic algorithms for hardware-software partitioning and optimal resource allocation
Clock cycle estimation based on dead time and control unit area minimization
An adaptive approach to achieving hardware and software fault tolerance in a distributed computing environment
Fault-tolerance of Complete Josephus Cubes
An environment for processing images of historical documents
A study on the uncertainty inherent in class cohesion measurements
Interactive and targeted runtime verification using a debugger-based architecture
A distributed event processing method for general purpose computation
Session D3: Data base systems
ConGradetect: Blockchain-based detection of code and identity privacy vulnerabilities in crowdsourcing
Perceptron based filtering of futile prefetches in embedded VLIW DSPs
Computation of tight bounds for the worst-case end-to-end delay on Avionics Full-Duplex Switched Ethernet
Detection and defence against thermal and timing covert channel attacks in multicore systems
Resource-aware multi-task offloading and dependency-aware scheduling for integrated edge-enabled IoV
Effectiveness of HT-assisted sinkhole and blackhole denial of service attacks targeting mesh networks-on-chip
Security services architecture for Secure Mobile Grid Systems
Cluster analysis with a fast microcomputer
HP-MODTRANS: A High performance modular transputer architecture
Tools for distributed programming in the INCAS project
Communication-aware task assignment algorithm for MPSoC using shared memory
Evaluating single event upsets in deep neural networks for semantic segmentation: An embedded system perspective
A-GR: A novel geographical routing protocol for AANETs
A co-commitment based secure data collection scheme for tiered wireless sensor networks
BGS: Accelerate GNN training on multiple GPUs
Grouping and time-series notifying of periodic data in a real-time streaming system for smart toy claw machine
Grasp: Visualizing the behavior of hierarchical multiprocessor real-time systems
Thermal-aware correlated two-level scheduling of real-time tasks with reduced processor energy on heterogeneous MPSoCs
Scheduling expression trees for delayed-load architectures
Constrained software synthesis for embedded applications
The rCOS framework for multi-dimensional separation of concerns in model-driven engineering
SIMPAC-T : A simulator for multitransputer systems
Zero-trust design and assurance patterns for cyber-physical systems
Exploiting address compression and heterogeneous interconnects for efficient message management in tiled CMPs
Privacy-preserving multidimensional data aggregation for diverse electricity data users
The use of an office information server in an environment based on high-performance workstations
An aspect-oriented, model-driven approach to functional hardware verification
Remarks on the use of Reed-Solomon codes in signature analysis
CREW: Computation reuse and efficient weight storage for hardware-accelerated MLPs and RNNs
A new strategy for interpreting LISP applied to FranzLISP
FPGA schemes for minimizing the power-throughput trade-off in executing the Advanced Encryption Standard algorithm
Quality of service aware power management for virtualized data centers
A knowledge based approach to loop restructuring
A reconfigurable point target detection system based on morphological clutter elimination
A note on "Implementable decimal arithmetic algorithms"
Energy aware fixed priority scheduling for real time sporadic task with task synchronization
Detecting the phase behavior on cache performance using the reuse distance vectors
A cost model for sort-domain traversal strategy in object-oriented databases
Dynamic capping of rename registers for SMT processors
Session E1: Image recognition
A prediction-based adaptive location policy for distributed load balancing
A parallel architecture for the Color Doppler flow technique in ultrasound imaging
Topological properties of hierarchical cubic networks
A quantitative analysis of the .NET common language runtime
Performance evaluation of a Windows NT based PC cluster for high performance computing
Semi-clairvoyant scheduling in non-preemptive fixed-priority mixed-criticality systems
Job vs. portioned partitioning for the earliest deadline first semi-partitioned scheduling
A monolithic scan-line bit producer for real-time image rasterization
Efficient dynamic program monitoring on multi-core systems
A DBT-based VLSI systolic architecture for hard squared error clustering
MPTO-MT: A multi-period vehicular task offloading method in 5G HetNets
Accumulator-based pseudo-exhaustive two-pattern generation
Deadlock-free generic routing algorithms for 3-dimensional Networks-on-Chip with reduced vertical link density topologies
Implementation of a streaming execution unit
Improving stability for peer-to-peer multicast overlays by active measurements
An enhanced traceable CP-ABE scheme against various types of privilege leakage in cloud storage
Distribution algorithms for document allocation in multiprocessor information retrieval systems
Morphological evaluation of embryo viability
Measurement based analysis of temporal behaviour as support for scheduling problems in parallel and distributed real-time systems
Multi-node broadcasting in all-ported 3-D wormhole-routed torus using an aggregation-then-distribution strategy
PARLE: A language for expressing parallelism and integrating symbolic and numeric computations
Asynchronous arbiter for micro-threaded chip multiprocessors
Session C3: Formal methods II
A server-based approach for predictable GPU access with improved analysis
Recursive bi-partitioning of netlists for large number of partitions
Cost-driven repair optimization of reconfigurable nanowire crossbar systems with clustered defects
Efficient multiple multicasting in hypercubes
Automatic Protocol implementation - generating C++ code from SDL/PR specifications
Transnet: A method for transformational development of embedded software
Random logic circuit implementation of extended Timed Petri Nets
Replacing media caches in streaming proxy servers
SymEx-VP: An open source virtual prototype for OS-agnostic concolic testing of IoT firmware
Transaction management for global serializability and local autonomy in multidatabase systems
Energy-efficient stream task scheduling scheme for embedded multimedia applications on multi-issued stream architectures
Hardware support for adaptive tessellation of Bézier surfaces based on local tests
On structured gate forest VLSI design
An analytical POC stack operations folding for continuous and discontinuous Java bytecodes
The clock, test and maintenance control chip of the IBM ES/9221
Formal specifications as constructive diagrams
GaAs implementation of a 32-bit RISC
Systematic detection of memory related performance bottlenecks in GPGPU programs
Homogeneous teacher based buffer knowledge distillation for tiny neural networks
Efficient energy management by exploiting retention state for self-powered nonvolatile processors
A holistic cross-layer optimization approach for mitigating stragglers in in-memory data processing
Formal virtualization requirements for the ARM architecture
Identification and classification of agent behaviour at runtime in open, trust-based organic computing systems
Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms
ARC-H: Adaptive replacement cache management for heterogeneous storage devices
Epipe: A low-cost fault-tolerance technique considering WCET constraints
Effective and efficient FPGA synthesis through general functional decomposition
A new deadlock prevention scheme for nonminimal adaptive wormhole routing
IPTES - Incremental Prototyping Technology for Embedded real-time Systems
Slack computation for DVS algorithms in fixed-priority real-time systems using fluid slack analysis
T-TNet: A dual-dependency trigger framework for active defense and hierarchical access control via multi-domain information fusion
A server-aided secure interval test and comparison protocol with OPRF
System engineering with DOMINO and GRAPES
SVM-based real-time hyperspectral image classifier on a manycore architecture
Scheduling optional computations for adaptive real-time systems
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs
Validation of abstract test suites with use of SDL
Edge-aided searchable data sharing scheme for IoV in the 5G environment
Certificateless integrity auditing scheme for sensitive information protection in cloud storage
A survey on routing algorithm and router microarchitecture of three-dimensional Network-on-Chip
A fault tolerant multistage interconnection network with partly duplicated switches
Energy-aware run-time task partition and allocation in dynamic partial reconfigurable systems
Cost-effective fixed-point hardware support for RISC-V embedded systems
A customizable conflict resolution and attribute-based access control framework for multi-robot systems
On the degree of parallelism for parallel real-time tasks
BZIP: A compact data memory system for UTXO-based blockchains
0-1 ILP-based run-time hierarchical energy optimization for heterogeneous cluster-based multi/many-core systems
TARTS: A Temperature-Aware Real-Time Deadline-Partitioned Fair Scheduler
A framework for low energy data management in reconfigurable multi-context architectures
Stateless forward-secure key-insulated linkable ring signature scheme in ID-based setting
Optimization and architectural evaluation of regular combinatoric structures
Adapter-guided knowledge transfer for heterogeneous federated learning
A personal computer based graphic workstation
Advanced versioning mechanisms supporting CSCW environments