yusuke1997/dblp-id-title huggingface dataset:
Invasive Tightly-Coupled Processor Arrays: A Domain-Specific Architecture/Compiler Co-Design Approach
LAMBDA: Lightweight Assessment of Malware for emBeddeD Architectures
Minimizing Cost of Scheduling Tasks on Heterogeneous Multicore Embedded Systems
Scheduling and Optimization of Fault-Tolerant Embedded Systems with Transparency/Performance Trade-Offs
Probabilistic design of multimedia embedded systems
Plugging Versus Logging: Adaptive Buffer Management for Hybrid-Mapping SSDs
legaSCi: Legacy SystemC Model Integration into Parallel Simulators
Cache Abstraction for Data Race Detection in Heterogeneous Systems with Non-coherent Accelerators
Runtime Reconfigurations of Embedded Controllers
Regular Composite Resource Partitioning and Reconfiguration in Open Systems
An adaptive file-system-oriented FTL mechanism for flash-memory storage systems
A Methodology for Fault-tolerant Pareto-optimal Approximate Designs of FPGA-based Accelerators
IGOR, Get Me the Optimum! Prioritizing Important Design Decisions During the DSE of Embedded Systems
PTAT: An Efficient and Precise Tool for Tracing and Profiling Detailed TLB Misses
SmartLMK: A Memory Reclamation Scheme for Improving User-Perceived App Launch Time
Energy-Efficient Approximate Edge Inference Systems
Performance and Communication Cost of Hardware Accelerators for Hashing in Post-Quantum Cryptography
Effective Runtime Resource Management Using Linux Control Groups with the BarbequeRTRM Framework
Sequentially Constructive Concurrency - A Conservative Extension of the Synchronous Model of Computation
Modeling and exploiting spatial locality trade-offs in wavelet-based applications under varying resource requirements
FLASH: Deadline-Aware Flexible LLC Arbitration and Scheduling for Hardware Accelerators
A Hardware Approach For Accelerating Inductive Learning In Description Logic
Hierarchical Resource Orchestration Framework for Real-time Containers
A highly configurable cache for low energy embedded systems
Parallelizing the Chambolle Algorithm for Performance-Optimized Mapping on FPGA Devices
Editorial: Adversaries and Robustness
Automatic generation of high-speed accurate TLM models for out-of-order pipelined bus
GPU Performance Estimation using Software Rasterization and Machine Learning
Lightweight Hardware-Based Cache Side-Channel Attack Detection for Edge Devices (Edge-CaSCADe)
Achieving energy-synchronized communication in energy-harvesting wireless sensor networks
A Distributed Real-time Scheduling System for Industrial Wireless Networks
Statistical Performance Modeling in Functional Instruction Set Simulators
A See-through-Wall System for Device-Free Human Motion Sensing Based on Battery-Free RFID
Toward a Practical Regularity-based Model: The Impact of Evenly Distributed Temporal Resource Partitions
Approximate Memristive In-memory Computing
Formally Verified Loop-Invariant Code Motion and Assorted Optimizations
ForEVeR: A complementary formal and runtime verification approach to correct NoC functionality
RunStream: A High-Level Rapid Prototyping Framework for Stream Ciphers
A Fast Method to Compute Disjunctive Quadratic Invariants of Numerical Programs
LOCUS: Low-Power Customizable Many-Core Architecture for Wearables
Impact of Wireless Channel Temporal Variation on MAC Design for Body Area Networks
MVLevelDB + : Meeting Relative Consistency Requirements of Temporal Queries in Sensor Stream Databases
Power scalability in a mesh-connected reconfigurable architecture
Efficient External Sorting for Memory-Constrained Embedded Devices with Flash Memory
MemFHE: End-to-end Computing with Fully Homomorphic Encryption in Memory
Game-Based Task Offloading of Multiple Mobile Devices with QoS in Mobile Edge Computing Systems of Limited Computation Capacity
FLORA: FLoorplan Optimizer for Reconfigurable Areas in FPGAs
Byte-Addressable Update Scheme to Minimize the Energy Consumption of PCM-Based Storage Systems
Vector Extensions in COTS Processors to Increase Guaranteed Performance in Real-Time Systems
SLISCP-light: Towards Hardware Optimized Sponge-specific Cryptographic Permutations
A Framework for Multi-Robot Programming: From High-Level Specification to Retargetable Deployment
Mobile Computations with Surrounding Devices: Proximity Sensing and MultiLayered Work Stealing
HEART: Hybrid Memory and Energy-Aware Real-Time Scheduling for Multi-Processor Systems
Schedulability Analysis of Tasks with Corunner-Dependent Execution Times
3PXNet: Pruned-Permuted-Packed XNOR Networks for Edge Machine Learning
OPLE: A Heuristic Custom Instruction Selection Algorithm Based on Partitioning and Local Exploration of Application Dataflow Graphs
Detecting Software Cache Coherence Violations in MPSoC Using Traces Captured on Virtual Platforms
Analysis and Design of Adders for Approximate Computing
Safety Verification of Cyber-Physical Systems with Reinforcement Learning Control
Energy management for battery-powered embedded systems
Optimization and Implementation of Wavelet-based Algorithms for Detecting High-voltage Spindles in Neuron Signals
Evaluation of hardware and software schedulers for embedded switches
CEDR: A Compiler-integrated, Extensible DSSoC Runtime
Automated Model-Based Optimization of Data-Adaptable Embedded Systems
Energy-efficient embedded software implementation on multiprocessor system-on-chip with multiple voltages
Designing best effort networks-on-chip to meet hard latency constraints
Rectifying Skewed Kernel Page Reclamation in Mobile Devices for Improving User-Perceivable Latency
Formal Specification of Medical Systems by Proof-Based Refinement
Energy efficient wireless packet scheduling and fair queuing
Transport triggered architecture to perform carrier synchronization for LTE
Effective Verification for Low-Level Software with Competing Interrupts
Operational Models for Piecewise-Smooth Systems
Design, Analysis and Verification of Real-Time Systems Based on Time Petri Net Refinement
Probabilistic Risk-Aware Scheduling with Deadline Constraint for Heterogeneous SoCs
MHDeep: Mental Health Disorder Detection System Based on Wearable Sensors and Artificial Neural Networks
Reducing code size through address register assignment
Reliable and Secure Design-Space-Exploration for Cyber-Physical Systems
Analytical Performance Models for NoCs with Multiple Priority Traffic Classes
Reg-Tune: A Regression-Focused Fine-Tuning Approach for Profiling Low Energy Consumption and Latency
Dynamic Energy Management of FPGA Accelerators in Embedded Systems
Guest Editorial for Special Issue of ESWEEK 2015
Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore
Software Optimization and Design Methodology for Low Power Computer Vision Systems
Energy-Efficient Multicore Scheduling for Hard Real-Time Systems: A Survey
Deep Ensemble Learning for Human Activity Recognition Using Wearable Sensors via Filter Activation
Microcontroller Fingerprinting Using Partially Erased NOR Flash Memory Cells
Probabilistic Safety Verification of Stochastic Hybrid Systems Using Barrier Certificates
Application-centric Network Management - Addressing Safety and Real-time in V2X Applications
Dynamic adaptation for fault tolerance and power management in embedded real-time systems
On-chip memory architecture exploration framework for DSP processor-based embedded system on chip
Latent space segmentation for mobile gait analysis
Timing-Anomaly Free Dynamic Scheduling of Conditional DAG Tasks on Multi-Core Systems
Introduction to the Special Issue on Real-Time Computing in the IoT-to-Edge-to-Cloud Continuum
Converging CSP specifications and C++ programming via selective formalism
A Review of Abstraction Methods Toward Verifying Neural Networks
Timestamp Temporal Logic (TTL) for Testing the Timing of Cyber-Physical Systems
Coherent Extension, Composition, and Merging Operators in Contract Models for System Design
Perpetuu: A Tiered Solar-powered GIS Microserver
L24: Parallelism, performance, energy efficiency, and cost trade-offs in future sensor platforms
Composing heterogeneous reactive systems
Architecture Optimization of Application-Specific Implicit Instructions
Star-Set Based Efficient Reachable Set Computation of Anytime Sensing-Based Neural Network-Controlled Dynamical Systems
Distributed Multi-Representative Re-Fusion Approach for Heterogeneous Sensing Data Collection
MPSoC Software Debugging on Virtual Platforms via Execution Control with Event Graphs
VADF: Versatile Approximate Data Formats for Energy-Efficient Computing
A Dual-Mode Strategy for Performance-Maximisation and Resource-Efficient CPS Design
SmartTBD: Smart Tracking for Resource-constrained Object Detection
BlueIO: A Scalable Real-Time Hardware I/O Virtualization System for Many-core Embedded Systems
Pattern Guided Integrated Scheduling and Routing in Multi-Hop Control Networks
Introduction to the Special Issue on Languages, Compilers, Tools, and Theory of Embedded Systems: Part 2
QUAREM: Maximising QoE Through Adaptive Resource Management in Mobile MPSoC Platforms
Exact WCRT Analysis for Message-Processing Tasks on Gateway-Integrated In-Vehicle CAN Clusters
CGPredict: Embedded GPU Performance Estimation from Single-Threaded Applications
Optimization of Real-Time Software Implementing Multi-Rate Synchronous Finite State Machines
Energy-Efficient Sensing with the Low Power, Energy Aware Processing (LEAP) Architecture
Robust architectures for embedded wireless network control and actuation
A Survey of Blockchain Data Management Systems
Schedulability-driven frame packing for multicluster distributed embedded systems
A Machine Learning Methodology for Cache Memory Design Based on Dynamic Instructions
Synthesis of Flexible Accelerators for Early Adoption of Ring-LWE Post-quantum Cryptography
Efficient Control-Flow Subgraph Matching for Detecting Hardware Trojans in RTL Models
STL-GO: Spatio-Temporal Logic with Graph Operators for Distributed Systems with Multiple Network Topologies
Energy optimization for real-time multiprocessor system-on-chip with optimal DVFS and DPM combination
Implementing constrained cyber-physical systems with IEC 61499
Efficient, Long-Term Logging of Rich Data Sensors Using Transient Sensor Nodes
Area, Throughput, and Power Trade-Offs for FPGA- and ASIC-Based Execution Stream Compression
AIDA: Adaptive application-independent data aggregation in wireless sensor networks
Runtime Optimization of System Utility with Variable Hardware
AxOTreeS : A Tree Search Approach to Synthesizing FPGA-based Approximate Operators
Automatic Generation of Resource and Accuracy Configurable Processing Elements
A Probabilistic Calculus for Probabilistic Real-Time Systems
A Hierarchical Distributed Runtime Resource Management Scheme for NoC-Based Many-Cores
The benefits of using variable-length pipelined operations in high-level synthesis
Automatic Generation of Fast and Accurate Performance Models for Deep Neural Network Accelerators
Falsification of Cyber-physical Systems Using Bayesian Optimization
Deriving Equations from Sensor Data Using Dimensional Function Synthesis
Shortest-path algorithms for real-time scheduling of FIFO tasks with minimal energy use
Integrated Task and Interrupt Management for Real-Time Systems
System and software architectures of distributed smart cameras
Editorial: To Use or Not To? Embedded Systems for Voting
CompAct: On-chip <underline>Com</underline>pression of <underline>Act</underline>ivations for Low Power Systolic Array Based CNN Acceleration
Is Your Bus Arbiter Really Fair? Restoring Fairness in AXI Interconnects for FPGA SoCs
Formal Verification of a Timing Enforcer Implementation
Online memory compression for embedded systems
Testing Programs with Contextual Unfoldings
Implementation and evaluation of mixed-criticality scheduling approaches for sporadic tasks
Unlocking the Full Potential of Dual-Interface SSDs: A Comprehensive Hardware and Software Perspective
SensiX++: Bringing MLOps and Multi-tenant Model Serving to Sensory Edge Devices
Generating Invariant-Based Certificates for Embedded Systems
Facilitating Human Activity Data Annotation via Context-Aware Change Detection on Smartwatches
Protection Window Based Security-Aware Scheduling against Schedule-Based Attacks
Hardware-Based Load Value Trace Filtering for On-the-Fly Debugging
FAST: Frequency-aware static timing analysis
Identifying Region-Wide Functions Using Urban Taxicab Trajectories
Energy savings and speedups from partitioning critical software loops to hardware in embedded systems
A Multi-Quadcopter Cooperative Cyber-Physical System for Timely Air Pollution Localization
EdgeWise: Energy-efficient CNN Computation on Edge Devices under Stochastic Communication Delays
FuSS: Coverage-Directed Hardware Fuzzing with Selective Symbolic Execution
Predictability for timing and temperature in multiprocessor system-on-chip platforms
Guest editorial: Special issue on networked embedded systems
Special Issue: "AI Acceleration on FPGAs"
xTune: A formal methodology for cross-layer tuning of mobile embedded systems
A RF4CE-based remote controller with interactive graphical user interface applied to home automation system
Underminer: A Framework for Automatically Identifying Nonconverging Behaviors in Black-Box System Models
CNN-based Robust Sound Source Localization with SRP-PHAT for the Extreme Edge
Performance and Power Estimation of STT-MRAM Main Memory with Reliable System-level Simulation
Toward Efficient and Adaptive Design of Video Detection System with Deep Neural Networks
PROARTIS: Probabilistically Analyzable Real-Time Systems
Kryptonite: Worst-Case Program Interference Estimation on Multi-Core Embedded Systems
Integrated Through-Silicon Via Placement and Application Mapping for 3D Mesh-Based NoC Design
Analyzing the worst-case execution time for instruction caches with prefetching
Compact Implementations of ARX-Based Block Ciphers on IoT Processors
Code-size-aware Scheduling of Synchronous Dataflow Graphs on Multicore Systems
A regression test selection technique for embedded software
GHOST: A Graph Neural Network Accelerator using Silicon Photonics
Fixed-Priority Scheduling for Two-Phase Mixed-Criticality Systems
Cross-Layer Adaptation with Safety-Assured Proactive Task Job Skipping
Tomahawk: Parallelism and heterogeneity in communications signal processing MPSoCs
Introduction to the Special Issue on Languages, Compilers, Tools, and Theory of Embedded Systems: Part 1
HyDREA: Utilizing Hyperdimensional Computing for a More Robust and Efficient Machine Learning System
An Efficient Finite Field Multiplier Using Redundant Representation
XimSwap: Many-to-Many Face Swapping for TinyML
METEOR: Hybrid photonic ring-mesh network-on-chip for multicore architectures
COBRRA: COntention-aware cache Bypass with Request-Response Arbitration
Hardware-Software Collaborative Thermal Sensing in Optical Network-on-Chip-based Manycore Systems
Tÿcho: A Framework for Compiling Stream Programs
Application-adaptive intelligent cache memory system
Multi-Compression Scale DNN Inference Acceleration based on Cloud-Edge-End Collaboration
Design-Level and Code-Level Security Analysis of IoT Devices
ReSG: A Data Structure for Verification of Majority-based In-memory Computing on ReRAM Crossbars
Data reorganization for scalable video service with embedded mobile devices
On Space Utilization Enhancement of File Systems for Embedded Storage Systems
Improving Power of DSP and CNN Hardware Accelerators Using Approximate Floating-point Multipliers
Low-Cost Standard Signatures for Energy-Harvesting Wireless Sensor Networks
RMW-F: A Design of RMW-Free Cache Using Built-in NAND-Flash for SMR Storage
Energy-efficient task allocation techniques for asymmetric multiprocessor embedded systems
A Methodology for Estimating Performance and Power Consumption of Embedded Flash File Systems
Model and Program Repair via SAT Solving
An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory
DirectNVM: Hardware-accelerated NVMe SSDs for High-performance Embedded Computing
Synthesizing Parsimonious Inexact Circuits through Probabilistic Design Techniques
Introduction to special issue on Java technologies for real-time and embedded systems
TEFLON: Thermally Efficient Dataflow-aware 3D NoC for Accelerating CNN Inferencing on Manycore PIM Architectures
Packet Aggregation Real-Time Scheduling for Large-Scale WIA-PA Industrial Wireless Sensor Networks
A fast string-matching algorithm for network processor-based intrusion detection system
Horizontal Auto-Scaling for Multi-Access Edge Computing Using Safe Reinforcement Learning
A Hierarchical Classification Method for High-accuracy Instruction Disassembly with Near-field EM Measurements
MaGNAS: A Mapping-Aware Graph Neural Architecture Search Framework for Heterogeneous MPSoC Deployment
A Hardware Framework for Yield and Reliability Enhancement in Chip Multiprocessors
Efficient software implementation of embedded communication protocol controllers using asynchronous software thread integration with time- and space-efficient procedure calls
A Variability-Aware Robust Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints
Optimization of DNN-based HSI Segmentation FPGA-based SoC for ADS: A Practical Approach
Maintaining real-time application timing similarity for defect-tolerant NoC-based many-core systems
A Hybrid Sparse-dense Defensive DNN Accelerator Architecture against Adversarial Example Attacks
SPECTRUM: A Software-defined Predictable Many-core Architecture for LTE/5G Baseband Processing
The ReNoC Reconfigurable Network-on-Chip: Architecture, Configuration Algorithms, and Evaluation
OASIS: Optimized Adaptive System for Intelligent SLAM
MEDiSN: Medical emergency detection in sensor networks
Energy-Aware Adaptive Mixed-Criticality Scheduling with Semi-Clairvoyance and Graceful Degradation
Formal Requirement Debugging for Testing and Verification of Cyber-Physical Systems
Introducing embedded software and systems education and advanced learning technology in an engineering curriculum
Efficient localization scheme with ring overlapping by utilizing mobile anchors in wireless sensor networks
ENFFiS: An enhanced NAND flash memory file system for mobile embedded multimedia system
Securely Reinforcing Synchronization for Embedded Online Contests
Serial Arithmetic Strategies for Improving FPGA Throughput
Does SoC Hardware Development Become Agile by Saying So: A Literature Review and Mapping Study
FIDES: An advanced chip multiprocessor platform for secure next generation mobile terminals
Guest Editorial: Special Issue on "Secure and Fault-Tolerant Embedded Computing"
Tailor-made Virtualization Monitor Design for CPU Virtualization on LEON Processors
FD-CNN: A Frequency-Domain FPGA Acceleration Scheme for CNN-Based Image-Processing Applications
Deadline-Aware Task Offloading for Vehicular Edge Computing Networks Using Traffic Light Data
Modeling and Analysis of Fault Detection and Fault Tolerance in Wireless Sensor Networks
A Study of Dynamic Phase Adaptation Using a Dynamic Multicore Processor
Reducing data cache leakage energy using a compiler-based approach
A Comprehensive Model for Efficient Design Space Exploration of Imprecise Computational Blocks
DTRL: Decision Tree-based Multi-Objective Reinforcement Learning for Runtime Task Scheduling in Domain-Specific System-on-Chips
Scheduling in Real-Time Mobile Systems
Reducing memory requirements of resource-constrained applications
Improving Worst-case TSN Communication Times of Large Sensor Data Samples by Exploiting Synchronization
GINA: Exploiting Graph Neural Network Layer Features for Energy Efficient Inferencing in NVM-based PIM Accelerators
FlashLight: A Lightweight Flash File System for Embedded Systems
LATTE: LSTM Self-Attention based Anomaly Detection in E mbedded Automotive Platforms
A Secure and Efficient Framework for Outsourcing Large-scale Matrix Determinant and Linear Equations
Energy-Efficient Run-Time Mapping and Thread Partitioning of Concurrent OpenCL Applications on CPU-GPU MPSoCs
Stash: Flexible Energy Storage for Intermittent Sensors
CapDYN : Adaptive Self-Scaling Energy Storage for Powering Batteryless IoT
Structure Design of Wireless Sensor Nodes with Energy and Cost Awareness for Multichannel Signal Measurement
Contextual partitioning for speech recognition
Thermal-Aware Scheduling for Integrated CPUs-GPU Platforms
Editorial: Special issue on real-time and embedded technology and applications
Buffer capacity computation for throughput-constrained modal task graphs
Adaptive Computation Reuse for Energy-Efficient Training of Deep Neural Networks
Checking Bounded Reachability of Compositional Linear Hybrid Automata Using Interaction Relations
Frequency-Aware ESL Power Estimation for ARM Cortex-A9 Using a Black Box Processor Model
Real-Time Power Management for Embedded M2M Using Intelligent Learning Methods
REDEFINE: Runtime reconfigurable polymorphic ASIC
Editorial: Languages, compilers, and tools for embedded systems
HW-FlowQ: A Multi-Abstraction Level HW-CNN Co-design Quantization Methodology
Early SoCs Information Flow Policies Validation Using SystemC-Based Virtual Prototypes at the ESL
SNR: Squeezing Numerical Range Defuses Bit Error Vulnerability Surface in Deep Neural Networks
Image-Content-Aware I/O Optimization for Mobile Virtualization
Utility-Based Resource Overbooking for Cyber-Physical Systems
Data Pattern Aware Reliability Enhancement Scheme for 3D Solid-State Drives
An Operational Quality Model of Embedded Software Aligned with ISO 25000
Multi-buffer manager: Energy-efficient buffer manager for databases on flash memory
LanCeX: A Versatile and Lightweight Defense Method against Condensed Adversarial Attacks in Image and Audio Recognition
Virtual Platform-Based Design Space Exploration of Power-Efficient Distributed Embedded Applications
A complete self-testing and self-configuring NoC infrastructure for cost-effective MPSoCs
Instantaneous current modeling in a complex VLIW processor core
Mining Hyperproperties using Temporal Logics
Implementing QC-MDPC McEliece Encryption
Hardware Acceleration for an Accurate Stereo Vision System Using Mini-Census Adaptive Support Region
Towards an Integrated Vehicle Management System in DriveOS
Customized FPGA Implementation of Authenticated Lightweight Cipher Fountain for IoT Systems
Modeling and Analysis of ETC Control System with Colored Petri Net and Dynamic Slicing
Security-Aware Scheduling of Embedded Control Tasks
REPAIR: Control Flow Protection based on Register Pairing Updates for SW-Implemented HW Fault Tolerance
From the prototype to the final embedded system using the Ocarina AADL tool suite
Code compression for performance enhancement of variable-length embedded processors
Sensor Node Localization with Uncontrolled Events
FSIMR: File-system-aware Data Management for Interlaced Magnetic Recording
Introduction to the Special Section on SCOPES'09
A Framework for Calculating WCET Based on Execution Decision Diagrams
eMamba: Efficient Acceleration Framework for Mamba Models in Edge Computing
PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems
BASS: Safe Deep Tissue Optical Sensing for Wearable Embedded Systems
Exploring Energy Scalability in Coprocessor-Dominated Architectures for Dark Silicon
EnviroSuite: An environmentally immersive programming framework for sensor networks
Modeling and optimizing run-time reconfiguration using evolutionary computation
Eager Synching: A Selective Logging Strategy for Fast fsync() on Flash-Based Android Devices
MOOS: A Multi-Objective Design Space Exploration and Optimization Framework for NoC Enabled Manycore Systems
How to Enable Index Scheme for Reducing the Writing Cost of DNA Storage on Insertion and Deletion
SWARAM: Portable Energy and Cost Efficient Embedded System for Genomic Processing
P 2 SDS : A Polynomial-Time Pattern-Guided Stable Dynamic Scheduling for Weakly Hard Control Task Systems
FORT-GCN: A Fault-Tolerant and Adaptive Accelerator Design for Efficient Graph Convolutional Network Inference
Embedded RAIDs-on-chip for bus-based chip-multiprocessors
The security of the Fiat-Shamir scheme in the presence of transient hardware faults
The Molen compiler for reconfigurable processors
Achieving Super-Linear Speedup across Multi-FPGA for Real-Time DNN Inference
Adaptive mode control: A static-power-efficient cache design