yusuke1997/dblp-id-title huggingface dataset:
Double-Stage Rate Bumpless Transfer Control for Switched Systems With Severely Unstable Dynamics
Coefficient-Based Classes of Algebraic Conditions to Construct Positive Real Rational Functions
MultPIM: Fast Stateful Multiplication for Processing-in-Memory
A 40-nm CMOS 7-b 32-GS/s SAR ADC With Background Channel Mismatch Calibration
Tunable coupled inductor Q-enhancement for parallel resonant LC tanks
Enabling Lower-Power Charge-Domain Nonvolatile In-Memory Computing With Ferroelectric FETs
Event-Triggered Filter Design Based on Average Measurement Output for Networked Unmanned Surface Vehicles
An Analytical MOS Device Model With Mismatch and Temperature Variation for Subthreshold Circuits
A 92 fps and 2.56 mJ/Frame Computing-In-Memory-Based Human Pose Estimation Accelerator With Resource-Efficient Macro for Mobile Devices
A 120 mV Supply, Triode-Regulated Femto-Watt CMOS Voltage Reference Design
A Wideband Frequency-Independent IQ Calibration Scheme With 3-GHz-UGB Amplifiers
A BJT-Based Amplifier-Less Temperature Sensor With 12-Bit SAR ADC Readout and ±0.6°C (3σ) Inaccuracy From -40°C to 120°C
Lyapunov Redesign-Based Optimal Consensus Control for Multi-Agent Systems With Uncertain Dynamics
A Single-Stage Dual-Output Regulating Rectifier With Sequential Pulse Frequency Modulation Control for Wireless Biomedical Applications
Attitude Adjustment of a Two-Wheel Balance Vehicle Based on an Enhanced Model-Free Adaptive Control Algorithm
Inner Transfer Functions in Incremental ΔΣ ADCs
A Low-Power Logarithmic CMOS Digital-to-Analog Converter for Neural Signal Recording
An Intrinsically Linear 13-Level Capacitive DAC for Delta Sigma Modulators
Design and Testing of Digital Logic Gates Using HCS Macro-Model
Quasi 2N+1 Level Modulation Based on Steps Construction for Long-Cable-Fed CHB Motor Drives
Modeling and Optimization of Low-Power AND Gates Based on Stochastic Thermodynamics
Adaptive Stepping PTA for DC Analysis Based on Reinforcement Learning
JET: Joint Error Information Theoretic Criterion for Multichannel Compressive Sampling Systems
Parallel-Prefix Adder in Spin-Orbit Torque Magnetic RAM for High Bit-Width Non-Volatile Computation
Frequency-Reconfigurable Phase Shifter Based on a 65-nm CMOS Process for 5G Applications
Distributed Finite-Time Consensus Control of Multiagent Systems With Fully Intermittent Communication via Dynamic Event-Triggered Strategy
Frequency Domain Modeling and Performance Analysis of Injection-Locked LC Oscillator
An Improved Single-Phase Asymmetrical Multilevel Inverter Structure With Reduced Number of Switches and Higher Power Quality
Coordination for Lur'e Multiagent Systems: Fully Distributed Event-Driven Approach With Single-Event Monitoring Condition
Recursive Constrained Adaptive Algorithm Under q-Rényi Kernel Function
A Low-Cost 0.00063-mm 2 , 0.44-pJ/b, 2-Gb/s All-Digital Fully Synthesizable CDR for Serial Links Using Single-Phase Input Clock
A 380 fW Leakage Data Retention Flip-Flop for Short Sleep Periods
ESTU: Enabling Spiking Transformers on Ultra-Low-Power FPGAs
A 39-GHz High Image-Rejection Up-Conversion Mixer in 65-nm CMOS for 5G Communication
Necessary and Sufficient Conditions for Extended Strictly Positive Realness of Singular Fractional-Order Systems
A 38.4 nW, 1.2 V, 250-Hz, 2 nd -Order g m - C LPF With Degenerative SCP Transconductors Achieving 800-mV PP Input Range and 82.1- μV rms IRN for ECG Acquisition
Optimal Denial-of-Service Attack Strategy on State Estimation Over Infinite-Time Horizon
Distribution-Based Determination of Sparse Secondary Path for Active Noise Control
A Novel Biophysical Model for the Generation of Sharp Wave Ripples in CA1 Hippocampus
Indefinite Krasovskii and Razumikhin Stability for Nonlinear Positive Time-Varying Systems
MInSC: A VLSI Architecture for Myocardial Infarction Stages Classifier for Wearable Healthcare Applications
Capacitor Mismatch Calibration of a 16-Bit SAR ADC Using Optimized Segmentation and Shuffling Scheme
Resilient Predictive Control for Cyber-Physical Systems Under Denial-of-Service Attacks
Absolute-value circuit using junction field-effect transistors
Maximum Complex Correntropy Criterion Adaptive IIR Filtering Based on Gauss-Newton Approach
Discrete-Time Adaptive Super-Twisting Observer With Predefined Arbitrary Convergence Time
A 65-dB SNDR Continuous-Time Delta-Sigma ADC Integrated by IZO Thin-Film Transistors
A Novel Iterative Technique for Interoperability of Real-Time Simulation and Finite Element Simulation Using Railgun Circuit
AT-GAN: A Backdoor Attack Against Radio Signals Modulation Based on Adaptive Trigger
GNSS Vector Tracking Method Using Graph Optimization
An Inductance-Variation-Insensitive Buck Converter Using a Dynamic Ramp Compensation With Slope Sensing Technique
A Prediction-Based Approach Realizing Finite-Time Convergence of Networked Control Systems
Automated Driving of GaN Chireix Power Amplifier for the Digital Predistortion Linearization
Aliased Frequency Estimation by Using Two Coprime Sub-Nyquist Sampling Rates
Auto-Zeroing Static Phase Offset in DLLs Using a Digitally Programmable Sensing Circuit
A Series-LC-Assisted Oscillator Achieving -140.2 dBc/Hz Phase Noise and 187.5 dBc/Hz FoM at 10 MHz Offset From 10.7 GHz
A 0.4-6-GHz Blocker-Tolerant Receiver in 65-nm CMOS With Bandwidth-Extended Technologies for Future V2X Applications
A 112 Gb/s PAM-4 RX Front-End With Unclocked Decision Feedback Equalizer
Linear-to-Circular Polarization Converter With Wide Angular Stability and Near Unity Ellipticity - Application to Linearly Polarized Antenna Array
A 12-Gb/s Baud-Rate Clock and Data Recovery With 75% Phase-Detection Probability by Precoding and Integration-Hold-Reset Frontend
Stability and Stabilization for Delay Delta Fractional Order Systems: An LMI Approach
A 36 mJ/Inf Convolution Accelerator With Reduced Memory Access and Regrouped Sparse Kernels for Environment Sound Classification on Edge Devices
Optimal Reserve Allocation With Simulation-Driven Frequency Dynamic Constraint: A Distributionally Robust Approach
Multiple Line Outage Detection for Power Systems Based on Binary Matching Pursuit
An RRAM-Based Hierarchical Computing-in-Memory Architecture With Synchronous Parallelism for 3-D Point Cloud Recognition
Fast Reconstruction of Three-Quarter Sampling Measurements Using Recurrent Local Joint Sparse Deconvolution and Extrapolation
Jitter Optimisation in a Generalised All-Digital Phase-Locked Loop Model
Parallel Deep Reinforcement Learning Method for Gait Control of Biped Robot
Single-Channel Radar Signal Separation Based on Instance Segmentation With Mask Optimization
A Floating-Body Transistor-Based Power Amplifier for Sub-6-GHz 5G Applications in SOI CMOS 130-nm Process
A Robust Mixed-Signal Cancellation Approach for Even-Order Intermodulation Distortions in LTE-A/5G-Transceivers
Cryogenic CMOS Active Mixer Employing Transformer-Based Current-Bleeding Technique
Finite-Time Adaptive Event-Triggered Control for Robot Manipulators With Output Constraints
Distributed Adaptive Event-Triggered TVGF for Generic Linear Multi-Agent Systems Under Directed Graph
Minimum-Time Control of Boolean Control Networks: A Fast Graphical Approach
A Transient-Enhanced Autonomous Current Adaptation Buffer Amplifier
Further Studies on State Estimation of Discrete-Time Nonlinear Circuits Based on a Switching-Type Multi-Instant Fuzzy Observer
Effective Realization of Higher Order Circular Polarized OAM Mode Circular Patch Antenna
A 30-36 GHz Passive Hybrid Phase Shifter With a Transformer-Based High-Resolution Reflect-Type Phase Shifting Technique
A High-Speed Dual Feedback Loop Column Buffer for Ultra Large Pixel Array CMOS Image Sensors
Enhanced Cross-Modal Transformer Model for Video Semantic Similarity Measurement
A 2.77-dB NF K-Band Four-Element Dual-Beam Phased-Array Receiver With 39-dB Tx-Band Rejection for SATCOM Applications
Comparison of Coupled Inductor With Three Windings and Two Windings
Multi-Gigabit Transceivers for Optical Data Communications From the Standardization Perspective
Consensus of Multiagent Systems With Intermittent Communication via Extended State Observer
A 0.99-pJ/b 10-Gb/s Receiver With Fast Recovery From Sleep Mode Under Voltage Drift
A Heterogeneous Microprocessor for Intermittent AI Inference Using Nonvolatile-SRAM-Based Compute-In-Memory
Real-Time Target Tracking System With Spiking Neural Networks Implemented on Neuromorphic Chips
Continuous Higher-Order Sliding Mode Control for a Class of n-th Order Perturbed Systems
Generalized Edge Propagation and Multi-Band Frequency Switching Mechanism for MSSROs
A Sub-Sampling-Chopper PLL With Residual-Free Charge-Sharing Canceling Achieving 39-fs rms Jitter and -258.2-dB FoM J
Low Power Program Scheme With Capacitance-Less Charge Recycling for 3D NAND Flash Memory
A Fully Differential Distributed RC Oscillator With a Suppression of Noise and Temperature Sensitivities
VETAM-M: A General Model for Voltage-Controlled Memcapacitive-Coupled Memristors
A 12-V Input 0.3 V-to-0.6 V Output Imbalanced Inductor-Currents Converter That Achieves a Peak Efficiency of 90.7%
Bipartite Synchronization of Signed Lur'e Network via Quantized Control
A Linear Wideband CMOS Balun-LNA With Balanced Loads
A Novel Low Power High Speed Gbps UWB Transmitter Design Using Fractional DTC and High Spectrum Efficiency Intra-Chip PPM
Area and Energy Efficient Joint 2T SOT-MRAM-Based on Diffusion Region Sharing With Adjacent Cells
An Energy Efficient, Mismatch Tolerant Offset Compensating Hybrid MTJ/CMOS Magnetic Full Adder
Neuroadaptive Regulation for Uncertain Systems With Quantized States and Sensor Faults
Texture-Semantic Collaboration Network for ORSI Salient Object Detection
3.6-pJ/Spike, 30-Hz Silicon Neuron Circuit in 0.5-V, 65-nm CMOS for Spiking Neural Networks
Safety-Based Dynamic Output Feedback Tracking Control of Time-Varying Input-Output Linearizable Systems With Output Constraints
Neuroadptive Practical Prescribed Time Tracking Control of Fully Quantized Uncertain Strict Feedback Systems
An Efficient Resonant DC-Link Zero-Voltage Switching Inverter With a Single Auxiliary Switch
A Lightweight Pipeline Edge Detection Model Based on Heterogeneous Knowledge Distillation
Interpolated Individual Weighting Subband Volterra Filter for Nonlinear Active Noise Control
A Hybrid Filter With Extremely Wide Bandwidth and High Selectivity Using FBAR Network
Design of Frequency Scanning Coupled-Resonator Two-Element Array Antenna
A Switch-as-Resistor Self-Adaptive Gate-Biasing Technique for Optimized Forward and Reverse Conduction in a CMOS Rectifier
Transmission Line Loop Resonators Short-Circuited in Middle
Fixed-Time Anti-Synchronization of Unified Chaotic Systems via Adaptive Backstepping Approach
An Efficient Resonant Pole Inverter With One Single Auxiliary Switch of Each Phase for AC Motor Drive
A 4-400 K CMOS Voltage and Current Reference With Single-Transistor Noise-Suppression Loop
A Co-Linearly Polarized Shared Radiator-Based Full-Duplex Antenna With High Tx-Rx Isolation Using vias and Stub Resonator
Design of Time-Encoded Spiking Neural Networks in 7-nm CMOS Technology
Asynchronous Reduced-Order Filtering for Markov Jump Systems and its Application in PWM Circuits
Lightweight ECC Coprocessor With Resistance Against Power Analysis Attacks Over NIST Prime Fields
New Results on Stability Analysis and Estimator Design for Switched Positive Linear Systems: A Reverse-Timer-Dependent Linear Co-Positive Lyapunov Function Approach
A Compact Ultra-Wideband Multimode Bandpass Filter With Sharp-Rejection Using Stepped Impedance Open Stub and Series Transformers
A 9.5nW, 0.55V Supply, CMOS Current Reference for Low Power Biomedical Applications
An Isolated Frequency Compensation Technique for Ultra-Low-Power Low-Noise Two-Stage OTAs
Dora: A Low-Latency Partial Reconfiguration Controller for Reconfigurable System
A low-power variable length decoder for MPEG-2 based on successive decoding of short codewords
Bandlimited DPD Adapted APD for 5G Communication
Background Calibration for Bit Weights in Pipelined ADCs Using Adaptive Dither Windows
A Compact, Low-Power, Low-NF, Millimeter-Wave Cascode LNA With Magnetic Coupling Feedback in 22-nm FD-SOI CMOS for 5G Applications
Distributed Optimization of Disturbed Nonlinear Multi-Agent Systems via Adaptive Fault-Tolerant Output Regulation
Asymptotic Boundedness of Conformable Fractional Delay Differential Systems
Design of Energy-Efficient RFET-Based Exact and Approximate 4:2 Compressors and Multipliers
An Optimized FPGA-Based Real-Time NDT for 3D-LiDAR Localization in Smart Vehicles
An Energy Efficient Multi-Retention STT-MRAM Memory Architecture for IoT Applications
A 6.9-μm 2 3.26-ns 31.25-fj Robust Level Shifter With Wide Voltage and Frequency Ranges
A Capacitively Coupled Chopper Instrumentation Amplifier With Compensated Auto-Zeroed DC Servo-Loop for Neural Signal Recording
A 0.15mm² Energy-Efficient Single-Ended Capacitance-to-Digital Converter
An 88.96 dB HDR CMOS Image Sensor Modeled on Visual Neuronal Response
A 0.1-V V IN Subthreshold 3-Stage Dual-Branch Charge Pump With 43.4% Peak Power Conversion Efficiency Using Advanced Dynamic Gate-Bias
On the Skewness of the LMS Adaptive Weights
Sliding Mode Control for Strict-Feedback Nonlinear Impulsive Systems With Matched Disturbances
High-Throughput Pseudo-Random Number Generators Over Discrete Chaos
Contrastive Learning-Based Dual Autoencoder for Anomaly Detection in Loader Gearboxes
Efficient High-Radix GF(p) Montgomery Modular Multiplication Via Deep Use Of Multipliers
Adaptive Safety Control for Constrained Uncertain Robotic Systems: A Neural Network-Based High-Order Control Barrier Function Approach
An Ultra-Low-Power Time-Domain Level-Crossing ADC With Adaptive Sampling Rate
Reference Microphone Free Active Headrest System for Noise Containing Varying Frequency Tonal Components
Modeling and Emulation of Extended Memristors: Two-Port Approach Revisited
Piecewise-Linear Simplification for Adaptive Synaptic Neuron Model
Stability Analysis of Haptic Systems With Time-Varying Delay via a Delay-Product-Type Lyapunov-Krasovskii Functional
A PVT-Tolerant Oscillation-Collapse-Based True Random Number Generator With an Odd Number of Inverter Stages
A Novel Scheme for Real-Time Max/Min-Set-Selection Sorters on FPGA
Consensus of Multi-Agent Systems With Asymmetric Input Saturation Over Directed Graph
A Bypassable Scan Flip-Flop for Low Power Testing With Data Retention Capability
Adaptive Event-Triggered Output Feedback Control for Nonlinear Switched Systems Based on Full State Constraints
Improved Fixed-Time Event-Triggered Average Consensus of Multi-Agent Systems Under DoS Attacks
Complex-Valued Minimum Total Error Entropy Adaptive Algorithm With Fiducial Point for Power System Frequency Estimation
q-Rényi Kernel Functioned Kalman Filter for Land Vehicle Navigation
Optimization Technology of the Microwave Diplexer Based on Spatial Mapping Algorithm
Robust Censored Regression M-Estimate Normalized Subband Adaptive Filter: Formulation and Analysis
Closed-Form Oscillatory Condition in Electrical Circuits Containing Two Fractional Order Elements
Leader-Follower Affine Formation Control of Second-Order Nonlinear Uncertain Multi-Agent Systems
A 4-10 GHz Programmable CMOS Vector-Sum Phase Shifter for a Two-Channel Transmitter
Discounted Near-Optimal Control of Affine Systems via a Progressive Cost Evolution Formulation
Design of a Reflectionless Bandpass Filter by Using Self-Packaged Suspended Coplanar Waveguide-Microstrip Hybrid
Injection-Locking Techniques for CMOS Millimeter-Wave and Terahertz Signal Generation
Spoof Surface Plasmon Polariton Filter With Reconfigurable Dual and Non-Linear Notched Characteristics
On-Chip Active Turn-Off Driving Technique to Prevent Channel Current From Disappearing Prematurely in SiC MOSFET's Applications
A 28-nm 8-Bit 16-GS/ DAC With >60 dBc/>40 dBc SFDR Up To 2.3 GHz/5.4 GHz Using 4-Channel NRZ-Output-Overlapped Time-Interleaving
Chaos-Based Space-Time Trellis Codes With Deep Learning Decoding
Sliding Mode Control for Fuzzy Networked Semi-Markov Switching Models Under Cyber Attacks
Optimal Power Allocation of Receiving Antenna for Rectification Efficiency Improvement in Wireless Power Transfer System
Norton-Transformed Wideband High-Order Analog All-Pass Delays
Cooperative Output Regulation Problem for Multiagent System Under Directed Topology Using Dynamic Triggering Strategy
A 600-μm² Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS
Analysis of Stability, Noise, and Design Guidelines for a Cascaded Floating-Inverter Amplifier
A High-Efficiency E-Band Power Amplifier With Optimized Output Matching Network in a 28-nm Bulk CMOS
ZRHDC: A Lightweight HDC Architecture With Zero ROM Overhead
CODEX: Stochastic Encoding Method to Relax Resistive Crossbar Accelerator Design Requirements
Energy Efficient Memristor-Based Subtractors and Comparator for In-Memory Computing in MAGIC
Ultra-Low Leakage Current Sensor With Large Dynamic Range
A 0.0019-mm² LC-Ring Oscillator With an Ultra-Compact Transformer Achieving 175.2 dBc/Hz FoM@1MHz and 202.4 dBc/Hz FoMA
A New Optimal Tracking Controller of Linear Strongly Coupled Systems and Its Applications
A Broadband Variable-Gain Low-Noise Amplifier With Low NF and Dual Phase Compensation
Low-Power, High-Speed, and Area-Efficient Multiplier Based on the PTL Logic Style
Protecting Bluetooth User Privacy Through Obfuscation of Carrier Frequency Offset
LLC Resonant Converter With Reconfigurable Secondary-Side for Output Voltage Regulation
An Ultra-Low Power RSSI Amplifier for EEG Feature Extraction to Detect Seizures
A 1.3 μW Event-Driven ANN Core for Cardiac Arrhythmia Classification in Wearable Sensors
A 35 dBm P SAT and 41% PAE GaAs Power Amplifier With Series Distributed-Balun
A 1T2R1C ReRAM CIM Accelerator With Energy-Efficient Voltage Division and Capacitive Coupling for CNN Acceleration in AI Edge Applications
SI PUF: An SRAM and Inverter-Based PUF With a Bit Error Rate of 0.0053% and 0.073/0.042 pJ/bit
An Ultrawideband Multicomponent Differential Magnetic Probe for Near-Field Scanning
An Efficient Transistor-Model-Assisted Layout Synthesis Approach Using Improved Implicit Space Mapping for High-Performance MMIC PAs
Hardware-Oriented Memory-Limited Online Artifact Subspace Reconstruction (HMO-ASR) Algorithm
Comments on "Dual-Band Branch-Line Couplers With Short/Open-Ended Stubs"
FPGA-Accelerated Sim-to-Real Control Policy Learning for Robotic Arms
An Integrated Driver With Adaptive Dead-Time Control for GaN-Based Synchronous Buck Converter
Low-Power Area-Efficient LDO With Loop-Gain and Bandwidth Enhancement Using Non-Dominant Pole Movement Technique for IoT Applications
Sliding Mode Control for Fuzzy Singularly Perturbed Systems With Improved Protocol
Anti-Windup Synthesis for Linear Systems With Asymmetric Input Saturation: Application to Aircraft Engine Control
A Novel Impedance Matching Network Suitable for Designing High-Efficiency Power Amplifiers
Toward Fast Trajectory Recovery for Servo Motor Systems Under Instantaneous Large Disturbance
A 100-ppm Integrated TDM-Based Single-Phase Wattmeter for Smart Grid
High-Performance Common- and Differential-Mode Reflectionless Balanced Band-Pass Filter Using Coupled Ring Resonator
Overlapped complex-modulated transmultiplexer filters with simplified design and superior stopbands
Approximation- and Chattering-Free Quasi Sliding-Mode Control for Unknown Systems
A Wideband Circularly Polarized All Textile on Body Antenna for Defense Applications
Enhanced MISC-Based Sparse Array With High uDOFs and Low Mutual Coupling
Modeling, Analysis and Implementation of an Improved Interleaved Buck-Boost Converter
Concealing Exposed Circuit Features Through a MaxSAT-Based Logic Locking Method
Dual-Path Hybrid Residual Network for Profiled Side-Channel Analysis
Bit-Aware Fault-Tolerant Hybrid Retraining and Remapping Schemes for RRAM-Based Computing-in-Memory Systems
Amplitude-Regulated Quadrature Sine-VCO Employing an OTA-C Topology
Design of optimal and narrow-band Laguerre filters for sigma-delta demodulators
A Compact 24.5-32.6 GHz CMOS Frequency Doubler Based on Coupled Inductor
Roundoff noise analysis in digital systems for arbitrary sampling rate conversion
Consensus of Input Constrained Multi-Agent Systems by Dynamic Time-Varying Event-Triggered Strategy With a Designable Minimal Inter-Event Time
Robust Proportionate Normalized Least Mean M-Estimate Algorithm for Block-Sparse System Identification
Frequency Synchronization Techniques for DC-DC Converters With Time-Based Control
A New NN-Based Approach to In-Sensor PDM-to-PCM Conversion for Ultra TinyML KWS
A 0.6-to-1.8V CMOS Current Reference With Near-100% Power Utilization
Maximum Correntropy Kalman Filter for Linear Discrete-Time Systems With Intermittent Observations and Non-Gaussian Noise
Efficient Approximate Floating-Point Multiplier With Runtime Reconfigurable Frequency and Precision
An experimental evaluation of error spectrum shaping applied to mixed-signal image convolutions
Dynamic Event-Triggered Pinning Synchronization for Switched Impulsive Complex Networks With Asynchronous Switching
Adaptive Backstepping Fast Terminal Sliding Mode Control With Estimated Inverse Hysteresis Compensation for Piezoelectric Positioning Stages
Distributed Nash Equilibrium Seeking With Stochastic Communication Noise
A Remaining Useful Life Prediction Method in the Early Stage of Stochastic Degradation Process
A 3.4-GS/s 12-Bit Time-Interleaved Pipelined SAR ADC With Non-Foster Ring Amplifier-Based High-Linearity Track-and-Hold Amplifier
A 2.5 GS/s 7-Bit 5-Way Time-Interleaved SAR ADC With On-Chip Background Offset and Timing-Skew Calibration
Modeling of Linear-Nonlinear Behavior in Electrical Contacts With Interaction Interference
Size-Reduced Highly Selective Bandpass Filters Based on Dual-Mode Slow-Wave Patch Resonators
Weight and Multiply-Accumulation Sparsity-Aware Non-Volatile Computing-in-Memory System
2-D Steerable Multi-Beam Antenna for Concurrent Wireless Communication Systems
Low-Power Resource-Efficient FPGA Implementation of Modified FitzHugh-Nagumo Neuron for Spiking Neural Networks
X-Band 6-Bit SiGe BiCMOS Multifunctional Chip With +12 dBm IP1dB and Flat-Gain Response
A 200 MHz 14 W Pulsed Optical Illuminator With Laser Driver ASIC and On-Chip DLL-Based Time Interpolator for Indirect Time-of-Flight Applications
Observer-Based-Semi-Global Bipartite Average Tracking of Saturated Discrete-Time Multi-Agent Systems via Dynamic Event-Triggered Control
Optimal Output-Feedback Controller Design Using Adaptive Dynamic Programming: A Permanent Magnet Synchronous Motor Application
A Depletion-Mode GaN-Based Envelope Tracking Supply Modulator Utilizing a Novel Coupled PWM Generator
Observer-Based Control Design for Nonlinear Systems With Unknown Delays
High-Precision MUX-Based Digital Delay Interpolators Based on a Novel Transistor Sizing Algorithm
A 79.2-μW 19.5-kHz-BW 94.8-dB-SNDR Fully Dynamic DT ΔΣ ADC Using CLS-Assisted FIA With Sampling Noise Cancellation
HEAT: Efficient Vision Transformer Accelerator With Hybrid-Precision Quantization
A Highly Integrated 3-Phase 4: 1 Resonant Switched-Capacitor Converter With Parasitic Loss Reduction and Fast Pre-Charge Startup
Half-Select Disturb-Free 10T Tunnel FET SRAM Cell With Improved Noise Margin and Low Power Consumption
Cluster Synchronization of Boolean Networks Under State-Flipped Control With Reinforcement Learning
Single-Ended Back-Bias Voltage Generator Using One Pumping Capacitor
Performance Residual Based Fault Detection for Feedback Control Systems
Partial-LUT Designs for Low-Complexity Realization of DA-Based BLMS Adaptive Filter
A 0.5-V Voltage Reference Using Simple Common-Source Amplifier With Improved Gain
Compact and Wideband Flat Negative Group Delay Circuit Investigation
A 3.9GHz/63.6% FBW Multi-Mode Filtering Power Divider Using Self-Packaged SISL
Digital Hardware Implementations of Spiking Neural Networks With Selective Input Sparsity for Edge Inferences in Controlled Image Acquisition Environments
Simplified Memristive Lorenz Oscillator
Voltage Regulation of DC-DC Buck Converters Feeding CPLs via Deep Reinforcement Learning
An Energy-Efficient Low-Noise Neural Recording Circuit With Multi-Sampling SAR ADC
Adaptive Filtering of 4-D Light Field Images for Depth-Based Image Enhancement