yusuke1997/dblp-id-title huggingface dataset:
DLLPM: Dual-layer location privacy matching in V2V energy trading
Algorithm-based fault tolerance for discrete wavelet transform implemented on GPUs
The implementation of a functional machine on a transputer network
Automatic protocol generation based on x.409 specifications
A Prolog-based design environment for the high-level synthesis of application-specific architectures
Increasing resource utilization in mixed-criticality systems using a polymorphic VLIW processor
BFL-SA: Blockchain-based federated learning via enhanced secure aggregation
Multidimensional fast Hartley transform onto SIMD hypercubes
Real-time functional programming systems
One more set: Mitigating conflict-based cache side-channel attacks by extending cache set
Hardware-aware liquid state machine generation for 2D/3D Network-on-Chip platforms
KIDLAN: A hardware description language
A floating point multiplier performing IEEE rounding and addition in parallel
VelogCPS: A safe blockchain network for cyber-physical systems leveraging block verifiers
Measuring and analyzing real-time kernel performance
Hardware programming using C++
Integration of Data Distribution Service and distributed partitioned systems
A survey of encoding techniques for reducing data-movement energy
LUFT-CAN: A lightweight unsupervised learning based intrusion detection system with frequency-time analysis for vehicular CAN bus
Voice announcement for vehicle operators
Implementing synchronous reactive components upon multiprocessor platforms
Modelling adaptive routing in circuit switched networks
Efficient FPGA implementation of DWT and modified SPIHT for lossless image compression
A neuro-emulator with embedded capabilities for generalized learning
Adaptive power management scheme using many-core for maximizing network topology lifetime based on ubiquitous computing
DataScalar: A memory-centric approach to computing
FastCache: A write-optimized edge storage system via concurrent merging cache for IoT applications
Hardware implementation of a parallel noise clearing algorithm
A mapping heuristic for minimizing network contention
Queue-based primitives for a multithreaded architecture
Dual actuator logging disk architecture and modeling
Dynamic resource allocation for jointing vehicle-edge deep neural network inference
An incremental basic block instruction scheduler
A parallel Bees Algorithm implementation on GPU
Coupling algorithms for replicated objects and processes
Chairmen's introduction
Fault-tolerant techniques for VLSI tree structures
A request distribution method for clustered VOD servers considering buffer sharing effects
Stochastic multi-objective Pareto-optimization framework for fully automated ab initio network-on-chip design
FedEntropy: Information-entropy-aided training optimization of semi-supervised federated learning
Efficient task spawning for shared memory and message passing in many-core architectures
Fast hardware for modular exponentiation with efficient exponent pre-processing
Enabling memory access isolation in real-time cloud systems using Intel's detection/regulation capabilities
Mapping and parallel simulation of synchronous neural networks on multiprocessors
An active scheduling policy for automotive cyber-physical systems
System performance evaluation by combining RTC and VHDL simulation: A case study on NICs
Schedulability analysis for 3-phase tasks with partitioned fixed-priority scheduling
DAC: A dynamic active and collaborative cache management scheme for solid state disks
Implementation of a csp-based extension of Pascal
Bandwidth constrained smoothing for multimedia streaming with scheduling support
Models of asynchronous packet-switched multiple and partial multiple bus systems
FLUSH + PREFETCH: A countermeasure against access-driven cache-based side-channel attacks
Lightweight formalisation of adaptive middleware
MEMPHIS: A mobile agent-based system for enabling acquisition of multilingual content and providing flexible format internet premium services
A novel caching mechanism for peer-to-peer based media-on-demand streaming
Efficient data structures for Time Warp simulation queues
Directory-based cache coherence scheme using number-balanced binary tree
Maintaining constraints of UML models in distributed collaborative environments
Impact of the memory interface structure in the memory-processor integrated architecture for computer vision
Multiple boundary scan-paths for minimizing circuit-board test-application time
Job-shifting: An algorithm for online admission of non-preemptive aperiodic tasks in safety critical systems
Start time configuration for strictly periodic real-time task systems
Supercomputer accelerator card for PC
Implementation of blocking coordinated atomic actions based on forward error recovery
Designing high performance instruction caches in VLSI
Multi-objective exploitation of pipeline parallelism using clustering, replication and duplication in embedded multi-core systems
Keynote address K3: Responsive systems (the challenge for the nineties)
Designated-tester Identity-Based Authenticated Encryption with Keyword Search with applications in cloud systems
Hardware and software co-verification from security perspective in SoC platforms
A software training environment for electronic engineers using unix, modula-2 and a local area network
Optimized CPU-GPU collaborative acceleration of zero-knowledge proof for confidential transactions
Authentication in cloud-driven IoT-based big data environment: Survey and outlook
Fast networking based on the STREAMS mechanism with fast module scheduling
Embedding of rings in 2-D meshes and tori with faulty nodes
Message scheduling for real-time interprocessor communication
On the development of a communication-aware task mapping technique
A microprogram-based hardware implementation of the Leaky Bucket algorithm
FPGA approximate logic synthesis through catalog-based AIG-rewriting technique
TVNet II: A cable TV based metropolitan area network using the KEDS protocol
Integer and control units for a GaAs 32-bit RISC processor
Formal modeling and verification of UML Activity Diagrams (UAD) with FoCaLiZe
The computer audio research laboratory at the center for music experiment and related research
Mode switch timing analysis for component-based multi-mode systems
Fast-convergent federated learning with class-weighted aggregation
Design of an extended transputer processor farm system
Cholesky factorization on SIMD multi-core architectures
The effects of audiovisual landmarks on spatial learning and recalling for image browsing interface in virtual environments
On integrating database modeling constructs for software engineering databases
A heuristic approach to analyzing VLSI modules
Schedulability analysis for non-preemptive fixed-priority multiprocessor scheduling
Bounds modelling and compiler optimizations for superscalar performance tuning
FPGA acceleration using high-level languages of a Monte-Carlo method for pricing complex options
Reducing SSD access latency via NAND flash program and erase suspension
A neural network-based replacement strategy for high performance computer architectures
Special architecture for high-performance scan conversion
Silicon compilation and rapid prototyping of microprogrammed VLSI-Circuits with MIMOLA and SOLO 1400
Read-down conflict-preserving serializability as a correctness criterion for multilevel-secure optimistic concurrency control: CSR/RD
A proposal for managing ASI fabrics
CaRINA Intelligent Robotic Car: Architectural design and applications
Adversarial attacks and defenses in Speaker Recognition Systems: A survey
Secure olympics games with technology: Intelligent border surveillance for the 2022 Beijing winter olympics
Detecting components for parallel execution within the Mathematician's Devil
Bit-permute multistage interconnection networks
Small area network interconnection
Improving the probabilistic clock synchronization algorithm
A distributed communication service
Distance-aware L2 cache organizations for scalable multiprocessor systems
Advances in adaptive simulation of interconnected systems with delays
An animated simulation environment for microprocessors
Highly parallel distributed computing systems with optical interconnections
Experiences accumulated working towards medical decision support systems
VLSI integrated circuit design representation in an object-oriented CAD environment
A new approach for critical area estimation in VLSI
Performance modeling of multiprocessor systems for different data loading schemes
A fast, cache-aware algorithm for the calculation of radiological paths exploiting subword parallelism
Commercial hypervisor-based task sandboxing mechanisms are unsecured? But we can fix it!
A versatile timing unit for traffic shaping, policing and charging in packet-switched networks
Exploiting an abstract-machine-based framework in the design of a Java ILP processor
Design of a VLIW architecture constructed from standard RISC chips: A case study of hardware/software codesign
Replication algorithms for the World-Wide Web
Join optimization in distributed databases on broadcast network
Dynamically reconfigurable multi-transputer systems
Task scheduling programming system for the Delft parallel processor
IEmu: Interrupt modeling from the logic hidden in the firmware
Exploitable levels of ILP in future processors
Some topological and combinatorial properties of WK-recursive mesh and WK-pyramid interconnection networks
Multi-mesh of trees with its parallel algorithms
A neural network framework for optimizing parallel computing in cloud servers
A concept of a fully distributed processing strategy oriented for unix local area networks
An Efficient Privacy-preserving Authentication Model based on blockchain for VANETs
Dynamic hinting: Collaborative real-time resource management for reactive embedded systems
Opart: A hardware-description language for test generation
Highest performance computing machines
Fed-MPS: Federated learning with local differential privacy using model parameter selection for resource-constrained CPS
Automatic task mapping and heterogeneity-aware fault tolerance: The benefits for runtime optimization and application development
SecVKQ: Secure and verifiable kNN queries in sensor-cloud systems
Relationships between real-time and fault tolerance: A case study of a redundant loop data acquisition network
Supporting multiple-input, multiple-output custom functions in configurable processors
Bidirectional liveness analysis, or how less than half of the Alpha's registers are used
Keynote address K1: Small and medium sized industries (SMI)
DISCDA - A digital system controller design assistant
Towards correctness proof for hybrid Simulink block diagrams
Methodology for the 90's
Session B3: Hardware building block
Inference replication at edges via combinatorial multi-armed bandit
Parallel processing: Function-directed and neural architectures
An optimized design of CAN FD for automotive cyber-physical systems
Monintainer: An orchestration-independent extensible container-based monitoring solution for large clusters
3D sparse signal recovery via 3D orthogonal matching pursuit
On reducing load/store latencies of cache accesses
An XML data allocation method on disks
Generalized parallel divide and conquer on 3D mesh and torus
A survey on vision-based driver distraction analysis
VHDL synthesis description portability: The need for Level synthesis subsets
Fault trees for clusters tolerating failure or disconnectedness of a single node
Concept for aelf-calibrating floatingpoint-converter for audio-applications
Certificateless authenticated key agreement for blockchain-based WBANs
Special Issue on Smart Applications and Data Analysis for Smart Cyber-Physical Systems
DynaNet: A dynamic BFT consensus framework
Resilient monitoring in self-adaptive systems through behavioral parameter estimation
Certificates handling and their support within X.500 system
InSTechAH: Cost-effectively autoscaling smart computing hadoop cluster in private cloud
Switcherland: A scalable interconnection structure for distributed systems
Lightweight certificateless privacy-preserving integrity verification with conditional anonymity for cloud-assisted medical cyber-physical systems
Heterogeneous system level co-simulation for the design of telecommunication systems
Fast multisensor infrared image super-resolution scheme with multiple regression models
An integrated autonomous control mechanism to optimize sharing of multiple resources in Simultaneous Multi-Threading processors
Energy reduction through crosstalk avoidance coding in networks on chip
Delay-based I/O request scheduling in SSDs
Failure of instruction prefetching of 8088/286/ 386 microprocessors in XT/AT systems
Partitioning of digital designs: a knowledge based approach and concepts for its parallelization
Resolving priority inversions in composable conveyor systems
Improving R&D processes by an ISO 9001-based Quality Management System
Multiprocessor performances for dynamic programming
QEGCN: An FPGA-based accelerator for quantized GCNs with edge-level parallelism
A clause indexing unit for prolog
High performance real-time scheduling of multiple mixed-criticality functions in heterogeneous distributed embedded systems
TADP: Enabling temporal and distantial priority scheduling for on-demand charging architecture in wireless rechargeable sensor Networks
Language prototyping with attribute grammars and macros
MEM: A new execution model for Prolog
Formalising high-performance systems methodologies
Modern methods and tools in digital system design
Using a micro to automate data acquisition in music publishing
Neural accelerator for parallelization of back-propagation algorithm
A GPU-accelerated real-time human voice separation framework for mobile phones
FPGA acceleration of semantic tree reasoning algorithms
Keynote address K2: The strategic importance of microcomputing for the business environment
Fast and energy-frugal deterministic test through efficient compression and compaction techniques
Socket-based RR scheduling scheme for tightly coupled clusters providing single-name images
Reducing the fault vulnerability of hard real-time systems
A low cost solution for HDTV data reduction
Scheduling bag-of-tasks applications on hybrid clouds under due date constraints
MLino bench: A comprehensive benchmarking tool for evaluating ML models on edge devices
The BH-mixed scheduling algorithm for DAG tasks with constrained deadlines
Distributed task allocation in Mobile Device Cloud exploiting federated learning and subjective logic
Automated datapath synthesis: a compilation approach
A design of microcomputer speech output device
Using connectivity and spectral methods to characterize the structure of sequential logic circuits
How to build vehicular ad-hoc networks on smartphones
Conflict handling in high level Petri Nets
Support of automatic parallelization with concept comprehension
Eliminating duplicate writes of logging via no-logging flash translation layer in SSDs
Formal methods integration for the specification of dependable distributed systems
New techniques in mapping applications on transputer networks
Petri net semantics of smalltalk-80
Accelerating object-oriented applications using method lookup caches and register windowing
High-level management of allocation in a parallel objects environment
A multi-processor shared memory architecture for parallel cyclic reference counting
A parallel neural network implementation in a distributed fault diagnosis system
LASER: Latency-Aware Segment Relocation for non-volatile memory
Blockchain-enabled data sharing for IoT: A lightweight, secure and searchable scheme
Corrigendum to Intrusion detection based on improved density peak clustering for imbalanced data on sensor-cloud systems Journal of Systems Architecture volume 118 (2021) 102212
Energy consumption analysis for two embedded Java virtual machines
Energy-efficient neural networks with near-threshold processors and hardware accelerators
On the design of a highly testable cell library
WOPE: A write-optimized and parallel-efficient B+-tree for persistent memory
Communicating active components: An environment for concurrent applications on parallel machines
HEVC hardware vs software decoding: An objective energy consumption analysis and comparison
Preface for the Special Issue of GreenCOM 2011
Hierarchical neural networks based prediction and control of dynamic reconfiguration for multilevel embedded systems
Sequential and parallel strategies for the demand-driven simulation of logic circuits
Special issue on Model Based Engineering for Embedded Systems Design
Temperature and deadline aware runtime resource management with workload prediction for heterogeneous multi-core platforms
A processor array module for distributed, massively parallel, embedded computing
FPGAs and cellular algorithms: Two implementation examples
Designing digital systems with a function language
Using grid files for a relational database management system
Extensible packaged architecture
RDIMM: Revocable and dynamic identity-based multi-copy data auditing for multi-cloud storage
A comprehensive test framework for cryptographic accelerators in the cloud
Drop-and-reroute: A new flow control policy for adaptive wormhole routing
Space-efficient and high-performance inline deduplication for emerging hybrid storage system with Libra＋
An efficient signed digit montgomery multiplication for RSA
Hierarchical physical design system for VLSI-/370 microprocessor
Floating point arithmetic on a RISC
Acceleration of software algorithms using hardware/software co-design techniques
Response time analysis of parallel tasks on accelerator-based heterogeneous platforms
Understanding security failures of anonymous authentication schemes for cloud environments
A comparison of temporal Petri net techniques in the specification and design of hard real-time systems
Database cache requirements calculation using near-line data access traces in a 500+ user transaction system
TLS: a system for building and controlling transputer networks
Session C1: CMOS implementation of the IBM ESA/390
Implementation of the robot inverse dynamics computation algorithm on a transputer network
Exploiting the microarchitectural leakage of prefetching activities for side-channel attacks
A table oriented database-prolog system
A user-visible solid-state storage system with software-defined fusion methods for PCM and NAND flash
HyperReal: A modular control architecture for HRT systems
Exploiting domain knowledge in system-level MPSoC design space exploration
Solution in software crisis
Configuration-aware approaches for enhancing energy efficiency in FPGA-based deep learning accelerators
High complexity resonator structures for formant synthesis of musical instruments
Implementation and design of PVD: An interactive protocol specification and validation environment
Performance analysis of a cache-based multiprocessor system using data movement policies
Performance Evaluation Method for interprocessor interrupts by message passing
Online/offline attribute-based searchable encryption revised: Flexibility, security and efficiency
Extensibility-aware Fog Computing Platform configuration for mixed-criticality applications
P2TA: Privacy-preserving task allocation for edge computing enhanced mobile crowdsensing
A function oriented architecture for process control systems minimising internal data transfer costs
Novel hybrid probabilistic-statistical error metrics for approximate adders
Automated negotiation for ensuring composite service requirements in cloud computing
Design of the Hermix distributed operating system: Structural aspects
SmartDeCoup: Decoupling the STT-RAM LLC for even write distribution and lifetime improvement
A metaprogrammed C++ framework for hardware/software component integration and communication
Advanced technologies and theories for highly-reliable cyber physical system
Efficient path-based multicast in wormhole-routed mesh networks
Automotive Architecture Framework: The experience of Volvo Cars
Enriching MATLAB with aspect-oriented features for developing embedded systems
Global emergency-based job-level scheduling for weakly-hard real-time systems
A time-predictable open-source TTEthernet end-system
Efficient design space exploration for application specific systems-on-a-chip
Reservation based protocol for resolving priority inversions in composable conveyor systems
A multi-channel architecture for high-performance NAND flash-based storage system
An expert system shell for standardization of VLSI process data base and knowledge base
Grammar controlled specification and design of program systems
Single-lens low-disparity stereo using microlenses
FlexiFrag: A design pattern for flexible file sharing in distributed collaborative applications
Multiple context multithreaded superscalar processor architecture
Optimized reversible binary-coded decimal adders
Probability machines
Communication strategies in international banking
Interactive software development for complex embedded systems
Three dimensional image synthesis in transputers
Embedded Systems Software Architecture
Optimizing deep neural networks on intelligent edge accelerators via flexible-rate filter pruning
A new start: Introducing the journal-track proceedings of the 24th Ada-Europe conference on reliable software technologies
Object-oriented modelling in digital circuit CAD systems
Fault and timing analysis in critical multi-core systems: A survey with an avionics perspective
Random early detection with flow number estimation and queue length feedback control
Automated implementations of Lotos specification
TVA: A timing verifier with analytic temporal modelling
Scheduling non-preemptive tasks with strict periods in multi-core real-time systems
Integrating XP project management in development environments
Software engineering: System aspects
DTB+: An enhanced data management strategy for efficient RMW reduction in IMR drives
Deadlock prevention in a communications shell using empty slots
Invariant pattern classification neural network versus FT approach
TQSIM: A fast cycle-approximate processor simulator based on QEMU
Efficient message routing in P r Sigma -network
Priority assignment in hierarchically scheduled time-partitioned distributed real-time systems with multipath flows
Sign detection in residue arithmetic units
An automatized method to parameterize embedded stereo matching algorithms
On the design of a dynamic reconfigurable network switch
NSL: A language for neural network simulation
Software-defined vehicular network (SDVN): A survey on architecture and routing
MPH - A Hybrid Parallel Machine
Object-oriented decomposition for distributed systems
Enhancing multiple-path speculative execution with predicate window shifting
A traceable and revocable multi-authority access control scheme with privacy preserving for mHealth
Formal modelling of telematic services using LOTOS
Benchmarking vision kernels and neural network inference accelerators on embedded platforms
Achieving safety and performance with reconfiguration protocol for ethernet TSN in automotive systems
Design and analysis of a parallel file system for distributed shared memory systems
Testability analysis in a VLSI high-level synthesis system
An approach to testability analysis and improvement for VLSI systems
TSSA: Task structure-aware scheduling of energy-constrained parallel applications on heterogeneous distributed embedded platforms
Efficient privacy-preserving Gaussian process via secure multi-party computation
Development of a real-time database management system for production process-control applications
Language-based communication protocols for distributed systems
Fault-Tolerant Application Mapping on Mesh-of-Tree based Network-on-Chip
A hybrid approach to adaptive load sharing and its performance
Dynamic zone redistribution for key-value stores on zoned namespaces SSDs
Fault and test-process modelling for integrated circuits
DRL-GAT-SA: Deep reinforcement learning for autonomous driving planning based on graph attention networks and simplex architecture
Enforcing determinism in a CSMA/CD local area network
Scalable mpNoC for massively parallel systems - Design and implementation on FPGA
Static worst-case lifetime estimation of wireless sensor networks: A case study on VigilNet