yusuke1997/dblp-id-title huggingface dataset:
Improving the Performance of the Picnic Signature Scheme
Deep Learning to Evaluate Secure RSA Implementations
FENL: an ISE to mitigate analogue micro-architectural leakage
ModuloNET: Neural Networks Meet Modular Arithmetic for Efficient Hardware Masking
Modeling Soft Analytical Side-Channel Attacks from a Coding Theory Viewpoint
New Quantum Cryptanalysis of Binary Elliptic Curves
Re-Consolidating First-Order Masking Schemes Nullifying Fresh Randomness
Side-Channel Attacks on Post-Quantum Signature Schemes based on Multivariate Quadratic Equations - Rainbow and UOV -
Time Sharing - A Novel Approach to Low-Latency Masking
MiRitH: Efficient Post-Quantum Signatures from MinRank in the Head
Don't Forget Pairing-Friendly Curves with Odd Prime Embedding Degrees
Pay Attention to Raw Traces: A Deep Learning Architecture for End-to-End Profiling Attacks
SoK: FHE-Friendly Symmetric Ciphers and Transciphering
CFNTT: Scalable Radix-2/4 NTT Multiplication Architecture with an Efficient Conflict-free Memory Mapping Scheme
Strength in Numbers: Improving Generalization with Ensembles in Machine Learning-based Profiled Side-channel Analysis
High-order masking of NTRU
Laser-Based Command Injection Attacks on Voice-Controlled Microphone Arrays
Sieving with Streaming Memory Access
Non-Profiled Deep Learning-based Side-Channel attacks with Sensitivity Analysis
Low-Latency Design and Implementation of the Squaring in Class Groups for Verifiable Delay Function Using Redundant Representation
The design of scalar AES Instruction Set Extensions for RISC-V
Let's Take it Offline: Boosting Brute-Force Attacks on iPhone's User Authentication through SCA
Exploiting Intermediate Value Leakage in Dilithium: A Template-Based Approach
Analysis and Comparison of Table-based Arithmetic to Boolean Masking
Doppelganger Obfuscation - Exploring theDefensive and Offensive Aspects of Hardware Camouflaging
Breaking Masked Implementations of the Clyde-Cipher by Means of Side-Channel Analysis A Report on the CHES Challenge Side-Channel Contest 2020
A High-performance NTT/MSM Accelerator for Zero-knowledge Proof Using Load-balanced Fully-pipelined Montgomery Multiplier
M&M: Masks and Macs against Physical Attacks
EM Analysis in the IoT Context: Lessons Learned from an Attack on Thread
Side-Channel Analysis of the Xilinx Zynq UltraScale+ Encryption Engine
Fault Injection as an Oscilloscope: Fault Correlation Analysis
Data Flow Oriented Hardware Design of RNS-based Polynomial Multiplication for SHE Acceleration
Unrolled Cryptography on Silicon A Physical Security Analysis
Silicon Echoes: Non-Invasive Trojan and Tamper Detection using Frequency-Selective Impedance Analysis
Multiplicative Masking for AES in Hardware
The Hidden Parallelepiped Is Back Again: Power Analysis Attacks on Falcon
Gadget-based Masking of Streamlined NTRU Prime Decapsulation in Hardware
Medha: Microcoded Hardware Accelerator for computing on Encrypted Data
Enabling FrodoKEM on Embedded Devices
Efficient and Private Computations with Code-Based Masking
Side Channel Attack On Stream Ciphers: A Three-Step Approach To State/Key Recovery
Exploring Feature Selection Scenarios for Deep Learning-based Side-channel Analysis
Quasi-linear masking against SCA and FIA, with cost amortization
Inconsistency of Simulation and Practice in Delay-based Strong PUFs
Masking-Friendly Post-Quantum Signatures in the Threshold-Computation-in-the-Head Framework
Fully Automated Differential Fault Analysis on Software Implementations of Block Ciphers
Cache-Timing Attacks on RSA Key Generation
Efficient Private Circuits with Precomputation
Enabling PERK and other MPC-in-the-Head Signatures on Resource-Constrained Devices
A Faster Third-Order Masking of Lookup Tables
Fast and simple constant-time hashing to the BLS12-381 elliptic curve
Generation of Fast Finite Field Arithmetic forCortex-M4 with ECDH and SQIsign Applications
Quantum Period Finding against Symmetric Primitives in Practice
ABE Squared: Accurately Benchmarking Efficiency of Attribute-Based Encryption
Breaking CAS-Lock and Its Variants by Exploiting Structural Traces
Information Theoretic Analysis of PUF-Based Tamper Protection
Accelerating NTT with RISC-V Vector Extension for Fully Homomorphic Encryption
DL-LA: Deep Learning Leakage Assessment A modern roadmap for SCA evaluations
Low-Latency Hardware Masking with Application to AES
SEV-Step A Single-Stepping Framework for AMD-SEV
Efficient Persistent Fault Analysis with Small Number of Chosen Plaintexts
Dlog is Practically as Hard (or Easy) as DH - Solving Dlogs via DH Oracles on EC Standards
FEDS: Comprehensive Fault Attack Exploitability Detection for Software Implementations of Block Ciphers
High Order Masking of Look-up Tables with Common Shares
dCTIDH: Fast & Deterministic CTIDH
Lightweight Authenticated Encryption Mode of Operation for Tweakable Block Ciphers
A Tale of Snakes and Horses: Amplifying Correlation Power Analysis on Quadratic Maps
3-Share Threshold Implementation of AES S-box without Fresh Randomness
A Finer-Grain Analysis of the Leakage (Non) Resilience of OCB
Revisiting Keccak and Dilithium Implementations on ARMv7-M
Loop Aborts Strike Back: Defeating Fault Countermeasures in Lattice Signatures with ILP
Electromagnetic Information Extortion from Electronic Devices Using Interceptor and Its Countermeasure
Batching CSIDH Group Actions using AVX-512
Compact Dilithium Implementations on Cortex-M3 and Cortex-M4
Key Extraction Using Thermal Laser Stimulation A Case Study on Xilinx Ultrascale FPGAs
Multiplying Polynomials without Powerful Multiplication Instructions
Highly Vectorized SIKE for AVX-512
A Highly-efficient Lattice-based Post-Quantum Cryptography Processor for IoT Applications
Improved Attacks on (EC)DSA with Nonce Leakage by Lattice Sieving with Predicate
High-assurance zeroization
Mixing Additive and Multiplicative Masking for Probing Secure Polynomial Evaluation Methods
Towards a Formal Treatment of Logic Locking
Generic Low-Latency Masking in Hardware
Information Bounds and Convergence Rates for Side-Channel Security Evaluators
Efficient Regression-Based Linear Discriminant Analysis for Side-Channel Security Evaluations Towards Analytical Attacks against 32-bit Implementations
Scoop: An Optimization Algorithm for Profiling Attacks against Higher-Order Masking
Multi-moduli NTTs for Saber on Cortex-M3 and Cortex-M4
On Protecting SPHINCS+ Against Fault Attacks
Complete and Improved FPGA Implementation of Classic McEliece
Quantile: Quantifying Information Leakage
Cryptanalysis of Efficient Masked Ciphers: Applications to Low Latency
Accelerating EdDSA Signature Verification with Faster Scalar Size Halving
Second-Order Masked Lookup Table Compression Scheme
A Side-Channel Attack on a Masked IND-CCA Secure Saber KEM Implementation
Strengthening Sequential Side-Channel Attacks Through Change Detection
Attacking GlobalPlatform SCP02-compliant Smart Cards Using a Padding Oracle Attack
All-You-Can-Compute: Packed Secret Sharing for Combined Resilience
Reducing a Masked Implementation's Effective Security Order with Setup Manipulations And an Explanation Based on Externally-Amplified Couplings
Trace Copilot: Automatically Locating Cryptographic Operations in Side-Channel Traces by Firmware Binary Instrumenting
Post-Quantum Authenticated Encryption against Chosen-Ciphertext Side-Channel Attacks
Revealing the Weakness of Addition Chain Based Masked SBox Implementations
TeeJam: Sub-Cache-Line Leakages Strike Back
Randomness Optimization for Gadget Compositions in Higher-Order Masking
The Long and Winding Path to Secure Implementation of GlobalPlatform SCP10
Garbled Circuits from an SCA Perspective Free XOR can be Quite Expensive. .
Know Time to Die - Integrity Checking for Zero Trust Chiplet-based Systems Using Between-Die Delay PUFs
Breaking Masked Implementations with Many Shares on 32-bit Software Platforms or When the Security Order Does Not Matter
VIMA: A Privacy-Preserving Integrity Measurement Architecture for Containerized Environments
Dismantling DST80-based Immobiliser Systems
Prover - Toward More Efficient Formal Verification of Masking in Probing Model
ABE Cubed: Advanced Benchmarking Extensions for ABE Squared
Conditional Variational AutoEncoder based on Stochastic Attacks
Standard Lattice-Based Key Encapsulation on Embedded Devices
POTA: A Pipelined Oblivious Transfer Acceleration Architecture for Secure Multi-Party Computation
Quantum Circuit Reconstruction from Power Side-Channel Attacks on Quantum Computer Controllers
New Insights to Key Derivation for Tamper-Evident Physical Unclonable Functions
KyberSlash: Exploiting secret-dependent division timings in Kyber implementations
Closing the Gap: Leakage Contracts for Processors with Transitions and Glitches
High-Performance Design Patterns and File Formats for Side-Channel Analysis
Tailorable codes for lattice-based KEMs with applications to compact ML-KEM instantiations
Breaking Ground: A New Area Record for Low-Latency First-Order Masked SHA-3 Advancing from the 4x Area Era to the 3x Area Era
Return of the Hidden Number Problem. A Widespread and Novel Key Extraction Attack on ECDSA and DSA
FaultDetective Explainable to a Fault, from the Design Layout to the Software
Practical Opcode-based Fault Attack on AES-NI
Verified NTT Multiplications for NISTPQC KEM Lattice Finalists: Kyber, SABER, and NTRU
Investigating Profiled Side-Channel Attacks Against the DES Key Schedule
New Circuit Minimization Techniques for Smaller and Faster AES SBoxes
SDitH in Hardware
An energy and area efficient, all digital entropy source compatible with modern standards based on jitter pipelining
Masked Accelerators and Instruction Set Extensions for Post-Quantum Cryptography
Gleeok: A Family of Low-Latency PRFs and its Applications to Authenticated Encryption
Let's DOIT: Using Intel's Extended HW/SW Contract for Secure Compilation of Crypto Code
Pushing The Area Limit of Composable Gadgets Low-Area Hardware Masked Circuits with Fewer Sources of Randomness
A Constant-time AVX2 Implementation of a Variant of ROLLO
Concrete quantum cryptanalysis of binary elliptic curves
Threshold Implementations in Software: Micro-architectural Leakages in Algorithms
Methodology for Efficient CNN Architectures in Profiling Attacks
High-order Polynomial Comparison and Masking Lattice-based Encryption
UpWB: An Uncoupled Architecture Design for White-box Cryptography Using Vectorized Montgomery Multiplication
On the Security Goals of White-Box Cryptography
Timing Black-Box Attacks: Crafting Adversarial Examples through Timing Leaks against DNNs on Embedded Devices
Shaping the Glitch: Optimizing Voltage Fault Injection Attacks
Spin Me Right Round Rotational Symmetry for FPGA-Specific AES
Classic McEliece on the ARM Cortex-M4
New First-Order Secure AES Performance Records
ES-TRNG: A High-throughput, Low-area True Random Number Generator based on Edge Sampling
How Secure is Exponent-blinded RSA-CRT with Sliding Window Exponentiation?
AETHER: An Ultra-High Throughput and Low Energy Authenticated Encryption Scheme
Constant-Cycle Hardware Private Circuits
EstraNet: An Efficient Shift-Invariant Transformer Network for Side-Channel Analysis
Fixslicing AES-like Ciphers New bitsliced AES speed records on ARM-Cortex M and RISC-V
Constant time lattice reduction in dimension 4 with application to SQIsign
Splitting the Interpose PUF: A Novel Modeling Attack Strategy
pracy: A Practical Compiler for Attribute-Based Encryption in Python
Fault Attacks on ECC Signature Verification
Efficient Homomorphic Integer Computer from CKKS
Prime-Field Masking in Hardware and its Soundness against Low-Noise SCA Attacks
A Low-Latency High-Order Arithmetic to Boolean Masking Conversion
Fast FPGA Implementations of Diffie-Hellman on the Kummer Surface of a Genus-2 Curve
eLIMInate: a Leakage-focused ISE for Masked Implementation
JustSTART: How to Find an RSA Authentication Bypass on Xilinx UltraScale(+) with Fuzzing
MCRank: Monte Carlo Key Rank Estimation for Side-Channel Security Evaluations
ECTester: Reverse-engineering side-channel countermeasures of ECC implementations
Optimized Hardware-Software Co-Design for Kyber and Dilithium on RISC-V SoC FPGA
Skyscraper: Fast Hashing on Big Primes
A Power to Pulse Width Modulation Sensor for Remote Power Analysis Attacks
DAPA: Differential Analysis aided Power Attack on (Non-) Linear Feedback Shift Registers
Rainbow on Cortex-M4
Protection of Oscillator-Based PUFs against Side Channel Analyses by Random Interruption
SimdMSM: SIMD-accelerated Multi-Scalar Multiplication Framework for zkSNARKs
The SPEEDY Family of Block Ciphers Engineering an Ultra Low-Latency Cipher from Gate Level for Secure Processor Architectures
A Comprehensive Study of Deep Learning for Side-Channel Analysis
Secure Data Retrieval on the Cloud: Homomorphic Encryption meets Coresets
Load-Balanced Parallel Implementation on GPUs for Multi-Scalar Multiplication Algorithm
A Framework for Generating S-Box Circuits with Boyar-Peralta Algorithm-Based Heuristics, and Its Applications to AES, SNOW3G, and Saturnin
Implementing RLWE-based Schemes Using an RSA Co-Processor
HIPR: Hardware IP Protection through Low-Overhead Fine-Grain Redaction
The Wiretap Channel for Capacitive PUF-Based Security Enclosures
LifeLine for FPGA Protection: Obfuscated Cryptography for Real-World Security
Fault Attacks Made Easy: Differential Fault Analysis Automation on Assembly Code
A Fast Heuristic for Mapping Boolean Circuits to Functional Bootstrapping
Structural Attack (and Repair) of Diffused-Input-Blocked-Output White-Box Cryptography
Prime Masking vs. Faults - Exponential Security Amplification against Selected Classes of Attacks
A Fast and Accurate Guessing Entropy Estimation Algorithm for Full-key Recovery
Hardware Masking, Revisited
Reinforcement Learning for Hyperparameter Tuning in Deep Learning-based Side-channel Analysis
ConvKyber: Unleashing the Power of AI Accelerators for Faster Kyber with Novel Iteration-based Approaches
Optimizing BIKE for the Intel Haswell and ARM Cortex-M4
Automatic Search of Meet-in-the-Middle Differential Fault Analysis on AES-like Ciphers
Efficient and Composable Masked AES S-Box Designs Using Optimized Inverters
On the (Im)possibility of Preventing Differential Computation Analysis with Internal Encodings
LPN-based Attacks in the White-box Setting
Efficient Side-Channel Protections of ARX Ciphers
Ranking Loss: Maximizing the Success Rate in Deep Learning Side-Channel Analysis
Correction Fault Attacks on Randomized CRYSTALS-Dilithium
Over 100x Faster Bootstrapping in Fully Homomorphic Encryption through Memory-centric Optimization with GPUs
Improving MPCitH with Preprocessing: Mask Is All You Need
Differential Fault Attacks on Deterministic Lattice Signatures
VITI: A Tiny Self-Calibrating Sensor for Power-Variation Measurement in FPGAs
Efficient ASIC Architecture for Low Latency Classic McEliece Decoding
Improved High-Order Masked Generation of Masking Vector and Rejection Sampling in Dilithium
mid-pSquare: Leveraging the Strong Side-Channel Security of Prime-Field Masking in Software
Rejection Sampling Schemes for Extracting Uniform Distribution from Biased PUFs
Transitional Leakage in Theory and Practice Unveiling Security Flaws in Masked Circuits
All You Need Is Fault: Zero-Value Attacks on AES and a New λ-Detection M&M
REED: Chiplet-based Accelerator for Fully Homomorphic Encryption
FalconSign: An Efficient and High-Throughput Hardware Architecture for Falcon Signature Generation
SIPFA: Statistical Ineffective Persistent Faults Analysis on Feistel Ciphers
Single-Trace Attacks on Keccak
Retrofitting Leakage Resilient Authenticated Encryption to Microcontrollers
HRaccoon: A High-performance Configurable SCA Resilient Raccoon Hardware Accelerator
From A to Z: Projective coordinates leakage in the wild
Revisiting a Methodology for Efficient CNN Architectures in Profiling Attacks
Attacking and Defending Masked Polynomial Comparison for Lattice-Based Cryptography
A TRAP for SAT: On the Imperviousness of a Transistor-Level Programmable Fabric to Satisfiability-Based Attacks
An Algebraic Approach for Evaluating Random Probing Security With Application to AES
Secure, Accurate, and Practical Narrow-Band Ranging System
Fault-Resistant Partitioning of Secure CPUs for System Co-Verification against Faults
Practical Multiple Persistent Faults Analysis
Improved Heuristics for Short Linear Programs
Remove Some Noise: On Pre-processing of Side-channel Measurements with Autoencoders
Enhancing Quality and Security of the PLL-TRNG
Time-Memory Analysis of Parallel Collision Search Algorithms
Thunderbird: Efficient Homomorphic Evaluation of Symmetric Ciphers in 3GPP by combining two modes of TFHE
Provably Secure Hardware Masking in the Transition- and Glitch-Robust Probing Model: Better Safe than Sorry
Racing BIKE: Improved Polynomial Multiplication and Inversion in Hardware
Redundancy AES Masking Basis for Attack Mitigation (RAMBAM)
Best Information is Most Successful Mutual Information and Success Rate in Side-Channel Analysis
"Whispering MLaaS" Exploiting Timing Channels to Compromise User Privacy in Deep Neural Networks
Exploiting Small-Norm Polynomial Multiplication with Physical Attacks Application to CRYSTALS-Dilithium
Cryptanalysis of ARX-based White-box Implementations
Semi-Automatic Locating of Cryptographic Operations in Side-Channel Traces
High-order Table-based Conversion Algorithms and Masking Lattice-based Encryption
SYNFI: Pre-Silicon Fault Analysis of an Open-Source Secure Element
Side-Channel Protections for Picnic Signatures
A Key-Recovery Side-Channel Attack on Classic McEliece Implementations
RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks
Masking in Fine-Grained Leakage Models: Construction, Implementation and Verification
Yoroi: Updatable Whitebox Cryptography
Trojan Insertion versus Layout Defenses for Modern ICs: Red-versus-Blue Teaming in a Competitive Community Effort
The Area-Latency Symbiosis: Towards Improved Serial Encryption Circuits
On the spectral features of robust probing security
When Bad News Become Good News Towards Usable Instances of Learning with Physical Errors
A Deep Analysis of two Glitch-Free Hardware Masking Schemes SESYM and LMDPL
SoK: SCA-secure ECC in software - mission impossible?
Exploring Crypto-Physical Dark Matter and Learning with Physical Rounding Towards Secure and Efficient Fresh Re-Keying
cuZK: Accelerating Zero-Knowledge Proof with A Faster Parallel Multi-Scalar Multiplication Algorithm on GPUs
Cross-Device Profiled Side-Channel Attack with Unsupervised Domain Adaptation
On the Difficulty of FSM-based Hardware Obfuscation
Fiddling the Twiddle Constants - Fault Injection Analysis of the Number Theoretic Transform
Fixslicing: A New GIFT Representation Fast Constant-Time Implementations of GIFT and GIFT-COFB on ARM Cortex-M
PROLEAD_SW Probing-Based Software Leakage Detection for ARM Binaries
RAFA: Redundancies-assisted Algebraic Fault Analysis and its implementation on SPN block ciphers
Quantum security analysis of Module-LWE PQC based on practical cost estimates
Cortex-M4 optimizations for {R, M} LWE schemes
Bypassing Isolated Execution on RISC-V using Side-Channel-Assisted Fault-Injection and Its Countermeasure
Single-Trace Side-Channel Attacks on the Toom-Cook: The Case Study of Saber
Risky Translations: Securing TLBs against Timing Side Channels
Automated Generation of Masked Hardware
VeloFHE: GPU Acceleration for FHEW and TFHE Bootstrapping
OT-PCA: New Key-Recovery Plaintext-Checking Oracle Based Side-Channel Attacks on HQC with Offline Templates
Pincering SKINNY by Exploiting Slow Diffusion Enhancing Differential Power Analysis with Cluster Graph Inference
NTTRU: Truly Fast NTRU Using NTT
Speeding Up Multi-Scalar Multiplication over Fixed Points Towards Efficient zkSNARKs
Fast Transciphering Via Batched And Reconfigurable LUT Evaluation
FANNG-MPC: Framework for Artificial Neural Networks and Generic MPC
Curse of Re-encryption: A Generic Power/EM Analysis on Post-Quantum KEMs
JitSCA: Jitter-based Side-Channel Analysis in Picoscale Resolution
Exploring the Effect of Device Aging on Static Power Analysis Attacks
Improved Gadgets for the High-Order Masking of Dilithium
MulLeak: Exploiting Multiply Instruction Leakage to Attack the Stack-optimized Kyber Implementation on Cortex-M4
Full Key-Recovery Cubic-Time Template Attack on Classic McEliece Decapsulation
Saber on ARM CCA-secure module lattice-based key encapsulation on ARM
Design and Implementation of a Physically Secure Open-Source FPGA and Toolchain
High-Performance FV Somewhat Homomorphic Encryption on GPUs: An Implementation using CUDA
StaTI: Protecting against Fault Attacks Using Stable Threshold Implementations
Polynomial sharings on two secrets: Buy one, get one free
SHAPER: A General Architecture for Privacy-Preserving Primitives in Secure Machine Learning
Beetle Family of Lightweight and Secure Authenticated Encryption Ciphers
SAT-based Formal Verification of Fault Injection Countermeasures for Cryptographic Circuits
Elastic MSM: A Fast, Elastic and Modular Preprocessing Technique for Multi-Scalar Multiplication Algorithm on GPUs
SIFA: Exploiting Ineffective Fault Inductions on Symmetric Cryptography
Leading Degree: A Metric for Model Performance Evaluation and Hyperparameter Tuning in Deep Learning-Based Side-Channel Analysis
Higher-Order DCA Attacks on White-Box Implementations with Masking and Shuffling Countermeasures
Compress: Generate Small and Fast Masked Pipelined Circuits
AES-LBBB: AES Mode for Lightweight and BBB-Secure Authenticated Encryption
A Code-Based ISE to Protect Boolean Masking in Software
Belief Propagation Meets Lattice Reduction: Security Estimates for Error-Tolerant Key Recovery from Decryption Errors
Improved Leakage-Resistant Authenticated Encryption based on Hardware AES Coprocessors
BAT: Small and Fast KEM over NTRU Lattices
Polynomial multiplication on embedded vector architectures
A Novel Evaluation Metric for Deep Learning-Based Side Channel Analysis and Its Extended Application to Imbalanced Data
Higher-Order Time Sharing Masking
All You Need is XOR-Convolution: A Generalized Higher-Order Side-Channel Attack with Application to XEX/XE-based Encryptions
Stealthy Opaque Predicates in Hardware - Obfuscating Constant Expressions at Negligible Overhead
When one vulnerable primitive turns viral: Novel single-trace attacks on ECDSA and RSA
SPA-GPT: General Pulse Tailor for Simple Power Analysis Based on Reinforcement Learning
Riding the Waves Towards Generic Single-Cycle Masking in Hardware
Rapidly Verifiable XMSS Signatures
ExpFault: An Automated Framework for Exploitable Fault Characterization in Block Ciphers
Low Trace-Count Template Attacks on 32-bit Implementations of ASCON AEAD
Low Randomness Masking and Shuffling: An Evaluation Using Mutual Information
A New Perspective on Key Switching for BGV-like Schemes
A Not So Discrete Sampler: Power Analysis Attacks on HAWK signature scheme
Can't Touch This: Inertial HSMs Thwart Advanced Physical Attacks
GPU Acceleration for FHEW/TFHE Bootstrapping
Fast AVX-512 Implementation of the Optimal Ate Pairing on BLS12-381
Bitslicing Arithmetic/Boolean Masking Conversions for Fun and Profit with Application to Lattice-Based KEMs
Composable Masking Schemes in the Presence of Physical Defaults & the Robust Probing Model
CacheQuote: Efficiently Recovering Long-term Secrets of SGX EPID via Cache Attacks
Fault Attacks on CCA-secure Lattice KEMs
Carry Your Fault: A Fault Propagation Attack on Side-Channel Protected LWE-based KEM
The Best of Two Worlds: Deep Learning-assisted Template Attack
VERICA - Verification of Combined Attacks Automated formal verification of security against simultaneous information leakage and tampering
On-Device Power Analysis Across Hardware Security Domains. Stop Hitting Yourself
pyecsca: Reverse engineering black-box elliptic curve cryptography via side-channel analysis
The Curse of Class Imbalance and Conflicting Metrics with Machine Learning for Side-channel Evaluations
PROLEAD A Probing-Based Hardware Leakage Detection Tool
PhaseSCA: Exploiting Phase-Modulated Emanations in Side Channels
Defeating State-of-the-Art White-Box Countermeasures with Advanced Gray-Box Attacks
SEAL-Embedded: A Homomorphic Encryption Library for the Internet of Things
Fast and Clean: Auditable high-performance assembly via constraint solving