yusuke1997/dblp-id-title huggingface dataset:
LC-Based Bandpass Continuous-Time Sigma-Delta Modulators With Widely Tunable Notch Frequency
HReA: An Energy-Efficient Embedded Dynamically Reconfigurable Fabric for 13-Dwarfs Processing
A Multiwindow Partial Buffering Scheme for FPGA-Based 2-D Convolvers
A Cost-Effective Adaptive Rectifier for Low Power Loosely Coupled Wireless Power Transfer Systems
Truncated Prediction Output Feedback Control of a Class of Lipschitz Nonlinear Systems With Input Delay
Capacitive Transposed Series-Parallel Topology With Fine Tuning Capabilities
A 12-Bit Nonlinear DAC for Direct Digital Frequency Synthesis
Photovoltaic Antennas for Autonomous Wireless Systems
A 433-MHz SOI CMOS Automatic Impedance Matching Circuit
Low-Power and Widely Tunable Linearized Biquadratic Low-Pass Transconductor-C Filter
FPGA Design for Statistics-Inspired Approximate Sum-of-Squared-Error Computation in Multimedia Applications
Dynamic Read Current Sensing With Amplified Bit-Line Voltage for STT-MRAMs
A 0.2-V Three-Winding Transformer-Based DCO in 16-nm FinFET CMOS
Improved Small-Signal Analysis for Circuits Working in Periodic Steady State
Parasitic modeling and analysis for a 1-Gb/s CMOS laser driver
Design and Experimental Verification of a Power Effective Flash-SAR Subranging ADC
Systematic Design of Large-Scale Multiport Decoupling Networks
Statistics of the Quantization Noise in 1-Bit Dithered Single-Quantizer Digital Delta-Sigma Modulators
48-Mode Reconfigurable Design of SDF FFT Hardware Architecture Using Radix-3 2 and Radix-2 3 Design Approaches
A 4-Gbps POF Receiver Using Linear Equalizer With Multi-Shunt-Shunt Feedbacks in 65-nm CMOS
Common Architecture Design of Novel Recursive MDCT and IMDCT Algorithms for Application to AAC, AAC in DRM, and MP3 Codecs
Integrated Circuit Biosensors Using Living Whole-Cell Bioreporters
A Systolic-Array Architecture for First-Order 3-D IIR Frequency-Planar Filters
Lee's Rule Extended
An Economical Class of Droop-Compensated Generalized Comb Filters: Analysis and Design
D-Band Common-Base Amplifiers With Gain Boosting and Interstage Self-Matching in 0.18-µm SiGe HBT Technology
Effect of Mismatched Loop Delay in Continuous-Time Complex Sigma-Delta Modulators
True-Time-Delay Beamforming Receiver With RF Re-Sampling
Electromechanical ΔΣ modulation with high-Q micromechanical accelerometers and pulse density modulated force feedback
A 0.007-mmy 2 108-ppm°C 1-MHz Relaxation Oscillator for High-Temperature Applications up to 180°C in 0.13-µm CMOS
Modeling and evaluation of positive-feedback source-coupled logic
Direct Digital Frequency Synthesizer Using Nonuniform Piecewise-Linear Approximation
Detecting Unstable Fixed Points Using Kalman Filters With Constraints
A Dual-Operation-Mode Bio-Inspired Pixel
Remarks on Analysis, Design and Amplitude Stability of MOS Colpitts Oscillator
Analysis and Design of Superharmonic Injection-Locked Multipath Ring Oscillators
Analysis of Malware-Induced Cyber Attacks in Cyber-Physical Power Systems
Package-Level Reconfiguration of RF Matching Networks Using SMD Components
Phase Diffusion Coefficient for Oscillators Perturbed by Colored Noise
A Computationally Efficient Delayless Frequency-Domain Adaptive Filter Algorithm
Output capacitor stability study on a voltage-mode buck regulator using system-poles approach
MRC-Based RNS Reverse Converters for the Four-Moduli Sets 2 n +1, 2 n -1, 2 n , 2 2n+1 -1 and 2 n +1, 2 n -1, 2 2n , 2 2n+1 -1
A CMOS Spiking Neuron for Brain-Inspired Neural Networks With Resistive Synapses and In Situ Learning
Synchronization in Multiplex Networks of Chua's Circuits: Theory and Experiments
A Behavior Model of a Dickson Charge Pump Circuit for Designing a Multiple Charge Pump System Distributed in LSIs
A Low-Noise PFM-Controlled Buck Converter for Low-Power Applications
A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Δ Σ Modulator With Multirate Opamp Sharing
An Integrated, Software-Defined FDD Transceiver: Distributed Duplexing Theory and Operation
A 96-GHz Oscillator by High-Q Differential Transmission Line loaded with Complementary Split-Ring Resonator in 65-nm CMOS
Low-Power System Design for MPEG-2/4 AAC Audio Decoder Using Pure ASIC Approach
EMI-Based Current and Voltage Sensing for the Control of Power Electronic Converters
Chopper-Stabilized Bidirectional Current Acquisition Circuits for Electrochemical Amperometric Biosensors
Level-Crossing ADC Performance Evaluation Toward Ultrasound Application
A MOSFET-Based Wide-Dynamic-Range Translinear Element
DTMOS-Based Pulse Transformer Boost Converter With Complementary Charge Pump for Multisource Energy Harvesting
A Sigma-Delta Domain Lowpass Wave Filter
Low-Computation-Cycle, Power-Efficient, and Reconfigurable Design of Recursive DFT for Portable Digital Radio Mondiale Receiver
A Low-Voltage Low-Phase-Noise 25-GHz Two-Tank Transformer-Feedback VCO
Continuous Class-F Power Amplifier Using Quasi-Elliptic Low-Pass Filtering Matching Network
Transpose of a Multiterminal Element and Applications
An Energy-Efficient Offset-Cancelling Sense Amplifier
Decimal Full Adders Specially Designed for Quantum-Dot Cellular Automata
On Analog QAM Demodulation for Millimeter-Wave Communications
Analysis of a Zero-Voltage Switching Converter With Two Transformers
A Low-Power Low-Noise Decade-Bandwidth Switched Transconductor Mixer With AC-Coupled LO Buffers
Stability Analysis of Periodic Orbits of Nonautonomous Piecewise-Linear Systems by Mapping Approach
Integration of Current-Reused VCO and Frequency Tripler for 24-GHz Low-Power Phase-Locked Loop Applications
Analysis and Design of a Multi-Core Oscillator for Ultra-Low Phase Noise
An Output-Capacitor-Free Adaptively Biased Low-Dropout Regulator With Subthreshold Undershoot-Reduction for SoC
A 40-MHz Bandwidth 0-2 MASH VCO-Based Delta-Sigma ADC With 35-fJ/Step FoM
Analysis of Calibrated On-Chip Temperature Sensor With Process Compensation for HV Chips
Approximation of dynamical time-variant systems by continuous-time recurrent neural networks
Low-Complexity Digit-Serial and Scalable SPB/GPB Multipliers Over Large Binary Extension Fields Using (b, 2)-Way Karatsuba Decomposition
Performance Evaluation of Incremental Sigma-Delta ADCs Based on their NTF
An Integrated Solution for Suppressing WLAN Signals in UWB Receivers
Phase Noise of Pulse Injection-Locked Oscillators
Automatic Domain Partitioning of Piecewise-Affine Simplicial Functions Implementing Model Predictive Controllers
A method for automatically finding multiple operating points in nonlinear circuits
A 4.2 nW and 18 ppm/°C Temperature Coefficient Leakage-Based Square Root Compensation (LSRC) CMOS Voltage Reference
A Novel Comparison-Free 1-D Median Filter
Low-Power Programmable Pseudorandom Word Generator and Clock Multiplier Unit for High-Speed SerDes Applications
An Accelerated LIF Neuronal Network Array for a Large-Scale Mixed-Signal Neuromorphic Architecture
Feedforward Interference Cancellation Architecture for Short-Range Wireless Communication
A ranked order filter implementation for parallel analog processing
Power-, Area-, and Compression-Efficient Eight-Point Approximate 2-D Discrete Tchebichef Transform Hardware Design Combining Truncation Pruning and Efficient Transposition Buffers
A Digital Spectrum Shaping Signaling Serial-Data Transceiver With Crosstalk and ISI Reduction Property in Multidrop Interfaces
A Digital PLL With a Stochastic Time-to-Digital Converter
A New Two-Phase Stationary-Frame-Based Enhanced PLL for Three-Phase Grid Synchronization
Study of Amplitude Control and Dynamical Behaviors of a Memristive Band Pass Filter Circuit
Large-Signal Stability Criterion for Parallel-Connected DC-DC Converters With Current Source Equivalence
Unified Structure of Basic UWB Waveforms
Ultra-Low Power CMOS Image Sensor With Two-Step Logical Shift Algorithm-Based Correlated Double Sampling Scheme
Design of a Low Power, Inductorless Wideband Variable-Gain Amplifier for High-Speed Receiver Systems
Efficient and Reliable Small-Signal Estimate of Quantization Noise Contribution to Phase Noise in ΔΣ Fractional- N PLL
Analysis and Design of a Passive Receiver Front-End Using an Inductive Antenna Impedance
High-Resolution Wideband Phase Shifter With Current Limited Vector-Sum
Dispersed Array LDPC Codes and Decoder Architecture for NAND Flash Memory
Theoretic Bounds to Information Transmission Through Electrical Circuits
A 0.6-V Low-Power Variable-Gain LNA in 0.18-µm CMOS Technology
An Integrated Power-Efficient Active Rectifier With Offset-Controlled High Speed Comparators for Inductively Powered Applications
A Method for Noise Reduction in Active-RC Circuits
Output Tracking of Piecewise-Linear Systems via Error Feedback Regulator With Application to Synchronization of Nonlinear Chua's Circuit
Modeling Circuits With Arbitrary Topologies and Active Linear Multiports Using Wave Digital Filters
A Sub-2 dB NF, 0.3-3 GHz Packaged Bandwidth Extended Wideband Receiver Front-End
A Power-Loss-Dependent Inductance Model for Ferrite-Core Power Inductors in Switch-Mode Power Supplies
Hybrid Switched-Inductor Buck PFC Converter for High-Efficiency LED Drivers
Solving matrix diophantine equations by inverting a square nonsingular system of equations
A 2.5-GHz CMOS Full-Duplex Front-End for Asymmetric Data Networks
Synchronization in Directed Complex Networks Using Graph Comparison Tools
A New Piecewise Linear Hyperchaotic Circuit
Analytical Model of a 25-50 m Robust Single-Wire Electric-Field Coupling Power Transfer System Using a Limiter
FIR Variable Digital Filter With Signed Power-of-Two Coefficients
Crosstalk in Integrated Microarrays With Current Sensing
A Random Interrupt Dithering SAR Technique for Secure ADC Against Reference-Charge Side-Channel Attack
New low-voltage class AB/AB CMOS op amp with rail-to-rail input/output swing
Solar Cell Photo-Luminescence Modulation for Optical Frequency Identification Devices
A Second-Order Bandpass $\Delta\Sigma$ Time-to-Digital Converter With Negative Time-Mode Feedback
Injection Pulling Mitigation in CMOS Voltage-Controlled Oscillator Using A Novel Honeycomb-Shaped Planar Inductor
New high-order filter structures using only single-ended-input OTAs and grounded capacitors
Hardware Architecture for List Successive Cancellation Decoding of Polar Codes
Delay-Dependent Exponential Stability for Uncertain Stochastic Hopfield Neural Networks With Time-Varying Delays
On Chopper Effects in Discrete-Time SigmaDelta Modulators
Designs of Fixed-Fractional-Delay Filters Using Fractional-Derivative Constraints
Performance Assessment of Discrete-Time Extended State Observers: Theoretical and Experimental Results
Compressed Level Crossing Sampling for Ultra-Low Power IoT Devices
Design for Testability of CMOS Analog Sum-Product Error-Control Decoders
A Multiport Power Electronic Transformer Based on Modular Multilevel Converter and Mixed-Frequency Modulation
An Ultra-Low Cost Multilayer RAM in Quantum-Dot Cellular Automata
Modified Model for Settling Behavior of Operational Amplifiers in Nanoscale CMOS
Single-Layer Planar Wideband Rat-Race Coupler Using a Shorted Parallel-Coupled Multi-Line Section
A Division-Free Toom-Cook Multiplication-Based Montgomery Modular Multiplication
A New System Architecture for Future Long-Term High-Density Neural Recording
Comments on "Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers"
Adaptive Feedback Synchronization of a General Complex Dynamical Network With Delayed Nodes
A Rapid Power-Switchable Track-and-Hold Amplifier in 90-nm CMOS
A 24 GHz Subharmonic Direct Conversion Receiver in 65 nm CMOS
FIR Filter Realization via Deferred End-Around Carry Modular Addition
Enhancing Transient Stability of DC Microgrid by Enlarging the Region of Attraction Through Nonlinear Polynomial Droop Control
Modeling of glitches due to rise/fall asymmetry in current-steering digital-to-analog converters
Hybridization of CMOS With CNT-Based Nano-Electromechanical Switch for Low Leakage and Robust Circuit Design
Synchronization of Nonlinear Oscillators in an LTI Electrical Power Network
FM/PWM control scheme in class DE inverter
Accurate and Efficient PSD Computation in Mixed-Signal Circuits: A Time-Domain Approach
Analysis of Current Efficiency for CMOS Class-B LC Oscillators
Robust Synchronization via Homogeneous Parameter-Dependent Polynomial Contraction Matrix
Design of Magnetic Non-Volatile TCAM With Priority-Decision in Memory Technology for High Speed, Low Power, and High Reliability
Simplified Logic for Tree-Structure Segmented DEM Encoders
First Steps Toward Concealing the Traces Left by Reversible Image Data Hiding
A Ka Band FMCW Transceiver Front-End With 2-GHz Bandwidth in 65-nm CMOS
Area and Power Efficient Ultra-Wideband Transmitter Based on Active Inductor
On-Chip Automatic LC Tuner for RFID Tags Based on Negative Resistances
Synchronization and Small-Signal Analysis of Nonlinear Periodic Circuits
Simple, Analytical Expressions of an Effect of Local Signal Imperfections on Four-Phase Passive-Mixer-Based Bandpass Filter
Finite Common-Mode Rejection in Fully Differential Nonlinear Circuits
Power-Aware Design of Nanometer MCML Tapered Buffers
A Phase-Interpolator-Based Fractional Counter for All-Digital Fractional-N Phase-Locked Loop
A Self-Adaptive Time-Based MPPT With 96.2% Tracking Efficiency and a Wide Tracking Range of 10 µA to 1 mA for IoT Applications
A Reconfigurable 0.1-10 MHz DT Passive Dynamic Zoom ADC for Cellular Receivers
Accurate Time-Domain Simulation of Continuous-Time Sigma-Delta Modulators
Design and Experimental Evaluation of a Time-Interleaved ADC Calibration Algorithm for Application in High-Speed Communication Systems
A Combined Arithmetic-High-Level Synthesis Solution to Deploy Partial Carry-Save Radix-8 Booth Multipliers in Datapaths
An Adaptive Low-Complexity Abnormality Detection Scheme for Wearable Ultrasonography
A 0.2-1.3 ns Range Delay-Control Scheme for a 25 Gb/s Data-Receiver Using a Replica Delay-Line-Based Delay-Locked-Loop in 45-nm CMOS
Eigenfilter Approach to the Design of One-Dimensional and Multidimensional Two-Channel Linear-Phase FIR Perfect Reconstruction Filter Banks
Single Transistor High-Impedance Tail Current Source With Extended Common-Mode Input Range and Reduced Supply Requirements
Class-J 23 Power Amplifiers
A Multiband Power Amplifier With a Reconfigurable Output-Matching Network for 10-MHz BW LTE Mobile Phone Applications
Pilot Allocation for Sparse Channel Estimation in MIMO-OFDM Systems
An Adaptive Predictor With Cascaded Forward-Backward Structure
Gain at an Arbitrary Cut in a Linear Bilateral Network, and Its Relation to Loop Gain in Feedback Amplifiers
Fault Injection Modeling Attacks on 65 nm Arbiter and RO Sum PUFs via Environmental Changes
The Stochastic I-Pot: A Circuit Block for Programming Bias Currents
A Low-Power Fast-Settling Bond-Wire Frequency Synthesizer With a Dynamic-Bandwidth Scheme
Evolution of Complex Networks via Edge Snapping
Piecewise-Linear Identification of Nonlinear Dynamical Systems in View of Their Circuit Implementations
Analysis and Design of VCO-Based Phase-Domain ΣΔ Modulators
A 64×64 Pixel Vision Sensor for Local Binary Pattern Computation
On the Fixed-Point Implementation of Fractional-Delay Filters Based on the Farrow Structure
Non-Smooth Bifurcation Analysis of Multi-Structure Multi-Operating-Mode Power Electronics Systems for Applications With Renewable Energy Sources
A Sub 1-V Constant G m - C Switched-Capacitor Current Source
An Op-Amp Approach for Bandpass VGAs With Constant Bandwidth
Discrete-Time Recurrent Neural Networks With Complex-Valued Linear Threshold Neurons
A Novel Tunable Transconductance Amplifier Based on Voltage-Controlled Resistance by MOS Transistors
New Universal Biquads Employing CFOAs
Ultralow-Area Hysteretic Control LDO With Sub-1-µA Quiescent Current
An Efficient State-Space Realization With Minimum Roundoff Noise Gain
An 18 nW -47/-40 dBm Sensitivity 3/100 kbps MEMS-Assisted CMOS Wake-Up Receiver
Three-Dimensional Fully Symmetric Inductors, Transformer, and Balun in CMOS Technology
A 60-dB Gain OTA Operating at 0.25-V Power Supply in 130-nm Digital CMOS Process
A 60 Gb/s-Level Coarse-Grained Reconfigurable Cryptographic Processor With Less Than 1-W Power
A Single-Branch Third-Order Pole-Zero Low-Pass Filter With 0.014-mm 2 Die Size and 0.8-kHz (1.25-nW) to 0.94-GHz (3.99-mW) Bandwidth-Power Scalability
A Power-Efficient Reconfigurable Output-Capacitor-Less Low-Drop-Out Regulator for Low-Power Analog Sensing Front-End
Energy-Efficient Convolution Architecture Based on Rescheduled Dataflow
Low-Power Approximate Unsigned Multipliers With Configurable Error Recovery
A Low Power Class-AB Audio Power Amplifier With Dynamic Transconductance Compensation in 55 nm CMOS Process
FFT Architectures for Real-Valued Signals Based on Radix-2 3 and Radix-2 4 Algorithms
Exploiting Process Variation and Noise in Comparators to Calibrate Interstage Gain Nonlinearity in Pipelined ADCs
High-Dimensional Computing as a Nanoscalable Paradigm
Synchronization of Chaotic-Oscillation Permanent Magnet Synchronous Generators Networks via Adaptive Impulsive Control
Chaotic Cryptosystems: Cryptanalysis and Identifiability
Computation of the average and harmonic noise power-spectral density in switched-capacitor circuits
A Neural Network Assistance AMPPT Solar Energy Harvesting System With 89.39% Efficiency and 0.01-0.5% Tracking Errors
A Thin-Film, Large-Area Sensing and Compression System for Image Detection
Statistical Spectra and Distortion Analysis of Time-Interleaved Sampling Bandwidth Mismatch
SRAM Array Structures for Energy Efficiency Enhancement
A Low-Voltage Differentially Tuned Current-Adjusted 5.5-GHz Quadrature VCO in 65-nm CMOS Technology
A High Area-Efficiency 14-bit SAR ADC With Hybrid Capacitor DAC for Array Sensors
Design of Practical Matching Networks With Lumped Elements Via Modeling
On Circuit Theories for Single-Electron Tunneling Devices
Wideband Class-F -1 Power Amplifier With Dual-/Quad-Mode Bandpass Response
An RF Energy Harvester With 44.1% PCE at Input Available Power of -12 dBm
A Virtual-ADC Digital Background Calibration Technique for Multistage A/D Conversion
Testing stability of 2-D discrete systems by a set of real 1-D stability tests
A 10-b 100-kS/s 1-mW General-Purpose ADC for Cellular Telephones
A 10-bit 60-MS/s Low-Power CMOS Pipelined Analog-to-Digital Converter
Pinning Complex Delayed Dynamical Networks by a Single Impulsive Controller
Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulators
Overhead Requirements for Stateful Memristor Logic
A K-Band Complex Permittivity Sensor for Biomedical Applications in 130-nm SiGe BiCMOS
Fast Consensus Via Predictive Pinning Control
Ultra-High-Voltage Charge Pump Circuit in Low-Voltage Bulk CMOS Processes With Polysilicon Diodes
Jitter Analysis and a Benchmarking Figure-of-Merit for Phase-Locked Loops
Global High-Order Sliding Mode Controller Design Subject to Mismatched Terms: Application to Buck Converter
Guest Editorial for January 2004 Special Issue
Dual-Band 3-Way Doherty Power Amplifier With Extended Back-Off Power and Bandwidth
Emerging Clapping Synchronization From a Complex Multiagent Network With Local Information via Local Control
Control of MEMS Vibration Modes With Pulsed Digital Oscillators - Part II: Simulation and Experimental Results
On the Order Minimization of Interpolated Bandpass Method Based Narrow Transition Band FIR Filter Design
A 2.1-Channel Class-D Amplifier Exploited Coupling Virtual-Audio-Image to Enhance Stereo
Fast Sensing-Time and Hardware-Efficient Eigenvalue-Based Blind Spectrum Sensors for Cognitive Radio Network
Limit Set Dichotomy and Convergence of Cooperative Piecewise Linear Neural Networks
A 580 nW Dual-Input Energy Harvester IC Using Multi-Task MPPT and a Current Boost Converter for Heterogeneous Source Combining
A 1.2-MHz 5.8-µW Temperature-Compensated Relaxation Oscillator in 130-nm CMOS
Power-Delay-Area-Noise Margin Tradeoffs in Positive-Feedback MOS Current-Mode Logic
Performance Analysis of the Robust Diffusion Normalized Least Mean p-Power Algorithm
The MOS capacitor amplifier
Robust H ∞ Synchronization of Coupled Partial Differential Systems With Spatial Coupling Delay
A Highly Integrated 400-800 MHz Spectrum Sensing System Based on Envelope Detection
Integration of equation- and signal-based models in transient analysis of electric energy systems
Maximizing the Data Rate of an Inductively Coupled Chip-to-Chip Link by Resetting the Channel State Variables
A 60-m Range 6.16-mW Laser-Power Linear-Mode LiDAR System With Multiplex ADC/TDC in 65-nm CMOS
Design Technique for Mitigation of Soft Errors in Differential Switched-Capacitor Circuits
Decentralized control via disturbance attenuation and eigenstructure assignment
Design of a Wideband Variable-Gain Amplifier With Self-Compensated Transistor for Accurate dB-Linear Characteristic in 65 nm CMOS Technology
An Analytical Algorithm for Pi-Network Impedance Tuners
An Autonomous Distributed Control Method for Link Failure Based on Tie-Set Graph Theory
An Efficient Class-G Stage for Switching RF Power Amplifier Applications
New Link Attack Strategies of Complex Networks Based on k-Core Decomposition
An accelerated decomposition algorithm for robust support vector Machines
Generalized Low-Error Area-Efficient Fixed-Width Multipliers
Efficient model reduction of linear periodically time-varying systems via compressed transient system function
Design of perfect-reconstruction nonuniform recombination filter banks with flexible rational sampling factors
A Fully-Integrated 77-GHz UWB Pseudo-Random Noise Radar Transceiver With a Programmable Sequence Generator in SiGe Technology
Independent common-mode and differential-mode design of fully differential analog filters
Modified SEPIC Converter With High Voltage Gain and ZVS Characteristics
Operational Transconductance Amplifier With Class-B Slew-Rate Boosting for Fast High-Performance Switched-Capacitor Circuits
Universal Current-Mode Control Schemes to Charge Li-Ion Batteries Under DC/PV Source
Rigorous Q-factor formulation for one- and two-port passive linear networks from an oscillator noise spectrum viewpoint
Integrated Wide-Band CMOS Spectrometer Systems for Spaceborne Telescopic Sensing
Consensus of Nonlinear Agents in Directed Network With Switching Topology and Communication Delay
A Self-Test on Wafer Level for a MEM Gyroscope Readout Based on ΔΣ Modulation
Information-Theoretic Approach to A/D Conversion
Intermediate-Variable-Based Estimation for FDI Attacks in Cyber-Physical Systems
Design of Power Efficient Variable Bandwidth Non-Maximally Decimated FRM Filters for Wideband Channelizer
An Invasive-Attack-Resistant PUF Based On Switched-Capacitor Circuit
Asynchronous Data Sampling Within Clock-Gated Double Edge-Triggered Flip-Flops
Auxiliary Parallel Inductor Switching Control for Improving the Load Transient Response Performance of Buck Converters
Modified Gilbert-Cell Mixer With an LO Waveform Shaper and Switched Gate-Biasing for 1/f Noise Reduction in 28-nm CMOS
Analysis and Design of the 0.13- muhboxm CMOS Shunt-Series Series-Shunt Dual-Feedback Amplifier
A Discrete-Time Model for the Design of Type-II PLLs With Passive Sampled Loop Filters
A 250-MHz Pipelined ADC-Based f S /4 Noise-Shaping Bandpass ADC
Event-driven Simulation and modeling of phase noise of an RF oscillator
An Adaptive Cascaded ILA- and DLA-Based Digital Predistorter for Linearizing an RF Power Amplifier
A Real-Time FPGA-Based 20 000-Word Speech Recognizer With Optimized DRAM Access
Low-Power Class-AB CMOS Voltage Feedback Current Operational Amplifier With Tunable Gain and Bandwidth
A 60-GHz 4-Gb/s Fully Integrated NRZ-to-QPSK Fiber-Wireless Modulator
A 17 Gbps 156 fJ/bit Two-Channel Optical Receiver With Optical-Input Split and Delay in 65 nm CMOS
Switched-Capacitor Multiply-By-Two Amplifier Insensitive to Component Mismatches
Highly Reliable Coding Methods for Emerging Applications: Archive and Enterprise Solid-State Drives (SSDs)
Boundary Analysis for the Derivative of Driving Point Impedance Functions
Reconfigurable Digital Delta-Sigma Modulation Transmitter Architecture for Concurrent Multi-Band Transmission
High Precision LC Ladder Synthesis Part II: Immittance Synthesis With Transmission Zeros at DC and Infinity
The Regulator Problem for Linear Systems With Saturations on the Control and its Increments or Rate: An LMI Approach