yusuke1997/dblp-id-title huggingface dataset:
A Small-Area and Energy-Efficient 12-bit SA-ADC With Residue Sampling and Digital Calibration for CMOS Image Sensors
Cloud Computing-Based Non-Invasive Glucose Monitoring for Diabetic Care
An Ultralow Power Time-Domain Temperature Sensor With Time-Domain Delta-Sigma TDC
Transient Charge Feedforward Driver for High-Speed Current-Mode Data Driving in Active-Matrix OLED Displays
Application-Specific Instruction-Set Processor for Retinex-Like Image and Video Processing
An Efficient Reverse Converter for the Three-Moduli Set ( $ 2^{n+1}-1, 2^{n}, 2^{n}-1$ )
A voltage-mode PWM buck regulator with end-point prediction
Aging Compensation With Dynamic Computation Approximation
Low-Complexity Architecture for Cyber-Physical Systems Model Identification
Power-Efficient Fast Write and Hidden Refresh of ReRAM Using an ADC-Based Sense Amplifier
Lyapunov-Type Theorem of General Two-Dimensional Nonlinear Parameter-Varying FM Second Model
Dynamic hysteresis band control of the buck converter with fast transient response
Error Adaptive Classifier Boosting (EACB): Leveraging Data-Driven Training Towards Hardware Resilience for Signal Inference
Efficient Simulation of Weak Nonlinearities in Continuous-Time Oversampling Converters
An Area-Efficient Current-Mode Bandgap Reference With Intrinsic Robust Start-Up Behavior
Analysis of the Effect of Source Capacitance and Inductance on $N$ -Path Mixers and Filters
12.5-Gb/s Full-Rate CDR With Wideband Quadrature Phase Shifting in Data Path
InP DHBT Single-Stage and Multiplicative Distributed Amplifiers for Ultra- Wideband Amplification
Dual-Source-Line-Bias Scheme to Improve the Read Margin and Sensing Accuracy of STTRAM in Sub-90-nm Nodes
Improved Frey Chaotic Digital Encoder for Trellis-Coded Modulation
Bit-Level Extrinsic Information Exchange Method for Double-Binary Turbo Codes
Stability and Stabilization of Markovian Jump Systems With Time Delay Via New Lyapunov Functionals
A 60 mV Input Voltage, Process Tolerant Start-Up System for Thermoelectric Energy Harvesting
Capacitance Super Multiplier for Sub-Hertz Low-Pass Integrated Filters
On Extension of Effective Resistance With Application to Graph Laplacian Definiteness and Power Network Stability
A Second-Order Antialiasing Prefilter for a Software-Defined Radio Receiver
A Low-Latency and Low-Cost Montgomery Modular Multiplier Based on NLP Multiplication
Low-Power Tunable Analog Circuit Blocks Based on Nanoscale Double-Gate MOSFETs
Matching Properties of Femtofarad and Sub-Femtofarad MOM Capacitors
Design of Extrapolated Impulse Response FIR Filters With Residual Compensation in Subexpression Space
Estimation of the Projection Operator in a Multiresolution Multisensor Data Fusion Scheme
An Extremely Linear Multi-Level DAC for Continuous-Time Delta-Sigma Modulators
A Pseudodifferential Class AB DAC for Low-Power Wireless Transmitter
A Hilbert Transform Equalizer Enabling 80 MHz RF Self-Interference Cancellation for Full-Duplex Receivers
An Enhanced Dynamic-Range CMOS Image Sensor Using a Digital Logarithmic Single-Slope ADC
Performance advantages of 3-D digital integrated circuits in a mixed SOI and bulk CMOS design space
Ultra-Low-Voltage Operation of CMOS Analog Circuits: Amplifiers, Oscillators, and Rectifiers
A Low-Complexity Viterbi Decoder for Space-Time Trellis Codes
A Sub-muhboxW Fully Tunable CMOS DPS for Uncooled Infrared Fast Imaging
Two-Rate Based Low-Complexity Variable Fractional-Delay FIR Filter Structures
Indirect Performance Sensing for On-Chip Self-Healing of Analog and RF Circuits
A Sub-1-V Bulk-Driven Opamp With an Effective Transconductance-Stabilizing Technique
A 0.7-mW LC Voltage-Controlled Oscillator Leveraging Switched Biasing Technique for Low Phase Noise
SafeRazor: Metastability-Robust Adaptive Clocking in Resilient Circuits
A Performance-Region-Based Approach to the H ∞ Stochastic Consensus Problem
A 213-nW/Channel Analog Euclidian Vector Normalizer
Evaluation of Harmonic Coupling Weights in Nonlinear Periodicity Preservation Systems
0.13pW/Hz Ring VCO-Based Continuous-Time Read-Out ADC for Bio-Impedance Measurement
Sustained Slow-Scale Oscillation in Higher Order Current-Mode Controlled Converter
A 17.4-b Delta-Sigma Capacitance-to-Digital Converter for One-Terminal Capacitive Sensors
Jamming Suppression in Massive MIMO Systems
Multistage Complex-Impedance Matching Network Analysis and Optimization
Resistive Coupling-Based Waveform Relaxation Algorithm for Analysis of Interconnect Circuits
SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit
Attack Vulnerability of Complex Communication Networks
Symbolic Distortion Analysis of Multistage Amplifiers
Observer-Based Monitoring of the Cardiovascular System
Fault Detection for Linear Discrete Time-Varying Systems Subject to Random Sensor Delay: A Riccati Equation Approach
An Efficient Decoder Architecture for Nonbinary LDPC Codes With Extended Min-Sum Algorithm
Stabilizing Technique for AC-DC Boost PFC Converter Based on Time Delay Feedback
A General Structure of Linear-Phase FIR Filters With Derivative Constraints
A Differential Architecture for an Online Analog Viterbi Decoder
A Low-Power Multifunctional CMOS Sensor Node for an Electronic Facade
A New Chaotic Jerk Circuit
Design of Exactly Linear Phase K -Regular IIR Half-Band Filter
Noise and Group Delay in Active Filters
A 16-bit 65-MS/s Pipeline ADC With 80-dBFS SNR Using Analog Auto-Calibration in SiGe SOI Complementary BiCMOS
A 0.33-1 GHz Open-Loop Duty Cycle Corrector With Digital Falling Edge Modulator
Nonlinear System Identification Using Exact and Approximate Improved Adaptive Exponential Functional Link Networks
Pipeline Architectures for Radix-2 New Mersenne Number Transform
Energy-Efficient Design of Processing Element for Convolutional Neural Network
A 1- to 10-GHz RF and Wideband IF Cross-Coupled Gilbert Mixer in 0.13-µm CMOS
A Feedback Spin-Valve Memristive System
A 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc/Hz FoM
High Precision LC Ladder Synthesis Part I: Lowpass Ladder Synthesis via Parametric Approach
Adaptive Fuzzy Output Feedback Event-Triggered Control for a Class of Switched Nonlinear Systems With Sensor Failures
A Systolic Array 2-D IIR Broadband RF Beamformer
An Analysis of Latch Comparator Offset Due to Load Capacitor Mismatch
Robust Distributed Stabilization of Heterogeneous Agents Over Cooperation-Competition Networks
A Low-Power BFSK Transmitter Architecture for Biomedical Applications
A Stride-Based Convolution Decomposition Method to Stretch CNN Acceleration Algorithms for Efficient and Flexible Hardware Implementation
Low-Complexity, Efficient 9/7 Wavelet Filters VLSI Implementation
A Reconfigurable DLL-Based Digital-to-Time Converter Using Charge Pump Current Interpolation and Digital Predistortion Linearization
An Analog Optimum Torque Control IC for a 200-W Wind Energy Harvesting System
A Family of Adaptive Decorrelation NLMS Algorithms and Its Diffusion Version Over Adaptive Networks
Exponential filtering for uncertain Markovian jump time-delay systems with nonlinear disturbances
A Neuron-MOS-Based VLSI Implementation of Pulse-Coupled Neural Networks for Image Feature Generation
A Sub-200-mV Voltage-Scalable SRAM With Tolerance of Access Failure by Self-Activated Bitline Sensing
A portable digitally controlled oscillator using novel varactors
Novel Feedback Theory of Electric Circuits - Part I: Cut-Based Decomposition
Kernel-Based Resource Allocation for Improving GPU Throughput While Minimizing the Activity Divergence of SMs
A Multi-Objective Approach for Post-Nonlinear Source Separation and Its Application to Ion-Selective Electrodes
A 1.2- V 30.4-dBm OIP3 Reconfigurable Analog Baseband Channel for UMTS/WLAN Transmitters
Accurate Settling-Time Modeling and Design Procedures for Two-Stage Miller-Compensated Amplifiers for Switched-Capacitor Circuits
Scheduled-Step-Size Affine Projection Algorithm
Stability and Stabilization of a Class of Nonlinear Fractional-Order Systems With Caputo Derivative
Accelerating an FHE Integer Multiplier Using Negative Wrapped Convolution and Ping-Pong FFT
Double-Sub-Stream M-ary Differential Chaos Shift Keying Wireless Communication System Using Chaotic Shape-Forming Filter
High-Efficiency Wireless Power Transfer System for Electric Vehicle Applications
Area-Efficient Time-Shared Digital-to-Analog Converter With Dual Sampling for AMOLED Column Driver IC's
Global Fixed-Time Output Feedback Stabilization for a Class of Double Integrator Systems
Observations Concerning the Locking Range in a Complementary Differential LC Injection-Locked Frequency Divider - Part II: Design Methodology
Stability analysis of delayed cellular neural networks described using cloning templates
A variable-capacitance vibration-to-electric energy harvester
Robust Hybrid Control Design for Stochastic Markovian Jump System via Fault Alarm Approach
Probabilistic Analysis of Power-Gating in Network-on-Chip Routers
Considering noise orbital deviations on the evaluation of power density spectrum of oscillators
A High-Efficiency 24 GHz Rectenna Development Towards Millimeter-Wave Energy Harvesting and Wireless Power Transmission
System Analysis of Six-Port-Based RF-Receivers
Dual-Band Half Mode Substrate Integrated Waveguide Filter With Independently Tunable Bands
Correction to "Selective Normalized Subband Adaptive Filter With Subband Extension"
A High-Performance Energy Management System Based on Evolving Graph
Low-power CMOS wireless MEMS motion sensor for physiological activity monitoring
A Sequential Minimization Procedure for Minimax Design of IIR Filters Based on Second-Order Factor Updates
An Efficient Uniform-Segmented Neuron Model for Large-Scale Neuromorphic Circuit Design: Simulation and FPGA Synthesis Results
Electronically Tunable Reflection Type Phase Shifters
A 35-Gb/s 0.65-pJ/b Asymmetric Push-Pull Inverter-Based VCSEL Driver With Series Inductive Peaking in 65-nm CMOS
A new topology for a current-mode wheatstone bridge
A New Elementary Operation Approach to Multidimensional Realization and LFR Uncertainty Modeling: The MIMO Case
Networked Predictive Control Systems Based on the Hammerstein Model
Tuning the Resonant Frequency and Damping of an Electromagnetic Energy Harvester Using Power Electronics
Flexible LDPC Decoder Design for Multigigabit-per-Second Applications
Novel Results on Generalized Dissipativity of Two-Dimensional Digital Filters
Quadrature Mismatch Shaping for Digital-to-Analog Converters
A Spur Elimination Technique for Phase Interpolation-Based Fractional-N PLLs
A Novel 0.5 V MCML D-Flip-Flop Topology Exploiting Forward Body Bias Threshold Lowering
A Two-Cycle Lock-In Time ADPLL Design Based on a Frequency Estimation Algorithm
Architecture of a Single-Chip 50 Gb/s DP-QPSK/BPSK Transceiver With Electronic Dispersion Compensation for Coherent Optical Channels
A Sub-1 ppm/°C Precision Bandgap Reference With Adjusted-Temperature-Curvature Compensation
A Self-Powered and Optimal SSHI Circuit Integrated With an Active Rectifier for Piezoelectric Energy Harvesting
A Fully Integrated Multistage Cross-Coupled Voltage Multiplier With No Reversion Power Loss in a Standard CMOS Process
A 2.5-Gb/s On-Chip Interconnect Transceiver With Crosstalk and ISI Equalizer in 130 nm CMOS
Analytical Equations for Nonlinear Phase Errors and Jitter in Ring Oscillators
On Impedance Matching in a Power-Line-Communication System
Low-Power Small-Area Digital I/O Cell
A Novel Delta Operator Kalman Filter Design and Convergence Analysis
Low-Power Memory-Reduced Traceback MAP Decoding for Double-Binary Convolutional Turbo Decoder
Noise figure optimization of inductively degenerated CMOS LNAs with integrated gate inductors
A Miniaturized Two-Axis Ultra Low Latency and Low-Power Sun Sensor for Attitude Determination of Micro Space Probes
A Compact Dual-Band Out of Phase Power Divider Having Microstrip Compatibility
New Approach to Fixed-Order Output-Feedback Control for Piecewise-Affine Systems
Output Current Ripple-Free PWM Inverters
Multiple Threshold Voltage Design Scheme for CMOS Tapered Buffers
Phase Frequency Detector With Minimal Blind Zone for Fast Frequency Acquisition
Turing Patterns in Memristive Cellular Nonlinear Networks
Quadruple Cross-Coupled Latch-Based 10T and 12T SRAM Bit-Cell Designs for Highly Reliable Terrestrial Applications
Iterative QR Decomposition Architecture Using the Modified Gram-Schmidt Algorithm for MIMO Systems
A Frequency-Domain Analysis of Latch Comparator Offset due to Load Capacitor Mismatch
Design of a Broadband Wilkinson Power Divider With Wide Range Tunable Bandwidths by Adding a Pair of Capacitors
Reconstruction of Two-Periodic Nonuniformly Sampled Band-Limited Signals Using a Discrete-Time Differentiator and a Time-Varying Multiplier
MTJ-LRB: Proposal of MTJ-Based Loop Replica Bitline as MRAM Device-Circuit Interaction for PVT-Robust Sensing
Three Fingerprints of Memristor
Nonlinear Dynamic Modeling and Analysis of Self-Oscillating H-Bridge Parallel Resonant Converter Under Zero Current Switching Control: Unveiling Coexistence of Attractors
ESD Design Strategies for High-Speed Digital and RF Circuits in Deeply Scaled Silicon Technologies
A Multi-Band Low-Noise Transmitter With Digital Carrier Leakage Suppression and Linearity Enhancement
A Memory-Efficient Scalable Architecture for Lifting-Based Discrete Wavelet Transform
A Normalized Output Error-Based Sliding-Mode Controller for the DC-DC Cascade Boost Converter
Nonuniformly Controlled Analog-to-Digital Converter for SDR Multistandard Radio Receiver
Maximum Effectiveness of Electrostatic Energy Harvesters When Coupled to Interface Circuits
A 7.5-mV-Input Boost Converter for Thermal Energy Harvesting With 11-mV Self-Startup
Nyquist-Rate Current-Steering Digital-to-Analog Converters With Random Multiple Data-Weighted Averaging Technique and Q N Rotated Walk Switching Scheme
Bitcell-Based Design of On-Chip Process Variability Monitors for Sub-28 nm Memories
An Automatic Gain Control System for ISFET Array Compensation
A Compact Ramp-Based Soft-Start Circuit for Voltage Regulators
A 10-MHz GaN HEMT DC/DC Boost Converter for Power Amplifier Applications
Representations of Linear Dual-Rate System Via Single SISO LTI Filter, Conventional Sampler and Block Sampler
A Transformer-Based 3-dB Differential Coupler
Analysis of Power System Dynamics Subject to Stochastic Power Injections
A Band-Reject Nested-PLL Clock Cleaner Using a Tunable MEMS Oscillator
Hardware-Efficient Systolization of DA-Based Calculation of Finite Digital Convolution
ARMv8 SIKE: Optimized Supersingular Isogeny Key Encapsulation on ARMv8 Processors
Multiresolution Multiplex Network for Analyzing Multichannel Fluid Flow Signals
Continuous Finite-Time Integral Sliding Mode Control for Attitude Stabilization
Influence of Initial Condition on Wandering Spur Pattern in a MASH-Based Fractional-N Frequency Synthesizer
Characterization of Forced Vibration for Difference Inclusions: A Lyapunov Approach
A Partially Binarized Hybrid Neural Network System for Low-Power and Resource Constrained Human Activity Recognition
Pinning Control of Uncertain Complex Networks to a Homogeneous Orbit
Symbolic Vector Dynamics Approach to Initial Condition and Control Parameters Estimation of Coupled Map Lattices
A 0.83-pJ/Bit 6.4-Gb/s HBM Base Die Receiver Using a 45° Strobe Phase for Energy-Efficient Skew Compensation
A Self-Matching Complementary-Reference Sensing Scheme for High-Speed and Reliable Toggle Spin Torque MRAM
Reconfigurable Inductorless Wideband CMOS LNA for Wireless Communications
An extension of the channel-assignment problem: L(2, 1)-labelings of generalized Petersen graphs
A 73.9%-Efficiency CMOS Rectifier Using a Lower DC Feeding (LDCF) Self-Body-Biasing Technique for Far-Field RF Energy-Harvesting Systems
Micropower Data Converters: A Tutorial
EMI Tuning of Hybrid Systems by Periodic Patterns
Resilient Pipeline Under Supply Noise With Programmable Time Borrowing and Delayed Clock Gating
A Low-Complexity 6DOF Magnetic Tracking System Based on Pre-Computed Data Sets for Wearable Applications
Load Disaggregation Based on Aided Linear Integer Programming
High-performance direct digital frequency synthesizers using piecewise-polynomial approximation
A Gene-Protein-miRNA Electronic Oscillator
A Systematic Design Methodology for Class-AB-Style Ring Amplifiers
A Perturbative Stochastic Galerkin Method for the Uncertainty Quantification of Linear Circuits
Introducing Suspendance Analysis
A Transformer-Based Current-Reuse QVCO With an FoM Up to -200.5 dBc/Hz
High-Efficiency Differential-Chaos-Shift-Keying Scheme for Chaos-Based Noncoherent Communication
Energy-Efficient Clocking Based on Resonant Switching for Low-Power Computation
A Switched Capacitor Multiple Input Single Output Energy Harvester (Solar + Piezo) Achieving 74.6% Efficiency With Simultaneous MPPT
Synthesis of DDRO Timing Monitors by Delay-Tracking and Static Timing Analysis
Comments on "Bandpass Sigma-Delta Modulator Employing SAW Resonator as Loop Filter"
Optimal Design of Frequency-Response Masking Filters With Reduced Group Delays
Effective ADC linearity testing using sinewaves
An analog VLSI low-power envelope periodicity detector
Challenges and Solutions of the TFET Circuit Design
L(j, , k) -Labelings of Kronecker Products of Complete Graphs
A novel multiplexer-based low-power full adder
A 0.034% Charge-Imbalanced Neural Stimulation Front-End (SFE) IC With on-Chip Voltage Compliance Monitoring Circuit and Analysis on Resting Potential by Utilizing the SFE IC
Efficient Decoder Architecture for Single Block-Row Quasi-Cyclic LDPC Codes
Analysis and Design of an Ultralow-Power CMOS Relaxation Oscillator
Authors' Reply [to "Corrections and Comments to 'Model Reduction of Discrete Linear Systems Via Frequency-Domain Balanced Structure'"]
Discontinuous Dynamics of Electric Power System With DC Transmission: A Study on DAE System
On the Nonconvergence of the Vector Fitting Algorithm
The smallest transistor-based nonautonomous chaotic circuit
A ReRAM-Based Computing-in-Memory Convolutional-Macro With Customized 2T2R Bit-Cell for AIoT Chip IP Applications
Frequency-Selective I/Q Mismatch Calibration of Wideband Direct-Conversion Transmitters
On the Computational Complexity of Tile Set Synthesis for DNA Self-Assembly
New Algorithm for Signed Integer Comparison in {2 n+k , 2 n -1, 2 n +1, 2 n±1 -1} and Its Efficient Hardware Implementation
A 2-GHz FBAR-Based Transformer Coupled Oscillator Design With Phase Noise Reduction
A 1-nW Ultra-Low Voltage Subthreshold CMOS Voltage Reference With 0.0154%/V Line Sensitivity
Acoustic Echo Cancellation Using a Pseudocoherence Function in the Presence of Memoryless Nonlinearity
A CMOS Smart Temperature Sensor With Single-Point Calibration Method for Clinical Use
A novel FPGA compliant micropipeline
A 8.2-pW 2.4-pA Current Reference Operating at 0.5 V With No Amplifiers or Resistors
Lyapunov Functions for the Set Stability and the Synchronization of Boolean Control Networks
Projected Kernel Least Mean $p$ -Power Algorithm: Convergence Analyses and Modifications
The Serial Commutator FFT
Technique for Flicker Noise Up-Conversion Suppression in Differential LC Oscillators
RF Analog Beamforming Fan Filters Using CMOS All-Pass Time Delay Approximations
A Continuous Sweep-Clock-Based Time-Expansion Impulse-Radio Radar
Analytical Design Equations for Class-E Power Amplifiers
Write Pattern Format Algorithm for Reliable NAND-Based SSDs
Efficient Simulation of Time-Derivative Cellular Neural Networks
Discrete Wheel-Switching Chaotic System and Applications
Identification of Partial Differential Equation Models for Continuous Spatio-Temporal Dynamical Systems
CORDIC II: A New Improved CORDIC Algorithm
Discrete Lyapunov Exponent and Differential Cryptanalysis
A New Signal Detection Method for Spatially Multiplexed MIMO Systems and Its VLSI Implementation
Tropical Reservoir Computing Hardware
A Power Link Study of Wireless Non-Radiative Power Transfer Systems Using Resonant Shielded Loops
Phase-Noise Reduction in Oscillators via Small-Signal Injection
A 130 GHz Fully-Integrated Fundamental-Frequency D-Band Transmitter Module With > 4 dBm Single-Ended Output Power
Architectural Exploration to Address the Reliability Challenges for ReRAM-Based Buffer in SSD
A Reconfigurable ΔΣ ADC With Up to 100 MHz Bandwidth Using Flash Reference Shuffling
Analysis and Design of a 0.6 V 2.2 mW 58.5-to-72.9 GHz Divide-by-4 Injection-Locked Frequency Divider With Harmonic Boosting
Fault-Tolerant Control of a Class of Switched Nonlinear Systems With Structural Uncertainties
A Stochastic Computing Architecture for Iterative Estimation
HCDN: Hybrid-Mode Clock Distribution Networks
CMOS UWB Multiplier
Output Control Techniques for Dual-Frequency SIMO Buck Converters
NS-CIM: A Current-Mode Computation-in-Memory Architecture Enabling Near-Sensor Processing for Intelligent IoT Vision Nodes
A Multi-Modulus Fractional Divider With TDC Free Calibration Scheme for Mitigation of TX-VCO Pulling
Hybrid-Mode SRAM Sense Amplifiers: New Approach on Transistor Sizing
Synchronization of Nonlinear Dynamical Networks With Heterogeneous Impulses
A Linearized Model for the Design of Fractional-N Digital PLLs Based on Dual-Mode Ring Oscillator FDCs
Low-Power Multiport SRAM With Cross-Point Write Word-Lines, Shared Write Bit-Lines, and Shared Write Row-Access Transistors
Design and Implementation of MIMO-OFDM Baseband Processor for High-Speed Wireless LANs
Super-Regenerative Architecture for UWB Pulse Detection: From Theory to RF Front-End Design
Efficient Hardware Architectures for Deep Convolutional Neural Network
A 2.5-28 Gb/s Multi-Standard Transmitter With Two-Step Time-Multiplexing Driver
A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package
Admittance Matrix Models for the Nullor Using Limit Variables and Their Application to Circuit Design
Random Pulsewidth Matching Frequency Synthesizer With Sub-Sampling Charge Pump
A Thermometer-Like Mismatch Shaping Technique With Minimum Element Transition Activity for Multibit ΔΣ DACs
Active cancellation of acoustic noise using a self-tuned filter
A Low-Power Energy-Harvesting Logarithmic CMOS Image Sensor With Reconfigurable Resolution Using Two-Level Quantization Scheme
Design of High-Order Phase-Lock Loops
A Probabilistic LDPC-Coded Fault Compensation Technique for Reliable Nanoscale Computing
An I/Q -Channel Time-Interleaved Bandpass Sigma-Delta Modulator for a Low-IF Receiver
A Subthreshold-MOSFETs-Based Scattered Relative Temperature Sensor Front-End With a Non-Calibrated ±2.5°C 3σ Relative Inaccuracy From -40°C to 100°C
Novel Power-Delay-Area-Efficient Approach to Generic Modular Addition
Analysis and Modeling of Internal State Variables for Dynamic Effects of Nonvolatile Memory Devices
Minimal positive realizations for a class of transfer functions
Reverse Rate Matching for Low-Power LTE-Advanced Turbo Decoders
A Nano-Watt MOS-Only Voltage Reference With High-Slope PTAT Voltage Generators
Linear model-based testing of ADC nonlinearities
A 10-Mbps 0.8-pJ/bit Referenceless Clock and Data Recovery Circuit for Optically Controlled Neural Interface System
Low-Phase Noise Clock Distribution Network Using Rotary Traveling-Wave Oscillators and Built-In Self-Test Phase Tuning Technique
Low-Voltage Log-Domain Complex Filters
A Built-In Self-Test and In Situ Analog Circuit Optimization Platform
Toward Identifying Consumer Responsibility on Voltage Distortion and Filtering Based on the Maclaurin Series
Reduced Switch Count Based Single Source 7L Boost Inverter Topology
Characterization of a Flip-Flop Metastability Measurement Method
Resistive-Type CVNS Distributed Neural Networks With Improved Noise-to-Signal Ratio
Min-Sum Decoder Architectures With Reduced Word Length for LDPC Codes
Adaptivity of voltage-controlled oscillators - theory and design
Analysis and Design of Dual-Band Rectifier Using Novel Matching Network
Investigation of the Effect of Weak Non-Linearities on P1dB and Efficiency of Class B/J/J* Amplifiers
Compensation of finite gain-bandwidth induced errors in continuous-time sigma-delta modulators
Analysis and Background Self-Calibration of Comparator Offset in Loop-Unrolled SAR ADCs