yusuke1997/dblp-id-title huggingface dataset:
The Diffusion Network in Analog VLSI Exploiting Noise-Induced Stochastic Dynamics to Regenerate Various Continuous Paths
Novel global asymptotic stability criteria for delayed cellular neural networks
Design techniques for a pipelined ADC without using a front-end sample-and-hold amplifier
New Curvature-Compensation Technique for CMOS Bandgap Reference With Sub-1-V Operation
A Family of Compact Non-Volatile Flip-Flops With Ferroelectric FET
0.3 pJ/Bit Machine Learning Resistant Strong PUF Using Subthreshold Voltage Divider Array
Robust, Low-Complexity, and Energy Efficient Downlink Baseband Receiver Design for MB-OFDM UWB System
A Neuromorphic VLSI Model of Bat Interaural Level Difference Processing for Azimuthal Echolocation
RNS Reverse Converters for Moduli Sets With Dynamic Ranges up to (8n+1)-bit
CMOS IR-UWB Receiver for ±9.7-mm Range Finding in a Multipath Environment
Adaptive Ratio-Size Gates for Minimum-Energy Operation
CNTFET Modeling and Reconfigurable Logic-Circuit Design
Receding-Horizon l 2 -l ∞ FIR Filter With Embedded Deadbeat Property
A 0.45 pJ/b, 6.4 Gb/s Forwarded-Clock Receiver With DLL-Based Self-Tracking Loop for Unmatched Memory Interfaces
Generalized EEG-Based Drowsiness Prediction System by Using a Self-Organizing Neural Fuzzy System
A novel model on phase noise of ring oscillator based on last passage time
Active Dual-Band Power Divider and Active Quad-Plexer Based on Traveling Wave Amplification and D-CRLH Transmission Line
Adaptive Learning-Based Compressive Sampling for Low-power Wireless Implants
New radix-(2×2×2)/(4×4×4) and radix-(2×2×2)/(8×8×8) DIF FFT algorithms for 3-D DFT
Effect of Reference Clock Jitter and Demonstration of Near Image-Free Operation for the ADPLL
Fusion Estimation for Sensor Networks With Nonuniform Estimation Rates
Amplifier Innovations for Improvement of Rotary Traveling Wave Oscillators
"Sweet Spots" in Moderate Inversion for MOSFET Squarer Transconductors
Synthesis of Distributed Phase-Locked Oscillators
A Fast Ramp-Voltage-Based Current Programming Driver for AMOLED Display
A 10-bit 60-MS/s Low-Power Pipelined ADC With Split-Capacitor CDS Technique
A General Purpose 1.8-V 12-b 4-MS/s Fully Differential SAR ADC With 7.2-Vpp Input Range in 28-nm FDSOI
Periodically Intermittent Stabilization of Neural Networks Based on Discrete-Time Observations
An All-Digital PLL Frequency Synthesizer With an Improved Phase Digitization Approach and an Optimized Frequency Calibration Technique
Single Transistor Active Filters: What is Possible and What is Not
Analysis of Periodic Steady-States of Non-Linear Circuits Using the Discrete Singular Convolution Method
Introduction to the Special Section on Circuits and Systems for Energy-Autonomous Microsystems
A Balanced Approach to Multichannel Blind Deconvolution
Multistandard FEC Decoders for Wireless Devices
A Compensation Technique for Two-Stage Differential OTAs
A Wide Dynamic Range Laser Radar Receiver Based on Input Pulse-Shaping Techniques
Fast Statistical Analysis of Process Variation Effects Using Accurate PLL Behavioral Models
An Energy-Efficient DAC Switching Method for SAR ADCs
Reconstruction of Nonuniformly Sampled Bandlimited Signals Using a Differentiator-Multiplier Cascade
A layout structure for matching many integrated resistors
On Convergence of Proportionate-Type Normalized Least Mean Square Algorithms
Quadruple Cross-Coupled Dual-Interlocked-Storage-Cells-Based Multiple-Node-Upset-Tolerant Latch Designs
Visual neuroprosthesis: a non invasive system for stimulating the cortex
Design and Analysis of a DCSK-ARQ/CARQ System Over Multipath Fading Channels
An Extremely Simple Chaotic System With Infinitely Many Coexisting Attractors
A new method for the design of IIR filters with flat magnitude response
DDCSK-Walsh Coding: A Reliable Chaotic Modulation-Based Transmission Technique
A 1.35-V 16-Mb Twin-Bit-Cell Virtual-Ground-Architecture Embedded Flash Memory With a Sensing Current Protection Technique
A low-power CMOS analog multiplier
A Novel Structure for Rayleigh Channel Generation With Consideration of the Implementation in FPGA
Insights and Advances on the Design of CMOS Sinh Companding Filters
A Bandpass Filter With Inherent Gain Adaptation for Hearing Applications
The effect of I/Q imbalance and complex filter component mismatch in low-IF receivers
A Novel Low-Effort Demodulator for Low Power Short Range Wireless Transceivers
A Fast and Power-Efficient Memory-Centric Architecture for Affine Computation
Finite-Time Coordination Under State-Dependent Communication Graphs With Inherent Links
An 8-Bit Compressive Sensing ADC With 4-GS/s Equivalent Speed Utilizing Self-Timed Pipeline SAR-Binary-Search
Generalized Lagrange Multiplier Method and KKT Conditions With an Application to Distributed Optimization
Implementation of a Near-Optimal Detector for Spatial Modulation MIMO Systems
Polar Quantizer for Wireless Receivers: Theory, Analysis, and CMOS Implementation
A high-frequency double-sampling second-order ΔΣ modulator
Quantum-Noise Limited Distance Resolution of Optical Range Imaging Techniques
A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination
Parasitics Realization in State-Space Average-Value Modeling of PWM DC-DC Converters Using an Equal Area Method
A Current-Mode Capacitively-Coupled Chopper Instrumentation Amplifier for Biopotential Recording With Resistive or Capacitive Electrodes
A 3.6 µV rms Noise, 3 ppm/°C TC Bandgap Reference With Offset/Noise Suppression and Five-Piece Linear Compensation
A Novel Spike Detection Algorithm Based on Multi-Channel of BECT EEG Signals
A New Second-Order All-Pass Filter in 130-nm CMOS
A Fully Integrated Step-Down Switched-Capacitor DC-DC Converter With Dual Output Regulation Mechanisms
A Kernel Affine Projection-Like Algorithm in Reproducing Kernel Hilbert Space
Theory and applications of incremental ΔΣ converters
Synthesis-for-Testability Watermarking for Field Authentication of VLSI Intellectual Property
A Transient Enhancement DC-DC Buck Converter With Dual Operating Modes Control Technique
Clock-Phase-Noise-Induced TX Leakage Estimation of a Baseband Wireless Transmitter DAC
A 14.6 ps Resolution, 50 ns Input-Range Cyclic Time-to-Digital Converter Using Fractional Difference Conversion Method
Observers Design for 2-D Positive Time-Delay Roesser Systems
Interplay Between Spreading and Random Walk Processes in Multiplex Networks
Adaptive Techniques to Mitigate Oscillator Pulling in Radio Transmitters
A Study of Subtractive Digital Dither in Single-Stage and Multi-Stage Quantizers
Attack-Resilient Event-Triggered Controller Design of DC Microgrids Under DoS Attacks
Convergence Analysis of Zero Attracting Natural Gradient Non-Parametric Maximum Likelihood Algorithm
Electrostatic Energy-Harvesting and Battery-Charging CMOS System Prototype
More on Security of Public-Key Cryptosystems Based on Chebyshev Polynomials
Design Techniques of CMOS Ultra-Wide-Band Amplifiers for Multistandard Communications
A Digital PLL Using Oversampling Delta-Sigma TDC
A new split-radix FHT algorithm for length-q*2 m DHTs
A Predefined Bit-Plane Comparison Coding for Mobile Video Applications
Delay Estimation and Sizing of CMOS Logic Using Logical Effort With Slope Correction
Commutation Code Index DCSK Modulation Technique for High-Data-Rate Communication Systems
A Generalized Rotate-and-Fire Digital Spiking Neuron Model and Its On-FPGA Learning
Monte Carlo FEXT cancellers for DSL channels
Design of a low-power 3.5-GHz broad-band CMOS transimpedance amplifier for optical transceivers
Bus Energy Consumption for Multilevel Signals
Intermodulation distortion of a bipolar common-emitter amplifier with arbitrary emitter impedance and input matching network
Orthogonal Least Squares Algorithm for Training Cascade Neural Networks
Continuous-Time Sigma-Delta Modulator With an Embedded Pulsewidth Modulation
A 10-MHz BW 77.9 dB SNDR DT MASH Δ!Σ ADC With NC-VCO-Based Quantizer and OPAMP Sharing
On minor prime factorizations for n-D polynomial matrices
A Three-State Signal Coding Scheme for High Efficiency Class-S Amplifiers
A Reconfigurable 10-to-12-b 80-to-20-MS/s Bandwidth Scalable SAR ADC
Adaptive Impedance-Matching Techniques for Controlling L Networks
Optimality and Improvement of Dynamic Voltage Scaling Algorithms for Multimedia Applications
Flux-Charge Memristor Model for Phase Change Memory
Elitist nondominated sorting genetic algorithm based RF IC optimizer
A Dual Charge Pump for Quiescent Touch Sensor Power Supply
360 nW Gate-Driven Ultra-Low Voltage CMOS Linear Transconductor With 1 MHz Bandwidth and Wide Input Range
Distributed Semiglobal Consensus With Relative Output Feedback and Input Saturation Under Directed Switching Networks
Stability Analysis of Positive Systems With Bounded Time-Varying Delays
A Fused Floating-Point Three-Term Adder
Immediate Neighborhood Temperature Adaptive Routing for Dynamically Throttled 3-D Networks-on-Chip
Array-Based Approximate Arithmetic Computing: A General Model and Applications to Multiplier and Squarer Design
An Analytical Modelling of Three-Phase Four-Switch PWM Rectifier Under Unbalanced Supply Conditions
Why Dynamic-Element-Matching DACs Work
Bifurcation analysis and its experimental validation for a hysteresis circuit oscillator
Deep Texture Features for Robust Face Spoofing Detection
A 0.5 V 54 µW Ultra-Low-Power Object Matching Processor for Micro Air Vehicle Navigation
Parallel Interleaver Design for a High Throughput HSPA+/LTE Multi-Standard Turbo Decoder
Data-Driven Intelligent Efficient Synaptic Storage for Deep Learning
A Novel DCXO Module for Clock Synchronization in MPEG2 Transport System
A 1.2-V Current-Mode RMS-to-DC Converter Based on a Novel Two-Quadrant Electronically Simulated MOS Translinear Loop
Contention Resolution - A New Approach to Versatile Subexpressions Sharing in Multiple Constant Multiplications
Analysis and Optimization of Transformer-Based Series Power Combining for Reconfigurable Power Amplifiers
A Multidrop Bus Design Scheme With Resistor-Based Impedance Matching on Nonuniform Impedance Lines
Robust Observer Design for Two-Dimensional Discrete Positive Switched Systems With Delays
A Universal Vector Controller for Four-Quadrant Three-Phase Power Converters
Microwave Circuit Conditional Stability: Two-Parameter Criteria
Event-Triggered Finite-Time Robust Filtering for a Class of State-Dependent Uncertain Systems With Network Transmission Delay
Crosstalk Glitch Propagation Modeling for Asynchronous Interfaces in Globally Asynchronous Locally Synchronous Systems
Parallel random number generators for sequences uniformly distributed over any range of integers
Harmonically Related Concurrent Tri-Band Behavioral Modeling and Digital Predistortion
Design of LC Resonator for Low Phase Noise Oscillators
A Low-Cost VLSI Architecture for Robust Distributed Estimation in Wireless Sensor Networks
New linear-programming-based filter design
A Wide-Range-Supply-Voltage Sense Amplifier Circuit for Embedded Flash Memory
An 8times 8 Cell Analog Order-Statistic-Filter Array With Asynchronous Grayscale Morphology in 0.13-muhboxm CMOS
Multi-Band Balanced Couplers With Broadband Common-Mode Suppression
Digital Predistorter Design Using B-Spline Neural Network and Inverse of De Boor Algorithm
Zero-Counting and Adaptive-Latency Cache Using a Voltage-Guardband Breakthrough for Energy-Efficient Operations
An ADPLL-Based PSK Receiver for VHBR 13.56-MHz Contactless Smartcards and NFC Applications
A New Redundant Binary Booth Encoding for Fast 2 n -Bit Multiplier Design
Synthesis of Reduced Equivalent Circuits for Transmission Lines
Design and Implementation of Dual-Mode Inductors for Dual-Band Wireless Power Transfer Systems
On-Chip Photovoltaic Energy Conversion in Bulk-CMOS for Indoor Applications
A Nonrecursive Digital Calibration Technique for Joint Elimination of Transmitter and Receiver I/Q Imbalances With Minimized Add-On Hardware
Analytical Probability Density Calculation for Step Pulse Response of a Single-Ended Buffer With Arbitrary Power-Supply Voltage Fluctuations
A Fast On-Chip SVM-Training System With Dual-Mode Configurable Pipelines and MSMO Scheduler
Optimal Dismantling of Interdependent Networks Based on Inverse Explosive Percolation
Mean-Square Analysis of Multi-Sampled Multiband-Structured Subband Filtering Algorithm
Galois field arithmetic over GF(p m ) for high-speed/low-power error-control applications
Efficient Algorithm and Architecture for Elliptic Curve Cryptography for Extremely Constrained Secure Applications
A Quadrature Pulse Generator for Short-Range UWB Vehicular Radar Applications Using a Pulsed Oscillator and a Variable Attenuator
Minimum Correlation Estimation of Leakage and Echo Signals for FMCW Radar
Stability Analysis of 2-D Discrete Systems Described by the Fornasini-Marchesini Second Model With State Saturation
Four Monolithically Integrated Switched-Capacitor DC-DC Converters With Dynamic Capacitance Sharing in 65-nm CMOS
An 18-nA Ultra-Low-Current Resistor-Less Bandgap Reference for 2.8 V-4.5 V High Voltage Supply Li-Ion-Battery-Based LSIs
Efficient Logarithmic Converters for Digital Signal Processing Applications
Blocked Maximum Correntropy Criterion Algorithm for Cluster-Sparse System Identifications
Digital Wideband Integrators With Matching Phase and Arbitrarily Accurate Magnitude Response
A 0.5/0.8-V 9-GHz Frequency Synthesizer With Doubling Generation in 0.13-μm CMOS
Verifying Functional Specifications by Regression Techniques on Lissajous Test Signatures
A 0.35-0.5-V 18-152 MHz Digitally Controlled Relaxation Oscillator With Adaptive Threshold Calibration in 65-nm CMOS
A Reconfigurable Passive RF-to-DC Converter for Wireless IoT Applications
High-Performance Special Function Unit for Programmable 3-D Graphics Processors
A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20%-80% Input Duty Cycle for SDRAMs
Silicon Proven 1.8 µm × 9.2 µm 65-nm Digital Bit Generator for Hardware Security Applications
Low-Latency High-Throughput Systolic Multipliers Over GF(2 m ) for NIST Recommended Pentanomials
Process Variation-Aware Multiple-Fault Diagnosis of Thermometer-Coded Current-Steering DACs
Synchronization and input recovery in digital nonlinear systems
Adaptive Finite-Time Control for High-Order Nonlinear Systems With Multiple Uncertainties and its Application
Fault Detection and Isolation Filters for Three-Phase AC-DC Power Electronics Systems
Welcome to the Special Section on Smart Sensors!
Stochastic Analysis of Diffusion Dual Sign Algorithm for Cyclostationary White Gaussian Inputs and Nonstationary System
Multimode Memory-Based FFT Processor for Wireless Display FD-OCT Medical Systems
Pinning a Complex Delayed Dynamical Network to a Homogenous Trajectory
Theoretical Analysis for Efficient Design of a Piecewise Constant Spiking Neuron Model
An Ultra-Low Voltage and Low-Energy Level Shifter in 28-nm UTBB-FDSOI
Temperature Sensor Front End in SOI CMOS Operating up to 250°C
Physical Interpretations of Grid Voltage Full Feedforward for Grid-Tied Inverter
A High-Gain Acquisition System With Very Large Input Range
Reliable Control of Fuzzy Singularly Perturbed Systems and Its Application to Electronic Circuits
Comments on "A 10-Gb/s Inductorless CMOS Analog Equalizer With an Interleaved Active Feedback Topology"
Projection Operator-Based Factorization Procedure for FIR Paraunitary Matrices
Numerical Determination of Possible Multiple DC Solutions of Nonlinear Circuits
An FPGA-Based Linear All-Digital Phase-Locked Loop
Synthesis of a pulse-forming reactance network shaping a quasi-rectangular delayed output pulse
A Boundary Condition-Based Approach to the Modeling of Memristor Nanostructures
A Band-Divided Memory Polynomial for Wideband Digital Predistortion With Limited Bandwidth Feedback
A Splitting Frequencies-Based Wireless Power and Information Simultaneous Transfer Method
Fine-Grained Critical Path Analysis and Optimization for Area-Time Efficient Realization of Multiple Constant Multiplications
Design of an Ultra-low Voltage 9T SRAM With Equalized Bitline Leakage and CAM-Assisted Energy Efficiency Improvement
Class-D Audio Amplifier Using 1-Bit Fourth-Order Delta-Sigma Modulation
An Asynchronous Spike Event Coding Scheme for Programmable Analog Arrays
On the Optimum Constructions of Composite Field for the AES Algorithm
An Artificial Neural Network Processor With a Custom Instruction Set Architecture for Embedded Applications
An Average-Performance-Oriented Subthreshold Processor Self-Timed by Memory Read Completion
CMOS Cross-Coupled Differential-Drive Rectifier in Subthreshold Operation for Ambient RF Energy Harvesting - Model and Analysis
Low-Complexity Compression for Sensory Systems
A Reconfigurable Carrier Leakage Canceler for UHF RFID Reader Front-Ends
An Adaptive Beamforming Technique for UWB Impulse Transceiver
Power Scalable Beam-Oriented Digital Predistortion for Compact Hybrid Massive MIMO Transmitters
Passivity Analysis of Uncertain Singularly Perturbed Systems
Connecting Things to the IoT by Using Virtual Peripherals on a Dynamically Multithreaded Cortex M3
The analysis and improvement of a current-steering DACs dynamic SFDR-I: the cell-dependent delay differences
A Gain/Efficiency-Improved Serial-Parallel Switched-Capacitor Step-Up DC-DC Converter
Multiple Scale Approach to Dynamics of an LC Circuit With a Charge-Controlled Memristor
Group-Bipartite Consensus in the Networks With Cooperative-Competitive Interactions
A 20 k-to-100kS/s Sub-µW 9.5b-ENOB Asynchronous SAR ADC for Energy-Harvesting Body Sensor Node SoCs in 0.18-µm CMOS
Improving Receiver Close-In Blocker Tolerance by Baseband G m -C Notch Filtering
Variable Digital Filter With Least-Square Criterion and Peak Gain Constraints
Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers
Gate Stack Resistance and Limits to CMOS Logic Performance
A Highly-Efficient Multi-Band Multi-Mode All-Digital Quadrature Transmitter
The Transfer Function of Amplitude Modulation Circuits Using Varactor Diode
A ΔΣ-TDC-Based Beamforming Method for Vital Sign Detection Radar Systems
HTD: A Light-Weight Holosymmetrical Transition Detector for Wide-Voltage-Range Variation Resilient ICs
Direct Measurement of High-Gain and Complementary Charge-Steering Amplifiers
A 0.0129 mm 2 DPLL With 1.6~2.0 ps RMS Period Jitter and 0.25-to-2.7 GHz Tunable DCO Frequency Range in 55-nm CMOS
Area-Efficient Fixed-Width Squarer With Dynamic Error-Compensation Circuit
An Overview on the Second Generation Voltage Conveyor: Features, Design and Applications
Achieving Less Than 2% 3- σ Mismatch With Minimum Channel-Length CMOS Devices
Ghost Stochastic Resonance From an Asynchronous Cellular Automaton Neuron Model
Architectural Evolution of Integrated M-Phase High-Q Bandpass Filters
Available Energy and Passivity of First-Order LLTI One-Ports
A gigabit multidrop serial backplane for high-speed digital systems based on asymmetrical power splitter
Nonnegative Matrix Factorization Applied to Nonlinear Speech and Image Cryptosystems
Analysis of Signals via Non-Maximally Decimated Non-Uniform Filter Banks
A 470-nA Quiescent Current and 92.7%/94.7% Efficiency DCT/PWM Control Buck Converter With Seamless Mode Selection for IoT Application
Equivalency of Continuation and Optimization Methods to Determine Saddle-Node and Limit-Induced Bifurcations in Power Systems
CMOS Prescaler(s) With Maximum 208-GHz Dividing Speed and 37-GHz Time-Interleaved Dual-Injection Locking Range
Analysis and implementation of a CMOS even harmonic mixer with current reuse for heterodyne/direct conversion receivers
Design of Practical Broadband Matching Networks With Lumped Elements
Low-Power Fast-Transient Capacitor-Less LDO Regulator With High Slew-Rate Class-AB Amplifier
Analysis of Zero-Order Holder Discretization of Two-Dimensional Sliding-Mode Control Systems
Guest Editorial Special Issue on the 2016 IEEE International Symposium on Circuits and Systems (ISCAS 2016)
Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing - Part I: Addition, Approximate Transcendental Functions, and Log-Domain Operations
A Comparative Study of Single-Ended vs. Differential Six-Port Modulators for Wireless Communications
Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM
A CMOS Current-Mode Magnetic Hall Sensor With Integrated Front-End
Background Offset Calibration for Comparator Based on Temperature Drift Profile
A Nonuniform Sampling ADC Architecture With Reconfigurable Digital Anti-Aliasing Filter
Analysis of Systematic Losses in Hybrid Envelope Tracking Modulators
PLL-Based Self-Adaptive Resonance Tuning for a Wireless-Powered Potentiometer
Low Area/Power Synthesis Using Hybrid Pass Transistor/CMOS Logic Cells in Standard Cell-Based Design Environment
A Wide-Dynamic-Range CMOS Image Sensor With Gating for Night Vision Systems
Continuous Active Phase Shifter Design and Analysis for Millimeter-Wave Circuits
Generation of wave digital structures for networks containing multiport elements
Multiple Constant Multiplication Algorithm for High-Speed and Low-Power Design
A Variable Regularization Method for Affine Projection Algorithm
Efficient Addition Circuits for Modular Design of Processors-in-Memory
A new compact temperature-compensated CMOS current reference
Compensation of Delay Mismatch in a Direct Conversion Transmitter
Dynamic Event-Triggered Sliding Mode Control: Dealing With Slow Sampling Singularly Perturbed Systems
A Digital-Based Virtual Voltage Reference
Scaled Nested Key Equation Solver for Generalized Integrated Interleaved Decoder
An Effective MIMO-OFDM System for IEEE 802.22 WRAN Channels
A 2.45-GHz +20-dBm Fast Switching Class-E Power Amplifier With 43% PAE and a 18-dB-Wide Power Range in 0.18-µm CMOS
A Fast Windowing-Based Technique Exploiting Spline Functions for Designing Modulated Filter Banks
Far-Field Acoustic Source Localization and Bearing Estimation Using SigmaDelta Learners
Quantization Noise Minimization in SigmaDelta Modulation Based RF Transmitter Architectures
Synchronous 8-bit Non-Volatile Full-Adder based on Spin Transfer Torque Magnetic Tunnel Junction
Fully-Integrated Reconfigurable Charge Pump With Two-Dimensional Frequency Modulation for Self-Powered Internet-of-Things Applications
Global Fixed-Time Stabilization of Switched Nonlinear Systems: A Time-Varying Scaling Transformation Approach
40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist
A feedback strategy to improve the entropy of a chaos-based random bit generator
A State-Observer-Based Approach for Synchronization in Complex Dynamical Networks
Design and Analysis of Replica Piecewise M-Ary DCSK Scheme for Power Line Communications With Asynchronous Impulsive Noise
A digital automatic tuning technique for high-order continuous-time filters
Theory and Design of Frequency-Tunable Absorptive Bandstop Filters
Combined regressor methods and adaptive IIR filtering
Concept of Node Usage Probability From Complex Networks and Its Applications to Communication Network Design
IIP2 and DC Offsets in the Presence of Leakage at LO Frequency
Switched-Capacitor-Assisted Power Gating for Ultra-Low Standby Power in CMOS Digital ICs
Fiber-Fed Distributed Antenna System in an FPGA Software Defined Radio for 5G Demonstration
A 0.9-V 100-µW Feedforward Adder-Less Inverter-Based MASH ΔΣ Modulator With 91-dB Dynamic Range and 20-kHz Bandwidth
A 3-D Sparse FIR Frustum Filter for Enhancing Broadband Plane Waves
Improved Methods for the Design of Variable Fractional-Delay IIR Digital Filters
Parallel List Decoding of Convolutional Codes: Algorithm and Implementation
A 3, times, 5-Gb/s Multilane Low-Power 0.18-muhbox m CMOS Pseudorandom Bit Sequence Generator
High-Performance Repetitive Control of PWM DC-AC Converters With Real-Time Phase-Lead FIR Filter
Leakage, Area, and Headroom Tradeoffs for Scattered Relative Temperature Sensor Front-End Architectures
A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits
A Microstrip Lowpass Filter With Wide Tuning Range and Sharp Roll-Off Response
A 2.56 Gb/s Soft RS (255, 239) Decoder Chip for Optical Communication Systems
A Parallel Quantum Histogram Architecture
A Spread-Spectrum Mode Enabled Ripple-Based Buck Converter Using a Clockless Frequency Control