yusuke1997/dblp-id-title huggingface dataset:
Rough set based on least dissimilarity normalized index for handling uncertainty during E-learners learning pattern recognition
Machine-type communications in NOMA-based terahertz wireless networks
A data transmission using multi mediators scheme in vehicular adhoc networks
Remora optimization algorithm-based optimized node clustering technique for reliable data delivery in VANETs
Concepts of Digital Economy and Industry 4.0 in Intelligent and information systems
Development and performance evaluation of Correntropy Kalman Filter for improved accuracy of GPS position estimation
Blockchain technology applications in healthcare: An overview
A survey on various applications of prescriptive analytics
An adaptive multi-cloud offloading using hierarchical game-theoretic approach
Research on the application of network security defence in database security services based on deep learning integrated with big data analytics
Secure internet of medical things based electronic health records scheme in trust decentralized loop federated learning consensus blockchain
Automatic skull-face overlay and mandible articulation in data science by AIRS-Genetic algorithm
Enhancing investigations in data migration and security using sequence cover cat and cover particle swarm optimization in the fog paradigm
Modelling and analysis of fiber Bragg grating temperature sensor for Internet of things applications (FBG-4-IoT)
Marketing data security and privacy protection based on federated gamma in cloud computing environment
A macroscopic traffic flow modelling and collision avoidance using B-spline and Physics-Informed Neural Network approaches
An inception V3 approach for malware classification using machine learning and transfer learning
Role of IoT to avoid spreading of COVID-19
Application of intelligent computing to develop performance index algorithm as a multicriteria decision making tool
Enhancing vulnerability scoring for information security in intelligent computers
Secure short-packet communications using a full-duplex receiver
A Novel Routing and Hybrid Based Clustering Scheme in vehicular adhoc networks
An optimized framework for VANET routing: A multi-objective hybrid model for data synchronization with digital twin
A systematic review on early prediction of Mild cognitive impairment to alzheimers using machine learning algorithms
NVS-GAN: Benefit of generative adversarial network on novel view synthesis
Three-stage data generation algorithm for multiclass network intrusion detection with highly imbalanced dataset
Gaussian bilateral filtered discrete Hartley feature transformation based infomax boosting for hyperspectral image classification
International journal of intelligent networks
Conversational chat system using attention mechanism for COVID-19 inquiries
Enhancing aspect category detection in imbalanced online reviews: An integrated approach using Select-SMOTE and LightGBM
A novel heterogenous ensemble theory for symmetric 5G cells segmentation: Intelligent RAN analytics
Low Power Speaker Identification by Integrated Clustering and Gaussian Mixture Model Scoring
Improving Netlist Transformation-Based Approximate Logic Synthesis Through Resynthesis
WoMA: An Input-Based Learning Model to Predict Dynamic Workload of Embedded Applications
Renée: New Life for Old Phones
Synergistic Approximation of Computation and Memory Subsystems for Error-Resilient Applications
Improving the Performance of Shared Memory Communication in Impulse C
Framework for a Selection of Custom Instructions for Ht-MPSoC in Area-performance Aware Manner
Hardware-Based Event Stream Ordering for System-Level Observation Framework
A RISC-V-Based High-Throughput Accelerator for Sparse Winograd CNN Inference on FPGA
Reconfigurable Architecture for ZQDCT Using Computational Complexity Prediction and Bitstream Relocation
CNN Workloads Characterization and Integrated CPU-GPU DVFS Governors on Embedded Systems
Performance Evaluation of Network-on-Chip-Based H.264 Video Decoders via Full System Simulation
AbstractSDRs: Bring Down the Two-Language Barrier With Julia Language for Efficient SDR Prototyping
Task-Aware Interrupt Controller: Priority Space Unification in Real-Time Systems
Adversarial Attack Bypass by Stochastic Computing
Towards the Trustworthy Development of Active Medical Devices: A Hemodialysis Case Study
A 340- μ W TinyML Using LUT-Based Reservoir Computing on Low-Cost FPGAs
On the Impacts of Greedy Thermal Management in Mobile Devices
Embedded System for Quadruped Robot in Mammalian Configuration
Testing Autonomous Vehicle Software in the Virtual Prototyping Environment
Flexible Active-Passive and Push-Pull Protocols
An AI-Based Ventilation KPI Using Embedded IoT Devices
ProMiSE: A Programmable Hardware Monitor for Secure Execution in Zero Trust Networks
Toward Precision-Aware Safe Neural-Controlled Cyber-Physical Systems
Middleton's Class A Noise Parameter Estimator
An Efficient Edge-Cloud Partitioning of Random Forests for Distributed Sensor Networks
Comparison of Preemption Schemes for Partially Reconfigurable FPGAs
Power Variability in Contemporary DRAMs
Run-Time ROP Attack Detection on Embedded Devices Using Side Channel Power Analysis
mTREE: A Customized Multicast-Enabled Tree-Based Network on Chip for AI Chips
A Novel Heterogeneous Approximate Multiplier for Low Power and High Performance
Octopus: Context-Aware CNN Inference for IoT Applications
Fault Classification for SRAM-Based FPGAs in the Space Environment for Fault Mitigation
Efficient HLS Implementation of Fast Linear Discriminant Analysis Classifier
TLP Balancer: Predictive Thread Allocation for Multitenant Inference in Embedded GPUs
Seven Obstacles in the Way of Standard-Compliant Parallel SystemC Simulation
Formal Modeling and Verification of Generic Credential Management Processes for Industrial Cyber-Physical Systems
Revisiting AES SBox Composite Field Implementations for FPGAs
Running Median Algorithm and Implementation for Integer Streaming Applications
Shoulder Angel: An Open Platform for Reprogramming Wayward Wireless Sensors
Methodology for Formal Verification of Hardware Safety Strategies Using SMT
Temperature Compensated Time Synchronization
SoC-Based Implementation of 1-D Convolutional Neural Network for 3-Channel ECG Arrhythmia Classification via HLS4ML
7-Stage Pipelined Architecture of ASCON for Resource Constraint Devices
HDVQ-VAE: Binary Codebook for Hyperdimensional Latent Representations
Hardware-Aware Bayesian Neural Architecture Search of Quantized CNNs
Design of a Low-Cost System for the Measurement of Variables Associated With Air Quality
MONO: Enhancing Bit-Flip Resilience With Bit Homogeneity for Neural Networks
Heterogeneous Accelerator Design for Multi-DNN Workloads via Heuristic Optimization
EnHDC: Ensemble Learning for Brain-Inspired Hyperdimensional Computing
PttAcc: Pipeline-Based Taylor Expansion Fitting Arctangent Angle Hardware Accelerator Design for Descriptor Duty in ORB-SLAM System
A Gauge Meter Reader Edge Device Based on Computer Vision and Deep Learning
An Approximate Parallel Annealing Ising Machine for Solving Traveling Salesman Problems
Enabling Resource-Aware Mapping of Spiking Neural Networks via Spatial Decomposition
Zebra: Building Efficient Network Message Parsers for Embedded Systems
DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs
DB4HLS: A Database of High-Level Synthesis Design Space Explorations
Nvalt: Nonvolatile Approximate Lookup Table for GPU Acceleration
Silent Data Corruption and Embedded Processing With NASA's SpaceCube
TinyMo: Graph-Level Memory Optimizer for Tiny Machine Learning
Flush Code Eraser: Fast Attack Response Invalidating Cryptographic Sensitive Data
Joint Application-Aware Oblivious Routing and Static Virtual Channel Allocation
Real-Time Surface Identification System for Variable Walking Speeds of Biped Robots
A 64 kB Approximate SRAM Architecture for Low-Power Video Applications
Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style
Low-Power Compressor-Based Approximate Multipliers With Error Correcting Module
Multi-Optical Network-on-Chip for Large Scale MPSoC
M-HLS: Malevolent High-Level Synthesis for Watermarked Hardware IPs
Towards Fully Automatic Synthesis of Embedded Software
Partitioning Real-Time Tasks With Replications on Multiprocessor Embedded Systems
A Q-Learning-Based Fault-Tolerant and Congestion-Aware Adaptive Routing Algorithm for Networks-on-Chip
Application Phase Behavior-Guided Thermal Management of Embedded Platforms
Hierarchical High-Level Synthesis Design Space Exploration with Incremental Exploration Support
Enlarging I/O Size for Faster Loading of Mobile Applications
Functional Validation of the RISC-V Unlimited Vector Extension
HybridVerifier: A Cross-Platform Verification Framework for Instruction Set Simulators
Efficient Register-Balancing for Masked Hardware
A Faster Algorithm for Enumerating Connected Convex Subgraphs in Acyclic Digraphs
A Generic Executable Model for Fast Yet Accurate Contention Simulation in Multiprocessor Systems
Structure-Aware Linear Solver for Realtime Convex Optimization for Embedded Systems
Aging-Aware Parallel Execution
An Oblivious Routing Algorithm for 3D Mesh Networks to Achieve a New Worst-Case Throughput Bound
A Multidimensional Hardware Trojan Design Platform to Enhance Hardware Security
A Concurrency Buffer Control in B-Trees for Flash-Memory Storage Systems
Research on Cyclic Queuing and Forwarding With Preemption in Time-Sensitive Networking
Securing Binarized Neural Networks via PUF-Based Key Management in Memristive Crossbar Arrays
Combating Write Penalties Using Software Dispatch for On-Chip MRAM Integration
PI and PID Regulation Approaches for Performance-Constrained Adaptive Multiprocessor System-on-Chip
Supporting Safe Priority Adjustment for Software-Defined Real-Time Networking
Hybrid Recursive Karatsuba Multiplications on FPGAs
CoRQ: Enabling Runtime Reconfiguration Under WCET Guarantees for Real-Time Systems
Toward Mobile Malware Detection Through Convolutional Neural Networks
ML-Based Fast and Precise Embedded Rack Detection Software for Docking and Transport of Autonomous Mobile Robots Using 2-D LiDAR
Opal: A Multiradio Platform for High Throughput Wireless Sensor Networks
SIMON Says: Break Area Records of Block Ciphers on FPGAs
Enhancing HLS Performance Prediction on FPGAs Through Multimodal Representation Learning
Flipping Bits Like a Pro: Precise Rowhammering on Embedded Devices
A Multiplier-Free Discrete Cosine Transform Architecture Using Approximate Full Adder and Subtractor
Hiding in Plain Sight: Reframing Hardware Trojan Benchmarking as a Hide&Seek Modification
Embedded Restricted Boltzmann Machine Approach for Adjustments of Repetitive Physical Activities Using IMU Data
Auto Digit Selection for Most Significant Digit First Multiplication
SMT-Based Contention-Free Task Mapping and Scheduling on SMART NoC
Auto-OPS: A Framework for Automated Optical Probing Simulation on GDS-II
A Low Overhead Solution to Resilient Assembly Lines Built From Legacy Controllers
DynaFuse: Dynamic Fusion for Resource Efficient Multimodal Machine Learning Inference
Investigation of the Adversarial Robustness of End-to-End Deep Sensor Fusion Models
FloripaSat-2: An Open-Source Platform for CubeSats
An Area and Energy Efficient Serial-Multiplier
High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers
Hibernus: Sustaining Computation During Intermittent Supply for Energy-Harvesting Systems
Optimal Tasks and Heater Scheduling Applied to the Management of CubeSats Battery Lifespan
Hardware-in-the-Loop Simulation of an On-Board Energy-Driven Scheduling Algorithm for CubeSats
Deep Learning for Eye Blink Detection Implemented at the Edge
Gradual Channel Estimation Method for TLC NAND Flash Memory
Container-Based Fail-Operational System Architecture for Software-Defined Vehicles
Global Voltage Scaling Across Multiple Cores for Real-Time Workloads
Estimating and Mitigating Design Risk in a Flexible Distributed Design Process
Exploring Dynamic Duty Cycling for Energy Efficiency in Coherent DSP ASIC
FPGA-Based Protection Scheme against Hardware Trojan Horse Insertion Using Dummy Logic
A Novel Approach to Design Multiplexer Using Magnetic Quantum-Dot Cellular Automata
Cappuccino: Efficient CNN Inference Software Synthesis for Mobile System-on-Chips
Embedded Energy Monitoring System for Solar Applications
Instruction-Level Support for Deterministic Dataflow in Real-Time Systems
Lustre, Fast First, and Fresh
A Dependable and Low-Cost CCSDS 123 Hyperspectral Image Compressor
Fast Energy Efficient Radix-16 Sequential Multiplier
A Provably Secure Scheme to Prevent Master Key Recovery by Fault Attack on AES Hardware
MPC-On-Chip: An Embedded GPC Coprocessor for Automotive Active Suspension Systems
Comparing XML and JSON Characteristics as Formats for Data Serialization Within Ultralow Power Embedded Systems
Improving Memory Utilization in Convolutional Neural Network Accelerators
An XSLT-Based Proposal to Ease Embedded Critical Systems Tools Implementation, Verification, Validation, Testing, and Certification Efforts
A Safe, Secure, and Predictable Software Architecture for Deep Learning in Safety-Critical Systems
Online Internal Resistance Computation-Based Early Sensing of Thermal Runaway for Smart Fault Handling System (FHS) of Li-Ion Batteries
Abstract Clock-Based Design of a JPEG Encoder
A Reactive and Adaptive Data Flow Model for Network-of-System Specification
Experimental Investigation of Side-Channel Attacks on Neuromorphic Spiking Neural Networks
Memristor-Based Hybrid Fault Tolerant Structure With Concurrent Reconfigurability
XOR-Free Approach for Implementation of Polar Encoder
HERFA: A Homomorphic Encryption-Based Root-Finding Algorithm
Open Challenges for Probabilistic Measurement-Based Worst-Case Execution Time
Scheduling of Accuracy-Constrained Real-Time Systems in Dynamic Environments
Validity of Software Verification Results on Approximate Hardware
High Efficient GDI-CNTFET-Based Approximate Full Adder for Next Generation of Computer Architectures
Fast LDPC GPU Decoder for Cloud RAN
Data Archival to SD Card Via Hardware Description Language
MdCSR: A Memory-Efficient Sparse Matrix Compression Format
An Efficient Iterative Beam Search for Human-Robot Collaborative Assembly Line Balancing
Practical and Efficient PUF-Based Protocol for Authentication and Key Agreement in IoT
Designing an Adaptive Acoustic Modem for Underwater Sensor Networks
Security-Aware Modeling and Efficient Mapping for CAN-Based Real-Time Distributed Automotive Systems
Design and Implementation of an NoC-Based Convolution Architecture With GEMM and Systolic Arrays
Efficient On-Chip Task Scheduler and Allocator for Reconfigurable Operating Systems
On-Device Personalization for Human Activity Recognition on STM32
SPELL: An End-to-End Tool Flow for LLM-Guided Secure SoC Design for Embedded Systems
CollectiveHLS: Ultrafast Knowledge-Based HLS Design Optimization
A Quad-Redundant PLC Architecture for Cyber-Resilient Industrial Control Systems
LH-CAM: Logic-Based Higher Performance Binary CAM Architecture on FPGA
Deep-Learning-Based Visual Aid for Low Vision
Comparison of On-chip Communications in Zynq-7000 All Programmable Systems-on-Chip
Boosting AES Intrinsic Resilience Using Split SubBytes Round Function Against Power Attacks
Scheduling Conditions for Real-Time Software Transactional Memory
LOCoCAT: Low-Overhead Classification of CAN Bus Attack Types
Optimization of Processor-to-Hardware Module Communications on Spaceborne Hybrid FPGA-based Architectures
Performance of Some AES-Based AE and MAC Schemes Using Fixslicing on STM32 Microcontrollers
Contract-Based Methodology for Developing Resilient Cyber-Infrastructure in the Industry 4.0 Era
NvMISC: Toward an FPGA-Based Emulation Platform for RISC-V and Nonvolatile Memories
Block-Based Major Color Method for Foreground Object Detection on Embedded SoC Platforms
A Low-Cost Embedded System to Support Broadcasting Emergency Messages Through FM Radio Stations
Privacy-Preserving Anomaly Detection With Homomorphic Encryption for Industrial Control Systems in Critical Infrastructure
Data-Dependent Loop Approximations for Performance-Quality Driven High-Level Synthesis
Determination of Fiber Content in 3-D Printed Composite Parts Using Image Analysis
Test and Reliability Challenges for Approximate Circuitry
Editorial Introduction of New Editor-in-Chief and Associate Editors
Empowering Edge Devices With Processing-in-Memory for On-Device Language Inference
GNN-MiCS: Graph Neural-Network-Based Bounding Time in Embedded Mixed-Criticality Systems
Minimizing Backbone Ethernet Traffic for Enabling Interzonal Messages in Software-Defined Vehicles
Evaluating the Effects of Reducing Voltage Margins for Energy-Efficient Operation of MPSoCs
Task Sequencing in Frame-Based CPS
A Low-Overhead Partition-Oriented ERfair Scheduler for Hard Real-Time Embedded Systems
An Overhead-Free Max-Pooling Method for SNN
Towards Energy-Accuracy Scalable Multimodal Cognitive Systems
A Co-Optimization of Software and Hardware for PCIe-Based Small Packet DMA Transfer
A Traceability Localization Method of Acoustic Attack Source for MEMS Gyroscope
An Evolutionary Algorithm for Netlist Partitioning Targeting 3-D FPGAs
System-Level Dynamic Variation Margining in Presence of Monitoring and Actuation
Real-Time Tomato Quality Assessment Using Hybrid CNN-SVM Model
JTAG Fault Injection Attack
Real-Time Multiprocessor Scheduling Algorithm Based on Information Theory Principles
A Novel Framework for the Design of Adaptable Reconfigurable Partitions for the Placement of Variable-sized IP Cores
Novel Toolset for Efficient Hardwired Micro-Op Translation in Embedded Microarchitectures
A Configurable ReRAM Engine for Energy-Efficient Sparse Neural Network Acceleration
An SoC Design for Future Mobile DNA Detection
RDMA-Based Sampling Port of ARINC-653
Efficient Jammed Area Mapping in Wireless Sensor Networks
Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Organizations
A Flexible Decision-Making Mechanism Targeting Smart Thermostats
Fault Analysis in Induction Motors Through Signal Acquisition With Hilbert Transform and FPGA
Pipelining of a Mobile SoC and an External NPU for Accelerating CNN Inference
Automated Parasite Control System Prototype Through Capsule Dosage Based on Image Processing
Toward Error-Correcting Architectures for Cryptographic Circuits Based on Rabii-Keren Codes
A Novel One-Versus-All Approach for Multiclass Classification in TinyML Systems
A Methodology for Alleviating the Performance Degradation of TMR Solutions
Optimized Local Path Planner Implementation for GPU-Accelerated Embedded Systems
A Note on the EDF Preemption Behavior in "Rate Monotonic Versus EDF: Judgment Day"
Three-Stage Power Supply System Model for a Wearable IoT Device for COVID-19 Patients
High-Speed Hardware Arbitration Supporting Priorities and Bounded Service Latency
Grey Wolf Optimization Algorithm for Embedded Adaptive Filtering Applications
Efficient Leading Zero Count (LZC) Implementations for Xilinx FPGAs
A Custom FPGA Processor for Physical Model Ordinary Differential Equation Solving
Co-Designing Clusters of Lightweight Manycores and Asymmetric Operating System Kernels
Common Subexpression-Based Compression and Multiplication of Sparse Constant Matrices
Wearable Device to Monitor Sheep Behavior
High Communication Throughput and Low Scan Cycle Time with Multi/Many-Core Programmable Logic Controllers
System-Level Energy Optimization for Error-Tolerant Image Compression
IoT-Driven Smart Embedded System for Efficient Quality Food Production in Controlled Environments
Extending Amdahl's Law for Heterogeneous Multicore Processor with Consideration of the Overhead of Data Preparation
Needle in a Haystack: Detecting Subtle Malicious Edits to Additive Manufacturing G-Code Files
Middleton Class A Noise Median Estimator: FPGA and Software Implementation
Dynamic Segmented Bus for Energy-Efficient Last-Level Cache in Advanced Interconnect-Dominant Nodes
Cross-Layer Optimizations in Solid-State Drives
Seeding Algorithm for Bipolar Stochastic Computing for Polynomial Approximations
Development of a Motion Controller for the Electric Wheelchair of Quadriplegic Patients Using Head Movements Recognition
Diagnostic Accuracy of Smartphone-Connected Electrophysiological Biosensors for Prediction of Blood Glucose Level in a Type-2 Diabetic Patient Using Machine Learning: A Pilot Study
WCET-Aware Partitioning and Allocation of Disaggregated Networks for Multicore Systems
Energy-Efficient Decoding and Encoding Hardware for Optimized Posit Arithmetic
Vector Accelerator Unit for Caravel
A Tabu-Based Partitioning and Layer Assignment Algorithm for 3-D FPGAs
DMMC: A Polar Code Construction Method for Improving Performance in TLC NAND Flash
Subleq⊝: An Area-Efficient Two-Instruction-Set Computer
A New Approximate Sum of Absolute Differences Unit for Bioimages Processing
LabOSat-01: A Payload for In-Orbit Device Characterization
Development of a Miniaturized Testing System for Resonant Frequency Difference Detection for Delay Line Surface Acoustic Wave Devices
TinyML-Based Intrusion Detection System for In-Vehicle Network Using Convolutional Neural Network on Embedded Devices
Softcore Processor Optimization According to Real-Application Requirements
NoC-Based Protection for SoC Time-Driven Attacks
A Novel Processor Architecture With a Hardware Microkernel to Improve the Performance of Task-Based Systems
Dadu-SV: Accelerate Stereo Vision Processing on NPU
Perspective Paper - Can AC Computing Be an Alternative for Wirelessly Powered IoT Devices?
A Square-Root-Free Matrix Decomposition Method for Energy-Efficient Least Square Computation on Embedded Systems
Predictive OS Modeling for Host-Compiled Simulation of Periodic Real-Time Task Sets
Embedded System for Athletes' Jump Performance Analysis
No-Multiplication Deterministic Hyperdimensional Encoding for Resource-Constrained Devices
Island-Based Adaptable Embedded System Design
Post-Quantum Enabled Cyber Physical Systems
Multirate Sampling for Power-Performance Tradeoff in Embedded Control
Radiation-Hardened Reconfigurable Array With Instruction Roll-Back
IDRA: An In-Storage Data Reorganization Accelerator for Multidimensional Databases
Fast Content Updating Algorithm for an SRAM-Based TCAM on FPGA
Ring-DVFS: Reliability-Aware Reinforcement Learning-Based DVFS for Real-Time Embedded Systems
Shared Pattern History Tables in Multicomponent Branch Predictors With a Dealiasing Cache
Design of a Low-Cost Underwater Acoustic Modem
Hybrid Logic Computing of Binary and Stochastic
WeNA: Deterministic Run-time Task Mapping for Performance Improvement in Many-core Embedded Systems
A Robust VMD-PCA Integrated Approach for Accurate Respiration Parameter Estimation From PPG Signals
Lightweight Prediction-Based Tests for On-Line Min-Entropy Estimation
Effects of Runtime Reconfiguration on PUFs Implemented as FPGA-Based Accelerators
Deflection Routing in Hierarchical Mesh NoCs
C++20 Coroutines on Microcontrollers - What We Learned
Improved Low Time-Complexity Schedulability Test for Nonpreemptive EDF on a Multiprocessor
Data Reduction Using Integrated Adaptive Filters for Energy-Efficient in the Clusters of Wireless Sensor Networks
Software Synthesis From High-Level Specification for Swarm Robotic Applications
An FPGA-Based Plant-on-Chip Platform for Cyber-Physical System Analysis
Efficient Partial Weight Update Techniques for Lightweight On-Device Learning on Tiny Flash-Embedded MCUs
Detecting Nonequivalence in Neural Networks Through In-Distribution Counterexample Generation
SecPump: A Connected Open-Source Infusion Pump for Security Research Purposes
FIFA: Exploring a Focally Induced Fault Attack Strategy in Near-Threshold Computing
Customized Instructions for Protection Against Memory Integrity Attacks
Dynamic Scheduling of Real-Time Tasks in Heterogeneous Multicore Systems
Editorial Introduction of New Associate Editors
Accelerating the Verification of Forward Error Correction Decoders by PCIe FPGA Cards
SANGRIA: Stacked Autoencoder Neural Networks With Gradient Boosting for Indoor Localization
An Endogenous Security Study of Telematics Box in Intelligent Connected Vehicles
Optimized Inference Scheme for Conditional Computation in On-Device Object Detection