yusuke1997/dblp-id-title huggingface dataset:
Can Android Run on Time? Extending and Measuring the Android Platform's Timeliness
Accurate Estimation of Service Rates in Interleaved Scratchpad Memory Systems
Dynamic Data-Cache Locking for Minimizing the WCET of a Single Task
Time-Triggered Implementations of Dynamic Controllers
MERE: Hardware-Software Co-Design for Masking Cache Miss Latency in Embedded Processors
Catching Escapers: A Detection Method for Advanced Persistent Escapers in Industry Internet of Things Based on Identity-based Broadcast Encryption (IBBE)
TF-Net: Deploying Sub-Byte Deep Neural Networks on Microcontrollers
Toward a Lingua Franca for Deterministic Concurrent Systems
Federated Scheduling of Sporadic DAGs on Unrelated Multiprocessors
On the Improved Hard Real-Time Scheduling of Cyclo-Static Dataflow
Hot-LSNs distributing wear-leveling algorithm for flash memory
Guest Editorial for ACM TECS Special Issue on Effective Divide-and-Conquer, Incremental, or Distributed Mechanisms of Embedded Designs for Extremely Big Data in Large-Scale Devices
Power-Temperature Stability and Safety Analysis for Multiprocessor Systems
Sleep-Mode Voltage Scaling: Enabling SRAM Data Retention at Ultra-Low Power in Embedded Microcontrollers
An Efficient CNN Accelerator for Low-Cost Edge Systems
Editorial: Industry 4.0 - A Confluence of Embedded Artificial Intelligence, Machine Learning, Robotics and Security
Network-Level Power-Performance Trade-Off in Wearable Activity Recognition: A Dynamic Sensor Selection Approach
Combating Software and Sybil Attacks to Data Integrity in Crowd-Sourced Embedded Systems
Introduction to the inaugural issue
A novel software framework for embedded multiprocessor smart cameras
Scheduling Temporal Data with Dynamic Snapshot Consistency Requirement in Vehicular Cyber-Physical Systems
SystemC Implementation of Stochastic Petri Nets for Simulation and Parameterization of Biological Networks
Schedule Adaptation for Ensuring Reliability in RT-WiFi-Based Networked Embedded Systems
Sequential specification of time-aware stream processing applications
Unleashing OpenTitan's Potential: a Silicon-Ready Embedded Secure Element for Root of Trust and Cryptographic Offloading
MultiMaKe: Chip-multiprocessor driven memory-aware kernel pipelining
Fault-Tolerant Preemptive Aperiodic RT Scheduling by Supervisory Control of TDES on Multiprocessors
Power management in energy harvesting sensor networks
Buffer optimization in multitask implementations of Simulink models
Editorial: Distributed Public Ledgers and Block Chains - What Good Are They for Embedded Systems?
Register coalescing techniques for heterogeneous register architecture with copy sifting
Store-n-Learn: Classification and Clustering with Hyperdimensional Computing across Flash Hierarchy
Physical activity recognition using multiple sensors embedded in a wearable device
PLTL-partitioned model checking for reactive systems under fairness assumptions
Hardware Trojan Detection Using Machine Learning: A Tutorial
Thermal Optimization in Network-on-Chip-Based 3D Chip Multiprocessors Using Dynamic Programming Networks
Libra: Software-Controlled Cell Bit-Density to Balance Wear in NAND Flash
Market-based resource allocation for distributed data processing in wireless sensor networks
Reducing power while increasing performance with supercisc
A resource-driven DVFS scheme for smart handheld devices
Analytical Program Power Characterization for Battery Depletion-time Estimation
Wireless noncontact ECG and EEG biopotential sensors
Host-Compiled Multicore System Simulation for Early Real-Time Performance Evaluation
Editorial: Special Section VCPSS'09
Reliability-aware Scheduling and Routing for Messages in Time-sensitive Networking
Accelerating Attention Mechanism on FPGAs based on Efficient Reconfigurable Systolic Array
An asymmetric dual-processor architecture for low-power information appliances
Catch Non-determinism If You Can: Intermittent Inference of Dynamic Neural Networks
Application Deployment Strategies for Spatial Isolation on Many-Core Accelerators
Sysfier: Actor-based formal verification of SystemC
Optimization of Signal Processing Applications Using Parameterized Error Models for Approximate Adders
Introduction to the Special Issue on Memory and Storage Systems for Embedded and IoT Applications
P-BMS: A Bad Block Management Scheme in Parallelized Flash Memory Storage Devices
DFSynthesizer: Dataflow-based Synthesis of Spiking Neural Networks to Neuromorphic Hardware
Compositional Relational Abstraction for Nonlinear Hybrid Systems
Conformance testing for cyber-physical systems
Round-trip DRAM Access Fairness in 3D NoC-based Many-core Systems
Software-based register file vulnerability reduction for embedded processors
CARIn: Constraint-Aware and Responsive Inference on Heterogeneous Devices for Single- and Multi-DNN Workloads
Scenario Based Run-Time Switching for Adaptive CNN-Based Applications at the Edge
App-aware Swap Resource Allocation for Enhancing User-perceived Latency on Mobile Devices
Robust Embedded Autonomous Driving Positioning System Fusing LiDAR and Inertial Sensors
Frequent value locality and its applications
Code-Inherent Traffic Shaping for Hard Real-Time Systems
A comparison of software platforms for wireless sensor networks: MANTIS, TinyOS, and ZigBee
Tightening Contention Delays While Scheduling Parallel Applications on Multi-core Architectures
Keep in Balance: Runtime-reconfigurable Intermittent Deep Inference
Online Processing of Vehicular Data on the Edge Through an Unsupervised TinyML Regression Technique
Precise Cache Profiling for Studying Radiation Effects
Static Analysis of Runtime Errors in Interrupt-Driven Programs via Sequentialization
Model-based, Mutation-driven Test-case Generation Via Heuristic-guided Branching Search
Preserving Partial-Order Runs in Parametric Time Petri Nets
Chimp: A Learning-based Power-aware Communication Protocol for Wireless Body Area Networks
Runtime Performance and Power Optimization of Parallel Disparity Estimation on Many-Core Platforms
Guidelines for a graduate curriculum on embedded software and systems
ACDSE: A Design Space Exploration Method for CNN Accelerator based on Adaptive Compression Mechanism
Direct address translation for virtual memory in energy-efficient embedded systems
GroupSense: Recognizing and Understanding Group Physical Activities using Multi-Device Embedded Sensing
Reliability Assessment and Safety Arguments for Machine Learning Components in System Assurance
CASCADE: High Throughput Data Streaming via Decoupled Access-Execute CGRA
Memory safety without garbage collection for embedded applications
Integrated Exploration Methodology for Data Interleaving and Data-to-Memory Mapping on SIMD Architectures
Schedulability analysis of applications with stochastic task execution times
Task-FIFO Co-Scheduling of Streaming Applications on MPSoCs with Predictable Memory Hierarchy
Guest Editorial: Special Issue on Models and Methodologies for System Design
Output-based Intermediate Representation for Translation of Test-pattern Program
Does the Sharing of Execution Units Improve Performance/Power of Multicores?
Efficient Deep Learning Infrastructures for Embedded Computing Systems: A Comprehensive Survey and Future Envision
The Predictable Execution Model in Practice: Compiling Real Applications for COTS Hardware
Yield-enhancement schemes for multicore processor and memory stacked 3D ICs
A real-time Java chip-multiprocessor
Speculating to reduce unnecessary power consumption
NAVIDRO, a CARES architectural style for configuring drone co-simulation
DEEPEYE: A Deeply Tensor-Compressed Neural Network for Video Comprehension on Terminal Devices
Fiat-shamir identification scheme immune to the hardware fault attacks
Reducing Interleaving Semantics Redundancy in Reachability Analysis of Time Petri Nets
Model checking of software for microcontrollers
Task Assignment Algorithms for Heterogeneous Multiprocessors
UWB microwave imaging for breast cancer detection: Many-core, GPU, or FPGA?
Necessary and Sufficient Conditions for Thermal Schedulability of Periodic Real-Time Tasks Under Fluid Scheduling Model
Parallelization of Belief Propagation on Cell Processors for Stereo Vision
Enabling dynamic binary translation in embedded systems with scratchpad memory
Design-Technology Co-Optimization for NVM-Based Neuromorphic Processing Elements
A Socioecological Model for Advanced Service Discovery in Machine-to-Machine Communication Networks
Instant Multiunit Resource Hardware Deadlock Detection Scheme for System-on-Chips
Lemonade: Learning-based Heterogeneous Metadata Offloading for Disaggregated Memory
Guest editorial: Concurrent hardware and software design for multiprocessor SoC
Integrated Hardware Garbage Collection
Reducing Energy in GPGPUs through Approximate Trivial Bypassing
Fast Loosely-Timed Deep Neural Network Models with Accurate Memory Contention
Adaptive calibration for fusion-based cyber-physical systems
AuthCropper: Authenticated Image Cropper for Privacy Preserving Surveillance Systems
EncoDeep: Realizing Bit-flexible Encoding for Deep Neural Networks
Hardware architectural support for control systems and sensor processing
The Sparse Synchronous Model on Real Hardware
EASYR: Energy-Efficient Adaptive System Reconfiguration for Dynamic Deadlines in Autonomous Driving on Multicore Processors
Two Birds With One Stone: Boosting Both Search and Write Performance for Tree Indices on Persistent Memory
Efficient hardware-based nonintrusive dynamic application profiling
SATGuard: SAT-driven Countermeasures for Protecting Approximate Circuits from Hardware Trojan
Worst-case Execution Time Calculation for Query-based Monitors by Witness Generation
Energy-aware code motion for GPU shader processors
Efficient Black-Box Checking with Specification-Guided Abstraction
Measuring and policing blocking times in real-time systems
A Formal Approach towards Safe and Stable Schedule Synthesis in Weakly Hard Control Systems
Hierarchical Benchmark Circuit Generation for FPGA Architecture Evaluation
Editorial: Diversity Galore & A Call for Resilient, Sustainable and Secure System Design
Energy-aware design of embedded memories: A survey of technologies, architectures, and optimization techniques
A Novel Method for Online Detection of Faults Affecting Execution-Time in Multicore-Based Systems
Verified Compilation of Synchronous Dataflow with State Machines
Worst-case guarantees on a processor with temperature-based feedback control of speed
Compact Instruction Set Extensions for Dilithium
System synthesis of synchronous multimedia applications
AI Attacks AI: Recovering Neural Network Architecture from NVDLA Using AI-Assisted Side Channel Attack
A constraint programming approach for integrated spatial and temporal scheduling for clustered architectures
Safety-critical medical device development using the UPP2SF model translation tool
A Comprehensive Study of Systems Challenges in Visual Simultaneous Localization and Mapping Systems
KNOWME: An Energy-Efficient Multimodal Body Area Network for Physical Activity Monitoring
Montgomery Multiplication for Public Key Cryptography on MSP430X
DL-RSIM: A Reliability and Deployment Strategy Simulation Framework for ReRAM-based CNN Accelerators
Delite: A Compiler Architecture for Performance-Oriented Embedded Domain-Specific Languages
Application development with the FlexWAFE real-time stream processing architecture for FPGAs
Structural Test Coverage Criteria for Deep Neural Networks
Ember: Task Wakeup Sequence-Based Energy Optimization for Mobile Web Browsing
Dynamic task partition for video decoding on heterogeneous dual-core platforms
Refining Cache Behavior Prediction Using Cache Miss Paths
TECS Editorial: Rethinking and Re-evaluating in the Time of Crisis
Exposing Implementation Details of Embedded DRAM Memory Controllers through Latency-based Analysis
Uniprocessor scheduling under precedence constraints for embedded systems design
Modeling and analysis of core-centric network processors
RegKey: A Register-based Implementation of ECC Signature Algorithms Against One-shot Memory Disclosure
Compiler-assisted soft error detection under performance and energy constraints in embedded systems
Toward Energy-efficient STT-MRAM-based Near Memory Computing Architecture for Embedded Systems
The Design and Implementation of the Synchronous Language CÉU
LiBrA-CAN: Lightweight Broadcast Authentication for Controller Area Networks
MARS: mmWave-based Assistive Rehabilitation System for Smart Healthcare
EC-ECC: Accelerating Elliptic Curve Cryptography for Edge Computing on Embedded GPU TX2
Dynamic Cache Reconfiguration for Soft Real-Time Systems
Reliable and adaptive network-on-chip architectures for cyber physical systems
GENESIS: Parallel Application Placement onto Reconfigurable Architectures (Invited for the Special Issue on Runtime Management)
Declarative Power Sequencing
Eliminating stack overflow by abstract interpretation
Editorial: Continuing the Course
Algorithm-hardware Co-design of Attention Mechanism on FPGA Devices
Editorial: Oh Security - Where Art Thou?
End-To-End Latency of Cause-Effect Chains: A Tutorial
Harvest Energy from the Water: A Self-Sustained Wireless Water Quality Sensing System
Dynamic allocation for scratch-pad memory using compile-time decisions
Energy-optimizing source code transformations for operating system-driven embedded software
Runtime Monitoring of Cyber-Physical Systems Under Timing and Memory Constraints
Dynamic Behavior Specification and Dynamic Mapping for Real-Time Embedded Systems: HOPES Approach
SLAQA : Quality-level Aware Scheduling of Task Graphs on Heterogeneous Distributed Systems
The Case for HW/SW Harmony in Real-Time Systems: Tightening Memory Latency of Streaming Applications
Resource-demand Estimation for Edge Tensor Processing Units
Online Scheduling of 2-Re-entrant Flexible Manufacturing Systems
TAMA: Turn-aware Mapping and Architecture - A Power-efficient Network-on-Chip Approach
Developing Deadlock-Free Routing Algorithms in Torus NoC: A Formal Approach
ERGo: Energy-Efficient Hybrid Graph Neural Network Training on Processing-in-Memory Architectures
Analyzing data reuse for cache reconfiguration
Exploiting media stream similarity for energy-efficient decoding and resource prediction
System-wide energy minimization for real-time tasks: Lower bound and approximation
Compiler-Supported Thread Management for Multithreaded Network Processors
Multi-bit Data Flow Error Detection Method Based on SDC Vulnerability Analysis
Event-B Hybridation: A Proof and Refinement-based Framework for Modelling Hybrid Systems
Toward Adversary-aware Non-iterative Model Pruning through Dynamic Network Rewiring of DNNs
Cache-Partitioned Preemption Threshold Scheduling
ShaVe-ICE: Sharing Distributed Virtualized SPMs in Many-Core Embedded Systems
Introduction to the Special Issue on Accelerating AI on the Edge - Part 1
Introduction to the Special Issue on Specification and Design Languages (FDL 2019)
Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors
On the use of greedy shapers in real-time embedded systems
A Hybrid Task Mapping Algorithm for Heterogeneous MPSoCs
High-performance Reconfigurable DNN Accelerator on a Bandwidth-limited Embedded System
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
An Abstraction-Refinement Theory for the Analysis and Design of Real-Time Systems
Spin transfer torque (STT)-MRAM-based runtime reconfiguration FPGA circuit
Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations
Probabilistic Estimation of Threat Intrusion in Embedded Systems for Runtime Detection
A design framework for real-time embedded systems with code size and energy constraints
Large or Small: Harnessing the Erase Duality of Emerging Bit-Alterable NAND Flash to Suppress Tail Latency
GUSTO: An automatic generation and optimization tool for matrix inversion architectures
Partitioning and Selection of Data Consistency Mechanisms for Multicore Real-Time Systems
Criticality-aware Monitoring and Orchestration for Containerized Industry 4.0 Environments
A systematic approach for optimized bypass configurations for application-specific embedded processors
Monitoring massive appliances by a minimal number of smart meters
TimelyNet: Adaptive Neural Architecture for Autonomous Driving with Dynamic Deadline
Energy-efficient Personalized Federated Search with Graph for Edge Computing
Efficient and Reliable Error Detection Architectures of Hash-Counter-Hash Tweakable Enciphering Schemes
Applying Multiple Level Cell to Non-volatile FPGAs
Edge-SLAM: Edge-Assisted Visual Simultaneous Localization and Mapping
Translating discrete-time simulink to lustre
metroII: A design environment for cyber-physical systems
Compositionality in synchronous data flow: Modular code generation from hierarchical SDF graphs
Extended Redundant-Digit Instruction Set for Energy-Efficient Processors
Introduction for Embedded Platforms for Cryptography in the Coming Decade
Game-Theory-Based Active Defense for Intrusion Detection in Cyber-Physical Embedded Systems
Design Optimization of Mixed-Criticality Real-Time Embedded Systems
Edge-TM: Exploiting Transactional Memory for Error Tolerance and Energy Efficiency
Throughput-driven synthesis of embedded software for pipelined execution on multicore architectures
A self-adjusting flash translation layer for resource-limited embedded systems
Introduction to Special Section on Probabilistic Embedded Computing
A control theoretic approach to energy-efficient pipelined computation in MPSoCs
Flexible Updating of Internet of Things Computing Functions through Optimizing Dynamic Partial Reconfiguration
Optimizing Tensor Train Decomposition in DNNs for RISC-V Architectures Using Design Space Exploration and Compiler Optimizations
Reducing dynamic and leakage energy in VLIW architectures
READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications
PUF-Dilithium: Design of a PUF-Based Dilithium Architecture Benchmarked on ARM Processors
CRIMP: Compact & Reliable DNN Inference on In-Memory Processing via Crossbar-Aligned Compression and Non-ideality Adaptation
Minimization of WCRT with Recovery Assurance from Hardware Trojans for Tasks on FPGA-based Cloud
Timing effects of DDR memory systems in hard real-time multicore architectures: Issues and solutions
Iterative schedule optimization for voltage scalable distributed embedded systems
A reconfigurable FTL (flash translation layer) architecture for NAND flash-based applications
Efficient Multi-Byte Power Analysis Architecture Focusing on Bitwise Linear Leakage
On the Impact of Manufacturing Process Variations on the Lifetime of Sensor Networks
RiSA: A Reinforced Systolic Array for Depthwise Convolutions and Embedded Tensor Reshaping
Providing reliable and real-time delivery in the presence of body shadowing in breadcrumb systems
A Space-Grained Cleaning Method to Reduce Long-Tail Latency of DM-SMR Disks
Distill-Net: Application-Specific Distillation of Deep Convolutional Neural Networks for Resource-Constrained IoT Platforms
Compiler-Directed Soft Error Detection and Recovery to Avoid DUE and SDC via Tail-DMR
Special Issue on Post-Quantum Cryptography for Embedded Systems
Specification Guided Automated Synthesis of Feedback Controllers
DASS: Differentiable Architecture Search for Sparse Neural Networks
Contract-Based Requirement Modularization via Synthesis of Correct Decompositions
RIMMS: Runtime Integrated Memory Management System for Heterogeneous Computing
Dynamic Layer Routing Defense for Real-Time Embedded Vision
Exploring Impact of Profile Data on Code Quality in the HotSpot JVM
Contention-Detectable Mechanism for Receiver-Initiated MAC
Personalized optimization for android smartphones
DIAC: An Inter-app Conflicts Detector for Open IoT Systems
Energy Cooperation in Battery-Free Wireless Communications with Radio Frequency Energy Harvesting
An Ultra-low-power Embedded AI Fire Detection and Crowd Counting System for Indoor Areas
A novel low-power embedded object recognition system working at multi-frames per second
REPAIRS: Gaussian Mixture Model-based Completion and Optimization of Partially Specified Systems
Runtime Enforcement of Cyber-Physical Systems
Introduction to the special issue on application-specific processors
Automatic synthesis of physical system differential equation models to a custom network of general processing elements on FPGAs
Abnormality Detection Using Power Rising and Descending Signature (PRIDES)
Blocking-Aware Partitioned Real-Time Scheduling for Uniform Heterogeneous Multicore Platforms
Demystifying Soft-Error Mitigation by Control-Flow Checking - A New Perspective on its Effectiveness
BitSET: Bit-Serial Early Termination for Computation Reduction in Convolutional Neural Networks
Theory and Application of Delay Constraints in Arbiter PUF
Nonblocking real-time garbage collection
AdaTest: Reinforcement Learning and Adaptive Sampling for On-chip Hardware Trojan Detection
Fault Injection for Test-Driven Development of Robust SoC Firmware
PReFeR : Physically Related Function based Remote Attestation Protocol
Fault Recovery Time Analysis for Coarse-Grained Reconfigurable Architectures
Runtime Precomputation of Data-Dependent Parameters in Embedded Systems
DOCTOR: A Multi-Disease Detection Continual Learning Framework Based on Wearable Medical Sensors
Statistics and secret leakage
A HW/SW co-verification framework for SystemC
A System-Level Modeling and Design for Cyber-Physical-Social Systems
Space-Efficient Index Scheme for PCM-Based Multiversion Databases in Cyber-Physical Systems
StreamNet++: Memory-Efficient Streaming TinyML Model Compilation on Microcontrollers
Efficient Kernel Management on GPUs
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks
Optimizing instruction cache performance of embedded systems
Combining Formal Methods for the Development of Reactive Systems
High-Level Approaches to Hardware Security: A Tutorial
Editorial: Model-driven embedded-system design
Interruptible Remote Attestation of Low-end IoT Microcontrollers via Performance Counters
Efficient Spilling Reduction for Software Pipelined Loops in Presence of Multiple Register Types in Embedded VLIW Processors
AdaFT: A Framework for Adaptive Fault Tolerance for Cyber-Physical Systems
A hybrid hardware-software technique to improve reliability in embedded processors
Automated generation of polyhedral process networks from affine nested-loop programs with dynamic loop bounds
Parallelizing Sequential Programs with Statistical Accuracy Tests
Editorial: Early Career Researchers in Embedded Computing
HSPA: High-Throughput Sparse Polynomial Multiplication for Code-based Post-Quantum Cryptography
PMC: A Requirement-Aware DRAM Controller for Multicore Mixed Criticality Systems
ObNoCs: Protecting Network-on-Chip Fabrics Against Reverse-Engineering Attacks
Symbolic Multi-Level Loop Mapping of Loop Programs for Massively Parallel Processor Arrays
Correlation-Aware Probabilistic Timing Analysis for the Dynamic Segment of FlexRay
Automatic RTL Test Generation from SystemC TLM Specifications
Analyzing the Fault Injection Sensitivity of Secure Embedded Software
Side-channel Analysis of Lattice-based Post-quantum Cryptography: Exploiting Polynomial Multiplication
EXPRESS: A Framework for Execution Time Prediction of Concurrent CNNs on Xilinx DPU Accelerator
Scratchpad memory allocation for data aggregates via interval coloring in superperfect graphs
A Tree-Shaped Tableau for Checking the Satisfiability of Signal Temporal Logic with Bounded Temporal Operators
Energy-Aware Scheduling for Real-Time Systems: A Survey
Introduction to Special Issue on Application of Concurrency to System Design (ACSD'13)
Designing Trusted Embedded Systems from Finite State Machines
Towards Accurate RISC-V Full System Simulation via Component-Level Calibration
Enabling power efficiency through dynamic rerouting on-chip
Usage-Specific Semantic Integration for Cyber-Physical Robot Systems
Superblock FTL: A superblock-based flash translation layer with a hybrid address translation scheme
Flexible filters in stream programs
Sensor deployment and target localization in distributed sensor networks
Editorial: Trust and Security Must Become a Primary Design Concern in Embedded Computing