yusuke1997/dblp-id-title huggingface dataset:
A Novel 10-Bit 2.8-mW TDC Design Using SAR With Continuous Disassembly Algorithm
Subquadratic Space-Complexity Digit-Serial Multipliers Over GF(2 m ) Using Generalized (a, b)-Way Karatsuba Algorithm
Implementing Concurrent Error Detection in Infinite-Impulse-Response Filters
Dissipativity for a Class of Stochastic Nonlinear Systems With State-Dependent Switching
Observer-Based Time-Varying Formation Control of Fractional-Order Multi-Agent Systems With General Linear Dynamics
A 2.2-GHz 3.2-mW DTC-Free Sampling ΔΣ Fractional-N PLL With -110-dBc/Hz In-Band Phase Noise and -246-dB FoM and -83-dBc Reference Spur
Distributed Consensus of Layered Multi-Agent Systems Subject to Attacks on Edges
Front-End Blocks of a W-Band Dicke Radiometer in SiGe BiCMOS Technology
A Low-Reference Spur MDLL-Based Clock Multiplier and Derivation of Discrete-Time Noise Transfer Function for Phase Noise Analysis
An Experimental Method to Extract the Phase-Sensitivity of Oscillators to Noise Perturbations
Weakly-Coupled Resonators in Capacitive Readout Circuits
Spectral Weighting Orthogonal Matching Pursuit Algorithm for Enhanced Out-of-Band Digital Predistortion Linearization
Stochastic Resonance in Simple Electrical Circuits Driven by Quadratic Gaussian Noise
Dynamic Harmonic Analysis With FIR Filters Designed With O-Splines
Dynamic Variability Monitoring Using Statistical Tests for Energy Efficient Adaptive Architectures
A Multichannel Femtoampere-Sensitivity Potentiostat Array for Biosensing Applications
Hardware-Efficient Logic Camouflaging for Monolithic 3-D ICs
Regulation of Nonminimum Phase DC-DC Converters Using Integral Sliding Mode Control Combined With a Disturbance Observer
System embedded ADC calibration for OFDM receivers
LUT Optimization for Memory-Based Computation
Adaptive Compensation of RF Front-End Nonidealities in Direct Conversion Receivers
A Closed-Loop Reconfigurable Switched-Capacitor DC-DC Converter for Sub-mW Energy Harvesting Applications
A novel frequency-domain small-signal analysis of resonant power converters
Analysis of Metastability Errors in Conventional, LSB-First, and Asynchronous SAR ADCs
Low-Parametric-Sensitivity Realizations With Relaxed L 2 -Dynamic-Range-Scaling Constraints
Power-Gated Differential Logic Style Based on Double-Gate Controllable-Polarity Transistors
A Reverse Converter and Sign Detectors for an Extended RNS Five-Moduli Set
Linear Programming Design of Coefficient Decimation FIR Filters
Efficient Implementation of Low-Density Parity-Check Convolutional Code Encoders With Built-In Termination
New Synchronization Stability of Complex Networks With an Interval Time-Varying Coupling Delay
Interconnect energy dissipation in high-speed ULSI circuits
A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor
Maximum Likelihood Estimation-Based SAR ADC
CMOS Transconductors With Nearly Constant Input Ranges Over Wide Tuning Intervals
A high efficiency, soft switching DC-DC converter with adaptive current-ripple control for portable applications
Processing-Task Arrangement for a Low-Complexity Full-Mode WiMAX LDPC Codec
State and Input Simultaneous Estimation for a Class of Time-Delay Systems With Uncertainties
A Design Technique for Energy Reduction in NORA CMOS Logic
Variable Step-Size Affine Projection Maximum Correntropy Criterion Adaptive Filter With Correntropy Induced Metric for Sparse System Identification
Low-Cost and High-Accuracy Design of Fast Recursive MDCT/MDST/IMDCT/IMDST Algorithms and Their Realization
Analysis and optimization of noise in continuous-time OTA-C filters
A novel method for the synthesis of magnetically coupled networks considering the frequency-dependence of the impedances
Design and Implementation of Acoustic Source Localization on a Low-Cost IoT Edge Platform
Performance Analysis of Blind Adaptive MOE Multiuser Receivers Using Inverse QRD-RLS Algorithm
Robust Reconstruction of Continuously Time-Varying Topologies of Weighted Networks
On Improving the Convergence Rate of Linear Continuous-Time Systems Under Constrained Control With State Observers
Analysis, design, and implementation of an active clamp forward converter with synchronous rectifier
A High-Accuracy Adaptive Conditional-Probability Estimator for Fixed-Width Booth Multipliers
A Wireless Multi-Channel Capacitive Sensor System for Efficient Glove-Based Gesture Recognition With AI at the Edge
Selective State Retention Power Gating Based on Formal Verification
A 45-µW, 162.1-dBc/Hz FoM, 490-MHz Two-Stage Differential Ring VCO Without a Cross-Coupled Latch
Single-Inductor-Multiple-Output Switching DC-DC Converters
DS-CDMA Implementation With Iterative Multiple Access Interference Cancellation
A Seven-Octave Broadband LNA MMIC Using Bandwidth Extension Techniques and Improved Active Load
Neuro-Adaptive Cooperative Tracking Rendezvous of Nonholonomic Mobile Robots
A CMOS Voltage Reference Based on Mutual Compensation of Vtn and Vtp
Proportionate NLMS With Unbiasedness Criterion for Sparse System Identification in the Presence of Input and Output Noises
Least-Squares Phase Predistortion of a +30 dBm Class-D Outphasing RF PA in 65 nm CMOS
Analysis and Implementation of a Dual-Band Coupled-Line Trans-Directional Coupler
Radix-2 r Arithmetic for Multiplication by a Constant
An Ultra-Low-Power 16-Bit Second-Order Incremental ADC With SAR-Based Integrator for IoT Sensor Applications
Low Latency GF(2 m ) Polynomial Basis Multiplier
A new proof of the colored branch Theorem
Loop-Filter Design and Analysis for Delta-Sigma Modulators and Oversampled IIR Filters
A 107-pJ/bit 100-kb/s 0.18- muhboxm Capacitive-Coupling Transceiver With Data Edge Signaling and DC Power-Free Pulse Detector for Printable Communication Sheet
A Novel Technique for the Identification of ARMA Systems Under Very Low Levels of SNR
Full-Rate Bang-Bang Phase/Frequency Detectors for Unilateral Continuous-Rate CDRs
A 20 Gb/s Clock and Data Recovery With a Ping-Pong Delay Line for Unlimited Phase Shifting in 65 nm CMOS Process
Delta-Sigma A/D Conversion Via Time-Mode Signal Processing
A DC-to-8.5 GHz 32 : 1 Analog Multiplexer for On-Chip Continuous-Time Probing of Single-Event Transients in a 65-nm CMOS
A Cyclic Scanning Repeater for Enhancing the Remote Distance of LC Passive Wireless Sensors
An Accurate Calculation of Miller Effect on the Frequency Response and on the Input and Output Impedances of Feedback Amplifiers
Optimized Reconfigurable Fast Convolution-Based Transmultiplexers for Flexible Radio Access
Bandwidth Mismatch and Its Correction in Time-Interleaved Analog-to-Digital Converters
A 12.5 mW, 11.1 nV√Hz, -115 dB THD, Settling, 18 bit SAR ADC Driver in 0.6 µm CMOS
Gain Calibration Technique for Increased Resolution in FRC Data Converters
Low-Power 10-Gb/s Transmitter for High-Speed Graphic DRAMs Using 0.18-µm CMOS Technology
Reduced Complexity Algorithm for Spreading Sequence Design
On the Robustness of Look-Up Table Digital Predistortion in the Presence of Loop Delay Error
Sensitivity Characteristics of Inverse Class-E Power Amplifier
Design and Modeling of a Neuro-Inspired Learning Circuit Using Nanotube-Based Memory Devices
4-Gb/s Parallel Receivers With Adaptive FEXT Cancellation by Pulse Width and Amplitude Calibrations
Efficient Implementation of Punctured Parallel Finite Field Multipliers
A Switched-Capacitor Filter With Reduced Sensitivity to Reference Noise for Audio-Band Sigma-Delta D/A Converters
Balanced-to-Balanced Diplexer and Quadruplexer With High Selectivity and Wide CM Suppression
Self-tuning algorithms for high-performance bandpass switched-capacitor ΣΔ modulators
Pinning-Observer-Based Secure Synchronization Control for Complex Dynamical Networks Subject to DoS Attacks
Concurrency techniques for arithmetic coding in JPEG2000
Stable Parallelizable Model Order Reduction for Circuits With Frequency-Dependent Elements
A Linearization Technique for Differential OTAs
Design and Fabrication of an Ultra-Wide Stopband Compact Bandpass Filter
LC-VCO in the 3.3- to 4-GHz Band Implemented in 32-nm Low-Power CMOS Technology
Improved ZVS DC-DC Converter With a High Voltage Gain and a Ripple-Free Input Current
Corrections to "Stability of Multidimensional Systems Using Genetic Algorithms"
Retention-Aware Belief-Propagation Decoding for NAND Flash Memory
Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for high-performance vector rotational DSP applications
Advantages of Geometric Algebra Over Complex Numbers in the Analysis of Networks With Nonsinusoidal Sources and Linear Loads
Robust Video Watermarking of H.264/AVC
Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays
The Holomorphic Embedding Loadflow Method for DC Power Systems and Nonlinear DC Circuits
A 0.045- to 2.5-GHz Frequency Synthesizer With TDC-Based AFC and Phase Switching Multi-Modulus Divider
Low-Complexity First-Two-Minimum-Values Generator for Bit-Serial LDPC Decoding
A Fully-Integrated Low-Dropout Regulator With Full-Spectrum Power Supply Rejection
An Optimization Approach to Single-Bit Quantization
Frequency Sensitivity and Electromechanical Propagation Simulation Study in Large Power Systems
A Low-Complexity High-Radix RNS Multiplier
Spectral Analysis of Pulsewidth-Modulated Sampled Signals
A New Method for Determining the Generalised Frequency Response Functions of Nonlinear Systems
Fundamental Considerations of Three-Level DC-DC Converters: Topologies, Analyses, and Control
Multimode Oscillations in Coupled Oscillators With High-Order Nonlinear Characteristics
A Fully Integrated IC With 0.85-μW/Channel Consumption for Epileptic iEEG Detection
A Low-Leakage Open-Loop Frequency Synthesizer Allowing Small-Area On-Chip Loop Filter
A 160-GHz Frequency-Translation Phase-Locked Loop With RSSI Assisted Frequency Acquisition
The Response Bounds of Unknown Nonlinear Systems With Sinusoidal Input
A 12.1 fJ/Conv.-Step 12b 140 MS/s 28-nm CMOS Pipelined SAR ADC Based on Energy-Efficient Switching and Shared Ring Amplifier
Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates
A 0.052 mm 2 , <0.4% THD, Sinusoidal Current Generator for Bio-Impedance Measurement Using a Recursive Digital Oscillator and Current-Domain FIR Filter
Reflective-Type Phase Shifters for Multiple-Antenna Transceivers
Compact and Wideband Octuple-Mode Filter Based on Hybrid Substrate Integrated Waveguide and Spoof Localized Surface Plasmon Structure
Estimation of n Frequencies Using Adaptive Notch Filter
A High-Speed and EDP-Efficient Range-Matching Scheme for Packet Classification
A 1.2 V-20 V Closed-Loop Charge Pump for High Dynamic Range Photodetector Array Biasing
Analysis of the Effect of Switch Parasitic Resistance and Capacitance on N-Path Filters Using State Space Representation
Real-Time Multi-User Detection Engine Design for IoT Applications via Modified Sparsity Adaptive Matching Pursuit
Design of a 0.20-0.25-V, Sub-nW, Rail-to-Rail, 10-bit SAR ADC for Self-Sustainable IoT Applications
Adaptive Discrete-Time Higher Order Sliding Mode
Design of Parallel Tomlinson-Harashima Precoders
An Energy Combiner for a Multi-Input Energy-Harvesting System
Rapid Simulation of Photonic Integrated Circuits Using Verilog-A Compact Models
Finite-Time Bipartite Consensus for Multi-Agent Systems on Directed Signed Networks
Global Nested PID Control of Strict-Feedback Nonlinear Systems With Prescribed Output and Virtual Tracking Performance
Linear Passive Networks With Ideal Switches: Consistent Initial Conditions and State Discontinuities
Analysis of Second-Order Intermodulation in Miller Bandpass Filters
A Precision Pseudo Resistor Bias Scheme for the Design of Very Large Time Constant Filters
CMOS 256-Pixel/480-Pixel Photovoltaic-Powered Subretinal Prosthetic Chips With Wide Image Dynamic Range and Bi/Four-Directional Sharing Electrodes and Their Ex Vivo Experimental Validations With Mice
Cross Connected Compact Switched-Capacitor Multilevel Inverter (C 3 -SCMLI) Topology With Reduced Switch Count
Reconfigurable Impedance Matching Networks With Controllable Phase Shift
A Cost-Aware Framework for Lifetime Reliability of TSV-Based 3D-IC Design
Reconfigurable Chireix Outphasing Power Amplifier Over Multiple Frequency Bands
Adaptive-Bandwidth Phase-Locked Loop With Continuous Background Frequency Calibration
A Pipelined FFT Architecture for Real-Valued Signals
Design of stable IIR digital filter based on least P-power error criterion
Analysis of First-Order Anti-Aliasing Integration Sampler
A Generalized Algorithm and Reconfigurable Architecture for Efficient and Scalable Orthogonal Approximation of DCT
Adaptively biased linear transconductor
Expandable Networks for Neuromorphic Chips
A 10.7b 300MS/s Two-Step Digital-Slope ADC in 65nm CMOS
A comparison by simulation and by measurement of the substrate noise generated by CMOS, CSL, and CBL digital circuits
A Temperature-Independent Transmitter IC for 5.8-GHz DSRC Applications
Cooperative Stabilization of a Class of LTI Plants With Distributed Observers
Variable-Node-Shift Based Architecture for Probabilistic Gradient Descent Bit Flipping on QC-LDPC Codes
A 678-µW Frequency-Modulation-Based ADC With 104-dB Dynamic Range in 44-kHz Bandwidth
A 1.2-V Self-Reconfigurable Recursive Mixer With Improved IF Linearity in 130-nm CMOS
Digital Mismatch Correction for Bandpass Sampling Four-Channel Time-Interleaved ADCs in Direct-RF Sampling Receivers
Design of low-power analog drivers based on slew-rate enhancement circuits for CMOS low-dropout regulators
Gaussian Pyramid: Comparative Analysis of Hardware Architectures
A Fully Integrated Temperature-Independent Reconfigurable Acoustic Transmitter With Digital On-Chip Resistor Temperature Coefficient Calibration for Oil Drilling Application
Resonators in Open-Loop Sigma-Delta Modulators
Reconfigurable architectures for bio-sequence database scanning on FPGAs
Probabilistic optimization for FPGA board level routing problems
An Improved Variable Kernel Width for Maximum Correntropy Criterion Algorithm
Model Order Reduction Based on Dynamic Relative Gain Array for MIMO Systems
SiGe HMODFET "KAIST" micropower model and amplifier realization
A Charge Sensitive Pre-Amplifier for Smart Point-of-Care Devices Employing Polymer-Based Lab-on-a-Chip
An Ultra Low-Power Solution for EEPROM in Passive UHF RFID Tag IC With a Novel Read Circuit and a Time-Divided Charge Pump
Morphological Lifting Scheme for Current Transformer Saturation Detection and Compensation
High-Throughput Interpolation Architecture for Algebraic Soft-Decision Reed-Solomon Decoding
Embedding MATLAB Optimizers in SIMSIDES for the High-Level Design of ΣΔ Modulators
Rigorous Study of the Chua's Circuit Spiral Attractor
Projected Tolerances of Carbon Nanotube Current-Mode Logic to Process Variability
Fast Hardware Architecture for 2-D Separable Convolution Operations
A 10-Gb/s Inductorless Transimpedance Amplifier
A Two-Step Prediction ADC Architecture for Integrated Low Power Image Sensors
A 0.03- to 3.6-GHz Frequency Synthesizer With Self-Biased VCO and Quadrature-Input Quadrature-Output Frequency Divider
Analysis and Design of a 0.1-23 GHz LNA MMIC Using Frequency-Dependent Feedback
A Causal Model for Linear RF Systems Developed From Frequency-Domain Measured Data
An Enhanced Frequency-Ratio Coupled-Line Dual-Frequency Wilkinson Power Divider
An analytical procedure for critical frequency tuning of FIR filters
A CMOS Current-Mode Dynamic Programming Circuit
An All-Digital PWM Transmitter With Enhanced Phase Resolution
A Built-In-Test Circuit for RF Differential Low Noise Amplifiers
A Comprehensive Comparison of Data Stability Enhancement Techniques With Novel Nanoscale SRAM Cells Under Parameter Fluctuations
A Second-Order ΔΣ Time-to-Digital Converter Using Highly Digital Time-Domain Arithmetic Circuits
Global robust stability of a class of discrete-time interval neural networks
Synchronization of Dynamical Networks With Nonidentical Nodes: Criteria and Control
83.9% Efficiency 100-mV Self-Startup Boost Converter for Thermoelectric Energy Harvester in IoT Applications
Design of a 24-GHz CMOS VCO With an Asymmetric-Width Transformer
A Low-Supply-Voltage CMOS Sub-Bandgap Reference
Analysis of Start-Up Response in a Digitally Controlled Boost Converter With Constant Power Load and Mitigation of Inrush Current Problems
Static State-Feedback Controller and Observer Design for Interval Positive Systems With Time Delay
H INFINITY Control With Initial Conditions
Design of Reconfigurable Digital IF Filter With Low Complexity
A new Schmitt trigger circuit in a 0.13-μm 1/2.5-V CMOS process to receive 3.3-V input signals
A Low-Phase Noise, Anti-Harmonic Programmable DLL Frequency Multiplier With Period Error Compensation for Spur Reduction
An LC Quadrature VCO Using Capacitive Source Degeneration Coupling to Eliminate Bi-Modal Oscillation
A simple technique to evaluate the noise spectral density in operational amplifier based circuits using the adjoint network theory
Design of binary sequences with tunable exponential autocorrelations and run statistics based on one-dimensional chaotic maps
A transmitter architecture for nonconstant envelope modulation
Pseudorandom Bit Generation Using Coupled Congruential Generators
Obstacle-avoiding rectilinear minimum-delay Steiner tree construction toward IP-block-based SOC design
Low-Noise Broadband CMOS TIA Based on Multi-Stage Stagger-Tuned Amplifier for High-Speed High-Sensitivity Optical Communication
Low-Power Ternary Content-Addressable Memory Design Using a Segmented Match Line
High Efficiency Doherty Power Amplifier Using Dual-Adaptive Biases
Supporting the Momentum Training Algorithm Using a Memristor-Based Synapse
Design of Class-E Amplifier With MOSFET Linear Gate-to-Drain and Nonlinear Drain-to-Source Capacitances
A Low-Voltage Fourth-Order Cascade Delta-Sigma Modulator in 0.18-muhboxm CMOS
Robust Adaptive Control of Unknown Modified Cohen-Grossberg Neural Networks With Delays
Wideband and Miniaturized Forward-Wave Directional Coupler Using Periodical Parallel Plates and Vertical Meander Lines
Synthesis and analysis for a novel single-stage isolated high power factor correction converter
Hot-Swappable Grid-Connected Multilevel Converter for Battery Energy Storage System
An Improved Cellular Nonlinear Network Architecture for Binary and Grayscale Image Processing
A 56-to-66 GHz CMOS Low-Power Phased-Array Receiver Front-End With Hybrid Phase Shifting Scheme
A CMOS Gas Sensor Array Platform With Fourier Transform Based Impedance Spectroscopy
A novel floating lossy inductance realization topology with NICs using current conveyors
Adaptive Observer-Based Synchronization of Chaotic Systems With First-Order Coder in the Presence of Information Constraints
A simple and efficient design of variable fractional delay FIR filters
Blind Identification of MIMO Channels Using Optimal Periodic Precoding
Heterogeneous SRAM Cell Sizing for Low-Power H.264 Applications
State-of-the-Art and Future Directions of High-Performance All-Digital Frequency Synthesis in Nanometer CMOS
Notes on the State Space Realizations of Rational Order Transfer Functions
Desensitized CMOS Low-Noise Amplifiers
A 95-dB linear low-power variable gain amplifier
A Design-Oriented Combined Approach for Bifurcation Prediction in Switched-Mode Power Converters
Pinning Synchronization of Nonlinear Coupled Lur'e Networks Under Hybrid Impulses
Design of Dual-Band Bandpass Filters With Fixed and Reconfigurable Bandwidths Based on Terminated Cross-Shaped Resonators
A 0.65-V, 11.2-Gb/s Power Noise Tolerant Source-Synchronous Injection-Locked Receiver With Direct DTLB DFE
Corrections to 'Area- and Power-Efficient Design of Daubechies Wavelet Transforms Using Folded AIQ Mapping'
Generalized noise analysis technique for four-port linear networks
Design of Equal-Ripple Dual-Wideband Bandpass Filter With Minimum Design Parameters Based on Cross-Shaped Resonator
Parallel Correction and Adaptation Engines for I/Q Mismatch Compensation
An Efficient DPA Countermeasure With Randomized Montgomery Operations for DF-ECC Processor
Output Regulation for Switched Systems With Multiple Disturbances
Theoretical Comparison of Direct-Sampling Versus Heterodyne RF Receivers
Theories, Analysis, and Bounds of the Finite-Support Approximation for the Inverses of Mixing-Phase FIR Systems
A State-Space Approach to Intermodulation Distortion Estimation in Fully Balanced Bandpass G m - C Filters With Weak Nonlinearities
1.2-V 5-μW class-AB CMOS log-domain integrator with multidecade tuning
Pole-Zero Assignment of All-Pass-Based Notch Filters
On the stability of linear repetitive processes described by a delay-difference equation
Effects of Couplings on the Collective Dynamics of Permanent-Magnet Synchronous Motors
Formation Control of Multiple Autonomous Underwater Vehicles Under Communication Delays
A 0.3-V 1-µW Super-Regenerative Ultrasound Wake-Up Receiver With Power Scalability
Device Modelling for Bendable Piezoelectric FET-Based Touch Sensing System
A High-Throughput VLSI Architecture for Hard and Soft SC-FDMA MIMO Detectors
A six-phase multilevel inverter for MEMS electrostatic induction micromotors
A 1-mW Solar-Energy-Harvesting Circuit Using an Adaptive MPPT With a SAR and a Counter
A UHF-RFID Transceiver With a Blocker-Canceller Feedback and +30 dBm Output Power
A Highly Efficient X-Band Inverse Class-F SiGe HBT Cascode Power Amplifier With Harmonic-Tuned Wilkinson Power Combiner
A Novel Hybrid Monotonic Local Search Algorithm for FIR Filter Coefficients Optimization
Supply-Doubled Pulse-Shaping High Voltage Pulser for CMUT Arrays
A 0.6-V 38-nW 9.4-ENOB 20-kS/s SAR ADC in 0.18- μm CMOS for Medical Implant Devices
A Tunable Transmission Line With Controllable Phase Shifting and Characteristic Impedance
On the Design of Broadband Power-to-Current Low Noise Amplifiers
Effect of OPAMP Input Offset on Continuous-Time ΔΣ Modulators With Current-Mode DACs
State-space harmonic distortion modeling in weakly nonlinear, fully balanced G m -C filters-a modular approach resulting in closed-form solutions
Novel Hybrid CMOS/Memristor Implementation of the AES Algorithm Robust Against Differential Power Analysis Attack
Low-Complexity Maximally-Decimated Multirate 3-D Spatio-Temporal FIR Cone and Frustum Filters
A Secure Distributed Information Sharing Algorithm Based on Attack Detection in Multi-Task Networks
A 50μW Fully Differential Interface Amplifier With a Current Steering Class AB Output Stage for PPG and NIRS Recordings
Simplified Unified Analysis of Switched-RC Passive Mixers, Samplers, and N-Path Filters Using the Adjoint Network
A Chopper Stabilized Biasing Circuit Suitable for Cascaded Wheatstone-Bridge-Like Sensors
Analysis and Design of a Thermoelectric Energy Harvesting System With Reconfigurable Array of Thermoelectric Generators for IoT Applications
Fast Static Characterization of Residual-Based ADCs
Novel Design Algorithm for Low Complexity Programmable FIR Filters Based on Extended Double Base Number System
A Wideband Dual-Mode LC-VCO With a Switchable Gate-Biased Active Core
Guest Editorial Special Issue on ISCAS 2008
A Calibration-Free Ring-Oscillator PLL With Gain Tracking Achieving 9% Jitter Variation Over PVT
Switching Event Detection and Self-Termination Programming Circuit for Energy Efficient ReRAM Memory Arrays
Real-Time Highly Accurate Dense Depth on a Power Budget Using an FPGA-CPU Hybrid SoC
Stabilizing Controller Design for Quasi-Resonant Converters Described by a Class of Piecewise Linear Models
Sinusoidal Clock Sampling for Multigigahertz ADCs
Comments and Corrections on "Stability of Genetic Regulatory Networks With Time Delay"
Evidence of crossover phenomena in wind-speed data
Synthesis of a Passive Complex Filter Using Transformers
Energy-Efficient Nonvolatile Flip-Flop With Subnanosecond Data Backup Time for Fine-Grain Power Gating
A gain stabilization technique for tuned RF low-noise amplifiers
A CMOS UHF Harmonic Rejection Transceiver With 2-D LO Phase Calibration for TV White Space Applications
An Analogue Neuromorphic Co-Processor That Utilizes Device Mismatch for Learning Applications
Input-Output Decoupling With Asymptotic Stability for Linear Circuits Through Interconnection
Reset noise reduction in capacitive sensors