yusuke1997/dblp-id-title huggingface dataset:
A submicrometer CMOS embedded SRAM compiler
A Modelling and Nonlinear Equalization Technique for a 20 Gb/s 0.77 pJ/b VCSEL Transmitter in 32 nm SOI CMOS
A Compact and Low-Power Fractionally Injection-Locked Quadrature Frequency Synthesizer Using a Self-Synchronized Gating Injection Technique for Software-Defined Radios
A 130-MHz 8-b CMOS video DAC for HDTV applications
A Thermoelectric Energy-Harvesting Interface With Dual-Conversion Reconfigurable DC-DC Converter and Instantaneous Linear Extrapolation MPPT Method
An 8 Gb/s/pin 9.6 ns Row-Cycle 288 Mb Deca-Data Rate SDRAM With an I/O Error Detection Scheme
A 30-MHz hybrid analog/digital clock recovery circuit in 2- mu m CMOS
High-performance GaAs switch IC's fabricated using MESFET's with two kinds of pinch-off voltages and a symmetrical pattern configuration
A High Voltage Self-Biased Integrated DC-DC Buck Converter With Fully Analog MPPT Algorithm for Electrostatic Energy Harvesters
Guest Editorial Introduction to the Special Issue on the 2022 Symposium on VLSI Circuits
Delay components of a current mode logic circuit and their current dependency
A 2.9-4.0-GHz Fractional-N Digital PLL With Bang-Bang Phase Detector and 560-fs rms Integrated Jitter at 4.5-mW Power
PUF Architecture with Run-Time Adaptation for Resilient and Energy-Efficient Key Generation via Sensor Fusion
A 20-mW 640-MHz CMOS Continuous-Time $\Sigma\Delta$ ADC With 20-MHz Signal Bandwidth, 80-dB Dynamic Range and 12-bit ENOB
Pipelined, time-sharing access technique for an integrated multiport memory
A delta-sigma modulator for a 1-bit digital switching amplifier
BiCMOS circuits for high speed current mode D/A converters
A Dynamic-Precision Bit-Serial Computing Hardware Accelerator for Solving Partial Differential Equations Using Finite Difference Method
An adaptive ENG amplifier for tripolar cuff electrodes
A 2 , ˟, 25-Gb/s Receiver With 2: 5 DMUX for 100-Gb/s Ethernet
A Multimode Transmitter in 0.13 µm CMOS Using Direct-Digital RF Modulator
A new, precharged, low-power logic family for GaAs circuits
Comments on "New single-clock CMOS latches and flip-flops with improved speed and power savings"
A 100 fps, Time-Correlated Single-Photon-Counting-Based Fluorescence-Lifetime Imager in 130 nm CMOS
A single-chip tri-band (2100, 1900, 850/800 MHz) WCDMA/HSDPA cellular transceiver
Fully Analog, Multi-Lag, RF Correlators for Code-Domain Radars Using Margin Propagation
A 64-point Fourier transform chip for high-speed wireless LAN application using OFDM
A microprogrammable real-time video signal processor (VSP) for motion compensation
GaAs converter IC's for C-band DBS receivers
A 64-Pixel 0.42-THz Source SoC With Spatial Modulation Diversity for Computational Imaging
A 1-Gb SDRAM with ground-level precharged bit line and nonboosted 2.1-V word line
Adaptive Algorithm Using Hot-Electron Injection for Programming Analog Computational Memory Elements Within 0.2% of Accuracy Over 3.5 Decades
A low-light-level sensor for medical diagnostic applications
Physically realistic fault models for analog CMOS neural networks
A 430 MHz, 280 mW Processor for the Conversion of Cartesian to Polar Coordinates in 0.25 µm CMOS
Integrated Gate Drivers Based on High-Voltage Energy Storing for GaN Transistors
A 21-mW 4-Mb CMOS SRAM for battery operation
Design of a very linear CMOS transconductance input stage for continuous-time filters
A 1-Kbit EEPROM in SIMOX technology for high-temperature applications up to 250°C
A Code-Domain RF Signal Processing Front End With High Self-Interference Rejection and Power Handling for Simultaneous Transmit and Receive
Modeling of loaded uniform RC lines for computer-aided analysis
A 1-mW Class-AB Amplifier With -101 dB THD+N for High-Fidelity 16 $\Omega$ Headphones in 65-nm CMOS
Novel frame buffer pixel circuits for liquid-crystal-on-silicon microdisplays
Analysis and Design of a Millimeter-Wave Cavity-Backed Circularly Polarized Radiator Based on Fundamental Theory of Multi-Port Oscillators
A system LSI memory redundancy technique using an ie-flash (inverse-gate-electrode flash) programming circuit
A monolithic 156 Mb/s clock and data recovery PLL circuit using the sample-and-hold technique
A Cancellation Technique for Reciprocal-Mixing Caused by Phase Noise and Spurs
Single-Inductor Multi-Output (SIMO) DC-DC Converters With High Light-Load Efficiency and Minimized Cross-Regulation for Portable Devices
A Micro-Power Two-Step Incremental Analog-to-Digital Converter
Optimal synthesis of high-performance architectures
A 21-26-GHz SiGe bipolar power amplifier MMIC
A Real-Time, 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET
A Blocker Filtering Technique for SAW-Less Wireless Receivers
Design Methodology for a 40-GSamples/s Track and Hold Amplifier in 0.18-$muhbox m$SiGe BiCMOS Technology
A 900 Mb/s bidirectional signaling scheme
A novel active feedback flyback with only 100-mV inductive overshoot for a standard low-voltage CMOS inductive load driver, in a single-chip controller for 73 relays in a POTS/ADSL splitter application
A 92.7%-Efficiency 6.78-MHz Energy-Resuscitating Resonant Regulating Rectifier With Dual Outputs for Wirelessly Powered Devices
0.04-mm 2 103-dB-A Dynamic Range Second-Order VCO-Based Audio ΣΔ ADC in 0.13-µm CMOS
A generalized approach to routing mixing analog and digital signal nets in a channel
A Reconfigurable Hybrid Series/Parallel Doherty Power Amplifier With Antenna VSWR Resilient Performance for MIMO Arrays
InP-HBT chip-set for 40-Gb/s fiber optical communication systems operational at 3 V
A general-purpose high-speed equalizer
A Fully Decoupled LC Tank VCO Topology for Amplitude Boosted Low Phase Noise Operation
VOTA: A Heterogeneous Multicore Visual Object Tracking Accelerator Using Correlation Filters
An acoustic echo canceler
Active-feedback frequency-compensation technique for low-power multistage amplifiers
A fully electronic DNA sensor with 128 positions and in-pixel A/D conversion
A -28.5-dB EVM 64-QAM 45-GHz Transceiver for IEEE 802.11aj
A Fully Integrated Ka-Band VSAT Down-Converter
A 60-ns 3.3-V-only 16-Mbit DRAM with multipurpose register
A 3.7 mW Low-Noise Wide-Bandwidth 4.5 GHz Digital Fractional-N PLL Using Time Amplifier-Based TDC
100 Gb/s Differential Linear TIAs With Less Than 10 pA/√Hz in 130-nm SiGe: C BiCMOS
A transimpedance CMOS multichannel amplifier with a 50 Ω-wide output range buffer for high counting rate applications
A General Theory of Injection Locking and Pulling in Electrical Oscillators - Part I: Time-Synchronous Modeling and Injection Waveform Design
A 14b 60 MS/s Pipelined ADC Adaptively Cancelling Opamp Gain and Nonlinearity
A 240 × 180 130 dB 3 µs Latency Global Shutter Spatiotemporal Vision Sensor
A subnanosecond Josephson 16-bit ALU
A 60 GHz, 802.11ad/WiGig-Compliant Transceiver for Infrastructure and Mobile Applications in 130 nm SiGe BiCMOS
Flexible Baseband Analog Circuits for Software-Defined Radio Front-Ends
A single-chip dual-band direct-conversion IEEE 802.11a/b/g WLAN transceiver in 0.18-μm CMOS
A 28-nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs
A 2.4-GHz Resistive Feedback LNA in 0.13-µm CMOS
A Monolithic Digital Ripple-Based Adaptive-Off-Time DC-DC Converter With a Digital Inductor Current Sensor
Miniaturized BJT-Based Thermal Sensor for Microprocessors in 32- and 22-nm Technologies
A universal dual band LNA implementation in SiGe technology for wireless applications
Design of a 100-MHz 10-mW 3-V sample-and-hold amplifier in digital bipolar technology
A 5-mW sigma-delta modulator with 84-dB dynamic range for GSM/EDGE
MulTCIM: Digital Computing-in-Memory-Based Multimodal Transformer Accelerator With Attention-Token-Bit Hybrid Sparsity
A 4.8-6.4-Gb/s serial link for backplane applications using decision feedback equalization
Analysis and Design of a 20-MHz Bandwidth Continuous-Time Delta-Sigma Modulator With Time-Interleaved Virtual-Ground-Switched FIR Feedback
A Reusable Superheterodyne Dual-Band Down-Conversion Mixer With Hybrid Linearity-Enhanced Technique for 5G Non-Contiguous Multiband NR
A Wireless Battery-Free Cerebral-Oxygen-Monitoring Micro-System Featuring 0.21-mmHg Sensing Resolution
An audio amplifier providing up to 1 Watt in standard digital 90-nm CMOS
A shared-well dual-supply-voltage 64-bit ALU
A 1.2-GS/s 8-b silicon bipolar track & hold IC
A 14-bit 4-MS/s VCO-Based SAR ADC With Deep Metastability Facilitated Mismatch Calibration
Near-Optimal Equalizer and Timing Adaptation for I/O Links Using a BER-Based Metric
10 GB/s bit-synchronizer circuit with automatic timing alignment by clock phase shifting using quantum-well AlGaAs/GaAs/AlGaAs
A background optimization method for PLL by measuring phase jitter performance
A Fully Integrated Multi-Phase Buck Converter With On-Chip Capacitor Dynamic Re-Allocation and Fine-Grained Phase-Shedding Techniques
Analyses and design of bias circuits tolerating output voltages above BV CEO
All-Digital PLL for Bluetooth Low Energy Using 32.768-kHz Reference Clock and ≤0.45-V Supply
Low-power embedded SRAM with the current-mode write technique
Multigate-Cell Stacked FET Design for Millimeter-Wave CMOS Power Amplifiers
A CMOS passive mixer with low flicker noise for low-power direct-conversion receiver
An Ultra-Wideband 7-Bit 5-Gsps ADC Implemented in Submicron InP HBT Technology
Measurement of VLSI power supply current by electron-beam probing
A CMOS 18 THzΩ 248 Mb/s transimpedance amplifier and 155 Mb/s LED-driver for low cost optical fiber links
A 20 W/Channel Class-D Amplifier With Near-Zero Common-Mode Radiated Emissions
In-place updating of path metrics in Viterbi decoders
A CMOS Ultra-Wideband Receiver for Low Data-Rate Communication
A Design Method and Developments of a Low-Power and High-Resolution Multiphase Generation System
A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC-DC Converter With Inherent Current Equalization Characteristics
A 94.3% Peak Efficiency Adaptive Switchable CCM and DCM Single-Inductor Multiple-Output Converter With 0.03 mV/mA Low Crosstalk and 185 nA Ultralow Quiescent
A Quadrature Class-G Complex-Domain Doherty Digital Power Amplifier
Introduction to the Special Issue on the 2011 IEEE International Solid-State Circuits Conference
A 0.4-μm CMOS 10-Gb/s 4-PAM pre-emphasis serial link transmitter
CMOS two-quadrant multiplier using transistor triode regime
A 50 nW-to-10 mW Output Power Tri-Mode Digital Buck Converter With Self-Tracking Zero Current Detection for Photovoltaic Energy Harvesting
Universal low cost controller for electric motors with programmable characteristic curves
High-Throughput Dynamic Time Warping Accelerator for Time-Series Classification With Pipelined Mixed-Signal Time-Domain Computing
Frequency Reconfigurable mm-Wave Power Amplifier With Active Impedance Synthesis in an Asymmetrical Non-Isolated Combiner: Analysis and Design
A CMOS Wideband Current-Mode Digital Polar Power Amplifier With Built-In AM-PM Distortion Self-Compensation
Fast acquisition clock and data recovery circuit with low jitter
A 32-MHz, 34-μW Temperature-Compensated RC Oscillator Using Pulse Density Modulated Resistors
A 1.5-V 0.7-2.5-GHz CMOS Quadrature Demodulator for Multiband Direct-Conversion Receivers
A W-band CMOS Receiver Chipset for Millimeter-Wave Radiometer Systems
A single-chip CMOS 306×244-pixel NTSC video camera and a descendant coprocessor device
A Power-Efficient Receiver Architecture Employing Bias-Current-Shared RF and Baseband With Merged Supply Voltage Domains and 1/f Noise Reduction
CHIMERA: A 0.92-TOPS, 2.2-TOPS/W Edge AI Accelerator With 2-MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference
A Single-Channel Voltage-Scalable 8-GS/s 8-b >37.5-dB SNDR Time-Domain ADC With Asynchronous Pipeline Successive Approximation in 28-nm CMOS
20-GHz Quadrature Injection-Locked LC Dividers With Enhanced Locking Range
Analog CMOS deterministic Boltzmann circuits
Chip-package hybrid clock distribution network and DLL for low jitter clock delivery
SiP Tuner With Integrated LC Tracking Filter for Both Cable and Terrestrial TV Reception
A CMOS four-channel*1K time memory LSI with 1-ns/b resolution
Introduction to the Special Issue on the 2006 Symposium on VLSI Circuits
A 1.8-V 6-bit 1.3-GHz flash ADC in 0.25-μm CMOS
A 310-nA Quiescent Current 3-fs-FoM Fully Integrated Capacitorless Time-Domain LDO With Event-Driven Charge Pump and Feedforward Transient Enhancement
An Isolated DC-DC Converter Using a Cross-Coupled Shoot-Through-Free Class-D Oscillator With Low EMI Emissions
A 1-GHz bipolar class-AB operational amplifier with multipath nested Miller compensation for 76-dB gain
A low-voltage low-power fully-integratable automatic gain control for hearing instruments
Trainer: An Energy-Efficient Edge-Device Training Processor Supporting Dynamic Weight Pruning
Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction
A Digitally Calibrated Bandgap Reference With 0.06% Error for Low-Side Current Sensing Application
Triple-Push Operation for Combined Oscillation/Divison Functionality in Millimeter-Wave Frequency Synthesizers
Beware the three-way arbiter
A 6-bit 800-MS/s Pipelined A/D Converter With Open-Loop Amplifiers
T-REX: Hardware-Software Co-Optimized Transformer Accelerator With Reduced External Memory Access and Enhanced Hardware Utilization
A semidigital dual delay-locked loop
A monolithic digital chirp synthesizer chip with I and Q channels
An SoC with 1.3 gtexels/s 3-D graphics full pipeline for consumer applications
A digitally controlled phase-locked loop with a digital phase-frequency detector for fast acquisition
A 10-bit 2.6-GS/s Time-Interleaved SAR ADC With a Digital-Mixing Timing-Skew Calibration Technique
Itanium TM Processor system bus design
On-Chip THz Spectroscope Exploiting Electromagnetic Scattering With Multi-Port Antenna
A CMOS 10-gb/s SONET transceiver
96-GHz static frequency divider in SiGe bipolar technology
Dynamic body charge modulation for sense amplifiers in partially depleted SOI technology
A Fully Integrated 27-dBm Dual-Band All-Digital Polar Transmitter Supporting 160 MHz for Wi-Fi 6 Applications
A 3T Gain Cell Embedded DRAM Utilizing Preferential Boosting for High Density and Low Power On-Die Caches
A 40-nm Embedded SG-MONOS Flash Macro for High-End MCU Achieving 200-MHz Random Read Operation and 7.91-Mb/mm 2 Density With Charge-Assisted Offset Cancellation Sense Amplifier
A high-Q bandpass fully differential SC filter with enhanced testability
A 0.34-THz Wideband Wide-Angle 2-D Steering Phased Array in 0.13- $\mu$ m SiGe BiCMOS
A 0.53 THz Reconfigurable Source Module With Up to 1 mW Radiated Power for Diffuse Illumination in Terahertz Imaging Applications
RELIANT: a reliability analysis tool for VLSI interconnect
A Scalable and Instantaneously Wideband RF Correlator Based on Margin Computing
A low-noise CMOS preamplifier operating at 4.2 K
A Si bipolar phase and frequency detector IC for clock extraction up to 8 Gb/s
A 12-Gb/s -16.8-dBm OMA Sensitivity 23-mW Optical Receiver in 65-nm CMOS
A 630 MHz, 76 mW Direct Digital Frequency Synthesizer Using Enhanced ROM Compression Technique
Physical modeling of lateral scaling in bipolar transistors
A Micropower Low-Noise Neural Recording Front-End Circuit for Epileptic Seizure Detection
A 3/5 V compatible I/O buffer
A complete 400-Mb/s burst-mode data OEIC receiver
A Single-Die 124 dB Stereo Audio Delta-Sigma ADC With 111 dB THD
A MOS implementation of totally self-checking checker for the 1-out-of-3 code
A 96.2-nJ/class Neural Signal Processor With Adaptable Intelligence for Seizure Prediction
A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR With a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS
A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology
A Compact Resistor-Based CMOS Temperature Sensor With an Inaccuracy of 0.12 °C (3σ) and a Resolution FoM of 0.43 pJ⋅K 2 in 65-nm CMOS
A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors
A 134-μW 99.4-dB SNDR Audio Continuous-Time Delta-Sigma Modulator With Chopped Negative-R and Tri-Level FIR-DAC
Sampling Circuits That Break the kT/C Thermal Noise Limit
A 3.5 ns/77 K and 6.2 ns/300 K 64 K CMOS RAM with ECL interfaces
A fast-settling GaAs-enhanced frequency synthesizer
A compact model of MOSFET mismatch for circuit design
Digitally programmable accurate current sources for logarithmic control of the amplification or attenuation in a gain cell
BiCMOS circuits for DPCM coders in HDTV systems
A Filter-Embedded Pipe-SAR ADC With Progressive Conversion and Floating Charge Transfer Amplifier
A 35-GS/s, 4-Bit Flash ADC With Active Data and Clock Distribution Trees
Deterministic Frequency and Voltage Enhancements on the POWER10 Processor
The impact of transistor sizing on power efficiency in submicron CMOS circuits
A 2-V 900-MHz monolithic CMOS dual-loop frequency synthesizer for GSM receivers
Second-order sigma-delta modulation for digital-audio signal acquisition
A single-chip public key encryption subsystem
Very-high-speed Si bipolar static frequency dividers with new T-type flip-flops
An analysis of flicker noise rejection in low-power and low-voltage CMOS mixers
A 15-GHz gate array implemented with AlGaAs/GaAs heterojunction bipolar transistors
A common-gate switched 0.9-W class-E power amplifier with 41% PAE in 0.25-μm CMOS
A 64 Gb/s/pin Single-Ended PAM-4 Transmitter With a Merged Preemphasis Capacitive-Peaking Crosstalk Cancellation Scheme for Memory Interfaces in 28-nm CMOS
Pulse-width modulation pre-emphasis applied in a wireline transmitter, achieving 33 dB loss compensation at 5-Gb/s in 0.13-μm CMOS
Low-Power High-Throughput LDPC Decoder Using Non-Refresh Embedded DRAM
A 3.1- to 8.2-GHz zero-IF receiver and direct frequency synthesizer in 0.18-μm SiGe BiCMOS for mode-2 MB-OFDM UWB communication
A 0.9-μm 2 1T1R Bit Cell in 14-nm High-Density Metal Fuse Technology for High-Volume Manufacturing and In-Field Programming
Large-signal 2T, 1C DRAM cell: signal and layout analysis
An x86-64 Core in 32 nm SOI CMOS
An Event-Driven Multi-Kernel Convolution Processor Module for Event-Driven Vision Sensors
A 1 Mb Nonvolatile Embedded Memory Using 4T2MTJ Cell With 32 b Fine-Grained Power Gating Scheme
Monolithic above-IC resonator technology for integrated architectures in mobile and wireless communication
An efficient CMOS line driver for 1.544-Mb/s T1 and 2.048-Mb/s E1 applications
A Wirelessly Powered UWB RFID Sensor Tag With Time-Domain Analog-to-Information Interface
A 36-Channel Auto-Calibrated Front-End ASIC for a pMUT-Based Miniaturized 3-D Ultrasound System
A 212 MPixels/s 4096 ˟ 2160p Multiview Video Encoder Chip for 3D/Quad Full HDTV Applications
Multiemitter BiCMOS CML circuits
Fully Integrated Capacitive DC-DC Converter With All-Digital Ripple Mitigation Technique
A 26.6-119.3-μW 101.9-dB SNR Direct Digitization Bio-Impedance Readout IC
A 0.66e rms - Temporal-Readout-Noise 3-D-Stacked CMOS Image Sensor With Conditional Correlated Multiple Sampling Technique
SleepWalker: A 25-MHz 0.4-V Sub-mm 2 7-µW/MHz Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes
A 266-μW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77-dB SFDR and -3-dBm OOB-B -1 dB
A 56 mW Continuous-Time Quadrature Cascaded ΣΔ Modulator With 77 dB DR in a Near Zero-IF 20 MHz Band
An Adhesive Interposer-Based Reconfigurable Multi-Sensor Patch Interface With On-Chip Quantized Time-Domain Feature Extraction
A Nyquist-rate pixel-level ADC for CMOS image sensors
A 12.5-Gb/s Parallel Phase Detection Clock and Data Recovery Circuit in 0.13-$muhbox m$CMOS
Power consumption estimation in CMOS VLSI chips
A 33.6-to-33.8 Gb/s Burst-Mode CDR in 90 nm CMOS Technology
An 8-Core MIPS-Compatible Processor in 32/28 nm Bulk CMOS
A BiCMOS technology with 660-MHz vertical p-n-p transistor for analog/digital ASICs
A 0.55 V 60 dB-DR Fourth-Order Analog Baseband Filter
An 8-bit 50-MHz CMOS subranging A/D converter with pipelined wide-band S/H
Communication Using Antennas Fabricated in Silicon Integrated Circuits
A Fully Integrated 10-Gb/s Receiver With Adaptive Optical Dispersion Equalizer in 0.13-µm CMOS
CMOS active filter design at very high frequencies
A low-power, voice-controlled, H.263 video decoder for portable applications
A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation
A 2.5-V 57-MHz 15-tap SC bandpass interpolating filter with 320-MS/s output for DDFS system in 0.35-μ hboxm CMOS
A MEMS-Assisted Temperature Sensor With 20-µK Resolution, Conversion Rate of 200 S/s, and FOM of 0.04 pJK2
A Highly Linear OTA-Less 1-1 MASH VCO-Based ΔΣ ADC With an Efficient Phase Quantization Noise Extraction Technique
A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector
A 64 × 64 SPAD-Based Indirect Time-of-Flight Image Sensor With 2-Tap Analog Pulse Counters
A GFSK demodulator for low-IF Bluetooth receiver
Noncomplimentary rewriting and serial-data coding scheme for shared-sense-amplifier open-bit-line DRAM
Corrections to "A 0.02 mm 2 59.2 dB SFDR 4th-Order SC LPF With 0.5-to-10 MHz Bandwidth Scalability Exploiting a Recycling SC-Buffer Biquad"
Integrated continuous-time balanced filters for 16-b DSP interfaces
A Near-Optimum 13.56 MHz CMOS Active Rectifier With Circuit-Delay Real-Time Calibrations for High-Current Biomedical Implants
A 2.6 mW/Gbps 12.5 Gbps RX With 8-Tap Switched-Capacitor DFE in 32 nm CMOS
A Fully Integrated, Regulatorless CMOS Power Amplifier for Long-Range Wireless Sensor Communication
A Fifth-Order Continuous-Time Delta-Sigma Modulator With Single-Opamp Resonator
Six-terminal MOSFET's: modeling and applications in highly linear, electronically tunable resistors
A fully integrated two-channel A/D interface for the acquisition of cardiac signals in implantable pacemakers
Self-Powered 30 µW to 10 mW Piezoelectric Energy Harvesting System With 9.09 ms/V Maximum Power Point Tracking Time
A Cryo-CMOS Wideband Mode-Switching Class-F VCO With Harmonic-Resonance Self-Alignment
A 4-Gb/s/pin low-power memory I/O interface using 4-level simultaneous bi-directional signaling
SP-PIM: A Super-Pipelined Processing-In-Memory Accelerator With Local Error Prediction for Area/Energy-Efficient On-Device Learning
A 1.1 V 2y-nm 4.35 Gb/s/pin 8 Gb LPDDR4 Mobile Device With Bandwidth Improvement Techniques
Analysis and Design of an Integrated Notch Filter for the Rejection of Interference in UWB Systems
An Output-Capacitorless Low-Dropout Regulator With Direct Voltage-Spike Detection
High-speed and low-power CMOS priority encoders
Application and evaluation of direct-write electron beam for ASICs
A 0.94-ps-RMS-jitter 0.016-mm 2 2.5-GHz multiphase generator PLL with 360° digitally programmable phase shift for 10-Gb/s serial links
A Wireless Sensor-Brain Interface System for Tracking and Guiding Animal Behaviors Through Closed-Loop Neuromodulation in Water Mazes
An Asynchronous Power Aware and Adaptive NoC Based Circuit
A 10.7-MHz BiCMOS high-Q double-sampled SC bandpass filter
A noise optimization technique for integrated low-noise amplifiers
A 12.5+12.5 Gb/s Full-Duplex Plastic Waveguide Interconnect
All-Digital Event-Based Vision Sensor With Multi-Event Generation for Motion/Vibration-Adaptive Detection
A 3.9 mW 25-Electrode Reconfigured Sensor for Wearable Cardiac Monitoring System
Influence of transmission-line interconnections between gigabit-per-second ICs on time jitter and instabilities
An Energy/Illumination-Adaptive CMOS Image Sensor With Reconfigurable Modes of Operations
A 1.5-ns access time, 78- mu m 2 memory-cell size, 64-kb ECL-CMOS SRAM
A Single-Ended Inverter-Based Addition-Only Feed-Forward Equalization Transmitter
A 107 pJ/b TX 260 pJ/b RX Ultralow-Power MEMS-Based Transceiver With Wake-Up in ISM-Bands for IoT Applications
An ECL to CMOS level converter with complementary bipolar output stage
A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication
A 4.2 mW 50 MS/s 13 bit CMOS SAR ADC With SNR and SFDR Enhancement Techniques