yusuke1997/dblp-id-title huggingface dataset:
Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies
Faster than Fast: Accelerating Oriented FAST Feature Detection on Low-end Embedded GPUs
PhiNets: A Scalable Backbone for Low-power AI at the Edge
An Interpretable Machine Learning Model Enhanced Integrated CPU-GPU DVFS Governor
Crab-tree: A Crash Recoverable B+-tree Variant for Persistent Memory with ARMv8 Architecture
Power-efficient prefetching for embedded processors
Design and Analysis of Battery-Aware Automotive Climate Control for Electric Vehicles
Resource-Efficient Continual Learning for Sensor-Based Human Activity Recognition
A self-tuning cache architecture for embedded systems
Predicate abstraction for reachability analysis of hybrid systems
Reliability-aware dynamic energy management in dependable embedded real-time systems
ALEXIA: A Processor with Lightweight Extensions for Memory Safety
Power-aware dynamic memory management on many-core platforms utilizing DVFS
Editorial: Embedded Security Challenge: Cyber Security Contests in the Embedded Computing Domain
Minimizing Stack Memory for Partitioned Mixed-criticality Scheduling on Multiprocessor Platforms
Efficient Algorithm-Level Error Detection for Number-Theoretic Transform Used for Kyber Assessed on FPGAs and ARM
Computer-Aided Recoding to Create Structured and Analyzable System Models
Real-time Attack-recovery for Cyber-physical Systems Using Linear-quadratic Regulator
UML-based multiprocessor SoC design framework
GRec: Automatic Computation of Reconfiguration Graphs for Multi-core Platforms
Energy- and Thermal-Aware Video Coding via Encoder/Decoder Workload Balancing
NQA: A Nested Anti-collision Algorithm for RFID Systems
Energy-efficient encoding techniques for off-chip data buses
Exploring Efficient Architectures on Remote In-Memory NVM over RDMA
CIM: A Novel Clustering-based Energy-Efficient Data Imputation Method for Human Activity Recognition
Risk of Stochastic Systems for Temporal Logic Specifications
NoC contention analysis using a branch-and-prune algorithm
OffloaD: Detection Failure-based Scheduler for Offloading Object Detection
Predictive Retransmissions for Intermittently Connected Sensor Networks with Transmission Diversity
Abstracts of Papers to appear in Special Supplemental Issue of TECS (v11, iSupplemental1)
OCEAN: An Optimized HW/SW Reliability Mitigation Approach for Scratchpad Memories in Real-Time SoCs
SSI Properties Revisited
A Novel Lattice-Based Fault Injection Attack Targeting the Nonce in the SM2 Digital Signature Algorithm
Tolerating Defects in Low-Power Neural Network Accelerators Via Retraining-Free Weight Approximation
Branch Prediction-Directed Dynamic Instruction Cache Locking for Embedded Systems
Alleria: An Advanced Memory Access Profiling Framework
Online strategies for dynamic power management in systems with multiple power-saving states
A Hybrid Storage Access Framework for High-Performance Virtual Machines
Differential Fault Attack on ITUbee Block Cipher
Rasco: Resource Allocation and Scheduling Co-design for DAG Applications on Multicore
Partitioning sporadic task systems upon memory-constrained multiprocessors
Self-Adaptive Filtering Algorithm with PCM-Based Memory Storage System
Multitasking on reconfigurable architectures: microarchitecture support and dynamic scheduling
TensorRT-Based Framework and Optimization Methodology for Deep Learning Inference on Jetson Boards
Application-Aware Swapping for Mobile Systems
On energy-optimal voltage scheduling for fixed-priority hard real-time systems
An optimal warning-zone-length assignment algorithm for real-time and multiple-QoS on-chip bus arbitration
Overcoming Security Vulnerabilities in Deep Learning-based Indoor Localization Frameworks on Mobile Devices
SecuPilot: A Security Coprocessor-Integrated Platform for Autonomous UAV Security
Using Network Traffic to Infer Hardware State: A Kernel-Level Investigation
Editorial: Embedded systems - new challenges and future directions
Resource-Aware Task Scheduling
Single- and Multi-FPGA Acceleration of Dense Stereo Vision for Planetary Rovers
A Structured Methodology for Pattern based Adaptive Scheduling in Embedded Control
STDF: Spatio-Temporal Deformable Fusion for Video Quality Enhancement on Embedded Platforms
On the RTL Implementation of FINN Matrix Vector Unit
A reprogrammable customization framework for efficient branch resolution in embedded processors
A lifetime aware buffer assignment method for streaming applications on DRAM/PRAM hybrid memory
An adaptive, low-cost wear-leveling algorithm for multichannel solid-state disks
GMAI: Understanding and Exploiting the Internals of GPU Resource Allocation in Critical Systems
The Psi-Calculi Workbench: A Generic Tool for Applied Process Calculi
Verification of safety properties for parameterized regular systems
Processor-memory coexploration using an architecture description language
Corrections to and Discussion of "Implementation and Evaluation of Mixed-criticality Scheduling Approaches for Sporadic Tasks"
An Analytical Cache Performance Evaluation Framework for Embedded Out-of-Order Processors Using Software Characteristics
Post-Quantum Signatures on RISC-V with Hardware Acceleration
Exploring and Predicting the Effects of Microarchitectural Parameters and Compiler Optimizations on Performance and Energy
High-performance packet classification algorithm for multithreaded IXP network processor
DynO: Dynamic Onloading of Deep Neural Networks from Cloud to Device
Combining Weight Approximation, Sharing and Retraining for Neural Network Model Compression
Poly-DWT: Polymorphic wavelet hardware support for dynamic image compression
Page-Overwrite Data Sanitization in 3D NAND Flash: Challenges, Feasibility, and the PULSE Solution
Combining PUF with RLUTs: A Two-party Pay-per-device IP Licensing Scheme on FPGAs
Improving the fault resilience of an H.264 decoder using static analysis methods
Design-space exploration and runtime resource management for multicores
Creating Hardware Component Knowledge Bases with Training Data Generation and Multi-task Learning
Real-time, High-resolution Depth Upsampling on Embedded Accelerators
Introduction to the Special Issue on Virtual Prototyping of Parallel and Embedded Systems (ViPES)
Evaluating address register assignment and offset assignment algorithms
AQuA: A New Image Quality Metric for Optimizing Video Analytics Systems
A Majority-Based Reliability-Aware Task Mapping in High-Performance Homogenous NoC Architectures
What is embedded systems and how should it be taught?---results from a didactic analysis
Ultra low-power signal processing in wearable monitoring systems: A tiered screening architecture with optimal bit resolution
Low-Cost Memory Fault Tolerance for IoT Devices
Causality interfaces for actor networks
Design Flow for Scheduling Spiking Deep Convolutional Neural Networks on Heterogeneous Neuromorphic System-on-chip
Neural Network Compression for Noisy Storage Devices
Elements of Timed Pattern Matching
Reliability through redundant parallelism for micro-satellite computing
Undergraduate embedded system education at Carnegie Mellon
Petri Net Models and Collaborativeness for Parallel Processes with Resource Sharing and Message Passing
Editorial: Cyber Security, IoT, Block Chains - Risks and Opportunities
Design of Liveness-Enforcing Supervisors for S3PR Based on Complementary Places
Thermal-aware task scheduling in 3D chip multiprocessor with real-time constrained workloads
Constrained Tiny Machine Learning for Predicting Gas Concentration with I4.0 Low-cost Sensors
Scalable Global Power Management Policy Based on Combinatorial Optimization for Multiprocessors
Editorial: Special Section on ESTIMedia'13
Asynchronous Compaction Acceleration Scheme for Near-data Processing-enabled LSM-tree-based KV Stores
DynHaMo: Dynamic Hardware-Based Monitoring Dedicated to Attacks Detection
Contention Grading and Adaptive Model Selection for Machine Vision in Embedded Systems
ColLoc: A collaborative location and tracking system on WirelessHART
FPGA Implementation of the ECC Over GF(2 m ) for Small Embedded Applications
OnNetwork+: Network Delay-Aware Management for Mobile Systems
A Specification Framework for Mixed-Criticality Scheduling Protocols
Platform-based software design flow for heterogeneous MPSoC
An efficient placement and routing technique for fault-tolerant distributed embedded computing
Modeling and validation of pipeline specifications
Trustworthy Autonomous System Development
A Configurable CRYSTALS-Kyber Hardware Implementation with Side-Channel Protection
Probabilistic Reaction Time Analysis
Dual Flow Nets: Modeling the control/data-flow relation in embedded systems
Learning Hardware-Friendly Classifiers Through Algorithmic Stability
Improving Write Performance and Extending Endurance of Object-Based NAND Flash Devices
Task mapping and priority assignment for soft real-time applications under deadline miss ratio constraints
Approximate Cache in GPGPUs
FlashKV: Accelerating KV Performance with Open-Channel SSDs
A software-only scheme for managing heap data on limited local memory(LLM) multicore processors
Boosting Cryptographic ICs' Side-Channel Resistance: A Formal Framework for Automatic Identification and Protection of Leaky Paths
Data cache locking for tight timing calculations
EM analysis of a wireless Java-based PDA
Towards scalable arithmetic units with graceful degradation
A Unified Methodology for Scheduling in Distributed Cyber-Physical Systems
Guest editorial: Special issue on embedded systems and security
UPDATE: User-Profile-Driven Adaptive TransfEr for Mobile Devices
Probabilistic Black-Box Checking via Active MDP Learning
Near-Static Shading Exploration for Smart Photovoltaic Module Topologies Based on Snake-like Configurations
RapidIO for radar processing in advanced space systems
Guaranteed Computational Resprinting via Model-Predictive Control
Symbolic WCET Computation
Editorial: Embedded Computing and Society
A reliability enhancement design under the flash translation layer for MLC-based flash-memory storage systems
Consistency Constraints for Mapping Dataflow Graphs to Hybrid Dataflow/von Neumann Architectures
System-Level Performance and Power Optimization for MPSoC: A Memory Access-Aware Approach
Maximizing the Number of Good Dies for Streaming Applications in NoC-Based MPSoCs Under Process Variation
Compile-time and instruction-set methods for improving floating- to fixed-point conversion accuracy
Precise Correlation Extraction for IoT Fault Detection With Concurrent Activities
PAIS: Parallelism-aware interconnect scheduling in multicores
Real-time performance analysis of multiprocessor systems with shared memory
Introduction to the Special Issue on Domain-Specific Multicore Computing
Locking the Design of Building Blocks for Quantum Circuits
An Indoor Test Methodology for Solar-Powered Wireless Sensor Networks
A DFA-Resistant and Masked PRESENT with Area Optimization for RFID Applications
Live-Out Register Fencing: Interrupt-Triggered Soft Error Correction Based on the Elimination of Register-to-Register Communication
Synaptic Activity and Hardware Footprint of Spiking Neural Networks in Digital Neuromorphic Systems
SpinBayes: Algorithm-Hardware Co-Design for Uncertainty Estimation Using Bayesian In-Memory Approximation on Spintronic-Based Architectures
Tuning garbage collection for reducing memory system energy in an embedded java environment
Introduction to the special section on ESTIMedia'12
FE-SViT: A SViT-Based Fuzzy Extractor Framework
TAFP-ViT: A Transformer Accelerator via QKV Computational Fusion and Adaptive Pruning for Vision Transformer
Post-silicon platform for the functional diagnosis and debug of networks-on-chip
End-to-End Timing Analysis of Sporadic Cause-Effect Chains in Distributed Systems
Joint Optimization of Sensing and Power Allocation in Energy-Harvesting Cognitive Radio Networks
Managing embedded systems complexity with aspect-oriented model-driven engineering
Instruction-Cache Locking for Improving Embedded Systems Performance
A Comparative Study of Predictable DRAM Controllers
Protecting Network-on-Chip Intellectual Property Using Timing Channel Fingerprinting
Mapping of streaming applications considering alternative application specifications
INVISIOS: A Lightweight, Minimally Intrusive Secure Execution Environment
WCET analysis with MRU cache: Challenging LRU for predictability
QUKU: A dual-layer reconfigurable architecture
Ten Years of Building Broken Chips: The Physics and Engineering of Inexact Computing
IOSR: Improving I/O Efficiency for Memory Swapping on Mobile Devices Via Scheduling and Reshaping
HARP: Harnessing inactive threads in many-core processors
VoxDepth : Rectification of Depth Images on Edge Devices
FARRE: Fairness Aware Request Response Arbitration in Shared Caches
Slotless module-based reconfiguration of embedded FPGAs
A Storage Device Emulator for System Performance Evaluation
A DWM-Based Stack Architecture Implementation for Energy Harvesting Systems
FC-GPU: Feedback Control GPU Scheduling for Real-time Embedded Systems
Sequence Control of Essential Siphons for Deadlock Prevention in Petri Nets
Recovering from distributable thread failures in distributed real-time Java
Enabling Contactless Detection of Moving Humans with Dynamic Speeds Using CSI
A formal method for hardware IP design and integration under I/O and timing constraints
Architecture Support for Domain-Specific Accelerator-Rich CMPs
Adaptive Computing in Memory Meets Conventional Batteryless Platforms
Guest Editorial: Special Issue on Formal Methods and Models for System Design
Joint variable partitioning and bank selection instruction optimization for partitioned memory architectures
Software-Based Selective Validation Techniques for Robust CGRAs Against Soft Errors
Introduction to the Special Issue on Memory and Storage Systems for Embedded and IoT Applications: Part 2
A Framework for Interconnection-Aware Domain-Specific Many-Accelerator Synthesis
Editorial: Science of the Big and Small and Embedded Computing Systems
MARCO: A High-performance Task Mapping and Routing Co-optimization Framework for Point-to-Point NoC-based Heterogeneous Computing Systems
Dynamic Logging with Dylog in Networked Embedded Systems
Scalable FPGA-based architecture for DCT computation using dynamic partial reconfiguration
Fine-grained Hardware Acceleration for Efficient Batteryless Intermittent Inference on the Edge
Re-thinking Memory-Bound Limitations in CGRAs
Conserving energy in real-time storage systems with I/O burstiness
Real-time Fixed Priority Scheduling Synthesis Using Affine DataFlow Graphs: from Theory to Practice
Hardware Area Efficient and Real-Time FPGA Implementation of PHMMRGB
Fast and Precise Worst-Case Interference Placement for Shared Cache Analysis
Multicore-based vector coprocessor sharing for performance and energy gains
ETAP: Energy-aware Timing Analysis of Intermittent Programs
VISTA: VPO interactive system for tuning applications
Intermittent-Aware Neural Architecture Search
Editorial: Schizoid Design for Critical Embedded Systems
A Hybrid Target Selection Model of Functional Safety Compliance for Autonomous Driving System
Dataflow Driven Partitioning of Machine Learning Applications for Optimal Energy Use in Batteryless Systems
SCEst: Sequentially Constructive Esterel
Guest editorial: Special issue on models and methodologies for co-design of embedded systems
Wi-GPD Identification System Based on Gait Point Density
Camaroptera: A Long-range Image Sensor with Local Inference for Remote Sensing Applications
An Intermediate-Centric Dataflow for Transposed Convolution Acceleration on FPGA
Efficient Low-Memory Implementation of Sparse CNNs Using Encoded Partitioned Hybrid Sparse Format
Bandwidth Optimization and Energy Management in Real-Time Wireless Networks
Heuristic Computation Offloading Algorithms for Mobile Users in Fog Computing
Guest editorial: Introduction to the special issue on software and compilers for embedded systems
Python to accelerate embedded SoC design: A case study for systems biology
Collaborative PCA/DCA Learning Methods for Compressive Privacy
A cost-effective load-balancing policy for tile-based, massive multi-core packet processors
BISDU: A Bit-Serial Dot-Product Unit for Microcontrollers
Multilevel µTESLA: Broadcast authentication for distributed sensor networks
Multilevel Phase Analysis
Introduction to the special LCTES'05 issue
When Do We Not Need Complex Assume-Guarantee Rules?
Modeling and Analyzing Dataflow Applications on NoC-Based Many-Core Architectures
Synchronous dataflow scenarios
Power macromodeling of MPSoC message passing primitives
Wasm-IO: Enabling Low-Level Device Interaction in WebAssembly for Industry Automation
MEMMU: Memory expansion for MMU-less embedded systems
Introduction to the special section on multiprocessor system-on-chip for cyber-physical systems
Overload provisioning in mixed-criticality cyber-physical systems
Efficient Realization of Decision Trees for Real-Time Inference
Transition-Based Deadlock Detection and Recovery Policy for FMSs Using Graph Technique
On Constrained Implementation of Lattice-Based Cryptographic Primitives and Schemes on Smart Cards
Guest Editorial: Special Issue on Embedded Computing for IoT
REAL: REquest Arbitration in Last Level Caches
An Efficient Multidimensional Big Data Fusion Approach in Machine-to-Machine Communication
HMSA: High-Performance Heterogeneous Mixed-Precision CNN Systolic Array Accelerator on FPGA
MAGNETO: Fingerprinting USB Flash Drives via Unintentional Magnetic Emissions
Practical Lattice-Based Digital Signature Schemes
Lightweight Architectures for Reliable and Fault Detection Simon and Speck Cryptographic Algorithms on FPGA
Verification of Safety and Liveness Properties of Metric Transition Systems
Interactive Programmatic Modeling
Building timing predictable embedded systems
Towards Building Verifiable CPS using Lingua Franca
Cache Interference-aware Task Partitioning for Non-preemptive Real-time Multi-core Systems
The Bionode: A Closed-Loop Neuromodulation Implant
PHiLIP on the HiL: Automated Multi-Platform OS Testing With External Reference Devices
Model-Based Diagnosis of Real-Time Systems: Robustness Against Varying Latency, Clock Drift, and Out-of-Order Observations
Exploiting Sparsity to Accelerate Fully Connected Layers of CNN-Based Applications on Mobile SoCs
Adapting Recursive Sinusoidal Software Oscillators for Low-power Fixed-point Processors
QUIDAM: A Framework for Quantization-aware DNN Accelerator and Model Co-Exploration
Methods to Realize Preemption in Phased Execution Models
Towards Analysing Cache-Related Preemption Delay in Non-Inclusive Cache Hierarchies
Compiling for the Worst Case: Memory Allocation for Multi-task and Multi-core Hard Real-time Systems
Graph-Based Modeling, Scheduling, and Verification for Intersection Management of Intelligent Vehicles
ZPP: A Dynamic Technique to Eliminate Cache Pollution in NoC based MPSoCs
Comparative Analysis and Enhancement of CFG-based Hardware-Assisted CFI Schemes
Static Task Partitioning for Locked Caches in Multicore Real-Time Systems
Verification of Periodically Controlled Hybrid Systems: Application to an Autonomous Vehicle
SecureRide: Detecting Safety-Threatening Behavior of E-Scooters Using Battery Information
A comparison of compositional schedulability analysis techniques for hierarchical real-time systems
Editorial: Security of Embedded Systems and Cyber Irons - Embedded Systems for Security
Architecture-Aware Real-Time Compression of Execution Traces
FARSI: An Early-stage Design Space Exploration Framework to Tame the Domain-specific System-on-chip Complexity
ELSA: A Throughput-Optimized Design of an LSTM Accelerator for Energy-Constrained Devices
Intelligent Caching for Vehicular Dew Computing in Poor Network Connectivity Environments
Embedded Device Forensics and Security
Component-based modeling and verification of dynamic adaptation in safety-critical embedded systems
A Mirroring-Assisted Channel-RAID5 SSD for Mobile Applications
Analyzing Event-Based Scheduling in Concurrent Reactive Systems
A Survey of Asynchronous Programming Using Coroutines in the Internet of Things and Embedded Systems
A Reconfiguration-Based Fault-Tolerant Anti-Lock Brake-by-Wire System
Side Channel Attacks on GPRS Standard Encryption Algorithms
Machine Intelligence on Resource-Constrained IoT Devices: The Case of Thread Granularity Optimization for CNN Inference
Energy-aware task mapping and scheduling for reliable embedded computing systems
Virtualizing a Post-Moore's Law Analog Mesh Processor: The Case of a Photonic PDE Accelerator
Guest Editorial: Challenges of Embedded Systems as They Evolve into M2M, Internet of Things
Editorial: Human Factors in Embedded Computing
SHARP: An Adaptable, Energy-Efficient Accelerator for Recurrent Neural Networks
ROBIN: A Robust Optical Binary Neural Network Accelerator
AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers
An Efficient WCET-Aware Instruction Scheduling and Register Allocation Approach for Clustered VLIW Processors
Learning Nondeterministic Real-Time Automata
Weakly-hard Real-time Guarantees for Earliest Deadline First Scheduling of Independent Tasks
Transport-layer-assisted routing for runtime thermal management of 3D NoC systems
Challenges and Opportunities of Security-Aware EDA
Leveraging HLS to Design a Versatile & High-Performance Classic McEliece Accelerator
Hercules: Enabling Atomic Durability for Persistent Memory with Transient Persistence Domain
Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices
NIR-sighted: A Programmable Streaming Architecture for Low-Energy Human-Centric Vision Applications
Efficient Video Redaction at the Edge: Human Motion Tracking for Privacy Protection
A Predictable QoS-aware Memory Request Scheduler for Soft Real-time Systems
Minimizing CPU energy in real-time systems with discrete speed management
A Load-Balanced Collaborative Repair Algorithm for Single-Disk Failures in Erasure Coded Storage Systems
Control-theoretic cyber-physical system modeling and synthesis: A case study of an active direct methanol fuel cell
An Analytical Model-based Capacity Planning Approach for Building CSD-based Storage Systems
A Passive Online Technique for Learning Hybrid Automata from Input/Output Traces
A Universal Application Storage System Based on Smart Card
A Software Scheme for Multithreading on CGRAs
Scheduling Dynamic Software Updates in Mobile Robots
SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip
High-Level Synthesis of Approximate Designs under Real-Time Constraints
Concentration-Resilient Mixture Preparation with Digital Microfluidic Lab-on-Chip
Compositional Design of Multi-Robot Systems Control Software on ROS
Sea depth measurement with restricted floating sensors
Edge-AI-Driven Framework with Efficient Mobile Network Design for Facial Expression Recognition
DLIC: Decoded loop instructions caching for energy-aware embedded processors
Parallel Reconfigurable Computing-Based Mapping Algorithm for Motion Estimation in Advanced Video Coding
Reduction in the Number of Fault Injections for Blind Fault Attack on SPN Block Ciphers
Introduction to the Special Issue on Specification and Design Languages (FDL 2021)
Energy optimal speed control of a producer-consumer device pair
REC: REtime Convolutional Layers to Fully Exploit Harvested Energy for ReRAM-based CNN Accelerators
IoT-Fog-Cloud Centric Earthquake Monitoring and Prediction
Balancing Programmability and Silicon Efficiency of Heterogeneous Multicore Architectures
Implementing fault-tolerance in real-time programs by automatic program transformations
Introduction to Special Issue on In/Near Memory and Storage Computing for Embedded Systems
Accumulative Display Updating for Intermittent Systems
Implementing Privacy Homomorphism with Random Encoding and Computation Controlled by a Remote Secure Server
Introduction to special issue on wireless health
Parallel architectures for the kNN classifier - design of soft IP cores and FPGA implementations
Analysis of EM Fault Injection on Bit-sliced Number Theoretic Transform Software in Dilithium
Numerical Representation of Directed Acyclic Graphs for Efficient Dataflow Embedded Resource Allocation