yusuke1997/dblp-id-title huggingface dataset:
Stability and Operation of Injection-Locked Regenerative Frequency Dividers
Performance of SIMO FM-DCSK UWB System Based on Chaotic Pulse Cluster Signals
Fuzzy Impulsive Control of High-Order Interpolative Low-Pass Sigma-Delta Modulators
Energy-Efficient Adaptive Computing With Multifunctional Memory
A 3.9 mW Bluetooth Low-Energy Transmitter Using All-Digital PLL-Based Direct FSK Modulation in 55 nm CMOS
A New Architecture for High-Density High-Performance SGT nor Flash Memory
An 8 b 700 MS/s 1 b/Cycle SAR ADC Using a Delay-Shift Technique
Impact of Deep-Trench-Isolation-Sharing Techniques on Ultrahigh-Speed Digital Systems
DRAPS: A Design Rule Aware Path Search Algorithm for Detailed Routing
VCO Design With On-Chip Calibration System
A 40.68-MHz Active Rectifier With Hybrid Adaptive On/Off Delay-Compensation Scheme for Biomedical Implantable Devices
Eigenvalues and Singular Value Decompositions of Reduced Biquaternion Matrices
Robust Linear Control of (Chaotic) Permanent-Magnet Synchronous Motors With Uncertainties
Time-Domain Modeling of Low-Frequency Noise in Deep-Submicrometer MOSFET
A TV Receiver Front-End With Linearized LNA and Current-Summing Harmonic Rejection Mixer
An Antenna Co-Design Dual Band RF Energy Harvester
High-Performance Architecture for the Conjugate Gradient Solver on FPGAs
Stability Analysis of RF Power Amplifier Envelope Feedback
Leader-Following Pinning Synchronization of Multiagent Systems With Impulsive Interlayer Coupling
Radix-based digital calibration techniques for multi-stage recycling pipelined ADCs
A Multichannel Serial Link Receiver With Dual-Loop Clock-and-Data Recovery and Channel Equalization
Subthreshold Parallel FM-to-Digital Delta- Sigma Converter With Output-Bit-Stream Addition by Interleaving
Low-power fully integrated and tunable CMOS RF wireless receiver for ISM band consumer applications
Analysis of Input LCR Matched N-Path Filter
Bifurcation Analysis of PWM-1 Voltage-Mode-Controlled Buck Converter Using the Exact Discrete Model
Distortion analysis of Miller-compensated three-stage amplifiers
A Low-Cost Very Large Scale Integration Architecture for Multistandard Inverse Transform
A Study on the Programming Structures for RRAM-Based FPGA Architectures
Design of an adaptive interference reduction system for nerve-cuff electrode recording
Parallel-RC Feedback Low-Noise Amplifier for UWB Applications
A 2.2-mW 20-135-MHz False-Lock-Free DLL for Display Interface in 0.15-µm CMOS
An All-Digital, Single-Bit RF Transmitter for Massive MIMO
Fine-Grained Bit-Flipping Decoding for LDPC Codes
Mismatch Insensitive Double-Sampling Quadrature Bandpass SigmaDelta Modulation
A 148fs rms Integrated Noise 4 MHz Bandwidth Second-Order ΔΣ Time-to-Digital Converter With Gated Switched-Ring Oscillator
Bootstrapping and Resetting CMOS Starter for Thermoelectric and Photovoltaic Chargers
A Gate Leakage Feedback Element in an Adaptive Amplifier Application
A Digitally Calibrated CMOS Transconductor With a 100-MHz Bandwidth and 75-dB SFDR
Approximate Multipliers Based on New Approximate Compressors
An Asymptotic Tracking Problem and Its Application
A Low-Power CMOS Linear-in-Decibel Variable Gain Amplifier With Programmable Bandwidth and Stable Group Delay
Steady-State and Tracking Analyses of the Improved Proportionate Affine Projection Algorithm
LMI Approach to Stability of Direct Form Digital Filters Utilizing Single Saturation Overflow Nonlinearity
Wideband Compensation of RF Vector Multiplier for RF Predistortion Systems
A Variation-Tolerant Subthreshold to Superthreshold Level Shifter for Heterogeneous Interfaces
A CMOS Outphasing Power Amplifier With Integrated Single-Ended Chireix Combiner
Electromagnetic Interference Resisting Operational Amplifier
Stochastic Iterative MIMO Detection System: Algorithm and Hardware Design
Circuits and System Design of RF Polar Transmitters Using Envelope-Tracking and SiGe Power Amplifiers for Mobile WiMAX
A Block-Floating-Point-Based Realization of the Block LMS Algorithm
A Study of the Optimal Data Rate for Minimum Power of I/Os
Hybrid K-Means Clustering and Support Vector Machine Method for via and Metal Line Detections in Delayered IC Images
A 2.44-pJ/b 1.62-10-Gb/s Receiver for Next Generation Video Interface Equalizing 23-dB Loss With Adaptive 2-Tap Data DFE and 1-Tap Edge DFE
Design of A Novel Highly EMI-Immune CMOS Miller OpAmp Considering Channel Length Modulation
Small-Signal Stability Analysis for Non-Index 1 Hessenberg Form Systems of Delay Differential-Algebraic Equations
Phase-Inversion Waves Propagating in an In-Phase Synchronization on Oscillators Coupled as a Cross
Development of the Area-Reducing Active "Coil-Enhancement" Principle, Practiced Onto an ADSL-POTS Splitter
Turbo Trellis-Coded Differential Chaotic Modulation
Signal-Dependent Variable-Resolution Clockless A/D Conversion With Application to Continuous-Time Digital Signal Processing
A Mixed-Signal GFSK Demodulator Based on Multithreshold Linear Phase Quantization
A Temperature and Process Compensated Ultralow-Voltage Rectifier in Standard Threshold CMOS for Energy-Harvesting Applications
Bridging the Gap Between Transmission Noise and Sampled Data for Robust Consensus of Multi-Agent Systems
Phase Space Decomposition for Phase Noise and Synchronization Analysis of Planar Nonlinear Oscillators
Optimizing Incremental Step Pulse Programming for RRAM Through Device-Circuit Co-Design
Comments on "Robust stability and stabilizability of uncertain linear hybrid systems with state Delay"
Design of complex-valued variable FIR digital filters and its application to the realization of arbitrary sampling rate conversion for complex signals
Broadband Efficiency-Enhanced Mutually Coupled Harmonic Postmatching Doherty Power Amplifier
A 0.6-V 800-MHz All-Digital Phase-Locked Loop With a Digital Supply Regulator
A 1.8-μW sigma-delta modulator for 8-bit digitization of cardiac signals in implantable pacemakers operating down to 1.8 V
Hybrid Partitioned SRAM-Based Ternary Content Addressable Memory
A Write-Back-Free 2T1D Embedded DRAM With Local Voltage Sensing and a Dual-Row-Access Low Power Mode
A CMOS quadrature charge-domain sampling circuit with 66-dB SFDR up to 100 MHz
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics
Hardware-Efficient Post-Processing Architectures for True Random Number Generators
Guest Editorial Special Issue on ISCAS 2010
An Algorithm for the Design of Low-Power Hardware-Efficient FIR Filters
A Low Complexity Geometric Mean Decomposition Computing Scheme and Its High Throughput VLSI Implementation
Multiple Event Time-to-Digital Conversion-Based Pulse Digitization for a 250 MHz Pulse Radio Ranging Application
Corrections to "Chaos-Coded Modulation Over Rician and Rayleigh Flat Fading Channels"
Digital Offset Cancellation for Long Time-Constant Subthreshold OTA-C Integrators
Optimal Constant Multiplication Using Integer Linear Programming
Reverse Nested Miller Compensation Using Current Buffers in a Three-Stage LDO
Systematic Computation of Nonlinear Bilateral Dynamical Systems With a Novel Low-Power Log-Domain Circuit
Toward Local Stability Analysis of Externally Interfered Digital Filters Under Overflow Nonlinearity
Area-Efficient Bidirectional Shift-Register Using Bidirectional Pulsed-Latches
A Pipelined Reduced Complexity Two-Stages Parallel LMS Structure for Adaptive Beamforming
Continuous-Time Delta-Sigma Modulators With Time-Interleaved FIR Feedback
Comments on "Efficient Multibit Quantization in Continuous-Time Sigma Delta Modulators"
Circuit-Based Characterization of Device Noise Using Phase Noise Data
A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching
Energy-Constraint Formation for Multiagent Systems With Switching Interaction Topologies
Energy-Efficient Low-Complexity CMOS Pulse Generator for Multiband UWB Impulse Radio
ADEPOS: A Novel Approximate Computing Framework for Anomaly Detection Systems and its Implementation in 65-nm CMOS
Feature Adaptive Filtering: Exploiting Hidden Sparsity
A Power-Efficient Continuous-Time Incremental Sigma-Delta ADC for Neural Recording Systems
Position-dependent control of numerical integration in circuit simulation
Theoretical Foundations of Memristor Cellular Nonlinear Networks: Stability Analysis With Dynamic Memristors
Synchronization Analysis on Two-Layer Networks of Fractional-Order Systems: IntraIayer and InterIayer Synchronization
Architecture Design of Context-Based Adaptive Variable-Length Coding for H.264/AVC
A Mostly Digital PWM-Based ΔΣ ADC With an Inherently Matched Multibit Quantizer/DAC
One Mbps 1 nJ/b 3.5-4 GHz Fully Integrated FM-UWB Transmitter for WBAN Applications
New Approach to Scalable Parallel and Pipelined Realization of Repetitive Multiple Accumulations
Switched-Current Filters Revisited: Square-Root Domain Sampled-Data Filters
A Multiobjective Cooptimization of Buffer and Wire Sizes in High-Performance Clock Trees
An On-Chip Temperature Sensor With a Self-Discharging Diode in 32-nm SOI CMOS
A Novel 1.2-V 4.5-ppm/°C Curvature-Compensated CMOS Bandgap Reference
Dynamic Behavior of Coupled Memristor Circuits
A 0.5-V 1.3-µW Analog Front-End CMOS Circuit
I/Q Balance-Enhanced Wideband Receiver Front-End for 2G/3G/4G/5G NR Cellular Applications
Linear phase reconstruction filtering using a hold time longer than one sample period
All-Adaptive Blind Matched Filtering for the Equalization and Identification of Multipath Channels - A Practical Approach
Architectures for MIMO-OFDM Systems in Frequency-Selective Mobile Fading Channels
Clock-and-Data Recovery Design for LVDS Transceiver Used in LCD Panels
Net-Sensitivity-Based Optimization of Large-Scale Field-Programmable Analog Array (FPAA) Placement and Routing
Tunable Highly Linear Floating-Gate CMOS Resistor Using Common-Mode Linearization Technique
Design of a Digital Address-Event Triggered Compressive Acquisition Image Sensor
A 2.86-TOPS/W Current Mirror Cross-Bar-Based Machine-Learning and Physical Unclonable Function Engine For Internet-of-Things Applications
Analysis and Design of Configurable LNAs in Feedback Common-Gate Topologies
A Simplified FRI Sampling System for Pulse Streams Based on Constraint Random Modulation
A differential pulsewidth control loop for high-speed VLSI systems
Advantages of Second-Order Cartesian Feedback Linearizers for Radio Amplifiers
A Flexible and Scalable Structure to Compensate Frequency Response Mismatches in Time-Interleaved ADCs
Advantages of Shift Registers Over DLLs for Flexible Low Jitter Multiphase Clock Generation
Two-step channel selection-a novel technique for reconfigurable multistandard transceiver front-ends
Picowatt, 0.45-0.6 V Self-Biased Subthreshold CMOS Voltage Reference
A 46-µW Self-Calibrated Gigahertz VCO for Low-Power Radios
All-Digital Circuit-Level Dynamic Variation Monitor for Silicon Debug and Adaptive Clock Control
A Fast-Locking All-Digital Multiplying DLL for Fractional-Ratio Dynamic Frequency Scaling
Chaotic block ciphers: from theory to practical algorithms
On the Design of Undersampling Continuous-Time Bandpass Delta-Sigma Modulators for Gigahertz Frequency A/D Conversion
A 4.1-mW 3.5-GS/s 6-Bit Time-Interleaved ADC in 40-nm CMOS
Integrated Circuitry to Detect Slippage Inspired by Human Skin and Artificial Retinas
Linearity Theory of Stochastic Phase-Interpolation Time-to-Digital Converter
A 1-GHz 1.6-mW Auto-Calibrated Bit Slicer for Energy/Envelope Detection Receivers
Pulsed Digital Oscillators for Electrostatic MEMS
Retrain-Less Weight Quantization for Multiplier-Less Convolutional Neural Networks
Sigma-delta modulators operating at a limit cycle
Brownian-Bridge-Based Statistical Analysis of the DAC INL Caused by Current Mismatch
Optimal filtering for multirate systems
A Sub-mW Integrating Mixer SAR Spectrum Sensor for Portable Cognitive Radio Applications
A Sub-10-muhboxW Digitally Controlled Oscillator Based on Hysteresis Delay Cell Topologies for WBAN Applications
A Variable Step-Size Normalized Subband Adaptive Filter With a Step-Size Scaler Against Impulsive Measurement Noise
Current Mirror Array: A Novel Circuit Topology for Combining Physical Unclonable Function and Machine Learning
CMOS Switched-Capacitor DSB-SSB Converter Using a Hilbert Transformer
Capacitor-Swapping Cyclic A/D Conversion Techniques With Reduced Mismatch Sensitivity
Transient Input Impedance Modeling of Rectifiers for RF Energy Harvesting Applications
A 6-b, 800-MS/s, 3.62-mW Nyquist Rate AC-Coupled VCO-Based ADC in 65-nm CMOS
An Algorithm of an X-ray Hit Allocation to a Single Pixel in a Cluster and Its Test-Circuit Implementation
Matching requirements in LINC transmitters for OFDM signals
A Spurious-Power Suppression Technique for Multimedia/DSP Applications
A novel three-phase magnitude-phase-locked loop system
Semi-Global Leader-Following Consensus of Linear Multi-Agent Systems With Input Saturation via Low Gain Feedback
Implementation of a Flexible LDPC Decoder
Deep Neural Network Acceleration Based on Low-Rank Approximated Channel Pruning
Classification of Auxiliary Circuit Schemes for Feeding Fast Load Transients in Switching Power Supplies
A 40-nm CMOS 12b 120-MS/s Nonbinary SAR-Assisted SAR ADC With Double Clock-Rate Coarse Decision
Synthesis and Realization of Two-Dimensional Separable Denominator Orthogonal Systems via Decomposition Into 1-D Systems
Model Order Reduction of Linear Systems via the Cross Gramian and SVD
A 0.032-mm 2 0.15-V Three-Stage Charge-Pump Scheme Using a Differential Bootstrapped Ring-VCO for Energy-Harvesting Applications
Device and Compact Circuit-Level Modeling of Graphene Field-Effect Transistors for RF and Microwave Applications
A MM-Wave Configurable VCO Using MCPW-Based Tunable Inductor in 65-nm CMOS
The design of wideband and low-power CMOS active polyphase filter and its application in RF double-quadrature receivers
A micropower low-distortion digital class-D amplifier based on an algorithmic pulsewidth modulator
Some New Developments on the Al-Alaoui and the Pei and Hsu s-to-z Transforms
Fully Integrated Energy Harvesting Circuit With -25-dBm Sensitivity Using Transformer Matching
Multi-Level Design Influences on Robustness Evaluation of 7nm FinFET Technology
Assisting High-Level Synthesis Improve SpMV Benchmark Through Dynamic Dependence Analysis
Sliced Message Passing: High Throughput Overlapped Decoding of High-Rate Low-Density Parity-Check Codes
A Wide Dynamic Range Multi-Mode Band-Pass Continuous-Time Delta-Sigma Modulator Employing Single-Opamp Resonator With Positive Resistor-Feedback
Sampling and signal reconstruction circuits performing internal antialiasing filtering and their influence on the design of digital receivers and transmitters
On Multiscroll Chaotic Attractors in Hysteresis-Based Piecewise-Linear Systems
Periodic Small Signal Analysis of a Wide Class of Type-II Phase Locked Loops Through an Exhaustive Variational Model
Add-Equalize Structures for Linear-Phase Nyquist FIR Filter Interpolators and Decimators
A Long Reset-Time Power-On Reset Circuit With Brown-Out Detection Capability
Power/Ground Network Optimization Considering Decap Leakage Currents
Design of High-Throughput Fixed-Point Complex Reciprocal/Square-Root Unit
A 0.4 V 1.94 fJ/conversion-step 10 bit 750 kS/s SAR ADC with Input-Range-Adaptive Switching
A Variation-Tolerant, Sneak-Current-Compensated Readout Scheme for Cross-Point Memory Based on Two-Port Sensing Technique
47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking
Near-Field MIMO Communication Links
Interpolation-Based QR Decomposition and Channel Estimation Processor for MIMO-OFDM System
A 0.015-mm 2 Inductorless 32-GHz Clock Generator With Wide Frequency-Tuning Range in 28-nm CMOS Technology
Comments on "Design and analysis of switched-capacitor-based step-up resonant Converters"
Conditional Diagnosability of Matching Composition Networks Under the PMC Model
Analysis and Design Method of Multiple-Output Switched-Capacitor Voltage Regulators With a Reduced Number of Power Electronic Components
Model Predictive Control for Linear Parameter Varying Systems Using Parameter Dependent Lyapunov Function
Clock Data Compensation Aware Digital Circuits Design for Voltage Margin Reduction
A Low-Power 40-Gb/s Pre-Emphasis PAM-4 Transmitter With Toggling Serializers
Towards Optimal Robustness of Network Controllability: An Empirical Necessary Condition
A Power-Efficient Noise Suppression Technique Using Signal-Nulled Feedback for Low-Noise Wideband Amplifiers
High-Throughput Non-Binary LDPC Decoder Based on Aggressive Overlap Scheduling
Traffic Dynamics Evaluation for the Future NFV Deployment
A Low-Complexity Synchronizer for OFDM-Based UWB System
Adaptive-Quantization Digital Image Sensor for Low-Power Image Compression
On Design of Robust Fault Detection Filter in Finite-Frequency Domain With Regional Pole Assignment
A Quadrature Sinusoidal Oscillator With Phase-Preserving Wide-Range Linear Frequency Tunability and Frequency-Independent Amplitude
Frequency-Response Masking-Based Design of Nearly Perfect-Reconstruction Two-Channel FIR Filterbanks With Rational Sampling Factors
3.125-to-28.125 Gb/s 4.72 mW/Gb/s Multi- Standard Parallel Transceiver Supporting Channel-Independent Operation in 40-nm CMOS
Low-Power Small-Area Inverter-Based DSM for MEMS Microphone
UPS Parallel Balanced Operation Without Explicit Estimation of Reactive Power - A Simpler Scheme
Power Amplifier Selection for LINC Applications
Robust Filtering of Discrete-Time Linear Systems With Correlated Process and Measurement Noises
Finite-Time Distributed Tracking Control for Multi-Agent Systems With a Virtual Leader
An Energy-Efficient Speech-Extraction Processor for Robust User Speech Recognition in Mobile Head-Mounted Display Systems
A Continuously Tunable Hybrid LC-VCO PLL With Mixed-Mode Dual-Path Control and Bi-level Delta-Sigma Modulated Coarse Tuning
Efficient Multiparameter Sensitivity Computation of Amplifier Harmonic Distortion
An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS
A Floating Memristor Emulator Based Relaxation Oscillator
Toward Time-Quantized Pseudorandom Sampling for Green Communication
Robust Stability and Robust Periodicity of Delayed Recurrent Neural Networks With Noise Disturbance
Synchronization in Complex Dynamical Networks With Random Sensor Delay
Dual-Band Defected Ground Structures Wireless Power Transfer System With Independent External and Inter-Resonator Coupling
A Modified All-Digital Polar PWM Transmitter
Nonlinear-Observer-Based H infty Synchronization and Unknown Input Recovery
Analytical Fixed-Point Accuracy Evaluation in Linear Time-Invariant Systems
Time-Domain Characterization of Digitized PWM Inverter With Dead-Time Effect
Improved Global Asymptotical Synchronization of Chaotic Lur'e Systems With Sampled-Data Control
High-Performance Low-Area Video Up-Scaling Architecture for 4-K UHD Video
A Fast-Transient-Response Fully-Integrated Digital LDO With Adaptive Current Step Size Control
Cellular Neural Networks With Virtual Template Expansion for Retinal Vessel Segmentation
A CMOS ISFET Interface Circuit With Dynamic Current Temperature Compensation Technique
Realization of Boolean Functions via CNN: Mathematical Theory, LSBF and Template Design
A Double-Sensing-Margin Offset-Canceling Dual-Stage Sensing Circuit for Resistive Nonvolatile Memory
A more general approach to the filter sharpening technique of Kaiser and Hamming
Resilient Sampled-Data Control for Markovian Jump Systems With an Adaptive Fault-Tolerant Mechanism
Flexible Design Method for Multi-Repeater Wireless Power Transfer System Based on Coupled Resonator Bandpass Filter Model
Efficient Supply Modulator for Wide-Band Envelope Elimination and Restoration Power Amplifiers
Design of Efficient Multiplierless Modified Cosine-Based Comb Decimation Filters: Analysis and Implementation
A Supply-Scalable Dual-Rate Dual-Mode DAC With an Adaptive Swing Control
Circuit Reliability Comparison Between Stochastic Computing and Binary Computing
Hand Gesture Recognition Using Three-Dimensional Electrical Impedance Tomography
Amplifier Design for Specified Frequency Response Profiles Using Nullors-Hearing Aids, a Case Study
Two-Dimensional Partially Differential Cepstrum and Its Applications on Filter Stabilization and Phase Unwrapping
Mitigation of Reverse Intermodulation Products at Colocated Base Stations
A Fast Transient Response Hybrid LDO With Highly Accurate DC Voltage Using Countable Bidirectional Binary Search and Soft Swap Switching
An Adaptive Subsystem Based Algorithm for Channel Equalization in a SIMO System
A 0.4-V Miniature CMOS Current Mode Instrumentation Amplifier
A compact tunable CMOS transconductor with high linearity
A 12-b 4-MS/s SAR ADC With Configurable Redundancy in 28-nm CMOS Technology
Limitations of the Simulated Inductors Based on a Single Current Conveyor
Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells
Absolute Temperature Monitoring Using RF Radiometry in the MRI Scanner
High-Voltage-Tolerant Analog Circuits Design in Deep-Submicrometer CMOS Technologies
Capless LDO Regulator Achieving -76 dB PSR and 96.3 fs FOM
A 3.3-mW 25.2-to-29.4-GHz Current-Reuse VCO Using a Single-Turn Multi-Tap Inductor and Differential-Only Switched-Capacitor Arrays With a 187.6-dBc/Hz FOM
A New Front-End for Binary Data Recovery in EM Polluted Environment
A Negative Embedded Differential Mode Γ-Source Inverter With Reduced Switching Spikes
Finite-Impulse-Response Digital Differentiators for Midband Frequencies Based on Maximal Linearity Constraints
Resistive RAM-Centric Computing: Design and Modeling Methodology
Two Polynomial FIR Filter Structures With Variable Fractional Delay and Phase Shift
A 6 $\mu$ W ±50 ppm/°C ±1500 ppm/V 1.5 MHz $RC$ Oscillator Using Self-Regulation
A Low-Noise CMOS Distributed Amplifier for Ultra-Wide-Band Applications
Bio-Inspired Imprecise Computational Blocks for Efficient VLSI Implementation of Soft-Computing Applications
Analog VLSI implementation of spatio-temporal frequency tuned visual motion algorithms
Quantum Implementation Circuits of Quantum Signal Representation and Type Conversion
Available Energy of Proper LLTIP One-Ports
An Extension of MISEP for Post-Nonlinear-Linear Mixture Separation
Locally switched and limited source-body bias and other leakage reduction techniques for a low-power embedded SRAM
Robust Global Stabilization of the DC-DC Boost Converter via Hybrid Control
22.7-dB Gain -19.7-dBm ICP 1dB UWB CMOS LNA
Ultra-Low Noise Amplifier for X-Band SiGe BiCMOS Phased Array Applications
Reconstructing of Networks With Binary-State Dynamics via Generalized Statistical Inference
An Area-Efficient CMOS Bandgap Reference Utilizing a Switched-Current Technique
A Very Low-Complexity 0.3-4.4 GHz 0.004 mm 2 All-Digital Ultra-Wide-Band Pulsed Transmitter for Energy Detection Receivers
Process Variation Tolerant All-Digital 90° Phase Shift DLL for DDR3 Interface
Exponential Consensus of Multiagent Systems With Lipschitz Nonlinearities Using Sampled-Data Information
Global robust stability of delayed neural networks: an LMI approach
Modeling and Analysis of Harmonic Spurs in DLL-Based Frequency Synthesizers
Fixed-Time Disturbance Observer Design for Brunovsky Systems
Model-order reduction using variational balanced truncation with spectral shaping
Phase-Noise Reduction in a CMOS-MEMS Oscillator Under Nonlinear MEMS Operation
A Sub- $\mu$ W Reconfigurable Front-End for Invasive Neural Recording That Exploits the Spectral Characteristics of the Wideband Neural Signal
Quadruply Split Cross-Driven Doubly Recycled g m -Doubling Recycled Folded Cascode for Microsensor Instrumentation Amplifiers
Comprehensive Conception of High Step-Up DC-DC Converters With Coupled Inductor and Voltage Multipliers Techniques
Generalized Dissipativity Analysis of Digital Filters With Finite-Wordlength Arithmetic
On parameter settings of Hopfield networks applied to traveling salesman problems
Phase Noise in LC Oscillators: A Phasor-Based Analysis of a General Result and of Loaded Q
On-Chip Measurement of Jitter Transfer and Supply Sensitivity of PLL/DLLs
Phase diffusion due to low-frequency colored noise
A Time-Domain Model for Predicting the Injection Locking Bandwidth of Nonharmonic Oscillators