yusuke1997/dblp-id-title huggingface dataset:
Design and Implementation of Software-Defined Radio Receiver Based on Blind Nonlinear System Identification and Compensation
A High Efficiency Multi-Mode Outphasing RF Power Amplifier With 31.6 dBm Peak Output Power in 45nm CMOS
A Hardware-Efficient Sigmoid Function With Adjustable Precision for a Neural Network System
Framework for Automated Earthquake Event Detection Based on Denoising by Adaptive Filter
A Broadband Multi-Mode Compressive Sensing Current Sensor SoC in 0.16 µm CMOS
RF Class-D Amplification With Bandpass Sigma-Delta Modulator Drive Signals
Global Stabilization of the Double Integrator System With Saturation and Delay in the Input
State-Space Self-Tuning Control for Stochastic Fractional-Order Chaotic Systems
NLMS Algorithm Based on a Variable Parameter Cost Function Robust Against Impulsive Interferences
Generalized Comb Decimation Filters for Σ∆ A/D Converters: Analysis and Design
A 70 mW 25 Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset With 40 dB of Equalization in 65 nm CMOS Technology
Improved High-Order-Reset-Element Model Based on Circuit Analysis
Two-Phase Self-Assisted Zero-Voltage Switching DC-DC Converter
An Adaptive Partial Feedback Linearizing Control Scheme: An Application to a Single Machine Infinite Bus System
Energy-Efficient Spectral Analysis Method Using Autoregressive Model-Based Approach for Internet of Things
A Multiple-Stage Parallel Replica-Bitline Delay Addition Technique for Reducing Timing Variation of SRAM Sense Amplifiers
Reliable Low-Latency Viterbi Algorithm Architectures Benchmarked on ASIC and FPGA
Effectiveness of Leakage Power Analysis Attacks on DPA-Resistant Logic Styles Under Process Variations
An Integrated Active Reflector for Phase-Sweep Cooperative Diversity
High-Order A-Stable and L-Stable State-Space Discrete Modeling of Continuous Systems
O⁴-DNN: A Hybrid DSP-LUT-Based Processing Unit With Operation Packing and Out-of-Order Execution for Efficient Realization of Convolutional Neural Networks on FPGA Devices
A Generalization of a Fast RNS Conversion for a New 4-Modulus Base
On Feedback Sample Selection Methods Allowing Lightweight Digital Predistorter Adaptation
VLSI Implementation of Lossless ECG Compression Algorithm for Low Power Devices
Polyphase Conditions and Structures for 2-D Quincunx FIR Filter Banks Having Quadrantal or Diagonal Symmetries
Statistical Performance of the Memoryless Nonlinear Gradient Algorithm for the Constrained Adaptive IIR Notch Filter
Design and Packaging of a Fully Autonomous Medical Monitoring System for Dental Applications
A Design of Input-Decimation Technique for Recursive DFT/IDFT Algorithm
Multirate Downsampling Hybrid CT/DT Cascade Sigma-Delta Modulators
On the Design of a Programmable-Gain Amplifier With Built-In Compact DC-Offset Cancellers for Very Low-Voltage WLAN Systems
Voltage Comparator With 60% Faster Speed by Using Charge Pump
A Robust Shipboard DC-DC Power Converter Control: Concept Analysis and Experimental Results
An Amplified Offset Compensation Scheme and Its Application in a Track and Hold Circuit
Adaptive Cancellation of Static and Dynamic Mismatch Error in Continuous-Time DACs
Frequency Tuning Range Extension in LC-VCOs Using Negative-Capacitance Circuits
Positive Observers and Dynamic Output-Feedback Controllers for Interval Positive Linear Systems
A Small Ripple Program Voltage Generator Without High-Voltage Regulator for 3D NAND Flash
A polynomial-operator-based DFIIt structure for IIR filters
Blind Equalization of Nonirreducible Systems Using the CM Criterion
Reference Calibration of Body-Voltage Sensing Circuit for High-Speed STT-RAMs
Fast-Transient DC-DC Converter With On-Chip Compensated Error Amplifier
A singular fixed-point homotopy method to locate the closest unstable equilibrium point for transient stability region estimate
Corrections to "An RNS to Binary Converter in a Three Moduli Set With Common Factors"
Multi-Band Frequency Transformations, Matching Networks and Amplifiers
Cluster Consensus in Networks of Agents With Weighted Cooperative-Competitive Interactions
Microwave Characteristics of an Independently Biased 3-Stack InGaP/GaAs HBT Configuration
A DFE Receiver With Equalized VREF for Multidrop Single-Ended Signaling
A 600-MSPS 8-bit CMOS ADC Using Distributed Track-and-Hold With Complementary Resistor/Capacitor Averaging
Power-Reduction Technique Using a Single Edge-Tracking Clock for Multiphase Clock and Data Recovery Circuits
Torus birth bifurcations in a DC/DC converter
Low-Cost Lifting Architecture and Lossless Implementation of Daubechies-8 Wavelets
A Replica-Driving Technique for High Performance SC Circuits and Pipelined ADC Design
Integral-observer-based chaos synchronization
Class-J SiGe X-Band Power Amplifier Using a Ladder Filter-Based AM-PM Distortion Reduction Technique
Finite-Horizon H ∞ Fault Estimation for Uncertain Linear Discrete Time-Varying Systems With Known Inputs
Intelligent Network-on-Chip With Online Reinforcement Learning for Portable HD Object Recognition Processor
A Low-Power Architecture for the Design of a One-Dimensional Median Filter
Analysis of Frequency-Aid Technique for Fractional-N Digital BB-PLLs in Time-Domain
Analytic Solution to the Photovoltaic Maximum Power Point Problem
A Design Procedure for All-Digital Phase-Locked Loops Based on a Charge-Pump Phase-Locked-Loop Analogy
Analysis and Design of a Ripple Reduction Chopper Bandpass Amplifier
A Low Noise Low Offset Readout Circuit for Magnetic-Random-Access-Memory
An Injection-Locked Frequency Divider With Multiple Highly Nonlinear Injection Stages and Large Division Ratios
An Active Inductor-Based VCO With Wide Tuning Range and High DC-to-RF Power Efficiency
A Recursive Frequency Estimator Using Linear Prediction and a Kalman-Filter-Based Iterative Algorithm
SECS: A New Single-Electron-Circuit Simulator
Generating High-Accuracy Simulation Models Using Problem-Tailored Orthogonal Polynomials Basis
A Fully-Digital BIST Wrapper Based on Ternary Test Stimuli for the Dynamic Test of a 40 nm CMOS 18-bit Stereo Audio ΣΔ ADC
An Area Time-Efficient Structure to Find the Approximate First Two Minima for Min-Sum-Based LDPC Decoders
Analysis of mismatch effects in a randomly interleaved A/D converter system
Wideband Near-Field Data Transmission Using Pulse Harmonic Modulation
A Comment on "Cryptographic Applications of Brahmagupta-Bhãskara Equation"
Para-CORDIC: parallel CORDIC rotation algorithm
Sparse Estimator With ℓ 0 -Norm Constraint Kernel Maximum-Correntropy-Criterion
A Comparative Study on Excess-Loop-Delay Compensation Techniques for Continuous-Time Sigma-Delta Modulators
A Switched-Capacitor Self-Balanced High-Gain Multilevel Inverter Employing a Single DC Source
Stability Analysis of Linear Time-Invariant Fractional Exponential Delay Systems
Turbo NOC: A Framework for the Design of Network-on-Chip-Based Turbo Decoder Architectures
Blind Source Separation of Continuous-Time Chaotic Signals Based on Fast Random Search Algorithm
O=O Shape Low-Loss Negative Group Delay Microstrip Circuit
Secure Variable Data Rate Transmission
Velocity Observer-Based Nonlinear Self-Tuning Position Stabilizer for Ball-Beam System Applications
Miniaturized W-Band Gap Waveguide Bandpass Filter Using the MEMS Technique for Both Waveguide and Surface Mounted Packaging
Identification of the Radial Configurations Extracted From the Weakly Meshed Structures of Electrical Distribution Systems
Programmable G m - C Filters Using Floating-Gate Operational Transconductance Amplifiers
An enhanced first-order sigma-delta modulator with a controllable signal-to-noise ratio
System Level Receiver Design for Minimum Sensitivity to Process Variations
Stability of a class of linear switching systems with time delay
Detecting infinite zeros in polynomial matrices
Area-Efficient Scaling-Free DFT/FFT Design Using Stochastic Computing
A Neuromorphic Computational Primitive for Robust Context-Dependent Decision Making and Context-Dependent Stochastic Computation
A Fully Programmable eFPGA-Augmented SoC for Smart Power Applications
A Systematic Approach for Arbitration Expressions
LMI approach for global periodicity of neural networks with time-varying delays
A +0.66/-0.73 °C Inaccuracy, 1.99-μW Time-Domain CMOS Temperature Sensor With Second-Order ΔΣ Modulator and On-Chip Reference Clock
Convolutive blind source separation by minimizing mutual information between segments of signals
Second-Order Trajectory Sensitivity Analysis of Hybrid Systems
Ultralow-Power Ku-Band Dual-Feedback Armstrong VCO With a Wide Tuning Range
Under-Determined Convolutive Blind Source Separation Combining Density-Based Clustering and Sparse Reconstruction in Time-Frequency Domain
High-Voltage-Gain CMOS LNA For 6-8.5-GHz UWB Receivers
Highly Tunable Triangular Wave UWB Baseband Pulse Generator With Amplitude Stabilization in 40-nm CMOS
Optimal VLSI Delay Tuning by Space Tapering With Clock-Tree Application
Multiuser PSK-Chirp-BOK Communication System Under Co-Channel Interference
Design and Realization of Variable Digital Filters for Software-Defined Radio Channelizers Using an Improved Coefficient Decimation Method
Highest Degree Likelihood Search Algorithm Using a State Transition Matrix for Complex Networks
Reliability Enhancement of Low-Power Sequential Circuits Using Reconfigurable Pulsed Latches
Small Signal Model for PV Fed Boost Converter in Continuous and Discontinuous Conduction Modes
Design of Low-Noise K-Band SiGe Bipolar VCOs: Theory and Implementation
Multilayer hybrid fuzzy neural networks: synthesis via technologies of advanced computational intelligence
Admissible Leader-Following Consensus of Fractional-Order Singular Multiagent System via Observer-Based Protocol
Multibeam Phased-Arrays Using Dual-Vector Distributed Beamforming: Architecture Overview and 28 GHz Transceiver Prototypes
A Modulo-FIR Equalizer for Wireline Communications
A Pulse Frequency Modulation Interpretation of VCOs Enabling VCO-ADC Architectures With Extended Noise Shaping
Improving the security of a dynamic look-up table based chaotic cryptosystem
Distributed Fixed-Time Triggering-Based Containment Control for Networked Nonlinear Agents Under Directed Graphs
Adaptive subsample delay estimation using a modified quadrature phase detector
A 28 Gb/s 1.6 pJ/b PAM-4 Transmitter Using Fractionally Spaced 3-Tap FFE and G m -Regulated Resistive-Feedback Driver
A Connection Between Chaotic and Conventional Cryptography
Statistics of 2-D DT-CWT Coefficients for a Gaussian Distributed Signal
Sliding mode control with closed-loop filtering architecture for a class of nonlinear systems
Exploiting Hysteresys in MCML Circuits
PBC Approach for SMES Devices in Electric Distribution Networks
Analysis of Chaos-Based Code Tracking Using Chaotic Correlation Statistics
Blind compensation of nonlinear distortion for bandlimited signals
A Dominating Error Region Strategy for Improving the Bit-Flipping LDPC Decoder of SSDs
A New Frequency-Limited Interval Gramians-Based Model Order Reduction Technique
A 13.5-mW 10-Gb/s 4-PAM Serial Link Transmitter in 0.13-µm CMOS Technology
Sensing Margin Enhancement Techniques for Ultra-Low-Voltage SRAMs Utilizing a Bitline-Boosting Current and Equalized Bitline Leakage
Asynchronous Max-Consensus Protocol With Time Delays: Convergence Results and Applications
New Signal Processing Methods for the Development of Seizure Warning Devices in Epilepsy
A 0.0045-mm 2 32.4-µW Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation
Low-Power Divider Retiming in a 3-4 GHz Fractional-N PLL
Chopper Capacitively Coupled Instrumentation Amplifier Capable of Handling Large Electrode Offset for Biopotential Recordings
Dynamical Behavior of Chua's Circuit With Lossless Transmission Line
Bandwidth Limitation for the Constant Envelope Components of an OFDM Signal in a LINC Architecture
A Comprehensive Delay Model for CMOS CML Circuits
An Efficient and Parallel R-LWE Cryptoprocessor
The Infimum on Laplacian Eigenvalues of a Connected Extended Graph: An Edge-Grafting Perspective
Bifurcation Analysis of Standalone Photovoltaic-Battery Hybrid Power System
Hybrid Cell Assignment and Sizing for Power, Area, Delay-Product Optimization of SRAM Arrays
An Adaptive Averaging Low Noise Front-End for Central and Peripheral Nerve Recording
Digit-pipelined direct digital frequency synthesis based on differential CORDIC
Asynchronous Spiking Pixel With Programmable Sensitivity to Illumination
A Power Management Unit With 40 dB Switching-Noise-Suppression for a Thermal Harvesting Array
Design Optimization of On-Chip Inductive Peaking Structures for 0.13-μm CMOS 40-Gb/s Transmitter Circuits
A Comparative Study on Controllability Robustness of Complex Networks
Improving Power Efficiency for Active-RC Delta-Sigma Modulators Using a Passive-RC Low-Pass Filter in the Feedback
Event-Based Consensus for a Class of Nonlinear Multi-Agent Systems With Sequentially Connected Topology
Deep In-Memory Architectures for Machine Learning-Accuracy Versus Efficiency Trade-Offs
An X-Band Slow-Wave T/R Switch in 0.25-µm SiGe BiCMOS
Simultaneous Arithmetic Coding and Encryption Using Chaotic Maps
Fast Low-Complexity Triple-Error-Correcting BCH Decoding Architecture
Monte Carlo-Free Prediction of Spurious Performance for ECDLL-Based Synthesizers
A Parallel Radix-Sort-Based VLSI Architecture for Finding the First W Maximum/Minimum Values
Low-hardware complexity PRBGs based on a piecewise-linear chaotic map
Distributed CRC Architecture for High-Radix Parallel Turbo Decoding in LTE-Advanced Systems
Strategies for Reducing Decoding Cycles in Stochastic LDPC Decoders
A technique to increase the efficiency of high-voltage charge pumps
Drawing the Most Power From Low-Cost Single-Well 1-mm 2 CMOS Photovoltaic Cells
A Novel Interpolation Method for Polar Signals in Radio Frequency Transmitters
Power-Efficient and Cost-Effective 2-D Symmetry Filter Architectures
A Triangular Periodic Table of Elementary Circuit Elements
Block-Interlaced LDPC Decoders With Reduced Interconnect Complexity
Design of High-Speed Power-Efficient MOS Current-Mode Logic Frequency Dividers
A CMOS Delta-Sigma PLL Transmitter with Efficient Modulation Bandwidth Calibration
A Power-Efficient Wireless Capacitor Charging System Through an Inductive Link
6WR: A Hardware Friendly 3D-HEVC DMM-1 Algorithm and its Energy-Aware and High-Throughput Design
An Energy-Efficient 3Gb/s PAM4 Full-Duplex Transmitter With 2-Tap Feed Forward Equalizer
An Area-Efficient and Wide-Range Inter-Signal Skew Compensation Scheme With the Embedded Bypass Control Register Operating as a Binary Search Algorithm for DRAM Applications
Generalized Wave Digital Filter Realizations of Arbitrary Reciprocal Connection Networks
A 32, times, 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput
Saturation effects in active noise control systems
Improved Matching-Pursuit Implementation for LTE Channel Estimation
A High-Speed Low-Voltage Phase Detector for Clock Recovery From NRZ Data
An Affine Projection Algorithm With Periodically Evolved Update Interval
On an Improved FPGA Implementation of CNN-Based Gabor-Type Filters
Frequency Distortion of Second- and Third-Order Phase-Locked Loop Systems Using a Volterra-Series Approximation
Design of a Scalable Low-Power 1-Bit Hybrid Full Adder for Fast Computation
Open-Loop Compensation of Hysteresis and Creep Through a Power-Law Circuit Model
Blind extraction of chaotic signal from an instantaneous linear mixture
Variability Analysis of Sense Amplifier for FinFET Subthreshold SRAM Applications
Stabilizing Quorum-Sensing Networks via Noise
Hardware Elliptic Curve Cryptographic Processor Over $\rm GF(p)$
Uniform Design of Multi-Peak Bandwidth Enhancement Technique for Multistage Amplifiers
A Novel Double-Quadrant SoC Consistent Adaptive Droop Control in DC Microgrids
Digital Circuit Realization of Piecewise-Affine Functions With Nonuniform Resolution: Theory and FPGA Implementation
Low-Power/Low-Voltage Integrated CMOS Sense Resistor-Free Analog Power/Current Sensor Compatible With High-Voltage Switching DC-DC Converter
Broadband Balun-LNA Employing Local Feedback g m -Boosting Technique and Balanced Loads for Low-Power Low-Voltage Applications
A Comparative Study of 8-Phase Feedforward-Coupling Ring VCOs
A 132-dB Dynamic-Range Global-Shutter Stacked Architecture for High-Performance Imagers
MRAM-Enhanced Low Power Reconfigurable Fabric With Multi-Level Variation Tolerance
Single-Stage and Cascade Design of High Order Multiplierless Linear Phase FIR Filters Using Genetic Algorithm
Self-Learning RF Receiver Systems: Process Aware Real-Time Adaptation to Channel Conditions for Low Power Operation
Analysis of Low-Frequency Noise in Switched MOSFET Circuits: Revisited and Clarified
Improved Closed Form Large Injection Perturbation Analytical Model on the Output Spectrum of Unlocked Driven Oscillator - Part I: Phase Perturbation
Area-Time Efficient FAST Corner Detector Using Data-Path Transposition
A Unified Amplifier-Based CC-CV Linear Charger for Energy-Constrained Low-Power Applications
Voltage Gain Analysis of Integrated Fibonacci-Like Charge Pumps for Low Power Applications
Modified Booth Multipliers With a Regular Partial Product Array
Theoretical Design and FPGA-Based Implementation of Higher-Dimensional Digital Chaotic Systems
High-Speed Low-Power True Single-Phase Clock Dual-Modulus Prescalers
On the Application of the Describing Function Technique to the Bifurcation Analysis of Nonlinear Systems
Pulsewidth Modulation Circuits Using CMOS OTAs
A Crossbar-Based In-Memory Computing Architecture
Design of QPP Interleavers for the Parallel Turbo Decoding Architecture
An alternative method for numerical inversion of Laplace transforms
A Power Management Strategy for Minimization of Energy Storage Reservoirs in Wireless Systems With Energy Harvesting
Hardware Implementation of GF(2 m ) LDPC Decoders
Charge Pump Improvement for Energy Harvesting Applications by Node Pre-Charging
Digital Implementation of a Single Dynamical Node Reservoir Computer
A CMOS Peak Detect and Hold Circuit With Auto-Adjust Charging Current for NS-Scale Pulse ToF Lidar Application
Low-Power All-Digital Multiphase DLL Design Using a Scalable Phase-to-Digital Converter
A Low Latency FFT/IFFT Architecture for Massive MIMO Systems Utilizing OFDM Guard Bands
Exploiting Stochastic Resonance to Enhance the Performance of Digital Bang-Bang PLLs
Positivstellensatz for Trigonometric Polynomials and Multidimensional Stability Tests
New Models for the Calibration of Four-Channel Time-Interleaved ADCs Using Filter Banks
A 2.2-ps Two-Dimensional Gated-Vernier Time-to-Digital Converter With Digital Calibration
Multisource Prediction Under Nonlinear Dynamics in WSNs Using a Robust Fuzzy Approach
A 250-Mb/s to 6-Gb/s Referenceless Clock and Data Recovery Circuit With Clock Frequency Multiplier
An Empirical Phase-Noise Model for MEMS Oscillators Operating in Nonlinear Regime
Periodic, Strict, and Quasi-Invariance in Linear Systems
A CMOS Image Sensor-Based Stereo Matching Accelerator With Focal-Plane Sparse Rectification and Analog Census Transform
Sub-Nyquist Sampling of BPSK Signals via Feedback Structure
Estimation of Non-Idealities in Sigma-Delta Modulators for Test and Correction Using Unscented Kalman Filters
Periodic Behaviors for Discrete-Time Second-Order Multiagent Systems With Input Saturation Constraints
Pipelined Architectures for Real-Valued FFT and Hermitian-Symmetric IFFT With Real Datapaths
Analysis and Demonstration of an IIP3 Improvement Technique for Low-Power RF Low-Noise Amplifiers
A 5-13.5 Gb/s Multistandard Receiver With High Jitter Tolerance Digital CDR in 40-nm CMOS Process
Cooperation of Multiagent Systems With Mismatch Parameters: A Viewpoint of Power Systems
Analysis and Design of an Adaptive-Step-Size Digital Controller for Switching Frequency Autotuning
Hexa-Band Branch Line Coupler and Wilkinson Power Divider for LTE 0.7 GHz, LTE 1.7 GHz, LTE 2.6 GHz, 3.9 GHz, Public Safety Band 4.9 GHz, and WLAN 5.8 GHz Frequencies
Consistent noise models for analysis and design of CMOS circuits
Low-Cost FPGA Hardware Implementation of Matrix Converter Switch Control
Subsampling Architecture for Low Power Receivers
Exact Analysis of Three-Phase Rectifiers With Constant Voltage Loads
Reference Injected Phase-Locked Loops (PLL-RIs)
A Scalable Optoelectronic Neural Probe Architecture With Self-Diagnostic Capability
Efficient Calibration of Feedback DAC in Delta Sigma Modulators
On Continuous-Time DeltaSigma Modulators With Return-to-Open DACs
A CMOS bandpass filter for low-IF bluetooth receivers
Experimental verification of multidirectional multiscroll chaotic attractors
A 0.45 V, Nano-Watt 0.033% Line Sensitivity MOSFET-Only Sub-Threshold Voltage Reference With no Amplifiers
An Analog Squaring Technique Based on Asynchronous Sigma-Delta Modulation
Structured Parallel Architecture for Displacement MIMO Kalman Equalizer in CDMA Systems
Chaos-Based Spreading in DS-UWB Sensor Networks Increases Available Bit Rate
MAGIC - Memristor-Aided Logic
Closed-Form RC and RLC Delay Models Considering Input Rise Time
Minimum Energy Analysis and Experimental Verification of a Latch-Based Subthreshold FPGA
Stability Analysis of Autonomous Ratio-Memory Cellular Nonlinear Networks for Pattern Recognition
On the Super-Lorenz Chaotic Model for the Virtual Synchronous Generator
Crosstalk-insensitive via-programming ROMs using content-aware design framework
Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II - Data Communication, Energy Harvesting, Power Management, and Digital Circuits
Two-Stage Mixed Discrete-Continuous Identification of Radial Basis Function (RBF) Neural Models for Nonlinear Systems
A Framed-Pulsewidth Modulation Transceiver for High-Speed Broadband Communication Links
A 12.5-bit 4 MHz 13.8 mW MASH ΔΣ Modulator With Multirated VCO-Based ADC
Reduced Complexity Path Selection Networks for M-Algorithm Read Channel Detectors
Low-Pass Filtering SC-DAC for Reduced Jitter and Slewing Requirements on CTSDMs
Design and Implementation of 5-D IIR Depth Velocity Filters for Light Field Video Processing
Nonidealities in traveling wave and transversal FIR filters operating at microwave frequencies
Baseband Model for Uniformly Sampled RF-PWM
A precise 90° quadrature OTA-C oscillator tunable in the 50-130-MHz range
Analysis and Design of a High-Voltage-Gain Hybrid Switched-Capacitor Buck Converter
FPGA Implementation of a Real-Time NARMA-Based Digital Adaptive Predistorter
Energy Efficient Low-Noise Multichannel Neural Amplifier in Submicron CMOS Process
A Mixed-Signal Vector Modulator for Eigenbeamforming Receivers
A Low-Power Quadrature VCO and Its Application to a 0.6-V 2.4-GHz PLL
Controlling Chaos in a Memristor Based Circuit Using a Twin-T Notch Filter
A 2.4 GHz 0.1-Fref-Bandwidth All-Digital Phase-Locked Loop With Delay-Cell-Less TDC
Analysis of Internally Bandlimited Multistage Cubic-Term Generators for RF Receivers
A Frequency Tunable 360° Analog CMOS Phase Shifter With an Adjustable Amplitude
Design Method for RF Energy Harvesting Rectifiers
Consensus of Linear Multiagent Systems With Actuator Saturation and External Disturbances
Suppression of Line Frequency Instabilities in PFC AC-DC Power Supplies by Feedback Notch Filtering the Pre-Regulator Output Voltage
An Energy-Efficient Design for ECG Recording and R-Peak Detection Based on Wavelet Transform
A Novel Adaptive Calibration Scheme for Frequency-Selective I/Q Imbalance in Broadband Direct-Conversion Transmitters
A Millimeter-Wave Wideband Frequency Conversion Module Based on Waveguide Switched Filters
A Reusable Code-Based SAR ADC Design With CDAC Compiler and Synthesizable Analog Building Blocks
A Comparative Analysis of Peaking Methods for Output Stages of Broadband Amplifiers
A Highly Efficient Cipher Processor for Dual-Field Elliptic Curve Cryptography
An Information Theoretical Framework for Analysis and Design of Nanoscale Fault-Tolerant Memories Based on Low-Density Parity-Check Codes
Design of 24-GHz High-Gain Receiver Front-End Utilizing ESD-Split Input Matching Network
A Chopper Instrumentation Amplifier With Input Resistance Boosting by Means of Synchronous Dynamic Element Matching
A 77-GHz CMOS Automotive Radar Transceiver With Anti-Interference Function