yusuke1997/dblp-id-title huggingface dataset:
Semantic-based discovery method for high-performance computing resources in cyber-physical systems
DSP-based control of brushless DC drives for direct-driven robotic arms
A VLSI systolic array processor chip for computing joins in a relational database
EMI-induced failure in microprocessor-based counting
A blockchain security scheme to support fog-based internet of things
A review on hardware accelerators for convolutional neural network-based inference engines: Strategies for performance and energy-efficiency enhancement
FPGA-aware techniques for rapid generation of profitable custom instructions
Object Recommendation based Friendship Selection (ORFS) for navigating smarter social objects in SIoT
Automatic timing of user-system interaction as an evaluation aid for microsystems
Cache timing attacks on NoC-based MPSoCs
High-density information security storage method of big data center based on fuzzy clustering
Euromicro 79: 23-30 August 1979, Svenska Massan Congress Centre, Gothenburg, Sweden Organized by Euromicro
Design and development of an embedded sensors matrix for pressure mapping and monitoring applications
A low-cost and high-performance architecture for robust human detection using histogram of edge oriented gradients
Leakage free helper data storage in microcontroller based PUF implementation
Clustered indexing for branch predictors
Teaching microcomputer-based design using a lift simulator
FPGA-based implementation alternatives for the inner loop of the Secure Hash Algorithm SHA-256
Temperature-aware dynamic voltage and frequency scaling enabled MPSoC modeling using Stochastic Activity Networks
NDP-RANK: Prediction and ranking of NDP systems performance using machine learning
Computer architecture - a modern synthesis, volume 1: foundations, volume 2: advanced topics: S Dasgupta John Wiley, NY, USA (1989) £12.50 paper, £32.85 cloth (vol. 1) £13.95 paper, £33.60 cloth (vol. 2)
Defend mobile agent against malicious hosts in migration itineraries
On a tool-supported model-based approach for building architectures and roadmaps: The MegaM@Rt2 project experience
Multiprocessing and the STEbus
Cross-Cultural communication of language learning social software based on FPGA and transfer learning
A resampling method for parallel particle filter architectures
CNN-Grinder: From Algorithmic to High-Level Synthesis descriptions of CNNs for Low-end-low-cost FPGA SoCs
Protecting integrated circuits against side-channel and fault attacks with dynamic encoding
Retraction notice to 'Medical IoT system platform and elderly patients' femoral shaft fracture nursing': [Microprocessors and Microsystems 82 (2021) 103868]
Microcomputer control of a precision grinding machine
A CAD-oriented analytical model for frequency-dependent series resistance and inductance of microstrip on-chip interconnect on silicon substrate
Microprocessor - controlled driving unit for artificial hearts
Graphbug - a microprocessor software debugging tool
Embedded distributed arithmetic based quaternions multiplier of paraunitary filter bank for lossless-to-lossy image coding
An infrastructure for designing custom embedded wide counterflow pipelines
Rapid transient fault insertion in large digital systems
Student Psychological Management System Based on FPGA Embedded System and Data Mining
A high performance-oriented AI-enabled IoT-based pest detection system using sound analytics in large agricultural field
Service Attack Improvement in Wireless Sensor Network Based on Machine Learning
High-performance processor design based on 3D on-chip cache
Making formal specifications accessible through the use of animation prototyping
IoT-enabled computer vision-based parts inspection system for SME 4.0
Modular and parallel VLSI architecture of multi-dimensional quad-core GA co-processor for real time image/video processing
Design and simulation of nano-arbiters using quantum-dot cellular automata
Interfacing high-level and assembly language with microcodes in 3-D image generation
Computer hardware/software architecture: Wing Toy and Benjamin Zee Prentice Hall, Englewood Cliffs, NJ, USA (1986) £41.70 pp 464
Correlation ratio based volume image registration on GPUs
Design and off-line programming of a dual robot workcell for garment manufacture
Hardware accelerator architecture for simultaneous short-read DNA sequences alignment with enhanced traceback phase
Introduction: Special Section on Architecture of Future Many Core Systems
Dictionary of microelectronics and microcomputer technology: Y H Attiyate and R SwanVDI Verlag, Dusseldorf, FRG (1986) DM78, - pp 470
A power constrained approximate multiplier with a high level of configurability
A modeling tool for simulating and design of on-chip network systems
Analytical derivation of traffic patterns in cache-coherent shared-memory systems
Special Issue on Design of Circuits and Integrated Systems
Microprocessor/ASIC to total ASIC design for cycloconverter drives
A tiny microcontroller dataflow kernel
Interfacing between LVDS and ECL
An FPGA embedded microcontroller
Microsystem design text is marred by dated reference sources: Michael F Hordeski'Design of microprocessor sensor and control systems' Reston Publishing, Reston, VA, USA (1985) £37.40 pp xv + 376
Home intelligent sports action automation system based on bluetooth
A model for security and protection in persistent systems
Interfacing transputer links to external devices
An embedded software-reconfigurable color segmentation architecture for image processing systems
An SoC architecture for energy detection based spectrum sensing using Low Latency Column Bit Compressed (LLCBC) MAC in cognitive radio wireless sensor networks
Digital signal processors - development tools, applications and potential
A low power multi-rate decoder hardware for IEEE 802.11n LDPC codes
Rabin-Karp algorithm based malevolent node detection and energy-efficient data gathering approach in wireless sensor network
CuNoC: A dynamic scalable communication structure for dynamically reconfigurable FPGAs
Virtual reality sports auxiliary training system based on embedded system and computer technology
High speed FPGA-based data acquisition system
Virtual simulation design and effect of high jump technology action optimization based on complex embedded system
Microprocessor interrupt handling
FPGA-based remote target classification in hyperspectral imaging using multi-graph neural network
Unix standards and the Native Language System
PGOpt: Multi-objective design space exploration framework for large-Scale on-chip power grid design in VLSI SoC using evolutionary computing technique
Fast and efficient FPGA implementation of Polar Codes and SoC test bench
Using macroassemblers to create microprocessor crossassemblers
ARINC 653 - Achieving software re-use
PR 3 : A system For radio-interferometry and radiation measurement on sounding rockets
Long-term on-chip verification of systems with logical events scattered in time
Retraction notice to 'An Improved Dynamic Process Neural Network Prediction Model Identification Method' [Microprocessors and Microsystems 80 (2021) 103573]
Software Reliability Growth Fault Correction Model Based on Machine Learning and Neural Network Algorithm
A novel configurable flip flop design using inherent capabilities of quantum-dot cellular automata
Optimization for deep convolutional neural network of stochastic computing on MLC-PCM-based system
Standards in microcomputer system design
An efficient video summarization for surveillance system using normalized k-means and quick sort method
A low power and high resolution data logger for submarine seismic monitoring
Middleware solutions for QoS in distributed multimedia services
Low-latency X25519 hardware implementation: breaking the 100 microseconds barrier
A novel framework for deployment of CNN models using post-training quantization on microcontroller
Combining BOUNCE and X-ORCA: Improving their real-world utility
Effects of topology and buffering on a processor farm
Experiences and future challenges in mobile agent programming
Software technique for a microcomputer-based digital instrumentation scheme using functional expansion
Aids for the visually handicapped
Developing Domain-Knowledge Evolutionary Algorithms for Network-on-Chip Application Mapping
Prototyping using multi-FPGA platform: A novel and complete flow
Flower pollination algorithm for distribution system phase balancing considering variable demand
Motorola Microcomputer Forum: 30 April 1981 Heathrow Hotel, London Airport, UK
An interactive and dynamic scratchpad memory management strategy for multi-core processors
Hybrid encoding for test data compression
Design and optimization of adaptable BCH codecs for NAND flash memories
Practical introduction to expert systems
P 2 IP: A novel low-latency Programmable Pipeline Image Processor
Scalable high-throughput variable block size motion estimation architecture
Scalable benchmark synthesis for performance evaluation of NoC core mapping
A smart grid incorporated with ML and IoT for a secure management system
Performance improvement of solar powered evaporative cooler using versatile ecological balanced control technique
Application of evolutionary algorithm in performance optimization of embedded network firewall
Microprocessor-based digital controller for DC motor speed control
Hardware implementation of dynamic fuzzy logic based routing in Network-on-Chip
Indoor space art design based on immersive VR and embedded system
A configurable multiplex data transfer model for asynchronous and heterogeneous FPGA accelerators on single DMA device
Using dataflow in a system of multiple single board computers
Research on monitoring the load of short-distance orienteering sports on campus based on embedded system acceleration sensor
Linear and quadratic time frequency transforms on FPGA using folding technique
6809 microcomputer programming and interfacing with experiments: Andrew C Staugaard, Jr, Prentice-Hall (1981) pp 270 £9.05
A CAD approach for pre-layout optimal PDN design and its post-layout verification
Design and implementation of cascaded H-Bridge multilevel inverter using FPGA with multiple carrier phase disposition modulation scheme
Use of microcomputers in monitoring instruments, data aquisition, analysis and control
Low cost technologies for aerospace applications
Monitoring and optimizing the state of pollution of high voltage insulators using wireless sensor network based convolutional neural network
Exploring a Hybrid Voting-based Eviction Policy for Caches and Sparse Directories on Manycore Architectures
The design of a microprocessor: Spruth, W G Springer Verlag, Heidelberg, FRG (1989) DM 98 pp 346
Design configuration selection for hard-error reliable processors via statistical rules
Design of hospital embedded system and the treatment of cervical spondylopathy
Cross-architecture prediction based scheduling for energy efficient execution on single-ISA heterogeneous chip-multiprocessors
Computer aided embedded medical system and clinical treatment effect of heart failure based on clinical data
Internet of things medical image detection and pediatric renal failure dialysis complicated with respiratory tract infection
Minimizing the system impact of router faults by means of reconfiguration and adaptive routing
Features, design and implementation of high-level language debuggers
Systems control for a micro-stereolithography prototype
ELEON3LP - Superscalar and low-power enhancements of single issue general purpose processor model
Anomaly detection in wearable location trackers for child safety
Hysteresis-controlled - landsman converter based multilevel inverter fed induction-motor system using PIC
FDDI dual attachment station on a PC-AT interface card
Hospital remote monitoring embedded system and nursing intervention for patients with anxiety and insomnia
ARM-based arrhythmia beat monitoring system
Microcomputer compilation and solution of crosswords
Performance linked dynamic cache tuning: A static energy reduction approach in tiled CMPs
The ACROSS MPSoC - A new generation of multi-core processors designed for safety-critical embedded systems
The 68000 and its interface
MMNNN: A tree-based Multicast Mechanism for NoC-based deep Neural Network accelerators
Using Machine Learning for predicting area and Firmware metrics of hardware designs from abstract specifications
Parallel controller synthesis for programmable logic devices
Analytical synthesis of bandwidth-efficient SDRAM address generators
Displaying digital images in a distributed processing environment
High performance hardware correlation coefficient assessment using programmable logic for ECG signals
Writing-only in-MRAM computing paradigm for ultra-low power applications
Formal timing analysis of gate-level digital circuits using model checking
Mixture-of-Rookies: Saving DNN computations by predicting ReLU outputs
Scalable matrix decompositions with multiple cores on FPGAs
System components: application notes
Memory management of safety-critical hard real-time systems designed in SystemJ
iRMX 86 - a realtime operating system for advanced 16-bit microcomputers
Artificial intelligence enterprise human resource management system based on FPGA high performance computer hardware
PSD301 programmable peripheral with memory for microcontroller and embedded microprocessor applications
BIAS '78: 21-23 November 1978, Milan, Italy. Organized by Federazione delle Associazioni Scientifiche e Tecniche, Milan
Microprocessor program development support
Transputer implementation for multiple target tracking
Structure optimization of big data financial industry based on 5g network processor and embedded system
Learning compact and discriminative hybrid neural network for dental caries classification
FPGA implementation of bearing tracking using passive array for underwater acoustics
Delay-efficient bus encoding techniques
Implementation-aware selection of the custom instruction set for extensible processors
Analogue interface and DSP sourcebook: Alan Clements McGraw-Hill, Maidenhead, UK (1993) ISBN 0 07 707694 X, £65.00, pp 1120
modula-2 programming: Ed Knepley and Robert PlattReston Publishing, Reston, VA, USA (1985) £12.95 pp x + 390
The physics of driving backplane buses
Hardware-assisted virtualization extensions for LEON processors in mixed-criticality systems
FPGA-based performance analysis of stream ciphers ZUC, Snow3g, Grain V1, Mickey V2, Trivium and E0
Feasibility of Recurrent Neural Network for the Binary classification of Non stationary signals
Digital circuits: a preparation for microprocessors: Charles W McKay, Prentice-Hall International, Englewood Cliffs, NJ, USA (1978) 366pp, £12.55 ($22.80)
Secure hybrid replacement policy: Mitigating conflict-based cache side channel attacks
A 1.2-V 162.9 pJ/cycle bitmap index creation core with 0.31-pW/bit standby power on 65-nm SOTB
SLOPE: Safety LOg PEripherals implementation and software drivers for a safe RISC-V microcontroller unit
RED-SEA Project: Towards a new-generation European interconnect
The Defense Against Jamming Attack in Cognitive Radio Networks: Energy Efficiency Management Perspective
Ascon hardware implementations and side-channel evaluation
Microprocessor controlled exhaust gas lambda sensor
Microprocessors and componrnt technologies
Calculation of probabilistic testability measures for digital circuits with Structurally Synthesized BDDs
Big data monitoring of sports health based on microcomputer processing and BP neural network
An improved power conditioning system for grid integration of solar power using ANFIS based FOPID controller
An efficient image segmentation and classification of lung lesions in pet and CT image fusion using DTWT incorporated SVM
A novel SOSMC based SVPWM control of Z-source inverter for AC microgrid applications
Practical guide to BBC Micro interfacing: Roger Morgan, Winston McClean and Joan Rosell'Interfacing your BBC Microcomputer' Prentice-Hall, Englewood Cliffs, NJ, USA (1985) £8.95 pp ix + 179
Business big data analysis based on microprocessor system and mathematical modeling
Realtime implementation of the Viterbi decoding algorithm on a high-performance microprocessor
Construction of hospital IoT embedded system and drug analgesia after bone and joint replacement
Verification of Chisel Hardware Designs with ChiselVerify
Design and implementation of a hypercube multiprocessor
Recommender system implementations for embedded collaborative filtering applications
Generic model implementation of deep neural network activation functions using GWO-optimized SCPWL model on FPGA
Multiprocessor solution in OCCAM to an NP-complete problem
Power consumption of 3D networks-on-chips: Modeling and optimization
Error detection and correction with the IDT49C466
LP-HLS: Automatic power-intent generation for high-level synthesis based hardware implementation flow
A transputer based vehicle simulator
Artificial intelligence medical platform and clinical care of chronic obstructive pulmonary disease based on microprocessor
A VHDL--Forth Core for FPGAs
Aggregate Farming in the Cloud: The AFarCloud ECSEL project
Secure IP downloading for SRAM FPGAs
Decentralized load balancing for highly irregular search problems
Power quality enhancement in solar power with grid connected system using UPQC
Mapping multiple applications with unbounded and bounded number of cores on many-core networks-on-chip
Characterizing asynchronous variable latencies through probability distribution functions
Side-channel disassembly on a System-on-Chip: A practical feasibility study
Hardware architecture of Dillon's APN permutation for different primitive polynomials
Real-time voxel-based visual hull reconstruction
Demand side management of small scale loads in a smart grid using glow-worm swarm optimization technique
Converting text into speech in real time with microcomputers
A hybrid SSD with PRAM and NAND Flash memory
Multi-objective availability and cost optimization by PSO and COA for series-parallel systems with subsystems failure dependencies
MTTR reduction of FPGA scrubbing: Exploring SEU sensitivity
Exception handling in the 68000, Part 2
Power- and performance-efficient cluster-based network-on-chip with reconfigurable topology
Logistics supply chain information collaboration based on FPGA and internet of things system
An educational tool for enhanced mobile e -Learning for technical higher education using mobile devices for augmented reality
Influencing factors of college students' entrepreneurial ecosystem based on the internet of things and embedded systems
Speech-recognition cloud harvesting for improving the navigation of cyber-physical wheelchairs for disabled persons
Automatic testing and evaluation of digital integrated circuits: J T Healy, Reston (1981) 236 pp £14.25
Semicustom microprocessor: an undergraduate study
An improved multilayer perceptron approach for detecting sugarcane yield production in IoT based smart agriculture
A SystemC library for specifying pipeline abstractions
Research on Arm Embedded System for Football Robot
High speed and efficient area optimal ate pairing processor implementation over BN and BLS12 curves on FPGA
Energy-efficient synonym data detection and consistency for virtual cache
Microprocessor system development: Amghar, Alain Prentice Hall (1990) 236 pp, £19.50, ISBN 0-13-582750-7
Non-clocked encoded keyboard design
Electrical and optical transmission of IEEE 1355 DS-links
Sequential diagnosis tool
RelNet-MAM: Relation Network with Multilevel Attention Mechanism for Image Captioning
Accelerating the evolution of a systolic array-based evolvable hardware system
Designing for testability
Dynamic and selective low power data TLB system
Nursing intervention of cognitive impairment after cerebral infarction based on internet of things video monitoring
Timing analysis for processor farm environments
GPU-based anisotropic diffusion algorithm for video image denoising
An FPGA-based architecture for embedded systems performance acceleration applied to Optimum-Path Forest classifier
An FPGA-based multiprocessor-architecture for intelligent environments
Microcomputer project management
Software controller for an arithmetic processor
The RHODOS DSM system
Software strategy for multiprocessors
Error detection and correction using SN54/74LS630 or SN54/74LS631
Transition sequence based Walsh Encoder: A novel power efficient architecture
Design of PWM with four transistor comparator for DC-DC boost converters
Self-clocked asynchronous state machine design with PAL221P6
HARP: A parallel pipelined RISC processor
Hardware-software co-simulation of bus-based reconfigurable systems
ON-Chip peripherals are ON for chaos - an image fused encryption
Network-on-Chip based MPSoC architecture for k-mean clustering algorithm
Technical 16-bit systems info aims at students: Texas Instruments '16-bit microprocessor system' McGraw-Hill, New York, USA (1982) £35.95
Energy-aware scheduling, compilation, and execution of hard-real-time multi-task Java programs
A BiNoC architecture - aware task allocation and communication scheduling scheme
Influence of frequent flood disaster on agricultural productivity of rice planting and structural optimization strategy
Application of embedded wearable devices in football training injury prevention
Portable software for connecting remote microcomputers and a central minicomputer
New generation of microsystem simulators
Flexible kinematics for modular robots
Animation virtual reality scene modeling based on complex embedded system and FPGA
Transform-domain and DSP based secure speech communication system
Two novel shared-clock scheduling algorithms for use with 'Controller Area Network' and related protocols
MorphoNoC: Exploring the design space of a configurable hybrid NoC using nanophotonics
Security analysis of reversible logic cryptography design with LFSR key on 32-bit microcontroller
Electronic logic systems: Almaini, A E APrentice-Hall, Englewood Cliffs, NJ, USA (1985) £14.95 pp 452
Design and evaluation of a high throughput QoS-aware and congestion-aware router architecture for Network-on-Chip
Microprocessor-based event sequence recorder
A high performance ST-Box based unified AES encryption/decryption architecture on FPGA
Time-predictable distributed shared on-chip memory
HPAC-sbox- a novel implementation of predictive learning classifier and adaptive chaotic s-box for counterfeiting sidechannel attacks in an IOT networks
Mapping of nomadic multimedia applications on the ADRES reconfigurable array processor
Susceptibility characterization of microprocessor and LSI technology
Ecological environment management system based on artificial intelligence and complex numerical optimization
A novel moving-base RTK-GPS-Based wearable apparatus for precise localization of humans in peril
CubeDMA - Optimizing three-dimensional DMA transfers for hyperspectral imaging applications
Using graph isomorphism for mapping of data flow applications on reconfigurable computing systems
Concurrent and comparative fault simulation in SystemC and its application in robustness evaluation
Distributed persistent stores
Functional self-test of high-performance pipe-lined signal processing architectures
Early RTL delay prediction using neural networks
Remote dynamic partial reconfiguration: A threat to Internet-of-Things and embedded security applications
Optical character recognition using fuzzy logic
Making Unix online documentation more effective
A real-time global stereo-matching on FPGA
Micro controller-based digital filter implementation using an Intel 8097
Using the TLC549 serial output ADC
A development environment for rapid prototyping of user applications on distributed memory multiprocessor systems
An efficient hardware implementation of MQ decoder of the JPEG2000
British Microcomputer Manufacturers' Group Seminar: 9-10 February 1982, Institute of Civil Engineering, Great George Street, London. Organized by the British Microcomputer Manufacturers' Group
Bit Impact Factor: Towards making fair vulnerability comparison
Undocumented features of the X5 flag belt in the 8085 microprocessor: Many 8085 users have found problems in comparing signed operands using conventional methods
Clock synchronisation on multiple TTCAN network channels
Designing microprocessor-based instrumentation: J J CarrPrentice Hall (1982) £17.55 pp 323