yusuke1997/dblp-id-title huggingface dataset:
CLOCK-DWF: A Write-History-Aware Page Replacement Algorithm for Hybrid PCM and DRAM Memory Architectures
The Use of Delay Lines in Reading a Manchester Code
A Note on Internal State Minimization in Incompletely Specified Sequential Networks
Asymmetric Crosstalk Harness Signaling for Common Eigenmode Elimination
Aspects of a Dynamically Adaptive Operating System
B73-4 High Level Languages - International Computer State of the Art Report
Parametric Dispatching of Hard Real-Time Tasks
Tradeoffs Between Coupling Small and Large Processors for Transaction Processing
The Rule-Based Approach to Reconfiguration of 2-D Processor Arrays
A Remark on the Nonminimality of Certain Multiple Fault Detection Algorithms
"Ideally Fast" Decimal Counters with Bistables
Error Analysis of CORDIC-Based Jacobi Algorithms
Systematic t-Unidirectional Error-Detecting Codes over Zm
Threshold Gate Approximations Based on Chow Parameters
Pipelining Sequential Circuits with Wave Steering
VLSI Architectures for Multidimensional Fourier Transform Processing
New Efficient MDS Array Codes for RAID Part I: Reed-Solomon-Like Codes for Tolerating Three Disk Failures
Design of an NoC Interface Macrocell with Hardware Support of Advanced Networking Functionalities
Implementing End-to-End Register Data-Flow Continuous Self-Test
Further Comments on "An Optimal Solution for the Channel-Assignment Problem"
A Timed-Shared Digital Filter Realization
Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode
Pulse Generator with Logarithmic Spacing
HPKA: A High-Performance CRYSTALS-Kyber Accelerator Exploring Efficient Pipelining
Multilevel Diode Logic Circuits
Architecture of a Self-Checkpointing Microprocessor that Incorporates Nanomagnetic Devices
Radix-2 Division Algorithms with an Over-Redundant Digit Set
High-Performance Rekeying Processor Architecture for Group Key Management
A Comment on "Boolean Functions Classification via Fixed Polarity Reed-Muller Form'
Job Scheduling in a Single-Node Hierarchical Network for Process Control
Generation of Phonetic Units for Mixed-Language Speech Recognition Based on Acoustic and Contextual Analysis
On the Quality of Random Sequences Produced with a Combined Random Bit Generator
Refresh-Aware Write Recovery Memory Controller
Determination of the Final State of an Automaton Whose Initial State Is Unknown
SpikeBASE: Spiking Neural Learning Algorithm With Backward Adaptation of Synaptic Efflux
Using Node Diagnosability to Determine t-Diagnosability under the Comparison Diagnosis Model
New Scheduling Strategies for Randomized Incremental Algorithms in the Context of Speculative Parallelization
Analog Computer Automatic Parameter Optimization of Nonlinear Control Systems with Specific Inputs
The Analysis of the Faulty Behavior of Synchronous Neural Networks
An Algorithm for Threshold Element Analysis
CLU: Co-Optimizing Locality and Utility in Thread-Aware Capacity Management for Shared Last Level Caches
Accurate Determination of Loop Iterations for Worst-Case Execution Time Analysis
Complete System Power Estimation Using Processor Performance Events
Investigating the Energy Sink-Hole Problem in Connected k -Covered Wireless Sensor Networks
Radix-16 Signed-Digit Division
${O(N)}$O(N) Memory-Free Hardware Architecture for Burrows-Wheeler Transform
A Split MAC Approach for SDR Platforms
High Performance Hierarchical Tucker Tensor Learning Using GPU Tensor Cores
On the Interplay of Voltage/Frequency Scaling and Device Power Management for Frame-Based Real-Time Embedded Applications
Equivalence Proofs of Some Yield Modeling Methods for Defect-Tolerant Integrated Circuits
A Graphical Interpretation of Realization of Symmetric Boolean Functions with Threshold Logic Elements
Redundant-Digit Floating-Point Addition Scheme Based on a Stored Rounding Value
ARMOR: A Recompilation and Instrumentation-Free Monitoring Architecture for Detecting Memory Exploits
A New Algorithm for Inner Product
On Using an Analog Computer to Study Hydrodynamic Stability
Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue Cores
A Safe Stochastic Analysis with Relaxed Limitations on the Periodic Task Model
Task Allocation on a Network of Processors
An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization
Identification of Multiple Stuck-Type Faults in Combinational Networks
Pubsub: An Efficient Publish/Subscribe System
Performance Evaluation of a Dataflow Architecture
NetCRC-NR: In-Network 5G NR CRC Accelerator
On the Efficient Assignment of Internal Codes to Sequential Machines
Extremely Low Cost Error Protection with Correctable Parity Protected Cache
Comments on "A New Algorithm for Generating Prime Implicants"
On Analytical Modeling of Intermittent Faults in Digital Systems
Design of Multicategory Pattern Classifiers with Two-Category Classifier Design Procedures
The Design of a Large Electrostatic Memory
Correcting the Normalization Shift of Redundant Binary Representations
Built-In Testing of Memory Using an On-Chip Compact Testing Scheme
The Application of the Rademacher-Walsh Transform to Boolean Function Classification and Threshold Logic Synthesis
Polylogic Realization of Switching Functions
Byzantine-Resilient Federated Learning at Edge
An Investigation of Alternative Cache Organizations
Optimization of Reduced Dependencies for Synchronous Sequential Machines
Dynamic Hardware Monitors for Network Processor Protection
Concurrent Fault Detection in Microprogrammed Control Units
Fair Bandwidth Allocation for Multicasting in Networks with Discrete Feasible Set
Models of Computational Systems-Cyclic to Acyclic Graph Transformations
An Optimal Allocation of Carry-Save-Adders in Arithmetic Circuits
Systematic Random Error Correcting and All Undirectional Error Detecting Codes
Image Processing on ZMOB
Accelerating RNA-Seq Quantification on a Real Processing-in-Memory System
A Recursive Carry-Lookahead/Carry-Select Hybrid Adder
Variants of an Improved Carry Look-Ahead Adder
New Concepts for Three-Dimensional Shape Analysis
An Analog Method for Constructing a Curve
Efficient VLSI Networks for Parallel Processing Based on Orthogonal Trees
Detection and Location of Input and Feedback Bridging Faults Among Input and Output Lines
On-Line Computer Classification of Handprinted Chinese Characters as a Translation Aid
A Stochastic Computational Multi-Layer Perceptron with Backward Propagation
Data Diversity: An Approach to Software Fault Tolerance
A Secure and Flexible Blockchain-Based Offline Payment Protocol
Bit Steering in the Minimization of Control Memory in Microprogrammed Digital Computers
Verification of Register Transfer Level Parallel Control Sequences
ECC-United Cache: Maximizing Efficiency of Error Detection/Correction Codes in Associative Cache Memories
Two Reconstruction Methods for Microwave Imaging of Buried Dielectric Anomalies
Stochastic Circuits for Computing Weighted Ratio With Applications to Multiclass Bayesian Inference Machine
Asynchronous Parallel Prefix Computation
λDNN: Achieving Predictable Distributed DNN Training With Serverless Architectures
Improved Digital Signature Suitable for Batch Verification
Memory Data Flow Modeling in Statistical Simulation for the Efficient Exploration of Microprocessor Design Spaces
A Simulation Analysis of Redundancy and Reliability in Primary Storage Deduplication
Comments on "The Identification of Maximal Parallelism in Straight-Line Microprograms"
Geometrical and Statistical Properties of Systems of Linear Inequalities with Applications in Pattern Recognition
On Finding a Minimal Set of Diagnostic Tests
On the Design of Fault-Tolerant Scheduling Strategies Using Primary-Backup Approach for Computational Grids with Low Replication Costs
Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach
An Architecture for Fault-Tolerant Computation with Stochastic Logic
Spectrum Analysis of Digital Magnetic Recording Waveforms
Synergizing Wireless Communication Technologies to Improve Internet Downloading Experiences
Controllability and Fault Observability in Modular Combinational Circuits
High-Order Probability Generators
Nonstable Cycle and Level Sets for Linear Sequential Machines
Collusive Piracy Prevention in P2P Content Delivery Networks
Efficient Diagnosis of Multiprocessor Systems under Probabilistic Models
CAMVA: An Extension Architecture of CNN Accelerators for Multi-View Acceleration
Validating Families of Latency Insensitive Protocols
On-Demand Block-Level Address Mapping in Large-Scale NAND Flash Storage Systems
A Note on the System Requirements of a Digital Computer for the Manipulation of List Structures
Decimal-Binary Conversions in CORDIC
Reliability and Performance of Error-Correcting Memory and Register Arrays
An Online Heuristic for Maximum Lifetime Routing in Wireless Sensor Networks
Games That Teach the Fundamentals of Computer Operation
The Shift X Parity Watch Algorithm for Raster Scan Displays
Enhanced Hypercubes
Secure Lightweight Key Exchange Using ECC for User-Gateway Paradigm
A Note on Division Algorithms Based on Multiplication
Fast Data Delivery for Many-Core Processors
On Group Graphs and Their Fault Tolerance
Transform Method of Curve Detection for Textured Image Data
Generalized Hopfield Neural Network for Concurrent Testing
On an Improved Diagnosis Program
Statistical Prediction of Task Execution Times through Analytic Benchmarking for Scheduling in a Heterogeneous Environment
Latch-to-Latch Timing Rules
Control Memory Wort Width Optimization Using Multiple-Valued Circuits
A Hybrid Non-Volatile Cache Design for Solid-State Drives Using Comprehensive I/O Characterization
Logically Instantaneous Message Passing in Asynchronous Distributed Systems
Reaching Fault Diagnosis Agreement under a Hybrid Fault Model
Hexagonal Parallel Pattern Transformations
An Exact Stochastic Analysis of Priority-Driven Periodic Real-Time Systems and Its Approximations
Very High Radix Square Root with Prescaling and Rounding and a Combined Division/Square Root Unit
On Slot Allocation for Time-Constrained Messages in Dual-Bus Networks
A New Cube Attack on MORUS by Using Division Property
Design and Performance Evaluation of Efficient Consensus Protocols for Mobile Ad Hoc Networks
The Current Mode Fuzzy Logic Integrated Circuits Fabricated by the Standard CMOS Process
A Data Flow Computer Architecture with Program and Token Memories
Topological properties of hypercubes
ILLIAC IV Software and Application Programming
R68-14 Microprogrammed Control in Problem-Oriented Languages
An Improved Distribution Algorithm for Shortest Paths Problem
R70-7 Stability Controls for the Analysis of Analog/Digital Hybrid Loops
Teraflops Supercomputer: Architecture and Validation of the Fault Tolerance Mechanisms
General Synthesis of Tributary Switching Networks
Cobalt-Substituted γ-Fe 2 O 3 as a High-Density Recording Tape
TRAID: Exploiting Temporal Redundancy and Spatial Redundancy to Boost Transaction Processing Systems Performance
Sharp Thresholds for Scheduling Recurring Tasks with Distance Constraints
A Lightweight Detection Algorithm For Collision-Optimized Divide-and-Conquer Attacks
Proofs of Correctness and Properties of Integer Adder Circuits
Algorithm for Minimal Polarized Polynomial Form Determination
High-Speed Shift Registers Using One Core Per Bit
HGNAS: Hardware-Aware Graph Neural Architecture Search for Edge Devices
Reliability of an Air Defense Computing System: Component Development
aChain: A SQL-Empowered Analytical Blockchain as a Database
Comment on "Generalized Parallel Redundancy in Digital Computers"
LightWarner: Predicting Failure of 3D NAND Flash Memory Using Reinforcement Learning
Dynamically-Allocated Multi-Queue Buffers for VLSI Communication Switches
Farewell State of the Journal Editorial
On Optimal Deadlock Detection Scheduling
Random Pattern Testability of Memory Control Logic
Wire-Speed TCAM-Based Architectures for Multimatch Packet Classification
A Loop-Structured Switching Network
Dynamic Testing of Control Units
Analysis of Chordal Ring Network
A Reliability Model for Gracefully Degrading and Standby-Sparing Systems
Queuing Analysis of an Optical Disk Jukebox Based Office System
On Dolotta-McCluskey Technique
Economic Pseudodivision Processes for Obtaining Square Root, Logarithm, and Arctan
Symmetric Property and Reliability of Balanced Hypercube
Merged Arithmetic
IDDQ Testing of Bridging Faults in Logic Resources of Reconfigurable Field Programmable Gate Arrays
A Case for Application-Managed Flash
A Note On Threshold Device Error Analysis
A Practical Approach to Fault Detection in Combinational Networks
Enumeration of Ternary Threshold Functions of Three Variables
Leveraging Process Variation for Performance and Energy: In the Perspective of Overclocking
A Unified Method for the Reconstruction of Sampled Data
A Dependable High Performance Wafer Scale Architecture for Embedded Signal Processing
Symmetric and Threshold Boolean Functions Are Exhaustive
Stochastic Modeling and Analysis of Propagation Delays in GaAs Adders
CA-Based Byte Error-Correcting Code
A Cellular Array for the Nonrestoring Extraction of Square Roots
The t/k-Diagnosability of Star Graph Networks
Double Adjacencies Between Cycles of a Circulating Shift Register
Totally Preset Checking Experiments for Sequential Machines
Counting with Majority-Logic Networks
An Algorithm for the Machine Computation of Partial-Fractions Expansion of Functions Having Multiple Poles
Ultrahigh Reliability Prediction for Fault-Tolerant Computer Systems
An Effective Pixel Rasterization Pipeline Architecture for 3D Rendering Processors
Rollback and Recovery Strategies for Computer Programs
Improving Interference Analysis for Real-Time DAG Tasks Under Partitioned Scheduling
The Future of Parallel Processing
Content-Addressable and Associative Memory Systems a Survey
"Datum processing, " "digital datum transmission, " and "automaton theory"
Generalized Algorithm-Based Fault Tolerance: Error Correction via Kalman Estimation
Preempt a Job or Not in EDF Scheduling of Uniprocessor Systems
The Case for Secure Miniservers Beyond the Edge
Examining Smart-Card Security under the Threat of Power Analysis Attacks
Efficient Notification Ordering for Geo-Distributed Pub/Sub Systems
On the Distribution of Sums of Successive Bits of Shift-Register Sequences
A High-Speed "Compare" Circuit
Three Cell Structures for Ternary Cellular Arrays
Automatic Refinement Checking of Pipelines with Out-of-Order Execution
Higher-Radix Division Using Estimates of the Divisor and Partial Remainders
A Computer Resource Allocation Model with Some Measured and Simulation Results
Automatic Scaling of Internet Applications for Cloud Computing Services
Checkpoint Faults are not Sufficient Target Faults for Test Generation
Wiring Knock-Knee Layouts: A Global Approach
Toward Efficient Task Management in Wireless Sensor Networks
A Comprehensive Test Pattern Generation Approach Exploiting the SAT Attack for Logic Locking
Comments on "Feature Selection with a Linear Dependence Measure"
Distributed Scheduling of Tasks with Deadlines and Resource Requirements
Comment on "A Transform for Logic Networks"
Integrated Planning of Biomass Inventory and Energy Production
Markovian Queueing Network Models for Performance Analysis of a Single-Bus Multiprocessor System
An Optimal Algorithm for Computing Fourier Texture Descriptors
Reducing Branch Delay to Zero in Pipelined Processors
Multiform Partial Symmetry and Linearity
A Quasi-Species Model for the Propagation and Containment of Polymorphic Worms
Aspects of Applicative Programming for Parallel Processing
The Search for a Definition of Partition Pair for Stochastic Automata
Fas Search Algorithms for Associative Memories
Conversion Function Clustering and Selection Using Linguistic and Spectral Information for Emotional Voice Conversion
The Effect on Throughput of Multiprocessing in a Multiprogramming Environment
Practical Approximation of Single-Qubit Unitaries by Single-Qubit Quantum Clifford and T Circuits
Statistical Performance Comparisons of Computers
Single-Key Attack on Full-Round Shadow Designed for IoT Nodes
A Solution to the Polynomial Hensel Code Conversion Problem
SAL-PIM: A Subarray-Level Processing-in-Memory Architecture With LUT-Based Linear Interpolation for Transformer-Based Text Generation
A Cost-Effective Combining Structure for Large-Scale Shared-Memory Multiprocessors
NP-Hard Module Rotation Problems
Value Iteration Architecture Based Deep Learning for Intelligent Routing Exploiting Heterogeneous Computing Platforms
Speaker Adaptation in a Limited Speech Recognition System
A Game Theoretic Framework for Power Control in Wireless Sensor Networks
R2: Incremental Reprogramming Using Relocatable Code in Networked Embedded Systems
Synthesis of Practical Three-Input Majority Logic Networks
A Simulation Study of the CRAY X-MP Memory System
Allocation and Mapping Based Reliability Analysis of Multistage Interconnection Networks
Is switching theory mathematics or engineering?
Efficient RNS Scalers for the Extended Three-Moduli Set (2 n -1, 2 n+p , 2 n +1)
Computing Accurate Performance Bounds for Best Effort Networks-on-Chip
The Characterization and Properties of Cascade Realizable Switching Functions
Elimination of Overhead Operations in Complex Loop Structures for Embedded Microprocessors
Designing a Modern Memory Hierarchy with Hardware Prefetching
An Accurate Bidirectional Transmission Gate Using Semiconductor Diodes
A Unified Approach to the Evaluation of a Class of Replacement Algorithms
Analog-Computer Representation of Inelastic Stops
Least Upper Bounds for the Size of OBDDs Using Symmetry Properties
Extending EFSMs to Specify and Test Timed Systems with Action Durations and Time-Outs
A Dynamic Programming Algorithm for Cache/Memory Partitioning for Real-Time Systems
Bauesian Methods in Nonkinear Digital Image Restoration
Coverage and Detection of a Randomized Scheduling Algorithm in Wireless Sensor Networks
Parametric Phase-Locked OscillatorߞCharacteristics and Applications to Digital Systems
Parallel Solution of Ordinary Differential Equations
Guest Editors' Introduction: Special Section on Autonomic Network Computing
Modular Asynchronous Arbiter Insensitive to Metastability
Performability Analysis of Distributed Real-Time Systems
Memory Protection in Multiprocessing Systems
Instruction Issue Logic for High-Performance Interruptible, Multiple Functional Unit, Pipelines Computers
An Algorithm for Gray-to-Binary Conversion
Concurrent Error Detection in ALU's by Recomputing with Shifted Operands
Testing from Partial Deterministic FSM Specifications
The Multidimensional Access Memory in STARAN
Exploiting Cooperative Relay for High Performance Communications in MIMO Ad Hoc Networks
Fair Bandwidth Sharing in Distributed Systems: A Game-Theoretic Approach
Efficient Algorithms for the Inverse Sort Transform
Computor Simulation of Narrowband Systems
Fault Impact Estimation for Lightweight Fault Detection in Image Filtering
Energy-Efficient Pixel-Arithmetic
Slave Memories and Dynamic Storage Allocation
Store Address Generator with On-Line Fault-Detection Capability
Cycle Compensation Protocol: A Fair Protocol for the Unidirectional Twin-Bus Architecture
ISRA-Based Grouping: A Disk Reorganization Approach for Disk Energy Conservation and Disk Performance Enhancement
A Sonic Pen: A Digital Stylus System
Universal Modules for Bounded Signal Fan-Out Synchronous Sequential Circuits
Editorial: EiC Farewell and Introduction of new EiC
Pseudorandom Rounding for Truncated Multipliers
A Survey of Electronic Analog Computer Installations
Comments on "The Relationship Between Multivalued Switching Algebra and Boolean Algebra Under Different Definitions of Complement"
Tensor Based Multivariate Polynomial Modulo Multiplier for Cryptographic Applications
The De Bruijn Multiprocessor Network: A Versatile Parallel Processing and Sorting Network for VLSI
FlexCL: A Model of Performance and Power for OpenCL Workloads on FPGAs
Generation of Representative Functions of the NPN Equivalence Classes of Unate Boolean Functions
In Memoriam [Ivan Stojmenovic]
The Diagnosability of the Matching Composition Network under the Comparison Diagnosis Model
Design and Implementation of an Asymmetric Block-Based Parallel File System
High-Speed VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography
An Accumulator Chip
Multi-Channel Architecture-Based FTL for Reliable and High-Performance SSD
Unified Digit Selection for Radix-4 Recurrence Division and Square Root
A Digit-by-Digit Algorithm for mth Root Extraction
An Eight-Approximation Algorithm for Computing Rooted Three-Vertex Connected Minimum Steiner Networks
LFSR-Based Bit-Serial GF(2 m ) Multipliers Using Irreducible Trinomials
Traffic-Balanced Routing Algorithm for Irregular Mesh-Based On-Chip Networks
Minimum Parallel Binary Adders with NOR (NAND) Gates
"Overturned-Stairs" Adder Trees and Multiplier Design
Failure-Detecting Arithmetic Convolutional Codes and an Iterative Correcting Strategy
Accelerating Reinforcement Learning-Based CCSL Specification Synthesis Using Curiosity-Driven Exploration
Multiversion Data Broadcast
Design and Analysis of a Gracefully Degrading Interleaved Memory System
The Performance of Multimicrocomputer Networks Supporting Dynamic Workloads
Measuring the Performance of Multimedia Instruction Sets
Load Sharing in Soft Real-Time Distributed Computer Systems
Modeling and Verification of Communication Protocols in SARA: The X.21 Interface
New Approaches for Power Binning of High Performance Microprocessors
S-FLASH: A NAND Flash-Based Deep Neural Network Accelerator Exploiting Bit-Level Sparsity
Redundant and On-Line CORDIC for Unitary Transformations
A Regular Layout for Parallel Adders
Interactive Use of Problem Knowledge for Clustering and Decision Making
An Operation-Centered Approach to Fault Detection in Symmetric Cryptography Ciphers
A Fast Analog Comparison for Hybrid Computation
Efficient Minimization and Manipulation of Linearly Transformed Binary Decision Diagrams
A Multicode Single Transition-Time State Assignment for Asynchronous Sequential Machines
A Spatial Mashup Service for Efficient Evaluation of Concurrent k-NN Queries
Validated Roundings of Dot Products by Sticky Accumulation
A Proposed Hybrid-Computer Method for Functional Optimization
Ternary Cyclo-Decompositions
A Polynomial Algorithm for Balancing Acyclic Data Flow Graphs
Real-Time Full-Chip Thermal Tracking: A Post-Silicon, Machine Learning Perspective
A Storage-Based Built-In Test Pattern Generation Method for Scan Circuits Based on Partitioning and Reduction of a Precomputed Test Set
An Optimal Hardware-Algorithm for Sorting Using a Fixed-Size Parallel Sorting Device
A Fault-Tolerant Systolic Sorter
A Comment on "Generalized Reed-Muller Forms as a Tool to Detect Symmetries"
Mitigation of Phase Transitions in Self-Organizing NoC for Stable Queueing Dynamics
Typicality, Diversity, and Feature Pattern of an Ensemble
Enhanced Side-Channel Analysis on ECDSA Employing Fixed-Base Comb Method
O(log n) Dynamic Router-Tables for Prefixes and Ranges
Coordinative Scheduling of Computation and Communication in Data-Parallel Systems
Cyclic and Dyadic Shifts, Walsh-Hadamard Transform, and the H Diagram
On the Number of Permutations Performable by the Augmented Data Manipulator Network
Heuristic Algorithms for Broadcasting in Point-to-Point Computer Networks
The Relationship Between Two Fast Fourier Transforms
Hybrid Memory Buffer Microarchitecture for High-Radix Routers
Signed-Digit Numbe Representations for Fast Parallel Arithmetic
Stabilizing CPU Frequency and Voltage for Temperature-Aware DVFS in Mobile Devices
Data Integrity in Digital Optical Disks
Safe System Level Diagnosis
Memory Interference in Synchronous Multiprocessor Systems
Probabilistic Clock Synchronization in Large Distributed Systems
Eliminating Interlocks in Deeply Pipelined Processors by Delay Enforced Multistreaming
A New Diode Function Generator
PowerCool: Simulation of Cooling and Powering of 3D MPSoCs with Integrated Flow Cell Arrays
Analytical Fault Tolerance Assessment and Metrics for TSV-Based 3D Network-on-Chip