yusuke1997/dblp-id-title huggingface dataset:
JointPS: Joint Parameter Server Placement and Flow Scheduling for Machine Learning Clusters
"Light-Pen"' Facilities for Direct View Storage Tubes-An Economical Solution for Multiple Man-Machine Communication
Regular Expressions from Sequential Circuits
A Self-Adaptive Strategy for Evolution of Cooperation in Distributed Networks
A Tight Lower Bound on the Number of Channels Required for Deadlock-Free Wormhole Routing
State-Logic Relations for Autonomous Sequential Networks
On the Approximation of NP-Complete Problems by Using the Boltzmann Machine Method: The Cases of Some Covering and Packing Problems
Refutations by Matings
The Design of Position and Velocity Servos for Multiplying and Function Generation
Formal Specification and Mechanical Verification of SIFT: A Fault-Tolerant Flight Control System
LAC: A Workload Intensity-Aware Caching Scheme for High-Performance SSDs
A Totally Self-Checking 1-Out-of-3 Checker
Software-Defined Design Space Exploration for an Efficient DNN Accelerator Architecture
Piecewise Approximation of Pictures Using Maximal Neighborhoods
Proposed Magnetic Variation Analog Computer for Use in Flight Simulators
Differentiated Communication Services for NoC-Based MPSoCs
Autocorrelation Function of Filtered p -Level Maximal-Length Sequences
Geometric Bounds: A Noniterative Analysis Technique for Closed Queueing Networks
An Improved Bound on the Length of Checking Experiments for Sequential Machines with Counter Cycles
Uncertainty Model for Configurable Hardware/Software and Resource Partitioning
Energy-Efficient 3-D Data Collection forMulti-UAV Assisted Mobile Crowdsensing
Single Event Transient Tolerant Bloom Filter Implementations
Fast Computational Algorithms for Bit Reversal
SIMD Image Resampling
Walk-Time Address Adjustment for Improving the Accuracy of Dynamic Branch Prediction
The 16-Vector Algorithm for Computer Controlled Digital X- Y Plotter
Efficient Victim Block Selection for Flash Storage Devices
Performance Evaluation of Computing Systems with Memory Hierarchies
The Logical Design of a Simple General Purpose Computer
A High-Speed Oscillator-Based Truly Random Number Source for Cryptographic Applications on a Smart Card IC
A Scheme for Synchronizing High-Speed Logic Part II
Microprogrammed Control for Computing Systems
A RISC-V ISA Extension for Ultra-Low Power IoT Wireless Signal Processing
Solid-State Area Scanning Arrays as Interface Devices Between Optical and Digital Computing Systems - A Simulation Study
Unitary Shift-Register Realizations of Sequential Machines
An Algorithm for Testing Asummability of Boolean Functions
A Classified Multisuffix Trie for IP Lookup and Update
Fourier Transform Computers Using CORDIC Iterations
A Correction and Some Comments Concerning Graph Isomorphism by Finite Automata
A Fast and Robust Network Bisection Algorithm
UAV-Assisted Microservice Mobile Edge Computing Architecture: Addressing Post-Disaster Emergency Medical Rescue
The Influence of Masking Phenomenon on Coverage Capability of Single Fault Test Sets in PLA's
Fast Multicomputation with Asynchronous Strategy
Up to $8k$8k-bit Modular Montgomery Multiplication in Residue Number Systems With Fast 16-bit Residue Channels
Analysis of Packet-Switched Multiple-Bus Multiprocessor Systems
The ILLIAC IV Computer
Performance Models of Asynchronous Multitrunk HYPERchannel Networks
FLIXR: Embedding Index Into Flash Translation Layer in SSDs
Efficiently Solving Partial Differential Equations in a Partially Reconfigurable Specialized Hardware
What Designers of Bus and Network Architectures Should Know about Hypercubes
Area-Time Efficient Computation of Niederreiter Encryption on QC-MDPC Codes for Embedded Hardware
Real-Time Scheduling of Concurrent Transactions in Multidomain Ring Buses
Parallel Methods for the Numerical Solution of Ordinary Differential Equations
Guest Editorial: IEEE TC Special Issue: Hardware Acceleration of Machine Learning
DVREI: Dynamic Verifiable Retrieval Over Encrypted Images
Multiserver-Systems Subject to Breakdowns: An Empirical Study
A Quick Pessimistic Diagnosis Algorithm for Hypercube-Like Multiprocessor Systems under the PMC Model
A Process-Control Language
An Approximate Method for the Performance Analysis of PLAYTHROUGH Rings
RTSA: A Run-Through Sparse Attention Framework for Video Transformer
An Electrically Alterable Nondestructive Twistor Memory
Interconnection and Noise Immunity of Circuitry in Digital Computers
Multiple Microprocessors with Common Main and Control Memories
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model
A Study of Odd Graphs as Fault-Tolerant Interconnection Networks
Hierarchical Classification of Permutation Classes in Multistage Interconnection Networks
Practical Randomized RLWE-Based Key Exchange Against Signal Leakage Attack
An Adaptive Method for Unknown Distributions in Distributive Partitioned Sorting
Treatment of transition signals in electronic switching circuits by algebraic methods
Support for T. J. Chaney's Comments on "A Note on Synchronizer or Interlock Maloperation"
Linear and Nonlinear Interpolators
Implementing Multiplication with Split Read-Only Memory
R70-6 Use of Functional Approximation Methods in the Computer Solution of Initial Value Partial Differential Equation Problems
Analysis of Programs for Parallel Processing
Efficient Totally Self-Checking Checkers for a Class of Borden Codes
Teaching Aid for "Games That Teach the Fundamentals of Computer Operation"
B70-6 Computing Methods in Optimization Problems
Efficient Hardware Implementation of Fp-Arithmetic for Pairing-Friendly Curves
Evaluation of Cache Attacks on Arm Processors and Secure Caches
Parallel Computations on Reconfigurable Meshes
Design of an Associative Memory
Fault-Tolerance Analysis of One-Sided Crosspoint Switching Networks
A Comprehensive Methodology to Optimize FPGA Designs via the Roofline Model
Replica Determinism and Flexible Scheduling in Hard Real-Time Dependable Systems
Fast Two-Level Address Translation for Virtualized Systems
Transformation of Ternary Switching Functions to Completely Symmetric Ternary Switching Functions
A Digital Orrery
MONTRES : Merge ON-the-Run External Sorting Algorithm for Large Data Volumes on SSD Based Storage Systems
On Resource Placement in Gaussian and EJ Interconnection Networks
On Redundant Path Delay Faults in Synchronous Sequential Circuits
Cryptanalysis of a Partially Known Cellular Automata Cryptosystem
R70-21 Time and Tape Complexity of Pushdown Automaton Languages
Shadows: Blockchain Virtualization for Interoperable Computations in IIoT Environments
Spectral Fault Signatures for Single Stuck-At Faults in Combinational Networks
A Recursive Algorithm for Sequency-Ordered Fast Walsh Transforms
PUMPS Architecture for Pattern Analysis and Image Database Management
Radix-4 Square Root Without Initial PLA
An Effective Gray-Box Identification Procedure for Multicore Thermal Modeling
A New Configuration for Faster Cryotron Circuits
Linear Time Memory Consistency Verification
The Basis for Implementation of Ad idive Operations in the Residue Number System
The Degradation in Memory Utilization Due to Dependencies
ViPZonE: Hardware Power Variability-Aware Virtual Memory Management for Energy Savings
Error-Correcting Parsers for Formal Languages
Traversing Binary Tree Structures with Shift-Register Memories
Fast and Energy-Efficient OLAP Data Management on Hybrid Main Memory Systems
Fast and Accurate Error Simulation for CNNs Against Soft Errors
Analytical Leakage-Aware Thermal Modeling of a Real-Time System
Architecting a Flash-Based Storage System for Low-Cost Inference of Extreme-Scale DNNs
Practical Delay Enforced Multistream (DEMUS) Control of Deeply Pipelined Processors
High Throughput/Gate AES Hardware Architectures Based on Datapath Compression
Virtual Shuffling for Efficient Data Movement in MapReduce
A Solution to a Special Case of the Synchronization Problem
Simulation of a Class of Ring-Structured Networks
A Graph Matching Approach to Optimal Task Assignment in Distributed Computing Systems Using a Minimax Criterion
On-the-Fly Conversion of Redundant into Conventional Representations
Synthesis of Finite State Algorithms in a Galois Field GF[p n ]
Multicore Curve-Based Cryptoprocessor with Reconfigurable Modular Arithmetic Logic Units over GF(2 n )
A Four-Quadrant Multiplier Using Triangular Waves, Diodes, Resistors, and Operational Amplifiers
Testing the Coordination Predicate
Logic Test Pattern Generation Using Linear Codes
Division and Overflow Detection in Residue Number Systems
Performance Impacts of Look-Ahead Execution in the Conversation Scheme
Automatic Generation of Miniaturized Synthetic Proxies for Target Applications to Efficiently Design Multicore Processors
Toward Unified Design of Hardware and Software Components Using C++
Design of Asynchronous Unit Delays
Polynomial Representation of Classifiers with Independent Discrete-Valued Features
Detection of Faults in Programmable Logic Arrays
The Matrix Transform Processor
Enhancing Memory-Level Parallelism via Recovery-Free Value Prediction
B74-6 PL/I Programming for Engineering and Science
On the Analysis of Memory Conflicts and Bus Contentions in a Multiple-Microprocessor System
On the Implementation of Unreliable Failure Detectors in Partially Synchronous Systems
Exploring Model Stability of Deep Neural Networks for Reliable RRAM-Based In-Memory Acceleration
Procedures for Static Compaction of Test Sequences for Synchronous Sequential Circuits
Structured Specification of Communicating Systems
A Totally Self-Checking Checker Design for the Detection of Errors in Periodic Signals
High Performance Rotation Architectures Based on the Radix-4 CORDIC Algorithm
An On-Line Computer Method for Parameter Tracking of Sampled-Data Systems
Auto-Tuning Parameters for Emerging Multi-Stream Flash-Based Storage Drives Through New I/O Pattern Generations
Temporal Petri Nets and Their Application to Modeling and Analysis of a Handshake Daisy Chain Arbiter
A Dynamic Memory Allocation Algorithm
Distributed Bayesian Algorithms for Fault-Tolerant Event Region Detection in Wireless Sensor Networks
A Rapid Method for the Identification of the Type of a Four-Variable Boolean Functin
Sequential Circuit Output Probabilities From Regular Expressions
Data Security in Unattended Wireless Sensor Networks
On-Line Turing Machine Computations
Spatial-Temporal Embodied Carbon Models With Dual Carbon Attribution for Embodied Carbon Accounting of Computer Systems
Hardware Algorithms for Nonnumeric Computation
A New Representation for Decimal Numbers
Checking Before Output May Not Be Enough Against Fault-Based Cryptanalysis
Testing for Intermittent Faults in Digital Circuits
A Note on the Solution of Sequential Boolean Equations
Concurrent Process Monitoring with No Reference Signatures
Multi-Spin-Flip Engineering in an Ising Machine
Recoverable Distributed Shared Virtual Memory
TrackLace: Data Management for Interlaced Magnetic Recording
LrGAN: A Compact and Energy Efficient PIM-Based Architecture for GAN Training
Testable Design of Single-Output Sequential Machines Using Checking Experiments
Scheduled Dataflow: Execution Paradigm, Architecture, and Performance Evaluation
Revisit and Benchmarking of Automated Quantization Toward Fair Comparison
An Economy-Oriented GPU Virtualization With Dynamic and Adaptive Oversubscription
A multi-purpose function generator
Cooperative Token-Ring Scheduling For Input-Queued Switches
Boolean Integral Calculus for Digital Systems
Analysis of Pairwise Pivoting in Gaussian Elimination
Comments on "Concurrent Search and Insertion in AVL Trees"
The Case for Chaotic Adaptive Routing
How to Store a Triangular Matrix
The Computation of Window Operations on a Parallel Organized Computer - A Case Study
Computational Complexity of Controllability/Observability Problems for Combinational Circuits
Aspects of Real-Time Simulation
HYDRA: A Hybrid Resistance Drift Resilient Architecture for Phase Change Memory-Based Neural Network Accelerators
A Theory of Galois Switching Functions
QoS Prediction and Adversarial Attack Protection for Distributed Services Under DLaaS
Migrating from Per-Job Analysis to Per-Resource Analysis for Tighter Bounds of End-to-End Response Times
Global Compaction of Horizontal Microprogams Based on the Generalized Data Dependency Graph
Experiments with Digital Computer Simulations of Pseudo-Random Noise Generators
Simulation of Third Order Systems by a Single Operational Amplifier
Efficient Mapping of Task Graphs onto Reconfigurable Hardware Using Architectural Variants
Distributing Hot-Spot Addressing in Large-Scale Multiprocessors
Numerical Accuracy and Hardware Tradeoffs for CORDIC Arithmetic for Special-Purpose Processors
Uniform Modular Realizations and Linear Machines
On the Correctness of Some Sequential Classification Schemes in Pattern Recognition
Approximations for the Demagnetizing Factors of Hollow Cylinders Represented by Confocal Hollow Prolate Spheroids
Adas on Cots with OpenCL: A Case Study with Lane Detection
Planar Crossovers
Specification of Real-Time Broadcast Networks
An Effective Iterative Statistical Fault Injection Methodology for Deep Neural Networks
FAS-DQN: Freshness-Aware Scheduling via Reinforcement Learning for Latency-Sensitive Applications
Tolerance of Double-Loop Computer Networks to Multinode Failures
Magnetic Film Scratch-Pad Memories
HEPCloud: An FPGA-Based Multicore Processor for FV Somewhat Homomorphic Function Evaluation
A Cellular-Array Multiplier for GF(2 m )
Leading Guard Digits in Finite Precision Redundant Representations
Cylindrical Film Memory Device Characteristics
The Design of a Lossless Deduplication Scheme to Eliminate Fine-Grained Redundancy for JPEG Image Storage Systems
A Cutpoint Cellular Associative Memory
Two Bit Overlap: A Class of Double Error Correction One Step Majority Logic Decodable Codes
Logic and Computer Design in Nanospace
Comments on "Evaluation of A + B + K Conditions Without Carry Propagation"
The Analysis and Design of Some New Sorting Machines
Blockchain-Based Distributed Multiagent Reinforcement Learning for Collaborative Multiobject Tracking Framework
A High-Intensity Solution of Hardware Accelerator for Sparse and Redundant Computations in Semantic Segmentation Models
Revocable and Efficient Blockchain-Based Fine-Grained Access Control Against EDoS Attacks in Cloud Storage
A Technique for Measuring the Phase Margin of an Operational Amplifier
An Analog Method for Character Recognition
An Experimental Study of an On-Line Man-Computer System
Response to Comment on "A Positive Acknowledgment Protocol for Causal Broadcasting"
System Design of a Cellular APL Computer
Preventing Silent Data Corruptions from Propagating During Data Reconstruction
Computational Arrays with Flexible Redundancy
Multiple-Response Resolution in Associative Systems
Equational Realizations of Switching Functions
A Measurement-Based Model for Workload Dependence of CPU Errors
Exponential and Logarithm by Sequential Squaring
InTeRail: A Test Architecture for Core-Based SOCs
An Improved Method for Williams Storage
Lifetime-Sensitive Modulo Scheduling in a Production Environment
Minimizing Energy Consumption of Embedded Systems via Optimal Code Layout
Improved Algorithms for Mapping Pipelined and Parallel Computations
A Layout-Conscious Iteration Space Transformation Technique
The Autocorrelation Function of the Two Feedback Shift-Register Pseudorandom Source
A Cyclic-Order Property of Bodies with Three-Face Vertices
A New Synchronizer Design
Symbol Shifting: Tolerating More Faults in PCM Blocks
Cost-Performance Trade-Offs in Manhattan Street Network Versus 2-D Torus
On the Analysis and Synthesis of VLSI Algorithms
Absolute Minimal Expressions of Boolean Functions
Fault Tolerance in a Class of Sorting Networks
The Cascade Multiplier
Execution Time Analysis of Communicating Tasks in Distributed Systems
Characterization of Cascading Failures in Interdependent Cyber-Physical Systems
Idempotence-Based Preemptive GPU Kernel Scheduling for Embedded Systems
Hybrid Computer Solution of Optimal Control Problems
Guest Editors' Introduction to the Special Issue on Machine Learning Architectures and Accelerators
On the Performance Enhancement of Paging Systems Through Program Analysis and Transformations
New Experiments and Analysis in Bragg-Diffraction Imaging
A Note on a Modified Ternary Simulator Capable of Initializing All Fault Machine Memory Elements
A Study in Microprogrammed Processors: A Medium Sized Microprogrammed Processor
Hardware Efficient Algorithms for Trigonometric Functions
Modeling and Dimensioning Hierarchical Storage Systems for Low-Delay Video Services
The STAR (Self-Testing And Repairing) Computer: An Investigation of the Theory and Practice of Fault-Tolerant Computer Design
Adaptive CORDIC: Using Parallel Angle Recoding to Accelerate Rotations
ETBench: Characterizing Hybrid Vision Transformer Workloads Across Edge Devices
Copula Models of Correlation: A DRAM Case Study
The Reliability of Periodically Repaired n - l/n Parallel Redundant Systems
The Algebra of Connectors - Structuring Interaction in BIP
Cascade Transformation
Spectral Analysis of Boolean Functions as a Graph Eigenvalue Problem
Comment on "A Variable Counter Design Technique"
Reverse-Engineering and Exploiting the Frontend Bus of Intel Processor
A Branch and Bound Clustering Algorithm
Partial Resolution in Branch Target Buffers
An Algorithm for Linear Inequalities and its Applications
Time-Coded Spiking Fourier Transform in Neuromorphic Hardware
Redundant and On-Line CORDIC: Application to Matrix Triangularization and SVD
Probabilistic Evaluation of On-Line Checks in Fault-Tolerant Multiprocessor Systems
Reed-Muller Like Canonic Forms for Multivalued Functions
A Realization of the RAM Digital Filter
Pairwise and Triple Key Distribution in Wireless Sensor Networks with Applications
A Universal Arithmetic Building Element (ABE) and Design Methods for Arithmetic Processors
An Algorithm for Multithreshold Threshold Element Synthesis
Comments on "Fast Hardware Fourier Transformation Through Counting"
R70-8 Analog Methods for On-Line System Identification Using Noisy Measurements
Floating Steiner Trees
R68-31 The Effect of Digital Compensation for Computation Delay in a Hybrid Loop
Pattern Recognition by Piecewise Linear Discriminant Functions
An On-Line Capacity-Based Admission Control for Real-Time Service Processes
Comprehensive Hardware and Software Support for Operating Systems to Exploit
Dynamic Graph Publication With Differential Privacy Guarantees for Decentralized Applications
On the Convergence and Ultimate Reliability of Iterated Neural Nets
Tight Interval Inclusions with Compensated Algorithms
Product-Form Solution Techniques for the Performance Analysis of Multiple-Bus Multiprocessor Systems with Nonuniform Memory References
The Design of TSC Error C/D Circuits for SEC/DED Codes
The Complexity of Fault Detection Problems for Combinational Logic Circuits
Boundary Conditions for Iteratively Realized Sequential Circuits
A Geometric Deployment and Routing Scheme for Directional Wireless Mesh Networks
System-Wide Time versus Density Tradeoff in Real-Time Multicore Fluid Scheduling
A New, Solid-State, Nonlinear Analog Component
Loop-Free Threshold Element Structures
SLOpt: Serving Real-Time Inference Pipeline With Strict Latency Constraint
B72-10 PL/I Programming In Technological Applications
An Effective Visibility Culling Method Based on Cache Block
A Non-Real-Time Simulation of SAGE Tracking and BOMARC Guidance
Compressing Cache State for Postsilicon Processor Debug
On a New Approach for Finding All the Modified Cut-Sets in an Incompatibility Graph
Design of a Fault-Tolerant Three-Dimensional Dynamic Random-Access Memory with On-Chip Error-Correcting Circuit
TTADF: Power Efficient Dataflow-Based Multicore Co-Design Flow
Algorithmic Mechanisms for Reliable Master-Worker Internet-Based Computing
Implementation of Multiplication, Modulo a Prime Number, with Applications to Number Theoretic Transforms
A Numerical Algorithm for the Resolution of Boolean Equations
Enabling Reliable Memory-Mapped I/O With Auto-Snapshot for Persistent Memory Systems
A Systematically Designed Binary Array Processor
Forming Opinions via Trusted Friends: Time-Evolving Rating Prediction Using Fluid Dynamics
Large Graphs with Given Degree and Diameter - Part I
Test of Reconfigurable Modules in Scan Networks
ApGAN: Approximate GAN for Robust Low Energy Learning From Imprecise Components
Visible Surface Algorithms for Quadric Patches
Approximation Algorithms for Constrained Relay Node Placement in Energy Harvesting Wireless Sensor Networks
Galois Switching Functions and Their Applications
Beyond the Roofline: Cache-Aware Power and Energy-Efficiency Modeling for Multi-Cores
Petri Net-Based FTL Architecture for Parametric WCET Estimation via FTL Operation Sequence Derivation
Packer: Parallel Garbage Collection Based on Virtual Spaces
B 74-27 Program Test Methods
On Modifying Logic Networks to Improve Their Diagnosability
A Measure of Efficiency of Diagnostic Tests Upon Sequential Logic
E 2 CNNs: Ensembles of Convolutional Neural Networks to Improve Robustness Against Memory Errors in Edge-Computing Devices
Structure and Function in Polyfunctional Nets
All-to-All Broadcast by Flooding in Communications Networks
Uniform Decomposition of Incompletely Specified Sequential Machines
Cryptographically Secure Shield for Security IPs Protection
A Multimicroprocessor System for Real-Time Classification of Railroad Track Flaws
On Static Memory Allocation in Computer Systems
Low-Power Divider
cNV SRAM: CMOS Technology Compatible Non-Volatile SRAM Based Ultra-Low Leakage Energy Hybrid Memory System
On Computing the Discrete Cosine Transform
Information Dissemination in Trees with Nonuniform Edge Transmission Times
Comments on "Design of a Dynamically Programmable Logic Gate"
Energy-Aware Modeling and Scheduling for Dynamic Voltage Scaling with Statistical Real-Time Guarantee
DRAM-Latency Optimization Inspired by Relationship between Row-Access Time and Refresh Timing
Coherent Cooperation Among Communicating Problem Solvers
High-Speed Fixed Memories Using Large-Scale Integrated Resistor Matrices
Complexity of Partially Defined Combinational Switching Functions
Discretization Error Analysis in Linear DDA Connections
Properties of Waveforms Obtained by Nonrecursive Digital Filtering of Pseudorandom Binary Sequences
Comments on Optimum Character Recognition Systems
Digital Programming for the Inversion of Z Transforms
Integer Multipliers with Overflow Detection
Optimal Realization of Sets of Interconnection Functions on Synchronous Multiple Bus Systems
Single-Channel Error Correction in an f-Channel System
Parallel Random Number Generation for VLSI Systems Using Cellular Automata
Resilient Authentication Using Path Independence
Signature-Based Protection from Code Reuse Attacks
The Impact of Transmission Power Control Strategies on Lifetime of Wireless Sensor Networks
Finding Maximum on an Array Processor with a Global Bus
Magnetic Bubble Memory Architectures for Supporting Associative Searching of Relational Databases
PQNTRU: Acceleration of NTRU-Based Schemes via Customized Post-Quantum Processor
Perfect Failure Detection in Timed Asynchronous Systems
Accurate and Efficient Estimation of Logic Circuits Reliability Bounds
Edge Disjoint Hamiltonian Cycles in k-Ary n-Cubes and Hypercubes
Heterogenous Quorum-Based Wake-Up Scheduling in Wireless Sensor Networks
Lattice-Based Memory Allocation
RelHDx: Hyperdimensional Computing for Learning on Graphs With FeFET Acceleration
Subarea Localization Performance of the Divide-and-Cover Node Deployment in a Long-Bounded Belt Scenario
B71-l Problem Solving by Digital Computers with PL/I Programming
Redundant System Test Point Allocation and Mission Reliability Estimation Procedures
Trust Evaluation in Online Social Networks Using Generalized Network Flow
Accelerating Fully Homomorphic Encryption in Hardware
RACE: A Robust Adaptive Caching Strategy for Buffer Cache
An Integrated Memory Array Processor for Embedded Image Recognition Systems
A New Source Coding Scheme with Small Expected Length and Its Application to Simple Data Encryption
Progressive Retry for Software Failure Recovery in Message-Passing Applications
An Algorithm for Rapid Binary Division