yusuke1997/dblp-id-title huggingface dataset:
An optimized weighted voting based ensemble model for DDoS attack detection and mitigation in SDN environment
Towards a universal microprocessor
A resource utilization based instruction fetch policy for SMT processors
THETIS: an underwater remotely operated vehicle for water pollution measurements
L3: An FPGA-based multilayer maze routing accelerator
Stack computers: the new wave: Koopman, P J Jr. Ellis Horwood/John Wiley, Chichester, UK (1989) £32.50 pp 234
Working with occam: a program for generating display images
The role of PASCAL in software engineering
Microcomputer systems: I Flores and C Terry Van Nostrand (1982) £19.15 pp 290
Optimizing two-dimensional DMA transfers for scratchpad Based MPSoCs platforms
Adaptive absolute SCORE algorithm for spectrum sensing in cognitive radio
A low-cost, fault-tolerant and high-performance router architecture for on-chip networks
Smart city image landscape design based on wireless sensors
On the reliability estimation of nano-circuits using neural networks
An efficient and low power one-lambda crosstalk avoidance code design for network on chips
Discrete pointvv 3D reconstruction algorithm based human pose estimation
Partial resolution for redundant operation table
MAP and TOP - advanced manufacturing communications: Dwyer, J and Ioannou, A Kogan Page, London, UK (1987) £25.00 pp 193
Acceleration of ungapped extension in Mercury BLAST
Specific network architectures have OSI as base: A Meijer and P Peeters 'Computer network architectures' Computer Science Press (1983) £8.50 pp 396 + xi
Design of microprogrammed floating processor using superslice Am2903
Linked local area networks: A J MayneOctober Press (1982) £38.00, pp 485
Integrated moving target defense and control reconfiguration for securing Cyber-Physical systems
Advantages of a modular high-level quantum programming framework
FPGA-Based adaptive digital predistortion for radio-over-fiber links
PAAD (Partially adaptive and deterministic routing): A deadlock free congestion aware hybrid routing for 2D mesh network-on-chips
Multimicroprocessor computer system
Performance analysis of local computer networks: Joseph L Hammond and Peter J P O'Reilly Addison-Wesley, Wokingham, UK (1986) £21.95 pp 411
Optimized mobile cloud resource discovery architecture based on dynamic cognitive and intelligent technique
The role of mathematically formal methods in the development and assessment of safety-critical systems
Fine-grained monitoring for self-aware embedded systems
Early detection and bypassing of trivial operations to improve energy efficiency of processors
A holistic approach for tightly coupled reconfigurable parallel processors
The effect of processor architecture on an efficient floating point table look-up algorithm
Real-Time monitoring of Athletes' training data based on wireless sensors
Resource Optimized Selective Image Encryption of Medical Images Using Multiple Chaotic Systems
Power-efficient deterministic and adaptive routing in torus networks-on-chip
Side-channel protected MPSoC through secure real-time networks-on-chip
Verification of hardware combining multiplication, division and square root
FAD-flexibility in digital signal processing
EPICURE: A partitioning and co-design framework for reconfigurable computing
Design and implementation of dual processor block with shared external cache memory
Image Monitoring and Management of Hot Tourism Destination Based on Data Mining Technology in Big Data Environment
The 80960 microprocessor architecture: Myers, G J and Budde, D L Wiley, New York, NY, USA (1988) £30.50 pp 255
Non linearity mitigation and dispersion reduction using Bussgang theorem, modified MSE and improved MLE equalizers
Human head pose estimation based on HF method
Quality-driven design of deep neural network hardware accelerators for low power CPS and IoT applications
A CASE-tool oriented approach for embedded systems design
Introduction to ADA and its use for embedded applications
Research on monitoring volleyball players' competition load based on intelligent tracking technology
Mixed real-time scheduling of multiple DAGs-based applications on heterogeneous multi-core processors
Computer languages, a guide for the perplexed: Baron, N S Penguin, London, UK (1988) £10.00 pp 419
Artificial intelligence hospital hardware system and clinical observation of molecular heparin sodium in hemodialysis patients
LTE-based humanoid robotics system
A C++ language interface for parallel programming
The impact of the conversion starting threshold on the estimation of the RMS value
Featured town planning based on FPGA and sensors
Euromicro 78: 17-19 October 1978 Technical University, Munich, FDR. Organized by Euromicro
FPGA-based implementation of bistable function blocks defined in the IEC 61131
Hardware implementation of DIRLS mismatched compressor applied to a pulse-Doppler radar system
Investigation of turbo decoding techniques based on lottery arbiter in 3D network on chip
Silicon compilation of hierarchical control sections with unified BIST testability
Tavi Bar-David, Object-Oriented Design for C++, Prentice Hali, Hemel Hempstead, UK (1993) ISBN 0 13 630260 2, p. 304 £25.50
Neural chip for fast pattern matching
Programmable instruments: 22-24 November 1977, National Physical Laboratory, Teddington, UK. Organized by the Institute of Electronic and Radio Engineers
SIMD stealing: Architectural support for efficient data parallel execution on multicores
On don't cares in test compression
Artificial neural networks on a reconfigurable, fault-tolerant, multi-processor system
A low-cost tester for boundary scan
Testing digital low-pass filters using oscillation-based test
QTL: A new ultra-lightweight block cipher
Novel low power reversible binary incrementer design using quantum-dot cellular automata
Ultra-low voltage and energy efficient adders in 28 nm FDSOI exploring poly-biasing for device sizing
A tolerant JPEG-LS image compressor foreseeing COTS FPGA implementation
A scalable register file architecture for superscalar processors
Advanced DMA controller for 16-bit microcomputer systems
Application-specific processors and system-on-chips for embedded and pervasive applications
On an efficient NoC multicasting scheme in support of multiple applications running on irregular sub-networks
Reliability of data processing and fault compensation in unreliable arithmetic processors
The RECIPE approach to challenges in deeply heterogeneous high performance systems
Applying microcomputers to vehicle instrumentation
Adaptive genetic algorithm for energy-efficient task scheduling on asymmetric multiprocessor system-on-chip
Design and implementation of IMU-based locomotion mode recognition system on Zynq SoC
Systems applications of GaAs devices and ICs
Lightweight chaotic image encryption algorithm for real-time embedded system: Implementation and analysis on 32-bit microcontroller
MCAR: Non-local adaptive Network-on-Chip routing with message propagation of congestion information
Deep learning method for risk identification under multiple physiological signals and PAD model
Cascading Model in Underwater Wireless Sensors using Routing Policy for State Transitions
Performance analysis of a selectively compressed memory system
Application of a microprocessor to monitor a destructive test machine
A Real-time P-SFA hardware implementation of Deep Neural Networks using FPGA
Increasing the energy efficiency of microcontroller platforms with low-design margin co-processors
A study on the efficiency of hardware Trojan detection based on path-delay fingerprinting
High performance and energy efficient sobel edge detection
Construction of youth public sports service system based on embedded system and wireless IoT
A Micro-architecture that supports the Fano-Elias encoding and a hardware accelerator for approximate membership queries
Multi-character cost-effective and high throughput architecture for content scanning
Design and development of an intelligent controller for a pole-balancing robot
A controlled fetching technique for effective management of shared resources in SMT processors
Software development for communication between two microcomputers
A framework for detection of cyber attacks by the classification of intrusion detection datasets
Scheduler for realtime process control
Self-organizing maps for embedded processor selection
Cybersecurity threats mitigation in Internet of Vehicles communication system using reliable clustering and routing
Resource-bounded multicore emulation using Beefarm
Microsystem design with the 8052AH-basic microcontroller
From the history and basics of chip design to mystical complexities of bit-sliced architecture: N A Alexandridis 'Microprocessor system design concepts' Computer Science (1984) $32.95 pp 623
Research on motor control and simulation based on PID and Internet of Things system
Research on term extraction technology in computer field based on wireless network technology
FPGA-friendly compact and efficient AES-like 8 × 8 S-box
MapReduce short jobs optimization based on resource reuse
An effective out-of-order execution control scheme for an embedded floating point coprocessor
The logical design of multiple microprocessor systems: Bowen, BA and Buhr, R J A. Prentice-Hall (1980), 310 pp, £14.00
Fast and accurate architectural vulnerability analysis for embedded processors using Instruction Vulnerability Factor
A correlation coprocessor for accurate real-time ultrasonic ranging of multiple objects using the transputer
A smart FPGA based design and implementation of grid connected direct matrix converter with IoT communication
Non-intrusive study on FPGA of the SEU sensitivity on the COTS RISC-V VeeR EH1 soft processor from Western Digital
Dummy operations in scalar multiplication over elliptic curves: A tradeoff between security and performance
An intelligent distributed system for real-time control of cone crushers
Power optimization for application-specific networks-on-chips: A topology-based approach
A decade of microprocessor innovation: an economist's perspective
The challenge of microprocessors: Michael G Hartley and Anne Buckley (editors), Manchester University Press (1979), 202 pp, £7.95
Mitigation of DoS attacks through QoS regulation
A security framework for QaaS model in intelligent transportation systems
A review of microprocessor research and teaching at the Digital Systems Laboratory, Stanford University, USA
Exploring the design-space for FPGA-based implementation of RSA
X/OPEN portability guide: X/Open Group (Eds)North-Holland, Amsterdam, The Netherlands (1985) DF1 275.00 pp xxviii + 702
Voltage deviate-domino circuits for low power high-speed applications using prescient innovation model
Software tools for microcode generation of the Am29300 series
Graphics software and hardware design with the 82786
Aspect-oriented RTL HW design using SystemC
Hathi-2 multiprocessor system
Teaching microprocesor techniques to nonelectronics engineers
Microcomputer remote reset
Early miss prediction based periodic cache bypassing for high performance GPUs
Microprocessor software project management: Eli Fathi and Cedric Armstrong Marcel Dekker, New York, USA (1985) $69.00 pp 368
A FPGA based implementation of Sobel edge detection
Spectral observation of power network signals for digital signal processing
Programming microprocessors with a high level language-the case of PASCAL/64000
16-bit operating systems
A parallel decision-making design for highly speedy packet classification
Simulation of heat transfer process of thermal protective clothing based on FPGA and sensor processing system
High-performance Monte Carlo radiosity on GPU based on scene partitioning
Application-specific architectures for energy-efficient database query processing and optimization
Advanced educational parallel DSP system based on TMS320C25 processors
Linked instruction caches for enhancing power efficiency of embedded systems
Eurobus - the UK-designed general-purpose backplane bus
Implementation of the Hough transform for intermediate-level vision on a transputer network
Microcomputer buses and links: D Del Corso, H Kirrman and J D Nicoud Academic Press, Orlando, FL, USA (1986) $ 45.00, £25.00 (UK) pp 414
Data monitoring of athlete physical training based on FPGA processing system and machine vision
CMOS3 cell library: Heinbuch, D V (ed.) Addison-Wesley, Wokingham, Berks, UK (1987) £49.95 pp 704
16-bit DSP servo control with the MC68HC16Z1
The Human Brain Project: Parallel technologies for biologically accurate simulation of Granule cells
Intotech - an electronics R&D arm of Metal Box
An ASIC for fast grey-scale dilation
Simulation alternatives for the verification of networked cyber-physical systems
TEA: Timing and Energy Aware compression architecture for Efficient Configuration in CGRAs
Computer control of real-time processes: Bennett, S and Virk, G S (Eds) (IEEE Control Engineering Series 41) Peter Peregrinus, Stevenage, UK (1990) £38 pp 306
Wireless sensors application in smart English classroom design based on artificial intelligent system
Image recognition of sports training based on open IoT and embedded wearable devices
An efficient numerical-based crosstalk avoidance codec design for NoCs
Savitzky Golay and KPCA based Optimal Discrete Wavelet Transform Architecture for Image Compression
Diagnosis of skin cancer using machine learning techniques
FPGA implementation of wavelet coherence for EEG and ERP signals
Computer-aided physical training sports injury risk simulation based on embedded image system
Faster manipulation of large quantum circuits using wire label reference diagrams
Special issue on: "Heterogeneous architectures for Cyber-physical systems (HACPS)"
Fuzzy logic based energy and throughput aware design space exploration for MPSoCs
Implementation of Forth on a network of transputers
Engineering data processing programs for multiple microprocessors
Starting FORTH: Brodie, L, Prentice Hall (1981) pp 348, £11.95 (£14.95)
Reliable low power NoC interconnect
Safety critical systems
M-ABRC (Adaptive Binary Range Coder) using Virtual Sliding Window technique and its VLSI implementation
Power-aware scoreboard alternatives for multimedia processors
Lowering power in an experimental RISC processor
Real-time digital-optical correlator-systems design
An in-tire-pressure monitoring SoC using FBAR resonator-based ZigBee transceiver and deep learning models
Peripheral handling techniques for the transputer
Key technologies for safe and autonomous drones
Linear integrated circuit design still holds many pitfalls for the unwary: J Michael McMenamin 'Linear integrated circuits: operation and applications' Prentice-Hall, Englewood Cliffs, NJ, USA (January 1985) £39.30 pp 293
Construction of cultural industry development factor model based on factor analysis, artificial intelligence and big data
Big data medical system and analgesic effect of dezocine in alleviating uterine contractions in pregnant women based on embedded processor
Production testing of microprocessor-based equipment
A low latency minimum distance searching unit of the SOM based hardware quantizer
Design and implementation of ANN-based SAPF approach for current harmonics mitigation in industrial power systems
Quantifying the performance and energy efficiency of advanced cache indexing for GPGPU computing
Beginner's guide to integrated circuits: I R Sinclair (2nd edn) Butterworth, London, UK (1983) £4.50, pp 194
Automatic custom instruction identification for application-specific instruction set processors
Low-cost distributed realtime multitasking system
Efficient hardware trojan diagnosis in SRAM based on FPGA processors using inject detect masking algorithm for multimedia signal Processors
Hardware implementation of an active learning self-organizing neural network to predict the power fluctuation events of a photovoltaic grid-tied system
On the effects of ring oscillator length and hardware Trojan size on an FPGA-based implementation of AES
A low-power, high-accuracy with fully on-chip ternary weight hardware architecture for Deep Spiking Neural Networks
SEE sensitivity of a COTS 28-nm SRAM-based FPGA under thermal neutrons and different incident angles
Feature vector for underground object detection using B-scan images from GprMax
Tetra-variate scrutiny of diverse multiplexer techniques for designing a barrel shifter for low power digital circuits
Asymmetric digital subscriber line access multiplexer - architecture design and implementation
Enhancing the security using SRB18 method of Embedding Computing
The novel emergency hospital services for patients using digital twins
Health monitoring of induction motors through embedded systems-simulation of broker rotor bar fault and abnormal gear teeth fault
Remote monitoring system helps keep traffic under control
A comprehensive set of schemes for PUF response generation
Side-channel countermeasures utilizing dynamic logic reconfiguration: Protecting AES/Rijndael and Serpent encryption in hardware
Performance enhancement of efficient process based on Carry-Skip Adder for IoT applications
Efficient and secure chaotic PRNG for color image encryption
Aggressive superpage support with the shadow memory and the partial-subblock TLB
Mining method of massive data of mobile library under information asymmetry facing large-scare database
Object-oriented co-specification for embedded systems
Systolic implementation of 2D block-based Hopfield neural network for efficient pattern association
A novel method for optimizing energy consumption in wireless sensor network using genetic algorithm
Research on the development and resource development of sports industry in coastal cities based on 5G network processor and IoT system
An area-time efficient point-multiplication architecture for ECC over GF(2 m ) using polynomial basis
VLSI design course provides timely telecomms tutorial: Y Tsividis and P Antognetti (Eds)'Design of MOS VLSI for telecommunications applications' Prentice-Hall, Englewood Cliffs, NJ, USA (1985) £37.40 pp xiv + 620
Retraction notice to'Financial investor information impact based on FPGA and machine learning
Resilience and load balancing in Fog networks: A Multi-Criteria Decision Analysis approach
VME-G64 interface for industrial control crates
Microprocessors in measurement and control: 28 February-1 March 1978, Cutlers-Hall, Sheffield, UK. Organized by Sira Institute, Warren Springs Laboratory, UK
Optimizing power efficiency for 3D stacked GPU-in-memory architecture
Improving the dynamic performance of grid connected wind farms using modern UPFC
Software maintenance concepts and practice : Armstrong A. Takang, Penny A. Grubb, International Thompson Publishing Inc., 1996, Softbound £22.95. ISBN 1-85032-192-2
LOGO and the British logo user group
EIoT-PBFT: A multi-stage consensus algorithm for IoT edge computing based on PBFT
Realization of processing In-memory computing architecture using Quantum Dot Cellular Automata
Human resource management structure of communication enterprise based on microprocessor system and embedded network
A comparative analysis of VLSI trusted virtual sensors
Analysis of cross-border E-Commerce logistics model based on embedded system and genetic algorithm
A fast digit based Montgomery multiplier designed for FPGAs with DSP resources
Minimal pipeline architecture - an alternative to superscalar architecture
A portable embedded system for point-to-point secure signals transmission
Interface projects for the Apple II: R G Hallgren Prentice-Hall, Englewood Cliffs, NJ, USA (1982) $12.95 pp 170
A multi-microcomputer communications switch
Dictionary-based program compression on customizable processor architectures
Unsafety vectors: a new fault-tolerant routing for k-Ary n-cubes
Systematic method for realtime system design
Non-homogeneous hierarchical Continuous Time Markov Chains
A review of high-level synthesis for dynamically reconfigurable FPGAs
Customizing VLIW processors from dynamically profiled execution traces
Economic Development of Smart City Industry Based on 5G Network and Wireless Sensors
Indoor localization using device sensors: A threat to privacy
Uncertain data stream algorithm based on clustering RBF neural network
Investigating the effects of induced faults in transputer systems
Low-cost constant time signed digit selection for most significant bit first multiplication
Microprocessor-based controls for drilling - retrofitting aspects
TRON: a lack of technical understanding outside Japan
SHARP: A shape recognition system and its parallel implementation
REMSCON 77: Remote supervisory and control conference: 27-29 April 1977, Wembley Conference Centre, London, organized by Network
A novel data visualization method for the effective assessment of cluster tendency through the dark blocks image pattern analysis
An AES crypto chip using a high-speed parallel pipelined architecture
A two stage pipeline architecture for hardware implementation of multi-level decomposition of 1-D framelet transform
Portable MODULA-2-based realtime operating system
Single-source fault-tolerant broadcasting for two-dimensional meshes without virtual channels
Streamlining long latency instructions for seamlessly combined out-of-order and in-order execution
Performance evaluation of CCOs for the optimization of low-power pressure-based implantable wireless systems
An FPGA-based low-cost VLIW floating-point processor for CNC applications
Computer system buses
The abstract vector processor
Experiences of teaching semicustom design and testing
Programming Windows NT device drivers to operate non-interrupting embedded devices
A study of bus emulation. Application to M68000 based systems
Thrifty BTB: A comprehensive solution for dynamic power reduction in branch target buffers
The topography of zeros and poles of a third order IIR digital filter with finite word length in the z-plane
HAPE: A high-level area-power estimation framework for FPGA-based accelerators
Real parallel and constant delay logic circuit design methodology based on the DNA model-of-computation
A parallel algorithm, architecture and FPGA realization for high speed determination of the complete visibility graph for convex objects
Software tools: microprocessor applications
Component-based design of cyber-physical applications with safety-critical requirements
Letter from the guest editors of the special issue on DCIS 2014
Collaborative innovation of E-Commerce enterprises based on FPGA and convolutional neural network
A new cache replacement algorithm for last-level caches by exploiting tag-distance correlation of cache lines
Practical VHDL optimization for timing critical FPGA applications
Low complexity radix-4 butterfly design for the soft-decision Viterbi decoder
No previous digital knowledge assumed here: Noel T Smith'An Introduction to Microprocessors' Hayden (1981) £8.50 pp 176
3D parity checking models for errors in RAM memories used in space on-board computers
Efficient regional multi feature similarity measure based emotion detection system in web portal using artificial neural network
Model-based, fully simulated, system-level power consumption estimation of IoT devices
HEAP: A Highly Efficient Adaptive multi-Processor framework
Selected design issues of the medical cyber-physical system for telemonitoring pregnancy at home
Bargain for testability researchers: Tsui, F FLSI/VLSI testability design McGrawHill, New York, NY, USA (1987) £49.95 pp 702
Design and implementation of novel soft switching method based DC-DC converter with non-isolated coupled inductor in solar system using FPGA
An α-factor architecture for RS decoder implemented on 90 nm CMOS technology for computer computing applications devices
Construction of a test system for smart meter dynamic error using TASK algorithm
A deadlock-free routing algorithm for dynamically reconfigurable Networks-on-Chip
An architecture for power-saving communications in a wireless mobile ad hoc network based on location information
A portable recorder for long-term fetal heart rate monitoring
Replacement of computer bureaux
Modular vector processor architecture targeting at data-level parallelism
Verifiable medical images for E-healthcare: A novel watermarking approach using robust bit-wise association of self-mutating offsprings of pixels
State language for real-time process control
Structuring formal specifications - a lesson relearned