yusuke1997/dblp-id-title huggingface dataset:
A General Probabilistic Formulation for Supervised Neural Classifiers
Visualization Analysis of Knowledge Network Research Based on Mapping Knowledge
A Reconfigurable TDMP Decoder for Raptor Codes
Designing systolic architectures for complete Euclidean distance transform
Analysis of Dataflow Programs with Interval-limited Data-rates
GENES IV: A bit-serial processing element for a multi-model neural-network accelerator
Energy-Aware Register Allocation for VLIW Processors
Optimal beamforming via interior point methods
Modified Sliding-Block Distributed Arithmetic with Offset Binary Coding for Adaptive Filters
Multiplication of a Constant (2k ± 1) and Its Fast Hardware Implementation
High level synthesis and generation FPGAs with the BEDROC system
Embedded Fluorescence Lifetime Determination for High-Throughput, Low-Photon-Number Applications
Exploiting Statically Schedulable Regions in Dataflow Programs
Eco-Storage: A Hybrid Storage System with Energy-Efficient Informed Prefetching
An Efficient Method for Designing of Modulated Filter Banks with Causal-Stable IIR Filters
Switching Activity Minimization in Iterative LDPC Decoders
Lower bounds on memory requirements for statically scheduled DSP programs
A Low Power Architecture for HASM Motion Tracking
Joint Scene and Signal Modeling for Wavelet-Based Video Coding with Cellular Neural Network Architecture
A Lightweight Authentication Protocol for Low-Cost RFID
IoT Based Load Forecasting for Reliable Integration of Renewable Energy Sources
Image Blending in a High Frame Rate FPGA-based Multi-Camera System
Structural Bayesian Linear Regression for Hidden Markov Models
Error-resistance and Low-complexity Integer Inverse Discrete Cosine Transform
Guest Editorial: Design and Implementation of DSP Systems
Reconfigurable Parser Architecture Design with Microprogrammed Controller for Multiple Purposes
Computer-Sensors: Spatial-Temporal Computers for Analog Array Signals, Dynamically Integrated with Sensors
TPSense: A Framework for Event-Reports Trustworthiness Evaluation in Privacy-Preserving Vehicular Crowdsensing Systems
An Interactive Visualization System for Network Security Data
Guest Editorial: Special Issue on Reconfigurable Video Coding
Synthesis of ASIC regular arrays for real-time image processing systems
A Direction-Based Unsymmetrical-Cross Multi-Hexagon-Grid Search Algorithm for H.264/AVC Motion Estimation
Memory-Efficient and High-Speed VLSI Implementation of Two-Dimensional Discrete Wavelet Transform Using Decomposed Lifting Scheme
High Performance Four Segment Error Tolerant Adder for 8-bit Pixel Depth Image Processing Applications
Energy Aware Signal Processing for Software Defined Radio Baseband Implementation
Minimum Classification Error Training Incorporating Automatic Loss Smoothness Determination
Multiple Antenna Enhancements for a High Rate CDMA Packet Data System
High-speed Signal Reconstruction for Compressive Sensing Applications
CDBN: Crow Deep Belief Network Based on Scattering and AAM Features for Age Estimation
Evaluation of the Spatio-Temporal Features and GAN for Micro-Expression Recognition System
An optimal time multiplication free algorithm for edge detection on a mesh
Executable Requirements and Specifications
Guest Editorial: Implementation Issues in System-on-Chip
Application of EMD Combined with Deep Learning and Knowledge Graph in Bearing Fault
Relaxed Annihilation-Reordering Look-Ahead QRD-RLS Adaptive Filters
Data Flow Algorithms for Processors with Vector Extensions - Handling Actors With Internal State
End-to-End Variable-Rate Learning-Based Depth Compression Guided by Deep Correlation Features
Graph Convolution Network Based Classification of Subjects with Prefrontal Cortex Lesion via Information-theoretic Brain Network Features
Guest Editorial: Special Issue on Design and Programming of Signal Processors for Multimedia Communication
Guest Editorial: Special Issue on Design and Architectures for Signal and Image Processing 2021
Iris Recognition Using Wavelet Features
A Bidirectional LSTM Approach with Word Embeddings for Sentence Boundary Detection
Hardware Implementation for Bipartite Belief Propagation Polar Decoding with Bit Flipping
Automated Design Space Exploration for DSP Applications
Basis-Based Speaker Adaptation Using Partitioned HMM Mean Parameters of Training Speaker Models
ROM based methods for computing the squaring operation in modular rings
PSO and RF Based Improved ECG Signal Analysis
Systolic square root covariance Kalman filtering
Hardware Acceleration of Red-Black Tree Management and Application to Just-In-Time Compilation
A shift register architecture for high-speed data sorting
A 270ps 20mW 108-bit End-around Carry Adder for Multiply-Add Fused Floating Point Unit
Low-Latency Parallel Row-Layered Min-Sum Decoders with Scheduling Optimization for MDPC Code-Based Post-Quantum Cryptography
FPGA Implementation of an Ultrasonic Flaw Detection Algorithm Based on Convolutional Neural Networks
A Hardware Architecture of CABAC Encoding and Decoding with Dynamic Pipeline for H.264/AVC
A radix-8 wafer scale FFT processor
Design and Implementation of an FPGA-Based DNN Architecture for Real-time Outlier Detection
An EMG Feedback Control Functional Electrical Stimulation Cycling System
Total Power Optimization for Combinational Logic Using Genetic Algorithms
Image Restoration in Portable Devices: Algorithms and Optimization
Discrete Wavelet Transform: Architectures, Design and Performance Issues
Optimization of Flexible Filter Banks Based on Fast Convolution
Extensions on Low-Complexity DCT Approximations for Larger Blocklengths Based on Minimal Angle Similarity
Operation Merging for Hardware Implementations of Fast Polar Decoders
Guest Editorial: 20 Years of ASAP
Multivariate multifractal texture DCGAN synthesis: How well does it work ? How does one know ?
A Distributed, Simultaneously Multi-Threaded (SMT) Processor with Clustered Scheduling Windows for Scalable DSP Performance
A parallel binary structured LMS algorithm for transversal adaptive filters
Dynamic Resource Allocation for Scalable H.264/AVC Video Transmission over MIMO Wireless Systems
Guest Editorial: Modern Speech Processing and Learning
An Efficient Computation of LSP Frequencies Using Modified Complex-Free Ferrari Formula
Computation-skip Error Mitigation Scheme for Power Supply Voltage Scaling in Recursive Applications
Design of GNSS Receivers Powered by Renewable Energy via Adaptive Tracking Channel Control
Use of Microphone Array and Model Adaptation for Hands-Free Speech Acquisition and Recognition
Video Object Extraction for Object-Oriented Applications
Net Clustering Based Constructive and Iterative Improvement Approaches for Macro-Cell Placement
A Time Error Correction Method Applied to High-Precision AER Asynchronous CMOS Image Sensor
Dynamically Generating FFT Code
An Exploration Framework for Efficient High-Level Synthesis of Support Vector Machines: Case Study on ECG Arrhythmia Detection for Xilinx Zynq SoC
3D Tomography Back-Projection Parallelization on Intel FPGAs Using OpenCL
A High-Throughput and Low-Complexity Decoding Scheme based on Logarithmic Domain
A Hardware Architecture for the LZW Compression and Decompression Algorithms Based on Parallel Dictionaries
Artificial Intelligence Platform for Mobile Service Computing
Bidiagonalization and symmetric tridiagonalization by systolic arrays
Methods for Power/Throughput/Area Optimization of H.264/AVC Decoding
Optimal Datapath Widths Within Turbo and Viterbi Decoders for High Area- and Energy-Efficiency
Topic-Oriented Controlled Text Generation for Social Networks
A symmetric rank-revealing toeplitz matrix decomposition
Editorial: Signal Processing for Communication/Biomedical Systems and Reliability Improvement
QRS Detection Based on Morphological Filter and Energy Envelope for Applications in Body Sensor Networks
HistoTrack++: A Vision-Based System for Temporal Bout Segmentation, Multi-Target Tracking and Kinematic Analysis in Overhead Combat Sports Videos
Three-Phase Algorithms for Task Scheduling in Distributed Mobile DSP System with Lifetime Constraints
A Novel Method for Efficient Indoor-Outdoor Image Classification
Guest Editorial: Special Issue on Machine Learning and Signal Processing
Transfer Learning of BCI Using CUR Algorithm
Blind Suppression of Nonstationary Diffuse Acoustic Noise Based on Spatial Covariance Matrix Decomposition
A Slotted-FAMA based MAC Protocol for Underwater Wireless Sensor Networks with Data Train
Neutron Tomography of Spent Fuel Casks
A Safari Through the MPSoC Run-Time Management Jungle
Heterogeneous Computing Utilizing FPGAs - A New and Flexible Approach Integrating Dedicated Hardware Accelerators into Common Computing Platforms
A Novel VLSI Architecture of SPIHT Using Breadth First Search for Real-Time Applications
Code Analysis with Static Application Security Testing for Python Program
Algebraic Methods for Optimizing Constant Multiplications in Linear Systems
High performance VLSI architecture for Wave Digital Filtering
Low-Complexity Belief Propagation Detection for Correlated Large-Scale MIMO Systems
A New Score Level Fusion Approach for Stable User Verification System Using the PPG Signal
Overview of the MPEG Reconfigurable Video Coding Framework
An Efficient Delayless Sub-band Filtering for Adaptive Feedback Compensation in Hearing Aid
Analysis and Design of On-sensor ECG Processors for Realtime Detection of Cardiac Anomalies Including VF, VT, and PVC
Testing and diagnosis of FFT arrays
Adaptive Early Termination Algorithm Using Coding Unit Depth History in HEVC
Group Study of Simulated Driving fMRI Data by Multiset Canonical Correlation Analysis
FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data
Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy
Bit-level systolic arrays for finite-field multiplications
Power-Efficient State Exchange Scheme for Low-Latency SMU Design of Viterbi Decoder
An Algorithm for Adaptive Mean Filtering and Its Hardware Implementation
Adaptive Search Window for High Efficiency Video Coding
Motion Estimation Algorithms Using the Deformation of Planar Hierarchical Mesh Grid for Videoconferencing Applications at Low Bit-rate Transmission
Model-Based Design of Flexible and Efficient LDPC Decoders on FPGA Devices
Design of Silicon IP Cores for Biorthogonal Wavelet Transforms
Edge-based Segmentation Using Robust Evolutionary Algorithm Applied to Medical Images
A Clustering Approach to Explore Grain-Sizes in the Definition of Processing Elements in Dataflow Architectures
Low Energy Signal Processing Techniques for Reliability Improvement of High-Density NAND Flash Memory
Davis Mayer Streebog Cryptographic Hash-Based Blockchain for Secure Transaction Management Using SDN in IIoT Applications
Multiprocessor, Multithreading and Memory Optimization for On-Chip Multimedia Applications
Efficient Implementation of 2-D FCT with Reduced Memory Access for Programmable DSPs
A Robust Particle Filter-Based Method for Tracking Single Visual Object Through Complex Scenes Using Dynamical Object Shape and Appearance Similarity
A Novel 4D Hyperchaotic System Assisted Josephus Permutation for Secure Substitution-Box Generation
Offloading in Software Defined Network at Edge with Information Asymmetry: A Contract Theoretical Approach
Risk-Driven Behavioral Biometric-based One-Shot-cum-Continuous User Authentication Scheme
Segmentation of Multi-Channel Image with Markov Random Field Based Active Contour Model
Efficient Neuromorphic Signal Processing with Resonator Neurons
Dual-Data Rate Transpose-Memory Architecture Improves the Performance, Power and Area of Signal-Processing Systems
Guest Editorial: Embedded Multicore Systems and Applications
Address Generation Optimization for Embedded High-Performance Processors: A Survey
On Probability Density for Modeling Video Traffic
Implementation of a Radix-4, Parallel Turbo Decoder and Enabling the Multi-Standard Support
Rapid Hybrid Acquisition of Ultra-Wideband Signals
Research on Image Retrieval Algorithm Based on Combination of Color and Shape Features
Dynamically Parameterized Algorithms and Architectures to Exploit Signal Variations
Technology-Optimized Fixed-Point Bit-Parallel Multipliers for FPGAs
Vision-Based Fingertip-Writing Character Recognition
Real-Time FPGA Implementation of FIR Filter Using OpenCL Design
A Highly Efficient Multicore Floating-Point FFT Architecture Based on Hybrid Linear Algebra/FFT Cores
Heuristic Loop-Based Scheduling and Allocation for DSP Synthesis with Heterogeneous Functional Units
EVE: A Flexible SIMD Coprocessor for Embedded Vision Applications
Model-Based Dynamic Scheduling for Multicore Signal Processing
Scaling of MOS technology to submicrometer feature sizes
Matrix Merging Scheme and Efficient Decoding Techniques for Reconfigurable QC-LDPC Decoders
Rate-optimal schedule for multi-rate DSP computations
Implementation of a High Throughput Soft MIMO Detector on GPU
Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation
An Explicit Solution for Image Restoration using Markov Random Fields
Accurate 77-GHz Millimeter-Wave Radar Noncontact Vital Sign Detection Using the Optimized Variational Mode Decomposition Algorithm
A Low-Energy Wide SIMD Architecture with Explicit Datapath
Minimizing Average Schedule Length under Memory Constraints by Optimal Partitioning and Prefetching
V-FPGAs: Increasing Performance with Manual Placement, Timing Extraction and Extended Timing Modeling
Accurate and Scalable Simulation of Network of Heterogeneous Sensor Devices
Online Percentile Estimation (OPE)
Self-Adapting Resource Escalation for Resilient Signal Processing Architectures
A Signed Array Multiplier with Bypassing Logic
Low-Resolution and Low-Quality Face Super-Resolution in Monitoring Scene via Support-Driven Sparse Coding
Comparing Three Clustering-based Scheduling Methods for Energy-Aware Rapid Design of MP2SoCs
A clock-free chip set for high-sampling rate adaptive filters
Efficient Hardware Architectures for 1D- and MD-LSTM Networks
An Efficient VLSI Architecture for Computing Decision Feedback Equalizer Coefficients from the Channel State Information
Editorial Note: Acoustics, Speech and Signal Processing
VHDL Implementation of the Fast Wavelet Transform
Blind Deconvolution of Multi-Input Single-Output Systems Using the Distribution of Point Distances
Neural Network Modelling with Input Uncertainty: Theory and Application
An image processing system using Image Signal Multiprocessors (ISMPs)
An Electromechanical Film Sensor Based Wireless Ballistocardiographic Chair: Implementation and Performance
Automatic Liver Segmentation from 2D CT Images Using an Approximate Contour Model
PHIDEO: High-level synthesis for high throughput applications
A Modeling Language for MapReduce Programing in a Storage System Perspective
On the Performance Analysis of the Least Mean M-Estimate and Normalized Least Mean M-Estimate Algorithms with Gaussian Inputs and Additive Gaussian and Contaminated Gaussian Noises
Radix-8 division with over-redundant digit set
Guest Editorial: Special Issue on Computing Architectures for Real-Time Video/Image Analysis
A New Cost Function for Air Quality Modeling
Dynamic Spectrum Access Integrated in a Wideband Cognitive RF-Ethernet Bridge for Industrial Control Applications
DIFFS: A Low Power, Multi-Mode, Multi-Standard Flexible Digital Front-End for Sensing in Future Cognitive Radios
CORDIC Processor for Variable-Precision Interval Arithmetic
Neuro-Fuzzy Approach to the Segmentation of Psoriasis Images
Design of an H.264/AVC Decoder with Memory Hierarchy and Line-Pixel-Lookahead
A Power Efficient Heterogeneous Embedded Vision System
PSO-based Fusion Method for Video Super-Resolution
A Global Data Model for Electric Power Data Centers
Design Issues in a Performance Monitor for Embedded Multi-core Systems
A Combined Multi-Mode Visibility Detection Algorithm Based on Convolutional Neural Network
High Speed FPGA-Based Implementations of Delayed-LMS Filters
A Low-rate Data Transfer Technique for Compressed Voice Channels
Perturbation-Based Eigenvector Updates for On-Line Principal Components Analysis and Canonical Correlation Analysis
Simultaneous Estimation of Glottal Source Waveforms and Vocal Tract Shapes from Speech Signals Based on ARX-LF Model
VLSI Architecture for Lifting-Based Shape-Adaptive Discrete Wavelet Transform with Odd-Symmetric Filters
Dynamic programming implementation on array processor architectures
High level synthesis and generating FPGAs with the BEDROC system
Design Flow for GPU and Multicore Execution of Dynamic Dataflow Programs
An Adaptive Motion Estimation Architecture for H.264/AVC
Enhancing Automatic Construction of Gene Subnetworks by Integrating Multiple Sources of Information
Clock Distribution Methodology for PowerPC TM Microprocessors
Run-time Reconfigurable Acceleration for Genetic Programming Fitness Evaluation in Trading Strategies
Parallel implementation for iterative image restoration algorithms on a parallel DSP machine
Energy Efficient Deep Learning Inference Embedded on FPGA for Sleep Apnea Detection
Bit-level systolic algorithms for real symmetric and Hermitian eigenvalue problems
A Cost-effective VLD Architecture for MPEG-2 and AVS
Memory Requirement Reduction Method for Successive Cancellation Decoding of Polar Codes
Intravascular Ultrasound Tissue Characterization with Sub-class Error-Correcting Output Codes
Effective Gene Selection Method Using Bayesian Discriminant Based Criterion and Genetic Algorithms
VLSI algorithms and architectures for complex householder transformation with applications to array processing
CVR: A Continuously Variable Rate LDPC Decoder Using Parity Check Extension for Minimum Latency
Online Dynamic Window (ODW) Assisted Two-Stage LSTM Frameworks For Indoor Localization
Audio Fingerprinting: Nearest Neighbor Search in High Dimensional Binary Spaces
FPGA-Based Inter-layer Pipelined Accelerators for Filter-Wise Weight-Balanced Sparse Fully Convolutional Networks with Overlapped Tiling
Single-Channel Source Separation of Audio Signals Using Bark Scale Wavelet Packet Decomposition
Radix-4 Vectoring CORDIC Algorithm and Architectures
Crowd Segmentation Using both Appearance and Stereo Information
A Speech-Centric Perspective for Human-Computer Interface: A Case Study
Introduction to the Special Issue on Embedded Computing Systems for DSP
Total Variation for Image Restoration with Smooth Area Protection
Multiple Transform Selection Concept Modeling and Implementation Using Dynamic and Parameterized Dataflow Graphs
A Flexible 200 GOPS HDTV Motion Estimation Chip
Object-aware Policy Network in Deep Recommender Systems
A Blind Source Separation Technique for Extracting Sinusoidal Interferences in Ultrasonic Non-Destructive Testing
Guest Editorial: Special Issue on Advances in Signal Processing Systems
Area-Efficient Antenna-Scalable MIMO Detector for K-best Sphere Decoding
Design of an Embedded Arabic Optical Character Recognition
Efficient 45nm ASIC Architecture for Full-Search Free Intra Prediction in Real-Time H.264/AVC Decoder
Some Equivalences between Kernel Methods and Information Theoretic Methods
Digit pipelined arithmetic on fine-grain array processors
Efficient NP Tests for Anomaly Detection Over Birth-Death Type DTMCs
Efficient Performance Prediction of End-to-End Autonomous Driving Under Continuous Distribution Shifts Based on Anomaly Detection
Formosa Speech in the Wild Corpus for Improving Taiwanese Mandarin Speech-Enabled Human-Computer Interaction
Guest Editorial: Special Issue on Systems Optimizations for DSP and AI Applications
Cognitive Radio - A Current Snapshot and Some Thoughts on Commercialization for Future Cellular Systems
An Efficient Embedded Bitstream Parsing Processor for MPEG-4 Video Decoding System
Digital Signal Processing with Interleaved ADC Systems
TouchSpeaker, a Multi-sensor Context-Aware Application for Mobile Devices: from Application to Implementation
An RNS Architecture for Quasi-Chaotic Oscillators
Iris Recognition using Robust Localization and Nonsubsampled Contourlet Based Features
Survey on Algorithm and VLSI Architecture for MPEG-Like Video Coder
Design and Analysis of Hierarchically Modulated BICM-ID Receivers With Low Inter-Layer Interferences
Information-Theoretic Multiclass Classification Based on Binary Classifiers - On Coding Matrix Design, Reliability and Maximum Number of Classes
Efficient Detection Algorithms for MIMO Communication Systems
Memory Coalescing Implementation of Metropolis Resampling on Graphics Processing Unit
Comparative Study of Simplified MAP Algorithms and an Implementation of Non-Parallel-Radix-2 Turbo Decoder
Foreword to the Special Section on Reconfigurable Computing
Fast multiplication in VLSI using wave pipelining techniques
Hardware-software architecture of the SWAN Wireless ATM network
Hybrid Facial Regions Extraction for Micro-expression Recognition System
High-throughput VLSI Implementations of Iterative Decoders and Related Code Construction Problems
Methodical Low-Power ASIP Design Space Exploration
Leading One Detection Hyperbolic CORDIC with Enhanced Range of Convergence
Empirical Mode Decomposition: Real-Time Implementation and Applications
Synthesis of Embedded Software from Synchronous Dataflow Specifications
High Performance CMOS Analog Arithmetic Circuits
A New Flexible Filter Bank for Low Complexity Spectrum Sensing in Cognitive Radios
Image Processing for Fusion Identification Between the GLUT4 Storage Vesicles and the Plasma Membrane
CTC Regularized Model Adaptation for Improving LSTM RNN Based Multi-Accent Mandarin Speech Recognition
A 32-bit logarithmic number system processor
Evaluation of Sticky-Bit Generation Methods for Floating-Point Multipliers
A novel fault tolerance technique for recursive least squares minimization
A Robust Watermarking Scheme Using Sequency-ordered Complex Hadamard Transform
Efficient FPGA Implementation of a Programmable Architecture for GF(p) Elliptic Curve Crypto Computations
IoT Network Management within the Electric Vehicle Battery Management System
Energy Efficient Hardware Loop Based Optimization for CGRAs
Keystroke Biometric Systems for User Authentication
Error Analysis of the Kmetz/Maenner Algorithm
Big Data Approach for Fire Prevention and Warning for Power Systems
Lifetime Maximization Based on Coverage and Connectivity in Wireless Sensor Networks
Anomaly Detection Techniques in the Gaia Space Mission Data
Parallel High Throughput Soft-Output Sphere Decoding Algorithm
Quasi-Static Scheduling of CAL Actor Networks for Reconfigurable Video Coding
CSA - HRNet: Channel and Spatial Attention High-Resolution Networks for Semantic Segmentation
Direction-of-Arrival Estimation Methods: A Performance-Complexity Tradeoff Perspective
Intelligent Fault Diagnosis for Industrial Big Data
Hardware Implementation of Block-based Motion Estimation for Real Time Applications
A Practical Method Based on Bayes Boundary-Ness for Optimal Classifier Parameter Status Selection
An Empirical Study of Collaborative Acoustic Source Localization
Color Pixel Reconstruction for a Monolithic RGB-Z CMOS Imager
The LISA design environment for the synthesis of array processors including memories for the data transfer and fault tolerance by reconfiguration and coding techniques
Multi-Class Classification of Abnormal Heartbeat Detection using Hyperdimensional Computing
Reducing Encoder Bit-Rate Variation in MPEG Video
A Novel GPU-Based Efficient Approach for Convolutional Neural Networks with Small Filters
Flexible Multi-Core Platform for a Multiple-Format Video Decoder
An 8 × 8 20 Gbps Reconfigurable Load Balanced TDM Switch IC for High-Speed Networking
An Efficient Small Traffic Sign Detection Method Based on YOLOv3
A Pilot Study on Brain Source Localization and Connectivity Analysis with MEG Responses to Unilateral Tactile Stimuli in Healthy Children Using Normalized Principal Component Analysis
An Efficient FIFO Based Accelerator for Convolutional Neural Networks
Robust Recursive Beamforming in the Presence of Impulsive Noise and Steering Vector Mismatch
High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping
Time Series Segmentation Using a Novel Adaptive Eigendecomposition Algorithm