yusuke1997/dblp-id-title huggingface dataset:
A Low-Power Keyword Spotting System With High-Order Passive Switched-Capacitor Bandpass Filters for Analog-MFCC Feature Extraction
Corrections to "Millimeter-Wave Integrated Phased Arrays" [early access, Jul 12, 21 doi: 10.1109/TCSI.2021.3093093]
A 6.78 MHz Single-Stage Wireless Power Transmitter Using a 3-Mode Zero-Voltage Switching Class-D PA
A Universal Evaluation Method of Element Matching Strategies for Data Converters Based on Optimal Combination Algorithms
High Throughput and Hardware Efficient Hybrid LDPC Decoder Using Bit-Serial Stochastic Updating
An Ultra-Low Noise Figure and Multi-Band Re-Configurable Low Noise Amplifier
A Low Noise Readout Circuit With Input-Common-Mode-Feedback Charge Sensitive Amplifier Using Differential Pseudo Resistors for MEMS Gyroscopes
Robust H∞ Adaptive Sliding Mode Fault Tolerant Control for T-S Fuzzy Fractional Order Systems With Mismatched Disturbances
Bias-Policy Iteration-Based Adaptive Dynamic Programming for Optimal Control of Discrete-Time Nonlinear Systems
An 18~30 GHz Vector-Sum Phase Shifter With Two-Stage Transformer-Based Hybrid in 130-nm SiGe BiCMOS
KaLi: A Crystal for Post-Quantum Security Using Kyber and Dilithium
An Ultrasound Transducer Analog Front-End With dB-Linear Time-Gain Compensation Using Translinear Loop Principle
A Self-Clocked and Variation-Tolerant Unified Voltage-and-Frequency Regulator for In-Order Executed Digital Loads
SiBrain: A Sparse Spatio-Temporal Parallel Neuromorphic Architecture for Accelerating Spiking Convolution Neural Networks With Low Latency
A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router
Negative Input Protection Design of Power Switch
A Triode-Based Analog Gate and Its Application in Chaotic Circuits
T 3 L: A Practical Implementation of Tri-Transistor Ternary Logic Based on Inkjet-Printed Anti-Ambipolar Transistors and CMOSs of Thin-Film Structure
A Real-Time and High Precision Hardware Implementation of RANSAC Algorithm for Visual SLAM Achieving Mismatched Feature Point Pair Elimination
A 23.6-46.5 GHz LNA with 3 dB NF and 24 dB Gain Tuning Range in 28-nm CMOS Technology
C 2 IM-NN: A Low-Power 3D Point Clouds Matching Processor With 1D-CNN Prediction and CAM-Based In-Memory k-NN Searching
Real-Time Compensation in Organic Light-Emitting Diode Television Displays Using Current Sensing Method With Charge Integrators
NoCiPUF: NoC-Based Intrinsic PUF for MPSoC Authentication
Toward Efficient System-on-Module for Design-Space Exploration of Analog Spiking Neural Networks
Efficiency Enhancement Technique for Outphasing Amplifier With Extended Power Back-Off Range
An Area-Efficient Message Passing Detector for Massive MIMO Systems
Design and Miniaturization of a 3.1-5.5-GHz Fully Distributed Efficient Power Amplifier MMIC in GaN-on-SiC HEMT Technology
Multi-Class Hierarchical Random Networks for Consensus-Based Information Filter
A Complex Band-Pass Filter for Low-Power and High-Performance Transceivers
A Novel Family of Dual-Band Matching Networks Using Filters and Phase Shifters
A -79 dBm 7.56 nW 433 MHz Wake-Up Receiver With Interference Suppression for IoT Application
Distributed Voltage Restoration of AC Microgrids Under Communication Delays: A Predictive Control Perspective
Intelligent Event-Triggered H ∞ Load Frequency Control for Power Systems With Multiple-Resource Delays
Design of Scalable Hybrid Boost Converter With Optimal Number of Stages for High Conversion Ratio and High Power Efficiency
DCAP: A Scalable Decoupled-Clustering Annealing Processor for Large-Scale Traveling Salesman Problems
A Matching Strategy Based on Full-Permutation Bisection for Data Converters
A 0.0325-mm² 114-to-147-GHz 6-Bit Passive Vector-Modulated Phase Shifter With MN-Embedded Isolated Power Combiner Achieving <3.7° RMS Phase Error in 65-nm CMOS
A 2.84-mW 8-MHz Bandwidth 76.7-dB SNDR N-Path-Filter-Based Pure Bandpass DSM
The Truth About 2-Level Transition Elimination in Bang-Bang PAM-4 CDRs
Fixed-Time Stability of Nonlinear Systems With Destabilizing Delayed Impulses: Necessary and Sufficient Conditions
Dynamic Event-Triggered Impulsive Control for Stochastic Nonlinear Systems With Extension in Complex Networks
An Energy-Efficient CNN/Transformer Hybrid Neural Semantic Segmentation Processor With Chunk-Based Bit Plane Data Compression and Similarity-Based Token-Level Skipping Exploitation
Flocking Dynamics for Cooperation-Antagonism Multi-Agent Networks Subject to Limited Communication Resources
Ultra-High Efficiency TRNG IP Based on Mesh Topology of Coupled-XOR
Outlooks on Transmitter Energy Efficiency and FOM and a -189.7-dBJ/bit ULP DPPM Transmitter
A Non-Redundant Latch With Key-Node-Upset Obstacle of Beneficial Efficiency for Harsh Environments Applications
A Low-Latency Power Series Approximate Computing and Architecture for Co-Calculation of Division and Square Root
Comprehensive Diagnosis Strategy for Power Switch, Grid-Side Current Sensor, DC-Link Voltage Sensor Faults in Single-Phase Three-Level Rectifiers
A 28 nm 16 Kb Bit-Scalable Charge-Domain Transpose 6T SRAM In-Memory Computing Macro
A Fully Integrated 1 GHz 8A I max Step-Down and Step-Up Switched Capacitor Voltage Regulator in 3 nm FinFET Technology Featuring Auto Mode Transition
APCCAS 2022 Guest Editorial Special Issue Based on the 18th Asia Pacific Conference on Circuits and Systems
An Efficient Multi-View Cross-Attention Accelerator for Vision-Centric 3D Perception in Autonomous Driving
Distributed Online Generalized Nash Equilibrium Learning in Multi-Cluster Games: A Delay-Tolerant Algorithm
A New Hardware-Efficient and Low Sensing-Time Cooperative Spectrum-Sensor for High-Throughput Cognitive-Radio Network
A 2.4-6 GHz Broadband GaN Power Amplifier for 802.11ax Application
Delay-Dependent Stability Analysis of Modern Shipboard Microgrids
Benchmarking of Scaled Majority-Logic-Synthesized Spintronic Circuits Based on Magnetic Tunnel Junction Transducers
A Low-Jitter Phase Detection Technique With Asymmetric Weights in Multi-Level Baud-Rate CDR
Random Flip Bit Aware Reading for Improving High-Density 3-D NAND Flash Performance
Hopfield vs Ising: A Comparison on the SoC FPAA
SPCIM: Sparsity-Balanced Practical CIM Accelerator With Optimized Spatial-Temporal Multi-Macro Utilization
An Ultra-Low-Power Flip-Flop With Near-Threshold Robust Operation and Redundant-Free Internal Clock Transitions
380-GHz Third Harmonic Signal Generation Using Differentially Pumped Varactors in a CMOS Voltage Controlled Oscillator
A Ka-Band Reconfigurable Dual-Band Variable Gain Amplifier With Low Phase Variation for 5G Communications
In-Memory Implementation of an Approximate Adder With Reduced Latency and Error
Interdependence Among Voltage-Unstable Buses During Cascading Failure in Power Systems
A Cycle by Cycle FSK Demodulator With High Sensitivity of 1% Frequency Modulation Index for Implantable Medical Devices
Compact On-Chip mm-wave Reconfigurable Wideband Filtering Switch in 28-nm Bulk CMOS for Integrated Sensing and Communication System Applications
Hardware Self-Organizing Map With Dithered Step Neighborhood Function
A 3-D Multi-Precision Scalable Systolic FMA Architecture
Demonstrating Filtered Feedback Control Near a Boundary Crisis
A 136-GHz Compact Gain-Boosted Mixer With Wideband Balance-Compensated Baluns for 42-Gbps Communications
Fourier-Based Multi-Agent Formation Control to Track Evolving Closed Boundaries
SRIF: Scalable and Reliable Integrate and Fire Circuit ADC for Memristor-Based CIM Architectures
Accelerated Image Processing Through IMPLY-Based NoCarry Approximated Adders
DMBF: Design Metrics Balancing Framework for Soft-Error-Tolerant Digital Circuits Through Bayesian Optimization
RSACIM: Resistance Summation Analog Computing in Memory With Accuracy Optimization Scheme Based on MRAM
Improved Fixed-Time Stability Lemma of Discontinuous System and its Application
Design and Implementation of a Low-Complexity Continuously Variable Digital Filter Using a Novel Farrow-Equivalent-Newton Structure-Based Fractional Delay Filter
Analysis and Design of Wideband Active Single-Sideband Time Modulator in 0.13- μm CMOS
Programmable Analog-to-Digital Converter Array Supporting Architecture Restructuring and Mode Concurrency
A 3.0 μ Vrms, 2.4 ppm/°C BGR With Feedback Coefficient Enhancement and Bowl-Shaped Curvature Compensation
A 24-32 GHz Bidirectional Variable-Gain Phase Shifter Using a Novel Quadrature Generator and Dual-Function Bidirectional Amplifier With Phase Compensation
BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks
Supply-Noise-Desensitized Techniques for Low Jitter RO-Based PLL Achieving ≤1.6 ps RMS Jitter Within Full-Spectrum Supply Interference
Instruction-Set Accelerated Implementation of CRYSTALS-Kyber
PROTON: Post-Synthesis Ferroelectric Thickness Optimization for NCFET Circuits
Sensing and Cancellation Circuits for Mitigating EMI-Related Common Mode Noise in High-Speed PAM-4 Transmitter
Adaptive Synchronization for Networked Parabolic PDE Systems With Uncertain Nonlinear Actuator Dynamics
Efficient Computation for Discrete Fractional Hadamard Transform
A High-Speed FPGA-Based Hardware Implementation for Leighton-Micali Signature
Correct and Verify - CAV: Exploiting Binary Decision Diagrams to Enable Formal Verification of Approximate Adders With Correct Carry Bits
Ku Band SiGe Power Amplifier With High Output Power and SWR Robustness Up to 120 °C
A 0.6-to-1.2 V Scaling-Friendly Discrete-Time OTA-Free Linear VCO-Based ΔΣ ADC Suitable for DVFS
Monolithically Integrated Bootstrapped Gate Driver With a 200-V GaN Power Switch
High Performance CNN Accelerators Based on Hardware and Algorithm Co-Optimization
A Generalization of the Groszkowski's Result in Differential Oscillator Topologies
A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC
RAW Images-Based Motion-Assisted Object Detection Accelerator Using Deformable Parts Models Features on 1080p Videos
C-AND: Mixed Writing Scheme for Disturb Reduction in 1T Ferroelectric FET Memory
Dual-Event-Driven Synchronization Control for Discrete-Time Complex Dynamical Networks
Generalized Relationship Between Frequency Response and Settling Time of CMOS OTAs: Toward Many-Stage Design
Implementation of Ternary Weights With Resistive RAM Using a Single Sense Operation Per Synapse
Faster NTRU on ARM Cortex-M4 With TMVP-Based Multiplication
RT-FLOW: FPGA Implementation of Real-Time Optical-Flow-Based SLAM for High-Speed Tracking and High-Quality Mapping
Event-Triggered Neuro-Adaptive Fixed-Time Control for Nonlinear Switched and Constrained Systems: An Initial Condition-Independent Method
A Low-Cost Pipelined Architecture Based on a Hybrid Sorting Algorithm
A Twin Circuit Theory-Based Framework for Oscillation Event Analysis in Inverter-Dominated Power Systems With Case Study for Kaua'i System
Scalable Single-Input Behavioral Modeling Architecture for MIMO Systems With Crosstalk
Reconfigurable and Dynamically Transformable In-Cache-MPUF System With True Randomness Based on the SOT-MRAM
Baseband Fusion Technique for Filter-Less Wideband Transmitters
Capacitive Feedbacked Cold-Phase Compensator Analog Pre-Distorter and PAE Enhancer for K-Band CMOS PAs
Area-Delay-Energy-Efficient Approximate Dividers Based on Piecewise Linear Fitting of Surface
Correction to "Leveraging Negative Capacitance CNTFETs for Image Processing: An Ultra-Efficient Ternary Image Edge Detection Hardware"
Finite-/Fixed-Time Synchronization of Memristor Chaotic Systems and Image Encryption Application
An Adaptive Impedance Matching System With Fast Optimization Control Algorithm for Wireless Power Transfer via Magnetic Coupling Resonance
Predictor Feedback Control of Discrete-Time Systems With Both Input Delays and Multiple State Delays Based on State Observers
A Novel Flow for Reducing Dynamic Power and Conditional Performance Improvement
TWINN: Training-Free Weight-Input Flipping for Mitigating Crossbar Non-Idealities in Binary Neural Network Accelerators
Accuracy Optimization With the Framework of Non-Volatile Computing-In-Memory Systems
Unknown System Dynamic Estimator-Based Two-Phase Power Reaching Law Control for DC-DC Buck Converter
A T-Type Switched-Capacitor Multilevel Inverter With Low Voltage Stress and Self-Balancing
Generalized Variable Gain ADRC for Nonlinear Systems and Its Application to Delta Parallel Manipulators
A Greedy Search Approach for Time-Interleaved ADCs Calibration Based on NRZ Input Patterns
LMI-Based Robust Stability Analysis of Discrete-Time Fractional-Order Systems With Interval Uncertainties
An 82-nW 0.53-pJ/SOP Clock-Free Spiking Neural Network With 40-μs Latency for AIoT Wake-Up Functions Using a Multilevel-Event-Driven Bionic Architecture and Computing-in-Memory Technique
RIVL: A Low-Cost SoC Agile Development Platform for Multiple RISC-V Processors Design and Verification
A Charge-Sharing-Based Half-Bridge Driver Suitable for Any Duty Cycle With No External Component
Distributed Reinforcement Learning Containment Control for Multiple Nonholonomic Mobile Robots
State Estimation for a New Battery and Motor Circuit Model of an Electric Vehicle Using Event-Triggered Functional Interval Observers
A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET
Universal Frequency-Domain Analysis of N-Path Networks
A Mixed-Pruning Based Framework for Embedded Convolutional Neural Network Acceleration
Sub-mW Keyword Spotting on an MCU: Analog Binary Feature Extraction and Binary Neural Networks
Finite-Time and Fixed-Time Bipartite Consensus Tracking of Multi-Agent Systems With Weighted Antagonistic Interactions
A Spin Scale-Aware Self-Adaptive Ising Annealing Processing Architecture for Combinatorial Optimization Problems
A Novel Single-Switch High Step-Up DC-DC Converter With High-Voltage Conversion Ratio
Hardware Acceleration of MUSIC Algorithm for Sparse Arrays and Uniform Linear Arrays
Asynchronous Control of Switched Multi-Agent Systems With Impulse Effects
A 63 μg/√Hz Noise Floor and 14 pJ Power Efficiency Open-Loop MEMS Capacitive Accelerometer Using Closed-Loop Hybrid Dynamic Amplifier
Equalizer Optimization Method Based on Local Multi-Constraint Modeling-Bayesian Optimization With Region Partitioning
A Unified Sampled-Data Small-Signal Model for a Ripple-Based COT Buck Converter With Arbitrary Ripple Injection Network
A Family of Robust Generalized Adaptive Filters and Application for Time-Series Prediction
A 25-Gb/s Energy-Efficient PAM-4 Receiver Utilizing a Pulse Amplitude Comparator and Modified Summation Method
Reconfigurability, Why It Matters in AI Tasks Processing: A Survey of Reconfigurable AI Chips
A 53-78 GHz Complementary Push-Push Frequency Doubler With Implicit Dual Resonance for Output Power Combining
Jitter-Power Trade-Offs in PLLs
A High-Voltage Differential SPDT T/R Switch for Ultrasound Systems
Analog Spiking Neural Network Based Phase Detector
A Scalable Single-Inductor Multiple-Output DC-DC Converter With Constant Charge-Transfer and Power-Up Sequencing for IoT Applications
Distributed Model Predictive Control for Consensus of Multi-Agent Systems With Connectivity Maintenance
A 0.5-V 0.02% THD Bulk-Driven OTA for Continuous-Time Applications in 180 nm CMOS
Multi-Context TCAM-Based Selective Computing: Design Space Exploration for a Low-Power NN
Low-Variance Memristor-Based Multi-Level Ternary Combinational Logic
Power System Frequency Estimation With Zero Response Time Under Abrupt Transients
Design of High Hardware Efficiency Approximate Floating-Point FFT Processor
Delay Error Shaping in ΔΣ Modulators Using Time-Interleaved High Resolution Quantizers
Imitation-Based Reinforcement Learning for Markov Jump Systems and Its Application
A Non-Iterative Method for Design of Radio Frequency Energy Harvesters
Analysis of Offset Spurs in Phase-Locked-Loops Employing Harmonic-Mixer-Based Feedback With Sample-and-Hold Operation
A Design Framework of Heterogeneous Approximate DCIM-Based Accelerator for Energy-Efficient NN Processing
Phase Noise Analysis of Periodically ON/OFF Switched Oscillators
Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar Arrays
IECA: An In-Execution Configuration CNN Accelerator With 30.55 GOPS/mm² Area Efficiency
Digital Non-Linearity Calibration for ADCs With Redundancy Using a New LUT Approach
A Fully Integrated CMOS Tri-Band Ambient RF Energy Harvesting System for IoT Devices
Optimized Interpolation of Four-Term Karatsuba Multiplication and a Method of Avoiding Negative Multiplicands
Orthogonal Filter Frequency Followed by LNA Linearity Tuning for Efficient Instinctual GaN Receiver Front-End
Fast Coding Unit Depth Identification Using Texture and Multiple Deep Learning Architectures
An 18.1 mW 50 MHz-BW 76.4 dB-SNDR CTSDM With PVT-Robust VCO Quantizer and Latency-Free Background-Calibrated DAC
Transfer Function Analysis of the Power Supply Rejection Ratio of Low-Dropout Regulators and the Feed-Forward Ripple Cancellation Scheme
Fixed-Point Kernel Adaptive Filtering for Fractional-Order Nonlinear Dynamical Systems With Applications to Chaotic Circuits
The T-Coil Circuit Demystified
State and Disturbance Observer-Based Controller Design for Fully Actuated Systems
Distributed Optimal Tracking Control of Discrete-Time Multiagent Systems via Event-Triggered Reinforcement Learning
A CMOS Energy Harvesting Interface Circuit With Cycle-to-Cycle Frequency-to-Amplitude Conversion MPPT for Centimeter-Scale Wind Turbine
Low Frequency Current-Mode Control for DC-DC Boost Converters With Overshoot Suppression
Fixed-Time Fault-Tolerant Formation Control for Heterogeneous Multi-Agent Systems With Parameter Uncertainties and Disturbances
Investigation and Design of Ultra-Wideband Resistive-Reactive Series of Continuous Inverse Modes Power Amplifier With Input Second-Harmonic Manipulation
An Integrated Primary Impulse Radio Ultra-Wideband Radar for Short-Range Real-Time Localization
Event-Triggered Synchronization of Multiple Discrete-Time Markovian Jump Memristor- Based Neural Networks With Mixed Mode-Dependent Delays
Identification of Nonlinear Discrete Systems From Probability Density Sequences
Real-Time Downsampling in Digital Storage Oscilloscopes With Multichannel Architectures
Containment Control for Networked Fractional-Order Systems With Sampled Position Data
Damping Power System Electromechanical Oscillations Using Time Delays
Dynamic Self-Reconfiguration of a Buck-Boost PV Inverter for Maximum Energy Harvesting
Multi-Agent Bifurcation Consensus-Based Multi-Layer UAVs Formation Keeping Control and Its Visual Simulation
Fully Actuated System Approaches: Predictive Elimination Control for Discrete-Time Nonlinear Time-Varying Systems With Full State Constraints and Time-Varying Delays
A 0.061 nJ/b 10 Mbps Hybrid BF-PSK Receiver for Internet of Things Applications
An Inductor-First Tri-Path Hybrid Buck Converter With Reduced Inductor Current Suitable for USB Power Delivery Adapter
Self-Coupling and Mutual Pulling in Phase-Locked Loops
A Reconfigurable LDO-Assisted Physically Unclonable Function Achieving a Zero-BER With 14% Masking
A Sub-GHz/2.4 GHz Highly Selective Reconfigurable RF Front-End Employing an N-Path Complementary Balun-LNA and Linearized RF-to-BB Current-Reuse Mixer
Adaptive Column-Wise Multi-Gain HDR CMOS Image Sensor for Single-Shot HDR Imaging
An FPGA-Based Event-Driven SNN Accelerator for DVS Applications With Structured Sparsity and Early-Stop
High-Throughput and Hardware-Efficient ASIC-Chip Fabrication of Reconfigurable LDPC/Polar Decoder for mMTC and URLLC 5G-NR Applications
Dynamic Triggering Mechanisms for Distributed Adaptive Synchronization Control and Its Application to Circuit Systems
Applications of the Frenet Frame to Electric Circuits
Field-Coupled Nanocomputing Placement and Routing With Genetic and A* Algorithms
Robust Fault Estimation and Fault-Tolerant Control for Discrete-Time Systems Subject to Periodic Disturbances
Chaos Generation With Impulse Control: Application to Non-Chaotic Systems and Circuit Design
Real-Time External Compensation System With Error Correction Algorithm for High-Resolution Mobile Displays
Fault Tolerant Observer Design for a Class of Re-Entrant Manufacturing Systems
A Mobile Platform for Movement Tracking Based on a Fast-Execution-Time Optical-Flow Algorithm
A Fully Integrated Dual-Output Continuously Scalable-Conversion-Ratio SC Converter for Battery-Powered IoT Applications
LVDE: A Lightweight Threshold Voltage Distribution Estimation Strategy for High-Performance 3-D Nand Flash Memory
Fractional-Order Sliding Mode Approach of Buck Converters With Mismatched Disturbances
Dynamic Memory Event-Triggered Anti-Disturbance Control for Switched Cyber-Physical Systems and Its Application to Switched RLC Circuit
Dynamic Event-Triggered Control for Nonlinear Stochastic Systems With Unknown Measurement Sensitivity
A Wideband Differential Linear Low-Noise Transconductance Amplifier With Active-Combiner Feedback in Complementary MGTR Configurations
A Real-Time-Link-Adaptive Operation Scheme for Maximum Energy Storage Efficiency in Resonant CM Wireless Power Receivers
Dynamic Write V MIN and Yield Estimation for Nanoscale SRAMs
Design and Analysis of Divide-by-4 Injection-Locked Frequency Divider Using Gain-Boosting Injection Balun and Dual Linear Mixer Techniques
A Robust Area-Efficient Physically Unclonable Function With High Machine Learning Attack Resilience in 28-nm CMOS
An Efficient GCN Accelerator Based on Workload Reorganization and Feature Reduction
NeuroSim V1.4: Extending Technology Support for Digital Compute-in-Memory Toward 1nm Node
Compact, High Power Capacity, and Low Insertion Loss Millimeter-Wave On-Chip Limiting Filter With GaAs PIN Technology
A 56-Gbps PAM-4 Wireline Receiver With 4-Tap Direct DFE Employing Dynamic CML Comparators in 65 nm CMOS
Optimal Adder-Multiplexer Co-Optimization for Time-Multiplexed Multiplierless Architectures
Input-to-State Stability Criteria of Discrete-Time Time-Varying Impulsive Switched Delayed Systems With Applications to Multi-Agent Systems
A Low Complexity Moving Average Nested GMP Model for Digital Predistortion of Broadband Power Amplifiers
Automotive Switched-Capacitor DC-DC Converter With High BW Power Mirror and Dual Supply Driver
H ∞ Pinning Synchronization Control for Markovian Intermittent Time-Varying Coupled Neural Networks Under Multiplicative Noises
Spin Wave Normalization Toward All Magnonic Circuits
A Compact, Power-Efficient, and On-the-Fly I2C-to-SPI Converter for Distributed E-Textile Systems
Stability Analysis for On-Off Voltage-Mode Controlled VHF Converter Combining Short-Period and Long-Period Discrete Map Models
Intermittent Information-Based Disturbance Observer Design and Recursive Depth Control for AUVs With Packet Losses
Advancement of High-Impedance Fault Detection in Primary Distribution Systems Using a Sequence Components Energy Detector
A Time-Based Pipelined ADC Using Integrate-and-Fire Multiplying-DAC
A Lightweight DRDPG-Based RL DVFS for Video Rendering on CPU-GPU Integrated SoC
A Subthreshold Adaptive-Reference Leakage- Compensation Sensing Scheme for 3D PCM With Enhanced Sensing Margin and Endurance
Digital Reconstruction in Continuous-Time Pipelined Analog-to-Digital Converters
Reconfigurable and Energy-Efficient Architecture for Deploying Multi-Layer RNNs on FPGA
Novel Low-Power Floating-Point Divider With Linear Approximation and Minimum Mean Relative Error
Special Issue on the IEEE Asia Pacific Conference of Circuits and Systems 2019 and the IEEE International Conference on Electronics, Circuits and Systems 2019
A Synthesis-Analysis Machine With Self-Inspection Mechanism for Automatic Design of On-Chip Inductors Based on Artificial Neural Networks
Precursor ISI Cancellation Sliding-Block DFE for High-Speed Wireline Receivers
Fixed-Time Intra-/Inter-Layer Output Synchronization for Multiplex Networks Under Dynamic Event-Triggered Control
Analytical Modeling of the Dual-Input Digital Doherty Power Amplifier for Efficiency and Linearity Optimization
ArPCIM: An Arbitrary-Precision Analog Computing-in-Memory Accelerator With Unified INT/FP Arithmetic
PDE Based Adaptive Control of Flexible Riser System With Input Backlash and State Constraints
Efficient Hardware Implementation of the Lightweight CRYSTALS-Kyber