yusuke1997/dblp-id-title huggingface dataset:
Runtime connection-oriented guaranteed-bandwidth network-on-chip with extra multicast communication service
Safe cooperating cyber-physical systems using wireless communication: The SafeCOP approach
Defects of quantum dot cellular automata computing devices: An extensive review, evaluation, and future directions
Scalable shared-memory architecture to solve the Knapsack 0/1 problem
Automatic large-scale integrated circuit synthesis using allocation-based scheduling algorithm
Mobile user tracking system with ZigBee
Implementation of a RISC microprocessor for programmable logic controllers
Computer architecture visualisation techniques
British Toy & Hobby Fair: 30 January-3 February 1982, Earls Court, London. Organized by British Toy Fairs Ltd
Host development systems - the software path to tomorrow
Smart campus and innovative education based on wireless sensor
Analytical performance model for FPGA-based reconfigurable computing
Using FORTH to control a robot arm
Object resizing and reclamation through the use of hardware bit-maps
More books about assembler and 16-bit micros: Turpin, R WThe 8086 and assembly language programming BSP Professional Books, Oxford, UK (1987) £12.95 pp 259
Smart Artificial Intelligence techniques using embedded band for diagnosis and combating COVID-19
Low power single precision BCD floating-point Vedic multiplier
Reducing memory penalty by a programmable prefetch engine for on-chip caches
Biologically compatible neural networks with reconfigurable hardware
Timing optimization via nest-loop pipelining considering code size
Using FPGA real time model for novel 33-level switched-capacitor multilevel inverter for PMSM drive
An efficient hardware-oriented stereo matching algorithm
On the use of embedded debug features for permanent and transient fault resilience in microprocessors
Design of multi band triangular microstrip patch antenna with triangular split ring resonator for S band, C band and X band applications
Standards in computer graphics
Augmented Intelligence enabled Deep Neural Networking (AuDNN) framework for skin cancer classification and prediction using multi-dimensional datasets on industrial IoT standards
Mapping and scheduling for heterogeneous architectures
Complex systems proved and improved
12-bit digital audio time delay using the 6809
A Java processor with hardware-support object-oriented instructions
Microcomputer kit review
Microcomputer accident location system
IT '82 advances on broad front
Data acquisition for engineers: A H VanDoren 'Data acquisition systems' (1982) £16.45 pp 291
Resource-efficient cyber-physical systems design: A survey
3 V systems spur evolution of the RS-232 standard
Adaptive scheduling to enhance data security and energy efficiency on energy harvesting platform
Graphical approach to microprocessor comparison
Learning-based BTI stress estimation and mitigation in multi-core processor systems
A compact digital gamma-tone filter processor
Implementation of energy efficient circuit design using A* algorithm in embedded network
UK Govt sees IT82 as successful step into new era
Hierarchical interconnection technology
Field-programmable gate array with non-volatile configuration
An area efficient multi-mode quadruple precision floating point adder
Multiplexed DMA with the MC6800
Design of 2-1 Multiplexer based high-speed, Two-Stage 90 nm Carry Select Adder for fast arithmetic units
Energy optimization using swarm intelligence for IoT-Authorized underwater wireless sensor networks
Embedded medical platform hardware design and application of antibacterial drugs for respiratory infections
A layered architecture for real-time systems
Active middleware for Internet Video on Demand: the QoS-aware routing solution in ubiQoS
A content addressable memory for data communications
Automatic generation of PLA from ASM charts
Microprocessor systems using the STE bus: Mitchell, RJ Macmillan, Basingstoke, UK (1989) £12.00 pp 218
Pleiades: a multimicroprocessor interactive knowledge base
A review on Virtual Reality and Augmented Reality use-cases of Brain Computer Interface based applications for smart cities
A survey of new research directions in microprocessors
Dynamic test bed for the on-board computer system of a space launch vehicle
High-speed access to stored data using switched memory decoding
SDNoC: Software defined network on a chip
Research on real-time evaluation algorithm of human movement in tennis training robot
Knowledge-based systems as an aid to computer-aided repair
Domain-specific application analysis for customized instruction identification
Programming the 68000 in high-level language for VME
Human tracking of track and field athletes based on FPGA and computer vision
Convolutional neural network-based restoration method of basketball contour image
Real time medical data monitoring and iodine 131 treatment of thyroid cancer nursing analysis based on embedded system
SHEMUS: synthesis of heterogeneous multiprocessor systems
Evolution and use of the VME subsystem bus - VSB
Embedded web medical system and rehabilitation nursing of ischemic stroke
Speed optimal FPGA implementation of the encryption algorithms for telecom applications
Multiple processing: a systems overview: Anderson, A J Prentice-Hall, Hemel Hempstead, UK (1989) £18.95, pp 492
Hybrid swarm intelligent parallel algorithm research based on multi-core clusters
A transparent and adaptive reconfigurable system
Dependability and testing of modern digital systems
Microcomputer speech synthesis and recognition: A S PoultonSigma Technical Press, Wilmslow, UK (November 1983) £7.95, pp 194
A novel algorithm for priority-based task scheduling on a multiprocessor heterogeneous system
RSM - a restricted shared memory architecture for high speed interprocessor communication
Power modeling for high performance network-on-chip architectures
Micros have their uses in process control - traditionalists and newcomers get guidance: R C Holland'Microcomputers for process control' Pergamon, London, UK (1983) £13.50 (hardback) £6.75 (paperback) pp 196
Mobile software agents for decentralised network and systems management
Design of a Multibus-compatible colour graphics subsystem
Modified dynamic current mode logic based LFSR for low power applications
Power Inspection Design by Internet of Things and RFID Technology in Smart City
A New ATPG and Online Monitoring based Technique for Hardware Trojan Detection
Reprogrammable gate arrays for hardware accelerated IC design verification
S-box-based random number generation for stochastic computing
Laboratory-based calibration of available bandwidth estimation tools
Personal computing
Research on image communication of urban film and television advertisement based on complex embedded system
MODULA-2 and object-oriented programming
Coordinated concurrent memory accesses on a reconfigurable multimedia accelerator
VLSI circuits and systems in silicon: Brown, A (ed) McGraw-Hill, UK (1991) £49.95 pp 467, ISBN 0-07-707221-9
Energy proportional streaming spiking neural network in a reconfigurable system
Testing the limits of general-purpose hypervisors for real-time control systems
Design and implementation of low-cost emulators for microprocessors
Modula-2 based multitasking environment for a flexible biprocessor controller
Simulative performance analysis of distributed switching fabrics for SCI-based systems
Design and development of new control technique for standalone PV system
Research on restoration algorithm of discrete tone image based on noise model
A network interface device for networked control system with time-driven mode
Rent's rule and extensibility in quantum computing
Performance evaluation of an AODV-based routing protocol implementation by using a novel in-field WSN diagnosis tool
Retraction notice to "Business English visualization system based on video surveillance and the internet of things" [Microprocessors and Microsystems 80 (2021) 103639]
Special Issue on Real-Time Scheduling on Heterogeneous Multi-core Processors
On the suitability of SIMD extensions for neural network simulation
Molecular conductors and semiconductors - the electronic materials of the future?
Dynamic multi-channel assignment using network flows in wireless data networks
Implementation of cache memory and fir filter using FINFETs at 22 nm technology for SOC designs
Towards resource-frugal deep convolutional neural networks for hyperspectral image segmentation
Simulation of future system data networks
A new method for digital encoder adaptive velocity/acceleration evaluation using a TDC with picosecond accuracy
Exploring machine vision application in public art education system based on image processor
ReconfROS: An approach for accelerating ROS nodes on reconfigurable SoCs
A million-bit multiplier architecture for fully homomorphic encryption
Minimal M68000 system controllers for fast-acting multi-input multi-output processes
Conventional and machine learning approaches as countermeasures against hardware trojan attacks
Efficient soft error resiliency by multi-match packet classification using scalable TCAM implementation in FPGA
FATS-2TC: A Fault Tolerant real-time Scheduler for energy and temperature aware heterogeneous platforms with Two types of Cores
Analysis and implementation of the IEC 61131-3 software model under POSIX Real-Time operating systems
Semi-static operator graphs for accelerated query execution on FPGAs
Information system architecture for developing reusable testplans for embedded software
A novel GWO optimized pruning technique for inexact circuit design
Utilization of a fast MSE calculation approach to improve the image quality and accelerate the operation of a hardware K-SOM quantizer
Pitstop++: Enabling stable and fair deadlock freedom on fault-tolerant NoC
Improved error detection performance of logic implication checking in FPGA circuits
Multitransputer architecture for the low-level characterization of speech spectrograms
FPGA implementation of two multilayer perceptron neural network in cascade for efficient real time hand gestures tracking
A procedure for multimicroprocessor system testing during development
ASTRO: Synthesizing application-specific reconfigurable hardware traces to exploit memory-level parallelism
Professional development and ICT literacy of college teachers based on FPGA and image target recognition education
B2L: A hot data identification algorithm by fusing bloom filter and temporal locality for NAND flash based solid-state drives
Address-encoded byte order
Printing grey scale images on a fax machine
C Traps and Pit Falls: Koenig, A Addison-Wesley, Wokingham, UK (1989) £13.49 pp 141
Variability-tolerant routing algorithms for Networks-on-Chip
Essential reading for the basics and implementation of boundary scan: Parker, K PThe boundary-scan handbook Kluwer Academic, Dordrecht, The Netherlands (1992) ISBN 0 7923 9270 1, £48.00/Dfl. 160.00, pp 282
Efficient march test for 3-coupling faults in random access memories
Two books in one on GaAs design and new RISC architectures
Retraction notice to 'Virtual garden landscape planning based on FPGA and GIS platform' [Microprocessors and Microsystems 79 (2020) 103314]
High performance hardware support for elliptic curve cryptography over general prime field
An analysis of distributed sensor data aggregation for network intrusion detection
FPGA realization of a CORDIC based FFT processor for biomedical signal processing
Evolving communicating controllers for multiple mobile robot systems
Bounds on population coverage using test generation by fault sampling
An architecture for online-diagnosis systems supporting compressed communication
RETRACTED: Apprehension of parity generator through array of Mach-Zehnder modulation process
Speech-controlled cloud-based wheelchair platform for disabled persons
Seventh Symposium on Microcomputer and Microprocessor Applications (μP'92): Budapest, Hungary, 22-24 April 1992
Improved community structure discovery algorithm based on penalised matrix decomposition for complex networks
Multiprocessor scheme with application to macro-dataflow
Process communication within a distributed multimicrocomputer system
A selective DVS technique based on battery residual
The structured alternative: program design, style and debugging: Don Cassel, Prentice-Hall, Englewood Cliffs, NJ, USA (1983) £22.45 pp 242
Research on environmental landscape design based on virtual reality technology and deep learning
An improved method for measuring frame synchronization time parameters based on YOLOv4
A processor-sharing model for input-buffered ATM-switches in a correlated traffic environment
A low-latency modular switch for CMP systems
High-performance asynchronous pipeline using embedded delay element
Virtual prototyping of pressure driven microfluidic systems with SystemC-AMS extensions
Multibus II message passing
VLSI asynchronous systems: specification and synthesis
Motion image processing system based on multi core FPGA processor and convolutional neural Network
Design and implementation of instruction indirection for embedded software obfuscation
A scalable, non-interfering, synthesizable Network-on-Chip monitor - Extended version
Computing with parallel architectures: T.node: Gassilloud, D and Grossetie, J C (Eds) Kluwer (1991) pp 241, £52, ISBN 0792-31225-2
Capturing and optimizing the interactions between prefetching and cache line turnoff
Implementation of PID controllers on the Motorola DSP56000/DSP56001. Part 2
On improving the performance of dynamic positive-feedback source-coupled logic (D-PFSCL) through inclusion of transmission gates
Review of programmable logic
RISC architectures : Heudin, J C and Panetto, C Chapman & Hall, London, UK (1992) ISBN 0 412 45340 1, £19.95, pp 261
Simulation of football based on PID controller and BP neural network
Microprocessors: principles and applications: M J Debenham, Pergammon Press (1979) 90 pp, £7.50 (hard), £3. 75 (paper)
EMPS: The design of an architecture for a distributed homogeneous multiprocessor system
Mobile agent technology: from first proposals to current evolutions
Detection of stress, anxiety and depression (SAD) in video surveillance using ResNet-101
Groebner basis based formal verification of large arithmetic circuits using Gaussian elimination and cone-based polynomial extraction
A low-cost in-tire-pressure monitoring SoC using integer/floating-point type convolutional neural network inference engine
Total life calculations with and without maintenance
Use of the slave emulator
Product appearance detection based on visual keywords matching
TFGS: a transputer file and graphics system for PC-hosted machines
Simulation of psychological course satisfaction based on android mobile system and neural network
PASCAL programming - problems and application : D T Barnard and RG Crawford Reston Publishing Co., Reston, VA, USA (September 1982) £17.05, pp 274
Exploring manycore architectures for next-generation HPC systems through the MANGO approach
CBP and ART image reconstruction algorithms on media and DSP processors
First IFAC workshop on algorithms and architectures for real-time control
Optimization of hospital computer network and helicobacter pylori ulcer nursing analysis
Toward a hardware man-in-the-middle attack on PCIe bus
A method for rapid prototyping of instruments using web tools
The development of safe advanced road transport telematic software
Review of ASIC accelerators for deep neural network
Blue Economy Symbiosis Mechanism Based on 5G Network and Internet of Things
LAN node for industrial environments
SFN: A new lightweight block cipher
Combining statistical models using modified spectral subtraction method for embedded system
System V interface definition - a last chance for Unix?
Adapting TDMA arbitration for measurement-based probabilistic timing analysis
A programmable image processor for real-time image processing applications
Component libraries for software re-use
Genetic algorithm driven hardware-software partitioning for dynamically reconfigurable embedded systems
DC-link voltage control of three-phase PWM rectifier by using artificial bee colony based type-2 fuzzy neural network
A method for embedding a computer vision application into a wearable device
A framework for reliability-aware embedded system design on multiprocessor platforms
A simple and effective multi-person pose estimation model for low power embedded system
An 8-bit single-chip microcomputer for automotive engine control
Big data mining based coordinated control discrete algorithm of independent micro grid with PV and energy
Micro City 81: 11-14 May 1981, Bristol Exhibition Complex, Bristol, UK. Organized by Eurofairs Limited, 9 Park Place, Clifton, Bristol BS8 1JP, UK
Real-time parallel processing implementation for word recognition using MLP and HMM
An embedded framework enabling access of elderly and disabled persons to IP-based emergency communications
Abacus turn model-based routing for NoC interconnects with switch or link failures
A TDM slot allocation flow based on multipath routing in NoCs
iHPSA: An improved bio-inspired hybrid optimization algorithm for task mapping in Network on Chip
Improved RMS for the PC environment
Efficient test vector volume reduction based on equal run length coding technique
Cloud-assisted industrial cyber-physical systems: An insight
Optimization of sparse matrix-vector multiplication using reordering techniques on GPUs
System level fixed priority energy management algorithm for embedded real time application
Interconnection services of Net/One
Performance counter based online pipeline bugs detection using machine learning techniques
PRONTO: a system for mobile robot navigation via CAD-model guidance
Microprocessor control of multiaxes continuous path motion
Using Unix by example: P C Poole and N Poole Addison-Wesley, Wokingham, UK (1985) £12.95 pp xi + 416
Design of hospital IoT smart system and nucleoside drugs for treatment of hepatitis and liver cirrhosis
IEEE 1355 data-strobe links: ATM speed at RS232 cost
Microprocessor-based portable system for heart condition diagnosis
Microprocessor implementation of field-oriented control of induction motors using ANN observers
The industrial use of formal methods
A spectral approach to identify the presence of Red Palm borer among palm
Template-based automatic data flow code generation for mediaprocessors
Near-optimal circuit mapping with reduced search paths on IBM quantum architectures
Network data mining based on artificial intelligence inference engine
Pentium processor thermal design guidelines
LDBR: Low-deflection bufferless router for cost-sensitive network-on-chip design
Interfacing Inmos links to the ISA bus
A high performance ECC hardware implementation with instruction-level parallelism over GF(2 163 )
A cross-layer approach towards developing efficient embedded Deep Learning systems
Experiences in commercial VLSI microprocessor design
Implantable network advertising video marketing based on FPGA and Sobel Algorithm
Microprocessor-based vacuum pan monitoring system for sugar crystallization
Register-file allocation via graph coloring
David E Hudak and Santosh G Abraham , Compiling Parallel Loops for High Performance Computers: Partitioning, Data Assignment and Remapping, Kluwer Academic, Dordrecht, The Netherlands (1992) ISBN 0 7923 9283 3, p. 176 £37.25
Design of an ultrasonic interface for a graphics tablet
Hybrid probabilistic timing analysis with Extreme Value Theory and Copulas
Pods - A novel intelligent energy efficient and dynamic frequency scalings for multi-core embedded architectures in an IoT environment
Aircraft detection in satellite imagery using deep learning-based object detectors
Real-time interfacing: engineering aspects of microprocessor peripheral systems: J E Cooling Van Nostrand Reinhold, Wokingham, UK (June 1986) £19.95 pp 222
Vehicle classification in Sensor Networks using time-domain signal processing and Neural Networks
A demonstration system for linking microprocessors using the GPIB (IEEE 488)
GPU based real-time SLAM of six-legged robot
Improved Design of Interval Type-2 Fuzzy based Wide Area Power System Stabilizer for Inter-area Oscillation Damping
Reconfigurable parallelized TCAM architecture based on enhanced static memory cell
The REFLECT project and the implementation of a seat adaptation system in an automotive environment
The computer revolution - industry and people: 25 May 1978, Institution of Mechanical Engineers. Organized by the Computing Techniques section, IMechE
Safety and security collaborative analysis framework for high-performance embedded computing devices
Design of a bus-based shared-memory multiprocessor DICE
Efficient power analysis approach and its application to system-on-chip design
Fast Hartley transform implementation on DSP chips
Graphics s/ware gives 2D twists, 3D perspectives: Hallam 'Graphito' Addison-Wesley Software, Reading, MA, USA (1984) £27.95
Multiplier-less VLSI architecture for real-time computation of multi-dimensional convolution
S100 in commercial applications
Realtime multitasking speech application on the TMS320
Development systems
Oberon-2 in Windows: what price compatibility?
Power flow control based on bidirectional converter for hybrid power generation system using microcontroller
Cryptographic system for data applications, in the context of internet of things
A reconfigurable computing framework for multi-scale cellular image processing
MATHA: Multiple sense amplifiers with transceiver for high performance improvement in NoC Architecture
Sine and cosine calculations
A new I DDT test approach and its efficiency in covering resistive opens in SRAM arrays
Alphanumeric TV display interface
Research on prepaid account financing model based on embedded system and Internet of Things
Error detection and correction for memories
Efficient FPGA implementation and verification of difference expansion based reversible watermarking with improved time and resource utilization
Hospital sensor network system and rehabilitation nursing of patients with urinary tract infection
ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy for data centers
Formal approach for the safety assessment of embedded controller based on programmable electronic hardware
Assignment of unexpected tasks in embedded system design process
Microprocessors and industrial control: Wheeler, C Hutchinson, London, UK (1988) £9.95, pp 176
TELEPORT: Hardware/software alternative to CUDA shared memory programming
A study of 3D Network-on-Chip design for data parallel H.264 coding
2-D Systolic Array architecture of CBNS based Discrete Hilbert Transform Processor
Integer-pixel motion estimation H.264/AVC accelerator architecture with optimal memory management
A survey of memory architecture for 3D chip multi-processors
An on-device machine learning assisted system for unobtrusive cardiac auscultation
Thread-level synthetic benchmarks for multicore systems
High-throughput and area-efficient fully-pipelined hashing cores using BRAM in FPGA
Knowledge and experience-based systems for analysis and design of microprocessor applications hardware
Human Muscle Measurement and Big Data Health Based on Wireless Sensors
Microprocessor-based simulator of a variable time delay
Losing sight of basics?
Energy-saving design of civil engineering buildings based on FPGA and embedded system
Energy cost analysis of IPSec on handheld devices
New users learn enough to apply PASCAL: J H McGregor and A H Watt 'PASCAL for science and engineering' Pitman, London, UK (1983)
Expert system to configure global design for testability structure in a VLSI circuit
Computer-assisted exercise ECG analysis: real-time scheduling within MS-DOS on PCs
A multi-attribute based trusted routing for embedded devices in MANET-IoT
A directional and scalable streaming deblocking filter hardware architecture for HEVC decoder
Reliability improvement in private non-uniform cache architecture using two enhanced structures for coherence protocols and replacement policies
Programming microcomputers with sample programs: Stanley J Evans, Reston (1980), 229 pp, £10.35
An optimal design of QCA based 2 n : 1/1: 2 n multiplexer/demultiplexer and its efficient digital logic realization
FPGA implementations of Grain v1, Mickey 2.0, Trivium, Lizard and Plantlet
Text processing system
Adaptive parallel Louvain community detection on a multicore platform