yusuke1997/dblp-id-title huggingface dataset:
Ensuring the survivability of embedded computer networks based on early detection of cyber attacks by integrating fractal analysis and statistical methods
Assembler-monitor package to teach assembly language
Transputer-based implementation of realtime robot position control
Custom microelectronics: the risk factor
Using a microprocessor in high performance liquid chromatography
Dictionary of computer graphics: John VinceFrances Pinter, London, UK (1984) £15.00 pp xii + 132
Network management schemes for IoT environment towards 6G: A comprehensive review
New design for an 82720-based colour graphics generator
Optimal processor dynamic-energy reduction for parallel workloads on heterogeneous multi-core architectures
Multi-objective efficient design space exploration and architectural synthesis of an application specific processor (ASP)
FPGA implementation of a run-time configurable NTT-based polynomial multiplication hardware
IMMM/Data Comm: 17-19 June 1980, Palais des Expositions, Geneva, Switzerland
A low-latency LSTM accelerator using balanced sparsity based on FPGA
Interactive graphics guide based on IBM PC: Chan S Park 'Interactive microcomputer graphics' Addison-Wesley, Wokingham, UK (1985) £36.95 pp xviii + 458
Power and delay efficient fir filter design using ESSA and VL-CSKA based booth multiplier
Sensor-based continuous user authentication on smartphone through machine learning
Performance of dual tone multi-frequency signal decoding algorithm using the sub-band non-uniform discrete Fourier transform on the ADSP-2192 processor
System design of full HD MVC decoding on mesh-based multicore NoCs
Application of Fuzzy PI control to improve the positioning accuracy of a rotary-linear motor driven by two-dimensional ultrasonic actuators
Simple token ring local area network
Computer vision system for applications in robotics education
Interfacing a Perkins Brailler to a BBC Micro
Adaptive motion estimation and sequential outline separation based moving object detection in video surveillance system
Word processing for blind people
Gustav Pomberger: Software engineering and Modula-2 Prentice-Hall, Englewood Cliffs, NJ, USA (1986) £12.95 pp 277
Fault-tolerant process tracking in Lego
Microprocessor I/O emulation facilities
Test pattern generation using thermometer code counter in TPC technique for BIST implementation
Image recognition of english vocabulary translation based on FPGA high-performance algorithm
Design and development of mobile internet control system for embedded fitness training cycling device
An intelligent remote-control station
A versatile architecture for long-term monitoring of single-event transient durations
Workshop on dedicated microprocessors in military and industrial systems: 25-26 May 1977, Johns Hopkins University, Applied Physics Laboratory, Laurel, Maryland, USA. Organized by IEEE Computer Society's Technical Committee on Minis and Micros
UAV track planning based on evolution algorithm in embedded system
Debugging aids for microprocessor systems
Lower the RISC: Designing optical-probing-attack-resistant cores
Rapid exploration of integrated scheduling and module selection in high level synthesis for application specific processor design
Real-time event-handling and scheduling on a multithreaded Java microcontroller
Hospital sensor network system and pathogen inspection of incision infection after spinal surgery
The Unix system: S R BourneAddison-Wesley, Reading, MA, USA (1982) pp 351
Performance evaluation of DSP and transputer based systems in sequential real-time applications
Supporting OpenMP on a multi-cluster embedded MPSoC
A multilayered feed forward neural network suitable for VLSI implementation
Classification, detection and sentiment analysis using machine learning over next generation communication platforms
PROLOG and software engineering
Elastic superposition task mapping for NoC-based reconfigurable systems
Design of a pH titrator as a component part of a personal computer
A comprehensive study of digital signal processing devices
Scalable ATM network interface design using parallel RISC processors architecture
Parallel architecture support for high-speed protocol processing
Application of IoT image detection and DWI combined with serum PCT detection in bone infection
A checkpointing algorithm for an SCI based distributed shared memory system
Microprocessors: theory and applications: G A Streitmatter and V Fiore, Reston (1979) 456 pp, £11.00
VME crate interconnection through the SCI network in large data acquisition systems
Decimal addition on FPGA based on a mixed BCD/excess-6 representation
Systolic array implementation of artificial neural networks
IEEE futurebus cache coherence protocol as a logic program
Fast algorithms for digital signal processing: Richard E Blahut, Addison-Wesley, Wokingham, UK (1985) £37.95 pp xiv + 441
Design of approximate adders and multipliers for error tolerant image processing
Implementing distributed process farms
Electronic modules creating entirely new sounds: Hal Chamberlain'Musical Applications of Microprocessors' Hayden (1980) £15.20 pp659
A reformed adaptive frequency passiveness control for unified power quality compensator with model parameter ability to improve power quality
Commercial issues: Parallel processing and the transputer
Implementation of secure applications in self-reconfigurable systems
Mixed-triggered communication with limited elastic slot boundaries
Special issue on many-core embedded systems
A flexible radio transceiver for TVWS based on FBMC
An accurate performance model of fully adaptive routing in wormhole-switched two-dimensional mesh multicomputers
Face detection system for SVGA source with hecto-scale frame rate on FPGA board
Group teaching optimization with improved Chan-Taylor algorithm for 3D indoor localization
An economic, hands-on start to boundary-scan testing
FPGA-based fault injection into switch-level models
Towards ultra-efficient QCA reversible circuits
Energy equivalence routing in wireless sensor networks
A framework for rapid evaluation of heterogeneous 3-D NoC architectures
Special issue DSD 2012 on Reliability and dependability in MPSoC Technologies
Performance Evaluation of Matrix-Matrix Multiplications Using Intel's Advanced Vector Extensions (AVX)
Microprocessor control of ignition advance angle
Time-predictable synchronization support with a shared scratchpad memory
Retraction notice to 'A machine learning based IoT for providing an intrusion detection system for security' [Microprocessors and Microsystems 82 (2021) 103741]
Balancing elliptic curve coprocessors from bottom to top
Tuning high-level synthesis SpMV kernels in Alveo FPGAs
Classification algorithm based on semantic judgment and its application in image classification
Perfectly overlapped generation of long runs on a transputer array for sorting
PASCAL-like languages for users and students: C H Smedema, P Medema and M Boasson 'The programming languages PASCAL, MODULA, CHILL and ADA' Prentice-Hall, Englewood Cliffs, NJ, USA (1983) £9.95 pp 154
Colour television graphics simulation
Techniques for SAT-based constrained test pattern generation
Design of the coarse-grained reconfigurable architecture DART with on-line error detection
A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs
A hierarchical key management method for wireless sensor networks
Beach sports image detection based on heterogeneous multi-processor and convolutional neural network
Mechanisms for controlling evolution in persistent object systems
8080/8085 software design: D G Larsen et al., Prentice Hall, (1979) 337pp, £6.95
Hospital embedded system and acupuncture treatment of vascular cognitive impairment after stroke
High level synthesis for real-time digital signal processing : J Vanhoof, K V Rompaey, I Bolsens, G Goossens and H De Man Kluwer Academic Publishers, Dordrecht, The Netherlands (1993) ISBN 0 792 393139, Dfl 177.00, £65.25, pp 302
Analytical performance modeling of de Bruijn inspired mesh-based network-on-chips
Memory reference caching for activity reduction on address buses
A combinatorial architecture for instruction-level parallelism
Research on segmentation of sports images based on GMMLS method
A system on chip for melanoma detection using FPGA-based SVM classifier
Exploration of optimal crypto-chain signature embedded secure JPEG-CODEC hardware IP during high level synthesis
Enabling circuit-switching in modern on-chip networks
Examination of microcomputer interrupt systems
MODLAN: a hardware module description language: Adam Pawlak Polish Academy of Sciences, Warsaw, Poland (December 1983) pp 96
The Macramé 1024 node switching network
Retraction notice to 'APPREHENSION OF PARITY GENERATOR THROUGH ARRAY OF MACH ZEHNDER MODULATION PROCESS' [Microprocessors and Microsys, 74 (April 2020) 103003]
Designing flexibility into memory systems
Design for testability of a 32-bit TRON microprocessor
Loop parallelisation tool for message-passing systems
Linux-based experimental boundary scan environment
Microprocessor software
FPGA implementation of parametric loudspeaker system
A RISC based protocol converter for IBM mainframes
Introduction to the STEbus
Energy optimization of Application-Specific Instruction-Set Processors by using hardware accelerators in semicustom ICs technology
A parallel and pipelined implementation of a pascal-simplex based multi-asset option pricer on FPGA using OpenCL
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation
Distributed temperature control by microcomputer of a pilot plant reactor
Reliability Evaluation of Engineering Anti-Vibration Force Based on Wireless Sensor
Computer aided art design Ps course teaching based on FPGA and embedded system graphics processing
Micros in construction: Simon Bensasson, Design Office Consortium, Cambridge, UK (1980) 114 pp, £24 (£6 to DOC members)
Operating systems, compilers, assemblers and application programs: audit trails of user satisfaction
Designing microprocessor-based instrumentation: J J CarrPrentice Hall (1982) £17.50, pp 323
Static instruction scheduling for the HARP multiple-instruction-issue architecture
Real-time hybrid adaptive fuzzy control of a SCARA robot
MultiPARTES: Multi-core partitioning and virtualization for easing the certification of mixed-criticality systems
ATLAS I: a single-chip, gigabit ATM switch with HIC/HS links arid multi-lane back-pressure
Processor design based on dataflow concurrency
A scalable pipelined architecture for real-time computation of MLP-BP neural networks
MICPRO special issue on European projects in embedded system design 2014
Computational architectures for sonar array processing in autonomous rovers
A novel pseudo random number generator based cryptographic architecture using quantum-dot cellular automata
PyIgH : A unified architecture of IgH EtherCAT Master based on Python considering hard real-time constraints
Design of a microcomputer-based LOGO turtle interface
A high-performance, resource-efficient, reconfigurable parallel-pipelined FFT processor for FPGA platforms
Design and performance analysis of reconfigurable modified Vedic multiplier with 3-1-1-2 compressor
Microcomputer interfacing: H S StoneAddison Wesley (1982) £9.95 pp 383
The BSP400: a modular neurocomputer
Light-hearted approach to MSX-basic takes the myth out of programming: Jonathan Pearce and Graham Bland 'MSX - an introduction' Century Communications, London, UK (August 1984) £7.95 pp 166
COBOL for business applications
Advanced mobile and wearable systems
Memories and microcomputers
TSX-Plus: a multiuser operating system for the LSI-11 and PDP-11
Efficiency modeling and exploration of 64-bit ARM compute nodes for exascale
A reliable and power efficient flow-control method to eliminate crosstalk faults in network-on-chips
Real-time implementation of a Doppler signal spectral estimator using sequential and parallel processing techniques
Multi core SSL/TLS security processor architecture and its FPGA prototype design with automated preferential algorithm
Using DSPs to synchronize a digital satellite modem
Energy aware farmland fertility optimization based clustering scheme for wireless sensor networks
Virtual signal processors
Design and implementation of deep learning strategy based smart signature verification System
Conceptual model for process control software specification
Development of optimized memory based VLSI architecture with histogram analysis for image contrast enhancement
Leakage aware resource management approach with machine learning optimization framework for partially reconfigurable architectures
RISC systems: Tabak, D Research Studies Press/ John Wiley, Chichester, UK (1990) £24 pp 300
Enterprise human resource management platform based on FPGA and data mining
Optimizing Network-on-Chip using metaheuristic algorithms: A comprehensive survey
Virtualized and fault-tolerant inter-layer-links for 3D-ICs
Retraction notice to the articles published in the Special issue Smart Agri from "Microprocessors and Microsystems"
Performance models of multiprocessor systems: M Ajmone Marsan, G Balgo and G Conte MIT Press, Cambridge, MA, USA (1986) £34.95 pp 294
Texts reflect growing interest in CAD for VLSI: Fichtner, W and Morf, M (eds)VLSI CAD tools and applications Kluwer, Boston, MA, USA (1987) $69.50 pp 552
Object oriented design with applications: Booch, G Benjamin Cummings, Redwood City, CA, USA (1991) £25.95 pp 58(
Case studies & training
Object and process migration in a single-address-space distributed system
Design of basketball game image acquisition and processing system based on machine vision and image processor
High-speed, high-drive SN74ABT7819 FIFO
A hardware supported operating system kernel for embedded hard real-time applications
Energy conservation in WSN through multilevel data reduction scheme
Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus
Influence of grinding condition factors on the quality of grinding products based on wireless sensors
Area and delay efficient GDI based accuracy configurable adder design
One-fault tolerance arid beyond in wormhole routed meshes
Design and evaluation of a dual-microcomputer shared memory system with a shared I/O bus
Wiretap resisting and privacy preserving data exchange with physical layer security and blockchain based authentication in Internet of Vehicles
Design and comparative analysis of D-Flip-flop using conditional pass transistor logic for high-performance with low-power systems
Data validation and integrity verification for trust based data aggregation protocol in WSN
Real-time driver fatigue detection system with deep learning on a low-cost embedded system
PASCAL, an introduction to methodical programming: A W Findlay and D A Watt, Pitman, London, UK (1978) 308 pp, £4.95
A list scheduling anomaly
Research and analysis of news transmission path based on microprocessor and image capture
Campus football application based on FPGA system and GPS wearable electronic equipment
SAT-based generation of compressed skewed-load tests for transition delay faults
Survey of field programmable logic devices
An embedded multi-core biometric identification system
Victim retention for reducing cache misses in tiled chip multiprocessors
Hospital wireless sensor network coverage and ambroxol hydrochloride in the treatment of mycoplasma pneumonia in children
FPGA implementation of hybrid recursive reversable box filter-based fast adaptive bilateral filter for image denoising
Efficient Coarse-Grained Reconfigurable Array architecture for machine learning applications in space using DARE65T library platform
High precision timing within Microsoft Windows: threads, scheduling and system interrupts
Realtime parallel software implementation of a DS-CDMA Multiuser Detector
Improving the area of fast parallel decimal multipliers
A comparison-based diagnosis algorithm tailored for crossed cube multiprocessor systems
Hybridization of Deep Convolutional Neural Network for Underwater Object Detection and Tracking Model
OCCAM-an overview
ADA gets support from UK
Reconfigurable cache for real-time MPSoCs: Scheduling and implementation
Trends in 16-bit architecture
Single fault-tolerant distributed shared memory using competitive update
Introduction to formal methods of software design
Reliability characterization and activity analysis of lowRISC internal modules against single event upsets using fault injection and RTL simulation
A new method for in situ measurement of parameters and degradation processes in modern nanoscale programmable devices
Discrete optimization algorithms (with pascal programs): Maciej M Syslo, Nasingh Deo and Janusz S Kowalik, Prentice-Hall, Englewood Cliffs, NJ, USA (1983) £41.20 pp 542
Optimal geometric algorithms for digitized images on arrays with reconfigurable optical buses
5G-oriented IoT coverage enhancement and physical education resource management
Implementing fast Fourier transforms using the Am29500 family
Safety critical systems - Current issues, techniques and standards: Edited by Felix Redmill and Tom Anderson Chapman & Hall, London, UK (1993) ISBN 412 54820, £29.95, pp 332
Investigating data representation for efficient and reliable Convolutional Neural Networks
Design and modeling of a low-power multi-channel integrated circuit for infrared gas recognition
Portable adapter for barcode scanners
A novel heterogeneous congestion criterion for mesh-based networks-on-chip
A tunable high-performance architecture for enhancement of stream video captured under non-uniform lighting conditions
Improving performance of simultaneous multithreading CPUs using autonomous control of speculative traces
Intelligent facial emotion recognition based on Hybrid whale optimization algorithm and sine cosine algorithm
A CAD system for the construction and VLSI implementation of Cellular Automata algorithms using VHDL
A distributed decomposition policy for computational grid resource allocation optimization based on utility functions
Hardware implementation of neural network with Sigmoidal activation functions using CORDIC
Advanced sensorial system for an acoustic LPS
Recoverable file system for microprocessor systems
The rapid prototyping experience of an H.263 video coder onto FPGA
Families of FPGA-based accelerators for approximate string matching
Energy-aware fault-tolerant network-on-chips for addressing multiple traffic classes
An asynchronous copy-back cache architecture
On the design of reconfigurable multipliers for integer and Galois field multiplication
Disc-based tool helps design patterns that fit exactly: Hallam 'Tesselator' Addison-Wesley Software, Reading, MA, USA (March 1985) £29.95
Simulation and performance evaluation of parallel software on multiprocessor systems
Parallel processing architectures for advanced signal processing
Texts reflect growing interest in CAD for VLSI: Russell, G (ed.)Computer aided tools for VLSI system design Peter Peregrinus, Stevenage, UK (1987) £30.00 pp 192
Real-time Ada applications with silicon executives
British toy and hobby fair: 31 January-4 February, Earls Court, London, UK
Dataflow computation with intelligent memories emulated on field-programmable gate arrays (FPGAs)
Blockchain applications for the Internet of Things: Systematic review and challenges
An effectual classical dance pose estimation and classification system employing Convolution Neural Network -Long ShortTerm Memory (CNN-LSTM) network for video sequences
Advanced microprocessor architectures: Ciminiera, L and Valenzano, A Addison-Wesley, Wokingham, UK (1987) £16.95 pp 476
Low skew clock drivers and their system design considerations
Quality-of-service-aware adaptation scheme for multi-core protocol processing architecture
Efficient FPGA implementation of modular multiplication based on Montgomery algorithm
A router architecture with dual input and dual output channels for Networks-on-Chip
Detection of pH neutralization technique in multiple tanks using ANFIS controller
Research on the intelligent model of progress in physical education training based on motion sensor
Apriori algorithm optimization based on Spark platform under big data
Real time speech recognition algorithm on embedded system based on continuous Markov model
Reliability-conscious energy management for fixed-priority real-time embedded systems with weakly hard QoS-constraint
Support for software engineering using MODULA-2
Enterprise financial risk management platform based on 5 G mobile communication and embedded system
FPGA implementation of feature detection and matching using ORB
Realtime DSP-based system for spectral analysis
Research on programmable controller of construction machinery based on embedded system and cloud computing
Boundary-scan design for cost-sensitive applications
Design of a distributed system architecture including an automatic code generator
Localization of moving edge with sub-pixel accuracy in 1-D images and its FPGA implementation
Ultra-lightweight FPGA-based RC5 designs via data-dependent rotation block optimization
Design of composite data acquisition gateway based on 5G network
A dual-DSP microprocessor system for real-time digital correlation
Text feature extraction based on stacked variational autoencoder
Microprocessor-based signal filters
Introduction to special issue on cyber-physical systems
ARTUS - an open framework for logic synthesis
An efficient trade-off between yield and energy for eDRAM caches under process variations
The ODYSSEY approach to early simulation-based equivalence checking at ESL level using automatically generated executable transaction-level model
RAPROS - A rapid prototyping system and run-time environment for PC-based hardware/software applications
Erratum to "Implementation of MTD-WVD on a TMS320C30 DSP processor": [J. Microprocessors Microsyst. 22 (1998) 1-12]
Long-range dependence and on-chip processor traffic
An effective pre-store/pre-load method exploiting intra-request idle time of NAND flash-based storage devices
Virtual-Cache: A cache-line borrowing technique for efficient GPU cache architectures
Big data simulation for financial risk assessment of real estate bubble based on embedded system and artificial intelligence algorithm
LCA video controller design from OrCAD schematic design tool
Euromicro '86
Simple multiplexed interface for the MC6809 and the 146818 RTC
High performance parallel-DSP computing in model-based spectral estimation
6802/6808 emulation for the HP 64000 microprocessor development system
Cross-layer analysis of software fault models and countermeasures against hardware fault attacks in a RISC-V processor
Modeling & analysis of an LTE-Advanced receiver using mode-controlled dataflow
Application performance prediction method based on cross-core performance interference on multi-core processor
Partial product addition in Vedic design-ripple carry adder design fir filter architecture for electro cardiogram (ECG) signal de-noising application
Low-area architecture design of multi-mode activation functions with controllable maximum absolute error for neural network applications
A practical automated timing and physical design implementation methodology for the synchronous asynchronous interface and multi-voltage domain in high-speed synthesis
Programming in PASCAL: P Grogono, Addison-Wesley (1978 - revised 1980) 373 pp, £5.95
Construction of an inexpensive and flexible multiprocessor system
Automatic fault localization at chip level
Strategy of library information resource construction based on FPGA and embedded system
Leakage reduction in dual mode logic through gated leakage transistors
Embedded medical big data network and nursing intervention of aspiration pneumonia
VLSI-DSP based real time solution of DSC-SRI for an ultrasound system
Design and testing of a PI controller ASIC
Design and Implementation of Novel BRISI Lightweight Cipher for Resource Constrained Devices
An FPGA multiprocessor architecture for Bayesian online change point detection using stochastic computation
Automatic diagnosis of skin diseases using convolution neural network
Combined access control model embedding configurable policy for fine-grained data security
Optimizing spectral efficiency based on poisson queuing model for procuring cognitive intelligence in vehicular communication
Exploring cache performance in multithreaded processors