yusuke1997/dblp-id-title huggingface dataset:
On the effect of inexact size information in size based policies
The price of tussles: bankrupt in cyberspace?
Turning Quantum Noise on its Head: Using the Noise for Diffusion Models to Generate Images
Farout vertices in weighted repeated configuration model
On the performance of D-redundant storage systems
On homogeneity in M/G/1 queueing systems
Nassi-Shneiderman charts an alternative to flowcharts for design
A practical application of memory interference models
Extensions and Computational Aspects of an Iterative Method
Load-side Frequency Regulation with Limited Control Coverage
Ranking configuration parameters in multi-tiered e-commerce sites
Robust fake-post detection against real-coloring adversaries
Stochastic Matching Networks: Theory and Applications to Matching Platforms
TPC Releases Latest Database Performance Results
Performance evaluation and prediction of storage hierarchies
Anticipating Requests to Improve Performance and Reduce Costs in Cloud Storage
Survivability analysis of power distribution in smart grids with active and reactive power modeling
On Min-Max Optimization Over Large Data Sets
Accurate Area, Time and Power Models for FPGA-Based Implementations
Stable Fuzzy State Space Controller for Lateral Control of an AGV
Design of a Low-Complexity Real-Time Arrhythmia Detection System
Adaptive Grid Generation Based Non-rigid Image Registration using Mutual Information for Breast MRI
A systolic array for pyramidal algorithms
A Pipeline Architecture for Processing of DNA Microarrays Images
Monte Carlo Bayesian Signal Processing for Wireless Communications
Context Effect in the Categorical Perception of Mandarin Tones
Implementation of a Moving Target Tracking Algorithm Using Eye-RIS Vision System on a Mobile Robot
High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation
A Space-Time Representation Method of Iterative Algorithms for the Design of Processor Arrays
Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Re-configurable Encoding
Efficient Multi-Resolution Multi-Stream Video Systems with Standard Codecs
On Bandwidth Selection in Local Polynomial Regression Analysis and Its Application to Multi-resolution Analysis of Non-uniform Data
VHDL-based rapid system prototyping
Energy-Aware Loop Scheduling and Assignment for Multi-Core, Multi-Functional-Unit Architecture
Power and Substrate Noise Tolerance of Configurable Embedded Memories in SoC
Information Regularized Sensor Fusion: Application to Localization With Distributed Motion Sensors
Software synthesis for DSP using ptolemy
An Area-Efficient Design of Variable-Length Fast Fourier Transform Processor
Fast and Flexible Software Polar List Decoders
A Hybrid Object-Oriented Very Low Bit Rate Video Codec
SECURE-GEGELATI Always-On Intrusion Detection through GEGELATI Lightweight Tangled Program Graphs
An integrated automatic design system for complex DSP algorithms
Parallelizing Multimodal Background Modeling on a Low-Power Integrated GPU
Power Signature Watermarking of IP Cores for FPGAs
Scalable Parallel Memory Architectures for Video Coding
High speed merged array multiplication
New Algorithms for the Estimation of Two-Dimensional Cyclic Spectral Information Based on Tensor Equations
Robust Periocular Recognition by Fusing Sparse Representations of Color and Geometry Information
A Case Study for the Application of Deterministic and Stochastic Petri Nets in the SoC Communication Domain
Low Power Complexity-Reduced ME and Interpolation Algorithms for H.264/AVC
Bio-Inspired Crossover Cosine Swarm Optimization Algorithm Based Task Scheduling for Quality of Service Improvement Under Cloud Environment
CORDIC-Based VLSI Architectures of Running DFT with Refreshing Mechanism
Mitigation of 2D-ICI in Flash Memory Using Hierarchical Constrained Codes
Design of a low power video decompression chip set for portable applications
Design of a Cellular Architecture for Fast Computation of the Skeleton
Bandwidth Optimized and High Performance Interpolation Architecture in Motion Compensation for H.264/AVC HDTV Decoder
Buffered Clock Tree Synthesis with Non-Zero Clock Skew Scheduling for Increased Tolerance to Process Parameter Variations
The Flagged Prefix Adder and its Applications in Integer Arithmetic
Watch Out: Embedded Video Tracking with BST for Unmanned Aerial Vehicles
A New Robust Scale-Aware Weighting-Based Effective Edge-Preserving Gradient Domain Guided Image Filter for Single Image Dehazing
Guest Editorial: Evolutionary Advancements in Wireless Software Defined Radio Systems
Non-line of Sight Error Mitigation in Ultra-wideband Ranging Systems Using Biased Kalman Filtering
High Performance Adaptive Fidelity Algorithms for Multi-Modality Optic Nerve Head Image Fusion
Design Trade-offs in Customized On-chip Crossbar Schedulers
A Multistage Architecture for Statistical Inference with Stochastic Signal Acquisition
Implementation of a Multirate Resampler for Multi-carrier Systems on GPUs
Research on Microkernel-based Power Dedicated Secure Operating System
A Novel Circulant Approximation Method for Frequency Domain LMMSE Equalization
Energy-Adaptive Signal Processing Under Renewable Energy
Simultaneous Recognition of Distant-Talking Speech of Multiple Talkers Based on the 3-D N -Best Search Method
Intelligent Machine Learning in Image Authentication
A Dynamically Reconfigurable Dual-Waveform Baseband Modulator for Flexible Wireless Communications
A Practical Parallel Architecture for Stacks Filters
Automatic Detection and Lesion Description in Cerebral Blood Flow and Cerebral Blood Volume Perfusion Maps
On Enhancing SIMD-controlled DSPs for Performing Recursive Filtering
Fast Likelihood Computation in Speech Recognition using Matrices
Accelerating Scalar-Product Based Sequence Alignment using Graphics Processor Units
Design of a Multi-mode Block Adaptive Quantizer for High-Resolution Synthetic Aperture Radar Imaging
Advances in Multimedia Content Analysis and Signal Processing
Spoken Language Understanding of Human-Machine Conversations for Language Learning Applications
M3U: Minimum Mean Minimum Uncertainty Feature Selection for Multiclass Classification
Guest Editorial: Application Specific Processors and Architectures
Analysis and VLSI Realization of a Blind Beamforming Algorithm
A New High Resolution Depth Map Estimation System Using Stereo Vision and Kinect Depth Sensing
Adaptive Clustering and Scheduling for Dynamic Region-based Resource Allocation in V2V Communications
Efficiency Analysis for a Mixed-Signal Focal Plane Processing Architecture
A New Routing Metric for Satisfying Both Energy and Delay Constraints in Wireless Sensor Networks
Application Specific Efficient VLSI Architectures for Orthogonal Single- and Multiwavelet Transforms
Exploiting Semantic and Boundary Information for Stereo Matching
Tailored-to-Fit Bayesian Network Modeling of Expert Diagnostic Knowledge
Converting affine recurrence equations to quasi-uniform recurrence equations
Signal Processing and Data Acquisition for the UNM Fission Spectrometer to Measure Binary Fission Product Mass, Energy, Velocity, Atomic Number, and Gamma Rays, Correlated Particle-By-Particle
Structural Scrambling of Circulant Matrices for Cost-effective Compressive Sensing
Detection of Breast Masses in Mammogram Images Using Growing Neural Gas Algorithm and Ripley's K Function
Guest Editorial: Special Issue on SoC for Multimedia Networking (SiPS 2007)
Digital Median Filters
Embedded Computing for Fluorescence Confocal Endomicroscopy Imaging
Optimal Semi-Partitioned Scheduling in Soft Real-Time Systems
A Multi-Pronged Approach to Improving Semantic Extraction of News Video
Non-Rigid Ultrasound Image Registration Based on Intensity and Local Phase Information
The Advanced Onboard Signal Processor (AOSP)
A New Efficient Block-Matching Algorithm for Motion Estimation
Real-time DSP and FPGA Implementation of Wiener LMS Based Multipath Channel Estimation in 3G CDMA Systems
Hyperspectral Image Completion Via Tensor Factorization with a Bi-regularization Term
Promising Technique of Parameterization For Reconfigurable Radio, the Common Operators Technique: Fundamentals and Examples
IC implementation challenges of a 2.4 GHz wireless LAN chipset
Reducing 3D Fast Wavelet Transform Execution Time Using Blocking and the Streaming SIMD Extensions
Solving Out-of-Order Communication in Kahn Process Networks
An efficient bit-level systolic cell design for finite ring digital signal processing applications
MIMO Detector for LTE/LTE-A Uplink Receiver
Calibrating a Three-Viewpoints Thermal Camera with Few Correspondences
A Privacy Protection Evaluation Mechanism for Dynamic Data Based on Chunk-Confusion
Parallel Memory Architecture for Application-Specific Instruction-Set Processors
The Firefly Algorithm with Gaussian Disturbance and Local Search
PureMIC: A New Audio Dataset for the Classification of Musical Instruments based on Convolutional Neural Networks
A special purpose formal verifier for systolic designs in DSP applications
Object Detection in RGB-D Images via Anchor Box with Multi-Reduced Region Proposal Network and Multi-Pooling
CORDIC-Based Computation of ArcCos
Real Time Computationally Efficient MIMO System Identification Algorithm
Left Ventricle Segmentation Using Model Fitting and Active Surfaces
Architectural strategies for high-throughput applications
Real-Time Tone-Mapping Processor with Integrated Photographic and Gradient Compression using 0.13 μm Technology on an Arm Soc Platform
High-Speed and Low-Power IP for Embedded Block Coding with Optimized Truncation (EBCOT) Sub-Block in JPEG2000 System Implementation
Face Recognition Through Different Facial Expressions
A Flexible, High-Performance FPGA Implementation of a Feed-Forward Equalizer for Optical Interconnects up to 112 Gb/s
A Scale Self-Adaptive Tracking Method Based on Moment Invariants
Static Node Center Opportunistic Coverage and Hexagonal Deployment in Hybrid Crowd Sensing
The PANOPTIC Camera: A Plenoptic Sensor with Real-Time Omnidirectional Capability
Generating High-Performance FPGA Accelerator Designs for Big Data Analytics with Fletcher and Apache Arrow
Distributed Memory Parallel Architecture Based on Modular Linear Arrays for 2-D Separable Transforms Computation
Deca-Rounding Methods for Floating Point Numbers: Error Analysis & Hardware Implementation
An Image Encryption Method Based on a High-performance and Efficient Block Cipher
A Decimal Floating-Point Divider Using Newton-Raphson Iteration
A Novel Image Impulse Noise Removal Algorithm Optimized for Hardware Accelerators
A New Computational Framework for Fast Computation of a Class of Polar Harmonic Transforms
Numerical Accuracy of Fast Fourier Transforms with CORDIC Arithmetic
Adaptive Pixel-wise and Block-wise Stereo Matching in Lighting Condition Changes
Robust Interference Management via Linear Precoding and Linear/Non-Linear Equalization
Automatic Hierarchical Discovery of Quasi-Static Schedules of RVC-CAL Dataflow Programs
Guest Editorial: System-on-a-Chip for Multimedia Systems
Least Squares Based Coupling Cancelation for MLC NAND Flash Memory with a Small Number of Voltage Sensing Operations
On Time Optimal Implementation of Uniform Recurrences onto Array Processors via Quadratic Programming
A Single-Chip MPEG/Audio Decoder LSI Based on a Compact Decoding Algorithm
An Area-Effective Cell-Based Channel Decoder LSI For a Digital Satellite TV Broadcasting
EEG Based Biometric Framework for Automatic Identity Verification
Image Segmentation and Selective Smoothing Based on Variational Framework
Fast VLSI algorithms for division and square root
An Authentication Technique for Image/Legal Document (ATILD)
A Clustering Method Using Hierarchical Self-Organizing Maps
Correction to: Energy Efficient Deep Learning Inference Embedded on FPGA for Sleep Apnea Detection
Architectural Synthesis of Computational Engines for Subband Adaptive Filtering
Mapping of Discrete Cosine Transforms onto Distributed Hardware Architectures
Hill-Climbing, Density-Based Clustering and Equiprobabilistic Topographic Maps
DART: Distributed Particle Filter Algorithm with Resampling Tree for Ultimate Real-Time Capability
Introduction to the Special Issue on Application-Specific Systems, Architectures and Processors
CORDIC-Based VLSI Architecture for Implementing Kaiser-Bessel Window in Real Time Spectral Analysis
Multiuser Detection for Out-of-Cell Cochannel Interference Mitigation in the IS-95 Downlink
Machine Learning Detects Distinct Subtypes of Minimal Cognitive Impairment
A Hierarchical Block-Floating-Point Arithmetic
Feature Fusion Applied to Missing Data ASR with the Combination of Recognizers
The Dynamics of Negative Correlation Learning
Editor's Note: Special Issue on Design and Implementation of Signal Processing Systems
High-bandwidth Address Generation Unit
Pulse-modulated analog neuron circuits
Tokens vs. Signals: On Conformance between Formal Models of Dataflow and Hardware
Hardware/Software Codesign from the RASSP Perspective
Parallel Computation of Adaptive Filtering Algorithms on Multi-Core Systems
A Classifier Chain Algorithm with K -means for Multi-label Classification on Clouds
A CAD environment for Real-time DSP implementations on multiprocessors
A methodology for fast scheduling of partitioned systolic algorithms
Guest Editorial: Special Issue on EUC 2007
Evaluating Denoising Approaches for RGB-Infrared Images: Systematic Review and Comparative Analysis of Traditional Methods and Performance Metrics
Recent VLSI neural networks in Japan
Guest Editorial: Reconfigurable Signal Processing Systems
Reducing Energy of Baseband Processor for IoT Terminals with Long Range Wireless Communications
Deep Learning Accelerator Design for Lens Flare Attenuation using High-Level Synthesis
A New Wavelet-Based Neural Network for Classification of Epileptic-Related States using EEG
Investigation of Acoustic and Visual Features for Frog Call Classification
Guest Editorial: Special Issue on Embedded Machine Learning
Multilevel Residual Motion Compensation for High Efficiency Video Coding
Special Issue on ASAP 2004 Conference
Dynamic Verifiable Encrypted Keyword Search - Using Bitmap Index
On fault tolerant matrix decomposition
Balancing the Role of Priors in Multi-Observer Segmentation Evaluation
Application Domain Specific Embedded FPGAs for Flexible ISA-Extension of ASIPs
A Heterogeneous Multi-Core Based Biomedical Application Processing System and Programming Toolkit
Hypotheses Control-based Strategies for the Development of Near-optimum Bayesian Detectors for CDMA Systems
Bit-Level systolic architectures for high performance IIR filtering
Scalable Architecture for SoC Video Encoders
Analytic and VLSI Specific Design of Robust CNN Templates
Finite Wordlength Analysis and Adaptive Decoding for Turbo/MAP Decoders
Static Compiler Analyses for Application-specific Optimization of Task-Parallel Runtime Systems
Introduction: Special Section on System Level Design
A Zonal Different-Time-Step Algorithm for Multi-Physics Simulation in Closed System
Speech Enhancement Algorithm Combining Cochlear Features and Deep Neural Network with Skip Connections
FPGA architecture of the LDPS Motion Estimation for H.264/AVC Video Coding
Robust Multi-Path Zone Routing Protocol for Video Transport Over Reconfigurable Wireless Networks
Coarse-grained Dynamically Reconfigurable Processor for Vision Pre-Processing
Multidimensional Exploration of Software Implementations for DSP Algorithms
Closed-form mapping conditions for the synthesis of linear processor arrays
Linear pseudosystolic array for partitioned matrix algorithms
Object Oriented Motion-Segmentation for Video-Compression in the CNN-UM
Implementation of W-CDMA Cell Search on a Highly Parallel and Scalable MPSoC
Evaluation of Feature Robustness Against Technical Parameters in CT Radiomics: Verification of Phantom Study with Patient Dataset
Gradient Adaptive Paraunitary Filter Banks for Spatio-Temporal Subspace Analysis and Multichannel Blind Deconvolution
Efficient Generalized Minimum-distance Decoders of Reed-Solomon Codes
3-D Video Generation from Monocular Video Based on Hierarchical Video Segmentation
Robust B-spline Snakes For Ultrasound Image Segmentation
A Parametrizable High-Level Synthesis Library for Accelerating Neural Networks on FPGAs
Reconfigurable Parallel Turbo Decoder Design for Multiple High-Mobility 4G Systems
Fine-tuning-based Transfer Learning for Characterization of Adeno-Associated Virus
Transcoding with Resolution Conversion Using Super-Resolution and Irregular Sampling
Patient Outcome Prediction with Heart Rate Variability and Vital Signs
Evaluation of CORDIC Algorithms for FPGA Design
Adaptive-Hierarchical-Filtering Technique for High-Quality Magazine Image Reproduction
Characterisation of Signal Modality: Exploiting Signal Nonlinearity in Machine Learning and Signal Processing
Cost Optimization of Partial Computation Offloading and Pricing in Vehicular Networks
Novel JPEG 2000 Compliant DWT and IWT VLSI Implementations
Efficient Error Control Decoder Architectures for Noncoherent Random Linear Network Coding
Sparse Hierarchical Interaction Learning with Epigraphical Projection
Correlated Postfiltering and Mutual Information in Pseudoanechoic Model Based Blind Source Separation
Design of New DSP Instructions and Their Hardware Architecture for High-Speed FFT
Decentralized State Initialization with Delay Compensation for Multi-modal Sensor Networks
New DCT Computation Technique Based on Scalable Resources
Reduced Memory and Low Power Architectures for CORDIC-based FFT Processors
Optimal Smoothing of Kernel-Based Topographic Maps with Application to Density-Based Clustering of Shapes
A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform
On a Class of Orthonormal Algorithms for Principal and Minor Subspace Tracking
Design Considerations for Energy-Efficient Radios in Wireless Microsensor Networks
Monitoring the Formation of Kernel-Based Topographic Maps with Application to Hierarchical Clustering of Music Signals
EyeLSD a Robust Approach for Eye Localization and State Detection
Hierarchical Feature Extraction for Image Recognition
Performance of iterative computation in self-timed rings
A Real-Time Video Decoder for Digital HDTV
Revisiting Gist-PCA Hashing for Near Duplicate Image Detection
MPI-HMMER-Boost: Distributed FPGA Acceleration
UltraSynth: Insights of a CGRA Integration into a Control Engineering Environment
Markov Random Fields with Asymmetric Interactions for Modelling Spatial Context in Structured Scene Labelling
Tree-Structured Multiple Description Coding
Speech and Language Processing for Multimodal Human-Computer Interaction
High-level optimizations in compiling process descriptions to asynchronous circuits
Exploring A Trust Based Recommendation Approach for Videos in Online Social Network
Sparse Seam-Carving for Structure Preserving Image Retargeting
Hardware Acceleration of HMMER on FPGAs
Column Access-aware In-stream Data Cache with Stream Processing Framework
A Methodology for Speeding up MVM for Regular, Toeplitz and Bisymmetric Toeplitz Matrices
A sorter-based architecture for a parallel implementation of communication intensive algorithms
Audio-Visual Speaker Recognition for Video Broadcast News
Parallel Gibbs Sampler for Wavelet-Based Bayesian Compressive Sensing with High Reconstruction Accuracy
Efficient Uniform Quantization Likelihood Evaluation for Particle Filters in Embedded Implementations
Budget Restricted Incremental Learning with Pre-Trained Convolutional Neural Networks and Binary Associative Memories
An Integrated Data Preprocessing Framework Based on Apache Spark for Fault Diagnosis of Power Grid Equipment
Hybrid Parrallel Bayesian Network Structure Learning from Massive Data Using MapReduce
Power-effective ROM-less DDFS Design Approach with High SFDR Performance
Cognitive Radio as the Facilitator for Advanced Communications Electronic Warfare Solutions
A New Neural Beamformer for Multi-channel Speech Separation
An OOK Body-Channel Transceiver Front-End ASIC for Distributed Force Measurement
Embedded Real-Time H264/AVC High Definition Video Encoder on TI's KeyStone Multicore DSP
Cross-Layer Energy-Efficiency Optimization of Packet Based Wireless MIMO Communication Systems
Improving Pronunciation Erroneous Tendency Detection with Multi-Model Soft Targets
Unsupervised Segmentation of Stereoscopic Video Objects: Constrained Segmentation Fusion Versus Greedy Active Contours
Fingerprinting IIoT Devices Through Machine Learning Techniques
Finding the Next Computational Model: Experience with the UCSC Kestrel
2D Hand Detection Using Multi-Feature Skin Model Supervised Cascaded CNN
System-Level Energy-Delay Exploration for Multimedia Applications on Embedded Cores with Hardware Cache
Energy Efficient Memory Architecture for High Speed Decoding of Block Turbo-Codes with the Fang-Buda Algorithm
Adaptable, Fast, Area-Efficient Architecture for Logarithm Approximation with Arbitrary Accuracy on FPGA
Exploration of Soft-Output MIMO Detector Implementations on Massive Parallel Processors
Assessing the Number of Components in Finite Gaussian Mixtures by Generalised Fisher Ratio, Normalised Entropy Criterion and Functional Merging
A Parallel Implementation of Extensive Cancellation Algorithm (ECA) for Passive Bistatic Radar (PBR) on a GPU
Pareto-Optimal Methods for Gene Ranking
Extracting Behavioral Data from Physical Descriptions of MEMS for Simulation
Dynamic Frequency-Band Reallocation and Allocation: from Satellite-Based Communication Systems to Cognitive Radios
A new design for a lookahead carry generator
A Selectable Discrete-Voltage Output and Fast-Settling Low-Dropout Regulator Using Half Digitally-Assistant Voltage Accelerator
Automatic CNN Model Partitioning for GPU/FPGA-based Embedded Heterogeneous Accelerators using Geometric Programming
Cloud-Based Adaptive Particle Swarm Optimization for Waveband Selection in Big Data
Dynamic Spectrum Access is the Solution: What's the Problem?
Complexity Reduction in Intra Prediction of HEVC Using a Modified Convolutional Neural Network Model Incorporating Depth Map and RGB Texture
Attacks on Recent RFID Authentication Protocols
Application of Artificial Neural Networks to Medical Image Pattern Recognition: Detection of Clustered Microcalcifications on Mammograms and Lung Cancer on Chest Radiographs
FPGA Implementation of Carrier Synchronization for QAM Receivers
Stochastic Power Saving for Macrocell-Assisted Small Cell Networks
Energy Efficiency Optimization for Communication of Air-Based Information Network with Guaranteed Timing Constraints
LEDA-Localized-EEG Dynamics Analyzer: a MATLAB-Based Innovative Toolbox for Analysis of EEG Source Dynamics
Low Complexity Decoder Architecture for Low-Density Parity-Check Codes
A Novel Brain Tumor Segmentation from Multi-Modality MRI via A Level-Set-Based Model
Hidden Markov Model Inversion for Audio-to-Visual Conversion in an MPEG-4 Facial Animation System
Energy and Cache Aware Routing for Socially Aware Networking in the Big Data Environment
Introduction to the Special Issue on SAMOS 2007
An Adaptable and Scalable Generator of Distributed Massive MIMO Baseband Processing Systems
Study of Algorithmic and Architectural Characteristics of Gaussian Particle Filters
Synthesizing Hardware from Dataflow Programs - An MPEG-4 Simple Profile Decoder Case Study
Architecture of a Memory Manager for an MPEG-2 Video Decoding Circuit
Multimedia Execution Hardware Accelerator
Scheduling synchronous dataflow graphs for efficient looping
Real-Time Depth Image Acquisition and Restoration for Image Based Rendering and Processing Systems
Resource-Constrained and Socially Selfish-Based Incentive Algorithm for Socially Aware Networks
A Service Pricing-based Two-Stage Incentive Algorithm for Socially Aware Networks
Using Data Contention in Dual-ported Memories for Security Applications
GMM Based Adaptive Thresholding for Uneven Lighting Image Binarization
A Novel Approach for Target Detection and Classification Using Canonical Correlation Analysis
Sign Bit Reduction Encoding For Low Power Applications
Neural Network Normalization (N3) to Uncover the Differential Signal of cDNA Microarrays
Robust and Recovery Watermarking Approach Based on SVD and OTP Encryption
Gate array implementation of on-line algorithms for floating-point operations