yusuke1997/dblp-id-title huggingface dataset:
Memristor-Based Spectral Decomposition of Matrices and Its Applications
Fast OFFD-Based Minimization of Fixed Polarity Reed-Muller Expressions
B73-2 Approximate Calculation of Multiple Integrals
Partial-Sum Queries in OLAP Data Cubes Using Covering Codes
Polynomial Computation Using Unipolar Stochastic Logic and Correlation Technique
The Development of a Bubble Memory Controller for Low-Cost File Use
A Synchronous Approach for IEC 61499 Function Block Implementation
Dynamic Resource Allocation for MapReduce with Partitioning Skew
Performance Impact of Coarse Timer Granularities on QoS Guarantees in Unix-Based Systems
A Validation Technique for Tightly Coupled Protocols
Demand Assignment Multiple Access Schemes in Broadcast Bus Local Area Networks
Performance Analysis of Buffering Schemes on Wormhole Routers
Radix Conversion in a Hexadecimal Machine
Design and Implementation of a Log-Structured File System for Flash-Based Solid State Drives
Enabling Coverage-Preserving Scheduling in Wireless Sensor Networks for Structural Health Monitoring
Adoption of the Octal Number System
Bank-Group Level Parallelism
Multiserver Queueing Models of Multiprocessing Systems
Hamiltonian Cycles in the Shuffle-Exchange Network
The Serial Solution of the Diffusion Equation Using Nonstandard Hybrid Techniques
An Alternative to Scan Design Methods for Sequential Machines
Evaluation of Associative Memory Using Parallel Chained Hashing
Acceleration of Nonnumeric Operations Using Hardware Support for the Ordered Table Hashing Algorithms
The Convergence-Guaranteed Random Walk and Its Applications in Peer-to-Peer Networks
Channel Occupancy Times and Handoff Rate for Mobile Computing and PCS Networks
Experiments on Models of Computations and Systems
On Job Assignment for a Parallel System of Processor Sharing Queues
Nonbinary Arithmetic AN Codes Using Odd Radix Expressions
A New Approach for the Performance Analysis of a Single-Bus Multiprocessor System with General Service Times
Optimal Selective Huffman Coding for Test-Data Compression
An Instruction Issuing Approach to Enhancing Performance in Multiple Functional Unit Processors
Logical Computation on Stochastic Bit Streams with Linear Finite-State Machines
On a Lightwave Network Topology Using Kauts Digraphs
Image Data Processing by Hadamard-Haar Transform
Toward Formal Design of Practical Cryptographic Hardware Based on Galois Field Arithmetic
Pattern Classification by Iteratively Determined Linear and Piecewise Linear Discriminant Functions
Residue Number Scaling and Other Operations Using ROM Arrays
A Matroid-Theoretic Solution to an Assignment Problem in the Conformance Testing of Communication Protocols
Finite Field Fault-Tolerant Digital Filtering Architectures
B74-46 Pattern Recognition, Learning and Thought
The Repetitive Turn Model for Adaptive Routing
Majority-Logic Synthesis
Measuring the Parallelism Available for Very Long Instruction Word Architectures
Market-Based Resource Allocation for Content Delivery in the Internet
Synchronization and Voting
Speed-Efficiency-Complexity Tradeoffs in Universal Diagnosis Algorithms
Finding Picture Edges Through Collinearity of Feature Points
Further Comments on the N-tuple Pattern Recognition Method
CRIME: Input-Dependent Collaborative Inference for Recurrent Neural Networks
Proposals for Ordered Sequential Detection of Simultaneous Multiple Responses
Comparison of Hybrid Minimum Laxity/First-In-First-Out Scheduling Policies for Real-Time Multiprocessors
An Optimal Graph-Construction Approach to Placing Program Signatures for Signature Monitoring
On Synthesizing a Consistent Operational Transformation Approach
Redundant CORDIC Methods with a Constant Scale Factor for Sine and Cosine Computation
Formal Verification of Simulation Traces Using Computation Slicing
Identification of Disjunctively Decomposable Logic Functions Employing a Karnaugh Map
Sequencing Tasks to Minimize the Effects of Near-Coincident Faults in TMR Controller Computers
A Note on the Problem of Classifying Vertices of the n Cube into m Categories
CARM: CUDA-Accelerated RNS Multiplication in Word-Wise Homomorphic Encryption Schemes for Internet of Things
kth-Order Finite Automaton
Simultaneous and Speculative Thread Migration for Improving Energy Efficiency of Heterogeneous Core Architectures
An Intersection Algorithm Giving All Irredundant Normal Forms from a Prime Implicant List
New Results for Rado's Sigma Function for Binary Turing Machines
Strongly fault secure PLAs and totally self-checking checkers
ImPACT: Importance-Informed Prefetching and Caching for I/O-Bound DNN Training
NoSPF: Non-Stationary Long-Term Power Consumption Forecasting for Servers in Cloud Data Centers
Kahan's Algorithm for a Correct Discriminant Computation at Last Formally Proven
Convolutional Transformations of Binary Sequences: Boolean Functions and Their Resynchronizing Properties
Weight-Aware Cache for Application-Level Proportional I/O Sharing
Nonlinear Termination of Transmission Lines
Effective Lifetime-Aware Dynamic Throttling for NAND Flash-Based SSDs
Discrete Cosine Transform
A Method for Resolving Multiple Responses in a Parallel Search File
Realization of Nonlinearly Separable Switching Functions
Compiler-Directed Energy Reduction Using Dynamic Voltage Scaling and Voltage Islands for Embedded Systems
Multiple Output Optimization with Mosaics of Boolean Functions
PRIMER: Profiling Interrupts Using Electromagnetic Side-Channel for Embedded Devices
An Optimal Drum Scheduling Algorithm
Testing for Single Intermittent Failures in Combinational Circuits by Maximizing the Probability of Fault Detection
Signed-Digit Division Using Combinational Arithmetic Nets
Synchronous Bandwidth Allocation for Real-Time Communications with the Timed-Token MAC Protocol
Block-Wise Computation of Cyclic Redundancy Code Using Factored Toeplitz Matricesin Lieu of Look-Up Table
Unidirectional Byte Error Detecting Codes for Computer Memory Systems
Dynamic Testing Strategy for Distributed Systems
PICCOLO Logic for a Picture Database Computer and Its Implementation
Data Manipulating Functions in Parallel Processors and Their Implementations
Systolic Multipliers for Finite Fields GF (2 m )
Performance and Architectural Issues for String Matching
Towards Data-Independent Knowledge Transfer in Model-Heterogeneous Federated Learning
A Clustered Failure Model for the Memory Array Reconfiguration Problem
Single Byte Error Correcting - Double Byte Error Detecting Codes for Memory Systems
Reviewing High-Radix Signed-Digit Adders
COMeT+: Continuous Online Memory Testing with Multi-Threading Extension
A Parallel Architecture for Digital Filtering Using Fermat Number Transforms
Assignment of Task Modules in Hypercube Multicomputers with Component Failures for Communication Efficiency
Deterministic Division Algorithm in a Negative Base
Combining Trace Sampling with Single Pass Methods for Efficient Cache Simulation
Merged Switch Allocation and Traversal in Network-on-Chip Switches
Transformation of Switching Functions to Completely Symmetric Switching Functions
Packet-Mode Emulation of Output-Queued Switches
Systolic Algorithms for Local Operations on Images
Towards Complete and Scalable Emulation of Quantum Algorithms on High-Performance Reconfigurable Computers
A Hybrid Algorithm of Backward Hashing and Automaton Tracking for Virus Scanning
Solving the Group Priority Inversion Problem in a Timed Asynchronous System
The Nebula Benchmark Suite: Implications of Lightweight Neural Networks
Zero Knowledge Grouping Proof Protocol for RFID EPC C1G2 Tags
A Method for Obtaining SPOOF's
Efficient Techniques for the Analysis of Algorithm-Based Fault Tolerance (ABFT) Schemes
A Note on Minimal Reed-Muller Canonical Forms of Switching Functions
Arithmetic Specification for Scientific Computation in ADA
Cryptanalysis if a Diophantine Equation Oriented Public Key Cryptosystem
Automatic Generation of Texture Feature Detectors
An Electronic Analog Computing Technique for the Solution of Trigonometric Problems
TightLLM: Maximizing Throughput for LLM Inference via Adaptive Offloading Policy
A Synthesis Technique for Binary Input-Binary Output Synchronous Sequential Moore Machines
Nest: A Nested-Predicate Scheme for Fault Tolerance
An Efficient Data-Distribution Mechanism in a Processor-In-Memory (PIM) Architecture Applied to Motion Estimation
High Speed Binary Parallel Adder
A Theory of Asynchronous Control Networks
Spectral Effects in the Use of Newton - Cotes Approximations for Computing Discrete Fourier Transforms
Author's Reply 5
A Novel CONV Acceleration Strategy Based on Logical PE Set Segmentation for Row Stationary Dataflow
Optimization by Random Search on the Analog Computer
Analysis of the Signal Reliability Measure and an Evaluation Procedure
An Online Mechanism for BGP Instability Detection and Analysis
An Application-Level Data Transparent Authentication Scheme without Communication Overhead
Module Clustering to Minimize Delay in Digital Networks
NextCell: Predicting Location Using Social Interplay from Cell Phone Traces
LSI Logic Testing - An Overview
An Integral-Error-Squared Method for Evaluating Analog Computer Components
R70-18 Real-Time Computation by n-Dimensional Iterative Arrays of Finite-State Machines
Flash-Aware RAID Techniques for Dependable and High-Performance Flash Memory SSD
Managing Locality Sets: The Model and Fixed-Size Buffers
Arithmetic Codes in Residue Number Systems with Magnitude Index
Proactive Data Migration for Improved Storage Availability in Large-Scale Data Centers
A Hierarchical Test Generation Approach for Large Controllers
Forward and Inverse Transformations Between Haar Spectra and Ordered Binary Decision Diagrams of Boolean Functions
Verifiable Auditing for Outsourced Database in Cloud Computing
Representation of Nonlinear Data Surfaces
An Effective BIST Scheme for ROM's
High-Radix/Mixed-Radix NTT Multiplication Algorithm/Architecture Co-Design Over Fermat Modulus
Texture Measures for Automatic Classification of Pulmonary Disease
Addendum to "Optimum Golomb Rulers"
Binary Routing Networks
On the Complexity of Removing Z-Cycles from a Checkpoints and Communication Pattern
Unateness Properties of and-Exclusive-or Logic Circuits
On the Linearity of Autonomous Sequential Machines
An Approach to Single-Threshold-Element Synthesis
Expected Capacity of (m over 2)-Networks
Ordered Binary Decision Diagrams and Minimal Trellises
On Data Compatibility and Broadcast Stream Formation
Application-Adaptive Guardbanding to Mitigate Static and Dynamic Variability
A Technique for Achieving High Bit Packing Density on Magnetic Tape
Cutting Metastability Using Aperture Transformation
Bufferless Network-on-Chips With Bridged Multiple Subnetworks for Deflection Reduction and Energy Savings
Learning-Based Application-Agnostic 3D NoC Design for Heterogeneous Manycore Systems
A Comparison of Some Theoretical Models of Parallel Computation
System Effectiveness as a Generalization of System Availability
The Generation of Completion Signals in Iterative Combinational Circuits
A Characterization of Binary Decision Diagrams
RIDDLE: A Foundation for Test Generation on a High-Level Design Description
Leaking Information Through Cache LRU States in Commercial Processors and Secure Caches
A Gracefully Degradable VLSI System for Linear Programming
RISC-V Galois Field ISA Extension for Non-Binary Error-Correction Codes and Classical and Post-Quantum Cryptography
Analysis of Parallel Systems
Elevator-First: A Deadlock-Free Distributed Routing Algorithm for Vertically Partially Connected 3D-NoCs
The Isomorphism of Simple File Allocation
Hardware Support for Flexible Distributed Shared Memory
On the Fractal Dimension of Computer Programs and its Application to the Prediction of the Cache Miss Ratio
Further Results on the N-tuple Pattern Recognition Method
SEC-BED-DED Codes for Error Control in Byte-Organized Memory Systems
Polynomially Complete Fault Detection Problems
Mathematical "Lower Bounds" and the Logic Circuit Designer
Modeling Data Reuse in Deep Neural Networks by Taking Data-Types into Cognizance
The Telephone Coordination Game Revisited: From Random to Deterministic Algorithms
A Unified Prediction Method for Predicting Program Behavior
High-Speed Parallel Decimal Multiplication with Redundant Internal Encodings
The Via Minimization Problem is NP-Complete
A Ladder-Structured Decision Tree for Recognizing Tumors in Chest Radiographs
Online Service Function Chain Placement for Cost-Effectiveness and Network Congestion Control
A New Federated Scheduling Algorithm for Arbitrary-Deadline DAG Tasks
DedupHR: Exploiting Content Locality to Alleviate Read/Write Interference in Deduplication-Based Flash Storage
Author's Reply 3
A Theory of Adaptive Pattern Classifiers
Metastability in Asynchronous Wait-Free Protocols
Transfer Function Compensation of Sampled Imagery
Design and Realization of a Two-Level 64K Byte CCD Memory System for Microcomputer Applications
Inference of Sequential Machines from Sample Computations
A Unified Negative-Binomial Distribution for Yield Analysis of Defect-Tolerant Circuits
Exact Product Form Solution for Queueing Networks with Blocking
Lightweight Error Correction Coding for System-Level Interconnects
Comments on the Decoding Algorithms of DBEC-TBED Reed-Solomon Codes
A Simple Hardware Buddy System Memory Allocator
Reordering and Compression for Hypergraph Processing
Partitioning of Separating Edges: A New Approach to Combinational Logic Design
High Bandwidth On-Chip Cache Design
Efficient Computation of the Maximum of the Sum of Two Sequences and Applications
Request Resubmission in a Blocking, Circuit-Switched, Interconnection Network
Efficient 2D Multibit Tries for Packet Classification
Efficient Memory Arbitration in High-Level Synthesis From Multi-Threaded Code
Methodology for Cycle-Accurate DRAM Performance Analysis
Cantor versus Harley: Optimization and Analysis of Explicit Formulae for Hyperelliptic Curve Cryptosystems
Iteration Properties of Multivalued Switching Functions
Analysis of One-Dimensional Linear Hybrid Cellular Automata over GF(q)
Boolean Difference for Fault Detection in Asynchronous Sequential Machines
Optimised Multiplication Architectures for Accelerating Fully Homomorphic Encryption
Error-Correcting Codes for Byte-Organized Arithmetic Processors
Reliability Models for Fault-Tolerant Private Network Applications
An Improved Method of Angle Detection on Digital Curves
Mixed Memory Type Realizations of Sequential Machines
An Easily Controlled Network for Frequently Used Permutation
GenoDedup: Similarity-Based Deduplication and Delta-Encoding for Genome Sequencing Data
An Integrated FPGA Accelerator for Deep Learning-Based 2D/3D Path Planning
Integrated Approach to Data Center Power Management
A Suggestion for a Fast Multiplier
A Comparison of VLSI Architecture of Finite Field Multipliers Using Dual, Normal, or Standard Bases
A Fail-Safe Asynchronous Sequential Machine
The Range of Logical Flexibility of Tree Networks
Reply to Comments on "Theory and Application of Cellular Automata in Cryptography"
Using Virtual Secure Circuit to Protect Embedded Software from Side-Channel Attacks
Reliability of an Air Defense Computing System: Circuit Design
Matrix-Stripe-Cache-Based Contiguity Transform for Fragmented Writes in RAID-5
Topological Via Minimization Revisited
Interconnections Between Processors and Memory Modules Using the Shuffle-Exchange Network
Optimum Golomb Rulers
Markovs Models for Multiple Bus Multiprocessor Systems
Feasibility of Embedded DRAM Cells on FinFET Technology
Conceptual Representation of Waveforms for Temporal Reasoning
Comment on "Serial Binary-to-Decimal and Decimal-to-Binary Conversion"
Importance Sampling for Ising Computers Using One-Dimensional Cellular Automata
An Algorithm-Based Error Detection Scheme for the Multigrid Method
A Simple Test for Linear Separability
ONR Symposium on Microwave Techniques for Computing Systems
Properties of the Miss Ratio for a 2-Level Storage Model with LRU or FIFO Replacement Strategy and Independent References
A Generalized Method for Constructing Subquadratic Complexity GF(2^k) Multipliers
High-Density Binary Recording Using Nonsaturation Techniques
Two-Version Based Concurrency Control and Recovery in Real-Time Client/Server Databases
Pipelined All-to-All Broadcast in All-Port Meshes and Tori
On Dependence and Discrimination in Pattern Recognition
CoPTUA: Consistent Policy Table Update Algorithm for TCAM without Locking
Suggestion for a New Representation for Binary Function
Tiered Memory: An Iso-Power Memory Architecture to Address the Memory Power Wall
Arithmetic Spectrum Applied to Fault Detection for Combinational Networks
An Easy-to-Use Approach for Practical Bus-Based System Design
Multievent Crisis Management Using Noncooperative Multistep Games
Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations
Token Systems that Self-Stabilize
3D NoC with Inductive-Coupling Links for Building-Block SiPs
The Use of a Repetitive Differential Analyzer for Finding Roots of Polynomial Equations
Stochastic Syntax-Directed Translation Schemata for Correction of Errors in Context-Free Languages
RB-Explorer: An Accurate and Practical Approach to Write Amplification Measurement for SSDs
The KYKLOS Multicomputer Network: Interconnection Strategies, Properties, and Applications
Design of HM 2 p - A Hierarchical Multimicroprocessor for General Purpose Applications
A Fault-Tolerant Communication Scheme for Hypercube Computers
Reducing the Number of Sequential Diagnosis Iterations in Hypercubes
Thermal Elasticity-Aware Host Resource Provision for Carbon Efficiency on Virtualized Servers
An Efficient Hybrid Peer-to-Peer System for Distributed Data Sharing
adBoost: Thermal Aware Performance Boosting Through Dark Silicon Patterning
Efficient Cache Designs for Probabilistically Analysable Real-Time Systems
Non-Binary Orthogonal Latin Square Codes for a Multilevel Phase Charge Memory (PCM)
FPU Implementations with Denormalized Numbers
An Analysis of Certain Errors in Electronic Differential Analyzers II-Capacitor Dielectric Absorption
Analysis and Modeling of Correlated Failures in Multicomputer Systems
Modeling Value Speculation: An Optimal Edge Selection Problem
A Functional Testing Method for Microprocessors
Decomposition of Asynchronous Sequential Switching Circuits
A Hard Progammable Control Unit Design Using VLSI Technology
Modeling and Test Generation Algorithms for MOS Circuits
Extending Unix Pipelines to DAGs
Adaptive-Acceleration Data Center TCP
Dynamic Task-Level Voltage Scheduling Optimizations
TurboDL: Improving the CNN Training on GPU With Fine-Grained Multi-Streaming Scheduling
Discrete Interval Truth Values Logic and Its Application
A Basic Theorem on Threshold Devices
A Data-Storage Format for Information System Files
On the Floating Point Representation of Complex Numbers
Fail-Safe Interfaces for VLSI: Theoretical Foundations and Implementation
Realizing Fault-Tolerant Interconnection Networks via Chaining
Parallel Quicksort Using Fetch-and-Add
Predicting Defect-Tolerant Yield in the Embedded Core Context
Almost Sure Diagnosis of Almost Every Good Element
A Positive Acknowledgment Protocol for Causal Broadcasting
Guest Editors' Introduction: Special Section on System-Level Design of Reliable Architectures
A Method for the Correction of Garbled Words Based on the Levenshtein Metric
A Precision Amplitude-Distribution Amplifier
Detection of Step Edges in Noisy One-Dimensional Data
Revisiting Higher-Order Masked Comparison for Lattice-Based Cryptography: Algorithms and Bit-Sliced Implementations
The Möbius Cubes
Diagnosing Single Faults in Fanout-Free Combinational Circuits
A Unified Framework for the Performability Evaluation of Fault-Tolerant Computer Systems
A Stochastic Time-Domain Model for Burst Data Aggregation in IEEE 802.15.4 Wireless Sensor Networks
On Fault Isolation and Identification in t 1 /t 1 -Diagnosable Systems
A Comprehensive Reconfiguration Scheme for Fault-Tolerant VLSI/WSI Array Processors
A Novel Design Methodology for Implementing Reliability-Aware Systems on SRAM-Based FPGAs
Low-Power Multiplier Designs by Leveraging Correlations of 2$\times$×2 Encoded Partial Products
A Faster 8-Bit Carry Circuit
ElasticEC: Achieving Fast and Elastic Redundancy Transitioning in Erasure-Coded Clusters
3RSeT: Read Disturbance Rate Reduction in STT-MRAM Caches by Selective Tag Comparison
Efficient Montgomery-Based Semi-Systolic Multiplier for Even-Type GNB of GF(2^m)
Programmed Logic Array Optimization
Design of Optimal Switching Networks by Integer Programming
The VLSI Implementation of a Reed-Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm
A Parallel-Pipeline Architecutre of the Fast Polynomial Transform for Computing a Two-Dimensional Cyclic Convolution
Use of a Digital Convolution Device to Perform Recursive Filtering and the Cooley-Tukey Algorithm
Scheduling Distributed Real-Time Tasks with Minimum Jitter
B72-9 Compiler Construction for Digital Computers
Comments on "Five, Six, and Seven-Term Karatsuba-Like Formulae'
A Novel Implementation of CORDIC Algorithm Using Backward Angle Recoding (BAR)
Optimal Partitioning and Redundancy Removal in Computing Partial Sums
Optimal Sorting Algorithms for Parallel Computers
Distributed Algorithms for Network Recognition Problems
The Linear Transformer Tree
Asynchronous Scheduling of Redundant Disk Arrays
Comments on "Distributed Algorithms for Network Recognition Problems"
Speculative Computation, Parallelism, and Functional Programming
Hardware Support for Concurrent Detection of Multiple Concurrency Bugs on Fused CPU-GPU Architectures
Instruction Sequence Identification and Disassembly Using Power Supply Side-Channel Analysis
On a New Boolean Function with Applications
System Application of Hybrid Logic Circuitry
Floating-Point Multiply-Add-Fused with Reduced Latency
Recursion and Testing of Combinational Circuits
A Layout for the Shuffle-Exchange Network with O(N 2 / log 3/2 N ) Area
P -Functions: A New Tool for the Analysis and Synthesis of Binary Programs
Arithmetic Considerations for Isogeny-Based Cryptography
A Class of Code Compression Schemes for Reducing Power Consumption in Embedded Microprocessor Systems
A Note on Diagnosability of Large Fault Sets on Star Graphs
R70-37 Extensions of Asynchronous Circuits and the Delay Problem I. Good Extensions and the Delay Problem of the First Kind
Pseudorandom Arrays for Built-In Tests
An Algorithmic Approach to Conditional-Fault Local Diagnosis of Regular Multiprocessor Interconnected Systems under the PMC Model
Architecture Support for Task Out-of-Order Execution in MPSoCs
Computational Chains and the Simplification of Computer Programs
Efficient VLSI Parallel Algorithm for Delaunay Triangulation on Orthogonal Tree Network in Two and Three Dimensions
The Use of Floating-Point and Interval Arithmetic in the Computation of Error Bounds
Constructing High Radix Quotient Digit Selection Tables for SRT Division and Square Root
An Approach to the Diagnosis of Intermittent Faults
Methods for Automated Theorem Proving in Nonclassical Logics
A Glass Delay Line Content-Addressed Memory System
Schedulability and Performance Analysis of the Similarity Stack Protocol
Hardware Accelerated Vision Transformer via Heterogeneous Architecture Design and Adaptive Dataflow Mapping
Iterative Algorithm and Architecture for Exponential, Logarithm, Powering, and Root Extraction
A Highly Parallel Algorithm for Root Extraction
On Finding Feasible Solutions for the Delay Constrained Group Multicast Routing Problem
Selective I/O Bypass and Load Balancing Method for Write-Through SSD Caching in Big Data Analytics
Embedding Graphs onto the Supercube
Miss Rate Prediction Across Program Inputs and Cache Configurations
Threshold Realization of Arithmetic Circuits
Esaki Diode High-Speed Logical Circuits
DPPC-RE: TCAM-Based Distributed Parallel Packet Classification with Range Encoding
Automatic Testing for the Correctness and Equivalence of Loopfree Microprograms
Embedding Cube-Connected Cycles Graphs into Faulty Hypercubes
Semiconcurrent Error Detection in Data Paths
Notes on the Arithmetic BN Modulo A Codes
The Necessity of Closed Circuit Loops in Minimal Combinational Circuits
EVENODD: An Efficient Scheme for Tolerating Double Disk Failures in RAID Architectures
A Polynomial Counter