yusuke1997/dblp-id-title huggingface dataset:
Triplicated microprocessor controlled automatic shutdown system
OFDM-based electrical impedance spectroscopy technique for pacemaker-induced fibrosis detection implemented in an ARM microprocessor
A recommendation method of Japanese vocabulary learning based on embedded system and data intelligent analysis
Binary Galois field extensions dependent multimedia data security scheme
Features of high-level languages for microprocessors
FPGA implementation of IFFT architecture with enhanced pruning algorithm for low power application
Formula-based abstractions and symbolic execution for model checking programs
A fault-tolerant multi-transputer architecture
Dynamic image sampling and swimming motion image recognition in immersive virtual reality
Alternative approach to a microprocessor teaching laboratory
Evolution in dynamic architectures
A quantitative analysis of the benefits of the use of area-I/O pads in FPGAs
Understanding multidimensional verification: Where functional meets non-functional
Embedded web system and expression of vascular endothelial growth factor in children with acute leukemia
Low-cost high-integrity loop communication systems
Writable control store
Coherence based dual microphone speech enhancement technique using FPGA
Odd/Even Invert coding for phase change memory with thermal crosstalk
Controlling a complete hardware synthesis toolchain with LARA aspects
Reconfigurable system for high-speed and diversified AES using FPGA
LL-MAC: A low latency MAC protocol for wireless self-organised networks
IMORC: An infrastructure and architecture template for implementing high-performance reconfigurable FPGA accelerators
A functional-level testability measure for register-level circuits and its estimation
A carrier peak synchronous direct digital demodulation technique and its FPGA implementation
A power-aware ECG processing node for real-time feature extraction in WBAN
Efficient fuzzy based K-nearest neighbour technique for web services classification
Collection of information available in other books: Michael M Cirović'Handbook of Semiconductor Memories' Prentice-Hall (1981) £16.45 pp 581
Hardware-compiler co-design for adjustable data power savings
Experimental lossless data compressor
Intermediate processing protocol for processing within IP-routed networks
Research and development of fitness equipment embedded system based on distributed virtual environment
FPGA design technology
Green and ecological interior design based on network processor and embedded system
An adaptive binary classifier for highly imbalanced datasets on the Edge
Communication system for a distributed intelligent controller
Safe adaptation of vehicle software systems
DQN based page allocation for ReRAM main memory
Reorganization of the Microprocessor Application Group
Multiprocessing memory subsystem
Design of intelligent medical IoT platform and overall nursing management of nasal endoscopic surgery
Research on the spread effect of data recording sports app on outdoor running group
A new fault-tolerant multitransputer configuration for avionics two-lane systems
Research on clothing design based on 5G network and FPGA
Broadcast digital subscriber lines using discrete multitone for broadband access
Performance benefits and power/energy savings of 28FOl6XS-based system designs
Design considerations for a microprocessor-based Doppler radar
Hybrid BIST optimization using reseeding and test set compaction
Microarchitectural design space exploration made fast
Fault-tolerant LPT task scheduling in multiprocessor systems
Recent advances in Machine Learning based Advanced Driver Assistance System applications
A low-latency high-throughput soft-output signal detector for spatial multiplexing MIMO systems
Optimization of volleyball motion estimation algorithm based on machine vision and wearable devices
Energy efficient heuristic application mapping for 2-D mesh-based network-on-chip
Evaluating the impact of reissued instructions on data speculative processor performance
Corrigendum to High throughput unified architecture of LEA algorithm for image encryption' Microprocessors and Microsystems Vol 78 (2020) 1-10
Embedded system in handheld water turbidity meter for smallholders
A useful trace facility for microcomputers
Using EPROMs for file storage
The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration
Europe and the new information technology - a community strategy for the 1980s: 24 October 1980, Mount Royal Hotel, London, UK. Sponsored by the UK National Computing Centre in cooperation with the European Commission
Embedded medical system and traditional Chinese medicine to treat hormone levels in patients with premature ovarian failure
Accurate energy modeling for many-core static schedules with streaming applications
Microprocessor based data acquisition system
Model Development for Optimized Land Usage in Urban Agglomeration Zone Using Bee Colony Algorithms
Universal bridge interface for DVP-compatible image sensors
Microprocessors, side effects and society
Accommodating larger container vessels using an integrated laser system for approach and berthing
An introduction to microcomputers. Vol 1 - Basic concepts and Vol 2 - Some real products. 8080 programming for logic design: A Osborne. Adam Osborne & Associates (obtainable from Sybex Publications Department, Paris) (1976) (2nd ed.), 289 pp, 368 pp and 273 pp, respectively, $7.50 each (paperback)
Integrated analysis of power and performance for cutting edge Internet of Things microprocessor architectures
An energy efficient FPGA partial reconfiguration based micro-architectural technique for IoT applications
A fast parallel implementation of elliptic curve point multiplication over GF(2 m )
Influence of passive hardware redundancy on differential power analysis resistance of AES cipher implemented in FPGA
Introducing microprocessors : G L Simons, National Computing Centre Ltd (1979) 177 pp, £6.50
P-notation: High level description language for software design
General-purpose crossassembler for 8-bit microprocessors
Closing the gap between speed and configurability of multi-bit fault emulation environments for security and safety-critical designs
An approach to model dependability of cyber-physical systems
Image recognition algorithm for exercise fatigue based on FPGA processor and motion image capture
Real-time process control in the 80s
Simulation of microbial enhanced recycled aggregate preparation system based on artificial intelligence and embedded processor
Research on teaching based on tennis-assisted robot image recognition
Novel design for a low-latency CORDIC algorithm for sine-cosine computation and its Implementation on FPGA
MAP-ACO: An efficient protocol for multi-agent pathfinding in real-time WSN and decentralized IoT systems
A novel algorithm and FPGA based adaptable architecture for correcting sensor non-uniformities in infrared system
Parameterized MAC unit generation for a scalable embedded DSP core
Efficient and high performance FPGA-based rectification architecture for stereo vision
Dual-model approach for safety-critical embedded systems
Programmable digital waveform generator
Three-dimensional simulation of swimming training based on Android mobile system and virtual reality technology
Edge-sorter: A hardware sorting engine for area & power constrained edge computing devices
A new idea in response to fast correlation attacks on small-state stream ciphers
Design and implementation of the ITRON specification - an embedded industrial realtime OS
Digital BiCMOS Integrated Circuit Design: Sherif H K Embabi, A. Bellaouar and Mohamed I Elmasry Kluwer Academic, Dordrecht, The Netherlands (1992) ISBN 0 7923 9276 0, £62.50, pp 432
Reliability-aware low energy scheduling in real time systems with shared resources
A security and authentication layer for SCADA/DCS applications
ElCore: Dynamic elastic resource management and discovery for future large-scale manycore enabled distributed systems
High performance FPGA-based decimal-to-binary conversion schemes for decimal arithmetic
Acceleration of brain cancer detection algorithms during surgery procedures using GPUs
On fault-tolerant data replication in distributed systems
GDI logic implementation of uniform sized CSLA architectures in 45 nm SOI technology
An FPGA implementation of a GF(p) ALU for encryption processors
A multilevel modeling and analysis of network-centric systems
A counter-based Hough transform system
Application of image recognition technology based on embedded technology in environmental pollution detection
Reconfigurable co-processor for Kanerva's sparse distributed memory
Cross-bar switch multiple microprocessor system
Embedded Web Server for Hospital and Clinical Nursing Analysis of Cataract Anti-Inflammatory Drugs
Particle swarm optimization technique for multilevel inverters in solar harvesting micro grid system
Special Section on Advanced Systems for Health, Wellness and Personal Assistance
Corporate accounting information disclosure based on FPGA and neural network
Distributed store allocation and file management for transputer networks
Ultra-low power circuits using graphene p-n junctions and adiabatic computing
Design of enterprise financial early warning model based on complex embedded system
Multimicroprocessor systems
Establishing timing requirements for control loops in real-time systems
Forecast of compensation amount based on big data network and machine learning algorithm in intellectual property law
Highly-accurate binary tiny neural network for low-power human activity recognition
Adaptive delta modulation for speech synthesis
Coupling of agricultural economy and environment based on 5G network and internet of things system
Moth-Flame Optimization based ensemble classification for intrusion detection in intelligent transport system for smart cities
Topology of efficiently controllable Banyan multistage networks
Tron: a view from the USA
Performance modeling of CMOS inverters using support vector machines (SVM) and adaptive sampling
The motorola MC68000 microprocessor family: Thomas L Harman and Barbara Lawson, Prentice-Hall, Englewood Cliffs, NJ, USA (1984) £37.90 ppxv + 574
CSMA/CD microcontroller communication network for low-level control
MICPRO DSD 2013 Special Issue
Performance engineering - how well does it really work?
Application-specific SIMD synthesis for reconfigurable architectures
Application mapping to mesh NoCs using a Tabu-search based swarm optimization
Microprocessor-based data acquisition system for respiratory signals
On improving the performance of DDoS attack detection system
Computer-controlled model railway for use in teaching real-time programming
Impact of level-2 cache sharing on the performance and power requirements of homogeneous multicore embedded systems
A novel architecture for handling persistent objects
A real time clock and calendar for the BBC microcomputer and Acom bus: Jewsbury, R A and Fielding, SLab. Pract. Vol 34 No 9 (September 1985) pp 124-126
Evaluation of gem5 for performance modeling of ARM Cortex-R based embedded SoCs
Reconfigurable multicast routing for Networks on Chip
Advanced superior execution time optimal time-frequency filter suitable for non-linear FM signals estimation
Smart components-based servo pneumatic actuation systems
Concurrent error detection for finite state machines implemented with embedded memory blocks of SRAM-based FPGAs
A performance model of pipelined circuit switching in hypercubes
Interoperable access framework for internet of things backhauled heterogeneous applications
BASIC crossassembler for the 8086
A model predictive Goertzel algorithm based active islanding detection for grid integrated photovoltaic systems
Hospital Archives Intelligent Management System Based on 5G Network and Internet of Things System
To implement positive feedback adiabatic logic (PFAL) - NAND technique on low power Zigbee applications for processor applications
High-performance implementation of wavelet algorithms on a standard PC
Application of a secure data transmission with an effective timing algorithm based on LoRa modulation and chaos
IBM assembler and how it works: D H Stabley Assembler language for application programming Van Nostrand (1982) £24.45, pp 677
Automated design error debug using high-level decision diagrams and mutation operators
Computer architecture and design: A J van de GoorAddison-Wesley, Wokingham, UK (1989) £19.95 pp 633
Column-matching based mixed-mode test pattern generator design technique for BIST
Joint algorithm for burst detection and AGC improvement in high throughput software defined radio waveform
Techniques for dynamic hardware management of streaming media applications using a framework for system scenarios
Virtual duplication and mapping prefetching for emerging storage primitives in NAND flash memory storage systems
Low-complex resource mapping heuristics for mobile and iot workloads on NoC-HMPSoC architecture
Fast modeling DRAM access latency based on the LLC memory stride distribution without detailed simulations
Design and implementation of an RSA cryptosystem using multiple DSP chips
An improved residue multiplier using Montgomery modular multiplication
Design of Russian corpus based on embedded system and cloud computing
Design of massively parallel hardware multi-processors for highly-demanding embedded applications
SPARC: architecture to implementations
SPEED: Stand-alone programmable ethernet enabled devices
DFTS: A dynamic fault-tolerant scheduling for real-time tasks in multicore processors
Simpler realtime programming with the transputer
Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview
Parallel distributed scalable runtime address generation scheme for a coarse grain reconfigurable computation and storage fabric
Composable and predictable dynamic loading for time-critical partitioned systems on multiprocessor architectures
Microprocessor development and development systems: V Tseng (ed)Granada (1982) £16, pp 197
Special Issue on Networks-on-Chip and Memories for Multicore Architectures
A quantitative study for Java microprocessor architectural requirements. Part I: Instruction set design
Supporting load distribution strategies in message-passing multiprocessors: a case study
Dynamic partial reconfiguration enchanced with security system for reduced area and low power consumption
A health monitoring system with posture estimation and heart rate detection based on millimeter-wave radar
The state of the MODULA-2 standard
Euromicro: past and future
Performance evaluation of implicit and explicit SIMDization
Experiences on developing computer vision hardware algorithms using Xilinx system generator
An area-efficient architecture for finite field inversion over GF(2 m ) using polynomial basis
Application of ship electric propulsion based on internet of things system and electronic system
Use of a single chip fixed-point DSP for multiple speech channel vocoders
Seismic analysis and optimization of building structure based on embedded system
A transputer-based parallel controller for motor control applications
Parallel biased search for combinatorial optimization: genetic algorithms and TABU
Standard buses for microprocessors: 18 December 1978, Savoy Place, London, UK, Organized by the Control and Automation Group, the Institute of Electrical Engineers
Business English visualization system based on video surveillance and the internet of things
Design of a performance enhanced and power reduced dual-crossbar Network-on-Chip (NoC) architecture
The Motorola MC68000: an introduction to processor, memory and interfacing: Jean BaconPrentice-Hall, Englewood Cliffs, NJ, USA (1986) £14.95 pp 319
A collision management structure for NoC deployment on multi-FPGA
An FPGA implementation of the matching pursuit algorithm for a compressed sensing enabled e-Health monitoring platform
Design and research on wireless intelligent monitoring system for sewage pipeline leakage of textile mill
Large-scale parallel processing systems
Management of automotive software updates
Highly dynamic text display system
A parallel algorithm for Lagrange interpolation on the cube-connected cycles
Extended gaming machine facilities by microprocessor control
An FPGA array for cellular genetic algorithms: Application to the minimum energy broadcast problem
Mobile link prediction: Automated creation and crowdsourced validation of knowledge graphs
Achieving fault tolerance and high reliability
IEEE 1335
A NOC closed-loop performance monitor and adapter
A superscalar architecture to exploit instruction level parallelism
Decomposition and analysis of signals sparse in the dual polynomial Fourier transform
A four-channel communications arbiter for multiprocessor arrays
Introduction to the Fastbus
Microcomputer-controlled instrumentation for ink-jet printing
Research on vehicle license plate recognition technology based on deep convolutional neural networks
A control microarchitecture for fault-tolerant quantum computing
New dynamic logic style for energy efficient tag comparators
Special issue editorial: Exploitation of hardware accelerators
Human muscle measurement and health management based on FPGA and machine learning
Second international conference on automotive electronics: 29 October - 2 November 1979, Institution of Electrical Engineers, London, UK. Organized by the Computing & Control and Electronics Divisions of the IEE
Parallel program design: a foundation: Chandry, K M and Misra, J Addison-Wesley, Wokingham, UK (1988) £19.95 pp 516
The design and evaluation of a multiprocessor system for computer vision
Design of a multimicroprocessor-controlled PABX: Continuing decreases in component costs mean that systems such as telephone branch exchanges can handle large data traffic relatively cheaply
Microprocessor-based IEEE-488 interfacing unit as a development aid
Development of financial option pricing system based on fpga and machine learning
3D floorplanning of low-power and area-efficient Network-on-Chip architecture
Design of sports course management system based on Internet of Things and FPGA system
Standards for microsystems
Simulation of sports action picture recognition based on FPGA and convolutional neural network
A wide range high resolution digital controlled oscillator with high precision time to digital convertor for optimal sampling digital PLL
A scalable and efficient convolutional neural network accelerator using HLS for a system-on-chip design
A fast feature selection technique in multi modal biometrics using cloud framework
Programmable digital neuron using pulsewidth-coded data
Medical wireless IoT system and nursing intervention of chronic bronchitis based on clinical data
Urban ecological forestry analysis based on FPGA and dynamic image sampling
Low latency multicasting architecture implemented using new network topology
Time situate recurrence estimation technique for efficient data collection in war field sensor network
Performance improvement techniques for the M88000 RISC architecture
Energy efficient logarithmic-based approximate divider for ASIC and FPGA-based implementations
Design and implementation of an FPGA transponder
Design of enterprise employee pension platform based on complex embedded system
Design space exploration of multi-core RTL via high level synthesis from OpenCL models
A novel flow control and switching strategy for preventing hotspot congestion in multistage networks
Fine grain faults diagnosis of FPGA interconnect
Design of a flexible distributed data acquisition controller with the 80C51FA microcontroller
Software for hardware engineers
Fault diagnosis architecture for SKINNY family of block ciphers
Selfchecking computer module based on the Viper microprocessor
Multi-dimensional analysis of embedded systems security
Convolutional Tsetlin Machine-based Training and Inference Accelerator for 2-D Pattern Classification
Efficient anomaly detection in surveillance videos based on multi layer perception recurrent neural network
Low power low area VLSI implementation of adaptive FIR filter using DA for decision feed back equalizer
High speed memory organization
Software development tool for target systems and EPROM programmers within a Unix environment
Analysis of psychological education factors based on computer software and hardware collaboration and data mining
Single- and multiple-chip microcomputer interfacing: Lipovski, G J Prentice-Hall, Englewood Cliffs, NJ, USA (1988) £42.80 pp 478
A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project
Accident avoidance and prediction system using adaptive probabilistic threshold monitoring technique
Analysis and evaluation of message management functions for bidimensional transputer networks
A novel lightweight multi-factor authentication scheme for MQTT-based IoT applications
Application of the artificial bee colony algorithm to power contract capacity optimization
Processing data where it makes sense: Enabling in-memory computation
Data acquisition and control system for laboratory experiments
Count overflow and privilege mode filtering extension implementation on a RISC-V on-board processor
Scaling a frequency display
A security approach for off-chip memory in embedded microprocessor systems
Embedded Gpsgsm based on cloud computing data processing in soldiers' physical fitness training
An Architectural-Level Reliability Improvement Scheme in STT-MRAM Main Memory
A 6502 macro assembler in FORTH
A routing algorithm for row-based FPGAs
Smart Japanese listening course design based on data intelligent analysis and FPGA
Tha MAP report: Jack Hollingham IFS (publications) through Springer-Verlag, Heidelberg, FRG (1986) £75.00 pp 155
Research on optimization of setup time for product in the multi-product production system
Retraction notice to "An Improved Multilayer Perceptron Approach for Detecting Sugarcane Yield Production in IoT based Smart Agriculture" [Microprocessors and Microsystems 82 (2021) 103822]
Design-space exploration of the most widely used cryptography algorithms
Empirical study on security verification and assessment of neural network accelerator
Local area network architectures: Hutchison, D Addison-Wesley, Wokingham, UK (1988) £16.95 pp 264
A quality-aware Energy-scalable Gaussian Smoothing Filter for image processing applications
Design and implementation of a low-cost/high-performance Video on Demand server
Industrial applications for microprocessors: A D Steckhaln, J Den OtterReston Publishing (1982) £19.95 pp 500
The hardware design of compute/DRAM TRAMS
Onboard FPGA-based fast estimation of point object coordinates for linear IR-sensor
PARNEU: general-purpose partial tree computer
A flexible controller for robots
PASCAL for FORTRAN programmers: Robert Weiss and Charles Seiter, Addison-Wesley, Wokingham, UK £15.50 pp 237
Logic synthesis and testing techniques for switching nano-crossbar arrays
A novel algorithm for weighted average voting used in fault tolerant computing systems
Microcomputer processing of 10 MHz acoustic signals
Wireless fieldbus networking with precision time synchronization for a low-power WSAN
Parallel implementation of quorum planted (ℓ, d) motif search on multi-core/many-core platforms
ACDS - Assisted Cooperative Decision-Support for reliable interaction based navigation assistance for autonomous vehicles
The roving slave processor
Boosting performance of transactional memory through O-GEHL predictors
Implementation of a deductive database system using SQLBase
Memory resources aware run-time automated scheduling policy for multi-core systems
Medical monitoring system design and treatment of helicobacter pylori gastric ulcer based on sensor network
The fastest visual ego-motion algorithm in the west
An approach to the design of distributed real-time operating systems
Probabilistic approximation of runtime quantitative verification in self-adaptive systems
Computer aided intelligent medical system and nursing of breast surgery infection
Memory organization for two parallel readouts
A 218 GOPS neural network accelerator based on a novel cost-efficient surrogate gradient scheme for pattern classification
Operating systems: Tanenbaum, A S Prentice-Hall, Englewood Cliffs, NJ, USA (1987) £16.95 pp 719