yusuke1997/dblp-id-title huggingface dataset:
Power consumption models for the use of dynamic and partial reconfiguration
Advanced technologies in manufacturing
Vector signal processors and digital filters in data compression for electronic publishing
Impact of probabilistic vehicle estimates on communication reliability at intelligent crossroads
Scenario preprocessing approach for the reconfiguration of fault-tolerant NoC-based MPSoCs
Reducing non-deterministic loads in low-power caches via early cache set resolution
Application type based resource allocation strategy in cloud environment
A comparison of selected digital halftoning techniques
Teaching bit-slice microprocessor applications using simulation techniques
Design and implementation of low power bio signal sensors for wireless body sensing network applications
Design of embedded TCAM based longest prefix match search engine
A new microarchitecture hardware proposal for the use of the improved template matching method in face similarity detection
Virtual garden landscape planning based on FPGA and GIS platform
A light-weight secure information transmission and device control scheme in integration of CPS and cloud computing
VLSI implementation of reversible logic gates cryptography with LFSR key
Transputer link break-out box
Constant-time hardware computation of elliptic curve scalar multiplication around the 128 bit security level
Computer aided fencing sports wearable equipment based on FPGA microprocessor and sensors
Personal computers in offices of the future
Software-based single-step and multiregister breakpoint facility
Recent advances in Josephson junction devices
Intelligent information recommendation algorithm under background of big data land cultivation
On extending Amdahl's law to learn computer performance
Artificial intelligence medical system and dexmedetomidine for postoperative analgesia in orthopedic surgery patients
A global-memory message-passing multiprocessor
LSI microprogrammable microprocessors
Line fetch/prefetch in a stack cache memory
EFA modular computer concept
Design of Edinburgh logo
Forest park landscape pattern system based on FPGA and GIS system
Microcomputer experimentation with the Motorola MC68000ECB: Leventhal, L A Holt, Rinehart and Winston, New York, NY, USA (1988) £12.00 pp 480
Interrupt latency in systems based on Intel 80×86 processors
Flexible elliptic curve cryptography coprocessor using scalable finite field arithmetic blocks on FPGAs
Performance/cost analyses for common network topologies
Detection of attacks in IoT sensors networks using machine learning algorithm
Micro-electronics; digital and analog circuits and systems: Jacob Millman, McGraw - Hill (1979) 882 pp, £18.40
Implementation of harmony search on embedded platform
A clock synchronization method for EtherCAT master
Architectures for persistence
Designing a 6809 coprocessor for the BBC microcomputer
Multicast performance modeling and evaluation for high-speed unidirectional torus networks
Energy efficient low density parity check scheme for body channel communication using FPGA
Microprocessor system partitioning
RISC design for computer image generation
Tracing Windows95
RTL implementations and FPGA benchmarking of selected CAESAR Round Two authenticated ciphers
The ADA programming language: Pyle, I C, Prentice-Hall International (1981) pp 293, £8.95
3D Garden landscape planning visualization system based on FPGA processor and virtual reality
A 12-inch wafer prealigner
Wireless-assisted multiple network on chip using microring resonators
Non-minimal, turn-model based NoC routing
Street architecture landscape design based on Wireless Internet of Things and GIS system
An IoT-based intelligent farming using CNN for early disease detection in rice paddy
A fault-tolerant multitransputer system for space applications
A pipelined architecture for image segmentation by adaptive progressive thresholding
Software designs for real time systems: Cooling, J E Chapman & Hall, London (1991) pp 506 £39.95
Customizing floating-point units for FPGAs: Area-performance-standard trade-offs
DeSyRe: On-demand system reliability
Experimental verification of the effectiveness of a new circuit to mitigate single event upsets in a Xilinx Artix-7 field programmable gate array
Multimodal registration of visible, SWIR and LWIR images in a distributed smart camera system
User-configurable adapter interface chips for PS/2 micro channel
Info '82: 9-12 February 1982, Barbican Centre, London
Build or buy?
A deterministic way-prediction scheme using power-aware replacement policy
Experimental EMFI detection on a RISC-V core using the Trace Verifier solution
Components for information processing
Low power VLSI implementation of real fast Fourier transform with DRAM-VM-CLA
Fieldbus: an emerging communications standard
An adaptive switching architecture for multiprocessor networks
Array logic and bit-slices for designers: E E Klingman 'Microprocessor systems design Volume 2' Prentice-Hall (1982) £22.00, pp 349
Home smart motion system assisted by multi-sensor
Resilient flow control for wireless data streaming in inductively coupled medical implants
Calculation and analysis of multi-chamber corrugated steel web composite beam structure based on internet of things system
Design of a robot control system architecture
Computation Structures: Ward, S A and Halstead, R H Jr. MIT Press, Cambridge, MA, USA (1990) £26.95 (paperback) £44.95 (cloth) pp 789
National computer conference and exhibition: Las Vegas, NV, USA, 9-12 July 1984
An integrated temporal partitioning and physical design framework for static compilation of reconfigurable computing systems
C programming guidelines: Thomas Plum Prentice-Hall, Englewood Cliffs, NJ, USA (1984) £25.20 pp 143
The application of wireless local area network technology to the control of mobile robots
Improving gain of real time PI controller using particle swarm optimization in active power filter
Multithreading on reconfigurable hardware: An architectural approach
ASIC design of a matching unit for NLP
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain with Carry-Save format numbers
Floating accumulator architecture
Comparison of histograms of oriented gradients (HOG) and n-Row average subtraction (nRAS) using GprMax
A comprehensive integration infrastructure for embedded system design
Automatic compaction of microcode
Implementation of MTD-WVD on a TMS320C30 DSP processor
Microcontroller based genetic algorithms
A dynamic non-uniform segmentation method for first-order polynomial function evaluation
MICPRO DSD 2014 special issue
High-performance computer architecture: Stone, H S Addison-Wesley, Reading, MA, USA (1987) £22.95 pp 425
A comparison of interrupt handling techniques using Modula-2 on the IBM PC
Elements of microprogramming: DK Banerji and J RaymondPrentice Hall (1982) £ 18.70, pp 434
Towards a scheduling and timing analysis solution for integrated modular avionic systems
Design and implementation of a multicast messaging kernel
Development of cold chain logistics transportation system based on 5G network and Internet of things system
CONNECT - an architecture for a highly parallel system based on building blocks
32-bit microprocessors based on the TRON specification
Design and hardware implementation of a stereo-matching system based on dynamic programming
Model-based configuration of access protection units for multicore processors in embedded systems
An integrated system for the sensor processing and control of robot systems
Ai BCS: A GPU cluster scheduling optimization based on SKE model
A load-balanced congestion-aware wireless network-on-chip design for multi-core platforms
Smart methodology for performance improvement of energy sources for home application
Guards in action: First-order SCA secure implementations of KETJE without additional randomness
Introduction to IDT's FourPort RAM
An integrated framework of formal methods for interaction behaviors among industrial equipments
Hardware acceleration of homogeneous and heterogeneous ensemble classifiers
An early memory hierarchy evaluation simulator for multimedia applications
Optimization strategies in different CUDA architectures using llCoMP
An integrated isolated inverter fed bldc motor for photovoltaic agric pumping systems
Multi-lane architecture for eigenface based real-time face recognition
UK government venture into standards
Innovative circuit and system design methodologies for green cyber-physical systems
Black hole attack detection in vehicular ad-hoc network using secure AODV routing algorithm
A novel defense model for dynamic topology network based on mobile agent
Microprocessors: technology, architecture and applications : D. R. McGlyn. John Wiley & Sons, Chichester, UK, 320 pp (June 1976) $13.00
Animation prototyping of real-time embedded systems
Research on 3D simulation of swimming technique training based on FPGA and virtual reality technology
E 2 PROM interfacing
Microprocessor-based toll registration system
Using the page mode of dynamic RAMs to obtain a pseudo cache
LCIPA: Lightweight clustering protocol for industry 4.0 enabled precision agriculture
Functional testing and verification of array systems
The Newcastle Connection
VHDL design of a priority interrupt controller and synchronizer for the MC68008
FPGA based architecture of Extensive Cancellation Algorithm (ECA) for Passive Bistatic Radar (PBR)
CCTR: An efficient point-to-point memory race recorder implemented in chunks
ASIC design of power and area efficient programmable FIR filter using optimized Urdhva-Tiryagbhyam Multiplier for impedance cardiography
Creation and animation of computer-generated images combined with a camera and smart graphics card
Speed tunable finite state machine compiler: Zephcad
An IEC 61131-3-based PLC implemented by means of an FPGA
Retraction notice to "Searching and Learning English Translation Long Text Information Based on Heterogeneous Multiprocessors and Data Mining" [Microprocessors and Microsystems 82 (2021) 103895]
On the performance benefits of sharing and privatizing second and third-level cache memories in homogeneous multi-core architectures
Standard bus for 8-bit microprocessor systems
System implications of LLC MSHRs in scalable memory systems
Efficient Machine Learning execution with Near-Data Processing
Porting a new microcomputer operating system
RFID based access control protection scheme for SRAM FPGA IP cores
Versatile digital architecture for mobile terminal
Digital and microprocessor engineering: SJ CahillEllis Horwood (1982) pp 508
A systematic review on performance evaluation metric selection method for IoT-based applications
Special issue on applied reconfigurable computing
Field programmable gate array-based PCI interface for a coprocessor system
The VALU3S ECSEL project: Verification and validation of automated systems safety and security
Microprocessor teaching laboratory
Design of a 6802-controlled propagation field strength analyser for land mobile radio services
Microprocessor bus structures and bus interface design: Arthur L Dexter Marcel Dekker, New York, NY, USA (1986) $59.75 (USA), $71.50 (elsewhere) pp 339
Efficient architecture of adaptive rood pattern search technique for fast motion estimation
'Automate or liquidate' - Kenneth Baker
Design of hospital IoT system and drug intervention in patients with acute myocardial infarction
Software-calling conventions for the Z8000
Genetic algorithms for generating minimum path configurations
Automatic Speaker Recognition from Speech Signals Using Self Organizing Feature Map and Hybrid Neural Network
High-level features of APL
A telephone adapter for Internet telephony systems
Error masking method based on the short-duration offline test
Design and implementation of secure boot architecture on RISC-V using FPGA
Real-time UNIX systems: design and application guide: Furht, B, Grostick, D, Gluch, D, Rabbat, G, Parker, J and Roberts, M Kluwer Academic (1991) £35.75, 316 pp ISBN 0-7923-9099-7
Embedded computer system in hospital and atomized intelligent monitoring of children's respiratory diseases
Microprocessor interfacing and communication using the Intel SDK-85: Borivoje Furht and Himanshu Parikh Prentice-Hall Reston, Englewood Cliffs, NJ, USA (April 1986) £31.00 pp 499
Malicious attack detection based on continuous Hidden Markov Models in Wireless sensor networks
VABLOCK: A blockchain-based secure communication in V2V network using icn network support technology
Design of an MS-DOS PC program profiler
A lattice Boltzmann model for the Navier-Stokes equation
Simulation of dance performance analysis with microprocessor and machine vision interaction
Microprocessors: hardware, software and design applications: W V Subbarao, Reston Publishing Co., Reston, VA, USA (1984) £30.85 pp 364
Computer aided medical system design and clinical nursing intervention for infantile pancreatitis
Low power aware standard cells using dual rail multi threshold null convention logic methodology
Multiple detection test generation with diversified fault partitioning paths
Design optimization for security- and safety-critical distributed real-time applications
Selftuning control of some pilot plant processes
Development of tourism resources based on fpga microprocessor and convolutional neural network
Assembler language for application programming: D H StableyVan Nostrand (1982) £25.45, pp 677
Design and implementation of a low-cost wireless network for remote control and monitoring applications
Task scheduling policies for real-time systems
Metaheuristics for the deployment problem of WSN: A review
DMEERP: A dynamic multi-hop energy efficient routing protocol for WSN
TRON project 1988: open-architecture computer systems: Sakamura, K (Ed.) Springer-Verlag, Heidelberg, FRG (1988) DM 148.00 pp 395
Mini/microcomputer hardware design : George D Kraft and Wing N Troy, Prentice-Hall (1979) 514 pp, £12.95
Visual handicap and the challenge of information technology in employment
Post-quantum signature schemes for efficient hardware implementation
Support for broadcast communication in multicomputer networks
Evaluation of the Data Interaction Architecture Demonstrator by means of a multiple mobile robot workspace simulation
The PEWs microarchitecture: reducing complexity through data-dependence based decentralization
Crossassembler for the TMS32010 digital signal processor
Switched memory for multiprocessor MC6809E systems
Microcircuit takeover - a new challenge for management?
A Fog-Cloud based cyber physical system for Ulcerative Colitis diagnosis and stage classification and management
Tomorrow's computers will be more complex than today's CISCs, but will embody the RISC philosophy
Digest of papers, COMPCON 76: COMPCON 76 Fall Committee. IEEE (1976), 392 pp, members $15, nonmembers $20
Microprocessors in industrial control: J BibberoPrentice Hall, Englewood Cliffs, NJ, USA (May 1984) £37.95, pp 244
Microprocessor device reliability
Parallel processing, the transputer and the future
ADA for experts: A Nico Habermann and Dewayne E. Perry 'ADA for experienced programmers' Addison-Wesley, Reading, MA, USA £16.10 pp 479
Minimization of digital logic gates and ultra-low power AES encryption core in 180CMOS technology
Bluetooth based home automation system
Design of the online platform of intelligent library based on machine learning and image recognition
An enhanced binary classifier for Edge devices
Clock generator behavioral modeling for supply voltage glitch attack effects analysis
Hardware description of multi-layer perceptrons with different abstraction levels
Interfacing the 80386 to Multibus I
Thyroid Tumour care risk based on medical IoT system
Data-driven modeling of reconfigurable multi-accelerator systems under dynamic workloads
A new scheduling approach supporting different fault-tolerant techniques for real-time multiprocessor systems
Design of a microprocessor-controlled PABX
High-performance implementation of regular and easily scalable sorting networks on an FPGA
Human-factors aspects of designing computer voice output systems as communication aids for the disabled
Protection switching schemes and mapping strategies for fail-operational hard real-time NoCs
ARINC 629 data bus physical layer technology
Design of SDH STM-1 transmission test set
Rapid generation of custom instructions using predefined dataflow structures
RISC-based architectures for multiple robot systems
Cryptanalysis of reduced QTL block cipher
Time-range compatibility reasoning for asynchronous systems design
Multipath routing mechanism using embedded architecture of interfaced circuit
Citrus disease detection and classification using based on convolution deep neural network
Microprocessor implementation of adaptive equalizers
LFSR based versatile divider architectures for BCH and RS error correction encoders
STETS: A novel energy-efficient time synchronization scheme based on embedded networking devices
PGMA: An algorithmic approach for multi-objective hardware software partitioning
Open-hardware e-puck Linux extension board for experimental swarm robotics research
A scenario- and platform-aware design flow for image-based control systems
Secure data communication for wireless mobile nodes in intelligent transportation systems
A low power and real-time hardware recurrent neural network for time series analysis on wearable devices
Cache tag RAM chips simplify cache memory design
A security framework for protecting traffic between collaborative domains
Deep learning and metaheuristics application in internet of things: A literature review
Debugging hardware designs using dynamic dependency graphs
Smart self-power generating garbage management system using deep learning for smart cities
NetStage/DPR: A self-reconfiguring platform for active and passive network security operations
Using Futurebus in a fifth-generation computer
System based on digital signal processors (DSPs) for communication between industrial processes with critical time
Serial interface for the Zilog Z80
Multi-level logic synthesis based on decomposition
Performance analysis of Clos interconnection networks under non-uniform traffic patterns
Microprocessor techniques for energy conservation in computer rooms
A practical hardware architecture to support software acceleration
Design and implementation of a synchronous Hardware Performance Monitor for a RISC-V space-oriented processor
Design of reversible logic based full adder in current-mode logic circuits
CL-MLSP: The design of a detection mechanism for sinkhole attacks in smart cities
Experiment of biological pulse sensor and its application in physical education
Message latency in the 2-dimensional mesh with wormhole routing
Path-based branch prediction using signature analysis
COPS: A complete oblivious processing system
ANFIS based multi-sector space vector PWM scheme for sensorless BLDC motor drive
RTOS-supported low power scheduling of periodic hardware tasks in flash-based FPGAs
A network-centric approach to space-restricted distributed processing
Task scheduler co-processor for hard real-time systems
MPATH: a loop-free multipath routing algorithm
A light-weight neuromorphic controlling clock gating based multi-core cryptography platform
Tradeoffs in selecting IC temperature sensors
FPGA implementation of full-search vector quantization based on partial distance search
Speech enhancement through improvised conditional generative adversarial networks
μp introduction gains strength by its completeness: J Ffynlo Craine and Graham R Martin'Microcomputers in engineering and science' Addison-Wesley, Wokingham, UK (1985) £13.95 pp ix + 444
Case study of a functional genomics application for an FPGA-based coprocessor
Block floating-point implementation of digital filters using the DSP56000
Face detection based on open Cl design and image processing technology
A Fault Detection Method Based on Embedded Feature Extraction and SVM Classification for UAV Motors
Gas burner control using microprocessors
A linear rotation based solution of large systems on a transputer array
M2DC - Modular Microserver DataCentre with heterogeneous hardware
Combining pixel selection with covariance similarity approach in hyperspectral face recognition based on convolution neural network
Addressing the Smart Systems design challenge: The SMAC platform
FPGA implementation of an enhanced chaotic-KASUMI block cipher
IoT-Edge Communication Protocol based on Low Latency for effective Data Flow and Distributed Neural Network in a Big Data Environment
Control '81: 10-12 February 1981, Kensington Exhibition Center, London, UK
Multimedia extensions for general purpose microprocessors: a survey
IoT medical embedded system design and Trimetazidine treatment of coronary heart disease and angina pectoris
Concurrent programming in Occam 2: Wexler, J Ellis Horwood, Chichester, UK (1989) £29.95 pp 208
Pentium microprocessor system structure and principal of political teaching and teaching material improvement
Design and implementation of totally-self checking SHA-1 and SHA-256 hash functions' architectures
A framework to generate domain-specific manycore architectures from dataflow programs
Unified reliability estimation and management of NoC based chip multiprocessors
Design, modeling, and frequency domain analysis with parametric variation for fixed-guided vibrational piezoelectric energy harvesters
Fast and efficient power estimation model for FPGA based designs
PLL based ASIC system for DSP real-time analogue interface
Modified single error correction orthogonal Latin square scheme to reduce parity check bits
Application of artificial neural networks for spacecraft instrument data compression
The GENESIS parallelism management system employing concurrent process-creation services
A review of medium access protocols for mobile ad hoc networks with transmission power control
Software support. Part 2 High-level languages
A toolset in Java2 for modelling, prototyping and implementing communicating real-time state machines
Flow control scheduling
A reuse-based refresh policy for energy-aware eDRAM caches
Advances in STD system capability
A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension
Accelerating image boundary detection by hardware parallelism
Programming principles in computer graphics: Leendert Ammeraal John Wiley, New York, USA (April 1986) £11.50 pp 168
Timing attack on NoC-based systems: Prime+Probe attack and NoC-based protection
Fault tolerant system design and SEU injection based testing
Athlete muscle measurement and exercise data monitoring based on embedded system and wearable devices
A simple memory system for microprocessors
Adaptive routing in k-ary n-cubes using incomplete diagnostic information
Security is an architectural design constraint
Model of a hybrid processor executing C++ with additional quantum functions
FPGA implementation of an optimized A5/3 encryption algorithm
Authenticated encryption on FPGAs from the static part to the reconfigurable part
SAccO: An implementation platform for scalable FPGA accelerators
VMS serial bus as an intercrate link from VME to STE
MS-DOS memory resident transputer graphics server
Transputer application to speech recognition
Energy efficient cluster based routing for wireless sensor networks using moth levy adopted artificial electric field algorithm and customized grey wolf optimization algorithm
Writing a FORTH discompiler and using FORTH in digital filters and multichannel analysis
Efficient OpenCL system integration of non-blocking FPGA accelerators
A novel majority based imprecise 4: 2 compressor with respect to the current and future VLSI industry
Enhancing the security of AES through small scale confusion operations for data communication
Design and analysis of fault tolerant digital systems: Johnson, B W Addison-Wesley, USA (1989) $41.35 pp 584
Understanding networking, without too much detail: Colin Pye 'Networking with microcomputers' NCC Publications, Manchester, UK (1985) £12.50 pp 196
Embedded solution for data acquisition and management strategy dedicated to a hybrid renewable energy source for remote electricity supply
Energy-efficient scheduling on multi-FPGA reconfigurable systems
Design and implementation of a wheel speed measurement circuit using field programmable gate arrays in a spacecraft
Reducing CRT display overheads in Z80 systems using refresh-mode transfer