yusuke1997/dblp-id-title huggingface dataset:
Asymptotic expansion of orthogonal polynomials via difference equations
Sharp iteration asymptotics for transfer operators induced by greedy β-expansions
Classification Theorems for General Orthogonal Polynomials on the Unit Circle
Interpolation on cycloidal spaces
Direct and inverse results in Hölder norms
C 2 piecewise cubic quasi-interpolants on a 6-direction mesh
The rate of linear convergence of the Douglas-Rachford algorithm for subspaces is the cosine of the Friedrichs angle
Erratum to "On an approximation family of discrete polynomial operators" [J. Approx. Theory 164 (2012) 938-953]
Sharp Lp-error estimates for sampling operators
An asymptotic holomorphic boundary problem on arbitrary open sets in Riemann surfaces
Orthogonal polynomials in two variables as solutions of higher order partial differential equations
Series representations of the Volterra function and the Fransén-Robinson constant
A generalization of a result of G. Pólya and its application to a continuous extension of the de la Vallée Poussin means
On d-dimensional d-semimetrics and simplex-type inequalities for high-dimensional sine functions
A tribute to Dick Askey
Infinite products of arbitrary operators and intersections of subspaces in Hilbert space
Approximation properties of combination of multivariate averages on Hardy spaces
Stability of ball proximinality
Sharp Jackson inequalities
l 1 -summability of higher-dimensional Fourier series
On the condition of cubic B-splines
On the Rates of Approximation of Bernstein Type Operators
Hermite-Pade' approximation and simultaneous quadrature formulas
Bump functions with monotone Fourier transforms satisfying decay bounds
Exceptional Charlier and Hermite orthogonal polynomials
Entropy function and orthogonal polynomials
A new linear spectral transformation associated with derivatives of Dirac linear functionals
Quadrature formula for computed tomography
Book Review: "Special Functions, A Unified Theory Based on Singularities" by Sergei Yu. Slavyanov and Wolfgang Lay
Spectra of a class of Cantor-Moran measures with three-element digit sets
A Favard type theorem for orthogonal polynomials on the unit circle from a three term recurrence formula
Asymptotic approximation by de la Valle'e Poussin means and their derivatives
Levin-Golovin theorem for the system of functions associated to Dunkl transform
Zeros of polynomials with random coefficients
Multivariate polynomial interpolation on Lissajous-Chebyshev nodes
Approximation by sums of piecewise linear polynomials
On Bernstein classes of well approximable maps
On modular approximants in sequential convergence spaces
Summability of orthogonal expansions of several variables
On weighted approximation with Jacobi weights
Cubature over the sphere S 2 in Sobolev spaces of arbitrary order
C 0 -semigroups and resolvent operators approximated by Laguerre expansions
Explicit construction of symmetric orthogonal wavelet frames in L 2 (R S )
The Lp Minkowski problem associated with the compatible functional F
The Eneström-Kakeya Theorem for polynomials of a quaternionic variable
Corrigendum to and two open questions arising from the article "Approximation in rough native spaces by shifts of smooth kernels on spheres": [J. Approx. Theory 133 (2005) 269-283]
On reverse Markov-Nikol'skii inequalities for polynomials with restricted zeros
Measurable diagonalization of positive definite matrices
Polynomial approximation of piecewise analytic functions on a compact subset of the real line
On the entropy of a function
Asymptotic behaviour of some families of orthonormal polynomials and an associated Hilbert space
Limiting epsilon -subgradient characterizations of constrained best approximation
vKernel: Enhancing Container Isolation via Private Code and Data
Contributory Broadcast Encryption with Efficient Encryption and Short Ciphertexts
Decomposition of {0, 1}-Matrices
An Algebraic Model of Arithmetic Codes
High-Speed Addition in CMOS
A Fast Algorithm for Multiplicative Inversion in GF(2m) Using Normal Basis
Temperature-Prediction Based Rate-Adjusted Time and Space Mapping Algorithm for 3D CNN Accelerator Systems
Throttling-Based Resource Management in High Performance Multithreaded Architectures
Formal Models of Capability-Based Protection Systems
Parallel Processing of Large Node B-Trees
Optimizing the Response Time of Memcached Systems via Model and Quantitative Analysis
An ALU Protection Methodology for Soft Processors on SRAM-Based FPGAs
Renaming the PTGEC
S 2 Engine: A Novel Systolic Architecture for Sparse Convolutional Neural Networks
The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors
Artificial Intelligence: Cooperative Computation and Man-Machine Symbiosis
Ant Colony Optimization-Based Adaptive Network-on-Chip Routing Framework Using Network Information Region
300-Mc Tunnel-Diode Logic Circuits
Elliptic-Curve-Based Security Processor for RFID
Design of Asynchronous Sequential Networks Using READ-ONLY Memories
Hybrid Computer Solution of Optimal Control Problems by the Maximum Principle
A Modified Partial Product Generator for Redundant Binary Multipliers
High Performance Memory Systems
Parallel Processing Approaches to Image Correlation
A New Finite-Field Multiplier Using Redundant Representation
A Simplified Analysis of Processor "Look-Ahead" and Simultaneous Operation of a Multi-Module Main Memory
Key-Aggregate Searchable Encryption (KASE) for Group Data Sharing via Cloud Storage
An Efficient Implementation of Search Trees on ( lg N + 1) Processors
Guest Editor's Introduction to the Special Section on Simulation-Based Design Validation
A Way to Build Efficient Carry-Skip Adders
A Necessary and Sufficient Criterion for the Monotonicity of Boolean Functions with Deterministic and Stochastic
A GPU-Aware Parallel Index for Processing High-Dimensional Big Data
D 3 : A Dynamic Dual-Phase Deduplication Framework for Distributed Primary Storage
Weight-Preserved Single-Error-Correcting Scheme for Binary Adders
Predicting the Health Degree of Hard Disk Drives With Asymmetric and Ordinal Deep Neural Models
Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Input Sequences Using Single and Multiple Fault Detection Times
A Parallel Picture Processing Machine
A General-Purpose High-Speed Logical Transform Image Processor
B73-5 Computer-Oriented Approaches to Pattern Recognition
A Remark on "Reducing Iteration Time when Result Digit is Zero for Radix-2 SRT Division and Square Root with Redundant Remainders"
New Regular Radix-8 Scheme for Elliptic Curve Scalar Multiplication without Pre-Computation
Algebraic Properties of Functions Affecting Optimum Fault-Tolerant Realizations
Towards an Energy-Efficient Anomaly-Based Intrusion Detection Engine for Embedded Systems
Efficient Implementation Techniques for Gracefully Degradable Multiprocessor Systems
Testing Iterative Logic Arrays for Sequential Faults with a Constant Number of Patterns
An Efficient Organization or Large Frequency-Dependent Files for Binary Searcking
Digital Differential Analyzers with Arbitrary Stored Interconnections
Distributed Enumaration on Between Computers
HOME: A Holistic GPU Memory Management Framework for Deep Learning
AdEle+: An Adaptive Congestion-and-Energy-Aware Elevator Selection for Partially Connected 3D Networks-on-Chip
A Cool Scheduler for Multi-Core Systems Exploiting Program Phases
Intermittent Fault Diagnosis in Multiprocessor Systems
Comments on "Procedures for Eliminating Static and Dynamic-Hazards in Test Generation"
On the Yield of VLSI Processors with On-Chip CPU Cache
Scrabble: A Fine-Grained Cache with Adaptive Merged Block
Hierarchical Performance Evaluation Based on Formally Specified Communication Protocols
R70-19 Frequency of Decomposability Among Machines with a Large Number of States
Design of Approximate Radix-4 Booth Multipliers for Error-Tolerant Computing
OBDD Minimization Based on Two-Level Representation of Boolean Functions
A Discussion of "A Measure of Computational Work"
A Simple Self-Testing Decoder Checking Circuit
Distributed Recovery from Network Partitioning in Movable Sensor/Actor Networks via Controlled Mobility
Figure of Merit of Electronic Switching Devices
Elastic Scheduling for Flexible Workload Management
Complexity of Matrix Product on a Class of Orthogonally Connectid Systolic Arrays
Secure Optimization Computation Outsourcing in Cloud Computing: A Case Study of Linear Programming
Insertion Networks
How Big Should a Printed Circuit Board Be?
Design and Performance Analysis of the Generalized Timed Token Service Discipline
Performance Evaluation of Neurectangular Multistage Interconnection Networks
On the Use of Fully Specified Initial States for Testing of Synchronous Sequential Circuits
Minimization of Incompletely Specified Sequential Machines
A Fast 1-D Serial-Parallel Systolic Multiplier
Enabling One-Size-Fits-All Compilation Optimization for Inference Across Machine Learning Computers
Hiding in Plain Sight: Adversarial Attack via Style Transfer on Image Borders
B73-3 Dynamic Programming and Partial Differential Equations
Minimum Register Instruction Sequencing to Reduce Register Spills in Out-of-Order Issue Superscalar Architectures
Design and Optimization of Large Size and Low Overhead Off-Chip Caches
An Automatic-Addressing Architecture With Fully Serialized Access in Racetrack Memory for Energy-Efficient CNNs
P-Functions-Ternary Logic Functions Capable of Correcting Input Failures and Suitable for Treating Ambiguities
An Algorithm to Derive the Complement of a Binary Function with Multiple-Valued Inputs
Neural-Network-Based Fuzzy Logic Control and Decision System
MemFlex: A Shared Memory Swapper for High Performance VM Execution
A New Representation of Sequential Machines for Determining All Incompatible Pairs
Synthesis of Multithreshold Tree Networks
Speed versus Accuracy Trade-Offs in Microarchitectural Simulations
Sequential Fault Diagnosis of Modular Systems
Synthesis of Processor Instruction Sets from High-Level ISA Specifications
An Algorithm for Constructing Optimal Binary Decision Trees
The Neuristor
Stored State Asynchronous Sequential Circuits
Transistor Pulse Circuits for 160-MC Clock Rates
B 74-32 Digital Design
High-Performance Hardware Implementation for RC4 Stream Cipher
Separability - An Approach to Physical Database Design
Statistical Cache Bypassing for Non-Volatile Memory
Scalable Networks-on-Chip with Elastic Links Demarcated by Decentralized Routers
1958 PGEC Membership Survey Report
Theory and Implementation of p-Multiple Sequential Machines
A Flexible Rate Multiplier Circuit with Uniform Pulse Distribution Outputs
Design and Analysis of RSA and Paillier Homomorphic Cryptosystems Using PSO-Based Evolutionary Computation
A Transistor Flip-Flop Full Binary Adder
Complex Integer to Complex Residue Encoding
Enhancing Downlink Performance in Wireless Networks by Simultaneous Multiple Packet Transmission
Tolerating Late Memory Traps in Dynamically Scheduled Processors
Optimal Zero-Aliasing Space Compaction of Test Responses
Application of Bipartite Graphs for Achieving Race-Free State Assignment
Suggested Standard Forms for Certain Real Hadamard Matrices
An Aggregation Technique for the Transient Analysis of Stiff Markov Chains
Advanced Maximal Biclique Enumeration on GPUs Using Bitmaps
Dynamic Scheduling with Service Curve for QoS Guarantee of Large-Scale Cloud Storage
Orthogonal Expansion of Many-Valued Logical Functions and its Application to their Realization with a Single-Threshold Element
1954 IRE National Convention Electronic Computer Session III
The Quasi-Serial Multiplier
A Secure Phase-Encrypted IEEE 802.15.4 Transceiver Design
Concurrent Search and Insertion in AVL Trees
TIE: Fast Experiment-Driven ML-Based Configuration Tuning for In-Memory Data Analytics
Falic: An FPGA-Based Multi-Scalar Multiplication Accelerator for Zero-Knowledge Proof
Automatic Test Pattern Generation with Branch Testing
Mirrored Disk Organization Reliability Analysis
State Reduction in Incompletely Specified Finite-State Machines
Remarks on Base Extension for Modular Arithmetic
Multilevel Design Validation in a Secure Embedded System
CPU Cache Prefetching: Timing Evaluation of Hardware Implementations
Theory of Extended Linear Machines
Comments on "Single-Channel and Multichannel Finite-State Machines"
A Combinatorial Algorithm for Performance and Reliability Analysis Using Multistate Models
Hybrid Search Scheme for Social Networks Supported by Dynamic Weighted Distributed Label Clustering
DAG-Fluid: A Real-Time Scheduling Algorithm for DAGs
An Aging-Aware GPU Register File Design Based on Data Redundancy
The European Logarithmic Microprocesor
R68-53 A System for Interactive Graphical Programming
Lattice-Based Signatures: Optimization and Implementation on Reconfigurable Hardware
Identity-Based Secure DistributedData Storage Schemes
A Perspective on Distributed Computer Systems
Elliptic Curve Cryptography with Efficiently Computable Endomorphisms and Its Hardware Implementations for the Internet of Things
An Analytical Model for Coding-Based Reprogramming Protocols in Lossy Wireless Sensor Networks
Improved Polynomial Multiplication Formulas over $IF 2 $ Using Chinese Remainder Theorem
A Highly Efficient Redundancy Scheme: Self-Purging Redundancy
A Relationship Between Two Types of Two-Layer Threshold-Element Pattern-Recognition Networks
Fault-Tolerant Processor Arrays Using Additional Bypass Linking Allocated by Graph-Node Coloring
Logic Synthesis for Switching Lattices
A Matrix Decomposition Method for Optimal Normal Basis Multiplication
Randomizing Set-Associative Caches Against Conflict-Based Cache Side-Channel Attacks
The Expression Processor: A Pipelined, Multiple-Processor Architecture
On the Use of Residue Arithmetic for Computation
Design Automation for Computer Software
A New Explanation of the Reflected Binary Code
Performance Modeling and Prediction of Nondedicated Network Computing
Faster Public-Key Compression of SIDH With Less Memory
Automated Performance Modeling of HPC Applications Using Machine Learning
Asymptotically Optimal Broadcasting and Gossiping in Faulty Hypercube Multicomputers
Efficient Data-Allocation Scheme for Eliminating Garbage Collection During Analysis of Big Graphs Stored in NAND Flash Memory
Successively Improving Bounds on Performance Measures for Single Class Product Form Queueing Networks
Enhancing Energy Efficiency of Multimedia Applications in Heterogeneous Mobile Multi-Core Processors
Synthesis of Networks with a Minimum Number of Negative Gates
A Probabilistic Approach of Designing More Reliable Logic Gates with Asymmetric Input Faults
Efficient 1-Out-of-n Oblivious Transfer Schemes with Universally Usable Parameters
Optimizing CNN Computation Using RISC-V Custom Instruction Sets for Edge Platforms
A Statistical Theory of Digital Circuit Testability
An Efficient Tree Cache Coherence Protocol for Distributed Shared Memory Multiprocessors
High-Speed Transistorized Adders
Soviet Computer Technologyߞ1959
On Computing the Combinatorial Power of SW-Banyan Networks
Further Comments on "The Reliability of Periodically Repaired n -1/ n Parallel Redundant Systems"
A Mesh-Connected Area-Time Optimal VLSI Multiplier of Large Integers
A Cellular Structure for a Versatile Reed-Solomon Decoder
Concatenation of Functional Test Subsequences for Improved Fault Coverage and Reduced Test Length
The Bottom-Left Bin-Packing Heuristic: An Efficient Implementation
Optimal Reward-Based Scheduling for Periodic Real-Time Tasks
On the Characterization and Optimization of On-Chip Cache Reliability against Soft Errors
A Generalization of the Single b-Bit Byte Error Correcting and Double Bit Error Detecting Codes for High-Speed Memory Systems
Minimizing Retention Induced Refresh Through Exploiting Process Variation of Flash Memory
NCCloud: A Network-Coding-Based Storage System in a Cloud-of-Clouds
A Regular Fault-Tolerant Architecture for Interconnection Networks
Bit-Balance: Model-Hardware Codesign for Accelerating NNs by Exploiting Bit-Level Sparsity
Accuracy Improvements of the Tapped-Potentiometer Function Generators
Design, Implementation and Evaluation of a New Variable Latency Integer Division Scheme
Sequential Machine Identification
A Methodology for the Design of Communication Networks and the Distributuion of Data in Distributed Supercomputer Systems
Parallelization Strategies for DeepMD-Kit Using OpenMP: Enhancing Efficiency in Machine Learning-Based Molecular Simulations
Symbolic Analysis of Programmable Logic Controllers
Two-Factor Data Security Protection Mechanism for Cloud Storage System
Unified Designs for High Performance LDPC Decoding on GPGPU
Built-In Testing of One-Dimensional Unilateral Iterative Arrays
Asynchronous Control Arrays
Boolean Matrix Equations in Digital Circuit Design
A Method of Decision Making in Pattern Recognition
Ultrasonic Holographic Fourier Spectroscopy via Optical Fourier Transforms
Derivation of Minimal Test Sets for Monotonic Logic Circuits
Combinatorial Approach to Multiple Contact Faults Coverage in Programmable Logic Arrays
Shift Register Binary Rate Multipliers
Synthesis of Multilevel Feed-Forward MOS Networks
The Performance Impact of Kernel Prefetching on Buffer Cache Replacement Algorithms
An LSI Implementation of an Intelligent CRC Computer and Programmable Character Comparator
The Bidirectional Double Latch (BDDL)
Evaluation of Optimized CNNs on Heterogeneous Accelerators Using a Novel Benchmarking Approach
Picture Segmentation by Texture Discrimination
A Quantitative Study of the Orientation Bias of Some Edge Detector Schemes
VISE: Combining Intel SGX and Homomorphic Encryption for Cloud Industrial Control Systems
Efficient Service Function Chain Placement Over Heterogeneous Devices in Deviceless Edge Computing Environments
Performability Analysis of Multistate Computing Systems Using Multivalued Decision Diagrams
NOSTalgy: Near-Optimum Run-Time STT-MRAM Quality-Energy Knob Management for Approximate Computing Applications
B74-36 Communication, Transmission, and Transportation Networks
A Hybrid Adaptive Filter for Head Tracking in Augmented Reality (AR)-Based Flight Simulators
R70-1 A Note on Computing Time for the Recognition of Context- Free Languages by a Single-Tape Turing Machine
AAPP: An Accelerative and Adaptive Path Planner for Robots on GPU
Performance Optimization of Many-Core Systems by Exploiting Task Migration and Dark Core Allocation
An Adversarial Robust Behavior Sequence Anomaly Detection Approach Based on Critical Behavior Unit Learning
Midpoints and Exact Points of Some Algebraic Functions in Floating-Point Arithmetic
Partitioned Matrix Algorithms for VLSI Arithmetic Systems
Localized Independent Packet Scheduling for Buffered Crossbar Switches
Highly Scalable Self-Healing Algorithms for High Performance Scientific Computing
Non-Volatile Memory Based Page Swapping for Building High-Performance Mobile Devices
Rules to Manipulate Regular Expressions of Finite Automata
A General, Constructive Approach to Fault-Tolerant Design Using Redundancy
Exponentiation Using Division Chains
Area-Optimized Accurate and Approximate Softcore Signed Multiplier Architectures
Self-Stabilizing Programs: The Fault-Tolerant Capability of Self-Checking Programs
Quantum Support Vector Machine for Classifying Noisy Data
Characterization of I/O Behaviors in Cloud Storage Workloads
Performance Comparison of Graphics Processors to Reconfigurable Logic: A Case Study
Two-Dimensional Digital Filtering and its Error Analysis
A Discrete Optimization Problem in Local Networks and Data Alignment
Reflective Fault-Tolerant Systems: From Experience to Challenges
Design and Performance of Generalized Interconnection Networks
A Multicriteria Approach to Supersystem Architecture Definition
Testing of SoCs with Hierarchical Cores: Common Fallacies, Test Access Optimization, and Test Scheduling
Computer Reduction of Two-Level, Multiple-Output Switching Circuits
Solving Integral Equations on a Repetitive Differential Analyzer
A Minimal Universal Test Set for Self-Test of EXOR-Sum-of-Products Circuits
Parallel Processing with the Perfect Shuffle
A Class of Redundant Path Multistage Interconnection Networks
A Cost-Effective Latency-Aware Memory Bus for Symmetric Multiprocessor Systems
A Simple High-Speed Multiplier Design
Comments on "On the Polynomial Multiplication in Chebyshev Form"
CPU Accounting for Multicore Processors
A Novel Technique for Computing Negabinary Squares
Estimating Error Rate in Defective Logic Using Signature Analysis
Four-Ary Tree-Based Barrier Synchronization for 2D Meshes without Nonmember Involvement
On the Effect of Defect Clustering on Test Transparency and IC Test Optimization
Resource-Saving File Management Scheme for Online Video Provisioning on Content Delivery Networks
Colony: A Privileged Trusted Execution Environment With Extensibility
The Trace Specification of Communications Protocols
Preemptive Scheduling Under Time and Resource Constraints
A Model of Workloads and Its Use in Miss-Rate Prediction for Fully Associative Caches
Comment on "DACO: A High Performance Disk Architecture"
A Technique for Improving the Reliability of Certain Classes of Threshold Elements
Encoding and Decoding of Color Information Using Two-Dimensional Spatial Filtering
Implementation and Performance Evaluation of Computer Families
Low-Cost Concurrent Error Detection for Floating-Point Unit (FPU) Controllers
The Design of Complementary-Output Networks
A Unified Blocking Analysis for Parallel Tasks With Spin Locks Under Global Fixed Priority Scheduling
Tours of Graphs, Digraphs, and Sequential Machines
Roving Emulation as a Fault Detection Mechanism
Automatic Ship Photo Interpretation by the Method of Moments
An O(log n) Dynamic Router-Table Design
Protecting Synchronization Mechanisms of Parallel Big Data Kernels via Logging
A Systematic Method for Modifying March Tests for Bit-Oriented Memories into Tests for Word-Oriented Memories
A Note Extending the Analysis of Two-Head Disk Systems to More General Seek-Time Characteristics
Diagnosis Without Repair for Hybrid Fault Situations
A Conflict-Free Routing Scheme on Multistage Interconnection Networks
Cost-Aware Streaming Workflow Allocation on Geo-Distributed Data Centers
Secure Distributed Deduplication Systems with Improved Reliability
STR: Secure Computation on Additive Shares Using the Share-Transform-Reveal Strategy
Damage Assessment for Optimal Rollback Recovery
Generalized Parallel Redundancy in Digital Computers
A Parallel Radix-4 Fast Fourier Transform Computer
Spiking Generative Adversarial Networks With a Neural Network Discriminator: Local Training, Bayesian Models, and Continual Meta-Learning
A Change-Detection-Based Thompson Sampling Framework for Non-Stationary Bandits
Comments on "Distributed Bayesian Algorithms for Fault-Tolerant Event Region Detection in Wireless Sensor Networks'
Error Correction On-Demand: A Low Power Register Transfer Level Concurrent Error Correction Technique
2 1/2 D High Speed Memory SystemsߝPast, Present, and Future
The Scaling of Digital Differential Analyzers
SPACE: Semi-Partitioned CachE for Energy Efficient, Hard Real-Time Systems
Formal Approach for Verifying Galois Field Arithmetic Circuits of Higher Degrees
SCR Bridge Convertor Computation Using Tensor Methods
Abstraction Techniques for Validation Coverage Analysis and Test Generation
The Simulation of Three Machines Which Read Rows of Handwritten Arabic Numbers
On the Design of Modulo Arithmetic Units Based on Cyclic Groups
Implementation of an Experimental Fault-Tolerant Memory System
A Combinatorial Solution to the Reliability of Interwoven Redundant Logic Networks
Dynamic Multiway Segment Tree for IP Lookups and the Fast Pipelined Search Engine
Bounding Signal Probabilities for Testability Measurement Using Conditional Syndromes
General Shift-Register Sequences of Arbitrary Cycle Length
On the Analysis of Sequential Machines
Packet Broadcast Networks - A Performance Analysis of the R-ALOHA Protocol
Modeling and Analysis of Thermal Covert Channel Attacks in Many-core Systems
Approximation Algorithms for Sensor Deployment
Discrete Convolutions via Mersenne Transrorms
On the Size of Weights Required for Linear-Input Switching Functions
On the Consecutive Retrieval Property in File Organization