yusuke1997/dblp-id-title huggingface dataset:
Service Composition in Opportunistic Networks: A Load and Mobility Aware Solution
Computer Synthesis of Character-Recognition Systems
The Full-Use-of-Suitable-Spares (FUSS) Approach to Hardware Reconfiguration for Fault-Tolerant Processor Arrays
Identification of Equivalent Faults in Logic Networks
Can-Follow Concurrency Control
Hardware Implementation of Unsigned Approximate Hybrid Square Rooters for Error-Resilient Applications
An Overlaying Technique for Solving Linear Equations in Real-Time Computing
Convolutional Transformation and Recovery of Binary Sequences
DR Refresh: Releasing DRAM Potential by Enabling Read Accesses Under Refresh
Transistor Equivalent Circuit in Operational Amplifier Configuration
Scheduling of Real-Time Tasks With Multiple Critical Sections in Multiprocessor Systems
Period-Based Load Partitioning and Assignment for Large Real-Time Applications
Calculation of Mean Shift for a Binary Multiplier Using 2, 3, or 4 Bits at a Time
The Role of a Maintenance Processor for a General-Purpose Computer System
Analysis and Design of CMOS Manchester Adders with Variable Carry-Skip
Nonparametric Estimation of the Bayes Error of Feature Extractors Using Ordered Nearest Neighbor Sets
Comments on "Autocorrelation Function of Sequential M -Bit Words Taken from an N -Bit Shift Register (PN) Sequence"
Doing the Twist: Diagonal Meshes Are Isomorphic to Twisted Toroidal Meshes
A Nonparametric Partitioning Procedure for Pattern Classification
Geographic and Opportunistic Routing for Underwater Sensor Networks
Bound-Set Preserving ROBDD Variable Orderings May Not Be Optimum
Design Verification at the Register Transfer Language Level
Out of Order Incremental CRC Computation
Assignment of Task in a Distributed Processor System with Limited Memory
Prepaging and Applications to Array Algorithms
Performance Analysis of Client-Server Storage Systems
A Parallel Implementation of Montgomery Multiplication on Multicore Systems: Algorithm, Analysis, and Prototype
Failure-Tolerant Sequential Machines with Past Information
On Generalized Reed-Muller Expansions
Criteria for Selecting a Variable in the Construction of Efficient Decision Trees
Tree Parity Machine Rekeying Architectures
Minimum Complexity FIR Filters and Sparse Systolic Arrays
Fault Analysis and Test Generation for Programmable Logic Arrays (PLA's)
Asymtotically Optimal Circuit for a Storage Access Function
Minimum Cost Blocking Problem in Multi-Path Wireless Routing Protocols
Process Scheduling in a Computer System
FPDeep: Scalable Acceleration of CNN Training on Deeply-Pipelined FPGA Clusters
Improved Digital Signature Algorithm
An Extensive Study of Flexible Design Methods for the Number Theoretic Transform
Design of Asynchronous Circuits Assuming Unbounded Gate Delays
A Recursive Paradigm to Solve Boolean Relations
SNAP: Fault Tolerant Event Location Estimation in Sensor Networks Using Binary Data
Multiple-Way Network Partitioning
Deep Learning for HDD Health Assessment: An Application Based on LSTM
Design of a Raster Display Processor for Office Applications
Unate Truth Functions
SCADFA: Combined SCA+DFA Attacks on Block Ciphers with Practical Validations
Mobile Computing with the Rover Toolkit
Fair Flow Control and Fairness Evaluation in Computer Networks and Systems
The HPC-DAG Task Model for Heterogeneous Real-Time Systems
R-70-31 A Generalized Firing Squad Problem
An optimum character recognition system using decision functions
Load Sharing in Distributed Real-Time Systems with State-Change Broadcasts
A Decision Theory Approach to Picture Smoothing
Parametric Design Synthesis of Distributed Embedded Systems
A Research-Oriented Dynamic Microprocessor
The Logical Combination of Punched Paper Tapes
Optimizing the Performance of Virtual Machine Synchronization for Fault Tolerance
Prophet: SSD Failure Analysis and Prediction Guided by Flash Reliability Characteristics in Data Centers
A Unified Reliability Model for Ault-Tolerant Computers
Enabling Efficient Spatio-Temporal GPU Sharing for Network Function Virtualization
A Unified Cryptoprocessor for Lattice-Based Signature and Key-Exchange
Study of the Effects of SEU-Induced Faults on a Pipeline Protected Microprocessor
Dynamic Scheduling Strategies for Firm Semi-Periodic Real-Time Tasks
BaDFL: Mitigating Model Poisoning in Decentralized Federated Learning
Generalized Reed-Muller Forms as a Tool to Detect Symmetries
Adaptive Push-Pull: Disseminating Dynamic Web Data
SOT-MRAM Digital PIM Architecture With Extended Parallelism in Matrix Multiplication
Hardware-Assisted Software Clock Synchronization for Homogeneous Distributed Systems
A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints
Self-Organizing Sensor Networks for Integrated Target Surveillance
The Performance of Multistage Interconnection Networks for Multiprocessors
On Evaluating the Performability of Degradable Computing Systems
Parallel Strategies for SIDH: Toward Computing SIDH Twice as Fast
An Algebraic Language for Distributed Quantum Computing
Analysis and Design of Nonequivalent Multistage Interconnection Networks.
Distributed Interpretation: A Model and Experiment
Flux Reversal in Three-Rung Laddics
MulTa-HDC: A Multi-Task Learning Framework For Hyperdimensional Computing
Is There Any Advantage of Ternary Logic as Compared with Binary?
NV-Journaling: Locality-Aware Journaling Using Byte-Addressable Non-Volatile Memory
Microwave Readout of Ferrite Memory Storage
High-Speed Counter With Novel LFSR State Extension
Computing irredundant normal forms from abbreviated presence functions
Efficient and Robust KPI Outlier Detection for Large-Scale Datacenters
Time-Series Pattern Based Effective Noise Generation for Privacy Protection on Cloud
Design of Memory Sense Amplifiers
FIFA: A Fully Invertible FPGA Architecture to Reduce BTI-Induced Aging Effects
Edge and Curve Detection for Visual Scene Analysis
A Division Method Using a Parallel Multiplier
The Special Features of POLLY: How They Are Used for Automatic Scanning
Bridging and Stuck-At Faults
Diagnosing Arbitrarily Connected Parallel Computers with High Probability
On the Complexity of Table Lookup for Iterative Division
Avoiding Latch Formation in Regular Expression Recognizers
A Decentralized Mechanism Based on Differential Privacy for Privacy-Preserving Computation in Smart Grid
BlockCompass: A Benchmarking Platform for Blockchain Performance
Computing Floating-Point Square Roots via Bivariate Polynomial Evaluation
The Parallel Recognition of Classes of Graphs
Load Balancing in a Hybrid ATPG Environment
Vector Floating-Point Data Format
Supersystems: Technology and Architecture
Provably Secure Key-Aggregate Cryptosystems with Broadcast Aggregate Keys for Online Data Sharing on the Cloud
Itinerary-Based Mobile Agent as a Basis for Distributed OSGi Services
The IBM System/370 Vector Architecture: Design Considerations
A Note on the Complexity of Dijkstra's Algorithm for Graphs with Weighted Vertices
Adaptive Power Management for Environmentally Powered Systems
Characteristics of Prototype CMOS Quaternary Logic Encoder-Decoder Circuits
A Threshold Selection Technique
Efficient 2-Approximation Algorithms for Computing 2-Connected Steiner Minimal Networks
Effective Cost Reduction for Elastic Clouds under Spot Instance Pricing Through Adaptive Checkpointing
A Coordinated Location Policy for Load Sharing in Hypercube-Connected Multicomputers
Information Processing by Data Interrogation
Data Hiding in 2-Color Images
Active Management of Data Caches by Exploiting Reuse Information
Preliminary Specification of Spline Curves
A Fast Binary Adder with Conditional Carry Generation
Comments on "A Study of Odd Graphs as Fault-Tolerant Interconnection Networks"
On Little's Digital Filtering Algorithm
Rethinking RAID-5 Data Layout for Better Scalability
BAFL: A Blockchain-Based Asynchronous Federated Learning Framework
Nonscan Design for Testability for Synchronous Sequential Circuits Based on Conflict Resolution
Self-Checking Comparator with One Periodic Output
Modified Low-Density MDS Array Codes for Tolerating Double Disk Failures in Disk Arrays
DIRECT - A Multiprocessor Organization for Supporting Relational Database Management Systems
Analysis of an Information System Model with Transfer Penalties
Functional Description of Connector-Switch-Attenuator Networks
R68-10 SODAS and a Methodology for System Design
An Algebra for Logic Systems - Switching Circuits Application
Taylor Expansion Diagrams: A Canonical Representation for Verification of Data Flow Designs
Qubit Mapping Based on Subgraph Isomorphism and Filtered Depth-Limited Search
A Fault-Tolerant Scheduling Algorithm for Real-Time Periodic Tasks with Possible Software Faults
The Request Reply Family of Group Routing Protocols
Single Shift-Register Realizations for Sequential Machines
Novas: Tackling Online Dynamic Video Analytics With Service Adaptation at Mobile Edge Servers
Analysis of an Adaptive Threshold Logic Unit
Extending On-Chain Trust to Off-Chain - Trustworthy Blockchain Data Collection Using Trusted Execution Environment (TEE)
Enabling HW-Based Task Scheduling in Large Multicore Architectures
Fault-Tolerant Mobile Agent Execution
Digital Real-Time Spectral Analysis
Combined Fault and DPA Protection for Lattice-Based Cryptography
Note on Hazard Elimination
Concurrency Extraction via Hardware Methods Executing the Static Instruction Stream
Hazard Correction in Asynchronous Sequential Circuits Using Inertial Delay Elements
Factors Affecting the Efficiency of A Virtual Memory
Test Data Compression and Test Resource Partitioning for System-on-a-Chip Using Frequency-Directed Run-Length (FDR) Codes
Loop Restructuring for Data I/O Minimization on Limited On-Chip Memory Embedded Processors
A New Approach to the Fault Location of Combinational Circuits
An Empirical Study of Automatic Restructuring of Nonnumerical Programs for Parallel Processors
Dynamic circuit techniques used in SEAC and DYSEAC
The Distributed Pipeline
Clisp: Conversational Lisp
Computer-Aided Test Generation for Four-Phase MOS LSI Circuits
Regular Events in Stochastic Sequential Machines
An Optimal Fixed-Priority Assignment Algorithm for Supporting Fault-Tolerant Hard Real-Time Systems
Learning Probabilistic RAM Nets Using VLSI Structures
Performance of Two-Disk Failure-Tolerant Disk Arrays
Improved Decimal Floating-Point Logarithmic Converter Based on Selection by Rounding
TurboGNN: Improving the End-to-End Performance for Sampling-Based GNN Training on GPUs
Dynamic Core Allocation and Packet Scheduling in Multicore Network Processors
Checking Big Suffix and LCP Arrays by Probabilistic Methods
An Alternative Definition for "Neighborhood of a Point"
Comments on "An Efficient Homomorphic MAC with Small Key Size for Authentication in Network Coding"
A Branch and Bound Algorithms for Computing k-nearest Neighbors
The Organization of Permutation Architectures with Bused Interconnections
DFT Computation Using Gauss-Eisenstein Basis: FFT Algorithms and VLSI Architectures
Cryptanalysis with COPACOBANA
Fault-Tolerant Techniques to Minimize the Impact of Crosstalk on Phase Encoded Communication Channels
The Fat-Pyramid and Universal Parallel Computation Independent of Wire Delay
Detection of Total or Partial Symmetry of a Switching Function with the Use of Decomposition Charts
TSAC: Enforcing Isolation ofVirtual Machines in Clouds
Guest Editors' Introduction: Field Programmable Logic and Applications
Prefix and Interval-Partitioned Dynamic IP Router-Tables
Cycle-Efficient LFSR Implementation on Word-Based Microarchitecture
Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
Adaptive Resource Provisioning for the Cloud Using Online Bin Packing
nDirect2: A High-Performance Library for Direct Convolutions on Multicore CPUs
State Assignment of Asynchronous Sequential Machines Using Graph Techniques
The Size of BDDs and Other Data Structures in Temporal Logics Model Checking
A Delay Line and Logic Circuits Utilizing Charge-Storage Subharmonic Parametric Oscillators
Enhancing Simulation Accuracy through Advanced Hazard Detection in Asynchronous Circuits
A Low Complexity and Long Period Digital Random Sequence Generator Based on Residue Number System and Permutation Polynomial
Hierarchical Routing and Flow Control Policy (HRFC) for Packet Switched Networks
A Ternary Memory Element Using a Tunnel Diode
Dynamic Antenna Management for Uplink Energy Efficiency on 802.11n Mobile Devices
Automatic Generation of System-Level Test for Un-Core Logic of Large Automotive SoC
Deep Learning Operators Performance Tuning for Changeable Sized Input Data on Tensor Accelerate Hardware
How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs
The Complexity of Biological Computers
Comments on "An Additional Algorithm for a System of Coupled Algebraic Matrix Riccati Equations"
R68-9 A Computer Simulation of Electrical Loss and Loading Effect in Magnetic Recording
Comments on "Generalization of Consensus Theory and Application to the Minimization of Boolean Functions"
Systems Support for Preemptive Disk Scheduling
A Computer Aided Procedure for Performing Static Loading Validation of Digital Logic Systems
Scheduling Periodic Continuous Queries in Real-Time Data Broadcast Environments
Maximizing P2P File Access Availability in Mobile Ad Hoc Networks though Replication for Efficient File Sharing
Microprogramming: A Tutorial and Survey of Recent Developments
A Fault-Tolerant Protocol for Energy-Efficient Permutation Routing in Wireless Networks
Measurement-Based Analysis of Error Latency
Improvement Algorithms for Semijoin Query Processing Programs in Distributed Database Systems
NC Algorithms for Recognizing Chordal Graphs and k Trees
ALAMNI: Adaptive LookAside Memory Based Near-Memory Inference Engine for Eliminating Multiplications in Real-Time
Near-Precise Parameter Approximation for Multiple Multiplications on a Single DSP Block
Experiments in the Contextual Recognition of Cursive Script
A Remark on Code Sets and Context-Free Languages
GF(2^m) Multiplication and Division Over the Dual Basis
Design and Analysis of Approximate Compressors for Multiplication
A Unified Architecture for the Accurate and High-Throughput Implementation of Six Key Elementary Functions
A Note on the Simultaneous-Carry-Generation System for High-Speed Adders
MC-Fluid: Multi-Core Fluid-Based Mixed-Criticality Scheduling
Locating Object Boundaries in Textured Environments
Asynchronous Unit Delays
Analytical Estimation of Vector Access Performance in Parallel Memory Architectures
Dictionary Machines for Different Models of VLSI
Continuity and Realizability of Sequence Transformations
DeepP: Deep Learning Multi-Program Prefetch Configuration for the IBM POWER 8
Line Digraph Iterations and Connectivity Analysis of de Bruijn and Kautz Graphs
Hardware-Based Generation of Independent Subtraces of Instructions in Clustered Processors
A Reservation-Based Algorithm for Scheduling Both Periodic and Aperiodic Real-Time Tasks
Tolerance to Multiple Transient Faults for Aperiodic Tasks in Hard Real-Time Systems
Multiprocessor Scheduling with Memory Allocation - A Deterministic Approach
New Region-Based Algorithms for Deriving Bounded Petri Nets
A Counter Example to an Assertion of Jackson
A Multiple-Valued Reed-Muller Transform for Incompletely Specified Functions
Design Considerations for Ultra-Low Energy Wireless Microsensor Nodes
A Survey of Regular Expressions and Their Applications
Hybrid Analog-Digital Random-Noise Generation
Fault-Tolerant Asynchronous Networks
Worst-Case Diagnosis Completeness in Regular Graphs under the PMC Model
An Extension of Eklundh's Matrix Transposition Algorithm and Its Application in Digital Image Processing
Minimal mesh embeddings in binary hypercubes
A Method of Determining the Number of Vertices Contained in the SC Network Corresponding to a Given SC Transmission Function
XeFlow: Streamlining Inter-Processor Pipeline Execution for the Discrete CPU-GPU Platform
Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices
Terminal Properties of Toroidal Cores with Circular Cross Sections
Finding Events in a Sea of Bubbles
Evaluation of Large Integer Multiplication Methods on Hardware
The Inhibition of Potential Parallelism by Conditional Jumps
Off-the-Hook: An Efficient and Usable Client-Side Phishing Prevention Application
An Extension of Threshold Logic
Sorting Large Files on a Backend Multiprocessor
Adaptation of Reputation Management Systems to Dynamic Network Conditions in Ad Hoc Networks
Exploiting Stream Request Locality to Improve Query Throughput of a Data Integration System
The Construction of Binary Matrices with Distinct Submatrices
Efficient m-Ary Balanced Codes which Are Invariant under Symbol Permutation
The Reliability of Memory with Single-Error Correction
Accuracy of an Analog Computer
Decimal Floating-Point Multiplication
A Checkpointing Page Store for Write-Once Optical Disk
Exploring the Design Space of Fair Scheduling Supports for Asymmetric Multicore Systems
Acceleration of Timing-Aware Gate-Level Logic Simulation Through One-Pass GPU Parallelism
An Efficient Jacobi-like Algorithm for Parallel Eigenvalue Computation
A Design Technique for Pedestal-Free Switching Circuits
Optimization of Constant Matrix Multiplication with Low Power and High Throughput
MuSA: Multivariate Sampling Algorithmfor Wireless Sensor Networks
Evaluating GPU's Instruction-Level Error Characteristics Under Low Supply Voltages
Redundant Logarithmic Arithmetic
Pipelined Statistical Cipher Feedback: A New Mode for High-Speed Self-Synchronizing Stream Encryption
Performance Optimization of a CSMA Protocol for Local Computer Networks
A Survey of Some Recent Contributions to Computer Arithmetic
Architecture of a Programmable Digital Signal Processor
Precise Dynamic Symbolic Execution for Nonuniform Data Access in Smart Contracts
Optimization and Simulation of Two Classes of Nonresetting Data Reconstructors
SIFT: Low-Complexity Energy-Efficient Information Flow Tracking on SMT Processors
Realization of Stochastic Automata
An Improved Bound for Checking Experiments that Use Simple Input-Output and Characterizing Sequences
On Analog Computer Generation of Continuous Functions
FPGA-Accelerated Range-Limited Molecular Dynamics
Quotient Networks
N-Fail-Safe Logical Systems
Techniques of Program Execution with a Writable Control Memory
A Benchmark Parallel Sort for Shared Memory Multiprocessors
A Note on Contact Networks for Switching Functions of Four Variables
Double-Data-Rate Computation as a Countermeasure against Fault Analysis
The Synthesis of Boolean Functions Using a Single rrhreshold Element
A Survey of Analog Memory Devices
Multidimensional Linear Iterative Circuits - General Properties
Binary Integer Decimal-Based Floating-Point Multiplication
Easily Testable Multiple-Valued Logic Circuits Derived from Reed-Muller Circuits
RT-PLRU: A New Paging Scheme for Real-Time Execution of Program Codes on NAND Flash Memory for Portable Media Players
A Decomposition Chart Technique to Aid in Realizations with Multiplexers
Accelerating Deep Learning Systems via Critical Set Identification and Model Compression
Improving 3D DRAM Fault Tolerance Through Weak Cell Aware Error Correction
Multiway Splitting Method for Toeplitz Matrix Vector Product
An Optical Bus-Based Distributed Dynamic Barrier Mechanism
Parallel Binary Adders with a Minimum Number of Connections
Towards High Performance and Efficient Memory Deduplication via Mixed Pages
Distributed Reconfiguration Strategies for Fault-Tolerant Multiprocessor Systems
Comment on NOR-NAND Synthesis
HARL: Optimizing Parallel File Systems with Heterogeneity-Aware Region-Level Data Layout
A Method of Producing a Boolean Function Having an Arbitrarily Prescribed Prime Implicant Table
Hybrid Fault Diagnosability with Unreliable Communcation Links
The Performance of Crossbar-Based Binary Hypercubes
A Note on Embedding Nonlinear Machines
Certification of Computational Results
A Well-Defined Estelle Specification for the Automatic Test Generation
Loading of Decoder Drivers
General Criterion for Essential Nonfault Locatability of Logical Functions
Clock Synchronization in Distributed Real-Time Systems
An Optimal Orthogonal Expansion for Classification of Patterns
Energy-Efficient Real-Time Multicast Routing in Mobile Ad Hoc Networks
Minimal Square Rooting
Vector Integrators
Adaptive Cache Coherence Mechanisms with Producer-Consumer Sharing Optimization for Chip Multiprocessors
On the State Minimization of Nondeterministic Finite Automata
A Comparison of Seven Techniques for Choosing Subsets of Pattern Recognition Properties
A Cognitive TCP Design for a Cognitive Radio Network with an Unstable-Bandwidth Link
Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge
New Measures of Testability and Test Complexity for Linear Analog Failure Analysis
Formal Reliability Analysis Using Theorem Proving
A Combinatorial Algorithm for Solving Covering Problems
Determination of Probabilistic Grammars for Functionally Specified Probability-Measure Languages
On the Design of Mutually Aware OptimalPricing and Load Balancing Strategiesfor Grid Computing Systems
On Two-Dimensional Via Assignment for Single-Row Routing
A Shiftrix for High-Speed Multiplication
Performance Analysis of a Generalized Concurrent Error Detection Procedure
Variability-Aware Task Allocation for Energy-Efficient Quality of Service Provisioning in Embedded Streaming Multimedia Applications
Optimizing Data Placement on GPU Memory: A Portable Approach
A Homogeneous Architecture for Power Policy Integration in Operating Systems
Comment on "Computer Simulation of Pulse Propagation Through a Periodic Loaded Transmission Line" 1
MMDataLoader: Reusing Preprocessed Data Among Concurrent Model Training Tasks
Asynchronous Sequential Machines Designed for Fault Detection
Novel Lagrange Multipliers-Driven Adaptive Offloading for Vehicular Edge Computing
A High-Bandwidth Memory Pipeline for Wide Issue Processors
Efficient Encoding Schedules for XOR-Based Erasure Codes
Extended Multipoint Relays to Determine Connected Dominating Sets in MANETs
Designing Fast and Scalable XACML Policy Evaluation Engines
An A Priori Approach to the Evaluation of Signature Analysis Efficiency
Decompositions of Logical Functions Using Majority Decision Elements
A Method for Minimizing Incompletely Specified Sequential Machines
Utility-Based Exploration for Performance Enhancement in Opportunistic Mobile Networks
A Unified Analytical Expression for Aliasing Error Probability Using Single-Input
Another Comment on "Negative Radix Conversion"
A Chip-Multiprocessor Architecture with Speculative Multithreading
Performance of Unbuffered Shuffle-Exchange Networks
A Clustering Approximation Technique for Queueing Network Models with a Large Number of Chains
Sky-Sorter: A Processing-in-Memory Architecture for Large-Scale Sorting
Some Existence Theorems for Probabilistically Diagnosable Systems
Redio: Accelerating Disk-Based Graph Processing by Reducing Disk I/Os
Magnetostrictive Delay Lines
Optimization of Reference Signals for Character Recognition Systems
Architecture Support for Tightly-Coupled Multi-Core Clusters with Shared-Memory HW Accelerators
Error Control and Energy Consumption in Communications for Nomadic Computing
Sequentially t-Diagnosable Systems: A Characterization and Its Applications
The Optimal Control of Heterogeneous Queueing Systems: A Paradigm for Load-Sharing and Routing
PRS: A Pattern-Directed Replication Scheme for Heterogeneous Object-Based Storage
A Scalable Architecture for Modular Multiplication Based on Montgomery's Algorithm
New Applications of an Electronic Function Generator
BASEMENT: An Architecture and Methodology for Distributed Automotive Real-Time Systems
Producing Reliable Initialization and Test of Sequential Circuits with Pseudorandom Vectors
Efficient Multicast Key Distribution Using HOWP-Based Dynamic Group Access Structures
Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional Logic
VEGa: A High Performance Vehicular Ethernet Gateway on Hybrid FPGA
A Visual Image Processor
The Reliability of Voting Mechanisms
Comment on the Sequential and Indeterminate Behavior of an End-Around-Carry Adder
Microarchitectural Attacks and Mitigations on Retire Resources in Modern Processors