yusuke1997/dblp-id-title huggingface dataset:
On the Impossible Class of Faulty Functions in Logic Networks Under Short Circuit Faults
A Performance Analysis Methodology for Multicore, Multithreaded Processors
A Scale Factor Correction Scheme for the CORDIC Algorithm
Techniques for Computing the Discrete Fourier Transform Using the Quadratic Residue Fermat Number Systems
A Quantitative Analysis of the Utilization of Associative Memories in Data Management
Comment on Generic Universal Switch Blocks
Undirected Graph Models for System-Level Fault Diagnosis
Synergistic Memory Optimisations: Precision Tuning in Heterogeneous Memory Hierarchies
Efficient Hardware Implementations of BRW Polynomials and Tweakable Enciphering Schemes
A Bidirectional Associative Memory Based on Optimal Linear Associative Memory
Measuring Benchmark Similarity Using Inherent Program Characteristics
Fault-Tolerant Asynchronous Networks Using Read-Only Memories
Memory Hierarchy Configuration Analysis
A Synchronization-Based Hybrid-Memory Multi-Core Architecture for Energy-Efficient Biomedical Signal Processing
An In-Module Disturbance Barrier for Mitigating Write Disturbance in Phase-Change Memory
P2EDAS: Asynchronous, Distributed Event Driven Simulation Algorithm with Inconsistent Event Preemption for Accurate Execution of VHDL Descriptions on Parallel Processors
Comment on "An Improved Algorithm for the Generation of Nonparametric Curves"
A Reconfiguration Algorithm for a Double-Loop Token-Ring Local Area Network
DIPER: Detection and Identification of Pathogens Using Edit Distance-Tolerant Resistive CAM
Query Indexing and Velocity Constrained Indexing: Scalable Techniques for Continuous Queries on Moving Objects
Pipelined Decision Tree Classification Accelerator Implementation in FPGA (DT-CAIF)
An Evaluation of Multiple-Disk I/O Systems
A Systolic Power-Sum Circuit for GF(2^m)
On Linear Dependencies in Subspaces of LFSR-Generated Sequences
An Automatic Acoustic Ray Tracing Computer
Memory and Bus Conflict in an Array Processor
The Extended Cube Connected Cycles: An Efficient Interconnection for Massively Parallel Systems
Trends in Artificial Intelligence
CIMUS: 3D-Stacked Computing-in-Memory Under Image Sensor Architecture for Efficient Machine Vision
Subquadratic Space Complexity Multiplier Using Even Type GNB Based on Efficient Toeplitz Matrix-Vector Product
The Design of Error Checkers for Self-Checking Residue Number Arithmetic
On Linear Skewing Schemes and d-Ordered Vectors
Programmed Algorithms to Compute Tests to Detect and Distinguish Between Failures in Logic Circuits
EAD and PEBD: Two Energy-Aware Duplication Scheduling Algorithms for Parallel Tasks on Homogeneous Clusters
Group Key Agreement Efficient in Communication
Switch MSHR: A Technique to Reduce Remote Read Memory Access Time in CC-NUMA Multiprocessors
Exact Routing with Search Space Reduction
Diagnosis of Short-Circuit Faults in Combinational Circuits
PC-OPT: Optimal Offline Prefetching and Caching for Parallel I/O Systems
The Automatic Sequencing of Block-Operators in the Digital Simulation of Analog and Analog-Hybrid Computers
Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes
Instruction Cache Replacement Policies and Organizations
Throughput-Buffering Trade-Off Exploration for Cyclo-Static and Synchronous Dataflow Graphs
B72-23 Modem Data Processors and Systems
A Counter Architecture for Online DVFS Profitability Estimation
Segmented Tag Cache: A Novel Cache Organization for Reducing Dynamic Read Energy
A Low-Cost Mechanism Exploiting Narrow-Width Values for Tolerating Hard Faults in ALU
Exception Handling and Software Fault Tolerance
Utility Accrual Real-Time Scheduling Under the Unimodal Arbitrary Arrival Model with Energy Bounds
An Improved Algorithm for Testing the Planarity of a Graph
Linearly Separable Codes for Adaptive Threshold Networks
Test Point Placement to Simplify Fault Detection
The Analysis of Radiographic Images
Efficient Protection of the Register File in Soft-Processors Implemented on Xilinx FPGAs
Left-to-Right Optimal Signed-Binary Representation of a Pair of Integers
On the Computational Aspects of Performability Models of Fault-Tolerant Computer Systems
Algebraic Fault Analysis for Constrained Combinational Networks
Generating Essential Primes for a Boolean Function with Multiple-Valued Inputs
A DRAM/SRAM Memory Scheme for Fast Packet Buffers
On the Implementation of Arithmetic Support Functions for Generalized Signed-Digit Number Systems
Transparent Real-Time Task Scheduling on Temporal Resource Partitions
Concurrent Access of Priority Queues
Program Suitability for Parallel Processing
Shortest Path Tree Computation in Dynamic Graphs
Parallel Task Execution in a Decentralized System
An Efficient Memetic Algorithm for theMax-Bisection Problem
An Integrated Approach to Design of Protocol Specifications Using Protocol Validation and Synthesis
Dissent in a Majority Voting System
Belief-Propagation-Assisted Scheduling in Input-Queued Switches
A Digital System of Simultaneous Addition of Several Binary Numbers
A transistorized pulse code modulator
Compensation for Truncation Errors in Accumulative Addition Using Random Methods
Generation of Prime Implicants by Direct Multiplication
ClusPar: A Game-Theoretic Approach for Efficient and Scalable Streaming Edge Partitioning
Concurrent Logic Programming as a Hardware Description Tool
Utility Accrual Channel Establishment in Multihop Networks
Request Flow Coordination for Growing-Scale Solid-State Drives
New Hardware Realizations of Nonrecursive Digital Filters
Coordinated En-Route Web Caching in Multiserver Networks
Memory Hierarchy Considerations for Cost-Effective Cluster Computing
Combining Queueing Networks and Generalized Stochastic Petri Nets for the Solution of Complex Models of System Behavior
A Reactive and Scalable Unicast Solution for Video Streaming over VANETs
Note on Circuits and Chains of Spread k in the n-Cube
On Tree Circuits
Schedulability Analysis of DeferrableScheduling Algorithms for MaintainingReal-Time Data Freshness
Improving Memory Encryption Performance in Secure Processors
Evaluating Design Choices for Shared Bus Multiprocessors in a Throughput-Oriented Environment
Conditional Identity-Based Broadcast Proxy Re-Encryption and Its Application to Cloud Email
Progressive Transaction Recovery in Distributed DB/DC Systems
Optimal Fuzzy Partitions: A Heuristic for Estimating the Parameters in a Mixture of Normal Distributions
Progressive Refinement of Raster Images
Notes on Shuffel/Exchange-Type Switching Networks
High-Density Magnetic Head Design for Noncontact Recording
Generalization of Consensus Theory and Application to the Minimization of Boolean Functions
Asynchronous Control Based Aggregation Transport Protocol for Distributed Deep Learning
Autocorrelation Function of Sequential M -Bit Words Taken from an N -Bit Shift Register (PN) Sequence
A Fast Coincident Current Magnetic Core Memory
Construction of Reed-Solomon Erasure Codes With Four Parities Based on Systematic Vandermonde Matrices
Fast, Deterministic Routing, on Hypercubes, Using Small Buffers
Probabilistic Automata with Monitored Final State Sets
Machine Complexity Versus Interconnection Complexity in Iterative Arrays
Analog Computation of Green's Function for Integrating Two-Point Boundary Value Problems
Magnitude of Cross-Coupling Noise in Digital Multiwire Transmission Lines
High-Performance Constant-Time Discrete Gaussian Sampling
Modular Tree Structures
A Systolic Architecture for Fast Dense Matrix Inversion
A Resource Efficient Software-Hardware Co-Design of Lattice-Based Homomorphic Encryption Scheme on the FPGA
Arithmetic Error Codes: Cost and Effectiveness Studies for Application in Digital System Design
Optimal and Practical Algorithms for Sorting on the PDM
Exploiting Asymmetric Errors for LDPC Decoding Optimization on 3D NAND Flash Memory
Working Time in Repetitive Analog Computers
Broadcast Channels in Estelle
Efficient CSMA/CD-Based Protocols for Multiple Priority Classes
DEP+BURST: Online DVFS Performance Prediction for Energy-Efficient Managed Language Execution
Credit Risk Analysis Using Quantum Computers
Autor's Replay and Comments on the Arithmetic Codes Generated by A = ( r - 1) p 2
Bit-Serial and Bit-Parallel Montgomery Multiplication and Squaring over GF(2^m)
Priority Inheritance Protocols: An Approach to Real-Time Synchronization
Optimal Recopnfiguration Strategies for Reconfigurable Computer Systems with no Repair
Analysis & Design of Convolution Operator for High Speed and High Accuracy Convolutional Neural Network-Based Inference Engines
An Optimal Illumination Region Algorithm for Convex Polygons
A Class of Push-Down Acceptors for Adjunct Languages
B73-10 Time Sharing Systems
On a Class of Rearrangeable Networks
A Graphics Parallel Memory Organization Exploiting Request Correlations
A Secure and Robust Knowledge Transfer Framework via Stratified-Causality Distribution Adjustment in Intelligent Collaborative Services
An Approach to the Assignment of Input Codes
Exploiting the Benefits of Multiple-Path Network DSM Systems: Architectural Alternatives and Performance Evaluation
Delay-Free Asynchronous Circuits with Constrained Line Delays
A New Control Circuit for Asynchronous Micropipelines
A Computing Machine Based on Tree Structures
Digit Selection for SRT Division and Square Root
Multivalued Logic and Fuzzy Logic - Their Relationship, Minimization, and Application to Fault Diagnosis
Guest Editorial: Special Issue on Reliable Distributed Systems
CPAC - Concurrent Processor Architecture for Control
Scalable Node-Level Computation Kernels for Parallel Exact Inference
At-Speed Distributed Functional Testing to Detect Logic and Delay Faults in NoCs
Comments on "A Nonlinear Mapping for Data Structure Analysis"
Demand-Driven Interpretation of FP Programs on a Data-Flow Multiprocessor
MarCNNet: A Markovian Convolutional Neural Network for Malware Detection and Monitoring Multi-Core Systems
Reduction of the Number of Columns in Flow Table Minimization
Architectural Support for Uniprocessor and Multiprocessor Active Memory Systems
A Neural Network-Based On-Device Learning Anomaly Detector for Edge Devices
Sorting n Objects with a K-Sorter
Optimal and Heuristic Application-Aware Oblivious Routing
Comments on "A Stable, Two-Multiplies-per-Cycle Algorithm for Digital Generation of Sinusoids in Real Time"
Integrated Row and Column Rerouting for Reconfiguration of VLSI Arrays with Four-Port Switches
A Memory-Efficient and Modular Approach for Large-Scale String Pattern Matching
A Framework for Design, Verification, and Management of SoC Access Control Systems
Bounds on Threshold Gate Realizability
Low Complexity Cubing and Cube Root Computation over F 3 m in Polynomial Basis
Comments on "A Multiaccess Frame Buffer Architecture"
Phantasy: Low-Latency Virtualization-Based Fault Tolerance via Asynchronous Prefetching
Current Build-Up in Avalanche Transistors with Resistance Loads
A Fault-Tolerant Distributed Channel Allocation Scheme for Cellular Networks
The L.0 Language and Environment for Protocol Simulation and Prototyping
A Novel Cryptoprocessor Architecture for the McEliece Public-Key Cryptosystem
Numerical Similarity and Dissimilarity Measures Between Two Trees
High-Throughput Compact Delay-Insensitive Asynchronous NoC Router
The Gamma Network
Testable Sequential Cellular Arrays
Comments on "Experimental Study of a New Method of Time Delay for Analog Computers"
A BDD-Based Algorithm for Analysis of Multistate Systems with Multistate Components
Systematic Data Placement Optimization in Multi-Cloud Storage for Complex Requirements
Probabilistic Treatment of General Combinational Networks
Randomize the Running Function When It Is Disclosed
Constant Time Sorting on Reconfigurable Meshes
Synthesis of Switching Functions by Threshold Elements
Single-Parameter Solutions for Flip-Flop Equations
Global Transformations in Pattern Recognition of Bubble Chamber Photographs
Improving Read Performance of NAND Flash SSDs by Exploiting Error Locality
Scalable Suffix Sorting on a Multicore Machine
BAGC: Buffer-Aware Garbage Collection for Flash-Based Storage Systems
A New Basis for Shifters in General-Purpose Processors for Existing and Advanced Bit Manipulations
On Finding a Nearly Minimal Set of Fault Detection Tests for Combinational Logic Nets
Deadlock Avoidance Algorithms for Recursion-Tree Modeled Requests in Parallel Executions
Sliding Mode Congestion Control for Data Center Ethernet Networks
A Hierarchical Modeling and Analysis for Grid Service Reliability
ELM-A Fast Addition Algorithm Discovered by a Program
Ordering of Connections for Automated Routing
A. Higher Radix Technique for Fault Detection in Many-Valued Multithreshold Networks
A Simple Method for Determining Hadamard Sequency Vectors
Optimization Problems in Throwbox-Assisted Delay Tolerant Networks: Which Throwboxes to Activate? How Many Active Ones I Need?
(t, k)-Diagnosis for Component-Composition Graphs under the MM* Model
Feedback in Homomorphic Realizations
Supersingular Isogeny Key Encapsulation (SIKE) Round 2 on ARM Cortex-M4
Synthesis of Linear Sequential Machines with Unspecifed Outputs
On the Schur Decomposition of a Matrix for Parallel Computation
Transistor Current Switching and Routing Techniques
Testing Random Number Generators by Walsh Transform
Embedding Computation in One-Dimensional Automata by Phase Coding Solitons
The Effect of Asynchronous Inputs on Sequential Network Reliability
R68-45 Electrically Alterable Digital Differential Analyzer
Serial Binary-to-Decimal and Decimal-to-Binary Conversion
Simulation and Implication Using a Transfer Function Model for Switching Logic
A Multiaccess Associative Memory
Performance Analysis of a Multiprocessor-Based Packet Switch in Networks with Link-Level Sliding-Window Flow Control
Realizing Common Communication Patterns in Partitioned Optical Passive Stars (POPS) Networks
Orchestrating Horizontal Parallelism and Vertical Instruction Packing of Programs to Improve System Overall Efficiency
CROSC: Compilation-Runtime Joint Optimization for Fast Smart Contract Execution
Probabilistically-Atomic 2-Atomicity: Enabling Almost Strong Consistency in Distributed Storage Systems
Signal Flow Graph and a Fortran Program for Haar-Fourier Transform
A Note on the Computational Cost of the Linearizer Algorithm for Queueing Networks
A Graph-Based Unified Technique for Computing and Representing Coefficients over Finite Fields
Tandem Networks of Universal Cells
Acceptable Testing of VLSI Components Which Contain Error Correctors
Some Remarks on State Reduction of Asynchronous Circuits by the Paull-Unger Method
Synthesis of Asynchronous Sequential Circuits with Multiple-Input Changes
Instruction Level Timing Mechanisms for Accurate Real-Time Task Scheduling
Analytically Modeling a Fault-Tolerant Messaging Protocol
Receiving Buffer Adaptation for High-Speed Data Transfer
Error Correction in Redundant Residue Number Systems
Computation of 2D 8×8 DCT Based on the Loeffler Factorization Using Algebraic Integer Encoding
Edge-Directed Hardware Architecture for Real-Time Disparity Map Computation
An Algorithm for Evaluating the Frequency of a Rotating Vector
A Realization Algorithm Using Three-Input Majority Elements
Practical Scheduling of Bag-of-Tasks Applications on Grids with Dynamic Resilience
Negative-Bit-Weight Codes and Excess Codes
Design and Analysis of Master/Slave Multiprocessors
Some New Types of Logical Completeness
Minimization of Reed-Muller Canonic Expansion
Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation
Hardware Support for Accelerating Data Movement in Server Platform
Design and Analysis of an Optimal Instruction-Retry Policy for TMR Controller Computers
Concurrent Error Detection and Correction in Gaussian Normal Basis Multiplier over GF(2^m)
Malwise - An Effective and Efficient Classification System for Packed and Polymorphic Malware
Sequential Evaluation of Boolean Functions
Branch Strategies: Modeling and Optimization
A Theorem on Linear Automata
Solution of an Open Problem on Probabilistic Grammars
A Numerical Variability Approach to Results Stability Tests and Its Application to Neuroimaging
Network Variation and Fault Tolerant Performance Acceleration in Mobile Devices with Simultaneous Remote Execution
A Simple Procedure to Generate Optimum Test Patterns for Parity Logic Networks
Detection of Thermal Covert Channel Attacks Based on Classification of Components of the Thermal Signal Features
On the Representation of Arbitrary Functions and Their Generation
A Fast Lock for Explicit Message Passing Architectures
Efficient Encoding/Decoding for Second-Order Spectral-Null Codes by Reducing Random Walks
ROSE: A Novel Flash Translation Layer for NAND Flash Memory Based on Hybrid Address Translation
Orthogonal Functions for the Logical Design of Switching Circuits
Dynamic Tolerance Region Computing for Multimedia
Estimation and Enhancement of Real-Time Software Reliability Through Mutation Analysis
A Data Compression Technique for Built-In Self-Test
Analysis Techniques for SIMD Machine Interconnection Networks and the Effects of Processor Address Masks
A Fault-Tolerant Mapping Scheme for a Configurable Multiprocessor System
MDC+: A Cooperative Approach to Memory-Efficient Fork-Based Checkpointing for In-Memory Database Systems
Self-Stabilizing Clustering of Tree Networks
Disk Allocation Methods Using Error Correcting Codes
SSD-Assisted Ransomware Detection and Data Recovery Techniques
The Performance of Counter- and Correlation-Based Schemes for Branch Target Buffers
On Distributed Fault-Tolerant Detection in Wireless Sensor Networks
Improved Schedulability Analysis Using Carry-In Limitation for Non-Preemptive Fixed-Priority Multiprocessor Scheduling
Engineering Description of the Electro Data Digital Computer
The Effects of Latent Faults on Highly Reliable Computer Systems
On Optimizing Diameter and Average Distance of Directed Interconnected Networks
Concurrent Detection of Software and Hardware Data-Access Faults
Base 3 vs Base 2 Synchronous Arithmetic Units
Partially Strongly Fault Secure and Partially Strongly Code Disjoint I-out-of-3 Code Checker
A Dependability Analysis for Systems with Global Spares
Simulation to Obtain a Systems Measure of an Air Duel Environment
Multiple Reflections from RC Loading of Pulse-Signal Transmission Lines
A Task Allocation Model for Distributed Computing Systems
A wide-band square-law computing amplifier
Some Properties of Threshold Logic Unit Pattern Recognition Networks
Edge-Disjoint Spanning Trees on the Star Network with Applications to Fault Tolerance
BM-RCGL: Benchmarking Approach for Localization of Reliability-Critical Gates in Combinational Logic Blocks
Error Correction in High-Speed Arithmetic
High-Performance Robust Latches
Adjacency Table Method of Deriving Minimal Sums
A Novel Measurement for Network Reliability
VLSI Implementation of a Low-Power Antilogarithmic Converter
Partially Self-Checking Circuits and Their Use in Performing Logical Operations
On the Equivalence of Fanout-Point Faults
Testing and Diagnosing Comparison Faults of TCAMs with Asymmetric Cells
StageWise: Accelerating Persistent Key-Value Stores by Thread Model Redesigning
Unified Architecture for Divide and Conquer Based Tridiagonal System Solvers
FadingBF: A Bloom Filter With Consistent Guarantees for Online Applications
BWLOCK: A Dynamic Memory Access Control Framework for Soft Real-Time Applications on Multicore Platforms
Analysis of Threading Libraries for High Performance Computing
A Magnetic Ternary Device
The Design of an Optoelectronic Arithmetic Processor Based on Permutation Networks
New Design for Testability Approach for Clock Fault Testing
A Three-Failure-Tolerant Computer System
Analog/Hybrid Computation and Digital Simulation
The Associative Linear Array Processor
Scalable Application-Dependent Diagnosisof Interconnects of SRAM-Based FPGAs
Synthesis of Resistive Digital-to-Analog Conversion Ladders for Arbitrary Codes with Fixed Positive Weights
Systematic Wavelet Subcodes for Data Protection
A Method Enabling Feasible Conformance Test Sequence Generation for EFSM Models
On the Complexity of Search Algorithms
Eigenvalue Properties of Projection Operators and Their Application to the Subspace Method of Feature Extraction
Diagnosable Systems for Intermittent Faults
Toward Optimization of Horizontal Microprograms
New Systolic Arrays for C + AB2, Inversion, and Division in GF(2 m )
Local-Deadline Assignment for Distributed Real-Time Systems
Maximal Memory Binary Input-Binary Output Finite-Memory Sequential Machines
The ETH-Multiprocessor EMPRESS: A Dynamically Configurable MIMD System
Intermittent Faults: A Model and a Detection Procedure
Efficient and User-Friendly Verification
Efficient Attribute-Based Comparable Data Access Control
Orthogonal Latin Square Configuration for LSI Memory Yield and Reliability Enhancement
Robust Pipelined Memory System with Worst Case Performance Guarantee for Network Processing
A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches
Automated Design Architecture for 1-D Cellular Automata Using Quantum Cellular Automata
Fast In-Place Suffix Sorting on a Multicore Computer
Scaling Persistent In-Memory Key-Value Stores Over Modern Tiered, Heterogeneous Memory Hierarchies
DPM: A Measurement System for Distributed Programs
Computation of an Expression for the Frequency Spectrum of a Two-Sided Signal
A Distributed Algorithm for Fault Diagnosis in Systems with Soft Failures
Some New Group Theoretic Properties of Singular Linear Sequential Machines
Multiple-Way Network Partitioning with Different Cost Functions
Efficient Exploitation of Instruction-Level Parallelism for Superscalar Processors by the Conjugate Register File Scheme
Optimal Diagnosable System Design Using Full-Difference Triangles
An Enhanced Approximation by Pair-Wise Analysis of Servers for Time Delay Distributions in Queueing Networks
FlexBlock: A Flexible DNN Training Accelerator With Multi-Mode Block Floating Point Support
Memristor-Based Neural Logic Blocks for Nonlinearly Separable Functions
Analysis of Broadcast Delivery in a Videotex System
Online Permutation Routing in Partitioned Optical Passive Star Networks
LDet: Determinizing Asynchronous Transfer for Postsilicon Debugging
A Two-Way Automaton with Fewer States than Any Equivalent One-Way Automaton
A Hybrid Flash File System Based on NOR and NAND Flash Memories for Embedded Devices
Analytical Prediction of Performance for Cache Coherence Protocols
Testing Finite-State Machines: State Identification and Verification
An Erase Efficiency Boosting Strategy for 3D Charge Trap NAND Flash
A Diagnosis Algorithm for Distributed Computing Systems with Dynamic Failure and Repair
Optimal Interconnections in the Design of Microprocessors and Digital Systems
On Modulus Replication for Residue Arithmetic Computations of Complex Inner Products
Optimum Broadcasting and Personalized Communication in Hypercubes
Some Upper Bounds on Error Probability for Multiclass Pattern Recognition
Approximate Models of Multiple Bus Multiprocessor Systems
Fast Gossiping on Mesh-Bus Computers
Comparing Serial Computers, Arrays, and Networks Using Measures of "Active Resources"
NO2: Speeding up Parallel Processing of Massive Compute-Intensive Tasks
A Comparison-Based Approach to Multicomputer System Diagnosis in Hybrid Fault Situations
Transposition of Matrix Stored on Sequential File
Raptor-T: A Fused and Memory-Efficient Sparse Transformer for Long and Variable-Length Sequences
Preventing Session Table Explosion in Packet Inspection Computers
SLA-Based Scheduling of Spark Jobs in Hybrid Cloud Computing Environments
B74-42 Introduction to Discrete Structures
On the Design of a Unidirectional Systolic Array for Key Enumeration
Simulation-Based Functional Test Generation for Embedded Processors
Precise Worst-Case Blocking Time of Tasks Under Priority Inheritance Protocol
Error-Detection Codes: Algorithms and Fast Implementation
Design and Applications for Embedded Networks-on-Chip on FPGAs
A Method for the Design of Fault Detection Experiments
A BIST Pattern Generator Design for Near-Perfect Fault Coverage
Fault-Tolerant Design of Neural Networks for Solving Optimization Problems
An OpenMP Compiler for Efficient Use of Distributed Scratchpad Memory in MPSoCs
Buffer Behavior in Computer Communication Systems