yusuke1997/dblp-id-title huggingface dataset:
IMMM 78: International microcomputers, minicomputers and microprocessors conference and exhibition: 20-22 June 1978. Palais des Expositions, Geneva, Switzerland. Organized by Kiver Communications SA
Fuzzy-based acquisition in GPS receivers for spoofing mitigation
Adaptive gradient-based analog hardware architecture for 2D under-sampled signals reconstruction
Applied Digital Control: J R LeighPrentice-Hall, Englewood Cliffs, NJ, USA (March 1985) £12.95 pp xvii + 408
ES-COINA: A novel energy scalable quality-aware color interpolation architecture
Reliable audiocassette data interface
Design of embedded data analyzer based mitigation model for traffic congestion and its challenges
Motion estimation and CABAC VLSI co-processors for real-time high-quality H.264/AVC video coding
Joint affinity aware grouping and virtual machine placement
Simulation of Economic Benefits of Technological Innovation Based on FPGA and Machine Learning
A reconfigurable multi-mode implementation of hyperspectral target detection algorithms
Formal specification of the ProCoS/safemos instruction set
VLSI design for massively parallel signal processors
Impact of duty factor, stress stimuli, gate and drive strength on gate delay degradation with an atomistic trap-based BTI model
Microprocessor systems in signal processing: Yuen, C K, Beauchamp, K G and Fraser, D Harcourt Brace Jovanovich, London, UK (1989) £27.50, pp 331
Hardware design of computing medical platform and the nursing analysis of patients with hyperthyroidism
Integrating real-time inter-task communication channels into hardware-software codesign
Micos: a microprogrammable computer simulator: Lubomir BicBlackwell Scientific, Oxford, UK (1984) £11.95 pp 364
Microprocessors and software design tools
Cost effective Android-Antenna Tool (AAT) for the parameter calculation of antenna in android platform
Towards collaborative intelligent IoT eHealth: From device to fog, and cloud
Functional test environment for time-triggered control systems in complex MPSoCs
Electronic locking devices based on microcontrollers and chaotic maps using Model-Matching Control
Intrinsic Power Management Strategy based improvement of power stability in a single-phase AC-DC converter system
Intelligent diagnosis of Alzheimer's disease based on internet of things monitoring system and deep learning classification method
VLSI design and implementation of systolic tree queues
Development of micro-UAV with integrated motion planning for open-cut mining surveillance
System scenarios-based architecture level exploration of SDR application using a network-on-chip simulation framework
FPGA-based stereo matching for crop height measurement using monocular camera
A modified surrogate-assisted multi-swarm artificial bee colony for complex numerical optimization problems
Processor arrays generation for matrix algorithms used in embedded platforms implemented on FPGAs
Comparison of design-implementation methods
Undeviating Adaptive Sheltered Cryptography (UASC) method based low power and high secure cache memory design
Variable assignment and instruction scheduling for processor with multi-module memory
Fischer machine learning for mobile cloud computing in eHealth systems using blockchain mechanism
TMS320 digital signal processor development system
P696/S100 - a bus which supports a wide range of 8- and 16-bit processors
Address independent estimation of the boundaries of cache performance
Euromicro 85
FPGA medical big data system and ischemic stroke rehabilitation nursing
A study on the performance impact of programmable logic controllers based on enhanced architecture and organization
Method and specification tools for Airbus onboard systems
Introduction to NMOS and CMOS VLSI design: Amar Mukherjee Prentice-Hall, Englewood Cliffs, NJ, USA (1986) £19.95 pp 370
Virtualizing network-on-chip resources in chip-multiprocessors
Energy efficient configuration unification and compression for CGRAs
Application of smart audio based on mixed reality technology in media fusion
A Simulink-based hybrid codesign tool for rapid prototyping of FPGA's in signal processing systems
A hardwired NoC infrastructure for embedded systems on FPGAs
Getting the most from your BBC Micro: Clive WilliamsonPenguin, UK (1984) £5.95 pp 208
A comparison of software-based techniques intended to increase the reliability of embedded applications in the presence of EMI
TTCAN: a new time-triggered controller area network
A portable wireless body sensor data logger and its application in video capsule endoscopy
Software portability with micro-computer issues: Lecarme, O, Gart M P and Gart M McGraw-Hill (1989) pp 253
Rapid recovery of program execution under power failures for embedded systems with NVM
Boundary-scan testing
Lightweight implementation of SILC, CLOC, AES-JAMBU and COLM authenticated ciphers
The improved (2D) 2 PCA algorithm and its parallel implementation based on image block
A low-cost digital signal processor-based ear-muff with adaptive active noise control
Objective comparison of 32-bit buses
Digital Signal Processing: Inmos Ltd Prentice Hall, Hemel Hempstead, UK (1989) £19.95 pp 266
An area-delay efficient single-precision floating-point multiplier for VLSI systems
Algorithm-based fault tolerance: a review
An MC68030/MC68EC030 32 bit high performance system
Stochastic and deterministic averaging processors: Mars, P and Popplebaum, W J, Peter Peregrinus Ltd (1981) pp 155, £18.00
A low power consumption mobile based IoT framework for real-time classification and segmentation for apple disease
Case study on multiple fault dependability and security evaluations
Parallel-architecture windowing display
A real-time SVM-based hardware accelerator for hyperspectral images classification in FPGA
Systems Union versus Simdell
Talking teletext receiver for the blind
Parallel implementation of video encoder on quad DSP system
SPA-IDS: An intelligent intrusion detection system based on vertical mode decomposition and iterative feature selection in computer networks
MC6809 microprocessor
Malguki: an RSSI based ad hoc location algorithm
Intelligent monitoring and controlling of the PV using hybrid controller system
Accessing MS-DOS applications over a TCP/IP network
Hardware support for error detection in multiprocessor systems - a case study
Internet of things medical image detection and magnetic resonance tube wall imaging to observe characteristics of elderly thoracic aortic atherosclerotic plaque
Auxiliary research on difficult aerobics exercise training based on fpga and movement recognition technology
A flash-aware write buffer scheme to enhance the performance of superblock-based NAND flash storage systems
Secondary cache enhancement using a novel tagged prefetching method
Parallel processing with an array of microcomputers
Accurate disease detection quantification of iris based retinal images using random implication image classifier technique
GOALALERT: A novel real-time technical team alert approach using machine learning on an IoT-based system in sports
Design of ATM circuit emulation service terminal adapter
An analysis of FPGA configuration memory SEU accumulation and a preventative scrubbing technique
Integrated land-sea surveying and mapping of intertidal zone based on high-definition remote sensing images and GIS technology
Microprocessor systems, interfacing and applications: J Bibbero and D M SternWiley-Interscience (1982) £15.50, pp 189
Resource aware mapping on coarse grained reconfigurable arrays
Analytical modelling of broadcast in adaptive wormhole-routed hypercubes
The Locus distributed system architecture: Gerald J Popek and Bruce J Walker MIT Press, Cambridge, MA, USA (1986) £24.95 pp 163
Industrial design with microcomputers: S K RobertsPrentice-Hall (1982) £23.12, pp 371
Setting time into a microcomputer
Electronic design of a solar correlation tracker based on a video motion estimation processor
An environment for (re)configuration and execution management of heterogeneous flexible radio platforms
FPGA implementation of a 10 GS/s variable-length FFT for OFDM-based optical communication systems
Variety of papers introduces specialized computers: L Snyder, L H Jamieson, D B Gannon and H J Siegel (Eds)'Algorithmically specialized parallel computers' Academic Press, Orlando, FL, USA (1985) £24.00 pp xiii + 252
Real-time fault injection using enhanced on-chip debug infrastructures
Improved performance of impulse active noise control using active function threshold with absolute harmonic variable step-size algorithm
ISDE - an integrated systems development environment for custom-computing machines implemented in FPLDs
A scalable multi-porting solution for future wide-issue processors
A workload-aware flash translation layer enhancing performance and lifespan of TLC/SLC dual-mode flash memory in embedded systems
Fully pipelined FPGA-based architecture for real-time SIFT extraction
GCM implementations of Camellia-128 and SMS4 by optimizing the polynomial multiplier
Gigabit Modbus user datagram protocol fieldbus network integrated with industrial vision communication
A distributed algorithm for finding prime compatibles on network of workstations
Cosmic radiation effects on avionics
Certain investigations in achieving low power dissipation for SRAM cell
An experimental inquisition of waste heat recovery in electronic component system using concentric tube heat pipe heat exchanger with different working fluids under gravity assistance
Research on auxiliary methods of swimming training virtual simulation technology based on embedded computer ✰
Automatic instrumaents and measuring systems: Rudolf Radnai and Edward G Kingham Butterworths, Guildford, UK (1986) £17.50 pp 170
Distributed programs: an overview of implementations
A parametric-based performance evaluation and design trade-offs for interconnect architectures using FPGAs for networks-on-chip
Application of Embedded Network Distributed Network in Student Physical Health Management Platform
Structural feature extraction in online extrusion of plastics
Dynamically adaptive register file architecture for energy reduction in embedded processors
Low-complexity bit-serial sequential polynomial basis finite field GF(2m) Montgomery multipliers
Application and development prospects of 5 G communication technology in aerobics sports
FPGA processor and visual keyword matching to optimize feature recognition of tourism resources
Area-latency efficient floating point adder using interleaved alignment and normalization
Adaptive inter-layer message routing in 3D networks-on-chip
High resolution image detection and ultrasonic evaluation of hyperthyroidism based on hospital IoT system
Transferring a macro program to a micro machine
On building a CNN-based multi-view smart camera for real-time object detection
Evaluating compiler technology for control-flow optimizations for multimedia extension architectures
System prototyping in the COBRA project
Quantum-dot cellular automata circuits with reduced external fixed inputs
Static statistical MPSoC power optimization by variation-aware task and communication scheduling
HidroBus ® system: fieldbus for integrated management of extensive areas of irrigated land
A comparative study of machine learning classifiers for secure RF-PUF-based authentication in internet of things
A NoC-based hybrid message-passing/shared-memory approach to CMP design
Architectural design and FPGA implementation of radix-4 CORDIC processor
CMOS and ECL implementation of MIPS RISC architecture
Concurrent Euclid, the Unix system, and Tunis: R C Holt Addison-Wesley, Reading, MA, USA (June 1983) £14.95, pp 323
Urban underground space planning based on FPGA and virtual reality system
Thermal aware floorplanning incorporating temperature dependent wire delay estimation
SPA - a secure Amulet core for smartcard applications
Control text is pitched at undergraduate level: S A Money'Microprocessors in instrumentation and control' Collins, Glasgow, UK (1985) £20.00 pp viii + 246
A novel low hardware configurable ring oscillator (CRO) PUF for lightweight security applications
Signal processing implementation with a dual-bank memory
Learning based application driven energy aware compilation for GPU
Fast Haar transtorm algorithm: a 6809-based realtime evaluation
A dynamically weighted discrete combination model for all releases of a software system
Use of local area networks within manufacturing systems
Nonlinear Transformational Optimization (NTO) technique based Total Harmonics Distortion (THD) reduction of line to line voltage for multi-level inverters
Microcomputer experimentation with the Motorola MEK 6800D2: L A Leventhal, Prentice-Hall (1981) 438 pp, £11.00
Software organization of a microcomputer-based data-acquisition system
Research on the strategy of mobile short video in product sales based on 5G network and embedded system
Good programming practice in Ada: Luker, P A Blackwell Scientific, Oxford, UK (1987) £14.95 (soft cover), pp 320
Design automation of cellular neural networks for data fusion applications
An area-efficient and low-latency elliptic curve scalar multiplication accelerator over prime field
The true costs of microprocessing
A scalable and embedded FPGA architecture for efficient computation of grey level co-occurrence matrices and Haralick textures features
Distributed memory management on a multi-transputer system
Efficient majority logic magnitude comparator design
A modelling framework to support the design and analysis of distributed real-time control systems
The BBC microcomputer as a data acquisition tool
MFEN: Lightweight multi-scale feature extraction super-resolution network in embedded system
Special Issue on "High Performance Real-time Computing"
Design and construction of an array processor
Construction and discrete processing of screw extruder based on three-dimensional spiral model
Utilizing multi-bit connections to improve the area efficiency of unidirectional routing resources for routing multi-bit signals on FPGAs
The design and evaluation of a high performance Smalltalk system: Ungar, D M MIT Press, Cambridge, MA, USA (1987) £26.95 pp 250
Performance evolution of 4-b bit MAC unit using hybrid GDI and transmission gate based adder and multiplier circuits in 180 and 90 nm technology
Comparative Analysis of the Design Techniques for Low Leakage SRAMs at 32nm
Exploiting and evaluating the potentials of the link addition method for NoC transient error mitigation
Transputer control of a flexible robot link
Multifunctional and autonomous, high performance architecture: application to a wheelchair for disabled people that integrates different control and guidance strategies
3D - a company with faith in 8-bit technology
Action recognition of dance video learning based on embedded system and computer vision image
Performance Evaluation of Various Classification Techniques for Customer Churn Prediction in E-commerce
Intelligent logistics cost control based on microprocessor system and sensors
Simulating computer systems: MacDougall, M H MIT Press, Cambridge, MA, USA (1987) £29.25 pp 292
Hungarian software : 14-15 November 1983, London, UK
Power-aware out-of-order issue logic in high-performance microprocessors
Design and characterization of a new fault-tolerant full-adder for quantum-dot cellular automata
Design of hospital embedded system and drug resistance of infection patients in orthopedic aseptic surgery
Transaction-based online debug for NoC-based multiprocessor SoCs
Adum3210 chip based design of the control system of water lifting irrigation based on the internet of things
Computing robot Jacobians on meshes with multiple buses
Fast and reliable PUF response evaluation from unsettled bistable rings
Using parallel processing to achieve real-time access to a large terrain database in an airborne environment
Minicomputer-based development facility for contract research
Generation algorithm of grid model for complex terrain based on geodetic coordinate data transformation
Simulation based verification of energy storage architectures for higher class tags supported by energy harvesting devices
Design for testability and built-in self-test for VLSI circuits
Paradigm and performance analysis of distributed frequent itemset mining algorithms based on Mapreduce
TileNET: Hardware accelerator for ternary Convolutional Neural Networks
Reduced DRAM cycle times with extended data-out
Independent innovation capability of high-tech enterprises based on FPGA processor and dynamic reconfigurable technology
Comments on PASCAL
Be My Guesses: The interplay between side-channel leakage metrics
Designing an updatable BIOS using flash memory
The 8085A microprocessor: software, programming and architecture: Barry B BreyPrentice-Hall, Englewood Cliffs, NJ, USA (1986) $29.95 pp 354
Supporting high priority traffic in wormhole networks
Research on Thermal Insulation Performance of Energy-Saving Exterior Walls of Large Buildings Based on Wireless Sensors
iWarp multicomputer with an embedded switching network
A fast sequence control device based on enhanced Petri nets
Task mapping and flow priority assignment of real-time industrial applications for network-on-chip based design
On the development of a formal methods-based software design methodology for automotive applications
Stochastic spatial routing for reconfigurable networks
Design and implementation of parallel algorithm for image matching based on Hausdorff Distance
Enterprise financial cost management platform based on FPGA and neural network
What every engineer should know about microcomputer systems and debugging: Bill Wray and Bill CrawfordMarcel Dekker, New York, USA (1984) $28 pp 183
Machine learning based effective linear regression model for TSV layer assignment in 3DIC
Hardware-accelerated analysis of real-time Networks-on-Chip
System design and layout techniques for noise reduction in MCU-based systems
Process structure for interactive software
Design of modular workhandling systems
Real-time video surveillance on an embedded, programmable platform
Symbolic Model Checking: Kenneth L McMillan, Kluwer Academic, Dordrecht, The Netherlands (1993) ISBN 0 7923 9380 5, £54.50, pp 194
Simultaneous-switching noise analysis for Texas instruments FIFO products
Improve complex software by using multiple microprocessors
High-throughput energy-efficient pipeline architecture for successive cancellation polar decoder
Retraction notice to "Intelligent control for new topological structure of Z-Source inverter based on ARM" [Microprocessors and Microsystems 81 (2021) 103735]
Minimizing power loss in optical networks-on-chip through application-specific mapping
A structured approach to board-level BIST using the boundary-scan master
Application of improved clustering algorithm in investment recommendation in embedded system
Real time monitoring of medical images and nursing intervention after heart valve replacement
A regular expression matching circuit: Decomposed non-deterministic realization with prefix sharing and multi-character transition
Packet triggered prediction based task migration for network-on-chip
A high-performance analogue input/output system for transputer applications
High-level modeling of communication-centric applications: Extensions to a system-level design and virtual prototyping tool
On the feasibility of SISO control-theoretic DVFS for power capping in CMPs
A phase adaptive cache hierarchy for SMT processors
Data value speculation in superscalar processors
A high-speed AES design resistant to fault injection attacks
Adaptive-Classification CLOCK: Page replacement policy based on read/write access pattern for hybrid DRAM and PCM main memory
A technique for the implementation of low frequency digital filters with simple FAD-based hardware
Parallelization of scalable elliptic curve cryptosystem processors in GF(2 m )
Mobile satellite reception with a virtual satellite dish based on a reconfigurable multi-processor architecture
Transputer-based fault tolerance in safety-critical systems
Improving the accuracy of approximate multipliers based on the characteristics of 4:2 compressors
Improved approximate multiplier architecture for image processing and neural network applications
High frequency transformer in electric traction with bidirectional DC-DC converter using customized embedded system
Design and development of a low-cost digital display for water flow rate measurements
Simulation-based test of master control system software
Classifying network abnormalities into faults and attacks in IoT-based cyber physical systems using machine learning
Ontological reasoning in the design space exploration of advanced cyber-physical systems
Retraction notice to "Application of Machine Learning and Big Data in Doubly Fed Induction Generator based Stability Analysis of Multi Machine System using Substantial Transformative Optimization Algorithm" [Microprocessors and Microsystems 73 (2020) 102971]
Simulation package for small-scale systems
International microcomputers, minicomputers, microprocessors conference and exhibition: 24-26 May, 1977, Palais des Expositions, Geneva, Switzerland. Organized by Kiver Communications S.A
Internet enterprise organization strategy based on FPGA and machine learning
Edge-centric trust management in vehicular networks
Exploiting new technology for education: teaching signal integrity in computer science curricula
Industrial computer networks and the role of MAP, Part 1
FBNoC: FPGA-based network on chip emulator for full-system architectural simulation of many-core systems
Gate array architectures
Corrigendum to "Pods - A novel intelligent energy efficient and dynamic frequency scalings for multi-core embedded architectures in an IoT environment" [Microprocessors and Microsystems Volume 72, February 2020, 102907]
A DSP-based acoustic feedback canceller for public address systems
Dynamic relocation of hybrid tasks: Strategies and methodologies
Remote music teaching classroom based on embedded system and cloud platform
Image recognition of dance moving based on heterogeneous multiprocessor and dynamic image sampling
Software in safety-related systems: Wichmann, BA (Ed) John Wiley, Chichester, UK (1992) ISBN 0 471 93474 7, £105, pp 300
ASICs in personal computers
Design of ACO based PID controller for zeta converter using reduced order methodology
A novel implementation of combined systolic and folded architectures for adaptive filters in FPGA
Automatic mapping of C to FPGAs with the DEFACTO compilation and synthesis system
Digital systems: from gates to microprocessors: Sanjay K Bose Wiley Eastern, New Delhi India (1986) £12.95 pp 424
Microprocessor control of rocket flight stabilization
Recent advances in computer vision and image processing using reconfigurable hardware
Particle swarm optimization for task assignment problem
New improved two-phase interleaved converter with clamp circuit and diode capacitor cell
Performance of deep learning vs machine learning in plant leaf disease detection
Enhancing logic synthesis of switching lattices by generalized Shannon decomposition methods
Complete high-performance cache system for the 80386
Convolutional encoding and Viterbi decoding using the DSP56001
Heuristic fault-tolerant routing strategies for a multiprocessor network
Embedded system and smart embedded wearable devices promote youth sports health
Commercial considerations for designing with ASICs
A/D and D/A conversion
ICA based estimation and compensation of carrier frequency offset for MBOFDM based UWB systems
Fog Computing-inspired Smart Home Framework for Predictive Veterinary Healthcare
Euromicro 77: 3-6 October 1977, Free University, Amsterdam, The Netherlands. Organized by Euromicro
Simulated fault injections and their acceleration in SystemC
Development characteristics of economic regions based on opencl design and dynamic image sampling
Low-cost scratchpad memory organizations using heterogeneous cell sizes for low-voltage operations
Introduction to Special issue on Reconfigurable computing and FPGAs
Embedded registration of visible and infrared images in real time for noninvasive skin cancer screening
High level languages on any machine through VAL
Multi-Objective based test case selection and prioritization for distributed cloud environment
VERSAbus - a multiprocessor bus standard - and VMEbus - its Eurocard counterpart
On the design of on-chip instruction caches