yusuke1997/dblp-id-title huggingface dataset:
Low-Complexity Hardware Architecture of APN Permutations Using TU-Decomposition
New Proofs of the Two-Port Networks Unconditional Stability Criteria Based on the Rollett K Parameter
Quantum Sealed-Bid Auction Without a Trusted Third Party
A ±0.5-mV-Minimum-Input DC-DC Converter With Stepwise Adiabatic Gate-Drive and Efficient Timing Control for Thermoelectric Energy Harvesting
Noise Analysis of Charge-Balanced Readout Circuits for MEMS Accelerometers
Artificial Neural Network Based Calibration for a 12 b 250 MS/s Pipelined-SAR ADC With Ring Amplifier in 40-nm CMOS
A 1.5-GS/s 6-bit Single-Channel Loop-Unrolled SAR ADC With Speculative CDAC Switching Control Technique in 28-nm CMOS
Error-Resilient Data Compression With Tunstall Codes
A Linear-in-Decibel Automatic Gain Control Amplifier With Dual Mode Continuous Gain Tuning
Superconducting Shuttle-Flux Shift Register for Race Logic and Its Applications
A Novel IPT System With Full-Range Soft-Switching Operation and Magnetic Integration Based on Dual-Decoupling Concept for Efficiency and Power Density Optimization
A Compact One-Transistor-Multiple-RRAM Characterization Platform
Design and Analysis of a Resistive Frequency-Locked Oscillator With Long-Term Stability Using Double Chopper Stabilization
An Equivalent-Time Sampling Millimeter-Wave Ultra-Wideband Radar Pulse Digitizer in CMOS
DCIM-GCN: Digital Computing-in-Memory Accelerator for Graph Convolutional Network
An Energy-Efficient SIFT Based Feature Extraction Accelerator for High Frame-Rate Video Applications
High-Density Memristor-CMOS Ternary Logic Family
Efficient Integer-Only-Inference of Gradient Boosting Decision Trees on Low-Power Devices
Power Losses Optimization of MMCs Based on Quantum Genetic Algorithm for HVdc Transmission Application
Robust Practical Stability Region Partition Considering Parameter Uncertainty and Volatility for Direct-Drive Wind Power System
A Hybrid-Computing Solution to Nonlinear Optimization Problems
Adaptive Event-Triggered Attitude Consensus With Prescribed-Time Convergence
A Two-Channel Time-Interleaved Continuous-Time Third-Order CIFF-Based Delta-Sigma Modulator
Optimization of DTC-Based and Harmonic-Mixer-Based Fractional-N PLLs: Comparative Analysis of Jitter and Power Trade-Offs
A Novel Feasibility Condition-Free Approach for Achieving Desired Precision and Unified Performance Within Prescribed Time
Analysis and Mitigation of Coupling-Dependent Data Flipping in Wireless Power and Data Transfer System
Achieving Error-Free Lightweight Authentication With DRAM-Based Physical Unclonable Functions
A 17-mK Resolution ΣΔ-Based Temperature Sensor With an On-Chip Single-Point Calibrated Inaccuracy of ±1.5 °C (3σ)
Enhancing the Reliability of SC PUF Through Optimal Capacitor Configuration
Fixed-Time Neurodynamic Optimization Algorithms and Application to Circuits Design
A Time-Division-Multiplexed Clocked-Analog Low-Dropout Regulator
A 25 MHz Fast Transient Adaptive-On/Off-Time Controlled Three-Level Buck Converter
Frequency-Dependent Design Spaces for Continuous Mode Class-J*/B/J PA
Multi-Objective Surrogate-Model-Based Neural Architecture and Physical Design Co-Optimization of Energy Efficient Neural Network Hardware Accelerators
A 1.1 V-Programmable Metal-Fuse Technology With Current-Mode Programming and Program-Guarantee Technique in 28 nm CMOS Technology
A -64.3 dB THD, 26 nV/√ Hz Bio-Potential Readout Analog-Front-End Amplifier With a Gm-C Integrator-Implanted DC Servo Loop, and a Bulk-Driven Ripple Reduction Loop
ENNA: An Efficient Neural Network Accelerator Design Based on ADC-Free Compute-In-Memory Subarrays
Accurate and Insightful Closed-Form Prediction of Subthreshold SRAM Hold Failure Rate
A Design Framework for Cost-Efficient Sorters With Arbitrary Input/Output Constraints
ΔΣ Modulators Employing MASH DSM DAC-Based Dual Quantization
Characterization of Oscillator Phase Noise Arising From Multiple Sources for ASIC True Random Number Generation
Design of High-Performance and Area-Efficient Decoder for 5G LDPC Codes
A Distortion-Free All-Digital Transmitter Based on Noise-Shaped PWM
mm-Wave Through-Load Element for On-Wafer Measurement Applications
A High-Performance Bidirectional Architecture for the Quasi-Comparison-Free Sorting Algorithm
Efficient Hint-Based Event (EHE) Issue Scheduling for Hardware Multithreaded RISC-V Pipeline
A CMOS Synchronized Sample-and-Hold Artifact Blanking Analog Front-End Local Field Potential Acquisition Unit With ±3.6-V Stimulation Artifact Tolerance and Monopolar Electrode-Tissue Impedance Measurement Circuit for Closed-Loop Deep Brain Stimulation SoCs
Fixed-Time Composite Anti-Disturbance Control for Flexible-Link Manipulators Based on Disturbance Observer
A Resonant Switched-Capacitor Parallel Inductor Hybrid Buck Converter
Impedance Matching Through a Reconfigurable Relay Coil Achieving Maximum Wireless Power Transfer Under Variations of Coupling Coefficient and Load Resistance
Secure Aperiodic Sampling Control for Micro-Grids Under Abnormal Deception Cyber Attacks
EF-CIM: An Endurance Friendly CIM Accelerator Using Embedded NVM With Bit-Aware Wear Leveling for Efficient Light-Weight On-Chip Training in Edge Devices
Analysis and Design of a 0.3-THz Signal Generator Using an Oscillator-Doubler Architecture in 40-nm CMOS
Predictive Control of Low-Cost Three-Phase Four-Switch Inverter-Fed Drives for Brushless DC Motor Applications
Finite-Time Asynchronous Switching Control for Fuzzy Markov Jump Systems by Applying Polynomial Membership Functions
DTC Linearization via Mismatch-Noise Cancellation for Digital Fractional-N PLLs
The Challenges and Emerging Technologies for Low-Power Artificial Intelligence IoT Systems
Zero Aware Configurable Data Encoding by Skipping Transfer for Error Resilient Applications
INIS: A Family of ΔΣ Modulators With Inherent Spur Immunity When Interacting With a Static Nonlinearity
Practical Prescribed-Time Control for High-Order Strict-Feedback Systems Based on Fully Actuated System Approach
Light-Weight Low-Latency Reconfigurable CORDIC Architecture With a New Non-Power-of-2 Angle Set of Microrotations
Distributed Fault Detection and Dynamic Event-Triggered Consensus for Heterogeneous Multiagent Systems Under Deception Attacks
A 96-Channel 40nm CMOS Potentiostat for Parallel Experiments on Microbial Electrochemical Systems
Resilient Cooperative Output Regulation of Uncertain Multi-Agent Systems Under DoS Attacks
Adaptive Neural Optimal Backstepping Control of Uncertain Fractional-Order Chaotic Circuit Systems via Reinforcement Learning
A Clockless Synergistic Hybrid Energy Harvesting Technique With Simultaneous Energy Injection and Sampling for Piezoelectric and Photovoltaic Energy
A 10-bit 100-MS/s SAR ADC With Always-On Reference Ripple Cancellation
Compact Multi-Band Filter/Diplexer LNAs Using Split-Type Multi-Resonant Stages
Scalable Fully Pipelined Hardware Architecture for In-Network Aggregated AllReduce Communication
Sampled-Hold-Based Consensus Control for Second-Order Multiagent Systems Under Aperiodically Intermittent Communication
Observer-Based Discrete-Time Cascaded Control for Lateral Stabilization of Steer-by-Wire Vehicles With Uncertainties and Disturbances
SKI-SAT: A CMOS-Compatible Hardware for Solving SAT Problems
Optimal Energy Management for Networked Microgrids via Distributed Neurodynamic
Finite-Time Control of High-Order Nonlinear Random Systems Using State Triggering Signals
Secret-Key Exchange Through Synchronization of Randomized Chaotic Oscillators Aided by Logistic Hash Function
veriSIMPLER: An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing
Vau Da Muntanialas: Energy-Efficient Multi-Die Scalable Acceleration of RNN Inference
Memory-Efficient CNN Accelerator Based on Interlayer Feature Map Compression
Distributed Control of Multi-Functional Grid-Tied Inverters for Power Quality Improvement
Future Design Direction for SRAM Data Array: Hierarchical Subarray With Active Interconnect
Dissipative Sliding-Mode Synchronization Control of Uncertain Complex-Valued Inertial Neural Networks: Non-Reduced-Order Strategy
A DSP-Purposed REconfigurable Acceleration Machine (DREAM) for High Energy Efficiency MIMO Signal Processing
Dynamic Read V MIN and Yield Estimation for Nanoscale SRAMs
The Impact of Device Uniformity on Functionality of Analog Passively-Integrated Memristive Circuits
An All NMOS KY-Boost Converter With Double Injection Control for Fast Line and Load Transient Response
FN-HNN Coupled With Tunable Multistable Memristors and Encryption by Arnold Mapping and Diagonal Diffusion Algorithm
A 50 Gb/s PAM-4 Transceiver With High-Swing Driver, Dual-Loop Analog Equalizer, and Integrator-Based Baud-Rate Linear CDR for Short-Reach Links
A Compact Dickson Hybrid Boost Converter With 5-mV Input 90.5% Peak Efficiency and On-Chip Cold-Start for Thermoelectric Energy Harvesting
MLB-MAC: Multi-Level Binary MAC Array for Energy Efficient ML Accelerators
A 6T SRAM Based Two-Dimensional Configurable Challenge-Response PUF for Portable Devices
Analysis of Pixel Noise in Dynamic Vision Sensors
Skew-CIM: Process-Variation-Resilient and Energy-Efficient Computation-in-Memory Design Technique With Skewed Weights
Continuous Flow 4096-Point FFT/IFFT Hardware Architecture for 5G Applications
Adjusting Dynamics of Hopfield Neural Network via Time-Variant Stimulus
Fault-Tolerant Reversible-Logic Based RO-PUF for Secure Device Authentication
A High Accuracy and Low Power CNN-Based Environmental Sound Classification Processor
Design, Implementation, and Analysis of an Integrated Switched Capacitor Analog Neuron for Edge Computing AI Accelerators
Digital-to-Analog Hardware Trojan Attacks
Facilitating and Determining Turing Patterns in 3-D Memristor Cellular Neural Networks
A Compact Cost-Effective NB-IoT System-in-Package With Integrated RF Front-End IPD and TX/RX Gain Self-Calibration
A 197.1-μW Wireless Sensor SoC With an Energy-Efficient Analog Front-End and a Harmonic Injection-Locked OOK TX
A Design of High-Efficiency Coherent Sampling Based TRNG With On-Chip Entropy Assurance
An Incremental Time-Domain Mixed-Signal Matrix-Vector-Multiplication Technique for Low-Power Edge-AI
High-Speed LDPC Decoders Towards 1 Tb/s
An FPGA-Based Real-Time Loop Closure Detection Framework With Ultra-Fast Descriptor Generator
Semiglobal Finite-Time Stability of Impulsive Systems
A 16-Channel Neurostimulation IC With Self-Biased Monopolar Stimulus Drivers and a Multiple-Output Charge-Pump Converter Achieving 25.44-mW/mm 2 Power Density in Low-Voltage CMOS
Quality Driven Systematic Approximation for Binary-Weight Neural Network Deployment
Entrainment of Mutually Synchronized Spatially Distributed 24 GHz Oscillators
Inductive GNN-Based Methodology for Accurate and Fast Average Power Estimation of Synthesized ASIC Designs From RTL Simulation Bypassing Gate-Level Simulation
NeuroREC: A 28-nm Efficient Neuromorphic Processor for Radar Emitter Classification
An In-Depth Evaluation of Externally Amplified Coupling (EAC) Attacks - A Concrete Threat for Masked Cryptographic Implementations
AdderNet 2.0: Optimal AdderNet Accelerator Designs With Activation-Oriented Quantization and Fused Bias Removal-Based Memory Optimization
APTPU: Approximate Computing Based Tensor Processing Unit
Construction and Application of a Neuromorphic Circuit With Excitatory and Inhibitory Post-Synaptic Conduction Channels Implemented Using Dual-Gate Thin-Film Transistors
Analysis and Calibration for Wideband Times-2 Interleaved Current-Steering DACs
Switched-Capacitor Bandgap Voltage Reference for IoT Applications
MWSCAS Guest Editorial Special Issue Based on the 64th International Midwest Symposium on Circuits and Systems
Resilient Output Containment Over Heterogeneous Wide-Area Networks: Mitigating Intermittent Communication and Unknown Cyber-Attacks
A Hardware Friendly Variation-Tolerant Framework for RRAM-Based Neuromorphic Computing
A 0.32 nW-1.07 µW All-Dynamic Versatile Resistive Sensor Interface With System-Level Ratiometric Measurement
A 1.6-V Tolerant Multiplexer Switch With 0.96-V Core Devices in 28-nm CMOS Technology
Exploring Impact Factors of Risk Contagion in Venture Capital Markets: A Complex Network Approach
Guest Editorial Special Issue on the IEEE International NEWCAS Conference 2020
A 650 kV/μs Common-Mode Resilient CMOS Galvanically Isolated Communication System
ECC Coprocessor Over a NIST Prime Field Using Fast Partial Montgomery Reduction
An Ultra-High Performance and Scalable Optical Flow Hardware Accelerator Based on FPGA for Autonomous Driving
Coding Efficiency Enhancement Using Time Interleaved Level Splitting and Optimized Multi-Level Delta Sigma Modulation in Digital Transmitter
A 0.003-mm 2 440fs RMS -Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS
A Compact Model of Threshold Switching Devices for Efficient Circuit Simulations
Robust Monolithic 3D Carbon-Based Computing-in-SRAM With Variation-Aware Bit-Wise Data-Mapping for High-Performance and Integration Density
ML-PLAC: Multiplierless Piecewise Linear Approximation for Nonlinear Function Evaluation
A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration
A Multi-Break Mechanical Switch Applicable for Medium Voltage Natural Commutation DC Circuit Breakers
Distributed Economic MPC for Dynamically Coupled Systems With Stochastic Disturbances
A Transformer-Based Technique to Improve Tuning Range and Phase Noise of a 20-28GHz LCVCO and a 51-62GHz Self-Mixing LCVCO
A Time and Energy-Efficient Asynchronous Hybrid-Searching Auto Frequency Calibration for a 3.2 GHz Phase-Locked Loop
Scalable Resource Optimized LUT-Based All-Digital Transmitter
A Review of Sub- μ W CMOS Analog Computing Circuits for Instant 1-Dimensional Audio Signal Processing in Always-On Edge Devices
Improved Metastability of True Single-Phase Clock D-Flipflops With Applications in Vernier Time-to-Digital Converters
A +0.44°C/-0.4°C Inaccuracy Temperature Sensor With Multi-Threshold MOSFET-Based Sensing Element and CMOS Thyristor-Based VCO
Challenges and Trends of SRAM-Based Computing-In-Memory for AI Edge Devices
Small-Signal Stability Region Analysis of Multi-Time Delay Wind Power System Considering Degenerate Hopf Bifurcation
Bumpless Transfer Control for Switched Linear Systems: A Hierarchical Switching Strategy
N-Path Filtering and Mixing Analysis - A General Approach Based on Fourier Transform
A High-Speed, Low-Power, High-Reliability and Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory
The Frenet Frame as a Generalization of the Park Transform
Analysis of Self-Injection-Coupled Quadrature Oscillator: Oscillation Amplitude and Phase Error
Compressed Sensing Σ-Δ Modulators and a Recovery Algorithm for Multi-Channel Wireless Bio-Signal Acquisition
Exponential Synchronization of Chaotic Lur'e Systems Using Sampled-Data Proportional-Integral Controller and its Application on Chua's Circuits
Adaptive Continuous Barrier Function Terminal Sliding Mode Control Technique for Disturbed Robotic Manipulator
Distributed Resilient Secondary Control for AC Microgrids Against Hybrid Attacks
A Scalable 128-Channel, Time-Multiplexed Potentiostat for Parallel Electrochemical Experiments
Generalized Active N-Port Network Analysis for Load Modulation: Doherty Power Amplifier Incorporating Tri-Coupled-Line Combiner
Variable Cut-Off Frequency Observer-Based Positioning for Ball-Beam Systems Without Velocity and Current Feedback Considering Actuator Dynamics
Guest Editorial TCAS-I Special Issue on the ESSERC 2024 Conference
Synthesis Design of Multiband Bandpass Filters Employing Multimode Bandstop Resonators With Star-Like Topology
Predefined-Time and Predefined-Accuracy Sliding Mode Control With Unknown Bound Uncertainties
Improved Multistage Continuous-Time Pipelined Analog-to-Digital Converters and the Implicit Decimation Property
A 16.5-31 GHz Area-Efficient Tapered Tunable Transmission Line Phase Shifter
Fano-Bode Cancellation-Bandwidth Limit in Full-Duplex Wireless Transceivers
Data-Driven Distributed H ∞ Current Sharing Consensus Optimal Control of DC Microgrids via Reinforcement Learning
0.6-V-V IN 7.0-nA-I Q 0.75-mA-I L CMOS Capacitor-Less LDO for Low-Voltage Micro-Energy-Harvested Supplies
Power Quality in Class-D High-Frequency Power Inverter: Input and Resonant Tank Distortion Power, Total Harmonic Distortion, and Power Factor
An Imperceptible Data Augmentation Based Blackbox Clean-Label Backdoor Attack on Deep Neural Networks
A Crystal-Less Clock Generation Technique for Battery-Free Wireless Systems
Editorial Special Issue for 50th Birthday of Memristor Theory and Application of Neuromorphic Computing Based on Memristor - Part I
A Compact 26.5-29.5-GHz LNA-Phase-Shifter Combo With 360° Continuous Phase Tuning Based on All-Pass Networks for Millimeter-Wave 5G
Switching Loss Model for Fast-Switching GaN HEMT in Half-Bridge Circuit Considering Parasitic Inductance and Temperature Effect
Instruction-Based High-Performance Hardware Controller of CRYSTALS-Kyber With Balanced Resource Utilization
On the Use of FIR Feedback in Bandpass Delta-Sigma Modulators
Chaos LiDAR Based RGB-D Face Classification System With Embedded CNN Accelerator on FPGAs
An Adiabatic Capacitive Artificial Neuron With RRAM-Based Threshold Detection for Energy-Efficient Neuromorphic Computing
Periodic Event-Triggered Control for a Class of Nonminimum-Phase Nonlinear Systems Using Dynamic Triggering Mechanism
Compact Dual-Passband Doherty Power Amplifier Based on Stub-Loaded Stepped-Impedance Transformer
Chua's Circuit With Tunable Nonlinearity Based on a Nonvolatile Memristor: Design and Realization
Guest Editorial Special Issue on the IEEE Latin American Symposium on Circuits and Systems 2020
Improved Vector Current Control for the VSC-HVdc Converter Connected to a Very Weak AC Grid
Efficient Implementation of 400 Gbps Optical Communication FEC
Dynamic Event-Triggered Consensus Control for Interval Type-2 Fuzzy Multi-Agent Systems
Memristor-Based Parallel Computing Circuit Optimization for LSTM Network Fault Diagnosis
Asymptotic Waveform Evaluation With Higher Order Poles
Digital Voltage Sampling Scheme for Primary-Side Regulation Flyback Converter in CCM and DCM Modes
WaSSaBi: Wafer Selection With Self-Supervised Representations and Brain-Inspired Active Learning
Robust Adaptive Control Based on Reduced-Order Unknown Input Observer for Fully Actuated Systems With Uncertainties
Locally Active Memristor-Based Neuromorphic Circuit: Firing Pattern and Hardware Experiment
An Efficient Accelerator Based on Lightweight Deformable 3D-CNN for Video Super-Resolution
A 98.7/97.5 dB-DR 10/20 kHz-BWs Dual-Mode Continuous-Time Delta-Sigma ADC
An 11 pJ/Bit Multichannel OOK/FSK/QPSK Transmitter With Multi-Phase Injection-Locking and Frequency Multiplication Techniques
Distributed Containment Control for Human-in-the-Loop MASs With Unknown Time-Varying Parameters
Fixed-Time Adaptive Control With Predefined Tracking Accuracy for Piezoactuators Subject to Stochastic Disturbances
Time-Varying Formation of Heterogeneous Multiagent Systems via Reinforcement Learning Subject to Switching Topologies
An Algorithm for Implementing a Modulator Whose Output is Spur-Free After Nonlinear Distortion
A Fully-Integrated Many-Electrodes Pulsed-Voltage Control Architecture for Arbitrary-Waveform Neural Stimulation With High Energy Efficiency
A Control-Bounded Quadrature Leapfrog ADC
Dynamic Event-Triggered Control for Switched Linear Systems Under DoS Attacks and its Application to DC Microgrids
Loading-Aware Reliability Improvement of Ultra-Low Power Memristive Neural Networks
Saturated Threshold Event-Triggered Control for Multiagent Systems Under Sensor Attacks and Its Application to UAVs
Highly Sensitive Phase-Variation Dielectric Constant Sensor Based on a Capacitively-Loaded Slow-Wave Transmission Line
On the Resiliency of NCFET Circuits Against Voltage Over-Scaling
High Speed and Low Digital Resources Implementation of Hodgkin-Huxley Neuronal Model Using Base-2 Functions
Rational-Exponent Filters with Applications to Generalized Exponent Filters
Event-Triggered Control for Networked Systems Under Denial of Service Attacks and Applications
High-Throughput Rate-Flexible Combinational Decoders for Multi-Kernel Polar Codes
A Low-Power Multiband Blocker-Tolerant Receiver With a Steep Filtering Slope Using an N-Path LNA With Feedforward OB Blocker Cancellation and Filtering-by-Aliasing Baseband Amplifiers
Minimal Leader Selection in General Linear Multi-Agent Systems With Switching Topologies: Leveraging Submodularity Ratio
A High-Efficiency Segmented Reconfigurable Cyclic Shifter for 5G QC-LDPC Decoder
A 4-Decade-Tunable High-Selectivity G m -C Bandpass Filter for Simultaneous Multi-Sine Bioimpedance Analysis
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS
Convergence of the Resistive Coupling-Based Waveform Relaxation Method for Chains of Identical and Symmetric Circuits
A Nearing-Free Constrained Architecture for Systematic Design of Electromechanical Sigma-Delta Modulator
Derivative-Enhanced Rational Polynomial Chaos for Uncertainty Quantification
A Proximal ADMM-Based Distributed Optimal Energy Management Approach for Smart Grid With Stochastic Wind Power
Event-Triggered Sliding Mode Control of Power Systems With Communication Delay and Sensor Faults
A Bidirectional Single Capacitor Unit Based Hybrid T-Type Converter Topology With Sensor-Less Voltage Balancing Capabilities
From Relaxation to Chaotic Oscillations: A New Paradigm for Memristor Circuits
Dynamic Event-Triggered Tracking Control for a Class of p-Normal Nonlinear Systems
BR-CIM: An Efficient Binary Representation Computation-In-Memory Design
A Reconfigurable Balun-LNA and Tunable Filter With Frequency-Optimized Harmonic Rejection for Sub-GHz and 2.4 GHz IoT Receivers
Improved Fourier Domain Model and Adaptive Controller Design for Handling Double Resonance Impact on Performance of Current-Fed Isolated DC/DC Converter
A Spatio-Temporal Video Denoising Co-Processor With Adaptive Codec
ACE-CNN: Approximate Carry Disregard Multipliers for Energy-Efficient CNN-Based Image Classification
Detection and Localization of Hardware-Assisted Intermittent Power Attacks in Mixed-Critical Systems
Guest Editorial: Special Issue Based on the 12th Edition of the Latin American Symposium on Circuits and Systems
A Time-Domain Simulation Framework for the Modeling of Jitter in High-Speed Serial Interfaces
A Model-Based Approach Digital Pre-Distortion Method for Current-Steering Digital-to-Analog Converters
A Wide-Range Self-Powered Current Measurement Method Based on Induced Current Multiplexing for Online Monitoring Devices in Transmission Lines
Event-Triggered Saturation-Tolerant Prescribed Control of Rigid Spacecraft With Actuator Faults
A Lightweight PUF-Based Weights Obfuscation Technique for Secure In-Memory AI Inference
Output Feedback Sliding Mode Control of Markovian Jump Systems and Its Application to Switched Boost Converter
Impact of Non-Idealities on the Behavior of Probabilistic Computing: Theoretical Investigation and Analysis
Adaptive Multi-Band Negative-Group-Delay RF Circuits With Low Reflection
Circuit Modeling for RRAM-Based Neuromorphic Chip Crossbar Array With and Without Write-Verify Scheme
A Highly-Efficient RF Energy Harvester Using Passively-Produced Adaptive Threshold Voltage Compensation
A 10 nA Ultra-Low Quiescent Current and 60 ns Fast Transient Response Low-Dropout Regulator for Internet-of-Things
Practical Finite-Time Synchronization of Fractional-Order Complex Dynamical Networks With Application to Lorenz's Circuit
FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer
A Universal Configuration Framework for Mem-Element-Emulator-Based Bionic Firing Circuits
A Low-Latency, Highly-Pipelined Hardware Architecture for H.266/VVC Dependent Quantization
Dynamic Nonlinear Resistance Model for a Power MOSFET in an Oscillatory RLC Circuit
Distributed Dynamic Event-Triggered Resilient Control for AC Microgrids Under FDI Attacks
Efficient Row-Layered Decoder for Sparse Code Multiple Access