yusuke1997/dblp-id-title huggingface dataset:
An analysis of wireless inductive coupling for High Data Rate biomedical telemetry using a new VHDL n-PSK modulator
Trikarenos: A Fault-Tolerant RISC-V-based Microcontroller for CubeSats in 28nm
A dynamic cache reconfiguration platform for soft real-time systems
Improving Power Efficiency and Reliability in RF Tire Pressure Monitoring Modules
A novel fully-differential class AB folded-cascode OTA for switched-capacitor applications
Design and architecture of the MPEG-4 video rendering co-processor 'TANGRAM'
Floating-point division and square root implementation using a Taylor-series expansion algorithm
Synthesis of CCIIs and Design of Simulated CCII Based Floating Inductances
Automated visual inspection of magnetic disk media
Ultra-fast simulator developed in Matlab environment to evaluate multipath performance of FM-DCSK RF system
CAM based real-time lossless image compression
Soft Error Reliability Assessment of Neural Networks on Resource-constrained IoT Devices
Analysis of neural activity from EEG data based on EMD frequency bands
ASPEN: An Asynchronous Signal Processor for Energy Efficient Sensor Nodes
Rapid prototyping environment for design of hardware/software electronic systems
An iterative method for instantaneous frequency estimation
Alternatives for low-complexity complex rotators
A 115V bi-phasic pulse electrical muscle stimulator by using inductor-sharing dual-output boost converter with supply-stepping switch driver
Impulse-Based Asynchronous Serial Communication Protocol on Optical Fiber Link for AER Systems
MMSE-based receivers for asynchronous DS-CDMA communication systems in the presence of double-spread multipath channels
Flexible escape routing for flip-chip designs
Modeling and simulation of low-power and low-voltage delta-sigma modulators
High performance speed control of interior permanent magnet synchronous motors with maximum power factor operation
Dedicated hardware IP module for extracting singular points from fingerprints
VHDL-AMS modeling of a multi-standard phase locked loop
A digital cardiotachometer ASIC
A 0.6V Programmable Frequency Divider and Digitally Controlled Oscillator for use in a Digital PLL in the Subthreshold Region
Wirelessly Powered and Modular Flexible Implantable Device
Technique of 3D NILT based on complex Fourier series and quotient-difference algorithm
Tracking the Effects of Tumor Treating Fields on Human Breast Cancer Cells in vitro Using a Capacitance Sensing Lab-on-CMOS Microsystem
A case study of improving at-speed testing coverage of a gigahertz microprocessor
Cardiovascular Segmentation Methods Based on Weak or no Prior
Delay-dependent criteria for robust H ∞ control of uncertain nonlinear delayed systems
Comparison of Ultra-Low Phase Noise BAW-Based NMOS and PMOS Cross-Coupled Oscillators
Monolithic feedback LNA for active antenna simultaneously input port signal and noise matched
The special trans function theory to the AM detector transfer factor analytical analysis
FPGA implementation of very high radix square root with prescaling
On the calibration of AD and DA converters based on R/�?R ladder networks
A dedicated electrode driving ASIC for epidural spinal cord stimulation in rats
Making Memristive Processing-in-Memory Reliable
Adaptive data model for efficient constraint handling in AMS IC design
Address Generation Techniques for Conflict Free Parallel Memory Accessing in FFT Architectures
Development and Evaluation of ANN, ACOR-ANN, ALO-ANN Based Small-Signal Behavioral Models for GaN-on-Si HEMT
An all-digital ADC/TDC for sensor interface with TAD architecture in 0.18-µm digital CMOS
Model-based design and distributed implementation of bus arbiter for multiprocessors
Introducing redundant transformations for high level built-in self-testable synthesis
A Multi-Parametric Finite Element Analysis of Heat Distributions in Implanted Micro-LEDs
Power-loss reduction of a MOSFET cross-coupled rectifier by employing zero-voltage switching
Vector-radix-2 2 ×2 2 fast Fourier transform algorithm
Design of new full adder cell using hybrid-CMOS logic style
Design of 0-15GHz band 180 degree digital phase shifting cell topology
Improved wide input voltage range 1 kW solar inverter
A Differential-Ring-Oscillator with up to 35 dBc/Hz Phase Noise Improving Amplitude Feedback Loop for Ultra Low Power Systems
Why hybridize NEMS with CMOS?
Double modulation scheme for switching mixers controlled by sigma-delta modulators
The Performance Modeling of Ring Laser Gyro In Inertial Navigation
Optimization of the three-step search algorithm by exclusion of stationary macroblocks from the search process
Plasmon-Activated Gas Sensor Based on Lossy MoS2/Au Coated Optical Fibre
Performance Improvement of a 2.4-GHz Multi-stage Rectifier Using Power Optimized Waveforms
Direct Digital Frequency Synthesis design methodology for optimized spurs / jitter performances
A multimode extra high IF1 image rejection receiver for TDMA applications
CryoCMOS Characterization Strategies and Challenges
Dynamic Element Matching for Low-power ΣΔModulator with R-C based internal DAC
Numerical simulation and modeling of static characteristics and electrical noise in submicron MOS transistors
Application of phased array systems to deep brain stimulation
An Enhanced Check-Node Architecture for 5G New Radio LDPC Decoders
Handling quality characterization of flight systems controller gains
Performance Analysis of Encoding Schemes in Hyperdimensional Computing for EEG Signals
Benchmark the software based MPEG-4 video codec
"Visual" Design of K-band Low-Noise Amplifier Using SiGe BiCMOS Technology
A 200-MHz crystal oscillator with 0.5 ppm long term stability
On-chip non-periodic high-swing noise detector
High-level design and synthesis of a resource scheduler
A Reed-Solomon coding/decoding structure for an ADSL modem
Characterisation and Modelling of 22-nm FD-SOI Transistors Operating at Cryogenic Temperatures
Neural network based decoupling control for multivariable systems
Fully integrated CMOS phase-locked loop with 30 MHz to 2 GHz locking range and 35 ps jitter
The effect of ground bond-wire on the performance of CMOS class-E power amplifiers
Comparison on the performance of the confined-chacogenide with thin metal interlayer and optimised lateral phase change memories
Balanced Ternary Logic Gates with Memristors
CMOS Low-Voltage Indirect Current Feedback Instrumentation Amplifiers With Improved Performance
A proof-of-concept superregenerative QPSK transceiver
Tracking objects in videos with texture features
Design and Implementation in FPGA of a MIMO Decoder for a 4G Wireless Receiver
A New Method for the Design of k-Class Bayes Classifiers
Design of an electric vehicle for the Maltese islands
Power dissipation in one-latch and two-latch double edge triggered flip-flops
A single chip radio transceiver for 802.11a/b/g WLAN in 0.18μ CMOS
Monolithic quenching-and-reset circuit for single-photon avalanche diodes
Evolutionary design of electronic devices
Low Area Reconfigurable Architecture for 3D-HEVC DMMs Decoder Targeting 1080p Videos
Robust controller synthesis for the coupled mass benchmark problem
A novel low-voltage floating-gate CMOS transconductance amplifier with sinh (tanh) shaped output current
Integrated front-end for on line continuous calibration of Rogowski coil current transducer
Customized embedded processor design for global photographic tone mapping
A 0.8-6 GHz True-Time-Delay Beam-Nulling Receiver Front-End
UWB-IR digital baseband architecture for IEEE 802.15.6 wireless BAN
A Low Power Fast Ethernet Physical Layer Transceiver
Untestable faults identification in GPGPUs for safety-critical applications
A high quality hardware friendly motion estimation algorithm focusing in HD videos
A scalable time-domain biosensor array using a capacitor-less CMATC and logarithmic cyclic time-attenuation-based TDC with discharge acceleration for high-spatial-resolution bio-imaging
TCT reconstruction with truncated projection data
Circuitry for nonlinear vibration energy harvesting
A HW/SW mixed mechanism to improve the dependability of a stack processor
Lattice-basedmemory allocation for data-intensive signal processing applications
High-speed ECL-compatible serial I/O in 0.35 μm CMOS
A two-step folder for a high-speed CMOS folding-and-interpolating ADC
PFM mode buck converter: A mathematical model to calculate the maximum switching frequency
A new Gas Recognition Technique using On Chip Sensor Array Measurements
DROP: Distributed Run-Time and Power Constraint Mapping for Many-Core Systems
An extended frequency range CMOS voltage-controlled oscillator
A Compact Low-Power Time-Domain Winner-Take-All Circuit
A novel baseline holder circuit for nuclear imaging front-end electronics
Shot detection with multi-measures
Impact on performance, power, area and wirelength using electromigration-aware cells
High-Resolution Auto-Balancing Wheatstone-Bridge with Successive Approximation of ΔΣ-Modulated Digitally Controlled Variable Resistor
Associated resistive and discrete circuits in the qualitative analysis of networks of distributed and lumped circuits
Free route air traffic flow manager
Palmo signal processing: VLSI results from an integrated filter
Two-layer perceptron for fast plasma density evaluation in broadband reflectometry
Detection of cardiac late potentials using higher order time-frequency
The real-frequency technique applied to a narrow band MMIC active filter with transmission zero at finite frequencies
Design and Implementation of a Correlation-based DSP Software for Narrowband Power Line Communication Receiver
CORDIC versus conventional logic for realisation of normalised lattice all-pass filters
A reconfigurable linear feedback shift register (LFSR) for the Bluetooth system
Transient analysis for high-speed interconnect networks based on AWE and delay evaluation technique
A novel statistical approach for chaos detection in Chua's circuit
A hierarchical LST-based task scheduler for NoC-based MPSoCs with slack-time monitoring support
System-Design-Oriented Low Noise Amplifier Modeling
Column parallel single-slope ADC with time to digital converter for CMOS imager
Series and parallel circuit models containing memristors and inverse memristors
New emerging applications for smart power integrated circuits: technologies implications and new design techniques
A Variable Duty Cycle with High-Resolution Synchronous Mirror Delay
Automatic Detection of People Getting Into a Bus in a SMART Public Transportation System
A monolithic 12-bit digitally calibrated D/A converter
Project CONSOLE: hierarchical physical design partitioning
Evaluation and comparison of structural test methodologies for analogue and mixed signal circuits
A reliable full-swing low-distortion CMOS bootstrapped sampling switch
A 2-Gb/s 60 GHz transmission-gate based 130nm CMOS on-off keying modulator
Effect of Simultaneous Switching Noise on an Analog Filter
CMOS differential pair transconductor with active-error feedback
Combining Arithmetic Approximation Techniques for Improved CNN Circuit Design
An extra low noise 1.8 GHz voltage controlled oscillator in 0.35 SiGe BiCMOS technology
Understanding large swing and low swing operation in DyCML gates
Fast algorithms for the estimation of block motion vectors
Multi-Mode Wideband Voltage Controlled Oscillators
A Fixed-Pulse Shape Feedback Technique with reduced clock-jitter sensitivity in Continuous-Time sigma-delta modulators
Scalable Model for Multi-Standard Phase Locked Loop
High Precision Carry-Look-Ahead Logic for Negation, Absolute Value, and Two's Complement
Single event transient mitigation through pulse quenching: Effectiveness at circuit level
Achieving design closure in a typical mixed-signal ASIC; a Design-For-Test centric approach
Design and testing of a CMOS Self-Biased Current Source
On the design of single-inductor double-output DC-DC buck, boost and buck-boost converters
An efficient low-bit rate adaptive mesh-based motion compensation technique
Performance analysis of the synchronization mechanism used at the VIRUS interface
Determining multi-valued input-output characteristics in the circuits containing bipolar transistors
Readout Circuits for Three-dimensional Integration of Single-photon Avalanche Diode Detector Arrays
Implementation of boost converter zero current detection using digital ASIC design flow
A dual-axis bulk micromachined accelerometer with low cross-sensitivity
Asynchronous logic in bit-serial arithmetic
A "Real-like" polarimetric weather radar data generation using physical and statistical models
VerTrace: An Open-Source Toolchain for Portable Stimulus Vertical Reuse
High-speed A/D and D/A converters using hybrid filter banks
Current Mode Communication Scheme for Subretinal Implants with 8mV RMS Wire Potential
VHDL-AMS Modeling of an UWB Radio Link Including Antennas
Design of an 128-point FFT processor for OFDM applications
Towards collaborative support system for teamwork between robots and human in hazard incidents
Experimental and numerical analysis of coupling losses of single mode fibre/Microsructure Optical Fibre
FPGA implementation of four-step genetic search algorithm
Vertically integrated circuits: Example of an application to an x-ray detector
Phoneme recognition using neural networks
On the stability of high order Sigma-Delta modulators
A novel scheme for testing radio frequency voltage controlled oscillators
Synthesis of provably-correct hardware with options
Recursive structure for linear filtering using number theoretic transform
A Low-Power 2nd-Order Delta-Sigma ADC with an Inverter-Based Zero-Crossing Detector
A low voltage high resolution pipelined incremental ADC
Test data compression based on the reuse of parts of the dictionary entries
A 6b 100MS/s 0.28mm2 5mW 0.18um CMOS F/I ADC with a Novel Folder Reduction Technique
Noise characterization of the 0.35 μm CMOS analog process implemented in regular and SOI wafers
Real time analysis for the synthesis of high quality male, female and child speech
An integrated model of a wireless power transportation for RFID and WSN applications
An integrated rad-hard test-vehicle for embedded emerging memories
Fingerprint identification software for forensic applications
Generalized linear model for ΣΔ modulators
A zinc dioxide-on-silicon MEMS resonator for narrowband filtering
FTNoCSim: A new Simulation platform for Evaluating Network-on-Chip Reliability
Is spiking logic the route to memristor-based computers?
Analysis of an 1.8 - 2.5 GHz multi-standard high image-reject front-end
Study of Chopping Magnetic Flux Modulation on Surface Acoustic Wave Magnetic Sensor
A reconfigurable buck-boost switched capacitor converter with adaptive gain and discrete frequency scaling control
Low-noise ASIC and New Layout of Multipolar Electrode for both High ENG Selectivity and Parasitic Signal Rejection
Statistical leakage analysis using the deterministic modeling of cell leakage current
Cell stack length using an enhanced logical effort model for a library-free paradigm
New CMOS integrated pulse width modulator for voltage conversion applications
A novel design technique for input differential pairs in single-ended operational amplifiers
Visual Analytics in the web of data
Modeling of STT-MTJ for low power embedded memory applications: A comparative review
Enhancing performances of multilayered directional couplers on anisotropic substrates
Low noise and low cost neural amplifiers
A Switched-Capacitor Hybrid Quadratic Buck Converter for 48V-Input Wide-Range Conversion
An efficient procedure for packet collision resolution in wireless slotted ALOHA MIMO systems
An Enhanced ACBC Three-Stage Amplifier Using Complementary Indirect Miller Compensation
Noise performance of classical current mirrors
Architectural and Control Contributions for PV Grid-Connected Systems Applying Dual-Stage Inverters
Analysis of The Manhattan Update Rule Algorithm
Delay-sensitive power estimation at the register-transfer level
Low noise Ku-band drain mixer using P-HEMT technology
Frequency-Interleaved ADC with RF Equivalent Ideal Filter for Broadband Optical Communication Receivers
Efficient implementation of the keyed-hash message authentication code (HMAC) using the SHA-1 hash function
Reducing the designing time of configurable interfaces oriented to control applications
Finite frequency test for Hurwitz 2-D polynomials
Automatic tuning circuit for Gm-C filters
Investigation of Timing Jitter in NAND and NOR Gates Induced by Power-Supply Noise
Design of 4-bit parallel sub-sampling A/D converter for IR-UWB receiver
A New Architecture for Charge Pump Circuit Without Suffering Gate-Oxide Reliability in Low-Voltage CMOS Processes
A new two-stage Op-Amp using gate-driven, and positive feedback techniques
Optical PAM-4 generation through polarization multiplexing in single-polarization single-mode VCSELs
Design and prototyping of a CMOS standard contactless current measurement macrocell for integrated microsystems in power control applications
A Novel CMOS Wideband Auto-tuning Phase Shifter Circuit
A high-accuracy and high-efficiency on-chip current sensing for current-mode control CMOS DC-DC buck converter
Blind calibration of nonlinearity mismatch errors in two-channel time-interleaved ADCs
Analog VLSI CMOS implementation of beta neuron in a low power low voltage environment
Application of adaptive evolutionary algorithm for low power design of CMOS digital circuits
Design of a Retentive and Single-Event Upset Tolerant TSPC Flip-Flop
A Divider-less General PLL Lock Assist and Automatic Frequency Calibration System for Millimeter-Wave Sub-Sampling Phase-Locked Loops
Analysis of nonlinearities in RF CMOS amplifiers
An object oriented machine for control applications
Reducing energy dissipation of video memory by adaptive bit-width compression
Low-complexity feature extraction unit for "Wake-on-Feature" speech processing
Hardware-efficient PRBGs based on 1-D piecewise linear chaotic maps
Performance evaluation of a distributed telerobotic framework
Digital Resolution Requirements in 0-X MASH Delta-Sigma-Modulators
Design and Optimization of IIR Digital Filters with Non-Standard Characteristics Using Particle Swarm Optimization Algorithm
Leapfrog log-domain filters
Hardening C-elements against metastability
Biobjective Hybrid Evolutionary Algorithm Applied to Resonator Filters of Arbitrary Topology
Design and Implementation of BiFET LNAs for W-CDMA / IEEE 802.11a Applications
Verification of Inductive-Coupling-Based CMOS Biosensor Focusing on Dielectric Loss of β-Dispersion for Detecting Exosomes Through Electromagnetic Simulation
InP-based logic gates for low power monolithic optoelectronic circuits [InGaAs/InAlAs/InP]
Computationally Light Algorithms for Tactile Sensing Signals Elaboration and Classification
Detecting denial-of-service hardware Trojans in DRAM-based memory systems
Multifont Ottoman character recognition
A new class of Smith predictors for network congestion control
Memristors and other higher-order elements in generalized through-across domain
Boost-type power factor correction system with three-level sigma-delta modulation
Use of the structured singular value to analyse the worst-case performance of active filters
Differential voltage current conveyor and fully differential current conveyor in standard CMOS technology for low voltage analog circuits applications
Analysis and comparison of low-voltage CML D-latch
Investigating the Volume Conduction Effect in MMG and EMG during Action Potential Recording
A novel and optimal method for locating and sizing of capacitors in distribution systems based on reactive power identification
Design of a CMOS readout circuit for dental X-ray imaging
An improved current mode instrumentation amplifier
Simple Analogue VLSI Circuit of a Cortical Neuron
Modified Booth 1's complement and modulo 2 n -1 multipliers
Low-sensitivity, low-power fourth-order band-pass active-RC allpole filter using impedance tapering
An exact, high-efficiency PFM DC-DC boost converter with dynamic stored energy
A learnable self-feedback ratio-memory cellular nonlinear network (SRMCNN) for associative memory applications
Federated learning compression designed for lightweight communications
The design of CMOS real-time motion-direction detection chip with BJT-based silicon-retina sensors and correlation-based motion detection algorithm
Low power 380μW Energy Efficient 1.8 GHz Digitally Controlled Oscillator for IoT Applications
Implementation of dual-channel receiver suitable for 3G power amplifiers characterization in RF/Digital predistortion systems
Low-loss converters with high step-up conversion ratio working at the border between continuous and discontinuous mode
On the design of low-sensitive BOTA-C biquadratic filter
Impact of charge injection on system-level performance of a discrete-time GSM receiver
LUT-Based Power Macromodeling Technique for DSP Architectures
Hardware-assisted interrupt delivery optimization for virtualized embedded platforms
Design of 2�?VDD-Tolerant I/O Buffer with Considerations of Gate-Oxide Reliability and Hot-Carrier Degradation
Surveying the pipeline temperature and pressure profile using an in-line acquisition tool
AI-Assisted Design of a Compact Voltage Monitoring System with a Millisecond-Delayed Fault Detection Circuit
Model-based design for selecting fingerprint recognition algorithms for embedded systems
Ultra Wide Band Band Pass filter embedding a MLF low cost package with wire bound attach process
A novel architecture for remote interrogation of wireless battery-free capacitive sensors
A new assignment algorithm for star network topology design
Efficient parallel processing algorithm for fast calculation of 3D filtering using the VR FHT
Toolkit for PID dominant pole design
System-Level Design for Nano-Electronics
Error analysis of FFT architectures for digital video applications
An IF input continuous-time sigma-delta analog-digital converter with high image rejection
A High Performance and Full Utilization Hardware Implementation of Floating Point Arithmetic Units
Support Vector Machine for diagnosis of the bars of cage inductance motor
A high pass switched capacitor ΣΔ modulator
A systolic trinomial GF(2k) multiplier based on the Montgomery Multiplication Algorithm
Hardware design and performance analysis of VDSL transceivers
A method reducing the time of RF test for Coupled Resonator Filters
Building blocks for a 100 MS/s, 10-b, 1.8 V CMOS cascaded folding & interpolating A/D converter
Wave Pipelining using Self Reset Logic
A multi unsymmetrical beam tapered slot-yagi antenna for PMMW imaging
Formal development of a reconfigurable tool for parallel DNA matching
Designing Fast Convolutional Engines for Deep Learning Applications
Low power-low voltage band gap references for flash-EEPROM integrated circuits: design alternatives and experiments
Design Strategies for High-resolution High-speed Flash-assisted Pipelined SAR ADCs
A Novel low power high dynamic range all CMOS Current-mode AGC
A 64 GBaud 6-Bit Current Steering DAC With a Binary Tree Current Summing Network
2D-Motion Detection using SNNs with Graphene-Insulator-Graphene Memristive Synapses
A two-step quantization ΔΣ-modulator architecture with cascaded digital noise cancellation
A 2.0 GHz 4 Mb pseudo-SRAM with on-chip BIST for refresh in 0.18u CMOS technology with LVDS output data bus drivers
Trusted computing - A new challenge for embedded systems
A design methodology for high-performance and low-leakage fixed-point transpose FIR filters
Stencil shadow volumes for complex and deformable objects
Automatic generation of electro-thermal models with TRAPPIST
Collapse of lost solution and chaos in a driven piecewise linear Rayleigh oscillator
A CMOS Current-Mode Hyperbolic-Sine-Based Three-Electrode Sensor Interfacing and Amplification Circuit
Very short locking time PLL based on controlled gain technique
Ultra-low power readout electronics for wireless gas sensors in IoT
A High-Performance and Power-Efficient SIMD Convolution Engine for FPGAs
Compact electrotactile stimulation and EMG acquisition system with embedded blanking of stimulation artifacts
A 250 MHz delta-sigma modulator for low cost ultrasound/sonar beamforming applications
Robust estimation of LP parameters in white noise with unknown variance
ADC Resolution for Simultaneous Reception of Two Signals with High Dynamic Range