yusuke1997/dblp-id-title huggingface dataset:
Threshold ion parameters of line-type soft-errors in biased thin-BOX SOI SRAMs: Difference between sensitivities to terrestrial and space radiation
Machine Learning On Transistor Aging Data: Test Time Reduction and Modeling for Novel Devices
Specific aspects regarding evaluation of power cycling tests with SiC devices
Suppressing Channel Percolation in Ferroelectric FET for Reliable Neuromorphic Applications
Dielectric Breakdown Analysis on Bottom and Top-Gated IGZO-TFT
Single-event effects on optical transceiver
BEOL tip-to-tip dielectric reliability characterization using a design-representative test structure
Permanent shunts from passing shadows: Reverse-bias damage in thin-film photovoltaic modules
Deep Level Effects in N-Polar AlGaN/GaN High Electron Mobility Transistors: Toward Zero Dispersion Effects
Dielectric Thickness and Fin Width Dependent OFF-State Degradation in AlGaN/GaN SLCFETs
Applying Machine Learning to Design for Reliability Coverage
Integrated Test Circuit for Off-State Dynamic Drain Stress Evaluation
Advanced methods for CPU product reliability modeling and enhancement
Comparative Study of TDDB Models on BEOL Interconnects for Sub-20 nm Spacings
Influence of SiC epitaxial wafer quality on yield of 1.2kV SiC-DMOSFETs
A Compact Physics Analytical Model for Hot-Carrier Degradation
GHz Cycle-to-Cycle Variation in Ultra-scaled FinFETs: From the Time-Zero to the Aging States
Enhanced Dye and Pull Analysis for CSP Package Types
Comparison of AC and DC BTI in SiC Power MOSFETs
Reliability assessment of 4GSP/s interleaved SAR ADC
Impacts of Post-Cu CMP Queue Time on Reliability
In-Situ Monitoring of Self-Heating Effect in Aggressively Scaled FinFETs and Its Quantitative Impact on Hot Carrier Degradation Under Dynamic Circuit Operation
Effects of Thermal Boundary Resistance on the Thermal Performance of GaN HEMT on Diamond
The Correct Hot Carrier Degradation Model
Lifetime evaluation for Hybrid-Drain-embedded Gate Injection Transistor (HD-GIT) under practical switching operations
Algorithm for Robust Correction of Long-Term Drift Components in Gate Leakage Current RTN Data
A Statistical Learning Model for Accurate Prediction of Time-Dependent Dielectric Degradation for Low Failure Rates
Design Insights to Address Low Current ESD Failure and Power Scalability Issues in High Voltage LDMOS-SCR Devices
A Physics-Based Electromigration Assessment of Analog Circuits
A New Methodology to Precisely Induce Wake-Up for Reliability Assessment of Ferroelectric Devices
Utilizing a Thorough Understanding of Critical Aging and Failure Mechanisms in finFET Technologies to Enable Reliable High Performance Circuits
Large Signal RF Reliability of 45-nm RFSOI Power Amplifier Cell for Wi-Fi6 Applications
Substrate and temperature influence on the trap density distribution in high-k III-V MOSFETs
Excellent Reliability of Xtacking™ Bonding Interface
Accelerated Device Degradation of High-Speed Ge Waveguide Photodetectors
An investigation of dielectric thickness scaling on BEOL TDDB
Investigation of single event upset and total ionizing dose in FeRAM for medical electronic tag
Soft error immune latch design for 20 nm bulk CMOS
Improved Memory Window and Retention of Silicon Channel Hf0.5Zr0.5O2 FeFET by Using SiO2/HfO2/SiO2 Gate Side Interlayer
Low-PBTS defect-engineered high-mobility metal-oxide BEOL transistors
Plasma Antenna Charging in CMOS Image Sensors
Degradation rate for surface pitting in GaN HEMT
Effects of Temperature and Supply Voltage on Soft Errors for 7-nm Bulk FinFET Technology
HTGB and DGS Reliability Assessment of e-mode GaN-HEMTs with Ferroelectric Gate Stack
Single-Event Latchup Vulnerability at the 7-nm FinFET Node
Investigation of Channel Dimension Dependence of BTI Degradation and Variation in Planar HKMG MOSFET
Airplane system design for reliability and quality
Effects of Collected Charge and Drain Area on SE Response of SRAMs at the 5-nm FinFET Node
Cryogenic Investigation of Vertical Charge Loss in 3D NAND Flash Memories
Accurate screening of defective oxide on SiC using consecutive multiple threshold-voltage measurements
Effect of Source & Drain Side Abutting on the Low Current Filamentation in LDMOS-SCR Devices
A novel methodology to evaluate RF reliability for SOI CMOS-based Power Amplifier mmWave applications
Investigation of alpha-induced single event transient (SET) in 10 nm FinFET logic circuit
Investigation of First Fire Effect on VTH Stability and Endurance in GeCTe Selector
Influence of Donor-Type Hole Traps Under P-GaN Gate in GaN-Based Gate Injection Transistor (GIT)
Impact of gate oxide breakdown in logic gates from 28nm FDSOI CMOS technology
Measurement of the $D_{it}$ Changes Under BTI-Stress in 4H-SiC FETs Using the Subthreshold Slope Method
Reliability Perspective on Neuromorphic Computing Based on Analog RRAM
Intrinsic reliability of local interconnects for N7 and beyond
Surrogate Model Assisted Design of Silicon Anode Considering Lithiation Induced Stresses
The Concept of Safe Operating Area for Gate Dielectrics: the SiC/SiO2 Case Study
Comprehensive Reliability Assessment of 32Gb (Hf,Zr)O2-Based Ferroelectric NVDRAM
Research on the Latch-Up Mechanism of DSOI at High Temperature
Mechanical and chemical adhesion at the encapsulant interfaces in laminated photovoltaic modules
Process-Induced Anomalous Current Transport in Graphene/InA1N/GaN Heterostructured Diodes
Industrial approach to the chip and package reliability of SiC MOSFETs (Invited)
Package induced stress impact on transistor performance for ultra-thin SoC
Hot Carrier Degradation in Cryo-CMOS
Silicon Based RF Reliability Challenges for 5G Communications
Traps Based Reliability Barrier on Performance and Revealing Early Ageing in Negative Capacitance FET
A Comparative Analysis of Aging Effects on Computing-in-Memory Systems in 28nm CMOS
Differentiated Silicon Technologies for mmwave 5G and 6G applications (Invited)
Design and Heavy-Ion Testing of MTJ/CMOS Hybrid LSIs for Space-Grade Soft-Error Reliability
An integral injector-victim current transfer model for latchup design rule optimization
General features of progressive breakdown in gate oxides: A compact model
Analysis of Random Telegraph Noise (RTN) at Near-Threshold Operation by Measuring 154k Ring Oscillators
Soft Error Performance of High-Speed Pulsed-DICE-Latch Design in 16 nm and 7 nm FinFET Processes
A Recombination-Enhanced-Defect-Reaction-Based Model for the Gate Switching Instability in SiC MOSFETs
Write Recovery Time Degradation by Thermal Neutrons in DDR4 DRAM Components
Novel Stress Migration Failure Analysis by EBSD-KAM
BVDSS (drain to source breakdown voltage) instability in shielded gate trench power MOSFETs
CV Characterization of Si/SiGe Heterostructures at Cryo Temperatures
Mechanism of soft and hard breakdown in hexagonal boron nitride 2D dielectrics
Method to assess the impact of LER and spacing variation on BEOL dielectric reliability using 2D-field simulations for <20nm spacing
Degradation of vertical GaN FETs under gate and drain stress
Single Event Induced Crosstalk of Monolithic 3D Circuits Based on a 22 nm FD-SOI Technology
Reliability of Wafer-Level Ultra-Thinning down to 3 µm using 20 nm-Node DRAMs
Reliability-Ensured and Fast (xRRAM
Accuracy of Thermal Analysis for SiC Power Devices
Investigating of SER in 28 nm FDSOI-Planar and Comparing with SER in Bulk-FinFET
NBTI Characterization with in Situ Poly Heater
Electromigration Performance of Cu Bumps in Various Configurations
Effect of Drain-to-Source Voltage on Random Telegraph Noise Based on Statistical Analysis of MOSFETs with Various Gate Shapes
An investigation of capacitance aging model for extreme low-k and high-k dielectrics
Reliability issues of gate oxides and $p-n$ junctions for vertical GaN metal-oxide-semiconductor field-effect transistors (Invited)
TID Response of an Analog In-Memory Neural Network Accelerator
Reliable FeFET-based Neuromorphic Computing through Joint Modeling of Cycle-to-Cycle Variability, Device-to-Device Variability, and Domain Stochasticity
Reliability Characterization of a Flexible Interconnect for Cryogenic and Quantum Applications
Keynote Address 1: "Transistors and reliability in the innovation era"
GaN HEMTs Design and Modeling for 5G
Semantic Autoencoder for Modeling BEOL and MOL Dielectric Lifetime Distributions
Negative bias temperature instability caused by plasma induced damage in 65 nm bulk and Silicon on thin BOX (SOTB) processes
Demonstration of Chip Overclock Detection by Employing Tamper-Aware Odometer Technology
Influence of Back Gate Bias on the Hot Carrier Reliability of DSOI nMOSFET
Failure Analysis of AlGaN/GaN Power HEMTs through an innovative sample preparation approach
Investigation of resistance fluctuations in ReRAM: physical origin, temporal dependence and impact on memory reliability
Characterization of Interface Trap Density in SiC MOSFETs Subjected to High Voltage Gate Stress
Electrical and reliability performance of atomic layer deposition HfO2 capping layer on porous low dielectric constant materials
TDDB Characterization of High-k Gate Dielectric on a Sub-nanosecond Timescale
Physical Model for ESD Human Body Model to Transmission Line Pulse
Gaining Confidence - A Review of Silicon Carbide's Reliability Status
Evidence for 2D Hole Gas in GaN Gate Injection Transistors and its Role in RDson Recovery
Customized wafer level verification methodology: quality risk pre-diagnosis with enhanced screen-ability of stand-by stress-related deteriorations
Defects in 4H-SiC epilayers affecting device yield and reliability
TCAD Investigation of Power-to-Failure Evaluation for Ultrafast Events in BJT-based ESD Protection Cells
Cell Lifetime Degradation Model Development for Li-Ion Coin Cells considering Calendar Aging and Post-Knee Degradation (Invited)
Modeling the Effect of Random Dopants on Hot-Carrier Degradation in FinFETs
ReRAM CiM Fluctuation Pattern Classification by CNN Trained on Artificially Created Dataset
Fast chip aging prediction by product-like VMIN drift characterization on test structures
Electrical model of an NMOS body biased structure in triple-well technology under photoelectric laser stimulation
Decoupling of NBTI and Pure HCD Contributions in p-GAA SNS FETs Under Mixed VG/VD Stress
Burst CV (< 2μs) Measurement System for BTI Analysis of MOS Capacitors
Wafer-Level Aging of InGaAs/GaAs Nano-Ridge p-i-n Diodes Monolithically Integrated on Silicon
Anomalous accelerated negative-bias- instability (NBI) at low drain bias
Physical Insights into Phosphorene Transistor Degradation Under Exposure to Atmospheric Conditions and Electrical Stress
Reliability of STT-MRAM for various embedded applications
Fault Isolation and Failure Analysis Challenges in Advanced Packages (Invited)
Instabilities of SiC MOSFETs during use conditions and following bias temperature stress
Transformation of Ramped Current Stress VBDto Constant Voltage Stress TDDB TBD
High- Temperature PBTI in Trench-Gate Vertical GaN Power MOSFETs: Role of Border and Semiconductor Traps
Monolithic 3D Integrated BEOL Dual-Port Ferroelectric FET to Break the Tradeoff Between the Memory Window and the Ferroelectric Thickness
Modeling Hot-Electron Trapping in GaN-based HEMTs
Temperature Dependent Mismatch and Variability in a Cryo-CMOS Array with 30k Transistors
Novel Linear Model for OFF-State Stress Causing Stand-By Current of Advanced VNAND Chip
Experimental Study on Effects of Boron Transient Enhanced Diffusion on Channel Size Dependences of Low Frequency Noise in NMOSFETs
Circuit Reliability Analysis of RRAM-based Logic-in-Memory Crossbar Architectures Including Line Parasitic Effects, Variability, and Random Telegraph Noise
Cycling Induced Imprint Phenomenon at Intermediate State used for Multi-Level Operation in HfO2-FeFET
Leakage Currents and E' Centers in 4H-SiC MOSFETs with Barium Passivation
New insights into the HCI degradation of pass-gate transistor in advanced FinFET technology
Separation of interface states and electron trapping for hot carrier degradation in ultra-scaled replacement metal gate n-FinFET
A fWLR test structure and method for device reliability monitoring using product relevant circuits
New RC-Imbalance Failure Mechanism of Well Charging Damage and The Implemented Rule
Leveraging Large-Scale TLC 3D NAND Flash Characterization to Investigate Early Lifetime Reliability of SSDs through Extreme Value Statistics
The Influence of Gate Bias on the Anneal of Hot-Carrier Degradation
Thermally-activated failure mechanisms of 0.25 \ \mu \mathrm{m}$ RF AIGaN/GaN HEMTs submitted to long-term life tests
GHz AC to DC TDDB Modeling with Defect Accumulation Efficiency Model
Neutron Beam Attenuation Through Semiconductor Devices During SEU Testing
Novel Gyrotron Beam Annealing Method for Mg-Implanted Bulk GaN
Response of Switching Hole Traps in the Small-Area P-MOSFET Under Channel Hot-Hole Effect
Switching Variability Factors in Compliance-Free Metal Oxide RRAM
Investigation on Contacts Thermal Stability for 3D Sequential Integration
Interconnect design study for electromigration reliability improvement
Toward Understanding Stability of RF MIS-HEMTs Under ON/SEMI-ON/OFF-State Pulses with Scaling in-situ SiN Thicknesses
Trapping in $\text{Al}_{2}\mathrm{O}_{3}/\text{GaN}$ MOScaps investigated by fast capacitive techniques
Applying Universal Chip Telemetry to Detect Latent Defects and Aging in Advanced Electronics
IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, CA, USA, April 19-23, 2015
Monte Carlo model of reset stochastics and failure rate estimation of read disturb mechanism in HfOx RRAM
Constant-Gate-Charge Scaling for Increased Short-Circuit Withstand Time in SiC Power Devices
Assessing intrinsic and extrinsic end-of-life risk using functional SRAM wafer level testing
Thermal Challenges for HPC 3DFabric TM Packages and Systems
Carrot-like crystalline defects on the 4H-SiC powerMOSFET yield and reliability
Fast CV MSM Technique for Comprehensive Analysis of Bulk Trapping in Low-K Carbon-Doped Dielectrics
DC and RF Reliability Assessment of 5G-MMW capable GaN HEMT Process (Invited)
Modeling of Apparent Activation Energy and Lifetime Estimation for Retention of 3D SGVC Memory
Extremely Large Breakdown to Snapback Voltage Offset $(\mathrm{V}_{\mathrm{t}1} > > \mathrm{V}_{\text{BD}})$: Another Way to Improve ESD Resilience of LDMOS Devices
"Shift and Match" (S...M) method for channel mobility correction in degraded MOSFETs
Gate-Oxide Trapping Enabled Synaptic Logic Transistor
A TCAD to SPICE Framework for Isolation of BTI and HCD in GAA-SNS FETs and to Estimate Impact on RO Under Normal and Overclocking Conditions
Short-Circuit Capability with GaN HEMTs : Invited
Performance Improvement and Reliability Physics in SiC MOSFETs
Commercialization and reliability of 600 V GaN power switches
RTN Analysis of Schottky p-GaN Gate HEMTs Under Forward Gate Stress: Impact of Temperature
Quantum Mechanical Connection of Schottky Emission Process and Its implications on Breakdown Methodology and Conduction Modeling for BEOL Low-k Dielectrics
Statistical Modeling of Time-Dependent Post-Programming Conductance Drift in Analog RRAM
When Variability Meets Security
Resilient automotive products through process, temperature and aging compensation schemes
Study of Local BTI Variation and its Impact on Logic Circuit and SRAM in 7 nm Fin-FET Process
Modeling BTI Reliability in CMOS DRAM Periphery Device: A Review of BTI Analysis Tool (BAT)
Distinguishing Interfacial Hole Traps in (110), (100) High-K Gate Stack
The Role of RF Operational Life Testing in Evaluating III-V Devices Addressing RF Through Millimeter-wave Applications
Aging Characterization at Cryogenic Temperature with Synthesizable Odometers in 12NM and 28NM
Unique Dependence of the Breakdown Behavior of Normally-OFF Cascode AlGaN/GaN HEMTs on Carrier Transport Through the Carbon-Doped GaN Buffer
Experimental Insights into the Role of Inter-valley and Defect Transitions of Hot Electrons in Determining Self-heating in AlGaN/GaN HEMTs
First Experimental Study of Floating-Body Cell Transient Reliability Characteristics of Both N- and P-Channel Vertical Gate-All-Around Devices with Split-Gate Structures
An Approach to Neutron-Induced SER Evaluation Using a Clinical 290 MeV/ u Carbon Beam and Particle Transport Simulations
A multi-bit/cell PUF using analog breakdown positions in CMOS
Middle-of-the-Line Reliability Characterization of Recessed-Diffusion-Contact Adopted sub-5nm Logic Technology
Reliability of fine pitch COF: Influence of surface morphology and CuSn intermetallic compound formation
On the volatility of oxide defects: Activation, deactivation, and transformation
Understanding ESD Induced Thermal Mechanism in FinFETs Through Predictive TCAD Simulation
A Unified Framework to Explain Random Telegraph Noise Complexity in MOSFETs and RRAMs
Perspectives on GaN MISHEMT Power Amplifier Versus Positive Gate Bias Instability
An overview of autonomous vehicles safety
Role of Gate Hole Injection in Minimizing Substrate Coupling and Electron Trapping in AlGaN/GaN Power HEMTs
A Physical-Statistical Approach to AlGaN/GaN HEMT Reliability
An Analytical Transient Joule Heating Model for an Interconnect in a Modern IC: Material Selection (Cu, Co, Ru) and Cooling Strategies
Material instabilities in the TaOx-based resistive switching devices (Invited)
Defect Mechanisms Responsible for Silent Data Errors
New Insight into the Aging Induced Retention Time Degraded of Advanced DRAM Technology
Tunable Holding-Voltage High Voltage ESD Devices
Perimeter Driven Transport in the p-GaN Gate as a Limiting Factor for Gate Reliability
A Comprehensive Reliability Approach to Heterogeneous Integration in Power Packaging (Invited)
Reliability and Performance Issues in SiC MOSFETs: Insight Provided by Spin Dependent Recombination
A failure physics model for hardware Trojan detection based on frequency spectrum analysis
Reversible dielectric breakdown in h-BN stacks: a statistical study of the switching voltages
High voltage time-dependent dielectric breakdown in stacked intermetal dielectrics
Low frequency noise in MOS2 negative capacitance field-effect transistor
Stress mitigation of 3D-stacking/packaging induced stresses
Effect of Residual TiN on Reliability of Au Wire Bonds during High Temperature Storage
Impact of Al-based Dipole Formation on Gate Stack Integrity and Reliability
Reliability Study of La- and Al-Doped ZrO2 Dielectrics for High Density MIMCAP Applications
Record-Low EOT(3.6Å) & Jleak(7×10 -8 A/cm 2 @0.8V) HZO by Dielectric-Selective Microwave Annealing
Mitigating switching variability in carbon nanotube memristors
Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR)
Two-Regime Drift in Electrolytically Gated FETs and BioFETs
A Concise Electrothermal Model to Characterize the Thermal Safe-Operating Area of Power Transistor
Modeling of HKMG Stack Process Impact on Gate Leakage, SILC and PBTI
Reliability Characterization of Logic-Compatible NAND Flash Memory based Synapses with 3-bit per Cell Weights and 1μA Current Steps
Automatic Data Repair Overwrite Pulse for 3D-TLC NAND Flash Memories with 38x Data-Retention Lifetime Extension
Towards a Computationally Efficient Verilog-A Defect-Centric BTI Compact Model for Circuit Aging Simulations
The Voltage Dependence of NBTI: Resolution of Controversy Surrounding Power Law vs. Exponential
NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures
Challenges of Flash Memory for Next Decade
Hot-Hole Gate Current and Degradation in N-Type Lateral Drift MOSFETs: Characterization and TCAD Analysis
ESD Robustness of GaN-on-Si Power Devices under Substrate Biases by means of TLP/VFTLP Tests
Reliability of next-generation field-effect transistors with transition metal dichalcogenides
New methodology for modelling MOL TDDB coping with variability
New Modelling Off-state TDDB for 130nm to 28nm CMOS nodes
Probing Write Error Rate and Random Telegraph Noise of MgO Based Magnetic Tunnel Juction Using a High Throughput Characterization System
Anomalous Mixed-Mode Damage Effects in SiGe HBTs at Cryogenic Temperatures
An efficient methodology to evaluate BEOL and MOL TDDB in advanced nodes
Elapsed-time statistics of successive breakdown in the presence of variability for dielectric breakdown in BEOL/MOL/FEOL applications
Ferroelectric HfO2-based Capacitors for FeRAM: Reliability from Field Cycling Endurance to Retention (invited)
Moisture diffusion rate in an ultra-low-k dielectric and its effect on the dielectric reliability
Collector Engineering of ESD PNP in BCD Technologies
Key attributes to achieving > 99.99 satellite availability
Soft-Error Susceptibility in Flip-Flop in EUV 7 nm Bulk-FinFET Technology
Possible Origins, Identification, and Screening of Silent Data Corruption in Data Centers
Influence of supply voltage on the multi-cell upset soft error sensitivity of dual- and triple-well 28 nm CMOS SRAMs
Reduced RC Time Constant High Voltage Tolerant Supply Clamp for ESD Protection in 16nm FinFET Technology
Gate Oxide Reliability Studies of Commercial 1.2 kV 4H-SiC Power MOSFETs
A High Voltage Tolerant Supply Clamp for ESD Protection in a 45-nm SOI Technology
Transistor reliability variation correlation to threshold voltage
Performance Improvement on HfO2-Based 1T Ferroelectric NVM by Electrical Preconditioning
Design Considerations for Long-Term Reliability of Outdoor Electronic Assemblies (Invited)
Study of dynamic TDDB in scaled FinFET technologies
Mission Profile Approach for the Calculation of GaN FET Reliability in Power Supply Applications (Invited)
Impact of Process Variation on MIM Capacitor Lifetime
TCAD Based Isolation of Self-Heat Enhanced HCD and NBTI in GAA SNS p-FET
Process-induced charging damage in IGZO nTFTs
Multi-Scale Modeling-Driven Material to Device Co-Optimization of Ferroelectric Capacitors with Oxygen Reservoir Layer (ORL) for Improved Endurance
Prognostics health management of electronic systems - A reliability physics approach
Safety in Memory Architectures for Autonomy (Invited)
Evaluation of Single Event Effects in SRAM and RRAM Based Neuromorphic Computing System for Inference
CoWoS Package Reliability Risk Assessment & Mitigation from Mechanical Perspectives
Contact and junction engineering in bulk FinFET technology for improved ESD/latch-up performance with design trade-offs and its implications on hot carrier reliability
Machine Learning Powered Single Event Latch-up (SEL) Failure Rate Prediction Methodology in Advanced Bulk FinFET Technology
In-situ calibration Of MEMS inertial sensors for long-term reliability
Chip to Package Interaction Risk Assessment of FCBGA Devices using FEA Simulation, Meta-Modeling and Multi-Objective Genetic Algorithm Optimization Technique
Weibull cumulative distribution function (CDF) analysis with life expectancy endurance test result of power window switch
Missing Trigger Circuit Action and Device Engineering for Conventional Nanoscale SCR
Impacts of 3-D integration processes on device reliabilities in thinned DRAM chip for 3-D DRAM
Novel Cumulative Degradation Approach to Predict Components Failure Rates
Q&R On-Chip (QROC): A Unified, Oven-less and Scalable Circuit Reliability Platform
Conductance Variation-Assisted Adversarial Attack Robustness on 40nm TaOx-based ReRAM CiM
Cross-Temperature Reliability of 3D NAND: Cell-to-Cell Variability Analysis and Countermeasure
Opposite Impact of Temperature Difference Direction on Electromigration Failure in N-type Versus P-type Metal
Side and Corner Region Non-Uniformities in Grown SiO2 and Their Implications on Current, Capacitance and Breakdown Characteristics
Analytical Modeling of RTN with Short Dwell Time for Strict Memory Bit Error Estimation
Runtime Variability Monitor for Data Retention Characteristics of Commercial NAND Flash Memory
Negative bias instability in 4H-SiC MOSFETS: Evidence for structural changes in the SiC
Engineering Custom TLP I-V Characteristic Using a SCR-Diode Series ESD Protection Concept
Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution
High-Resolution X-Ray Imaging of Controlled Microcrack Steering in BEoL Stacks (Invited)
Robustness to Device Degradation in Silicon FeFET-based Reservoir Computing (Invited)