yusuke1997/dblp-id-title huggingface dataset:
A low-power delta-sigma modulator using dynamic-source-follower integrators
Controlling an electrical motion system by a load instruction decoding algorithm using FPGA
A Tile-based Fused-layer CNN Accelerator for FPGAs
A method for all-positive optical multilayer perceptrons
A multi-path high speed Viterbi decoder
An 8Gb/s 0.75mW/Gb/s injection-locked receiver with constant jitter tracking bandwidth and accurate quadrature clock generation in 40nm CMOS
A hardware efficient direct digital frequency synthesizer
New embedded memory architecture for enhanced yield, performance and power consumption
A scintillator-coated phototransistor pixel sensor with dark current cancellation
100MS/s Time-Mode PWM Signal Processing Building Blocks
ROM-less direct digital frequency synthesizers exploiting polynomial approximation
Nonstationary signal classification using time-frequency optimization
Transport mode recognition for smart eyewear using multimodal audio and accelerometer data
Implementation and testing of pressure like routing protocol
Wideband LNA with reactive feedback at the input matching network
A 4.8mW 22nm CMOS Fully-Integrated 60-GHz $3\times 3\times 2$ 3D Frequency-Shift Biosensor Array Using Vertically-Stacked LC Oscillators
Efficient optimization methodology for CT functions based on a modified bayesian kriging approach
Placement and routing techniques to improve delay balance of WDDL netlist in MFPGA
A MEMS resonator tank for an RF VCO application
A multiplexer-based digital passive linear counter (PLINCO)
4-Gb/s low-power PRBS Generator with wave-pipeline technique in 0.18-μm CMOS
Qubit Bias using a CMOS DAC at mK Temperatures
A new compact wireless power transfer system using C-shaped printed resonators
The Amulet chips: Architectural development for asynchronous microprocessors
Development of a microcontrolled data acquisition system to optimize the INPE's data collecting station, via satellite
sMAE: an improved block matching criterion
Monolithic 3D: an alternative to advanced CMOS scaling, technology perspectives and associated design methodology challenges
Current-mode biquadratic filters using dual output current conveyors
Unified Lightweight Authenticated Encryption for Resource-Constrained Electronic Control Unit
Detection and extraction of the text in a video sequence
Supporting A Dynamic Program Signature: An Intrusion Detection Framework for Microprocessors
Cryptosystem architectures for very high throughput multimedia encryption: the RPK solution
Implementation issues for V-vector algebra
A clustering approach to vector mathematical morphology
Single Inductor Multiple Output Buck Converter with Auxiliary Current Source Based Control
MSLandslide: A MultiSource Segmentation For Remote Sensing Landslide Images
On the design of linear-in-the-parameters adaptive filters
Inkjet printed antennas for NFC systems
Effective Spice Analysis of Switched Capacitor DC-DC Converters
Variability mitigation using correction function technique
A study on the HEVC performance over lossy networks
Hardware-Efficient Random-Modulation ΣΔ ADC for Per-Column CS Generation in Vision Sensor
Low-noise dual-channel current amplifier for DNA sensing with solid-state nanopores
Electrostatic energy harvester based on multiple variable capacitors
Design Practice of Power-oriented Integrated Circuits for Biomedical Implant Systems
Image compression using a mixed-transform technique and vector quantization
A low-power 12-bit 2nd-order Σ-Δ analog-to-digital converter for CMOS image sensors
Passive shaping of line current waveform by converter with alternating of parallel and series resonance in AC-DC switch mode power supplies
On the use of population-based incremental learning in the medium access control of broadcast communication systems
Long-term pulse stimulation and recording in an accelerated neuromorphic system
Wearable wireless sensor for the gait monitorization of Parkinsonian patients
Transient analysis of circuits with ideal switches using charge and flux substitute networks
Performance Analysis of Single Code Spread ALOHA Systems
The bifurcation structure of fractional-harmonic entrainments in the forced Rayleigh oscillator
A difference detector PFD for low jitter PLL
Robust color image watermarking based on singular value decomposition and Dual tree complex wavelet transform
Robust two-dimensional DFT
A differential current-conveyor based buffer for high-bandwidth, low-signal applications
Vacancy Modulated Analog Resistive Switching Memory Device Based on Bilayer of Zn@ZnO/ZnO for Neuromorphic Computing
Efficient power management in wireless sensor networks
A VCO-based ADC with Relaxation Oscillator for Biomedical Applications
OAPM: Fine-grained operand-aware power management with fast reaction time
BLE and mmWave Data Fusion Techniques for an Indoor Positioning System
Implementation of real time chaotic generator models (continuous and discrete) using digital hardware
Throughput performance of ARQ and HARQ I schemes over a two-states Markov channel model
Placement optimization using behavior based software agents and the genetic algorithm
Rapid prototyping of higher order incremental ΣΔ-ADC topologies and NTFs
3D-HEVC depth maps intra prediction complexity analysis
An ultra low power 9-bit 1-MS/s pipelined SAR ADC for bio-medical applications
Experimental and simulation results on Si integrated inductor efficiency for smart RF-ICs
Hardware aspects of Long Short Term Memory
CMOS bulk input current switch logic circuit
Exploring Gate-Diversity Enabled by Reconfigurable Memristive Technology
A comparative study of digital ΣΔ modulators for fractional-N synthesis
Power supply current testing in the production line of emergency luminaire circuits
Integrated timing-driven approach to the FPGA layout
Ultrasound Non-Destructive Evaluation/Testing using Capacitive Micromachined Ultrasound Transducer (CMUT)
Comparison of VLSI architectures for a WLAN OFDM transmitter with interpolation filters
Built-in Filtering for Out-of-Channel Interferers in Continuous-Time Quadrature Bandpass Delta Sigma Modulators
Bipartite graph labeling for the subcircuit recognition problem
A Low Jitter Double-Tailed Strong-Arm Latch Based Digital-to-Time Converter (DTC)
A true zero-load stable CMOS capacitor-free low-dropout regulator with excessive gain reduction
A multi-classifier image based vacant parking detection system
Designing Analog Circuits with Reduced Biasing Power
Energy Consumption Characterization of Dual-Core Operations in the RP2040 Microcontroller for IoT Applications
Study of the thermal drift of the offset voltage of silicon pressure sensor
A CMOS 2.45-GHz ring oscillator with temperature compensation
Reversible watermarking in medical imaging with zero distortion in ROI
Optimal location management in mobile computing with hybrid genetic algorithm and particle swarm optimization (GA-PSO)
Thermodynamic modeling of a thermoresistive sensor using electrical power
Compressed Sensing of ΔΣ Streams
The Radix-2 m Squared Multiplier
Electronic components and circuits for extreme temperature environments
Inversion of a nonlinear communication channel by kriging
A Comparative Study of Fault Diagnosis Methods of Photovoltaic Cells
Exact analysis of the tracking capability of time-varying channels: the finite alphabet inputs case
A low-voltage CMOS 1-Hz low-pass filter
Automated design of folded-cascode op-amps with sensitivity analysis
Design and Verification of Ultra Low Current Mode Amplifier Aiming at Biosensor Applications
Integrated partition integer execution unit for multimedia and conventional applications
Sparse deconvolution by means of genetic algorithms
Hardware implementation of content based video indexing algorithms
The multi 2D systolic design and implementation of Convolutional Neural Networks
Interference suppression in DSSS communication systems using instantaneous frequency estimation
Design of transient second-order IIR filters with optimum dynamic frequency responses
CMOS microsystem front-end for microtesla resolution magnetic field measurement
An Efficient Bit-Detection and Timing Recovery Circuit for FPGAs
Experimental 5G New Radio integration with VLC
An accurate and flexible analog emulation of AdEx neuron dynamics in silicon
Spreadsheet model for MorphoSys RC array
Adaptive algorithm for analog fault based on a sensitivity matrix and the fuzzy set theory
Impulsive noise reduction in MIMO-OFDM systems using adaptive receiver structures
Simulating nonlinear capacitors in sigma-delta modulators
Investigating emotional speech parameters for speech synthesis
Solving Boolean Satisfiability with Stochastic Nanomagnets
Scaling Input Signal Swings of Overloaded Integrators in Resonator-based Sigma-Delta Modulators
EdgeNet: SqueezeNet like Convolution Neural Network on Embedded FPGA
A global routing model for universal switch box design
A Low Power Packet Detection Algorithm for FM-UWB PHY for IEEE 802.15.6 WBAN
A 68MHz multi-channel all-digital programmable oscillator
Contributions to the analysis and design of an ADPLL
Low voltage, low power operational amplifier
FedClamp: An Algorithm for Identification of Anomalous Client in Federated Learning
Application of a multi-formalism co-design methodology for the development of complex telecommunication protocols
Packaged CMOS cryogenic characterization for quantum computing applications
Integrated Tunable RF Filter for TV Reception [42MHz..870MHz]
Evaluating the Impact of Accuracy Relaxation in the Reliability of GPU Register Files
Remote control of a DC motor using infra-red radiation
VLSI-based parallel architecture for block-matching motion estimation in low bit-rate video coding
Real data performance analysis of dynamic harmonics behaviour in a DC variable speed drive
Novel behavioral DAC modeling technique for WirelessHD system specification
Towards close-to-nature neural networks
FPGA-Based Tactile Sensory Feedback System with Optical Fiber Data Communication Link for Prosthetic Applications
A 65pF-CL, -46dB-PSRR at 1MHz, Wide Supply Bulk-Biasing FVF-Based LDO Consuming 6.6 uA
A fully integrated Hall sensor microsystem with current-mode output
Weighted criteria for RF power amplifiers identification in wide-band context
FPGA bulding blocks for an hybrid base band digital predistorter suitable for 3G poweramplifiers
Digital cartesian feedback linearization of switched mode power amplifiers
Field Programmable switched capacitor voltage converter
Radiation-tolerant standard cell synthesis using double-rail redundant approach
A Design Approach for Low Phase Noise 5GHz Complementary Quadrature Oscillator
An Ultra Low Power Successive Approximation ADC with Selectable Resolution in 0.13 μm CMOS Technology
Approximate Subtractor Operator for Low-Power Video Coding Hardware Accelerators
A Continuous-time Learning Rule for Memristor-based Recurrent Neural Networks
A novel integrated design simulation method for linear cellular and WLAN power amplifiers
Color Image Watermarking based on Chaotic Map
Low-complexity energy-efficient security approach for e-health applications based on physically unclonable functions of sensors
Dual Ring Prototype Electronic System for the Small Animal Fast Insert for MRI
Image representation and reconstruction from spectral amplitude or phase
A mixed-signal SOC signal processor that incorporates all the drive electronics in a single-chip
A self biased operational amplifier at ultra low power supply voltage
ILP modelling of the common subexpression sharing problem
An intelligent technique for generating equivalent KHN circuits using genetic algorithm
Characteristics and sensitivity analysis of Gate Inside Junctionless Transistor (GI-JLT)
A very low power 3ghz 128/129 CMOS dual-modulus prescaler
High-Accuracy Low-Dropout Voltage Regulator Based on Slow-Rolloff Frequency Compensation
2.6 GHz receiver for on-chip optical networking in 65nm CMOS technology
An Automated Design Methodology for Charge Pump Circuits
An reconfigurable multiplier in GF(2 m ) for elliptic curve cryptosystem
Circuit authentication based on Ring-Oscillator PUFs
On the design of a 2-2-0 MASH delta-sigma-pipeline modulator
Microarchitecture Optimization for Asynchronous Stochastic Computing
A new structure for three-phase to single-phase AC/AC matrix converters
Asymptotic errors of floating point digital filters
Why and How VCO-based ADCs can improve instrumentation applications
A 64×64 CNN universal chip with analog and digital I/O
An integrated voltage-mode PWM controlled buck converter with active compensation
Gaussian Shaped Multiband FIR and IIR 2D Filters
Adjustable Setpoint Proportional (ASP) Control for Interleaved Switched Capacitor DC/DC Converter
An ultra low power 2.4GHz CMOS VCO
Voice over IP over satellite links
Adoption of 2T2C ferroelectric memory cells for logic operation
Improving the robustness and drift resilience of CMOS BBPLL-based time-based sensor interfaces
Self-organizing neural network for fault location in electrical circuits
A 1.8 GHz CMOS low-noise amplifier
The DTMOS based UHF RF to DC conversion
Resonant-based test method for MEMS devices
Electromechanical coupling in electrostatic kinetic energy harvesters
A LVDS Serial AER Link
A new architecture of companding integrator for CMOS current-mode analog filters
Integer Quantization of Nonlinear Operations towards Hardware-Friendly ViTs
Fault diagnosis schemes for secure lightweight cryptographic block cipher RECTANGLE benchmarked on FPGA
UMTS integration with satellite component design, protocol architecture and performance analysis
An ALU cluster Intellectual Property Dedicated for media streaming architecture with homogeneous processor cores
Addressing technique for parallel memory accessing in radix-2 FFT processors
Dealing with Non-Idealities of Power-Clock Generation for Adiabatic Systems
Design considerations for near to the ground communication system and associated Sub-GHz low profile antenna
Towards autonomous microscale systems: Progress in electrostatic kinetic energy harvesting
Dual Mode K-Best MIMO Detector Architecture and VLSI Implementation
WAV-a weight adaptation algorithm for normalized radial basis function networks
Generation of permutations with nearest-neighbour interconnected switches
Low-voltage, micropower weak-inversion CMOS GM-C filter
A new bio-implantable transmitter topology for minimizing the antenna effects
Colorimetric Sensing System for Neurotransmitter Detection Based on Multi-technologies Architecture
Intra-body communications - Radio-frequency versus ultrasonic
Design of m-channel tree-structured filter banks with very low-complexity analysis filters
Retrieval of butterfly from its sketched image utilizing image navigation directory on multimedia network
Low-power CMOS active resistor independent on the threshold voltage
The CHNN nonlinear combination generator
The low power baseband processing parts of a novel dual mode DECT/GSM terminal
Capacitive sensor technology for soil moisture monitoring networks
High aspect ratio MEMS capacitor for high frequency impedance matching applications
A compact and low-power SRAM with improved read static noise margin
Research on An Improved Anisotropic High-pass Filtering Algorithm Based on the Step Angle Searching
Dual quantization continuous time ΣΔ modulators with spectrally shaped feedback
Cross-network OSA/Parlay applications
A fully integrated Tow-Thomas biquad using current feedback amplifiers
Efficient modeling and analysis of switch-induced error voltage in high resolution SAR ADCs
Neural discriminating analysis on preprocessed data
Timing recovery of PAM signals using baud rate interpolation
A new approach of transfer function angle
Chaos in the fractional Chua and Chen systems with lowest-order
Digitally-enhanced high-order ΔΣ modulators
Exploring the combination of number of bits and number of iterations for a power-efficient fixed-point CORDIC implementation
A comprehensive generalization of a Graph-Attention-Network GAT based system towards real IP analog-mixed-signal AMS schematics structure recognition
Using FPGAs to Implement Artificial Neural Networks
Development of aroma-Card based soundless Olfactory Display
All-digital 1550 nm optical aqueous glucose solution measurement system
A synthesis of switched capacitor frequency dependent negative capacitor using common delay branches
Comparison of DTC-Related Spurs in Fractional-N Digital PLLs with MASH-and-ENOP-based Divider Controllers
Analyzing the electromigration effects on different metal layers and different wire lengths
Image retrieval via generalized I-divergence in the bag-of-visual-words framework
Impact of transistor aging on RF low noise amplifier performance of 28nm technology: Reliability assessment
Arithmetic Transforms of Imprecise Datapaths by Taylor Series Conversion
Defect tolerant in-memory analog computing with CMOS-integrated nanoscale crossbars: Invited
Fast coding of bidirectional frame for H264 standard
Combining fault tolerance and serialization effort to improve yield in 3D Networks-on-Chip
New test pattern generation units for NPSF oriented memory built-in self test
A novel adaptive noise canceller with master-slave structure
Design of 1.5-6 GHz High Efficiency 50W Power Amplifier Design for sub 6-GHz 5G Systems
FPGA based on-line complex-number multipliers
Yet another spur mechanism in a charge-pump based Fractional-N PLL
A declarative framework for developing parametrised hardware libraries
VitalAir: Wearable Air Quality Monitoring Platform for Personal Exposure
A power controlled RF CMOS class-E PA with 43% maximum efficiency in 2.2 GHz
Feedforward neural network based nonlinear dynamical system function reconstruction
Simulating Phase Noise in Multi-Gigahertz High Precision All-Digital Phase-Locked Loops
Compensation of two-stage operational amplifiers for switched-capacitor applications
Multiband and concurrent matching network design via brune sections
Memristor CNN Model for Image Denoising
A gamma source model for full motion video using non-linear systems
A superparallel image filtering digital-pixel-sensor employing a compressive multiplication technique
Power system stability enhancement via coordinated design of a PSS and an SVC-based controller
Low-Cost Production of 3D Printed Lab-on Chip (LOC) Device for Oil-in-Water Emulsion Separation
The use of predictive correlated double sampling techniques in low-voltage delta-sigma modulators
Using Path Planning Algorithms and Digital Twin Simulators to Collect Synthetic Training Dataset for Drone Autonomous Navigation
Triplet-based Spike Timing Dependent Plasticity Circuit Design for three-terminal Spintronic Synapse
Improving collaborative jobs in P2P networks
Quick power supply noise estimation using hierarchically derived transfer functions
Extension of the DSL coverage area for High Definition IPTV VOD services using H.264 Scalable Video Coding
Embedded 1D Convolutional Network based ECG Classification Platform for Remote Health Monitoring
A new XOR-based Content Addressable Memory architecture
A flexible data logging device for wind potential measurements and statistical magnitudes
An energy efficient multi-bit TSV transmitter using capacitive coupling
Exploring the use of parallel prefix adder topologies into approximate adder circuits
A precise sample-and-hold circuit topology in CMOS for low voltage applications with offset voltage self correction
High-level circuit modeling for power estimation
An energy-efficient hardware design for lossless reference frame compression in video coders
A class of cosine-modulated causal IIR filter banks
Amplitude demodulation based on synchronized sampling by a PLL circuit
Settling time analysis of third order systems
Multipulse high power factor rectifier applying a novel current injection network
Fast parallel-prefix Ling-carry adders in QCA nanotechnology
Impulse-radio ultra-wideband modulation and detection techniques for body area networks
A wideband unity-gain buffer in 0.13-μm CMOS
Predictive Modeling of FPGA Resource and Power Consumption for Configurable CNN Operators
A 0.6-4.5 GHz inductorless CMOS low noise amplifier with gyrator-C network
Simulation of SoCs with embedded mixed-signal Cores using a Verilog High-Speed Virtual Serial Interface
Performance analysis of random demodulators with M-sequences and Kasami sequences
Perimeter-Gated Single-Photon Avalanche Diode Imager with Vanishing Room Temperature Dark Count Probability
New 1.5-V CMOS Current Feedback Operational Amplifier
A fast two-step coarse-fine calibration (CFC) technique for precision comparator design
Phase noise vs. jitter analysis in continuous-time LP and BP ΣΔ modulators with interferers
Performance evaluation of heuristic techniques for coverage optimization in femtocells
An On-Chip Self-Powered Non-Volatile One-Time-Programmable Memory System in Standard CMOS Technology
Employing incremental sigma delta DACs for high resolution SAR ADC
Automatic License Plate Recognition (ALPR) using YOLO and Small Language Models for Edge Explainable Surveillance Systems
A pose-based hand image classification method retrainable on embedded target devices
Static Noise Margin in 16 nm FinFET 6T and 8T SRAM Cells for Compute-in-Memory
An iterative interference cancellation algorithm for adaptive MMSE receivers in asynchronous code-division multiple-access systems
A low-IF architecture for dual-standard GSM/UMTS fully integrated receivers
An Efficient HW/SW Implementation of the H.263 Video Coder in FPGA
A 10 MSample/Sec Digital Neural Spike Detection for a 1024 Pixels Multi Transistor Array Sensor
The Memristive Pupil: A Memristive Circuit Model of the Eye's Response to Illumination Fluctuations
A CPFSK/PSK-phase reconstruction-receiver for enhanced data rate Bluetooth systems
Designs and comparisons of authentication modules for IPSec in configurable and extensible embedded processor
SiC Schottky power diode modelling in SPICE
Continuous time analog filter test using signature analysis
Asynchronous event redirecting in bio-inspired communication
A restricted class of input sequence for Volterra filter identification
Co-simulation of SystemC TLM with RTL HDL for surveillance camera system verification
A boosted wordline voltage generator for low-voltage memories
Hybrid BP-GA for multilayer feedforward neural networks
"Professor of professors" Yılmaz Tokad: "I have always loved academic life": An interview by Erol Sezer, Ph.D
A programmable pulse generator for atrial pacing in rats for studies on Pulmonary Arterial Hypertension
Predictive design space exploration of maximum bandwidth CMOS photoreceiver preamplifiers
ES&IS: Enhanced Spread and Iterative Search hardware-friendly motion estimation algorithm for the HEVC Standard
U-HAWK: A Hardware-in-the-Loop Framework for Sensor-Rich Embedded Systems Testing
Current mode pipelined a/d converter
Park's equations for distributed constants line
An Efficient Micro-Stimulator Array Using Unitary-Size DAC With Adiabatic Baseband Scheme
A statistical technique for the determination of the noise power gain in higher-order Σ-Δ A/D converters excited by DC input signals
Three phase four wires shunt hybrid filter
A digital IC Random Number Generator with logic gates only
A triangular active charge injection scheme using a resistive current for resonant power supply noise suppression
An area-efficient interpolation filter using block structure
ECG Signal Artifacts Suppression System Based on an MRI Environment Dedicated CMOS Magnetic Field Monitor and FPGA Implementation
A method for solving stochastic differential equation with random coefficients
Reduced Complexity Power Minimization Algorithm for DMT Transmission - Application to Layered Multimedia Services over DSL
Differential-Mode/Common-Mode Feedforward Transconductor for Low-Voltage Gm-C filters
Comparison of hill-climbing and genetic algorithms for digital predistortion models sizing
A reactive Optimized Link State Routing protocol for Mobile ad hoc networks
Characterization-Guided Strategies for Transients Faults Mitigation in Digitals Circuits
A 0.13µm CMOS VGA for drift chambers
Design of stable 2-D recursive filters using power-of-two coefficients
A digitally controlled linear voltage regulator in a 65nm CMOS process
DOA-based Weighted Spatial Filter Design for Sum and Difference Composite Co-Array