yusuke1997/dblp-id-title huggingface dataset:
Systolic array prototyping using the Ptolemy environment
Concept for a 16-QAM RF Transmitter on Flexible Substrate using a Graphene Technology
Object detection on the sea surface, based on texture analysis
Radio receiver front-end using time-based all-digital ADC (TAD)
Symbolic sensitivity analysis of digital filter structures using MATLAB
Efficient testing of Σ-Δ A/D converters
A wavelet-based voice activity detection algorithm in noisy environments
Design issues towards the integration of passive components in silicon RF VCOs
A structure for extending the linear input voltage range of a differential input stage
Combined predictive and multiresolution schemes for speckle reduction in radar images
Nonlinear harmonic analysis of multistage amplifiers
FPGA-based path-planning of high mobility rover for future planetary missions
A ΣΔ fractional- N synthesizer for GSM standard specifications
A track&hold-AGC suitable for downconversion by subsampling
Towards Smart Sensor Systems for Precision Farming: Electrode Potential Energy Harvesting from Plants' Soil
A CMOS 80mW 400MHz seventh-order MLF FLF linear phase filter with gain boost
A very fast algorithm for max/min filtering
Automatic synthesis of an 8-bit CPU with 100% on-line error detection capability
Hierarchical design flow for heterogenous systems using Pareto front interpolation
Survey of wireless baseband SoC for biomedical application
A new approach for the simulation of power electronic circuits
A Ferroelectric Tunnel Junction-based Integrate-and-Fire Neuron
Coding wavelet coefficients of images
ESD test methods on integrated circuits: an overview
Robust AR analysis of nonstationary discrete-time signals
Unconditional maximum likelihood approach for near-field source localization
VLUT: Design and Evaluation of Variable band LUT to realize Activation Functions
Electromyogram decomposition using the single-linkage clustering algorithm and wavelets
An RTL method for hiding clock domain crossing latency
A novel low-power fully-differential current-reuse cascaded CG-CS-LNA for 6-9-GHz UWB receivers
CodeRAKE: a new small-area scalable architecture for the multi-user/multi-code RAKE receiver
Angelo Evaluation: application of a multisensor system for psycho-physiological stress detection in working environments
A nearly optimal variable fractional delay filter with extracted Chebyshev window
A 21 GHz wide frequency tuning range LC VCO with low KVCO
Performance evaluation of RAM-based implementation of Finite State Machines in FPGAs
Test Architecture for Fine Grained Capture Power Reduction
Proceedings of the 2002 9th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2002, Dubrovnik, Croatia, September 15-18, 2002
Low-Power Wordline Voltage Generator for Low-Voltage Flash Memory
A bioprotein-based flexible and self-powered pressure sensor towards a biomimic of an artificial Pacinian corpuscle
Analysis of the probability distribution of the baseline wander effect for baseband PAM transmission with application to gigabit Ethernet
Programmable Order Multiple Feedback Band-Pass Active-RC filter for FSK Transceiver
Spiking Neural Network Based Low-Power Radioisotope Identification using FPGA
Iterative technique for approximate minimax design of complex digital FIR filters
Gate-level autonomous watchdog circuit for error robustness based on a 65nm self synchronous system
A 5.2nV/√Hz noise density third-order FDNR filter for DVB-H mobile-TV receiver
Impact analysis of stochastic transistor aging on current-steering DACs in 32nm CMOS
A low-cost fail-safe circuit for fault-tolerant control systems
Group lapped iterative technique for fast solution of large linear systems
Harmonic suppression in low pass filter designed by non uniform transmissions lines
Fast techniques for time delay and Doppler estimation
Embedded acoustic fault monitoring for water pumps
A moment method analysis of SAW interaction in periodic metal-semiconductor structure
A cluster-head selection algorithm for Wireless Sensor Networks
Pipelined RNS multipliers: an application to scaling
A numerical method to synthesize the element characteristic in analog circuit design
Maritime localization system based on IoT
Raising Awareness of Energy Consumption in Machine Learning
Ground Based Inspection for Overhead Transmission Line Sag
Synthesizable assertion checkers in high levels of abstraction
On the design of modulo 2 n ±1 adders
A method for image processing and distance measuring based on laser distance triangulation
Temperature control of a double-coil drive type IH cooker by means of the PDM control provided with audio noise suppression
X86-ARM binary hardware interpreter
STF behaviour in a CT ΔΣ modulator
Interconnect Aware Power Optimization of Low Swing Driver for Multi-Chip Interfaces
Efficiency optimization of integrated DC-DC buck converters
Buffer Insertion and Sizing in Clock Distribution Networks with Gradual Transition Time Relaxation for Reduced Power Consumption
Multi-window recursive adaptive neural filters
Analysis of parameter-independent PLLs with bang-bang phase-detectors
Impacts of signal slew and skew variations on delay uncertainty and crosstalk noise in coupled RLC global interconnects
A communication architecture for asynchronous pulse frequency modulated analog VLSI systems, based on 1-persistent carrier sense/multiple access
Mapping of real-time applications on a packet switching NoC-based MPSoC
A summary on modified carrier based real-time Selective Harmonic Eliminationt technique
MRL Crossbar-Based Full Adder Design
A Low Power V-band Low Noise Amplifier Using 0.13-μm CMOS Technology
Design of bi-directional bus nets
Analytical current model for dual-gate MOSFET
Enabling Human Activity Recognition in Smart Public Transportation Systems in Presence of Dataset Imbalance
On reconfigurable fabrics for intelligent hardware systems
Proceedings of Third International Conference on Electronics, Circuits, and Systems, ICECS 1996, Rodos, Greece, October 13-16, 1996
NoC topology exploration for mobile multimedia applications
Low-Power Anomaly Detection and Classification System based on a Partially Binarized Autoencoder for In-Sensor Computing
High-precision timestamping and ultra high-speed arbitration of transient pixels' events
Proposed a Ternary Multiplexer using CNTFET
CDS Free Frame Differencing Event Vision Pixel with Lateral Overflow Capacitor for Dynamic Range Extension
Ultra low voltage CMOS gates
Design and performance verification of ALUs for 64-bit 8-issue superscaler microprocessors using 0.25 um CMOS technology
A 15-μA metabolic equivalents monitoring system using adaptive acceleration sampling and normally off computing
A Simple Method for Transmission with Reduced Crosstalk and Echo
Shape independent VLSI-architecture design approach for 2D morphological operations with non-flat structuring elements
Customized high performance low power processor for binaural speaker localization
A linearity enhancement technique and its application to CMOS wideband low-noise amplifiers
Second order distortion modeling in HBTs
A time-frequency approach for spike detection
High-speed assembly FFT implementation with memory reference reduction on DSP processors
Fully Integrated Headphone Detector
A 6.78 MHz Maximum Efficiency Tracking Active Rectifier with Load Modulation Control for Wireless Power Transfer to Implantable Medical Devices
Metal Oxide Resistive Memory (OxRAM) and Phase Change Memory (PCM) as Artificial Synapses in Spiking Neural Networks
Efficient shaped quantizer dithering implementation for sigma delta modulators
A process-compatible passive RFID tag's digital design for subthreshold operation
Configurable multi-layer CNN-UM emulator on FPGA using distributed arithmetic
Analog to digital conversion using a Pulse Width Modulator and an irregular sampling decoder
A new approach for event detection and feature extraction for NILM
Study of Stochastic Invertible Multiplier Designs
Rapid prototyping of biorthogonal discrete wavelet transforms on FPGAs
Accurate detection and estimation of radio signals using a 2D novel smart antenna array
Special-domain speech synthesizer
Design of a 1.2 V Low Phase Noise 1.6 GHz CMOS Buffered Quadrature Output VCO with Automatic Amplitude Control
Class-AB f T -integrator for low-distortion, high-frequency continuous-time filters
Signal propagation without distortion in dispersive lossy media
A method for distributed unicast in hypercubes
Fuzzy rank ordering for robust multiuser detection in non-Gaussian channels
Optimum design of two-level MCML gates
An S-band EPR-on-a-chip Receiver in $13\ \mu \mathrm{m}$ BiCMOS
The third revolution in semiconductor packaging and system integration
A PLL configuration for reducing both incoming and inherent jitters
A Novel CMOS Mini-LVDS Receiver for Flat-Plane Application
Asynchronous control of low-power gated-clock finite-state machines
Shape recognition using a novel fractal technique
A novel approach to reduce power consumption in level shifter for Multiple Dynamic Supply Voltage
Analysis and Design of Oscillator Coupling for Solving Combinatorial Optimization Problems
An ultra high-speed compressor for packet networks
A low cost biomimetic implementation of a CPG based on AdEx neuron model
Current mode baseband interface for communication applications
Reconfigurable DSP Architectures for SDR Applications
Grey Wolf Optimizer Aided ANN Based Behavioral Modelling Scheme for Fully Printed VO2 Switches
Low-power CMOS fully integrated transmitters exploiting on-chip antennas
MSB steps calibration algorithm for a pipelined ADC
Designing low electro magnetic emissions circuits through clock skew optimization
Millimeter-Waves building block design methodology in BiCMOS technology
Modeling the output waveform of CMOS gate with feedback effect
Voltage Reference Generator for Audio Interface in 55nm CMOS Technology Node
CCP: Configuration Context based Prefetching to Improve Coarse-Grained Reconfigurable Array Performance
Content-Adaptive Semi-Fragile Watermarking for Image Authentication
Automatic Number Plate Recognition on FPGA
Design of CMOS Device Process Sensor in 28 nm FD-SOI with 2 % of Frequency Spread
Low-Gain-Wide-Range 2.4-GHz Phase Locked Loop
A full CMOS adaptive 3.3V/5V supply VCM/spindle controller with 9mA total current consumption in lock mode for high TPI and RPM of 8200 for 1" micro-drive, 1.8" drive, and 2.5" drive
Delta-sigma modulator based spectrum sensing transceiver
Blind image-adaptive watermarking
Si technology in the Internet Era
C-based hardware-accelerator coprocessing for SOC an quantitative area-performance evaluation
CoopNet: Cooperative Convolutional Neural Network for Low-Power MCUs
A 13.56 MHz Inductive Wireless Power Transfer System for Active Implantable Medical Devices
CMOS subharmonic downconverter using an LNTA front-end
A general HDL-A model of a DC-DC switching regulator core
A Transmission-Line-based Phase Shifter for High-Speed, Ultra-Low-Power N-PSK Transmitters
A Novel Half-Rate Dual-Response Phase Detector Implementation for a 25-28.3 Gb/s Clock and Data Recovery Circuit
A 16-bit, 150-µW, 1-kS/s ADC with hybrid incremental and cyclic conversion scheme
A 1.2-V pseudo-differential OTA with common-mode feedforward in 65-NM CMOS
A wide voltage range charge pump in 0.13 μm CMOS for biasing of MEMS resonators
FPGA Implementation of Programmable Pulse Mode Neural Network with on Chip Learning for signature application
An implantable CMOS amplifier for nerve signals
Halftone image watermarking based on visual cryptography
An optimised design of an improved voltage tripler
A quantum dot model for single photon source
Evaluation of SVC for adaptive P2P video streaming
Two novel cross-cascode differential amplifiers
Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort
Analysis of Wideband CMOS Low Noise Amplifiers using current-reuse configuration
A digital signal processing based Ka band satellite beacon receiver
Low Power 16 Phase Ring Oscillator and PLL for Use in sub-ns Time Synchronization over Ethernet
RF energy harvesting chip powered sensor node
Delay insensitivity verification of bit-level pipelined systolic arrays in dual-rail treshold logic
An IF Digital Down-Converter for Software Radio DVB-S2 Receivers
CNNs with bistable-like non-volatile memristors: a novel mem-computing paradigm for the IoT era
Fuzzy-set based approach to compute optimum sizes of Voltage Followers
Colored input-signal analysis of normalized data-reusing LMS algorithms
Low-power design of array architectures
Using second-order hidden Markov model to improve speaker identification recognition performance under neutral condition
A 5G-code based iterative Non-Binary LDPC decoder
4.0-5.5 GHz tunable power splitter RFIC using active inductors
A reconfigurable 2D convolver for real-time SAR imaging
Quaternion Neural Networks for Multidimensional Applications: An Overview
Highly Efficient Smart 3-Coil Wireless Power Transfer System with Automatic Tracking
Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830μm 2 Subthreshold Voltage Reference for Implantable Devices
The ANGEL WSN Architecture
Keyword Spotting System using Low-complexity Feature Extraction and Quantized LSTM
Direct processing of Sigma-Delta signals
Microscale Solar Energy Harvesting for Wireless Sensor Networks based on Exponential Maximum power locking technique
Rectangular 3D wirelength distribution models
A Flux-Controlled Memristor Model for Neuromorphic ReRAM Devices
Circuit equations for fast fault simulation and diagnosis of linear circuits
Novel Flexible True Random Number Generator Using Resistive Switching Memory
The design of active RC filters for the Analog Front End of IC communication systems
HW/SW FPGA Architecture for a Flexible Motion Estimation
30th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2023, Istanbul, Turkey, December 4-7, 2023
Exact Minimum Logic Factoring via Quantified Boolean Satisfiability
An efficient front-end for automatic speech recognition
A Novel Hybrid Buck-Boost Converter Topology for Li-ion Batteries with Increased Efficiency
Complexity Reduction of CNNs using Multi-Scale Group Convolution for IoT Edge Sensors
Fault-tolerance-based computation of global functions in asynchronous distributed systems
Duty cycle control circuit and applications to frequency dividers
A "divide-by-odd number" direct injection CMOS LC injection-locked frequency divider
A Digital Pseudo Random Number Generator Based on a Chaotic Dynamic System
Assessing testing techniques for resistive-open defects in nanometer CMOS adders
A wireless implantable electrical stimulator based on two FPGAs
Kinetic Energy Harvesting for the IoT: Perspectives and Challenges for the Next Decade
Performance analysis of the energy efficient clustering models in wireless sensor networks
Experimental results obtained from analog chips used for extracting sound localization cues
A servo-loop-free charge sharing technique to mitigate electrode offsets in biomedical multiplexed interfaces
Robust speed identification for speed sensorless vector control of current-fed double-star induction machine
Design of a high efficient fully integrated CMOS rectifier using bootstrapped technique for sub-micron and wirelessly powered applications
Novel domino logic designs
Timing verification of cyclic systems based on temporal constraint analysis
Modeling of Delay Variability Due to Supply Variations in Pass-Transistor and Static Full Adders
An 8-bit low-power ADC array for CMOS image sensors
Design of a 3rd order micro power switched current ΣΔ-modulator
A 1.8V 6-bit 1GS/s 60mW CMOS folding/interpolation ADC using folder reduction circuit and auto switching encoder
Qualitative analysis of RSSI behavior in cooperative wireless body area networks for mobility detection and navigation applications
Fast estimation of memory consumption for energy-efficient compilers
A design methodology for application specific fuzzy integrated circuits
Finding the Hamiltonian circuits in an undirected graph using the mesh-links incidence
Discrete-time simulation of continuous-time ΣΔ modulators with arbitrary input signals
Highly efficient wideband digital frequency demultiplexer
An advanced smart card family for public key algorithm
A 5.9 GHz RF rectifier for wireless power transmission applications
High-radix modulo r n - 1 multipliers and adders
Simultaneous assignment of power pads and wires for reliability-driven hierarchical power quad-grids
Dynamic range improvement of new leap-frog filter using numerical optimization
An Ultra Low-Energy VLSI Approximate Discrete Haar Wavelet Transform for ECG Data Compression
Resource-aware task allocation and scheduling for segbus platform
Interpolation filter design for hearing-aid audio class-D output stage application
A 0.5-V 85-nW rail-to-rail operational amplifier with a cross-coupled output stage
Reducing switching activity in FIR filters by reordering the coefficients through the use of improved heuristic algorithm
A high-performance CMOS voltage follower
Efficienct LED driver with an adaptive reference tracking technique
A Domain-specific Language for Automated Fault Injection in SystemC Models
Integration of polypyrrole microactuators and organic optoelectronic devices for lab-on-chip applications
Design of a 10Gsps TI-flash ADC with modified clocking scheme
The effects of the imported spectral correlative coefficient of E n -I n noise model on low noise design of an amplifier
Non-coherent detection for cooperative OFDM-based system over time-varying fading channels
Yield-Driven Redundant Via Insertion Based on Probabilistic Via-Connection Analysis
Experimental threshold logic implementations based on resonant tunnelling diodes
Resolution enhancement of sigma-delta modulators using a tracking digital filter
Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids
New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification
Moving Receiver Tracking in Wireless Power Transfer Systems
A hardware implementation of MD4-family hash algorithms
ASIC Implementation of Associative Memory and Hamming Distance for HDC Application
Interference alignment techniques for multi-user MIMO systems at millimeter-wave
An RF Wireless Power Transfer system to power battery-free devices for asset tracking
Design of Reliable CMOS Phase-Locked Loops
Temperature compensated digital predistorter for 3G power amplifiers
A Novel Heat-Aware Write Method with Optimized Heater Material and Structure in sub-20 nm PRAM for Low Energy Operation
A survey of chaotic synchronization and secure communication
Multistage quantization via conditional hierarchical mapping
Mixed hardware/software applications on dynamically reconfigurable hardware
Implementation of a cost efficient SSL based on an Angular beamformer SRP-PHAT
A framework for a wavelet-based high level environment
Digital FCS-MP control of an AC-DC power converter to improve dynamic response
A neural network algorithm for hardware-software verification
Impact of subband quantization on DPD correction performance
A novel design and fabrication method of scanning micro-mirror for retinal scan displays
Very high speed integrated circuits for optical communication
Color image compression using combined VQ algorithms
Handwritten digit recognition using trace neural network with EKF training algorithm
A Novel LNA Topology with Transformer-based Input Integrated Matching and its 60-GHz Millimeter-wave CMOS 65-nm Design
AIDA: Analog IC Design Automation based on a Fully Configurable Design Hierarchy and Flow
A Sense-FET-Based Charge Sensor With Auto-Zero Offset Cancellation and 3.1 ns Response Time for Charge Control of SIMO DC-DC Converters
Smart readout design for tactile sensing devices
Study of crosstalk propagation in all-optical networks using perturbation theory
Offset measurement method for accurate characterization of BTI-induced degradation in opamps
A novel architecture for sine-output direct digital frequency synthesizers using parabolic approximation
New conditions for exponential stability of delay impulsive neural networks
Noisy Reading Correction in Low Power MPPT using Kalman Filter
An object-oriented approach to system modeling and codesign for multimedia applications
Scalable bipolar model for BiCMOS and bipolar circuits
Specification of the DRM and the time for preventive maintenance for an aging resource
A vector quantization circuit for trainable neural networks
Adaptive SPWV distribution with adjustable volume 2-D separable kernel
Speaker-dependent automatic helium speech normalisation
Ka-Band 4-bit Phase Shifter for SATCOM Active Electronically Scanned Array
Ordering messages in virtual CAN networks
Performance analysis of the MAP turbo-equalizer and mapping optimization for BICM
SATD hardware architecture based on 8×8 Hadamard Transform for HEVC encoder
Homogeneity and distortion-based intra mode decision architecture for H.264/AVC
Performance evaluation of distributed Tarokh SFBC and Alamouti MISO for SFN DVB-T2 broadcast networks
Old movie restoration using rational spatial interpolators
Design and implementation of a wavelet block for signal processing applications
A double RLS noise canceller and some related schemes
A Framework for Automatic Generation of Fully Synthesizable ADPLL
Power consumption vs. decoding performance relationship of VLSI decoders for low energy wireless communication system design
Implementation of bit-parallel lattice wave digital filters with increased maximal sample rate
Temperature control configurations for a thermo-pneumatic micropump
VLSI design of a routing switch for the SpaceWire serial link standard
Split-radix algorithm for the new Mersenne number transform
Smart-Pixel Array for Imaging Sensors
A new accurate analytical expression for the SiPM transient response to single photons
60 GHz stepped impedance filter using Planar Goubau line technology
A Redirected Learning Architecture for Non-linear Digital Pre-distortion
Instruction level test for parallel multipliers
Analysis of Nonlinear Switched Circuits with Different State Variables in Each Topology
Lowpower design of multipliers using a full-adder isolation technique
A low-voltage reduced-power constant-g m rail-to-rail fully differential CMOS op-amp
A Wake-Up Circuit With Temperature Compensated Clock In 1.2V-0.13 μm CMOS Technology
150 GHz Differential Amplifiers with Lumped-Elements Matching Networks in 55 nm SiGe BiCMOS
Versatile second order filter structures for low-voltage multiple-input amplifiers
Layer Skip Learning using LARS variables for 39% Faster Conversion Time and Lower Bandwidth
Dedicated FPGA communication architecture and design for a large-scale neuromorphic system
Design guidelines for bipolar frequency dividers
Automated real-time video surveillance algorithms for SoC implementation: A survey
SPICE model for Piezoelectric Bender Generators
Detecting distributed computer network attacks: A multi-dimensional wavelet approach
Active Dual Level Gate Driver for Switching Losses Reduction in IGBTs
Microlens array help imaging hidden objects for medical applications
Avalanche photodiodes for high energy particle tracking in 130 nm CMOS technology
An analog CMOS realisation of a reconfigurable discrete-time cellular neural network
A Multibit MAC Scheme using Switched Capacitor based 3C Multiplier for Analog Compute In-Memory Architecture
An efficient multiple precision floating-point multiplier
Switched-current bilinear ladder group-delay equalisers
0.25 μm SOI technologies performance for low-power radio-frequency applications
A Novel Cross-shaped Bandpass Filter with Reconfigurable Notch Band
The comparison of four types L-band GaAs monolithic mixer using two common-gate MESFETs as the input stage
Non linear predictive control algorithm based on Laguerre-Volterra models
Multi-User multiple antenna systems in Up-Link OFDM communications
FPGA based prototyping using a target driven FSM partitioning strategy
General purpose neuroemulator architecture: design and VHDL simulation
A compact QRNG for IoT applications
ODIF for weighted median filters
A smart "single line" pixel sensor for industrial vision
A new method, using the graph theoretical approach, for obtaining symbolic state equations of linear electronic circuits