yusuke1997/dblp-id-title huggingface dataset:
Toward Neuromorphic TinyML for Efficient Visual Perception
Enhanced modular CMOS current-mode winner-take-all network
A hierarchical based approach for coupling aware delay analysis of combinational logic blocks
Dynamic behavior of dielectric resonator antennas
An automated design methodology for layout generation targeting power leakage minimization
A novel very fast current amplifier
Should ΔΣ modulators used in AC motor drives be adapted to the mechanical load of the motor?
Current-mode motion detector sensor using copier cell in CMOS technology
A hardware implementation of genetic algorithms for measurement characterization
A sampling theorem in numerical integration [nonlinear circuit simulation]
Design of integer/fractional-order filter with electronically reconfigurable transfer response
A fast settling and low reference spur PLL with double sampling phase detector
Design of CMOS OTA amplifiers and oscillators in a digital sea-of-transistors array
Testing content addressable memories using instructions and march-like algorithms
A new technique to stabilize frequency and Q-variations due to temperature changes in g m -C filters in CMOS technology
Behavioral-level envelope-following using Broyden's method
Gas identification system based on temperature modulation tin-oxide sensors and bio-inspired processing
Filter design with simultaneous magnitude and phase specifications
A Radix-4 Partial Product Generation-Based Approximate Multiplier for High-speed and Low-power Digital Signal Processing
Design of a cycle-efficient 64b/32b integer divider using a table-sharing method
Interpretation of Byzantine music notation as adaptive Δ-modulation
New Analog Test Metrics Based on Probabilistic and Deterministic Combination Approaches
A watermarking technique for geometric manipulation attacks
Orthonormal adaptive IIR filter with polyphase realization
Enhancing Security in the Industrial IoT Sector using Quantum Computing
Glitch minimization and dynamic element matching in D/A converters
Energy consumption minimisation with new synthesis method
A wire load model considering metal layer properties
Subset selection for tuning of hyper-parameters in artificial neural networks
Accessing on-chip temperature health monitors using the IEEE 1687 standard
The new form of electrothermal model of MA7805 positive voltage regulator
Artificial Intelligence approaches for Energy Efficiency in RDF Storage - A Literature Review
A PVT Variation Dependencies of VCO in Frequency Locked Loop
Force sensing in microrobotic systems - an overview
An Isometric on on-Chip Multiprocessor Architecture
Fast Over-Voltage and Surge Detector
A low voltage low power and high speed binary search analog to digital converter
Implementation of a Mixed Signal Chip for Multichannel Audio Equalizer with Sigma-delta A/D Conversion
CMOS SPADs selection, modeling and characterization towards image sensors implementation
A concurrent multiband fully differential CMOS LNA with a local active feedback for cellular applications 3G-4G
Millimeter-wave passive components on silicon for wireless communication applications
Repeater insertion combined with LGR methodology for on-chip interconnect timing optimization
A new method to implement CORDIC algorithm
Impedance Measurement Using Wide-Band Signals
Wireless Sensor for Intravenous Dripping Detection
Adaptive IIR filtering employing subband decomposition
Application of closed-loop control in the reduction of interference in nerve cuff recordings
Arduino-based embedded system for myoelectric hand prostheses
On-Chip Integrated Optical Sensors for Fluorescence Detection of Cancer Tissue: Application to Capsule Endoscopy
Design Trade-offs in Threshold Implementations
Design of a position sensitive integrated multidetector
0.8-V CMOS $G_{m}-C$ Bandpass Filter for Electrical Bioimpedance Spectroscopy
Analog circuit for synapse neural networks VLSI implementation
An RF-ID Receiver Using SAW Filters For Wideband Synchronisation
Improved motion compensation with overlapped spatial transformation
A Tracking Quantizer for Continuous Time Quadrature Bandpass Sigma-Delta Modulators
Energy Efficient Implementation of Machine Learning Algorithms on Hardware Platforms
Intelligent computational technique with CGA approach for optimal solutions
Current-Mode Fractional-Order Electronically Controllable Integrator Design
Analysis of the critical rise time in MOBILE-based circuits
An investigation of the effect of synapse transfer characteristic on the performance of analogue neural networks
A telemetry operated vestibular prosthesis
Neuro-Markovian hybrid system for handwritten Arabic word recognition
Simple Logic Threshold Conversion Circuits
The evolving generation and fast algorithms of Walsh transforms
Hardware-software co-design of embedded systems using CoWare's N2C methodology for application development
Analysis of the impact of random process variations in CMOS tapered buffers
HTDD based parallel fault simulator
Video teleconferencing in multimedia systems
A 250-MHz, 32-bit quantum MOS correlator prototype
A state assignment algorithm for finite state machines
A high speed/power ratio continuous-time CMOS current comparator
An automatic LC filter tuning system by optimization
Compact code generation for embedded applications on digital signal processors
Interface electronics for tactile sensing arrays
Performance evaluation of linear and circular arrays in wireless sensor network localization
A 65nm ASIC design for measuring mental stress from the heart rate variations
RF antenna matching methods for radar cross section measurements
Multiresolution analysis of heart sounds
Synchronization Analysis of a Switched Oscillator
Low Cost and High Performance Radiation Hardened Latch Design for Reliable Circuits
A low-cost neuroprocessor board for emulating the SOFM neural model
Synthesis of the group delay equalizers
Estimating complexity in multi rate systems
A cost-effective parallel architecture for the CodeRAKE receiver
A 749nW 1MSps 8-bit SAR ADC at 0.5V employing boosted switches
A Fully Integrated Fuzzy Logic Algorithm for Ischemic Heartbeat Classification
SemiSegPolyp: Semi-Supervised Polyp Segmentation using Graph Signals
OMI building blocks and developments for future high performance processing systems in the aerospace and automotive fields: DSP, SMCS and VIRTUOSO
Paradys: A scalable infrastructure for parallel circuit simulation
Modelling and analysis of scaled MOSFET devices and circuit simulation
CCII-based balanced fully integrated continuous-time filter synthesis: signal-flow graph approach
SC integrators with simple transconductance amplifiers
An RFID attendance and monitoring system for university applications
Practical design considerations on lumped element filters for microwave applications
A1CSA: An energy-efficient fast adder architecture for cell-based VLSI design
High-voltage tolerant watchdog comparator in a low-voltage CMOS technology
Re-usable 180nm CMOS dosimeter based on a floating gate device
FPGA Implementation of Simplified Spiking Neural Network
High-throughput FPGA-based emulator for structured LDPC codes
A VLSI architecture for fast and accurate floating-point sine/cosine evaluation
Integrated instrumental chain for magnetic pulse measurement in strong static field environment
Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics
Layout design on multi-finger MOSFET for on-chip ESD protection circuits in a 0.18-μm salicided CMOS process
Sampling frequency offset estimation and correction in OFDM systems
The pre-whitened NLMS: a promising algorithm for acoustic echo cancellation
Fading correlation and its effect on the second order statistics of MRC diversity for Hoyt mobile radio channels
A 12 bit 8 GS/s Time-Interleaved SAR ADC in 28nm CMOS
Algorithm for jointly optimized analysis and synthesis FIR filter banks
Efficiency of Orthogonal Codes for Quasi-passive Wake-Up Radio Receivers using Frequency Footprint IDs
On the probability distribution of fixed-point multiplication
Hardware Acceleration of a Fully Parallel Viterbi Decoder Architecture for Narrow Band IOT
Calibration of mismatch errors in time interleaved ADCs
A Low Complexity Simulation Algorithm for TH-UWB MMSE RAKE Receiver in NLOS Channel
Statistical design of a D/A converter based on the current division technique
A GA-based method for efficient interconnect capacitance computation in mixed-signal integrated circuits using sets of linear charges
An oscillating algorithm for variable ordering in binary decision diagram
The First All-Transistor Wideband (0 - 5GHz) Impedance Matching Network
Direct detection of DNA sequences based on capacitance measurements through a configurable mixed-signal architecture
Electrothermal model of multilayer structure for the design of GaAs integrated circuit devices
Perfect-reconstruction FIR filter banks with mirror-image symmetry
A data extraction and debugging framework for large-scale MPSoCs
Stimulator for real time control of paralyzed muscles during functional electrical stimulation
Fast residue arithmetic multipliers based on signed-digit number system
Fast Intra Mode Decision for 3D-HEVC Depth Map Coding using Decision Trees
Neu-MOS (νMOS) for smart sensors and extension to a novel neu-GaAs (νGaAs) paradigm
Double-rail encoded self-timed adder with matched delays
Feedback Driven Adaptive Power Management for Minimum Power Operation of Wireless Receivers
A Design Generator of Parametrizable and Runtime Configurable Constant False Alarm Rate Processors
Pipelined Architecture for a Semantic Segmentation Neural Network on FPGA
A 1.25mW 3 rd -order Active-Gm-RC 250MHz-bandwidth analog filter based on power-stability optimization
A method to design DWDM filters on photonic crystals
A CMOS channel-select tunable filter for 3G wireless receivers
Fast Solving Complete 2000-Node Optimization Using Stochastic-Computing Simulated Annealing
The effective protection circuit in inverter microwave oven
High Input Impedance Capacitively-coupled Neural Amplifier and Its Boosting Principle
Analysis of TM-pass reflection mode optical polarizer using method of lines
Strain reliability and substrate specific features of passive UHF RFID textile tag antennas
Exact risk analysis of wavelet spectrum thresholding rules
An Approximate Binary Classifier for Data Integrity Assessment in IoT Sensors
Average network delay in packet switched networks
A VLSI processor for light-weight real-time SAR imaging using signum coded signal and time domain processing
Parallel scaling-free and area-time efficient CORDIC algorithm
A new 5-parameter MOS transistors mismatch model
Bit-Level Optimization of Shift-and-Add Based FIR Filters
A switching current-mode power stage based on sigma-delta modulation
New correlation method for an efficient intrusion detection system
A Clock Boosted Charge Pump with Reduced Rise Time
Compact CMOS Class-AB Output Stage With Robust Behavior Against PVT Variations
Energy efficient bootstrapped CMOS inverter for ultra-low power applications
Design of a current steering DAC for a high speed current mode SAR ADC
A Systolic Inversion Architecture Based on Modified Extended Euclidean Algorithm for GF(2K) Fields
A one-path quadrature bandpass ΣΔ modulator based on distributed resonators at 25 MHz IF
Wideband MEMS switched delay lines with high phase linearity
A High-speed Low-power Sense Amplifier for the RRAM Array with Multi-level Reading Function using 130-nm Technology
Low power fast Ethernet line driver
A novel multi-step C-2C DAC architecture
Delayed feedback amplifiers with maximum flat group delay
Transition from Sinusoidal to Relaxation Oscillations in Emitter-Coupled Multivibrators
A new approach to the design of two-channel perfect reconstruction filter banks
A study on MOSFET rectifiers with transistors operating in the weak inversion region
Impact of Near-Threshold and Variability on 7nm FinFET XOR Circuits
A Low-Dropout Regulator for One Time Programmable (OTP) Memories in Automotive Applications
A neural network method for accurate face detection on arbitrary images
An OFDM timing synchronization ASIC
Efficient standard cell abutment checker
Light Weight RL Based Run Time Power Management Methodology for Edge Devices
Application-informed platform evaluation for commercial-off-the-shelf dynamic voltage scaling
A 2.23 ps RMS jitter 3 μs fast settling ADPLL using temperature compensation PLL controller
ESPRIT 6143: exploitation of asynchronous circuit technologies
A new mismatch-insensitive 1.5-bit MDAC with unity feedback-factor and enhanced performance
The influence of model parameters on accurate IMD simulations in HBTs
12-Gb/s low-power voltage-mode driver for multi-standard serial-link applications
High-radix residue number system forward and inverse converters
Analysis of Bang-bang CDR circuits with equations of linear motion
The mechanical and control system design of a dexterous robotic gripper
Single Photon Avalanche Diode Circuits For Ultra-Violet Imaging
Millimetric wave amplifier for single side band optical modulator
Improved Linearization of a high power amplifier to reduce spectral distortions near the saturation area
PWM audio power amplifiers: sigma delta versus sliding mode control
Detection of occlusion and visible background and foreground areas in stereo image pairs
Exploring MAS to a High Level Abstration NoC Simulation Environment
A novel time-slot assignment method in fully mesh networks
Exact design of multirate switched-current FIR filters with improved phase linearity
Combination of constant matrix multiplication and gate-level approaches for area and power efficient hybrid radix-2 DIT FFT realization
Firmware/software platform for rapid development of PC-based data acquisition systems
A linear operational transconductance amplifier with automatic offset cancellation and transconductance calibration
Design and performance comparison of a superregenerative MPSK transceiver
High-performance chip-to-chip signaling
Instruction based power consumption estimation methodology
Ontology mediators for ubiquitous computations environment
An asynchronous serial flash converter
Design of an undersampled BP ΣΔ modulator using LC and time-interleaved resonators
An Ant Colony metaheuristic for energy aware application mapping on NoCs
Effects of the NoC architecture in the performance of NoC-based MPSoCs
Timbre recognition of single notes using an ARTMAP neural network
A high performant 0.5 μm CMOS single chip ISDN network termination based on an embedded core and co-processor architecture
Automated analog circuit design and chip layout tool
RF Power Amplifier with Cartesian Feedback for TETRA Modulation
Nearly perfect-reconstruction cosine-modulated filter bank design for VDSL modems
Distributed arithmetic architecture of Discrete Wavelet Transform (DWT) with hybrid method
A model for the DC characteristics of a laser diode
Switched-Capacitor Voltage Buck Converter with Step-Down-Ratio and Clock-Frequency Controllers for Ultra-Low-Power IoT Devices
A Calibration-Free 96.7 dB SNDR 4 MS/s CT I-SD Modulator With Single Feedback DAC
Waveguide transfer switch driver multichip module
A 16 Gbps 10: 1 Serializer with Active Inductor Based CTLE for High Frequency Boosting
An FPGA implementation of NIST 256 prime field ECC processor
Synchronizers based on carrier phase lock Loop and on symbol phase lock loop
Automated brain tissue segmentation and MS lesion detection using fuzzy and evidential reasoning
A low-power class-AB Gm-C biquad stage in CMOS 40nm technology
A Memoryless Stream Processing Architecture for Energy-Efficient Signal Processing
A continuous-time direct RF-to-digital ΔΣ receiver
Enhancing Intelligent Battery Management on Automotive Microcontrollers Using LightGBM
Device-mismatch-insensitive current divider
Low-power CMOS implantable nerve signal analog processing circuit
Design of a flexible low-power modem chip for point to point radio link cellular backhaul applications
Control Unit for a Continuous Variable Transmission for use in an Electric Car
Remote laboratory allowing full-range student-designed control algorithm
Automatic generation of learning paths
Sensitivity comparison of high-order all-pole G m -C filters in canonical structures
Power consumption in transistor networks versus in standard cells
Recent advances in 40 Gb/s digital functions for high bit rate telecommunication applications
A low power 9GHz divide-by-3 injection locked frequency divider in 0.18μm CMOS with 15% locking range
An inductor-less transmission line based 60 GHz PA in 65-nm CMOS with analog power control
Microwave performance of optically controlled MESFETs
A Compact 6 ns Propagation Delay 200 Mbps 100 kV/µs CMR Capacitively Coupled Direction Configurable 4-Channel Digital Isolator in Standard CMOS
Algebraic PWM Strategy of a Multilevel NPC Voltage Source Inverter
A fully-integrated semicircular canal processor for an implantable vestibular prosthesis
An efficient test relaxation technique for combinational circuits based on critical path tracing
A 3 V, 10 bit, 6.4 MHz switched-current CMOS A/D converter design
Comparative study of low-voltage performance of standard-cell flip-flops
Low-power and high-speed DRAM readout scheme
High performance cryptographic engine PANAMA: hardware implementation
A New Modified Comb-Rotated Sinc (RS) Decimator with Improved Magnitude Response
Radix-4 decimation-in-frequency algorithm for the new Mersenne number transform
Mixed-Signal Ionoacoustic Analog Front-End for Proton Range Verification with 24γm Precision at 0.8 Gy Bragg Peak Dose
Reducing implementation complexity of fast sampled digital IIR filters
First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter
Piezo Electric energy harvester and its interface circuit: Opportunities and challenges
Design of a high-speed low-voltage (1V) charge-pump for wideband phase-locked loops
Colour space transformation, colour correction and exact colour reproduction with CNN technology
Trustworthiness: safety, security and privacy issues
One structure for wide-bandwidth and high-resolution fractional delay filter
A new non-coherent pulse compression based on binary codes for on-off keying (NCPC-BC-OOK)
Analysis of Operational Amplifier Requirements for Extended-Range Second-Order Incremental ADCs
W: Ti Intraneural Flexible Electrode for Acute Peripheral Nerve Stimulation Studies
Extended analysis of input impedance control of an NMOS-transistor with an inductive series feedback
A power grid analysis and verification tool based on a Statistical Prediction Engine
A single-chip 1.8 GHz image reject RF receiver front-end with boot-strapped inductors
Logic and Physical Synthesis of Cell Arrays
BIT-width exploration over 3D architectures using high-level synthesis
Criterion of design for small value integrated self-inductors
Modelling extended-lifetime wireless sensor networks
VHDL implemetation of a DMX512 decoder on a FPGA
Optimal expansion of discrete Volterra models using independent Laguerre basis
System design of bandpass sampling RF receivers
Vertical Handover for 4G Multi-Standard Wireless Transceivers
Fair comparison of hardware and software LDPC decoder implementations for SDR space links
Gauss-Newton image registration with CUDA
Towards a Brain-Machine-Brain Interface (BMBI) for Anatomical Rewiring of Cortical Circuitry
Reliability Monitoring in a Smart NoC Component
Electronically tunable PLL controller design using OTA
The impact of routing arbitration mechanisms on 3D NoC latency
New fuzzy ranking algorithm for discrete event simulation
Reduction parasitic capacitance in switching stage RF-CMOS Gilbert mixer for 2.4 GHz application
Massively parallel cellular matrix model for self-organizing map applications
A polynomial time approximation scheme for rectilinear Steiner minimum tree construction in the presence of obstacles
Joint angle and delay estimation of point sources
A theoretical analysis of the median LMF adaptive algorithm
Direct digital frequency synthesizers of high spectral purity based on quadratic approximation
A new architecture for low-power high-speed pipelined ADCs using double-sampling and opamp-sharing techniques
An Analysis and a Solution of False Conflicts for Hardware Transactional Memory
Frequency-response masking based FIR filter design with power-of-two coefficients and optimum PWR
An UHD 4K@60fps Deblocking Filter Hardware Targeting the AV1 Decoder
Ultra compact, quadratic power proxies for multi-core processors
On-chip multi-layer perceptron and time-delay neural networks for phoneme recognition
Right-half-plane zero removal technique for low-voltage low-power nested Miller compensation CMOS amplifier
A novel BJT output stage for SAW drivers
Space-time diversity applied to single-user environments and MIMO transmission channels
An Integrated Sensor IBC Implant Transceiver
Classification of steady-state behavior of the Colpitts oscillator
32nd IEEE International Conference on Electronics, Circuits and Systems, ICECS 2025, Marrakech, Morocco, November 17-19, 2025
Reversible implementation of square-root circuit
An Energy Efficient Multi-Rail Architecture for Stochastic Computing: A Bayesian Sensor Fusion Case Study
Analysis of the settling behavior of an external reference voltage source for a 16 bit and 200MS/s pipeline analog-to-digital converter
A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency
Generation of FARIMA(0, α, 0) sequences by recursive filtering: Testing for self-similarity
CircuitRIS: A Simulation Framework for Analyzing Circuit-Level Non-Idealities in RIS-Aided Wireless Communications
Linear topological conjugacy of elementary canonical state models of three-dimensional autonomous piecewise-linear dynamical systems
RF energy harvesting and remote powering at 900MHz and 2.4GHz
A 0.65-0.9-1.2V Supplies 10MHz High Efficiency PWM CMOS Buck DC-DC Converter
A programmable CMOS bandgap voltage reference circuit using current conveyor
Design of ADPLL system for WiMAX applications in 40-nm CMOS
Media access control development platform for wireless LANs
Transient evolution for different strategies in the amplifier gain control
Programmable low power VLSI current mode neuron cells
A combinatorial generalization of the Stirling Numbers of the second kind
Miniaturized Dual 400 mV LDO Regulators with 7.3-21.5 nA Quiescent Current for Biomedical Implants
Comparison of two high efficiency DC-to-AC converters
An efficient minimum area spacing algorithm for noise reduction
Dynamic Differential Flip-Flop without Explicit Output Latching Stage for High-Speed SoC
WiseTOP: a quality of service-aware low power acquisition and wireless communication platform for prosthesis control
Compact RF-photonic configuration for highly resolved and ultra-fast extraction of carrier and information of radar signal
Comparing defect coverage for current-mode logic and CMOS VLSI cells
A 2nd Order 1-bit Complex Switched Capacitor Sigma-Delta ADC with 90dB SNDR in a 180kHz Bandwidth
CAD tool for parameterized FPGA based FFT architectures
A 1.5-V 12-bit 75M-samples/s fully-differential low-power sample-and-hold amplifier in 0.25-μm CMOS
Radiation hardened bootstrapped switch in 0.18μm CMOS process
Design methodology and performance estimation for complementary gallium arsenide
Optimized AIS/DSC homodyne receiver design
Frame Based Memory Access Interpolation for A Digital Communication Modulator
Request-skip adders : CMOS standard cell data dependent adders
Solar Energy Systems Design in 2D and 3D: A Comparison of User Vital Signs
Robust digital receiver for frequency redundant digital communications over power lines
Modeling of mixed continuous/discrete-event systems via differential Petri nets
An Integrated DC/DC Converter with Online Monitoring of Hot-Carrier Degradation
Instruction-driven timing CPU model for efficient embedded software development using OVP
Nonlinear dynamics of first-order DPLL with FM input and phase detector DC offset
Small signal characterization and modeling of LC-tanks fabricated in BiCMOS process
Doherty CMOS power amplifiers for 5G technology
Efficient drivers, receivers and repeaters for low power CMOS bus architectures
A new static differential CMOS logic with superior low power performance
A design-oriented mathematical model for DC/DC buck converters with PFM control