yusuke1997/dblp-id-title huggingface dataset:
A 1.2 V CMOS multiplier using low-power current-sensing complementary pass-transistor logic
A power optimized transconductance amplifier and its application to a 6 th order lowpass GmC filter
Timing-Driven Steiner Tree Construction with Wire Sizing, Buffer Insertion and Obstacle Avoidance
An asynchronous pulse neural network model and its analog IC implementation
Design of a 7-bit 1GSPS folding-interpolation A/D converter with self-calibration technique
Analysis and Design of Antireflection and Frequency Selective Surfaces with Stratified and inhomogeneous media
Piezoelectric Transducers for Energy Harvesting: Electromechanical Model, Ambient Motion, and Electrical Loads
Output Frequencies of A Class of Nonlinear Systems
Optimal resistor ratio in the DAC with low precision resistors - statistical approach
A 1-mW 12-GHz LC VCO in 65-nm CMOS technology
A new initialization technique in designing and testing phases of asynchronous circuits
Low power differential three transistors two memristors based RRAM cell
Determination of a segment endpoint by means of the Radon transform
Low power high speed I/O interfaces in 0.18 μm CMOS
High-efficiency CMOS rectifier dedicated for multi-band ambient RF energy harvesting
Timing recovery in DVB-T2 using multi-rate farrow structure
FiltPIM: In-Memory Filter for DNA Sequencing
Algorithm and Hardware Co-Design Exploration for NTRU Equation Solving
Performance against cost trade-offs for hardware compression in 10 Gigabit networks
An Efficient Hardware Implementation of a Robust and Low-Complexity ADSRC Timing Synchronization Design
A Q-enhanced LC bandpass filter using CAIRO+
Synthesis and robustness evaluation of dynamic controllers for uncertain systems
Real-time emulation of DSP applications on programmable DSPs and FPGAs
Video segmentation of MPEG compressed data
Sizing of the physical layer of a RF intra-chip communications
ATM available bit rate congestion control with on-line network model identification
A behavioral and temperature measurements-based modeling of an operational amplifier using VHDL-AMS
Self-synchronizing watermark detection for MPEG-4 objects
Blocking effect reduction based on optimal filtering
Low-power 2.4-GHz RF transceiver for wireless EEG module plug-and-play
Automated image recognition of public lighting luminaries
Chopped-Anodic-Phase Charge Balancing Method for Electrical Stimulation
Live Demo: Design and FPGA Implementation of a Component Level UAV Simulator *
A 60-GHz quadrature PLL in 90nm CMOS
Side information generation using optical flow and block matching in Wyner-Ziv video coding
Proposal and Evaluation of Pin Access Algorithms for Detailed Routing
A contention-alleviated static keeper for high-performance domino logic circuits
Single pass temperature calibration of the ASIC on a general purpose ATE
Self-adaptive polling protocols for wireless LANs: a learning-automata-based approach
Optimization of a BiCMOS integrated transducer for self-compensated capacitive pressure sensor
A digitally programmable current mode analog shunting inhibition cellular neural network
An alternative to CMOS stacks based on a floating-gate transistor
CMOS PPG Sensor with Correcting Feedback for Effects of Skin Pigmentation
Nonlinearity Modeling for Mixed-Signal Inference Accelerators in Training Frameworks
Comparison of non-linear MESFET models
A new biasing method for CMOS preamplifier-shapers
An Efficient FPGA Implementation of Gaussian Mixture Models-Based Classifier Using Distributed Arithmetic
Adaptive routing considering the state of receiver for Ad Hoc Networks
Classical electrical circuitry to support modern control methods
A flexible realtime system for broadband time-frequency analysis in 130 NM CMOS
CMOS inverters based high frequency voltage controlled sinusoidal oscillator
SOI CMOS tunable capacitors for RF antenna aperture tuning
The central limit theorem and low-pass filters
Dual-polarity high voltage generator design for non-volatile memories
A new Polysilicon TFT capacitive fingerprint sensor with advanced mismatch compensation
The RF circuit design for magnetic power transmission dedicated to cochlear prosthesis
Study and development of an efficient RC-in-RC-out MOR method
Reduction of the memory requirements for the VLSI implementation of the 2D-inverse fast wavelet transform, using a space-filling curve
An efficient model checker based on the axiomatization of propositional temporal logic in rewriting logic
Joint estimation of complex gain and fractional delay for Tx leakage compensation in FDD transceivers
Optimal Input-Dependent Edge-Cloud Partitioning for RNN Inference
Transient response exploration of SRAM cell metastable states caused by ionizing radiation with 3D mixed mode simulation
Dynamic voltage scaling based on supply current tracking using fuzzy Logic controller
Characterization of MagFET structures
A New Control Method of Hybrid Active Filter Using a Feedforward Loop Tuned at 5 th and 7 th Harmonic Frequency
A 48 by 48 CNN chip operating with B/W images
Electrical and Wave Digital Modeling of CMOS-Based Ring Oscillators
Hyperchaotic circuits for secure communications: an efficient synchronization technique
A Ramp-Up Technique for Chopper-Stabilized DC-Coupled Fully Differential PGAs suitable for Current Measurements with High Dynamic Range
The data-acquisition, processing and control system of a micromirror-based laser-scanning endoscope
Feasibility of a Neural Network with Linearly Approximated Functions on Zynq FPGA
Design of a low latency spectrum analyzer using the Goertzel Algorithm with a Network on Chip
A Coin-Sized Detector for Room-Temperature X-Ray Photons and Electron Spectroscopy
Progress in self-stabilizing capsules for imaging of the large intestine
A study on FBAR Filters reconfiguration
Memristor-less current- and voltage-controlled meminductor emulators
Spur reduction by self-injection loop in a fractional-N PLL
Multirate digital squarer architectures
Single and multiple fault diagnosis based on symbolic analysis and reduced set of observable points for linear analog circuits
A new class of evanescent-mode waveguide filters
An Efficient Reconfigurable Neural Network on Chip
Evaluating Electric Charge Variation Sensors for Camera-free Eye Tracking on Smart Glasses
A rad-hard DC-DC converter controller
Low-Voltage BiCMOS Circuit Topologies for the Design of a 19GHz, 1.2V, 466mW, 4-bit Accumulator in Silicon-Germanium
An FPGA system using fuzzy clustering and correlation to diagnose angina
Design techniques for highly efficient class-F amplifiers driven by low voltage supplies
A new job for the pseudo-MOS transistor: working in the pressure sensors field
Metal oxide films/structures for gamma radiation detection
A Fast Offset Reduction Loop Based on a Bilinear Integrator for Sensor Readout Circuits
An efficient algorithm and architecture for natural logarithm using Maclaurin series
Correlation tuning in compressive sensing based on rakeness: A case study
A VLSI architecture of 2D wavelet transforms
An accurate scene-based traffic model for MPEG video stream
Transmission channel behavioral model for a wireless sensors network simulator
Dilated Temporal Convolutional Neural Network Architecture with Independent Component Layer for Human Activity Recognition
Video security assurance framework based on efficient Joint Cryptography Compression approach
Systematic Lossy Error Protection of Video based on Reduced Spatial Resolution
Employing a Wearable Eye-tracker to Observe Mind-wandering in Dynamic Stimuli
Design of M-band optimal orthonormal wavelet of compact support for signal de-noising by using the principle of complexity regularization
Online neural filtering operating over segmented discriminating components
A new design technique of CMOS continuous-time VHF current-mode bandpass ladder filters using VHF bandpass biquads
A 224 Gbit/s Transceiver Front-end Design for Next Generation Data Centers
High-speed low-power sense comparator for multilevel flash memories
Analysis of bandpass sigma-delta modulator architectures
Middleware switch ASIC implementation
A Delta-Sigma Modulator With Frequency Division Multiplexing for Multi-Channel EEG Acquisition Front-end
Study of SiO2 thickness effect on insertion loss of CMOS 60 GHz band pass filter
An integrated fault detector in high voltage technology for motor drive applications
A heterogenous approach to symbolic calculations based on structural numbers
Model order reduction using artificial neural networks
Oversampled and Noise-Shaped Pulse-Width Modulator for High-Fidelity Digital Audio Amplifier
Sensitivity based parameter reduction for statistical analysis of circuit performance
Biologically Inspired Multi-Timescale Sequence Processing in Hybrid CMOS-Memristive Hardware
Deep Multiframe Enhancement for Motion Prediction in Video Compression
A new low voltage bandgap reference topology
A digital PID controller for real time and multi loop control: a comparative study
Level-shifted neural encoded analog-to-digital converter
Study of different pulse waveforms and performance of TH-PPM Ultra Wideband Systems in multipath and multi-user environments simultaneously
Enabling Secure MPSoC Dynamic Operation through Protected Communication
All-Digital A/D converter TAD for sensor interface over wide temperature ranges
A method to diagnose faults in analog integrated circuits using artificial neural networks with pseudorandom noise as stimulus
Effect of secret image transformation on the steganography process
A Novel Burst Correction Coding for the Images
On-chip supply current monitoring units using magnetic force sensing
A fast CRC implementation on FPGA using a pipelined architecture for the polynomial division
On-chip data compression for I.R. image sensors
Sub-THz high gain wide-band low noise amplifiers in 90nm RF CMOS technology
Activity management in battery-powered embedded systems: A case study of ZigBee® WSN
Sensitivity Analysis of Self-Interference Cancellation in Differentially-Fed Shared-Patch Antenna Arrays For In-Band Full-Duplex Applications
An ASIC linear congruence solver synthesized with three cell libraries
Noise-induced Performance Enhancement of Variability-aware Memristor Networks
Analysis of overvoltage on transformers terminated at transmission lines through a cable, using EMTP
Estimation of energy performance in computing platforms
On the Use of a Performance Indicator for Optimal Pilot Positioning in Multicarrier Systems
Traffic-based Air Pollution Monitoring System for Urban Intersections
Redundant SAR ADCs with Split-capacitor DAC
Analysis of multi-layer ARROW
A direct-conversion BiCMOS mixer for GHz applications
Bus buffer modeling and optimization in video processing IP
Neuro-fuzzy identification and control of a chain of oscillators
TinyStat: A Miniaturised Potentiostat for Portable Electrochemical Measurements
A new 16-bit low-power PVT-calibrated time-based differential Analog-to-Digital Converter (ADC) circuit in CMOS 65nm technology
Experimental demonstration of a Riemann Pump RF-DAC in 65 nm CMOS
LURU: global-scope FPGA technology mapping with content-addressable memories
ISFET CMOS compatible design and encapsulation challenges
Design of low-power libraries
Smart Shoe Insole with Flexible Pressure and Temperature Sensor Using Additive Manufacturing
Two-stage optimization of CORDIC-friendly FFT
Continuous-Time Complex Bandpass Modulator: Key Component for Highly Digitized Receiver
Equivalent circuit model of the TEM cell electric and magnetic field coupling to microstrip lines
High Throughput Architecture of JPEG Compressor for Color Images Targeting FPGAs
A 12 GHz All-Digital PLL with linearized chirps for FMCW Radar
RTS noise impact in CMOS image sensors readout circuit
Energy-efficient multi-task computing on MPSoCs: A case study from a memory perspective
A New High Frequency Second Generation Current Conveyor Based Chaos Generator
Optimum performance zero crossing digital phase locked loop using multi-sampling technique
Hardware design and verification techniques for Giga-bit Forward-Error Correction systems on FPGAs
Parallel comba multiplication in GF(2163) using homogenous multicore microcontroller
ECG signal acquisition for the Pan-Tompkins algorithm using current-mirror filters
Synthesis of follow-the-leader feedback log-domain filters
Reliability analysis of memory centric LDPC decoders under probabilistic storage failures
Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters
Recent ASICs developments in 65nm CMOS technology for high energy physics experiments
An high-swing, 1.8 V, push-pull opamp for sigma-delta modulators
Reliability analysis of logic circuits based on signal probability
Analysis of microwave frequency dividers in harmonic-balance simulators
Identifying Applications' State via System Calls Activity: A Pipeline Approach
HW/SW design and realization of a size-reconfigurable DCT accelerator
A Feasibility Study on a Switched-Capacitor Based PUF in 28 nm Technology
Methods for the Charge Pump Power Efficiency Improvement in Triple Well Technologies
FinFET based SRAM design: A survey on device, circuit, and technology issues
Attack on Memory Encryption in MPSoCs using HT-infected AES core
A Bias-Control Technique for Efficiency Improvement in CMOS Class-E Power Amplifiers
A flexible gain error driven position controller for DC motor drives
Power optimized reading procedure for RFID (EPC Gen 2) data transmission enabled application: Example of a wireless temperature sensor
Improving the Efficiency of Bayesian Optimization Using Robust Scaling Tchebycheff Method in Op-Amp Circuit Design
A Reversible-Logic based Architecture for VGGNet
Arbitrary generation of phase shift by pseudodifferential bilinear sections and their application
Optimization of the OFDM prototype waveform for highly time and frequency dispersive channels through a maximization of the SIR
A Low-Power Integrated Neural Interface with Digital Spike Detection and Isolation
Real-time canny edge detection parallel implementation for FPGAs
Single transistor primitive for modeling CMOS gates
Implementation of maximum dynamic range integrators
Modulation characteristics for a bidirectional AC-DC converter based on dual active bridge (January 2010)
Fast high-level fault simulator
An interactive learning environment for VLSI design
N-dimensional continuous systems with the Darboux-Goursat and Dirichlet boundary data
Pipeline Event-driven No-race Charge recycling Logic (PENCL) for low power application
Variation-aware Binarized Memristive Networks
The staircase memristor and its applications
A fully integrated 2.45 GHz 0.25μm CMOS power amplifier
Study of interpolation filters for motion estimation with application in H.264/AVC encoders
GALEOR: Leakage reduction for CMOS circuits
Necessary and sufficient conditions for stable H∞ stabilizability
Adaptive Power Management Unit for a Wireless Transceiver with an Integrated Wake-Up Receiver
Maximum power supply noise estimation in VLSI circuits using multimodal genetic algorithms
Inductive coupling for imbalance improvement in a UWB balun employed in a folded cascode mixer
Role of delays in networked control systems
About linearization of broadband amplifier by feedback (new opportunity of the well known method)
Logic filter cache for wide-VDD-range processors
Blood Pressure Estimation from ECG Data Using XGBoost and ANN for Wearable Devices
Fault-tolerance: new trends for digital circuits
Virtual VHDL laboratory
Teleoperation via Internet with Time-Varying Delay
Fast-settling low-power two-stage self-biased CMOS amplifier using feedforward-regulated cascode devices
Local congestion and blockage aware routability analysis using adaptive flexible modeling
Mapping method of reconfigurable cell matrices based on nanoscale devices using inter-stage fixed interconnection scheme
Tiny Two-Stage 1-GHz Time-Difference Amplifier Without Input Time-Difference Limitation and Extreme Points
Testing of dynamic quality of AD modules with standard interfaces and problems connected with it
All-Digital VCO-ADC TAD Using 4CKES-Type in 16-nm FinFET CMOS for Technology Scaling With Stochastic-ADC Method
On the numerical accuracy of CORDIC-based frequency offset compensation in burst oriented OFDM systems
Compact first order temperature-compensated CMOS current reference
A new simple emulator circuit for current controlled memristor
Instrumentation amplifier based analogue interface
FPGA based cellular automata for environmental modeling
Memory-Less 12-Bit Direct Digital Frequency Synthesizer Architecture on FPGA
A linearization technique for radio frequency CMOS Gilbert-type mixers
Approach to the realization of state variable based oscillators
Capacitive kinetic energy harvesting: System-level engineering challenges
Phase based detection of JPEG counter forensics
Enhancing Isolation in Solidly Mounted Resonators for Brain Implantable Microbots
Simplified Deep-Learning-based decoders for linear block codes
Analog design migration: An overview
An adaptive non-Gaussian filtering using pattern recognition approach
A Q-Enhanced Biquadratic Gm-C Filter for High Frequency Applications
Exploring Multi-level Design to Mitigate Variability and Radiation Effects on 7nm FinFET Logic Cells
Hierarchical mechanisms for high-level modeling and simulation of digital systems
Noise and Jitter in CMOS Digitally Controlled Delay Lines
Evaluation of High-Precision Nano-Ampere Current Measurement Method for Mass Production
Wide-band receiver architecture with flexible blocker filtering techniques
Low-swing/low power driver architecture
Low leakage multi-Vth technique for sequential circuits at transistor level in nanotechnology
An efficient multimodal variational analysis of cascaded asymmetric discontinuities
Positive-sequence grid voltage detector for distributed generation systems with no tuning requirements
Optimal programming with voltage-controlled temperature profile to reduce SET state distribution dispersion in PCM
Pulse-forming reactance network shapes a quasi-rectangular pulse from sinusoidal voltage
Computation Complexity Reduction Technique for Accurate Seizure Detection Implants
Unbalacing the I/O Pins Partitioning for Minimizing Inter-Tier Vias in 3D VLSI Circuits
Implementation of multiple PID controllers on FPGA
Low power time-of-flight 3D imager system in standard CMOS
Efficient digital oscillator with continuous phase and uniform frequency spacing
Linearity Boosting Technique Analysis for a Modified Current-Mode Bandgap Reference
Wide-area clock distribution using controlled delay lines
A Comparative Study of Deep-Learning Object Detectors for Semiconductor Defect Detection
On protecting the integrity of sensor data
Translinear signal processing circuits in standard CMOS FPAA
SC and SI techniques performances faced with technological advances [in CMOS]
A low-cost online estimator for switch-mode power supplies with saturating ferrite-core inductors
Direct residue-to-analog conversion scheme based on Chinese Remainder Theorem
A dual threshold voltage technique for glitch minimization
A Threshold-Based Deinterlacing Algorithm Using Motion Compensation and Directional Interpolation
An ultra-wide-range fine-resolution two-step time-to-digital converter with built-in foreground coarse gain calibration
A heuristic sensitivity analysis technique for high-dimensional systems
Turbo channel estimation for an orthgonal space-time coded system on fast time-varying channels
Design of high-speed analog-to-digital interface in digital technologies
Chip design of a bandpass sigma-delta modulator
Demonstration of 2.4 GHz vector modulator for RF wireless systems on cellulose-based substrates
Feedback control of membrane displacement in RF-MEMS switches
Quantizer Gain in Incremental Delta-Sigma ADCs
Efficient hardware solution for low power and adaptive image-compression in WSN
Linear generalized synchronization of two chaotic Colpitts oscillators
Sleep Transistors to Improve the Process Variability and Soft Error Susceptibility
Chaotic and hyperchaotic synchronization of two nonautonomous and nonlinear electric circuits
Thermal-driven white space redistribution for block-level floorplans
A VLSI Decoder for the Golden code
Analytical Compact Model for PMUTs Interfaces
Divide-by-2 Injection-Locked Frequency Divider Using 3-path Transformer-Coupled Resonator
Radio Frequency Polyphase Filter Design in 0.13-μm CMOS for Wireless Communications
Structure of a LIFI Dedicated Binary Pixel Array
Analytical Study of the Fading Memory Phenomenon in a TaOx Memristor Model
A Low Complexity Block-oriented Functional Link Adaptive Filtering Algorithm
Cooling management of a protruding electronic components by using a phase change material heat sink
New Σ-Δ voltage to frequency converter
A clock jitter insensitive multibit DAC architecture for high-performance low-power continuous-time ΣΔ modulators
High-speed and low-power multipliers using the Baugh-Wooley algorithm and HPM reduction tree
Mutual Inductance Evaluation Between Two Parallel Conductors on a PCB
Aircraft stabilisation: a suitable choice of feedback gain
Optimal filtering of an incremental second-order MASH11 sigma-delta modulator
A switched-capacitor CMOS voltage reference for ultra low-voltage and ultra low-power operation
Asynchronous wave pipelines for high throughput datapaths
A system-proof-of-concept for remote measurement applications
Asynchronous design: A promising paradigm for electronic circuits and systems
Sub-threshold signal detection using noise statistics for communications applications
A simple design technique for multiple resonance networks
Ultra Low-power, Low-energy Static Single-phase Clocked Flip-flop
On improved graph-based alternative wiring scheme for multi-level logic optimization
A High-performance sigma-delta ADC for ADSL applications in 0.35 μm CMOS digital technology
Tunable device-mismatch effects for stochastic computation in analog/digital neuromorphic computing architectures
4-subject 4-channel optical telemetry system for use in electrocardiograms
Fully-parallel LUT-based (2048, 1723) LDPC code decoder for FPGA
A high throughput pipelined architecture for H.264/AVC deblocking filter
RRAM Endurance and Retention: Challenges, Opportunities and Implications on Reliable Design
Near field measurement bench and on-chip sensor for FTB stress propagation analysis
Design Guidelines for Two-Stage Cascode-Compensated Operational Amplifiers
RISC-based coprocessor with a dedicated VLSI neural network
Design and Implementation of a RISC-V core with a Flexible Pipeline for Design Space Exploration
Margolus Chemical Wave Logic Gate with Memristive Oscillatory Networks
Designing universal logic modules
A Solar-Cell-Assisted, 99.66% Biofuel Cell Area Reduced, Biofuel-Cell-Powered Wireless Biosensing System in 65-nm CMOS for Continuous Glucose Monitoring Contact Lenses
A novel systolic GF(2k) field Multiplication-Inversion arithmetic unit
Stand-by low-power architecture in a 3 V-only 2-bit/cell 64-Mbit flash memory
Reliability Analysis of the SPARC V8 Architecture via Fault Trees and UPPAL-SMC
Design considerations and device selection in the implementation of low phase noise LC-VCOs
Modeling an electronic component manufacturing system using Object Oriented Colored Petri Nets
Sigma delta A/D converter architecture using a current controlled oscillator
An integrated programmable low-noise charge pump
Performance evaluation of pseudo self-similar traffic
Managing Power Consumption and Variability in Nanometer Circuits
Hardware support for fault tolerance in triple redundant CAN controllers
Flexible Neural Probe Modelling for Optimal Microelectrode-Tissue Interaction
Techniques for power management at the logic level
Simplified model of an amplifier with two poles and a pole-zero doublet
Fan Speed Control Based Defence for Thermal Covert Channel Attacks in Multi-Core Systems
A 12-Channel 60-Gb/s Transimpedance Amplifier and Limiting Amplifier Array for OPCB Applications
Instantaneous frequency measurement for IR-UWB signal in CMOS 130 nm
A clock-feedthrough compensated switched current integrator
Noise robust speech recognition selectively using noise adapted HMM set
Design of elliptic IIR filters with a reduced number of shift-and-add operations in multipliers