yusuke1997/dblp-id-title huggingface dataset:
A comparison between lattice, cascade and direct form FIR filter structures by using a FPGA bit-serial distributed arithmetic implementation
Efficient periodic clock calculus in latency-insensitive design
An eight-sector wireless infrared receiver
A Design of Cold Start Charge Pump for Flexible Thermoelectric Generator with High Output Impedance
Road traffic sign detection in color images
An efficient VLSI implementation of four-step search algorithm
A new PWM/PFM control technique for improving efficiency over wide load range
Analysis of elementary multi-source networks employing TCP/IP congestion control
Power efficient 2-D rounded cosine transform with adder compressors for image compression
Pipeline architecture for two-dimensional discrete cosine transform and its inverse
Nanowatt Wake-Up Radios: Discrete-Components and Integrated Architectures
Application of the inductor multiplier
Progress towards a microwave chaotic communications system: triumphs and tribulations in realizing broadband high-frequency chaotic oscillators
A hardware efficient chaotic ring oscillator based true random number generator
Effect of Mismatch on Substrate Noise Coupling on Flash A/D Converters
A Highly Linear Ring Oscillator for VCO-based ADCs in 65-nm CMOS
Voltage boosters for on-chip solar cells on focal-plane processors
Recognition of isolated musical patterns in the context of Greek traditional music
On the performance of the decorrelating and the conventional discrete time rake receivers with improved channel estimation
Elastic security zones for NoC-based 3D-MPSoCs
Comparison of Three Methods of Eliminating Musical Tones in Speech Denoising Subtractive Techniques
Stochastic analysis of CNFET circuits using enhanced logical effort model in the presence of metallic tubes
A wideband 5 GHz digital PLL using a low-power two-step time-to-digital converter
In-Vivo Monitoring for Electrical Expression of Plant Living Parameters by an Impedance Lab System
Magnetoelectric wireless power receiver for a wearable non-enzymatic lactic acid sensor
Low-cost Bayer to RGB bilinear interpolation with hardware-aware median filter
Efficient testing of an optical feedback pixel driver using wavelet analysis
Selective channelization on an SDR platform for LTE-a carrier aggregation
Orientation-selective digital filters based on 1D prototypes
TDNVRAM TM : methodology and architecture of a nonvolatile-memory technology development testchip
FPGA prototype of a serial interface circuit
ML iterative tentative-decision-directed (ML-ITDD): a carrier synchronization system for short packet turbo coded communication
On the noise analysis of modulated nonlinear circuits
Optimized design of high fan-in multiplexers using switches with driving capability
Performance testing of refrigerators using fuzzy inference methodology under Labview (R)
Arithmetic Reduction of the Static Power Consumption in Nanoscale CMOS
A readout channel with 1 nF fully integrated capacitor for AMS space experiment
2.5-Gb/s 0.35-μm CMOS ICs for optic-fiber transceiver
A Stochastic Compact Model Describing Memristor Plasticity and Volatility
A 100-fJ/cycle sub-VT decimation filter chain in 65 nm CMOS
A high throughput CAVLC hardware architecture with parallel coefficients processing for HDTV H.264/AVC enconding
A low-complexity 2D discrete cosine transform processor for multimedia applications
On-chip area-efficient spectrum analyzer for testing analog IC
Cascade of Current-Starved Pseudo Floating-Gate inverters
Effect of Equalization Bandwidth and Linearity on NRZ and PAM4 Eye Diagram
A Continuous-Time Delta-Sigma Modulator for 802.11a/b/g WLAN Implemented with a Hierarchical Bottom-up Optimization Methodology
Transient measurements and mixed quenching, active resetting circuit for SPAD in 0.35γm high-voltage CMOS for achieving 218 Mcps
Forward Body Bias Technique for Low Voltage and Area Constrained LDO Design in Deep Submicron Technologies
Comparitive Analysis of Bulk-Driven and Gate-Driven Self-Cascode OTA in Subthreshold MOS
A 10-bit, 3 ps rms precision time-to-digital converter for diffuse optical tomography measurements
Hardware and Power Requirements of Self-checking circuits
Reconfigurable A/D - D/A converter and its use in pipelined A/D converters
Twin-row-style for MOS analog layout
Distributed arithmetic radix-2 butterflies for FPGA
Bifurcation diagrams in MOS-NDR frequency divider circuits
Sensitivity study and improvements on a nonlinear resistive-type neuron circuit
A new scale adaptive wavelet thresholding method for denoising using chi-square test statistic
Saturation recovery technique for high-order bandpass switched capacitor ΣΔ modulators
An Offset Compensated Baseband Circuit for Automotive Radar Ultra-Wideband Applications
Gaussian characterization of self-interference during synchronization of chaos based DS-CDMA systems
Controlling and synchronization of a second-order non-autonomous nonlinear electric circuit
Automatic segmentation of brain tumors from MR images using undecimated wavelet transform and gabor wavelets
Optimizing Power Consumption vs. Linearization in CMFB Amplifiers with Source Degeneration
An 800 MHz 0.35 μm CMOS clock tree and PLL based on a new charge-pump circuit
Multiple-input transconductance CMOS amplifier for implementation in continuously programmable cellular neural networks
A 130 nm CMOS IR-UWB receiver based on baseband cross-phase detection
RJ/DJ jitter decomposition technique for high speed links
An inductorless wideband Balun-LNA for spin torque oscillator-based field sensing
Implementation issues for congestion control in ATM networks
A PULP-based Parallel Power Controller for Future Exascale Systems
Analog and asynchronous variation-aware circuits
Double-regenerated switched-current comparator
An ultra low noise, low offset chopper Operational Amplifier in 180 nm technology
Saturation and Thermal Stability of Power Inductors
Optimal design of input filters for dc-dc switching regulator using ceramic and electrolytic capacitors
LO Leakage Cancellation Using Upconverter Mixer Transistors Back-Gate Bias Control in a 22 nm FDSOI 39 GHz Transceiver
An FPGA-based hardware accelerator for simulating spatiotemporal neurons
Multi-Context TCAM Based Selective Computing Architecture for a Low-Power NN
A technique for fast AC statistical analysis of analog circuits
1.5 V CMOS bootstrapped dynamic logic circuit techniques (BDLCT) suitable for low-voltage deep-submicron CMOS VLSI for implementing 482 MHz digital quadrature modulator and adder
Design and implementation of the digital controller for a fuel cell DC-DC power converter system
Application of chance-constrained programming to design centering, tolerance assignment, and tuning
Design and Optimization of Printed Spiral Coils for Efficient Inductive Power Transmission
High Quality and Low Latency Interpolation Filters for FPGA-Based Audio Digital-to-Analog Converters
A VLSI network of spiking neurons with plastic fully configurable "stop-learning" synapses
Text analysis for the Slovenian text-to-speech system
High-speed and memory-efficient architecture for 2-D 1-Level discrete wavelet transform
SysPy: using Python for processor-centric SoC design
A neural discriminator capable to identify impurities in the data sample
Efficient Energy Harvesting Topologies from ULV Input Signals: Analysis and Experimental Results
Design of a low-power variable gain amplifier for reconfigurable wireless receivers
The impact of dielectric relaxation on ΣΔ-modulators
LDO-assisted vs. linear-assisted DC/DC converters: A comprehensive study and comparison
MultiModal Human-Robot Interaction for Cobot-Assisted Disassembly: A Comparative Study of Voice, Gesture, GUI, and Brain Signal Control
Maximum a posteriori detection of the primary synchronization channel of the UMTS/FDD mode
A multi-valued 350nm CMOS voltage reference
Two level decomposition based matrix multiplication for FPGAs
A comparison of bandwidth setting concepts for Q-enhanced LC-tanks in deep-sub micron CMOS processes
Time of Arrival Estimation Performance of VDES-R Mode with the Presence of Multipath Propagation
Low error truncated multipliers for DSP applications
4-bit 2-Gsample/s flash A/D converter using latched-skewed-logic in 0.13um CMOS
Structurally synthesized multiple input BDDs for simulation of digital circuits
A 2.9-30.3GHz fourth-harmonic voltage-controlled oscillator in 130nm SiGe BiCMOS technology
Designing SRCOs by symbolic-behavioral-modeling of unity-gain cells
A Low Power Sense Amplifier Flip-Flop With Balanced Rise/Fall Delay
Implementation of modified wave digital filters using digital signal processors
Delay Efficient 32-bit Carry-Skip Adder
A 1.0 GHz clock generator design with a negative delay using a single-shot locking method
Multiple low swing voltage values for CPL, CVSL and domino logic families
An FPGA implementation of 3D affine transformations
Mixed-Signal Board Level DfT Techniques Using IEEE P1149.4
Construction of the cyclic block-type LDPC codes for low complexity hardware implementation
Simultaneous pixel calibration for global shutter THz imager
A specific multi-channel photon-counting unit for air-pollution measurement
Design of a compact and low supply voltage CMOS voltage reference generator
Variable ordering for regular layout representation
End-to-end QOS management and real time agreement protocol for resource reservation for multimedia mobile radio network
Ultra low voltage and, nor and XOR CMOS gates
A highly parallelized processor for face detection based on Haar-like features
Review of the missing mechanical element: Memdamper
Design of a development system for multimedia applications based on a single chip multiprocessor array
A Hybrid Framework for Bearing Fault Diagnosis using Physics-guided Neural Networks
A low-power 2 GHz discrete time weighting system dedicated to Sampled Analog Signal Processing
A system aproach for reducing power consumption of multimedia devices with a low QoE impact
Algorithm and two efficient implementations for complex multiplier
Global Shutter CMOS Image Sensor With Wide Dynamic Range
Investigation of a programmable threshold logic gate array
ANN-Powered Reinforcement Learning-Based Analog Circuit Optimization
Techniques to reduce folding of noise and interferers in PLL charge-pump
Wearable Wristworn Gesture Recognition Using Echo State Network
A method to design MMICs for high production yields
Skin effect modeling in time domain for RF network on chip
An evaluation of hybrid tone reservation method for PAPR reduction using power amplifier with memory effects
A low-power CMOS RF power detector
3D-Stacked CMOS SPAD Image Sensors: Technology and Applications
An Analog Hardware Squarer-Based Edge Detector for Breast Cancer
Robust power oscillator design for inductive-power link applications
FPGA-based Internet protocol firewall chip
An open architecture for position and force control of robotic manipulators
Multifunctional VLSI systems and their simulation
Advanced electronic circuit breaker techniques for the use in electric vehicle charging stations
28-nm FD-SOI Dual-Port SRAM with MSB-Based Inversion Logic for Low-Power Deep Learning
RF energy harvesting system and circuits for charging of wireless devices using spectrum sensing
Class-AB output stage design for high-speed three-stage op-amps
An 8kb SRAM macro in 65nm for ultra-low voltage applications operating from 1.2V to 0.5V
A new fault-tolerant architecture for CLBs in SRAM-based FPGAs
A comparative overview of ATPG flows targeting traditional and cell-aware fault models
Watermarking DSP algorithms for system on chip implementation
Development of baseband processing SoC with ultrahigh-speed QAM modem and broadband radio system for demonstration experiment thereof
Experimental demonstration of stochastic comparators for fine resolution ADC without calibration
Surface emitting laser smart pixel arrays for large scale optoelectronic parallel processing
A/D conversion of the battery voltage in advanced CMOS technologies
An efficient model of the CMOS inverter for nanometer technologies
A Low-Power and Area-Efficient Digitally Controlled Shunt-Capacitor Delay Element for High-Resolution Delay Lines
A mathematical model of an ideally threshold compensated rectifier for RF energy harvesting
A high gain and low-offset current-mode instrumentation amplifier using differential difference current conveyors
Wide-band Active Tunable Phase Shifter Using Improved Non-Foster circuit
Efficient MFSK demodulation using TDTL with fast acquisition
Linear scalar quantization of wavelet image decomposition using joint optimization
Image quality impact for eye tracking systems accuracy
A 1.5 V active RC filter for WCDMA applications
IP Generation Targeting Multiple Bit-Width Standards
Design and simulation of a switched capacitor ladder filter in a 90nm CMOS technology for WiMAX applications
VLSI design of a high speed turbo decoder for 3rd generation satellite communication
Colour image watermarking in the complex wavelet domain
DNNLibGen: Deep Neural Network Based Fast Library Generator
LNA circuit design counting the interconnect line parasitics
Meta-heuristics hybridizing independent component analysis with genetic algorithms
Integrated Airborne Particle Matter Detector
A novel implementation of sequential output based parallel processing - orthogonal wavelet division multiplexing for DAS on SDR platform
A 65nm CMOS fully integrated 31.5 dBm triple SFDS Power Amplifier dedicated to W-CDMA application
A ratio-independent algorithmic pipeline analog-to-digital converter
All-Digital PLL Using Pulse-Based DCO
Reflectometer Apparatus for rapid determination of water-cement ratio
Rewriting tables and memorized semirings
High speed CDR using a novel binary phase detector with probable-lock-detection
On the hardware implementation efficiency of SHA-3 candidates
Delay-Based Neural Computation: Pulse Routing Architecture and Benchmark Application in FPGA
Optimized models of IIR digital filters for fixed-point digital signal processor
Performance of a glucose AFC
A 58 nW ± 35 ppm/°C Oscillator for IoT Battery-less Sensor Applications
A practical substrate modeling algorithm with active guardband macromodel for mixed-signal substrate coupling verification
Buffer sizing for delay uncertainty induced by process variations
Design of a scalable DNA shearing system using phased-array ultrasonic transducer
A systolic architecture for Kalman-filter-based signal reconstruction using the wave pipeline method
Characteristics of double-gate polycrystalline silicon thin-film transistors for AMOLED pixel design
A Low-Power High-Rate Modulator for Ultra-Wideband Transmitters
Computational kernel extraction for synthesis of power-managed sequential components
DSP based sensorless control for induction motor using extended Kalman filter
Dynamically deactivating hidden neurons in a multilayer perceptron neural network
Simulation-Based Evaluation of Critical Short-Circuits in Power Electronic Systems as an Approach to Derive a System-Dependent Failure Rate According to ISO 26262
Multi-core SoC architecture exploration with radar digital system based on dataflow graph method
Voice activity detection using haircell model in noisy environment
GABIST: A New Methodology to Find near Optimal LFSR for BIST Structure
Low-power area-efficient delay element with a wide delay range
Drift induced rigid current shift in Ge-Rich GST Phase Change Memories in Low Resistance State
A new algorithm for three-phase to single-phase AC/AC matrix converters
A 2000°/s dynamic range bulk mode dodecagon gyro for a commercial SOI technology
Low-cost auto-calibration of passive polyphase filter in image reject receiver
Oscad: An open source EDA tool for circuit design, simulation, analysis and PCB design
Piecewise linear operations on sigma-delta modulated signals
Dynamic range, noise and linearity optimization of continuous-time OTA-C filters
The Suitability of the SPR-MP Method to Evaluate the Reliability of Logic Circuits
An improved switching and reset architecture for linear phase recursive filters
High performance level restoration circuits for low-power reduced-swing interconnect schemes
Estimating the starting point of conduction in nanoscale CMOS gates
Glitch reduction in digit-serial recursive filters using retiming
Methodologies for binding function units for low power in high level synthesis
Low-voltage rail-to-rail bulk-driven CMFB network with improved gain and bandwidth
Pipeline of successive approximation converters with optimum power merit factor
Bayesian classification and artificial neural network methods for lung cancer early diagnosis
Design considerations for high-CMRR low-power current mode instrumentation amplifier for biomedicai data acquisition systems
Fractional-Order Digital Phase-Locked Loop
A Non-Volatile Multi-Level Memory Cell Using Molecular-Gated Nanowire Transistors
Parameter estimation in secure communications using chaos
A Low-Power Biasing Scheme for the Rail-to-Rail Buffer/Amplifier Applications
The transformer-less generation of amplitude modulation: Theory and experiment
A cells and I/O pins partitioning refinement algorithm for 3D VLSI circuits
Digital baseband challenges for a 60GHz gigabit link
Power Management Technique Smoothing Regulated Digital Supply Between Modes Switching for Low Power Wireless Sensing Application
The noise figure of a sampling mixer: theory and measurement
Automated flowgraph analysis using Matlab and Maple
A Low Power, Low THD Current Driver with Discrete Common-Mode Feedback for EIT Applications
Computational intelligence for automatic diagnosis of submersible motor pump conditions in offshore oil exploration
Accurate subthreshold leakage model for nanoscale MOSFET transistor
Design Considerations for Stochastic Analog-to-Digital Conversion
A low-voltage programmable-gain current-mode amplifier
Timing error mitigation in microprocessor cores
Transient power in CMOS gates driving LC transmission lines
An Integrated Digital Architecture for the Real-time Reconstruction in a VSiP Sensor
43 µW 28 nm CMOS Large Input Output Dynamic Range Buffer for D-to-A Converter for Pixel Detectors in High Energy Physics
Gesture Recognition Wristband Device with Optimised Piezoelectric Energy Harvesters
On baseband considerations for multistandard RF receivers
3D simulation of thin-film bulk acoustic wave resonators (FBAR)
Radio-based Cooperation Scheme for DDoS Detection
STARDUST: Optogenetics, Electrophysiology and Pharmacology with an Ultrasonically Powered DUST for Parkinson's Disease
Theory of Cellular Nonlinear Networks with Analogue Dynamic Memristors
Globally verifiable clone-resistant device identity with mutual authentication
MEMS-based blood cell counting system
Computational efficiency: adaptive computing vs. ASICs
The five-phase twisted-ring counter circuit
An on-chip parallel memory architecture for a stereo vision system
Designs of a logarithmic and exponential amplifiers using current conveyors
A multi-modulus divider with high sensitivity and extended division range in 0.18 μm BiCMOS
A novel division algorithm for parallel and sequential processing
A low-voltage low-power CMOS V-I converter with rail-to-rail differential input for filtering applications
Distributed evolutionary design of constant-coefficient multipliers
Rigorous electromagnetic simulation of CCD cell structures
RF Front-end Integrated Circuits with 2.4 GHz Antenna for Wireless Communication Receiver
Study of all-optical wavelength conversion based on semiconductor optical amplifiers
Error control in circuit transient analysis
A novel DC-cancellation architecture for direct conversion receivers
MCA: one-port scalable microprogrammable ATM layer controller
Cryogenic SiGe Hetero-Junction Bipolar Transistors From Standard Technologies For Low Noise FLL
LDO regulator versus switched inductor DC-DC converter
A low voltage differential OpAmp with novel common mode feedback
Static series-voltage noise margins of CBL, CSL and CMOS
Medical images protection and authentication using hybrid DWT-DCT and SHA256-MD5 hash functions
RF Energy Harvesting with Wide Input Power Range
A 16-channel capacitance-to-period converter with offset compensation for sensor applications
A continuous-time area detector servo demodulator for hard disk drives
A high-speed magnitude comparator with small transistor count
Ultra-low voltage standard cell libraries: Design strategies and a case study
A New Active Pixel Design using μc-Si TFT Technology to Improve Brightness Uniformity of Organic Displays
A three-phase single-switch fly-back single-stage rectifier with lossless isolated snubber
Performance of Si-Integrated Wide-Band Single-Ended Switched Capacitor Arrays
Modular evaluation system for low-power applications: Educating undergraduate students in advanced digital design
High frequency threshold improvement of electro-static micro-relays
A 0.45V continuous time-domain filter using asynchronous oscillator structures
High order cascade multibit σΔ modulator for wide bandwidth applications
Frequency down-conversion with complementary-MOS inverters
Design constraints of high performance chopping signal conditioning circuits for integrated sensors
A Tool for Automatic Radiation-Hardened SRAM Layout Generation
H-tree CMOS logic circuit
An adaptive center (radar) zonal based algorithm for motion estimation
Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms
Development of simplex-based piecewise-linear approximations of nonlinear mappings
A novel procedure for channel estimation through the CMA and its use in different MLSD setups
Crystal-less duty-cycled-when-active IR-UWB transceivers
Multi bit DAC with corrective gate to drain voltage for optimum matching under gradient temperature effects
Evaluation of the Frequency Response of Electro-Mechanical Actuators with a Zero-IF 24-GHz Doppler Vibrometer
A Deep Learning Framework for Breast Tumor Detection and Localization from Microwave Imaging Data
GSM to G.729 speech transcoder
Design methodology of high efficiency continuous mode transfer power amplifiers with one octave bandwidth
A 0.8 V CMOS TSPC adiabatic DCVS logic circuit with the bootstrap technique for low-power VLSI
A reconfigurable charge pump in 0.13 μm CMOS for agile MEMS actuation
A Design Methodology for High-Speed Low-Power MCML Frequency Dividers
A single latch, high speed double-edge triggered flip-flop (DETFF)
CASTLE: an emulated digital CNN architecture; design issues, new results
A power-efficient imprecise radix-4 multiplier applied to high resolution audio processing
Memory energy consumption analyzer for video encoder hardware architectures
Simplified BiCMOS Current Controlled Conveyor
Gate oxide trap characterization under DC and pulse stress
CMOS/STT-MRAM Based Ascon LWC: a Power Efficient Hardware Implementation
An efficient solution space for floorplan of 3D-LSI
Crypto Accelerators for Power-Efficient and Real-Time on-Chip Implementation of Secure Algorithms
Combining multiple support vector machines for boosting the classification accuracy of uterine EMG signals
Better preparation of sol-gel Thin Film optical filter in presence of Surfactant
The ADEQUAT project for advanced CMOS process module development
Harmonic analysis of RC-active phase shift oscillators
Vector Matrix Multiplication Using Crossbar Arrays: A Comparative Analysis
A 5GHz CMOS voltage-current feedback wide-band transimpedance amplifier for optical transceivers
Perfectly balanced binary sequences with optimal autocorrelation
Optimum Position of Digital DAC Error Correction relative to the Decimation Filter in ΔΣ ADCs
A 30-GHz Switched-Capacitor Power Amplifier for 5G SoCs
Current-mode approaches to implementing hybrid analogue/digital Viterbi decoders
Study and comparison of membership-set outer bounding
Neuro predictive control of a heat exchanger: comparison with generalized predictive control
DSP implementation of 3D sound localization algorithm for monaural sound source
LZ4 compression algorithm on FPGA
A 55nm CMOS Linearized Oscillator for Audio VCO-ADCs achieving 78dBA of SNDR with $153\mu \mathrm{W}$
A brief analysis of the main SPICE models of the memristor
High coverage test for the second generation current conveyor
Performance limitations of a new subband adaptive system for noise and echo reduction