yusuke1997/dblp-id-title huggingface dataset:
Fast VVC Test Zone Search and Affine Motion Estimation Using Machine Learning
A 60 GHz up-conversion mixer using asymmetric layout with -41.1 dBc LO leakage
A 13-nW Voltage Reference with Orthogonal Trimming of Absolute Value and Temperature Coefficient
An Ultra-Low Power 22 nm Self-Oscillating Voltage Doubler With Dynamic Leakage-Suppression Logic
A novel tri-state device implemented with a metal gated QCA
Voltage Regulation in a Buck Converter for an Unknown CPL: An Extended Feedback Control Design
Analog circuits for modeling and controlling synchrony in arrays of coupled oscillators
On the Possibility to Use Energy Harvesting on Beta Radiation in Nuclear Environments
Clip Clustering for Early Lithographic Hotspot Classification
An approach a new 1 V supply resistorless voltage reference using Schottky diode
Specifications for a multi-standard SBCD/ARGOS-3 integrated UHF satellite receiver
11th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2020, San Jose, Costa Rica, February 25-28, 2020
A circuit synthesis algorithm for coarse grained dynamic reconfigurable circuits
Optimal location of reclosers in distribution systems considering reliability in communication channels
Haptic system for upper limb rehabilitation with hand grip strength measurements and Internet of Things capabilities
Partial triplication of a SPARC-V8 microprocessor using fault injection
Fixed-point FPGA model-based design and optimization for Henon map chaotic generator
Managing signal and power integrity using power transmission lines and alternative signaling schemes
IEEE 7th Latin American Symposium on Circuits & Systems, LASCAS 2016, Florianopolis, Brazil, February 28 - March 2, 2016
Alternative Reference Samples to Improve Coding Efficiency for Parallel Intra Prediction Solutions
Design optimization of a CMOS RF detector
Design of filterbanks using a fast optimization approach
Heterogeneity-Aware Offloading for the IoT-Edge-Cloud Continuum
A comparison between RS+TCM and LDPC for G.fast channel coding
Reconfigurable multiple-gain active-rectifier for maximum efficiency point tracking in WPT
Noise Reduction Technique using Multiple Photodiodes in Optical Receivers for POF Communications
On-chip Diffusion Charge Redistribution Ladder Converter for Photovoltaic Systems with Mismatch
Multi-Codec Video Quality Enhancement Model Based on Spatio- Temporal Deformable Fusion
Open-Source Cellular IoT Technologies Coverage Data Collection System for Precision Agriculture
On the Design of Reliable and Accurate Current References
Oscillation-based test in a CCII-based bandpass filter
Embedded system for area measurement using FPGA
Effect of the design space sampling on the design performances
Comparison of conventional and new class AB modifications of the Flipped Voltage Follower and their implementation in high performance amplifiers
Towards Ambipolar Planar Devices: The DeFET Device in Area Constrained XOR Applications
Predictive DTC algorithm for induction machines using Sliding Horizon Prediction
Effects of nanoelectroporation on plasma and nuclear membranes
A pulse generator with poisson-exponential distribution for emulation of radioactive decay events
Biased capacitive divider electrostatic generators for energy harvesting
Analysis of Random Number Generators Based on Chaos-Modulated Dual Oscillator Architecture
9th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2018, Puerto Vallarta, Mexico, February 25-28, 2018
Exploring power-performance-quality tradeoff of approximate adders for energy efficient sobel filtering
Squarer exploration for energy-efficient sum of squared differences
Current Behavior on Process Variability Aware FinFET Inverter Designs
All-digital reconfigurable IR-UWB pulse generator using BPSK modulation in 130nm RF-CMOS process
An analysis of on-silicon-via stacks in RF-CMOS processes
Design of CMOS current-mode multiplier-divider circuit for type-2 FLC applications
Motion capture sensor to monitor movement patterns in animal models of disease
FIFS: A Machine Learning-Based Fast AV1 Interpolation Filter Search
A robust to PVT variations low-voltage low-power current mirror
A CAD-oriented simulation methodology for memristive circuits
Analysis of the effects of coupling through substrate and the calculus of the Q factor
Design and Automated Layout Generation of a PMIC Core in Skywater 130nm Open-Source Technology
A comparison of asynchronous QDI templates using static logic
Analog layout automation via self-organization: Enhancing the novel SWARM approach
DC and AC electrical characterization temperature dependence of Ag/Porous Silicon/p-Si/Al
Robust Passive Coherent Location via Nonlinearly Constrained Least Squares
DC-DC switching converter as on-field self energy meter
A fault injection platform for FPGA-based communication systems
Memristor device fabricated from doped graphene oxide
A MOSFET dosimeter built on an off-the-shelf component for in vivo radiotherapy applications
A Novel Single Lead to 12-Lead ECG Reconstruction Methodology Using Convolutional Neural Networks and LSTM
CMOS RF class-E power amplifier with power control
Co-Design of the Power Stage and Adaptive Controller of a Charger/Discharger to Ensure Stability and Battery Safety
High slew-rate OTA with low quiescent current based on non-linear current mirror
Monitoring adjustment based on current data of an IoT-COTS monitor for environmental chemical analysis
Distortion analysis of integrated analog multipliers: DC versus AC approaches
An Improved Serial IMPLY Adder Algorithm for Efficient Neural Network Applications
Design of a Robust IEEE Compliant Floating - Point Divide and Square Root Using Iterative Approximation
A wireless medical system prototype for implantable applications
A 65-nm CMOS Millimeter-Wave Ear-Worn Non-Invasive Continuous Glucose Monitoring Chipset Using a 0.17mm 2 72mW Transmitter and a 0.75mm 2 80mW Direct-Conversion Receiver
A new 4D lattice FIR digital filter
On the Netlist Gate-level Pruning for Tree-based Machine Learning Accelerators
Low cost rollback to improve fault-tolerance in VLSI circuits
A novel asynchronous interface with pausible clock for partitioned synchronous modules
Filtered-x Error Coded Affine Projection algorithm with Evolving order for active noise control
Power Efficient Analog-Assisted Digital Voltage Regulator for Implantable Medical Devices
Dynamic gate-level body biasing for subthreshold digital design
Comparison Between Multispectral Cameras and Wireless Sensor Networks for Enabling Commercial High-Density Mapping in Greenhouses
Hardware implementation of a single-cycle one-dimensional median filter
A computer-aided approach for voltage reference circuit design
A low-power, high-accuracy capacitance-to-time converter for differential capacitive sensors
Design of optimized radix-2 and radix-4 butterflies from FFT with decimation in time
A Strategy to Achieve Competitive Performance in Basic RF LNAs
Ideal Step Size Estimation for the Multinomial Logistic Regression
Bio-inspired system architecture for energy efficient, BIGDATA computing with application to wide area motion imagery
Advancing Uncooled Infrared Imagers Using An Open-Circuit Voltage Pixel
Automatic complex instruction identification for efficient application mapping onto ASIPs
Evaluation of Transient Fault Tolerance in Different Logic Styles of 2: 1 Multiplexers
A CMOS implementation of the discrete time nonlinear energy operator based on a transconductor-squarer circuit
Design of an integrated sampling and conversion system for energy meters
Applying Learning Methods to Optimize the Ground Segment for HTS Systems
Optimization of FPGA Routing Networks with Time-Multiplexed Interconnects
Non-stationary statistical simulation of blind-oversampling CDR circuits
Vector analysis of a four-phase induction machine
A Comparative Study of MAGMA and cuBLAS Libraries for GPU based Vector Fitting
Communication in star coupled network with fractional hyperchaotic nodes
A power optimized decimator for sigma-delta data converters
A DAC reconstruction filter for narrowband long distance Communications
Phase Space Reconstruction Based Real Time Fatigue Crack Growth Estimation for Structural Health Monitoring Ships
Embedded bus switches on 3D data bus for critical access time reduction
A Wide-Band High-Speed Sample and Hold in 0.35µm CMOS Technology
Requirements for an integrated conditioning circuit for multiphase flow imaging using impedance wire-mesh sensors
Optimization opportunities in RRAM-based FPGA architectures
On the functional test of the cache coherency logic in multi-core systems
Dedicated monitoring service without routing mitigation for Networks-on-Chip
ASC-FFT: Area-Efficient Low-Latency FFT Design Based on Asynchronous Stochastic Computing
Efficient online estimation of electromechanical modes in large power systems
Strategy for higher education in electronic circuits and systems in the perspective of the up-coming digital society
MLSBench: A Benchmark Set for Machine Learning based FPGA HLS Design Flows
Hardware Trojan Localization for Untrusted Network-on-Chips
Unconventional signal processing architecture for reconfigurable on-chip communication systems
Step down DC/DC converter for micro-power medical applications
Reliability Evaluation of Compressed Deep Learning Models
An Inverter-Based Difference Differential Amplifier with Active Frequency Compensation
A 1.8V 9bit 10MS/s SAR ADC in 0.18µm CMOS for bioimpedance analysis
Microprocessor Design with a Direct Bluetooth Connection in 45 nm Technology Using Microwind
Reducing the amount of transistors by gate merging
10th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2019, Armenia, Colombia, February 24-27, 2019
Network Collapsing Placement and Routing for Field-Coupled Nanocomputing
Telepresence using the kinect sensor and the NAO robot
Low-Power Wireless Sensor Network for Real-Time Indoor Air Quality Monitoring with CO2 Sensors
Electrostatic generators for vibrational energy harvesting
Digital circuit for the generation of colored noise exploiting single bit pseudo random sequence
Reliability Analysis in Less than 200 Lines of Code
IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014, Santiago, Chile, February 25-28, 2014
Small lightweight hash functions in FPGA
Hardware Implementation of HEVC Inverse Transform in 45nm CMOS
Design and optimisation of a cascode low noise amplifier (LNA) using MOST scattering parameters and gm/ID ratio
Evaluating the efficiency of using TMR in the high-level synthesis design flow of SRAM-based FPGA
Impedance vs coupling noise analysis and tradeoff on power delivery filters based on package layout interconnections
Quantitative Information Flow for Hardware: Advancing the Attack Landscape
Exploiting Design Flexibility in Multi-Tenant Multi-FPGA Edge Systems
An efficient reference frame compression approach for video coding systems
Security Implications of Decoupling Capacitors on Leakage Reduction in Hardware Masking
Identifying power consumption signatures in LTE conformance tests using machine learning
A triple mode wide locking range, low phase noise injection locked oscillator based phase shifter covering the Sub-6 GHz 5G bands
Activity-Based Input Operand Assignment for Reduced Multiplier Power Dissipation
Programmable Seizure Detector Using a 32-bit RISC Processor for Implantable Medical Devices
Process Variability Challenges for Radiation Mitigation Techniques on 16nm
Analog memristive and memcapacitive properties of Ti / AI2O3 / Nb2O5 / Ti resistive switches
Exploring Soft Error Susceptibility in FET Devices via Geant4 Simulation
Approximation-Based Implementation for a Minimum Energy Point Tracking Algorithm over a Wide Operating Performance Region
On-Chip Area and Test Time Effective Weak Resistive Open Defect Detection Technique for Cache Memory
Siwa: a RISC-V RV32I based Micro-Controller for Implantable Medical Applications
Evaluating Cell Library Sizing Methodologies for Ultra-Low Power Near-Threshold Operation in Bulk CMOS
Design and Modeling for Very High-sensitivity UHF RF Energy Harvesting Circuit
Light Siamese Neural Network Architecture for Image Comparison
Design of a Low-Power 900-mV-Supply Reference for a Current-Ratio-Based Temperature Sensor
An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider Units
Rate-Distortion and Complexity Comparison of HEVC and VVC Video Encoders
Physical Design for Field-coupled Nanocomputing with Discretionary Cost Objectives
90° Hybrid coupler design technique for wideband and multimode mm-wave operations featuring lateral ground planes virtual expansion in 28nm FD-SOI CMOS technology
Energy analisys of motion estimation memory transference on embedded processors
A scalable parallel reconfigurable hardware architecture for DNA matching
Resistorless switched-capacitor current reference based on the MOSFET ZTC condition
Ultra low-cost sensors using RFID standards for data collection, for IoT systems in food production and logistics
Hardware implementation of FFT-based spectrum sensing techniques for cognitive radio
Novel two-stage comb filter for multiple-of-three decimation factors
1.5 ppm/°C nano-Watt resistorless MOS-only voltage reference
Dynamically Reconfigurable NoC using a deadlock-free flexible routing algorithm with a low hardware implementation cost
Voltage-to-Voltage Sigmoid Neuron Activation Function Design for Artificial Neural Networks
Correlating Pre-Route and Signoff Delay Through Delta-Based Machine Learning Prediction
RSMT construction algorithm based on Congestion-Oriented Flexibility
Inductor characterization in RF LC-VCOs
gem5-FIM: a flexible and scalable multicore soft error assessment framework to early reliability design space explorations
Design and implementation of a trans-impedance amplifier for a miniaturized saturated absorption spectrometer
Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX
A capacitive sensor interface for high-resolution acquisitions in hostile environments
The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network
Code compression using Multi-Level Dictionary
On UVM Reliability in Mixed-Signal Verification
A novel current-based CCD clock driver
A Novel Down Conversion Mixer with Low/High Band Re-configurable Transconductance Amplifier in 65nm CMOS Process
Dynamic NoC buffer allocation for MPSoC timing side channel attack protection
Hardware design of fast HEVC 2-D IDCT targeting real-time UHD 4K applications
Area-oriented iterative method for Design Space Exploration with High-Level Synthesis
A digitally controlled oscillator for fine-grained local clock generators in MPSoCs
Design Exploration of DWT-Based Feature Extraction Using FPGA for High-Performance Signal Processing
A RISC-V Based Medical Implantable SoC for High Voltage and Current Tissue Stimulus
Pico-Ampere Current Biasing Platform for on-chip Tuning of Analog Blocks
Novel two-stage comb decimator with improved frequency characteristic
Accelerated Hot-Carrier Aging Based on Ultrafast Laser for CMOS Technologies
The HF-RISC processor: Performance assessment
HW/SW Implementation of MiRitH on Embedded Platforms
Investigating Correlation and Similarity Between Inertial Measurement Unit and Kinematic Data in Gait Analysis
A strategy for mapping reconfigurable cores in NoCs
Methodologies for Implementation of Standard-Cell Libraries for Radiation Hardened Environments
MOS-only M-2M DAC for ultra-low voltage applications
Design of Asynchronous Pipelines with QDI Template Using Commercial FPGA
Ultra-Compact Approximate 4:2 Compressor on the Design of Power-Efficient Multipliers for Image Multiplication
Active inductors modelling and trade-offs reexamined
Systematic high-level design of a fifth order Continuous-Time CRFF Delta Sigma ADC
Atrial Fibrillation Detection Using Weight-Pruned, Log-Quantised Convolutional Neural Networks
A power management system architecture for LF passive RFID tags
A Low-Power Level-2 Discrete Haar Wavelet Transform with Approximate Adders for ECG Signal
Adherence of a high-speed RRP LDMOS characterization setup to JESD 24-10 standard
Detailing a useful position calibration for microphone arrays
Stable ring oscillator for ultra low supply voltages
A Parallel JPEG Pleno Baseline Block-Based Profile Light Field Encoder Using OpenMP
Design Exploration of CMOS Building Blocks for Time-Based-Controlled DC-DC Converters Using Open-Source PDK and Tools
Thermal Debugging Tool for Servers
Highly-linear transimpedance amplifier for remote antenna units
Characterizing energy consumption in software HEVC encoders: HM vs x265
Applying lockstep in dual-core ARM Cortex-A9 to mitigate radiation-induced soft errors
Fast floorplanning with placement constraints
A third-order 1 MHz continuous-time sigma-delta modulator in a 130 nm CMOS process
Minimizing Power Consumption Through Brute Force Algorithm in Elastic Optical Network
GNRFET based Ternary Logic - Prospects and Potential Implementation
Design-oriented model for short-channel MOS transistors based on inversion charge
Modified comb decimator for high power-of-two decimation factors
Text encryption device based on a chaotic random bit generator
An Efficient N-bit 8-2 Adder Compressor with a Constant Internal Carry Propagation Delay
IoT Sensor Node with Edge Computing for Efficient Vibration Monitoring of Industrial Motors
A State Assignment Method for Extended Burst-Mode gC Finite State Machines Based on Genetic Algorithm
Evaluation of Coarse-to-Fine Spatio-Temporal Information Fusion (CF-STIF) Network
Line Resistance Impact in Memristor-based Multi Layer Perceptron for Pattern Recognition
Design of a fully integrated colpitts oscillator operating at VDD below 4kT/q
Methods for fractional delay approximation
Random Number Generators Based on Metastable Behavior in Double-Scroll Chaotic Attractors
A Hardware-Friendly Fast VVC Test Zone Search Algorithm Using Machine Learning
Reliability evaluation of circuits designed in multi- and single-stage versions
ALPR character segmentation algorithm
Efficient Architecture for VVC Angular Intra Prediction based on a Hardware-Friendly Heuristic
A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit with High Speed Feed Forward Correction in 65 nm CMOS
Analytical Model for Cylindrical Junctionless Nanowire FETs
Analysis of graphene field effect transistor based current mirrors
High density emerging resistive memories: What are the limits?
A low-cost microcontrolled dosimeter based on CD4007 devices for in vivo radiotherapy applications
Energy-based voice activity detection algorithm using Gaussian and Cauchy kernels
Long range dependence in intrachip transaction level traffic
Low-Cost FPGA-Based Digital-to-Time Converter
A design flow for locally-clocked XBM asynchronous state machines using synchronous CAD tools
Fully integrated boost converter for thermoelectric energy harvesting
Thermal Energy Harvesting to Power a Battery-Less Node of a Wireless Sensor Network
Very-low-voltage and ultra-low-power analog circuits for nomadic applications
TailoredCore: Generating Application-Specific RISC-V-based Cores
CMOS analog front-end IC for EEG applications with high powerline interference rejection
Gate drive losses reduction in switched-capacitor DC-DC converters
Exploiting addition schemes for the improvement of optimized radix-2 and radix-4 fft butterflies
A 4-wire interface SoC for shared multi-implant power transfer and full-duplex communication
High Stability Voltage Controlled Current Source for Cervical Cancer Detection using Electrical Impedance Spectroscopy
A Fast Approximate Function Generation Method to ATMR Architecture
An RF-EH Employing Controlled-Impedance Matching for Ultra-Low Voltage Batteryless Devices
An Automatic Comparator Offset Calibration for High-Speed Flash ADCs in FDSOI CMOS Technology
Process and temperature impact on single-event transients in 28nm FDSOI CMOS
About Performance Faults in Microprocessor Core in-field Testing
Pathology grading in retina digital images using student-adjusted empirical mode decomposition and power law statistics
A filter design for blind deconvolution to decouple unknown RDF/RTN factors from complexly coupled SRAM margin variations
A configurable analog buffer dedicated to a wafer-scale prototyping platform of electronic systems
An integrated circuit to enable electrodeposition and amperometric readout of sensing electrodes
Digital integrated circuit implementation of an identification stage for the detection of illegal hunting and logging
Approximate SATD Hardware Accelerator Using the 8 × 8 Hadamard Transform
Silicon photo-multipliers characterization system
Enhanced DC gain amplifier using no miller capacitor feedforward compensation
A 7.8W continuous and 19.6W burst output power fully integrated 2S Class-D amplifier with 0.005% THD+N
Fault detection in solar arrays based on an efficiency threshold
Mixed-mode biquad filter employing single active element
A resource efficient symbol synchronizer implementation for the IEEE 802.11 protocol
RFID in the Livestock Industry, from Traceability to a Decision Taking Tool in the Cattle-Yards
Design of an elliptic curve cryptoprocessor using optimal normal basis over GF(2 233 )
Soft Error Sensibility Window at FinFET DICE SRAM
Analysis of packet arrival model for 802.11 protocol under hidden terminals and asynchronous MPR detection
Performance evaluation of optimized transistor networks built using independent-gate FinFET
A 22nm CMOS PFM Buck Converter Used in a 32-Bit RISC-V Microcontroller for IoT Applications
Evaluation of Distortion Level in Analog Multipliers through DC Analysis Only
Reconfigurable E-band Receiver Development for Joint Communication and Sensing
NEAT: A Scalable SoC Framework for Adaptive Neural Network Acceleration in Edge Computing
An FPGA-based time-domain frequency shifter with application to LTE and LTE-A systems
Background Compensation of Frequency Interleaved DAC for Optical Transceivers
A new delay distribution model to take long-term degradation into account
Gold-copper-based biosensor for impedance analysis of mammalian adherent cells
Inductorless very small 2 nd derivative Gaussian IRUWB transmitter module using n/p-latches as PDs in CMOS technology
A comparative analysis of inclusion of PMUs in the power system state estimator
The Impact of the Circuit Non-Idealities on the System-Level Communication Metrics in Reconfigurable Intelligent Surfaces
A Low-Cost Cold Plasma Generator Circuits Designed for Laboratory Applications
A 0.7 μw Explicit Bandgap Less POR Circuit With Brownout Detection
FPGA Implementation of Stair Matrix based Massive MIMO Detection
Using FPGAs to implement asynchronous pipelines
A Very Compact CMOS Analog Multiplier for Application in CNN Synapses
Sinusoidal signal generation for mixed-signal BIST using a harmonic-cancellation technique
Fully-differential offset-cancelling circuit with configurable output common-mode voltage
HEVC Fractional Motion Estimation complexity reduction for real-time applications
Design and evaluation of CNN hardware accelerator designs for in-seat passenger anomaly detection
Variability-Aware Noise-Induced Dynamic Instability of Ultra-Low-Voltage SRAM Bitcells
Experimental Demonstration of Duffing Oscillator-Based Analog Ising Machines
Estimation of Internal Pressure in Elastic Vessel Using Machine Learning and Electrical Impedance Technique
Realization of 4D ladder structured digital filters
Program for symbolic analysis of mechatronic systems
Video Quality Enhancement Using Multi-Domain Spatio-Temporal Deformable Fusion
Low-power half-rate dual-loop clock-recovery system in 28-nm FDSOI
The Fault-tolerant Single-FPGA Systems with a Self-repair Reconfiguration Controller
High sensitivity GMI gradiometer with an active interference compensation system
Experimental analysis of microstrip antennas using techniques to improve the bandwidth
A Simplified Tool for Testing of Feature Selection and Classification Algorithms in Motor Imagery of Right and Left Hands of EEG Signals
Design of Quasi Delay Insensitive Combinational Circuits Based on Optimized DIMS
Use Case Comparison Between Profibus PA and Profinet PA Networks
Class AB amplifier with noise reduction, speed boost, gain enhancement, and ultra low power