yusuke1997/dblp-id-title huggingface dataset:
High-sensitivity, high-dynamic range 768 × 576 pixel CMOS image sensor
A wearable ECG monitoring device with flexible embedded denoising and compression
An 8-channel, 12-bit, 20 MHz fully differential tester IC for analog and mixed-signal circuits
A 200 µA duty-cycled PLL for wireless sensor nodes
A Stacked-Photovoltaic-Cell Energy Harvester with >81% Indoor Light Harvesting Efficiency for Millimeter-Scale Energy-Autonomous Sensor Nodes
A 380μW IEEE 802.15.4z IR-UWB pulse-mixing transmitter featuring enable-locking RFDCO with extensive duty-cycling in 22nm FDSOI
Challenges and opportunities for circuit design in nano-scale CMOS technologies
A Real-Time Output 50-GS/s 8-bit TI-ADC with Dedicated Calibration Techniques and Deterministic Latency
A real-time image-feature-extraction and vector-generation VLSI employing arrayed-shift-register architecture
An 80dB-SNDR 98dB-SFDR Noise-Shaping SAR ADC with Duty-Cycled Amplifier and Digital-Predicted Mismatch Error Shaping
A ΣΔ based direct all-digital frequency synthesizer with 20 Mbps frequency modulation capability and 3μs startup latency
A time borrowing selectively clocked skewed logic for high-performance circuits in scaled technologies
A configurable time-interleaved pipeline ADC for multi-standard wireless receivers
A 1.31Gb/s, 96.6% utilization stochastic nonbinary LDPC decoder for small cell applications
Circuit design in organic semiconductor technologies
A cavity channel SESO embedded memory with low standby-power techniques
Monolithic time-to-digital converter with 20ps resolution
A 13b SAR ADC with eye-opening VCO based comparator
A 19-23 GHz integrated LC-VCO in a production 70 GHz fT SiGe technology
Single-chip CMOS pulse generator for UWB systems
A 18GHz rotary traveling wave VCO in CMOS with I/Q outputs
Fast and robust level shifters in 65 nm CMOS
A 0.22mm 2 7.25mW per-channel audio stereo-DAC with 97dB-DR and 39dB SNRout
Slowing of Moore's law signals the beginning of Smart Everything
A 250mV 77dB DR 10kHz BW SC ΔΣ Modulator Exploiting Subthreshold OTAs
35th European Solid-State Circuits Conference, ESSCIRC 2009, Athens, Greece, 14-18 September 2009
A High-Throughput Low-Power Soft Bit-Flipping LDPC Decoder in 28 nm FD-SOI
A 4-Element 800MHz-BW 29mW True-Time-Delay Spatial Signal Processor Enabling Fast Beam-Training with Data Communications
0.33 mm 2 13.3 dB gain sub-6 GHz to 28 GHz transformer-coupled low-voltage upconversion mixer for 5G applications
A 0.024 mm 2 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOS
Quantizer-less proportional path fractional-N digital PLL with a low-power high-gain time amplifier and background multi-point spur calibration
A 160×160-pixel image sensor for multispectral visible, infrared and terahertz detection
A linear high voltage charge pump for MEMs applications in 0.18μm CMOS technology
A 1.6 GS/s 3.17 mW 6-b passive pipelined binary-search ADC with memory effect canceller and reference voltage calibration
0.5-V, 150-MHz, bulk-CMOS SRAM with suspended bit-line read scheme
Information, energy, and entropy: Design principles for adaptive, therapeutic modulation of neural circuits
A simple design methodology for increased ESD robustness of CMOS core cells
A 1.6%/V 124.2 pW 9.3 Hz relaxation oscillator featuring a 49.7 pW voltage and current reference generator
A 1-16b Precision Reconfigurable Digital In-Memory Computing Macro Featuring Column-MAC Architecture and Bit-Serial Computation
DynOR: A 32-bit microprocessor in 28 nm FD-SOI with cycle-by-cycle dynamic clock adjustment
Improved on-chip components for integrated DC-DC converters in 0.13 µm CMOS
A 9mW high band FM-UWB receiver front-end
A complete DVB-T/ATSC tuner analog base-band implemented with a single filtering ADC
A robust 1.5Gb/s + 3Gb/s serial PHY with feed-forward correction clock and data recovery
The scalability of 8T-SRAM cells under the influence of intrinsic parameter fluctuations
Emulated multi-path PID compensator for buck converters with large step-down ratio
A 124 to 132.5 GHz frequency quadrupler with 4.4 dBm output power in 0.13μm SiGe BiCMOS
Continuously tunable, very long time constant CMOS integrator for a neural recording implant
A system of array families and synthesized soft arrays for the POWER9™ processor in 14nm SOI FinFET technology
Two high-speed optical front-ends with integrated photodiodes in standard 0.18 μm CMOS
A 10-b 750µW 200MS/s fully dynamic single-channel SAR ADC in 40nm CMOS
A 9.8b-ENOB 5.5fJ/step fully-passive compressive sensing SAR ADC for WSN applications
4.6µm Low Power Indirect Time-of-Flight Pixel Achieving 88.5% Demodulation Contrast at 200MHz for 0.54MPix Depth Camera
Low leakage design of LUT-based FPGAs
A 40 nm LP CMOS PLL for high-speed mm-wave communication
A 1 watt audio amplifier in a standard digital 90-nm CMOS technology
A 0.06-psRMS SSC-induced jitter, ΔΣ-dithering-free, 6-GHz spread-spectrum clock generator for serial-ATA generation
A Wide-input-range 918MHz RF Energy Harvesting IC with Adaptive Load and Input Power Tracking Technique
A 65-nm CMOS temperature-compensated mobility-based frequency reference for Wireless Sensor Networks
A 0.02mm 2 embedded temperature sensor with ±2°C inaccuracy for self-refresh control in 25nm mobile DRAM
Near-Vt adaptive microprocessor and power-management-unit system based on direct error regulation
A 4-12.1-GHz Fractional-N Ring Sampling PLL Based on Adaptively-Biased PD-Merged DTC Achieving -37.6± 0.9-dBc Integrated Phase Noise, 261.9-fs RMS Jitter, and -240.6-dB FoM
Scalable circuits for supply noise measurement
A 128 × 128 SPAD Dynamic Vision-Triggered Time of Flight Imager
A block matching approach for movement estimation in a CMOS retina: principle and results
An Energy Harvester Using Image Sensor Pixels With Cold Start and Over 96% MPPT Efficiency
A 3.5MHz-BW 128nTrms Resolution TMR Readout Using Ping-Pong Auto-Zeroing and SAR-Assisted Offset Calibration for Contactless Current Sensing
A dual-mode low-pass filter for 802.11b/Bluetooth receiver
An analytical approach to the estimation of dynamic non-linearity parameters in pipeline A/D converters
Program circuit for a phase change memory array with 2 MB/s write throughput for embedded applications
FPGA parallel-pipelined AES-GCM core for 100G Ethernet applications
Three stage amplifier frequency compensation
A ΣΔ sense chain using chopped integrators for ultra-low-noise MEMS system
A 4-cycle-start-up reference-clock-less all-digital burst-mode CDR based on cycle-lock gated-oscillator with frequency tracking
A system containing an ambient light and a proximity sensor with intrinsic ambient light rejection
Innovations for Intelligent Edge
A 828μW 1.8V 80dB dynamic-range readout interface for a MEMS capacitive microphone
1.5 GHz OPAMP in 120nm digital CMOS
Inductor-less, 10Gb/s limiter with 10mV sensitivity and offset/temperature compensation in baseline CMOS18
A 40.68MHz Active Rectifier with Cycle-Based On/Off-Delay Compensation for Biomedical Implants
An implantable 3-D vestibular stimulator with neural recording
A 0.94-µVrms Input Noise Pixel-Level Continuous Time ΣΔ IADC Interface for THz Sensing
A 192×128 Time Correlated Single Photon Counting Imager in 40nm CMOS Technology
Two-path band-pass Δ∑ modulator with 40-MHz IF 72-dB DR at 1-MHz bandwidth consuming 16 mW
85 dB dynamic range 1.2 mW 156 kS/s biopotential recording IC for high-density ECoG flexible active electrode array
A 1-V 1.25-Gbps CMOS analog front-end for short reach optical links
A 10 Gb/s adaptive analog decision feedback equalizer for multimode fiber dispersion compensation in 0.13 µm CMOS
A 100x100 CMOS SPAD Array with In-Pixel Correlation Techniques for Fast Quantum Ghost Imaging Applications
Merged power amplifier and mixer circuit topology for radar applications in CMOS
A 2 MS/s 10A Hall current sensor SoC with digital compressive sensing encoder in 0.16 µm BCD
A 350nA voltage regulator for 90nm CMOS digital circuits with Reverse-Body-Bias
A 0.35μ CMOS fractional-N transmitter for 315/433/868/915 MHz ISM applications
Push-pull amplifier with constant transconductance for a current sense application
A 0.08 mm2, 7mW Time-Encoding Oversampling Converter with 10 bits and 20MHz BW in 65nm CMOS
A single-chip 8-band CMOS transceiver for W-CDMA(HSPA) / GSM(GPRS) / EDGE with digital interface
A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode
An audio FIR-DAC in a BCD process for high power class-D amplifiers
A 40 nm CMOS analog front end with enhanced audio for HSPA/EDGE multimedia applications
200 μW CMOS class AB unity-gain buffers with accurate quiescent current control
Oscillator pulling and synchronisation issues in self-oscillating class D power amplifiers
An 11 GHz-Bandwidth Variable Gain Ka-Band Power Amplifier for 5G Applications
A CMOS time-to-digital converter based on a ring oscillator for a laser radar
A 5.2Gb/p/s GDDR5 SDRAM with CML clock distribution network
A 12b 53 mW 195 MS/s pipeline ADC with 82dB SFDR using split-ADC calibration
A 256-Channel In-Pixel Electrochemical Platform in CMOS for Rapid Isothermal Genetic Amplification and Screening
A fully-integrated 0.18µm CMOS DC-DC step-up converter, using a bondwire spiral inductor
An area-efficient standard-cell floating-point unit design for a processing-in-memory system
A 5.1mW 74dB DR CT ΔΣ modulator with quantizer intrinsic ELD compensation achieving 75fJ/conv.-step in a 20MHz BW
A 0.8V 2.4GHz 1Mb/s GFSK RF transceiver with on-chip DC-DC converter in a standard 0.18µm CMOS technology
Broadband Fully Integrated GaN Power Amplifier With Embedded Minimum Inductor Bandpass Filter and AM-PM Compensation
A CMOS Current-mode DC-DC converter with input and output voltage-independent stability and frequency characteristics utilizing a quadratic slope compensation scheme
A Low-Power and Energy-Efficient D-Band CMOS Four-Channel Receiver with Integrated LO Generation for Digital Beamforming Arrays
A 4-31GHz Direct-Conversion Receiver Employing Frequency-Translated Feedback
High performance mixed signal: Business and technology
A Time-Memory-based CMOS Vision Sensor with In-Pixel Temporal Derivative Computing for Multi-Mode Image Processing
A 0.8-V 1.2-μW rail-to-rail fully differential OpAmp with adaptive biasing
A multi-channel wide range time-to-digital converter with better than 9ps RMS precision for pulsed time-of-flight laser rangefinding
A dual-mode zero-IF receiver for dual-band CDMA cellular and GPS
Ultra high-compliance CMOS current mirrors for low voltage charge pumps and references
A 1310/1550 nm Fully-Integrated Optical Receiver with Schottky Photodiode and Low-Noise Transimpedance Amplifier in 40 nm Bulk CMOS
Physical Implementation of a Tunable Memristor-based Chua's Circuit
Ultra low power detection circuits in 130nm CMOS for a wireless UWB localization system
A scaleable instruction buffer for a configurable DSP core
Technical and economical trends in wireless applications
In-situ performance monitor employing threshold based notifications (TheBaN)
Integrated Metal Shunt with Matched Sensing Resistor for High-Side Current Sensing
28nm FD-SOI technology and design platform for sub-10pJ/cycle and SER-immune 32bits processors
A 0.5 V, 650 pW, 0.031%/V Line Regulation Subthreshold Voltage Reference
A CMOS baseband complex bandpass filter with a new Automatic tuning method for PHS applications
A 32x32-pixel array with in-pixel photon counting and arrival time measurement in the analog domain
A 120dB 300mW stereo audio A/D converter with 110dB THD+N
A single-inductor multiple-output boost converter with freewheel charge-pump control
A photovoltaic system with an analog maximum power point tracking technique for 97.3% high effectiveness
A 2×2 MIMO tri-band dual-mode CMOS transceiver for worldwide WiMAX/WLAN applications
A 2 A Maximum Load Current Capable 0-to-1 μF Off-chip Capacitor N-type LDO using Dual Dynamic Negative Feedback Loop and an Improved Error Amplifier
Ultra Low Power short range radios: Covering the last mile of the IoT
A Bang-Bang Digital PLL Covering 11.1-14.3 GHz and 14.7-18.7 GHz with sub-40 fs RMS Jitter in 7 nm FinFET Technology
CMOS microelectrode array for bidirectional interaction with neuronal networks
A 64×64 SPAD-based 3D Image Sensor with Adaptive Pixel Sensitivity and Asynchronous Readout
Designing analog and RF circuits for ultra-low supply voltages
A continuous-time ripple reduction technique for spinning-current Hall sensors
A 0.4V 12b Comparator Offset Injection Assisted SAR ADC achieving 0.425 fJ/conv-step
A novel quality factor tuning scheme for active-RC filters
A 150 kHz-80 MHz BW DT analog baseband for SDR RX using a 5 th -order IIR LPF, active FIR and 10b 300 MS/s ADC in 28nm CMOS
A 11.1-bit ENOB 50-MS/s pipelined A/D converter in 130-nm CMOS without S/H front end
Nanoelectromechanical systems: A new opportunity for microelectronics
A 70MHz Bandwidth Time-Interleaved Noise-Shaping SAR Assisted Delta Sigma ADC with Digital Cross-Coupling in 28nm CMOS
A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With - 15.2-dBm OMA Sensitivity
A 28nm 8-bit Floating-Point Tensor Core based CNN Training Processor with Dynamic Activation/Weight Sparsification
A 0.12mm2 7.4μW micropower temperature sensor with an inaccuracy of ±0.2°C (3σ) from -30°C to 125°C
A 3.2-pW, 0.2-V Trimming-Less Voltage Reference with 1.4-mV Across-Wafer Total Accuracy
A highly integrated, dual-band, multi-mode wireless LAN transceiver
A 433 MHz 54 µW OOK/FSK/PSK compatible wake-up receiver with 11 µW low-power mode based on injection-locked oscillator
A 24-to-30 GHz Series-Doherty Power Amplifier With Novel Broadband Combiner Achieving 2.5% Back-off PAE Variation in 65-nm CMOS
A 1000FPS@128×128 vision processor with 8-bit digitized I/O
Ultra low power RC oscillator for system wake-up using highly precise auto-calibration technique
A 180nm fully-integrated dual-channel reconfigurable receiver for GNSS interoperations
120nm CMOS OPAMP with 690 MHz f T and 128 dB DC gain
Highly sensitive UV-enhanced linear CMOS photosensor
RFIC design by mathematics for next generation wireless access
Clock and synchronization networks for a 3GHz 64bit ARMv8 8-core SoC
Embedded SRAM design in deep deep submicron technologies
Printed complementary organic thin film transistors based decoder for ferroelectric memory
A 915 MHz, 499 μW, -99 dBm, and 100 kbps BFSK Direct Conversion Receiver
A temperature compensation word-line voltage generator for multi-level cell NAND Flash memories
CMOS image sensors: State-of-the-art and future perspectives
A 1 V, 26 μW extended temperature range band-gap reference in 130-nm CMOS technology
A 57-74-GHz Tail-Switching Injection-Locked Frequency Tripler in 28-nm CMOS
True Voltage-Mode NRZ VCSEL Transmitter enabling 60 Gbit/s at 0.37 pJ/bit in 22 nm FDSOI
Fast AFC technique using a code estimation and binary search algorithm for wideband frequency synthesis
ESSCIRC 2008 - 34th European Solid-State Circuits Conference, Edinburgh, Scotland, UK, 15-19 September 2008
34.4Mbps 1.56Tbps/W DEFLATE Decompression Accelerator Featuring Block-Adaptive Huffman Decoder in 14nm Tri-Gate CMOS for IoT Platforms
A Dual Loop 8-Channel ECG Recording System with Fast Settling Mode
A 28GHz Area-Efficient CMOS Vector-Summing Phase Shifter Utilizing Phase-Inverting Type-I Poly-Phase Filter for 5G New Radio
A 120GHz in-band full-duplex PMF transceiver with tunable electrical-balance duplexer in 40nm CMOS
A 16mm 2 106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFET
Parallel double error correcting code design to mitigate multi-bit upsets in SRAMs
An ultra low power and high efficiency UWB transmitter for WPAN applications
60% Cycle time acceleration, 55% energy reduction, 32Kbit SRAM by auto-selective boost (ASB) scheme for slow memory cells in random variations
An injection-locking based programmable fractional frequency divider with 0.2 division step for quantization noise reduction
A 0.1-4GHz resistive feedback LNA with feedforward noise and distortion cancelation
A temperature-to-digital converter based on an optimized electrothermal filter
A 20 Gb/s 82mW one-stage 4:1 multiplexer in 0.13 μm CMOS
A 73μW 400Mbps stress tolerant 1.8V-3.6V driver in 40nm CMOS
Isodelay output driver design using step-wise charging for low power
Unsymmetrical parallel switched-capacitor (UP-SC) regulator with fast searching optimum ratio technique
A 1.75-15 GHz stepped frequency receiver for breast cancer imaging in 65 nm CMOS
A 90μW 15-bit ΔΣ ADC for digital audio
An energy-efficient 17-bit noise-shaping Dual-Slope Capacitance-to-Digital Converter for MEMS sensors
A 106.7-dB DR, 390-μW CT 3 rd -order ΣΔ modulator for MEMS microphones
An area-efficient high-speed Reed-Solomon decoder in 0.25 μm CMOS
A 0.039mm 2 inverter-based 1.82mW 68.6dB-SNDR 10MHz-BW CT-ΣΔ-ADC in 65nm CMOS
A low jitter 2.7mW/Gbps 180Gb/s 12-lane transmitter in a 40nm CMOS technology
A high-input-swing common-mode-robust programmable gain amplifier in 65nm CMOS
Merged two-stage power converter with soft charging switched-capacitor stage in 180 nm CMOS
A fully digital delay-line based GHz-range multimode transmitter front-end in 65-nm CMOS
A 55-63 GHz fundamental Quad-Core VCO with NMOS-only stacked oscillator in 28 nm CMOS
A 0.5-V 1.13-μW/channel neural recording interface with digital multiplexing scheme
A fully-integrated 130nm CMOS DC-DC step-down converter, regulated by a constant on/off-time control system
A 5.5 nW battery-powered wireless ion sensing system
A 66 dB SNDR pipelined split-ADC using class-AB residue amplifier with analog gain correction
Fast Chirping 58-64 GHz FMCW Radar Transceiver using D-PROT Multiplier in CMOS 45nm RFSOI for Vital Signs Detection
A linear 28nm CMOS digital transmitter with 2×12bit up to LO baseband sampling and -58dBc C-IM3
Dual-VT 4kb sub-VT memories with <1 pW/bit leakage in 65 nm CMOS
A 1.02nW PMOS-only, trim-free current reference with 282ppm/°C from -40°C to 120°C and 1.6% within-wafer inaccuracy
A 5.2-GHz silicon bipolar power amplifier for IEEE 802.11a and HIPERLAN2 wireless LANs
Low-power analog/RF circuit design based on the inversion coefficient
A novel universal battery charger for NiCd, NiMH, Li-ion and Li-polymer
A 160×120-pixels range camera with on-pixel correlated double sampling and nonuniformity correction in 29.1µm pitch
A ring-VCO-based sub-sampling PLL CMOS circuit with -119 dBc/Hz phase noise and 0.73 ps jitter
A 10Gbps/port 8×8 shared bus switch with embedded DRAM hierarchical output buffer
A 32.55-kHz, 472-nW, 120ppm/°C, fully on-chip, variation tolerant CMOS relaxation oscillator for a real-time clock application
A 1.5V 13bit 130-300MS/s self-calibrated DAC with active output stage and 50MHz signal bandwidth in 0.13μm CMOS
Quadrature oscillator with pre-distorted waveforms for application in MEMS-based mechanical spectrum analyser
A 28 nm 2 GS/s 5-b single-channel SAR ADC with gm-boosted StrongARM comparator
All Wireless, 16-Channel Epilepsy Control System with Sub-µW/Channel and Closed-Loop Stimulation Using a Switched-Capacitor-Based Active Charge Balancing Method
High-swing class-C VCO
Solid state RF MEMS resonators in standard CMOS
Power-efficient super class AB OTAs
A fully integrated CMOS burst-mode upstream transmitter for gigabit-class passive optical network applications
Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation
A 1V 10-mW monolithic Bluetooth receiver in a 0.35μm CMOS process
43rd IEEE European Solid State Circuits Conference, ESSCIRC 2017, Leuven, Belgium, September 11-14, 2017
A 2.97 Gb/s DPA-resistant AES engine with self-generated random sequence
A micro power continuous-time ΣΔ modulator
A robust start-up Class-C CMOS VCO based on a common mode low frequency feedback loop
Power sequence free 400Mbps 90µW 6000µm 2 1.8V-3.3V stress tolerant I/O buffer in 28nm CMOS
A 7GS/s direct digital frequency synthesizer with a two-times interleaved RDAC in 65nm CMOS
25V sampling switch for power management data converters in 0.35µm CMOS with DNMOS
A 16-20 GHz LO system with 115 fs jitter for 24-30 GHz 5G in 28 nm FD-SOI CMOS
An 11.75-Gb/s combined decision feedback equalizer and clock data recovery circuit in 0.18-μm CMOS
Pixel array with 5×5 spatial highpass filter for a retinal implant
A 12.5-ppm/°C 1.086-nW/kHz Relaxation Oscillator with Clock-Gated Discrete-Time Comparator in 22nm CMOS Technology
Power management for portable devices
A dual port dual width 90nm SRAM with guaranteed data retention at minimal standby supply voltage
A 265VRMS mains interface integrated in 0.35μm CMOS
A Reconfigurable Digital Beamforming V-Band Phased-Array Receiver
An Auto-Zero Stabilized Voltage Buffer with a Trimmed Input Current of 0.2pA
A 2.74pJ/conversion 0.0018mm 2 Temperature Sensor with On-chip Gain and Offset Correction
A wide range temperature stable integrated current reference
Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training
FOCUS: Key building blocks and integration strategy of a miniaturized wireless sensor node
An Automotive-Use Dual-fsw-Zone Hybrid Switching Power Converter with Vo-Jitter-Immune Spread-Spectrum Modulation
10 Gb/s CMOS limiting amplifier for optical links
Integrated hall-based magnetic platform for position sensing
A fully integrated CMOS power amplifier for LTE-applications using clover shaped DAT
An Integrated Readout for Current Sensing based on a Σ∆ Modulator with Switched Capacitor Feedback
CMOS x-ray image sensor with pixel level A/D conversion
Low-cost feedback-enabled LNAs in 45nm CMOS
The future of high frequency circuit design
Input/output rail-to-rail video op-amp with constant behaviour over the entire voltage range
A 0.54 THz signal generator in 40 nm bulk CMOS with 22 GHz tuning range
A 64-channel, 1.1-pA-accurate On-chip Potentiostat for Parallel Electrochemical Monitoring
Multiple-bit parallel-CDMA technique for an on-chip interface featuring high data transmission rate, small latency and high noise tolerance
A 52 µW Heart-Rate Measurement Interface Fabricated on a Flexible Foil with A-IGZO TFTs
3GHz, 74mW 2-level Karatsuba 64b Galois field multiplier for public-key encryption acceleration in 45nm CMOS
A 92.2% peak-efficiency self-resonant hybrid switched-capacitor LED driver in 0.18μm CMOS
A 28GHz Sliding-IF Receiver in 22nm FDSOI
A low-phase-noise injection-locked differential ring-VCO with half-integral subharmonic locking in 0.18 µm CMOS
A Review on the State-of-the-Art THz FMCW Radars Implemented on Silicon: Invited
A fully integrated 60 GHz transmitter front-end with a PLL, an image-rejection filter and a PA in SiGe
An array of fully-integrated quadrature TX/RX NMR field probes for MRI trajectory mapping
Graphene for microelectronics: Can it make a difference?
A complementary Colpitts oscillator based on 0.35 μm CMOS technology
Subthreshold current-mode oscillator-based quantizer with 3-decade scalable sampling rate and pico-Ampere range resolution
A self-adaptive switched-capacitor voltage converter with dynamic input load control for energy harvesting
BSIM - Industry standard compact MOSFET models
SIF-NPU: A 28nm 3.48 TOPS/W 0.25 TOPS/mm 2 CNN Accelerator with Spatially Independent Fusion for Real-Time UHD Super-Resolution
A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays
An incremental ADC sensor interface with input switch-Less integrator featuring 220-nVrms resolution with ±30-mV input range
An interface for eddy current displacement sensors with 15-bit resolution and 20 MHz excitation
A 14-V high speed driver in 5-V-only 0.35-μm standard CMOS
Flexible and Self-Adaptive Sense-and-Compress for Sub-MicroWatt Always-on Sensory Recording
Quantum-Correlated Photon-Pair Source with Integrated Feedback Control in 45 nm CMOS
A 0.17-1.4GHz low-jitter all digital DLL with TDC-based DCC using pulse width detection scheme
A 15nW Per Button Noise-Immune Readout IC for Capacitive Touch Sensor
microASR: 32-μW Real-Time Automatic Speech Recognition Chip featuring a Bio-Inspired Neuron Model and Digital SRAM-based Compute-In-Memory Hardware
TaNS-DDRF: A 160-MHz Bandwidth 6-GHz Carrier Frequency Digital-Direct RF Transmitter for Wi-Fi 6E with Targeted Noise-Shaping
A 1.4-psec Jitter 2.5-Gb/s CDR with wide acquisition range in 0.18-μm CMOS