yusuke1997/dblp-id-title huggingface dataset:
A 2Mbit Digital in-Memory Computing Matrix-Vector Multiplier for DNN Inference supporting flexible bit precision and matrix size achieving 612 binary TOPS/W
A 0.49-9.8 Gb/s 0.1-1V Output Swing Transmitter with 38.4MHz Reference and <30 ns Turn-On Time
AAD-KWS: a sub-µW keyword spotting chip with a zero-cost, acoustic activity detector from a 170nW MFCC feature extractor in 28nm CMOS
A 0.18μm CMOS switched capacitor voltage modulator
Cryogenic Comparator Characterization and Modeling for a Cryo-CMOS 7b 1-GSa/s SAR ADC
Physical random number generators for cryptographic application in mobile devices
A 0.78-µW 96-Ch. Deep Sub-Vt Neural Spike Processor Integrated with a Nanowatt Power Management Unit
A 0.6-1V input capacitor-less asynchronous digital LDO with fast transient response achieving 9.5b over 500mA loading range in 65-nm CMOS
A Low-Power VGA Vision Sensor with Event Detection through Motion Computation based on Pixel-Wise Double-Threshold Background Subtraction and Local Binary Pattern Coding
A tunable transconductor for analog amplification and filtering based on double-gate organic TFTs
A 0.8-3 GHz mixer-first receiver with on-chip transformer balun in 65-nm CMOS
A complementary dynamic residue amplifier for a 67 dB SNDR 1.36 mW 170 MS/s pipelined SAR ADC
A 60GHz 4Gb/s fully integrated NRZ-to-QPSK modulator SoC for backhaul links in fiber-wireless networks
WCDMA multicarrier receiver for base-station applications
A 272-GHz CMOS Analog BPSK/QPSK Demodulator for IEEE 802.15.3d
The impact of semiconductor packaging technologies on system integration an overview
A high gain-bandwidth product transimpedance amplifier for MEMS-based oscillators
FEOL/BEOL wear-out estimator using stress-to-frequency conversion of voltage/temperature-sensitive ring oscillators for 28nm automotive MCUs
A 1.5nJ/pixel super-resolution enhanced FAST corner detection processor for high accuracy AR
Subthreshold SCL for ultra-low-power SRAM and low-activity-rate digital systems
A wide tuning range 4 th -order Gm-C elliptic filter for wideband multi-standards GNSS receivers
A 2.4-GHz 24-dBm SOI CMOS power amplifier with on-chip tunable matching network for enhanced efficiency in back-off
A low-frequency, sub 1.5-V micropower G m -C filter based on subthreshold MIFG MOS transistors
A 1.11 mm 2 Guidewire IVUS SoC with ±50°-Range Plane Wave Transmit Beamforming
CAFFEINE: template-free symbolic model generation of analog circuits via canonical form functions and genetic programming
A 1.6μW tunable organic transimpedance amplifier for photodetector applications based on gain-boosted common-gate input stage and voltage-controlled resistor with ±0.5% nonlinearity
A 58.1-to-65.0GHz frequency synthesizer with background calibration for millimeter-wave TDD transceivers
A 174.3dB FoM VCO-based CT ΔΣ modulator with a fully digital phase extended quantizer and tri-level resistor DAC in 130nm CMOS
A sub-3dB NF voltage-sampling front-end with +18dBm IIP3 and +2dBm blocker compression point
An Extended Temperature Range ePCM Memory in 90-nm BCD for Smart Power Applications
A Near-Threshold Ring-Oscillator-Based ILCM with Edge-Selective Error Detector Achieving -64 dBc Reference-Spur and -239 dB FoM
A Class-D amplifier powered by embedded single-inductor bipolar-output power module with low common noise and dynamic voltage boosting technique
CMOS transistor mismatch model valid from weak to strong inversion
A 10MHz ripple-based on-time controlled buck converter with dual ripple compensation and real-time efficiency optimization
122 GHz low-noise-amplifier in sige technology
A multi-channel low-power IC for neural spike recording with data compression and narrowband 400-MHz MC-FSK wireless transmission
A low-power 5 GHz CMOS LC-VCO optimized for high-resistivity SOI substrates
A digitally tuned 1.1 GHz subharmonic injection-locked VCO in 0.18μm CMOS
A 5.8GHz LC-based digitally controlled oscillator with 20kHz frequency resolution and 37 % tuning range
A time-domain SAR smart temperature sensor with -0.25∼+0.35°C inaccuracy for on-chip monitoring
A 0.45pJ/conv-step 1.2Gs/s 6b full-Nyquist non-calibrated flash ADC in 45nm CMOS and its scaling behavior
A 77/79-GHz Frequency Generator in 16-nm CMOS for FMCW Radar Applications Based on a 26-GHz Oscillator with Co-Generated Third Harmonic
Why design reliable chips when faulty ones are even better
A 0.8 mm 2 9.6 mW implementation of a multicarrier Faster-than-Nyquist signaling iterative decoder in 65nm CMOS
A 0.7-2 GHz auxiliary receiver with enhanced compression for SAW-less FDD
A 2-GHz 7-mW digital DLL-based frequency multiplier in 90-nm CMOS
A 12b, 1 GSps TI pipelined-SAR converter with 65 dB SFDR through buffer linearization and gain mismatch correction in 28nm FD-SOI
Analog/RF circuit design techniques for nanometerscale IC technologies
A Mixed-Signal Control Core for a Fully Integrated Semiconductor Quantum Computer System-on-Chip
Dual-band RF receiver for GPS and compass systems in 55-nm CMOS
All-digital process-variation-calibrated timing generator for ATE with 1.95-ps resolution and a maximum 1.2-GHz test rate
A very area/power efficient mixed signal circuit for voice signal processing in 0.18 digital technology
A 36.4dB SNDR @ 5GHz 1.25GS/s 7b 3.56mW single-channel SAR ADC in 28nm bulk CMOS
Variation-resilient sub-threshold circuit solutions for ultra-low-power Digital Signal Processors with 10MHz clock frequency
A Low-Power, Compact 76-81GHz FMCW Transmitter for Automotive Radar in 22nm FDSOI
A Capacitor Dielectric Relaxation Effect Cancellation Circuit in a 12-Bit, 1-MSps, 5.0-V SAR ADC on a 28-nm Embedded Flash Memory Microcontroller
A 1.2 V 300 μW second-order switched-capacitor Δ∑ modulator using ultra incomplete settling with 73 dB SNDR and 300 kHz BW in 130 nm CMOS
A 15-bit 28nm CMOS fully-integrated 1.6W digital power amplifier for LTE IoT
Variable off time current-mode floating buck controller - A different approach
Single-BAW multi-channel transmitter with low power and fast start-up time
A highly linear fully differential low power CMOS line driver
Design and built-in characterization of digital-to-time converters for ultra-low power ADPLLs
A voltage-controlled oscillator for IEEE 802.11a and HiperLAN2 application
A 37-to-41.8 GHz Double-Gm-Boosting LNA with 2.9-dB NFmin Using Quadruple-Coupling Transformer for Phased-Array Transceivers
Accuracy/energy-flexible stochastic configurable 2D Gabor filter with instant-on capability
A low EMI SIDO wireless power transfer system with 10μsec response time
A built-in I DDQ testing circuit
An 11.1Gbps analog PRML receiver for EDC of up to 400km-reach WDM fiber-optic links
A 79GHz variable gain low-noise amplifier and power amplifier in 28nm CMOS operating up to 125°C
Direct digital frequency synthesis with dual-slope approach
An improved low-power CMOS thyristor-based micro-to-millisecond delay element
An integrated ultracapacitor fast mains charger with combined power/current optimisation
Standby power reduction techniques for ultra-low power processors
Bio-inspired devices, circuits and systems
A 6.7-ENOB, 500-MS/s, 5.1-mW dynamic pipeline ADC in 65-nm SOI CMOS
A 10 GHz Quadruple-Tail Comparator with Double Feedforward Paths and Minimal Delay Slope in 28 nm CMOS
A constant off-time controlled boost converter with adaptive current sensing technique
A 1.8V 100mW 12-bits 80Msample/s two-step ADC in 0.18-μm CMOS
A 0.36 pJ/bit, 12.5 Gb/s forwarded-clock receiver with a sample swapping scheme and a half-bit delay line
On-chip versus off-chip passives in multi-band radio design
A 10Gb/s fully differential CMOS transimpedance preamplifier
Multimode-multiband transceivers for next generation of wireless communications
A Nonuniform Sampling Lifetime Estimation Technique for Luminescent Oxygen Measurements
A 9-b 400 Msample/s pipelined analog-to digital converter in 90nm CMOS
Modelling impact of digital substrate noise on embedded regenerative comparators
A 1.7-mW dual-band CMOS frequency synthesizer for low data-rate sub-GHz applications
A 19-GHz Pulsed-Coherent ToF Receiver With 40-μm Precision for Laser Ranging Systems
Impact of well edge proximity effect on timing
A 0.6-to-200MSPS speed reconfigurable and 1.9-to-27mW power scalable 10bit ADC
A fast self-reacting capacitor-less low-dropout regulator
A 75mW 10bit 120MSample/s parallel pipeline ADC
Reminiscing through 40 years of CMOS analog circuit design: from audio to GHz
A 0.75-3.6GHz SiGe direct-conversion quadrature-modulator
A 7.5mA 500 MHz UWB receiver based on super-regenerative principle
A power-efficient 4-PAM signaling scheme with convolutional encoder in space for chip-to-chip communication
A 19GHz, 250pJ/bit non-linear BPSK demodulator in 90nm CMOS
10ns Start-up techniques for a duty cycled Impulse Radio receiver
I/Q mismatch compensation ΔΣ modulator using ternary capacitor rotation technique
A 3.0 Gb/s clock data recovery circuits based on digital DLL for clock-embedded display interface
A low power 16-channel fully integrated GMR-based current sensor
A low voltage 0.8V RF receiver in 28nm CMOS for 5GHz WLAN
A 239-298 GHz Power Amplifier in an Advanced 130 nm SiGe BiCMOS Technology for Communications Applications
A 36V precision programmable gain amplifier with CMRR exceeding 120dB in all gains
BFSK MICS direct-DCO transmitter with adaptive background frequency regulation
A Self-Calibrated Fractional-N PLL for WiFi 6 / 802.11ax in 28nm FDSOI CMOS
Single-photon synchronous detection
An adaptive 4-tap analog FIR equalizer for 10-Gb/s over backplane serial link receiver
A 15bit 140μW scalable-bandwidth inverter-based audio ΔΣ modulator with >78dB PSRR
A 1 nJ/b 3.2-to-4.7 GHz UWB 50 Mpulses/s double quadrature receiver for communication and localization
Model to Hardware matching for nano-meter scale technologies
A 500 × 500 Pixel Image Sensor with Arbitrary Number of RoIs per Frame and Image Filtering for Center of Mass Estimation
A D-band Foam-Cladded Dielectric Waveguide Communication Link with Automatic Tuning
A 4.75-34.75 MHz digitally tunable active-RC LPF for >60dB mean RX IRR in 65nm CMOS
A very compact CMOS instrumentation amplifier with nearly rail-to-rail input common mode range
A Compact K-band, Asymmetric Coupler-based, Switchless Transmit-Receive Front-End in 0.15μm GaN-on-SiC Technology
Visual image processing RAM for fast 2-D data location search
A Delay-Based LO Phase-Shifting Generator for a 2-5GHz Beamsteering Receiver in 28nm CMOS
A low power low phase noise fractional-N synthesizer with linearization and mismatch noise shaping techniques for sub-GHz multi-band transceiver with narrow channel spacing
A 5 Million Frames Per Second 3D Stacked Image Sensor With In-Pixel Digital Storage
An analog image processing LSI employing scanning line-parallel processing
Realization of a simple high-value grounded linear resistance in CMOS technology
A 1mW 40-190MHz BJT logarithmic biquad
A 433-MHz Wireless Burst-Chirp Modulation Transmitter with Adaptive Duty-Cycle Control and Precharge Mechanism
Complementary constant-gm biasing of Nauta-transconductors in low-power gm-C filters to +/-2% accuracy over temperature
A 2.9Tb/s 8W 64-core circuit-switched network-on-chip in 45nm CMOS
A 130μW Three-Step DT Incremental Δ ∑ ADC Achieving 107.6dB DR and 99.3dB SNDR with Zoom and Extended-Range Counting
The future outlook of memory devices
Wideband inductorless minimal area RF front-end
A 1V fully integrated CMOS transformer based mixer with 5.5dB gain, 14.5dB SSB noise figure and 0dBm input IP3
Low-Power QPSK Transmitter Based on an Injection-Locked Power Amplifier
Reliability assessment of voltage controlled oscillators in 32nm high-κ metal gate technology
A Single-Temperature-Calibration 0.18-µm CMOS Time-Based Resistive Sensor Interface with Low Drift over a -40°C to 175°C Temperature Range
Phase noise degradation of LC-tank VCOs due to substrate noise and package coupling
An on-die all-digital power supply noise analyzer with enhanced spectrum measurements
A fully integrated power supply unit for fine grain power management application to embedded Low Voltage SRAMs
Single inductor quad output switching converter with priority-scheduled program for fast transient and unlimited-load range in 40nm CMOS technology
A 128-channel, 9ps column-parallel two-stage TDC based on time difference amplification for time-resolved imaging
A 240MHz programmable gain amplifier & filter for ultra low power low-rate UWB receivers
Low-power word-parallel nearest-Hamming-distance search circuit based on frequency mapping
A 117mW 77GHz receiver in 65nm CMOS with ladder structured tunable VCO
45nm/32nm CMOS ˜ Challenge and Perspective ˜
A 131.5GHz, -84dBm sensitivity super-regenerative receiver by zero-phase-shifter coupled oscillator network in 65nm CMOS
A Pre-Charge Tracking Technique in the 40MHz High-switching 48-to-5V DC-DC Buck Converter with GaN Switches for Reducing Large Self-commutation Loss and Achieving a High Efficiency of 95.4%
An integrated laser radar receiver with resonance-based timing discrimination
Interference-induced DCO spur mitigation for digital phase locked loop in 65-nm CMOS
A 0.0084-mV-FOM, Fast-Transient and Low-Power External-Clock-Less Digital LDO Using a Gear-Shifting Comparator for the Wide-Range Adaptive Sampling Frequency
A low leakage 500MHz 2T embedded dynamic memory with integrated semi-transparent refresh
EMBER: A 100 MHz, 0.86 mm 2 , Multiple-Bits-per-Cell RRAM Macro in 40 nm CMOS with Compact Peripherals and 1.0 pJ/bit Read Circuitry
Mr. Wolf: A 1 GFLOP/s Energy-Proportional Parallel Ultra Low Power SoC for IOT Edge Processing
A 100 μW, 1.9GHz oscillator with fully digital frequency tuning
A fail-safe ASIC for implantable neural stimulation
A reconfigurable VLSI learning array
Switching-based charger with continuously built-in resistor detector (CBIRD) and analog multiplication-division unit (AMDU) for fast charging in Li-Ion battery
A 10BIT 30MSPS CMOS A/D converter for high performance video applications
ESSCIRC Conference 2015 - 41 st European Solid-State Circuits Conference, Graz, Austria, September 14-18, 2015
A stimulator ASIC with capability of neural recording during inter-phase delay
"Silicon forever! Really?"
Delay partitioning helps reducing variability in 3DVLSI
Emerging analog-to-digital converters
A low-power and small-area all-digital delay-locked loop with closed-loop duty-cycle correction
A 90nm CMOS mm-wave VCO using an LC tank with inductive division
A DC-connectable multi-channel biomedical data acquisition ASIC with mains frequency cancellation
10Gb/s 0.13µm CMOS laser drivers with extinction ratio control using thermistors
JNPU: A 1.04TFLOPS Joint-DNN Training Processor with Speculative Cyclic Quantization and Triple Heterogeneity on Microarchitecture / Precision / Dataflow
An impedance-tracking battery-less arbitrary-waveform neurostimulator with load-adaptive 20V voltage compliance
A single bit 6.8mW 10MHz power-optimized continuous-time ΔΣ with 67dB DR in 90nm CMOS
A 53-62 GHz Two-channel Differential 6-bit Active Phase Shifter in 55-nm SiGe Technology
An RF front-end for multi-channel direct RF sampling cable receivers
A -109.1 dB/-98 dB THD/THD+N Chopper Class-D Amplifier with >83.7 dB PSRR Over the Entire Audio Band
Low-power 32-bit dual-MAC 120 μW/MHz 1.0 V icyflex DSP/MCU core
A missing-code-detection gain error calibration achieving 63dB SNR for an 11-bit ADC
A single-inductor dual-output (SIDO) based power management with adaptive bus voltage modulation and zero cross-regulation in 40nm CMOS
A fully integrated 28nm Bluetooth Low-Energy transmitter with 36% system efficiency at 3dBm
A pixel-shared CMOS image sensor using lateral overflow gate
A low-power 2-GSample/s comparator in 120 nm CMOS technology
A 0.35μm 50V CMOS sliding-mode control IC for buck converters
A ΔΣ TDC with sub-ps resolution for PLL built-in phase noise measurement
A 14 - bit micro-watt power scalable automotive MEMS pressure sensor interface
A switchable low-area 2.4-and-5 GHz dual-band LNA in digital CMOS
Low-noise ESD-protected 24 GHz receiver for radar applications in SiGe: C technology
ESSCIRC 2003 - 29th European Solid-State Circuits Conference, Estoril, Portugal, September 16-18, 2003
An 8-bit 450-MS/s single-bit/cycle SAR ADC in 65-nm CMOS
Boost DC-DC converter with charge-recycling (CR) and fast reference tracking (FRT) techniques for high-efficiency and low-cost LED driver
A Signal and Offset T&H Frontend for Spinning Hall Sensors with Ping-Pong and Chopping Techniques
Emerging non-volatile memory technologies
Toward 6G: From New Hardware Design to Wireless Semantic and Goal-Oriented Communication Paradigms
A 24-30 GHz Broadband Doherty PA with a maximum 15.37 dBm P avg and 14.6% PAE avg in 0.13 μm SiGe for 400 MHz BW 5G NR
A low-noise reconfigurable full-duplex front-end with self-interference cancellation and harmonic-rejection power amplifier for low power radio applications
18Gbps, 50mW reconfigurable multi-mode SHA Hashing accelerator in 45nm CMOS
A 128×128b high-speed wide-and match-line content addressable memory in 32nm CMOS
ESD-protected CMOS 3-5 GHz wideband LNA+PGA design for UWB
Low voltage sensing techniques and secondary design issues for sub-90nm caches
60 GHz transceiver circuits in SiGe:C BiCMOS technology
A 8 Gbps blind oversampling CDR with frequency offset compensation over infinite burst
A CMOS receiver for a pulsed time-of-flight laser rangefinder
A 300Hz 19b DR capacitive accelerometer based on a versatile front end in a 5th-order ΔΣ loop
An S-band frontend receiver for mobile TV in 65nm CMOS
A configurable High-Side/ low-Side Driver
A compact 0.135-mW/channel LNA array for piezoelectric ultrasound transducers
A 0.01mm 2 , 0.4V-VDD, 4.5nW-Power DC-Coupled Digital Acquisition Front-End Based on Time-Multiplexed Digital Differential Amplification
A 915MHz ultra-low power wake-up receiver with scalable performance and power consumption
An 8-bit 2.8 GS/s Flash ADC with Time-based Offset Calibration and Interpolation in 65 nm CMOS
Oxide Soft Breakdown : From device modeling to small circuit simulation
A colpitts LC VCO with Miller-capacitance gm enhancing and phase noise reduction techniques
A fully-integrated Wienbridge topology for ultra-low-power 86ppm/°C 65nm CMOS 6MHz clock reference with amplitude regulation
Experimental demonstration of a nanoelectromechanical switch-based logic library including sequential and combinational gates
A 1-V 99-to-75dB SNDR, 256Hz-16kHz bandwidth, 8.6-to-39µW reconfigurable SC ΔΣ Modulator for autonomous biomedical applications
Wide-input-voltage-range and high-efficiency energy harvester with a 155-mV startup voltage for solar power
An ultra-low power 400MHz OOK transceiver for medical implanted applications
A quad-band low power single chip direct conversion CMOS transceiver with ΣΔ-modulation loop for GSM
Dual-level LVDS technique for reducing the data transmission lines by half of LCD driver IC
A 0.18-µm CMOS, -92-dB THD, 105-dBA DR, third-order audio class-D amplifier
CMOS output drivers with reduced ground bounce and electromagnetic emission
A 10.4-ENOB 0.92-5.38 μW Event-Driven Level-Crossing ADC with Adaptive Clocking for Time-Sparse Edge Applications
A 12Gb/s, 8.6µApp input sensitivity, monolithic-integrated fully differential optical receiver in CMOS 45nm SOI process
A 19.5 GHz 28 nm CMOS Class-C VCO with Reduced 1/f Noise Upconversion
A 40-67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS LP
A 0.3μW, 7 ppm/°C CMOS Voltage reference circuit for on-chip process monitoring in analog circuits
A 2.4dB NF +4.1dBm IIP3 Differential Dual-Feedforward-Based Noise-Cancelling LNTA With Complementary NMOS and PMOS Configuration
Phase and frequency self-configurable efficient low voltage harvester for zero power wearable devices
An All-Digital, VMAX-Compliant, and Stable Distributed Charge Injection Scheme for Fast Mitigation of Voltage Droop
A 55nm Ultra Low Leakage Deeply Depleted Channel technology optimized for energy minimization in subthreshold SRAM and logic
80 GHz low noise amplifiers in 65nm CMOS SOI
An 890 mW stacked power amplifier using SiGe HBTs for X-band multifunctional chips
A low-complexity, low phase noise, low-voltage phase-aligned ring oscillator in 90 nm digital CMOS
Fundamentals and current status of steep-slope tunnel field-effect transistors
A scaled thermal-diffusivity-based frequency reference in 0.16μm CMOS
An Optimized Low-Power Band-Tuning TX for Short-Range FMCW Radar in 22-nm FDSOI CMOS
A 29 Gops/Watt 3D-Ready 16-Core Computing Fabric with Scalable Cache Coherent Architecture Using Distributed L2 and Adaptive L3 Caches
In-memory Realization of In-situ Few-shot Continual Learning with a Dynamically Evolving Explicit Memory
A 31 GHz CML ring VCO with 5.4 ps delay in a 0.12-μm SOI CMOS technology
High-Voltage CMOS RF Switch with Active Biasing
A temperature sensor with a 3 sigma inaccuracy of ±2°C without trimming from -50°C to 150°C in a 16nm FinFET process
A CMOS IQ direct digital RF modulator with embedded RF FIR-based quantization noise filter
A 1.0 mW, 71 dB SNDR, -1.8 dBFS input swing, fourth-order ΣΔ interface circuit for MEMS microphones
A narrow-to-wideband scrambling technique increasing software radio receiver linearity
A 2-tap switched capacitor FFE transmitter achieving 1-20 Gb/s at 0.72-0.62 pJ/bit
A noise-efficient, in-pixel readout for FET-based THz detectors with direct incremental A/D conversion
A dual mode channel decoder for 3GPP2 mobile wireless communications
Fast stability analysis of large-scale SRAM arrays and the impact of NBTI degradation
A fully integrated 30GHz 16-QAM single-channel phased array transmitter with 5.9% EVM at 6dB back-off
Glitch-induced within-die variations of dynamic energy in voltage-scaled nano-CMOS circuits
A 1x1 802.11n WLAN SoC with fully integrated RF front-end utilizing PA linearization
A 550mV 8dBm IIP3 4pth order analog base band filter for WLAN receivers
An on-die digital aging monitor against HCI and xBTI in 16 nm Fin-FET bulk CMOS technology
A Class-D CMOS DCO with an on-chip LDO
A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology
A single-chip RF tuner / OFDM demodulator for mobile digital TV application
A 5.4-mW 50-MHz 29.3-dBm-IIP3 Fourth-Order Low-Pass Filter
A Wide DR and linear response CMOS image sensor with three photocurrent integrations in photodiodes, lateral overflow capacitors and column capacitors
A 1.85 fA/√Hz fully integrated read-out interface for sub-pA current sensing applications
A 82nW chaotic-map true random number generator based on sub-ranging SAR ADC
A 15 GHz 256/257 dual-modulus prescaler in 120 nm CMOS
Micropower integrated bioamplifier and auto-ranging ADC for wireless and implantable medical instrumentation
High efficiency buck-boost converter with reduced average inductor current (RAIC) technique
A Coupled Inductive Bridge for Magnetic Sensing Applications
A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOI
A 62 dB dynamic range sixth-order band pass filter with 100-175 MHz tuning range
Part-time resonant switching for light load efficiency improvement of a 3-level fully integrated buck converter
Temperature stabilised tunable Gm-C filter for very low frequencies
High-resolution and wide-dynamic range time-to-digital converter with a multi-phase cyclic Vernier delay line
A high-voltage compliant, electrode-invariant neural stimulator front-end in 65nm bulk-CMOS
Challenges for silicon technology scaling in the Nanoscale Era
Improved power side channel attack resistance of a 128-bit AES engine with random fast voltage dithering
Scaling analog circuits
A 20bit continuous-time ΣΔ modulator with a Gm-C integrator, 120dB CMRR and 15 ppm INL
A 2.89mW 50GOPS 16×16 16-core MIMO sphere decoder in 90nm CMOS
A 2-channel 1MHz BW, 80.5 dB DR ADC using a DS modulator and zero-ISI filter
Physically Tightly Coupled, Logically Loosely Coupled, Near-Memory BNN Accelerator (PTLL-BNN)
A Hybrid Buck Converter Stacked on Auxiliary-switched-capacitor Using Analog and Digital Dynamic Voltage Scaling Techniques
Stimulation artifact rejection in closed-loop, distributed neural interfaces
A 2.6psrms-period-jitter 900MHz all-digital fractional-N PLL built with standard cells
A 1.6-2.6GHz 29dBm injection-locked power amplifier with 64% peak PAE in 65nm CMOS
A 3-µW 868-MHz wake-up receiver with -83 dBm sensitivity and scalable data rate