yusuke1997/dblp-id-title huggingface dataset:
A versatile three-stage operational amplifier with Second-stage Bypass Compensation
A high speed pipeline ADC with 78-dB SFDR in 0.18 um BiCMOS
FPGA-based quantum circuit emulation: A case study on Quantum Fourier transform
A digitally controlled embedded SMPS with 2.3V to 5.5V input voltage for mobile SoCs
Automotive security state of the art and future challenges
Lightweight cryptography for constrained devices
Capacitive charge pump gain-stage with source follower buffers for pipelined SAR ADCs
An on-chip integrated III-V / CMOS 125MSps 6-bit SAR ADC
Ray-casting algorithm and its considerations for parallel processing optimization techniques for parallel ray-casting algorithm
Cost-efficiency FFT using hardware-reduction and dynamic current scaling approaches
A review of audio Class D amplifiers
Timing challenges in high-speed interleaved ΔΣ DACs
Low complexity 60-GHz receiver architecture for simultaneous phase and amplitude regenerative sampling systems
Performance analysis on active rectifier structures for inductively powered application
2014 International Symposium on Integrated Circuits (ISIC), Singapore, December 10-12, 2014
A sub-1V wide-load-range LDO regulator with sustained transient efficiency
Modelling of high frequency Lamb wave resonator for monolithic CMOS radar transceiver
Triple boundary multiphase with predictive interleaving technique for switched capacitor DC-DC converter regulation
A 0.18µm, 0.6V, 83.5µW integer DCT processor for neural signal applications
ASIC front-end for sensing MEMS-mirror position
Low noise linear and wideband transconductance amplifier design for current-mode frontend
Subquadratic space complexity digit-serial multiplier over binary extension fields using Toom-Cook algorithm
Zero collision attack and its countermeasures on Residue Number System multipliers
Performance and cost analysis of NoC-inspired virtual topologies for digital microfluidic biochips
A rail-to-rail noise-shaping non-binary SAR ADC
A 2.5-GHz band low-voltage high efficiency class-E power amplifier IC with body effect
Energy efficient spiking neural network design with RRAM devices
Safety across the HW/SW interface - Can formal methods meet the challenge?
A 66dB continuous gain adjusting CMOS AGC amplifier with both feedforward and feedback loop
Mask-based non-maximal suppression with iterative pruning for low-complexity corner detection
A high-efficiency Class-E polar power-amplifier with a novel digitally-controlled output matching network
Concurrent device/circuit aging for general reliability simulations
Recent trends in chip-level design automation for digital microfluidic biochips
Parasitic BJT versus DIBL: Floating-body-related subthreshold characteristics of SOI NMOS device
An SOI-CMOS low noise chopper amplifier for high temperature applications
A 65nm CMOS ping-pong auto-zero resistance-to-frequency converter for resistive bridge sensors
High performance ΣΔ closed loop accelerometer
What happens on an MPSoC stays on an MPSoC - unfortunately!
A maximum power point tracking and voltage regulated dual-chip system for single-cell photovoltaic energy harvesting
The role of auditory feedback in speech production: Implications for speech perception in the hearing impaired
A 150-GHz push-push VCO in 0.13-μm SiGe BiCMOS
Advanced performance metrics for Physical Unclonable Functions
A fully integrated capacitance boosting offset calibration circuit for capacitive pressure sensor
Switch size control circuit in wide-load PWM/PFM DC-DC buck converters
Deep packet inspection in residential gateways and routers: Issues and challenges
System C-based multi-level error injection for the evaluation of fault-tolerant systems
Low-power multi-function multi-mode baseband design for low data rate applications
A highly-integrated wireless configuration circuit for FPGA chip
A modular design of elliptic-curve point multiplication for resource constrained devices
A 20.5GHz wide-band programmable divide-by-N frequency divider
ESD protection design for high-speed circuits in nanoscale CMOS process
A high efficiency synchronous buck converter with adaptive dead-time control
A 12.4-kHz on-chip RC oscillator with comparator offset cancellation for PVT variation tolerance
A primary side feedback control for flyback LED driver with no output voltage feedback resistors
Analysis and modelling on CMOS spiral inductor with impact of metal dummy fills
Analysis of monolithic I/Q based impedance measurement circuits: Impact of non-ideal circuit effects on accuracies
Digital compensation method for the path delay mismatches in GRO-TDC
A 40nm/65nm process adaptive low jitter phase-locked loop
Performance optimization in FinFET-based circuit using TILOS-like gate sizing
A more accurate circuit model for CMOS Hall cross with non-linear resistors and JFETs
Differences of energetic consumption between Java and JNI Android apps
A 0.3-V, 37.5-nW 1.5∼6.5-pF-input-range supply voltage tolerant capacitive sensor readout
A high efficiency CMOS rectifier with ON-OFF response compensation for wireless power transfer in biomedical applications
High accuracy time-mode duty-cycle-modulation-based temperature sensor for energy efficient system applications
A continuous switching mode step-down switched-capacitor regulator with inrush current control scheme
NuDE 2.0: A model-based software development environment for the PLC & FPGA based digital systems in nuclear power plants
Millimeter wave transformer coupled low-power and broadband power amplifiers
A 340 GHz fully integrated transmitter for high-speed communications
A Ku-band high-isolation SPDT switch in 0.35um SiGe BiCMOS technology
An efficient residue-to-binary converter for the new moduli set {2 n/2 ± 1, 2 2n+1 , 2 n + 1}
A regulated voltage multiplier for passive RFID Tag
A low power injection-locked divider for body sensor network
There ain't no plain key: A PUF based first-order side-channel resistant encryption construction
Hierarchical air quality monitoring system design
A +33dBm 1.9 GHz linear CMOS power amplifier with MOS-level linearizers
CMOS image sensor based physical unclonable function for smart phone security applications
DC-50 GHz low loss switch matrix design in high resistivity trap-rich SOI
A Shared-MSB delay-line-based ADC with simultaneous quantization for digital control single-inductor-multiple-output DC-DC converter
Modeling of two port center-tapped to ground and three port scalable symmetrical inductor
DC - 15 GHz CMOS SP8T switches using defected ground structure low pass filter
Design and characterization of radiation-tolerant CMOS 4T Active Pixel Sensors
Design of millimeter-wave transformer balun with isolation circuit in silicon based technology
High voltage high efficiency UWB pulse generator for precision localization wireless sensor network
Review of pulse generators for gated ring oscillator based Time-to-Digital converters
A heterogeneous platform with GPU and FPGA for power efficient high performance computing
A review on supply modulators for Envelope-Tracking Power Amplifiers
A survey of the state-of-the-art fault attacks
A 10 to 170 GHz distributed amplifier using 130-nm SiGe HBTs
Effect of adaptive envelope compression in simulated electric hearing in reverberation
A self-oscillating class D audio amplifier with dual voltage and current feedback
Fast binary to BCD converters for decimal communications using new recoding circuits
A hybrid mapreduce model for prolog
Apps-usage driven energy management for multicore mobile computing systems
Power distribution network design for high-speed automotive graphical processing module
A compact 6-bit phase shifter in 0.35 µm SiGe BiCMOS technology
Automatic adjustment system for optical interconnection transmitter using improved particle swarm optimization
Accelerating OpenSSL's ECC with low cost reconfigurable hardware
A hierarchical switch matrix and interconnect resources test in Virtex-5 FPGA
A pipelined architecture for motion tracking on a multicore environment
Twenty years of research on RNS for DSP: Lessons learned and future perspectives
Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper)
Stack effect and logic restructuring on high Fan-in FinFETs logic gates
Novel STT-MRAM-based last level caches for high performance processors using normally-off architectures
Development of Remote Visualization and Collaborative Visualization System in ITBL Grid Environment
Parallelization, Vectorization and Visualization of Large Scale Plasma Particle Simulations and Its Application to Studies of Intense Laser Interactions
A Comparison of Locality-Based and Recency-Based Replacement Policies
An Introduction to NANOS Project
Utilization of Cache Area in On-Chip Multiprocessor
GeoFEM: High-Performance Parallel FEM for Geophysical Applications
Parallel PDB Data Retriever "PDB Diving Booster"
Parallelizing Merge Sort onto Distributed Memory Parallel Computers
Unnoticeable Jitter in ATM Workstation Configurations
Java Bytecode Optimization with Advanced Instruction Folding Mechanism
OpenMP for Adaptive Master-Slave Message Passing Applications
Neural Network Classifiers Execution on Superscalar Microprocessors
A Programmable Memory Hierarchy for Prefetching Linked Data Structures
OpenMP / MPI Hybrid vs. Flat MPI on the Earth Simulator: Parallel Iterative Solvers for Finite Element Method
Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor
Multithreading Runtime Support for Loop and Functional Parallelism
On the Importance of an End-To-End View of Memory Consistency in Future Computer Systems
The Filter Data Cache: A Tour Management Comparison with Related Split Data Cache Schemes Sensitive to Data Localities
Impact of OpenMP Optimizations for the MGCG Method
Computations of Global Seismic Wave Propagation in Three Dimensional Earth Model
A Visual Resource Integration Environment for Distributed Applications on the ITBL System
Towards OpenMP Execution on Software Distributed Shared Memory Systems
A Feasibility Study in Iterative Compilation
Support of Multidimensional Parallelism in the OpenMP Programming Model
Evaluating Heuristic Scheduling Algorithms for High Performance Parallel Processing
The UK e-Science Program and the Grid
A Suitable Domain Decomposition for the Adaptive Mesh Refinement Method
Partitioned Parallel Radix Sort
Block Red-Black Ordering Method for Parallel Processing of ICCG Solver
Parallel Radiosity: Evaluation of Parallel Form Factor Calculations and a Static Load Balancing Algorithm
Characterization of Disordered Networks in Vitreous SiO2 and Its Rigidity by Molecular-Dynamics Simulations on Parallel Computers
Parallel Simulation of Seismic Wave Propagation
Active Memory Clusters: Efficient Multiprocessing on Commodity Clusters
Parallel LU-decomposition on Pentium Streaming SIMD Extensions
Hybrid Approach for Non-strict Dataflow Program on Commodity Machine
SPEC HPG Benchmarks for Large Systems
An Introduction to DRAMA Project
Parallelization via Constrained Storage Mapping Optimization
Design and Implementation of a Parallel Programming Environment Based on Distributed Shared Arrays
Design of Fast Collective Communication Functions on Clustered Workstations with Ethernet and Myrinet
Decentralized Load Balancing in Multi-node Broadcast Schemes for Hypercubes
Photo-Realistic Visualization for the Blast Wave of TNT Explosion by Grid-Based Rendering
Integrated I-cache Way Predictor and Branch Target Buffer to Reduce Energy Consumption
Performance Evaluation of the Hitachi SR8000 Using OpenMP Benchmarks
Parallel Distributed Optimization by Resource Addition and Reduction
Present and Future of HPC Technologies
Quantifying Differences between OpenMP and MPI Using a Large-Scale Application Suite
Performance Study of a Whole Genome Comparison Tool on a Hyper-Threading Multiprocessor
Task Migration in 2D Wormhole-Routed Mesh Multicomputers
Low-Cost Value Predictors Using Frequent Value Locality
Online Remote Trace Analysis of Parallel Applications on High-Performance Clusters
Dual-Level Parallelism Exploitation with OpenMP in Coastal Ocean Circulation Modeling
Distributed Parallelization of Exact Charge Conservative Particle Simulation Code by High Performance Fortran
High Performance and Energy Efficient Serial Prefetch Architecture
Exploiting Parallel Computers to Reduce Neural Network Training Time of Real Applications
RI2N - Interconnection Network System for Clusters with Wide-Bandwidth and Fault-Tolerancy Based on Multiple Links
Grouped RAID Accesses to Reduce False Sharing Effect in Clusters with Single I/O Space
Formalizing OpenMP Performance Properties with ASL
Dynamic Load Balancing in MPI Jobs
Improving the Performance of Automated Forward Deduction System EnCal
Numerical Simulator III - A Terascale SMP-Cluster System for Aerospace Science and Engineering: Its Design and the Performance Issue
Parallel Map Recognition by Pipeline Control
High Performance Parallel FFT on Distributed Memory Parallel Computers
Constructing a Virtual Laboratory on the Internet: The ITBL Portal
Parallel I/O Support for HPF on Computational Grids
An Automatic Vectorizing/Parallelizing Pascal Compiler V-Pascal V.3
Improving InfiniBand Routing through Multiple Virtual Networks
An Evaluation of Page Aggregation Technique on Different DSM Systems
Instruction Level Distributed Processing: Adapting to Future Technology
Application of Parallel Sparse Direct Methods in Semiconductor Device and Process Simulation
A Comprehensive Analysis of Indirect Branch Prediction
OpenGR: A Directive-Based Grid Programming Environment
Large Scale Parallel Direct Numerical Simulation of a Separating Turbulent Boundary Layer Flow over a Flat Plate Using NAL Numerical Wind Tunnel
Data Dependence Path Reductio with Tunneling Load Instructions
A Method for Runtime Recognition of Collective Communication on Distributed-Memory Multiprocessors
An Algorithm for Automatic Detection of Loop Indices for Communication Overlapping
Loop Termination Prediction
Cache Line Impact on 3D PDE Solvers
A Study on the Effect of Air on the Dynamic Motion of a MEMS Device and Its Shape Optimization
Parallel Iterative Solvers for Unstructured Grids Using an OpenMP/MPI Hybrid Programming Model for the GeoFEM Platform on SMP Cluster Architectures
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
A Shared Memory Benchmark in OpenMP
Distributed Location of Shared Resources and Its Application to the Load Sharing Problem in Heterogeneous Distributed Systems
Performance of Network Intrusion Detection Cluser System
A Similarity Evaluation Method for Volume Data Sets by Using Critical Point Graph
High Performance Computing Trends and Self Adapting Numerical Software
Combining In-Transit Buffers with Optimized Routing Schemes to Boost the Performance of Networks with Source Routing
Evaluation of the HPF/JA Extensions on Fujitsu VPP Using the NAS Parallel Benchmarks
SPEC HPC2002: The Next High-Performance Computer Benchmark
An Introduction to OCEANS Project
Is Cook's Theorem Correct for DNA-Based Computing?
Software Energy Optimization of Real Time Preemptive Tasks by Minimizing Cache-Related Preemption Costs
High Performance Computing, 4th International Symposium, ISHPC 2002, Kansai Science City, Japan, May 15-17, 2002, Proceedings
An Object-Oriented Framework for Loop Parallelization
Performance Comparisons of Basic OpenMP Constructs
Towards a Lightweight HPF Compiler
Generalized Upsilon Networks
Fast Ray-Casting for Irregular Volumes
Power-Performance Trade-Offs in Wide and Clustered VLIW Cores for Numerical Codes
Improving Memory Latency Aware Fetch Policies for SMT Processors
Reducing Misspeculation Penalty in Trace-Level Speculative Multithreaded Architectures
The New DRAM Interfaces: SDRAM, RDRAM and Variants
Performance Sensitivity of Routing Algorithms to Failures in Networks of Worksations
Basic Design of the Earth Simulator
Evaluation of High-Speed VPN Using CFD Benchmark
High Performance Computing, Third International Symposium, ISHPC 2000, Tokyo, Japan, October 16-18, 2000. Proceedings
High Performance Computing, Second International Symposium, ISHPC'99, Kyoto, Japan, May 26-28, 1999, Proceedings
Sampling of Protein Conformations with Computers to Predict the Native Structure
Parallel Navigation in an A-NETL Based Parallel OODBMS
Coarse-Grain Task Parallel Processing Using the OpenMP Backend of the OSCAR Multigrain Parallelizing Compiler
Ability of Classes of Dataflow Schemata with Timing Dependency
New Evaluation Index of Incomplete Cholesky Preconditioning Effect
Large-Scale Simulation System and Advanced Photon Research
Orgel: A Parallel Programming Language with Declarative Communication Streams
Synchronous Communication of Molecular and Electronic Structure Information in a Distributed Computing Environment
OpenTella: A Peer-to-Peer Protocol for the Load Balancing in a System Formed by a Cluster from Clusters
Field Array Compression in Data Caches for Dynamically Allocated Recursive Data Structure
The Generation of Optimized Codes Using Nonzero Structure Analysis
High Performance Fortran - History, Status and Future
A New Model of Parallel Distributed Genetic Algorithms for Cluster Systems: Dual Individual DGAs
Program Phase Detection Based Dynamic Control Mechanisms for Pipeline Stage Unification Adoption
Energy-Efficient Embedded System Design at 90nm and Below - A System-Level Perspective -
An Implementation and Evaluation of a Distributed Shared-Memory System on Workstation Clusters Using Fast Serial Links
Distribution-Insensitive Parallel External Sorting on PC Clusters
Performance Evaluation of Low Level Multithreaded BLAS Kernels on Intel Processor Based cc-NUMA Systems
Efficiency of Parallel Machine for Large-Scale Simulation in Computational Physics
NaraView: An Interactive 3D Visualization System for Parallelization of Programs
Pursuing Laziness for Efficient Implementation of Modern Multithreaded Languages
High Performance Wireless Computing
Virtual Experiment Platform for Materials Design
Grid Computing Supporting System on ITBL Project
Compiler-Directed Cache Assist Adaptivity
Parallelization of ILU Decomposition for Elliptic Boundary Value Problem of the PDE on AP3000
Skewed Data Partition and Alignment Techniques for Compiling Programs on Distributed Memory Multicomputers
A Parallelization Method for Neural Networks with Weak Connection Design
Hybrid Parallelization and Flat Parallelization in HPF (High Performance Fortran)
On Performance Modeling for HPF Applications with ASL
T-Map: A Topological Approach to Visual Exploration of Time-Varying Volume Data
Parallelization of Space Plasma Particle Simulation
A New Dynamic Load Balancing Technique for Parallel Modified PrefixSpan with Distributed Worker Paradigm and Its Performance Evaluation
Parallel Computational Design of NJR Global Climate Models
Multi-phase Hydrodynamic Simulations on Parallel Computer
Performance of Coupled Parallel Finite Element Analysis in Grid Computing Environment
Multi-node Broadcasting in All-Ported 3-D Wormhole-Routed Torus Using Aggregation-then-Distribution Strategy
Achieving Multi-level Parallelization
Development of Electromagnetic Particle Simulation Code in an Open System
High Reynolds Number Computation for Turbulent Heat Transfer in a Pipe Flow
Using Recursion to Boost ATLAS's Performance
Performance Evaluation of a Java Based Chat System
A "Generalized k-Tree-Based Model to Sub-system Allocation" for Partitionable Multi-dimensional Mesh-Connected Architectures
Performance Estimation of Embedded Software with Pipeline and Cache Hazard Modeling
Molecular Dynamics Simulation of Prion Protein by Large Scale Cluster Computing
Instruction-Level Microprocessor Modeling of Scientific Applications
Fast LIC Image Generation Based on Significance Map
High-Performance Computing - 6th International Symposium, ISHPC 2005, Nara, Japan, September 7-9, 2005, First International Workshop on Advanced Low Power Systems, ALPS 2006, Revised Selected Papers
Parallel Matrix Multiplication and LU Factorization on Ethernet-Based Clusters
Optimization of HPF Programs with Dynamic Recompilation Technique
The Bandwidth Expansion Effectiveness of Cache Levels Block Prefetch
Leveraging Transparent Data Distribution in OpenMP via User-Level Dynamic Page Migration
Improve OpenMP Performance by Extending BARRIER and REDUCTION Constructs
An Analytic Model for Communication Latency in Wormhole-Switched k -ary n -Cube Interconnection Networks with Digit-Reversal Traffic
High Performance Distributed Object Systems
Implementing Iterative Solvers for Irregular Sparse Matrix Problems in High Performance Fortran
Irregular Assignment Computations on cc-NUMA Multiprocessors
Lattice QCD Simulations as an HPC Challenge
Chordal Topologies for Interconnection Networks
Development of an Interactive Visual Data Mining System for Atmospheric Science
The Development of the UPACS CFD Environment
Computationally Efficient Parallel Matrix-Matrix Multiplication on the Torus
Design and Implementation of an Efficient Thread Partitioning Algorithm
Network Interface for a Data Driven Network of Workstations (D 2 NOW)
Kilo-instruction Processors
A Distributed Rendering System "On Demand Rendering System"
CARE: Overview of an Adaptive Multithreaded Architecture
An Improved Algorithm of Multicast Topology Inference from End-to-End Measurements
Performance Evaluation of the Omni OpenMP Compiler
Adaptive Routing on the Recursive Diagonal Torus
Numerical Weather Prediction on the Supercomputer Toolkit
An EPIC Processor with Pending Functional Units
Large System Performance of SPEC OMP2001 Benchmarks
Broadcast in a MANET Based on the Beneficial Area
LES of Unstable Combustion in a Gas Turbine Combustor
Earth Simulation Project in Japan - Seeking a Guide Line for the Symbiosis between the Earth and Human Beings - Visualizing an Aspect of the Future of the Earth by a Supercomputer
Performance-Based Loop Scheduling on Grid Environments
Workload Characterization of Stateful Networking Applications
16.14 TFLOPS Eigenvalue Solver on the Earth Simulator: Exact Diagonalization for Ultra Largescale Hamiltonian Matrix
Power Estimation of a C Algorithm Based on the Functional-Level Power Analysis of a Digital Signal Processor
Implementation and Evaluation of the Mechanisms for Low Latency Communication on DIMMnet-2
Development of Three-Dimensional Neoclassical Transport Simulation Code with High Performance Fortran on a Vector-Parallel Computer
N etfiles \mathit{\mathcal{N}etfiles}: An Enhanced Stream-Based Communication Mechanism
Automatic Generation of OpenMP Directives and Its Application to Computational Fluid Dynamics Codes
Performance Evaluation for Japanese HPF Compilers with Special Benchmark Suite
Biological- and Chemical- Parallel Applications on a PC Cluster
Direct Numerical Simulation of Coherent Structure in Turbulent Open-Channel Flows with Heat Transfer
Global Magneto-Hydrodynamic Simulations of Differentially Rotating Accretion Disk by Astrophysical Rotational Plasma Simulator
Integrity and Performance in Network Attached Storage
Towards Generic Solver of Combinatorial Optimization Problems with Autonomous Agents in P2P Networks
Transonic Wing Shape Optimization Based on Evolutionary Algorithms
Spacecraft Plasma Environment Analysis Via Large Scale 3D Plasma Particle Simulation
Decoupled State-Execute Architecture
Large Scale Structures of Turbulent Shear Flow via DNS
Failure Restoration for Location Server with User Movement Learning and Prediction
A Calculus Effectively Performing Event Formation with Visualization
Profile-Based Selection of Load Value and Address Predictors
Numerical Simulation of Combustion Dynamics at ISTA/JAXA
Folding Active List for High Performance and Low Power
A Common CFD Platform UPACS
Cross-Line - A Globally Adaptive Control Method of Interconnection Network
Performance of Adaptive Mesh Refinement Scheme for Hydrodynamics on Simulations of Expanding Supernova Envelope
Macroservers: An Object-Based Programming and Execution Model for Processor-in-Memory Arrays
Communication Bandwidth of Parallel Programming Models on Hybrid Architectures
Implementation and Evaluation of OpenMP for Hitachi SR8000
An Introduction to OpenMP 2.0
Kinetic Analysis of Functional Images: The Case for a Practical Approach to Performance Prediction