yusuke1997/dblp-id-title huggingface dataset:
Engineering-maintenance methods of the calculation service area fixed BWA-paths
GSM-based Control and Data Collection System
Objects and methods of on-line testing: Main requirements and perspectives of development
Self-testing of microcontrollers in the field
Qubit modeling digital systems
Ultrawideband chirp generation method based on the self-phase modulation effect
Window-Presum Parametric Discrete Fourier Transform
System on chip for comparison of precise time sources
Functional fault model definition for bus testing
Advanced Indication of the Self-Timed Circuits
Lyapunov function analysis for different strategies of circuit optimization
Determination of electrical parameters of dried blood spot samples with different concentration of methotrexate
Towards parallel composition of partial finite state machines: Checking safety property step-by-step
Sign Language synthesis using hand motion acquisition
A trace signal selection algorithm for improved post-silicon debug
Mitigation of IR Drop Through Power Delivery Network (PDN) Reinforcement in Critical Zones
Intellectual Functional Diagnosis of Large Objects Using Sensor Networks
The correction circuits for the broadband resistive voltage dividers with the capacitive load
Decomposition tree - based compaction procedure with iteration steps for interconversional layouts of tasks
Straight edge extraction and localization on noisy images
RFID-Based Navigation of Subway Trains
Extending fault periodicity table for testing external memory faults
Vector-Logical In-Memory Simulation of Faults as Truth Table Addresses
Bandpass RC filters of the second-order based on the micropower two-component differential stages
Recovery of Parallel Dataflow Computing System From Faults and Failures
The multichannel high-frequency compensation of the analog sections of flash ADCs with the differential input at the cascade connection of the reference resistors
Coverage method for FPGA fault logic blocks by spares
Parallelizing of Boolean function system for device simulation
Mechatronic intelligent bus control system
Microwave selective RC amplifiers with control parameters
Schematic design of HF and UHF op-amp for SiGe technology
The Deterministic-Statistical Model of a MIMO System Signal Propagation Indoors
Validation and Test Challenges for Multi-Memory Bus BIST Engines
Methodological aspects of detection and resolution of conflicts of train control systems information security software
Vector Logic Analysis of Big Data
Cyber Social FML - Computing III. Architectures
RoCoCo: Row and Column Compression for high-performance multiplication on FPGAs
Integrated-Optics Quantum Processor Based on Entangled Photons in Coupled Cavities
Advanced topics of FSM design using FPGA educational boards and web-based tools
Parameter optimization of high-speed CMOS operational amplifiers based on dual-input stage
Automated generation of core test description file for hierarchical test
A research of heuristic optimization approaches to the test set compaction procedure based on a decomposition tree for combinational circuits
Secure scan-based design using Blum Blum Shub algorithm
Accessment of the Powder form of Auricularia Fungus' Ability to Absorb Harmful Ionizing Radiations
CORDIC rotator for frequency translation
Finding the shortest transfer sequence of sequential circuit based on simplified ROBDDs
Using adaptive polynomial models of time series for short-term prediction of the technical parameter
Conversion of the harmonic signal of limited duration by the sampling theorem for all permitted values of the band index
Permanent Monitoring Systems of the Contact-Wire of Railroad Catenary: the Main Tasks of Implementation
New Metric for Evaluating the Effectiveness of Redundancy in Fault-Tolerant Logic Circuits
Firmware Generation Architecture for Memory BIST
Localization of Barcodes Using Artificial Neural Network
Universal technique of the analysis of round-off noise in digital filters with arbitrary structure described by topological matrixes
Search algorithm for fully tested elements in combinational circuits, controlled on the basis of berger codes
3D integrated circuits multifactor placement
A model of spatial thinking for computational intelligence
Stability Verification of Statistical Methods for Signal Separation
Testing and verification of HDL-models for SoC components
On the problem of selection of code with summation for combinational circuit test organization
The new method of secure data transmission on the indirect steganography basis
Synthesis of Signal Quadrature Processing Algorithms under the Influence of Band-limited non-Gaussian Noise
A Review of Particle Detectors for Space-Borne Self-Adaptive Fault-Tolerant Systems
Comparative analysis of single-photon synchronization algorithms in the quantum key distribution system
Designing a Koch-Type Wire Antenna by Regression Analysis
Synthesis of control unit with refined state encoding for CPLD devices
Assessing Trustworthiness of IoT Applications Using Logic Circuits
Cryogenic Operational Amplifier on Complementary JFETs
Emerging Culture of Social Computing
Development of Sensor for Spectral Monitoring of Combustion Processes in Gas-Turbine Engines
Si BJT and SiGe HBT performance modeling after neutron radiation exposure
Self-adaptive mobile wireless hotspot zones: Initial issues
Real-Time Crosswalk Segmentation Using FPGA Based Spiking Neural Networks: A Comparison of Integrate-and-Fire and Izhikevich Hardware Neural Models
Determining the Direction of True Meridian by Micromechanical Gyro
Synthesis of Reflectivity Measurement Conditions for Pyramidal Radio Absorbing Materials in Free Space
Noise effect estimation and reduction in high-speed voltage controlled oscillators
A Machine Learning-Based Post-Route PVT-Aware Power Prediction of Benchmark Circuits at Floorplan Stage of Physical Design
Compact Four-Stub Coupler
Generators of the Binary Inverse-Segment Pseudo-Random Sequences
Checking Robustness of Web Services Based on the Parallel Composition of Partial Timed Finite State Machines
Experiences on the road from EDA developer to designer to educator
Numerical Investigation of Split Ring Resonator-Based Terahertz Filter
Development of Time-Varying PLL Macromodel for Jitter Evaluation
Investigation of sparse matrix multiplication task for the PDCS "Buran"
Power noise optimization with decoupling capacitors
Parallel Computations in Two-Dimensional Adaptive Antenna Arrays
Estimation of structural complexity of IIR digital filters
Modeling of developable surfaces of three-dimensional geometric objects
Quantum modeling and repairing digital systems
Algorithm for assessing quality of fuzzy expert information
The antialiasing ARC-LPF with independent trimming of the main characteristics
Design of test generator for embedded self-testing
Estimation to Efficiency of the Using of Anti-Alias Filter in the A/D Interface of Instrumentation and Control Systems
Secure Communication using the synchronization of time-varying complex networks by fuzzy impulsive method
Performance investigation of antenna arrays by means of virtual instruments
Model of Verification of Distributed Storage Systems
Fast and Secure Unified Field Multiplier for ECC Based on the 4-Segment Karatsuba Multiplication
Low Power, Low Offset, Area Efficient Comparator Design in Nanoscale CMOS Technology
Adaptive wavelet codec for noisy image compression
Research on the Throughput Capacity of LoRaWAN Communication Channel
The linear logic synthesis of k-valued digital structures in the analogous circuitry basis
Combined Use of Equivalent and Non-Equivalent Transformations of FPGA Program Code to Embedding Additional Security Data
Cross-Platforming Web-Application of Electronic On-line Voting System on the Elections of Any Level
An optimized CLP-based technique for generating propagation sequences
Accurate reference current generation method and circuit in CMOS
Main Solutions of Structural Health Monitoring in Managing the Technical Condition of Transport Objects
Description of the spatial shape surface of an air supported dynamic figure
A list decoding algorithm for practical reed-solomon codes
Extracting complete set of equations to analyze VHDL-AMS descriptions
Reliable NoC architecture utilizing a robust rerouting algorithm
Optimizing Components of Finite State Machines Composition Based on Don't Care Input Sequences in Hardware Implementation
Path delay faults and ENF
Multi-interval static timing analysis accounting logic compatibility
On possibility of stabilizing results for multicriteria optimizing linear combination of concurrent functionals
Metrics of vector logic algebra for cyber space
Formula Markup Algorithm for Search in Scientific Documents
Screen-printed electrodes as versatile electrochemical sensors and biosensors
Digital lock detector for PLL
Improvement of common-mode rejection ratio in symmetrical differential stages with dynamic load
Fast RLS algorithms in Combined Adaptive Array and Fractionally-Spaced Feed-Forward/Feed-Backward Equalizer
On one method of formation of optimum sum code for technical diagnostics systems
Construction of Length and Rate Adaptive MET QC-LDPC Codes by Cyclic Group Decomposition
Processing An Effective Method For Clock Tree Synthesis
Fault-tolerant multichannel digital averaging converter
Modification of U-Net neural network in the task of multichannel satellite images segmentation
Structural CDC analysis methods
Device-process simulation of discrete silicon stabilitron with the stabilizing voltage of 6, 5 V
The impact of sensors' implementation on lift control system
Methodology to design-for-testability automation for mixed-signal integrated circuits
Developing a Multiple Testing Procedure in the D-Posterior Approach using the R Software Environment
Malware Searching Methods at FML-Architecture
Global Distributed Associative Environment - Evolution of Parallel Dataflow Computing System "Buran"
Energy Saving Low Cost Autodyne Short-Range Motion Sensor
Generalized structural models of complex distributed objects
Cyber Social Computing
The Implementation of High-Order Single-Step Integration Technique into Circuit Simulator
The ensuring the integrity of information streams under the cyberattacks action
Circuit Partitioning Problem Clustering Method Based on Adjacency Matrix Unification
Multidimensional loop fusion for low-power
Control-Flow Integrity for Real-Time Operating Systems: Open Issues and Challenges
Simulation of Electromagnetic Emanation of Cryptographic ICs: Tools, Methods, Problems
The evidential independent verification of software of information and control systems, critical to safety: Functional model of scenario
Masking Robust Testable PDFs
On the issue of using digital radio communications of the DMR standard to control the train traffic on Russian railways
Exploring of equivalent circuit model of piezoelectric energy harvesters for ultra low-power devices
Sensitivity Analysis of the Square Frequency Response of IIR Digital Filters in Equivalent Direct Form
Development of Fast Exponentiation Algorithm «To Center and Back»
FREP: A soft error resilient pipelined RISC architecture
Dedicated chip for pulse oximetry measurements
Matrix implementation of Moore FSM with nonstandard presentation of state codes
Getting the Emotional Coloring of Videos for Further Teaching of Neural Networks
The Testware CAD
Resistance calibration method without external precision elements
Deep Learning for Region Detection in High-Resolution Aerial Images
Architecture of queued-free crossbar for on-chip networks
Combined approach to place electronic computing equipment circuit elements
Comparison of Model-Based Error Localization algorithms for C designs
Enhancing TTS Performance for Noisy and Low-Resource Languages Using Advanced Noise Removal Techniques
The Weight-Based Sum Codes in the Residue Ring by Arbitrary Modulus for Synthesis of Self-Checking Digital Computing Systems
The Discrete Structure of the Zeros and Poles Location in the z-Plane of the Arbitrary Order IIR Digital Filters with a Finite Word Length
Use of Systematic Code Based on Data Bits Weighing for Concurrent Error Detection Considering Error Structure Analysis
Theory of bionic optimization and its application to evolutionary synthesis of digital devices
An efficient testing methodology for embedded flash memories
Checkability of the digital components in safety-critical systems: Problems and solutions
Optimizing test time for core-based 3-d integrated circuits by a technique of bi-partitioning
Voltage Regulation Analysis in Energy Transmission Systems Using STATCOM
A technique for low power, stuck-at fault diagnosable and reconfigurable scan architecture
An efficient fault diagnosis and localization algorithm for Successive-Approximation Analog to Digital Converters
Automatic transformation of SystemC designs to speed up simulation
FSMTest-1.0: A manual for researches
SPICE model parameters extraction taking into account the ionizing radiation effects
Designing power supply (PS) using digital PID based on AVR microcontrollers
Efficient Vision Transformer Deployment on Google Coral Through Knowledge Distillation
Parity prediction method for on-line testing of a Barrel-shifter
Automation of layout design of spiral conical scans
Improvement of the internal combustion engine control system
Contactless measurement technique for the amplitude of vibrational movement of the test material point
ESL design methodology for architecture exploration
Terms of Arrangement Reckoning Self-Checking Embedded Check Circuits based on Boolean Complement Up to Constant-Weight Code '1-out-of-3'
2008 East-West Design & Test Symposium, EWDTS 2008, Lviv, Ukraine, October 9-12, 2008
Noise Reduction in Reset Domain Crossings Verification Using Formal Verification
Using Architecture Simulation Tool for Memory Subsystem Evaluation in Multi-core Systems
Method of diagnosing FPGA with use of geometrical images
Modified Modular Unit Bits Sum Codes with Arbitrary Account Modules
Debugging and testing features of the dataflow parallel computing system components and devices
SAT Solvers Application of Deriving All Test Pairs Detecting Robust Testable PDFs
System level hardware design and simulation with SystemAda
Experiments with ABIST test methodology applied to path delay fault testing
Adaptation of discrete estimation algorithms according state model and shaping noise parameters based on the combined maximum principle
Multi-Level Fault Injection Methodology Using UVM-SystemC
QuaSim - Cloud service for digital circuits simulation
Simulation-based hardware verification with time-abstract models
Generic two-modulus sum codes for technical diagnostics of discrete systems problems
An In-Pandemic View on the Global Trends in Microelectronic Design and Market
Image Search by Content System Development
The Using of Electronic Document Management Tools of Technical Documentation for the Assessment of the Life of the Train Traffic Control Devices
Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock
Design of blocks for a Field Programmable Mixed Array (FPMA)
2017 IEEE East-West Design & Test Symposium, EWDTS 2017, Novi Sad, Serbia, September 29 - October 2, 2017
Optimization Calculation of Thermoelement Linear Dimensions for Microthermoelectric Generator
Model of Hybrid Timetables for High Speed Urban Tramway Movement
Use of Natural Information Redundancy in On-Line Testing of Computer Systems and their Components
Design and optimization of a planar UWB antenna
Implementation and Comparative Analysis of Symmetric Encryption Model Based on Substitution Cipher Techniques
Recursive Identification of Complex-Valued Weights Linear Dynamical Systems of Fractional Order with Errors-in-Variables
Method for diagnosing SoC HDL-code
On selection of state variables for delay test of identical functional units
Common-mode signal minimization in differential stage
Results of Validation Analysis for Multi-Memory Bus BIST Engines
Construction of a Quasi-Linear Ensemble of Algorithms for Diagnosing Tumors Detected from Mammography Images
No-reference image quality assessment based on local binary patterns
A new faults blocking method for out-of-step protection
An Automatic Testbench Generator for Test Patterns Validation
Error rate estimation of a design implemented in an FPGA based on the operating conditions
Analysis of the Efficiency of Using Computers with an Array-parallel Architecture for Processing Spectral Data of Astronomical Objects
Physical-Design Aware Scan Cell Reordering for Low Power Testing
A fault-tolerant combinational circuit design
Analysis of Moment and Cumulant Description of non-Gaussian Random Processes, Signals and Noise
Aging And IR Drop Aware Power Mesh Prediction Based On Machine Learning
Design of microprogrammed controllers with address converter implemented on programmable systems with embedded memories
Interface and Software for the System of Automatic Seeding of Grain Crops
Power specification, simulation and verification of SystemC designs
Experimental evaluation of FSM-based test derivation strategy for telecommunication protocols
Simulation of Nodes and Blocks of Matching Processor of the Parallel Dataflow Computing System "Buran"
Hyper Neural Network as the Diffeomorphic Domain for Short Code Soft Decision Beyound Belief Propagation Decoding Problem
Designing a Single-Band Monopole Six-Tooth-Shaped Antenna with Preset Matching
Standalone functional verification of multicore microprocessor memory subsystem units based on application of memory subsystem models
Invariant-oriented verification of HDL-based safety critical systems
Composite media based on chiral elements and their combinations with ferromagnetic structures
Hardware reduction for matrix circuit of control Moore automaton
An approach to instruction stream generation for functional verification of microprocessor designs
Inverse Sets in Pattern Recognition
System in Package. Diagnosis and embedded repair
Optimization some characteristics of continuous phase spread spectrum signal
The development method for evaluating the saturation of video frame blocks to reduce the processing time of the video stream
Design of nonlinear optimal systems on basis of controlled Jordan form
Analyses of two run march tests with address decimation for BIST procedure
Generating pipeline integrated circuits using C2HDL converter
Method of free C++ code migration between SoC level tests and standalone IP-Core UVM environments
Application of Adaptive Algorithms for Measuring Temperature Current-Voltage Characteristics of Electronic Elements
Typical Signal Correction Structures Based on Duplication with the Integrated Control Circuit
The Low-Temperature Radiation-Hardened Analog Interfaces of Sensors on the Base of BiJFET Array Chips
Hardware accelerator for biological protein sequence alignment on reconfigurable Networks-on-Chip
Verification of specifications in the language L with respect to temporal properties expressible by GR(1) formulas
Statistical characteristics of envelope outliers duration of non-Gaussian information processes
Infrastructure for testing and diagnosing multimedia devices
Accurate method for identical fault search in logical circuits
The Structures of the Fault-Tolerant Automation and Computing Devices Based on the Boolean Complement
Making System Level Test Possible by a Mixed-mode, Multi-level, Integrated Modeling Environment
Simulation and Generation of Navigation Signals with Normalized Distortions
Piezoelectric Cantilever in the Device for Extraction Energy from the Water Flow
FSM-based Sequential Circuits Optimization by Changing Initial State of Specification
Cybercomputer for information space analysis
Ant Algorithm for Determining of Critical Connections in VLSI
Query optimization based on time scheduling approach
Using of Interval Analysis Algorithms for Technical Systems Optimization Problem Solving
Dual interpolating counter architecture for atomic clock comparison
Increase in reliability of on-line testing methods using natural time redundancy
A new technique for layout based functional testing of modules in Digital Microfluidic Biochips
A Comprehensive Approach for Enhancing Deep Learning Datasets Quality Using Combined SSIM Algorithm and FSRCNN
Simulating fluid flow in "Shrinky Dink" microfluidic chips - Potential for combination with low-cost DIY microPIV
The modeling of electromagnetic fields intensity in urban development condition
Solution of an optimal control problem with Mathcad
Modeling of thermal field of substrate of integrated circuits by similarity method
A method for automatic generation of an RTL-interface from a C++ description
Research of metastability timing characteristics for threshold voltage and process-voltage-temperature variations
Comparative analysis of Full Frame and APS-C camera sensors on 3D digitization results
Concurrent error detection of combinational circuits by the method of boolean complement on the base of «2-out-of-4» code
Spoken document retrieval system based on phonemic transcribing
Multichannel Fast Affine Projection algorithm with Gradient Adaptive Step-Size and fast computation of adaptive filter output signal
Direct Sequence Spread Spectrum System Noise and Interference Immunity Analysis
An efficient approach for memory repair by reducing the number of spares
A heuristic to find initial values for stochastic local search in SAT using continuous extensions of Boolean formulas
Table data structures for cyber space
Analysis of the Computational Complexity of Algorithms for Phonemic Transcription
A quality characteristics estimation methodology for the hierarchy of RTL compilers
In-Memory Fault-Free Vector Simulation
Nonlinear distortion modulating signals in quantization
Microwave selective amplifiers with paraphase output
Calculation of the input coefficients of the OFDM symbol, the researching of the data's quality reception depending on the type of signal code construction
Hybrid genetic algorithm for cutting stock and packaging problems
Between standard cells and transistors: Layout templates for Regular Fabrics
Advanced Path Delay Fault Testing Strategies in High-Performance Digital Circuits
Selftest ADCs for smart sensors
FPGA FFT implementation
Systems for Reflectometry Analysis of Defects in Metal Structures of Transport Mobile Objects
Quarry Areas Segmentation on Satellite Images by Convolutional Neural Networks
Algebra-logical repair method for FPGA logic blocks
Crosstalk Prediction In Integrated Circuits Based on Machine Learning Techniques
Semiconductor electronic parts testing efficiency
Unit Regression Test Selection Mechanism Based on Hashing Algorithm
Automatic Deburring of 3D-Printed Parts Using a Delta Robot and Augmented Reality
Application of Constant-Weight Code '1-out-of-4' while Synthesis of Self-Checking Combinational Devices
Reconfiguring of structure as self diagnosis tool of on-board computers
Power Supply Noise Rejection Improvement Method in Modern VLSI Design
SPICE models of nonlinear capacitors for simulation of ferroelectric circuits
Programmable current biasing for low noise voltage controlled oscillators
Security risks in hardware: Implementation and detection problem
Extension of the corner stitching data structure for arbitrary layout shapes
Capacity Analysis of the Bordered Semicorrelated Multiuser Massive MIMO System with Complex Nakagami-m Fading Channel Coefficients
Classification of structures of IIR digital filters
Evolution of a Problem of the Hidden Faults in the Digital Components of Safety-Related Systens
2015 IEEE East-West Design & Test Symposium, EWDTS 2015, Batumi, Georgia, September 26-29, 2015
Process variation-aware approximation for efficient timing management of digital circuits
Intelligent Flow Meter on Acoustic Multivibrator
Method for functional testing critical control systems
Power Supply Ramp-up And Ramp-down Detector For Dynamic Memory Refresh Using 16nm Technological Process
The Digital Fractal Model of the Earth Based on Space Measurements Data
Sum code formation with minimum total number of undetectable errors in data vectors
Generalized test automation method for MOSFET's including characteristics measurements and model parameters extraction for aero-space applications