yusuke1997/dblp-id-title huggingface dataset:
A Low-power RFID with 100kbps Data Rate Employing High-speed Power Clock Generator for Complementary Pass-transistor Adiabatic Logic
Secure Admission of Applications in Many-cores
A 12-bit, 5.5-μW single-slope ADC using intermittent working TDC with multi-phase clock signals
RC-Chain: a Simple Model of Delay with a Ramp Input
Energy-Efficient Adaptive Machine Learning on IoT End-Nodes With Class-Dependent Confidence
Angel System & Platform Architecture
Study and Design of MEMS Cross-Shaped Piezoelectric Vibration Energy Harvesters
Separation of overlapping characters
195-nW 120-dB subthreshold CMOS OTA driving up to 200 pF and occupying only 4.4-10-3 mm2
Designing wideband voltage controlled oscillators for Software-Defined Radio
A comparative study of two SC-CMFB networks used in fully differential OTA
A Self-Biased Schmitt Trigger for Low Power Applications
Stochastic bifurcation in generalized chua's circuit through alpha-stable levy noise
A XOR-based associative memory block in 28 nm CMOS for interdisciplinary applications
A robust offset cancellation scheme for analog multipliers [utilises digital integrator]
High-Accuracy Wireless 6DOF Magnetic Tracking System Based on FEM Modeling
A low-cost Raspberry PI-based vision system for upper-limb prosthetics
Fall Detection by Bimodal Sensing with Late Fusion
Bit-level pipelinable general and fixed coefficient digit-serial/parallel multipliers based on shift-accumulation
Design of a low power 54×54-bit multiplier based on a pass-transistor logic
Numerical study of supercontinuum generation in photonic crystal fiber
Highly Integrated Galvanically Isolated Systems for Data/Power Transfer
Discrete cosine transform Type-IV-based multicarrier modulators in frequency offset channels
An Ultra-low Noise Variable Gain Amplifier with Accurate dB-Linear Characteristic
SOC modeling methodology for architectural exploration and software development
Design of adaptive nano/CMOS neural architectures
A platform-based design framework to boost many-core software development
A Timing Complementary Ternary Content-Addressable Memory Based on Memristor
Indoor prediction of propagation using dominant path: Study and calibration
A 4096-Channel, 1.13mW/Ch Pixel-Level Driver Circuits for Optical Phased Arrays with 12-Bit R-2R DAC and Cross-Coupled Push-Pull 15Vpp Voltage Output Amplifier
Integrated ESOP Refactoring for Industrial Designs
Design of a double balanced square law CMOS up-conversion mixer with improved input isolation technique for high frequency applications
Mechanical Solution for Out-of-Plane Sensitivity Enhancement of CMOS MEMS Convective Accelerometers
Multimedia extensions for DLX processor
Power-amplifier-inserted Transversal Filter that Recovers Quantization Noise Power by CMOS Rectifier
Decision Making by a Neuromorphic Network of Volatile Resistive Switching Memories
The neuron-bipolar junction transistor (v-BJT)-a new device structure for VLSI neural network implementation
Ultra-low voltage drain-bulk connected MOS transistors in weak and moderate inversion
Newcastle Visual Prosthesis Implantable Control Unit
Genetic algorithm-based power transmission expansion planning
A clock boosting scheme for low voltage circuits
Performance enhancement of single electron junction 1-bit full adder
A Design of An Autoencoder-Based Audio Compression and Decompression System
Ultra low power supply monitor system for embedded applications
Utilizing electromechanical energy harvesting in vehicle suspension vibration damping
Enabling efficient built-in-self-calibration for RFICs
Design of complementary filter pairs with canonical signed-digit coefficients using genetic algorithm
Bifurcation diagrams of the buck converter
An Ultrasound Body Area Network for Arm Gesture Recognition
Rule based classification of sputum images for early lung cancer detection
ASITRON: ASIC for vectorial control of induction motors and speed regulation using fuzzy-logic
A MAC unit with double carry-save scheme suitable for 6-input LUT based reconfigurable systems
Low Power and Stable FinFET SRAM with Static Independent Gate Bias for Enhanced Integration Density
Trust management in opportunistic pervasive healthcare systems
A technique for the identification of trapping sets in LDPC codes
Design of CMOS OTAs with Settling-Time Constraints
Real-time myoelectric control with an Arduino
A Comparative Study of Switchable Capacitor Structures for LC Oscillators in a 28-nm Technology
A 1V micropower FGMOS log-domain filter
Amplifier's predistortion-based linearizers for forward-channel link broadband applications
Low power global shutter CMOS active pixel image sensor with ultra-high dynamic range
An improved inverse neural control structure for nonlinear dynamic systems
Adaptive interference reduction in nerve cuff electrode recordings
Notice of Violation of IEEE Publication PrinciplesRobust nonlinear control applied to traction control of electric vehicles
A Fine-Tuning Phase Shifter with Vector Synthesizer Using 65-nm CMOS for Beamforming in 24-GHz Band
UVM-SystemC-AMS based framework for the correct by construction design of MEMS in their real heterogeneous application context
On the use of dynamic partial reconfiguration for multi-band/multi-standard software defined radio
Total Ionizing Dose Effects in Switched-Capacitor Filters using Oscillation-Based Test
Auxiliary power supply for solid state transformers
Analysis of lock-loss events in discrete-time phase locked loop (PLL)
The comprehensive approach of QoS and the evolution of ACSE protocols in multimedia communications
A Microbolometer-Based Time-to-First-Spike Pixel for Infrared Imaging
Full-wave characterization of open-end and gap discontinuities of coplanar striplines
Automated Synthesis of Asynchronous Tsetlin Machines on FPGA
High frequency log domain all pass filter based on KHN topology
CMOS SOI image sensor
Area time power estimation for FPGA based designs at a behavioral level
Complex Ladder Filter Realizations
FPGA-based programmable digital PLL with very high frequency resolution
Ultra-Low Power Amplifiers for IoT Nodes
New low-power GHz-range resonance-ring ICO/VCO
Digital signal splitting among multiple DACs for analog bandwidth interleaving (ABI)
A novel dual band tunable balanced handset antenna for WLAN application
Synthesizing Efficient Hardware from High-Level Functional Hardware Description Languages
COTS based multichannel FM receiver and recorder using SDR concept
A New On-Chip CMOS Active Balun Integrated With LNA
High-Level Early Power Estimation of FPGA IP Based on Machine Learning
Minimum Signal-To-Noise Ratio For High Classification Radar Accuracy
Code acquisition in CDMA communication system with fictitious pilot signals
Design methodology for a divide-by-4 LC injection-locked frequency divider based on nonlinear analysis
Blind Separation of Cyclo-stationary Signals using Generalized Eigenvalue Approach
Matched filters for identifying failed fuel rods in nuclear reactors
SPADE : analog/digital mixed signal simulator with analog hardware description language
Aging aware safe operating area investigation of switching converter output stages through 2D plots
A high Q RF CMOS differential active inductor
Wideband CMOS analog cells for video and wireless communications
A 32-bit carry lookahead adder design using complementary all-N-transistor logic
Accelerated Piece-Wise-Linear Implementation Of Floating-Point Power Function
Ensemble Transfer Learning for Time Series Forecasting: A Comparative Sensitivity Analysis of Two Shallow Networks
A 130nm CMOS tunable digital frequency divider for dual-band microwave radiometer
Thermo-mechanical analysis of a reconfigurable wafer-scale integrated circuit
A new technique for initializing digital IIR filters at two frequencies
Design of broadband microwave power amplifiers via Fettweis representation of brune functions
Thermal impact of 3D stacking and die thickness: Analysis and characterization of a memory-on-logic 3D circuit
Clocked semi-floating-gate ultra low-voltage current mirror
A very-long instruction word digital signal processor based on the logarithmic number system
Forecasting Global Mean Sea Level Rise using Autoregressive Models
A 14.7GHz wideband 28nm CMOS ring VCO
Fundamental logics based on two phase clocked adiabatic static CMOS logic
A zero-crossing digital phase-locked loop architecture with hyperbolic nonlinearity for high Doppler environments
Adaptive beamforming in CDPD mobile end systems
Design of a CMOS fully differential switched-opamp for SC circuits at very low power supply voltages
Approximate Sorting Check Node Processing in Non-Binary LDPC Decoders
An Integrated Heating and Fluorescence Detection Device for LAMP-Based Microfluidic Point-of-Care Diagnosis of Tuberculosis
Digital sigma delta modulation for on chip signal generation
Stochastic-Computing Based Brainwave LSI Towards an Intelligence Edge
All-Digital-Very-Scalable-ADC TAD Showing Scaling-Effect in 40/16nm-CMOS Technology
Augmentation of Class-E PA Reliability under Load Mismatch Conditions
Band Pass Pseudo Floating-Gate Amplifier
Digitizing The Yuan Tseh Lee Array for Microwave Background Anisotropy by 5Gsps ADC boards
A robust and fast model-based athlete contour tracking in diving videos
The nonlinear-by-singularity systems
A theoretical charge transfer scheme for efficiency optimization of integrated charge pumps
Novel speech spectra all-pole modelling based upon selective even-samples linear prediction
Log-domain filters for low-voltage low-power applications
Matrix-based search of a pair of compatible i-v orientations for the uniqueness analysis of nonlinear resistive circuits
Systematic analogue realisation strategy of exact Hodgkin-Huxley dynamics in MOS weak-inversion
Optimum Sizing and Compensation of Two-Stage CMOS Amplifiers Based On a Time-Domain Approach
18th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2011, Beirut, Lebanon, December 11-14, 2011
Effect of the silicon membrane flatness defect on the piezoresistive pressure sensor response
Analysis of VCO based noise shaping ADCs linearized by PWM modulation
Design and Test of a CMOS MLP Analog Neural Network for Fast On-Board Signal Processing
Impulsive Noise Modelling Using Markov Chains in Indoor - Environment - Comparison With Stochastic Model
Multi-dimensional discrete cosine transform for image compression
Mixed-signal baseband processing chain for a MB-OFDM receiver
A Locally Active Device Model Based on a Minimal 2T1R Circuit
Small power systems fed by hydro, photovoltaic, wind turbines and diesel generators
An low-energy 8T dual-port SRAM for image processor with selective sourceline drive scheme in 28-nm FD-SOI process technology
Formalising VERILOG
2.4 GHz Reconfigurable Low Voltage and Low Power VCO dedicated to Sensor Networks Applications
Java servlet technology for analogue module generation
Model-based design flow for NoC-based MPSoCs
Overview of maximum power point tracking control techniques used in photovoltaic systems
A 500 nA quiescent, 100 mA maximum load CMOS low-dropout regulator
An Extensive Investigation and Analysis of Temperature-to-Digital Converter FoMs
Low Power Non-Recursive Decimation Filters
A 2 pole micromachined bandpass filter at 150 GHz
MNEMOSENE++: Scalable Multi-Tile Design with Enhanced Buffering and VGSOT-MRAM based Compute-in-Memory Crossbar Array
A novel hybrid Photovoltaic/Wave energy utilization system for island electricity
High speed FPGA implementation of RSA encryption algorithm
A 90-nm CMOS resistor-free compact trimmable voltage reference for ultra-low power low cost applications
Estimation of articulatory synthesiser parameters from pseudo-formants
Defect-tolerance design of the high-speed RSA encryption processor with built-in table for residue calculation of redundant binary numbers
Analog sampled data architecture for discrete Hartley transform for prime N
Hardware implementation of fast forwarding engine using standard memory and dedicated circuit
A 0.5V 94dB SNR CT-ΣΔ modulator for implantable and portable biomedical devices
Accurate Analysis of Switching Patterns in High Speed On-chip Global Interconnects
A Low-Power Analog Integrated Decision Tree Classifier Architecture for Apnea-Ecg Detection
An Analog Driver compliant with Supply Voltages exceeding the Ratings of Standard CMOS Processes
Broadband Modelling of a High Efficiency Rectenna for Batteryless RFID Systems
Monolithic integration of mutually injection-locked CMOS-MEMS oscillators for differential resonant sensing applications
A novel and efficient PCM to PWM converter for digital audio amplifiers
Preamplifier Design Strategies for Capacitive Sensing of Electrophysiological Signals
Semi-blind nonstationary channel estimator based on parallel LMS filtering
12th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2005, Gammarth, Tunisia, December 11-14, 2005
Neural Network Autoencoder for Change Detection in Satellite Image Time Series
Analysis of clock jitter effects in wideband sigma-delta modulators for rf-applications
High resolution analog-to-digital converter for low-frequency high-voltage signals
An 8-bit Compact Architecture of Lesamnta-LW Hash Function for Constrained Devices
Efficient modulo 2 N +1 subtractors for weighted operands
Calculation of cycle lengths in higher-order MASH DDSMs with constant inputs
A 1.8 GHz subsampling CMOS downconversion circuit for integrated radio applications
Segmented Exponent Alignment and Dynamic Wordline Activation for Floating-Point Analog CIM Macros
A 10 MHz Relaxation Oscillator with a novel Jitter Suppression Comparator Autozeroing technique
Comparison of accumulation units for analog realizations of a path searcher for a UMTS receiver
Using Hardware Performance Counters to support infield GPU Testing
Design of A/D converters using current-mode standard cells
A study on layout quality of automatic generated cells
Induction machine parameters identification using modified H-G diagram
Real-time FPGA connected component labeling system
Normalized Inductance Modeling for Ferrite Power Inductor Families
An optimally self-biased threshold-voltage extractor
A tracking algorithm suitable for embedded systems implementation
Hardware Aware Spiking Neural Network Training and Its Mixed-Signal Implementation for Non-Volatile In-Memory Computing Accelerators
Design and analysis of multi-core homogeneous systems for energy harvesting applications
On the analog computational characteristics of memristive networks
Characterization test plan for a PCB to DIE transition in a fcCBGA application
1.55-μm Dilute Nitride SOAs with low temperature sensitivity for coolerless on-chip operation
Improvement of the architecture for MEMS resonator quality factor measurement
Exploiting absolute arithmetic for power-efficient sum of absolute differences
A prototype circuit for a smart 3D endoscopic videocapsule based on SVM and stereovision
A general class of passive macromodels for efficient sensitivity analysis of high-speed distributed interconnects with nonlinear terminations
A double-sampling cross noise-coupled split ΣΔ-modulation A/D converter with 80 dB SNR
Two-dimensional analytical threshold voltage model for nanoscale graded channel gate stack DG MOSFETs
Temporal and interactive relations in a multimedia database system
Ultra low voltage transconductance amplifier
Continuous Time Sigma-Delta Modulator with VCO-based integrators and optimized NTF zeros
Generalized symmetric and generalized pseudo-symmetric functions
Bio-Signal Amplifier which Maximizes the Output Voltage Amplitude using Bias Voltage Control Circuit
AUTODDM: automatic characterization tool for the delay degradation model
A new methodology for constraint-driven layout design of analog circuits
Analysis and characterization of mismatches in outphasing transmitter
HEVC Residual Syntax Elements Generation Architecture for High-Throughput CABAC Design
Hardware Architectures for the Generalized Finite Automata Algorithm
A wideband 2-DOF resonator for electromagnetic energy harvesting systems
An energy-aware multiplier based on a Configurable-Reuse of points design methodology
Applications of symbolic network analysis
On phase approximation by gain differences
A Power Switch Size Optimization Strategy for Multi-Switch DC-DC Converters
A 1.6 GHz Non-overlap Clock Generation with Differential Clock Driver and Clock Level Shifters for GS/s Sampling Rate Pipeline ADCs
Comparison of Propagation Models Accuracy for WiMAX on 3.5 GHz
Virtual component IP re-use in telecommunication systems design: a case study of MPEG-2/JPEG2000 encoder
Occupancy Oscillations and Electron Transfer in Multiple-Quantum-Dot Qubits and their Circuit Representation
Rules class approach to scheduling algorithms
Embedded Feedback System for Upper Limb Prosthetics
Behavioral Modeling of The pH-ISFET Temperature Influence
Optimization of pipelined ADC architecture for Monolithic Active Pixel Sensors
Efficient implementation of multiplier-free decimation filters for ΣΔ A/D conversion
Frequency-shift: a way to reduce aliasing in the complex cepstrum
Analysis of Harmonic Distortion in the Colpitts Oscillator
FPGA-implementation of high-speed MLP neural network
A novel algorithm to extract open defects from industrial designs
A computer assisted learning tool for electronic design training
A BTC-based technique for improving image compression
PI-Fuzzy Controller Conception with Design Pattern Based Approach
A 25-Gb/s Low-Power Clock and Data Recovery with an Active-Stabilizing CML-CMOS Conversion
An Implementation of Integrable Low Power Techniques for Modern Cell-Based VLSI Designs
A New Source-Coupled Logic Technique: ALSCL
Exploring Efficient Adder Compressors for Power-Efficient Sum of Squared Differences Design
A 20 Gb/s Half-Rate PAM-4 Clock and Data Recovery with Data Independent Phase Tracking Compensation Technique
3-D adaptive LUM smoother based on reduced set of smoothing levels
Efficient passive energy harvesters at 950 MHz and 2.45 GHz for 100 μW applications in 65 nm CMOS
A new horizontal and vertical common subexpression elimination method for multiple constant multiplication
A CMOS active voltage doubler for a low voltage $100-1000\ \mu \mathrm{W}$ range magnetoelectric energy transducer
Dynamic element matching for pipelined A/D conversion
Optimum clock slope for flip-flops within a clock domain: Analysis and a case study
Internet of Energy (IoE): a Literature Review Study
An intelligent readout integrated circuit (iROIC) with on-chip local gradient operations
A fully integrated Doherty-amplifier for 5.6 GHz WLAN applications
An elliptic threshold signature framework for k-security in wireless sensor networks
Optimized TinyML Models based on Efficient Knowledge Distillation for Textures Classification
Dependability issues in SRAM-based FPGA design
SiGe BiCMOS X-Band integrated radiometer
Semi-custom VLSI design for RNS multipliers using combinational logic approach
Challenges for fully-integrated resonant switched capacitor converters in CMOS technologies
A New Simple UWB Monocycle Pulse Generator
A novel wide-band CMOS current amplifying cell and its application in power supply current monitoring
Starting modeling of the fluorescent lamp using magnetic starter
MPEG-4 Main Profile decoder partitioning with respect to bit stream processing
Parameter Dependent Lyapunov functions for stability of Linear Parameter Varying systems
Systematic design of high-linearity current-mode integrators for low-power continuous-time ΣΔ modulators
A framework for system level low power design space exploration
Stereoscopic image sensor with low-cost RGB filters tunned for the visible range
A Bandwidth Allocation Algorithm for Multiuser OFDM Systems and its Efficient Implementation
Towards AER VITE: Building spike gate signal
Semi-automated software integration using logical specifications: An application to numerical simulation software
Design of low voltage low power dual-band LNA with forward body biasing technique
Low-Power Techniques on a CMOS Vision Sensor Chip for Event Generation by Frame Differencing with High Dynamic Range
Subthreshold passive RFID tag's baseband processor core design with custom modules and cells
A Class AB Programmable Gain Amplifier for an UWB Breast Cancer Detection System
Ontology-Driven Semantic Honeypot with Digital Twin Integration for Context-Aware Cyber Deception in Industrial OT Systems
Inaccurate phase-based disparities removal
Fast and accurate estimation of gain and unity-gain bandwidth of an OpAmp
A comparative study between pre-whitened based sign algorithms in time-varying environments
A comparison between amoled poly-TFT driver circuits
Design of a Multi-State Memristive Memory
Sustainability of Self-Configuring Wireless Sensor Networks
Simplified sympes codec with positive DC offset
Aperiodic filter analysis and design by symbolic computation
Fully integrated ultra-low-power 900 MHz RF transceiver for batteryless wireless microsystems
Filtering transformation in Generalized Quadrature Bandpass Sampling
Time-Multiplexed Flash ADC for Deep Neural Network Analog in-Memory Computing
Robust stochastic controller for a missile guidance system
Steady state analysis of Chua's circuit with RLCG transmission line
Coexistence of attractors in the parallel inductor-capacitor-memristor circuit
Parallelisation of the 1-D block filter algorithm to run on multiple DSPs
A Hardware Library for Sensors/Actuators Interfaces in Sensor Networks
Theoretical and Practical Limits to Sensitivity in IEEE 802.15.4 Receivers
A class of ball-and-bin problems and its application to mesh networks
Gepard: a parameterisable digital signal processor
Local matching properties of switching elements and their influence on the accuracy of switched differential current mirrors
Digital Radio Front-End for High Data Rate Impulse UWB System
Noisy Intermediate Scale Quantum Computers: on the Co-Simulation of Qubits and Control Electronics
RCube: a message routing device using the OMI/HIC high speed link technology
A low-voltage hysteresis comparator for low power applications
An integrated diagnostic reconfiguration (IDR) technique for fault tolerant mixed signal microsystems
A Wide-Range Delay-Locked Loop with a New Lock-Detect Circuit
Feature Extraction for Human-Vehicle Classification in FMCW Radar
An ultra high speed architecture for VLSI implementation of hash functions
Designing platform-based system power management on a smart tablet appliance
Comments on efficient dithering in digital delta-sigma modulator
Optimization of WDM multihop logical topologies
Selective reconstruction of objects from the Radon transform using the generalized instantaneous matched-filter approach
Design of a capacitorless low-dropout voltage regulator with fast load regulation in 130nm CMOS
Current-mode CCII-based biquadratic filters offering electronic frequency shifting
A high-speed fully integrated optical receiver in standard 130nm CMOS
Steady-state time-domain analysis method with variable time step integration
An improved nonlinear analysis & design method of microstrip oscillators based on modern CAD techniques
All digital on-chip temperature sensor using dual ring oscillators
Tutorial 1: Foundations and Practical Design of CMOS Image Sensors
Optimization and hardware implementation of image watermarking for low cost applications
An improved low voltage CMOS current source exploiting positive shunt feedback
Data detection for cooperative vehicular communication systems with unknown channels
Multi-objective optimization of induction motor slot design using finite element method
Integrated stabilized photovoltaic energy harvester
A proposal of avatar language with Lifo for communication through linguistic barrier
Realization of the all-pole third-order transfer function
Low-Power Resistive Associative Processor Implementation Through the Multi-Compare
Signal-to-noise ratio evaluation for embedded wireless sensor nodes: A novel methodology
Analog fault detectability based on statistical circuit analysis
Design and experimental results of a built-in voltage sensor for mixed signal testing
A Modular Electronic Unit for Water Monitoring in Plastic Pipes with Leakage Detection
A Dual-Rate Hybrid DAC for High-Speed 6G Massive MIMO Transceivers
Sensor system with one-chip microsystem