yusuke1997/dblp-id-title huggingface dataset:
Signature multi-mode hardware-based self-test architecture for digital integrated circuits
Strategies for adaptive nonlinear noise reduction Volterra-Wiener filter structure selection
Generalized eigenfunction method for the case of dielectrically loaded antennas
On 60 GHz Solid-State Transformers Designed in 65 nm CMOS Technology
Design of static and dynamic translinear circuits based on CMOS CCII translinear loops
Transition inversion coding with parity check for off-chip serial transmission
Estimation of samples of the derivative of a signal based on the signal difference derivative
Data acquisition based on a single-board computer for a low-frequency optical accelerometer
Design of an on-chip linear-assisted DC-DC voltage regulator
A 1.5 V CMOS voltage multiplier
A method to determine the thermal dependence of large and small signal equivalent circuit parameters of GaAs FETs
3G wireless systems and beyond: a review
High-Precision CMOS Multiplier with Wide Dynamic Range
Procedural analog design automation using building block optimization
A compressive domain saliency-based adaptive measurement method for image recovery
Analog Duty Cycle Controller Using Backgate Body Biasing For 5G Millimeter Wave Applications
A Solar/Thermoelectric/Triboelectric/Vibration/RF Hybrid Energy Harvesting based High Efficiency Wireless Power Receiver
A CMOS readout circuit for a low shunt resistance IR photo-detector
Combination of inductive feedback and shunt peaking (IF+SHP) for bandwidth extension of transimpedance amplifiers
A fully differential CMOS integrated 4th order reconfigurable GM-C lowpass filter for mobile communication
Reducing quantization error in time measurement technique for SPAD readout circuit
DLX HOTOKADA: A design and implementation of a 32-bit dual core capable DLX microprocessor with single level cache
A ROM-less direct digital frequency synthesizer by using trigonometric quadruple angle formula
A 40 GHz Varactor-less Class-C VCO with 17.1% Tuning Range and Long-Term Reliability in 28nm FD-SOI for Satellite Communications
Total Dose Tolerance Analysis of an Optically Reconfigurable Gate Array VLSI
Thermal simulations of multi-chips modules
Design of a QAM receiver with the Kalman algorithm for adaptive carrier synchronization
Analog Circuits for Symbol-Likelihood Computation
Evaluation of All-Pass Reverberators
Early detection of lung cancer based on sputum color image analysis
BiCMOS vs. CMOS Operational Amplifiers for High-Speed Pipelined A/D Converters
A non-coherent multi-band IR-UWB HDR transceiver based on energy detection
MeshCloud: Integrated cloudlet and wireless mesh network for real-time applications
Virtual input queued packet switches with non-uniform arrivals and bursty service
Variable off-Time Peak Current Mode Control (VoT-PCMC) as method for average current regulation in Buck Converter Drivers
Resource Efficient Direct Digital Frequency Synthesizer Architecture on FPGA
Discrete time-frequency (time-scale) techniques for time delay and Doppler estimation
Optimized multistandard RF subsampling radio receiver design
A new adaptive fuzzy FDI method for Bond Graph uncertain parameters systems
Proposal of a Single-Shot Multi-Frame Multi-Frequency CMOS ToF Sensor
A novel approach for reducing the switching activity in two-level logic circuits
A recursive least square algorithm for active noise control based on the Gauss-Seidel method
Design solutions for low-power digital filters
Linear regression techniques for efficient analysis of transistor variability
Pairing frequency experiments in visual cortex reproduced in a neuromorphic STDP circuit
Architecture of the integrated electronics for a wireless endoscopic capsule with locomotive and sensing and actuating capabilities
Impact of gate workfunction fluctuation on FinFET standard cells
Optimal Frequency SSD Matching Using Cosine Kernel
Impulsive noise mitigation for μ-law companded OFDM-based communication system
System-Level Modeling and Safety Analysis of Vehicular Coordinated Emergency Braking Under Degraded Wireless Connectivity Using Priced Timed Automata
Study of the damping processes in thickness shear mode resonator chemical sensors
Integrated high-voltage CMOS mixed-signal instrumentation system for OFET-based gas sensor
A DBOASTBC-OFDM system for wireless communications
System for optimisation of electronic circuits using genetic algorithm
Applying Low Power Techniques in AES MixColumn/InvMixColumn Transformations
Fast Time-Domain Super-Resolution for Single-Shot Multi- Path ToF Imaging
A generalized spline framework for mixed mode signal processing
Discrete-time simulation of arbitrary digital/analog converter waveforms in continuous-time sigma-delta modulators
A comparison of polar transmitter architectures using a GaN HEMT power amplifier
Power efficiency of digit level polynomial basis finite field multipliers in GF(2 283 )
Encapsulated Magnetoelectric Composites for Wirelessly Powered Brain Implantable Devices
Bandwidth optimization of CMOS two-stage operational amplifiers under power consumption and area constraints
New high-Q band-pass filter configuration using current controlled current conveyor based all-pass filters
Electrical characterization of a C-Element with LiChEn
Blind Source Separation Based On Wavelet Signal Representation
Evaluation of NoC on multi-FPGA interconnection using GTX transceiver
Low power neuromorphic hardware based multi-modal authentication system
Reduced complexity comb-filters for decimation and interpolation in mobile communications terminals
A 2GHz 65nm CMOS digitally-tuned BAW oscillator
A mmW low power VCO with high tuning range in 28nm FDSOI CMOS technology
Estimating the design value(s) of the shunt-peaking inductor(s) in CMOS trans-impedance amplifier system by placement of poles and zeros
A digital engineering curriculum with integrated, Windows-based EDA tools
Design Space Exploration of Division over GF(2m) on FPGA: A Digit-Serial Approach
Design and modelling of a voltage controlled N-well resistor using the MOS tunneling diode structure
A 28nm Low-Voltage Digital Power-Amplifier for QAM-256 WIFI Applications in 0.5mm 2 Area w/ 2D Digital-Pre-Distortion and Package Combiner
Defect-Resilient Memristor Crossbar of Hierarchical Temporal Memory (HTM) Spatial Pooling for Near-IoT-Sensor Cognitive Computing
Parallel Robust Absolute Orientation on FPGA for Vision and Robotics
Web-based wireless vehicle control system
A new multi watermarking algorithm based on DWT and hash functions for color satellite images
A Bandpass Filtering Approach Using Commensurate Transmission Lines
Design of a high gain telescopic-cascode operational amplifier based on the ZTC operation condition
Mobility and traffic models for reconfigurable networks of 3rd and 4th generations
SlotFi: A Time Slotted ALOHA Anti-Collision Protocol Using Wi-Fi Envelope Detection
A non-linear model for micropower rectifiers in UHF-band RFIDs
Programmable Motion Estimation architecture
Current-mode digital gates and circuits: concept, design and verification
Power Optimization for Pipelined ADCs with Open-Loop Residue Amplifiers
Performance improvement of UWB autocorrelation receivers by minimizing the energy capture time
Design of a differential chaotic Colpitts oscillator
System-on-a-chip (SoC)-based hardware acceleration for extreme learning machine
Signal identification by nonlinear optimization
Image processing technique for segmenting microstructural porosity of laser-welded thermoplastics
An Efficient Design Procedure for High-Speed Low-Power Dual-Modulus CMOS Prescalers
Jordan features for texture segmentation
An enhanced frequency synthesizer using an analog dual input accumulator
On the use of the redundant wavelet transform for multisensor image fusion
Memory efficient pipelined Viterbi decoder with look-ahead trace back
A BSP performance prediction model for parallel multigrid algorithms
26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, Genoa, Italy, November 27-29, 2019
A reconfigurable low IF-zero IF receiver architecture for multi-standard wide area wireless networks
Wavelet transform in detection of disturbances and harmonics filtering
Automatic Generation of VHDL Code for Self-Timed Circuits from Simulink Specifications
A fully integrated 2 GHz frequency synthesizer
Unified Inductance Calculations for On-Chip Planar Spirals
On Stability of Synchronized van der Pol Oscillators
On the efficacy of sampled-data modelling of switched networks
Hardware radial basis functions neural networks for phoneme recognition
Low power quadrature generation using injection-locked ring oscillator divider
Frequency Domain Investigation of the Indentation Response of a Soft PVDF Based Tactile Sensor
A Wideband 6th Order Programmable Bandpass DEM Implementation for a Nyquist DAC
Quadratic timing objectives for incremental timing-driven placement optimization
Subthreshold passive RF tag's PIE decoder design with wide tolerance and custom ratioed logic cells
An offset and gain calibration method for time-interleaved analog to digital converters
Heuristics for graph decomposition
Electrocardiogram characterization using wavelet analysis
Mitigating the Impact of Variability in NCFET-based Coupled-Oscillator Networks Applications
Energy-efficient ultra-wideband impulse radios for short-range low-data rate communications
Analysis of the inductance and switching frequency trade-off in integrated DC-DC converters
Isolation-Safe Speculative Access Control for Hardware Transactional Memory
Channel Bonding Transceivers for Efficient 100 Gb/s and Beyond Wireless and Plastic Waveguide Communications
An efficient method to perform range analysis for DSP circuits
Frequency-Path Modeling for Three-Longitudinal-Mode Interferometer
21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014, Marseille, France, December 7-10, 2014
Exploiting parallelism to speed up circuit legalization
A Compact TDC-based Quantum Random Number Generator
A Low-Power Embedded System for Real-Time sEMG based Event-Driven Gesture Recognition
Perceptron-based CDMA receiver in non-Gaussian noise
A current mode multilevel memory using flash A/D converters
Low-voltage medium Q-SC filters for high frequency communication applications
A 1.6-nA quiescent current bandgap reference in 130-nm CMOS technology
A 1D Convolutional Neural Network for Heartbeat Classification from Single Lead ECG
A digital baseband for low power FSK based receiver in 65 nm CMOS
Accurate Reconstruction of ECG Signals using Chebyshev Polynomials
A 0.2V 0.97nW 0.011mm 2 Fully-Passive mHBC Tag Using Intermediate Interference Modulation in 65nm CMOS
RF circuits fabricated with CMOS-compatible SiGe HBT process module
Performance analysis of some non-coherent space-time codes
Band-pass continuous-time delta-sigma modulators employing LWR resonators
Fast Design of Reliable, Flexible and High-Speed AWGN architectures with High Level Synthesis
Instantaneous components of power and actual physical phenomena in sinusoidal circuits
A scheduling framework for system-level estimation
Ultra-low power CMOS voltage reference for high temperature applications up to 300°C
Parity Based In-Place FFT Architecture for Continuous Flow Applications
The use of entropy for colour edge detection
A 20 Mb/s 0.084 nJ/bit ISM-band transmitter dedicated to medical sensor networks
Crossbar Memory Architecture Performing Memristor Overwrite Logic
Low pass filter design based on fractional power chebyshev polynomial
A MOS transistor model for peak voltage calculation of crosstalk noise
Dimensionality reduction using asynchronous sampling of first derivative features for real-time and computationally efficient neural spike sorting
Mismatch aware power and area optimization of successive-approximation ADCs
Pattern classification by the time adaptive self-organizing map
Towards real-time neuronal connectivity assessment: A scalable pipelined parallel generalized partial directed coherence engine
A CAD tool for first hand CMOS circuit selection
Novel Current Sensing Circuit for IDDQ Testing
Instruction scheduling for low power on dynamically variable voltage processors
Redundant signed digit coding in binary weighted DACs
AER and dynamic systems co-simulation over Simulink with Xilinx System Generator
Application of neural networks to bearing estimation
Bipolar bootstrapped multi-emitter BiCMOS (B 2 M-BiCMOS) logic for low-voltage applications
High-Voltage (5-Vpp) Driver Monolithically Integrated with Thermally Tunable Optical Ring Resonators in a Silicon Photonics Technology
Prognostics and Health Management Data Handling by Critical Tasks on Multi-Core Platforms
Nonlinear modeling and analysis of buck converter using volterra series
A new methodology for accurate predictive robustness analysis of designs implemented in SRAM-based FPGAs
A multisensor data fusion approach for improving the classification accuracy of uterine EMG signals
An 8-PSK digital phase detection technique for super-regenerative receivers
Behavioural and Electrothermal Modelling of the IGBT for Circuits Simulation
DSP CAVLC implementation and optimization for H.264/AVC baseline encoder
Silicon realization of an OFDM synchronization algorithm
A micro-power 4.8 ppm/°C CMOS voltage reference circuit for linear drop out regulator used in RFID
A simulation study of a dynamic multicast using FEC
Comparison of Hopfield Neural Network and mean shift algorithm in segmenting sputum color images for lung Cancer Diagnosis
A digital processor for full calibration of Pipelined ADCS
Floating-point adaptive filter architectures for the cancelling of harmonics power line interference
ProfCounter: Line-Level Cycle Counter for Xilinx OpenCL High-Level Synthesis
Feature extraction method of fractional cosine and sine transform for speaker recognition
A system level performance model for asynchronous micropipeline circuits
Demodulation of RF signal aggregating four non-contiguous frequency carriers
A test setup for the characterization of Lorentz-force MEMS magnetometers
Multi-agent architecture for intelligent E-learning
An Open Loop Phase Shifter and Frequency Synthesizer
Multibit ΔΣ CMOS DAC employing enhanced noise-shaped DEM architecture
Self-Amplifying Current-Mode Multiplier Design using a Multi-Memristor Crossbar Cell Structure
Structure generation and performance comparison of canonical elliptic G m -C filters
Modeling of suspended coplanar structure in hybrid mode by integral method
Automatic generation of memory consistency tests for chip multiprocessing
Car Radar Transceiver 80GHz Design Improvements Using EM-Cosimulation Flow
A 10 Bit Phase-Interpolator-Based Digital-to-Phase Converter for Accurate Time Synchronization in Ethernet Applications
Efficient Co-Design Methodology combinig Fast and Accurate System-level Simulations with Transistor-level Characterization
Reconfigurable All-band GNSS RF CMOS receiver
An agile matching network using phase detection for antenna tuning
Packet video transmission in an ATM network using forced frame refreshment
The application of multi-valued logic elements "minimum" and "maximum" for processing current signals of sensors
Simple nonlinear large signal MOSFET model parameter extraction for class E amplifiers
Design-oriented characterization of CMOS over the continuum of inversion level and channel length
Peak crosstalk noise estimation in CMOS VLSI circuits
Sub-electron CIS noise analysis in 65 nm process
A New RF SiCMOS SDD Model for Quantifying Individual Contribution to Distortion from Transistor's Nonlinear Parameters
A high-capacity aggregation solution for fiber to the curb and building over XG-PON
The AES in a systolic fashion: Implementation and results of Celator processor
Power-Efficient and Low Latency Implementation of Programmable FIR filters Using Carry-Save Arithmetic
Implementation of static DSP algorithms using multiplexed PE: s
Moving objects detection by block comparison
An integrated digital PWM DC/DC converter
A parallel 3D DCT architecture for the compression of integral 3D images
A low complexity architecture for the cell search applied to the LTE systems
An improved smart readout technique based on temporal redundancies suppression designed for logarithmic CMOS image sensor
Nonlinearities in SC delta-sigma A/D converters
A configurable transmitter architecture & organization for XG-PON OLT/ONU/ONT network elements
Design of doubly complementary filters based on the complex all-pass section
Testing of Level Shifters in Multiple Voltage Designs
A DSP testing approach by modeling the circuit response as a Markov chain
Fully-balanced structures of continuous-time MLF OTA-C filters
Envelope/phase delays correction in an EER radio architecture
Multi-Carrier CDMA-Interconnect for Inter- and Intra-ULSI Communications
Experiments of Electric Vehicle Cart Modeling, Calibration, and Optimization
Charge Scavenging Gate Coupled Hierarchical Bitline Scheme for Ultra-Low Power SRAMs in 65nm LSTP CMOS
40GHZ short pulse clocked optical source based on four-wave mixing in an optical fibre
A high-speed CMOS op-amp design technique using negative Miller capacitance
A texture based multispectral images indexing
A low-power comparator-reduced flash ADC using dynamic comparators
A unified fairness framework in multi-antenna multi-user channels
Importance Sampling Applied to An Optical DS-CDMA System
CubeSats for Future Science and Internet of Space: Challenges and Opportunities
Extremely simple constant-gm technique for low voltage rail-to-rail amplifier input stage
Hardware-Software Co-Design of BIKE with HLS-Generated Accelerators
Weighted sensitivity minimization of MIMO systems with a stable controller: an LFT approach
Self-healing router architecture for reliable network-on-chips
Novel wide voltage range level shifter for near-threshold designs
Modeling Piezoelectric Harvesters under Amplitude and Frequency Modulated Vibrations
Low-power logic styles for full-adder circuits
A multiplierless decimation filter for ΣΔ A/D conversion
Real-time simplified edge detector architecture for 3D-HEVC depth maps coding
On the jitter-to-fast-clock-period ratio in oscillator-based true random number generators
Hardware-Software Co-design of a Dynamically Reconfigurable FPGA-based Fuzzy Logic Controller
Slot fringing effect on the magnetic characteristics of the electrical machines
Modeling and Design of the CMOS Boot-Strapped Inductor for 5-6 GHz Applications
Fully-integrated low-consumption BiFET low-noise amplifier for WCDMA applications
Wireless communication in automation
A 1.5-V, Constant-Gm, Rail-to-Rail Input Stage Operational Amplifier
Optimizing current conveyors by evolutionary algorithms including differential evolution
Hardware Implementation of A Chaotic Pseudo Random Number Generator Based on 3D Chaotic System without Equilibrium
Timing-Driven Redundant Contact Insertion for Standard Cell Yield Enhancement
Optical Label Switching: Design issues, modeling and performance analysis
A powerful algorithm for distribution systems analysis
XG-PON optical network unit downstream FEC design based on truncated Reed-Solomon code
Embedded memory design using memristor: Retention time versus write energy
Unequal processing gain for JPEG2000 image transmission in a CDMA environment
Relation of gap length and resonant frequency about a double-coil drive type IH cooker
Evolutionary tuning method for automatic impedance matching in communication systems
Power optimization of CMOS programmable gain amplifiers with high dynamic range and common-mode feed-forward circuit
Identification of unstable DC operating points
Lyapunov Stability of Hybrid System Limit Cycle Application to the Compass Gait Biped
Efficient nonlinear prediction in ADPCM
Wireless interfacing to cortical neural recording implants using 4-FSK modulation scheme
A novel design and fabrication method of a pyramidal shape chip for scanning micro mirror
Energy-efficient Masking of the Trivium Stream Cipher
Prototype current mode circuits for programmable WTA network
Efficient mapping on FPGA of convolution computation based on combined CSA-CPA accumulator
A spatially reconfigurable fast differential interface for a wafer scale configurable platform
A parallel loaded DC/DC resonant converter with a new power and control circuit
A 32-bit Integer Division Algorithm Based on Priority Encoder
Optimizing Performance of GPU Applications with SM Activity Divergence Minimization
Inductors allow low-voltage performance for IC mixers
1.6-GHz low power low phase noise quadrature phase locked loop with on chip DC-DC converter for wide tuning range
A versatile CMOS fully differential current amplifier
UFRGSPlace: Routability driven FPGA placement algorithm for heterogeneous FPGAs
Equalization in filter bank based multicarrier systems
Very high-speed true random noise generator
Real time hardware implementation of a new Duffing's chaotic attractor
Improvement of illumination artifacts in medical ultrasound images using a biologically based algorithm for compression of wide dynamic range
Robust response design for heterogeneous systems based on metamodels
Simulation of electromagnetic fields in guided wave structures using a quasi-network approach: the frequency-domain transmission line matrix method
Design considerations for high resolution pipeline ADCs in digital CMOS technology
A Versatile Time-Domain Winner-Take-All Spike Decoder for Neuromorphic Systems
Pilot-aided erasure technique to combat impulsive noise in OFDM power line communication system
Advanced timing of level-sensitive sequential circuits
NFIDS: a neuro-fuzzy intrusion detection system
Radoslav Horvat and Mirko Milić, founders of circuit theory in former Yugoslavia
A very high-speed BiCMOS current comparator for use in Viterbi decoders
Utilizing Transmission Lines for Efficient Energy Harvesting in 5G Networks
Low Voltage Programmable Double-Gate MOSFETs Current Mirror and Its Application As Programmable-Gain Current Amplifier
On Reducing the Number of Multiplications in RNS-based CNN Accelerators
FPGA Implementation of IEEE 1588 Protocol for Bluetooth-based Distributed Wireless Systems
Optimization based on surrogate modeling for analog integrated circuits
Implementation of an ICMP-based covert channel for file and message transfer
A low power control system for real-time tuning of a hybrid transformer-based receiver
Efficient routing table minimization for fault-tolerant irregular Network-on-Chip
Design of a class EF2 power oscillator for RF communication application
An Optimized VLSI Exponential Unit Design Exploring Efficient Arithmetic Operation Strategies
CMOS APS photoresponse and crosstalk optimization analysis for scalable CMOS technologies
Definition of an innovative filling structure for digital blocks : the DFM filler cell
Ultra-fine grain reconfigurability using CNTFETs
Propagation delay model of current driven RC chain
Filters for VDSL technology
Power management systems on silicon for portable equipment
State of the art ultra-wideband technology for communication systems: a review
Limitation of SPADs quantum efficiency due to the dopants concentration gradient
Logic design techniques for 65 to 45nm and below for reducing total energy and solving technology variations problems
ISFET Arrays for Lab-on-Chip Technology: A Review
Improved winner-take-all circuit for neural network based on frequency-modulated signals
Compact highly selective passive notch filter for 3.1-5 GHz UWB receiver system
Desynchronizer circuit in SDH system using digital PLL
Low-voltage fully differential CMOS neural amplifier based on CFOA
A design for test technique to increase the resolution of analogue supply current tests
Synthesis and design of a suspended substrate capacitive gap-parallel coupled line bandpass filter with one transmission zero
Framework-based arithmetic core generation to explore ASIC-based parallel binary multipliers
Code generation tools for hardware implementation of FEC circuits
A Low-complexity Wavelet-based Visual Saliency Model to Predict Fixations
Temperature dependence in modeling photovoltaic arrays
A low power NORA circuit design technique based on charge recycling
High-Performance VCO for 5-GHz WLANs in 0.35 μm CMOS Standard Technology
Full-wave analysis of arbitrarily multilayered planar structures by the method of lines