yusuke1997/dblp-id-title huggingface dataset:
Maintaining uniformity in the processes of encryption and decryption with a variable number of encryption rounds
Static analysis of HDL descriptions: Extracting models for verification
FPGA/ARM Design of Multibeam Adaptive Array for GNSS Receiver
Phase Shifter Designs Based on Miniature Couplers
Object-oriented approach to software implementation of virtual laboratory workshop
Parametric Optimization Subsystem in LTspice Environment of Analog Microcircuits for Operation at Low Temperatures
Paradigms for Building Control Systems on Railroad Transport: from the Systems of Electrical Interlocking of Points and Light Signals to Smart Grid Train Movements Controlling Systems
Modular sum codes in building testable discrete systems
An Approach for Increasing Memory Repair Efficiency
Securing test infrastructure of system-on-chips
BBN-based approach for assessment of Smart Grid and nuclear power plant interaction
Conservative finite-difference scheme for the problem of laser pulse propagation in a medium with third-order dispersion
Deriving Distinguishing Sequences for Input/Output Automata
Smart Adjustment Of Transistor Parameters To Reduce Temperature Rise Due To Self-Heating Effect
Fault-Tolerant Synchronous FSM Network Design for Path Delay Faults
Sense Amplifier Design Considering Reliability Issues
Optimal fluctuations for satisfactory performance under parameter uncertainty
High-level test program generation strategies for processors
Digital beamforming in MIMO-radar with frequency diversity
PLL system with a broad band of initial mismatches
Merit based directed random test generation (MDRTG) scheme for combinational circuits
Frequency domain techniques for simulation of oscillators
Test minimization technique for multiple stuck-at faults of combinational circuit
Advancements in Battery State of Charge Estimation Methods for Battery Management Systems: A Comprehensive Literature Review
Integrated up/down switched capacitor converter with full digital feedback control and output voltage regulation
Algorithm for Extraction of the Iris Region in an Eye Image
Engineering-maintenance methods of the calculation xDSL-lines
Intelligent Transport Systems as a Way to Improve the Quality of the Rail-Truck Multimodal Freight Transportation
Fully Integrated Resistance Calibration Method Using Reference Frequency and MOSFET Capacitance
Coupled TCAD-SPICE simulation of parasitic BJT effect on SOI CMOS SRAM SEU
Critical path selection under NBTI/PBTI aging for adaptive frequency tuning
Deriving complete finite tests based on state machines
Impact of Resistive Open and Bridge Defects on the SET Robustness of Standard CMOS Combinational Logic
Fault-tolerant high performance scheme design
The Method of Increasing of CMRR for CJFET Dual Differential Input Stages for the Tasks of Processing Sensor Signals Under Conditions of Cryogenic Temperatures and Penetrating Radiation
Improving reliability for bit parallel finite field multipliers using Decimal Hamming
Analysis of the Application of Type B Correlation in Measurement Uncertainty Evaluation
Practical Investigation on the Distinguishability of Longa's Atomic Patterns
Comparative analysis of coding effectiveness in telecommunication systems with ARQ
Development tools for high-performance computing systems using associative environment for computing process organization
Objects Discernibility Improvement as Part of Unmanned Vessel Control System
Practical Recommendations for Controlling of Angular Displacements of High-Rise and Large Span Elements of Civil Structures
An automated fault injection for evaluation of LUTs robustness in SRAM-based FPGAs
Appraisal of the Effective Number of Bits of the ADC for Sensors with Account for Dynamic Errors
Evaluating the length of distinguishing sequences for nondeterministic Input/Output automata
Generalized faulty block model for automatic test pattern generation
Modeling transistor level masking of soft errors in combinational circuits
Quantum technology for analysis and testing computing systems
A digital implementation of multi-h CPM modem
Broken bar fault diagnosis for induction machines under load variation condition using discrete wavelet transform
The PDCS "Buran" operating efficiency improvement ways
Towards digital circuit approximation by exploiting fault simulation
Assertion based method of functional defects for diagnosing and testing multimedia devices
The hardware architecture and device for accurate time signal processing
ROBDD based path delay fault testable combinational circuit synthesis
A complementary LC-tank based IR-UWB pulse generator for BPSK modulation
An algorithm of timing recovery for modem with M-ary alphabets APK-signals
Automatic locomotive signalization system modification with weight-based sum codes
Advanced scan chain configuration method for broadcast decompressor architecture
Theory of optimal nonlinear filtering in infocommunication's problems
Neighborhood research approach in swarm intelligence for solving the optimization problems
Quantization step dispersion of direct transformation ADC
Optimization of Conditional Diagnostics Algorithms for Railway Electric Switch Mechanism Using the Theory of Questionnaires with Failure Statistics
Variant of wireless MIMO channel security estimation model based on cluster approach
Functional approach in self-timed circuit design
Smart Fabric Thermal Conductivity Modeling
Permanent monitoring of railway overhead catenary poles inclination
DRAM Structure with Prioritized Memory Bank using Multi-VT Bit Cells Architecture
Read access optimization for enhancement of SRAM yield-reliability trade-off
An Approach to Autofocus in Car-borne Radar Imaging Systems
Coding tangible component of transforms to provide accessibility and integrity of video data
Geometrical approach to technical diagnosing of automatons
Length Limiting of Quantum Key Distribution at Two-Stage Synchronization
EDACs and test integration strategies for NAND flash memories
All-Pass Second-Order Active RC-Filter with Pole Q-Factor's Independent Adjustment on Differential Difference Amplifiers
Antenna in Microstrip Version for Use in RFID Applications
Feedback cloud service for the smart cyber university
HotSpot: Visualizing dynamic power consumption in RTL designs
IEEE East-West Design & Test Symposium, EWDTS 2020, Varna, Bulgaria, September 4-7, 2020
Evaluation of resistance of ECC designs protected by different randomization countermeasures against horizontal DPA attacks
Structure of the Transfer Function Numerator Coefficients as One of the Factors of the Structural Precision of IIR Digital Filters
5V tolerant power clamps for mixed-voltage IC's in 65nm 2.5V salicided CMOS technology
Efficient selective compaction and un-compaction of inconsequential logical design units in the schematic representation of a design
Quantum Deterministic Computing
Enabling LOS delay test with slow scan enable
Testing of transport system management strategy
Using metamodel of object system for domain-driven design the database structure
Research of the influence of the analyzed and support sample size on the effectiveness of detection in case of normal law of intensity distribution aberration of the image elements
Generalization of Floor Lifting for QC-LDPC Codes: Theoretical Properties and Applications
Testing logic circuits at different abstraction levels: An experimental evaluation
Squaring in reversible logic using iterative structure
2016 IEEE East-West Design & Test Symposium, EWDTS 2016, Yerevan, Armenia, October 14-17, 2016
Optimization of information - Measuring systems of non-stationary operational regime in multiple measurements mode
Chirp generator based on the binary optical structures
Determination jump monitored parameter using a neural network
Modeling a logical network of relations of semantic items in superphrasal unities
Stable current and voltage generation under process variation
Automatic System of Intelligent Seed Rate Control for Selection Seeders
Verifying Multiple Virtual Networks in Software Defined Networks
Applying parameterized model checking to real-life cache coherence protocols
Qubit Test Synthesis Processor for SoC Logic
Specifics of Error Detection with Modular Sum Codes in Concurrent Error-Detection Circuits Based on Boolean Complement Method
Actual state monitoring of railway switch point blades based on RFID technology
Basic concept of linear synthesis of multi-valued digital structures in linear spaces
OR2-NoC: Offline Robust Routing Algorithm for 2-D Mesh NoCs Architectures
Component architecture with runtime type definition
A mixed HDL/PLI test package
Speed-independent floating point coprocessor
Speed-independent fused multiply add and subtract unit
Evaluating Length of a Shortest Adaptive Homing Sequence for Weakly Initialized FSMs
System of Designing Test Programs and Modeling of the Memory Microcircuits
NBTI mitigation by M-IVC with input duty cycle and randomness constraints
Modification and Optimization of Pollards's Factorization $\rho$-Method by Means of Recursive Algorithm of Number Calculation Factorization
Efficient three-dimensional ray tracing and electromagnetic field intensity estimation algorithm for WLAN
Cyber Physical Social Systems - future of Ukraine
Microprogram control unit with code sharing and extended microinstruction format
The use of Petri nets as the basis of algorithm for gate level digital circuits simulation
Mobile communication system with a hybrid phased array antenna system
Research of the DC-DC converters based on a charge pump for power sources from environment
Measurement-based MOSFET model for helium temperatures
The drivers of the differential communication lines based on radiation-hardened structured array MH2XA010
Protograph Sieving Method for Construction Moderate Length Multi-Edge Type QC-LDPC Codes
Input and Output Generation for the Verification of ALU: A Use Case
Remotely Controlled Experiments on the Basis of Raspberry Pi and openHAB
2018 IEEE East-West Design & Test Symposium, EWDTS 2018, Kazan, Russia, September 14-17, 2018
Malfunctions modeling of converters and homogeneous-chain distributed structure devices
Synthesis of Approximate Combinational Circuits based on Logic Regression Approach
Removing of systematic measurement errors caused by asymmetric distribution law of the noise component
Sampling theorem in frequency domain for the infinite spectrum
Pseudo-Exhaustive Random Access Memory Testing Based on March Tests with Random Background Variation
Development and research of the carrier module and the mezzanine module of angular velocity for the remote control system of the unmanned vessel
Logi-thermal analysis of digital circuits using mixed-signal simulator Questa ADMS
Spam diagnosis infrastructure for individual cyberspace
Evaluation of error effects on a biomedical system
Quantum models for description of digital systems
Some of the New Indicators in Genetic Algorithms for the Traveling Salesman Problem
Modeling linked faults via automata models
Temperature-aware interactive initial placement for integrated circuits
AZMA: A Zynq-Based Monitoring and Fault Injection Framework for Processor Assessment
A data modem for GSM Adaptive Multi Rate voice channel
Real Time Operating System for AVR microcontrollers
High output hamming-distance achievement by a greedy logic masking approach
Comparative Analysis of Noise Reduction Filters for the Quality Enhancement of Mammography Images
Temperature aware test scheduling by modified floorplanning
Comparative analysis of interference immunity of adaptive information transmission system with hybrid spectrum spreading and nonadaptive systems
Analysis of the impact of metastability phenomenon on the latency and power consumption of synchronizer circuits
An EFSM-driven and model checking-based approach to functional test generation for hardware designs
Cell library for speed-independent VLSI
Self-healing capabilities through wireless reconfiguration of FPGAs
Cyber space evolution
Cyber physical system - smart cloud traffic control
Qubit method for diagnosing digital systems
Modelling Error Pulses in a CMOS Triple Majority Gate while Exposed to an Ionizing Particle
The use of natural resources for increasing a checkability of the digital components in safety-critical systems
Combinational circuit check by boolean complement method based on "1-out-of-5" code
Phase pictures of properties of complex objects of technical diagnostics
Decision making in VLSI components placement problem based on grey wolf optimization
Communication interface synthesis from TLM 2.0 to RTL
Monitoring and Control System of Three-Phase Electrical Loads on Railway Trains
ASICPlacementAnalyzer: Software tool for data analysis and visualization of ASIC placement
Diagnosis infrastructure of software-hardware systems
Sensitivity Analysis of the Equivalent Direct Form of IIR Digital Filters
Thermal analysis of the ball grid array packages
Optimizing Components of Multi-Module Systems Based on don't Care Input Sequences
Revolutionizing Industrial IoT with LoRaWAN for Smarter and Greener Industries
Frequency method of measurement of average high temperature in inhomogeneous media
Intelligent Sensor Measurement of GTE Gas Temperature with Thermistors
Configurable architecture for memory BIST
Observability calculation of state variable oriented to robust PDFs and LOC or LOS techniques
Repair of combinational units
Optimized time-delayed feedback control of fractional chaotic oscillator with application to secure communications
Planar Butler Matrix Based on Compact Taps
Grapheme-to-phoneme conversion based on high-order Markov chain for spoken term detection by text query
Concurrent processes synchronisation in statecharts for FPGA implementation
The way of prominent deformation field generation in piezoceramics under the lamb wave motion
9th East-West Design & Test Symposium, EWDTS 2011, Sevastopol, Ukraine, September 9-12, 2011
Reliability Issues in the Parallel Dataflow Computing System
Cloud-driven trafile control: Route service metric
A Journey from STIL to Verilog
Estimation of measurement accuracy the scalar information parameter of the signal under non-Gaussian multiplicative noise with independent values
Using a Tableau Method for Checking the Database Logical Structure Correctness
1.9 GHz 1.05V 16-bit RISC core for high density and low power operation in 28nm technology
Automation of Scheduling for Drivers of the Subway Rolling Stock
Experimental Research of the Mode of Quantum Keys Distribution
Approaches to selection of combinatorial algorithm for optimization in network traffic control of safety-critical systems
Design of nonvolatile memory based on magnetic tunnel junction for special electronic systems
Hybrid pareto-evolutionary algorithm for solving mathematical models of high dimensional electronic circuits (HPEA)
About One Mathematical Model of Project Management
Multifunctional digital microcircuits for standard logic functions implementation developed on the basis of 5521 series gate array
Overview of the prototyping technologies for Actel ® RTAX-S FPGAs
Profiling of MES software requirements for the pharmaceutical enterprise
Self-checking synchronous FSM network design for path delay faults
On-chip measurements of standard-cell propagation delay
Differential Gas Flow Measurement Device with Software Temperature Compensation
Reduction of the memory size in the microprogrammed controllers
Estimation of radio wave frequency shift and phase incursion on the basis of FPGA in the retransmission meter
A Technique for Semiconductor Devices Modeling Using Physical Templates
Complementary JFETs Integrated into the Microwave Complementary Bipolar Double Self-Aligned Technology
Operation of local positioning system for automatic ship berthing
The Automatic Algorithms' Adaptation Method for Embedded Multi-Core Configurations
Expert diagnosis of computer systems using neuro-fuzzy knowledge base
Generating test patterns for sequential circuits using random patterns by PLI functions
Application of Modern Microelectronic Technology in Marshalling Process of Railway Stations
An Analysis of Sampling Effect on the Absolute Stability of Discrete-time Bilateral Teleoperation Systems
Evaluation of Code-Word Subsets to Ensure the Self-Testing Property of a Checker
Parameterized IP Infrastructures for fault-tolerant FPGA-based systems: Development, assessment, case-study
The Study of Dynamic Parameters of Corporate Graphic Stations Using Methods of Adaptive Regression Multi-Parameter Modeling
Quasi-optimal signal demodulation with the background of narrow-band correlated non-Gaussian noise
Qubit description of the functions and structures for computing
Technique to Simulate Oscillator Circuits with the Degradation Models
Big Data Critical Computing Based on the Similarity-Difference Metric
Extending fault periodicity table for testing faults in memories under 20nm
A Processor Optimization Framework for a Selected Application
Spectral efficiency of channel for wireless communication systems with MIMO technology
A novel aging sensor with programmable resolution
A novel process corner detection circuit
Banded correlation matrix model for massive MIMO systems
The formulation of criteria of BIBO stability of 3rd-order IIR digital filters in space of coefficients of a denominator of transfer function
Harmonic Distortions in Analog Interfaces Based on Differential Difference Amplifiers
Assessment of survivability of complex control systems using simulation methods
Compact Digital Orientation Module for Borehole Logging Tools
A sandboxing method to protect cloud cyberspace
Weight-Based Sum Codes Apply Coefficients from Leading Digits with Which the Powers of Two Begin for Calculations Control Organization in Discrete Systems
A new paradigm in design of IIR digital filters
Moral cyber-social computing for state and university
A Simple Model of MESH Routing Protocols
Filtration of Diagnostic Data for Retrospective Analysis in Health Monitoring Systems of Engineering Structures
Research of the speech signal reconstruction at empirical mode decomposition
Systematic Methodology to Design High Precision Voltage References with Sub-ppm/°C Temperature Coefficient
Effect of Narrow-band Noise on Adaptive Signal Processing by Nonlinear Blocks with Quadrature Generators
Software testing of a simple network
Smart traffic light in terms of the cognitive road traffic management system (CTMS) based on the Internet of Things
Using Additive Robust Modeling and Fault Simulation for Laser Ranging Measurements
An approach to testing of planar integrated antennas in frequency range of 5-7 GHz
P/G pad placement optimization in USB test chips
Statistical Investigation of Image Processing Algorithms Characteristics Automation
Statistical Analysis of Discriminators under the Influence of Additive Correlated non-Gaussian Noise Described by Markov Processes
Estimate of the capacity of the closed video channel for the method based on the selection of relevant structural units
Hamming Distance Based Data Correction Combined With Low Power XOR Circuit
Hamming Codes with Check Bits that are Described by Self-Dual and Self-Quasidual Boolean Functions
Compact 2.45 GHz RFID Reader Antenna for IoT Networks
Analysis of converters with heterogeneous three-pole chain structure
2019 IEEE East-West Design & Test Symposium, EWDTS 2019, Batumi, Georgia, September 13-16, 2019
Combinational part structure simplification of fully delay testable sequential circuit
Model and Means of Timed Automata-based Real-time Adaptive Transit Signal Control
A calculation of parasitic signal components digital filtration for the retransmission meter on the basis of FPGA
2014 East-West Design & Test Symposium, EWDTS 2014, Kiev, Ukraine, September 26-29, 2014
Clustered voltage scaling design technique for low-power hashing unit
Multiparametric Optimization and Penalty System in Integrated Circuit Component Placement
Blind carrier frequency offset estimation for QAM signals based on weighted 4 th power of signal samples
Generalized algorithm of building summation codes for the tasks of technical diagnostics of discrete systems
On using ABC for deriving distinguishing sequences for Verilog-descriptions
Development of Resynthesis Flow for Improving Logical Masking Features of Combinational Circuits
Characterization of CMOS sequential standard cells for defect based voltage testing
Test data compression strategy while using hybrid-BIST methodology
The use of redundancy in the structural synthesis of IIR digital filters
Revisiting UVM
TRRR: Accelerated Online Error Detecting and Correcting Fault Tolerant Architecture
Automated flow for test pattern creation for IPs in SoC
Facilitating testability of TLM FIFO: SystemC implementations
Threshold synthesis of digital structures in current-mode logic
Antenna Arrays Calibration Using Recursive Least Squares Adaptive Filtering Algorithms Based on Inverse QR Decomposition
Architecture of built-in self-test and recovery memory chips
Data Compression for Digital Device Diagnosing
A novel high speed residue to binary converter design based on the three-moduli set {2 n , 2 n+1 +1, 2 n+1 -1}
The precision voltage references for the radiation-hardened bi-FET technological process
Improvement of Image Enhancement Technique for Mammography Images
Thermoregulation of Smart Clothing based on Peltier Elements
Design of Logical Control Units Based on Finite State Machines' Patterns
The Reliability Improvement Method of Modern Analog Integrated Circuits
Test Derivation for the Software Defined Networking Platforms: Novel Fault Models and Test Completeness
A comparative analysis of mutation testing tools for Java
Quantum-cryptographic network
Pseudo-exhaustive testing of sequential circuits for multiple stuck-at faults
Investigation of Noise Filtering Methods on Histological Images
Co-Embedding Additional Security Data and Obfuscating Low-Level FPGA Program Code
Transmitter Output Impedance Calibration Method
The positional structural-weight coding of the binary view of transformants
The analysis of two-modulus codes detection ability with summation of unit data bits compared to classical and modified berger codes
Investigation of new NV memory architectures for low duty-cycle embedded systems
CJFET Op-Amp without Current Mirrors for Low Temperature Applications
Test program generation for mixed-signal integrated circuits based on automata network
Automatically-Designed Fault-Tolerant Systems: Failed Partitions Recovery
SOI Instrumentation Amplifier for High-Temperature Applications
On structure of quasi optimal algorithm of analogue circuit designing
Estimation of the Cramer-Rao Bound for Radio Direction-Finding on the Azimuth and Elevation of Planar Antenna Arrays of the Symmetric Form
Accurate Soft Error Rate Reduction using Modified Resolution Method
Resilient Development of Models and Methods in Computing Space
On stability of optimization process for analog circuits
Controlling programmable microcontrollers via QR codes
Polynomial Codes Properties Application in Concurrent Error-Detection Systems of Combinational Logic Devices
Tuning Genetic Algorithm Parameters for Placement of Integrated Circuit Cells
Multiversion parallel synthesis of digital structures based on SystemC specification
A Neuro-Fuzzy edge based spectrum sensing processor for cognitive radios
An IoT based Real-time Data-centric Monitoring System for Vaccine Cold Chain
Virtual tester development using HDL/PLI
Method of Selecting an Optimal Activation Function in Perceptron for Recognition of Simple Objects
Solution of the Dynamic Problem for Optimal Design of Electronic Devices Based On the Gravity Center Method
Decreasing the power consumption of content-addressable memory in the dataflow parallel computing system
Representation of solutions in genetic VLSI placement algorithms
Technology for faulty blocks coverage by spares
Blind Least Mean Square criterion algorithms for communication adaptive arrays
Set-membership Sparsity-Aware Proportionate Normalized Least Mean Square Algorithms for Active Noise Control
Digital converter of frequency deviation based on three frequency generator
Solutions to Problem of CAM Overflow in the Parallel Dataflow Computing System "Buran"
Non-invasive monitoring of blood glucose by means of wearable tracking technology