yusuke1997/dblp-id-title huggingface dataset:
A 312GHz fourth-harmonic voltage-controlled oscillator in 130nm SiGe BiCMOS technology
Realization of Ternary Łukasiewicz Logic using BiFeO3-based Memristive Devices
Integration of WLAN, UMTS and WiMAX in 4G
A full adder based methodology for scaling operation in residue number system
Security of neural cryptography
A probabilistic approach for RT-level power modeling
Using Bluetooth Low Energy to trigger an ultra-low power FSK wake-up receiver
MPEG-4 AVC stream watermarking by ST-mDM techniques
Hardware implementation and power analysis of HWT for medical imaging
Implementation and Synthesis of a Sorting Network
Verilog-A model of ferroelectric memristors dedicated to neuromorphic design
Impedance Adjustment for Constant Efficiency Power Amplifier Applying Stage Bypass Method
Interpolation of low resolution images for improved accuracy in human face recognition
Autonomous readout ASIC with 169dB input dynamic range for amperometric measurement
Digital implementation of cellular neural networks
PSCML: Pseudo-Static Current Mode Logic
Datapath Delay Distributions for Data/Instruction against PVT Variations in 90nm CMOS
A Low-noise Low-Dropout Regulator Using a 28-nm Technology
Improvement of the signal to noise ratio of the magnetic detection system using the geological magnetic filter
Simple reduced-order macromodels with PRIMA
Dynamic Error Correction for Memristive Devices via Passive Resistance-to-Time Encoding
An Iterative Design and Validation Methodology for RISC-V Custom Extension
A Pre-processing Based Real-Time Address Tracer for Embedded Microprocessors
A high-speed DC-DC converter with high efficiency at wide loading range
CMOS pipelined A/D converters with concurrent error detection capability
An FFT Core for DVB-T/DVB-H Receivers
Temperature compensation method for logarithmic CMOS vision sensor using CMOS voltage reference Bandgap technique
Generalized two-port performance evaluation
Application of Diversity Controlled Genetic Algorithms to the Design and Optimization of OTA-C IF Filters
A High Linearity Low Power 130 nm CMOS LNA for Medical Ultrasound Imaging
A symbolic expressions approximation method based on fully symbolic conditions
Thévenin's theorem: a new formulation
A flexible algorithmic ADC for wireless sensor nodes
On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAs
A FET propagation effects
Switched-current elliptic decimators based on bilinear-transformed ladder structures
Feasibility study including detector non-idealities of a 95-GHz CMOS SoC radiometer for passive imaging
2.4 Hz-5 kHz Passband $11.8\ \mu \mathrm{V}_{\text{RMS}}$ Noise Power Neural Amplifier for Brain-Chip Interfaces
New approach of fast ICT and MICT algorithms development
Design and FPGA implementation of digit-serial FIR filters
Two correction schemes for the minimization of the severe non-linear distortion introduced by an ADPCM link
Time-domain equivalent design of continuous-time ΣΔ modulators
An analysis method for the performance comparison of communication systems
Improved Chopper Stabilized Amplifier for Offset and 1/f Noise Cancellation
NORB: A Stream-Based and Non-Blocking FPGA Accelerator for ORB Feature Extraction
Estimation of the transition activity in MAC architectures implementing FIR filters
Performance evaluation of direction finding algorithms for adapative antenna arrays
A 5.2-mW, 2.5-Gb/s Limiting Amplifer for OC-48 SONET Applications
Some studies of European Portuguese nasal vowels using an articulatory synthesizer
AER filtering using GLIDER: VHDL cellular automata description
Iterative Noise-Compensated Method to Improve LPC Based Speech Analysis
A dynamic way cache locking scheme to improve the predictability of power-aware embedded systems
Characterization of a 5 GHz Frequency Divider for a Cryogenic PLL in 22-nm FDSOI
A 1-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOS
Experimental Measurements of an Integrated Hysteretic Controlled Regulating Buck Converter with Capacitively Coupled Bootstrapping
Delta-Sigma Modulator Design Using a Memristive FIR DAC
A variable gain wideband CMOS low-noise amplifier for 75 MHz-3 GHz wireless receivers
Identification of input output bilinear systems using cumulants
A passive CMOS rectifier with leakage current control for medical implants
High-Resolution 1H NMR Micro spectroscopy using an Implantable Micro-coil
Modulation identification of digital M-ary QAM signals by Hilbert-Huang Transform
Human- and Machine-Readable Requirements Formulation for Lab Verification Automation
A 60-90GHz stagger-tuned low-noise amplifier with 1.2dBm OP1dB in 65nm CMOS
Peak power estimation using activity measured on emulator
HDL software development and hardware prototyping of a system-on-chip for an active filter controller
A 1.1 V 82.3dB audio ΔΣ ADC using asynchronous SAR type quantizer
Genetic algorithm based variable ordering of BDDs for multi-level logic optimization with area-power trade-offs
Design and Implementation of Close-loop Detection for Coupled Core Fluxgate Magnetic Sensors
Estimation of harmonic signal in AR noise
Fully differential variable gain instrumentation amplifier based on a fully differential DDA topology
In vivo measurements with a 64-channel extracellular neural recording integrated circuit
Conditional techniques for low power consumption flip-flops
A refinement algorithm for vector quantization codebook design
Classification-based early termination for coding tree structure decision in HEVC
Soft power up | power down on Digital to Analog Converter CMOS65
A High speed, Low Voltage to High Voltage Level Shifter in Standard 1.2V 0.13μm CMOS
Using body bias when upsizing length for maximizing the static noise margins of CMOS gates
Effect of the membrane flatness defect on the offset voltage of a silicon piezoresistive pressure sensor
Noise analysis and optimization of continuous-time active-RC filters
Bifurcation and chaos in the piecewise-linear forced Duffing-van der Pol oscillator with a diode
Analog VLSI implementation of adaptive neuro-fuzzy inference systems
Design and construction of a low cost single-phase induction motor test bench
Comparison of based adaptive predictive schemes for improvement of tracking randomly time-varying systems
Performance analysis of an ATM high-speed network interface
SecurID Authenticator: On the Hardware Implementation Efficiency
A 4mA, 0.25 SiGe, 23GHz BiFET Low Noise Amplifier
N-path frequency down-converter modeling and experimental operating principle validation
An Experimentally-Validated Verilog-A SPAD Model Extracted from TCAD Simulation
In-band microwave video distribution system (IB-MVDS): network architecture
Fault tolerant unicast routing algorithm based on parallel branching method for faulty hypercube
Analysis of the Thermal Impact of Source-Code Transformations in Embedded-Processors
DC-40 GHz amplifier for high-speed optical communications designed with the real frequency technique
Mixed-Mode I/Q mismatches compensation in low-IF quadrature receivers
Method for testing and characterization of analog-digital systems
DE-Link, an antenna pointing system for stratospheric balloons
A MOSFET-only second order delta-sigma modulator for capacitive sensor interfaces
FSK zero-crossing demodulator for 802.15.4 low-cost receivers
Semi-automated analog placement
BiCMOS and CMOS: a long term relation
Influences of minimum cut plane properties on the mincut circuit partitioning problems
Pilot-aided beamforming for OFDM detection over severe multipath fading
Extending the viability of power signature - Based IP watermarking in the SoC era
Novel reconfigurable two-MOSFET UV-programmable floating-gate circuits for CARRY, NAND, NOR or INVERT functions
Fault identification in analog-discrete circuits using general-purpose analysis programs
An improved 2 stage opamp with rail-to-rai! gain-boosted folded cascode input stage and monticelli rail-to-rail class AB output stage
Dynamic range comparison of voltage-mode and current-mode state-space G m -C biquad filters
Design of Self-Sampling Based ASK Demodulator for Implantable Microsystem
Observation of Hamiltonian mechanical systems
A soft IP core generating SoCs for the efficient stochastic simulation of large Biomolecular Networks using FPGAs
A new mixed stable DEM algorithm for bandpass multibit delta sigma ADC
Design of a high linearity Gm stage for a high speed current mode SAR ADC
Implementability restrictions of the beta-CMOS artificial neuron
SoundHint system for blind and partially sightless people
An audio band low voltage CT-ΔΣ modulator with VCO-based quantizer
Medical diagnostic systems using ensembles of neural SOFM classifiers
Fuzzy decision diagram realization by analog CMOS summing amplifiers
Advanced Statistical Methodology for 6T-SRAM Design
A new dynamic differential logic style as a countermeasure to power analysis attacks
Robust Nonlinear Backstepping FTSMC of a Quadrotor UAV-Suspended Load System with Obstacle Avoidance and Swing Attenuation
High speed low complexity radix-16 Max-Log-MAP SISO decoder
Admission control and resource management of uncertain duration traffic in optical networks
Enhanced Endurance and Tunnel Electro-Resistance Ratio for Ferroelectric Tunnel Junctions by Band Engineering
Performance of adaptation algorithms in multipath channel equalization for CDMA systems
CMOS Active Column Sensor for biodetection applications based on Surface Plasmon Resonance
POSFET Based Tactile Sensor Arrays
An adaptive reactance-assisted antenna system for the MIMO uplink
A regularized digital filtering technique for the simultaneous reconstruction of a function and its derivatives
A Particle Detector Based on Pulse Stretching Inverter Chain
Trends in complex SoC Design: From technology variability to multiprocessor architectures
Compact matrix inversion architecture using a single processing element
Semi-quantitative models in hybrid control systems
A low-power fully differential cyclic 9-bit ADC
New area efficient residue-to-weighted number system converters
Wide-band 0.9 GHz to 4 GHz Four-Port Receiver
Fast Secure Communication Establishing Mechanism for Aero-wireless Networks
Study of MAC Effect on Load-Balanced Short-Path Routing Algorithm in Wireless Networks
Design of Phase-Interpolator Based Open-Loop Fractional Output Dividers
Effects of Ge profiles on base transit time and base resistance of SiGe HBT's
An FPGA Implementation of a Scalable Network-on-Chip Based on the Token Ring Concept
A 6.5 nA Static Self-Calibrating Programmable Voltage Reference for Smart SoCs
Energy-Efficiency Exploration of Memory Hierarchy using NVMs for HEVC Motion Estimation
Analysis of transconductances at all levels of inversion in deep submicron CMOS
A scalable synchronous reload technique for wide division range multi modulus dividers
Radio frequency link used in partially-implanted auditory prosthesis
A 0.8 -3.4 GHz, Low-Power and Low-noise RF-to-BB-Current-Reuse Receiver Front-End for Wideband Local and Wide-area IoT Applications
DRX mode implementation based on virtual machine
A CMOS track-and-hold circuit with beyond 30 GHz input bandwidth
A Hardware Accelerator Design for Quaternion to Euler Angles Conversion
Power- and performance-aware IP mapping for NoC-based MPSoC platforms
Tunable Floating-Point for Artificial Neural Networks
Implementation of H.264/AVC baseline profile decoder for mobile video applications
Performance analysis of embedded multiprocessor industrial applications: methodology and tools
Finite alphabet generator with parameterized Markov chain transition matrix
A 2.4 GHz Very Low Phase Noise Fully Integrated Quadrature LC Oscillator
High-speed compressed sensing reconstruction on FPGA using OMP and AMP
Performance of power converters at cryogenic temperatures
A versatile wireless system for real-time telemetry applications
A new method for enhancement of the noisy speech with low SNR
Estimation of coronary artery dimensions using stack filtering approach
Advancing Wound Management with Smart and Sustainable Electronics for a Human-Environment-Centric Society: A Life Cycle Assessment Approach
Underdetermined Direction of Arrival Estimation by Sum and Difference Composite Co-Array
Routing algorithms performance in different routing scopes
Frequency & duty cycle control considerations for soft-switching buck chopper
Path delay fault testing of Benes multistage interconnection networks
Efficient CAD development for emerging technologies using Objective-C and Cocoa
Property-based testability analysis for hierarchical RTL designs
Multisensor data fusion based on the fuzzy neural network in non-destructive testing
A low voltage four-quadrant CMOS analogue multiplier
TiO2 memristor model-based chaotic oscillator
Design of CMOS front-end circuitry for the acquisition of biopotential signals
PVT-Inclusive mmWave IC Sizing Optimizations Boosted by ANN-based Performance Regressors and Transfer Learning
Multiple server WWW-based synthesis of VLSI circuits
Robust control of oscillating NEMS sensors
A High-Linear Low-voltage CMOS Tunable Transconductor for VHF Filtering
Neural network simulator for spatiotemporal pattern analysis
A grey prediction motion estimator for digital image processing
Process-variation tolerant design techniques for multiphase clock generation
Automatic Tuning of Continuous Time Adaptive Bandpass Filter
Use of a statistical model for lip synthesis
Efficient Association of Low and High RF Power Rectifiers for Powering Ultra-Low Power Devices
A novel low power 64-kb SRAM using bit-lines charge-recycling and non-uniform cell scheme
Binary and multi-valued cellular array models of linear distributed parameter systems
An evolutionary algorithm for optimization of power supply systems on multichip modules
Analog computational circuits for neural network implementations
Simulating Memristive Systems in Mixed-Signal Mode using Commercial Design Tools
Optimization of key parameters towards high performance perovskite solar cells
Adaptive slope and threshold companding technique for PAPR reduction in OFDM systems
A 1024-Channel GFET 10-bit 5-kHz 36-μW Read-Out Integrated Circuit for Brain JLECoG
Adaptive digital tanlock loop with no delay
A novel, low voltage, precision CMOS current reference with no external components
On the design of balanced carbon nanotube field-effect transistor gates
A High Dynamic Range Time-Based Edge Detection Algorithm for a Vision Sensor
Brain-inspired pattern classification with memristive neural network using the Hodgkin-Huxley neuron
Hybrid Fixed-point/Binary Convolutional Neural Network Accelerator for Real-time Tactile Processing
Evaluation of screen-printing techniques for embedding ECG sensors in medical devices
On some properties of the convolution algorithms for the thermal analysis of semiconductor devices
Body-Bias Techniques in CMOS 22FDX® for Mixed-Signal Circuits and Systems
Review of the HOLICS Optical Interconnects Programme (ESPRIT III Project 6276)
Fault tolerant register file design for MIPS AES-crypto microprocessor
Analysis of noise parameters sensitivities of microwave amplifiers with respect to bias
A Wearable Backscattering Modulator and RF Energy Harvester for UHF RFID Applications
Performance comparison of wireless networks over IPv6 and IPv4 under several operating systems
Circuit partitioning techniques for power estimation using the full set of input correlations
A frequency based digital background calibration technique for pipelined ADCs
A Dual-Mode 2: 1 Switched Capacitor Converter with >65% Efficiency over 1000x Load Current Range and One Clock Cycle Transient Response
A 1.3mW CMOS 65nm 4 th order 52dB-DR continuous-time analog filter for DVB-T receivers
A modified architecture for Optimal Normal Basis multiplication based on pre-computation
Multilevel beam SOI-MEMS fabrication and applications
Performance of DSSS against Repeater Jamming
A very low-noise low-power integrator for high-resolution ΔΣ modulators
CMOS Realization of a Quantized-Output Classifier Circuit
A new approach for designing a PI controller via variable structure system theory
Evolutionary algorithm for electronic systems partitioning and its applications in VLSI design
Recursive Least-Squares Lattice Adaptive Algorithm Suitable for Fixed-Point Implementation
Optimal design of 6T SRAM bitcells for ultra low-voltage operation
Monolithic buck converter for CMOS process technologies
A Triple Integration Timing Scheme for SPAD Time of Flight Imaging Sensors in 130 nm CMOS
ShortCircuit: An Open-Source ChatGPT Driven Digital Integrated Circuit Front-End Design Automation Tool
Print loop antennas for mobile communications
Digital design with minimal number of scan flip-flops
SOPC-Based Architecture for Discrete Particle Swarm Optimization
Improving the Security of the Shi Reversible Data Hiding Algorithm
A global optimization tool for CMOS logic circuits
Advances in Multi-Gate MOSFET Circuit Design
A high precision and low noise S/H circuit design for video signal sampling
Compressing code for embedded systems
Implementation of current mode circuits for programmable neural network
A novel PC-based firing scheme for static converters using high level language
Design method for CNN Gabor-type filters
Low Power Design in Deep Submicron 65 & 45 nm Technologies
Robust estimation of image fractal dimension based on pyramidal decomposition
Differential current amplifiers with improved dynamic range
New model for arithmetic coding/decoding of multilevel images based on a cache memory
Practical performance of planar spiral inductors
A low-voltage high-frequency integrator for CMOS continuous-time current-mode filters
Contact-Free Vital Sign Estimation Using Ultra-Wide Band Radar
Comparison study between single and differential miniature UWB antenna
Reproducing Aplysia R-15 Bursting Neurodynamics on a Neuromorphic Microchip
Provision of quality of service in open wireless architectures
Sampling based random number generator for stochastic computing
Design of fuel-cell powered DC-DC converter for portable applications in digital CMOS technology
EDMC control design for nonlinear processes with sign changes of steady state gain
Body-Driven Enhanced-Impedance Current Source: An Approach to the Implementation of Low-Voltage Current-Steering D/A Converters
A low loss, low voltage and high Q active inductor with multi-regulated cascade stage for RF applications
N latency 2N I/O-bandwidth 2D-array matrix multiplication algorithm
A Novel 0.6V MCML D-Latch Topology exploiting Dynamic Body Bias Threshold Lowering
Control and acquisition system for a High Dynamic Range CMOS Image Sensor
Efficient low-sensitive selective SC-filters
RF/SS system for wireless local loop
Design of an embedded image acquisition system
Low-Voltage CMOS Bulk-Driven Indirect Current Feedback Instrumentation Amplifier
Automatic system for VLSI on-chip clock synthesizers characterization
Incremental layout-aware analog design methodology
Analysis of Word Line Shaping Techniques for In-Memory Computing in SRAMs
Design and modelling of network on chip interconnects using transmission lines
Radio frequency tunable polyphase filter design
A solar battery charger with maximum power point tracking
Transient current and delay analysis for resistive-open defects in future 16 nm CMOS circuits
A new digital background correction algorithm with non-precision calibration signals for pipelined ADCs
Spin-valve tape heads
A current-mode neuro-fuzzy network
MAC Protocol for Low-Power Real-Time Wireless Sensing and Actuation
Minimum-energy ripple-free dead-beat control of type-I second-order plants
An effective methodology for robust design of monolithic voltage regulators
System-level data-flow transformations for power reduction in image and video processing
Random Number Generator Based on Metastabilities of Ring Oscillators and Irregular Sampling
On efficient CPU-usage in a VLSI CAD-environment with application to circuit partitioning
Performance Comparison of BJT and MOS Devices as Temperature Sensing Elements
Hardware/software co-simulation methodology based on two alternative approaches
A fitness guided mutation operator for improved performance of MOEAs
Nonstationary signal analysis with anti-alias filtering on a two dimensional plane
Constructing Neighbor-Joining phylogenetic trees with reduced redundancy computation
Tunable Fractional-Order Capacitance Multiplier Using Current Gain Adjustment
Pruning-based Neural Network Reduction for Faster Profiling Side-Channel Attacks
Test insertion at the RT level using functional test metrics
Low-power digitally-controlled variable gain LNA with high isolation for sub-GHz ISM bands
A hardware configurable self-organizing map for real-time color quantization
Direct approach to image edge detection using differentiators
A Statistical Timing Model for CMOS Inverter in Near-threshold Region Considering Input Transition Time
Phase-shift errors of a balanced mixer with high level signal
Hardware implementation of IIR digital filters for programmable devices
Phase plane analysis of pulsatile wave measurements in the human arterial system
K-rail diagrams - comprehensive tool for full performance characterization of voltage-controlled oscillators
Simulation of Divider Phase Noise and Spurious Tones in Integer-N PLLs
Accessible approach to wideband matching
3.5-Gb/s extended frequency range wave-pipeline PRBS Generator in 0.18-μm CMOS
A new video noise reduction algorithm using spatial subbands
A new method to stabilize high frequency high gain CMOS LNA
80 GHz VCO with Slow-wave Coplanar Stripline Synthesized Differential Inductor
Behavioral model of magnetic sensors for SPICE simulations
Medical isolation of universal serial bus data signals
High accuracy CMOS capacitance multiplier
Optimal Design Methodology for High-Order Continuous-Time Wideband Delta-Sigma Converters
Context awareness in UbiComp: An IoT oriented distributed architecture
An innovative sub-32nm SRAM voltage sense amplifier in double-gate CMOS insensitive to process variations and transistor mismatch
ECG Signal Classification Using Temporal Convolutional Network
A new theory for equivalence between process specifications
A novel mixed analog/digital MAC unit implemented with SC technique suitable for fully programmable narrow-band FIR filter applications
Principal component analysis by neural network. Application: remote sensing images compression and enhancement
A wind sensor with an integrated low-offset instrumentation amplifier
The general synthesis of complex analogue filters
ECC module optimization for storage transient error-tolerant ASICs
A high performance full pipelined arquitecture of MLP Neural Networks in FPGA
Design of ANSI S1.11 Filter Bank for Digital Hearing Aids
Generalized chaotic maps and elementary functions between analysis and implementation
Design of withdrawal weighted transducer SAW filter for RF wireless applications
Reducing the Power Consumption in Networks-on-Chip through Data Coding Schemes
Shape based alignment of 3-D volume slices
CMOS analog power meter and delay line for automatic efficiency optimization in medical power transmitters
Indirect negative feedback bipolar LNA
New equivalent-step-index method for determination Gaussian deviation of single-mode fibers
Interpolation Based Direct Digital Synthesizer With FMCW Capabilities for Automotive RADAR Applications
Wideband asymmetrical bandpass LC-ladder matching networks for low-noise amplifiers
PMEPR reduction for OFCDM using SLM and PTS
CMOS X-ray Image Sensor Array
On-Chip Power Stage and Gate Driver for Fast Switching Applications
An Indoor Smart Farm Sensor Node with Energy Harvesting System
High-throughput, low complexity, parametrizable VLSI architecture for full search block matching algorithm for advanced multimedia applications
Low actuation voltage silicon carbide RF switches for MEMS above IC
Sense/drive architecture for CMOS-MEMS accelerometers with relaxation oscillator and TDC
Power consumption optimization of 8 bit, 2 MHz voltage scaling subranging CMOS 0.5 μm DAC
Deep Convolutional Neural Network (DCNN) for Skin Cancer Classification
Controlling chaotic nonlinear dynamical systems
Analog Techniques for Low-power High-Performance Switched-Capacitor Sigma-Delta Modulators
Complete time-domain behavioral model of analog to digital converter block using SIMULINK ® for advanced RF receiver architectures