yusuke1997/dblp-id-title huggingface dataset:
Inside windows azure: the challenges and opportunities of a cloud operating system
Target-Aware Implementation of Real Expressions
Segregating Heap Objects by Reference Behavior and Lifetime
CXLfork: Fast Remote Fork over CXL Fabrics
Frugal: Efficient and Economic Embedding Model Training with Commodity GPUs
Helix: Serving Large Language Models over Heterogeneous GPUs and Network via Max-Flow
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024
Coherence decoupling: making use of incoherence
Proceedings of the 1st on Reproducible Quality-Efficient Systems Tournament on Co-designing Pareto-efficient Deep Learning, ReQuEST@ASPLOS 2018, Williamsburg, VA, USA, March 24, 2018
Filtering Translation Bandwidth with Virtual Caching
Merge: a programming model for heterogeneous multi-core systems
SMaCk: Efficient Instruction Cache Attacks via Self-Modifying Code Conflicts
Hector: An Efficient Programming and Compilation Framework for Implementing Relational Graph Neural Networks in GPU Architectures
FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture
Finding the limit: examining the potential and complexity of compilation scheduling for JIT-based runtime systems
Espresso: Brewing Java For More Non-Volatility with Non-volatile Memory
Sidewinder: An Energy Efficient and Developer Friendly Heterogeneous Architecture for Continuous Mobile Sensing
Optimus-CC: Efficient Large NLP Model Training with 3D Parallelism Aware Communication Compression
Underprovisioning backup power infrastructure for datacenters
RECom: A Compiler Approach to Accelerating Recommendation Model Inference with Massive Embedding Columns
Sulong, and Thanks for All the Bugs: Finding Errors in C Programs by Abstracting from the Native Execution Model
Verification of Nondeterministic Quantum Programs
CaQR: A Compiler-Assisted Approach for Qubit Reuse through Dynamic Circuit
Improving GPGPU concurrency with elastic kernels
Accelerating critical section execution with asymmetric multi-core architectures
Failure-Atomic Slotted Paging for Persistent Memory
A regulated transitive reduction (RTR) for longer memory race recording
CORF: Coalescing Operand Register File for GPUs
AttAcc! Unleashing the Power of PIM for Batched Transformer-based Generative Model Inference
One size does not fit all: security hardening of MIPS embedded systems via static binary debloating for shared libraries
Totally green: evaluating and designing servers for lifecycle environmental impact
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, ASPLOS 2023, Vancouver, BC, Canada, March 25-29, 2023
Compiler Chip: A Hardware Implementation of Compiler
Dynamic Resource Management for Efficient Utilization of Multitasking GPUs
3D finite difference computation on GPUs using CUDA
Understanding the propagation of hard errors to software and implications for resilient system design
Jamais vu: thwarting microarchitectural replay attacks
Compiler-Based Prefetching for Recursive Data Structures
Sego: Pervasive Trusted Metadata for Efficiently Verified Untrusted System Services
DMP: deterministic shared memory multiprocessing
Quasar: resource-efficient and QoS-aware cluster management
Heterogeneous-race-free memory models
Synopsis of the ASPLOS '16 Wild and Crazy Ideas (WACI) Invited-Speakers Session
HyperHammer: Breaking Free from KVM-Enforced Isolation
Sharing is leaking: blocking transient-execution attacks with core-gapped confidential VMs
Shredder: Learning Noise Distributions to Protect Inference Privacy
Toward exascale computational science with heterogeneous processing
Measuring GPU Power with the K20 Built-in Sensor
PolyMage: Automatic Optimization for Image Processing Pipelines
An Efficient Cache-Based Access Anomaly Detection Scheme
PATHFINDER: Practical Real-Time Learning for Data Prefetching
FPGA Technology Mapping Using Sketch-Guided Program Synthesis
LTRF: Enabling High-Capacity Register Files for GPUs via Hardware/Software Cooperative Register Prefetching
SIRO: Empowering Version Compatibility in Intermediate Representations via Program Synthesis
Proceedings of 2nd Workshop on General Purpose Processing on Graphics Processing Units, GPGPU 2009, Washington, DC, USA, March 8, 2009
Fair Write Attribution and Allocation for Consolidated Flash Cache
Recovery domains: an organizing principle for recoverable operating systems
HIPStR: Heterogeneous-ISA Program State Relocation
SwapAdvisor: Pushing Deep Learning Beyond the GPU Memory Limit via Smart Swapping
Stochastic superoptimization
Formal Mechanised Semantics of CHERI C: Capabilities, Undefined Behaviour, and Provenance
Analytical characterization and design space exploration for optimization of CNNs
Dilu: Enabling GPU Resourcing-on-Demand for Serverless DL Serving via Introspective Elasticity
Floating-point data compression at 75 Gb/s on a GPU
Asynchronized Concurrency: The Secret to Scaling Concurrent Search Data Structures
DoublePlay: parallelizing sequential logging and replay
pLock: A Fast Lock for Architectures with Explicit Inter-core Message Passing
SpaceJMP: Programming with Multiple Virtual Address Spaces
A Unified Vector/Scalar Floating-Point Architecture
Compilation Consistency Modulo Debug Information
An Integrated Compile-Time/Run-Time Software Distributed Shared Memory System
Orbital Edge Computing: Nanosatellite Constellations as a New Class of Computer System
Robomorphic computing: a design methodology for domain-specific accelerators parameterized by robot morphology
Portability events: a programming model for scalable system infrastructures
Compiler-Directed Page Coloring for Multiprocessors
Exploring GPU architectures to accelerate semantic comparison for intention-based search
Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, ASPLOS 2025, Rotterdam, The Netherlands, 30 March 2025 - 3 April 2025
Quantum Computing is Getting Real: Architecture, PL, and OS Roles in Closing the Gap between Quantum Algorithms and Machines
GSCore: Efficient Radiance Field Rendering via Architectural Support for 3D Gaussian Splatting
Glign: Taming Misaligned Graph Traversals in Concurrent Graph Processing
A GPU-based high-throughput image retrieval algorithm
The Case for a Read Barrier
Learning from mistakes: a comprehensive study on real world concurrency bug characteristics
Brain Inspired Computing
Contrasting Characteristics and Cache Performance of Technical and Multi-User Commercial Workloads
GZKP: A GPU Accelerated Zero-Knowledge Proof System
Mosaic Pages: Big TLB Reach with Small Pages
FITS: Inferring Intermediate Taint Sources for Effective Vulnerability Analysis of IoT Device Firmware
Lifting Assembly to Intermediate Representation: A Novel Approach Leveraging Compilers
Proceedings of the Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS II), Palo Alto, California, USA, October 5-8, 1987
Transparent Runtime Change Handling for Android Apps
HeapMD: identifying heap-based bugs using anomaly detection
RCDC: a relaxed consistency deterministic computer
DLibOS: Performance and Protection with a Network-on-Chip
CRISP: critical slice prefetching
Clobber-NVM: log less, re-execute more
Helper threads via virtual multithreading on an experimental itanium ® 2 processor-based platform
Potluck: Cross-Application Approximate Deduplication for Computation-Intensive Mobile Applications
DAMN: Overhead-Free IOMMU Protection for Networking
Perspective: A Sensible Approach to Speculative Automatic Parallelization
Prophet: Precise QoS Prediction on Non-Preemptive Accelerators to Improve Utilization in Warehouse-Scale Computers
Verifying systems rules using rule-directed symbolic execution
ISOLATOR: dynamically ensuring isolation in comcurrent programs
Learning-based Memory Allocation for C++ Server Workloads
Performance of a Hardware-Assisted Real-Time Garbage Collector
Proactive Runtime Detection of Aging-Related Silent Data Corruptions: A Bottom-Up Approach
GenStore: a high-performance in-storage processing system for genome sequence analysis
AsymNVM: An Efficient Framework for Implementing Persistent Data Structures on Asymmetric NVM Architecture
Producing wrong data without doing anything obviously wrong!
RTL Verification for Secure Speculation Using Contract Shadow Logic
Fast local page-tables for virtualized NUMA servers with vMitosis
Forget Failure: Exploiting SRAM Data Remanence for Low-overhead Intermittent Computation
Slow or Down?: Seem to Be the Same for Cloud Users
Fast Procedure Calls
UBFuzz: Finding Bugs in Sanitizer Implementations
AERO: Adaptive Erase Operation for Improving Lifetime and Performance of Modern NAND Flash-Based SSDs
ABNDP: Co-optimizing Data Access and Load Balance in Near-Data Processing
Whole-system persistence
Per-thread cycle accounting in SMT processors
To hardware prefetch or not to prefetch?: a virtualized environment study and core binding approach
Enabling Lightweight Transactions with Precision Time
Disaggregated RAID Storage in Modern Datacenters
A defect tolerant self-organizing nanoscale SIMD architecture
Split-CNN: Splitting Window-based Operations in Convolutional Neural Networks for Memory System Optimization
Multiple-Block Ahead Branch Predictors
Butterfly analysis: adapting dataflow analysis to dynamic parallel monitoring
AutoTM: Automatic Tensor Movement in Heterogeneous Memory Systems using Integer Linear Programming
Beyond the PDP-11: Architectural Support for a Memory-Safe C Abstract Machine
Research directions for 21st century computer systems: asplos 2013 panel
Optimizing Deep Learning Inference Efficiency through Block Dependency Analysis
Performance-aware Scale Analysis with Reserve for Homomorphic Encryption
Execution migration in a heterogeneous-ISA chip multiprocessor
Verifying Rust Implementation of Page Tables in a Software Enclave Hypervisor
Memory reuse optimizations in the R-Stream compiler
HeteroGen: transpiling C to heterogeneous HLS code with automated test generation and program repair
Design and Evaluation of a Compiler Algorithm for Prefetching
Datasize-Aware High Dimensional Configurations Auto-Tuning of In-Memory Cluster Computing
Building the Reconfigurable Cloud Ecosystem
IOctopus: Outsmarting Nonuniform DMA
Every walk's a hit: making page walks single-access cache hits
Homunculus: Auto-Generating Efficient Data-Plane ML Pipelines for Datacenter Networks
A Case for Lease-Based, Utilitarian Resource Management on Mobile Devices
Static Detection of Event-based Races in Android Apps
Optimizing Deep Learning Inference via Global Analysis and Tensor Expressions
On a General Property of Memory Mapping Tables
LILLIPUT: a lightweight low-latency lookup-table decoder for near-term Quantum error correction
Baymax: QoS Awareness and Increased Utilization for Non-Preemptive Accelerators in Warehouse Scale Computers
Code Generation for Streaming: An Access/Execute Mechanism
PacketMill: toward per-Core 100-Gbps networking
Proceedings of the 2008 ACM SIGPLAN workshop on Memory Systems Performance and Correctness: held in conjunction with the Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS '08), Seattle, Washington, USA, March 2, 2008
Robustness Verification for Checking Crash Consistency of Non-volatile Memory
ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022 - 4 March 2022
Exploiting Dual Data-Memory Banks in Digital Signal Processors
Keynote: Multicore Programming
Stealth prefetching
An Empirical Study of Decentralized ILP Execution Models
TNIC: A Trusted NIC Architecture: A hardware-network substrate for building high-performance trustworthy distributed systems
Eavesdropping user credentials via GPU side channels on smartphones
ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Virtual Event, USA, April 19-23, 2021
AVIO: detecting atomicity violations via access interleaving invariants
Ubik: efficient cache sharing with strict qos for latency-critical workloads
Have things changed now?: an empirical study of bug characteristics in modern open source software
Gamma: leveraging Gustavson's algorithm to accelerate sparse matrix multiplication
VClinic: A Portable and Efficient Framework for Fine-Grained Value Profilers
ExecRecorder: VM-based full-system replay for attack analysis and system recovery
LazyDP: Co-Designing Algorithm-Software for Scalable Training of Differentially Private Recommendation Models
HCloud: Resource-Efficient Provisioning in Shared Cloud Systems
Exploiting Dynamic Thermal Energy Harvesting for Reusing in Smartphone with Mobile Applications
Accelerating the local outlier factor algorithm on a GPU for intrusion detection systems
Orthrus: efficient software integrity protection on multi-cores
BayesPerf: minimizing performance monitoring errors using Bayesian statistics
Snowplow: Effective Kernel Fuzzing with a Learned White-box Test Mutator
SoCFlow: Efficient and Scalable DNN Training on SoC-Clustered Edge Servers
Chameleon: operating system support for dynamic processors
Monitoring and Debugging the Quality of Results in Approximate Programs
MPC-Pipe: an Efficient Pipeline Scheme for Semi-honest MPC Machine Learning
A Technique for Monitoring Run-Time Dynamics of an Operating System and a Microprocessor Executing User Applications
GPUReplay: a 50-KB GPU stack for client ML
Programming Uncertain <T>jhings
On-the-Fly Principled Speculation for FSM Parallelization
Revisiting Log-Structured Merging for KV Stores in Hybrid Memory Systems
WACO: Learning Workload-Aware Co-optimization of the Format and Schedule of a Sparse Tensor Program
Hardware-Software Co-design to Mitigate DRAM Refresh Overheads: A Case for Refresh-Aware Process Scheduling
Revizor: testing black-box CPUs against speculation contracts
Rhythm: harnessing data parallel hardware for server workloads
Sound Loop Superoptimization for Google Native Client
An Experiment to Improve Operand Addressing
A performance counter architecture for computing accurate CPI components
SOFRITAS: Serializable Ordering-Free Regions for Increasing Thread Atomicity Scalably
HybridTier: an Adaptive and Lightweight CXL-Memory Tiering System
Programmer Productivity in a World of Mushy Interfaces: Challenges of the Post-ISA Reality
System Architecture Directions for Networked Sensors
Type inference for unboxed types and first class mutability
SlimSLAM: An Adaptive Runtime for Visual-Inertial Simultaneous Localization and Mapping
Reducing branch divergence in GPU programs
Simulator Independent Coverage for RTL Hardware Languages
Adapting to Network and Client Variability via On-Demand Dynamic Distillation
DAGguise: mitigating memory timing side channels
DecoMine: A Compilation-Based Graph Pattern Mining System with Pattern Decomposition
Using likely invariants for automated software fault localization
Enabling trusted software integrity
The Design of Nectar: A Network Backplane for Heterogeneous Multicomputers
Copper and Wire: Bridging Expressiveness and Performance for Service Mesh Policies
Architecture and design of AlphaServer GS320
SOL: safe on-node learning in cloud platforms
DudeTM: Building Durable Transactions with Decoupling for Persistent Memory
Interleaving: A Multithreading Technique Targeting Multiprocessors and Workstations
Accelerating Multi-Scalar Multiplication for Efficient Zero Knowledge Proofs with Multi-GPU Systems
MP-Rec: Hardware-Software Co-design to Enable Multi-path Recommendation
I/o paravirtualization at the device file boundary
Efficient Debugging Primitives for Multiprocessors
Comprehensive kernel instrumentation via dynamic binary translation
DeepUM: Tensor Migration and Prefetching in Unified Memory
The Guardian Council: Parallel Programmable Hardware Security
Architectural Support for Single Address Space Operating Systems
Necro-reaper: Pruning away Dead Memory Traffic in Warehouse-Scale Computers
Classifying Memory Access Patterns for Prefetching
UTLB: A Mechanism for Address Translation on Network Interfaces
Thesios: Synthesizing Accurate Counterfactual I/O Traces from I/O Samples
AMuLeT: Automated Design-Time Testing of Secure Speculation Countermeasures
Proteus: A High-Throughput Inference-Serving System with Accuracy Scaling
Tradeoffs in Instruction Format Design for Horizontal Architectures
HOTL: a higher order theory of locality
DiGraph: An Efficient Path-based Iterative Directed Graph Processing System on Multiple GPUs
Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, ASPLOS 2025, Rotterdam, Netherlands, 30 March 2025 - 3 April 2025
Pinned loads: taming speculative loads in secure processors
Deterministic galois: on-demand, portable and parameterless
DTC-SpMM: Bridging the Gap in Accelerating General Sparse Matrix Multiplication with Tensor Cores
AUDIBLE: A Convolution-Based Resource Allocator for Oversubscribing Burstable Virtual Machines
Semantic patches for documenting and automating collateral evolutions in Linux device drivers
A program transformation and architecture support for quantum uncomputation
ProteusTM: Abstraction Meets Performance in Transactional Memory
A declarative language approach to device configuration
Power Aware Page Allocation
Skia: Exposing Shadow Branches
Temporally silent stores
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 4, ASPLOS 2024, Hilton La Jolla Torrey Pines, La Jolla, CA, USA, 27 April 2024 - 1 May 2024
Deconstructing storage arrays
CoRAL: Confined Recovery in Distributed Asynchronous Graph Processing
Velosiraptor : Code Synthesis for Memory Translation
Heart: An Operating System Nucleus Machine Implemented by Firmware
Yashme: detecting persistency races
Erms: Efficient Resource Management for Shared Microservices with SLA Guarantees
Scheduling and Page Migration for Multiprocessor Compute Servers
PrimePar: Efficient Spatial-temporal Tensor Partitioning for Large Transformer Model Training
Application-level checkpointing for shared memory programs
Scale-out NUMA
Jaaru: efficiently model checking persistent memory programs
Avoiding Instruction-Centric Microarchitectural Timing Channels Via Binary-Code Transformations
DeNovoSync: Efficient Support for Arbitrary Synchronization without Writer-Initiated Invalidations
Explainable-DSE: An Agile and Explainable Exploration of Efficient HW/SW Codesigns of Deep Learning Accelerators Using Bottleneck Analysis
Invisible bits: hiding secret messages in SRAM's analog domain
CodeCrunch: Improving Serverless Performance via Function Compression and Cost-Aware Warmup Location Optimization
Optimal Kernel Orchestration for Tensor Programs with Korch
SPLENDID: Supporting Parallel LLVM-IR Enhanced Natural Decompilation for Interactive Development
PipeSynth: Automated Synthesis of Microarchitectural Axioms for Memory Consistency
An Event-Triggered Programmable Prefetcher for Irregular Workloads
Efficiently exploring architectural design spaces via predictive modeling
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024
Compiling Loop-Based Nested Parallelism for Irregular Workloads
Optimistic parallelism benefits from data partitioning
Leveraging the VTA-TVM Hardware-Software Stack for FPGA Acceleration of 8-bit ResNet-18 Inference
Automated repair of binary and assembly programs for cooperating embedded devices
MulBERRY: Enabling Bit-Error Robustness for Energy-Efficient Multi-Agent Autonomous Systems
EXAMINER: automatically locating inconsistent instructions between real devices and CPU emulators for ARM
RID: Finding Reference Count Bugs with Inconsistent Path Pair Checking
Devirtualizable virtual machines enabling general, single-node, online maintenance
FSMoE: A Flexible and Scalable Training System for Sparse Mixture-of-Experts Models
CC-NIC: a Cache-Coherent Interface to the NIC
MemSnap μCheckpoints: A Data Single Level Store for Fearless Persistence
Why GPUs are Slow at Executing NFAs and How to Make them Faster
A Performance Evaluation of Optimal Hybrid Cache Coherency Protocols
FaasCache: keeping serverless computing alive with greedy-dual caching
Egalito: Layout-Agnostic Binary Recompilation
OS2G: A High-Performance DPU Offloading Architecture for GPU-based Deep Learning with Object Storage
Instruction scheduling for a tiled dataflow architecture
SUIT: Secure Undervolting with Instruction Traps
Exit-Less, Isolated, and Shared Access for Virtual Machines
MC Mutants: Evaluating and Improving Testing for Memory Consistency Specifications
Software-defined address mapping: a case on 3D memory
Heterogeneous Isolated Execution for Commodity GPUs
Reproducible Containers
Boosted Race Trees for Low Energy Classification
The Intrinsic Bandwidth Requirements of Ordinary Programs
Cornucopia Reloaded: Load Barriers for CHERI Heap Temporal Safety
CaT: A Solver-Aided Compiler for Packet-Processing Pipelines
Harmonia: A Unified Framework for Heterogeneous FPGA Acceleration in the Cloud
Hybrid Static: Dynamic Analysis for Statically Bounded Region Serializability
FlatStore: An Efficient Log-Structured Key-Value Storage Engine for Persistent Memory
LEGO: Empowering Chip-Level Functionality Plug-and-Play for Next-Generation IoT Devices
ConAir: featherweight concurrency bug recovery via single-threaded idempotent execution
Cooperative Graceful Degradation in Containerized Clouds
Manta: Hybrid-Sensitive Type Inference Toward Type-Assisted Bug Detection for Stripped Binaries
A: an assertion language for distributed systems
Guidelines for Creating a Debuggable Processor
Complete information flow tracking from the gates up
CommonGraph: Graph Analytics on Evolving Data
Phoenix: A Substrate for Resilient Distributed Graph Analytics
Supporting Ada Memory Management in the iAPX-432
NVM duet: unified working memory and persistent store architecture
REVAMP: a systematic framework for heterogeneous CGRA realization
PCcheck: Persistent Concurrent Checkpointing for ML
Practical Federated Recommendation Model Learning Using ORAM with Controlled Privacy
Predict; Don't React for Enabling Efficient Fine-Grain DVFS in GPUs
A Cost-Effective, High-Bandwidth Storage Architecture
SYLQ-SV: Scaling Symbolic Execution of Hardware Designs with Query Caching
Autonomous NIC offloads
Scoped Buffered Persistency Model for GPUs
MOAT: Securely Mitigating Rowhammer with Per-Row Activation Counters
Reference History, Page Size, and Migration Daemons in Local/Remote Architectures
Reducing Network Latency Using Subpages in a Global Memory Environment
DarwinGame: Playing Tournaments for Tuning Applications in Noisy Cloud Environments
Effective Null Pointer Check Elimination Utilizing Hardware Trap
Accurate branch prediction for short threads
MERR: Improving Security of Persistent Memory Objects via Efficient Memory Exposure Reduction and Randomization
Propeller: A Profile Guided, Relinking Optimizer for Warehouse-Scale Applications
DeAliaser: alias speculation using atomic region support
An Open-Source Benchmark Suite for Microservices and Their Hardware-Software Implications for Cloud & Edge Systems
Superoptimizer - A Look at the Smallest Program
Uncertain: a first-order type for uncertain data
H-Houdini: Scalable Invariant Learning
GhostRider: A Hardware-Software System for Memory Trace Oblivious Computation
vAttention: Dynamic Memory Management for Serving LLMs without PagedAttention
Efficient Scheduler Live Update for Linux Kernel with Modularization
Blasting through the Front-End Bottleneck with Shotgun
A study of the scalability of stop-the-world garbage collectors on multicores
A framework for dynamically instrumenting GPU compute applications within GPU Ocelot
Effective Concurrency Testing for Distributed Systems
Tela: A Temporal Load-Aware Cloud Virtual Disk Placement Scheme