yusuke1997/dblp-id-title huggingface dataset:
New insight in plasma charging impact on gate oxide breakdown in FDSOI technology
On the Intrinsic and Extrinsic Reliability Challenges of SiC MOSFETs
On the trap assisted stress induced safe operating area limits of AlGaN/GaN HEMTs
Hot carrier induced TDDB in HV MOS: Lifetime model and extrapolation to use conditions
A collective relaxation model for resistance drift in phase change memory cells
Neuromorphic Computation-in-Memory System (Invited)
Accelerator-Based Thermal-Neutron Beam by Compact and Low-Cost Moderator for Soft-Error Evaluation in Semiconductor Devices
Full Understanding of Hot Electrons and Hot/Cold Holes in the Degradation of p-channel Power LDMOS Transistors
A Partially-redundant Flip-flip Suitable for Mitigating Single Event Upsets in a FD-SOI Process with Low Performance Overhead
Reliability Characterization Using Accelerated Methods of 1Tb 9th-Gen VNAND for TLC/QLC applications
Study on the difference between ID(VG) and C(VG) pBTI shifts in GaN-on-Si E-mode MOSc-HEMT
Exploring the border traps near the SiO2-SiC interface using conductance measurements
Experimental Validation of Buffer Traps-Driven Electric Field Dynamics Governing Breakdown and Leakage Trends in AlGaN/GaN Heterostructures
Reliability and Breakdown Study of Erase Gate Oxide in Split-Gate Non-Volatile Memory Device
The effects of radiation on the terrestrial operation of SiC MOSFETs
Back End Of Line opportunities and reliability challenges for future technology nodes
Bias Temperature Instability Depending on Body Bias through Buried Oxide (BOX) Layer in a 65 nm Fully-Depleted Silicon-On-Insulator Process
Time dependent variability in RMG-HKMG FinFETs: Impact of extraction scheme on stochastic NBTI
Backside Die-Edge and Underfill Fillet Cracks Induced by Additional Tensile Stress from Increasing Die-to-Package Ratio in Bare-Die FCBGA
New TDDB lifetime model for AC inverter-like stress in advance FinFET structure
Reliability Characterization for 12 V Application Using the 22FFL FinFET Technology
Techniques for heavy ion microbeam analysis of FPGA SER sensitivty
Reliability and Robustness Performance of 1200 V SiC DMOSFETs
Well-Charging Damage to Capacitors Connected Between VDD and VSS in a Single Power Domain
Unveiling Field Driven Performance Unreliabilities Governed by Channel Dynamics in MoSe2 FETs
Characterizing BTI and HCD in 1.2V 65nm CMOS Oscillators made from Combinational Standard Cells and Processor Logic Paths
A Method of Developing Qualification Plans for Board Products
Impact of Extrinsic Variation Sources on the Device-to-Device Variation in Ferroelectric FET
Insights on Inter-metal Reliability Assessment of High Voltage Interconnects
High Voltage Tolerant Design with Advanced Process for TV Application
Dielectric Reliability Study of 21 nm Pitch Interconnects with Barrierless Ru Fill
Pre-O2 treatment for LNA gate oxide leakage improvement
Correlated Effects of Radiation and Hot Carrier Degradation on the Performance of LDMOS Transistors
Investigation of the bipolar degradation of SiC MOSFET body diodes and the influence of current density
Laboratory X-Ray-Assisted Device Alteration for Fault Isolation and Post-Silicon Debug
Wafer-level electromigration for reliability monitoring: Quick-turn electromigration stress with correlation to package-level stress
GaN MIS-HEMTs in Repetitive Overvoltage Switching: Parametric Shift and Recovery
Threshold Voltage Shift and Its Turnaround of SiC MOSFETs Under Positive and Negative Oxide Electric Field Stresses (Invited)
BTI and HCD Degradation in a Complete 32 × 64 bit SRAM Array - including Sense Amplifiers and Write Drivers - under Processor Activity
Hot Carrier Degradation and performance boost on Si Channel nFET Gate-All-Around Nanosheet Devices
Silicon lifecycle management (SLM) with in-chip monitoring
Estimation of Product Reliability using TDDB Simulation and Statistical EM Method
GHz C-V Characterization Methodology and Its Application for Understanding Polarization Behaviors in High-k Dielectric Films
Duty cycle shift under static/dynamic aging in 28nm HK-MG technology
Impact of Intrinsic Series Resistance on the Reversible Dielectric Breakdown Kinetics in HfO2 Memristors
Electromigration failure rate of redundant via
Alpha soft error rate of FDSOI 28 nm SRAMs: Experimental testing and simulation analysis
Dielectric Relaxation, Aging and Recovery in High-K MIM Capacitors
Evidence for Avalanche Operation in Sub-Micrometer Power GaN HEMTs with p-GaN Gate
Fast, Scalable, and Highly Accurate Thermal Modeling for Use in GaN/GaAs RF Circuit Modeling Platforms
Triggering Optimization on NAND ESD Clamp and Its ESD Protection IO Scheme for CMOS Designs
Stability in Fluorine-Treated Al-Rich High Electron Mobility Transistors with 85% Al-Barrier Composition
Keynote Address 2: "Hybrid memory cube: Achieving high performance and high reliability"
Robustness of GaN Gate Injection Transistors under Repetitive Surge Energy and Overvoltage
Effect of Back Gate on Word Line Disturb Immunity of a Vertical Channel DRAM Cell Array Transistor
A Half-Bit-Per-Cell Strategy for Enhancing Flash Memory Reliability in Harsh Environments
Design-For-Reliability Flow in 7nm Products with Data Center and Automotive Applications
Flight Safety Certification Implications for Complex Multi-Core Processor Based Avionics Systems
Interval time dependent wake-up effect of HfZrO ferroelectric capacitor
2020 IEEE International Reliability Physics Symposium, IRPS 2020, Dallas, TX, USA, April 28 - May 30, 2020
From Emerging Memory to Novel Devices for Neuromorphic Systems: Consequences for the Reliability Requirements of Memristive Devices
Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization
Influence of the magnetic field on dielectric breakdown in memristors based on h-BN stacks
GaN RF HEMT Reliability: Impact of Device Processing on I-V Curve Stability and Current Collapse
A new method for quickly evaluating reversible and permanent components of the BTI degradation
Composition Segregation of Ge-Rich GST and Its Effect on Reliability
Characterization of Backside ESD Impacts on Integrated Circuits
Short-term reliability of high performance Q-band AlN/GaN HEMTs
Load-line Dependent Current Filament Dynamics in N anoscale SCR Devices
Resistive-Gate RAM: An 1TnR Architecture Feasible for Scaling Beyond 16nm CMOS Generation
Evaluating Impact of Information Uncertainties on Component Reliability Assessment
Comprehensive Study for OFF-State Hot Carrier Degrdation of Scaled nMOSFETs in DRAM
Recent Advances and Trends on Automotive Safety : (invited)
Insights into device and material origins and physical mechanisms behind cross temperature in 3D NAND
Prediction of NBTI stress and recovery time kinetics in Si capped SiGe p-MOSFETs
Trap-polarization interaction during low-field trap characterization on hafnia-based ferroelectric gatestacks
Positive Bias Instability in ZnO TFTs with Al2O3 Gate Dielectric
A Physics-based Model for Long Term Data Retention Characteristics in 3D NAND Flash Memory
BEOL Process Development Using Fast Power Cycling on Test Structures
Conductive filaments multiplicity as a variability factor in CBRAM
Machine Learning Based V-ramp VBD Predictive Model Using OCD-measured Fab Parameters for Early Detection of MOL Reliability Risk
Optimized programming algorithms for multilevel RRAM in hardware neural networks
Leakage Current Fluctuation of On/Off-State Stress in 3 nm Process and its Guard-band Compensation
PBTI in InGaAs MOS capacitors with Al2O3/HfO2/TiN gate stacks: Interface-state generation
Failure Analysis of Particle Contamination in Battery
Characterization of Slow Traps in SiGe MOS Interfaces by TiN/Y2O3 Gate Stacks
Defects affecting SiC power device reliability
Trap Behaviors and Degradation Modeling in Positive Bias Temperature Instability of Back Gated IGZO Transistors
Analysis of charge-to-hot-carrier degradation in Ge pFinFETs
Novel Electrical Detection Method for Random Defects on Peripheral Circuits in NAND Flash Memory
Gate-oxide reliability and failure-rate reduction of industrial SiC MOSFETs
Performance and reliability of strained SOI transistors for advanced planar FDSOI technology
Thermal Induced Retention Degradation of RRAM-based Neuromorphic Computing Chips
Reliability characteristics of MIM capacitor studied with ΔC-F characteristics
Process Optimization for HCI Improvement in I/O Analog Devices
Reliability Testing of SiC MOS Devices at 500°C
Electromigration of multi-solder ball test structures
Assessing SiCr resistor drift for automotive analog ICs
IEEE International Reliability Physics Symposium, IRPS 2018, Burlingame, CA, USA, March 11-15, 2018
Current Injection Effect on ESD Behaviors of the Parasitic Bipolar Transistors inside P+/N-well diode
Hot-carrier degradation in single-layer double-gated graphene field-effect transistors
Comprehensive Analysis of RF Hot-Carrier Reliability Sensitivity and Design Explorations for 28GHz Power Amplifier Applications
Investigation of the Impact of Ferroelectricity Boosted Gate Stacks for 3D NAND on Short Time Data Retention and Endurance
Study of Avalanche Behavior in 3 kV GaN Vertical P-N Diode Under UIS Stress for Edge-termination Optimization
Robust Off-State TDDB Reliability of n-LDMOS
Reliability of a 3.3 kV SiC MOSFET .XT
Advanced Characterization of p/n Junctions in SiC
Study of Lower Voltage Protection against Plasma Process Induced Damage by Quantitative Prediction Technique
Impact of Non-ideal Reliability Characteristics of SiOx p-Bit for Complex Optimization Problem Solver
Estimation of SOH Degradation of Coin Cells Subjected to Accelerated Life Cycling with Randomized Cycling Depths and C-Rates
Validating Supply Chain against Recycled COTS ICs using I/O Pad Transistors: A Zero-Area Intrinsic Odometer Approach
Reliability Aspects of SONOS Based Analog Memory for Neuromorphic Computing
Thermomechanical Fatigue in Two Level Cu Interconnects Under Pulsing Peak Current
eNVM MRAM Retention Reliability Modeling in 22FFL FinFET Technology
Carbon electrode for Ge-Se-Sb based OTS selector for ultra low leakage current and outstanding endurance
Characterization of Electron Traps in Gate Oxide of m-plane SiC MOS Capacitors
Impact of Hydrided and Non-Hydrided Materials Near Transistors on Neutron-Induced Single Event Upsets
Reliability of a DME Ru Semidamascene scheme with 16 nm wide Airgaps
Magnetic Immunity Guideline for Embedded MRAM Reliability to Realize Mass Production
Device-aware inference operations in SONOS nonvolatile memory arrays
Dielectric Breakdown in 2D Layered Hexagonal Boron Nitride - The Knowns and the Unknowns
Ultrathin Ferroelectricity and Its Application in Advanced Logic and Memory Devices
Reliability on EUV Interconnect Technology for 7nm and beyond
Product Reliability Methods to Enable High Performance CPU's
Thermal activation of PBTI-related stress and recovery processes in GaN MIS-HEMTs using on-wafer heaters
Interface engineering of ferroelectric negative capacitance FET for hysteresis-free switch and reliability improvement
CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies
Modeling Framework for Transistor Aging Playback in Advanced Technology Nodes
Use of High Voltage OBIRCH Fault Isolation Technique in Failure Analysis of High Voltage IC's
Investigation Into the Moisture Degradation Mechanism of Integrated Stacks Using New Moisture Sensor Design
New Insights into the Random Telegraph Noise (RTN) in FinFETs at Cryogenic Temperature
Improved Silent Data Error Detection Through Test Optimization Using Reinforcement Learning
Frequency and voltage effects on SER on a 65nm Sparc-V8 microprocessor under radiation test
Towards the understanding of ferroelectric-intrinsic variability and reliability issues on MCAM
Accelerated Capture and Emission (ACE) Measurement Pattern for Efficient BTI Characterization and Modeling
Advanced Methods of Detecting Physical Damages in Packaging and BEOL Interconnects
Impact of Read Disturb on Multilevel RRAM based Inference Engine: Experiments and Model Prediction
Investigation of Retention Characteristics in a Triple-level Charge Trap 3D NAND Flash Memory
Bottom-up methodology for predictive simulations of self-heating in aggressively scaled process technologies
Study of a new electromigration failure mechanism by novel test structure
Failure Analysis of 100 nm AlGaN/GaN HEMTs Stressed under On- and Off-State Stress
Advanced Self-heating Model and Methodology for Layout Proximity Effect in FinFET Technology
Using Thermal Reflectance Analysis with the Microsanj for Open Defect Localization
Time-Efficient Characterization of Time-Dependent Gate Oxide Breakdwon Using Tunable Ramp Voltage Stress (TRVS) Method for Automotive Applications
Near Zero Field Magnetoresistance Spectroscopy: A New Tool in Semiconductor Reliability Physics
Comparing Variation-tolerance and SEU/TID-Resilience of Three SRAM Cells in 28nm FD-SOI Technology: 6T, Quatro, and we-Quatro
SOI FinFET soft error upset susceptibility and analysis
Correlation of Dielectric Breakdown and Nanoscale Adhesion in Silicon Dioxide Thin Films
Reliability Assessment of a-IGZO and ZnO Thin Film Transistors (TFTs) to X-ray irradiation
A Comprehensive Hot Carrier Injection with Voltage Ramp Stress (HCI-VRS) through Different Model Verification for More than Moore Diversity Application
A common hard-failure mechanism in GaN HEMTs in accelerated switching and single-pulse short-circuit tests
Advanced Circuit Reliability Verification for Robust Design
MTJ degradation in SOT-MRAM by self-heating-induced diffusion
Temperature and voltage effects on HTRB and HTGB stresses for AlGaN/GaN HEMTs
Wafer Level Approach for the Investigation of the Long-Term Stability of Resistive Platinum Devices at Elevated Temperatures
Machine-learned assessment and prediction of robust solid state storage system reliability physics
Impact of supply voltage and particle LET on the soft error rate of logic circuits
The Impact of Scaling on the Effects of Mixed-Mode Electrical Stress and Ionizing Radiation for 130-nm and 90-nm SiGe HBTs
On the Severity of Self-Heating in FDSOI at Cryogenic Temperatures: In-depth Analysis from Transistors to Full Processor
Space Radiation Effects on SiC Power Device Reliability
Reliability of dual-damascene local interconnects featuring cobalt on 10 nm logic technology
Time dependent dielectric breakdown (TDDB) evaluation of PE-ALD SiN gate dielectrics on AlGaN/GaN recessed gate D-mode MIS-HEMTs and E-mode MIS-FETs
Polarity Dependency and 1/E Model of Gate Oxide TDDB Degradation in 3D NAND
Open Block Characterization and Read Voltage Calibration of 3D QLC NAND Flash
Understanding and Modeling Opposite Impacts of Self-Heating on Hot-Carrier Degradation in n- and p-Channel Transistors
Reliability of MgO in magnetic tunnel junctions formed by MgO sputtering and Mg oxidation
Impact of Anode-side Defect Generation on Inter-Level TDDB Degradation in Cu/Low-k Damascene Structures
Time-integrated photon emission as a function of temperature in 32 nm CMOS
Analog Computing with High Precision and Reliability (Invited)
Threshold Voltage Shift in a-Si: H Thin film Transistors under ESD stress Conditions
Drain-side TDDB for RF applications
Exascale fault tolerance challenge and approaches
NBTI and HCD aware behavioral models for reliability analysis of analog CMOS circuits
Reinforcement Learning System Comprising Resistive Analog Neuromorphic Devices
Electrical method to localize the high-resistance of nanoscale CoSi2 word-line for OTP memories
Investigation of the Electron Trapping in Commercial Thick Silicon Dioxides Thermally Grown on 4H-SiC under the Constant Current Stress
Low-Frequency Noise Characteristics of Ferroelectric Field-Effect Transistors
Mission Profile Clustering Using a Universal Quantile Criterion
Layout Guidelines against Charging Damage from the Well-Side Antennas in Separated Power Domains
A Theoretical Framework for Trap Generation and Passivation in NAND Flash Tunnel Oxide During Distributed Cycling and Retention Bake
A New Approach to Validate GaN FET Reliability to Power-Line Surges Under Use-Conditions
Reliability of 3D NAND Flash for Future Storage Systems (Invited)
Risk Management Informed by an Uncertain Bathtub Curve (Invited)
Impact of Radiation on Negative Capacitance FinFET
Effect of measurement speed (μs-800 ps) on the characterization of reliability behaviors for FDSOI nMOSFETs
Chip Board Package Interaction Reliability for Large Size FCBGA Package
Towards a Universal Model of Dielectric Breakdown
Impact of NBTI on Increasing the Susceptibility of FinFET to Radiation
SiC Power MOSFETs: Designing for Reliability in Wide-Bandgap Semiconductors
A method for rapid screening of various low-k TDDB models
Impact of Temperature on Reliability of MFIS HZO-based Ferroelectric Tunnel Junctions
Soft Error Rate Predictions for Terrestrial Neutrons at the 3-nm Bulk FinFET Technology
V-Ramp VBD Prediction Method Using OCD-Spectrum and Deep-Learning, and Application to Early Detection of V-NAND Low Metal Reliability Risk
Modeling of NBTI Induced Threshold Voltage Shift Based on Activation Energy Maps Under Consideration of Variability
Investigation of Safe Operating Area on 4H-SiC 600V VDMOSFET with TLP and UIS Test Methods
On the Effect of NBTI Induced Aging of Power Stage on the Transient Performance of On-Chip Voltage Regulators
Modelling predictive reliability of Systems embedding EEE parts (Invited): The FIDES method adapted for Space applications
Robust BEOL MIMCAP for Long and Controllable TDDB Lifetime
ESD Avalanche Diodes Degradation in EOS Regime
Estimation of Remaining Useful Life from the Aging Degradation in IC Performance Parameters
An Analytical Model of Transient Response of MEMS under High-G shock for Reliability Assessment
Thermo-Mechanical Reliability Characteristics of 8H HBM3
Investigation on Latch-Up Path Between I/O PMOS and Core PMOS in a 0.18-μm CMOS Process
Radiation Tolerance of 3-D NAND Flash Based Neuromorphic Computing System
Studies of Bias Temperature Instabilities in 4H-SiC DMOSFETs
Overview of Reliability in Scaling Embedded STT-MRAM
Voltage Ramp Stress Test Optimization for Wafer Level Hot Carrier Monitoring in FinFET
BEOL TDDB reliability modeling and lifetime prediction using critical energy to breakdown
Assesment of CPI Stress Impact on IC Reliability and Performance in 2.5D/3D Packages
A Flexible and Inherently Self-Consistent Methodology for MOL/BEOL/MIMCAP TDDB Applications with Excessive Variability-Induced Degradation
Chip-level characterization and RTN-induced error mitigation beyond 20nm floating gate flash memory
Exploring AC Time-Dependent Dielectric Breakdown (TDDB) Through Frequency Noise Analysis
A Novel 'I-V Spectroscopy' Technique to Deconvolve Threshold Voltage and Mobility Degradation in LDMOS Transistors
Insights into metal drift induced failure in MOL and BEOL
Intrinsic mechanism of non-linearity in Weibull TDDB lifetime and its impact on lifetime prediction
Effects of Far-BEOL anneal on the WLR and product reliability characterization of FinFET process technology
Higher performance and improved reliability: Key to making photovoltaics the mainstream sustainable electricity generation source of the 21st Century
Convolution-Based Vth Shift Prediction and the New 9T2C Pixel Circuit in LTPS TFT AMOLED
Low-Side GaN Power Device Dynamic Ron Characteristics Under Different Substrate Biases
Impact of Passive & Active Load Gate Impedance on Breakdown Hardness in 28nm FDSOI Technology
CMOS RF reliability for 5G mmWave applications - Challenges and Opportunities
Do Solar Proton Events Reduce the Number of Faults in Supercomputers?: A Comparative Analysis of Faults During and without Solar Proton Events
Enhancing Bias Stress Stability and VTH Recovery of n-Type SnO2: Ge Thin Film Transistor
Light-Assisted Investigation of the Role of Oxygen Flow during IGZO Deposition on Deep Subgap States and their Evolution Under PBTI
Strategy to Characterize Electromigration Short Length Effects in Cu/low-k Interconnects
Location of Oxide Breakdown Events under Off-state TDDB in 28nm N-MOSFETs dedicated to RF applications
Effects of UBM Thickness and Current Flow Configuration on Electromigration Failure Mechanisms in Solder Interconnects
Study of impact of BTI's local layout effect including recovery effect on various standard-cells in 10nm FinFET
Knowledge Based Qualification for Thermal Interface Material Reliability
Reliability testing for silicon photonics and optoelectronics (Invited)
Backside Alpha-Irradiation Test in Flip-Chip Package in EUV 7 nm FinFET SRAM
Investigation of Gate Leakage Current Behavior for Commercial 1.2 kV 4H-SiC Power MOSFETs
Polarity Dependency of MOL-TDDB in FinFET
IEEE International Reliability Physics Symposium, IRPS 2019, Monterey, CA, USA, March 31 - April 4, 2019
SiGe Gate-All-around Nanosheet Reliability
Threshold voltage bitmap analysis methodology: Application to a 512kB 40nm Flash memory test chip
Cascode GaN Power Transistor Robust for Single Event Burnout Caused by Neutron Irradiation
Early Diagnosis and Prediction of Wafer Quality Using Machine Learning on sub-10nm Logic Technology
Over-Voltage Protection on the CC Pin of USB Type-C Interface against Electrical Overstress Events
Novel High Voltage Bias Temperature Instabilities (HV-BTI) setup to monitor RON/VTH drift on GaN-on-Si E-mode MOSc-HEMTs under drain voltage
Orthorhombic-I Phase and Related Phase Transitions: Mechanism of Superior Endurance $(> 10^{14})$ of HfZrO Anti-ferroelectrics for DRAM Applications
Small Signal Analysis of Degradation and Breakdown in TMD FETs
Comparing the Reliability of Solid-State Drives Based on TLC and QLC NAND Flash Memories (Invited)
Analysis of BTI, SHE Induced BTI and HCD Under Full VG/VD Space in GAA Nano-Sheet N and P FETs
Thermal Considerations on RF Reliability and Aging in SOI CMOS Based Power Amplifiers
Reliability of HfAlOx in multi layered gate stack
Verification of Copper Stress Migration Under Low Temperature Long Time Stress
Repetitive Pulse Testing for LDMOS Transistor Reliability
Comprehensive Analysis of Hole-Trapping in SiN Films with a Wide Range of Time Constants Based on Dynamic C-V
Analysis of the SET and RESET states drift of phase-change memories by low frequency noise measurements
Investigating the Automotive HPC Safety Architecture for Software Defined Vehicle
Failure analysis addressing method of optically undetected defectivity on 4H-SiC PowerMOSFET epitaxial layer
Challenges and solutions to the defect-centric modeling and circuit simulation of time-dependent variability
OFF State Reliability Challenges of Monolayer WS2 FET Photodetector: Impact on the Dark and Photo-Illuminated State
Alternating Temperature Stress and Deduction of Effective Stress Levels from Mission Profiles for Semiconductor Reliability
The Opportunity of Anti-ferroelectrics in FeFET for Emerging Non-Volatile Memory Applications
Extended MTJ TDDB Model, and Improved STT-MRAM Reliability With Reduced Circuit and Process Variabilities
The First Investigation of Switching Lifetime on Parallel-Connected GaN Power Devices
Impact of P/E cycling on read current fluctuation of NOR Flash memory cell: A microscopic perspective based on low frequency noise analysis
Reliability Analysis by Charge Migration of 3D SONOS Flash Memory
Transient self-heating modeling and simulations of back-end-of-line interconnects
Mushroom-Type phase change memory with projection liner: An array-level demonstration of conductance drift and noise mitigation
Enhancement mode gallium nitride transistor reliability
Superior Data Retention of Programmable Linear RAM (PLRAM) for Compute-in-Memory Application
Reliability of an Al2O3/SiO2MIM Capacitor for 180nm (3.3V) Technology
BEoL Reliability, XPS and REELS Study on low-k Dielectrics to understand Breakdown Mechanisms
Combined trap generation and transient trap occupancy model for time evolution of NBTI during DC multi-cycle and AC stress
Scanning NV Microscopy - Tracing Currents at the Nanometer Scale
Gate Reliability of p-GaN Power HEMTs Under Pulsed Stress Condition
µs-Range Evaluation of Threshold Voltage Instabilities of GaN-on-Si HEMTs with p-GaN Gate
Extended TDDB power-law validation for high-voltage applications such as OTP memories in High-k CMOS 28nm FDSOI technology