yusuke1997/dblp-id-title huggingface dataset:
Energy-recycling integrated 6.78-Mbps data 6.3-mW power telemetry over a single 13.56-MHz inductive link
A 18.5-fJ/step VCO-based 0-1 MASH ΔΣ ADC with digital background calibration
A CMOS Molecular Clock Probing 231.061-GHz Rotational Line of OCS with Sub-PPB Long-Term Stability and 66-MW DC Power
A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS
Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers
An 8.5MHz 67.2dB SNDR CTDSM with ELD compensation embedded twin-T SAB and circular TDC-based quantizer in 90nm CMOS
Components for generating and phase locking 390-GHz signal in 45-nm CMOS
A 132 by 104 10μm-Pixel 250μW 1kefps Dynamic Vision Sensor with Pixel-Parallel Noise and Spatial Redundancy Suppression
On-chip measurement of data jitter with sub-picosecond accuracy for 10Gb/s multilane CDRs
A Domino Bootstrapping 12V GaN Driver for Driving an On-Chip 650V eGaN Power Switch for 96% High Efficiency
First InGaAs/InAlAs Single-Photon Avalanche Diodes (SPADs) Heterogeneously Integrated with Si Photonics on SOI Platform for 1550 nm Detection
A transformer-based digital isolator with 20kVPK surge capability and > 200kV/µS Common Mode Transient Immunity
Design and demonstration of reliability-aware Ge gate stacks with 0.5 nm EOT
A 100+ meter 12Gb/s/lane copper cable link based on clock-forwarding
A 198-ns/V VO-hopping reconfigurable RGB LED driver with automatic ΔVO detection and quasi-constant-frequency predictive peak current control
A 12mW all-digital PLL based on class-F DCO for 4G phones in 28nm CMOS
A 0.37-to-46.5GHz frequency synthesizer for software-defined radios in 65nm CMOS
A 21952-Pixel Multi-Modal CMOS Cellular Sensor Array with 1568-Pixel Parallel Recording and 4-Point Impedance Sensing
A 75.8dB-SNDR Pipeline SAR ADC with 2 nd -order Interstage Gain Error Shaping
A 650 pW, -71 dB PSRR, 205°C Temperature Range Hybrid Voltage Reference with Curvature-Based Temperature Compensation and SBFL Techniques
A 65nm Silicon-on-Thin-Box (SOTB) Embedded 2T-MONOS Flash Achieving 0.22 pJ/bit Read Energy with 64 MHz Access for IoT Applications
A 3.5mW 315/400MHz IEEE802.15.6/proprietary mode digitally-tunable radio SoC with integrated digital baseband and MAC processor in 40nm CMOS
Lessons from Loihi: Progress in Neuromorphic Computing
A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS
HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing
A 16-channel 1.1mm 2 implantable seizure control SoC with sub-μW/channel consumption and closed-loop stimulation in 0.18µm CMOS
Multiplex PCR CMOS Biochip for Detection of Upper Respiratory Pathogens including SARS-CoV-2
-197dBc/Hz FOM 4.3-GHz VCO Using an addressable array of minimum-sized nmos cross-coupled transistor pairs in 65-nm CMOS
1.22mW/Gb/s 9.6Gb/s data jitter mixing forwarded-clock receiver robust against power noise with 1.92ns latency mismatch between data and clock in 65nm CMOS
A Machine Learning Inspired Transceiver with ISI-Resilient Data Encoding: Hybrid-Ternary Coding + 2-Tap FFE + CTLE + Feature Extraction and Classification for 44.7dB Channel Loss in 7.3pJ/bit
A 47% access time reduction with a worst-case timing-generation scheme utilizing a statistical method for ultra low voltage SRAMs
A Full HD 60 fps CNN Super Resolution Processor with Selective Caching based Layer Fusion for Mobile Devices
A 500MHz blind classification processor for cognitive radios in 40nm CMOS
A 0.6V 54DB SNR Analog Frontend with 0.18% THD for Low Power Sensory Applications in 65NM CMOS
A 2.7GHz to 7GHz fractional-N LCPLL utilizing multimetal layer SoC technology in 28nm CMOS
A 65nm Image Processing SoC Supporting Multiple DNN Models and Real-Time Computation-Communication Trade-Off Via Actor-Critical Neuro-Controller
A fully integrated 144 MHz wireless-power-receiver-on-chip with an adaptive buck-boost regulating rectifier and low-loss H-Tree signal distribution
A 923 Gbps/W, 113-Cycle, 2-Sbox Energy-efficient AES Accelerator in 28nm CMOS
A 23mW, 73dB dynamic range, 80MHz BW continuous-time delta-sigma modulator in 20nm CMOS
Circuit techniques to overcome Class-D audio amplifier limitations in mobile devices
A 9.35-ENOB, 14.8 fJ/conv.-step fully-passive noise-shaping SAR ADC
A 2144.2-bits/min/mW 5-Heterogeneous PE-based Domain-Specific Reconfigurable Array Processor for 8-Ch Wearable Brain-Computer Interface SoC
A 48 V Input 0.75 V Output DC-DC Converter Power Block for HPC Systems and Datacenters (invited paper)
A 0.4V 2.02fJ/conversion-step 10-bit hybrid SAR ADC with time-domain quantizer in 90nm CMOS
1.8 Mbit/mm 2 ternary-CAM macro with 484 ps search access time in 16 nm Fin-FET bulk CMOS technology
A 260 GHz fully integrated CMOS transceiver for wireless chip-to-chip communication
Bandgap-tunable III-V-OI Photonics Platform with Quantum Well Intermixing for Versatile Active-passive Integration of Chip-scale Photonic Integrated Circuits
A digital bang-bang phase-locked loop with automatic loop gain control and loop latency reduction
A Fast-Beam-Switching 28-GHz Phased-Array Transceiver Supporting Cross-Polarization Leakage Self-Cancellation
A field-programmable mixed-signal IC with time-domain configurable analog blocks
An 8-Element Frequency-Selective Acoustic Beamformer and Bitstream Feature Extractor with 60 Mel-Frequency Energy Features Enabling 95% Speech Recognition Accuracy
A 640×480 Indirect Time-of-Flight CMOS Image Sensor with 4-tap 7-μm Global-Shutter Pixel and Fixed-Pattern Phase Noise Self-Compensation Scheme
A 3.3-GHz 101fsrms-Jitter, -250.3dB FOM Fractional-N DPLL with Phase Error Detection Accomplished in Fully Differential Voltage Domain
A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS
A 36-Channel SPAD-Integrated Scanning LiDAR Sensor with Multi-Event Histogramming TDC and Embedded Interference Filter
Design and Technology Solutions for 3D Integrated High Performance Systems
106 Gb/s PAM-4 Transmitter With 2.1 Vppd Swing in 7nm FinFET Process
320×240 oversampled digital single photon counting image sensor
A 0.4V self-powered CMOS imager with 140dB dynamic range and energy harvesting
A 20GS/s 8b Time-Interleaved Time-Domain ADC with Input-Independent Background Timing Skew Calibration
A dithering-less 54.79-to-63.16GHz DCO with 4-Hz frequency resolution using an exponentially-scaling C-2C switched-capacitor ladder
A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs
2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019
Technology innovations for smart cities
A 2.2μW 600kHz Frequency-Locked Relaxation Oscillator with 0.046%/V Voltage and 48.69ppm/°C Temperature Stability for IoT Sensor Node Applications
A 0.63ps, 12b, synchronous cyclic TDC using a time adder for on-chip jitter measurement of a SoC in 28nm CMOS technology
Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014
A 7.2 mW 75.3 dB SNDR 10 MHz BW CT delta-sigma modulator using Gm-C-based noise-shaped quantizer and digital integrator
A 112-GB/S PAM4 Transmitter in 16NM FinFET
A 10-25MHz, 600mA buck converter using time-based PID compensator with 2µA/MHz quiescent current, 94% peak efficiency, and 1MHz BW
A 960MS/s DAC with 80dB SFDR in 20nm CMOS for multi-mode baseband wireless transmitter
14NM FinFET 1.5MB Embedded High-K Charge Trap Transistor One Time Programmable Memory Using Dynamic Adaptive Programming
A Single-Supply Single-Core Inverse Class-D Digital Power Amplifier with Enhanced Power Back-Off Efficiency Adopting Output Power Scaling Technique
An 18 µW spur canceled clock generator for recovering receiver sensitivity in wireless SoCs
A 114-AF RMS- Resolution 46-NF/10-MΩ -Range Digital-Intensive Reconfigurable RC-to-Digital Converter with Parasitic-Insensitive Femto-Farad Baseline Sensing
Ultra High Power Cooling Solution for 3D-ICs
A 56GHz Receiver Analog Front End for 224Gb/s PAM-4 SerDes in 10nm CMOS
Fully Integrated Electronic-Photonic Ultrasound Receiver Array for Endoscopic Imaging Applications in a Zero-Change 45nm CMOS-SOI Process
A receiver architecture for intra-band carrier aggregation
A 400mV active VMIN, 200mV retention VMIN, 2.8 GHz 64Kb SRAM with a 0.09 um 2 6T bitcell in a 16nm FinFET CMOS process
A 8.7ppm/°C, 694nW, One-Point Calibrated RC Oscillator using a Nonlinearity-Aware Dual Phase-Locked Loop and DSM-Controlled Frequency-Locked Loops
A Feedforward and Feedback Constant-Slope Digital-to-Time Converter in 28nm CMOS Achieving ≤ 0.12% INL/Range over >100mV Supply Range
A wireless power transfer system with enhanced response and efficiency by fully-integrated fast-tracking wireless constant-idle-time control for implants
A multi-chip system optimized for insect-scale flapping-wing robots
Technology innovation in an IoT Era
A 3.07μm 2 /bitcell physically unclonable function with 3.5% and 1% bit-instability across 0 to 80°C and 0.6 to 1.2V in a 65nm CMOS
A 920MHz 16-FSK Receiver Achieving a Sensitivity of -103dBm at 0.6mW Via an Integrated N-Path Filter Bank
A sharp programmable passive filter based on filtering by Aliasing
A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS
A PVT-robust -59-dBc reference spur and 450-fsRMS jitter injection-locked clock multiplier using a voltage-domain period-calibrating loop
12-NM Fin-FET 3.0G-Search/s 80-Bit × 128-Entry Dual-Port Ternary CAM
A 0.2 - 8 MS/s 10b flexible SAR ADC achieving 0.35 - 2.5 fJ/conv-step and using self-quenched dynamic bias comparator
Enhanced Core Circuits for scaling DRAM: 0.7V VCC with Long Retention 138ms at 125°C and Random Row/Column Access Times Accelerated by 1.5ns
A direct AC-DC and DC-DC cross-source energy harvesting circuit with analog iterating-based MPPT technique with 72.5% conversion efficiency and 94.6% tracking efficiency
A 40-MHz 85.8%-peak-efficiency switching-converter-only dual-phase envelope modulator for 2-W 10-MHz LTE power amplifier
An Inverter-Based Analog Front End for a 56 GB/S PAM4 Wireline Transceiver in 16NMCMOS
An event-driven, alias-free ADC with signal-dependent resolution
A 3.7M-pixel 1300-fps CMOS image sensor with 5.0G-pixel/s high-speed readout circuit
A 6.67mW sparse coding ASIC enabling on-chip learning and inference
An integral path self-calibration scheme for a 20.1-26.7GHz dual-loop PLL in 32nm SOI CMOS
A 4.25GHz-4.75GHz calibration-free fractional-N ring PLL using hybrid phase/current-mode phase interpolator with 13.2dB phase noise improvement
A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning
A 270-Ghz Fully-Integrated Frequency Synthesizer in 65nm CMOS
A direct-digitization open-loop gyroscope frontend with +/-8000°/s full-scale range and noise floor of 0.0047°/s/√Hz
A 1.02pJ/b 417Gb/s/mm USR Link in 16nm FinFET
A fully integrated ±5A current-sensing system with ±0.25% gain error and 12μΑ offset from -40°C to +85°C
A 10mm 3 Light-Dose Sensing IoT 2 System With 35-To-339nW 10-To-300klx Light-Dose-To-Digital Converter
A 23mW 24GS/s 6b Time-interleaved hybrid two-step ADC in 28nm CMOS
A 1W 8-ratio switched-capacitor boost power converter in 140nm CMOS with 94.5% efficiency, 0.5mm thickness and 8.1mm 2 PCB area
Self-Regulated Wireless Power and Simultaneous 5MB/S Reverse Data over One Pair of Coils
A 260mV L-shaped 7T SRAM with bit-line (BL) Swing expansion schemes based on boosted BL, asymmetric-VTH read-port, and offset cell VDD biasing techniques
A 32 Gb/s Rx only equalization transceiver with 1-tap speculative FIR and 2-tap direct IIR DFE
An 8b 1GS/s 2.55mW SAR-Flash ADC with Complementary Dynamic Amplifiers
An 88dB SNR, 30µm pixel pitch Infra-Red image sensor with a 2-step 16 bit A/D conversion
A Microwatt-Class Always-On Sensor Fusion Engine Featuring Ultra-Low-Power AOI Clocked Circuits in 14nm CMOS
A 380pW dual mode optical wake-up receiver with ambient noise cancellation
A 110mW, 0.04mm 2 , 11GS/s 9-bit interleaved DAC in 28nm FDSOI with >50dB SFDR across Nyquist
A 6b 46GS/s ADC with >23GHz BW and sparkle-code error correction
220MV-900MV 794/584/754 GBPS/W Reconfigurable GF(2 4 )2 AES/SMS4/Camellia Symmetric-Key Cipher Accelerator in 14NM Tri-Gate CMOS
A 0.04MM 3 16NW Wireless and Batteryless Sensor System with Integrated Cortex-M0+ Processor and Optical Communication for Cellular Temperature Measurement
A 112GB/S PAM4 Wireline Receiver Using a 64-Way Time-Interleaved SAR ADC in 16NM FinFET
A 13.5mA sub-2.5dB NF multi-band receiver
A 400MHz 10Mbps D-BPSK receiver with a reference-less dynamic phase-to-amplitude demodulation technique
5nm Low Power SRAM Featuring Dual-Rail Architecture with Voltage-Tracking Assist Circuit for 5G mobile application
An 8.2 µW 0.14 MM 2 16-Channel CDMA-Like Period Modulation Capacitance-Tu-Diaital Converter with Reduced Data Throuahput
An Energy-Efficient Voltage Step-up System for 3D NAND Flash using Charge-Compensating Regulator
A 146.52 TOPS/W Deep-Neural-Network Learning Processor with Stochastic Coarse-Fine Pruning and Adaptive Input/Output/Weight Skipping
A 0.1pJ/b/dB 1.62-to-10.8Gb/s Video Interface Receiver with Fully Adaptive Equalization Using Un-Even Data Level
A fully-digital phase-locked low dropout regulator in 32nm CMOS
Fully integrated DC-DC converter and a 0.4V 32-bit CPU with timing-error prevention supplied from a prototype 1.55V Li-ion battery
Embedded PCM macro for automotive-grade microcontroller in 28nm FD-SOI
DepFiN: A 12nm, 3.8TOPs depth-first CNN processor for high res. image processing
A 5Gb/s/pin 16Gb LPDDR4/4X Reconfigurable SDRAM with Voltage-High Keeper and a Prediction-based Fast-tracking ZQ Calibration
A Cloud-ready Scalable Annealing Processor for Solving Large-scale Combinatorial Optimization Problems
1.03pW/b Ultra-Low Leakage Voltage-Stacked SRAM for Intelligent Edge Processors
Hardware-Enabled Artificial Intelligence
A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither
A CMOS Image Sensor and an AI Accelerator for Realizing Edge-Computing-Based Surveillance Camera Systems
A 28-GHz Phased-Array Relay Transceiver for 5G Network Using Vector-Summing Backscatter with 24-GHz Wireless Power and LO Transfer
Integrated all-silicon thin-film power electronics on flexible sheets for ubiquitous wireless charging stations based on solar-energy harvesting
A 4.8GB/s 256Mb(x16) Reduced-Pin-Count DRAM and Controller Architecture (RPCA) to Reduce Form-Factor & Cost for IOT/Wearable/TCON/Video/AI-Edge Systems
A1920 × 1080 25FPS, 2.4TOPS/W Unified Optical Flow and Depth 6D Vision Processor for Energy-Efficient, Low Power Autonomous Navigation
Nanostructured CMOS wireless ultra-wideband label-free DNA analysis SoC
A 65nm 16kb SRAM with 131.5pW Leakage at 0.9V for Wireless IoT Sensor Nodes
An Artificial Iris ASIC with High Voltage Liquid Crystal Driver, 10 nA Light Range Detector and 40 nA Blink Detector for LCD Flicker Removal
A 0.8V 82.9µW In-Ear BCI Controller System with 8.8 PEF EEG Instrumentational Amplifier and Wireless BAN Transceiver
Sensor-hub sweet-spot analysis for ultra-low-power always-on operation
Circuits evening panel discussion 2: Wearable electronics: Still an oasis or just a mirage for the semiconductor industry?
7-bit 0.8-1.2GS/s Dynamic Architecture and Frequency Scaling subrange ADC with binary-search/flash Live Configuring Technique
Custom Silicon and Sensors Developed for a 2nd Generation Mixed Reality User Interface
A Digital-Intensive 2-to-9.2 GB/S/Pin Memory Controller I/O with Fast-Response LDO in 10NM CMOS
A clock jitter reduction circuit using gated phase blending between self-delayed clock edges
An 113DB-Link-Budget Bluetooth-5 SoC with an 8dBm 22%-Efficiency TX
A 0.78mW/cm 2 autonomous thermoelectric energy-harvester for biomedical sensors
A compact 446 Gbps/W AES accelerator for mobile SoC and IoT in 40nm
A fully integrated IEEE 802.15.7 visible light communication transmitter with on-chip 8-W 85% efficiency boost LED driver
A quad-channel 112-128 Gb/s coherent transmitter in 40 nm CMOS
An implantable continuous glucose monitoring microsystem in 0.18µm CMOS
A 50.7dB-DR Finger-Resistance Extractable Multi-Touch Sensor IC Achieving Finger-Classification Accuracy of 97.7% on 6.7-Inch Capacitive Touch Screen Panel
A Low Noise Read-Out IC with Gate Driver for Full Front Display Area Optical Fingerprint Sensors
A PVT-variation tolerant fully integrated 60 GHz transceiver for IEEE 802.11ad
A 125 mW 8.5-11.5 Gb/s serial link transceiver with a dual path 6-bit ADC/5-tap DFE receiver and a 4-tap FFE transmitter in 28 nm CMOS
A 435MHz, 2.5Mbps/W Side-Channel-Attack Resistant Crypto-Processor for Secure RSA-4K Public-Key Encryption in 14nm CMOS
SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency
A 1070 pJ/b 169 Mb/s Quad-core Digital Baseband SoC for Distributed and Cooperative Massive MIMO in 28 nm FD-SOI
18μW SoC for near-microphone Keyword Spotting and Speaker Verification
An 8nm All-Digital 7.3Gb/s/pin LPDDR5 PHY with an Approximate Delay Compensation Scheme
7.4μW Ultra-high slew-rate pseudo single-stage amplifier driving 0.1-to-15nF capacitive load with >69° phase margin
A -70dBm-sensitivity 522Mbps 0.19nJ/bit-TX 0.43nJ/bit-RX transceiver for TransferJet™ SoC in 65nm CMOS
An 8.865-GHz -244dB-FOM high-frequency piezoelectric resonator-based cascaded fractional-N PLL with sub-ppb-order channel adjusting technique
A 56-Gb/s receiver front-end with a CTLE and 1-tap DFE in 20-nm CMOS
A 0.5-28GB/S Wireline Tranceiver with 15-Tap DFE and Fast-Locking Digital CDR in 7NM FinFET
A Quasi-Digital Ultra-Fast Capacitor-Less Low-Dropout Regulator Based on Comparator Control for x8 Current Spike of PCRAM Systems
A 0.23 µg bias instability and 1.6 µg/Hz 1/2 resolution silicon oscillating accelerometer with build-in Σ-Δ frequency-to-digital converter
Sample and Average Common-Mode Feedback in a 101 nW Acoustic Amplifier
A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference
A 1.15μW 5.54mm 3 Implant with a Bidirectional Neural Sensor and Stimulator SoC utilizing Bi-Phasic Quasi-static Brain Communication achieving 6kbps-10Mbps Uplink with Compressive Sensing and RO-PUF based Collision Avoidance
A 220 M-Range Direct Time-of-Flight 688 × 384 CMOS Image Sensor with Sub-Photon Signal Extraction (SPSE) Pixels Using Vertical Avalanche Photo-Diodes and 6 KHz Light Pulse Counters
A 192 nW 0.02 Hz High Pass Corner Acoustic Analog Front-End with Automatic Saturation Detection and Recovery
A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing
A 1.5GHz 1.35mW -112dBc/Hz in-band noise digital phase-locked loop with 50fs/mV supply-noise sensitivity
A 40-Gb/s serial link transceiver in 28-nm CMOS technology
A Portable NMR System with 50-kHz IF, 10-us Dead Time, and Frequency Tracking
A 35fJ/Step differential successive approximation capacitive sensor readout circuit with quasi-dynamic operation
All-Directional Dual Pixel Auto Focus Technology in CMOS Image Sensors
A Mixed-Signal Time-Domain Generative Adversarial Network Accelerator with Efficient Subthreshold Time Multiplier and Mixed-Signal On-Chip Training for Low Power Edge Devices
Multi-Sensor Platform with Five-Order-of-Magnitude System Power Adaptation down to 3.1nW and Sustained Operation under Moonlight Harvesting
A 43nW 32kHz Pulsed Injection TCXO with 4.2ppm Accuracy Using ∆Σ Modulated Load Capacitance
426-GHz Imaging Pixel Integrating a Transmitter and a Coherent Receiver with an Area of 380×47μm 2 in 65-nm CMOS
A 11.1-to-14.2 GHz Self-adapted Two-point Modulation Dual-path Type-II Digital PLL Concurrently Achieving 124.7-MHz/μs Chirp Rate and 2.27-GHz Bandwidth
A 280nW, 100kHz, 1-cycle start-up time, on-chip CMOS relaxation oscillator employing a feedforward period control scheme
95% light-load efficiency single-inductor dual-output DC-DC buck converter with synthesized waveform control technique for USB type-C
R-processor: 0.4V resilient processor with a voltage-scalable and low-overhead in-situ error detection and correction technique in 65nm CMOS
1.32GHz high-throughput charge-recovery AES core with resistance to DPA attacks
A new 3-bit programming algorithm using SLC-to-TLC migration for 8MB/s high performance TLC NAND flash memory
An energy harvesting wireless sensor node for IoT systems featuring a near-threshold voltage IA-32 microcontroller in 14nm tri-gate CMOS
A Self-Powered Wireless Gas Sensor Node Based on Photovoltaic Energy Harvesting
A fully-integrated 40-phase flying-capacitance-dithered switched-capacitor voltage regulator with 6mV output ripple
17.3 GCUPS Pruning-Based Pair-Hidden-Markov-Model Accelerator for Next-Generation DNA Sequencing
86.55% Peak efficiency envelope modulator for 1.5W 10MHz LTE PA without AC coupling capacitor
SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories
A Vocabulary Forest-based object matching processor with 2.07M-vec/s throughput and 13.3nJ/vector energy in full-HD resolution
A Wireless Implantable Ultrasound Array Receiver for Thermoacoustic Imaging
A 440pJ/bit 1Mb/s 2.4GHz multi-channel FBAR-based TX and an integrated pulse-shaping PA
A 12b 70MS/s SAR ADC with digital startup calibration in 14nm CMOS
A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory
UniCaP-2: Phase-Locked Adaptive Clocking with Rapid Clock Cycle Recovery in 65nm CMOS
A 0.003 mm 2 5.2 mW/tap 20 GBd inductor-less 5-tap analog RX-FFE
A 13.1GOPS/mW 16-core processor for software-defined radios in 40nm CMOS
A 6.4Gb/s/pin at sub-1V supply voltage TX-interleaving technique for mobile DRAM interface
A 10Gb/s, 342fJ/bit micro-ring modulator transmitter with switched-capacitor pre-emphasis and monolithic temperature sensor in 65nm CMOS
A 45nm SOI monolithic photonics chip-to-chip link with bit-statistics-based resonant microring thermal tuning
A 28nm 276.55TFLOPS/W Sparse Deep-Neural-Network Training Processor with Implicit Redundancy Speculation and Batch Normalization Reformulation
A 2.69UW Dual Quantization-Based Capacitance-to-Digital Converter for Pressure, Humidity, and Acceleration Sensing in 0.18UM CMOS
A 16Kb Antifuse One-Time-Programmable Memory in 5nm High-K Metal-Gate Fin-FET CMOS Featuring Bootstrap High Voltage Scheme, Read Endpoint Detection and Pseudo-Differential Sensing
A 10A/μs Fast Transient AOT Voltage Regulator on DDR5 DIMM with Dithered Pseudo-Constant Switching Frequency Achieving -6dB Harmonic Suppression
Solid state qubits: how learning from CMOS fabrication can speed-up progress in Quantum Computing
A Column-Row-Parallel ASIC architecture for 3D wearable / portable medical ultrasonic imaging
SleepRider: a 5.5μW/MHz Cortex-M4 MCU in 28nm FD-SOI with ULP SRAM, Biomedical AFE and Fully-Integrated Power, Clock and Back-Bias Management
A 120nW 8b sub-ranging SAR ADC with signal-dependent charge recycling for biomedical applications
A 0.1-pJ/b/dB 28-Gb/s Maximum-Eye Tracking, Weight-Adjusting MM CDR and Adaptive DFE with Single Shared Error Sampler
A 28nm Embedded Flash Memory with 100MHz Read Operation and 7.42Mb/mm2 at 0.85V featuring for Automotive Application
A 35µW 96.8dB SNDR 1 kHz BW multi-step incremental ADC using multi-slope extended counting with a single integrator
A 2× logic density Programmable Logic array using atom switch fully implemented with logic transistors at 40nm-node and beyond
3.5mW 1MHz AM detector and digitally-controlled tuner in a-IGZO TFT for wireless communications in a fully integrated flexible system for audio bag
Holistic technology optimization and key enablers for 7nm mobile SoC
A 10.0 ENOB, 6.2 fJ/conv.-step, 500 MS/s Ringamp-Based Pipelined-SAR ADC with Background Calibration and Dynamic Reference Regulation in 16nm CMOS
A 92.8% Efficiency Adaptive-On/Off-Time Control 3-Level Buck Converter for Wide Conversion Ratio with Shared Charge Pump Intermediate Voltage Regulator