yusuke1997/dblp-id-title huggingface dataset:
A new differential LNA topology for wireless applications
Multi-lead ECG using two ZigBee nodes
Compact Modeling and Applications of CNTFETs for Analog and Digital Circuit Design
A 70 GHz Small-signal Bandwidth 40 GS/s Track-and-Hold Amplifier in 130 nm SiGe BiCMOS Technology
A mixed-signal fuzzy controller architecture
Bit Error Rate Analysis for Flip-flop and Latch Based Interconnect Pipelining
An efficient partitioning-based scheme for 2-D convolution and application to image registration
A real-time H.264 MP decoder based on a DM642 DSP
A genetic algorithm based resources optimization methodology for implementing artificial neural networks on FPGAs
Complexity reductions in unrolled CORDIC architectures
Area-Efficient Hardware Design for Approximate Basis Conversion in RNS-Variant CKKS Schemes
A -96.2dBm / 3.5μW Wake-up Receiver with False Triggering Detection for Human Body Communication
The Riemann pump: A concurrent transmitter in GaN technology
GA-SVM Optimization Kernel applied to Analog IC Design Automation
μRadio: First Characterization Results Towards a 100μm × 100μm Monolithic Radio with Bio-Electrical Interface
Image registration and mosaicing of noisy acoustic camera images
The ARC-HPF with independent trimming of the main characteristics
An object oriented model for multimedia objects
Low-voltage high driving capability CMOS buffer used in MEMS interface circuits
A novel memristor emulator based only on an exponential amplifier and CCII+
Comparison of the hardware architectures and FPGA implementations of stream ciphers
Design of a Quasi-Linear Rail-to-Rail Delay Element with an Extended Programmable Range
Approximation of DCT without multiplication in JPEG
A method for remote measurements of velocity for vibration analysis
A Wearable Belt Mounted Ultrasound Arm Motion Tracking System
A continuous-flow, Variable-Length FFT SDF architecture
A charge redistribution SAR ADC for a pressure correction ASIC
Color Images Watermarking by Means of Independent Component Analysis
Monolithic implementation of a double-scroll chaotic attractor and application to random number generation
Optimized programming of multilevel flash EEPROMs
A new current mode synthesis method for dynamic translinear filters and its application in hearing aids
Mathematical functions based watermarking for IPP
A full adder implementation using SET based linear threshold gates
On normalized data-reusing and affine-projections algorithms
A Trusted Communication Unit for Secure Tiled Hardware Architectures
The application of computational intelligence to Fourier transformation
An ultra-low power current reused CMOS low noise amplifier for x-band space application
Performance improvement of edge-triggered sequential circuits
An efficient digital FIR filter design for 64 QAM
Compact RF CMOS 4-bit Digitally Controlled Oscillator
Design of polysilicon TFT operational amplifier for analog TFT AMLCD driver
A 27 mV output ripple 92% efficiency buck converter using a multi-bit delta-sigma modulator controller and segmented output switch in 180 nm CMOS
Design and Implementation of a Decimation Filter For High Performance Audio Applications
Light-Controlled Switching of Gait Patterns in a Central Pattern Generator: Circuit Design and Emulation
A method for simulation of floating-gate UV-programmable circuits with application to three new 2-MOSFET digital circuits
16th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2009, Yasmine Hammamet, Tunisia, 13-19 December, 2009
A 250MHz Gm-C filter using negative current feedback OTAs
Radix-2 Decimation in Time (DIT) FFT implementation based on a Matrix-Multiple Constant multiplication approach
JPEG 2000: finite precision representation and hardware implications
Design guidelines for high-speed Transmission-gate latches: Analysis and comparison
A large range and fine tuning configurable Bandgap reference dedicated to wafer-scale systems
A digital Cartesian feedback path design for 2.4GHz ISM band standards
Peak power constrained test sets: generation heuristics and experiments
Feature models and condition visualization for rotating machinery fault diagnosis
Evaluating FPGA Architectures for Quantized CNN Inference in Construction Monitoring Applications
Smart cameras everywhere: AI vision on edge with emerging memories
Optimization of chip level clock tree performance by using simultaneous drivers and wire sizing
A novel approach to grid sensor networks
Eye tracking system based on SOPC
Automatic circuit generation for sequential logic debug
Utilization of MEMS Tunable Inductors in the design of RF voltage-controlled oscillators
Online bicast allocation algorithm for contention-free-routing NoCs
Windowed phase comparator for an 80Gbit/s CDR
A unified delay model for CMOS logic styles
Efficient reference signal cancellation in a passive radar
Design of a SiGe Reconfigurable Power Amplifier for RF Applications: Device and Multi-standard Considerations
3D nanovision for the inspection of micro-electro-mechanical systems
Power-Supply Noise Analysis for Monolithic 3D ICs Using Electrical and Thermal Co-Simulation
Genetic partitioning and placement for VLSI circuits
Testing QCA Modular Logic
An $8^{th}$-order Butterworth filter employing source follower based bi-quad sections capable of realizing high-Q pole pairs
A reconfigurable coprocessor for high-resolution image filtering in real time
Properties of the pair of conjugate trees (t'-t")
Memory design for vectorization
Qualitative analysis of analog circuits with expanded node and loop equations
A comparison of precharge policies with modern DRAM architectures
Optimal multiplier coefficient values in cascade realized discrete networks
Digital oscillator circuit using synchronous pulse driving
A low-area power-efficient CMOS active rectifier for wirelessly powered medical devices
Efficient VLSI implementation of modern symmetric block ciphers
General active-RC filter model for computer-aided design and optimization
A novel compact dual-mode bandpass filter using fractal shaped resonators
Design of optimized high Q inductors on SOI substrates for RF ICs
Solutions for logic and processor core design at the 45nm technology node & and below
Functional and catastrophic thermal failures in bipolar electronic circuits
Supply-voltage down conversion for digital CMOS designs
Maximum a posteriori discrete-time rake receiver using realistic estimated channel state information and operating on diffuse multipath channels
Modeling and analysis of path delay faults in VLSI circuits: a statistical approach
On maximal graphs with a k-clique
A Memristive True Random Number Generator
Analyzing the impact of the Operating System on the Reliability of a RISC-V FPGA Implementation
CMOS microwave radiometer: Experiments on down-conversion and direct detections
A 1.2 GHz programmable DLL-based frequency multiplier for wireless applications
A FPGA implementation of low-complexity noise removal
A universal smart control IC for high-power IGBT applications
Optimal Dark Current Reduction in Quantum Well 9 μm GaAs/AlGaAs Infrared Photodetectors With Improved Detectivity
Design and analysis of Turbo decoder for China 3rd generation mobile communication system
Neural Architecture Search for Over-the-Air Telecommunication Signal Classification
Error Detection Code Efficiency for Secure Chips
Structural Design of a CMOS Full Low Dropout Voltage Regulator
Shock rejection & ambient temperature compensation mechanism for uncooled micocantilever thermal detector
Exploration of cryptographic ASIP designs for wireless sensor nodes
Noise Modeling Including Effect of propagation along the gate of a field-effect transistor
A novel frequency compensation technique for two-stage CMOS operational amplifiers
Design of a Telecommand and Telemetry System for use on Board a Nanosatellite
Design and implementation of an inductorless digitally controlled oscillator based on CMOS inverters
A fully integrated 1 GHz BiCMOS VCO
Low-power signal acquisition for galileo satellite navigation system
Transconductance enhancement in bulk-driven input stages
Symbolic pole and zero estimation for circuit design
Architecture for reconfigurable MIMO detector and its FPGA implementation
Lossless image coding using adaptive predictor with automatic context modeling
Experiments on chaotic circuits and crypted data transmission
A non-intrusive and reconfigurable access control to secure NoCs
A hybrid test compression technique for efficient testing of systems-on-a-chip
TraceAnalyzer - an open framework for memory stream analysis
BANDIT: embedding analog-to-digital converters on digital telecom ASICs
A continuous-time common-mode feedback circuit (CMFB) for high-impedance current mode application
Current conveyor based universal biquad filter
A low-power architecture for integrating analog-to-digital converters
The leafs scan-chain for test application time and scan power reduction
A design flow for inductively degenerated LNAs
A new chaotic system for the authentication and electronic certification procedures
Hybrid method of tolerance design
Utilizing LFSR and Feistel networks in image encryption
Novelty Detection in Images Using Vector Quantization with Topological Learning
LDI filter bank for ADC frequency domain analysis
Integrated multivalue voltage-to-voltage converter
Low-power macro-cells for pulse code arithmetic
A novel high-speed counter with counting rate independent of the counter's length
Investigating parallel TMR approaches and thread disposability in Linux
High frequency CMOS Gm-C bandpass filter with automatic on-chip tuning
Performance evaluation of SCTP over E-GPRS air interface for HTTP traffic
Novel high speed and ultra low voltage CMOS flip-flop
A high performance data-path to accelerate DSP kernels
Pulse Design Method for Complexity Reduction of IEEE IR-UWB Pulse Synthesizers
Topology selection for low-voltage low-power wireless receivers
An Integrated Laser Radar Receiver Channel with Wide Dynamic Range
Towards multiphysics simulations of integrated circuits
Issues on the Design of a Variable Power LINC Amplifier System in SiGe Operating at 2.4 GHz
Ultra low voltage current multiplier/divider
Modelling charge-pump delay locked loops
An Energy-Efficient On-Demand Routing algorithm for Mobile Ad-Hoc Networks
CAN generator and error injector
Simulation Study of Full Passive Magnetic Human Body Communication in 65-nm CMOS Technology for Temperature Sensing Application
What GPS doesn't tell you: determining one's context with low-level sensors
Design of linear-phase variable 2-D FIR digital filters using matrix-array decomposition
Micro - GAGE: A Low-power Compact GAGE Hash Function Processor for IoT Applications
2D photonic crystals deposited on polymer piezoelectric substrates - new kind of MOEMS
Optimal specification of a receiver blocks from global specifications: Example of IEEE 802.15.4
GaAs MESFET multi-output current mirrors and their application to high frequency filters
Nonlinear robust control for DC-DC converters
Magnetic Induction Based Modeling and Optimization of Wireless Channels in Underground High-Conductivity Media
An expanded MFBLP method with reduced computational complexity for estimating sinusoids frequencies
Depleted MAPS on a 110 nm CMOS CIS Technology
10 MHz -3 dB Bandwidth 360µW Power Source-Follower Low-Pass Filter for Multi-Channel Acoustic Analog Front-End in CMOS 0.18µm
A Rectifier Circuit Using Add-Differentiate IC with a Minimal Number of CMOS Transistors
Classification of Lightweight Block Ciphers for Specific Processor Accelerated Implementations
20-channel Analog Boxcar Averager with 0.4ppm Resolution for Pump-Probe Optical Spectroscopy
Sparse approximations with a high resolution greedy algorithm
Threshold-logic-based design of compressors
Initialization of modular multilevel converters based on the shooting method
Performance analysis of a reduced complexity SCMA decoder exploiting a low-complexity maximum-likelihood approximation
A 12.5 GHz back-gate tuned CMOS voltage controlled oscillator
FPGA-based fine grain processor array design considerations
Simple Expression of the Thermal Noise Excess Factor for LNA Design
A New Method for Initializing Real Second Order IIR Notch Filters
Mapping for unknown environment using incremental triangulation
FBM: A Simple and Fast Algorithm for Placement Legalization
Schur stability of polytopes of bivariate polynomials
A 0.35 μm SiGe Low-Noise Amplifier for UWB, Receivers with Integrated Interferer Rejection
Fast computations on a low-cost DSP-based shared-memory multiprocessor system
A 4 th order CMOS 65nm wideband low power analog filter for wireless receivers
Modeling power budget requirements of implantable electronic devices
Implementation of AES algorithm resistant to differential power analysis
A compact low-voltage four quadrant FGMOS multiplier
Analog-based Compressive Sensing of Multichannel Neural Signals: Systematic Design Approaches
A FIFO-based architecture for high speed image compression
Handling reconvergent paths using conditional probabilities in combinatorial logic netlist reliability estimation
Modeling of block-oriented systems using modified state variable approach
Analysis of the intermodulation distortion and nonlinearity of common-base SiGeC HBTs
FIR fractional Hilbert transformers with raised-cosine magnitude response
SPRAM (SPin-transfer torque RAM) design and its impact on digital systems
Comparative analysis of activation functions in neural networks
A CMOS programmable phase shifter for compensating synchronous detection bioimpedance systems
Bitwidth-aware high-level synthesis for designing low-power DSP applications
Development of reusable serial FIR filters with reprogrammable coefficients designed for serial dataflow architectures
Numerical analysis of nano schottky junctions for developing novel sub-20 nm electronic devices
433 MHz implantable wireless stimulation of spinal nerves
On HEVC Robustness to Integer Motion Estimation Pruning
Sallen-Key polyphase filter design
Design of a wideband transmit delta-sigma DAC
A Heuristic Fault Dictionary Reduction Methodology
Runtime energy management for many-core systems
Exploiting hysteresis in a CMOS buffer
A bulk-driven CMOS OTA with 68 dB DC gain
Implementation of the Standardized Human Body Communications - A Feasibility Study
Experimental Demonstration of a 65 nm Integrated CMOS Waveform Generator for 5G sub-6GHz Standard
Performances of switching algorithm methods in MIMO-OFDM systems
Towards the High-Level Design of Optical Networks-on-Chip. Formalization of Opto-Electrical Interfaces
Scoring criteria for the selection of capacitors in DC to DC converters design
On current control method for single-phase AC resistance spot welding
Modified Wallace-Tree Architecture Design and Implementation for High-Speed Multiplier
A Parallel-In Serial-Out Multiplier Using Redundant Representation for A Class of Finite Fields
Discussion on the performances of hybrid SET-MOSFET Voltage Controlled Oscillators
Wireless System for Temperature Measurement in Wheels, based on the ISM Band
High level characterization and optimization of a GPSK modulator with genetic algorithm
A shunt active power filter control for unbalanced conditions
A case study on dynamic control of complex operational amplifier performance using back gate biasing
RF Digital Predistorter for Power Amplifiers of 3G Base Stations
Hybrid nested Miller compensation with nulling resistors
CMOS/Magnetic Hybrid Architectures
Programmable logic using a SET electron box
OLYMPO: a GaAs compiler for VLSI design
Simulation of an access control system for image-related services
Deep Learning Autoencoder-based Compression for Current Source Model Waveforms
Comparison of Transconductance Reduction Techniques for the Design of a Very Large Time-Constant CMOS Integrator
Optimization on NMOS-based power-rail ESD clamp circuits with gate-driven mechanism in a 0.13-μm CMOS technology
New design of squarer circuits using Booth encoding and folding techniques
Stochastic Petri nets architectural modules for power system availability
Predictive control of standalone brushless DC generators
High frequency operation of a MOSFET under an integrated inductor's magnetic field
Embedded STT-MRAM Energy Analysis for Intermittent Applications using Mean Standby Duration
A new systolic array algorithm for a high throughput low cost VLSI implementation of DCT
An investigation of log domain current feedback amplifiers
A time multiplexed architecture for neural networks using quantum devices
Use of the Step Invariant Transform to Design a 2nd Order Continuous Time Complex Sigma-Delta ADC
ALCD-analog libraries on CMOS digital process
Video broadcasting using switched virtual circuits over ATM network
A novel self-referenced ferroelectric-memory readout scheme
Time delay digital tanlock loop with linearized phase detector
Hybrid Detector with Interpixel Communication for Color X-ray Imaging
Using a hardware coprocessor for message scheduling in fieldbus-based distributed systems
A four-quadrant analog multiplier based on switched-capacitor and pulse-width amplitude modulation techniques
Effect of RF Front-End Parameters on UWB-OFDM Receiver Performances in Presence of Adjacent Channel Interferers
A Subranging ADC with Redundant Shared-Ladder DAC for Low-Modulation AM Readout
Methodology for Characterization of Temperature and Power Losses of Inductors in DC/DC SMPS
A framework for offline optimization of energy consumption in real time multiprocessor system-on-chip
Optimized implementation of memristor-based full adder by material implication logic
A 0.8-V 420nW CMOS switched-opamp switched-capacitor pacemaker front-end with a new continuous-time CMFB
General and Technical Program Chairs' Message
Efficiency of dual supply voltage logic synthesis for low power in consideration of varying delay constraint strictness
Robust controller designing for delayed systems with rank-1 type uncertainties
A Low Power Dual-Mode Sigma-Delta Modulator for GSM/WCDMA Receivers
Stability and power quality enhancement using a combined capacitive compensation and active power filter
A testability-directed modeling of a communications protocol
A novel test environment for template based QDI asynchronous circuits
An anti-aliasing filter inspired by continuous-time ΔΣ modulation
On line multi-location power system harmonics measurement via the internet
3 Megapixel Camera Signal Processor for Mobile Camera Applications
RC and RL to LC circuit conversion, and its application in poles and zeros identification
Approximate Logarithmic Multiplier For Convolutional Neural Network Inference With Computational Reuse
A mixed signal CMOS readout chain for imaging spectroscopic pixel X-ray detectors
A unified framework for the construction of OFDM/OQAM systems
Design guidelines for minimum harmonic distortion in a wien oscillator with automatic amplitude control system
Morton (Z) scan based real-time variable resolution CMOS image sensor
Asynchronous multipliers with variable-delay counters
A read/write front-end for an antifuse One-Time-Programmable memory in High Voltage Silicon-On-Insulator technology
Effective sum of squares implementation for BPSK soft-decision decoding
A Formal Verification Approach for Detecting Opcode Trojans
Investigation of Efficiency vs. Linearity Trade-offs in LINC Amplifiers for Varying Outphasing Combiner Reactances
Multiphase Signal Generation Using Capacitive Coupling of LC-VCOs
Signal processing building blocks for pipelined A/D converter
Circuit optimization based on speed indicators
Standard Cell based Memory Compiler for Near/Sub-threshold Operation
An S-Matrix-Based Model of a Capacitive-Inductive Channel for Wireless Power and Data Transmission
RAPID-retargetability for reusability of application-driven quadrature D/A interface block design
Capacitive Power Transfer Modeling of Charging Inner-body Devices
Lighting change problem in shot detection
A Simple, Versatile Integration Platform based on a Printed Circuit Board for Lab-on-a-Chip Systems
Impact of schmitt trigger inverters on process variability robustness of 1-Bit full adders
Modeling of Memristors Under Sinusoidal Excitations with Various Frequencies
Logic in wire: using quantum dots to implement a microprocessor
CMOS building block for smart-power integrated circuits
High frequency characterization of multilayered anisotropic planar circuits with several metallized interfaces
Fuzzy Controller for Mobile Robots using Evolvable Hardware
Modeling for Low Power Bypass Window SAR ADC Based on Highest Weight Capacitor Splitting
SoC architecture for real-time interactive painting based on lattice-Boltzmann
A Tile-based Fused-Layer Approach to Accelerate DCNNs on Low-Density FPGAs
Continuous-time Sigma-Delta Modulators for Highly Digitised Receivers
Tunable Wideband Amplifier at 180 GHz with 22 dB Gain and 40 GHz Bandwidth in 130 nm SiGe
Using a genetic algorithm optimizer tool to generate good quality timetables
Automatic design tool for submicron current steering logic libraries
Maximum power-point extraction of small switched-inductor piezoelectric harvesters
LoRa Physical Layer Principle and Performance Analysis
Modeling the effect of strong magnetic field on n-type MOSFET in strong inversion
Design of an optoelectronic crossbar based on 0.6 μm CMOS process with a 1 Tbit/s optical input
A Wideband CMOS LNA Integrated with Balun and Linear Digital Gain Control
Finite GBW in single OpAmp CT ΣΔ modulators
Portable Impedance Microfluidic Platform for 60-Minute Antibiotic Susceptibility Testing
A QoS-Oriented Scheme for a Real Time Admission Control in OBS Networks
Design of a High Speed, Low Latency and Low Power Consumption DRAM Using two-transistor Cell Structure
Performance parameters of current operational amplifiers
Analysis of memory accesses in embedded systems
ORSGRAND: Hardware-Efficient Ordered Reliability Symbol GRAND Decoder for Low-Latency Multiuser IoT Applications
A Fractional Frequency Synthesizer Using Frequency Locked Loop
Reconfigurable Matching Network for Wideband Frequency and Impedance Tuning
Automatic module generation for real-time image processing
Unfolding nonlinear dynamics in computing systems with mem-elements
UWB microwave chaotic oscillators based on microchip amplifiers
A Novel Low Power and Low Cost IoT Wireless Sensor Node for Air Quality Monitoring
Improved design of the BB-SoC which incorporated the ultra high speed multi level QAM modem for MM-wave radio systems, and its performance
Experimental testbed for VLC-based localization framework in 5G Internet of Radio Light
A leakage-tolerant multi-phase keeper for wide domino circuits
PAMPR: Power-aware and minimum path routing algorithm for NoCs
A Navigation System for a Wheelchair User Based on a multi-modal Design
SkyFlash EC project: Architecture for a 1Mbit S-Flash for space applications
FLOGIC-Floating-gate logic for low-power operation
Design of a rail-to-rail 460 kS/s 10-bit SAR ADC for capacitive sensor interface
Extended design of equiripple comb FIR filters
Analysis and Effects of Aging and Electromigration on Mixed-Signal ICs in 22nm FDSOI Technology
The effect of multi-scrolls distribution on image encryption
A tool for two's complement, bit-level, fixed-point simulation of digital filters
Approximation and analog implementation of nonlinear systems represented by Volterra series
Exponential Stability for Cellular Neural Networks with Delay
A process-independent threshold voltage inverter-comparator for pulse width modulation applications
Cooperative Intrusion Detection and Tolerance System
VLSI design and implementation of reconfigurable cryptographic systems for symmetric encryption
Slow motion in video streaming
High-drive capability buffer for highly variable resistive loads
SOM on multi-FPGA ISA board-hardware aspects
A novel coding scheme for the ROM of parallel ADCs, featuring reduced conversion noise in the case of single bubbles in the thermometer code
System energy analysis for shared memory multiprocessing applications
A gm/ID Design Methodology for 28 nm FD-SOI CMOS Resistive Feedback LNAs
Symbolic linear Mathematica based technique for piecewise linear circuits
Roundoff Noise Analysis for FSK Signals in White Noise Represented as Signed Power-of-Two Numbers
BDD/AOG-based algorithm for multiple error rectification in combinational circuits