yusuke1997/dblp-id-title huggingface dataset:
Minimizing Cost of Local Variables Access for DSP-Processors
Orchestrating Multiple Mixed Precision Models on a Shared Precision-Scalable NPU
em-SPADE: a compiler extension for checking rules extracted from processor specifications
Schedulability-driven frame packing for multi-cluster distributed embedded systems
Generalized cache tiling for dataflow programs
Predicting the impact of optimizations for embedded systems
Storing a persistent transactional object heap on flash memory
Profile guided selection of ARM and thumb instructions
Extending RT-Linux to Support Flexible Hard Real-Time Systems with Optional Components
ApproxRefresh: Enabling Uncorrectable Data Reuse on Flash Memory with Approximate Read Awareness
Statically relating program properties for efficient verification (short WIP paper)
A compiler-based approach for GPGPU performance calibration using TLP modulation (WIP paper)
Analyzing the real-time behaviour of deeply embedded event driven systems
Verification of coarse-grained reconfigurable arrays through random test programs
"Smart" design space sampling to predict Pareto-optimal solutions
Languages, Compilers, and Tools for Embedded Systems, ACM SIGPLAN Workshop LCTES'98, Montreal, Canada, June 1998, Proceedings
Energy efficient data access and storage through HW/SW co-design
Improving dynamic prediction accuracy through multi-level phase analysis
Evaluating ASIC, DSP, and RISC Architectures for Embedded Applications
Raced profiles: efficient selection of competing compiler optimizations
Translation validation of loop and arithmetic transformations in the presence of recurrences
Priority Assignment for Embedded Reactive Real-Time Systems
MILAN: A Model Based Integrated Simulation Framework for Desgin of Embedded Suystems
Semi-automatic derivation of timing models for WCET analysis
Footprint and feature management using aspect-oriented programming techniques
An Efficient Data Partitioning Method for Limited Memory Embedded Systems
HyFM: function merging for free
Issues and Challenges in Developing Embedded Software for Information Appliances and Telecommunication Terminals
Energy aware compilation for DSPs with SIMD instructions
Enhancing Code Vulnerability Detection via Vulnerability-Preserving Data Augmentation
An algorithm for mapping loops onto coarse-grained reconfigurable architectures
Optimistic Secure Real-Time Concurrency Control Using Multiple Data Version
Randomization-Based Approaches for Dynamic Priority Scheduling of Aperiodic Messages on a CAN Network
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, LCTES 2009, Dublin, Ireland, June 19-20, 2009
Appropriate Interfaces Between Design Tools, Languages, Compilers and Runtimes in Real-Time Systems (Panel)
Semantics Driven Hardware Design, Implementation, and Verification with ReWire
Automatic mapping and code optimization for OpenCL kernels on FT-matrix architecture (WIP paper)
Generating embedded software from hierarchical hybrid models
Data-flow-sensitive fault-space pruning for the injection of transient hardware faults
Towards Secure MicroPython on Morello (WIP)
MixPert: Optimizing Mixed-Precision Floating-Point Emulation on GPU Integer Tensor Cores
Cache aware optimization of stream programs
Static bus schedule aware scratchpad allocation in multiprocessors
Worst-Case Execution Time Analysis on Modern Processors
Contracts for modular discrete controller synthesis
DSP-MLIR: A Domain-Specific Language and MLIR Dialect for Digital Signal Processing
GraalBench: a 3D graphics benchmark suite for mobile phones
SSFFT: Energy-Efficient Selective Scaling for Fast Fourier Transform in Embedded GPUs
Energy management for real-time embedded applications with compiler support
Transport layer abstraction in event channels for embedded systems
Tetris: a new register pressure control technique for VLIW processors
A Framework for Enhancing Code Quality in Limited Register Set Embedded Processors
A low-cost wear-leveling algorithm for block-mapping solid-state disks
WCET-aware hyper-block construction for clustered VLIW processors
Reducing the cost of conditional transfers of control by using comparison specifications
Superoptimization of memory subsystems
Re-usable Software Design for Programmable Logic Controllers
BOTS: a constraint-based component system for synthesizing scalable software systems
Language-Based Deployment Optimization for Random Forests (Invited Paper)
Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications
Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'06), Ottawa, Ontario, Canada, June 14-16, 2006
A Design Environment for Counterflow Pipeline Synthesis
A Stochastic Framework for Co-synthesis of Real-Time Systems
Sequential Scheduling of Dataflow Graphs for Memory Peak Minimization
Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors
Synthesizing safe state machines from Esterel
LUCAS: latency-adaptive unified cluster assignment and instruction scheduling
A Fault Tolerance Extension to the Embedded CORBA for the CAN Bus Systems
A memory interference analysis using a formal timing analyzer (WIP)
Tighten rust's belt: shrinking embedded Rust binaries
A DISE implementation of dynamic code decompression
Cache abstraction for data race detection in heterogeneous systems with non-coherent accelerators
Optimus: towards optimal layer-fusion on deep learning processors
PANDORA: a parallelizing approximation-discovery framework (WIP paper)
Efficiently parallelizing instruction set simulation of embedded multi-core processors using region-based just-in-time dynamic binary translation
Flattening statecharts without explosions
Controlling fragmentation and space consumption in the metronome, a real-time garbage collector for Java
Raising binaries to LLVM IR with MCTOLL (WIP paper)
Finding effective optimization phase sequences
Performance Re-engineering of Embedded Real-Time Systems
Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration of embedded systems
Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'08), Tucson, AZ, USA, June 12-13, 2008
Scalable precision cache analysis for preemptive scheduling
ASC-Hook: Efficient System Call Interception for ARM
TWFuzz: Fuzzing Embedded Systems with Three Wires
ADaPS: Adaptive Data Partitioning to Parallelize CNN Inference on Resource-Constrained Hardware
Decoupling address generation from loads and stores to improve data access energy efficiency
Thread-Level Attack-Surface Reduction
SHAKTI-MS: a RISC-V processor for memory safety in C
Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES 2017, Barcelona, Spain, June 21-22, 2017
Integrated CPU and l2 cache voltage scaling using machine learning
A compiler optimization to reduce soft errors in register files
Standardization approach of ITRON debugging interface specification and evaluation of its adaptability
Lightweight generics in embedded systems through static analysis
Enabling Efficient Alias Speculation
A Synthesis-Aided Compiler for DSP Architectures (WiP Paper)
Debugging Distributed Implementations of Modal Process Systems
Towards SMT-based LTL model checking of clock constraint specification language for real-time and embedded systems
Improving performance of loops on DIAM-based VLIW architectures
PAQSIM: Fast Performance Model for Graphics Workload on Mobile GPUs
Simple, light, yet formally verified, global common subexpression elimination and loop-invariant code motion
Synchronization-Aware NAS for an Efficient Collaborative Inference on Mobile Platforms
Optimal functional unit assignment and voltage selection for pipelined MPSoC with guaranteed probability on time performance
Java takes flight: time-portable real-time programming with exotasks
A Practical Getaway: Applications of Escape Analysis in Embedded Real-Time Systems
Automated fault localization with statistically suspicious program states
XTREM: a power simulator for the Intel XScale® core
WindView: A Tool for Understanding Real-time Embedded Software Through System Visualization
Adaptive deep learning model selection on embedded systems
A Power Efficient Cache Structure for Embedded Processors Based on the Dual Cache Structure
Adaptive code unloading for resource-constrained JVMs
Static analysis of synchronous programs in signal for efficient design of multi-clocked embedded systems
Joint throughput and energy optimization for pipelined execution of embedded streaming applications
Enabling seamless mobility: an enablers, experiences and tools perspective
Opportunity for compute partitioning in pursuit of energy-efficient systems
SA-SPM: an efficient compiler for security aware scratchpad memory (invited paper)
A Synergistic Approach to Predictable Compilation and Scheduling on Commodity Multi-Cores
Systems-on-chip needs for embedded software development: an industrial perspective
Optimizing Transfers of Control in the Static Pipeline Architecture
Adapting instruction level parallelism for optimizing leakage in VLIW architectures
The betrayal of constant power × time: finding the missing Joules of transiently-powered computers
A graph covering algorithm for a coarse grain reconfigurable system
Towards Macro-Aware C-to-Rust Transpilation (WIP)
A trace-based binary compilation framework for energy-aware computing
Decreasing the Miss Rate and Eliminating the Performance Penalty of a Data Filter Cache (Keynote)
BitBench: a benchmark for bitstream computing
Synchronous programming of device drivers for global resource control in embedded operating systems
JetCert: A Self-Adaptive Compilation Framework for Fast and Safe Code Execution
Compiling Spiking Neural Networks to Neuromorphic Hardware
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
Interface synthesis for heterogeneous multi-core systems from transaction level models
Cache persistence analysis: a novel approachtheory and practice
Optimizing RAID/SSD controllers with lifetime extension for flash-based SSD array
A retargetable register allocation framework for embedded processors
Compiler-managed partitioned data caches for low power
PTIDES on flexible task graph: real-time embedded systembuilding from theory to practice
Proceedings of the 16th ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems, LCTES 2015, CD-ROM, Portland, OR, USA, June 18 - 19, 2015
Array Reference Allocation Using SSA-Form and Live Range Growth
Asynchronous software thread integration for efficient software
Modeling structured event streams in system level performance analysis
Optimizing data reshaping operations in functional IRs for high-level synthesis
A Secure Dynamic Copy Protocol in Real-Time Secure Database Systems
FTL 2 : a hybrid f lash t ranslation l ayer with logging for write reduction in flash memory
Proceedings of the 2003 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'03). San Diego, California, USA, June 11-13, 2003
Optimal integrated code generation for clustered VLIW architectures
A Real-Time Animator for Hybrid Systems
Compiler directed write-mode selection for high performance low power volatile PCM
Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays
Memory safety without runtime checks or garbage collection
Synergistic execution of stream programs on multicores with accelerators
An empirical comparison between monkey testing and human testing (WIP paper)
Global productiveness propagation: a code optimization technique to speculatively prune useless narrow computations
Integrating task scheduling and cache locking for multicore real-time embedded systems
Secure and Durable (SEDURA): An Integrated Encryption and Wear-leveling Framework for PCM-based Main Memory
Optimizing Code Size through Procedural Abstraction
Machine Descriptions to Build Tools for Embedded Systems
Compensate or ignore? meeting control robustness requirements through adaptive soft-error handling
Dynamic voltage scaling for real-time multi-task scheduling using buffers
Feedback linking: optimizing object code layout for updates
Translating concurrent action oriented specifications to synchronous guarded actions
A java virtual machine architecture for very small devices
Bypass aware instruction scheduling for register file power reduction
Multi-level Machine Learning-Guided Autotuning for Efficient Code Generation on a Deep Learning Accelerator
In search of near-optimal optimization phase orderings
Transparent standby for low-Power, resource-constrained embedded systems: a programming language-based approach (short WIP paper)
HW/SW co-designed acceleration of dynamic languages
TurboJ, a Java Bytecode-to-Native Compiler
Towards memory-efficient processing-in-memory architecture for convolutional neural networks
Automatic Accurate Time-Bound Analysis for High-Level Languages
Improving both the performance benefits and speed of optimization phase sequence searches
Verus: A Tool for Quantitative Analysis of Finite-State Real-Time Systems
Faster WCET flow analysis by program slicing
Complex Reactive Control with Simple Synchronous Models
Break dancing: low overhead, architecture neutral software branch tracing
Unified nvTCAM and sTCAM architecture for improving packet matching performance
Rep-RAID: An Integrated Approach to Optimizing Data Replication and Garbage Collection in RAID-Enabled SSDs
FPGA-based Near Data Processing Platform Selection Using Fast Performance Modeling (WiP Paper)
Pioneering Pathways: The Evolution of Embedded Software Design Methodologies (Keynote)
Post-pass periodic register allocation to minimise loop unrolling degree
MinUn: Accurate ML Inference on Microcontrollers
Scratchpad allocation for data aggregates in superperfect graphs
WCET-aware re-scheduling register allocation for real-time embedded systems with clustered VLIW architecture
Software Pipelining Irregular Loops on the TMS320C6000 VLIW DSP Architecture
StarL: Towards a Unified Framework for Programming, Simulating and Verifying Distributed Robotic Systems
Design space optimization of embedded memory systems via data remapping
Cache-coherent CLAM (WIP)
Scheduling Garbage Collector for Embedded Real-Time Systems
Advanced copy propagation for arrays
ISVABI: In-Storage Video Analytics Engine with Block Interface
Code protection for resource-constrained embedded devices
MakeCode and CODAL: intuitive and efficient embedded systems programming for education
Recurrence cycle aware modulo scheduling for coarse-grained reconfigurable architectures
Generating optimized code from SCR specifications
Optimizing compiler for shared-memory multiple SIMD architecture
ISKEVA: in-SSD key-value database engine for video analytics applications
Limited Preemptible Scheduling to Embrace Cache Memory in Real-Time Systems
Register allocation for irregular architectures
Language Constructs and Transformation for Hard Real-time Systems
A lightweight progress maximization scheduler for non-volatile processor under unstable energy harvesting
Hardware-managed register allocation for embedded processors
Compositionality in scenario-aware dataflow: a rendezvous perspective
SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems 2012, LCTES '12, Beijing, China - June 12 - 13, 2012
Software design patterns for TinyOS
Kubism: Disassembling and Reassembling K-Means Clustering for Mobile Heterogeneous Platforms
Data size optimizations for java programs
vNV-Heap: An Ownership-Based Virtually Non-Volatile Heap for Embedded Systems
A two-step optimization technique for functions placement, partitioning, and priority assignment in distributed systems
Efficient soft error protection for commodity embedded microprocessors using profile information
ESys.Net: a new solution for embedded systems modeling and simulation
Java client ahead-of-time compiler for embedded systems
External memory page remapping for embedded multimedia systems
Towards Building Better Mobile Web Browsers for Ad Blocking: The Energy Perspective (WiP Paper)
Improving the Precision of Abstract Interpretation Based Cache Persistence Analysis
Modeling and Verification of Sigma Delta Neural Networks using Satisfiability Modulo Theory
Proceedings of the Third International Workshop on Intersection Types and Related Systems, ITRS 2004, Turku, Finland, July 13, 2004
Intersection Types and Related Systems, ITRS 2002, FLoC Satellite Event, Copenhagen, Denmark, July 26, 2002
Thomson Reuters : : A New Generation CRIS from Thomson Reuters
Introducing CRIS at FAU: Project Presentation
10th International Conference on Current Research Information Systems, CRIS 2010: Connecting Science with Society - The Role of Research Information in a Knowledge-Based Society, Aalborg, Denmark, June 2-5, 2010
Deceiving Simplicity. Balancing the Need for Ready-to-use Research Information with the Semantic and Technical Complexity of Research Data
CERIF Tutorial
The Automation of Subject Indexing at ZBW and the Role of Metadata in Times of Large Language Models
Persistent conference identifiers in CRIS - first implementations with VIVO and URIS
Providing an Application-specific Interface over a CERIF Back-end: Challenges and Solutions
Towards an Open Data on how the Research Data are Used: CRIS-CERIF based Approach
Reengineering of CRIS at University of Novi Sad
System of Evaluation of Research Institutions in the Czech Republic
Emerging Good Practice in Managing Research Data and Research Information within UK Universities
Research Excellence and Evaluation Using a CRIS: A Cross-institutional Perspective
Author Consolidation across European National Bibliographies and Academic Digital Repositories
IBM : : Integrating Information at a regional level for the sake of innovation & venturing acceleration
National Open Access Scientific Articles Registration System (NOSARS)
RITMARE: Semantics-aware Harmonisation of Data in Italian Marine Research
Standards and Interoperability: How Jisc's Work Supports Reporting, Communicating and Measuring Research in the UK
Competency requirements in research information management and reporting: evidence from a national survey in Germany
Development of Plan S monitoring and compliance tool in the context of PTCRIS for Portuguese National Science Foundation
e-Infrastructures and Research Information Systems
Funding organization uses the regional CRIS as source for reporting research: the case of FWO and FRIS
Showing it all - A New Interface for Finding all Norwegian Research Output
16th International Conference on Current Research Information Systems, CRIS 2024, TU Wien, Vienna, Austria, May 15-17, 2024
Open Repository of Semantic Linkages
15th International Conference on Current Research Information Systems, CRIS 2022, Dubrovik, Croatia, May 2022
Bergen Campus Biomedical Research Cooperation Analysis using a CERIF-CRIS
Leveraging AI for Current Research Information Systems: Opportunities and Challenges
Using Current Research Information Systems (CRIS) to showcase national and institutional research (potential): research information systems in the context of Open Science
A CRIS driven by research community: benefits and perspectives
The role of CRIS as a glue for national e-infrastructure and digital services for open science
Field report documenting the implementation of the FWF's funding management system in conjunction with the national RIS Synergy initiative
Research Information Management System (KRIMSON) at Kent
Developing Research Information Hub in Finland, a view from the Ministry
A National CRIS Infrastructure as the Cornerstone of Transparency in the Research Domain
Say, "S" (as) Semantics - and Mean it! Path to Semantically Interoperable Digital Research Services
Linking research information within the knowledge portal - the Bridge of Knowledge services for researchers
Sucupira - A Platform for the Evaluation of Graduate Education in Brazil
"All roads lead to Rome": Establishing Best Practices for the Implementation and Introduction of a CRIS: Insights and Experiences from a CRIS Project at the University of M
Communicating and Measuring Research Responsibly: Profiling, Metrics, Impact, Interoperability
Announcement CRIS 2014
Developing CRIS Module for Technology Transfer
A Comparison of Research Output Counting Methods Using a National CRIS - Effects at the Institutional Level
OpenAIRE Guidelines for CRIS Managers: Supporting Interoperability of Open Research Information through Established Standards
Visualizing the Information of a Linked Open Data Enabled Research Information System
R&D Statistics Information System: An Interoperability Tail Between CERIF and SDMX
A PID Metaresolver to enable accurate citation and attribution of digital objects by providing reliable access to metadata and associated resources
CRIS systems integration as a case study for the Metadata Schema and Crosswalk Registry
The evolution of the Pure Community Module: How lessons learned from national, regional, and subject-focused use cases have been used to support inter-institutional collaboration
Information Systems Used Within Evaluation Process of Research Activities of ASCR Institutes
Decentralized research data management: introducing SoVisu+
Piloting the use of PIDGraph data in Research.fi
Exploring the researchers' performance in the selected thematic priority area within the Croatian Smart Specialisation Strategy
Mapping Solid Earth Data and Research Infrastructures to CERIF
SEMAT, National Current Research Information System for Iran
A software module for import of theses and dissertations to CRISs
Common Map of Academia: Augmenting Bibliography Research Information Data
Fostering Open Science at Fraunhofer
Creating a Data Infrastructure for Tracking Knowledge Flow
Practical CRIS Interoperability
DeGóis - The Portuguese National Academic CV Platform
Even Minor Integrations Can Deliver Great Value - A Case Study
A FAIR archive based on the CERIF model
Conference Introduction
The Important Role of CRIS's for Registering and Archiving Research Data. The RDS-project at Radboud University (the Netherlands) in Cooperation with Data-archive DANS
Research Information Management
Automated author affiliation processing using Scopus data
The power of generative AI for CRIS systems: a new paradigm for scientific information management
Research Information Standards Adoption: Development of a Visual Insight Tool at the University of Cambridge
CRIS/OAR interoperability workshop
CTIS, Policy Making Body for National Research Information System in IRAN
Keynote: Monitoring Policy Making: goals, processes and information demand
Data Management Administration Online (DMAOnline)
From Open Data to Data-intensive Science through CERIF
Monitoring a National Open Access Funder Mandate
Entanglement of bibliographic database content and data collection practices: Rethinking data integration using findings from a European study
SWOT Analysis of the Services Provided by e-government Sites in Brazil
Extending the value of a CRIS with Research Data Management
Integrating CERIF Entities in a Multidisciplinary e-infrastructure for Environmental Research Data
Harmonising Research Reporting in the UK - Experiences and Outputs from UKRISS
OpenAIRE Guidelines: Supporting Interoperability for Literature Repositories, Data Archives and CRIS
Repository Landscape in Turkiye and GCRIS: The first National Research Information System
Regular Research Assessment Exercise of the Institutes of the Slovak Academy of Sciences 2012
A national Current Research Information System for Sweden
Enriching metadata in an international agroforestry research repository with funding-related information by mining grey literature
Combining Data Lake and Data Wrangling for Ensuring Data Quality in CRIS
Combining VIVO and Google Scholar Data as Sources for CERIF Linked Data: A Case in the Agricultural Domain
Let's Talk - Interoperability between University CRIS/IR and Researchfish: A Case Study from the UK
Piloting the use of RAiD in Research.fi