yusuke1997/dblp-id-title huggingface dataset:
Robust noncollocated passive models of a flexible link with uncertain payload and joint inertia
A Fast Reading Method for Multi-Level RRAM in Small-Scale Arrays
Design comparison of low-power rectifiers dedicated to RF energy harvesting
A fully integrated 4GHz continuous-time bandpass Delta-Sigma converter
Effective throughput 1 Gbps-class millimeter-wave wireless system
Design of Compact Current-Drive Power Amplifiers for the Efficient Control of Spin Qubits
The simple multiprocessor communication system
Design And Implementation Of A Monolithic Programme-Controlled System For Retinal Prosthesis
Time-Shifted CDS Enhancement of Comparator-Based MDAC for Pipelined ADC Applications
A scalable and efficient digital signal processing system for real time biological spike detection
Measurement of liquids dielectric property using monopole probes operating at microwave frequencies
A 60GHz class F-E power VCO with vector-modulator feedback in 65nm CMOS technology
A complete device dedicated to ECG signal measurement with integrated 3D Hall sensor for signal correction
UWB LNAs using LC ladder and transformers for input matching networks
A very accurate design of monolithic inductors in a 2D EM simulator
Energy efficiency evaluation of the pulse shapes and modulation techniques for IR-UWB in WBANs
System for exercise analysis
Associative memory neural networks for time series prediction
Design of a balanced 8-modulus RNS
Sampling and signal reconstruction structures performing internal antialiasing filtering
Performance Modeling and Analysis of Asynchronous Linear-Pipeline with Time Variable Delays
High-performance monolithic amplifiers in low microwave bands using GaAs MESFET technology
Novel Electronically Reconfigurable Filter and Its Fractional-Order Counterpart
CMOS FD-SOI Technologies Ruggedness for Millimeter Wave Power Amplifier Design
Iterative median filtering for restoration of images with impulsive noise
An efficient fuzzy neural modeling approach using the fuzzy curve concept
Hiding from Hardware Trojan Detectors by Avoiding Rare Events
Enhanced split-architecture delta-sigma ADC
Prefilter bandwidth effects in asynchronous sequential symbol synchronizers based on pulse comparison by hybrid transitions at half bit rate
Exploring the analytical boundaries of capacitive feedback transimpedance amplifiers
Input-free cascode V thn and V thp extractor circuits
Delay oriented design methodology: application to the design of a VHF low power VLSI polyphase oscillator
The application of sample-selective LPC method in standard CELP 4800 B/S speech coder
A new general connectivity model and its applications to timing-driven Steiner tree routing
Multilevel phase-change memory
A 0.8-13.4GHz combined voltage-controlled oscillator with an exclusive-OR in 130nm SiGe BiCMOS
Controller design for lateral manoeuvres in electromagnetic wind tunnels
Eye Tracking Simulation for a Magnetic-based Contact Lens System
Optimum selection of capacitive array for multibit Sigma-Delta modulators without DEM
Behavioral Modeling of a Programmable UWB/Bluetooth ADC
Improvements on the Design of the Low Saturation Onset Transistor
Design for testability strategies for mixed signal & analogue designs-from layout to system
Automated SystemC to VHDL translation in hardware/software codesign
On Schmitt trigger and other inverters
Shunt voltage regulators for autonomous induction generators. Part I: principles of operation
A polar linearisation system for RF power amplifiers
Monostable-Bistable Transition Logic Elements: Threshold Logic vs. Boolean Logic Comparison
Circuits and signal processing: accomplishments and future trends
Wide-band microstrip patch antenna for personal communication
Indexed Color History Many-Core Engines for Display Stream Compression Decoders
Sigma-delta modulation using filters with nonmonotonic transfer functions. Modelling and analysis
Switch sizing for very low-voltage switched-capacitor circuits
Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology
Coarse grain partial distortion elimination for Hadamard ME in HEVC
Mixed signal SIMD cellular processor array vision chip operating at 30, 000 fps
Divide-by-5 Injection-Locked Frequency Divider Using Assisted Low-modulus Injection Technique
An Integrated Low-power 802.11ba Wake-up Radio for IoT with Embedded Microprocessor
Behavior of discrete-time linear systems of infinite order
A Gigabit UDP/IP network stack in FPGA
Hysteretic Regulators with Partially-Saturated Inductors
A High-Performance Digitally Controlled LC Oscillator for Ku-Band Applications
Design of a programmable analog CMOS rational-powered membership function generator in current mode approach
Predictive correlated double sampling switched-capacitor integrators
An efficient test vector compression technique based on geometric shapes [system-on-a-chip]
Automated Synthesis of 1.5-5 GHz SiGe BiCMOS Differential Amplifiers Loaded on Resistive and Complex-Impedance Terminations
Noise optimization of a wideband capacitive shunt-shunt feedback LNA design suitable for software-defined radio
A redundant wire addition method for Patchable Accelerator
A 1~50mA 20ns Settling Time Low Dropout Regulator
Implementation of 2D SPICE models for finding periodic steady state of strongly nonlinear RF-IC
Shaping of bidimensional distributed structures
Performability measurement of coding algorithms for network on chip
Multi-tasking and Memcomputing with Memristor Cellular Nonlinear Networks
Camera-based Digit Recognition System
Accuracy Improvement by Nonlinearity Reduction in Two-Frequency Laser Heterodyne Interferometer
Block-floating-point enhanced MMSE filter matrix computation for MIMO-OFDM communication systems
Ring-shaped N+/P-well photodiode: study of responsivity enhancement
Degradation of the DC current capability in long-emitter bipolar transistors
A Sigma-Delta closed-loop digital microfluxgate magnetometer
Design and Analysis of Noise Tolerant Ring Oscillators Using Maneatis Delay Cells
Automated image assessment of posterior capsule opacification using Hölder exponents
Optimal structure of interconnection lines for GHz giga-scale nano-CMOS system-on-chip design
Packet reservation protocol for personal mobile communications
Piezoelectric transducers energy extraction for device remote powering: state-of-the-art review
Energy-Quality Scalable Analog-to-Digital Conversion and Machine Learning Engine in a 51.9 nJ/frame Voice Activity Detector
Performance comparison of two wide-tuning-range 13-GHz CMOS LC-VCOs
How to reduce jitter in fractional PLL
Resource constrained clock recovery on programmable logic devices
4-Input NAND and NOR Gates Based on Two Ambipolar Schottky Barrier FinFETs
A High Performance VLSI FFT Architecture
The novel efficient design of XOR/XNOR function for adder applications
Lossless coding of hyperspectral images through components ordering by minimum bidirected spanning tree
Analog implementation of gamma-correction for CMOS cameras
An arbiter synthesis approach based on arbitration scheme generation/selection for HW/SW co-design
Temperature dependence and ZTC bias point evaluation of sub 20nm bulk multigate devices
The effect of filter type on BER of WCDMA-UMTS mobile radio systems
A parallel analog median filter
A user-friendly and fast program for the simulation of power system faults
A Hilbert fractal codec for region oriented compression of color images
Fast wire length estimation in obstructive block placement
FPGA-Based Implementation of RAM with Asymmetric Port Widths for Run-Time Reconfiguration
Smart card for smart campus: KFUPM case study
A survey of delay and gain correction methods for the indirect learning of digital predistorters
Using high-level synthesis to build memory and datapath optimized DSP accelerators
An internet based graphical programming tool for learning power system harmonics measurement
Input Integrated Matching in RF LNA with Inductive Degeneration in Low-Power Regime
Leakage Energy Reduction in Banked Content Addressable Memories
Intermediate Frequency Lamb Wave Resonators and Filters for RF Receiver Architectures
A new variable step LMS algorithm for transform domain
Stability Limited PLL bandwidth Derivation using Impulse Invariance Method
High performance 4: 1 multiplexer with ambipolar double-gate FETs
A Broadband 13 Vpp 40% PAE Stacked Line Driver in 28 nm Bulk CMOS
Analysis and performance trade-offs of linearity calibration for stochastic ADCs
Novel Energy Harvesting Antennas and Circuits for On-body Stretchable and Flexible Electronics
Test of low power circuits: Issues and industrial practices
Effects of delay on the dynamical behaviour of one-dimensional continuous nonlinear systems
Optimized passive devices for low-power LNA design
FPGA based realization of a reduced complexity high speed decoder for error correction
New CMOS instrumentation amplifier dedicated to very low-amplitude signal applications
Subsampling Image Compression using Al-Alaoui Backpropagation Algorithm
A new adiabatic technique for designing low power array architectures
29th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2022, Glasgow, United Kingdom, October 24-26, 2022
Design of Optical Network Unit (ONU) for hybrid TDM/WDM NG-PON
Design of a direct light to time converter and its noise analysis
A new formulation for accurate numerical extraction of interconnect capacitance in ULSI
A 29 dBm 1.9 GHz class B power amplifier in a digital CMOS process
A system-level analysis of robustness by randomised algorithms
A qualitative-modeling-based low-power silicon nerve membrane
Improving Stochastic Quantum-Like Annealing Based on Rerandomization
A 1.2 V BiCMOS companding current-mode integrator for ΣΔ-modulators
Frequency-downconversion and IF channel selection A-DQS sample-and-hold pair for two-step-channel-select low-IF receiver
1.05V on-request 10b General-Purpose ADC in 65nm digital CMOS technology
From StarX32 to VEGA: Low-power and low-noise mixed-signal ASICs for X-ray detectors in space and medical applications
A low noise front-end for multiplexed ENG recording using CMOS technology
A monitoring infrastructure for FPGA self-awareness and dynamic adaptation
Hardware implementation and evaluation of the Flexible router architecture for NoCs
Efficient area and power multiplication part of FFT based on twiddle factor decomposition
Real-time architecture on FPGA for obstacle detection using inverse perspective mapping
Optimal combination of dedicated multiplication blocks and adder trees schemes for optimized radix-2m array multipliers realization
Multi-Objective Optimization of Standard Cells Performance at Transistor Level, a Comparison of Different Meta-Heuristics Efficiency
CMOS LNA optimization techniques: Comparative study
High-pass or low-pass ΣΔ modulators?
Simultaneous bidirectional transceiver with impedance matching
Identification and control of an asynchronous machine using neural networks
Evaluation of Lattice-Based Signature Schemes in Embedded Systems
MISMATCH: a basis for semi-automatic functional mixed-signal test-pattern generation
Characterization of RF energy harvesting at 2.4 GHz
Application of combining classifiers for text-independent speaker identification
A reconfiguration approach for radio mobile services platforms
Hume: a bounded time concurrent language
Two-step quantization in multibit ΔΣ-modulators
Impact evaluation of logic blocks configuration on FPGA's soft error rate estimation
Design considerations for fast-settling two-stage Miller-compensated operational amplifiers
28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021, Dubai, United Arab Emirates, November 28 - Dec. 1, 2021
The analysis of multi-phase current feedforward type-III constant on-time control with ultrafast load transient response for voltage regulator modules
Synthesis of bandpass circulator-tree wave digital filters
Morphological signal adaptive median filter for noise removal
Custom layout strategy for rectangle-shaped log-depth multiplier reduction tree
Systematic Offset Detection and Evaluation Using Hierarchical Graph-Based Sizing and Biasing
AAL type 1 for real-time video transmission over ATM networks
A Pipelined Implementation of the $n$-mode Tensor-Matrix Multiplication
Low Profile Metamaterial Band-Pass Filter Loaded with 4-Turn Complementary Spiral Resonator for WPT Applications
Structured Recurrent Neural Network Model Order Reduction for SISO and SIMO LTI Systems
FFT implementation using QCA
Modeling of Feedback Analog Circuits with VHDL
A Low Noise CMOS Preamplifier for Quartz-Based Gyro-Meter
A new interference cancellation technique for CDMA signals
High efficiency class-E power amplifier with a new output network
SPICE model for the single electron tunnel junction
RapidLink: A network-on-chip architecture with double-data-rate links
A Design Methodology for Power Electronics Digital Control based on an FPGA in the Loop Prototyping
Dedicated hardware implementation of a linear congruence solver in FPGA
Logic optimization of circuits with pre-defined internal don't cares
Control strategy of a solar power inverter (analysis of a seventh order system)
Experimental results obtained from a 1.6 GHz CMOS quadrature output phase locked loop with on-chip DC-DC converter
Low power SC CMFB folded cascode OTA optimization
Realization of the third-order high-pass transfer function with real zeroes
ECG compression algorithm based on coding and energy compaction of the wavelet coefficients
A 13.5 mW Decimator for a 20 MHz bandwidth CTΔΣ Modulator using poly-phase decomposition techniques
Realization of fully balanced filter using low power active inductor
A Scan Register Based Access Scheme for Multilevel Non-Volatile Memristor Memory
Sensitivity invariant sums of high-order
CMOS Differential Stage with Improved DC Gain, CMRR and PSRR Performance
A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization
A SiGe 4-Gsps 2-bits digitizer with 2-4 GHz input bandwidth
Hardware Trojan Design and Detection in Asynchronous NCL Circuits
Comparative Study of Single Event Transient Effects on Dynamic Comparator in Bulk CMOS
Hybrid Multisource Clock Tree Synthesis
A 1V 115μW 20nV/√Hz 15-50dB-range PGA with 5MHz bandwidth for UWB personal area network
Low-Voltage Limitations and Challenges of Memory-Rich Nano-Scale CMOS LSIs
DC-DC Boost Converter Design with External Control via Optical Fiber for Cryogenic Applications
Silicon bipolar LNAs in the X and Ku bands
A 3.1-10.6 GHz RF CMOS circuits monolithically integrated with dipole antenna
Ideal memristors as reciprocal elements
Modular architecture for a family of multilevel 256/192/128/64 Mbit 2-bit/cell 3 V-only NOR flash memory devices
Requirements for embedded data converters in an ADSL communication system
Design of a modular and mixed neuromimetic ASIC
Frequency tracking based analysis of laser Doppler velocimetry signals for sound field measurements
Fast static compaction of tests composed of independent sequences: basic properties and comparison of methods
Bootstrap Capacitor Charge Control Method for GaN-based 4-Switch Buck-Boost Converter
Novel high throughput implementation of SHA-256 hash function through pre-computation technique
Affordable tools for teaching embedded systems
A new model for metastability
A PLL with loop bandwidth enhancement for low-noise and fast-settling clock recovery
A 6-20 GHz 400-MHz Modulation-Bandwidth CMOS Transmitter IC
A 24-28 GHz Tunable LNA in 22nm FDSOI Technology
A fully-differential operational amplifier using a new chopping technique and low-voltage input devices
Usefulness and effectiveness of HW and SW protection mechanisms in a processor-based system
TDES cryptography algorithm acceleration using a reconfigurable functional unit
SPU based microrobots: a new approach to the robotic world
The wireless system for EGG signal acquisition
Nonlinear behavioral model extraction of RF power amplifier devices from manufacturer's data
Discrete-time Decimation filter Design for Multistandard RF Sub-sampling Receiver
VHDL synthesis of a 0.7 μ CMOS ASIC for block segmentation of digital images
Low-voltage low-power adaptive biased high-efficiency integrated amplifiers
Neural network modeling of land mobile radio channels with nonlinear transmit amplifiers
A New PhotoFET for Monolithic Active Pixel Sensors Using CMOS Submicronic Technology
Side-channel evaluation of FPGA implementations of binary Edwards curves
A SAW-less receiver front-end with low power active self-interference canceler
FPGA-Based Platform for Food Classification Using Hyperspectral Images
Unequal Error Protective and Standard Compatible Multiple Descriptions Coding for Image Communication
Active feedback amplifier approach for microwave filter
A highly parallel 4K real-time HEVC fractional motion estimation architecture for FPGA implementation
Modeling and stability in MOS transistor circuits
A high-speed fully differential current switch
An Ultra-Low Power CMOS Pulse Generator for Skyrmionic Circuits
Holdability and stabilizability of 2D Roesser model
Evaluation of the Performance Impact of Clock Jitter and Phase Noise in a Two-Band Frequency-Interleaved ADC
A time-scaling approach to detect the closely spaced segments of noisy speech signals
Design of a microprocessor based current-hysteresis controller
System analysis of multiple-input multiple-output WLAN receiver
An Analytical Approach for Designing Passive Matching Networks
P2M: A 2MPixel CMOS Image Sensor for Soft X-Ray Detection
A Preamplifier-discriminator circuit based on a Common Gate Feedforward TIA for fast time measurements using diamond detectors
FinFET technology for analog and RF circuits
Memory-Aware Tiles Workload Balance through Machine-Learnt Complexity Reduction for HEVC
Novel method for the closed-form analysis and design of a 4 th order single-amplifier filter
A l0-bit 4 MS/s SAR ADC with Fully-Dynamic Duty-Cycled Input Driver
Impact of dynamic voltage scaling and thermal factors on FinFET-based SRAM reliability
Estimation techniques for timing mismatch in time-interleaved analog-to-digital converters: Limitations and solutions
Sizing analog circuits using an SQP and Branch and Bound based approach
Rectangular Wave Delta Modulation Buck Regulator
Design and implementation of a neural command rule on a FPGA circuit
Analytical modeling of short-circuit energy dissipation in submicron CMOS structures
An all-digital architecture for low-jitter regulated delay lines
Exploring Architectural Solutions for an Energy-Efficient Kalman Filter Gain Realization
An FPGA-based genetic microarray processing device
Hardware/software system co-verification of an active reconfigurable board with SystemC-VHDL
Delay estimation in CDMA system by differentially coherent eigenanalysis
User choices for efficient 3D motion and shape extraction from orthographic projections
All-digital A/D converter TAD for high-resolution and low-power sensor/RF interface
16-channel readout ASIC for a hodoscope
Design of a selective digital filter for a DAVIC compliant modem
Compensation of a winner take all circuit
VCSEL device modeling and parameter extraction technique
EDM: A multiclassification support system to identify seizure type using K Nearest Neighbor
Design and implementation of a 6-GHz array of two differential oscillators coupled through a MOS transistor network
Reducing bit flipping problems in SRAM physical unclonable functions for chip identification
A 4-bit Architecture of SEED Block Cipher for IoT Applications
Fast co-processor for real time video transmission
Modular energy recycling differential logic (MERDL) for low power application
A Small-Reconfigurable Low-Pass Filter for Analog Front-End Receivers
Current-feedback linearization technique for RTDs
Robust pole assignment: conventional and entropy/H ∞ approaches
Sub-1V Oguey's Current Reference Without Resistance
A new general purpose line probe routing algorithm
Predicting Interferences of Switching High Voltage Devices on Mixed-Signal Designs
Class AB output stages for low voltage CMOS opamps with accurate quiescent current control by means of dynamic biasing
Identifying DC bias conditions for maximum DC current in digitally-assisted analog design
Vision optical computers
A 0.36-mm 2 Fully Integrated Electronic Interface for PiezoMEMS in 0.35 μm CMOS technology
High order mismatch noise shaping for bandpass DACs
CORA-OpAmp: A Compact Open-Source Reinforcement-Learning Approach for Operational Amplifier Optimization in IHP SG13G2
A high-sensitivity battery-less wake-up receiver for 915 MHz ISM band applications
A cost effective smart power approach with NMOS based blocks in standard CMOS technology
Fast multipole method based extraction of PEEC parameters
Design and optimization of a low jitter clock-conversion PLL for SONET/SDH optical transmitters
The frequency spectrum of polar modulated PWM signals and the image problem
A Neuromorphic Device for Detecting High-Frequency Oscillations in Human iEEG
Ergodic capacity of a 2 × 2 MIMO system under phase uncertainty at the transmitter
An Efficient Low Cost FPGA MIMO Channel Model
A double-sampled hybrid CT/DT SMASH ΣΔ modulator for wideband applications
Systematic Framework Leveraging Early Assessment of DNN Reliability for Efficient and Reliable FPGA-Based Inference Deployment
Orientationally Selective micro-Coil Design of Intracortical Magnetic Neurostimulation
On the use of artificial intelligence for MAI cancellation in DS/CDMA over Rayleigh fading channel with power control error
50 nA, 1 V nanowatt resistor-free compact CMOS current references
Architecting a computer with a full optical RAM
A Flexible Metamaterial Based on Split-Ring Resonator Design
A novel sub-10 ps resolution TDC for CMOS SPAD array
QoS- and revenue aware adaptive scheduling algorithm
Design of a 2 μW RFID baseband processor featuring an AES cryptography primitive
Improving the EMI Robustness of Feedback-based Time-Encoding Readout Architectures for Resistive Sensor Interfaces
Ultra Low Power ASIP Design for Wireless Sensor Nodes
Statistical characterization and optimization of integrated circuits based on singular value decomposition
Volume rendering with least squares spline reconstruction
A CMOS ASIC for differential read-out of ISFET sensors
Dual Output Regulating Rectifier for an Implantable Neural Interface
Downlink capacity estimation for UMTS network: Impact of users' position, service bit rates and cell radius
Resource sharing in CMOS SPAD arrays: application requirements and design solutions
Evaluation of soft segment modeling on a phoneme recognition system
An efficient algorithm-based fault detection and recovery on multiprocessor systems
A low-dropout regulator with smooth peak current control (SPCC) topology for over current protection
Pre-silicon verification of multiprocessor SoCs: The case for on-the-fly coherence/consistency checking
Chip level security: Why ? How ?
A low jitter self-calibration PLL for 10Gbps SoC transmission links application
Pspice behavior and thermal modeling of the PIN Diode: A circuit approach
VLSI implementation for low density parity check decoder
An experimental course on digital communications
A low-power continuous-time incremental 2nd-order-MASH ΣΔ-modulator for a CMOS imager
Probabilistic Method for Reliability Estimation of SP- Networks considering Single Event Transient Faults
A Micro-architecture Simulator for Multimedia Stream Processor
Solvable Chaos as a Tool for Evaluating Wideband Delay Cells in Matched Filters
A simulator-optimizer for the design of very low phase noise CMOS LC-oscillators
Novel notch filter in transistor-only filters domain
Low-Power Real-Time Keyword Spotting for Autonomous Edge Devices
Topological effect on optimal partitioning of multicast trees
A novel CMOS all-pass tunable phase shifter
Dependability computations for fault-tolerant system based on FPGA
MEMS for distributed wireless sensor networks
High performance distributed arithmetic FPGA decimators for video-frequency applications
A low-power, high-resolution, 1 GHz differential comparator with low-offset and low-kickback
Improved Scene Classification by Dynamic CNNs
A statistical modelling of the Underwater Acoustic Channel
Pi-Network design software
Comparison of Top-Plate and Bottom-Plate Charge Reusing in Switched-Capacitor Power Converters