yusuke1997/dblp-id-title huggingface dataset:
Dahu: Commodity switches for direct connect data center networks
Fast regular expression matching in hardware using NFA-BDD combination
High speed pattern matching algorithm based on deterministic finite automata with faulty transition table
Scalable high-performance parallel design for Network Intrusion Detection Systems on many-core processors
Software Defined Networks-on-Chip for Multi/Many-Core Systems: A Performance Evaluation
External storage middleware for wireless devices with limited resources
ISP managed peer-to-peer
Stateful hardware decompression in networking environment
Simplifying data path processing in next-generation routers
Accelerating Sketch-Based Computations with GPU: A Case Study for Network Traffic Change Detection
Data-driven resource flexing for network functions visualization
Extensible hierarchical simulation of network systems
Many-Field Packet Classification for Software-Defined Networking Switches
Towards a highly scalable network tester
Split: Optimizing Space, Power, and Throughput for TCAM-Based Classification
Implementing URL-based forwarding on a network processor-based router platform
A Systematic Evaluation of Emerging Mesh-like CMP NoCs
Netbench: Framework for Evaluation of Packet Processing Algorithms
Thermal-aware vacation and rate adaptation for network packet processing
A practical fast parallel routing architecture for Clos networks
Invenio: Communication Affinity Computation for Low-Latency Microservices
Dark packets and the end of network scaling
Group round robin: improving the fairness and complexity of packet scheduling
Fine-grained power scaling algorithms for energy efficient routers
CoRC: coordinated routing and caching for named data networking
High-speed packet classification using binary search on length
Energy-aware routing in hybrid optical network-on-chip for future multi-processor system-on-chip
Performing time-sensitive network experiments
Congestion management for non-blocking clos networks
No-hop: In-network Distributed Hash Tables
P4GPU: Accelerate Packet Processing of a P4 Program with a CPU-GPU Heterogeneous Architecture
Characterizing the algorithmic complexity of reconfigurable data center architectures
Efficient traffic aware power management in multicore communications processors
A Service-Agnostic Software Framework for Fast and Efficient in-Kernel Network Services
Forwarding Strategies for Applications in Named Data Networking
Change-point detection method on 100 Gb/s ethernet interface
Scalable network-based buffer overflow attack detection
Ensemble routing for datacenter networks
Addressing data compatibility on programmable network platforms
A programmable architecture for scalable and real-time network traffic measurements
DPICO: a high speed deep packet inspection engine using compact finite automata
Design patterns for tunable and efficient SSD-based indexes
Towards A Marketplace for Multi-domain Cloud Network Slicing: Use Cases
A Study of Speed Mismatches Between Communicating Virtual Machines
Co-match: fast and efficient packet inspection for multiple flows
SSA: a power and memory efficient scheme to multi-match packet classification
Architectural impact of stateful networking applications
DOS: a scalable optical switch for datacenters
Axon: a flexible substrate for source-routed ethernet
Revisiting the internet hourglass: core strength vs. middle-age spread
Low power architecture for high speed packet classification
NetSlices: scalable multi-core packet processing in user-space
An improved algorithm to accelerate regular expression evaluation
Overcoming the memory wall in packet processing: hammers or ladders?
Automated signature extraction for high volume attacks
HELIOS: a high energy-efficiency locally-scheduled input-queued optical switch
Toward fast NDN software forwarding lookup engine based on hash tables
Gigabit routing on a software-exposed tiled-microprocessor
Optimizing a network layer moving target defense for specific system architectures
Position-aware cuckoo filters
Design of credentials for high-speed access control in service-oriented networks
daPIPE a Data Plane Incremental Programming Environment
OASis: towards extensible open-architecture services platforms
MCA 2 : multi-core architecture for mitigating complexity attacks
FlowShadow: a Fast Path for Uninterrupted Packet Processing in SDN Switches
Building an Internet Router with P4Pi
A novel 3D layer-multiplexed on-chip network
KickTree: A Recursive Algorithmic Scheme for Packet Classification with Bounded Worst-Case Performance
Cloud Customers' Historical Record Based On-Demand Resource Reservation
Shortcutting Fast Failover Routes in the Data Plane
NI + Router Microarchitecture for NoC-based Communication Systems
sNICh: efficient last hop networking in the data center
Software radio: a broad change in RF communications systems design
Coexist: integrating content oriented publish/subscribe systems with ip
Virtual Device Passthrough for High Speed VM Networking
Localized asynchronous packet scheduling for buffered crossbar switches
Scalable Ternary Content Addressable Memory implementation using FPGAs
Enterprise LTE and WiFi Interworking System and A Proposed Network Selection Solution
Efficient lookahead routing and header compression for multicasting in networks-on-chip
Re-design of path synchronization for minimal latency data vortex optical interconnection network
Virtual Network Mapping with Traffic Matrices
Blender: upgrading tenant-based data center networking
Frame shared memory: line-rate networking on commodity hardware
On High QoS Constraints over Shared Resource Networks
Reliably Scalable Name Prefix Lookup
Network service quality rank: a network selection algorithm for heterogeneous wireless networks
PVNs: making virtualized network infrastructure usable
Enhancing Scalable Name-Based Forwarding
A Low-Cost and Energy-Efficient NoC Architecture for GPGPUs
On LID assignment in infiniBand networks
Ruler: high-speed packet matching and rewriting on NPUs
Grafting sockets for fast container networking
Ally: OS-Transparent Packet Inspection Using Sequestered Cores
ReClick - A Modular Dataplane Design Framework for FPGA-Based Network Virtualization
Controlling Strategy Retransmissions in Named Data Networking
Evaluating regular expression matching engines on network and general purpose processors
State Abstraction and Management in Software-Defined Networks
Programmable measurement architecture
Pipelined two step iterative matching algorithms for CIOQ crossbar switches
A One-Way Proof-of-Work Protocol to Protect Controllers in Software-Defined Networks
High-performance architecture for dynamically updatable packet classification on FPGA
P5: Programmable Parsers with Packet-level Parallel Processing for FPGA-based Switches
A traffic-aware top-N firewall ruleset approximation algorithm
Efficient and programmable ethernet switching with a NoC-enhanced FPGA
Proceedings of the 2016 Symposium on Architectures for Networking and Communications Systems, ANCS 2016, Santa Clara, CA, USA, March 17-18, 2016
A NFA-based programmable regular expression match engine
Packet prediction for speculative cut-through switching
A proposed architecture for the GENI backbone platform
Modeling Filtering Predicates Composition with Finite State Automata
Resistance Against Brute-Force Attacks on Stateless Forwarding in Information Centric Networking
Proceedings of the 2018 Symposium on Architectures for Networking and Communications Systems, ANCS 2018, Ithaca, NY, USA, July 23-24, 2018
SMILER: Towards Practical Online Traffic Classification
Umbrella: a unified software defined development framework
BPFabric: Data Plane Programmability for Software Defined Networks
Acceleration of decision tree searching for IP traffic classification
A methodology for evaluating runtime support in network processors
Data path credentials for high-performance capabilities-based networks
An Interest Control Protocol for Named Data Networking Based on Explicit Feedback
A Passive Network Appliance for Real-Time Network Monitoring
NFA split architecture for fast regular expression matching
A Scalability Study of Enterprise Network Architectures
A Feature-based Video Transmission Framework for Visual IoT in Fog Computing Systems
Asymmetric scaling on network packet processors in the dark silicon era
EINIC: an architecture for high bandwidth network I/O on multi-core processors
Network-wide routing-oblivious heavy hitters
Input-queued switches with logarithmic delay: necessary conditions and a reconfigurable scheduling algorithm
Inferring Packet Processing Behavior Using Input/Output Monitors
Enabling Correct Interest Forwarding and Retransmissions in a Content Centric Network
Scalable Many-Field Packet Classification using Multidimensional-Cutting Via Selective Bit-Concatenation
Modular design of data vortex switch network
APF: fast network all-pair reachability calculation
Macchiato: Importing Cache Side Channels to SDNs
Optimal packet scheduling in output-buffered optical switches with limited-range wavelength conversion
On Efficient Oblivious Wavelength Assignments for Programmable Wide-Area Topologies
Fast packet classification using bloom filters
2011 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), Brooklyn, NY, USA, October 3-4, 2011
BCCC: an expandable network for data centers
Future networking: reconfiguration heartland, challenge and revolution
Proceedings of the 2005 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2005, Princeton, New Jersey, USA, October 16-18, 2005
A hardware spinal decoder
Sketch-based Entropy Estimation for Network Traffic Analysis using Programmable Data Plane ASICs
Implementing an OpenFlow switch on the NetFPGA platform
Optimizing Many-field Packet Classification on FPGA, Multi-core General Purpose Processor, and GPU
An Attack-Resilient Source Authentication Protocol in Controller Area Network
Efficient software packet processing on heterogeneous and asymmetric hardware architectures
A lock-free, cache-efficient shared ring buffer for multi-core architectures
Packet classification using coarse-grained tuple spaces
NetBump: user-extensible active queue management with bumps on the wire
File-Aware P2P Traffic Classification and Management
A folded pipeline network processor architecture for 100 Gbit/s networks
LaFA : lookahead finite automata for scalable regular expression detection
NetEx: efficient and cost-effective internet bulk content delivery
Memory optimization for packet classification algorithms
Towards high-performance flow-level packet processing on multi-core network processors
Static power reduction in caches using deterministic naps
Throughput of random arbitration for approximate matchings
Streaming Solutions for Fine-Grained Network Traffic Measurements and Analysis
Distributed Control Plane For High Performance Switch-based VXLAN Overlays
Mitigation of IPv6 Router Spoofing Attacks with P4
2019 ACM/IEEE Symposium on Architectures for Networking and Communications Systems, ANCS 2019, Cambridge, United Kingdom, September 24-25, 2019
A novel reconfigurable hardware architecture for IP address lookup
Proceedings of the tenth ACM/IEEE symposium on Architectures for networking and communications systems, ANCS 2014, Los Angeles, CA, USA, October 20-21, 2014
Scaling the Performance of Network Intrusion Detection with Many-core Processors
Toward incremental FIB aggregation with quick selections (FAQS)
High-throughput sketch update on a low-power stream processor
Software-based implementations of updateable data structures for high-speed URL matching
Realizing Zenoh with programmable dataplanes
Resource mapping and scheduling for heterogeneous network processor systems
Compiling PCRE to FPGA for accelerating SNORT IDS
FTvNF: fault tolerant virtual network functions
Evaluating the benefits of caching and stateless forwarding in mobile information-centric networks
Fast and Compact Regular Expression Matching Using Character Substitution
VNF chain allocation and management at data center scale
A Framework for Reproducible Data Plane Performance Modeling
Memory-Efficient String Matching for Intrusion Detection Systems using a High-Precision Pattern Grouping Algorithm
Networking hardware: what drives innovation?
CODIS: A New Compression Scheme for Bitmap Indexes
Efficient memory utilization on network processors for deep packet inspection
Proceedings of the 2007 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2007, Orlando, Florida, USA, December 3-4, 2007
Query language for large-scale P4 network debugging
Towards Understanding the Performance of P4 Programmable Hardware
A new TCB cache to efficiently manage TCP sessions for web servers
Non-crypto Hardware Hash Functions for High Performance Networking ASICs
ElastiCon: an elastic distributed sdn controller
Using P4 on Fixed-Pipeline and Programmable Stratum Switches
SANS: a scalable architecture for network intrusion prevention with stateful frontend
Network processor acceleration for a Linux* netfilter firewall
RwHash: Rewritable Hash Table for Fast Network Processing with Dynamic Membership Updates
Improving the Resilience of Fast Failover Routing: TREE (Tree Routing to Extend Edge disjoint paths)
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture
Optimizing VM live migration strategy based on migration time cost modeling
QoS aware dynamic power scaling algorithms for deploying energy efficient routers
A digital PUF-based IP protection architecture for network embedded systems
Design of a scalable network programming framework
Networked Answer to "Life, The Universe, and Everything"
Routing Optimization for Ensemble Routing
Rule Compilation in Multi-Tenant Networks
Fast and scalable pattern matching for content filtering
Spectral clustering based regular expression grouping
Attendre: mitigating ill effects of race conditions in openflow via queueing mechanism
Design and performance analysis of a DRAM-based statistics counter array architecture
Testbed for evaluating worm containment systems
Cache Sharing Using a Bloom Filter in Named Data Networking
Simple two-priority, low-jitter scheduler
Integration and QoS of multicast traffic in a server-rack fabric with 640 100g ports
Scalable TCAM-based regular expression matching with compressed finite automata
A packet-in message filtering mechanism for protection of control plane in openflow networks
Bit-shuffled trie: a new approach for IP address lookup
Hash-based routing for scalable datacenters
Softly defined networking
A scalable load balancer for forwarding internet traffic: exploiting flow-level burstiness
A Multi-dimensional Progressive Perfect Hashing for High-Speed String Matching
TabTree: A TSS-assisted Bit-selecting Tree Scheme for Packet Classification with Balanced Rule Mapping
Writing P4 compiler backend for packet processing engines
Micro Secure Socket Layer (MSSL) for micro server
On design of bandwidth scheduling algorithms for multiple data transfers in dedicated networks
Proceedings of the 2009 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2009, Princeton, New Jersey, USA, October 19-20, 2009
LEAP: latency- energy- and area-optimized lookup pipeline
Architecture for an open source network tester
Software techniques to improve virtualized I/O performance on multi-core systems
End-to-end congestion management for non-blocking multi-stage switching fabrics
Improving Backpressure-based Adaptive Routing via Incremental Expansion of Routing Choices
A scalable multithreaded L7-filter design for multi-core servers
FIFO Service with Differentiated Queueing
Toward terabyte-scale caching with SSD in a named data networking router
Minflate: Combining Rule Set Minimization with Jump-based Expansion for Fast Packet Classification
MultiLayer processing - an execution model for parallel stateful packet processing
Floating ground architecture: overcoming the one-hop boundary of current mobile internet
Fast submatch extraction using OBDDs
VNF chain abstraction for cloud service providers
Compact architecture for high-throughput regular expression matching on FPGA
k-p0f: A high-throughput kernel passive OS fingerprinter
A novel hybrid SRAM/DRAM memory architecture for fast packet buffers
Thermal prediction and scheduling of network applications on multicore processors
Towards effective network algorithms on multi-core network processors
Proceedings of the 2006 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2006, San Jose, California, USA, December 3-5, 2006
Curing regular expressions matching algorithms from insomnia, amnesia, and acalculia
The case for hardware transactional memory in software packet processing
WormTerminator: an effective containment of unknown and polymorphic fast spreading worms
Comparison of Frameworks for High-Performance Packet IO
A Dynamically Adapting Network Programming Framework
Evolution of cache replacement policies to track heavy-hitter flows
Optimization of pattern matching algorithm for memory based architecture
Chain-Based DFA Deflation for Fast and Scalable Regular Expression Matching Using TCAM
Faithful reproduction of network experiments
Accelerated DDoS Attacks Mitigation using Programmable Data Plane
Proceedings of the 2008 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2008, San Jose, California, USA, November 6-7, 2008
Graph-To-P4: A P4 boilerplate code generator for parse graphs
HyPaFilter: A Versatile Hybrid FPGA Packet Filter
Efficient Implementation of Dynamic Protocol Stacks
qSDS: A QoS-Aware I/O Scheduling Framework towards Software Defined Storage
Enhancements for Hardware-based IEEE802.1CB embedded in Automotive Gateway System-on-Chip
P4DNS: In-Network DNS
Regular expression matching with pipelined delayed input DFAs for high-speed networks
Mahjong: A Generic Framework for Network Data Plane Verification
An experimental evaluation of distributed rate limiting for cloud computing applications
ACM/IEEE Symposium on Architectures for Networking and Communications Systems, ANCS 2017, Beijing, China, May 18-19, 2017
Node configuration for the Aho-Corasick algorithm in Intrusion Detection Systems
Destination-based adaptive routing on 2D mesh networks
How to measure the speed of light with programmable data plane hardware?
Virtual Network Embedding in Hybrid Data Centers
Dynamic frequency scaling architecture for energy efficient router
Designing high-speed packet processing tasks at arbitrary levels of abstraction: implementation and evaluation of a MIXMAP system
Predictive Model-Based Thermal Management for Network Applications
Popularity-driven coordinated caching in named data networking
Cryptographic Hashing in P4 Data Planes
Flow-slice: a novel load-balancing scheme for multi-path switching systems
xOMB: extensible open middleboxes with commodity servers
Superspreader detection system on NetFPGA platform
A mobile healthcare system using IMS and the HL7 framework
COPSS: An Efficient Content Oriented Publish/Subscribe System
Empirical Predictability Study of SDN Switches
To CMP or not to CMP: analyzing packet classification on modern and traditional parallel architectures
Dynamic Optical Switching for Latency Sensitive Applications
Multi-core HTB for bandwidth sharing
Design optimization of a highly parallel InfiniBand host channel adapter
Frame-aggregated concurrent matching switch
Stick to the Script: Monitoring The Policy Compliance of SDN Data Plane
Host-based multi-tenant technology for scalable data center networks
A new embedded platform for rapid development of network applications
High-Performance Match-Action Table Updates from within Programmable Software Data Planes
Parallelization of Snort on a multi-core platform
Lossy Compression of Packet Classifiers
A Ternary Unification Framework for optimizing TCAM-based packet classification systems
SLIM: Enabling Transparent Extensibility and Dynamic Configuration via Session-Layer Abstractions
A programmable message classification engine for session initiation protocol (SIP)
Impact of the end-system and affinities on the throughput of high-speed flows
Optimal XOR hashing for a linearly distributed address lookup in computer networks
Experience with high-speed automated application-identification for network-management
Accelerating OpenFlow switching with network processors
Links as a Service (LaaS): Guaranteed Tenant Isolation in the Shared Cloud
Fast and memory-efficient regular expression matching for deep packet inspection
Is Memory Disaggregation Feasible?: A Case Study with Spark SQL
Multivariate Time-Series Prediction for Traffic in Large WAN Topology
Secure and efficient key management protocol (SEKMP) for wireless sensor networks
CAMP: fast and efficient IP lookup architecture
Weighted random oblivious routing on torus networks
Proceedings of the Eleventh ACM/IEEE Symposium on Architectures for networking and communications systems, ANCS 2015, Oakland, CA, USA, May 7-8, 2015
Asynchronous Extern Functions in Programmable Software Data Planes
Experimental evaluation of a coarse-grained switch scheduler
Airblue: a system for cross-layer wireless protocol development
An ultra high throughput and memory efficient pipeline architecture for multi-match packet classification without TCAMs
Encrypted Packet Forwarding in Virtualized Networks
ExRec: Experimental Framework for Reconfigurable Networks Based on Off-the-Shelf Hardware
Enhancing interoperability and stateful analysis of cooperative network intrusion detection systems
Packet pre-filtering for network intrusion detection
BRICK: a novel exact active statistics counter architecture
Advanced algorithms for fast and scalable deep packet inspection
Generic change detection (almost entirely) in the dataplane
Load balancing packets on a tile-based massive multi-core processor with S-NUCA
BPFHV: Adaptive Network Paravirtualization for Continuous Cloud Provider Evolution
Named data networking on a router: Fast and DoS-resistant forwarding with hash tables
Minimizing the overhead in implementing flow-aware networking
FAR: A fault-avoidance routing method for data center networks with regular topology
PLWAH+: a bitmap index compressing scheme based on PLWAH
Packet scheduling for deep packet inspection on multi-core architectures
Towards a more programmable and performance-optimized Virtual Switch: Introducing P4 programmability within OVS
Life on the Edge: Unraveling Policies into Configurations
Securing multi-core multi-threaded packet processors
BASEL (Buffer mAnagement SpEcification Language)
Random Linear Network Coding on Programmable Switches
Graph Measures of Network Content-Delivery Energy
Hardware Precomputation of Entropy for Anomaly Detection
Offloading data plane functions to the multi-tenant Cloud Infrastructure using P4
P4MT: Multi-Tenant Support Prototype for International P4 Testbed
Exploitation and threat analysis of open mobile devices
Hacking NetCOPE to Run on NetFPGA-10G
Fast Userspace Packet Processing
Application-transparent scheduling of socket system calls on many-core systems
AC-Suffix-Tree: Buffer Free String Matching on Out-of-Sequence Packets
A scalable routing and admission control model in sdn-based networks
Design of a web switch in a reconfigurable platform
PPI: Towards precise page identification for encrypted Web-browsing traffic
Performance measurement of the CCNx Synchronization protocol
Picking pesky parameters: Optimizing regular expression matching in practice
Performance Measurement of Name-Centric Content Distribution Methods
On runtime management in multi-core packet processing systems
Symposium on Architecture for Networking and Communications Systems, ANCS '12, Austin, TX, USA - October 29 - 30, 2012
Name Prefix Matching Using Bloom Filter Pre-Searching
Interfacing to a virtualized network infrastructure through network service abstractions
Range Tries for scalable address lookup
Fast payload-based flow estimation for traffic monitoring and network security
The Impact of Thread-Per-Core Architecture on Application Tail Latency
On Incremental Deployment of Named Data Networking in Local Area Networks
Symerton--using virtualization to accelerate packet processing