yusuke1997/dblp-id-title huggingface dataset:
Computability and Complexity in Analysis, CCA 2002, ICALP 2002 Satellite Workshop, Málaga, Spain, July 12-13, 2002
Second Workshop on Computability and Complexity in Analysis, CCA 1996, August 22-23, 1996, Trier, Germany
CCA 2009 Front Matter - Proceedings of the Sixth International Conference on Computability and Complexity in Analysis
Low Temperature Limit of Equations - Hidden Discrete Structure
Fractals and Complexity
The Degree of Unsolvability of a Real Number
Computability and Complexity in Analysis, 4th International Workshop, CCA 2000, Swansea, UK, September 17-19, 2000, Selected Papers
From Interval Computations to Constraint-Related Set Computations: Towards Faster Estimation of Statistics and ODEs under Interval and p-Box Uncertainty (Invited Talk)
Effectively Open Real Functions
Proximal Connectedness
Admissible Representations of Limit Spaces
The Dedekind Reals in Abstract Stone Duality
A Sequentially Computable Function that is not Effectively Continous at any Point
On diagonal sets in uncountable structures
On the Computational Content of the Krasnoselski and Ishikawa Fixed Point Theorems
Effective Choice and Boundedness Principles in Computable Analysis
The Uniformity Conjecture
A Generic Root Operation for Exact Real Arithmetic
Computability on the probability measures on the Borel sets of the unit interval
Effective Dispersion in Computable Metric Spaces
Computing a Required Absolute Precision from a Stream of Linear Fractional Transformations
Multi-Functions on Multi-Represented Sets are Closed under Flowchart Programming
Computable Analysis via Representations
Computable Versions of Basic Theorems in Functional Analysis
Decidability of the graph of a map in the model of Blum, Shub and Smale
Fast Online Real Multiplication
Towards the Complexity of Riemann Mappings (Extended Abstract)
Computability of Probability Distributions and Distribution Functions
delta-Approximable Functions
CCA 2005 - Second International Conference on Computability and Complexity in Analysis, August 25-29, 2005, Kyoto, Japan
Random Iteration Algorithm for Graph-Directed Sets
Design of Neuromorphic Hardwares
Effective Fixed Point Theorem over a Non-computably Separable Metric Space
Computer Verified Exact Analysis (Tutorial)
Proceedings of the Fourth International Conference on Computability and Complexity in Analysis, CCA 2007, Siena, Italy, June 16-18, 2007
Computability and Computable Uniqueness of Urysohn's Universal Metric Space
Weihrauch Degrees, Omniscience Principles and Weak Computability
Sixth International Conference on Computability and Complexity in Analysis, CCA 2009, Ljubljana, Slovenia, August 18-22, 2009
A Computable Spectral Theorem
Formalisation of Computability of Operators and Real-Valued Functionals via Domain Theory
Proceedings of the Third International Conference on Computability and Complexity in Analysis, CCA 2006, November 1-5, 2006, University of Florida, Gainesville, USA
Banach-Mazur Computable Functions on Metric Spaces
Program Schemes over Continuous Algebras
Theory and Practice of Higher-type Computation (Tutorial)
Representing Probability Measures using Probabilistic Processes
Proceedings of the Fifth International Conference on Computability and Complexity in Analysis, CCA 2008, Hagen, Germany, August 21-24, 2008
Computing Conformal Maps onto Canonical Slit Domains
A Survey of Exact Arithmetic Implementations
Separations of Non-monotonic Randomness Notions
Mathematical Computability Questions for some Classes of Linear and Non-Linear Differential Equations Originated from Hilbert's Tenth Problem
Computable Real Functions: Type 1 Computability Versus Type 2 Computability
Computational Dimension of Topological Spaces
A Note on Closed Subsets in Quasi-zero-dimensional Qcb-spaces (Extended Abstract)
Fine Computable Functions and Effective Fine Convergence
Computability and Complexity of Julia Sets (Invited Talk)
Real Number Representations of Graph-Directed IFS Attractors
Computable Separation in Topology, from T_0 to T_3
Canonical Effective Subalgebras of Classical Algebras as Constructive Metric Completions
Characterization of the Computable Real Numbers by Means of Primitive Recursive Functions
Some Properties of the Effective Uniform Topological Space
On Computable Metric Spaces Tietze-Urysohn Extension Is Computable
Towards a real Real RAM: a Prototype using C++
On the Computability of Rectifiable Simple Curve (Extended Abstract)
Computabilities of Fine-Continuous Functions
An Extension Theorem for Ultraweakly Continuous Linear Functionals on B(X, Y)
Sensor Systems for Smart Agriculture
Memristor-based Oscillator for Complex Chemical Wave Logic Computations: Fredkin Gate Paradigm
Signal integrity design of TSV and interposer in 3D-IC
ASIC implementation of a modified QR decomposition for tree search based MIMO detection
Evaluation of multiple bit upset tolerant codes for NoCs buffering
VLSI Architecture Design Methodology for Deep learning based Upper Limb and Lower Limb Movement Classification for Rehabilitation Application
QoS 3D-HoC hybrid-on-chip communication structure for dynamic 3D-MPSoCs
Multiple stage capacitor multiplier using dual-output differential amplifiers
New CMOS realization of Current Differencing Current Conveyor (CDCC) with biquad filter application
Energy harvesting with 3D-printed electrostatic generators
High-Throughput CDEF Architecture for the AV1 Decoder Targeting 4K@60fps Videos
Clonal Selection Algorithm Applied to the Design of Switched-Capacitor DC-DC Converters
Design Considerations for the Development of Computational Resistive Memories
Composite Resistor Technique for Process and Temperature Compensations of Low Power Ring Oscillators
CMOS analog multiplier with high rejection of power supply ripple
Fault-Tolerant Finite State Machine Quasi Delay Insensitive in Commercial FPGA Devices
A charge transfer-based high performance, ultra-low power PLL charge pump
A Brazilian Sign Language Gesture Recognizing System Using Gait Energy Image
Stacked-Cascode Current Steering Architecture for Gallium Nitride Variable-Gain LNAs
On the Bode Diagram Plot of Switched Converters Using MATLAB Simulink - a Tutorial Approach
A 40 nW 32.7 kHz CMOS Relaxation Oscillator with Comparator Offset Cancellation for Ultra-Low Power applications
S-plane bode plots - identifying poles and zeros in a circuit transfer function
Range segmentation to improve latency in parallel stochastic computing
A method for quick estimation of optimum bulk bias voltages for SoC designs
Near threshold pulse transit time processor for central blood pressure estimation
Exploring the Impacts of Multiple Kernel Sizes of Gaussian Filters Combined to Approximate Computing in Canny Edge Detection
A design technique for distributed dual-band bandpass filters
Chaotic inductively coupled non-PLL low emission transmitter for implanted devices
Simulation of MEMS energy harvesting generators based on Bennet's doubler
Error coded affine projection algorithm
Comparative topology and power loss study for high power density and high conversion ratio integrated switching power converters
A 32-bit RISC-V AXI4-lite bus-based microcontroller with 10-bit SAR ADC
A Low Noise Chopper Stabilized Bandgap Voltage Reference for Biomedical Applications
Low-Power and High-Throughput Approximate 4×4 DCT Hardware Architecture
Automated RDSon characterization for power MOSFETS
An on-the-Fly FDOA-based Target Localization System
Maze-solving with a memristive grid of charge-controlled memristors
Specific processor in FPGA for BLAKE algorithm
A Low-Area Direct Memory Access Controller Architecture for a RISC-V Based Low-Power Microcontroller
Linearization for High-Speed Current-Steering DACs Using Neural Networks
High-speed Hardware Accelerator for Trace Decoding in Real-Time Program Monitoring
Modeling of microstrip interconnects with cylindrical sub-conductors
Multi-Size Inverse DCT-II Hardware Design for the VVC Decoder
Optimizing cell area by applying an alternative transistor folding technique in an open source physical synthesis CAD tool
Optimized Fault-Tolerant Buffer Design for Network-on-Chip Applications
Feasible All-Optical OR and NOR Logic Gates in Photonic Crystals
Optimization of Active Voltage Rectifier / Doubler Designed in 90 nm Technology
Very-low-tranconductance CMOS amplifier using multi-tanh bulk-driven input stage with gate-controlled assymetry for Gm-C applications
GRCMO: Global Routing Optimization by Median-Based Cell Movement
A Black-box Model for Neurons
Educational design kit for synopsys tools with a set of characterized standard cell library
0.3 V supply, 17 ppm/°C 3-transistor picowatt voltage reference
Configurable hardware design for the HEVC-based Adaptive Loop Filter
CeConP: Exploring Node Centrality for Early Routing Congestion Prediction
New approach to block-level 3D IC layout design
Mapping and Placement in NoC-based Reconfigurable Systems Using an Adaptive Tabu Search Algorithm
A low-power configurable VLSI architecture for sum of absolute differences calculation
A CMOS Instrumentation Amplifier Designed with Open-Source Tools
Power-efficient Approximate Multipliers for Classification Tasks in Neural Networks
LIM Algorithms for MOSFET Models
Validation of a Signal Acquisition for Electrochemical Noise Corrosion Monitoring System
Coexisting Analysis of 5G Networks with ISDB-T System in TV White Spaces
Resonant frequency calculation of square diaphragms: A comparison
A 0.18µm CMOS switched-capacitor amplifier using current-starving inverter based op-amp for low-power biosensor applications
Highly Linear Large Signal Compact Voltage-to-Current Converter in 28 nm FD-SOI Technology
Long-Range Low-Power Soil Water Content Monitoring System for Precision Agriculture
Design methodology for 112Gb/s PAM4 Wireline ADC-Based Receivers
DMTJ-Based Non-Volatile Ternary Content Addressable Memory for Energy-Efficient High-Performance Systems
PAM-4 Behavioral Modeling using Machine Learning via Laguerre-Volterra Expansion
Settling time-based design of a fully differential OTA for a SC integrator
SOI UTBB Capacitive Cross-Coupling Effects in Ultimate Technological Nodes
A Blind Calibration Scheme for Switched-Capacitor Pipeline Analog-to-Digital Converters
Synthesis of Asynchronous State Machines from Synchronous Specifications
VLSI architectures for Digital Modulation Classification using Support Vector Machines
Design of synchronous pipeline digital systems operating in double-edge of the clock
An integrated H-bridge circuit in a HV technology
PicassoBotZ, a Robotic Artist with Human-Like Drawing Execution
High-Performance Binary Arithmetic Encoder with Multiple Bypass Bin Scheme for VVC CABAC
Notch Frequency Generation Methods in Noise Spread Spectrum for Pulse Coding Switching DC-DC Converter
An efficient data fusion architecture for infrared and ultrasonic sensors, using FPGA
A Highly Compact 1W Ku-Band Power Amplifier
26 GHz VCO in 22 nm FDSOI Technology for RADAR Application
Analysis of a broadband beamformer based on trapezoidal filters and nested arrays
Delta-Sigma modulated output temperature sensor for 1V voltage supply
High-frequency memristive synapses
Pipelined SAR with comparator-based switch-capacitor residue amplification
Design of adaptive voltage amplifiers with an input-DC-level-dependent gain
Toward Full GPU Acceleration of Agile Homomorphic Encryption Frameworks
An Ultra-Low Power Multi-Level Power-on Reset for Fine-Grained Power Management Strategies
The influence of feature vector on the classification of mechanical faults using neural networks
Ultra-Low Power 60 GHz Class-C Frequency Tripler in 22-nm FDSOI CMOS Technology
Exploiting adder compressors for power-efficient 2-D approximate DCT realization
RF-DC Multiplier for RF Energy Harvester based on 32nm and TFET technologies
15th IEEE Latin America Symposium on Circuits and Systems, LASCAS 2024, Punta del Este, Uruguay, February 27 - March 1, 2024
Low power low voltage wide frequency resonant clock and data circuits for power reductions
On the calculation reuse in hadamard-based SATD
An improved confocal algorithm for breast cancer detection using UWB signals
Transform domain based image / video privacy protection
Optimized Hardware Implementation of Vedic Binary Multiplier using Nikhilam Sutra on FPGA
Real-time CPU-GPU demodulator for the LTE physical layer
Evaluating the Impact of Single Event Effect Duration on Quantum Circuits
A Robust Digital Random Number Generator Based on Transient Effect of Ring Oscillator
Parallel algorithm mapping to memory multidimensional signals
Optimal location and sizing of Distributed Generators using a hybrid methodology and considering different technologies
An IoT SoC for Agricultural Applications
Analysis of Radiation Impact on Memristive Crossbar Arrays
Continuous time full-feedforward MASH 2-2 architecture for sigma-delta modulators
13th IEEE Latin America Symposium on Circuits and System, LASCAS 2022, Puerto Varas, Chile, March 1-4, 2022
A PLL Based FSK Demodulator With Auxiliary Path
Characterization of transmission lines in a novel high-frequency laminate
Circuit Design Considerations for Power-Efficient and Safe Implantable Electrical Neurostimulators
A 0.55-V 1-GHz frequency synthesizer PLL for ultra-low-voltage ultra-low-power applications
Minimum multiplier-delay 4D digital filter
12th IEEE Latin America Symposium on Circuits and System, LASCAS 2021, Arequipa, Peru, February 21-24, 2021
Dynamic partial reconfiguration manager
A baseline restorer for charge-sensitive amplifiers in a 500-nm CMOS process
Co-design system for template matching using dedicated co-processor and modified elephant herding optimization
FinFET basic cells evaluation for regular layouts
Efficient parallel scheduler for circuit simulation exploiting binary link formulations
Thévenin Network Approach for Modeling Mutual Coupling in Narrowband Uniform Linear Arrays
High-Speed Sampler for UWB Breast Cancer Detection System
A Library of High-Level Models for the Simulation of DC-DC Converters
Jitter tolerance acceleration using the golden section optimization technique
A Self Oscillating Current-Reuse Image Reject Mixer for Ultra Low Power Receivers
Realization of 4D lattice structured digital filters
TSV protection: Towards secure 3D-MPSoC
Exploring Fault Tolerance to Ionizing Radiation in Severe Environments: Power Transistors with Distinct Layouts
A Compact Analogue Counter for Single Photon Imagers
DC voltage estimation methods for multilevel converter operating with reduced number of sensors
Determining worst-case eye height in low BER channels using Bayesian optimization
Hardware Design for VVC Angular Intra Prediction Modes with Coding Efficiency Awareness
A Digital Random Number Generator Based on Four Regional Examination of Double Scroll Chaos
Open Source Port of NASA's Core Flight System to FreeRTOS in Arm Cortex-M-Based Microprocessor
DNAr-Analog: A Library With a Multiplexer to Easily Design, Program, and Simulate Dsd Analog Circuits
A 1.6Gb/s CMOS LVDS transmitter with a programmable pre-emphasis system
A Framework for Heterogeneous Many-core SoCs Generation
Apparent power control in single-phase grids using SCES devices: An IDA-PBC approach
Exploring pel decimation to trade off between energy and quality in video coding
Evaluation of the uModel factory software used for the modeling of embedded systems with concurrent states
Statistical library characterization using arbitrary polynomial chaos
Low-Power Compensated Modified Comb Decimation Structure for Power-of-Two Decimation Factors
A design flow of asynchronous burst-mode circuits without fundamental-mode timing assumption
Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing
A Radiation Tolerant Baseline Correction Filter for Front-ends in High Energy Physics Experiments
A LUT-Based Calibration Approach of the ESP32 ADC for a Power Quality Analyzer
BAT-Hermes: A transition-signaling bundled-data NoC router
Energy-Efficient Haar Transform Architectures Using Efficient Addition Schemes
Design of elliptic curve cryptoprocessors over GF(2 163 ) on Koblitz curves
Testing fully differential amplifiers using common mode feedback circuit: A case study
A 0.65-1.5GHz Wideband Power Amplifier With Second Harmonic Control Proof-of-Concept for 5G Applications
Mathieu functions for DFT filter bank spectrum sensing
Configurable frequency agile filter application of balanced differential pair based CCCII circuit in 28nm process
Image Edge Detection with a Memristive Grid: a Massive Parallel Approach
Black Hole Algorithm for non-technical losses characterization
A fast pruning technique for low-power inexact Circuit design
Extended Feedback Linearization Control for Voltage Regulation in a Buck Converter with an Unknown Resistive Load
Efficient Power Consumption using Hybrid Emerging Memory Technology for 3D CMPs
Hybrid dual-mode low voltage dropout regulator with infinite impulse response digital filters
Hardware implementation of the Smith-Waterman algorithm using a systolic architecture
A Rectenna as Energy Source for Wireless Sensor Nodes
A novel state assignment method for XBM AFSMs without the essential hazard assumption
Switched Reluctance Machine fuzzy modeling applied on a MRAC scheme
A Sensor Network Using SigFox for Temperature and Humidity Monitoring in the Livestock Industry
A multi-standard interpolation filter for motion compensated prediction on high definition videos
A family of memristive transfer functions of negative feedback nullor-based amplifiers
ISFETs: theory, modeling and chip for characterization
UAVs vs Satellites: Comparison of tools for water quality monitoring
An Electro- Pneumatic Glove Using a Soft Actuator for Flat Pinch Movement in Pediatric Finger Rehabilitation
An NML in-plane Wire Crossing Structure
A Novel and Efficient Large Integer Number Theoretic Transform Multiplier Based on Unified Blocks
Extending universal verification methodology with fault injection capabilities
S-GMOF: A gradient-based complexity reduction algorithm for depth-maps intra prediction on 3D-HEVC
Reliability Assessment in Transmission Considering Intermittent Energy Resources
A robust to PVT fully-differential amplifier in 45nm SOI-CMOS technology
An asymmetrical bulk-modified composite MOS transistor with enhanced linearity
Blind range level shifters from 0 to 18 V
Analysis of source separation algorithms in industrial acoustic environments
New Low-Power Architectures of Support Vector Machine Classifier for Speech Recognition System
Low voltage low power current reference circuit for passive RFID applications
Object identification using VSWR évaluation based on a narrowband microstrip antenna and a tuned amplifier
A 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Reference
ISFET Array Readout System with Integrated 12 bit A/D Conversion for Lab-on-Chip Applications
Approximate Acceleration for CNN-based Applications on IoT Edge Devices
Output Voltage Regulation For dc-dc Buck Converters: a Passivity-Based PI Design
Stairway to Abstraction: an Iterative Algorithm for Whisker Detection in Video Frames
Comparing high-performance cells in CMOS bulk and FinFET technologies
Modeling the impact of heavy ion on FDSOI NanoCMOS
Fully Digital Amplitude Estimation System for In-Vivo Stem Impedance Monitoring
Fast Heuristic for VVC Intra-frame Prediction Targeting 360° Video Formats
A 3.9 compression-ratio Huffman encoding scheme for the large ion collider on 65nm and 130nm CMOS technologies
Transistor-level optimization of CMOS complex gates
Self-biased class AB CMOS current buffer
Complexity and Coding Efficiency Assessment of AOMedia Video 1
High-resolution ADCs design in sensors
A Low-Cost Accelerator for License Plate Character Recognition Using Convolutional Neural Networks
Impact of Thread Parallelism on the Soft Error Reliability of Convolution Neural Networks
Enhancing Gesture Recognition Performance Using Optimized Event-Based Data Sample Lengths and Crops
Energy-Efficient PRNG Based on a Discrete-Space Chaotic Map Using an AxRMU Multiplier
Mismatch and temperature compensation for subthreshold seismic sensor system
Voltage Scaling Influence on the Soft Error Susceptibility of a FinFET-based Circuit
Technical and pedagogical challenges in micro-nanoelectronics for facing upcoming digital society
SICARELO: A tool for synthesis of locally-clocked extended burst-mode asynchronous Controllers
Low cost and high throughput FME interpolation for the HEVC emerging video coding standard
Design of residue generators with CLA/compressor trees and multi-bit EAC
Voltage Drop Mitigation by Adaptive Voltage Scaling using Clock-Data Compensation
Analog-to-Information Converter Based on Off-the-Shelf Components and SoC-FPGA
A resistorless switched bandgap reference topology
High-Performance Fault Diagnosis Schemes for Efficient Hash Algorithm BLAKE
A Dependency-Free Real-Time UHD Architecture for the Initial Stage of HEVC Motion Estimation
Smart devices and RFID: towards an Android-based information system in the cattle-yards
Calibration-less Nauta OTA operating at 0.25-V power supply in a 130-nm digital CMOS process
A Novel Model for the Resonance Frequency in Lamb Wave Resonators based on AlN
Development of a stereo vision measurement architecture for an underwater robot
Nanoscale FinFET global parameter extraction for the BSIM-CMG model
Hardware implementation for permutation function of multiplication-hardened sponge BlaMka
Robust smartphone-based human activity recognition using a tri-axial accelerometer
Design of a low-cost and high-performance digital PWM controller for DC-DC converters
Key note: Integrated design-for-reliability for ICs
ACO approach in static routing for network-on-chips with 3D mesh topology
Capacitance measurements of an SOI based CMUT
A chopped front-end system with common-mode feedback for real time ECG applications
Topological characteristics of logic networks generated by a graph-based methodology
Edge Computing Technique for a 87% Energy Saving for IoT Device Dedicated to Environmental Monitoring
High-Throughput and Multiplierless Hardware Design for the AV1 Fractional Motion Estimation
Multi-Bit-Upset Memory Using New Error Correction Code Methodology
Rate-distortion-complexity analysis for prediction unit modes in 3D-HEVC depth coding
Bioimpedance measurement using mixed-signal embedded system
Low-power embedded readout and processing system for ISFET sensors as measurement devices
MTJ-Based NV-BCAM Design with Dual Voltage Level Control Circuitry
A dual core low power microcontroller with openMSP430 architecture for high reliability lockstep applications using a 180 nm high voltage technology node
Design of RF BAW-based ΣΔ Modulators
On generating a finite pulse or a symmetric impulse response by a generalized approximation function
Designing an optimum non-dissipative LC snubber for step-up flyback converters in DCM
Evaluation of 8b/10b FPGA Encoder Implementations for SerDes Links
An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs
RS5: An Integrated Hardware and Software Ecosystem for RISC- V Embedded Systems
Reconfigurable CMOS/STT-MTJ Non-Volatile Circuit for Logic-in-Memory Applications
Neuromorphic sampling on the SpiNNaker and parallella chip multiprocessors
A 52.3% Peak Efficiency 22nm CMOS Low-Power Light-Adaptive Self-Oscillating Voltage Doubler Using Scalable Dynamic Leakage-Suppression Logic
A voltage-mode boost DC-DC converter with a constant-duty-cycle pulse control
Multimode 2.4 GHz CMOS power amplifier with gain control for efficiency enhancement at power backoff
Transition from Synchronous to Asynchronous Systems with Minimal Logic Changes
Analysis of Optimization Algorithms for Non-Uniform Filter Bank Design
A 6-bit 2GS/s CMOS time-interleaved ADC for analysis of mixed-signal calibration techniques
Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks
Exploring Operation Sharing in Directional Intra Frame Prediction of AV1 Video Coding
A versatile, CMOS compatible, integrated antenna for millimeter-wave applications
Redundant measurement of vital signs in a wearable monitor to overcome movement artifacts in home health care environment
A Fast Cold-Start Integrated System for Ultra-Low Voltage SC Energy-Harvesting Circuits