yusuke1997/dblp-id-title huggingface dataset:
A 3mm 2 Programmable Bayesian Inference Accelerator for Unsupervised Machine Perception using Parallel Gibbs Sampling in 16nm
Design technologies for a 1.2V 2.4Gb/s/pin high capacity DDR4 SDRAM with TSVs
A 440μW, 109.8dB DR, 106.5dB SNDR Discrete-Time Zoom ADC with a 20kHz BW
A 4.4μW -92/-90.3dBm Sensitivity Dual-Mode BLE/Wi-Fi Wake-up Receiver
A 3.8mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure
A fully-adaptive wideband 0.5-32.75Gb/s FPGA transceiver in 16nm FinFET CMOS technology
A 13-ENOB, 5 MHz BW, 3.16 mW multi-bit continuous-time ΔΣ ADC in 28 nm CMOS with excess-loop-delay compensation embedded in SAR quantizer
Low Swing and Column Multiplexed Bitline Techniques for Low-Vmin, Noise-Tolerant, High-Density, 1R1W 8T-Bitcell SRAM in 10nm FinFET CMOS
A Two-Tap NIR Lock-in Pixel CMOS Image Sensor with Background Light Cancelling Capability for Non-Contact Heart Rate Detection
A 0.5-1V Input Event-Driven Multiple Digital Low-Dropout-Regulator System for Supporting a Large Digital Load
OTA-free 1-1 MASH ADC using Fully Passive Noise Shaping SAR & VCO ADC
A 97.3 dB SNR, 600 kHz BW, 31mW multibit continuous time ΔΣ ADC
FPGA-accelerated complex event processing
A Packaged Ingestible Bio-Pill with 15-Pixel Multiplexed Fluorescence Nucleic-Acid Sensor and Bi-Directional Wireless Interface for In-Vivo Bio-Molecular Sensing
A 4.3fJ/Conversion-Step 6440μm 2 All-Dynamic Capacitance-to-Digital Converter with Energy-Efficient Charge Reuse
Foreword: Welcome to the 2014 Symposium on VLSI Circuits
Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure
A 7nm 0.46pJ/bit 20Gbps with BER 1E-25 Die-to-Die Link Using Minimum Intrinsic Auto Alignment and Noise-Immunity Encode
A 16nm 25mm 2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators
A 0.3-2.6 TOPS/W precision-scalable processor for real-time large-scale ConvNets
A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor
The progresses of MRAM as a memory to save energy consumption and its potential for further reduction
Digital PLL for phase noise cancellation in ring oscillator-based I/Q receivers
Versatile TLC NAND flash memory control to reduce read disturb errors by 85% and extend read cycles by 6.7-times of Read-Hot and Cold data for cloud data centers
A 12-bit 200-MS/s 3.4-mW CMOS ADC with 0.85-V supply
A front-end ASIC with receive sub-array beamforming integrated with a 32 × 32 PZT matrix transducer for 3-D transesophageal echocardiography
An 11.5-ENOB 100-MS/s 8mW dual-reference SAR ADC in 28nm CMOS
An Energy-Efficient Comparator with Dynamic Floating Inverter Pre-Amplifier
A 24-31 GHz Reference Oversampling ADPLL Achieving FoMjitter-N of -269.3 dB
Open-Source Synthesizable Analog Blocks for High-Speed Link Designs: 20-GS/s 5b ENOB Analog-to-Digital Converter and 5-GHz Phase Interpolator
A 200μW Eddy Current Displacement Sensor with 6.7nmRMS Resolution
Graphene electro-absorption modulators integrated at wafer-scale in a CMOS fab
A fully electrical startup batteryless boost converter with 50mV input voltage for thermoelectric energy harvesting
A Ray-Casting Accelerator in 10nm CMOS for Efficient 3D Scene Reconstruction in Edge Robotics and Augmented Reality Applications
A throughput-agnostic 11.9-13.6GOPS/mW multi-signal classification SoC for cognitive radios in 40nm CMOS
MN-Core - A Highly Efficient and Scalable Approach to Deep Learning
DataCenter 2020: Near-memory acceleration for data-oriented applications
An N-Path Switched-Capacitor Rectifier for Piezoelectric Energy Harvesting Achieving 13.9× Power Extraction Improvement
Robotics for innovation
PNNPU: A 11.9 TOPS/W High-speed 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM Access
A 5.5 GHz Background-Calibrated Subsampling Polar Transmitter with -41.3 DB EVM at 1024 OAM in 28NM CMOS
Wide input range 1.7μW 1.2kS/s resistive sensor interface circuit with 1 cycle/sample logarithmic sub-ranging
A machine-learning classifier implemented in a standard 6T SRAM array
A 34fJ 10b 500 MS/s partial-interleaving pipelined SAR ADC
250mV-950mV 1.1Tbps/W double-affine mapped Sbox based composite-field SMS4 encrypt/decrypt accelerator in 14nm tri-gate CMOS
High-Density and Large-Scale MEA System Featuring 236, 880 Electrodes at 11.72μm Pitch for Neuronal Network Analysis
A Low Power Continuous-Time Zoom ADC for Audio Applications
A 0.58mm 2 2.76Gb/s 79.8pJ/b 256-QAM massive MIMO message-passing detector
Fully-Digital Self-Calibrating Decoder with Sub-µW, 1.6fJ/convstep and 0.0075mm 2 per Receptor for Scaling to Human-Like Tactile Sensing Density
A 25×50Gb/s 2.22pJ/b NRZ RX with Dual-Bank and 3-Tap Speculative DFE for Microprocessor Application in 7nm FinFET CMOS
RRAM-based 7T1R nonvolatile SRAM with 2x reduction in store energy and 94x reduction in restore energy for frequent-off instant-on applications
ReRAM-based 4T2R nonvolatile TCAM with 7x NVM-stress reduction, and 4x improvement in speed-wordlength-capacity for normally-off instant-on filter-based search engines used in big-data processing
A 32 Gb/s 0.55 mW/Gbps PAM4 1-FIR 2-IIR tap DFE receiver in 65-nm CMOS
A 3.2mW SAR-assisted CTΔ∑ ADC with 77.5dB SNDR and 40MHz BW in 28nm CMOS
A 196μW, Reconfigurable Light-to-Digital Converter with 119dB Dynamic Range, for Wearable PPG/NIRS Sensors
All-Digital Closed-Loop Unified Retention/Wake-Up Clamp in a 10nm 4-Core x86 IP
A Multimodal Multichannel Neural Activity Readout IC with 0.7μW/Channel Ca 2+ -Probe-Based Fluorescence Recording and Electrical Recording
A 50 Gbps 134 GHz 16 QAM 3 m Dielectric Waveguide Transceiver System Implemented in 22nm CMOS
An Ultra-low Quiescent Current 250NA Low Dropout Regulator for No-Load to 10MA Internet-of-Evervthing Applications
A Sub-Harmonic Switching Digital Power Amplifier with Hybrid Class-G Operation for Enhancing Power Back-off Efficiency
0.5V-VIN, 165-MA/MM 2 Fully-Integrated Digital LDO Based on Event-Driven Self-Trisuerina Control
28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications
A 4900×m 2 839Mbps Side-Channel Attack Resistant AES-128 in 14nm CMOS with Heterogeneous Sboxes, Linear Masked MixColumns and Dual-Rail Key Addition
2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021
A dead-time free global shutter CMOS image sensor with in-pixel LOFIC and ADC using pixel-wis e connections
A 10.6mm 3 fully-integrated, wireless sensor node with 8GHz UWB transmitter
Unified Technology Optimization Platform using Integrated Analysis (UTOPIA) for holistic technology, design and system co-optimization at <= 7nm nodes
A 0.25-0.4V, Sub-0.11mW/GHz, 0.15-1.6GHz PLL Using an Offset Dual-Path Loop Architecture with Dynamic Charge Pumps
A CMOS LiDAR Sensor with Pre-Post Weighted-Histogramming for Sunlight Immunity Over 105 klx and SPAD-based Infinite Interference Canceling
A 1.2-5Gb/s 1.4-2pJ/b serial link in 22nm CMOS with a direct data-sequencing blind oversampling CDR
High area-efficient DC-DC converter using Time-Mode Miller Compensation (TMMC)
Efficient RF-PA Two-Chip Supply Modulator Architecture for 4G LTE and 5G NR Dual-Connectivity RF Front-End
A 16-channel wireless neural interfacing SoC with RF-powered energy-replenishing adiabatic stimulation
A low power many-core SoC with two 32-core clusters connected by tree based NoC for multimedia applications
A 1.2V 68µW 98.2DB-DR Audio Continuous-Time Delta-Sigma Modulator
A self-aware processor SoC using energy monitors integrated into power converters for self-adaptation
A 3.0μW@5fps QQVGA Self-Controlled Wake-Up Imager with On-Chip Motion Detection, Auto-Exposure and Object Recognition
A 0.6mW 31MHz 4 th -order low-pass filter with +29dBm IIP3 using self-coupled source follower based biquads in 0.18µm CMOS
Silicon Photonic Micro-Ring Modulator-based 4 x 112 Gb/s O-band WDM Transmitter with Ring Photocurrent-based Thermal Control in 28nm CMOS
IoT: The Impact of Things
A 5.1ms Low-Latency Face Detection Imager with In-Memory Charge-Domain Computing of Machine-Learning Classifiers
A 6.54-to-26.03 TOPS/W Computing-In-Memory RNN Processor using Input Similarity Optimization and Attention-based Context-breaking with Output Speculation
A 6.78 MHz Wireless Power Transfer System for Simultaneous Charging of Multiple Receivers with Maximum Efficiency using Adaptive Magnetic Field Distributor IC
A One-Shot Learning, Online-Tuning, Closed-Loop Epilepsy Management SoC with 0.97μJ/Classification and 97.8% Vector-Based Sensitivity
Technology development for printed LSIs based on organic semiconductors
An efficient and resilient ultra-high speed galvanic data isolator leveraging broad-band multi resonant tank electro-magnetic coupling
A 1 GS/s Reconfigurable BW 2 nd -Order Noise-Shaping Hybrid Voltage-Time Two-Step ADC Achieving 170.9 dB FoMS
A Digital Bang-Bang Phase-Locked Loop with Background Injection Timing Calibration and Automatic Loop Gain Control in 7NM FinFET CMOS
A 96.6%-Efficiency Continuous-Input-Current Hybrid Dual-Path Buck-Boost Converter with Single-Mode Operation and Non-Stopping Output Current Delivery
A Two-Phase 2MHz DSD GaN Power Converter with Master-Slave AO 2 T Control for Direct 48V/1V DC-DC Conversion
A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI
A 2.6 e-rms Low-Random-Noise, 116.2 mW Low-Power 2-Mp Global Shutter CMOS Image Sensor with Pixel-Level ADC and In-Pixel Memory
32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic
PETRA: A 22nm 6.97TFLOPS/W AIB-Enabled Configurable Matrix and Convolution Accelerator Integrated with an Intel Stratix 10 FPGA
The PCM way for embedded Non Volatile Memories applications
A 40nm CMOS 12b 200MS/s Single-amplifier Dual-residue Pipelined-SAR ADC
A 14b 750MS/s DAC in 20nm CMOS with <-168dBm/Hz noise floor beyond Nyquist and 79dBc SFDR utilizing a low glitch-noise hybrid R-2R architecture
A fully integrated hepatitis B virus DNA detection SoC based on monolithic polysilicon nanowire CMOS process
A 75dB DR 50MHz BW 3 rd order CT-ΔΣ modulator using VCO-based integrators
A 3-stage Pseudo Single-phase Flip-flop family
A 138Fsrms-Integrated-Jitter and -249dB-FoM Clock Multiplier with -51dBc Spur Using A Digital Spur Calibration Technique in 28-nm CMOS
MePLER: A 20.6-pJ Side-Channel-Aware In-Memory CDT Sampler
A 250Mv, 0.063J/Ghash Bitcoin Mining Engine in 14nm CMOS Featuring Dual-Vcc Sha256 Datapath and 3-Phase Latch Based Clocking
1Gsearch/sec Ternary Content Addressable Memory compiler with silicon-aware Early-Predict Late-Correct single-ended sensing
A 94GHz mm-wave to baseband pulsed-radar for imaging and gesture recognition
A 0.6V all-digital body-coupled wakeup transceiver for IoT applications
410-GHz CMOS imager using a 4 th sub-harmonic mixer with effective NEP of 0.3 fW/Hz 0.5 at 1-kHz noise bandwidth
Isolated Preset Architecture for a 32nm SOI embedded DRAM macro
A 20x28 Spins Hybrid In-Memory Annealing Computer Featuring Voltage-Mode Analog Spin Operator for Solving Combinatorial Optimization Problems
A 65nm CMOS transceiver with integrated active cancellation supporting FDD from 1GHz to 1.8GHz at +12.6dBm TX power leakage
A 2.5-V, 160-μJ-output piezoelectric energy harvester and power management IC for batteryless wireless switch (BWS) applications
A 350mV-900mV 2.1GHz 0.011mm 2 regular expression matching accelerator with aging-tolerant low-VMIN circuits in 14nm tri-gate CMOS
A 4.5V-Input 0.3-to-1.7V-Output Step-Down Always-Dual-Path DC-DC Converter Achieving 91.5%-Efficiency with 250mΩ-DCR Inductor for Low-Voltage SoCs
A 25GS/s 6b TI binary search ADC with soft-decision selection in 65nm CMOS
A 7-to-18.3GHz compact transformer based VCO in 16nm FinFET
135 GHz 98 mW 10 Gbps ASK transmitter and receiver chipset in 40 nm CMOS
An Ultra-High Energy-Efficient Reconfigurable Processor for Deep Neural Networks with Binary/Ternary Weights in 28NM CMOS
A Right-Half-Plane Zero-Free Buck-Boost DC-DC Converter with 97.46% High Efficiency and Low Output Voltage Ripple
A -194 dBc/Hz FOM interactive current-reused QVCO (ICR-QVCO) with capacitor-coupling self-switching sinusoidal current biasing (CSSCB) phase noise reduction technique
An All-Digital Unified Static/Dynamic Entropy Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction for Secure Privacy-Preserving Mutual Authentication in IoT Mote Platforms
A 50nA quiescent current asynchronous digital-LDO with PLL-modulated fast-DVS power management in 40nm CMOS for 5.6 times MIPS performance
A 1.4GHz 20.5Gbps GZIP decompression accelerator in 14nm CMOS featuring dual-path out-of-order speculative Huffman decoder and multi-write enabled register file array
Neurochemical thermostat: A neural interface SoC with integrated chemometrics for closed-loop regulation of brain dopamine
A Multichannel, MEMS-Less -99dBm 260nW Bit-Level Duty Cycled Wakeup Receiver
An exact measurement and repair circuit of TSV connections for 128GB/s high-bandwidth memory(HBM) stacked DRAM
A 5.5mW/Channel 2-to-7 GHz Frequency Synthesizable Qubit-Controlling Cryogenic Pulse Modulator for Scalable Quantum Computers
A 635pW battery voltage supervisory circuit for miniature sensor nodes
A 21.5mW 10+Gb/s mm-Wave phased-array transmitter in 65nm CMOS
A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16 / 256-QAM and channel response detection in 28 nm CMOS
Low-voltage metal-fuse technology featuring a 1.6V-programmable 1T1R bit cell with an integrated 1V charge pump in 22nm tri-gate process
Catena: A 0.5-V Sub-0.4-mW 16-Core Spatial Array Accelerator for Mobile and Embedded Computing
A Single-Trim Switched Capacitor CMOS Bandgap Reference with a 3σ Inaccuracy of +0.02%, -0.12% for Battery Monitoring Applications
A fully-integrated 10.5µW miniaturized (0.125mm 2 ) wireless neural sensor
A 160-GHz receiver-based phase-locked loop in 65 nm CMOS technology
A 3.8 mW Sub-Sampling Direct RF-to-Digital Converter for Polar Receiver Achieving 1.94 Gb/s Data Rate with 1024-APSK Modulation
A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter
A 4.4-5.4GHz digital fractional-N PLL using ΔΣ frequency-to-digital converter
An RF Transceiver with Full Digital Interface Supporting 5G New Radio FR1 with 3.84Gbps DL/1.92Gbps UL and Dual-Band GNSS in 14nm FinFET CMOS
A 2.9mW, +/- 85ppm accuracy reference clock generator based on RC oscillator with on-chip temperature calibration
A 7nm Fin-FET 4.04-Mb/mm2 TCAM with Improved Electromigration Reliability Using Far-Side Driving Scheme and Self-Adjust Reference Match-Line Amplifier
An Automotive-Use Battery-to-Load GaN-Based Power Converter with Anti-Aliasing Multi-Rate Spread-Spectrum Modulation and In-Cycle ZVS Switching
A 450-fs jitter PVT-robust fractional-resolution injection-locked clock multiplier using a DLL-based calibrator with replica-delay-cells
A Laser-forwarded Coherent 10Gb/s BPSK Transceiver using Monolithic Microring Resonators in 45nm SOI CMOS
Advanced Multi-NIR Spectral Image Sensor with Optimized Vision Sensing System and Its Impact on Innovative Applications
A 14.6mW 12b 800MS/s 4×time-interleaved pipelined SAR ADC achieving 60.8dB SNDR with Nyquist input and sampling timing skew of 60fsrms without calibration
A 28NM Integrated True Random Number Generator Harvesting Entropy from MRAM
A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge
A 0.44fJ/conversion-step 11b 600KS/s SAR ADC with semi-resting DAC
A 0.7V resistive sensor with temperature/voltage detection function in 16nm FinFET technologies
2X-Bandwidth Burst 6T-SRAM for Memory Bandwidth Limited Workloads
A 2.4GHz hybrid PPF based BFSK receiver with ±180ppm frequency offset tolerance for wireless sensor networks
An 8Ω 5.5W, 0.006% THD+N, 2×VBAT-Swing Switched-Mode Audio Amplifier with Fully-Differential Linear Buck-Boost Topology Achieving Total Efficiency of 87%
A Time Domain Artificial Intelligence Radar for Hand Gesture Recognition Using 33-GHz Direct Sampling
Ag Ionic Memory Cell Technology for Terabit-Scale High-DensityApplication
A 40GB/S Optical NRZ Transmitter Based on Monolithic Microring Modulators in 45NM SOI CMOS
A 120-330V, Sub-μA, 4-Channel Driver for Microrobotic Actuators with Wireless-Optical Power Delivery and over 99% Current Efficiency
A 4GHz 0.73psrms-Integrated-Jitter PVT-Insensitive Fractional-N Sub-Sampling Ring PLL with a Jitter-Tracking DLL-Assisted DTC
A 16nm FinFet 19/39MHz 78/72dB DR noise-injected aggregated CTSDM ADC for configurable LTE advanced CCA/NCCA Application
A 3.68aFrms Resolution 183dB FoMs 4 th -order Continuous-Time Bandpass ∆Σ Capacitance-to-Digital Converter in 0.18µm CMOS
A 77dB SNDR 12.5MHz Bandwidth 0-1 MASH ∑Δ ADC Based on the Pipelined-SAR Structure
153 FSRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHZ Ring-LC-Hybrid Injection-Locked Clock Multiplier
High-mobility high-Ge-content Si1-xGex-OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width
A low-PDP and low-area repeater using passive CTLE for on-chip interconnects
A +30.5 dBm CMOS Doherty power amplifier with reliability enhancement technique
A 3-10fJ/conv-step 0.0032mm 2 error-shaping alias-free asynchronous ADC
A 0.05pJ/Pixel 70fps FHD 1Meps Event-Driven Visual Data Processing Unit
A 8.2-mW 10-b 1.6-GS/s 4× TI SAR ADC with fast reference charge neutralization and background timing-skew calibration in 16-nm CMOS
Low power battery supervisory circuit with adaptive battery health monitor
A Sub-pA Current Sensing Front-End for Transient Induced Molecular Spectroscopy
A 35 mW 10 Gb/s ADC-DSP less direct digital sequence detector and equalizer in 65nm CMOS
A 260µW infrared gesture recognition system-on-chip for smart devices
A 13.56MHz wireless power transfer system with reconfigurable resonant regulating rectifier and wireless power control for implantable medical devices
A near-field modulation chopping stabilized injection-locked oscillator sensor for protein conformation detection at microwave frequency
A 3.8 mW/Gbps quad-channel 8.5-13 Gbps serial link with a 5-tap DFE and a 4-tap transmit FFE in 28 nm CMOS
Z-PIM: An Energy-Efficient Sparsity Aware Processing-In-Memory Architecture with Fully-Variable Weight Precision
A 28-GHz CMOS Phased-Array Beamformer Supporting Dual-Polarized MIMO with Cross-Polarization Leakage Cancellation
A Sub-Leakage PW-Power HZ-Range Relaxation Oscillator Operating with 0.3V-1.8V Unregulated Supply
A sub-1V 3.9µW bandgap reference with a 3σ inaccuracy of ±0.34% from -50°C to +150°C using piecewise-linear-current curvature compensation
An ultra-low-power 2-step wake-up receiver for IEEE 802.15.4g wireless sensor networks
A 24mW Chopped CTDSM Achieving 103.5dB SNDR and 107.5dB DR in a 250kHz Bandwidth
315-GHz Self-Synchronizing Minimum Shift Keying Receiver in 65-nm CMOS
A 0.41µA standby leakage 32Kb embedded SRAM with Low-Voltage resume-standby utilizing all digital current comparator in 28nm HKMG CMOS
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm
A 77-dB DR 16-Ch 2 nd -order Δ-ΔΣ Neural Recording Chip with 0.0077mm 2 /Ch
Liquid Silicon: A Nonvolatile Fully Programmable Processing-In-Memory Processor with Monolithically Integrated ReRAM for Big Data/Machine Learning Applications
15.4b incremental sigma-delta capacitance-to-digital converter with zoom-in 9b asynchronous SAR
A 7b, 3.75ps resolution two-step time-to-digital converter in 65nm CMOS using pulse-train time amplifier
A Monolithically Integrated Silicon Photonics 8×8 Switch in 90nm SOI CMOS
A 71dB dynamic range third-order ΔΣ TDC using charge-pump
A 29.2 Mb/mm 2 Ultra High Density SRAM Macro using 7nm FinFET Technology with Dual-Edge Driven Wordline/Bitline and Write/Read-Assist Circuit
A 40-Gb/s 9.2-mW CMOS equalizer
A Fast Locking 5.8 - 7.2 GHz Fractional-N Synthesizer with Sub-2 us Settling Time in 22 nm FDSOI
A 12.6MW 573-2, 901KS/S Reconfigurable Processor for Reconstruction of Compressively-Sensed Phvsiological Signals
A 4×9 Gb/s 1 pJ/b NRZ/multi-tone serial-data transceiver with crosstalk reduction architecture for multi-drop memory interfaces in 40nm CMOS
A 0.93-μW Single-Stage Rail-to-Rail Class AB Buffer Amplifier Improving DC gain and Slew-Rate with Different-Ratio Current-Mirrors and Positive-Feedback Loops
A Crystal-Free Single-Chip Micro Mote with Integrated 802.15.4 Compatible Transceiver, sub-mW BLE Compatible Beacon Transmitter, and Cortex M0
A CMOS 4-channel MIMO baseband receiver with 65dB harmonic rejection over 48MHz and 50dB spatial signal separation over 3MHz at 1.3mW
A fully integrated CMOS fluorescence biosensor with on-chip nanophotonic filter
SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling
A 64×64 1200fps CMOS ion-image sensor with suppressed fixed-pattern-noise for accurate high-throughput DNA sequencing
Artifact-Tolerant Opamp-Less Delta-Modulated Bidirectional Neuro-Interface
A 6.05-Mb/mm 2 16-nm FinFET double pumping 1W1R 2-port SRAM with 313 ps read access time
0.2mW 70Fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur
Accelerating the Sensing world through imaging evolution
A 25-Gb/s 5-mWCMOS CDR/deserializer
A 64Gb/s 2.29pJ/b PAM-4 VCSEL Transmitter With 3-Tap Asymmetric FFE in 65nm CMOS
A 27-73 GHz Injection-Locked Frequency Divider
A 28nm high-k metal-gate SRAM with Asynchronous Cross-Couple Read Assist (AC 2 RA) circuitry achieving 3x reduction on speed variation for single ended arrays
A self-powered IPv6 bidirectional wireless sensor & actuator network for indoor conditions
340mV-1.1V, 289Gbps/W, 2090-gate NanoAES hardware accelerator with area-optimized encrypt/decrypt GF(2 4 ) 2 polynomials in 22nm tri-gate CMOS
Automotive low power technology for IoT society
Inductively-powered wireless solid-state drive (SSD) system with merged error correction of high-speed non-contact data links and NAND flash memory
A 56-Gb/s 8-mW PAM4 CDR/DMUX with High Jitter Tolerance
A 2.2-GHz 3.2-mW DTC-free Sampling ΔΣ Fractional-N PLL with -110 dBc/Hz In-band phase noise and -246dB FoM and -83dBc Reference Spur
A microelectrode array with 8, 640 electrodes enabling simultaneous full-frame readout at 6.5 kfps and 112-channel switch-matrix readout at 20 kS/s
First Demonstration of Waveguide-Coupled Ge0.92Sn0.08/Ge Multiple-Quantum-Well Photodetector on the SOI Platform for 2-μm Wavelength Optoelectronic Integrated Circuit
A 0.13µm 8Mb logic based CuxSiyO resistive memory with self-adaptive yield enhancement and operation power reduction
Recent Progress and Next Directions for Embedded MRAM Technology
A 794Mbps 135mW iterative detection and decoding receiver for 4×4 LDPC-coded MIMO systems in 40nm
A 181NW 970µG✓HZ Accelerometer Analog Front-End Employing Feedforward Noise Reduction Technique
A 1.54mW/Element 150μm-Pitch-Matched Receiver ASIC with Element-Level SAR/Shared-Single-Slope Hybrid ADCs for Miniature 3D Ultrasound Probes
A 3.8-μW/Ch, 15-GΩ Total Input Impedance Chopper Stabilized Amplifier with Dual Positive Feedback Loops and Auto-calibration Scheme
The Demonstration of Gate Dielectric-fuse 4kb OTP Memory Feasible for Embedded Applications in High-k Metal-gate CMOS Generations and Beyond
Technology/circuits joint evening panel discussion semiconductor industry in 2020: Evolution or revolution?
A 0.034mm 2 , 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8-19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS
An All-Digital Unified Clock Frequency and Switched-Capacitor Voltage Regulator for Variation Tolerance in a Sub-Threshold ARM Cortex M0 Processor
A 13.7 TFLOPS/W Floating-point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory
A 266nW multi-chopper amplifier with 1.38 noise efficiency factor for neural signal recording