yusuke1997/dblp-id-title huggingface dataset:
The Relevance of Trapped Charge for Leakage and Random Telegraph Noise Phenomena
Localized thermal effects in Gate-all-around devices
Characterization of Cu and SiCN Adhesion in BEOL Interconnections
Maximum operating voltage (VMAX) limit for SOCs in thin form factor mobile devices with touch sensitive displays
IEEE International Reliability Physics Symposium, IRPS 2021, Monterey, CA, USA, March 21-25, 2021
Metal reliability mechanisms in Ruthenium interconnects
Comprehensive Reliability Assessment of WOx Engineering for Temperature-Resilient HfZrO2 FeCAP
Methodology of Predicting Package Early Failure
Innovative reliability solution for WLCSP packages
A Physical Unclonable Function Leveraging Hot Carrier Injection Aging
Short localization in CPU FlipChip using thermal imaging and magnetic current imaging: Advanced fault isolation technique comparison
TDDB improvement of copper/dielectric in the highly-integrated BEOL structure for 28nm technology node and beyond
Critical Role of Holes in Reliability, Robustness and Stability of GaN-on-Si HEMTs for Power and RF Applications
Logic soft error study with 800-MHz DDR3 SDRAMs in 3x nm using proton and neutron beams
Impact of X-Ray Radiation on the Reliability of Logic Integrated Circuits
Reliability of Ferroelectric and Antiferroelectric Si: HfO2 materials in 3D capacitors by TDDB studies
Cathodoluminescence spectroscopy for failure analysis and process development of GaN-based microelectronic devices
Self-healing LDMOSFET for high-voltage application on high-k/metal gate CMOS process
Threshold Voltage Drift and Recovery of SiC Trench MOSFETs During TDDB Stress
New Method to Perform TDDB Tests for Hybrid Bonding Interconnects
High Temperature and High Humidity Reliability Evaluation of Large-Area 1200V and 1700V SiC Diodes
Crack Catcher AI - Enabling Smart Fracture Mechanics Approach for Damage Control in Thin Silicon Wafers for 3D Semiconductor Integrated Devices/Packages
A novel high level ESD FDNSCR with drain side engineering in PMIC application
Impact of Non-Conducting HCI Degradation on Small-Signal Parameters in RF SOI MOSFET
Monolithic 3D Integration of Oxide Semiconductor FETs and Memory Devices for AI Acceleration (Invited)
Exploring the DC reliability metrics for scaled GaN-on-Si devices targeted for RF/5G applications
Multilevel Programming Reliability in Si-doped GeSbTe for Storage Class Memory
CV Stretch-Out Correction after Bias Temperature Stress: Work-Function Dependence of Donor-/Acceptor-Like Traps, Fixed Charges, and Fast States
Nanoindentation to investigate IC stability using ring oscillator circuits as a CPI sensor
AC stress reliability study of a new high voltage transistor for logic memory circuits
Effect of Frequency on Reliability Of High-K MIM Capacitors
Reliability of CMOS-SOI power amplifiers for millimeter-wave 5G: the case for pMOS (Invited)
A highly reliable DRAM 3-D wafer thinning process
Sub-nanosecond Reverse Recovery Measurement for ESD Devices
Estimating transistor channel temperature using time-resolved and time-integrated NIR emission
Comprehensive Study of Thermal Neutron SER in Bulk-Planar, Bulk-FinFET, FDSOI-Planar, and Bulk-GAA Technology, Evaluated at HANARO
Methodology to achieve planar technology-like ESD performance in FINFET process
Quantifying Region-Specific Hot Carrier Degradation in LDMOS Transistors Using a Novel Charge Pumping Technique
Enhancing EM Reliability and Lifetime Modeling: A Multi-Link Structure Approach
Reliability challenges for 2.5D/3D integration: An overview
A defect characterization technique for the sidewall surface of Nano-ridge and Nanowire based Logic and RF technologies
Single-Event Upset Responses of Dual- and Triple-Well D Flip-Flop Designs in 7-nm Bulk FinFET Technology
Machine Learning Unleashes Aging and Self-Heating Effects: From Transistors to Full Processor (Invited Paper)
Insight into Latchup Risk in 28nm Planar Bulk Technology for Quantum Computing Applications
Investigation of NBTI Dynamic Behavior with Ultra-Fast Measurement
Demystifying the Use of IC Plastic packages for Space Applications
Soft-Error Sensitivity in SRAM Manufactured by Bulk Gate-All-Around (GAA) Technology
Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets
Efficient Simulation of Electromigration Damage in Large Chip Power Grids Using Accurate Physical Models (Invited Paper)
Study on mechanism of thermal curing in ultra-thin gate dielectrics
Challenges toward Low-Power SOT-MRAM
Distinct Signatures of Self-Heating and Trap Dynamics on the AC Y-Parameters of Advanced n-MOSFETs
Towards accurate temperature prediction in BEOL for reliability assessment (Invited)
Reliability of 8Mbit Embedded-STT-MRAM in 28nm FDSOI Technology
A Reliability Overview of Intel's 10+ Logic Technology
Self-Heating Effects in FDSOI Transistors at Cryogenic Temperature: A Spatial and Temporal Experimental Study (Invited)
A Simple Prediction Method for Chip-Level Electromigration Lifetime Using Generalized Gamma Distribution
A Smart SRAM-Cell Array for the Experimental Study of Variability Phenomena in CMOS Technologies
Statistical modeling and reliability prediction for transient luminance degradation of flexible OLEDs
A Pulsed RTN Transient Measurement Technique: Demonstration on the Understanding of the Switching in Resistance Memory
Comprehensive Analysis of Deep level Effects and in-situ Photoionization in 0.15 $\mu \mathrm{m}$ buffer-free AIGaN/GaN HEMTs for RF applications
Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms
Impacts of Depth and Lateral Profiles of Fluorine Atoms in Gate Oxide Films on Reliability
Accelerating Device-Circuit Self-Heating Simulations with Dynamic Time Evolution for GAAFET
Multi-cell soft errors at the 16-nm FinFET technology node
Keynote 1: The road to resilient computing in autonomous driving is paved with redundancy
Statistical model of program/verify algorithms in resistive-switching memories for in-memory neural network accelerators
A Critical Investigation of Hot Carrier Degradation in Low VTNMOSFETs in DRAM
Reliability Issues in Analog ReRAM Based Neural-Network Processor
Understanding the underlying degradation physics for proper time-to-failure distribution selection
Delay effects and frequency dependence of NBTI with sub-microsecond measurements
Characterization and Analysis of RF Switches in SOI Technology for ESD Protection
A pragmatic network-aware paradigm for system-level electromigration predictions at scale
Characterization and modeling of DCR and DCR drift variability in SPADs
Facile Route for Low-temperature Eco-friendly Solution Processed ZnSnO Thin-film Transistors
Investigating the Aging Dynamics of Diode-Connected MOS Devices Using an Array-Based Characterization Vehicle in a 65nm Process
Vertical stack reliability of GaN-on-Si buffers for low-voltage applications
Reliability Challenges with Materials for Analog Computing
Machine learning based dynamic cause maps for condition monitoring and life estimation
Physics to Tapeout: The Challenge of Scaling Reliability Verification
Program/Erase Cycling Enhanced Lateral Charge Diffusion in Triple-Level Cell Charge-Trapping 3D NAND Flash Memory
Reliability Investigation of W2W Hybrid Bonding Interface: Breakdown Voltage and Leakage Mechanism
Breakdown Lifetime Analysis of HfO2-based Ferroelectric Tunnel Junction (FTJ) Memory for In-Memory Reinforcement Learning
Demonstration of the Benefits of Measuring SiC MOSFET BTI using a Triple Sense Method
Investigation on NBTI Control Techniques of HKMG Transistors for Low-power DRAM applications
A Thermal Profile Prediction Methodology for Nanosheet Circuits Featuring Cross-Layer Thermal Coupling Effect
CPI Reliability Challenges of Large Flip Chip Packages and Effects of Kerf Size and Substrate
Statistical Characterization of Off-State Stress Degradation in Planar HKMG nFETs Using Device Arrays
Product-level reliability estimator with budget-based reliability management in 20nm technology
Self-heating characterization of FinFET SOI devices using 2D time resolved emission measurements
Susceptibility of planar and 3D tri-gate technologies to muon-induced single event upsets
Low-Bit Precision Neural Network Architecture with High Immunity to Variability and Random Telegraph Noise based on Resistive Memories
Thickness dependence on electrical and reliability properties for dense and porous low dielectric constant materials
Influence of high-voltage gate-oxide pulses on the BTI behavior of SiC MOSFETs
A case study of ESD trigger circuit: Time-out and stability
Infant Mortality and Wear-Out Failures in Polymer and MnO2 Tantalum Capacitors
Non-conducting Hot carrier temperature activation and temperature sense effect
Hybrid HCI Degradation in Sub-micron NMOSFET due to Mixed Back-end Process Damages
Investigation of nitrogen enhanced NBTI effect using the universal prediction model
Probabilistic design for reliability in electronics and photonics: Role, significance, attributes, challenges
Study of the microstructure and the mechanical properties of Pb-2.5Ag-2Sn solder joint
Monitoring Setup and Hold Timing Limits
Analysis of 28 nm SRAM cell stability under mechanical load applied by nanoindentation
Temperature Dependence of Single-Event Transient Pulse Widths for 7-nm Bulk FinFET Technology
Analysis of Sheet Dimension (W, L) Dependence of NBTI in GAA-SNS FETs
Reliability of InGaZnO Transparent ReRAM with Optically Active Pt-Nanodisks
Comprehensive Quality and Reliability Management for Automotive Product
Reliability Considerations for 5G and 6G Phased Arrays
Virtual FA Methodology for DRAM: Real-Time Analysis and Risk Assessment Method Using Telemetry
Efficient Bidirectional protection structure for Plasma induced damage (PID) and Electrostatic discharge (ESD) for 3D IC Integration
Comprehensive Time Dependent Dielectric Breakdown (TDDB) Characterization of Ferroelectric Capacitors Under Bipolar Stress Conditions
A new prediction method for ReRAM data retention statistics based on 3D filament structures
Data Center Silent Data Errors: Implications to Artificial Intelligence Workloads & Mitigations
Correlation between SET-state current level and read-disturb failure time in a resistive switching memory
Study on the Measurement Method of Interface Resistance in HBM-DRAM: Novel Monitoring Method for Bump Contact Resistance
Cycling pattern and read/bake conditions dependence of random telegraph noise in decananometer NAND flash arrays
Reliability Assessment of 3nm GAA Logic Technology Featuring Multi-Bridge-Channel FETs
Impact of time-zero and NBTI variability on sub-20nm FinFET based SRAM at low voltages
Reliability Characteristics of a High Density Metal- Insulator-Metal Capacitor on Intel's 10+ Process
The Effects of $\gamma$ Radiation-Induced Trapped Charges on Single Event Transient in DSOI Technology
Observation of Kink effect in Carbon-doped GaN-on-Si HEMTs for Power Applications
Tolerance of Deep Neural Network Against the Bit Error Rate of NAND Flash Memory
Impact of Ferroelectric Wakeup on Reliability of Laminate based Si-doped Hafnium Oxide (HSO) FeFET Memory Cells
Single pulse short-circuit robustness and repetitive stress aging of GaN GITs
Adhesion-Limit in Refractory Transition Metal (Mo) Contact Relay Operation at 300 °C - Avoiding Overestimation for Modern ICs
An All BTI (N-PBTI, N-NBTI, P-PBTI, P-NBTI) Odometer based on a Dual Power Rail Ring Oscillator Array
Avalanche and Short-Circuit Robustness of 4600 V SiC DMOSFETs
SRAM Vmax stability considerations
Reliability of GaN MOSc-HEMTs: From TDDB to Threshold Voltage Instabilities (Invited)
Backhopping-based STT-MRAM Poisson Spiking Neuron for Neuromorphic Computation
Device performance analysis on 20nm technology thin wafers in a 3D package
Key parameters driving transistor degradation in advanced strained SiGe channels
Mechanical and thermal stresses characterization maps on cross-sections of forward biased electronic power devices
Investigation of the Moisture- Driven Dynamics of Time- Dependent Dielectric Breakdown in Polymeric Dielectrics for Galvanic Isolators
Ultra Long-term Measurement Results of BTI-induced Aging Degradation on 7-nm Ring Oscillators
Unique Lattice Temperature Dependent Evolution of Hot Electron Distribution in GaN HEMTs on C-doped GaN Buffer and its Reliability Consequences
DC Reliability Study of $\text{high}-\kappa$ GaN-on-Si MOS-HEMT's for mm-Wave Power Amplifiers
Scaling Behaviour of State-to-State Coupling During Hole Trapping at Si/SiO2
Challenges to realize highly reliable SiC power devices: From the current status and issues of SiC wafers
Full (V g , V d ) Bias Space Modeling of Hot-Carrier Degradation in Nanowire FETs
Double Layers Omega FETs with Ferroelectric HfZrO2 for One-Transistor Memory
Defect-Assisted Safe Operating Area Limits and High Current Failure in Graphene FETs
GIDL Increase Due to HCI Stress: Correlation Study of MOSFET Degradation Parameters and Modelling for Reliability Simulation
Microscopic Characterization of Failure Mechanisms in Long-Term Implanted Microwire Neural Electrodes
Improved Endurance Reliability of Ferroelectric Hafnium Oxide-Based BEoL Integrated MFM Capacitors
Characteristic Degradation of Power MOSFETs by X-Ray Irradiation and Their Recovery
Mitigating read-program variation and IR drop by circuit architecture in RRAM-based neural network accelerators
I/O Circuit and Sub-5V ESD Protection for Advanced Bonding Interfaces
Effect of metal line width on electromigration of BEOL Cu interconnects
A Unified Aging Model Framework Capturing Device to Circuit Degradation for Advance Technology Nodes
ASAP: An Efficient and Reliable Programming Algorithm for Multi-level RRAM Cell
Characterizing Energetic Dependence of Low-Energy Neutron-induced MCUs in 65 nm bulk SRAMs
Modeling self-heating effects in advanced CMOS nodes
Contact resistance of solder bump with low cost photosensitive polyimide for high performance SoC
A novel 8kV on-chip surge protection design in xDSL line driver IC
Investigation and Mitigation of Transistor Induced Reliability Issues in 40NM RRAM Array
Multiple Bit Upsets in Register Circuits at the 5-nm Bulk FinFET Node
Variability sources and reliability of 3D - FeFETs
Modelling Degradation of Matched-Circuits in Operational Conditions: Active and Stand-by Modes
Alpha Particle Soft-Error Rates for D-FF Designs in 16-Nm and 7-Nm Bulk FinFET Technologies
Investigation of Read Disturb for Hf0.5Zr0.502 Ferroelectric Field-Effect Transistors Based Neuromorphic Applications
Thermal-Neutron SER Mitigation by Cobalt-Contact in 7 nm Bulk-FinFET Technology
Drift Compensation in Multilevel PCM for in-Memory Computing Accelerators
Enhanced Threshold Voltage Stability in ZnO Thin-Film-Transistors by Excess of Oxygen in Atomic Layer Deposited Al2O3
Wafer Level Chip Scale Package Failure Mode Prediction using Finite Element Modeling
On the impact of mechanical stress on gate oxide trapping
Soft errors in 7nm FinFET SRAMs with integrated fan-out packaging
Back gate bias effect and layout dependence on Random Telegraph Noise in FDSOI technologies
The Importance of Gate Length Choice on NBTI Qualification in GAA-SNS FETs Under Normal and Overclocking Conditions
Simulation Comparison of Hot-Carrier Degradation in Nanowire, Nanosheet and Forksheet FETs
Design for Reliability (DFR) Aware EDA Solution for Product Reliability (Invited)
Numerical Simulation and Characterization of PCB Warpage
Reverse Body Bias Dependence of HCI Reliability in Advanced FinFET
Comprehensive Analysis of DC, Pulsed, and RF Performance of Submicron GaN-on-Si MIS-HEMTs Under Gamma Radiation
A revolving reference odometer circuit for BTI-induced frequency fluctuation measurements under fast DVFS transients
Reversible and Irreversible Polarization Degradation of Hf0.5Zr0.5O2 Capacitors with Coherent Structural Transition at Elevated Temperatures
Comprehensive Performance and Reliability Assessment of Se-based Selector-Only Memory
Development and Product Reliability Characterization of Advanced High Speed 14nm DDR5 DRAM with On-die ECC
Novel RC-Clamp Design for High Supply Voltage
Similarities and Differences of BTI in SiC and Si Power MOSFETs
Investigation on the amplitude coupling effect of random telegraph noise (RTN) in nanoscale FinFETs
Nanoscale Analysis of Breakdown Induced Crack Propagation in DTSCR Devices
Investigation of Hot Carrier Enhanced Body Bias Effect in Advanced FinFET Technology
Characterization and Multiscale Modeling of TDDB in State-of-the-art BEOL
Plasma processing induced charging damage (PID) assessment with appropriate fWLR stress methods ensuring expected MOS reliability and lifetimes for automotive products (Invited)
New Loss Function for Learning Dielectric Thickness Distributions and Generative Modeling of Breakdown Lifetime
Characterization and Modelling of High Speed Ge Photodetectors Reliability
Current Dynamics during Bipolar TDDB in Galvanic Isolators based on Polymeric Dielectrics
A Novel Latch-Up-Immune DDSCR Used for 12 V Applications
An Analysis of CDM-induced BTI-like Degradation using VF-TLP in Advanced FinFET Technology
Optical Emission Correlated to Bias Temperature Instability in SiC MOSFETs
Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery
Impact of Thin-oxide Gate on the On-Resistance of HV-PNP Under ESD Stress
Gate Driver Protection Methods for SiC MOSFET Short Circuit Testing
Area and pulsewidth dependence of bipolar TDDB in MgO magnetic tunnel junction
Simulation Study of the Origin of Ge High Speed Photodetector Degradation
Relevance of fin dimensions and high-pressure anneals on hot-carrier degradation
Novel Operation Scheme for Suppressing Disturb in HfO2-based FeFET Considering Charge- Trapping-Coupled Polarization Dynamics
Analysis and Modeling of Vth Shift in 4H-SiC MOSFETs at Room and Cryogenic-Temperature
Design Optimization of MV-NMOS to Improve Holding Voltage of a 28nm CMOS Technology ESD Power Clamp
ESD characterization of planar InGaAs devices
Machine Learning for Detection of Competing Wearout Mechanisms
Extended RVS characterisation of STT-MRAM devices: Enabling detection of AP/P switching and breakdown
The Price of Secrecy: How Hiding Internal DRAM Topologies Hurts Rowhammer Defenses
Gate Current Stress for Detecting Neutron-Induced Degradation in SiC Power MOSFETs
TDDB Reliability in Gate-All-Around Nanosheet
Reliability of Industrial grade Embedded-STT-MRAM
A novel approach to in-field, in-mission reliability monitoring based on Deep Data
Cryogenic Endurance of Anti-ferroelectric and Ferroelectric Hf 1-x Zr X O 2 for Quantum Computing Applications
Optimized LDMOS Offering for Power Management and RF Applications
Charge state evaluation of passivation layers for silicon solar cells by scanning nonlinear dielectric microscopy
ON-state reliability of GaN-on-Si Schottky Barrier Diodes: Si3N4 vs. Al2O3/SiO2 GET dielectric
Influence of the Gate Switching Instability Induced Threshold Voltage Drift on the Hard Switching Behavior of 1.2 kV SiC MOSFETs
Degradation Detection of Power Switches in a Live Three Phase Inverter using SSTDR Signal Embedded PWM Sequence
Understanding EM-Degradation Mechanisms in Metal Heaters Used for Si Photonics Applications
Hot-Carrier Aging by Ultrafast Laser on 22FLL FinFET Technology
Investigation of the Failure Mechanism of InGaAs-pHEMT under High Temperature Operating Life Tests
Comprehensive Methodology for Multiple Spots Competing Progressive Breakdown for BEOL/FEOL Applications
Deep Learning-Assisted Trap Extraction Method from Noise Power Spectral Density for MOSFETs
Robustness of Quantum Federated Learning (QFL) Against "Label Flipping Attacks" for Lithography Hotspot Detection in Semiconductor Manufacturing
Improved Turn-on Uniformity & Failure Current Density by n-& p-Tap Engineering in Fin Based SCRs
Solving critical issues in 10nm technology using innovative laser-based fault isolation and DFT diagnosis techniques
Aging-Aware Design Verification Methods Under Real Product Operating Conditions
Vth and Ron Instability of GaN Power HEMTs with pGaN Gate Under Negative Gate Bias
Optical Reliability and Reliability of Optical Devices
A New Methodology to Evaluate Die-Package Level Load-Pull and Ruggedness for RF Long Term Aging for 5G Applications
Design Strategies for Rugged SiC Power Devices
A Carrier-Energy-Based Compact Model for Hot-Carrier Degradation Implemented in Verilog-A
Hole-Induced Threshold Voltage Instability Under High Positive and Negative Gate Stress in SiC MOSFETs
Spatio-Temporal Defect Generation Process in Irradiated HfO2 MOS Stacks: Correlated Versus Uncorrelated Mechanisms
Recent advances in in-situ and in-field aging monitoring and compensation for integrated circuits: Invited paper
An Aging Degradation Suppression Scheme at Constant Performance by Controlling Supply Voltage and Body Bias in a 65 nm Fully-Depleted Silicon-On-Insulator Process
Effect of Precursor Defects in Oxide Layer on Ionizing Radiation Damage of Bipolar Junction Transistors
Lateral profiling of HCI induced damage in ultra-scaled FinFET devices with Id-Vd characteristics
Fast & Accurate Methodology for Aging Incorporation in Circuits using Adaptive Waveform Splitting (AWS)
Charge Loss Improvement in 3D Flash Memory by Molecular Oxidation of Tunneling Oxide
Impact of DC and RF non-conducting stress on nMOS reliability
Transistor Reliability Characterization for Advanced DRAM with HK+MG & EUV process technology
Unveiling Retention Physical Mechanism of Ge-rich GST ePCM Technology
Interpretation and modelling of dynamic-RON kinetics in GaN-on-Si HEMTs for mm-wave applications
Hot-Electron Effects in GaN GITs and HD-GITs: A Comprehensive Analysis
Device variability tolerance of a RRAM-based self-organizing neuromorphic system
Thermomigration-induced void formation in Cu-interconnects - Assessment of main physical parameters
A New Ramp Stress Reliability Assessment on Pulse Energy Based OTS Switching Operation
A Critical Examination of the TCAD Modeling of Hot Carrier Degradation for LDMOS Transistors
Chip Scale Packaging and Its Failure Analysis Challenges (invited)
Impact of Al-doping on Al: HfO2Dielectric Reliability in MIM Capacitors
Evidence of Back-Gating and its Impact on Breakdown in GaN-on-Si HEMTs with Carbon Doped Buffer Under Pulsed Conditions
Adaptive Clock Gating for Improving Wear out induced Duty Cycle Shift in the Clock Network
Novel Oxide Top-Off Process Enabling Reliable PC-CA TDDB on IO Devices with Self Aligned Contact
Improved HCI in SOI-based next generation RF Power Amplifier FETs using device optimization approach
Endurance Evaluation on OTS-PCM Device using Constant Current Stress Scheme
Microprocessor Switching Activity Translation to AC Gate Oxide Wearout: Does it Matter? INTEL4 Meteor Lake Chip Activity Case Study
A Systematic Study of HCI Improvement in FinFET with Source/Drain Implant and Geometry Modulation
Single Event Hard Error due to Terrestrial Radiation
Charge Trapping in SiC MOSFETs under Constant Gate Current Stress: Analysis Based on Charge Pumping Measurements
Investigation of monolayer MX2 as sub-nanometer copper diffusion barriers
From Device Aging Physics to Automated Circuit Reliability Sign Off
Trends and Functional Safety Certification Strategies for Advanced Railway Automation Systems
Towards the Characterization of Full ID-VG Degradation in Transistors for Future Analog Applications
Identification of Interface States responsible for VTH Hysteresis in packaged SiC MOSFETs
Assessing Non-Conducting Off-State Induced Hard Breakdown for PD-SOI MOSFETs using an RF Measurement Technique
Correlation between MOSFETs breakdown and 4H-SiC epitaxial defects
A case study of electromigration reliability: From design point to system operations
High-Current State triggered by Operating-Frequency Change
On-Wafer Dynamic Operation of Power GaN-HEMTs: Degradation Processes Investigated by a Novel Experimental Approach
Impact of Gate Stack Thermal Budget on NBTI Reliability in Gate-All-Around Nanosheet P-type Devices
BTI Arbitrary Stress Patterns Characterization & Machine-Learning optimized CET Maps Simulations
Design of aging aware 5 Gbps LVDS transmitter for automotive applications
Retention Analysis of Ferroelectric FETs with Gate-Side Injection for Vertical NAND Storage