yusuke1997/dblp-id-title huggingface dataset:
Harmonic analysis of diode-bridge rectifiers in Wireless Power Transfer System
End-to-End Multi-Target Verification Environment for a RISC-V Microprocessor
Analysis of Phase-Locked Loops using the Best Linear Approximation
MATLAB & VHDL-AMS co-simulation environment for IR-UWB transceiver design
Synthesis and fundamental energy analysis of fault-tolerant CMOS circuits
A 23.5-32.5GHz, 17dBm PSAT and 37.5% PAE Power Amplifier Synthesized Using an Automated Design Methodology
Accelerating Electromigration Stress Analysis Using Low-Rank Balanced Truncation
A Power-Efficient Analog Integrated Decision Tree Classifier for Machine Predictive Maintenance Classification
Technology-Independent Local Mismatch Estimation Using Precomputed Lookup Tables
Frequency-dependent parameterized macromodeling of integrated inductors
Analysis and Optimization of Power Supply Rejection for Power Management Unit Design in RFID Sensor applications
Geometric form Factors-Based Power Transformers Design
Multiscale modelling of MEMS based Pirani gauges
Procedural Design, Verification and Implementation Framework for Analog Amplifiers
Plenaries
Systematic MEMS ASIC design flow using the example of an acceleration sensor
Numerical estimation of a 10 nanosecond pulse effects on non-uniformly distributed liposomes
Modeling and Analysis of MS Accelerators Embedding SRAM and RRAM Compute Cells
Reliable design methodology: The combined effect of radiation, variability and temperature
Modeling of Low-dropout Regulator to Optimize Power Supply Rejection in System-on-Chip Applications
IIP framework: A tool for reuse-centric analog circuit design
3.35V High Voltage Electroforming Generator in 28nm with 5.3mV ripple and 46% efficiency for HfO2-based Memristors
In-system IGBT power loss behavioral modeling
Framework for Developing Neural Network Regression Models Predicting the Influence of EMI on Integrated Circuits
Impact of semiconductors on the performance of Wireless Power Transfer Systems
A Comparative Study of Switch-Mode and Constant-Current Methods for High-Efficiency Neural Stimulation
13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2016, Lisbon, Portugal, June 27-30, 2016
Under Cover: On-FPGA Coverage Monitoring by Netlist Instrumentation
A Simplified Variability-Aware VCM Memristor Model for Efficient Circuit Simulation
LUT-Based Stochastic Modeling for Non-Normal Performance Distributions
Optimizing Datapaths for Near Threshold Computing
Electrical resistance in inhomogeneous samples during electroporation
Design and Implementation of a GPU-Based Digital Predistortion Linearizer for RF Power Amplifiers
A Frequency-Domain Neural-Network Model for High-Power RF Transistors
Integration of CMOS Photodiode and Capacitive Charge Pump Circuits for On Chip Photovoltaic Energy Harvesting
Kriging Metamodeling-Assisted Multi-Objective Optimization of CMOS Current Conveyors
Miniaturized dual-band balanced antenna for LTE using meander lines
Wireless Readout System Modeling for Electrodeless QCM
Modelling Switched-Capacitor DC-DC Converters with Signal Transition Graphs
15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2018, Prague, Czech Republic, July 2-5, 2018
TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level
Three-Dimensional Modeling of Insulin Pen for Multi-Electrode Capacitive Sensing
A Microfluidic Refreshable Braille Display System
Mismatch-Aware Placement of Device Arrays Using Genetic Optimization
Wide-Band Shared LNA for Large Scale Neural Recording Applications
Design, Simulation and Implementation of Very Compact Dual-band Microstrip Bandpass Filter for 4G and 5G Applications
Machine Learning Approaches for Transformer Modeling
Multiple Output Modelling of Integrated Circuits Behavior Using an Active Learning Approach
Hardware-Software Co-Design for Resource Efficient Gesture Classification System for FPGAs
Combining Machine Learning and Optimization Techniques for the High-Level Design of Σ∆Ms
Feature selection and feature design for machine learning indirect test: a tutorial review
Sensitivity-aware Hardware Trojan Injection for SET Propagation and Soft Error Attacks
Automatic Regression Framework for MRAM Compact Models Calibration including Stochasticity
Model of Switched-Capacitor Programmable Voltage Reference: Optimization for Ultra Low-Power Applications
Extending C/ID Methodology for Optimal Implementation of Single-Stage Discrete-Time Amplifiers
Improving ICs reliability with high speed thermal mapping
PROTON - A Python Framework for Physics-Based Electromigration Assessment on Contemporary VLSI Power Grids
Hard and Soft Constraints for Multi-objective Analog IC Sizing Optimization
Towards a Reliable PUF Using Organic Thin-Film Transistors
Modeling cyber-physical systems for automatic verification
From Image to Simulation: An ANN-based Automatic Circuit Netlist Generator (Img2Sim)
Co-Simulation for Automated Optimization of Integrated Cryogenic Qubit Electronics
Application of the Expert Design Plan Methodology on an Ultra-Low-Power Sensor Frontend
Hot Fuzz: Assisting verification by fuzz testing microelectronic hardware
Efficient Stimuli Generation using Reinforcement Learning in Design Verification
Wide Frequency Range Impedance Measurement of a Li- ion Prismatic Cell for Power Line Communication Technique
ToPoliNano & MagCAD: A Complete Framework for Design and Simulation of Digital Circuits Based on Emerging Technologies
Test structures for residual stress monitoring in the integrated CMOS-MEMS process development
Optimizer-Free Sizing of OpAmps Leveraging Structural and Functional Properties
TERORO - Transient Effect Ring Oscillator and Ring Oscillator Configurable Hybrid PUF
On the use of an RTN simulator to explore the quality trade-offs of a novel RTN-based PUF
A 3μW, 0.65V regulator with an embedded temperature compensated voltage reference
Modeling the Dependencies between Circuit and Technology Parameters for Sensitivity Analysis using Machine Learning Techniques
Lifetime Calculation Using a Stochastic Reliability Simulator for Analog ICs
On the accurate modeling of analog circuits via the Kriging metamodeling technique
Image Processing with Memristor Cellular Nonlinear Networks Featuring Volatile Threshold Switches
Reliability evaluation of IC Ring Oscillator PUFs
Modeling Power Supply Noise Effects for System-Level Simulation of $\Delta\Sigma$ -ADCs
Method, Test Procedure and System for the Experimental Characterization of Power Inductors
16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019, Lausanne, Switzerland, July 15-18, 2019
Modeling of Parasitic Light Sensitivity in Global Shutter CMOS Image Sensors
Experimental Characterization of Time-Dependent Variability in Ring Oscillators
System of Standard Approximations for Optimum Frequency Filter Design
Improving the Functional Coverage Closure of Network-on-Chip using Particle Swarm Optimization
Power-Down Mode Verification for Hierarchical Analog Circuits
End-to-end Integration of OpenTitan Security Features in a Pure RISC-V SoC
Ultra-Low Current Sensing from Femtoampere to Picoampere Range
Proposal and Implementation on Smartphone of a PUF Using Accelerometers and Gyroscopes
Bidirectional CAN-Interface Using Inductive Transmission
Stability Analysis for Frequency Tunable Bandpass Delta-Sigma ADC Architectures
Simulation of broadband transient signals in frequency-domain using impedance parameters
Chirp design in a pulse compression procedure for the identification of non-linear systems
A Verilog-A model of a charge sensitive amplifier for a HV-CMOS pixel sensor
A Low-Voltage, Low-Power CMOS Temperature Sensor Utilizing a Single PTAT-CTAT Current Loop
Comprehensive detection of counterfeit ICs via on-chip sensor and post-fabrication authentication policy
Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm
Automated Parameter Extraction and SPICE Model Modification For Gate Enclosed MOSFETs Simulation
Design Space Exploration of Single-Stage OTAs towards an Ultra-Low-Power LNA for ECG Signals
Impact of Process Variations on the Performance of a Widely Tunable CMOS Transconductor
Streamlined design methodology for Cell-Based DCOs
Low-Gm CMOS Transconductors with Wide Tuning Range for Bioimpedance Spectroscopy
Simulation Study of the Maximum Power Dissipation-Energy Consumption Dilemma in Memristors Using the Dynamic Memdiode Model
Exploiting Saturable Inductors in SEPIC Regulators
Efficient generation of data sets for one-shot statistical calibration of RF/mm-wave circuits
Pulse Compression for Ferrite Inductors Modeling in Moderate Saturation
SETA: A CAD Tool for Single Event Transient Analysis and Mitigation on Flash-Based FPGAs
Ultra-Low Power and Low-Leakage Subthreshold CMOS Neural Circuit Design
A Model Parameter Extraction Methodology Including Time-Dependent Variability for Circuit Reliability Simulation
Charge-Based Model for Reliability Analysis Flow of Flip- Flops under Process Variation and Aging
A 20 DB Gain Two-Stage Low-Noise Amplifier with High Yield for 5 GHz Applications
Design considerations for a CMOS 65-nm RTN-based PUF
Design and Development of a Linear Adaptive Equalizer used for High Data-Rate Satellite Receivers based on CCSDS 131.2-B Standard
On the Sparsification of the Reluctance Matrix in RLCk Circuit Transient Analysis
Accurate Modeling of Inductors Working in Nonlinear Region in Switch-Mode Power Supplies with Different Load Currents
Extended analysis of idealized class-E operation with finite DC-feed inductance and preservation of zero volt switching at variable load
Single-Electron-Transistor Compact Model for Spin-Qubit Readout
A Practical PCB-based Framework for Spiking Neural Networks with a Half-Adder Example
Statistically-aided electronic design environment
ANN-based Analog/RF IC Synthesis Featuring Reinforcement Learning-based Fine-Tuning
An ANN-Based Approach to the Modelling and Simulation of Analogue Circuits
Towards a nanofabricated vacuum cold-emitting triode
Ternary Clock Tree Synthesis for 3D ICs
A Scalable Authentication Scheme for Detecting Unauthorized Dice in A Multi-Die IC
A Design Flow and EDA-Tool for an Automated Implementation of ASIC Configuration Interfaces
A new method for the analysis of movement dependent parasitics in full custom designed MEMS sensors
Design of a LTE-receiver using a design methodology for multiphysical RF systems
A Novel 10-18 GHz Current-Reuse Distributed Cascode Low-Noise Amplifier (LNA) Design
Carry-chain based Ring Oscillator Design for Temperature Sensing on FPGAs
Efficient signature selection tool for sense & react systems
Analog Layout Placement Based on Unit Elements and Routing Channel Estimation
An Open-Source EM Simulation Flow Based on a High-Level Python API
Propagation Delay Estimation for Mixed-Signal Modeling of Comparators
Efficient and automated generation of multidimensional design curves for coupled-resonator filters using system identification and metamodels
A Compact Flexible High-bandwidth Meander Line Patch Antenna for IoT Applications
20nm FinFET-based SRAM cell: Impact of variability and design choices on performance characteristics
Fast and Accurate Multi-Neural Network Ensemble Model
A Side-Channel Attack-Resilient Single-Slope ADC for Image Sensor Applications
A new table based modelling of 28nm fully depleted silicon-on insulator (FDSOI)
A Modeling Approach for 7nm Technology Node Area-Consuming Circuit Optimization and Beyond
Distributed amplifier design for UWB positioning systems using the gm over id methodology
Exploring the Resiliency of Hardware CNN for Aerospace Application
DTCO for Fast STT-MRAM Periphery Operation
Inverse Analog IC Sizing and Exploration through Diffusion Models and Structural Knowledge
A Piecewise-Affine Inductance Model for Inductors Working in Nonlinear Region
Self-Testing Analog Spiking Neuron Circuit
New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization
Impact of BTI and HCI on the reliability of a Majority Voter
Power-down synthesis for analog circuits including switch sizing
Advanced Modeling Methodology for Expedient RF SoC Verification and Performance Estimation
Multitasking and Memcomputing in Memristor Cellular Nonlinear Networks: Insights into the Underlying Mechanisms
Mixed Design of SPAD Array Based TOF for Depth Camera and Unmanned Vehicle Applications
Circuit Synthesis of a 140-220 GHz Low-Noise Amplifier in 130 nm SiGe BiCMOS
Modeling of fully printed organic field effect transistors for circuit design and simulation
Response Time Analysis of Thin Film Based Piezoresistive Pressure Sensor
A Novel Multiple Membership Function Generator for Fuzzy Logic Systems
Design of Logic Gates by Using a Four-Gate Thin Film Transistor (FG TFT)
A Temperature Dependent Non-Linear Inductor Model for a DC/DC Boost Converter
Fast ML-driven Analog Circuit Layout using Reinforcement Learning and Steiner Trees
A Verilog-A model of a silicon resistive strip for particle detectors
Extending the frequency range of quasi-static electromagnetic solvers
Variation- and degradation-aware stochastic behavioral modeling of analog circuit components
Symbolic Top-down Design Methodology of a Quadrature Bandpass Delta Sigma Modulator
An Open-Source ANN-based Analog/RF Intellectual Property for SkyWater130nm Technology
Compact model based design space exploration for CMOS hall effect sensors
Efficient Parameter Reduction for Statistical Behavioral Modeling
A Low Power Priority Encoding Technique with Address-Encoder and Reset-Decoder for an Improved Hierarchical Asynchronous Detector
Automated generation of system-level AMS operating condition checks: Your model's insurance policy
MESH: Explicit and flexible generation of analog arrays
Rapid Prototyping Platform for Integrated Circuits for Quantum Computing
3D Monte Carlo Simulations of n-type Nanowire-FETs: The Effect of Gate Scaling
A Hysteretic-Controlled Digital LDO Regulator for Enhanced Load Transient Response
Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs
2D Bifurcations and Chaos in Nonlinear Circuits: a Parallel Computational Approach
Trust Based Access Control For Dynamically Reconfigurable Sensor Network
Novel Control Flow Checking Implementations for Automotive Software
Multiprogram tools for FPGA boards with single identifier on Windows
Responsivity Comparison of Different Photodiode Structures
A toolbox for the symbolic analysis and simulation of linear analog circuits
Investigation of Reconfigurable CORDIC Modes and Efficiency
Paving the Way for the Electronic Design Automation of Power Management Units
Automated Massive RTN Characterization Using a Transistor Array Chip
On Closing the Gap Between Pre-Simulation and Post-Simulation Results in Nanometer Analog Layouts
A Low-Power Charge-Pump PLL for Sub-6 GHz 5G and IoT Wireless Communication Systems
Low-rank balanced truncation of RLCk models via frequency-aware rational Krylov-based projection
Automated analog IC design constraints generation for a layout-aware sizing approach
Safety-oriented mixed-signal verification of automotive power devices in a UVM environment
A Seamless and Unified Flow for Robust Development of DC-DC Digital Controllers
Design Space Exploration of CMOS Cross-Coupled LC Oscillators via RF Circuit Synthesis
Yield Approximation of Analog Integrated Circuits Under Time-Dependent Variability
Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application
Mixed-Variable Bayesian Optimization for Analog Circuit Sizing using Variational Autoencoders
Spin-torque memristor based offset cancellation technique for sense amplifiers
Beyond SPICE Simulation: A Novel Variability-Aware STA Methodology for Digital Timing Closure
ATOMIC: Automatic Tool for Memristive IMPLY based Circuit-level Simulation and Validation
Artificial Neural Networks as an Alternative for Automatic Analog IC Placement
A Hybrid Model Checking and Theorem Proving based Approach for Fault Tree Analysis
Microdosimetry for pulsed E fields in a realistic models of cells and endoplasmic reticulum
A Reliable and Fast ANN Based Behavioral Modeling Approach for GaN HEMT
A new Method for the Analysis of Radiation-induced Effects in 3D VLSI Face-to-Back LUTs
Hybrid AI-Optimization Method for Latent Defect Detection Through Test Transistor Insertion in Analog Circuits
Control-Oriented Optimization of Coil Pair Design in Dynamic WPT Systems for Electrical Vehicles
Accelerating Voltage-Controlled Oscillator Sizing Optimizations with ANN-based Convergence Classifiers and Frequency Guess Predictors
Behavioral Modeling of Analog Neural Networks Inference Circuits
Pseudo Expected Improvement Based-Optimization for CMOS Analog Circuit Design
Stress-based Electromigration Modeling in IC Design: Moving from Theory to Practice
Monte Carlo general sample classification for rare circuit events using Random Forest
Statistical Simulations of Delay Propagation in Large Scale Circuits Using Graph Traversal and Kernel Function Decomposition
Set the Clock: A Synthesizable Clock Manager
14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017, Giardini Naxos, Italy, June 12-15, 2017
Optimization-based bit selection technique to improve the reliability of PUFs
Fault grouping for fault injection based simulation of AMS circuits in the context of functional safety
A Low-Power, Bootstrapped Sample and Hold Circuit with Extended Input Ranged for Analog-to-Digital Converters in CMOS 0.18 μm
On the Exploration of Convolutional Variational Autoencoders for Analog Integrated Circuit Post-Placement Performance Regression
Harvesting RTN for True Random Number Generators and Physical Unclonable Functions
An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit Blocks
Frontend-Backend Integrated Circuit Device Linking Using Machine Learning Algorithms
Thermal Modeling of Silicon Photonic Waveguides
A Fluctuation Model of a Hf02 RRAM Cell for Memory Circuit Designs
Architectural Analysis of a Novel Closed-Loop VCO-Based 1-1 Sturdy MASH Sensor-to-Digital Converter
High-Performance Wideband 0.25 μm GaAs pHEMT 6-Bit Digital Phase Shifter Design for C-Band Phased Array Applications
Distortion contribution analysis of strongly non-linear analog circuits
A Low-Frequency 3-Coil Inductive System for Wirelessly Powering Leadless Pacemakers
Layout Synthesis of Analog Primitive Cells with Variational Autoencoder
A Hardware Efficient Digital DAC Linearization Topology for Delta-Sigma ADCs
Tunable Floating-Point for Embedded Machine Learning Algorithms Implementation
Sensitivity Analysis of Inductive Power Transfer Systems for Electric Vehicles Battery Charging
Design of Ultra Wideband Power Divider/Combiner and Comparison on Results of Measurement and Simulation based on EM Solver Methods
Low power comparator with offset cancellation technique for Flash ADC
Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/°C Temperature Coefficient
Learn from error! ML-based model error estimation for design verification without false-positives
Optimizing power converters with partially saturated inductors by evolutionary algorithms
Designing compact phase shifters with a resistorless quadrature signal generator
Low-Power Encoding for PAM-3 DRAM Bus
1/2CcellV 2 DD? An Energy Model for Compute-in-Memory SRAM Cells
Investigating synchronization phenomena in chaotic ring oscillators coupled through memristive devices
An Improved Model for Metal Oxide-Based Memristors and Application in Memory Crossbars
Advanced Analog Design Optimization: Comparison Between Reinforcement Learning and Heuristic Algorithms
On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects
Error-Free Calculation of Total Referred Noises in Electronic Circuits
Analytical Method for Ultra-Low Power UWB Low-Noise Amplifiers
Characterization of Inter-Chip Interconnects Using Piecewise Effective Capacitance
A Structure-Based Methodology for Analog Layout Generation
Modelling Memristive Devices via Ideal Memristor and Nonlinear Resistors
WDP: A Weighted Delay Prediction Method for Integrated Circuit Interconnects
Importance of IR drops on the modeling of laser-induced transient faults
Controlled-Oscillator Optimization for Highly-Digital CMOS Time-Based Sensor-to-Digital Converter Architectures
A Simulation Tool for Space Applications: RadiSPICE
Long-Term Aging Impacts on Spatial On-Chip Power Density and Temperature
Towards the Implementation of a Strong PUF using Generalized Galois Ring Oscillators
A Multi-level Analog IC Design Flow for Fast Performance Estimation Using Template-based Layout Generators and Structural Models
Power to the Model: Generating Energy-Aware Mixed-Signal Models using Machine Learning
Low Voltage Bandgap Reference using Intelligent Layout Generators in 22 nm FDSOI CMOS
Moving beyond traditional electronic design automation: Data-driven design of analog circuits
Optically Powered Sub-1 dB Noise Figure CMOS LNA for Magnetic Resonance Imaging
Time based architecture for high-side current sensor with integrated shunt resistor
The True Cost of Errors in Emerging Memory Devices: A Worst-Case Analysis of Device Errors in IMC for Safety-Critical Applications
NVSystolic: Heterogeneous Simulation Framework for Emerging Memories with Systolic Array
An Optimization Framework for Mixed-Signal Accelerators Based on F-2T2R Compute Cells
A New Adaptation of Particle Swarm Optimization Applied to Modern FPGA Placement
Frequency spectra of induced transmembrane potential correlate with nanosecond bipolar pulse cancellation of electropermeabilization
An Efficient Framework for Fully Automated Post-layout Simulation-based Optimization
Anisotropic and Tunable Vocal Fold Phantom for Biomechanical Modeling
Long-Term Reliability Management For Multitasking GPGPUs
Statistical characterization and modeling of random telegraph noise effects in 65nm SRAMs cells
Modeling and optimization of Blumlein nanosecond pulse generator for experiments on planar lipid bilayers
Bringing Analog Design Tools to Security: Modeling and Optimization of a Low Area Probing Detector
Expert Design Plan: A Toolbox for Procedural Automation of Analog Integrated Circuit Design
RapidIP - Fast & Universal Synthesis of RF-Circuits
Energy management system for an isolated microgrid with photovoltaic generation
Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries
Towards a Digital Twin of a Time-Dependent Variability Characterization Laboratory
Towards the simulatable specification of a highly customisable SystemC AMS alternator model in its multi-domain environment
Analysis and Simulation of Reset Leakage Currents and Quantization Error in a PFM Digital Pixel
Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications
Will There be Light? - Simulative Prediction of Fluorescence Measurements
Low-Power 9.6-11GHz and 10.8-12GHz VCOs Designed for a 2.5/5GHz TRx using High-Q Inductors Synthesized with ML Techniques
Inversion coefficient optimization assisted analog circuit sizing tool
A learning-based method for performance optimization of timing analysis
Parameter Extraction Method Using Hybrid Artificial Bee Colony Algorithm for an OFET Compact Model
Antenna Modeling Technique for Digital Communication Systems
High-level design of a novel PUF based on RTN
Impact of receiver conversion configuration on the efficiency of Wireless Power Transfer Systems
An ageing-aware digital synthesis approach
Design Strategies to Select the Best Locations in a Ring Oscillator PUF
Sorting Errors Effects on Optimal Combination Algorithms for Digital-to-Analog Converters
Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs
An Energy-Efficient Analog Integrated Neural Network for Cirrhosis Patient Survival Prediction
Design of a Two-Stage Miller-Compensated Operational Amplifier Using an EDA Tool-Centered Approach
SIDe-O: A toolbox for surrogate inductor design and optimization