yusuke1997/dblp-id-title huggingface dataset:
An improved Z-parameter macro model for substrate noise coupling
Charge-based Neuromorphic Cell by InGaZnO Transistor and Implementation of Simple Scheme Spike-Timing-Dependent Plasticity
Highly time-interleaved noise-shaped SAR ADC with reconfigurable order
Autonomous learning of visual concept models
TPARN: A Network for Enhancing Synthetic Video Quality After 3D-HEVC Encoding
A New Variable Step-size Fractional Lower-order Moment Algorithm for Non-Gaussian Interference Environments
Live Demonstration: A 0.8V, 1.54 pJ / 940 MHz Dual Mode Logic-Based 16x16-Bit Booth Multiplier in 16-nm FinFET
A sequential weighted least squares procedure for design of IIR filters and two-channel IIR filter banks
Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks
Wireless capsule technology: Remotely powered improved high-sensitive barometric endoradiosonde
Event-Trigger Strategy Design and Its Comparative Study for Dynamic State Estimation in Power Systems
Novel fast motion estimation for frame rate/structure conversion
A cost-effective 2-D discrete cosine transform processor with reconfigurable datapath
Input balanced state-space realization based adaptive recursive filters
Probabilistic approach to K-nearest neighbor video retrieval
A sparsified vector potential equivalent circuit model for massively coupled interconnects
Digitally controlled low cross-regulation single-inductor dual-output (SIDO) buck converter
Integrated Stretch Processed S-Band Digital Radar System
Scalable and small-sized power analyzer design with signal-averaging noise reduction for low-power IoT devices
Custom purpose regular expression processor architecture for network processing
Bifurcations in modified BVP neurons connected by inhibitory and electrical coupling
Low-power register-exchange Viterbi decoder for high-speed wireless communications
Privacy leakages in approximate adders
BW extension in shunt feedback transimpedance amplifiers using negative miller capacitance
Live Demonstration: Unsupervised Character Recognition with a FPGA Neuromorphic System
Hardware-Software Co-Design for Efficient and Scalable Real-Time Emulation of SNNs on the Edge
Live Demonstration: A Wearable Cardiopulmonary Healthcare System for Real-term Monitoring of Multi-modal Physiological Signals
Learning-Based Conditional Image Compression
A calibration method for current steering digital to analog converters in continuous time multi-bit sigma delta modulators
A Sub-1V, 220 μW Receiver Frontend for Wearable Wireless Sensor Network Applications
A novel low phase noise 1.8V 900MHz CMOS voltage controlled ring oscillator
Circuit design advances to enable ubiquitous sensing environments
A 6 channel array of 5 milliwatt, 500 MHz optical receivers in .5 μm SOS CMOS
Multiple Transform Selection Hardware Design for 4K@60fps Real-Time Versatile Video Coding
Semi-Supervised Learning Based on Tri-Training for Gastritis Classification using Gastric X-ray Images
A low complexity hardware architecture for motion estimation
Low-Power Real-Time Sequential Processing with Spiking Neural Networks
Modeling of Frequency-dependent Hysteresis with SPICE
Design Methodology in Wireless Power Transfer System for 3-D Stacked Multiple Receivers
A low-power, programmable bandpass filter section for higher-order filter-bank applications
Generation of linearly independent transforms over GF(4)
A Threshold-Voltage Compensation Circuit for Organic Thin-Film Transistor Active-Matrix Neurostimulation System
On Problems of Compensated Continuous-Time Chebyshev Filters in the Time Domain
High-Performance Systolic Array Montgomery Multiplier for SIKE
A 1FeFET-1T-1C based Compute-in-Memory Macro with Capacitor Reused Pipeline SAR ADC
Hardware synchronization for embedded multi-core processors
A unified approach to the steady-state analysis of quantized adaptive filtering algorithms
Hard Limit Induced Oscillations
A Case Study of Design Optimization through Variable Width Selection
Nonlinear vibration energy harvesting at work: An application for the automotive sector
Analog VLSI design of supervised-learnable neural cell using switched-current technique
Low-Power Digitally Controlled CMOS Source Follower Variable Attenuator
Time domain probe insertion to find steady state of strongly nonlinear high-Q oscillators
Influence of Junction Capacitance of Switching Devices on Class E Rectifier
Part 2 - 101 Ways to Make a Circuit Fail
Parallel current-steering D/A Converters for Flexibility and Smartness
A Partitioning-based Method to Determine the Uniqueness of the DC Operating Points of Transistor Circuits
TRUE-BSG: A True Random Bit-Stream Generator for Fast and Efficient Stochastic Computing
Cascading Failure Analysis of Cyber-Coupled Power System Considering Virus Propagation
A Digital Compute-in-Memory Macro Featuring Two's Complement Multiplication for LSTM-based Biomedical Signal Classification
An efficient approach for designing nearly perfect-reconstruction low-delay cosine-modulated filter banks
An efficient technique for error-free algebraic-integer encoding for high performance implementation of the DCT and IDCT
Noise generation, coupling, isolation, and EM radiation in high-speed package and PCB
A double-carrier wireless power and data telemetry for implantable biomedical systems
Design of variable bandedge FIR filters with extremely large bandedge variation range
Nonlinear dynamics of gear-shifting digital phase-locked loops
Multi-band inductor-less VCO for IoT applications
Impact of network sparsity on strategic placement of phasor measurement units with fixed channel capacity
An Efficient Rectifier Hybridizing Synchronized Electric Charge Extraction and Bias-Flipping for Triboelectric Energy Harvesting
Adaptive perceptual preprocessing for video coding
Lossless multi channel predictive coding for images
An Event-Based Digital Compute-In-Memory Accelerator with Flexible Operand Resolution and Layer-Wise Weight/Output Stationarity
An auxiliary switched-capacitor power converter (SCPC) applied in stacked digital architecture for energy utilization enhancement
A Low-Power and Low-Complexity DCT/IDCT VLSI Architecture Based On Backward Chebyshev Recursion
IC Age Estimation Methodology Using IO Pad Protection Diodes for Prevention of Recycled ICs
An improved SAR controller for DLL applications
Block-matching optical flow for dynamic vision sensors: Algorithm and FPGA implementation
Automatic rapid programming of large arrays of floating-gate elements
A top-down optimization methodology for SC filter circuit design
High Time-Resolution PWM generator for GaN Converters
An analysis of the Internet traffic by the method of surrogate data
Interlaced 6T-10T CMOS in-memory computing circuit for low silicon area pipelined DNNs
Inductive Sensing: A Phase Detector IC for Button Replacement in Mobile Devices
A novel iterative design technique for linear-phase FIR half-band filters
Artificial Intelligence for Wearable Devices : With the Case Study of the Control Interface for a Myoelectric Hand Prosthesis
A model-first design and verification flow for analog-digital convergence systems: A high-speed receiver example in digital TVs
A High-Speed Codec Architecture for Lagrange Coded Computing
Audio onset detection using energy-based and pitch-based processing
Adaptive bilinear filtering
A 2.4 GHz CMOS image-reject low noise amplifier
Frame-level quantization control for perceptual quality constrained H.264/AVC video coding
Adaptive Photoreceptor with Wide Dynamic Range
Using a spectral technique, genetic algorithms and decision diagrams for finding unconditional table tests
Security Threats in Channel Access Mechanism of Wireless NoC and Efficient Countermeasures
A global approach to the variable ordering problem in PSBDDs
On-die Differential Sensing for Monitoring and Analysis of Dynamic Computing Environments
Live demonstration: Spatial-temporal color video reproduction from noisy CFA sequence track: Digital signal processing
A novel compression framework for 3D time-varying meshes
Multi-Scale Dynamic Fixed-Point Quantization and Training for Deep Neural Networks
VHDL-AMS modeling of self-organizing neural systems
On Rectilinear Distance-Preserving Trees
Extraction of timing jitter from phase noise
A Wideband Sliding Correlator-Based Channel Sounder with Synchronization in 65 nm CMOS
Multiplier-free structures for IIR half-band filter by multiple use of short subfilter
Some fingerprints of ideal memristors
A widely tunable Gm-C filter using tail current offset in two differential pairs
A necessary condition for the realization of a resistive n-port based on network size and on the concept of weighted terminal valency
Synchronization of the Kuramoto model with multi-scale-free property
A Low-Power Radiation Detection System for Portable, Long-Duration Monitoring
Live Demonstration: Event-Driven Physical Unclonable Function for Proactive Monitoring System by Dynamic Vision Sensor
Distributed Video Coding with Spatial Correlation Exploited Only at the Decoder
A hardware based low temperature solution for VLSI testing using decompressor side masking
Reduced-order realization of Fornasini-Marchesini model for 2D systems
Determinant-Based Hurwitz Test For Complex Matrices Over The Complex Unit Circumference And Applications in 2D Systems
Ultra-Low Leakage, High Fan-Out Neuro Connection Map with TCAM-Based LUT, Localized Priority Encoder and Decoder-Less SRAM
A decoding algorithm with reduced complexity for non-binary LDPC codes over large fields
A Neuromorphic Controller with On-Chip Learning for Robot Motion Control
A spike-based analogue circuit that emphasises in auditory stimuli
Towards a three-phase time-multiplexed planar power transmission to distributed implants
Sparse kernel cepstral coefficients (SKCC): Inner-product based features for noise-robust speech recognition
On Parallel Symbolic Analysis of Large Networks and Systems
A novel CMOS double-edge triggered flip-flop for low-power applications
Generation of gray code ordered Walsh functions by symmetric and shift copies
Speech enhancement based on L1 regularization in the cepstral domain
Set-membership adaptive algorithms based on time-varying error bounds for DS-CDMA systems
Is home network application acceptable or not?
A Bio-impedance Measurement System for Portable Monitoring of Heart Rate and Pulse Wave Velocity using Small Body Area
VCO-ADC Linearization by Switched Capacitor Frequency-to-Current Conversion
Self-sampled vernier delay line for built-in clock jitter measurement
Estimation of parameter fluctuations for robust operation in analogue circuits and systems
A very low-power CMOS parallel A/D converter for embedded applications
An adaptive neurofuzzy network for identification of the complicated nonlinear system
Bio-inspired pH sensing using ion sensitive field effect transistors
Progresses and challenges of spin orbit torque driven magnetization switching and application (Invited)
A Low Power 4-bit Interleaved Burst Sampling ADC for Sub-GHz Impulse UWB Radio
Accelerating leveled fully homomorphic encryption using GPU
A 27GHz-to-33GHz Variable-Gain Amplifier with Precise 0.5dB Step Size in 40nm-CMOS for 5G and Ka-Band Satellite Applications
Nonlinear analysis of a Colpitts injection-locked frequency divider
Gabor expansion for stereophonic acoustic echo cancellation
SpikingSIM: A Bio-Inspired Spiking Simulator
Genlocked digital overlay on a video signal
Current-Mode Feedback Amplifier Employing a Transistorized Feedback Network
A Feedback Self-adaptive Body Biasing-based RF-DC Rectifier for Highly-sensitive RF Energy Harvesting
Shape-based sequential machine analysis
Design and simulation of Fractional-N PLL frequency synthesizers
A Graph-Based Accelerator of Retinex Model with Bit-Serial Computing for Image Processing
A 48 μW, 8.88 × 10-3 W/W batteryless energy harvesting BCC identification system
A novel scalable and reconfigurable emulation platform for embedded systems verification
Principal component filter banks: existence issues, and application to modulated filter banks
Filter families with minimum impulse response moments
Advanced colluder detection techniques for OSIFT-based hiding codes
Dynamically Swappable Hardware Design in Partially Reconfigurable Systems
A low noise, Fast Pixel Readout IC working in single photon counting mode with energy window selection in 90 nm CMOS
High Efficiency Fully Integrated On-Chip Regulator for Wide-Range Output Current
HfO2-based memristors for neuromorphic applications
Feedback-directed memory disambiguation for embedded multimedia VLIW computing
Power constrained test scheduling using power profile manipulation
A fast sub-pixel motion estimation algorithm for HEVC
Image compression with structure-aware inpainting
Improved margin multi-class classification using dendritic neurons with morphological learning
A class of space-time code for blind detection
All-pass based robust low complexity structures for implementing recursive digital filters
A 5-10GHz low power bang-bang all digital PLL based on programmable digital loop filter
A wirelessly-powered electro-acupuncture based on Adaptive Pulse Width Mono-Phase stimulation
Two-port low-power gain-cell storage array: Voltage scaling and retention time
Taking advantage of correlation in stochastic computing
Generalized Delay Optimization of Resistive Interconnections through an Extension of Logical Effort
NetVP: A system-level NETwork Virtual Platform for network accelerator development
Power-aware space-time-trellis-coded MIMO detector with SNR estimation and state-purging
Bulk-driven Flipped Voltage Follower
Image enhancement for fringe projection profilometry
IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016
A ladder network delay model for coupled interconnects
Phase noise spectra analysis for LC oscillators
A Resource-Efficient, Robust QRS Detector Using Data Compression and Time-Sharing Architecture
A 140-dB Dynamic Range Digital PPG Front-end IC with An Integrated MoSe2 Photodiode for Wearable Non-invasive Pulse Oximetry
Detecting Symmetric Variables in Boolean Functions using Generalized Reel-Muller Forms
On the construction of efficient data gathering tree in wireless sensor networks
Motion trajectory based video authentication
A Phase-Encoded Voice Features Extraction Circuit Using Digital Mixers and Analog Filters based on Ring Oscillators
Scaling Effects of Transistor Leakage Current and IR Drop on 1T1R Memory Arrays
Simplified Digital Calibration for Multi-stage Analog-to-digital Converters
Accurate programming of analog floating-gate arrays
A Neural Signal Detection Amplifier with Low-frequency Noise Suppression
A proposal of a new blind equalizer using output signals of decision device
Performance analysis of 3D-IC for multi-core processors in sub-65nm CMOS technologies
Macroblock-level Reduced Resolution Video Coding Allowing Adaptive DCT Coefficients Selection
A 0.9-V 67-µW analog front-end using adaptive-SNR technique for digital hearing aid
Palmprint recognition using deep scattering network
Utilization of Noise-Shaping in Mixed-Signal Timing-Skew Mismatch Calibration of TI-ADCs
Ripple-based prediction of fast-scale instabilities in current mode controlled switching converters
High speed digital CMOS divide-by-N fequency divider
A generalized fast motion estimation algorithm using external and internal stop search techniques for H.264 video coding standard
A wideband LC-VCO with enhanced PSRR for SOC applications
A technique for reduction of uncertain FIR filters
Wavelet denoising of chirp-like signals in the Fourier domain
Exploring an Efficient Approach for Architecture-Level Thermal Simulation of Multi-core CPUs
A 3.5 ppm/°C Novel Curvature-Compensated Bandgap Reference Using Four-Input Current Feedback Amplifier with 3σ Inaccuracy of ±0.05%
On the Linearization of MOSFET Capacitors
Optimization design of the Dickson charge pump circuit with a resistive load
Acquisition of High Bandwidth Signals by Sampling an Analog Chromatic Derivatives Filterbank
The Impact of VLSI Fabrication on Neural Learning
1.2V low-power four-quadrant CMOS transconductance multiplier operating in saturation region
Incremental Sturdy-MASH Sigma-Delta Modulator with Reduced Sensitivity to DAC Mismatch
A highly linear, Sigma-Delta based, sub-Hz high-pass filtered ExG readout system
An Ultra-Low Power Wearable Sensing System with a Highly Sensitive Three-Dimensional LIG Sensor and Energy-Efficient Time Domain Readout
A new timing recovery architecture for fast convergence
A 23-29 GHz 3-stack Power Amplifier in 22nm FD-SOI CMOS Technology
Selective enhancement of space-time broadband spiral-waves using 2D IIR digital filters
A 5 GHz direct-conversion receiver with DC offset correction
A comparison of totally digital ADCs for SOCs
An Alignment-Based Hardware Accelerator for Rapid Prediction of RNA Secondary Structures
New Sensing Systems for Securing Virtual Walls at Outdoor Based on True Differential Digital TMOS
Physically Inspired Circuit Model for Systematic Analysis of Resonant Ion Sensor
Replicating experimental spike and rate based neural learning in CMOS
Fair QoS resource management and non-linear prediction of 3D rendering applications
Jittered uniform sampling - examples
A high IIP3 X-band BiCMOS mixer for radar applications
Deferred lighting: a computation-efficient approach for real-time 3-D graphics
Some standard SPICE dc algorithms revisited: why does SPICE still not converge?
A VLSI architecture for a high-speed computation of the 1D discrete wavelet transform
A Current Efficient 10mA Analog-Assisted Digital Low Dropout Regulator with Dynamic Clock Frequency in 65nm CMOS
VLSI Implementation of a 4×4 MIMO-OFDM transceiver with an 80-MHz Channel Bandwidth
Partially-occluded face recognition using weighted module linear regression classification
A comparison of two similarity measures in intensity-based ultrasound image registration
A wireless system for combined heart optogenetics and electrocardiography recording
An SDR-Based Monostatic Wi-Fi System with Analog Self-Interference Cancellation for Sensing
A New Retiming Algorithm for Circuit Design
Undersampling RF-to-digital CT ΣΔ modulator with tunable notch frequency and simplified raised-cosine FIR feedback DAC
Adaptive Real-Time Loop Closure Detection Based on Image Feature Concatenation
Low-voltage, low-power CMOS operation transconductance amplifier with rail-to-rail differential input range
HRHuman: Tuning-Free Higher-Resolution Human Image Generation via Template Knowledge
Independent Parallel Signal Processing Using Programmable Metasurfaces
Analytical Foundations of Current-feedback Amplifiers
A wide bandwidth fractional-N synthesizer for LTE with phase noise cancellation using a hybrid-ΔΣ-DAC and charge re-timing
Partial sums computation in polar codes decoding
Vector-array decomposition-based design of variable digital filters
Live Demonstration: Front and Back Illuminated Dynamic and Active Pixel Vision Sensors Comparison
CMOS Transceivers at 60 GHz and Beyond1
Block matching based real-time optical flow hardware implementation
Ensemble Dependent Matrix Methodology for Probabilistic-Based Fault-tolerant Nanoscale Circuit Design
Electrical Architecture and In-Vehicle Networking: Challenges and Future Trends
A high frequency resolution digitally controlled oscillator with differential tapped inductor
Projective noise reduction with dynamic neighborhood selection
Reducing power, area, and delay of threshold logic gates considering non-integer weights
Design of Complex IIR Digital Filters using Transformed Variables
Statistics and Dependency Analysis of the Uniform Discrete Curvelet Coefficients and Hidden Markov Tree Modeling
Joint optimization of data hiding and video compression
A microstimulator with parameter adjustment for bladder dysfunction
All-Digital High-Resolution Frequency Measurement SoC for Rapid MEMS Readouts
A VLSI Implementation of Angular-Domain Massive MIMO Detection
Analog circuit synthesis by superimposing of sub-circuits
A 2.45-GHz RF Energy Harvester with On-Chip 8-VCR SC Booster for IoT Devices
A portable impedance-based electrochemical measurement device
Fast low-power characterization of arithmetic units in DSM CMOS
Microactuation of suspended MEMS beams
Automatic synthesis of CMOS RF front-ends
An integrated audio and active noise control system
RSA encryption algorithm based on torus automorphisms
A pipeline architecture of quadratic adaptive Volterra filters based on NLMS algorithm
Convergence analysis of a background interstage gain calibration technique for pipelined ADCs
Error spectrum shaping approach for lattice filter roundoff noise reduction
A 3.12pJ°C2 Ultra-Low-Power Direct-ADC Multi-Range Temperature Sensor for IoT Nodes
Output spectrum analysis of buck converters in DCM with PFM control
An Enhanced Start-up Circuit Eliminating All Trojan States in Self-biased Reference Generators
A PEEC approach for circular spiral inductive components modeling
Switching activity reducing layered decoding algorithm for LDPC codes
Test vector generation and classification using FSM traversals
TV-based multi-scale super resolution using intra- and inter-scale correlations
Parameter estimation from nonlinear frequency response of MEMS resonators
Highly Linear Four Quadrant Analog BiCMOS Multiplier for ± 1.5 V Supply Operation
A Highly Configurable and Extensible Spiral Capacitor Design for High Density or High Precision Applications
Single Miller capacitor compensated multistage amplifiers for large capacitive load applications
A modified particle swarm optimization algorithm for adaptive filtering
Modeling of the Power-supply Interactions of CMOS Operational Amplifiers Using Symbolic Computation
Occluded object tracking based on trajectory links in surveillance videos
Optimal coil size ratios for wireless power transfer applications
Analog Implementation of Class-IV Partial-Response Viterbi Detector
An Energy-Efficient, Scalable Neural Stimulation IC with Adaptive Dynamic Voltage Switching for Cochlear Implant System
Voltage Flip Efficiency Optimization of SSHC Rectifiers for Piezoelectric Energy Harvesting
MOSFET-C sinusoidal oscillator with variable frequency and amplitude
A 700Mbit/s CMOS capacitive feedback front-end amplifier with automatic gain control for broadband optical wireless links
HWSim: Hardware Similarity Learning for Intellectual Property Piracy Detection
A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Multiply and Accumulate Operation by Employing Charge Sharing
A BJT-Based Fully Integrated 16-bit ZOOM Temperature Sensor with an Inaccuracy of 0.28°C (3σ) from -40°C to 125°C using improved 1-point Calibration
Efficient approximate layered LDPC decoder
Digital post-linearization of a Wideband Low Noise Amplifier for ultra-wideband wireless receivers
A low-voltage compatible two-stage amplifier with ≥120 dB gain in standard digital CMOS
A 2 GHz VCO with process and temperature compensation
Modeling dynamic stability of SRAMS in the presence of single event upsets (SEUs)
An SSHI Rectifier with Energy-Investing Technique for Piezoelectric Energy Harvesting
An adaptive body-bias low voltage low power LC VCO
A hardware CABAC encoder for HEVC
DIRAC: Dynamic-IRregulAr Clustering Algorithm with Incremental Learning for RF-Based Trust Augmentation in IoT Device Authentication
Temperature-driven power and timing analysis for CMOS ULSI circuits
On-line Lossless Mocap Data Compression
Self-quenching, Forward-bias-reset for Single Photon Avalanche Detectors in 1.8V, 0.18µm process
3.1-to-7GHz UWB impulse radio transceiver front-end based on statistical correlation technique
Microphone array based speech spectral amplitude estimators with phase estimation
SOS current mirror matching at 4K: A brief study
Direct memory access frequency synthesizer for channel efficiency improvement in frequency hopping communication
Continuous-time sigma-delta modulator with an arbitrary feedback waveform
A Reconfigurable 13.56MHz Wireless Powered CMOS Integrated Nerve Stimulator
Image Processing Applied to Eye Segmentation in Cheese Maturation
Physical vs. surrogate models of passive RF devices
Switching Phase States of Chaotic Circuits Coupled by Time-Varying Resistor
Accelerating Depthwise Convolution and Pooling Operations on z-First Storage CNN Architectures