yusuke1997/dblp-id-title huggingface dataset:
Radio-Frequency Power Amplifier Based on CVD Graphene Field-Effect Transistor
A physically-derived large-signal nonquasi-static MOSFET model for computer aided device and circuit simulation PART-I MOSFETs and CMOS inverters
Design of code-matched receiver for DS/CDMA communications
On the calibration of a SPAD-based 3D imager with in-pixel TDC using a time-gated technique
A simplified frequency synthesizer architecture thanks to interference cancellation
Multilayer Probabilistic Knowledge Transfer for Learning Image Representations
Nonlinear signal processor design: a building block approach
Explicit Neural Network-Based Modeling of Time-Varying Circuits with a Single BJT in the Wave Digital Domain
Texture-Shape Optimized GAT for 3D Face Reconstruction
Shot classification for hard transition
An Energy-Efficient 11-bit 10-MS/s SAR ADC with Monotonie Switching Split Capacitor Array
A fully-integrated switched capacitor voltage regulator for near-threshold applications
Architecture design of stereo matching using belief propagation
A 1.5V multirate multibit sigma delta modulator for GSM/WCDMA in a 90 nm digital CMOS process
Bootstrap based Adaptation of Sample Myriad to Characteristics of SalphaS Distribution Data
A novel approach to the exact design of first- and second-order Bode-type variable-amplitude bilinear-LDI switched-capacitor equalizers
Design of a spurious-free VCO-ADC for Audio
A 4.2-4.7GHz, 3.7mW digitally controlled oscillator RFIC
An Efficient FPGA-based Accelerator for Deep Forest
An Analogue Current-Mode Signal Processing ASIC for Interrogating Resistive Sensor Arrays
Blind signal separation into groups of dependent signals using joint block diagonalization
Power Efficient Echo-Cancellation Based Hybrid for Full-Duplex Chip-to-Chip Interconnects
Multiport Memory Based Data Path Allocation Focusing on Interconnection Optimization
Design of a novel three-level voltage source converter for AC-DC-AC conversion
A group-blind multiuser receiver for MC-CDMA systems
Reliability of Capacitive Read in Arrays of Ferroelectric Capacitors
An efficient interleaved tree-structured almost-perfect reconstruction filterbank
Sensor compensation using analogue-digital adaptive circuits
A 1300 × 800, 700 mW, 30 fps spectral polarization imager
An ultra-low-power monitoring system for inductively coupled biomedical implants
Design of process variation tolerant radio frequency low noise amplifier
Time-based sensor interface circuits in carbon nanotube technology
A 0.9-V 0.2-μW CMOS single-opamp-based switched-opamp ΣΔ modulator for pacemaker applications
A novel Fisher discriminant for biometrics recognition: 2DPCA plus 2DFLD
A real-time vision-interactive guiding system
Multivariable DG impedance modeling for the microgrid stability assessment
Python facilitates the rapid prototyping and hw/sw verification of processor centric SoCs for FPGAs
Predicting a Critical Transition from Time-series Datasets Generated by LTspice Using a Parameter Space Estimation
A Digital Pre-Distortion Technique for High-Linearity, Low-Power, Compact, Phase Interpolators
On input-to-state stability notions for reachability analysis of power systems
A Novel High Speed Current Mirror Compensation Technique and Application
Design and Implementation of a Low-power Intensity Pulsed-Ultrasound Generator for Dental Tissue Regeneration
Derivation of Modular Multiple-Input Multiple-Output Converters with Flexible Output Forms and Simple Control
Minimal Training Set Size Estimation for Neural Network-Based Function Approximation
An FPGA-based Ultra-High Performance and Scalable Optical Flow Hardware Accelerator for Autonomous Driving
A 4-channel 12.5Gb/s Common-Gate Transimpedance Amplifier Array for DVI/HDMI Applications
A 10-bit 8.3MS/s switched-current successive approximation ADC for column-parallel imagers
Novel Sparse OBC based Distributed Arithmetic Architecture for Matrix Transforms
POFGEN: A design automation system for VLSI digital filters with invariant transfer function
An Interdisciplinary Project-Based Learning Approach for Engineering and CS+[X] Students through AI-Enabled Biomedical Imaging System
Beyond the microscope: embedded detectors for cell biology applications
Digital filter realizations absent of self-sustained oscillations
Time-interleaved switched-capacitor filter for reconfigurable triple-band delta-sigma converter
Battery States Co-estimation Methodology Using Dual Square Root Unscented Kalman Filter
Storage Allocation Strategies for Data Path Synthesis of ACICs
DPA-resistant QDI dual-rail AES S-Box based on power-balanced weak-conditioned half-buffer
A review of video registration methods for watermark detection in digital cinema applications
Averaged-circuit modeling of line-commutated rectifiers for transient simulation programs
A miniaturized low power biomedical sensor node for clinical research and long term monitoring of cardiovascular signals
Steady state reliability of maximum power point tracking algorithms used with a thermoelectric generator
A 0.8V 8b-ENOB 80kS/s-20MS/s Passive Noise-Shaping SAR ADC For Ultra Low-Power Receivers
Programmable floating-gate techniques for CMOS inverters
An Input Power-Aware Efficiency Tracking Technique for Energy Harvesters in IoT
The state space framework for blind dynamic signal extraction and recovery
EEPROM programming study-time and degradation aspects
An integrated coil driver with discrete control and power efficient ASK modulation for transcutaneous power transmission
Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles
Empirical study on the efficiency of Spiking Neural Networks with axonal delays, and algorithm-hardware benchmarking
Delta-sigma modulator topologies with high immunity to pattern noise
An ultra-low power analogue directionality system for digital hearing aids
Analog implementation of MOS-translinear Morlet Wavelets
A Resource-Optimized Patient-Specific Nonlinear-SVM Hypertension Detection Algorithm for Minimally-Invasive High Blood Pressure Control
Live Demonstration: Body-Bias Based Performance Monitoring and Compensation for a Near-Threshold Multi-Core Cluster in 28nm FD-SOI Technology
Optimization-Inspired Deep Network for Image Restoration from Partial Random Samples
A Portable Low-Power Platform for Ambulatory Closed Loop Control of Blood Glucose in Type 1 Diabetes
Modeling, design and characterization of a new low jitter analog dual tuning LC-VCO PLL architecture
Power efficiency in communication systems from a circuit perspective
Analytic modeling of static noise margin considering DIBL and body bias effects
Synchronization in arrays of coupled nonlinear systems: passivity circle criterion and observer design
An improved pH mapping bandage with thread-based sensors for chronic wound monitoring
Suppression of Spurious Responses for a Class of Neural Networks with Application to Telecommunications Problems
A 10-bit 2GHz Current-Steering CMOS D/A Converter
A clock network of distributed ADPLLs using an asymmetric comparison strategy
Dual clock rate block data parallel architecture
Design of optimal hybrid form FIR filter
Impact of chaotic self-similar and Poisson traffics on WLAN token passing protocols
Smart bio-laboratories of the future
Realization of a 10 GHz PLL in IBM 130 nm SiGe BiCMOS process for optical transmitter
A BICMOS PDF notch circuit for FM-DCSK communication over selective channels
A low-noise fully-differential open-loop interface for high-G capacitive micro-accelerometers with 112.2 dB dynamic range
Epipolar Geometry on Drones Cameras for Swarm Robotics Applications
Neural Networks for Quaternion-valued Function Approximation
Low-sensitivity active-RC high- and band-pass second-order Sallen & Key allpole filters
High Efficient Architecture for 3D-HEVC DMM-1 Decoder Targeting 1080p Videos
An Energy-Efficient High-Frequency Neuro-Stimulator with Parallel Pulse Generators, Staggered Output and Extended Average Current Range
A wide-field direction-selective aVLSI spiking neuron
A low-power adjustable bandwidth biomedical signals acquisition SoC for continuous health monitoring system
A Novel Parallel Convolution-Self-Attention Neural Network Based Calibration Scheme for Pipelined and Pipelined-SAR ADCs
A mixed-mode IF GFSK demodulator for Bluetooth
A 12TOPS/W Computing-in-Memory Accelerator for Convolutional Neural Networks
Relationship between Consecutive Frames in Generalized Harmonics Analysis for Predictive Coding
A 343nW biomedical signal acquisition system powered by energy efficient (62.8%) power aware RF energy harvesting circuit
Data encryption algorithms using one-dimensional chaotic maps
Area-Power Efficient Lifting-Based DWT Hardware for Implantable Neuroprosthetics
A switched-capacitor Programmable Gain Amplifier optimized for motor control application using correlated double sampling technique
Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier
Chaotic and periodic spreading dynamics in discrete small-world networks
2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015
Bidirectional DC/DC power conversion using constant-frequency quasi-resonant topology
A biomimetic nanoelectronic neuron with enhanced spike timing
Versatile Emulation of Spiking Neural Networks on an Accelerated Neuromorphic Substrate
State estimation for a model of gene expression
A new 5 GHz CMOS dual-modulus prescaler
Live Demonstration: Automated Design of Analog and Mixed-Signal Circuits Using Neural Networks
Differential and geometric properties of Rayleigh quotients with applications
A new bus assignment in a designed shared bus switch fabric
A zero-skipping multi-symbol CAVLC decoder for MPEG-4 AVC/H.264
Content based photograph slide show with incidental music
Leakage current and bottom gate voltage considerations in developing maximum performance 16nm N-channel carbon nanotube transistors
A pplications of 3D LCR networks in the design of 3D recursive filters
Area(number)-balanced hierarchy of staircase channels with minimum crossing nets
Full system simulation with QEMU: An approach to multi-view 3D GPU design
Analysis and Design of a 60 GHz Fully-Differential Frequency Doubler in 130 nm SiGe BiCMOS
The algebra of system design: A Petri net model of modular composition
An Active-Pixel Readout Circuit Technique towards all LTPS-TFT-on-foil Large-Area Imagers with Inherent Nonlinearity Compensation
An efficient algorithm for the optimization of FIR filters synthesized using the multistage frequency-response masking approach
How to reach 100% coding efficiency in multilevel burst-mode RF transmitters
Robust analog neural network based on continuous valued number system
A Binaural Sound Localization System using Deep Convolutional Neural Networks
Generating solitons in lattices of nonlinear circuits
LUOPAN: Light utility-oriented placement of actuator nodes in sensor/actuator networks
Training Progressively Binarizing Deep Networks using FPGAs
GVD and PMD Compensation Using a Linear Adjustable Filter Prototype in a 40 Gb/s OSSB System
Automatic distributed asynchronous control circuit generation from data flow graph for asynchronous high-level synthesis
Low-Power Circuits for Brain-Machine Interfaces
A Synthesis of Switched-Cpacitor Higher-Order Immittance Simulation Circuits
FILA: Fault-Model for Interconnection Links in Application-Specific Network-on-Chip Design
Characterization of a current-mode bandgap circuit structure for high-precision reference applications
Fast-polarization-hopping transmit-diversity to mitigate prolonged deep fades
Design trade-off in merged DRAM logic for video signal processing
Current mode 1.2-Gbps SLVS transceiver for readout front-end ASIC
A Triple-Point Model for Circuit-Level Reliability Analysis
A 3T or 4T pixel compatible DR extension technique suitable for 3D-IC imagers: A 800×512 and 5μm pixel pitch 2D demonstrator
Multiple fish tracking via Viterbi data association for low-frame-rate underwater camera systems
A programmable 25 MHz to 6 GHz rational-K/L frequency synthesizer with digital Kvco compensation
A 20 mV Colpitts Oscillator powered by a thermoelectric generator
Cl - and H + sensing devices for water quality monitoring system
A Compact Low-Power Bidirectional Two-Wire Interface for Digital Neural Probes
A spatial inter-view auto-regressive super-resolution scheme for multi-view image via scene matching algorithm
Dual modulation technique for high efficiency in high switching buck converters over a wide load range
BGNN-HT: Bidirectional Graph Neural Network for Hardware Trojan Cells Detection at Gate Level
A pulsed resonance clocking for energy recovery
Continuous-time, frequency translating, bandpass delta-sigma modulator
A bidirectional neural interface with a HV stimulator and a LV neural amplifier
Design Considerations of Monolithically Integrated Voltage Regulators for Multicore Processors
Digitally-switched resonators for bandpass integrated transmission line ΣΔ modulators
A phase-detect synchronous mirror delay for clock skew-compensation circuits
Automated transistor sizing algorithm for minimizing spurious switching activities in CMOS circuits
Non-uniform subband adaptive filtering with critical sampling
A Reference Double-Sampling PLL-Based Eight Phase Clock Generator Achieving 0.18mW/GHz/phase and -251.9dB FOMJitter-N
On the prediction of period-doubling bifurcations in almost reciprocal cellular neural networks
Signal amplification, detection and transmission in a wireless 100-electrode neural recording system
Design of high-speed clock recovery circuit for burst-mode applications
Despeckling of synthetic aperture radar images in the contourlet domain using the alpha-stable distribution
A 1.5V class A 5 th order log domain filter in SiGe technology
An Efficient Least-Squares Approach for the Design of Two-Dimensional Linear-Phase Nonrecursive Filters
A 2-GHz Direct Digital Frequency Synthesizer Based on LUT and Rotation
Jointly optimal error feedforward, high-order error feedback and realization for roundoff noise minimization in IIR digital filters
Photonic allpass filter: A versatile building block for all-optical signal processing
A novel dimensional analysis method for TSV modeling and analysis in three dimensional integrated circuits
Single input current-sensing differential logic (SCSDL)
A critical look at design guidelines for SOI logic gates
A CMOS self-mixing-free front-end for direct conversion applications
Low power digital design in FPGAs: a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption
A two-pass optimal motion-threading technique for 3D wavelet video coding
Multi-level memory systems using error control codes
A cellular nonlinear approach to decentralized locomotion control of the stick insect
An efficient algorithm for transient and distortion analysis of mildly nonlinear analog circuits
Resonant tunnelling diode based QMOS edge triggered flip-flop design
An emergent EV dispatching method to enhance the resilience of power-transportation coupling systems
A Point Matching Strategy of 3D Loss Function for Single RGB Images Deep Mesh Reconstruction
A novel technique for I/Q imbalance and CFO compensation in OFDM systems
A virtual stereo approach to stereophonic acoustic echo cancellation
A digital CMOS DNA chip
Stable high-order delta-sigma DACS
A Step-Down ZVS Power Converter with Self-Driven Synchronous Rectifier
Linearization Angle Widened Predistortion for Hybrid Beamforming Array Utilizing Iterative Post-Weighting
Power systems as dynamic networks
Fast and Accurate Analysis of Power Distribution Network Impedance for DRAM Design
Roles of betweenness in controlling catastrophic cascading failures on scale-free networks
Reducing pin count on cross-referencing Digital Microfluidic Biochip
A Point-of-Care Device for Sensitive Protein Quantification
Demonstration of a remote FPAA system for research and education
A new method for the design of two-channel perfect-reconstruction linear-phase FIR filter banks
A CMOS architecture allowing parallel DNA comparison for on-chip assembly
A Low Power Phase-Change Random Access Memory using a Data-Comparison Write Scheme
A statistical background calibration technique for flash analog-to-digital converters
Relaxation Digital-to-Analog Converter with Radix-based Digital Correction
Impact of fixed pattern noise on embedded image compression techniques
Audio-Visual Cross-Modal Generation with Multimodal Variational Generative Model
An optimal windowed recursive least squares algorithm for fading channel estimation
Adaptive filtering using constrained subband updates
Noise-constrained interconnect optimization for nanometer technologies
Trajectory approximation near the stability boundary
A FoM of -191 dB, 4.4-GHz LC-VCO Integrating an 8-Shaped Inductor with an Orthogonal-Coupled Tail-Filtering Inductor
Multiplierless MLP Using Successive Vector Approximation in Post-Training Quantization
Low-voltage CMOS analog bootstrapped switch for sample-and-hold circuit: design and chip characterization
A 28GHz 2-by-2 MIMO Transceiver Employing Transformer Gain Equalization Technique
A cryogenic single electron transistor readout circuit: Practical issues and measurement considerations
Stabilizing linear time-invariant systems with finite-state hybrid static output feedback
Low voltage mixer biasing using monolithic integrated transformer dc-coupling
An ACO-based off-line path planner for nonholonomic mobile robots
A VLSI architecture for enhancing the fault tolerance of NoC using quad-spare mesh topology and dynamic reconfiguration
Adaptive digital bias control for an optical receiver and transmitter
A 10 Gb/s hybrid PLL-based forwarded clock receiver in 65-nm CMOS
Low power reconfigurable multi-mode LNA utilizing subthreshold bias and low-Q inductors
QRS detection for pacemakers in a noisy environment using a time lagged artificial neural network
A new algorithm for adaptive notch filter with sub-band filtering
A 0.18 μm CMOS 900 MHz receiver front-end using RF Q-enhanced filters
Calibrating silicon-synapse dynamics using Time-Encoding and Decoding Machines
A comparison of NLMS and LMS algorithms for cyclostationary input signals
Post-optimization of Delta-Sigma modulators considering circuit non-idealities
Fast block matching based on multi-resolution motion estimation for discontinuity blocks
An amplitude regulation for gyroscope drive loops based on phase-shifting
Low Error-Rate Approximate Multiplier Design for DNNs with Hardware-Driven Co-Optimization
An Adaptive SAR ADC for DC to Nyquist Rate Signals
The Initialization Factor: Understanding its Impact on Active Learning for Analog Circuit Design
A power-performance adaptive low voltage analog circuit design using independently controlled double gate CMOS technology
An Optimized Architecture for Computing the Square Root of Complex Numbers
Super Nested Sparse Circular Array for High Resolution DOA Estimation
A low-power CMOS integrated circuit for bearing estimation
Maximally Continuous Windows
A 2-Mb/s, UHF-band, wireless sensor node for real-time multi-point sensing
Design of oversampling current steering DAC with 640 MHz equivalent clock frequency
A reconfigurable, multi-gigahertz pulse shaping circuit based on distributed transversal filters
Real-time FPGA-based implementation of digital instantaneous frequency measurement receiver
Design of noise shaping FIR filters by minimizing in-band peak amplitude for stable single- and multi-bit data converters
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Multimodal Attentive Learning for Real-time Explainable Emotion Recognition in Conversations
Design Considerations for a Sub-25μW PLL with Multi-Phase Output and 1-450MHz Tuning Range
Wide dynamic range PSD algorithms and their implementation for compressive imaging
Multiple contour segmentation with automatic thresholding
Effects of variations of load distribution on network performance
Blind extraction of a dominant source from mixtures of many sources using ICA and time-frequency masking
Curse of digital polar transmission: Precise delay alignment in amplitude and phase modulation paths
Tree-structured linear-phase Nyquist FIR filter interpolators and decimators
A novel ACS-feedback scheme for generic, sequential Viterbi-decoder macros
DF-DICE: a scalable solution for soft error tolerant circuit design
Monotonic Neural Network based Rate-Distortion Modeling for H.266/VVC
Cycle-shift stop-go adaptive filter and its application in the separation of frequency domain overlapped periodic signals
Review of digital control laws for high-frequency point-of-load converters
Controller Design for High-Order Sliding Mode Dynamics with Upper-Triangular Uncertainties
"A MATLAB based optimum multiband FIR filters design program following the original idea of the Remez multiple exchange algorithm"
Modeling and Prediction of Common-Mode Electromagnetic Interference for GaN-Based LLC Resonant Converters
Wave Computing with Passive Memristive Networks
A cluster-based computing infrastructure for wide-area multi-modal surveillance networks
A low-power, memoryless direct digital frequency synthesizer architecture
A new topology for a sigma-delta audio power amplifier
Identification of complement single variable symmetry in Boolean functions through Walsh transform
Designing image processing pipeline for color imaging systems
An automatic tuning technique for background frequency calibration in gyroscope interfaces based on high order bandpass Delta-Sigma modulators
On low power design of feedforward continuous-time sigma delta modulators with excess loop delay
On the synthesis of cascaded continuous-time Sigma-Delta modulators
Analysis of the Electromagnetic Coupling of Two Phase-Locked Loops
Video organization: Near-Duplicate Video clustering
GPU Powered Artificial Immune System for Visual Applications
A 1.8 V 3.2µW comparator for use in a CMOS imager column-level single-slope ADC
A joint reconstruction algorithm for multi-view compressed imaging
An IFS-based image restoration method for impulsive noise contamination
Design of II Impedance Matching Networks
A (256×256) pixel 76.7mW CMOS imager/ compressor based on real-time In-pixel compressive sensing
Prediction of power equipment failures based on chronological failure records
Design of a 5 GS/s fully-digital digital-to-analog converter
Bio-inspired gas recognition based on the organization of the olfactory pathway
Overview on a new approach to one-bit nth order Sigma-Delta modulation
A survey on hardware trojan detection techniques
Multidimensional Householder based high-speed QR decomposition architecture for MIMO receivers
Automatic Synthesis of Gate-Level Speed-Independent Control Circuits from Signal Transition Graphs
An investigation on the stability of n-D Lur'e systems
Multi-Channel Coherent Detection for Delay-Insensitive Model-Free Adaptive Control
Gradient pile up for edge detection on hardware
RF Energy Harvesting in Minimization of Age of Information with Updating Erasures
GPU-Based LDPC Decoding for vRAN Systems in 5G and Beyond
A 24GHz low power and low phase noise PLL frequency synthesizer with constant KVCO for 60GHz wireless applications
Design of robust H-infty via normalized coprime factorization approach
SHD movie distribution system using image container with 4096×2160 pixel resolution and 36 bit color
Technology scaling impact on embedded ADC design for telecom receivers
A Multiplier-Balanced and Area-Efficient Architecture for Low-Frequency Non-Separable Secondary Transform
Evaluating the Impact of BTI on Hiding Countermeasures for DPA and DEMA Attacks
3D vertical RRAM architecture and operation algorithms with effective IR-drop suppressing and anti-disturbance
A High Voltage CMOS Transceiver for Low-Field NMR with a Maximum Output Current of 1.4 App
Modified long channel model for analytical study of DSM circuits
Modeling of the DCT coefficients of images
A quasi fixed frequency constant on time controlled boost converter
Automatic generation of hardware design properties from simulation traces
Perspectives and Issues in 3D-IC from Designers' Point of View
Design of multilayer discrete time cellular neural networks for image processing tasks based on genetic algorithms
Quality-Aware Merge Candidate Construction For Video Coding