yusuke1997/dblp-id-title huggingface dataset:
Blind identification of MIMO channels with periodic modulation
A 0.8V algorithmically defined buffer and ring oscillator low-energy design for nanometer SoCs
Implementation of a zero-forcing residue equalizer using a Laguerre filter architecture
A general expression of the low-pass maximally flat FIR digital differentiators
Power system monitoring based on relay and circuit breaker information
IQ mismatch compensation using time domain signal processing: A practical approach
A generalized perceptual time-frequency subtraction method for speech enhancement
A Simple Memristor Model for Neuromorphic ReRAM Devices
A 0.8V, 43.5μW ECG signal acquisition IC with a referenceless time-to-digital converter
Compensation Network for a 7.7 kW Wireless Charging System that Uses Standardized Coils
On the analog generation of pink noise from white noise
Frame size selection in video downsizing transcoding application
Q-enhancing technique for rf CMOS active inductor
A sub 100 mW H.264/AVC MP@L4.1 integer-pel motion estimation processor VLSI for MBAFF encoding
Digital filter bank design using simple subfilters
A Single-Inductor 5: 1 Resonant Switched-Capacitor Ladder Converter with Continuous Voltage Conversion Capability
Adaptive wavelet denoising system for speech enhancement
Live Demonstration: Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed
Small-signal modeling of PWM Z-source converter by circuit-averaging technique
A Novel Integrated Cochlear Model based on Ergodic Sequential Logic Dynamics: Reproduction of Mammalian Nonlinear Sound Processing and Efficient FPGA Implementation
Switching Sequence Effects in Switched-Current Filters
An efficient low-power binding algorithm in high-level synthesis
Energy-Efficient Deep In-memory Architecture for NAND Flash Memories
Characterization of RTN noise in the analog front-end of digital pixel imagers
Finite State Machine Decomposition for I/O Minimization
A new non-iterative, adaptive baseband predistortion method for high power rf amplifiers
A 0.8V 8GHz low power sub-harmonic self-oscillating mixer
A novel approach for implementing ultra-high speed flash ADC using MCML circuits
A DNA-based, biomolecular cryptography design
A temporal error concealment algorithm for H.264 using Lagrange interpolation
Packet logging mechanism for adaptive online fault detection on Network-on-Chip
Merged CORDIC Algorithm
Live demonstration: Hardware and software infrastructure for a family of floating-gate based FPAAs
Low-memory Cost Belief Propagation Architecture for Disparity Estimation
Self-Powered Motion Tracking Sensor Integrated with Low-Power CMOS Circuitry
Properties of fastest linearly independent transforms over GF(3)
Automatic generation of inexact digital circuits by gate-level pruning
A new insight to the ANN-based multitarget tracking data association
Synchronization of Small Oscillations in Cross-coupled Chaotic Circuits
A Two Stage Structure for High Order Multi-Bit Sigma-Delta ADC with Multiplier-less Digital Correction Logic
Partial stability of discontinuous dynamical systems under arbitrary initial z-perturbations
Designing RNS and QRNS full adder based converters
On the theory and design of a class of PR causal-stable IIR non-uniform recombination cosine modulated filter banks
Design and optimization of multi-bit front-end stage and scaled back-end stages of pipelined ADCs
A CMOS low power buffer based bandpass IF filter for Bluetooth
Encoding circuits for low power optical on-chip communications
Neural Network Based Estimation of VLSI Building Block Dimensions from Schematic
Fault tolerant datapath based on algorithm redundancy and vote-writeback mechanism
A 101.4 GOPS/W reconfigurable and scalable control-centric embedded processor for domain-specific applications
Quality assessment of contrast-altered images
A 3.3 V switched-current second order sigma-delta modulator for audio applications
Dynamic pass-transistor dot operators for efficient parallel-prefix adders
Efficient Fine-Tuning of BERT Models on the Edge
Towards an Optimal Trade-off of Viterbi Decoder Design
Masking Effects Based Rate Control Scheme for High Efficiency Video Coding
The tau-cell: a new method for the implementation of arbitrary differential equations
New Light-Weight Crypto Algorithms for RFID
A family of PWM based sliding mode voltage controllers for basic DC-DC converters
Channel linearity mismatch effects in time-interleaved ADC systems
High performance solution for interfering UWB piconets with reduced complexity sphere decoding
Bio-inspired analog parallel array processor chip with programmable spatio-temporal dynamics
Dynamic cooperative behavior in a coupled-core fluxgate magnetometer
Programmable Conductance Switches for FPAAs
Modelling and analysis of multicell converters using discrete time models
Generalized lossless data hiding by multiple predictors
A double-sampled path-coupled single-loop ΣΔ modulator using noise-shaped integrating quantizer
A full-scale CMOS voltage-to-frequency converter for WSN signal conditioning
A bit-serial column parallel processing architecture for on-sensor discrete Fourier transform
A linear predictive method for highly compressed presentation of speech spectra
An improved wideband CMOS current driver for bioimpedance applications
On the initialization of the DNMF algorithm
Heterogeneous and Inexact: Maximizing Power Efficiency of Edge Computing Sensors for Health Monitoring Applications
Low power coupling-based encoding for on-chip buses
Optimal rate allocation for scalable video multicast over WiMAX
Digital Architecture to Realize Programmable Central Pattern Generators Producing Multiple Gaits
A Fast Algorithm for Solving Toeplitz Systems of Equations
FreePDK15TFET: An Open-Source Process Design Kit for 15nm CMOS and TFET devices
Spectral shaping of DAC nonlinearity errors through modulation of expected errors
Design of complex FIR filters using the frequency-response masking approach
Scattering and immittance type tabular stability tests for 2-D discrete-time systems and their simplification by telepolation
Edge Training and Inference with Analog ReRAM Technology for Hand Gesture Recognition
Reconfigurable filter implementation of a matched-filter based spectrum sensor for Cognitive Radio systems
A study on compression rate bounds in distributed video coding based on correlation noise models
5th order electro-thermal multi-tone Volterra simulator with component-level output
Reducing the Overhead of Mapping Quantum Circuits to IBM Q System
A weighted least squares algorithm for the design of lattice-type perfect reconstruction cosine modulated filter banks
Integrated interface circuits for chemiresistor arrays
Accelerating MUSIC method on reconfigurable hardware for source localisation
A fixed-point 3D graphics library with energy-efficient cache architecture for mobile multimedia systems
Surface micromachining in Silicon on Sapphire CMOS technology
RavenFlow: Congestion-Aware Load Balancing in 5G Base Station Network
A novel current-mode technique for controlling the average value of converter switch current
Synaptic integrators implement inhibitory plasticity, eliminate loops and create a "winnerless" Network
A Digit-Serial Architecture for Gray-Scale Morphological Filtering
PowerPrint: Harnessing Machine Learning for Accurate and Scalable Device Fingerprinting via Power Consumption
A Linear Time Algorithm for Timing Directed Circuit Optimizations
THRAM: A Template-based Heterogeneous CGRA Modeling Framework Supporting Fast DSE
Analysis of radiation effect on the threshold voltage of flash memory device
Switched pseudo floating-gate reconfigurable linear threshold elements
A BPSK Superregenerative Receiver. Preliminary Results
Fully differential current-input CMOS amplifier front-end suppressing mixed signal substrate noise for optoelectronic applications
A novel, high-speed, reconfigurable demapper-symbol deinterleaver architecture for DVB-T
A HW CABAC encoder with efficient context access scheme for H.264/AVC
Architecture design and implementation of key components of an OFDM transceiver for IEEE 802.15.4g
The improvement for transaction level verification functional coverage
A 10-b 100-MS/s pipelined ADC with an optimized bit-stage resolution in 65nm CMOS technology
DSTN sleep transistor sizing with a new approach to estimate the maximum instantaneous current
Systematic analysis of the impact of mixing locality on Mixing-DAC linearity for multicarrier GSM
High-voltage rectifier and voltage doubler in conventional 0.18μm CMOS process
Closed-form design of tunable fractional-delay allpass filter structures
A new two-stage method for single-microphone speech dereverberation
Hardware Obfuscation Through Reconfiguration Finite Field Arithmetic Units
Sparse macromodels for parametric networks
An Optimal Layer Assignment Algorithm for Minimizing Crosstalk for Three Layer VHV Channel Routing
The Fano Noise Suppression Factor and the $G_{m}/I_{D}$ FoM
METS: A multiple event transient simulator
Topology detection of complex networks with hidden variables and stochastic perturbations
A 3.55 mJ/frame Energy-efficient Mixed-Transformer based Semantic Segmentation Accelerator for Mobile Devices
Low-power switched-capacitor filters using charge transfer integrators
Fast frequency acquisition all-digital PLL using PVT calibration
Scalable rasterizer architecture for 3D graphics system
A Programmable 16-Lane SIMD ASIP for Massive MIMO
High-Speed Circuit Design with Scaled-Down MOSFET's and Low Supply Voltage
A Wide-Bandwidth Supply Modulator using Binary Switched-Capacitor dc-to-dc Converters
1V, 1.13μm pixel pitch Liquid Crystal Driver with Charge-Balancing Scheme for SLM Applications
A differential DAC architecture with variable common-mode level
Content Adaptive Checkerboard Context Model for Learned Image Compression
A low-complexity high-throughput ASIC for the SC-FDMA MIMO detectors
New algorithms for the derivation of the transfer function matrix of two-dimensional digital filters
Parallel implementation of iterative and recursive algorithm: Application on adaptive filtering in signal processing
Mixed-signal gradient flow bearing estimation
A 22nm All-digital Fully Synthesizable Adaptive Clock Generator for Fast Frequency Adjustment in AI Processor
Reduce Computing Complexity of Deep Neural Networks Through Weight Scaling
On the Mode Analysis of Injection-locked Dividers
Analysis of Reservoir Computing Using Oscillator Circuit
Racetrack converter: A low power and compact data converter using racetrack spintronic devices
Towards probabilistic analog behavioral modeling
Data reuse analysis of local stereo matching
Non-invasive blood pressure estimation using phonocardiogram
Semi-Flocking-Controlled Mobile Sensor Networks for Tracking Targets with Different Priorities
A combined approach to research and graduate-level teaching of multidimensional signal processing, circuits and systems
Lossless Compression of Ultra Wideband Radar Using Adaptive Filters
High-performance ASIC implementations of the 128-bit block cipher CLEFIA
A 1D-CNN Based Deep Learning Technique for Sleep Apnea Detection in IoT Sensors
Coefficient bias in constant modulus adaptive filters
Benchmarking MOS Transistor Models with Respect to Capacitances and Charges for Analog Applications
Low power LDPC decoder with efficient stopping scheme for undecodable blocks
Thermal-Induced Multi-State Memristors for Neuromorphic Engineering
Elimination of sign precomputation in flat CORDIC
A Uniformly Segmented SC-Flip Decoder for Polar Codes with Memory Reduction Methods
Fast algorithms for computing full and reduced rank Wiener filters
Using carry-save adders in low-power multiplier blocks
A new homomorphic Bayesian wavelet-based MMAE filter for despeckling SAR images
Open-Source Circuit Radiation Effects (OSCRE) Simulation Framework: Design and Applications
Detection of corners and smooth joins using wavelet transform
Fitting of 2-dimensional polynomial device model based on simulated voltage and current spectra
Net Topology Exploration and Tuning for Mitigating Congestion in Global Routing
Fast global motion estimation for global motion compensation coding
Dynamic tuning of the noise transfer function of high order delta-sigma analog to digital converters
Switched-capacitor Chaotic Neuron for Chaotic Neural Networks
A new multi-ramp driver model with RLC interconnect load
A partial-current-steering biphasic stimulation driver for neural prostheses
Scaling of Fractional Delay Filters based on the Farrow Structure
SPACEMan: Wireless SoC for Concurrent Potentiometry and Amperometry
Analysis and design of PWM regulators for large-signal stability
Enabling Long-Term Robustness in RRAM-based Compute-In-Memory Edge Devices
Design of compact memristive in-memory computing systems using model counting
CMOS Reliability Improvements Through a New Fault Tolerant Technique
Active Noise Shaping SAR ADC Based on ISDM with the 5MHz Bandwidth
A High-speed High-resolution Oversampled A/D Converter
An adaptation method for FIR pre-emphasis filter on backplane channel
High Speed, Minimal Area, and Low Power SEC Code for DRAMs with Large I/O Data Widths
A high dynamic range CMOS variable gain filter for ADSL
A novel low-voltage operational transconductance amplifier and its applications
FPGA-based real time extraction of visual features
Low-power high-Q NEMS receiver architecture
Split-radix FFT pruning for the reduction of computational complexity in OFDM based Cognitive Radio system
Battery-assisted and photovoltaic-sourced switched-inductor CMOS harvesting charger-supply
A 16-bit 64-channel 2-order Incremental Σ-Δ ADC with On-Chip Decimator for X-ray Detections
Integrated multi-electrode fluidic nitric-oxide sensor and VLSI potentiostat array
On the use of hash functions for defect detection in textures for in-camera web inspection systems
Resistive switching synapses for unsupervised learning in feed-forward and recurrent neural networks
A shared polyhedral cache for 3D wide-I/O multi-core computing platforms
Modulation and Demodulation of Digital Frequency Shift Keying System Based on Spin Torque Nano Oscillator with Voltage Controlled Magnetic Anisotropy Effect
A digital calibration technique canceling non-linear switch and package impedance effects of a 1.6GS/s TX-DAC in 28 nm CMOS
Constant-g m techniques for rail-to-rail CMOS amplifier input stages: a comparative study
Noise robustness condition for chaotic maps with piecewise constant invariant density
A low power block-matching analog motion estimation processor
Development of the hydrogen gas sensor for the nondestructive test evaluation (NDE) application
Equiripple-Stopband Multiplierless FIR Filters by Chebyshev Sharpening of Two-Sample Averaging
Impact of S/D Extension Length and Sheet Stacking on Transient Behavior of Nanosheet FETs
Dynamic Quantization and Pruning for Efficient CNN-Based Road Sign Recognition on FPGA
A Digital Calibration Technique for the Correction of Glitches in High-Speed DAC's
Low-Cost, Rapid Prototyping of a Microfluidic Biosensor Cartridge for On-Farm Diagnostics
Estimating relative objective quality among images compressed from the same original
A 3.2-GHz 0.3/0.5 V 16-nm FinFET I/O Buffer With Low-Power PVT Compensation Circuit
A Current DAC Based Current Generator with Fourth-Order Current-Mode Filter for Electrical Impedance Tomography
On a New Predictor for the Waveform Coding of Speech Signal by Using the Dual Autocorrelation and the Sigma Delta Technique
A 2 nd Order Current-Mode Filter with 14dB Variable Gain and 650MHz to 1GHz Tuning-Range in 28nm CMOS
Reliability degradation with electrical, thermal and thermal gradient stress in interconnects
Fourier series analysis of the nonlinearities in analog closed-loop PWM class D amplifiers
Always convergent piecewise-linear DC analysis by an appropriate choice of initial conditions
Live Demonstration: DVS-CIS Sensor Fusion System for Real-Time DNN-Based Object Detection
Non-Integer-Order Low-Pass Filter with Electronically Controllable Parameters
kT/C constrained optimization of power in pipeline ADCs
Measurement time requirement for generalized cross-correlation based time-delay estimation
A Very Low Power 12 bit 64-MS/s 2 step SAR Assisted Bidirectional Digital Slope ADC
Low-complexity modified Mastrovito multipliers over finite fields GF(2M)
A Single-motion-vector/Cycle-generation Optical Flow Processor Employing Directional-edge Histogram Matching
Progressive Binary Partitioning for Performance Improvement in Multivariate Density Estimation
A low-complexity MMSE Bayesian estimator for suppression of speckle in SAR images
A test strategy for time-to-digital converters using dynamic element matching and dithering
Innovations approach to MMSE waterfilling based equalizers
Integration of Clock Skew and Register Delays into a Retiming Algorithm
Plic-Plac: a novel constructive algorithm for placement
A switched capacitor deadtime controller for DC-DC buck converter
Monocular 3D Pedestrian Localization Fusing with Bird's Eye View
A low-complexity correlation-based time skew estimation technique for time-interleaved SAR ADCs
Object Recognition with a 2-D Hough Domain
The sampling of noise for random number generation
Low-Clock Latency SDRR-Based AES
A 128× 128-pix 4-kfps 14-bit Digital-Pixel PbSe-CMOS Uncooled MWIR Imager
A novel structure for the design of 2-1-1 cascaded continuous time delta sigma modulators
Design of a 1.2-V cascade continuous-time Delta Sigma modulator for broadband telecommunications
Ternary arithmetic polynomial expansions based on new transforms
Self-similarity in max/average aggregated processes
An Efficient RF power harvester for low input power with reduced dead-zone
Local discriminant basis algorithm-a review of theory and applications in signal processing
An event-driven probabilistic model of sound source localization using cochlea spikes
A Self-Biased and FPN-Compensated Digital APS for Hybrid CMOS Imagers
Reducing synchronization cost in weighted dynamical networks using betweenness centrality measures
The Curious Case of Seed-Related Fractional Spurs
DeepScaleTool: A Tool for the Accurate Estimation of Technology Scaling in the Deep-Submicron Era
Asymmetric clock driver for improved power and noise performances
An Analog MOS Model for Circuit Simulation and Benchmark Test Results
The Investigation of Using Limited Precision on a TDNN for Consonant Recognition
A design of HTM spatial pooler for face recognition using memristor-CMOS hybrid circuits
Optimal Area and Impedance Allocation for Dual-string DACs
A Fully Flexible Temperature Sensor for Wearable Applications
Computing large-change sensitivity of periodic responses of nonlinear circuits using reduction techniques
A 4 dBm IP1dB 20.8 dBm UP3 wideband complementary SF feedback LNTA with derivative superposition method
Synthesis of reliable networks in the presence of line failures
Using all signed-digit representations to design single integer multipliers using subexpression elimination
A modified inverse-Chebyshev filter with an all positive elements ladder passive realization
Ultra-Wideband Software Defined Radio Platform and Heterogeneous Fabric
A High PSRR, Stable CMOS Current Reference using Process Insensitive TC of Resistance for Wide Temperature Applications
A flexible ADC approach for mixed-signal SoC platforms
Transform-domain super resolution for improved motion-compensated prediction
Exploiting Process Variations to Protect Machine Learning Inference Engine from Chip Cloning
On the use of don't cares during symbolic reachability analysis
Design of Energy-Efficient Gaussian Filters by Combining Refactoring and Approximate Adders
Some results on stochastic input-to-state stability of stochastic switched nonlinear systems
A CMOS 2.0-11.2 GHz UWB LNA using active inductor circuit
Peceptual distortion metric based on wavelet frequency sensitivity and multiple visual fixations
A current generator circuit for tripolar stimulation and insensitive to temperature and supply variations
A 1280 by 720 by 3, 250 mW, 24 fps Hexachromatic Imager for Near-Infrared Fluorescence Image-Guided Surgery
A Read Voltage Modulation Technique for Leakage Current Compensation in Cross-Point OTS-PRAM
An FFT-based algorithm for multichannel blind deconvolution
Dynamic CMOS noise immunity estimation in submicron regime
Improving the transform domain ECG denoising performance by applying interbeat and intra-beat decorrelating transforms
A Lightweight Model with Separable CNN and LSTM for Video Prediction
New Concepts for the Design of Carry Lookahaead Adders
Design of Fuzzy Filters by Genetic Algorithms
On optimizing power and crosstalk for bus coupling capacitance using genetic algorithms
Design for cold test elimination - facing the Inverse Temperature Dependence (ITD) challenge
Extension of observability analysis to Hachtel's augmented matrix [power system analysis applications]
Radiation tolerant SPI-programmable delay line for high energy physics experiments
FPGA based on integration of memristors and CMOS devices
On mismatch errors in analog-VLSI error correcting decoders
STF behaviour in optimised for ELD cascaded CT Delta-Sigma Modulators
A Single LED Photoplethysmography-Based Noninvasive Glucose Monitoring Prototype System
Realization of state-estimate feedback controllers with minimum L 2-sensitivity
An improved model of jitter effects in analog-to-digital conversion
Exploiting Luminescence Emissions of Solar Cells for Optical Frequency Identification (OFID)
A Lyapunov function approach to the study of the stability of cellular neural networks
NEAT: An Object Oriented High-Level Synthesis Interface
Energy-efficient Convolutional Neural Networks via Statistical Error Compensated Near Threshold Computing
A linearization technique for RF low noise amplifier
IVATS: A Leakage Reduction Technique Based on Input Vector Analysis and Transistor Stacking in CMOS Circuits
Linearity testing of ADCs using low linearity stimulus and Kalman filtering
Efficient algorithm for H.264/AVC intra frame transcoding
Power optimization of weighted bit-product summation tree for elementary function generator
Non-linear filter based outer product expansion with reference signal for EEG analysis
Improving the Functional Coverage Closure of Network-on-Chip using Genetic Algorithm
A 14.9-µW Quasi-Passive Error-Feedback Noise-Shaping SAR Converter with 78-dB Dynamic Range for Audio Activity Detection
Compact and Fast Multiplier Using Dual Array Tree Structure
Memristive systems for analog signal processing
A Low-Voltage Analog to Information Converter with Hybrid Quantization
Generation of homoclinic oscillation in coupled Chua's oscillators
Efficient block-based coding of noise images by combining pre-filtering and DCT
A probabilistic method to determine the minimum leakage vector for combinational designs
An efficient biasing technique suitable for any kind of the four basic amplifiers designed at or level
Low-Voltage Low-Power CMOS Oscillator with Low Temperature and Process Sensitivity
Impact of encoding configurations on the perceived quality of high definition videoconference sequences
Deep Learning-Assisted Video Compression Framework
Steady-state analysis of PWM DC-to-DC regulators
Low-cost high-quality constant offset injection for SEIR-based ADC built-in-self-test
A scheme of parallel arithmetic coding
A blind watermarking technique for multiple watermarks
Noise analysis for time-domain circuits
IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019
Opcode encoding for low power embedded systems
A mixed frequency-time approach for quasi-periodic steady-state simulation of multi-level modeled circuits
Synchronization and clustering in coupled parametrically excited oscillators with small mismatch
Low-latency, HDL-synthesizable dynamic clock frequency controller with self-referenced hybrid clocking
Transverse distributed coupling between specifically terminated low loss VLSI interconnections
Parallelizing Optical Flow Estimation on an Ultra-Low Power RISC-V Cluster for Nano-UAV Navigation
Design of a fully integrated 2 GHz CMOS frequency synthesizer
New very compact CMOS continuous-time low-voltage analog rank-order filter architecture