yusuke1997/dblp-id-title huggingface dataset:
The design and analysis of a RF CMOS bandpass filter
Boosting the Efficiency of Quantum Divider through Effective Design Space Exploration
Reduced resolution residual coding for H.264-based compression system
An All Low-Voltage Devices Level Shifter with Stress Protection for Powering Events
A ΔΣ IR-UWB radar with sub-mm ranging capability for human body monitoring systems
Accurate high frequency noise modeling in SiGe HBTs
A Comparison of Feature Selection Techniques for First-day Mortality Prediction in the ICU
A CMOS Power-Efficient Continuous-Time Delta-Sigma Resistor-to-Digital Converter for Force-Sensing Applications
A vertical layered space-time code and its blind symbol detection
Error neutralised switched-current comparator
An automatic hardware generator for special arithmetic functions using various ROM-based approximation approaches
Integer-to-integer complex extended lapped transform
A Comparative Study of Two Passive Regenerative Snubbers for Flyback Converters
Bit-Width-Aware Design Environment for Few-Shot Learning on Edge AI Hardware
A fast greedy algorithm for routing concurrent video flows
A method for generating non-Gaussian noise series with specified probability distribution and power spectrum
Wideband Fully Differential Current Driver with Optimized Output Impedance for Bioimpedance Measurements
A scalable offset-cancelled current/voltage sense amplifier
Sample-reset loop filter architecture for process independent and ripple-pole-less low jitter CMOS charge-pump PLLs
An Output/State Encoding for Self-Checking Finite State Machine
A Resource-efficient Dually-addressable Memory Architecture on FPGA
Programmable floating-gate CMOS resistors
IoT for Telemedicine Practices enabled by an Android™ Application with Cloud System Integration
Algorithms for Active Noise Cancellation without Exact Knowledge of the Error-Path Filter
Continuous-time linear systems: folklore and fact
A self-biased PLL-tuned AER pixel for high-speed infrared imagers
SRAM-Based PUF with Noise Immunity Achieving 0.58% Native BER in 55-nm CMOS
Implementation of Turing patterns for bio-inspired motion control
A novel de-interlacing technique based on phase plane correlation motion estimation
ESD protection design for fully integrated CMOS RF power amplifiers with waffle-structured SCR
A log-domain implementation of the Mihalas-Niebur neuron model
A 129.83 TOPS/W Area Efficient Digital SOT/STT MRAM-Based Computing-In-Memory for Advanced Edge AI Chips
Miniaturized UWB offset power divider with reflection cancellation and enhanced isolation
Modeling and Design of Ultrawideband Low Noise Amplifiers with Generalized Impedance Matching Networks
Analysis of signal distortion due to third order nonlinearity in WCDMA receivers
A Low-Noise Dynamic Comparator with Charge-Pump Pre-Amplifier
Overview of CNN research: 25 years history and the current trends
Reinforcement Learning Based Adaptive Bitrate Algorithm for Transmitting Panoramic Videos
0.37mW/Gb/s low power SLVS transmitter for battery powered applications
A 2-V 900-MHz CMOS mixer for GSM receivers
A 3 V 12b 100 MS/s CMOS D/A converter for high-speed system applications
Analysis for optimizer based on spiking-neural oscillator networks with a simple network topology
Time delay estimation with coupled LMS filters
Selective Input Sparsity in Spiking Neural Networks for Pattern Classification
Wavelet Transform Assisted Neural Networks for Human Activity Recognition
Data hiding in halftone images with secret-shared dot diffusion
No reference image quality metric via distortion identification and multi-channel label transfer
Algorithm for imposing SOBI-type constraints on the CP model
Bifurcations and chaos in electrostatic vibration energy harvesters
An energy-efficient circuit technique for single event transient noise-tolerance
Photo-thermoelectric power generation for autonomous microsystems
A quad-mode DCO for multi-standard communication application
A 250MHz-to-4GHz Δ-Σ fractional-N frequency synthesizer with adjustable duty cycle
An optimum linear phase approximation with small delay obtained by the manipulation of all-pass Padé approximants
A 0.1-12 GHz fully differential CMOS distributed amplifier employing a feedforward distortion cancellation technique
A QP-adaptive Mechanism for CNN-based Filter in Video Coding
An improved design approach for LC tank VCOs
A new dual pumping circuit without body effects for low supply voltage
An ultra-high-density 256-channel/25mm2 neural sensing microsystem using TSV-embedded neural probes
Switched-current biquad using differential, double-sampling, forward/backward difference integrators
Accelerating BPTT-Based SNN Training with Sparsity-Aware and Pipelined Architecture
A fine-resolution Time-to-Digital Converter for a 5GS/S ADC
An Energy-Efficient Logic Cell Library Design Methodology with Fine Granularity of Driving Strength for Near- and Sub-Threshold Digital Circuits
Unit substation demand estimator
Digital Circuit Implementation of a Continuous-time Inference Network for the Transitive Closure Problem
Electronically tunable switch-mode high-efficiency adaptive band-pass filters for energy harvesting applications
Design of high-temperature SRAM for reliable operation beyond 250°C
A Machine Learning Resistant Strong PUF using Subthreshold Voltage Divider Array in 65nm CMOS
Characteristics and programming of floating-gate pFET switches in an FPAA crossbar network
Deep Lightening Network for Low-Light Image Enhancement
Enabling Classical-Quantum Interface Using Digital SFQ for Pulse-Phase Driven Control for Superconducting Qubits
Adaptive playout for real-time media streaming
An 800 Mbps system interconnect modeling and simulation for high speed computing
A degree-based genetic algorithm for constrained pinning control in complex networks
Neural blind separation of complex sources by extended APEX algorithm (EAPEX)
Towards an Efficient Hardware Implementation of CNN-Based Object Trackers
3.5-D integration: A case study
From circuits to spectral peaks
A Maximum Clique Derivation Algorithm for Simplification of Incompletely Specified Machines
A 2.3 V low noise, low power, 10 GHz bandwidth Si-bipolar transimpedance preamplifier for optical receiver front-ends
Self-Calibration Technique for Pipe-Lined Algorithmic ADC
An Automatic Task Partition Method for Multi-core System
In-Memory Computing Architecture for Tsetlin Machine Inference using MTJ-based Crossbar
Digital Compensation of Frequency Dependent Imperfections in Direct Conversion I-Q Modulators
Design of IIR all-pass equalizers based on minimum of waveform distortion
Automatic two-layer video object plane generation scheme and its application to MPEG-4 video coding
An efficient logic extraction algorithm using partitioning and circuit encoding
An adaptive mixed-signal narrowband interference canceller for wireline transmission systems
Correlation-based adaptive filters for channel identification
Structural analysis of Petri nets with batch processing arcs
Weighted residual minimization in PCA subspace for visual tracking
A unified framework for similarity calculation between images
A waveform relaxation approach to determining periodic responses of linear differential-algebraic equations
An Adaptive Blind Cyclic Calibration Technique for Two-Channel Frequency-Interleaved ADCs
High temperature electronics packaging: An overview of substrates for high temperature
Velocity saturation current-mode CMOS imaging sensor
Blind Source Extraction using Spatio-temporal Inverse Filter
Temperature compensated CMOS voltage reference
A novel approximate multiplier based on improved logarithmic and antilogarithmic conversions
Design of a high temperature signal conditioning ASIC for engine control systems - HIGHTECS
Analytical Results on the Non-Convexity of Lossy Optimal Power Flow Models
Performance of finite iteration DTCNN with truncated stationary templates [digit recognition example]
Resolution prediction for bandpass-Sigma-Delta-modulators using SIMULINK behavior simulation
On basic piecewise-constant systems
Computationally efficient DOA estimation in a multipath environment using covariance differencing and iterative spatial smoothing
Detecting tandem repeats in DNA using Ramanujan Filter Bank
Memristors and memristive circuits - an overview
A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applications
A g m -C floating-gate MOS integrator
Rotation-Invariant Point Cloud Segmentation With Kernel Principal Component Analysis and Geometry-Based Weighted Convolution
Video coding with virtual set partitioning in hierarchical tree
A Real Time Super Resolution Accelerator with Tilted Layer Fusion
Novel IPT Multi-Transmitter Coils with Increase Misalignment Tolerance and System Efficiency
ETSSI: Energy-based Task Scheduling Simulator for wireless sensor networks
Contactless fluorescence imaging with a CMOS image sensor
A timing-driven pseudo-exhaustive testing of VLSI circuits
Content-based load balancing with multicast and TCP-handoff
A 0.35µm current-mode T/H with -81dB THD
Blind I/Q Imbalance Compensation in Multipath Environments
A 1-GS/s 11.5-ENOB time-interleaved ADC with fully digital background calibration
Hybrid Multi-tile Vector Systolic Architecture for Accelerating Convolution on FPGAs
Emulation of power system load dynamic behavior through reconfigurable analog circuits
Developing smart video semantic sensors
A 3.3 V, 1.6 GHz, low-jitter, self-correcting DLL based clock synthesizer in 0.5 μm CMOS
Compressive sensing based classification of intramuscular electromyographic signals
Design and Implementation of a Bio-Impedance Analyzer Based on the Kramers-Kronig Transform
V-I converters with transconductance proportional to bias current in any technology
Pattern Recognition and System Control with a Neural Processor
A High-Efficient DC-DC Buck Converter with Adaptive Constant On-Time Control
Splice, Focus and Relife: High-Resolution Periodic Pattern Generation
A 0.18µm CMOS clock and data recovery circuit with extended operation range
Reducing the effects of component mismatch by using relative size information
Multi-threshold dual-spacer dual-rail delay-insensitive logic: An improved IC design methodology for side channel attack mitigation
A gravity-based A/R model of swarming a multi-agent network with density information
A 0.35µm CMOS 17-bit@40kS/s sensor A/D interface based on a programmable-gain cascade 2-1 Sigma Delta modulator
Experimental verification of enhanced electromagnetic compatibility in chaotic FM clock signals
CMOS integrated transformer-feedback Q-enhanced LC bandpass filter for wireless receivers
A CORDIC like processor for computation of arctangent and absolute magnitude of a vector
A primary-side output current estimator with process compensator for flyback LED drivers
An in-silico glial microdomain to invoke excitability in cortical neural networks
Temperature Compensation in Combination Selection based Mismatch Calibration
An audio-scene cut detection method using fuzzy c-means algorithm for audio-visual indexing
VLSI decoding architecture with improved convergence speed and reduced decoding latency for irregular LDPC codes in WiMAX
High-Speed CMOS Current Comparators
On robustness of complete stability for a class of cellular neural networks
High resolution rail-to-rail ADC in CMOS digital technology
Live Demonstration: An IoT Cloud-Based Architecture for Anesthesia Monitoring
FFT Processor for OFDM Channel Estimation
An approach to the design of PFSCL gates
LineShield - A Generalized LiDAR Pipeline for Automated Vegetation Encroachment Detection on Powerlines
On-off intermittency from a mutually coupled phase-locked loop
A new variable-step-size LMS algorithm and its application in subband adaptive filtering for echo cancellation
A low power CMOS imager based on time-to-first-spike encoding and fair AER
Timing synchronization in super-regenerative receivers with a single quench cycle per symbol
End-to-end scalable FPGA accelerator for deep residual networks
Thermal noise limits - ΔΣ vs. pipeline ADCs
An Automated FPGA-Based Framework for Rapid Prototyping of Nonbinary LDPC Codes
Sub-microwatt correlation integral processor for implantable closed-loop epileptic neuromodulator
An Application-Specific VLIW Processor with Vector Instruction Set for CNN Acceleration
Multipurpose image watermarking in DCT domain using subsampling
Chip-Level Thermal Simulator to Predict VLSI Chip Temperature
Fast Performance Evaluation for Analog Circuit Synthesis Frameworks
Dynamical behaviors of interconnected converters in intermediate bus architecture
Efficient Hardware Accelerator for NORX Authenticated Encryption
An image retrieval system using shape salience points
TCG-SP: An improved floorplan representation based on an efficient hybrid of Transitive Closure Graph and Sequence Pair
On-line recognition of limited-vocabulary Chinese character using multiple convolutional neural networks
Acquisition-time minimization and merged-capacitor switching techniques for sampling-rate and resolution improvement of CMOS ADCs
Cooperative Design of Networked Observers for Stabilizing LTI Plants
On Path Memory in List Successive Cancellation Decoder of Polar Codes
On handling the fixed-outline constraints of floorplanning using less flexibility first principles
Analysis of a power topology for a quasi-resonant fast on-load tap changing regulator
The Huber Concept in Device Modeling, Circuit Diagnosis and Design Centering
A Homotopy Continuation Method for Parameter Estimation in MRF Models and Image Restoration
Design of optimal quincunx filter banks for image coding
Live demonstration: An automatic evaluation platform for physical unclonable function test
A Simple Zero Average Switching Energy Differential SAR ADC
Hybrid MIMO-OFDM for Downlink Multi-User Communications Over Millimeter Channels with no Instantaneous Feedback
Symmetric Extension Methods for Parallel M-Channel PR LP FIR Analysis/Synthesis Systems
Cost-effective multiplication with enhanced adders for multimedia applications
A Lumped Circuit Model for Implantable Body-Coupled Channel
On the implementation of 2-band cyclic filterbanks
Improved Encoding for Overfitted Video Codecs
A methodology for partitioning DSP applications in hybrid reconfigurable systems
Clock recovery circuit with adiabatic technology (quasi-static CMOS logic)
A 512-Channel Neural Signal Acquisition ASIC for High-Density Electrophysiology
XNC: XOR and NOT-Based Lossless Compression for Optimizing Unquantized Embedding Layers in Large Language Models
Floating gate current mirror for gain correction in CMOS translinear circuits
New Single-Capacitor MOSFET-C Integrators: Analysis, Design & Applications
Partitioning SFQ Circuits for Serial Biasing in Heterogeneous Circuits
A 1.96mm 2 low-latency multi-mode crypto-coprocessor for PKC-based IoT security protocols
Error Suppression of Last-Programmed Word-Line for Real Usage of 3D-NAND Flash Memory
EFVC: Error-Propagation-Free Neural Video Coding with Reversible Transform
A low-power and high-throughput implementation of the SHA-1 hash function
A semiblind receiver for space-time block-coded downlink multirate DS-CDMA systems
NMLib: A Nanomagnetic Logic Standard Cell Library
A New 16-Bit IoT ASIC Design for the AES Encryption Algorithm
Generation of Chain-coded Contours and Contours Inclusion Relationship Under Multiprocessor Environment
Error resilience for key frames in distributed video coding with rate-distortion optimized mode decision
Development of a Deep Image Retrieval Network Using Hierarchical and Multi-scale Spatial Features
Analysis of Non-Idealities in CMOS RX Front-End for Linear Phased Arrays
Ultra Wide Voltage Range One Time Programmable EPROM Circuit for Portable Applications
Compact High-Voltage Switched-Capacitor Driver for MEMS Actuators
An Analog Visual Saliency Processor using Time-mode Computation
Beyond Preferences: Enriching User Profiles for Effective E-commerce Recommendations
A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process
A Wide-tuning-range and Reduced-fractional-spurs Synthesizer Combining Sigma-Delta Fractional-N and Integer Flying-Adder Techniques
An optimized adaptive spike detector for behavioural experiments
Abstractions for model checking of event timings
A Current-Mode Discrete-Time Analog Computer for Solving Maxwell's Equations in 2D
JPEG2000 image coding system theory and applications
Bifurcations in simple genetic cyclic models
Asymmetric halo CMOSFET to reduce static power dissipation with improved performance
Shielding Methodologies in the Presence of Power/Ground Noise
VHF Fully-Differential Linearized CMOS Transconductance Element and its Applications
Adaptive noise subspace construction for harmonic retrieval
Haptic-Enhanced Bioimpedance Needle for Precision Navigation in Central Venous Catheterisation with Millimetre Accuracy
A Single Chip Lempel-Ziv Data Compressor
Evaluation of Simple/Comparative Power Analysis against an RSA ASIC Implementation
Evaluation of selective encryption techniques for secure transmission of MPEG-compressed bit-streams
Approximate L0 constrained non-negative matrix and tensor factorization
A low-voltage low-noise DC-DC flyback converter with delta-sigma modulation
System design problem formulation by control theory
A true Random Number Generator using RTN noise and a sigma delta converter
Low-Voltage Companding Current-Mode Integrators
Mode-dependent fast separable KLT for block-based intra coding
A low-power area-efficient compressive sensing approach for multi-channel neural recording
Performance of Multi-User DCSK Communication System Over Multipath Fading Channels
A general histogram modification framework for efficient contrast enhancement
Hybrid digital-analog scheme for video transmission over fading channel
On-chip Tests for Gain Bandwidth Product and Slew Rate
Real-valued discrete Gabor transform for image representation
Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor
Rich dynamics in weakly-coupled full-range cellular neural networks
A 25.6μW 8.97ps Period Jitter Phase-Locked Relaxation Oscillator with sub-1µS Start-Up for Low-Power IoT
Adaptive multiple resolution CMOS active pixel sensor
Continuous Pedestrian Orientation Estimation using Human Keypoints
Convergence analysis results for the class of affine projection algorithms
Minimizing gate capacitances with transistor sizing
Design of Q-shift filters with flat group delay
Fast Transform Decision Scheme for VVC Intra-Frame Prediction Using Decision Trees
Adaptive ECG interval extraction
FS-BAND: A Frequency-Sensitive Banding Detector
A 1-V 8-bit 0.95mW Successive Approximation ADC for Biosignal Acquisition Systems
Redefining Trust: Assessing Reliability of Machine Learning Algorithms in Intrusion Detection Systems
Sturdy-MASH delta-sigma modulator with noise-shaped integrating quantizer and dual-DAC DWA
Design of FIR Digital Filters with Minimum Weight Representation
Real-time scheduling on scalable media stream delivery
Distributed multi-camera object tracking with Bayesian Inference
An efficient approach for designing filter banks for Multi-Carrier Transmission
Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded system
Analogue Circuits Real-Time Emulation based on Wave Digital Filter
RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic
Bit-depth scalable coding based on macroblock level inter-layer prediction
Drift Prediction and Chemical Reaction Identification for ISFETs using Deep Learning
Digital Third-Order Nonlinearity Correction for Time-Interleaved A/D Converters with VCOs
Design of a low power time to digital converter for flow metering applications
Gate Array Placement Based on Mincut, Partitioning with Path Delay Constraints
An Area Efficient Built-in Phase Testing Equipment for Phased Array Front-End ICs
Live Demonstration: Real-time audio and visual inference on the RAMAN TinyML accelerator
Cooperative Emergence in Structured Populations Mixed with Imitation and Aspiration Learning Dynamics
Accurate simulation of phase noise in RF MEMS VCOs
A New Block Adaptive Algorithm Using Order Recursive UD Factorization Method
Embedded MRAM Macro for eFlash Replacement
Digital pulse mode neural network with simple synapse multiplier
A systematic methodology for designing area-time efficient parallel-prefix modulo 2 n - 1 adders
Multiplierless predictor for DPCM of images
A sender-adaptive and receiver-driven layered multicast scheme for video over Internet
An eCrystal Oscillator with Self-calibration Capability
CMOS microelectrode array for extracellular stimulation and recording of electrogenic cells
NeSe: Near-Sensor Event-Driven Scheme for Low Power Energy Harvesting Sensors
Automated Design of Reconfigurable Microarchitectures for Accelerators under Wide-Voltage Scaling
A 1-bit Physically Unclonable Function based on a two-neurons CNN
Coupled chaotic simulated annealing processes
A theoretical solution for PWM with non-ideal transient response
A current copying structure for current-mode monotonic digital-to-analog converters
A comparative study on asynchronous Quasi-Delay-Insensitive templates
Gradient-based methods for simultaneous blind separation of mixed source signals
Automatic communication synthesis with hardware sharing for design space exploration
Delta operator based 2-D filters: symmetry, stability, and design
Hardware architecture and trade-offs for generic inversion of one-way functions
Design of Majority Logic (ML) Based Approximate Full Adders
Performance and power aware buffered tree construction
A 10-Bit Fully-Predictive ADC with Code-Recombination Algorithm in Transducing Sensor Node Signals
Low power repeaters driving RLC interconnects with delay and bandwidth constraints
Novel Edge Comparator with Input Time Hysteresis for Improved Edges Arbitration
Compact, Scalable, and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography
Eigenvector and Fractionalization of Discrete Hadamard Transform
Design of digital filters with general hardware constraints by mean field annealing
Power trends and performance characterization of 3-dimensional integration
New high radix maximally-redundant signed digit adder
Decoupling network optimization in high speed systems by mixed-integer programming
A self-powered static-strain sensor based on differential linear piezo-floating-gate injectors
Soft fault test and diagnosis for analog circuits
A CMOS Image Sensor with Focal Plane Discrete Cosine Transform Computation
Some Thoughts on Least Squared Error Optimal Windows
Common-emitter feedback transimpedance amplifier for analog optical receivers
Triple loop modulation (TLM) for high reliability and efficiency in Power Factor Correction (PFC) system
A Token-Passing-Based Trigger-Prediction Methodology for Event-Driven ToF Sensors
FedExg: Federated Learning with Model Exchange
System and circuit considerations for low-complexity constant-envelope FM-UWB
Fast global motion estimation based on iteration least-square estimation with sustained symmetrical structure
Minimax design of stable IIR digital filter using iterative linear programming method
Fixed-point FIR filter design and implementation in the expanding subexpression space
An LSI system with locked in temperature insensitive state achieved by using body bias technique
Impact of Structure of Network Based Data on Performance of Graph Neural Networks
Towards an on-chip signal processing solution for the online calibration of SS-OCT systems
Electronic System for Signal Transmission Inside Green Plant Body
A 6-11GHz multi-phase VCO design with active inductors
A 10-Bit 200-MS/s digitally-calibrated pipelined ADC using switching opamps
Sorted Weight Sectioning for Energy-Efficient Unstructured Sparse DNNs on Compute-in-Memory Crossbars
Inverter-Based Amplifier with Active Frequency Compensation and Adaptive Voltage Scaling
A 14-bit, 200 MS/s digital-to-analog converter without trimming
IFS Image Coding Using an Orthonormal Basis
An 8-bit 160 MS/s folding-interpolating ADC with optimized active averaging/interpolating network
A Comparison of Algorithms for Least Absolute Value State Estimation in Electoric Power Networks
Study on integrated transmission line ΣΔ modulators