yusuke1997/dblp-id-title huggingface dataset:
23.5 MAE: A 3nm 0.168mm 2 576MAC Mini AutoEncoder with Line-Based Depth-First Scheduling for Generative AI in Vision on Edge Devices
An Integrated Quad-Core Opteron Processor
A 28Gb/s source-series terminated TX in 32nm CMOS SOI
A 23GHz low-phase-noise digital bang-bang PLL for fast triangular and saw-tooth chirp modulation
A 10MHz i-Collapse Failure Self-Prognostic GaN Power Converter with TJ-Independent In-Situ Condition Monitoring and Proactive Temperature Frequency Scaling
34.6 EEG Dust: A BCC-Based Wireless Concurrent Recording/Transmitting Concentric Electrode
Processor with side-channel attack resistance
A Serial Data Transmitter for Multiple 10Gb/s Communication Standards in 0.13μm CMOS
An 8b subthreshold hybrid thermal sensor with ±1.07°C inaccuracy and single-element remote-sensing technique in 22nm FinFET
A 4nm 32Gb/s 8Tb/s/mm Die-to-Die Chiplet Using NRZ Single-Ended Transceiver With Equalization Schemes And Training Techniques
26.6 A 2.667Gb/s DDR3 memory interface with asymmetric ODT on wirebond package and single-side-mounted PCB
A 5G Mobile Gaming-Centric SoC with High-Performance Thermal Management in 4nm FinFET
4.8 A Terahertz FMCW Comb Radar in 65nm CMOS with 100GHz Bandwidth
A 5Gb/s transceiver with an ADC-based feedforward CDR and CMA adaptive equalizer in 65nm CMOS
1.2 From Chips to Thoughts: Building Physical Intelligence into Robotic Systems
A sub-10nA DC-balanced adaptive stimulator IC with multimodal sensor for compact electro-acupuncture system
A 2.5Gb/s Multi-Rate 0.25µm CMOS CDR Utilizing a Hybrid Analog/Digital Loop Filter
A 0.13μm 2.125MB 23.5ns Embedded Flash with 2GB/s Read Throughput for Automotive Microcontrollers
A 20µW intra-cardiac signal-processing IC with 82dB bio-impedance measurement dynamic range and analog feature extraction for ventricular fibrillation detection
A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm
International technical program committee
A Telecom Baseband Circuit based on an Asynchronous Network-on-Chip
A fully integrated split-electrode synchronized-switch-harvesting-on-capacitors (SE-SSHC) rectifier for piezoelectric energy harvesting with between 358% and 821% power-extraction enhancement
A 4-channel 20-to300 Mpixel/s analog front-end with sampled thermal noise below kT/C for digital SLR cameras
10.2 A 28nm HPM heterogeneous multi-core mobile application processor with 2GHz cores and low-power 1GHz cores
Bidirectional communication in an HF hybrid organic/solution-processed metal-oxide RFID tag
A complex image rejection circuit with sign detection only
20μA to 100mA DC-DC converter with 2.8 to 4.2V battery supply for portable applications in 45nm CMOS
9.1 A Current-Sensing Front-End Realized by A Continuous-Time Incremental ADC with 12b SAR Quantizer and Reset-Then-Open Resistive DAC Achieving 140dB DR and 8ppm INL at 4kS/s
34.3 A 22nm 64kb Lightning-Like Hybrid Computing-in-Memory Macro with a Compressed Adder Tree and Analog-Storage Quantizers for Transformer and CNNs
14.6 A 10A Computational Digital LDO Achieving 263A/mm 2 Current Density with Distributed Power-Gating Switches and Time-Based Fast-Transient Controller for Mobile SoC Application in 3nm GAAFET
A 1.25W 46.5%-Peak-Efficiency Transformer-in-Package Isolated DC-DC Converter Using Glass-Based Fan-Out Wafer-Level Packaging Achieving 50mW/mm2 Power Density
Passive-Matrix Flexible Electronic Paper Using Quick-Response Liquid Powder Display (QR-LPD) Technollogy and Custom Driver Circuits
19.9 An 11-to-16.4GHz, 3.4GHz/µs-Slope, 5.32GHz-Chirp-Bandwidth, 0.043%-RMS-Frequency-Error FMCW Digital PLL with Posterior-Segment DPD Featuring 5-Chirp-Cycle Convergence Time
A voltage-scalable biomedical signal processor running ECG using 13pJ/cycle at 1MHz and 0.4V
A 3MPixel Multi-Aperture Image Sensor with 0.7μm Pixels in 0.11μm CMOS
30.4 A 370µW 5.5dB-NF BLE/BT5.0/IEEE 802.15.4-Compliant Receiver with >63dB Adjacent Channel Rejection at >2 Channels Offset in 22nm FDSOI
14.6 A 1.42TOPS/W deep convolutional neural network recognition processor for intelligent IoE systems
A 65nm CMOS Living-Cell Dynamic Fluorescence Sensor with 1.05fA Sensitivity at 600/700nm Wavelengths
A 97fsrms-Jitter and 68-Multiplication Factor, 8.16GHz Ring-Oscillator Injection-Locked Clock Multiplier with Power-Gating Injection-Locking and Background Multi-Functional Digital Calibrator
All digital spread spectrum clock generator for EMI reduction
8.1 A 4×4×2 homogeneous scalable 3D network-on-chip circuit with 326MFlit/s 0.66pJ/b robust and fault-tolerant asynchronous 3D links
A 1×2 MIMO Multi-Band CMOS Transceiver with an Integrated Front-End in 90nm CMOS for 802.11a/g/n WLAN Applications
24.6 A time-interleaved filtering-by-aliasing receiver front-end with >70dB suppression at <4× bandwidth frequency offset
A 6.7nV/√Hz Sub-mHz-1/f-corner 14b analog-to-digital interface for rail-to-rail precision voltage sensing
F5: Wireline transceivers for Mega Data Centers: 50Gb/s and beyond
A 130mW 100MS/s pipelined ADC with 69dB SNDR enabled by digital harmonic distortion correction
23.6 A 30Gb/s 0.8pJ/b 14nm FinFET receiver data-path
An integrated magnetic spectrometer for multiplexed biosensing
A Bandpass ΔΣ RF-DAC with Embedded FIR Reconstruction Filter
A 90nm CMOS 60GHz Radio
A 260GHz amplifier with 9.2dB gain and -3.9dBm saturated power in 65nm CMOS
7.8 A 1-inch 17Mpixel 1000fps Block-Controlled Coded-Exposure Back-Illuminated Stacked CMOS Image Sensor for Computational Imaging and Adaptive Dynamic Range Control
18.1 A 20nm 9Gb/s/pin 8Gb GDDR5 DRAM with an NBTI monitor, jitter reduction techniques and improved power distribution
Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications
32Gb/s data-interpolator receiver with 2-tap DFE in 28nm CMOS
5.10 A 1280×720 Back-Illuminated Stacked Temporal Contrast Event-Based Vision Sensor with 4.86µm Pixels, 1.066GEPS Readout, Programmable Event-Rate Controller and Compressive Data-Formatting Pipeline
A 10mW stereo audio CODEC in 0.13µm CMOS
A 22nm 8Mb STT-MRAM Near-Memory-Computing Macro with 8b-Precision and 46.4-160.1TOPS/W for Edge-AI Devices
18.1 A 1V 3mA 2.4GHz wireless digital audio communication SoC for hearing-aid applications in 0.18μm CMOS
CMOS Integrated DNA Chip for Quantitative DNA Analysis
26.5 A Watt-Level Quadrature Switched/Floated-Capacitor Power Amplifier with Back-Off Efficiency Enhancement in Complex Domain Using Reconfigurable Self-Coupling Canceling Transformer
A 16fJ/Conversion-Step Time-Domain Two-Step Capacitance-to-Digital Converter
A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fsrms Jitter in 65nm LP CMOS
33.5 A 224GHz 19.9% TR Varactor-Less VCO Utilizing a Multi-Section Switch-Loaded Coupled-Line Resonator
Session 19 overview: Wireless transceivers for smart devices
10.2 A SAW-Less Direct-Digital RF Modulator with Tri-Level Time-Approximation Filter and Reconfigurable Dual-Band Delta-Sigma Modulation
9.2 A single-chip HSPA transceiver with fully integrated 3G CMOS power amplifiers
13.1 A fully integrated multimode front-end module for GSM/EDGE/TD-SCDMA/TD-LTE applications using a Class-F CMOS power amplifier
A source-synchronous 90Gb/s capacitively driven serial on-chip link over 6mm in 65nm CMOS
A 40nm 2Gb 7Gb/s/pin GDDR5 SDRAM with a programmable DQ ordering crosstalk equalizer and adjustable clock-tracking BW
5.9 A 0.8V Multimode Vision Sensor for Motion and Saliency Detection with Ping-Pong PWM Pixel
A 72mW 0.03mm2 Inductorless 40Gb/s CDR in 65nm SOI CMOS
14.7 A 300GHz frequency synthesizer with 7.9% locking range in 90nm SiGe BiCMOS
An 8b Injection-Locked Phase Rotator with Dynamic Multiphase Injection for 28/56/112Gb/s Serdes Application
33.1 A High-Accuracy and Energy-Efficient Zero-Shot-Retraining Seizure-Detection Processor with Hybrid-Feature-Driven Adaptive Processing and Learning-Based Adaptive Channel Selection
15.6 12b 250MS/S pipelined ADC with virtual ground reference buffers
23.2 A 70µW 1.19mm 2 Wireless Sensor with 32 Channels of Resistive and Capacitive Sensors and Edge-Encoded PWM UWB Transceiver
8.2 A Versatile 7nm Adaptive Compute Acceleration Platform Processor
31.3 A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking
A 283.2μW 800Mb/s/pin DLL-based data self-aligner for Through-Silicon Via (TSV) interface
11.2 A 1Mb embedded NOR flash memory with 39µW program power for mm-scale high-temperature sensor nodes
A fully differential charge-balanced accelerometer for Electronic Stability Control
A 0.6V 380µW -14dBm LO-input 2.4GHz double-balanced current-reusing single-gate CMOS mixer with cyclic passive combiner
Ponte Vecchio: A Multi-Tile 3D Stacked Processor for Exascale Computing
A 21dBm-OP1dB 20.3%-Efficiency -131.8dBm/Hz-Noise X-Band Cartesian-Error-Feedback Transmitter with Fully Integrated Power Amplifier in 65nm CMOS
A signal-independent background-calibrating 20b 1MS/S SAR ADC with 0.3ppm INL
TILE64 - Processor: A 64-Core SoC with Mesh Interconnect
GIRAFE: 4G RF frontends
Printed Electronic Nose Vapor Sensors for Consumer Product Monitoring
14.4 A scalable speech recognizer with deep-neural-network acoustic models and voice-activated power gating
A Fully Integrated 85%-Peak-Efficiency Hybrid Multi Ratio Resonant DC-DC Converter with 3.0-to-4.5V Input and 500μA -to-120mA Load Range
An Interferer-Tolerant Harmonic-Resilient Receiver with >+10dBm 3 rd -Harmonic Blocker P1dB for 5G NR Applications
27.2 A 6mW 5K-Word real-time speech recognizer using WFST models
Data converter breakthroughs in retrospect
Within-die variation-aware dynamic-voltage-frequency scaling core mapping and thread hopping for an 80-core processor
A low-power low-noise direct-conversion front-end with digitally assisted IIP2 background self calibration
A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion
A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems
13.8 A 5.8GHz RF-powered transceiver with a 113μW 32-QAM transmitter employing the IF-based quadrature backscattering technique
Robust digital design in organic electronics by dual-gate technology
A 3.4mW photovoltaic energy-harvesting charger with integrated maximum power point tracking and battery management
An 802.11ax 4×4 spectrum-efficient WLAN AP transceiver SoC supporting 1024QAM with frequency-dependent IQ calibration and integrated interference analyzer
9.9 A 2.72fJ/conv 13b 2MS/s SAR ADC Using Dynamic Capacitive Comparator with Wide Input Common Mode
EE4: Semiconductor economics: How business decisions are engineered
A 1/1.57-inch 50Mpixel CMOS Image Sensor With 1.0μm All-Directional Dual Pixel by 0.5μm-Pitch Full-Depth Deep-Trench Isolation Technology
A 5GS/s 158.6mW 12b Passive-Sampling 8×-Interleaved Hybrid ADC with 9.4 ENOB and 160.5dB FoMS in 28nm CMOS
Digitally-Assisted RF Circuits (Forum)
A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time
A Cryogenic SiGe BiCMOS Hybrid Class B/C Mode-Switching VCO Achieving 201dBc/Hz Figure-of-Merit and 4.2GHz Frequency Tuning Range
A configurable SRAM with constant-negative-level write buffer for low-voltage operation with 0.149µm 2 cell in 32nm high-k metal-gate CMOS
Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology
'Zeppelin': An SoC for multichip architectures
A 1.6V 1.4Gb/s/pin consumer DRAM with self-dynamic voltage-scaling technique in 44nm CMOS technology
A 78mW 11.1Gb/s 5-tap DFE receiver with digitally calibrated current-integrating summers in 65nm CMOS
A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors
A HD 31fps 7×7-View Light-Field Factorization Processor for Dual-Layer 3D Factored Display
3.2 A 36V Current-Balancing Instrumentation Amplifier with ±24V Input Range, 5.6MHz BW, and 140dB CMRR at All Gain Settings
A 10b 75ns CMOS Scanning-Display-Driver System for QVGA LCDs
2-Tx Digital Envelope-Tracking Supply Modulator Achieving 200MHz Channel Bandwidth and 93.6% Efficiency for 2G/3G/LTE/NR RF Power Amplifiers
A 41-phase switched-capacitor power converter with 3.8mV output ripple and 81% efficiency in baseline 90nm CMOS
In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter
A 0.7V 17fJ/Step-FOMW 178.1dB-FOMSNDR 10kHz-BW 560mVPP True-ExG Biopotential Acquisition System with Parasitic-Insensitive 421MΩ Input Impedance in 0.18μm CMOS
A 2.2/3-inch 4K2K CMOS image sensor based on dual resolution and exposure technique
5.2 A 1200×900 6µm 450fps Geiger-Mode Vertical Avalanche Photodiodes CMOS Image Sensor for a 250m Time-of-Flight Ranging System Using Direct-Indirect-Mixed Frame Synthesis with Configurable-Depth-Resolution Down to 10cm
An Ultra-Low Power 2.4GHz RF Transceiver for Wireless Sensor Networks in 0.13µm CMOS with 400mV Supply and an Integrated Passive RX Front-End
A 110dB SNR and 0.5mW current-steering audio DAC implemented in 45nm CMOS
29.5 A 0.008mm 2 1.5mW 0.625-to-200MHz Fractional Output Divider with 120fsrms Jitter Based on Replica-DTC-Free Background Calibration
An 88%-Efficiency Supply Modulator Achieving 1.08μs/V Fast Transition and 100MHz Envelope-Tracking Bandwidth for 5G New Radio RF Power Amplifier
A 33.6-to-33.8Gb/s Burst-Mode CDR in 90nm CMOS
A 21nV/√Hz chopper-stabilized multipath current-feedback instrumentation amplifier with 2µV offset
25.1 A 3.2Gb/s/pin 8Gb 1.0V LPDDR4 SDRAM with integrated ECC engine for sub-1V DRAM core operation
15.5 Event-Based Spatially Zooming Neural Interface IC with 10nW/Input Reconfigurable-Inverter Fabric and Input-Adaptive Quantization
5.7 A 4.7GHz, 27.7dBm P out , 37.8 % PAE, 5.8° AM-PM Distortion Polar SCPA Using In-Cell Fast Slope-to-Phase Self-Calibration and Asymmetrical 4-to-1 Differential Power-Combining Transformer
A 64GHz full-duplex transceiver front-end with an on-chip multifeed self-interference-canceling antenna and an all-passive canceler supporting 4Gb/s modulation in one antenna footprint
27.2 an oversampling SAR ADC with DAC mismatch error shaping achieving 105dB SFDR and 101dB SNDR over 1kHz BW in 55nm CMOS
A 140dB-CMRR current-feedback instrumentation amplifier employing ping-pong auto-zeroing and chopping
13.9 A 25.2Gb/s/pin NRZ/PAM-3 Dual-Mode Transmitter with Embedded Partial DBI Achieving a 133% I/O Bandwidth/Pin Efficiency and 19.3% DBI Efficiency
A 86MHz-to-12GHz digital-intensive phase-modulated fractional-N PLL using a 15pJ/Shot 5ps TDC in 40nm digital CMOS
A 4.5Tb/s 3.4Tb/s/W 64×64 switch fabric with self-updating least-recently-granted priority and quality-of-service arbitration in 45nm CMOS
2Mb Spin-Transfer Torque RAM (SPRAM) with Bit-by-Bit Bidirectional Current Write and Parallelizing-Direction Current Read
A 300GHz 52mW CMOS Receiver with On-Chip LO Generation
30.1 A Temperature-Robust 27.6nW -65dBm Wakeup Receiver at 9.6GHz X-Band
11.4 A 48-to-80V Input 2MHz Adaptive ZVT-Assisted GaN-Based Bus Converter Achieving 14% Light-Load Efficiency Improvement
14.1 A 22nm 104.5TOPS/W µ-NMC-Δ-IMC Heterogeneous STT-MRAM CIM Macro for Noise-Tolerant Bayesian Neural Networks
A 1GS/s 11b Time-Interleaved ADC in 0.13µm CMOS
High-Speed and Low-Energy Capacitively-Driven On-Chip Wires
A 0.28THz 4×4 power-generation and beam-steering array
4.3 Fine-grained adaptive power management of the SPARC M7 processor
34.4 A 4.5mm 3 Deep-Tissue Ultrasonic Implantable Luminescence Oxygen Sensor
A 47×10Gb/s 1.4mW/(Gb/s) parallel interface in 45nm CMOS
A 17.7-to-29.5GHz Transceiver Front-End with 3.3dB NF and 20.2dBm OP1dB in 65nm CMOS
Single-chip multiband WCDMA/HSDPA/HSUPA/EGPRS transceiver with diversity receiver and 3G DigRF interface without SAW filters in transmitter / 3G receiver paths
64/256-Element Thermopile, Infrared Sensor Chip with 4 Built-In Amplifiers for use in Atmospheric Pressure Conditions
A capacitively coupled chopper instrumentation amplifier with a ±30V common-mode range, 160dB CMRR and 5μV offset
A Cryo-CMOS Controller IC With Fully Integrated Frequency Generators for Superconducting Qubits
3.2 A 320mW 32Gb/s 8b ADC-based PAM-4 analog front-end with programmable gain control and analog peaking in 28nm CMOS
9.4 A 28nm CMOS digital fractional-N PLL with -245.5dB FOM and a frequency tripler for 802.11abgn/ac radio
Session 1 overview: Plenary Session
A wideband mm-Wave CMOS receiver for Gb/s communications employing interstage coupled resonators
A 0.37W 143dB-Dynamic-Range 1Mpixel Backside-Illuminated Charge-Focusing SPAD Image Sensor with Pixel-Wise Exposure Control and Adaptive Clocked Recharging
A fully integrated 77GHz FMCW radar system in 65nm CMOS
3.6 A CMOS Resistor-Based Temperature Sensor with a 10fJ·K2 Resolution FoM and 0.4°C (30) Inaccuracy From -55°C to 125°C After a 1-point Trim
Session 3 Overview: Highlighted Chip Releases: Modern Digital SoCs Invited Papers
A Fully-Integrated UHF Receiver with Multi-Resolution Spectrum-Sensing (MRSS) Functionality for IEEE 802.22 Cognitive-Radio Applications
A 22ng/√Hz 17mW MEMS Accelerometer with Digital Noise-Reduction Techniques
7.2 A 12nm Programmable Convolution-Efficient Neural-Processing-Unit Chip Achieving 825TOPS
4.3 An 87%-peak-efficiency DVS-capable single-inductor 4-output DC-DC buck converter with ripple-based adaptive off-time control
A 25.8GHz Integer-N PLL With Time-Amplifying Phase-Frequency Detector Achieving 60fsrms Jitter, -252.8dB FoMJ, and Robust Lock Acquisition Performance
MetaVRain: A 133mW Real-Time Hyper-Realistic 3D-NeRF Processor with 1D-2D Hybrid-Neural Engines for Metaverse on Mobile Devices
26.3 A 1.3nJ/b IEEE 802.11ah fully digital polar transmitter for IoE applications
19.1 A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference, -259.7dB FoMJ, and -56.6dBc Reference Spur
7.1 A 2.69pJ/b 212Gb/s DSP-Based PAM-4 Transceiver for Optical Direct-Detect Application in 5nm FinFET
12.3 PWM buck converter with >80% PCE in 45μA-to-4mA loads using analog-digital hybrid control for impiantale biomedical systems
5.8 A 4.7nW 13.8ppm/°C self-biased wakeup timer using a switched-resistor scheme
4.5 A 16nm FinFET heterogeneous nona-core SoC complying with ISO26262 ASIL-B: Achieving 10-7 random hardware failures per hour reliability
26.3 An 800MS/S 10b/13b receiver for 10GBASE-T Ethernet in 28nm CMOS
7.9 1/2.74-inch 32Mpixel-Prototype CMOS Image Sensor with 0.64μ m Unit Pixels Separated by Full-Depth Deep-Trench Isolation
1.3 Evolution of 5G mobile technology toward 1 2020 and beyond
24.6 An Instantaneously Broadband Ultra-Compact Highly Linear PA with Compensated Distributed-Balun Output Network Achieving >17.8dBm P1dB and >36.6% PAEP1dB over 24 to 40GHz and Continuously Supporting 64-/256-QAM 5G NR Signals over 24 to 42GHz
A multiband 40nm CMOS LTE SAW-less modulator with -60dBc C-IM3
F4: Circuit and system techniques for mm-wave multi-antenna systems
Session 16 overview: Biomedical circuits & systems
A 3GHz Switching DC-DC Converter Using Clock-Tree Charge-Recycling in 90nm CMOS with Integrated Output Filter
A current-measurement front-end with 160dB dynamic range and 7ppm INL
16.6 Double-side CMOS-CNT biosensor array with padless structure for simple bare-die measurements in a medical environment
A 100Gb/s 1.6Vppd PAM-8 Transmitter with High-Swing 3+1 Hybrid FFE Taps in 40nm
A 5.6mV inter-channel DVO 10b column-driver IC with mismatch-free switched-capacitor interpolation for mobile active-matrix LCDs
A 22.3dB Voltage Gain 6.1dB NF 60GHz LNA in 65nm CMOS with Differential Output
A 0.65-to-1.4nJ/burst 3-to-10GHz UWB Digital TX in 90nm CMOS for IEEE 802.15.4a
12.9 A flying-domain DC-DC converter powering a Cortex-M0 processor with 90.8% efficiency
A 3.6mW differential common-gate CMOS LNA with positive-negative feedback
29.4 A 16Gb/s 3.6pJ/b wireline transceiver with phase domain equalization scheme: Integrated pulse width modulation (iPWM) in 65nm CMOS
A 3MHz-BW 3.6GHz digital fractional-N PLL with sub-gate-delay TDC, phase-interpolation divider, and digital mismatch cancellation
The semiconductor industry in 2025
IEEE International Solid-State Circuits Conference, ISSCC 2025, San Francisco, CA, USA, February 16-20, 2025
A tunable integrated duplexer with 50dB isolation in 40nm CMOS
An Adaptively Dividable Dual-Port BiTCAM for Virus-Detection Processors in Mobile Devices
A 365fsrms-Jitter and -63dBc-Fractional Spur 5.3GHz-Ring-DCO-Based Fractional-N DPLL Using a DTC Second/Third- Order Nonlinearity Cancelation and a Probability-Density-Shaping Δ ΣM
A 0.36W 6b up to 20GS/s DAC for UWB Wave Formation
11.5 A 3.2×1.5×0.8mm3 240nA 1.25-to-5.5V 32kHz-DTCXO RTC module with an overall accuracy of µ1ppm and an all-digital 0.1ppm compensation-resolution scheme at 1Hz
A Fully Integrated Cryo-CMOS SoC for Qubit Control in Quantum Computers Capable of State Manipulation, Readout and High-Speed Gate Pulsing of Spin Qubits in Intel 22nm FFL FinFET Technology
A 20Gb/s Forwarded Clock Transceiver in 90nm CMOS B
2.3 A 4.2µs-settling-time 3rd-order 2.1GHz phase-noise-rejection PLL using a cascaded time-amplified clock-skew sub-sampling DLL
A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation
A 77GHz transceiver in 90nm CMOS
Comparator-based switched-capacitor circuits for scaled CMOS technologies
A 28nm high-density 6T SRAM with optimized peripheral-assist circuits for operation down to 0.6V
A Distributed Autonomous and Collaborative Multi-Robot System Featuring a Low-Power Robot SoC in 22nm CMOS for Integrated Battery-Powered Minibots
9.5 A Sub-1V, 50mV Dropout LDO Using Pseudo-Impedance Buffer with Phase-Margin Improvement Design
A Fully Digital 65nm CMOS Transmitter for the 2.4-to-2.7GHz WiFi/WiMAX Bands using 5.4GHz ΔΣ RF DACs
Low Flicker-Noise Quadrature Mixer Topology
A 4.5mW digital baseband receiver for level-A evolved EDGE
A 0.3-to-1.2GHz tunable 4 th -order switched gm-C bandpass filter with >55dB ultimate rejection and out-of-band IIP3 of +29dBm
A 210GHz fully integrated differential transceiver with fundamental-frequency VCO in 32nm SOI CMOS
A 95GHz Receiver with Fundamental-Frequency VCO and Static Frequency Divider in 65nm Digital CMOS
A 13.56MHz fully integrated 1X/2X active rectifier with compensated bias current for inductively powered devices
21.4 A >78%-efficient light harvester over 100-to-100klux with reconfigurable PV-cell network and MPPT circuit
1.3 The development of high-speed DNA sequencing: Jurassic Park, Neanderthal, Moore, and you
A 6.5mW inductorless CMOS frequency divider-by-4 operating up to 70GHz
A 16×16 CMOS Proton Camera Array for Direct Extracellular Imaging of Hydrogen-Ion Activity
34.7 A 28nm 2.4Mb/mm 2 6.9 - 16.3TOPS/mm 2 eDRAM-LUT-Based Digital-Computing-in-Memory Macro with In-Memory Encoding and Refreshing
A 4.5mW Closed-Loop ΔΣ Micro-Gravity CMOS-SOI Accelerometer
13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with tPROG=75µs and tR=4µs
Body area network: Technology, solutions, and standardization
21.1 A 121.7dB DR and -109.0dB THD+N Filterless Digital-Input Class-D Amplifier with an HV Multibit IDAC Using Tri-level Output and Employing a Transition-Rate-Balanced Bidirectional RTDEM Scheme
17.3 A 1.25GHz Fully Integrated DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators
5.8 A 0.50e - rmsNoise 1.45µm-Pitch CMOS Image Sensor with Reference-Shared In-Pixel Differential Amplifier at 8.3Mpixel 35fps
4-Camera VGA-resolution capsule endoscope with 80Mb/s body-channel communication transceiver and Sub-cm range capsule localization
Session 33 Overview: High-Voltage, GaN and Wireless Power Power Management Subcommittee
29.6 A 660-to-676GHz 4×2 Oscillator-Radiator Array with Intrinsic Frequency-Filtering Feedback for Harmonic Power Boost Achieving 7.4dBm EIRP in 40nm CMOS
A 5.5Gb/s 5mm contactless interface containing a 50Mb/s bidirectional sub-channel employing common-mode OOK signaling
13.4 A 1GS/s 6-to-8b 0.5mW/Qubit Cryo-CMOS SAR ADC for Quantum Computing in 40nm CMOS
A tri-band SAW-less WCDMA/HSPA RF CMOS transceiver with on-chip DC-DC converter connectable to battery
An optically programmable SoC for an autonomous mm 3 -sized microrobot
A 0.18μm CMOS Integrated Sensor for the Rapid Identification of Bacteria
Highlights of IEDM 2007