yusuke1997/dblp-id-title huggingface dataset:
Comparison of analytical predictions of the noise floor due to static charge pump mismatch in fractional-n frequency synthesizers
Electronic Nose Comparison of the Edible Amanita Ponderosa with the Deadly Amanita Verna
Die-level photolithography and etchless parylene packaging processes for on-CMOS electrochemical biosensors
3D computational graceful degradation
An Adaptive Metric for Node Substitution-Based BDD Minimization
Current mirror array: A novel lightweight strong PUF topology with enhanced reliability
Image intensity conversion via cellular neural networks
A DC current measurement circuit for on-chip applications
Exploration of Generative AI tools for an Electric Circuits Course
Efficient Prototyping System Based on Incremental Design and Module-by-Module Verification
Graphical DC analysis of three-phase PWM converters using a complex transformation
Recent results on the prediction of EEG signals in epilepsy by discrete-time cellular neural networks (DTCNN)
CNN-based real-time video detection of plasma instability in nuclear fusion applications
Arabitrarily Shaped Cell Placement by Three-Layer Self-Organizing Neural Networks
A Scalable and PVT Invariant Spiking Neuron Using Asynchronous CMOS Logic
Sense Amplifier Power and Delay Characterization for Operation under Low-Vdd and Low-voltage Clock Swing
Subharmonically injection-locked PLL with variable pulse-width injections
A secure test solution for sensor nodes containing crypto-cores
Nyquist-rate time-interleaved current-steering DAC with dynamic channel matching
A K-Band Eight-Element Dual-Beam Receiver With Current-Sharing-Based Low-Power Technique for LEO SATCOM in 65-nm CMOS
A fault tolerant hardware based file system manager for solid state mass memory
Multi-GHz energy-efficient asynchronous pipelined circuits in MOS Current Mode Logic
Configurable VLSI-architectures for both standard DCT and shape-adaptive DCT in future MPEG-4 circuit implementations
A short tutorial on network calculus. I. Fundamental bounds in communication networks
A Novel Propagation Model Coupling the Offline Network with Online Social Network Framework
Class-AB rail-to-rail CMOS analog buffer
A bio-inspired closed-loop insulin delivery based on the silicon pancreatic beta-cell
Robust Voiced/Unvoiced Speech Classification with Self-Organizing Maps
Lobe asymmetry-based automatic classification of brain magnetic resonance images
Sample Preparation with Free-Flowing Biochips using Microfluidic Binary-Tree Network
Visual Pattern Recognition with on On-Chip Learning: Towards a Fully Neuromorphic Approach
Analytical design of fractional Hilbert transformer using fractional differencing
Hybrid ΔΣ Programmable Phase/Frequency Detector for IoT Chipsets
A resonant pad for ESD protected narrowband CMOS RF applications
Reconfigurable DSP block design for dynamically reconfigurable architecture
Bio-inspired nano-photodiode for Low Light, High Resolution and crosstalk-free CMOS image sensing
A 65-nm 738k-Synapse/mm 2 Quad-Core Binary-Weight Digital Neuromorphic Processor with Stochastic Spike-Driven Online Learning
1-99% input duty 50% output duty cycle corrector
A novel approach based on genetic algorithm for pipelining of recursive filters
QFT control for DC-DC buck converters
FPGA based accelerator for functional simulation
A 1.6V 10-Bit 20MHz Current-Mode Sample and Hold Circuit
Device level based cell modeling for fast power estimation
A Parallel Event-Driven MOS Timing Simulator on Distributed-Memory Multiprocessors
A Digital Non-Foster VHF Radio Approach for Enabling Low-Power Internet of Things
Content-adaptive Variable Resolution Framework for Intra Coding
A multi-core memristor chip for Stochastic Binary STDP
A reconfigurable and deadlock-free routing algorithm for 2D Mesh Network-on-Chip
Deep Recurrent Neural Networks for Building-Level Load Forecasting
Power Side-Channel Attack Detection through Battery Impedance Monitoring
A multilevel fingerprinting method for FPGA IP protection
Signal conditioning for Fabry-Perot sensor
A constant-throughput LLL algorithm with deep insertion for LR-aided MIMO detection
Detection of Physiological Data Tampering Attacks with Quantum Machine Learning
Current-mode non-linear building blocks based on floating-gate transistors
An automatic clock tree design system for high-speed VLSI designs: planar clock routing with the treatment of obstacles
Impact of process variations on computers used for image processing
A filter free class D audio amplifier with 86 power efficiency
Low sensitivity single-ended-input OTA and grounded capacitor elliptic filter structure with the minimum components
All-Polymer Integrated Circuit for Monitoring the X-Ray Checking History of Luggages
Novel pattern-based power estimation tool with accurate glitch modeling
A Comparative Study of Switching Activity Reduction Techniques for Design of Low-Power Multipliers
A Modified Two-Stage Cascaded Hybrid Converter with Reduced Conduction Loss, Self-Balanced Flying Capacitors and Simplified Interleaving PWM
Symbolic network analysis with the valid trees and the valid tree-pairs
A self calibration technique for tunable continuous-time bandpass delta-sigma modulators
45nm Low-power Embedded Pseudo-SRAM with ECC-based Auto-adjusted Self-refresh Scheme
SAR ADC using single-capacitor pulse width to analog converter based DAC
Design and implementation of a 16 by 16 low-power two's complement multiplier
A digitally programmable ring oscillator in the UWB range
On the effects of zero-pole pairs and individual zeros and poles on discrete-time transfer functions
A New Blocking Scheme for Transform Coding of Multidimensional Signals
Maximal cycle length of pseudochaotic sequences generated by piecewise linear maps
A real-time architecture for reference frame compression for high definition video coders
A Wide-Range ISFET Readout Circuit with Low-Power Linearity Enhancement
Design of Hybrid Dual-Path DC-DC Converter with Wide Input Voltage Efficiency Improvement
Novel voltage-regulating circuit for low-voltage and low-power OTA realization using MOSFETs in the non-saturation region
Speech enhancement based on adaptive wavelet denoising on multitaper spectrum
Reliability-Improved Read Circuit and Self-Terminating Write Circuit for STT-MRAM in 16 nm FinFET
A Motion-compensated Spectrum-adaptive Deinterlacing Algorithm
VLSI implementation of a sequential Monte Carlo receiver
A foveated AER imager chip [address event representation]
A Dynamic Biasing Circuit for Low-Power Push-Pull Input Buffer
Average rate behavior for cooperative diversity in wireless networks
gm/ID Design Considerations for Subthreshold-Based CMOS Two-Stage Operational Amplifiers
S 2 I : A Two-step Approach to Switched-Currents
On the Reduction of Recorder Buffer Size for Discrete Fourier Transform Processor Design
Neural Learning by Retractions on Manifolds
A Design of DC Offset Canceller using Parallel Compensation
A Programmable Continuous-time Filter
Cryo-CMOS 0.432mW UHF Filter for Scalable Quantum Computing in 22nm FD-SOI Technology
Towards the Development of Analog Neuromorphic Chip Prototype with 2.4M Integrated Memristors
High Power-supply Rejection Low Drop-out Regulator
A low latency asynchronous Jenkins hash engine for IP lookup
Fast neural networks for sub-matrix (object/face) detection
Novel Circuit Synthesis Technique Using Short Channel GaAs Fets Giving Reduced Intermodulation Distortion
Efficient DNA-Based Image Coding and Storage
Design of programmable FIR filters using Canonical Double Based Number Representation
Insertion-Based Procedural Construction and Optimization of Parallel Prefix Adders
Adversarial Label Flipping Attack on Supervised Machine Learning-Based HT Detection Systems
Efficient Sensitivity Analysis for Large Non-idel Switched Capacitor Netowrks
Area-optimized FPGA implementation of a digital FM modulator
An adaptive routing algorithm for load balancing in communication networks
A performance-driven configurable motion estimator for full-search block-matching algorithm
Image-based rendering of ancient Chinese artifacts for multi-view displays - a multi-camera approach
A Super Fast & Memory Efficient Diagnostic Simulation Algorithm for Combinatorial Circuits
How do you Perceive Differently from an AI - A Database for Semantic Distortion Measurement
Higher-Order Delta-Sigma Frequency to Digital Conversion
Complete parametrization of synthesis in multidimensional perfect reconstruction FIR systems
Live demonstration: XbarSim: An educational simulation tool for memristive crossbar-based circuits
A novel peripheral circuit for RRAM-based LUT
Digitally Controlled 10-Gb/s Adjustable Delay Line for Adaptive Filter Design in standard CMOS Technology
Charge-conserved analog-to-time converter for a large-scale CMOS biosensor array
Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000
Exact design of all-MOS log filters
Relaxation-Based Steady-State Analysis of Single- and Multi-Conductor Transmission Lines in Frequency Domain
Exploring the Impact of Soft Errors on NoC-based Multiprocessor Systems
A 110 dB CMRR/PSRR/gain CMOS operational amplifier
A hybrid segmentation and block processing algorithm for low power implementation of digital filters
PrSoC: Programmable System-on-chip (SoC) for silicon prototyping
A 145-ns Response Time High-Side Current Sense for a 100-V Monolithic GaN Half Bridge
Low-cost low-power bypassing-based multiplier design
Fast scalable radix-4 Montgomery modular multiplier
HomSSPICE: a homotopy-based circuit simulator for periodic steady-state analysis of oscillators
Cellular Neural Networks: the Analogic Microprocessor?
An algorithm for predicting the steady state behavior of binary CNNs
Mixed-Precision Quantization of U-Net for Medical Image Segmentation
TSK-fuzzy controller design for a PWM boost DC-DC switching regulator operating at different steady state output voltages
Compact and provably secure lattice-based signatures in hardware
An asynchronous spike event coding scheme for programmable analog arrays
Design of Precise Gain GmC-leapfrog Filters
Variable frame rate transcoding considering motion information [video transcoding]
On the design of reflecting intelligent surfaces for multi-user NOMA communication networks
Area and power efficient trellis computational blocks in 0.13µm CMOS
Quasi Class-DE Driving of HIFU Transducer Arrays
A noise-shaping accelerometer interface circuit for two-chip implementation
An Improved Fast Transient Response Low Dropout Voltage Regulator
25-Gbps×4 optical transmitter with adjustable asymmetric pre-emphasis in 65-nm CMOS
A new frequency-response masking structure with reduced complexity for FIR filter design
A pseudo-online Brain-Computer Interface with automatic choice for EEG channel and frequency
Subpixel rendering without color distortions for diamond-shaped PenTile displays
Analysis of the operation of a regenerative electrostatic energy harvester
Gated Ring Oscillator Time Amplifier with Pico-Second Sensitivity and Applications in All-Digital Variable-Gain Time Integrator
A 16-bit Single-Slope based Pixel-level ADC for 15μm-pitch 640×512 MWIR FPAs
1000BASE-T Gigabit Ethernet baseband DSP IC design
A grid-based detailed routing algorithm for advanced 1D process
A 1-V, 5-Bit, 180-µW, Differential Pulse Position Modulation ADC in 65-nm CMOS Process
Multiplier blocks using carry-save adders
Quantitative method for estimating characteristics of conductive filament in ReRAM
RRAM-based TCAMs for pattern search
A multimodal adaptive wireless control interface for people with upper-body disabilities
Stacked Transconductance Boosting for Ultra-Low Power 2.4GHz RF Front-End Design
Screen-printed planar metallization for lab-on-CMOS with epoxy carrier
A power-optimized joint source channel coding for scalable video streaming over wireless channel
Demonstration of versatile nonvolatile logic gates in 28nm HKMG FeFET technology
Live Demonstration: Real-Time High-Amplitude Signal Acquisition with 2-Channel Modulo ADC
Real time operating system modeling in a system level design environment
A 0.5-30GHz wideband differential CMOS T/R switch with independent bias and leakage cancellation techniques
New CMOS Differential Logic Circuits for True-Single-Phase Pipelined Systems
Leakage-based On-Chip Thermal Sensor for CMOS Technology
Stick-slip oscillations in resonant power converters
Finite element modeling of tissue for optimal ultrasonic transducer array design
A 12-bit 40-MS/s calibration-free SAR ADC
Nonlinear Exact Analysis and Solution of Power Stage of DC-DC PWM Boost Converter
A 0.002-mm 2 , 2.9-μW Pulse-Frequency-Modulation based Temperature Sensor with 40-mK Resolution
One step Backpropagation Through Time for learning input mapping in reservoir computing applied to speech recognition
A vector processor for 3-D geometrical transformations
SRIF: Energy- and Area-Efficient Soft Reset Integrate-and-Fire Neuron for High-Accuracy Spiking Neural Network
A Hardware-Friendly Neuromorphic Spiking Neural Network for Frequency Detection and Fine Texture Decoding
A scalable BSIM3v3 RF model for multi-finger NMOSFETs with ring substrate contact
Classification of Rotated and Scaled Textures by Local Linear Operations
Always-on CMOS image sensor pixel design for pixel-wise binary coded exposure
Variable delay ripple carry adder with carry chain interrupt detection
Design of highly linear multipliers using floating gate transistors and/or source degeneration resistor
An Efficient Identification Algorithm for FIR Filtering with Noisy Data
An Improved Direction-of-arrival Estimation via Phase Information of Sparse Solution
2.4-GHz 16-QAM Passive Backscatter Transmitter for Wireless Self-Power Chips in IoT
A low phase noise 8.8 GHz VCO based on ISF manipulation and dual-tank technique
Analysis of a simple A/D converter with a trapping window
A Novel Stripe Extraction Scheme for the Multi-Line Structured Light Systems
Implementation and performance analysis of programmable test beds for real-time wireless W-CDMA
A Wideband GaN HEMT Modelling with Comprehensive Hybrid Parameter Extraction for 5G Power Amplifiers
Systems Engineering of Cryogenic CMOS Electronics for Scalable Quantum Computers
Reducing misses to external memory accesses in task-level pipelining
A Generalized Heat Kernel Smoothing Filter for Signal Denoising over Graph
Switched-capacitor based step-up converter for alternative energy applications
A dual-mode low-distortion sigma-delta modulator with relaxing comparator accuracy
Design of Low-power Analog Circuits in Advanced Technology Nodes using the $G_{m}/I_{D}$ Approach
A hierarchy of physical design watermarking schemes for intellectual property protection of IC designs
A confidence measure based moving object extraction system built for compressed domain
High capacity lossless data hiding based on integer wavelet transform
A Continuous-Time Field Programmable Analog Array Using Parasitic Capacitance Gm-C Filters
Model-compiler based efficient statistical circuit analysis: an industry case study of a 4 GHz/6-bit ADC/DAC/DEMUX ASIC
A full-differential analog design of an indirect inverse control law based on neural networks
2.5GS/s, 8-9 ENOB, 8-12.7 fJ/Conversion Differential T/H Amplifier for Gigabit Radio
Wide-band efficiency-enhanced CMOS rectifier
Quantization noise in the first-order non-feedback delta-sigma modulator with DC-input
Using Greedy-Enhanced Heuristic to Optimize Instruction Scheduling for RISC-V DS
Application of the two dimensional frequency domain least squares algorithm to airborne surveillance radar detection
A 1.92mW 1.6-to-3.2GHz Third-Harmonic Blocker-Tolerant Receiver Front-End Using Dual Current-Reuse N-Path LNA and Band-Switchable Balun
CMOS exponential current-to-voltage circuit based on newly proposed approximation method
Independent-Gate P-Type TFETs using Double Heterojunction Structures
Switched Capacitor Variable Delay Line
A 0.5V, pico-watt, 0.06%/V / 0.03%/V low supply sensitive current/voltage reference without using amplifiers and resistors
Towards Accelerating Assertion Coverage Using Surrogate Logic Models
XML-driven Exploitation of Combined Scalability in Scalable H.264/AVC Bitstreams
Delta-Measurement Low-Power SAR ADC Architecture with Adaptive Threshold-First Switching
Neural Synaptic Plasticity-Like Computing: An Ultra-Low Cost Approach for Artificial Neural Networks Implementation
Minimax design and order estimation of FIR filters for extending the bandwidth of ADCs
An experimental study on pedestrian classification using local features
Norm and coefficient constraints for robust adaptive beamforming
Chaos in cross-coupled BVP oscillators
A 14 bit, 1 GS/s digital-to-analog converter with improved dynamic performances
Fuzzy Logic Functions Synthesis - A CMOS Current Mirror Based Solution
Live Demonstration: Cloud-based Audio-Visual Speech Enhancement in Multimodal Hearing-aids
Analog Design optimization by means of a Tabu Search Approach
A clock gated flip-flop for low power applications in 90 nm CMOS
Statistical modeling of program and read variability in resistive switching devices
An adaptive Bernoulli-Gaussian model based maximum-likelihood channel equalizer for detection of binary sequences
On cyclic fold bifurcations in nonlinear systems
Noise Analysis of Multiplicative Distributed Amplifiers
LoSeVO: Local Sequence Constraints for Deep Visual Odometry
A biomedical SoC architecture for predicting ventricular arrhythmia
Pole-zero tracking frequency compensation for low dropout regulator
Networked Vehicles for Automated Fault Detection
Quantum Machine Learning: An Interplay Between Quantum Computing and Machine Learning
Delays in PWM control loops imply discontinuity in sampled data models of power electronic circuits
Live Demonstration: Electroforming of TiO2-x Memristor Devices using High Speed Pulses
Design of low-voltage CMOS pipelined ADCs using 1 pico-Joule of energy per conversion
3D dynamical networks to emulate complex neural phenomena
Dynamic Damping in Transimpedance Amplifiers
A Sub-aF Super-High-Resolution Capacitance-to-Digital Converter with a Bandpass ΔΣ ADC
Wideband Linear-phase FIR Differentiators Utilizing Multirate and Frequency-response Masking Techniques
Novel low cost and DNU online self-recoverable RHBD latch design for nanoscale CMOS
Design and properties of step-like weighting windows
A Low Power SAW-less 2.4-GHz Receiver with an LC Matched Series N-path Filter
On the Development of a Fully Integrated Shuttling Controller System on Chip for Trapped-Ion Quantum Computing
A power scalable 6-bit 1.2GS/s flash ADC with power on/off Track-and-Hold and preamplifier
Flexible IME instruction and its architecture for various fast ME algorithms
A power efficient register file architecture using master latch sharing
Enhanced Efficient Diamond Search Algorithm for Fast Block Motion Estimation
A data reusing architecture for MPEG video coding
A Synthesis Friendly Dynamic Amplifier with Fuzzy-Logic Piecewise-Linear Calibration
A remote FPAA system for research and education
Semi-parallel rank-order filtering in analog VLSI
On the design of a neural network chip for control applications
Low power receiver for magnetic digestive motility tracking pill
Least squares-based lossless image coding with edge-look-ahead
Quadrature Mismatch Shaping Techniques for Fully Differential Circuits
Complex discriminative learning Bayesian neural equalizer
Dynamic Spatial-Temporal Graph Attention Graph Convolutional Network for Short-Term Traffic Flow Forecasting
A 13-bit, low-power, compact ADC suitable for sensor applications
A SVR based quality metric for depth quality assessment
Statistical screening for IC Trojan detection
A 1.8V, 10-bit, 40MS/s MOSFET-only pipeline analog-to-digital converter
Error resilient hybrid variable length codec with tough error synchronization for wireless image transmission
A 775-µW/fps/view H.264/MVC decoder chip compliant with 3D Blu-ray specifications
Integrated Cold-Start of a Boost Converter at 54mV Using a Two-Stage Capacitive Voltage Multiplier
VLSI architecture of the reconfigurable computing engine for digital signal processing applications
Implementation of a 2D motion vector detection on image sensor focal plane
Efficient Algorithms for the Calculation of Arithmetic Spectrum from OBDD & Synthesis of OBDD from Arithmetic Spectrum for Incompletely Specified Boolean Functions
A quadrature sampling scheme with improved image rejection for complex-IF receivers
Stability of a three cell cellular neural network
Open-ended design and performance evaluation of a biometric speaker identification system
Cost Effective Signal Generators for ADC BIST
A Programmable Differential Bandgap Reference for Ultra-Low-Power IoT Edge Node Devices
Phase and amplitude dynamics of noisy oscillators described by Itô stochastic differential equations
Simulated annealing of neural networks: The 'cooling' strategy reconsidered
Regions of global asymptotic stability in coefficient-space for linear time-variant discrete-time systems
Low-power IC design for a wireless BCI system
Implementation of enhanced CDMA utilizing low complexity joint detection with iterative processing
ISFET Array In-Pixel Computation for Classification of Nucleic Acid Amplification
Enhancing Circuit Authentication through Secure Isolation
Macroblock-based algorithm for dual-bitstream MPEG video streaming with VCR functionalities
Does the Maximum Stable Amplitude depend on Reconstruction Filters in Incremental ∆Σ ADCs?
Improved Energy Efficiency for Ferroelectric FET Non-Volatile Memory using Split-Gate Design
A high-speed RSD adaptive filter architecture with a fast carry-free SPT converter
A low-complexity dynamic element matching technique for reduced-distortion digital-to-analog conversion
A 3.4-mW 128-MHz analog correlator for DS-CDMA wireless applications
A Timing Model for VLSI CMOS Circuits Verification and Optimization
A 0.45-V Low-Power Image-Rejection Low-Noise Amplifier in 0.18-μm CMOS Technology
Live demonstration: Real-time motor rotation frequency detection by spike-based visual and auditory AER sensory integration for FPGA
Fast and Area-Efficient SRAM Word-Line Optimization
Histogram-shape preserving algorithm for image enhancement
Tunable $LC$ resonator for multiplexed multi-qubit readout
An interpolation filter based on spline functions for non-synchronized timing recovery
Optimal Nonrecursive Noise Shaping Filters for Oversampling Data Converters Part 1: Theory
Attention-driven PCM-based In-Memory Computing for Smart Vision Systems
A novel approach to statistical simulation of ICS affected by non-linear variabilities
A 538Mbps 2×64 Spatial Permutation Modulation Detector for MIMO Systems
A 36 GHz Bandwidth, High Linear, Low Power, Driver Modulator, in 28 nm CMOS Technology Based on Quantized-Analog Signal Processing
Belief propagation decoding of polar codes using stochastic computing
Blind identification of second-order statistics using periodic Toeplitz system
Live Demostration: Low Power Vision Sensor with Robust Dynamic Background Rejection
CMOS LNA for DTV-Band Cognitive Radio Applications
Short periodic orbits and topological entropy for the Chua's circuit
Timing speculative SRAM
PPFPS - a paraboloid prediction based fractional pixel search strategy for H.26L
Power characterization of digital filters implemented on FPGA
All-Digital Calibration Algorithms to Correct for Static Non-Linearities in ADCs
Behavioral macromodeling of analog LSI implementation for automobile intake system
A low-voltage charge pump with improved pumping efficiency
Sparse functional link adaptive filter using an ℓ 1 -norm regularization
A low-voltage, low power STDP synapse implementation using domain-wall magnets for spiking neural networks
DCT-based video frame-skipping transcoder
The current-feedback OTA
Context based lossless intraframe coding of video sequence using embedded zerotree wavelets
Ultra-Low-Voltage, Low-Power, High-Speed Operational Amplifiers Using Body-Driven Gain-Boosting Technique
Heavy Ball based Hard Thresholding Algorithms for Multiple Measurement Vectors
A set of independent admittance bases for decoupled analysis of unbalanced three-phase systems
Scalable implementation of H.263 video encoder on a parallel DSP system
Fractional spur suppression in all-digital phase-locked loops