yusuke1997/dblp-id-title huggingface dataset:
Allowable depth distortion based depth filtering for 3D high efficiency video coding
Inductive coupling effects in large TSV arrays
Variable resolution CMOS current mode active pixel sensor
An asynchronous finite state machine controller for integrated buck-boost power converters in wideband signal-tracking applications
Switching activity reduction in low power Booth multiplier
Analysis and design of a 1.3-mW current-reuse RF front-end for the MICS band
On the capability of neural networks with complex neurons in complex valued functions approximation
Three-phase active power filter under unbalanced condition
An Approach to Testability Improvement of Mixed-Signal Boards
An interconnect optimized floorplanning of a scalar product macrocell
A hardware efficient 3-bit second-order dynamic element matching circuit clocked at 300MHz
Quadrature-DAC based pulse generation for UWB pulse radio transceivers
Efficient Approximation of Symbolic Network Function Using Matroid Intersection Algorithms
Adaptive Design for Nanometer Technology
Selecting better EEG channels for classification of mental tasks
Low-complexity architectures for reliability-based message-passing non-binary LDPC decoding
Using template matching and compressed sensing techniques to enhance performance of neural spike detection and data compression systems
Noise equivalent circuit for nonlinear resistors
A Methodology for Automatic Generation of Data Conversion Topologies from Algorithms
The zero structure of nD linear systems
BiCMOS current conveyor: design and application
A run-time adaptive multiprocessor system
A W-band LNA in 0.18-μm SiGe BiCMOS
GECO: A Tool for Automatic Generation of Error Control Codes for Computer Applications
A folded floating-gate differential pair for low-voltage applications
Macromodel for short circuit power dissipation of submicron CMOS inverters and its application to design CMOS buffers
Performance of the Open-Circuit Voltage MPPT Technique for Piezoelectric Vibration Harvesters
On the efficient wireless power transfer in resonant multi-receiver systems
Modulation of LED Photo-Luminescence for Underwater Optical Communications
Active nuclear magnetic resonance probe: A new multidiciplinary approach toward highly sensitive biomolecoular spectroscopy
An efficient soft decision-directed algorithm for blind equalization of 4-QAM systems
Measurement and SPICE prediction of sub-picosecond clock jitter in A/D converters
A new algorithm for howling detection [acoustic feedback howling]
High-Level Estimation of High-Performance Architectures for Reed-Solomon Decoding
A Systematic Approach of Statistical Modeling and Its Application to CMOS Circuits
Ultra low-voltage floating-gate transconductance amplifier with tunable gain and linearity
Subband Coding of Video Using Adaptive Quantization
A fully integrated 26 dBm linearized RF power amplifier in 65nm CMOS technology
An integrated circuit solution of thermal noise thermometer with cascaded pre-amplifier and 6-bit resolution analog-to-digital converter
An all-lag rotating-reference correlator and its efficient implementation
EEG Emotion Recognition Based on Dynamic Graph Neural Networks
Ripple-based power-line communication in switching DC-DC converters exploiting switching frequency modulation
Performance Analysis of Underwater Optical Wireless Video Communication Systems
Capacitive coupling of data and power for 3D silicon-on-insulator VLSI
Hardware Accelerator for Wearable and Portable Radar-Based Microwave Breast Imaging Systems
A 1.3μW 0.7μVRMS chopper current-reuse instrumentation amplifier for EEG applications
Classification-Based False Alarm Suppression for SAR Target Detection
VHF Bandpass Filter Design Using CMOS Transresistance Amplifiers
Log-domain wavelet bases
An Approach to Integrated Numerical & Symbolic Circuit Analysis
Memory and computation reduction for least-square channel estimation of mobile OFDM systems
Masking Based Protection Mechanism for Ascon against CPA Attack
High speed road boundary detection on the images for autonomous vehicle with the multi-layer CNN
. Analog slice turbo decoding
Circuit area optimization in energy temporal sparse scenarios for multiple harvester powered systems
Comparison and analysis of phase noise in ring oscillators
A FPGA-based Energy-Efficient Processor for Radar-based Continuous Fall Detection
Customized Posit Adders and Multipliers using the FloPoCo Core Generator
An Arbiter PUF employing eye-opening oscillation for improved noise suppression
Domino logic with an efficient variable threshold voltage keeper
An Efficient NB-LDPC Decoding Algorithm for Next-Generation Memories
Spatial error concealment with adaptive linear predictor
A Fast Radix-4 Division Algorithm
Analysis-based adaptive wavelet filter selection in lossy image coding schemes
A Low-Input Capacitance 12-bit SAR ADC for use in Self-Powered IoT Nodes
Radial Basis Function Neural Network as Predictive Process Control Model
Memristor-based devices for sensing
Recognition of Acoustical Alarm Signals for the Profoundly Deaf Using Hidden Markov Models
High-speed hardware implementations of the KASUMI block cipher
Numerical word-length optimization for CDMA demodulator
A novel I/Q mismatch compensation scheme for a low-IF receiver front-end
Live demonstration: FPGA-based real-time acoustic camera prototype
A MEMS custom micropackaging solution
An arbitrary kernel convolution AER-transceiver chip for real-time image filtering
Artificial neural networks as rain attenuation predictors in earth-space paths
A Novel Interference Supression Technique employing Complex Adaptive ICA for Time-Varying Channels in Diversity Wireless QAM Receivers
Carbon-based sleep switch dynamic logic circuits with variable strength keeper for lower-leakage currents and higher-speed
A 50 Gb/s Rad-Hard Quad TIA IC for Onboard Satellite Interconnects
PCA application to frequency reduction for fault diagnosis in analog and mixed electronic circuit
A Sequence-Dependent Configurable PUF Based on 6T SRAM for Enhanced Challenge Response Space
GPE: A High-Performance Edge GNN Inference Processor with Multi-Parallelism Format-Variation Mechanism
A novel design using translinear circuit for linear LINC transmitters
A Low-Energy Spiking Neural Network Architecture for Reinforcement Learning toward Classification Tasks at the Edge
Generalized energy functions for a class of lossy networking preserving power system models
Silicon-on-insulator (SOI) integration for organic field effect transistor (OFET) based circuits
Filter bank design for an adaptive subband structure with critical sampling using a new adaptation scheme
A 4-Bits Trimmed CMOS Bandgap Reference with an Improved Matching Modeling Design
Effect of Capacitor Mismatch Nonlinearity on Inference Accuracy in Analog Compute-in-Memory Architectures
CARIOCA-0.25 Sigma-Delta CMOS fast binary front-end for sensor interface using a novel current-mode feedback technique
Gigascale System Design of Sensor Networks for Active Volcanoes
A General Noncoherent Chaos-Shift-Keying Communication System and its Performance Analysis
Ultra low voltage static carry generate circuit
Nyquist criterion based design of continuous time Sigma Delta modulators
A 5 MHz Nyquist rate continuous-time sigma-delta modulator for wideband wireless communication
A novel voltage-control scheme for low-voltage DC-DC converters with fast transient recovery
A novel low gate-count serializer topology with Multiplexer-Flip-Flops
A Robust DC-DC Converter with Negative Voltage Bootstrapping Using Low-Temperature Poly-Si Oxide TFTs for Fully Flexible Circuits
Blind broadband source localization and separation in miniature sensor arrays
A first implementation of a semi-analytically designed class-E resonant DC-DC converter
Lumped element model approach for the bandwidth enhancement of coupled microstrip antenna
Global-Local Similarity for Efficient Fine-Grained Image Recognition with Vision Transformers
Introducing TFUE: The trusted foundry and untrusted employee model in IC supply chain security
Synthesis of dynamic multiple-input translinear element networks
Statistical sensitivity and minimum sensitivity structures of 2-D separable-denominator digital filters
Triple-rail MOS current mode logic for high-speed self-timed pipeline applications
Semi-fragile watermarking for text document images authentication
C 4 band-pass delay filter for continuous-time subband adaptive tapped-delay filter
Rapid Diagnostics for Colorectal Cancer using Lab-on-Chip Technology with Machine Learning
A Fast Transient FVF LDO With Improved Gate Buffer and Level Triggered Transient Enhancement Circuit in 22 nm process
A scalable sorting architecture based on maskable WTA/MAX circuit
SFFTNet: Sparse Feature Fusion Transformer Network for Image Deblurring
Ripple Suppression of On-Chip Switched-Inductor Power Supplies
Bit level architectural exploration technique for the design of low power multipliers
Area-time optimal adder with relative placement generator
A very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal
A new approach to design of two-channel filter banks with PR and low-delay
EEG Measurements with Compressed Sensing Utilizing EEG Signals as the Basis Matrix
Fast Logic Optimization Using Decision Trees
The design of high efficiency energy receiving coil for micro-ball Endoscopy
Hardware complexity of a correlation based background DAC error estimation technique for sigma-delta ADCs
Implementation aspects of the DPA-resistant logic style MDPL
An Evaluation Study of Various Excitation Signals for Electrical Impedance Spectroscopy
Nonlinear analysis of multi-converter power systems for microgrids
A Wide-Range Highly Power Efficient RF-to-DC Rectifier for RF Energy Harvesting Systems
Eigenvector algorithms using reference signals for blind source separation of instantaneous mixtures
Bio-plausible Learning-on-Chip with Selector-less Memristive Crossbars
A 12 Bit 500 MS/s Sub-2 Radix SAR ADC for a Time-Interleaved 8 GS/s ADC in 28 nm CMOS
Fast Design Algorithms for FIR Notch Filters
Analysis of IC Op-Amp Power-Supply Current Sensing
Live demonstration: Behavioural emulation of event-based vision sensors
An image representation based on planar patches and the local adjustment technique
A reconfigurable bidirectional active 2 dimensional dendrite model
A matrix-based algorithm for the CLS design of centrally symmetric 2-D FIR filters
A 1V fully differential CMOS LNA for 2.4GHz application
A CCCS for High Frequency Filters
Sub-ppm/°C High Performance Voltage Reference
Composite Optimization for Electromigration Reliability and Noise in Power Grid Networks
Optimal Design of 6.78 MHz Wireless Power Transfer System for Robot Arm
A new non-uniform segmentation and addressing remapping strategy for hardware-oriented function evaluators based on polynomial approximation
A current-mode circuit for fuzzy partition membership functions
Convergence improvements of the harmonic balance method
Live Demonstration: CNN Inference on the Focal Plane with a Pixel Processor Array
Research Experiences for Teachers on Chip Design
ESFLOW: Mapping Large-Scale Earthquake Simulation to Spatial Computing Systems
A CMOS clock and data recovery with two-XOR phase-frequency detector circuit
Robustness analysis of a decision feedback generalized sidelobe canceller
An efficient DCT-IV-based ECG compression algorithm and its hardware accelerator design
Hyperbolic tangent passive resistive-type neuron
A Reconfigurable Fused Multiply-Accumulate For Miscellaneous Operators in Deep Neural Network
A Variable Dimension Newton Method
Perfect shuffling for cycle efficient puncturer and interleaver for software defined radio
Highly linear wide tuning range CMOS transconductor operating in moderate inversion
An energy-efficient reconfigurable angle-rotator architecture
A random-valued impulse noise detector using level detection
The effect of correlated level shifting on noise performance in switched capacitor circuits
On neuromorphic spiking architectures for asynchronous STDP memristive systems
Design of non-linear multi-resolution decompositions with applications to image compression
A Novel Digital Pixel Sensor System
Adaptive Pre-Distortion of Nonlinear Systems Using Out-of-Band Energy Minimization
A 6.5-to-8GHz IEEE 802.15.4z-compliant All-Digital UWB Transmitter with Integrated Fast-Settling Master-Slave Regulator
A constant-Q spectral transformation with improved frequency response
Distributed neurochemical sensing: in vitro experiments
A 21pJ/Bit Secured Baseband Processing ASIC for Wireless Body Area Networks
An efficient blood vessel detection algorithm for retinal images using local entropy thresholding
A unified matrix method for systematic synthesis of log-domain ladder filters
Performance Study of Peer-to-peer Video Streaming on Complex Networks
Internet packet traffic congestion
Lower-bound estimation for multi-bitwidth scheduling
Monitoring of repeated head impacts using time-dilation based self-powered sensing
Ramp voltage supply using adiabatic charging principle
Design of a variable-delay window ADC for switched-mode DC-DC converters
Look Ahead CLS in Pipelined SAR ADCs
Design of high-speed bit-serial divider in GF(2 m )
Efficient ROM size reduction for distributed arithmetic
A low power charge sharing ROM using dummy bit lines
Multi-Rate Layered Decoder Architecture for Block LDPC Codes of the IEEE 802.11n Wireless Standard
Performance comparison of quantum-dot cellular automata adders
The design of a chopped current-feedback instrumentation amplifier
Design of a Novel High-Efficiency Class-F/E Power Amplifier
Xetal: a low-power high-performance smart camera processor
BVI-CR: A Multi-View Human Dataset for Volumetric Video Compression
Theory and implementation of a new type of digital power amplifier for audio applications
Stability and Efficiency of Explicit Integration in Interconnect Analysis on GPUs
A Hybrid Thin-film/CMOS Fluorescence Contact Imager
An improved cellular automata-based BIST architecture for sequential circuits
A reconfigurable FFT architecture for variable-length and multi-streaming OFDM standards
High throughput multitransform and multiparallelism IP for H.264/AVC video compression standard
A 2.45 GHz Dual-Path CMOS RF-to-DC Rectifier with 27 dB Input Range and -20.7 dBm Sensitivity
Modeling of accumulation MOS capacitors for high performance analog circuits
An ultra-low-power micro-optoelectromechanical tilt sensor
A low-voltage fully-differential current-mode analog CMOS integrator using floating-gate MOSFETs
Stability Analysis of 6T SRAM at Deep Cryogenic Temperature for Quantum Computing Applications
Dynamic element matching in low oversampling delta sigma ADCs
Quantum dot networks with weighted coupling
Centroiding and classification of objects using a processor array with a scalable region of interest
Multi-output passive digital filters
A 10-bit 50-MS/s SAR ADC for dual-voltage domain portable systems
Pulse-width modulation in sigma-delta modulators
Power-Efficient Cyclic Voltammetric Electrochemical Sensing Readout Circuitry with Current-Reducer Ramp Waveform Generation
Lloyd-Max quantization-based priority index assignment for the scalable extension of H.264/AVC
A hyperspectral reconstruction algorithm based on a Mask-free dual-camera
Stability analysis of multiple equilibria for recurrent neural networks with time-varying delays
Fast multi-block selection for H.264 video coding
A Fourier series-based RLC interconnect model for periodic signals
Advanced Encryption Standard (AES) implementation with increased DPA resistance and low overhead
Input isolated sense amplifiers
Analytical approach for the exact phase noise analysis of oscillators
Design Automation and Optimization of Reflective Type Lumped Element Phase Shifters
Energy-efficient skewed static logic design with dual Vt
An energy-efficient charge recycling approach for a SAR converter with capacitive DAC
An Autonomous Wireless Transmitter with Piezoelectric Energy Harvester from Short-Duration Vibrations
Gradient Local Binary Patterns for human detection
Dual use of power lines for data communications in a system-on-chip environment
Low-power FFT design for NC-OFDM in cognitive radio systems
Active reversed nested Miller compensation for three-stage amplifiers
An Integrated 200MHz 4A Pulsed Laser Driver with DLL-Based Time Interpolator for Indirect Time-of-Flight Applications
Cellular-Neural-Network Focal-Plane Processor as Pre-Processor for ConvNet Inference
An energy-efficient interface for resonant sensors based on ring-down measurement
Efficient don't care computation for hierarchical designs
A VLSI Systolic Array Architecture for Lempel-Ziv-Based Data Compression
FlexAcc: Accelerating Batch Normalization through GPU-FPGA Integration
Classification of Individual Finger Movements from ECoG Signals using a Spiking Neural Network
Supercapacitor Fractional-Order Model Discharging from Polynomial Time-Varying Currents
Bit rate optimized time-domain equalizers for DMT systems
Impact of Quantization Noise Errors in FPGA Based WLAN Timing Synchronization with the Schmidl and Cox Algorithm
Reinforcement-Learning-Based Foggy-Aware Optimal Placement Method for Analog and MixedSignal Circuits
Two dimensional IIR and FIR digital notch filter design
High-level synthesis under I/O timing and memory constraints
Live Demonstration: Automatic Synthesis of Algorithms on Multi Chip/FPGA with Communication Constraints
Efficient encoding of the significance maps in wavelet based image compression
H-RIS: Hybrid Computing-in-Memory Architecture Exploring Repetitive Input Sharing
Critical-path optimization for efficient hardware realization of lifting and flipping DWTs
On designing linearly tunable high-Q OTA-C filters with low sensitivity
An analog similarity evaluation circuit featuring variable functional forms
Performance and complexity analysis for adaptive sample rate converters in GSM/UMTS/HIPERLAN2 mobile transceiver
VLSI Design of Cellular Neutral Networks with Annealing and Optical Input Capabilities
Live demonstration: MWC for real-time application
Direct DDFS FM modulator with baseband interpolator
Half-Wave Class DE Low dv/dt Rectifier Using Common-Grounded Controlled Shunt Capacitor and Its Design Approach
VLSI design of large-scale soft-output MIMO detection using conjugate gradients
A Capacitor-free CMOS Low-dropout Voltage Regulator
Equilibrium Propagation and (Memristor-based) Oscillatory Neural Networks
A RF Amplifier with Oscillation-Based BIST Based on Differential Power Detection
Stochastic behavior-considered VLSI CAD environment for MTJ/MOS-hybrid microprocessor design
METFormer: A Motion Enhanced Transformer for Multiple Object Tracking
A 1.3mA biphasic current stimulator IC with active charge balancing for nerve interfacing applications
Noise generation system using DCT
A Behavioral Model for High-Speed 4: 1 Analog Multiplexers, utilizing Stochastic Modelfitting
Assessing the Performance of Analog Training for Transfer Learning
FastViT: Real-Time Linear Attention Accelerator for Dense Predictions of Vision Transformer (ViT)
An Asynchronous Pipelined Time-to-Digital Converter Using Time-Domain Subtraction
Perspectives on Non-Invasive Glucose Sensing using Flexible Hybrid-Printed Electronics Systems
Multi-source in-door energy harvesting for non-volatile processors
Design of Nonsubsampled Directional Filter Banks with Arbitrary Number of Channels
Matching pursuits using slant patterns and its dictionary design [video coding applications]
Solving Gate-Matrix Layout Problems by Simulated Evolution
A 3V 110µW 3.1 ppm/°C curvature-compensated CMOS bandgap reference
A biomimetic CMOS synapse
A Novel Minimum-Phase Dual-Inductor Hybrid Boost Converter with PWM Voltage-Mode Controller
Multicore power proxies using least-angle regression
RC-In-RC-Out model order reduction via node merging
Modeling the impact of light on the performance of polycrystalline thin-film transistors at the sub-threshold region
A flash-TDC hybrid ADC architecture
Particle swarm localization of acoustic sources in the presence of reverberation
Capacitance selection for digital floating-gate circuits operating in subthreshold
International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA
Wideband DOA Estimation with Magnitude-Only Measurements
A 3.9-fJ/c.-s. 0.5-V 10-bit 100-kS/s low power SAR ADC with time-based fixed window
Statistical Modeling of Read Static Noise Margin for 6-Transistor SRAM cell
Low-voltage LDO Compensation Strategy based on Current Amplifiers
All-digital ADC/TDC using TAD architecture for highly-durable time-measurement ASIC
An Output-Capacitor-Free Adaptive-Frequency Digital LDO with a 420-mA Load Current and a Fast Settling Time
A novel high gain, high bandwidth CMOS differential front-end for wireless optical systems
LDPC decoder architecture for high-data rate personal-area networks
Fractionally Spaced Orthogonal Frequency Division Multiplexing Systems
Dynamics in a controlled flow model of a switching system
A Band Interleaved by Line (BIL) Architecture of a Simple Lossless Algorithm (SLA) for On-board Satellite Hyperspectral Data Compression
Digital Twin-Based Architecture for Run-Time Power Modeling for Sensorless Edge Devices
Analog VLSI spiking neural network with address domain probabilistic synapses
A Novel Neural Network Approach for Power System Low Frequency Oscillation Mode Identification
Post-layout energy-delay analysis of parallel multipliers
A new combined architecture for CDMA location searchers and RAKE receivers
A 14-bit, 40-MS/s DAC with current mode deglitcher
A 2.4 GHz CMOS quadrature LC-oscillator/mixer
A transistor-based clock jitter insensitive DAC architecture
Optimizing a resonator tap for maximizing oscillator carrier-to-noise ratio
Amperometric Readout and Electrode Array Chip for Bioelectrochemical Sensors
High-order multi-bit incremental converter with Smart-DEM algorithm
A 2.5GS/s 3-bit time-based ADC in 90nm CMOS
Training Acceleration of Frequency Domain CNNs Using Activation Compression
A 10-W, High Efficiency, Broadband Harmonically Tuned GaN-HEMT Power Amplifier
Phase noise in dual inverter-based CMOS ring oscillators
OTA-C filters derived from unbalanced lattice passive structures
A Simulated Annealing Based Approach for Near-Optimal Sensor Selection in TDOA Localization System
An efficient method for face recognition under varying illumination
Symbolic verification of Boolean constraints over partially specified functions
Extreme low-voltage floating-gate CMOS transconductance amplifier
Picture orientation information in video compression
Minimum hardware serial PID regulator for high efficiency, low power digital DC-DC converters
Biomedical microimplants for sensory and motor neuroprostheses
Subpixel-based down-sampling via Min-Max Directional Error
A Circuit for Learning in Fuzzy Logic-Based Controllers
On completion of M-channel perfect reconstruction filter banks with prescribed admissible FIR scaling filter
Feasible region assignment of routing nets in single-layer routing
Lung Nodule Segmentation on CT Scan Images Using Patchwise Iterative Graph Clustering
Address code optimization using code scheduling for digital signal processors
Low-Power and Area-Efficient Finite Field Multiplier Architecture Based on Irreducible All-One Polynomials
Towards jointly optimal rate allocation for multiple videos with possibly different frame rates
A novel truncated squarer with linear compensation function
Case Study: GPU-based implementation of sequence pair based floorplanning using CUDA
A 3-8bit Reconfigurable Hybrid ADC Architecture with Successive-approximation and Single-slope Stages for Computing in Memory
Chaotic behavior of 741 opamps subjected to EMI conveyed to power supply rails
Boundary Matching Detection for Progressive Transmission of VQ Indices over Noisy Channels
Sliding mode control of a boost-buck converter for AC signal tracking task
Parallel Regeneration of Interconnections in VLSI & ULSI Circuits
Robust speech recognition using feature-domain multi-channel bayesian estimators
A novel hardware acceleration scheme for java method calls
Suppression of bit-pulsed jammer signals in DS-CDMA array system using independent component analysis