yusuke1997/dblp-id-title huggingface dataset:
A series-SSHI-Phi interface circuit for piezoelectric energy harvesting with 163% improvement in extracted power at off-resonance
A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS
A 105.8dB A-weighted DR CT Delta-Sigma Audio ADC Using Current-Steering DAC Current Recycling Amplifier
Simulation offshore wind farm in Penghu Island, Taiwan
A 40nm $\boldsymbol{2.76}\boldsymbol{\mu}\mathbf{J}/\mathbf{Op}$ Energy-Efficient Secure Post-Quantum Crypto-Processor for Crystals-Kyber on Module-LWE
A 14.7mW Blocker-Tolerant Wideband Receiver Using a Transformer-Based N-Path Passive-LNA and a 2 nd -Order TIA Achieving 110MHz RF-BW and 13dBm OB-IIP3
A piezoelectric vibration energy harvesting system with improved power extraction capability
Hydropower energy recovery (HyPER) from water-flow systems in Vietnam
An asynchronous digitally-controlled switching converter with adaptive resolution and dynamic power saving to achieve higher than 93.5% efficiency between 5mA and 250mA load
Millimeter-Wave System-on-Chip Applications from Space Explorations to Contactless Connectivity
Research and application of the electric security early warning visualization platform under extreme nature disasters
An adaptive emergency control method for interconnected power grids against frequency decline and system blackout
A 190mV supply, 10MHz, 90nm CMOS, pipelined sub-threshold adder using variation-resilient circuit techniques
A 25kHz-BW 97.4dB-SNDR 100.2dB-DR 3 rd -Order SAR-Assisted CT DSM with 1-0 MASH and DNC
A Crystal-Less Clock Generator for Low-Power and Low-Cost Sensor Transceivers with 12.9MHz-to-3.3GHz Range, 16.67ppm/°C Inaccuracy from -25°C to 85°C, and 0.25us Settle-Time
What is a good way to expand a silicon value to a solution value?
A fault-tolerant modulation method to counteract the double open-switch fault in matrix converter drive systems without redundant power devices
A 31.92% Efficiency Colpitts DCO-PA for BLE TX with Implicit RX Clock Generation Using DM-to-CM Mode-switching
The influence of cable capacitance, generator neutral grounding and zig-zag transformer to third harmonic produced by synchronous generator
An Asynchronous Reconfigurable SNN Accelerator With Event-Driven Time Step Update
A 1.4Mb 40-nm embedded ReRAM macro with 0.07um 2 bit cell, 2.7mA/100MHz low-power read and hybrid write verify for high endurance application
Zero Current Detector with Slope Judgement Calibration in Mobile Battery Charger IC
A 6.4Gb/s/pin HBM3 Digital PHY with Low-Power, Area-Efficient Techniques for Chiplet-Based AI processors in 12-nm CMOS
A 1.4Mpixel CMOS image sensor with multiple row-rescan based data sampling for optical camera communication
A 21-Gb/s, 0.96-pJ/bit serial receiver with non-50% duty-cycle clocking 1-tap decision feedback equalizer in 65nm CMOS
A 5.2GHz Trifilar Transformer-Based Class-F23 Noise Circulating VCO with FoM of 192.6 dBc/Hz
A 37-GHz-Input Divide-by-36 Injection-Locked Frequency Divider with 1.6-GHz Lock Range
An omnidirectional wireless power receiving IC with 93.6% efficiency CMOS rectifier and Skipping Booster for implantable bio-microsystems
A 38-mW 7-bit 5-GS/s Time-Interleaved SAR ADC with Background Skew Calibration
A Power-Efficient 13-Tap FIR filter and an IIR Filter Embedded in a 10-bit SAR ADC
Performance evaluation of wind turbine using Monte Carlo method and turbine power curve
A 300-GHz-Band 36-Gb/s Scalable 2x2 2D Phased-Array CMOS Receiver
A 6.78-MHz Wireless Power Transfer System with Voltage-/Current-Mode 0X/1X Regulating Rectifier and Global-Loop Power Control
FPGA-based CNN Processor with Filter-Wise-Optimized Bit Precision
A 0.43pJ/bit true random number generator
A 6.78-200 MHz Offset-Compensated Active Rectifier with Dynamic Logic Comparator for mm-size Wirelessly Powered Implants
A cell current compensation scheme for 3D NAND FLASH memory
A 106dB PSRR direct battery connected reconfigurable class-AB/D speaker amplifier for hands-free/receiver 2-in-1 loudspeaker
A 28.8mW Accelerator IC for Dark Channel Prior Based Blind Image Deblurring
A 4ns Settling Time FVF-Based Fast LDO Using Bandwidth Extension Techniques for HBM3
A 0.40pJ/cycle 981 μm 2 voltage scalable digital frequency generator for SoC clocking
Ultra-low voltage datapath blocks in 28nm UTBB FD-SOI
A 112-765 GOPS/W FPGA-based CNN Accelerator using Importance Map Guided Adaptive Activation Sparsification for Pix2pix Applications
A 0.1-1.5GHz harmonic rejection receiver front-end with hybrid 8 phase LO generator, phase ambiguity correction and vector gain calibration
A Compact Low-power 16b SAR ADC using Reservoir-Charge-Redistributed DAC and Configurable Floating-Inverter-Based Comparator
A current-integrated differential NAND-structured PUF for stable and V/T variation-tolerant low-cost IoT security
A 640×512 30μm Pixel Pitch 1.8mK-NETD 90.1dB-SNR Digital Read-out Integrated Circuit with Fully On-chip Image Algorithm Pixel-Level Calibration
A 72.9-dB SNDR 20-MHz BW 2-2 discrete-time sturdy MASH delta-sigma modulator using source-follower-based integrators
A 3.3V 15.6b 6.1pJ/0.02%RH with 10ms response humidity sensor for respiratory monitoring
A 28.16-Gb/s Area-Efficient 60GHz CMOS Bi-Directional Transceiver for IEEE 802.11ay
A 6800-μm 2 Resistor-Based Temperature Sensor in 180-nm CMOS
Dynamic Voltage Stress Sensing Circuits for Screening Out Early Device Reliability Issues in Advanced Technology Nodes
A 80Gb/s/pin Single-Ended PAM-4 Transmitter With an Edge Boosting Auxiliary Driver and a 4-Tap FFE in 28-nm CMOS
A 1V 9pA analog front end with compressed sensing for electrocardiogram monitoring
A W-band Omnidirectional FMCW Radar with 18.18dBm Pout 6.76dB NF 52dB Isolation for 4.7cm Resolution and 10m Detection Distance
A 4-Element 4-Beam Ka-Band Phased-Array Receiver Using Mesh Topology in 65 nm CMOS
A Low Noise 8Mpixel CMOS Image Sensor with 5.36GHz Global Counter and Dual Latch Skew Canceler for Surveillance AI Camera System
A new method for wind speed forecasting based on empirical mode decomposition and improved persistence approach
A programmable muscle stimulator based on dual-slope charge balance
A 0.3 pJ/access 8T data-aware SRAM utilizing column-based data encoding for ultra-low power applications
A 172.6mW 43.8GFLOPS energy-efficient scalable eight-core 3D graphics processor for mobile multimedia applications
An undershoot/overshoot-suppressed current-mode buck converter with voltage-setting control for type-II compensator
Time-Based Digital LDO Regualtor with Fractionally Controlled Power Transistor Strength and Fast Transient Response
A 3.2 mA-RX 3.5 mA-TX fully integrated SoC for Bluetooth Low Energy
Extending HyperTransport™ technology to 8.0 Gb/s in 32-nm SOI-CMOS processors
A 265μW Continuous-Time 1-2 MASH ADC Achieving 100.6 dB SNDR in a 24 kHz Bandwidth
A 26-30GHz Digitally-Controlled Variable Gain Power Amplifier with Phase Compensation and Third Order Nonlinearity Cancellation Technique
A 7GHz-bandwidth 31.5 GHz FMCW-PLL with novel twin-VCOs structure in 65nm CMOS
IEEE Asian Solid-State Circuits Conference, A-SSCC 2015, Xia'men, China, November 9-11, 2015
A 4.57 μW@120fps Vision System of Sensing with Computing for BNN-Based Perception Applications
An On-Chip DC-DC Converter and Power Management System Achieving Zero Standby-to-Active Transition Time in MCU
A 10.5 Gbps 0.55 pJ/bit PAM-3 Transceiver Using a Self-driven Dual TIA Receiver and Floating Impedance Matching for Parallel On-chip Transmission Lines
How future mobility meets IT: Cyber-physical system designs revisit semiconductor technology
A dual-axis MEMS vibratory gyroscope ASIC with 0.0061°/s/VHz noise floor over 480 Hz bandwidth
A nonvolatile look-up table using ReRAM for reconfigurable logic
A Smart Hardware Security Engine Combining Entropy Sources of ECG, HRV and SRAM PUF for Authentication and Secret Key Generation
23Gbps 9.4pJ/bit 80/100GHz band CMOS transceiver with on-board antenna for short-range communication
A 2Mbps sub-100µW Crystal-less RF Transmitter with Energy Harvesting for Multi-Channel Neural Signal Acquisition
A 45nm 76-81GHz CMOS Radar Receiver for Automotive Applications
A 0.011mm 2 60dB SNDR 100MS/s reference error calibrated SAR ADC with 3pF decoupling capacitance for reference voltages
A 39-Gb/s PAM-3 Transmitter and ADC-Based Receiver Chipset in CMOS Technologies
A Compact D-Band Phase Shifter with 0.1-degree Phase Resolution and 0.8-degree RMS Phase Error in 65 nm CMOS
A 0.5V Real-Time Computational CMOS Image Sensor with Programmable Kernel for Always-On Feature Extraction
A 5-8 Gb/s low-power transmitter with 2-tap pre-emphasis based on toggling serialization
A 3.6 GHz fractional-N digital PLL using SAR-ADC-based TDC with-110 dBc/Hz in-band phase noise
A 48 TOPS and 20943 TOPS/W 512kb Computation-in-SRAM Macro for Highly Reconfigurable Ternary CNN Acceleration
Effects of power system stabilizer on inter-area oscillation in a longitudinal power system
A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancement
All-digital single-inductor multiple-output DC-DC converter with over 65.3% efficiency in 1 uW to 50 mW load range and 86.3% peak efficiency
A high efficiency and fast transient digital low-dropout assisted switched-capacitor converter for EMI-free Internet of Everything (IoE) systems
A 0.022mm 2 98.5dB SNDR hybrid audio delta-sigma modulator with digital ELD compensation in 28nm CMOS
A 0.3V 10bit 7.3fJ/conversion-step SAR ADC in 0.18μm CMOS
A 0.5-to-1.5GHz BW-Extended Gain-Boosted N-Path Filter Using a Switched $\mathbf{g}_{\mathbf{m}}-\mathbf{C}$ Network Achieving 50MHz BW and 18.2dBm OB-IIP3
A 90nA quiescent current 1.5V-5V 50mA asynchronous folding LDO using dual loop control
A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications
A 16-30Gb/s 1.03pJ/b Referenceless Baud-Rate CDR with Integrated Pattern Decoding Technique for Fast Frequency Acquisition
On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC
A ZVS CMOS active diode rectifier with voltage-time-conversion delay-locked loop for wireless power transmission
Multiple-loop design technique for high-performance low dropout regulator
A multi-path CMOS Hall sensor with integrated ripple reduction loops
A WDR CMOS Image Sensor Employing In-pixel Capacitive Variation using a Re-configurable Source Follower for Low Light Applications
A mixed-signal ASIC for triple-chamber cardiac pacemakers with heart resistance measurement
A 110-160 GHz ASK Receiver with Isomorphic Low Noise Power Amplifier and Multi-Mode Interface in 28-nm CMOS
An 89.55dB-SFDR 179.6dB-FoMs 12-bit lMS/s SAR-Assisted SAR ADC with Weight-Split Compensation Calibration
A multi-objective optimization approach for coordinating available transfer capability with risk control
A calibration-free time difference accumulator using two pulses propagating on a single buffer ring
A 54-to-69-GHz Wideband 2T2R FMCW Radar Transceiver Employing Cascaded-PLL Topology and PTAT-Enhanced Temperature Compensation in 40-nm CMOS
An Ultra-Low Close-In Phase Noise Series-Resonance BAW Oscillator in a 130-nm BiCMOS process
A 5.7GHz RF Wireless Power Transfer Receiver Using 84.5% Efficiency 12V SIDO Buck-Boost DC-DC Converter with Internal Power Supply Mode
A Monolithically Integrated Optical Bandpass Receiver in 0.25µm SiGe BiCMOS Technology for Microwave-Photonic Applications
A 40nW, Sub-IV Truly 'Digital' Reverse Bandgap Reference Using Bulk-Diodes in 16nm FinFET
Hybrid dynamic modeling of the evaporator for the development of the advanced optimal control strategies
A 1.12nJ/Pixel High-Accuracy and Memory-Efficient Real-Time Object Detection Processor for Neuromorphic Vision Sensors
Design and demonstration of micro-electro-mechanical relay multipliers
A high-gain wide-input-range time amplifier with an open-loop architecture and a gain equal to current bias ratio
Self-powered light sensor for simultaneous intensity-and-direction sensing and maximum-energy harvesting with shared photodiodes
A 655Mbps Successive-Cancellation Decoder for a 1024-bit Polar Code in 180nm CMOS
AI and IoT for Social Value Creation
RAODAT: An Energy-Efficient Reconfigurable AI-based Object Detection and Tracking Processor with Online Learning
A 12 bit 250 MS/s 28 mW +70 dB SFDR DAC in 0.11 μm CMOS using controllable RZ window for wireless SoC integration
K/Ka-Band 4-Element 4-Beam Hybrid Phased-Array Transmitter and Receiver Front-Ends with Compact Layout Floor-Plans and Fault-Tolerant Digital Circuits
Distributed generation interface using indirect matrix converter in boost mode with controllable grid side reactive power
A $142.8-\mu \text{W}$ 98.1dB-SNDR Power/Bandwidth Configurable Fully Dynamic Discrete-Time Zoom ADC with Interstage Leakage Shaping
A CMOS time of flight (TOF) depth image sensor with in-pixel background cancellation and sensitivity improvement using phase shifting readout technique
A 10b 100kS/s SAR ADC with charge recycling switching method
A 0.5 V 12-bit SAR ADC using adaptive timedomain comparator with noise optimization
A 93μW 11Mbps wireless vital signs monitoring SoC with 3-lead ECG, bio-impedance, and body temperature
A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET
A 13-MHz 68-dB SNDR CTDSM using SAB loop filter and interpolating flash quantizer with random-skip IDWA function in 90-nm CMOS
An Ultra-low Power 8T SRAM with Vertical Read Word Line and Data Aware Write Assist
A Non-contact TMR-Based Active Electrode for BCG Recording
An 8-channel chopper-stabilized analog front-end amplifier for EEG acquisition in 65-nm CMOS
A 0.1-5GHz flexible SDR receiver in 65nm CMOS
A 428.4mW 6.78Mbps/3.61Mbps Up/Down Data Rate Wireless Chipset with TinyAI Regulation
A low-power single-chip transceiver for 169/300/400/900 MHz band wireless sensor networks
Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOS
A 35 fJ 10b 160 MS/s pipelined-SAR ADC with decoupled flip-around MDAC and self-embedded offset cancellation
A Resistor/Trimming-Less Self-Biased Current Reference Class with Area Down to $3,500\ \mu \mathrm{m}^{2}$, 42.8 pW Power and 10.4% Accuracy across Corner Wafers in 180 nm
A $\mathbf{160}\times \mathbf{120}$ Indirect Time-of-Flight Sensor with Pixel-Level Adaptive $\Delta\Sigma$-Operations for Background Light Cancellation
A 200-MHz Wide Input Range CMOS Passive Rectifier with Active Bias Tunning
A 50-Gb/s differential transimpedance amplifier in 65nm CMOS technology
A 1280 x 720 Micro-LED Display Driver with 10-Bit Current-Mode Pulse Width Modulation
Combinatorial optimization for selection of gearboxes & generators for tidal in-stream energy systems
A double-tail sense amplifier for low-voltage SRAM in 28nm technology
A 350-mV 2.4-GHz quadrature oscillator with nearly instantaneous start-up using series LC tanks
A 1.39-V input fast-transient-response digital LDO composed of low-voltage MOS transistors in 40-nm CMOS process
A 45.4x∼221.2x latency Improvement of SRP-5 Cryptographic Engine for Smart Grid Network
Energy resources optimization model in large-scale based on aggregate node
Development and Applications of a Memory-Traffic-Efficient Convolutional Neural Network
A Sub-Picosecond Hybrid DLL for Large-Scale Phased Array Synchronization
3D-ISC: A 65nm 3D Compatible In-Sensor Computing Accelerator with Reconfigurable Tile Architecture for Real-Time DVS Data Compression
An integrated CMOS optical sensing chip for multiple bio-signal detections
A Multi-Slice VCO-based Quantizer for On-Chip Power Supply Noise Analysis Achieving 0.11 (mV) 2 /sqrt(MHz) Noise Floor
A 2-W, 90%-Efficiency Single-Stage Dual-Output Wireless Power Receiver with 0.1 to 700-mA Output Current Range Through Dynamic Delay Compensation and Bootstrap Adaptive Body Biasing Circuit
A 21-bit read-out IC employing dynamic element matching with 0.037% gain error
A Tiny 3.15-43.4-GHz 3.6-mW Divide-by-8 Ring-Based Injection-Locked Frequency Divider Using Multiphase Waveform Gating Technique
Single-phase grid connected axial flux permanent magnet generator system with reactive power compensation functionality
A Ka-Band Mutual Coupling Resilient Balanced PA with Magnetic Coupling Self-Cancelling Inductor Achieving 21.2dBm OP1dBand 27.6% PAE1dB
A 48MHz Temperature Compensated Crystal Oscillator Utilizing Time-Domain Accuracy Boosting Techniques Achieving ±1.4ppm Frequency Stability from -55°C to 115°C
A 0.46V-1.1V Transition-Detector with In-Situ Timing-Error Detection and Correction Based on Pulsed-Latch Design in AES Accelerator
An ultra-compact, untrimmed CMOS bandgap reference with 3σ inaccuracy of +0.64% in 16nm FinFET
An 85-GHz injection-locked frequency divider with current-reuse pre-amplifier technique
On-grid hybrid wind/photovoltaic/fuel cell energy system
Intelligent Chips and Technologies for AIoT Era
0.54 pJ/bit, 15Mb/s True Random Number Generator Using Probabilistic Delay Cell for Edge Computing Applications
A 0.37mm 2 LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2 n 3 m 5 k FFT accelerator integrated with a RISC-V core in 16nm FinFET
A 16 bit linear passive-charge-sharing SAR ADC in 55nm CMOS
The application of IEC 61850 on integrated intelligent components for transformer
0.2 V 8T SRAM with improved bitline sensing using column-based data randomization
Optimal technique for total harmonic distortion detection and estimation for smart meter
Modeling the consumer of the future - A dynamic simulation approach
A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFET
A 55nm 1-to-8 bit Configurable 6T SRAM based Computing-in-Memory Unit-Macro for CNN-based AI Edge Processors
A 24.25-29.5-GHz Transmitter with Built-in Automatic Calibration of LO Feedthrough and I/Q Imbalance in 65-nm CMOS
A 4-GHz ΔΣ fractional-N frequency synthesizer with 2-dimensional quantization noise pushing and fractional spur elimination techniques
A 12.75-to-16-GHz Spur-Jitter-Joint-Optimization SS-PLL Achieving -94.55-dBc Reference Spur, 31.9-fs Integrated Jitter and -260.1-dB FoM
An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator without Accuracy Loss in 28nm CMOS
A 30% beyond VDD signal swing 9-ENOB pipelined ADC using a 1.2V 30dB loop-gain opamp
Circuit Design in Nano-Scale CMOS Technologies
A 91.2dB SNDR 66.2fJ/conv. dynamic amplifier based 24kHz ΔΣ modulator
A frequency doubling two-path phased-array FMCW radar transceiver in 65nm CMOS
A 12.1 TOPS/W Mixed-precision Quantized Deep Convolutional Neural Network Accelerator for Low Power on Edge / Endpoint Device
A DC-46Gb/s 2: 1 multiplexer and source-series terminated driver in 20nm CMOS technology
A 28nm 128-kb Exponent- and Mantissa-Computation-InMemory Dual-macro for Floating-point and INT CNNs
SRAM Physically Unclonable Function Extracting Static Entropy from Every Bitcell Transistor for 6 bit/bitcell and Data Fingerprinting Capability for Provenance Assurance
A 22-Gb/s and over-33-mega-frame/s throughput bridge-function unit in a low-latency OLT LSI for the coexistence of 10G-EPON and GE-PON
A 0.04 μJ/ Classification High-Accuracy Energy-Efficient ECG Processor with SNN On-Chip Backpropagation and Adaptive Threshold Encoding
The energy management according to ISO 50001: 2011 standard and AEMAS scheme feasibly implement in Viet Nam
A fully-integrated reconfigurable dual-band transceiver for short range wireless communication in 180nm CMOS
A cost effective test screening method on 40-nm 4-Mb embedded SRAM for low-power MCU
A 434GHz SiGe BiCMOS transmitter with an on-chip SIW slot antenna
A 12-GHz All-Digital Calibration-Free FMCW Signal Generator Based on a Retiming Fractional Frequency Divider
A 48 Gb/s PAM4 receiver with Baud-rate phase-detector for multi-level signal modulation in 40 nm CMOS
A 1.22/6.7 ppm/°C VCO with frequency-drifting compensator in 60 nm CMOS
A 0.6V 6.4fJ/conversion-step 10-bit 150MS/s subranging SAR ADC in 40nm CMOS
IEEE Asian Solid State Circuits Conference, A-SSCC 2012, Kobe, Japan, November 12-14, 2012
An Energy-Efficient BJT-Based Temperature-to-Digital Converter with ±0.13°C (3σ) Inaccuracy from -40 to 125°C
Dielectric response of transformer insulation oils
A CMOS Imager for Reflective Pulse Oximeter with Motion Artifact and Ambient Interference Rejections
GCFP-ACIM: A 40nm 4.74TFLOPS/W General Complex Float-Point Analog Compute-in-Memory with Adaptive Power-Saving for HDR Signal Processing Applications
Power system risk assessment based on cascading failures and malfunction scene selection
A 70mW Indirect Time-of-Flight Image Sensor with Depth Dynamic Range Enhancement and Fixed Depth Noise Compensation
An 87×49 mutual capacitance touch sensing IC enabling 0.5 mm-diameter stylus signal detection at 240 Hz-reporting-rate with palm rejection
HTD: A light-weight holosymmetrical transition detector based in-situ timing monitoring technique for wide-voltage-range in 40nm CMOS
A 3.7-to-4.1GHz Narrowband Digital Bang-Bang PLL with a Multitaps LMS Algorithm to Automatically Control the Bandwidth Achieving 183fs Integrated Jitter
A Packaged Fully Digital 390GHz Harmonic Outphasing Transmitter in 28nm CMOS
A Fully-Integrated 25Gb/s Low-Noise TIA+CDR Optical Receiver designed in 40nm-CMOS
A 28mn 320Kb TCAM Macro with Sub-0.8ns Search Time and 3.5+x Improvement in Delay-Area-Energy Product using Split-Controlled Single-Load 14T Cell
A leakage-current-recycling phase-locked loop in 65nm CMOS technology
All-synthesizable 6Gbps voltage-mode transmitter for serial link
An area-efficient wideband CMOS hall sensor system for camera autofocus systems
A 28-nW Noise-Robust Voice Activity Detector with Background Aware Feature Extraction
An OTA-C signal processing FPAA with 305 MHz GBW and integrated frequency-independent filter tuning
A 0.38-μW stand-by power, 50-nA-to-1-mA load current range DC-DC converter with self-biased linear regulator for ultra-low power battery management
A 24Gb/s/pin PAM-4 Built Out Tester chip enabling PAM-4 chips test with NRZ interface ATE
Sub-ns Access Sub-mW/GHz 32 Kb SRAM with 0.45 V Cross-Point-5T Cell and Built-in Y_ Line
Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs
A 1.8V 11μW CMOS smart humidity sensor for RFID sensing applications
A 2-GHz digital I/Q modulator in 65-nm CMOS
Similarity-Aware Transposable SRAM Computation-In-Memory with Pulse-Based SAR ADC
A 7.5 - 42V Input High-VCR Monolithic DC-DC Converter Using Stacked Isolated SC Cores
A 16.8Gbps/channel single-ended transceiver in 65nm CMOS for SiP based DRAM interface on Si-carrier channel
Detection of 3.0 THz wave with a detector in 65 nm standard CMOS process
A 330μW, 64-channel neural recording sensor with embedded spike feature extraction and auto-calibration
A Capacitance-to-Digital Converter Integrated in a 32bit Microcontroller for 3D Gesture Sensing
An Enterprise-Capable Application Development and Integration Solution for Complex Systems
Proceedings of the 2010 International Conference on E-Learning, E-Business, Enterprise Information Systems, & E-Government, EEE 2010, July 12-15, 2010, Las Vegas Nevada, USA
Text Mining Techniques to Support e-Democracy Systems
A Fuzzy Approach for CRM System Selection in e-Business
Quality Assurance Procedures: New Enhancements to the Learning Management System at AOU
Monitoring Cross-Organizational Business Processes
A Secure Workflow Management System (SWMS) for E-Government Web Based Application
eGovernment and the Transformation of Services in the Province of Manitoba
An English-Chinese Learning System Using J2ME and Java Servlets
Analysis On E-Commerce and Consumers Behaviors
Ontology Driven Course Contents Selection and Scheduling Using Multi-Agent System
WBIS for Computer Programming
Mobile Internet Technology for a New Style of Learning and Teaching
A New Graphical Interface for training utility engineers and students on Real-Time Operation of Power Distribution Networks
Progress Stages to Achieve e-Government Transition in Developing Countries
A Framework For Increasing Participation In e-Government
Distance Education-Emerging Challenges and Opportunities in the Digital Divide of the Caribbean
E-Learning, Videogames, and other Didactic Technologies
SaleSim: A Sale Transaction Simulator for Point-of-Sale Systems
Research on Web Services Application in e-Business Platform Construction