yusuke1997/dblp-id-title huggingface dataset:
A general tree-based machine learning accelerator with memristive analog CAM
Tunable ultralow voltage transconductance amplifier and GmC filter
A multiparametric biosensor array for on-chip cell culture with feedback controlled microfluidics
Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited)
Design of an LFR based on a SEPIC converter under sliding mode control for HBLEDs applications
Efficient minimum group delay block processing approach to fractional sample rate conversion
Applying the trigonometric collocation method to nonlinear circuits
Predicting Harmonic Distortion in Switched-current Memory Circuits
Automated conversion of Simulink designs to analog hardware on an FPAA
Signal Coding and Compression Based on Chaos Control Techniques
A Novel Fast Algorithm for Speech and Audio Coding
Towards CRYSTALS-Kyber: A M-LWE Cryptoprocessor with Area-Time Trade-Off
HyNNA: Improved Performance for Neuromorphic Vision Sensor Based Surveillance using Hybrid Neural Network Architecture
Transposable Memory Based on the Ferroelectric Field-Effect Transistor
Trade-offs in Cryptosystems by Boolean and Quantum Circuits
A New 10 Gbps Traffic Management algorithm for High-speed Networks
Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs
Widening the dynamic range of the readout integration circuit for uncooled microbolometer infrared sensors
A novel current-balanced adaptive zero current detection scheme for Buck DC-DC converter
A Gray-coded digital-to-analog converter for a mixed-mode processor array
A Scalable Many-Stage CMOS OTA for Closed-Loop Applications
Implementation of efficient parallel discrete cosine transform using stochastic logic
Live Demonstration: Energy Autonomous Wireless Sensor Node for Oxygen Monitoring with LoRa Connectivity
A 1280×960 Dynamic Vision Sensor with a 4.95-μm Pixel Pitch and Motion Artifact Minimization
Embedded fuzzy control for automatic channel equalization after digital transmissions
A new ASIC for washer controller
Reverse conversion architectures for signed-digit residue number systems
An efficient modified Phong shading algorithm & its low-complexity realization
VHF current-mode filter based on intrinsic biquad of the regulated cascode topology
Application-Specific Analysis of Different SORN Datatypes for Unum Type-2-Based Arithmetic
Event-Driven ECG Classification Using an Open-Source, LC-ADC Based Non-Uniformly Sampled Dataset
An Adaptive Methodology for Mode Switching in Crystal Oscillators: Leveraging Amplitude Detection for Negative Resistance Boosting Quick Start-Up
Design procedure for DVB-T receivers large tuning range LP filter
A gain/phase mismatch calibration procedure for RF I/Q downconverters
A High-Efficiency Ultra-Low-Power CMOS Rectifier for RF Energy Harvesting Applications
Low-Power Approximate Multiplier with Error Recovery using a New Approximate 4-2 Compressor
A wideband PWM-FSK receiver for wireless implantable neural recording applications
A Noise-canceling CMOS LNA Design for the Upper Band of UWB DS-CDMA Receivers
Modal Analysis of Structures with Low-cost Embedded Systems
Linear probability feedback processes
Scalable pipeline architecture of MMSE MIMO detector for 4×4 MIMO-OFDM receiver
A voltage-mode DC-DC converter with enhanced transient responses
Efficient design of perfect-reconstruction biorthogonal cosine-modulated filter banks using convex Lagrangian relaxation and alternating -space projections
A self-adapting high dynamic-range visual representation algorithm for AER imagers
Logic optimization for majority gate-based nanoelectronic circuits
A multi-objective meta-heuristic method for distribution network optimization
Memory-efficient Architecture of 2-D Dual-mode Discrete Wavelet Transform using Lifting Scheme for Motion-JPEG2000
Addressing static and dynamic errors in bandpass unit element multibit DAC's
Dynamics of a Memristive Bridge with Valence Change Mechanism (VCM) Devices
Optimum Laguerre filter design technique for sigma-delta demodulators
Low redundancy layered multiple description scalable coding using the subband extension of H.264/AVC
Focal-plane moving object segmentation for realtime video surveillance
Extra loop delay compensation for hybrid delta-sigma modulators
An Area-Efficient Low Quiescent Current Output Capacitor-Less LDO with Fast Transient Response
Real-time calculus for scheduling hard real-time systems
Color Demosaicking Using Direction Similarity in Color Difference Spaces
A high dynamic-range, self-tuned Gm-C filter for video-range applications
Application performance of elements in a floating-gate FPAA
CMOS pulse-modulation circuit implementation of phase-locked loop neural networks
A numerical method to evaluate bifurcation aspects around generator stability limit
SCOLAR: A Spiking Digital Accelerator with Dual Fixed Point for Continual Learning
Model of a true random number generator aimed at cryptographic applications
Content based error detection and concealment for image transmission over wireless channel
Fine-grained Power Gating for Leakage and Short-circuit Power Reduction by using Asynchronous-logic
Fired Neuron Rate Based Decision Tree for Detection of Adversarial Examples in DNNs
Unified Lossless-Throughput Architecture for AES and SM4 Encryption with Changeable Keys
Active duplexing for Software Defined Radio
Leakage power optimization for clock network using dual-Vth technology
An integrated four-port converter for compact and efficient hybrid power systems
A compact generalized solution to the determination of spectral components for multilevel uniformly sampled PWM
A 1.5-V 10-ppm/°C 2nd-order curvature-compensated CMOS bandgap reference with trimming
A new WiMAX sigma-delta modulator with constant-Q active inductors
An analog adaptive notch filter based on the noise cancellation principle
Refresh-free dynamic standard-cell based memories: Application to a QC-LDPC decoder
Low-complexity linear phase fir filters in cascade form
CMOS imager with charge-leakage compensated frame difference and sum output
A Current Attenuator for Efficient Memristive Crossbars Read-Out
A CMOS imager with focal-plane computation for feature detection
A FPGA-based FSE Accelerator with Dynamic Table for ZSTD compression
Low-voltage asynchronous adders for low power and high speed applications
A color histogram based people tracking system
A 12-bit 30MS/s SAR ADC with VCO-Based Comparator and Split-and-Recombination Redundancy for Bypass Logic
A New Adaptive Subpixel-based Downsampling Scheme using Edge Detection
ANNs-SaDE: A Machine-Learning-Based Design Automation Framework for Microwave Branch-Line Couplers
Enabling Fault Isolation in Fault Injection for Automotive-grade Circuits Simulation
Design of Low-Delay Perfect-Reconstruction FIR Filter Banks for Tree-Structured Subband Coders
A 0.0033 mm 2 3.5 fJ/conversion-step SAR ADC with 2× Input Range Boosting
Hopf-like transitions in nonsmooth dynamical systems
Fast and low-power inner product processor
Design for Secure Test - A Case Study on Pipelined Advanced Encryption Standard
Framework for Augmenting Main Memory with CXL-connected Emerging Memory Alternatives
Bioimpedance Data Statistical Modelling for Food Quality Classification and Prediction
A 1800μm 2 , 953Gbps/W AES Accelerator for IoT Applications in 40nm CMOS
Dynamic analog resonator-based adaptive filters
A Multi-Channel Auditory Signal Encoder with Adaptive Resolution Using Volatile Memristors
On the Performance of Two Constant Modulus Algorithms in Equalization with non-CM Signals
Optimized cubic chebyshev interpolator for elementary function hardware implementations
An Efficient Numerical Solution Technique for VLSI Interconnect Equations on Many-Core Processors
A Bayesian Approach to Variable Screening for Modeling the IC Fabrication Process
Fast parameters optimization of an iterative decoder using a configurable hardware accelerator
Improvement of pattern learning and recognition capability in ratio-memory cellular neural networks with non-discrete-type Hebbian learning algorithm
A new efficient algorithm for singular value decomposition
Weight sorting based scheme and architecture for distributed particle filters
Circuit analysis and optimization with automatically derived Volterra kernels
Live Demonstration: An Area and Energy Efficient Reconfigurable Cryptographic Accelerator Based SoC Design for Securing IoT Devices
Evaluation of Dual Mode Logic in 28nm FD-SOI technology
A low voltage CMOS class AB operational transconductance amplifier
Interleaved successive cancellation polar decoders
RF inductive sensors for detection of change in the ionic strength and pH of liquid samples
A 12-bit, 270MS/s pipelined ADC with SHA-eliminating front end
A Smart Sensing Node for Pervasive Water Quality Monitoring with Anti-Fouling Self-Diagnostics
Discrete time analog polynomial type CNN with digital state
A nonuniform filterbank structure for channel precoding
LightProbe: A 64-channel programmable ultrasound transducer head with an integrated front-end and a 26.4 Gb/s optical link
Chip-on-mud: Ultra-low power ARM-based oceanic sensing system powered by small-scale benthic microbial fuel cells
A 99.8-nV/√Hz ΔΣ Modulator with an Input-Impedance-Boosted kT/C-Noise-Cancellation Integrator for Biopotential-Signal Acquisition
TDPRO: Ultra-low Power ECG Processor with High-Precision Time-Domain Computing Engine
A framework for fine-granular computational-complexity scalable motion estimation [real-time video coding applications]
A current-mirror opamp with switchable transconductances for low-power switched-capacitor integrators
A field programmable neural array
Prediction of slant path rain attenuation based on artificial neural network
A new diffusion sparse RLS algorithm with improved convergence characteristics
Origin of stochastic resistive switching in devices with phenomenologically identical initial states
A High-Performance 2-D Inverse Transform Architecture for the H.264/AVC Decoder
Unsupervised Learning of Fall Incidents using Radar-based Sensing
Spatial-temporal consistent labeling for multi-camera multi-object surveillance systems
A cost-effective MPEG-4 shape-adaptive DCT with auto-aligned transpose memory organization
Integer- and rational-coefficient M-band wavelet
DC analysis of PWL electric networks and sub-networks by means of set theory
The Design of Fast Asynchronous Adder Structures and their Implementation Using D.C.V.S. Logic
A Low-Power SiPM Readout Front-End with Fast Pulse Generation and Successive-Approximation Register ADC in 0.18 μm CMOS
UEP for Progressive Image Transmission with GA-based Optimization
A RNS Montgomery multiplication architecture
Ultra low-voltage floating-gate transconductance amplifier
Quantum circuits for stabilizer codes
Optimal techniques for assigning inter-tier signals to 3D-vias with path control in a 3DIC
An asynchronous SOVA decoder for wireless communication application
An Enhanced Resubstitution Algorithm for Area-Oriented Logic Optimization
Power Consumption Analysis of Flip-flop Based Interconnect Pipelining
Pre-processing power traces to defeat random clocking countermeasures
A simple method to determine observable islands for state estimation
An axon emulator for evaluation of nerve recording systems
An IIP2 calibration technique for CMOS multi-standard mixers
A quadratic programming method for interconnection crosstalk minimization
A low-voltage floating-gate CMOS transconductance amplifier, and a spin-off quasi frequency tripler
A wide-tuning quasi-type-I PLL with voltage-mode frequency acquisition aid
Topological resiliency analysis of the Australian electricity grid with increased penetration of renewable resources
Live Demonstration: An Energy-Efficient CMOS Biophotometry Sensor Interface
A 1.25 GHz 32-bit tree-structured carry lookahead adder
A hardware design approach for merge-sorting network
The communication of virtual human faces using MPEG-4 tools
Field test results for low power bearing estimator sensor nodes
Symbolic Analysis for Fault Detection in Switch-Level Circuits
Multiple-Vdd multiple-Vth CMOS (MVCMOS) for low power applications
Distinguishable error detection method for Network on Chip
350-fJ/spike, 30-Hz Bio-inspired Silicon Neuron Circuit in 0.2 V, 65 nm CMOS
A Self-Powered Multi-Input Bridgeless Series-SSHI Circuit for Piezoelectric Energy Harvesting
Generalized multi-stage closed loop sigma delta modulator
Design of optimal FIR prefilters for wavelet coefficient computation
A simple address autoconfiguration mechanism for OLSR [MANET routing protocol]
Bifurcation and transitional dynamics in asymmetrical two-coupled oscillators with hard type nonlinearity
Iteration reduction of turbo decoders using an efficient stopping/cancellation technique
Towards a rigorous formulation of the space mapping technique for engineering design
On the design of 2nd order multi-bit Sigma-Delta-modulators
Reconfigurable inverse transform architecture for multiple purpose video coding
Efficient Search for Efficient Architecture
A Novel Low Power BPSK Demodulator
Ultra-compact and Side-channel Resistant Design of FIFO-based NTT Core for PQCs
Discrete-Time MASH Delta-Sigma Modulator with Second-Order Digital Noise Coupling for Wideband High-Resolution Applications
An 1.61mW mixed-signal column processor for BRISK feature extraction in CMOS image sensor
On the effect of boundary conditions on CNN dynamics: stability and instability, bifurcation processes and chaotic phenomena
A Digital Calibration Technique for DAC Mismatches in Delta-sigma Modulators
Video-shot Transition Detection using Spatio-temporal Analysis and Fuzzy Classification
Adaptive error control for reliable systems-on-chip
MTJ/MOS-hybrid logic-circuit design flow for nonvolatile logic-in-memory LSI
Impact of temporal transistor variations on circuit reliability
A real-time compensated inductive transceiver for wearable MP3 player system on multi-layered planar fashionable circuit board
Full-duplex link implementation using dual-rail encoding and multiple-valued current-mode logic
Joint estimation of DOA and angular spread using polarimetric complex MUSIC
LNA-antenna codesign for UWB systems
A new offset measurement and cancellation technique for dynamic latches
Characterization of a simple communication network using Legendre transform
Sensitivity analysis of pulse-width jitter induced noise in continuous-time delta-sigma modulators to out-of-band blockers in wireless receivers
Low power finite field multiplication and division in re-configurable Reed-Solomon codec
A simplicial CNN architecture for on-chip image processing
QME: an efficient subsampling-based block matching algorithm for motion estimation
Area-optimal sensing circuit designs in deep submicrometer STT-RAM
Critical load-shedding time calculation based on region of attraction limits
Integer-code DC fault dictionary
Single depth intra coding mode in 3D-HEVC
A bidirectional frequency detector independent of input transition density for a wide-tuning range applications
Current-mode instantaneous state setting method and its application to an H-bridge inverter
A three-phase TMS320C30 DSP based resonant-commutated converter
A Novel Five-input Multiple-function QCA Threshold Gate
A Hardware Implementation of Colorectal Tumor Classification for Endoscopic Video on Customizable DSP Toward Real-Time Computer-Aided Diagnosis System
An In-Flash Binary Neural Network Accelerator with SLC NAND Flash Array
Dual-Mode Resonant Sensor for Depth Spectroscopy
Iris feature extraction based on gray-scale morphological skeleton
A new deflection shape function for square membrane CMUT design
Accurate Harmonic Distortion Estimation in CMOS Circuits using a Cross-Product Gm-Stage Modeling
Small-signal modeling of the PWM boost DC-DC converter at boundary-conduction mode by circuit averaging technique
An efficient mechanism to provide full visibility for hardware debugging
Chaos and bifurcations from a serial resonant circuit including a saturated inductor
2 GHz 1V sub-mW, fully integrated PLL for clock recovery applications using self-skewing
A Method for Anomaly Prediction in Power Consumption using Long Short-Term Memory and Negative Selection
Towards an Integrated Software Development Environment for Robotic Applications in MPSoCs with Support for Energy Estimations
Synchronization of distributed simulations-a Kalman filter approach
Dynamic wordline voltage swing for low leakage and stable static memory banks
FrameVoting: A Robust and Fast Method of Using Gaze Estimations to Identify Objects of Interest
A Novel Low-Leakage ESD Power Clamp Circuit with Adjustable Transient Response Time
TAB barrier: Hybrid barrier synchronization for NoC-based processors
Automated high level synthesis of hardware building blocks present in ART-based neural networks, from VHDL-AMS descriptions
Performance of Ring Oscillators for Cryogenic Electronics Integration from 4 to 200 K
The Unscented Transform as a Tool to Assess Circuit Variability for Emergent Technologies
Automatic Parallelism Tuning for Module Learning with Errors Based Post-Quantum Key Exchanges on GPUs
Digital self-correction of time-interleaved ADCs
200 Mega Pixel Rate IDCT Processor for HDTVC Applications
Automatic procedure generating noise models for discrete-time applications
Converter Topologies for On-Package Voltage Stacking
Event-based Classification with Recurrent Spiking Neural Networks on Low-end Micro-Controller Units
A novel adaptive video playout control for video streaming over mobile cellular environment
Analog Linearization of VCO-based ADCs with Machine-Learning-Assisted Co-Design
Detection of Breast Cancer ESR1 p.E380Q Mutation on an ISFET Lab-on-Chip Platform
Design of Synchronous Circuits with Multiple Clocks
Enhancing Performance of SAR ADC through Supervised Machine Learning
A new reduced-complexity sphere decoder with true lattice-boundary-awareness for multi-antenna systems
Infinite precision analysis of the QR-recursive least squares algorithm
Stabilizing unstable equilibrium points of chaotic systems using PI regulator
Layer-by-layer Adaptively Optimized ECC of NAND flash-based SSD Storing Convolutional Neural Network Weight for Scene Recognition
An optimal entropy coding scheme for efficient implementation of pulse shaping FIR filters in digital receivers
SRAM voltage stacking
A 400 MHz Voltage-Mode-Based Fully Integrated Regulating Rectifier for Deep Tissue Bio-implants
Joint source-channel coding for highly efficient error resilient image transmission
A VLSI DBSCAN processor composed as an array of micro agents having self-growing interconnects
3ASCA: Application-Aware Autonomous SCM Capacity Adjustment for SCM and NAND Flash Pooled Storage
A direct bitstream manipulation approach for Virtex4-based evolvable systems
Gm-cell nonlinearity compensation technique using single-bit quantiser and FIR DAC in Gm-C based delta-sigma modulators
Delta operator based 2-D VLSI filter structures without global broadcast and incorporation of the quadrantal symmetry
Beamforming of Temporally-Broadband-Bandpass Plane Waves using Real Polyphase 2-D FIR Trapezoidal Filters
Learning More Comprehensive Representations of ICs for Enhanced Routing Congestion Prediction
DSCR-Net: A Diffractive Sensing and Complex-Valued Reconstruction Network for Compressive Sensing
Reliable Depth-of-Field Rendering Using Estimated Depth Maps
Complexity reduction method for overlapped block motion compensation based on spatio-temporal correlation
Factorization of a class of perfect reconstruction modified DFT filter banks with IIR filters
Computationally-improved Optimal Filtering for Supervised Learning
Dynamic operand transformation for low-power multiplier-accumulator design
Hilbert space techniques for evaluating trade-offs in reactive power compensation
FIRNet: Forward-Inverse Reinforcement Network For Image Restoration Through Scattering Media
Normalized Differential Power Analysis - for Ghost Peaks Mitigation
High speed serial interface for mobile LCD driver IC
Multi-concept Mining for Video Captioning Based on Multiple Tasks
A MEMS implementation of an acoustical sensor array
A 12-bit 300 MHz CMOS DAC for high-speed system applications
A 10Gb/s 44.2 dB adaptive equalizer with Duobinary tracking loop in 0.18µm CMOS
A 91 dB SNDR Calibration-Free Fully-Passive Noise-Shaping SAR ADC with Mismatch Error Shaping
Efficient spacing scheme for a linearly interpolated lookup table predistorter
Self-reorganising systems on VLSI circuits
Hardware Architectures for Computing 8-Point Cosine Number Transform
A reconfigurable multi-processor SoC for media applications
Test set customization for improved fault diagnosis without sacrificing coverage
Towards the realization of fractional step filters
1-V 15-μW 130-nm CMOS Super Class AB OTA
Approximate adder with output correction for error tolerant applications and Gaussian distributed inputs
A Fast Transient PMOS LDO with AP 3 Buffer and Shaped-Hybrid-Bias EA Techniques Achieving 8.15ps FOM
A Fast Transient Response Capless LDO Regulator Achieving -78 dB of PSR Up to 2 MHz
A low-power IP design of Viterbi decoder with dynamic threshold setting
Design and Implementation of FPGA-based Systolic Array for LZ Data Compression
Intelligent multipoint Arnoldi (IMA) approximations of FIR filters by low-order linear-phase IIR filters
Privacy-preserving with Flexible Autoencoder for Video Coding for Machines
A 0.007mm 2 50mA Three-Stage Fully-Integrated Capacitor-Less Low-Dropout Regulator
An inverse method of characteristics for analyzing circuits with widely separated time-scales
Design of Energy-Efficient Electrocorticography Recording System for Intractable Epilepsy in Implantable Environments
Power consumption issues in high-speed high-resolution pipelined A/D converters
Memristor Overwrite Logic (MOL) for Energy-Efficient In-Memory DNN
Unified modeling for memristive devices based on charge-flux constitutive relationships
Symbolic analysis of bifurcations in planar variable structure systems
Asynchronous test hardware for Null Convention Logic
Shortcuts in circuits and systems education with a case study of the Thévenin/Helmholtz and Norton/Mayer equivalents
Photonic networks-on-chip: Opportunities and challenges
An interval arithmetic-based yield evaluation in circuit tolerance design
A 161.6 TOPS/W Mixed-mode Computing-in-Memory Processor for Energy-Efficient Mixed-Precision Deep Neural Networks
Various implementations of topographic, sensory, cellular wave computers
Soft error tolerant latch design with low cost for nanoelectronic systems
Design of Cosine-Modulated Pseudo-QMF Banks Using Semidefinite Programming Relaxation
High-performance analog delays: surpassing Bessel-Thomson by Pade-approximated Gaussians
Analysis of VCO jitter in chip-package co-design
Frequency-encoded integrators applied to filtering and sigma-delta modulation
A new offset cancellation technique for folding ADC
In-camera detection of fabric defects
Behavioral Verilog-A Model of Superconductor-Ferromagnetic Transistor
A Genetic Algorithm for Sex-Fair Stable Marriage Problem
A Test Structurefor Extraction of Resistance Matching Properties
Realization of a low-voltage and low-power Colpitts quadrature oscillator
A novel covalent redundant binary Booth encoder
New 1.4 volt transconductor with superior power supply rejection
ESD protection design for wideband RF applications in 65-nm CMOS process
An Efficient and Small Area Multioutput Switched Capacitor Buck Converter for IoTs
Self-organized edge detection for an image compression
Learning from examples with spatial-adaptive wavelet-based reproducing kernels
Automatic Labeling of Industrial Images by using Generative Adversarial Networks
HEVC-based adaptive quantization for screen content by detecting low contrast edge regions
Towards memristor based accelerator for sparse matrix vector multiplication
Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance
Runtime energy management under real-time constraints in MPSoCs
A nonlinear competitive model of traffic flows at congested links in networks
Ultra-low power UWB for real time biomedical wireless sensing
Phase noise improvement in fractional-N synthesizer with 90° phase shift lock