yusuke1997/dblp-id-title huggingface dataset:
A self-calibration technique for time-interleaved pipeline ADCs
ECCSyn: a Synthesis Tool for ECC Circuits
Directional-rational approach for color image enhancement
Recent advances in IR-UWB transceivers: An overview
Multi-Parameter Homotopy Methods for Finding Periodic Solutions of Nonlinear Circuits
High-Speed Motion Scene Reconstruction for Spike Camera via Motion Aligned Filtering
A 9.13-to-15.31 GHz 205.1 dBc/Hz FOMT Dual-Core Dual-Mode VCO with Forward Body Bias Technique For Sub-7 GHz Applications
Logic gates dynamic modeling by means of an ultra-compact MOS model
Internet of video things in 2030: A world with many cameras
Real-Time Object Recognition Based on Parallel Ultra-Low-Power Microcontroller: A case study on Multisensory Glove
Improved current-source sizing for high-speed high-accuracy current steering D/A converters
A digitally calibrated R-2R ladder architecture for high performance digital-to-analog converters
A three-level toggle-avoid bus signaling scheme
Diophantine Frequency Synthesis The Mathematical Principles
A 12-mW Fully Integrated Low-IF dual-band GPS Receiver on 0.13-µm CMOS
The fault detection of cross-check test scheme for infrared FPA
3.3-V line drivers for digital subscriber line applications
A brief overview of multi-scroll chaotic attractors generation
An implementation of JPEG 2000 interactive image communication system
A Regression-Based Method to Synthesize Complex Arithmetic Computations on Stochastic Streams
Design of a MIMO-OFDM baseband receiver for next-generation wireless LAN
A Heursitsic Global Optimization Algorithm and Its Application to CMOS Circuit Variability Minimization
Computational complexity reduction for signal cyclostationarity detection based spectrum sensing
A multi-level inverter for driving a high voltage display
Parallel encoders for low-density parity-check convolutional codes
A new heuristic signed-power of two term allocation approach for designing of FIR filters
Dual-band sub-1 V CMOS LNA for 802.11a/b WLAN applications
A fast-lock DLL with power-on reset circuit
Fast zero block detection and early CU termination for HEVC Video Coding
A Programmable 1.8-18MHz High-Q Fully-Differential Continuous-Time Filter with 1.5-2 Power Supply
Automatic FDP/FAP generation from an image sequence
Low-power wiring method in CMOS logics circuits by segmentation coding and pseudo majority voting
Low voltage 2-mW 6~10.6-GHz ultra-wideband CMOS mixer with active balun
Low-power CMOS PLL for clock generator
A 1.75V Rail-to-Rail CMOS Op Amp
A highly efficient transient and frequency-response simulation method for switching converters without using a SPICE-like analog simulator
Study of DAC Architectures for Integrated Laser Driver Systems
Sparsity-based online missing sensor data recovery
A zero-voltage and zero-current switching three-level DC-DC converter with secondary-assisted regenerative passive snubber
Perfect Column-Layered Two-Bit Message-Passing LDPC Decoder and Architectures
Signal Flow Graph Analysis of Analog Circuits using Principles of Control Theory : Tutorial Review
Neural blind separation of complex sources by extended Hebbian learning (EGHA)
An efficient design for one dimensional discrete cosine transform using parallel adders
Affine Deformation Model Based Intra Block Copy for Intra Frame Coding
Microchannel splitting and scaling for thermal balancing of liquid-cooled 3DIC
Benchmarking TFET from a circuit level perspective: Applications and guideline
A new generation of ISCAS benchmarks from formal verification of high-level microprocessors
The tunnelling field effect transistors (TFET): the temperature dependence, the simulation model, and its application
A 0.4V 1.94fJ/conversion-step 10b 750kS/s SAR ADC with input-range-adaptive switching
Workflow for an Electronic Configurable Prototyping System
An MPEG-4 IPMPX design and implementation on MPEG-21 test bed
An improved frame and macroblock layer bit allocation scheme for H.264 rate control
Development of a functional model for the Nanoparticle-Organic Memory transistor
Implementing Otsu's thresholding process using area-time efficient logarithmic approximation unit
Pseudo-differential zero-crossing-based circuit with differential error suppression
A controller resynthesis based method for improving datapath testability
High-Speed and Scalable FPGA Implementation of the Key Generation for the Leighton-Micali Signature Protocol
Analysis of transformer-based resonator quality factor and bandwidth and the implications to VCOs
A 1-V 100-dB dynamic range 24.4-kHz bandwidth delta-sigma modulator
Pilot tone design for peak-to-average power ratio reduction in OFDM
Magnetically-coupled tuneable inductor for wide-band variable frequency oscillators
Flexible Logic Circuits by using Van Der Waals Contacted Graphene Field-Effect Transistors
Thermal analysis and active cooling management for 3D MPSoCs
Built-in Self-Test of Vector Matrix Multipliers on a Reconfigurable Device
A 28-nm Convolutional Neuromorphic Processor Enabling Online Learning with Spike-Based Retinas
A 9.97-GHz 190.6-dBc/Hz FOM CMOS VCO Featuring Nested Common-Mode Resonator and Intrinsic Differential 2 nd -Harmonic Output
A low-power low-noise 600MHz CMOS IF demodulator for superheterodyne receivers
ScatterSplatting: Enhanced View Synthesis in Scattering Scenarios via Joint NeRF and Gaussian Splatting
Novel fractional motion estimation algorithm and architecture using Sub-block Combination
A dual-loop delay locked loop with multi digital delay lines for GHz DRAMs
Robust Transmitter Detection Method for Realizing Long-Distance Visible Light Communication Using Light-Trail Surface by Propeller LED Transmitter
Explaining Sigma-Delta Modulators with Pulse Frequency Modulation
Design of a pixel array circuit for thinning process
A frequency synthesizer realized by a transformer-based voltage-controlled oscillator for IEEE 802.11a/b/g channels
Fast Vehicle Detection and Tracking on Fisheye Traffic Monitoring Video using Motion Trail
A trace-back-free Viterbi decoder using a new survival path management algorithm
Design Flow for Incorporating Camouflaged Logic Gates to Enhance Hardware Security While Considering Timing Closure
A CMOS Multi-Sensor Array for High Accuracy On-Chip Bacterial Growth Monitoring
Design of Delta Sigma Modulator Using Approximate Adder With Near-Normal Error Distribution For Fractional-N Frequency Synthesizer
An ultra-low power silicon-on-sapphire ADC for energy-scavenging sensors
Comprehensive Analysis of EEG Datasets for Epileptic Seizure Prediction
A 14-bit 250MS/s Low-Power Pipeline ADC with Aperture Error Eliminating Technique
Configurable preamble synchronizer for slotted random access in W-CDMA applications
Musical beat tracking via Kalman filtering and noisy measurements selection
A low power oscillator based TDC with in-system non-linearity correction
A Real-time 4.31 mJ/Frame Neural-3DGS Processor with Voxel Similarity Memory Management and Opacity-based Sparsity Generation
Automated Coverage Register Access Technology on UVM Framework for Advanced Verification
Integrated charge sensitive amplifier with pole-zero cancellation circuit for high rates
A 0.47mW 6 th -order 20MHz active filter using highly power-efficient Opamp
Interconnect modeling and sensitivity analysis using adjoint networks reduction technique
Switched-resistor tuning technique for highly linear Gm-C filter design
A new baseband post-distortion technique for power amplifiers in OFDM-based cognitive radio systems
Multiple antenna rectifiers for radio frequency energy scavenging in wireless sensors
Artificial Bio-Inspired Tactile Receptive Fields for Edge Orientation Classification
FPGA acceleration of hyperspectral image processing for high-speed detection applications
A mesochronous pipeline scheme for high performance low power digital systems
A 10b 400MS/s 2x-Time-Interleaved 2-Then-1b/Cycle SAR ADC in 90nm CMOS
Machine Vision Quality Assessment for Image Restoration
New Results on Stability Theory of Time-Varying Linear Systems
Bonding-wire triangular spiral inductor for on-chip switching power converters
Improving H.264/AVC video coding with adaptive coefficient suppression
A high-throughput HEVC deblocking filter VLSI architecture for 8k×4k application
Some observations on multiplierless implementation of linear phase FIR filters
Pseudo-Random Vector Compaction for Sequential Testability
Dynamic Response Enhancement of Cascaded DC/DC Converter Systems using an Auxiliary Circuit
A Direct Combination of the Prim and Dijkstra Constructions for Improved Performance-driven Global Routing
RISC-V2: A Scalable RISC-V Vector Processor
A CAD tool for architecture level exploration and automatic generation of RNS converters
A Sub-µW fully programmable CMOS DPS for uncooled infrared fast imaging
Evaluating the JEDEC Standard JEP173, Dynamic RDSON Test Method for GaN HEMTs
Lower bound on mean squared channel estimation error for multiuser receiver
Design of a 1-Volt and µ-power SARADC for Sensor Network Application
A high-speed electro-optical analog-to-digital converter principle
Limits in FIR subband beamforming for spatially spread near-field speech sources
IEEE1394 system simulation environment and a design of its link layer controller
Channel Estimation and Equalization Design with SNR Decision Based Universal Threshold for Sub-THz Single Carrier Baseband Receiver
Serpentine-Shaped Metamaterial Energy Harvester for Wearable and Implantable Medical Systems
Dynamic element matching techniques for delta-sigma ADCs with large internal quantizers
A new algorithm for accurate and automatic chessboard corner detection
A new multi-view articulated human motion tracking algorithm with improved silhouette extraction and view adaptive fusion
Estimation of thermal status in multi-core systems
SystemC models generation based on libraries of templates
A 1mW 4b 1GS/s delay-line based Analog-to-digital Converter
Modular PUF Coding Chain with High-Speed Reed-Muller Decoder
Design of an Iterative Receiver for Linearly Precoded MIMO Systems
Low-power high-linearity area-efficient multi-mode GNSS RF receiver in 40nm CMOS
An on-chip DNL estimation and reconfiguration for improved linearity in current steering DAC
Hybrid analysis of shielding effect in planar microwave circuits
Interface Trap Analysis in Multi-Fin FinFET Technology: a Crucial Reliability Issue in Digital Application
A programmable spatiotemporal image processor chip
Deep Learning Based Equalization for CSK Optical Camera Communication
On-die decoupling capacitance: frequency domain analysis of activity radius
VLSI implementation of a quasi-ml, energy efficient fixed complexity sphere decoder for MIMO communication system
A 40 Gb/s Adaptive CTLE Using a Sub-Sampled PAM-4 Clock Recovery Circuit in 65nm CMOS
An Adaptive Extension of Combined 2D and 1D-directional Filter Banks
Efficient digit-serial FIR filters with skew-tolerant domino
3D sound movement system for embedded applications
Algorithmic Enablers for Compact Neural Network Topology Hardware Design: Review and Trends
Gramian-preserving frequency transformation for linear discrete-time systems using normalized lattice structure
Accurate modelling and simulation of a DC brushless motor drive system for high performance industrial applications
Tracking broadband plane waves using 2D adaptive FIR fan filters
Phase Locked Loop gain shaping for gigahertz operation
Feature Extraction of Neuronal Activity by Attractor Reconstruction in Neural Networks with Delayed Couplings
A memory-based entorhinal-hippocampal model and its FPGA implementation by on-chip RAMs
A Two-Phase Linear-Exponential Incremental ADC with Second-order Noise Coupling
Hybrid energy harvesting in 3-D IC IoT devices
History and future of auditory filter models
Cross-scene abnormal event detection
Subtractive impairment, additive impairment and image visual quality
Fast intra coding unit size decision for HEVC with GPU based keypoint detection
Audio-Visual Target Speaker Enhancement on Multi-Talker Environment Using Event-Driven Cameras
A 1.8 V CMOS DAC cell with ultra high gain op-amp in 0.0143 mm2
Limited color display for compressed video
Counter based adaptation for CAVLC in HEVC
A 385μW Photoplethysmography-based Vitals Monitoring SoC with 110dB Current-to-Digital Converter
Efficient architecture for soft-output massive MIMO detection with Gauss-Seidel method
An Implantable Long-term Bladder Urine Pressure Measurement System with a 1-atm Canceling Instrumentation Amplifier
Reducing the Complexity of Fault-Tolerant System Amenable to Approximate Computing
Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output
A low-complexity LDPC decoder for NAND flash applications
A Second-Order VCO-Based ΔΣ ADC with Fully Digital Feedback Summation
Formulation of Multirate Filter Design as an Approximation Problem
High sensing margin and parallelism 6T-2MTJ SOT-MRAM based TCAM for energy-Efficient Similarity Priority calculation in MANNs
Disk I/O mixed scheduling strategy for VoD servers
Switched capacitor DC-DC converter in 65nm CMOS technology with a peak efficiency of 97%
Low-power and high-throughput hardware design for the 3D-HEVC depth intra skip
General model for delayed feedback and its application to transimpedance amplifier's bandwidth optimization
Fast and High-Precision Analog In-Sensor Visual Computing Using Fully Amorphous Metal Oxide Thin-Film Transistors
Effective power and ground distribution scheme for deep submicron high speed VLSI circuits
Considerations for predicting freezeout and exhaustion under a variety of nontrivial conditions
Color temporal contrast sensitivity in dynamic vision sensors
Comparison of Second-Order and Third-Order Compensation of Inductive Power Transfer Converters Based on Sensitivity Analysis
An X-band Phase Detector Based on Quadrature Modulation in 28-nm CMOS
A wideband RF power detector with -56 dB sensitivity and 64 dB dynamic range in SiGe BiCMOS technology
Resource constrained modulo scheduling for coarse-grained reconfigurable arrays
A 0.77-pJ/bit 40-Gb/s/pin Single-Ended Hybrid DAC-Based Transmitter for Memory Interfaces
Direct noise analysis of log-domain filters
A 70dBA-460μW Companding Digital Silicon Microphone with Programmable Acoustic Overload Point and MEMS Asymmetry Robustness
A process- and temperature-tolerant power-on reset circuit with a flexible detection level higher than the bandgap voltage
Finite State Vector Quantization with Multi-Path Tree Search Strategy for Image/Video Coding
Two-dimensional, frequency domain, adaptive system modeling using 3-D spatiotemporal inputs
An asynchronous pipeline comparisons with application to DCT matrix-vector multiplication
A DC coupled signal acquisition system with ultra-wide input range
Reliability driven module generation for analog layouts
Run Time Adaptive Network Slimming for Mobile Environments
The Design of an Ultra-low Power Buck Regulator Supporting Dynamic Voltage Scaling for Wireless Sensor Networks
High-Utilization GPGPU Design for Accelerating GEMM Workloads: An Incremental Approach
Performance of two novel fast affine projection adaptation algorithms
An Adaptive AI-based Approach to Detect and Protect COTS Systems against Micro-Single-Event-Latchups (μ-SELs) and SELs
Single-capacitor-single-contact active pixel sensor
Digital Background Calibration Techniques for Interstage Gain Error and Nonlinearity in Pipelined ADCs
A high-speed high-accuracy voltage-to-time-difference converter for time domain analog-to-digital converters
ESD protection design for IC with power-down-mode operation
Online Training Refinement Network and Architecture Design for Stereo Matching
Energy and latency evaluation of NoC topologies
Efficient pass-parallel architecture for EBCOT in JPEG2000
Automatic snake contours for the segmentation of multiple objects
Throughput Characterization for Bluetooth Low Energy with Applications in Body Area Networks
Fast 802.11 link adaptation for real-time video streaming by cross-layer signaling
On Optimizing Deep Neural Networks Inference on CPUs for Brain-Computer Interfaces using Inference Engines
Design of multiplier free FIR filters using a LADF sigma-delta (Σ-Δ) modulator
A 480 fJ/conversion-step 13-bit Resistive Sensor Readout IC with a 1%/V Power Supply Sensitivity
Multiresolution mesh representation using vertex cluster contraction
Light-Weight Soft-Errors Detection Mechanism in High-Level Synthesis
Nonlinear dynamics of memristor oscillators via the flux-charge analysis method
A combined interpolatorless interpolation and high accuracy sampling process for digital class D amplifiers
A high efficiency adaptive frequency hopping controlled 1/3× step-down switch capacitor DC-DC converter with deep-green mode operation
FIR filters for compensating D/A converter frequency response distortion
Harnessing fabrication process signature for predicting yield across designs
A Timing-Monitoring Sequential for Forward and Backward Error-Detection in 28 nm FD-SOI
A real-time detection algorithm for freezing of gait in Parkinson's disease
An extension of transformation-based reversible and quantum circuit synthesis
The hierarchical timing pair model
Characterization of Clock Buffers for On-Chip Inter-Circuit Communication in Xilinx FPGAs
Arbitrary scale image enlargement with the prediction of high frequency components
Design and implementation of high frequency AC-LED driver with digital dimming
A high speed and energy efficient full adder design using complementary & level restoring carry logic
Golden-light code for optical 2×2 MIMO free space intensity communications
Video Decimator Design Using A Systolic Array
A 0.25μm HV-CMOS Synchronous Inversion and Charge Extraction (SICE) Interface Circuit for Piezoelectric Energy Harvesting
Single-inductor dual-input dual-output switching converter for integrated battery charging and power regulation
Visual Quality Optimization for View-Dependent Point Cloud Compression
A Pitch Estimation Algorithm Based on the Smooth Harmonic Average Peak-to-Valley Envelope
A parallel and area-efficient architecture for deblocking filter and Adaptive Loop Filter
A new algorithm for voice activity detection
Multi-user receiver using conjugate gradient method for wideband CDMA
A clockless, multi-stable, CMOS analog circuit
Low power variable block size motion estimation using pixel truncation
Designing a low-power (self-timed) router for a MIMD computer
A novel prefilter design for higher multiplicity discrete multiwavelet transforms
Harmonic injection method: a novel method for harmonic distortion analysis
Highly linear wide-band differential LNA using active feedback as post distortion
Low complexity, high speed decoder architecture for quasi-cyclic LDPC codes
1-V ultra-low-power CMOS LC VCO for UHF quadrature signal generation
Cross Entropy Attack on Deep Graph Infomax
A 3.3 V 1 GHz high speed pipelined Booth multiplier
A 5-Bit 10-GS/sec Flash ADC with Resolution Enhancement using Metastability Detection
Considerations in multidimensional filter bank design
Performance Comparison of Time-Step-Driven versus Event-Driven Neural State Update Approaches in SpiNNaker
FIR Filter Approximation by IIR Filters Based on Discrete-Time Vector Fitting
ROM based logic (RBL) design: High-performance and low-power adders
Low energy asynchronous architectures
Field programmable gate arrays and analog implementation of BRIN for optimization problems
A 1V power supply operation CMOS subbandgap reference using switched capacitors
Hybrid media-processor core for natural and synthetic video decoding
Effect of non-linear settling error on the harmonic distortion of fully-differential switched-current bandpass Sigma-Delta modulators
Log-domain complex filter design with XFILTER
Design on mixed-voltage I/O buffer with blocking NMOS and dynamic gate-controlled circuit for high-voltage-tolerant applications
Theory and design of a bio-inspired multistable oscillator
Off-time prediction in digital constant on-time modulation for DC-DC converters
Vehicle tracking iterative by Kalman-based constrained multiple-kernel and 3-D model-based localization
Evaluating iterative improvement heuristics for bigraph crossing minimization
FPGA implementation of feature extraction for colorectal endoscopic images with NBI magnification
An indoor solar energy harvesting system using dual mode SIDO converter with fully digital time-based MPPT
Channel estimation for MIMO-OFDM systems based on Subspace Pursuit algorithm
Electro-chemical multi-channel integrated neural interface technologies
Live Demonstration: Image Classification Using Bio-inspired Spiking Neural Networks
Blind frequency offset estimation for PCC-OFDM with symbols overlapped in the time domain
An efficient technique to eliminate quantisation noise folding in double-sampling Sigma-Delta modulators
Efficient simulation of on-chip RF components using model-reduction techniques
Real discrete Gabor expansion for finite and infinite sequences
High Speed Buffers for Op-amp Characterization
A new PLL design for clock management applications
Parallel Solution of Symmetric Banded Systems on Transputers
High-range switched-capacitor tracking filter
A two-chip, 4-MHz, microelectromechanical reference oscillator
Influence of finite integrator gain bandwidth on continuous-time sigma delta modulators
Hybrid WHT-RNS Architectures for Fault Tolerant Adaptive Filtering
Ultra-low Power Current Comparator
An ultra low-voltage multibit delta-sigma modulator for audio-band application
Precise and Tunable TΩ Pseudo-Resistors Based on Process-Independent pA-level Current Sources and DACs
A quadrature relaxation oscillator-mixer in CMOS
Circuit Model of Energy-Storing Transducers
A single-stage power factor correction converter with soft-switching operation
A 19 fJ/op, Low-Offset StrongARM Latch Comparator for Low-Power High-Speed Applications
Novel recharge semi-floating-gate CMOS logic for multiple-valued systems
Subtractive dithering technique for delta-sigma modulator
A Hybrid Peak Current Mode DC-DC Converter with Swift Response for Automotive Applications
Conditional Variational Autoencoders for Hierarchical B-frame Coding
Extraction of Query Term-related Visual Phrases for News Video Retrieval using Mutual Information
Digital background calibration of redundant split-flash ADC in 45nm CMOS
Relations between spatio-temporal phenomena and eigenvalues in mutually coupled CNNs
Design of power-aware multiplier with graceful quality-power trade-offs
A power-optimized reconfigurable CT ΔΣ modulator in 65nm CMOS
On loop gain in linear networks
Sampled-data modeling and analysis of closed-loop PWM DC-DC converters
Differentiable Graph Neural Networks for Wirelength Estimation
Optimal bit allocation and size-limited filter banks
Associating packets of heterogeneous cores using a synchronizer wrapper for NoCs
Better deep visual attention with reinforcement learning in action recognition
Efficient Collusion Attack-free Access Control for Multidimensionally Hierarchical Scalability Content
High speed and high resolution current winner-take-all circuit in conjunction with adaptive thresholding
On the Use of Approximate Multipliers in LMS Adaptive Filters
Principal component analysis for classifying passive sonar signals
Adjustable Filter Bank Design for Hearing Aids System
Hardware-efficient Softmax Approximation for Self-Attention Networks
A VLSI neural monitoring system with ultra-wideband telemetry for awake behaving subjects
Fuzzy logic based handover in MC-CDMA system
Parameter Optimization in Epsilon-filter for Acoustical Signal based on Correlation Coefficient
A step-up μ-power converter for solar energy harvesting applications, using Hill Climbing maximum power point tracking
A Miniaturized Chip-based ODNP Platform
Stability regions of non-hyperbolic dynamical systems: theory and optimal estimation
Live demonstration: Using SIMULINK S-functions for the efficient modeling and simulation of analog integrated circuits and systems
A scalable video transmission system using bandwidth inference in congestion control
The Continuous-Time RC-Chain ADC
Common-mode stability in low-power LO drivers
An Adaptive Converter for Current Neural Stimulators Achieving up to 79% Power Dissipation Reduction
Video error concealment by integrating dynamic programming and adaptive Kalman filtering techniques