yusuke1997/dblp-id-title huggingface dataset:
Emergence of Traveling Localizations in Mutualistic-Excitation Media
Capturing the Semantics of User Interaction: A Review and Case Study
Participating in the Geospatial Web: Collaborative Mapping, Social Networks and Participatory GIS
Artificial Intelligence in Economics and Finance Theories
European Air Quality Mapping through Interpolation with Application to Exposure and Impact Assessment
Information Sharing on the Semantic Web
Automatic Invocation Linking for Collaborative Web-Based Corpora
Robust Representation for Data Analytics - Models and Applications
Dependability in Service-Oriented Computing
Hebbian Learning and Negative Feedback Networks
Data Science and Visual Computing
SWING - A Semantic Framework for Geospatial Services
Optimization Based Data Mining: Theory and Applications
Models of Computation for Big Data
A Low-Cost and Secure Solution for e-Commerce
Data-intensive Systems - Principles and Fundamentals using Hadoop and Spark
Business Aspect
A Supervised Machine Learning Approach to Toponym Disambiguation
Cognitive Engineering - A Distributed Approach to Machine Intelligence
WS-Query - A Framework to Efficiently Query Semantic Web Service
Self-Organizing Traffic Lights: A Realistic Simulation
Architecture Aspect
Artificial Intelligence Techniques for Rational Decision Making
Artificial Intelligence and Economic Theory: Skynet in the Market
A Semantic Approach for Geospatial Information Extraction from Unstructured Documents
Representation and Management of Narrative Information - Theoretical Principles and Implementation
Metasynthetic Computing and Engineering of Complex Systems
Decentralized Decision Making for Multiagent Systems
Developing Access Control Model of Web OLAP over Trusted and Collaborative Data Warehouses
RDF-GL: A SPARQL-Based Graphical Query Language for RDF
Creating Web-based Laboratories
Militarized Conflict Modeling Using Computational Intelligence
Machine Learning for Audio, Image and Video Analysis - Theory and Applications
An Adaptation Framework for Web Multimedia Presentations
Harvesting Intelligence in Multimedia Social Tagging Systems
Semantics-Based Intelligent Indexing and Retrieval of Digital Images - A Case Study
Foundations and Methods in Combinatorial and Statistical Data Analysis and Clustering
Goal Decomposition and Team Formation
Geospatial Information Integration for Science Activity Planning at the Mars Desert Research Station
Convergence and Knowledge Processing in Multi-Agent Systems
Geospatial Web Services: The Evolution of Geospatial Data Infrastructure
Self-Organization as Phase Transition in Decentralized Groups of Robots: A Study Based on Boltzmann Entropy
Service Advertisement and Discovery
Distributed Search by Constrained Agents - Algorithms, Performance, Communication
A Multifactor Secure Authentication System for Wireless Payment
Advances in Applied Self-organizing Systems
Contextual and Conceptual Information Retrieval and Navigation on the Web
Emergent Web Intelligence: Advanced Information Retrieval
Similarity-based Retrieval for Geospatial Semantic Web Services Specified Using the Web Service Modeling Language (WSML-Core)
Infrastructure for the Geospatial Web
Grey Information - Theory and Practical Applications
Introduction to Ubiquitous Cartography and Dynamic Geovisualization with Implications for Disaster and Crisis Management
Multiobjective Evolutionary Algorithms and Applications
A Geospatial Web Platform for Natural Hazard Exposure Assessment in the Insurance Sector
Flexible Workflow Management in Service Oriented Environments
User Profiles Modeling in Information Retrieval Systems
Domain Knowledge Integration
Mathematical Linguistics
Data Mining with Computational Intelligence
Towards New Frontiers: CrossWork
Multi-Agent Coordination for Service Composition
R-Trees: Theory and Applications
Imaging on the Geospatial Web Using JPEG 2000
Self-Organizing Digital Systems
Web Recommender Agents with Inductive Learning Capabilities
Automotive Industry Case Studies
Development, Implementation and Application of the WebGIS MossMet
Human-Web Interactions
Ontological Engineering: With Examples from the Areas of Knowledge Management, e-Commerce and the Semantic Web
Conceptual Search: Incorporating Geospatial Data into Semantic Queries
Inferences of Social and Spatial Communities over the World Wide Web
Geospatial Data Integration with Semantic Web Services: The eMerges Approach
Sharing, Discovering and Browsing Geotagged Pictures on the World Wide Web
Supporting Geo-Semantic Web Communities with the DBin Platform: Use Cases and Perspectives
Machine Learning for Audio, Image and Video Analysis - Theory and Applications, Second Edition
Information Systems Management in the Big Data Era
Learning Mutation Strategies for Evolution and Adaptation of a Simulated Snakebot
Knowledge Asset Management - Beyond the Process-centred and Product-centred Approaches
Organization Aspect
Immune System Support for Scheduling
Distributed Control of Microscopic Robots in Biomedical Applications
Game Theoretic Problems in Network Economics and Mechanism Design Solutions
Analysis of Usage Patterns in Large Multimedia Websites
Numeric Computation and Statistical Data Analysis on the Java Platform
Graph-based Knowledge Representation - Computational Foundations of Conceptual Graphs
Self-organizing Nomadic Services in Grids
Comparable Approaches to IVE
Foundations and Formalizations of Self-organization
Data Mining for Social Robotics - Toward Autonomously Social Robots
Business Process Enactment
Semantics for Service-Oriented Architectures
Spatiotemporal-Thematic Data Processing for the Semantic Web
Agent-Based Service-Oriented Computing
A Model for Self-Organizing Data Visualization Using Decentralized Multiagent Systems
Seriation in Combinatorial and Statistical Data Analysis
Dynamic Business Process Formation for Instant Virtual Enterprises
Formal Immune Networks: Self-Organization and Real-World Applications
Consensus Issues for Service Advertisement and Selection
Design vs. Self-organization
Scientific Data Analysis using Jython Scripting and Java
A Turing Test for Emergence
Natural and Artificial Reasoning - An Exploration of Modelling Human Thinking
Learning Representation for Multi-View Data Analysis - Models and Applications
Ubiquitous Browsing of the World
Knowledge Discovery in Multiple Databases
Python for Graph and Network Analysis
The User Perspective
What's So Special about Spatial?
Hierarchical Feature Selection for Knowledge Discovery - Application of Data Mining to the Biology of Ageing
Towards the Geospatial Web: Media Platforms for Managing Geotagged Knowledge Repositories
Location-based Web Search
Enhancing RSS Feeds with Extracted Geospatial Information for Further Processing and Visualization
Automating Business Modelling - A Guide to Using Logic to Represent Informal Methods and Support Reasoning
Fire Alerts for the Geospatial Web
A Lightweight Authentication Protocol for Web Applications in Mobile Environments
Adaptive Resonance Theory in Social Media Data Clustering - Roles, Methodologies, and Applications
Business Process Composition
Knowledge Cartography for Young Thinkers - Sustainability Issues, Mapping Techniques and AI Tools
QoS-Aware Service Selection
Advanced Methods for Inconsistent Knowledge Management
Hyperchaotic Encryption for Secure E-Mail Communication
The Geospatial Web, How Geobrowsers, Social Software and the Web 2.0 are Shaping the Network Society
Mining Software Engineering Data for Software Reuse
Embedded systems design in the new millennium (panel session)
Automatic Building of Graphs for Rectangular Dualisation
An intelligent module generator environment
Functional Timing Analysis for IP Characterization
ftd : An Exact Frequency to Time Domain Conversion for Reduced Order RLC Interconnect Models
Testing functional faults in VLSI
Resistance Extraction and Resistance Calculation in GOALIE?
A new approach to latency insensitive design
Device/circuit interactions at 22nm technology node
Robust gate sizing by geometric programming
Can pin access limit the footprint scaling?
Cross-Layer Reliability Evaluation and Efficient Hardening of Large Vision Transformers Models
A High Packing Density Module Generator for CMOS Logic Cells
SATO: spiking neural network acceleration via temporal-oriented dataflow and architecture
Verifying deep logic hierarchies with ALEX
Hawkware: Network Intrusion Detection based on Behavior Analysis with ANNs on an IoT Device
Hybrid hierarchical timing closure methodology for a high performance and low power DSP
Accelerating DTCO with a Sample-Efficient Active Learning Framework for TCAD Device Modeling
Placement of variable size circuits on LSI masterslices
Lesyn: Placement-aware Logic Resynthesis for Non-Integer Multiple-Cell-Height Designs
Statistical computing framework and demonstration for in-memory computing systems
Implicit enumeration of structural changes in circuit optimization
Bipolar vector classifier for fault-tolerant deep neural networks
Thread Weaving: Static Resource Scheduling for Multithreaded High-Level Synthesis
On test data compression and n-detection test sets
A hybrid SAT-based decision procedure for separation logic with uninterpreted functions
A Novel VLSI Layout Fabric for Deep Sub-Micron Applications
Printer graphics: New horizons in graphic output on the IBM 1403 printer
Reducing Power Dissipation after Technology Mapping by Structural Transformations
A total verification of printed circuit artwork
Monitoring the Health of Emerging Neural Network Accelerators with Cost-effective Concurrent Test
An Exact Algorithm for Selecting Partial Scan Flip-Flops
Symbolic Timing Verification of Timing Diagrams using Presburger Formulas
Design automation at a large architect-engineer
A distributed approach to silicon compilation: invited
New Regular Expressions on Old Accelerators
On the asymptotic costs of multiplexer-based reconfigurability
THE SITE MACHINE Computer-aided instruction in architectural education
Design of an Energy-Efficient Accelerator for Training of Convolutional Neural Networks using Frequency-Domain Computation
High-speed concurrent fault simulation with vectors and scalars
Interval Scheduling: Fine-Grained Code Scheduling for Embedded Systems
An architecture-driven metric for simultaneous placement and global routing for FPGAs
Late Breaking Results: Scalable GPU-Friendly Parallelization for Sweep-Based Maze Routing
Bandpass filter approximation by interactive graphics
Generalizable Lithographic Hotspot Detection Using Asynchronous Meta-Learning with Only One Shot
MARS: Exploiting Multi-Level Parallelism for DNN Workloads on Adaptive Multi-Accelerator Systems
A transistor-level logic-with-timing simulator for MOS circuits
Verification of digitally-intensive analog circuits via kernel ridge regression and hybrid reachability analysis
Proceedings of the 32st Conference on Design Automation, San Francisco, California, USA, Moscone Center, June 12-16, 1995
An emulator for an automatic test system
Robust chip-level clock tree synthesis for SOC designs
Statistical Estimation of the Cumulative Distribution Function for Power Dissipation in VLSI Cirucits
In-Hardware Learning of Multilayer Spiking Neural Networks on a Neuromorphic Processor
Detecting hardware trojans using backside optical imaging of embedded watermarks
Vehicular and Edge Computing for Emerging Connected and Autonomous Vehicle Applications
Invited - The case for embedded scalable platforms
Test generation for large logic networks
Hierarchical Test Generation and Design for Testability of ASPPs and ASIPs
Explicit modeling of control and data for improved NoC router estimation
Older and Wiser: The Marriage of Device Aging and Intellectual Property Protection of DNNs
Double-Win NAS: Towards Deep-to-Shallow Transformable Neural Architecture Search for Intelligent Embedded Systems
Early formal verification of conditional coverage points to identify intrinsically hard-to-verify logic
Optimal single row router
Architectural Retiming: Pipelining Latency-Constrained Circuts
Visibility enhancement for silicon debug
Area and Delay Mapping for Table-Look-Up Based Field Programmable Gate Arrays
Microprogramming as a pedagogical tool in teaching computer science
Enforcing architectural contracts in high-level synthesis
A Systematic Approach for Multi-objective Double-side Clock Tree Synthesis
Automatic Synthesis of Asynchronous Circuits
ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks
Hierarchical Test Generation under Intensive Global Functional Constraints
Constraints in one-to-many concretization for abstraction refinement
Programmable neural processing on a smartdust
MARS-C: modeling and reduction of soft errors in combinational circuits
EPIMap: using epimorphism to map applications on CGRAs
Temporofunctional crosstalk noise analysis
Boolean logic function synthesis for generalised threshold gate circuits
Integrating stochastic performance analysis with system design tools
Self adaptive reconfigurable arrays (SARA): learning flexible GEMM accelerator configuration and mapping-space using ML
Towards Full-System Energy-Accuracy Tradeoffs: A Case Study of An Approximate Smart Camera System
Behavioral synthesis via engineering change
A computer aided land use study technique
An Explicit RC-Circuit Delay Approximation Based on the First Three Moments of the Impulse Response
Effective Use of Boolean Satisfiability Procedures in the Formal Verification of Superscalar and VLIW Microprocessors
Design-for-testability for continuous-flow microfluidic biochips
Late Breaking Results: Attention in Graph2Seq Neural Networks towards Push-Button Analog IC Placement
DuoQ: A DSP Utilization-aware and Outlier-free Quantization for FPGA-based LLMs Acceleration
Power Optimal Buffered Clock Tree Design
Technology exploration for graphene nanoribbon FETs
EMOGen: Enhancing Mask Optimization via Pattern Generation
Adaptive and autonomous thermal tracking for high performance computing systems
WavePipe: parallel transient simulation of analog and digital circuits on multi-core shared-memory machines
A voltage-scalable & process variation resilient hybrid SRAM architecture for MPEG-4 video processors
Prediction-based flow control for network-on-chip traffic
Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010
Toward Controllable Hierarchical Clock Tree Synthesis with Skew-Latency-Load Tree
Prototyping a fault-tolerant multiprocessor SoC with run-time fault recovery
SILOG: A practical tool for large digital network simulation
Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations
Formulating Data-arrival Synchronizers in Integer Linear Programming for CGRA Mapping
Enhancing Simulation with BDDs and ATPG
Automated Layout Generation Using Gate Matrix Approach
Temperature aware thread block scheduling in GPGPUs
A quasi-convex optimization approach to parameterized model order reduction
DCDiff: Enhancing JPEG Compression via Diffusion-based DC Coefficients Estimation
NN-LUT: neural approximation of non-linear operations for efficient transformer inference
Espresso: Exploiting the Sparsity Property in Event Sensors with Spatiotemporal Ordering
A logic design structure for LSI testability
An Approach for Redesigning in Data Path Synthesis
Neuro Inspired Computing with Coupled Relaxation Oscillators
Extracting data parallelism in non-stencil kernel computing by optimally coloring folded memory conflict graph
A fully automatic hierarchical compactor
Thermal-aware system analysis and software synthesis for embedded multi-processors
Systematic software-based self-test for pipelined processors
Partial order reduction for scalable testing of systemC TLM designs
Efficient GPU NVRAM Persistence with Helper Warps
Optimal static WCET-aware scratchpad allocation of program code
An integrated hardware/software approach for run-time scratchpad management
Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications
An optimal voltage synthesis technique for a power-efficient satellite application
A physical unclonable function defined using power distribution system equivalent resistance variations
Computer Graphics Building Definition System
A High-Throughput Private Inference Engine Based on 3D Stacked Memory
Developments in computer simulation of gate level physical logic
Placement for Clock Period Minimization With Multiple Wave Propagation
Sample-Guided Automated Synthesis for CCSL Specifications
A system for computer assisted planning (Planning ADES)
Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era
Bringing source-level debugging frameworks to hardware generators
Integrated Placement for Mixed Macro Cell and Standard Cell Designs
A Performance Driven Macro-Cell Placement Algorithm
Insights from Rights and Wrongs: A Large Language Model for Solving Assertion Failures in RTL Design
On learning-based methods for design-space exploration with high-level synthesis
Automatic generation of embedded memory wrapper for multiprocessor SoC
IP Exchange: I'll Show You Mine if You Show Me Yours
GEML: GNN-based efficient mapping method for large loop applications on CGRA
Dynamic Power Management of Off-Chip Links for Hybrid Memory Cubes
A Unified Approach to Language Containment and Fair CTL Model Checking
Driver waveform computation for timing analysis with multiple voltage threshold driver models
Post-Routing Latch Optimization for Timing Closure
Enabling Efficient Analog Synthesis by Coupling Sparse Regression and Polynomial Optimization
HAIMA: A Hybrid SRAM and DRAM Accelerator-in-Memory Architecture for Transformer
The mimola design system: Tools for the design of digital processors
VLSI CAD tool integration using the Ulysses environment
Scalable effort hardware design: exploiting algorithmic resilience for energy efficiency
LSI components modelling in a three-valued functional simulation
Interactive design language: A unified approach to hardware simulation, synthesis and documentation
A Parallel Bottom-Up Clustering Algorithm with Applications to Circuit Partitioning in VLSI Design
LEAD: learning-enabled energy-aware dynamic voltage/frequency scaling in NoCs
RASTER: runtime adaptive spatial/temporal error resiliency for embedded processors
Analysis and RTL correlation of instruction set simulators for automotive microcontroller robustness verification
Parallel hierarchical cross entropy optimization for on-chip decap budgeting
Automatic Test Generation Using Quadratic 0-1 Programming
Reducing Latency in an SRAM/DRAM Cache Hierarchy via a Novel Tag-Cache Architecture
Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
Cryo-CMOS Electronic Control for Scalable Quantum Computing: Invited
HUNTER: Releasing Persistent Memory Write Performance with A Novel PM-DRAM Collaboration Architecture
Late Breaking Results: Breaking Symmetry - Unconventional Placement of Analog Circuits using Multi-Level Multi-Agent Reinforcement Learning
An Interface between VHDL and EDIF
Fractional-N frequency synthesizer design at the transfer function level using a direct closed loop realization algorithm
Bayesian model fusion: large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data
ODHD: one-class brain-inspired hyperdimensional computing for outlier detection
Timing analysis for digital fault simulation using assignable delays
BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis
Contactless Stacked-die Testing for Pre-bond Interposers
Late Breaking Results: Incremental 3D Global Routing Considering Cell Movement
Checking satisfiability of a conjunction of BDDs
Measurement-based uncomputation of quantum circuits for modular arithmetic
A New Complete Diagnosis Patterns for Wiring Interconnects
On-The-Fly Resolve Trace Minimization
Write or not: programming scheme optimization for RRAM-based neuromorphic computing
Using imprecise computing for improved non-preemptive real-time scheduling
The State of EDA Standards (Panel Abstract)
Heterogeneous multi-channel: fine-grained DRAM control for both system performance and power efficiency
Can CAD meet the VLSI design problems of the 80's
An effective GPU implementation of breadth-first search
Automated equivalence checking of switch level circuits
Serpens: a high bandwidth memory based accelerator for general-purpose sparse matrix-vector multiplication
DiMES: multilevel fast direct solver based on multipole expansions for parasitic extraction of massively coupled 3D microelectronic structures
A New Gate Delay Model for Simultaneous Switching and Its Applications
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
CAD challenges for leading-edge multimedia designs
Explaining the gap between ASIC and custom power: a custom perspective
Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients
Confidence Scalable Post-Silicon Statistical Delay Prediction under Process Variations
A stochastic jitter model for analyzing digital timing-recovery circuits
A Monte Carlo simulation flow for SEU analysis of sequential circuits
Single-tier virtual queuing: an efficacious memory controller architecture for MPSoCs with multiple realtime cores
Computer aided minimization procedure for boolean functions
Early partial evaluation in a JIT-compiled, retargetable instruction set simulator generated from a high-level architecture description
Post-silicon conformance checking with virtual prototypes
Runtime Resource Management with Workload Prediction
Skew-Oblivious Data Routing for Data Intensive Applications on FPGAs with HLS
Physical synthesis onto a layout fabric with regular diffusion and polysilicon geometries
The importance of adopting a package-aware chip design flow
An artwork design verification system
Variable frequency crosstalk noise analysis: : a methodology to guarantee functionality from dc to fmax
LUT-based FPGA technology mapping for reliability
Comparative Analysis of Conventional and Statistical Design Techniques
iG-kway: Incremental k-way Graph Partitioning on GPU
Improving Static Power Efficiency via Placement of Network Demultiplexer over Control Plane of Router in Multi-NoCs
Automating software design
NoC topology synthesis for supporting shutdown of voltage islands in SoCs
Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration
LVM-MO: A Large Vision Model Pioneer on Full-Chip Mask Optimization
Course, video, and manual dexterity (tutorial): tailoring training to CAD users
RISCE - A Reduced Instruction Set Circuit Extractor for Hierarchical VLSI Layout Verification
Designing and implementing small quantum circuits and algorithms
Parallel Dynamic Partitioning for Datapath Combinational Equivalence Checking
On the Repair of Redundant RAMs
dTune: Leveraging Reliable Code Generation for Adaptive Dependability Tuning under Process Variation and Aging-Induced Effects
Non-uniform clock mesh optimization with linear programming buffer insertion
Circuit-wise buffer insertion and gate sizing algorithm with scalability
Approximation-aware coordinated power/performance management for heterogeneous multi-cores
ArchEx: An Extensible Framework for the Exploration of Cyber-Physical System Architectures
Conditional address propagation: an efficient defense mechanism against transient execution attacks
TCL: an ANN-to-SNN Conversion with Trainable Clipping Layers
VLSI - a design challenge
Adjoint Transient Sensitivity Analysis for Objective Functions Associated to Many Time Points
PlanarONoC: concurrent placement and routing considering crossing minimization for optical networks-on-chip
WaveMin: a fine-grained clock buffer polarity assignment combined with buffer sizing
A Two-Dimensional Topological Compactor With Octagonal Geometry
Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004
Tutorial - Group Technology
Backlight dimming in power-aware mobile displays
Automatic placement of rectangular blocks with the interconnection channels
Device and architecture co-optimization for FPGA power reduction
Functional modelling for logic simulation