yusuke1997/dblp-id-title huggingface dataset:
ScanTAP: Balancing Throughput, Accuracy and Power consumption for Concurrent DNN Execution on Heterogeneous Multi-Accelerator Edge Platforms
Adaptive Social Network Services: The Practice of 9EMBA.COM
Edge Powered Industrial Control: Concept for Combining Cloud and Automation Technologies
Stable Clustering for VANETs on Highways
Analyzing Gossip Protocols for Reliable MANET Applications
Optimizing Windowed Aggregation over Geo-Distributed Data Streams
Hyakunin-Eyesshu: a tabletop Hyakunin-Isshu game with computer opponent by the action prediction based on gaze detection
Eye tracking within the packaging design workflow: interaction with physical and virtual shelves
Towards intelligent user interfaces: anticipating actions in computer games
Comparison of gaze-to-objects mapping algorithms
Evaluation of a remote webcam-based eye tracker
NGCA 2011, First Conference on Novel Gaze-Controlled Applications, Karlskrona, Sweden, May 26 - 27, 2011
Designing gaze-supported multimodal interactions for the exploration of large image collections
Exploring interaction modes for image retrieval
Gaze and voice controlled drawing
Gaze interaction from bed
Mobile gaze-based screen interaction in 3D environments
An open-source low-cost eye-tracking system for portable real-time and offline tracking
Managing a Non-linear Scenario - A Narrative Evolution
Group Interaction and VR Storytelling in Museums
A New Automated Workflow for 3D Character Creation Based on 3D Scanned Data
Automatic Direction of Interactive Storytelling: Formalizing the Game Master Paradigm
Environment Expression: Telling Stories Through Cameras, Lights and Music
Users Acting in Mixed Reality Interactive Storytelling
Storytelling for Recreating Our Selves: ZENetic Computer
The V-Man Project: Toward Autonomous Virtual Characters
Virtual Storytelling for Training: An Application to Fire Fighting in Industrial Environment
Bringing Interactivity into Campbell's Hero's Journey
Virtual Storytelling as Narrative Potential: Towards an Ecology of Narrative
Dream of Mee-Luck: Aspiration for a New Dawn
Generation of True 3D Films
Proposing Daily Visual Feedback as an Aide to Reach Personal Goals
Authoring Highly Generative Interactive Drama
Agency and the "Emotion Machine"
Narrative Construction in a Mobile Tour Guide
What Gestures to Perform a Collaborative Storytelling?
Affective Interactive Narrative in the CALLAS Project
Story Manager in 'Europe 2045' Uses Petri Nets
A Context-Based Storytelling with a Responsive Multimedia System (RMS)
Spatial Sound Enhancing Virtual Story Telling
Scenejo - An Interactive Storytelling Platform
FearNot! - An Emergent Narrative Approach to Virtual Dramas for Anti-bullying Education
Programming Agent with Purposes: Application to Autonomous Shooting in Virtual Environment
An Emotional Architecture for Virtual Characters
INSCAPE An Authoring Platform for Interactive Storytelling
Formal Encoding of Drama Ontology
Motif Definition and Classification to Structure Non-linear Plots and to Control the Narrative Flow in Interactive Dramas
Virtual Storytelling of Cooperative Activities in a Theatre of Work
Managing Authorship in Plot Conduction
Automatic Conversion from E-Content into Virtual Storytelling
Tell Me That Bit Again... Bringing Interactivity to a Virtual Storyteller
Virtual Agents' Self-Perception in Story Telling
Adding Aspects of "Implicit Creation" to the Authoring Process in Interactive Storytelling
Mediating Action and Background Music
Did It Make You Cry? Creating Dramatic Agency in Immersive Environments
Virtual Reality Technology and Museum Exhibit
Beneficial Dependencies: Design Principles for Narrative Games
A Storytelling Concept for Digital Heritage Exchange in Virtual Environments
The Control of Agents' Expressivity in Interactive Drama
How Do We Build This Thing?: Imagining Frameworks for Personal Narratives
Under Construction in Europe: Virtual and Mixed Reality for a Rich Media Experience
Interactive Immersive Transfiction
Meta-Data for Interactive Storytelling
An Authoring Tool for Intelligent Educational Games
The Effects of Mediation in a Storytelling Virtual Environment
"Just Talking about Art" - Creating Virtual Storytelling Experiences in Mixed Reality
CITYCLUSTER - "From the Renaissance to the Megabyte Networking Age" - A Virtual Reality & High Speed Networking Project
A Cinematography System for Virtual Storytelling
Telling Stories Knowing Nothing: Tackling the Lack of Common Sense Knowledge in Story Generation Systems
Interactive Out-of-Core Visualisation of Very Large Landscapes on Commodity Graphics Platform
Interactivity and Digital Environments: Designing a Storymap for Gormenghast Explore
INSCAPE: Storymodels for Interactive Storytelling and Edutainment Applications
Adaptive Narrative: How Autonomous Agents, Hollywood, and Multiprocessing Operating Systems Can Live Happily Ever After
Authoring Edutainment Stories for Online Players (AESOP): Introducing Gameplay into Interactive Dramas
Using Motivation-Driven Continuous Planning to Control the Behaviour of Virtual Agents
Virtual Storytelling, Using Virtual Reality Technologies for Storytelling, Third International Conference, ICVS 2005, Strasbourg, France, November 30 - December 2, 2005, Proceedings
Is Seeing Touching? Mixed Reality Interaction and Involvement Modalities
Linkin TV4U: Text-Based Production and TV-Like Representation for Hyperlinked Video Blogging
Generation and Implementation of Mixed-Reality, Narrative Performances Involving Robotic Actors
What Does Your Actor Remember? Towards Characters with a Full Episodic Memory
Computer Animation and Virtual Reality for Live Art Performance
Virtual Storytelling. Using Virtual Reality Technologies for Storytelling, 4th International Conference, ICVS 2007, Saint-Malo, France, December 5-7, 2007, Proceedings
Virtual Storytelling: Using Virtual Reality Technologies for Storytelling, International Conference, ICVS 2001, Avignon, France, September 27-28, 2001, Proceedings
Virtual StoryTelling: A Methodology for Developing Believable Communication Skills in Virtual Actors
Reflections from a Hobby Horse
The Interplay between Form, Story, and History : The Use of Narrative in Cultural and Educational Virtual Reality
Real-Time Character Animation Using Multi-layered Scripts and Spacetime Optimization
Stories in Space: The Concept of the Story Map
Toward Interactive Narrative
The VISIONS Project
Generating Verbal and Nonverbal Utterances for Virtual Characters
From ActAffAct to BehBehBeh: Increasing Affective Detail in a Story-World
The Lost Cosmonaut: An Interactive Narrative Environment on the Basis of Digitally Enhanced Paper
Embodied Reporting Agents as an Approach to Creating Narratives from Live Virtual Worlds
Being There: Participants and Spectators in Interactive Narrative
Learning in Character: Building Autonomous Animated Characters That Learn What They Ought to Learn
RCEI: An API for Remote Control of Narrative Environments
Action Planning for Virtual Human Performances
Storytelling for the Small Screen: Authoring and Producing Reconfigurable Cinematic Narrative for Sit-Back Enjoyment
Emotional Spectrum Developed by Virtual Storytelling
Characters in Search of an Author: AI-Based Virtual Storytelling
Anime Blog for Collecting Animation Data
Experiments with the Production of ShapeShifting Media: Summary Findings from the Project NM2 (New Millennium, New Media)
The Rapunsel Project
Day of the Figurines: Supporting Episodic Storytelling on Mobile Phones
Creating Interactive Poly-Artistic Works: The ConceptMove Project
Character-Focused Narrative Generation for Execution in Virtual Worlds
DocToon© - A Mediator in the Hospital of the XXIst Century
A Multidimensional Scale Model to Measure the Interactivity of Virtual Storytelling
Building Virtual Actors Who Can Really Act
Sound Navigation in PHASE Installation: Producing Music as Performing a Game Using Haptic Feedback
Developing Virtual Storytellers for the Virtual Alhambra
Real-Time Lighting Design for Interactive Narrative
Virtual Storytelling; Using Virtual Reality Technologies for Storytelling, Second International Conference, ICVS 2003, Toulouse, France, November 20-21, 2003, Proceedings
Beyond Human, Avatar as Multimedia Expression
The Art of Mixing Realities
BEcool: Towards an Author Friendly Behaviour Engine
Enabling Communications-Based Interactive Storytelling Through a Tangible Mapping Approach
Interactive Storytelling: People, Stories, and Games
The Role of Tangibles in Interactive Storytelling
Seizing Power: Shaders and Storytellers
Film and the Development of Interactive Narrative
Wide Ruled: A Friendly Interface to Author-Goal Based Story Generation
Virtual House of European Culture: e-AGORA (Electronic Arts for Geographically Open Real Audience)
Using Virtual Reality for "New Clowns"
Real Characters in Virtual Stories
Context Design and Cinematic Mediation in Cuthbert Hall Virtual Environment
From the Necessity of Film Closure to Inherent VR Wideness
Visual Scenario Representation in the Context of a Tool for Interactive Storytelling
A Distributed Virtual Storytelling System for Firefighters Training
FELIX 3D Display: Human-Machine Interface for Interactive Real Three-Dimensional Imaging
CardS4: Modal Theorem Proving on Java Smartcards
Programming Internet Smartcard with XML Scripts
Automated Test and Oracle Generation for Smart-Card Applications
JCCM: Flexible Certificates for Smartcards with Java Card
Context Inference for Static Analysis of Java Card Object Sharing
Protection Profiles and Generic Security Targets for Smart Cards as Secure Signature Creation Devices - Existing Solutions for the Payment Sector
Use of Biometrics for User Verification in Electronic Signature Smartcards
On-Card Bytecode Verification for Java Card
ElectroMagnetic Analysis (EMA): Measures and Counter-Measures for Smart Cards
A Flexible Invocation Framework for Java Card
iButton Enrolment and Verification Requirements for the Pressure Sequence Smartcard Biometric
SIMspeak - Towards an Open and Secure Application Platform for GSM SIMs
Mechanising a Protocol for Smart Cards
An Operational Semantics of the Java Card Firewall
Information Leakage Attacks against Smart Card Implementations of the Elliptic Curve Digital Signature Algorithm
Jakarta: A Toolset for Reasoning about JavaCard
Protecting Consumer Security Devices
Smart Card Programming and Security, International Conference on Research in Smart Cards, E-smart 2001, Cannes, France, September 19-21, 2001, Proceedings
Public-Key-Based High-Speed Payment (Electronic Money) System Using Contact-Less Smart Cards
An Internet Authorization Scheme Using Smart-Card-Based Security Kernels
Turning Multi-applications Smart Cards Services Available from Anywhere at Anytime: A SOAP / MOM Approach in the Context of Java Cards
Towards a Full Formal Specification of the JavaCard API
ASTEF: FPGA-Based Enhancement of Event Camera Performance in Low-Light Conditions
RapidWright: Enabling Custom Crafted Implementations for FPGAs
Defect and Fault Tolerance of Reconfigurable Molecular Computing
Size-Reconfiguration Delay Tradeoffs for a Class of DSP Blocks in Multi-mode Communication Systems
Accelerating Large-Scale Nearest Neighbor Search with Computational Storage Device
Accelerating Equi-Join on a CPU-FPGA Heterogeneous Platform
Optimizing Residue Number Reverse Converters through Bitwise Arithmetic on FPGAs
Source Level Debugger for the Sea Cucumber Synthesizing Compiler
3rd IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '95), 19-21 April 1995, Napa Valley, CA, USA
A Reconfigurable Cluster-on-Chip Architecture with MPI Communication Layer
Configurable Pipelined Datapath for Data Acquisition in Interventional Computed Tomography
Floorplanning for Partially-Reconfigurable FPGA Systems via Mixed-Integer Linear Programming
A Hardware Efficient Support Vector Machine Architecture for FPGA
Asynchronous PipeRench: Architecture and Performance Estimations
RACER: a reconfigurable constraint-length 14 Viterbi decoder
Image Signal Processors on FPGAs
Tinker: Generating Custom Memory Architectures for Altera's OpenCL Compiler
Measuring the Accuracy of Minimum Width Transistor Area in Estimating FPGA Layout Area
FPGA-Based Reduction Techniques for Efficient Deep Neural Network Deployment
18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2010, Charlotte, North Carolina, USA, 2-4 May 2010
SYSCORE: A Coarse Grained Reconfigurable Array Architecture for Low Energy Biosignal Processing
Scalable Quantum Error Correction for Surface Codes using FPGA
RapidPnR: Accelerating the Physical Design for FPGAs via Design-Level Parallelism
OneChip: an FPGA processor with reconfigurable logic
Peer-to-Peer Hardware-Software Interfaces for Reconfigurable Fabrics
CPR: A Configuration Profiling Tool
A General Purpose, Highly Efficient Communication Controller Architecture for Hardware Acceleration Platforms
Enabling a Uniform Programming Model Across the Software/Hardware Boundary
A Methodology for Task Based Partitioning and Scheduling of Dynamically Reconfigurable Systems
FREEDOM: FPGA-Based Hardware Redaction Emulator
Performance and Area Modeling of Complete FPGA Designs in the presence of Loop Transformations
Design of an On-Line IEEE Floating-Point Addition Unit for FPGAs
Benchmarking Technology for Configurable Computing System
Integrating High-Level Synthesis into MPI
LightningSim: Fast and Accurate Trace-Based Simulation for High-Level Synthesis
A Communication Aware Online Task Scheduling Algorithm for FPGA-Based Partially Reconfigurable Systems
Emulating static faults using a Xilinx based emulator
A Logic Based Hardware Development Environment
Ph.D. Project: Investigating oneAPI Performance & Scalability using Feedforward FFT Architectures
High Performance Memory Accesses on FPGA-SoCs: A Quantitative Analysis
SMART: High-Performance SAR ATR Through Model-Architecture Co-Design on FPGA
Exploiting Input Parameter Uncertainty for Reducing Datapath Precision of SPICE Device Models
Pipelined Function Evaluation on FPGAs
Dynamic Communication in a Coarse Grained Reconfigurable Array
A FPGA Based Forth Microprocessor
FPGA-based transformable computers for fast digital signal processing
12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 20-23 April 2004, Napa, CA, USA, Proceedings
Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays
An Architecture for the Acceleration of a Hybrid Leaky Integrate and Fire SNN on the Convey HC-2ex FPGA-Based Processor
Circlets: Circuits as Applets
A High-Speed and Memory Efficient Pipeline Architecture for Packet Classification
Efficient implementation of the DCT on custom computers
MSBF-LSTM: Most-significant Bit-first LSTM Accelerators with Energy Efficiency Optimisations
Breaking Sequential Dependencies in FPGA-Based Sparse LU Factorization
PROGRAPE-1: A Programmable Special-Purpose Computer for Many-Body Simulations
The Design and Implementation of a Context Switching FPGA
PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs
Adapting Constant Multipliers in a Neural Network Implementation
CNN-based Feature-point Extraction for Real-time Visual SLAM on Embedded FPGA
An Efficient Hardware Accelerator for Sparse Convolutional Neural Networks on FPGAs
The Potential of Dynamic Binary Modification and CPU-FPGA SoCs for Simulation
High Level Synthesis for Designing Custom Computing Hardware
Packet Switched vs. Time Multiplexed FPGA Overlay Networks
A New Powerful Scalable Generic Multi-Standard LDPC Decoder Architecture
OCMGen: Extended Design Space Exploration with Efficient FPGA Memory Inference
Loop Splitting for Efficient Pipelining in High-Level Synthesis
SQL2FPGA: Automatic Acceleration of SQL Query Processing on Modern CPU-FPGA Platforms
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine
Hardware/Software Co-Design Architecture for Lattice Decoding Algorithms
A Turbo Maximum-a-Posteriori Equalizer for Faster-than-Nyquist Applications
The Effect of FPGA Granularity on Video Codec Implementations
Congruential Sieves on a Reconfigurable Computer
A Routability-Driven Ultrascale FPGA Macro Placer with Complex Design Constraints
MORRPH: a modular and reprogrammable real-time processing hardware
Issues in wireless video coding using run-time-reconfigurable FPGAs
HBMorphic: FHE Acceleration via HBM-Enabled Recursive Karatsuba Multiplier on FPGA
Garp: a MIPS processor with a reconfigurable coprocessor
Synchronization in Software Radios-Carrier and Timing Recovery Using FPGAs
Hardware Implementation of Automated Sensor Self-Validation System for Cupola Furnaces
AIgean: An Open Framework for Machine Learning on Heterogeneous Clusters
A Multi-ported Memory Compiler Utilizing True Dual-Port BRAMs
An FPGA architecture for DRAM-based systolic computations
Task-Level Partitioning and RTL Design Space Exploration for Multi-FPGA Architectures
FFIVE: An FPGA Framework for Interactive VNF Environments
JHDL - An HDL for Reconfigurable Systems
A Tunable Dual-Edge Time-to-Digital Converter
Bit-serial pipeline synthesis for multi-FPGA systems with C++ design capture
LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation
Image Registration of Real-Time Video Data Using the SONIC Reconfigurable Computer Platform
FPGA Accelerated Online Boosting for Multi-target Tracking
Bluehive - A Field-Programable Custom Computing Machine for Extreme-Scale Real-Time Neural Network Simulation
GORDON: Benchmarking Optane DC Persistent Memory Modules on FPGAs
An Energy-Efficient FPGA-Based Vision Transformer Accelerator via Software-Hardware Co-Design
Increased FPGA capacity enables scalable, flexible CCMs: an example from image processing
An FPGA Design Framework for CNN Sparsification and Acceleration
Understanding Performance Differences of FPGAs and GPUs
BRAMAC: Compute-in-BRAM Architectures for Multiply-Accumulate on FPGAs
Overview of the FREEDOM Compiler for Mapping DSP Software to FPGAs
NoH: NoC Compilation in High-Level Synthesis
A High-Performance and Cost-Effective Hardware Merge Sorter without Feedback Datapath
FAFNER-Accelerating Nesting Problems with FPGAs
Configurable Flow Models for FPGA Particle Graphics Engines
Formalizing Loop-Carried Dependencies in Coq for High-Level Synthesis
A Reconfigurable Architecture for 1-D and 2-D Discrete Wavelet Transform
FPGA Virtualization for Deprecated Devices
Custom Computing Machines for the Set Covering Problem
An FPGA Accelerator for Genome Variant Calling
Accelerating Join Operation for Relational Databases with FPGAs
SIRC: An Extensible Reconfigurable Computing Communication API
A SW/HW Interface API for Java/FPGA Co-Designed Applets
An Execution Environment for Reconfigurable Computing
Combining Rewriting-Logic, Architecture Generation, and Simulation to Exploit Coarse-Grained Reconfigurable Architectures
Architectural descriptions for FPGA circuits
High-Performance Hardware Merge Sorter
FPGAs in the Cloud: Booting Virtualized Hardware Accelerators with OpenStack
Template-Based Generation of Streaming Accelators from a High Level Presentation
Odin-II Partial Technology Mapping for Yosys Coarse-grained Netlists in VTR
OpenMDS: An Open-Source Shell Generation Framework for High-Performance Design on Multi-Die FPGAs
Zedwulf: Power-Performance Tradeoffs of a 32-Node Zynq SoC Cluster
50 kHz Pattern Recognition on the Large FPGA Processor Enable++
Validation of an Advanced Encryption Standard (AES) IP Core
Application-Specific Memory Interleaving Enables High Performance in FPGA-based Grid Computations
Scalable Streaming-Array of Simple Soft-Processors for Stencil Computations with Constant Memory-Bandwidth
Better-Than-DMR Techniques for Yield Improvement
Efficiency, Expressivity, and Extensibility in a Close-to-Metal NPU Programming Interface
Look-up Table Design for Deep Sub-threshold through Full-Supply Operation
Bridging the Performance-Programmability Gap for FPGAs via OpenCL: A Case Study with OpenDwarfs
Accelerating the Gauss-Seidel Power Flow Solver on a High Performance Reconfigurable Computer
Hierarchical Modelling of Generators in Design-Space Exploration
Exploring Manycore Multinode Systems for Irregular Applications with FPGA Prototyping
OpenCL Kernel Vectorization on the CPU, GPU, and FPGA: A Case Study with Frequent Pattern Compression
High-Throughput Convolutional Neural Network on an FPGA by Customized JPEG Compression
Using On-Chip Configurable Logic to Reduce Embedded System Software Energy
Stream-Oriented FPGA Computing in the Streams-C High Level Language
Mapping Homogeneous Computations onto Dynamically Configurable Coarse-Grained Architectures
Perturbation Analysis for Word-length Optimization
Improving Data Partitioning Performance on OpenCL-Based FPGAs
A FPGA-Based Custom Computing System for Solving the Assignment Problem
Operating System Integration and Performance of a Multi Stream Cipher Architecture for Reconfigurable System-on-Chip
An Estimation and Simulation Framework for Energy Efficient Design using Platform FPGAs
An FPGA Implementation of Information Theoretic Visual-Saliency System and Its Optimization
Accelerating Proximal Policy Optimization on CPU-FPGA Heterogeneous Platforms
Implementation of IEEE single precision floating point addition and multiplication on FPGAs
Parallelism for High-Performance Tsunami Simulation with FPGA: Spatial or Temporal?
HP-FFT: A General High-Performance FFT Generator Using High-Level Synthesis
Enabling Long Debug Traces of HLS Circuits Using Bandwidth-Limited Off-Chip Storage Devices
Non-Preconditioned Conjugate Gradient on Cell and FPGA Based Hybrid Supercomputer Nodes
A Design Methodology for Application Partitioning and Architecture Development of Reconfigurable Multiprocessor Systems-on-Chip
Bit-Width Based Resource Partitioning for CNN Acceleration on FPGA
RACER - A Rapid Prototyping Accelerator for Pulsed Neural Networks
Design and Implementation of an FPGA-Based Real-Time Face Recognition System
A Single Program Multiple Data Parallel Processing Platform for FPGAs
FPGA-Based Database Query Processing on Arbitrarily Wide Tables
Enabling OpenMP Task Parallelism on Multi-FPGAs
Optimizing Hybrid Binary-Unary Hardware Accelerators Using Self-Similarity Measures
High level compilation for fine grained FPGAs
An Overview of the COBRA-ABS High Level Synthesis System for Multi-FPGA Systems
Flexible image acquisition using reconfigurable hardware
On Implementing a Configware/Software SAT Solver
Efficient Hardware Data Mining with the Apriori Algorithm on FPGAs
Debugging Techniques for Dynamically Reconfigurable Hardware
Optimized Distribution of an Accelerated Convolutional Neural Network across Multiple FPGAs
Energy Efficiency of Full Pipelining: A Case Study for Matrix Multiplication
Mobile Memory: Improving Memory Locality in Very Large Reconfigurable Fabrics
Design and Implementation of a Highly Parameterised FPGA-Based Skeleton for Pairwise Biological Sequence Alignment
Duty Cycle Aware Application Design using FPGAs
LightningSimV2: Faster and Scalable Simulation for High-Level Synthesis via Graph Compilation and Optimization
The FPGA Development System CHDL
FPGA Floating Point Datapath Compiler
A quantitative analysis of processor-programmable logic interface
Pipelined Hardware Architecture for High-Speed Optical Flow Estimation Using FPGA
On the Acceleration of Shortest Path Calculations in Transportation Networks
FPGA-Based Real-Time Charged Particle Trajectory Reconstruction at the Large Hadron Collider
Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH
A Multimodal AI Acceleration with Dynamic Pruning and Run-Time Configuration
Ph.D. Project: Accelerated Machine Learning for On-Orbit OPIR Target Detection
An Automated and Power-Aware Framework for Utilization of IP Cores in Hardware Generated from C Descriptions Targeting FPGAs
Optimizing FPGA-Based Vector Product Designs
Macro-Based Hardware Compilation of Java(tm) Bytecodes into a Dynamic Reconfigurable Computing System
Self Sorting Radix_2 FFT on FPGA using Parallel Pipelined Distributed Arithmetic Blocks
Acceleration of a 2D-FFT on an Adaptable Computing Cluster
A Novel Hueristic and Provable Bounds for Reconfigurable Architecture Design