yusuke1997/dblp-id-title huggingface dataset:
A model reduction procedure for high level canonical PWL functions
A 1.2-V 90-MHz Bitmap Index Creation Accelerator with 0.27-nW Standby Power on 65-nm Silicon-On-Thin-Box (SOTB) CMOS
A mixed analog/digital asynchronous processor for cortical computations in 3D SOI-CMOS
Low power and high performance clock delayed domino logic using saturated keeper
A novel low-power low-voltage Class D amplifier with feedback for improving THD, power efficiency and gain linearity
An Iterative Image Inpainting Method Using Mask Shrinking
A new hybrid recurrent neural network
Low power voltage regulator for EPROM applications
An efficient FIR filter architecture
Statistical analysis of Markov chaotic sequences for watermarking applications
Full-stream architecture for ray tracing with efficient data transmission
A 0.22 pJ/bit Processing-in-Controller GEMV Macro with Weight Prefetch for Efficient Near-Memory Computing
A low-voltage high-speed BiCMOS current switch with enhanced-spectral performance
Retinomorphic system design in three dimensional SOI-CMOS
Effects of RF impairments in transmitter for the future beyond-3G communications systems
Investigating the Impacts of Stochastic Load Fluctuation on Dynamic Voltage Stability Margin using Bifurcation Theory
Video streaming optimization using degradation estimation with unequal error protection
A Versatile and Efficient Neuromorphic Platform for Compute-in-Memory with Selector-less Memristive Crossbars
Mismatch in photodiode and phototransistor arrays
POSFET devices based tactile sensing arrays
On optimality of a two-processor scheduling for program nets with combined OR-nodes
Energy-Efficiency Millimeter Wave Communication System Based a New Beam Modulation Scheme
A Nano-power Wake-up Circuit for Energy-driven IoT Applications
Efficient intra-4×4 mode decision based on bit-rate estimation in H.264/AVC
A multifeature voiced/unvoiced decision algorithm for noisy speech
A Differential Difference Comparator for multi-step A/D converters
Design of ultraspherical windows with prescribed spectral characteristics
DMNI: A specialized network interface for NoC-based MPSoCs
An adaptive neuron circuit for signal compression
A 2.52 μΑ Wearable Single Lead Ternary Neural Network Based Cardiac Arrhythmia Detection Processor
State Encoding of Finite State Machines for Low Power Design
Stack engineering for ReRAM devices performance improvement
Effect of Electrolytic Capacitors on the Performance of Multicomponent Fractors
0.5 kHz-32 MHz digital fractional-N frequency synthesizer with burst-frequency switch
Power management with energy harvesting from a headphone jack
A Voltage Controlled Oscillator Using IGZO Thin-Film Transistors
A Zero-Crossing-Based Integrator with Bidirectional Two-Phase Charging and Selective-Reset Operations for ΔΣ ADCs
Dynamic stage matching for parallel pipeline A/D converters
A processor element for a mixed signal cellular processor array vision chip
A cochlear heterodyning architecture for an RF fovea
A 2.2GHz-80dBΩ CMOS receiver front-end for short-range optical communication employing DMT/OFDM
Monolithic distributed power supply for a mixed-signal integrated circuit
A fully-synthesized 20-gate digital spike-based synapse with embedded online learning
Fast Simulation of the Steady-State of Circuits by the Harmonic Balance Technique
Fractional-Order Complementary Filters for Sensor Applications
Rapid Fabrication of Soft Strain Sensors by Multi-Nozzle Electrohydrodynamic Inkjet Printing for Wearable Electronics
Code Length Compatible Belief Propagation Polar Decoder Based on Folding and Unfolding
Trojan-feature extraction at gate-level netlists and its application to hardware-Trojan detection using random forest classifier
Memory fartitioning-based modulo scheduling for high-level synthesis
Pulse width modulator using a phase-locked loop variable phase shifter
Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing
New sampling method to improve the SFDR of time-interleaved ADCs
Dark silicon-power-thermal aware runtime mapping and configuration in heterogeneous many-core NoC
Enhancing vocoder performance for music signals
A new blind signature waveform estimation approach in antenna array CDMA systems
Scene stitching with event-driven sensors on a robot head platform
On l2-Sensitivity for Generalized Direct-Form II Structure of 2-D Separable-Denominator Filters
A Miniaturized Dual-Modality Photoacoustic Fusion Imaging System
Application of fluid time hopping coding to multiple access in ultra wide band sensor networks
A global interconnect optimization algorithm under accurate delay model using solution space smoothing
A 10T SRAM with Two Read and Write Modes across Row and Column for CAM Operation and Computing In-Memory
Energy-saving design technique achieved by latched pass-transistor adiabatic logic
Improving IIR Filter Design by Considering the Allocation and Locations of Poles and Zeros
Low-Power and High-Throughput Approximated Architecture for AV1 FME Interpolation
A sub-1V CMOS voltage reference generator
Robust Deep Neural Object Detection and Segmentation for Automotive Driving Scenario with Compressed Image Data
A Coupled Oscillator Network to Solve Combinatorial Optimization Problems with Over 95% Accuracy
Random number generation by chaotic double scroll oscillator on chip
Swin Transformer for Pedestrian and Occluded Pedestrian Detection
Practical Aspects of Script-Based Analog Design Using Precomputed Lookup Tables
Case study: Bio-inspired self-adaptive strategy for spike-based PID controller
Design Centering High Frequency Integrated Continuous-Time Filters
An image pre-processing system employing neuromorphic 100×100 pixel silicon retina [robot vision applications]
On measurement of synchronous phasors in electrical grids
The 1-Steiner tree problem in lambda-3 geometry plane
Sensitivity analysis of periodically switched linear circuits using an adjoint network technique
A multi-modal approach to emotion recognition using undirected topic models
High output impedance current-mode multifunction filter using FTFNs
A 5.2 pJ/pulse impulse radio pulse generator in 90 nm CMOS
A novel class A CMOS current conveyor
Live demonstration: A versatile, low-cost platform for testing large ReRAM cross-bar arrays
Mitigating timing errors in time-interleaved ADCs: A signal conditioning approach
Graceful Degradation in Algorithm-Based Fault Tolerant Multiprocessor Systems
The Zak Transform and Decimated Spectrograms
On-Chip Solar Cell and PMU on the Same Substrate with Cold Start-Up from nW and 80 dB of Input Power Range for Biomedical Applications
A bio-inspired ultrasensitive imaging chip - Phase one: Design paradigm
A 2μW digital baseband core for wireless Micro-Neural-Interface in 0.18μm CMOS
Signal Analysis and Detection of COVID-19 Infection with ATR-FTIR Spectroscopy
On Sigma-Delta Signal Processing Remodulator Complexity
Rotationally invariant vision recognition with neuromorphic transformation and learning networks
Evaluation of F0 estimation using ZFR based on time-varying speech analysis
Architecture design of the re-configurable 2-D von Neumann cellular automata for image encryption application
An adaptive and low-complexity all-zero block detection for HEVC encoder
An Energy-Efficient Classifier via Boosted Spin Channel Networks
A High-Voltage ASIC for Ultrasound Neuromodulation with a Piezoelectric Transducer
Live Demonstration: Performance Comparison Between Ali266 and x265
An AMBA-compliant deblocking filter IP for H.264/AVC
Progressive lossless 3D mesh encoder with octree-based space partitioning
A hardware-efficient deblocking filter design for HEVC
Effect of Malware Spreading on Propagation of Cascading Failure in Cyber-Coupled Power Systems
Channel based routing in channel-less circuits
Design of constant-delay systems based on symmetry of time-domain response
A low-voltage single-Opamp 4th-order band-pass Sigma-Delta-modulator
Settling-time oriented OTA design through the approximation of the ideal delay
On coupled oscillators networks - For the cellular neural network
Low-power charge sensitive amplifier for semiconductor scintillator
Soft Error Reliability Assessment of Lightweight Cryptographic Algorithms for IoT Edge Devices
RPS-KNN: An Ultra-Fast FPGA Accelerator of Range-Projection-Structure K-Nearest-Neighbor Search for LiDAR Odometry in Smart Vehicles
Decimating SC filter for high speed sigma-delta D/A converters
A High Speed Modified Dickson Charge Pump
CMOS ASIC for MHz silicon BAW gyroscope
A novel algorithm for edge detection from direction-derived statistics
A reconfigurable time-domain comparator for multi-sensing applications
Clock distribution models of 3-D integrated systems
Design of FIR filters combining the frequency-response masking and the WLS-Chebyshev approaches
Memristive analog arithmetic within cellular arrays
A frequency up-conversion and two-step channel selection embedded CMOS D/A interface
A 10-Bit 15 V-Compliant Bi-Phasic Current-Mode Vagus Nerve Stimulation Circuit in 180 nm BCD Technology
Assessment of direct VRM topologies
An Adaptive Approach to Statistical Macromodeling of Analog Integrated Circuits
Planar microcoils array applied to magnetic beads based lab-on-chip for high throughput applications
Linear RF apertures using 2-D analog beam filters
A Miniaturized Delay Line based on Slow-Wave Substrates
An AER Contrast Retina with On-Chip Calibration
Human face recognition using a spatially weighted Hausdorff distance
A 174.8 dB FoMs CT-ΔΣ ADC with Integrated ISFET Sensor and Noise-Shaping Enhancement
Footstep classification using simple speech recognition technique
Silicon neurons that inhibit to synchronize
High-Accurate Stochastic Computing for Artificial Neural Network by Using Extended Stochastic Logic
Neuromorphic circuits for Short-Term Plasticity with recovery control
High speed current-mode signaling circuits for on-chip interconnects
Fixed sign Walsh transform and its iterative hardware architecture
An FPGA implementation of the flexible triangle search algorithm for block based motion estimation
GraphDiffusion: A Graph-conditioned Diffusion Model for Chip Placement
Implementation of a Nonlinear Self-Interference Canceller using High-Level Synthesis
Fast Intra Mode Decision for VVC Based on Histogram of Oriented Gradient
Enhanced CppSim-Based Behavioral Simulator for Predicting Noise Floor and Spurs in Fractional-N Frequency Synthesizers
Current-mode Multiple-valued Dynamic Memory
A digitally-calibrated 10GS/s reconfigurable flash ADC in 65-nm CMOS
Development of an Integrated Laboratory Course Sequence on Biomedical Instrumentation and Signal Processing
A new four-modulus RNS to binary converter
Synthesis of Customized Hardware from ADA
Optimum camera placement considering camera specification for security monitoring
Distributed optimal power flow: An Augmented Lagrangian-Sequential Quadratic Programming approach
Maximizing Wireless Power Transfer with Single-Turn Coreless Coupled Coils
Graph-theoretic approach to the design of four-switch DC-DC converters
A High-Precision, Fully Tunable OTA-C Second-Order Banpass Filter Implemented in GaAs MESFET Technology
Transform-based fine-corase vector quantization
An all-digital PLL with a first order noise shaping Time-to-Digital Converter
Formal analysis of high-performance stabilized active-input current mirror
Assertion-based on-line verification and debug environment for complex hardware systems
Constructing Intelligent Microsystems with Modular VLSI Networks Design
Multi-Bit Pulsed-Latch Based Low Power Synchronous Circuit Design
The inconvenient truth about alias rejection in continuous time ΔΣ converters
A prototyping technique for large-scale RTD-CMOS circuits
Physics model of memristor devices with varying active materials
Frequency domain chaotic watermarking
In-Silico Automated Allele-Specific Primer Design for Loop-Mediated Isothermal Amplification
An improved adaptive rood pattern search for fast block-matching motion estimation in JVT/H.26L
A Stochastic Reward & Punishment Neural Network Algorithm for Circuit Bipartitioning
Compact CMOS amperometric readout for nanopore arrays in high throughput lab-on-CMOS
Monocycle shapes for ultra wideband system
FSMD partitioning for low power using simulated annealing
Digital measurement of human proximity to electrical power circuit by a novel amplitude-shift-keying radio-frequency receiver
A power-scalable concurrent cascade 2-2-2 SC ΣΔ modulator for Software Defined Radio
A multi-stage and time-based continuous time ΣΔ Architecture using a Gated Ring Oscillator
Efficient output transition time modeling in CMOS gates with ramp/exponential inputs
A 28µW sub-sampling based wake-up receiver with -70dBm sensitivity for 915MHz ISM band applications
Exploration and evaluation of low-dropout linear voltage regulator with FinFET, TFET and hybrid TFET-FinFET implementations
Fast segment-wise DC coding for 3D video compression
Using CLNS for FFTs in OFDM demodulation of UWB receivers
Deep Echo State Networks for Detecting Internet Worm and Ransomware Attacks
Multiobjective VLSI cell placement using distributed simulated evolution algorithm
Design and FPGA implementation of finite Ridgelet transform [image processing applications]
Slice group based multiple description video coding with three motion compensation loops
DC Testing of Analog Integrated Circuits with Piecewise Linear Approximation and Interval Analysis
A 0.8V CMOS analog decoder for an (8, 4, 4) extended Hamming code
Color constancy via chromaticity neutralization: From single to multiple illuminants
Millimeter-Wave Propagation within a Computer Chip Package
SPRCPl: An Efficient Tool for SNN Models Deployment on Multi-Core Neuromorphic Chips via Pilot Running
Bifurcation behavior of a boost converter under voltage controlled pulse skipping modulation in the light of 1-D discontinuous map model
Structured Sparsity Learning for Efficient Learned Image Compression
A comparative study of low-noise logic cells for mixed mode integrated circuits
A novel 2-GHz band-pass delta modulator dedicated to wireless receivers
Performance of differentially detected π/4 DQPSK in the presence of IQ phase imbalance
Coefficient quantization error recovery
Performance analysis of CNFET based circuits in the presence of fabrication imperfections
A novel oscillation circuit using a resonant-tunneling diode
Routing design for transmission capacity maximization in complex networks
The extended Kalman filtering algorithm for carrier synchronization and the implementation
Foreground digital calibration of non-linear errors in pipelined A/D converters
Evaluation of differential vs. single-ended sensing and asymmetric cells in 90 nm logic technology for on-chip caches
PWL identification of dynamical systems: some examples
Tunable current-mode log-domain universal filter
Oscillatory hysteresis associative memory
Additional optimizations for parallel squarer units
A Systematic Methodology for Designing Multilevel Systolic Architectures
A simple recursive digital sinusoidal oscillator with uniform frequency spacing
Post-processing of supergate networks aiming cell layout optimization
An analog integrated systems course proposal for a 2nd cycle of studies of the bologna process
Continuous-time feed-forward SigmaDelta- modulators with robust signal transfer function
A digital watermark method using the wavelet transform for video data
HLS-based dataflow hardware architecture for Support Vector Machine in FPGA
A Computing-in-Memory SRAM Macro Based on Fully-Capacitive-Coupling With Hierarchical Capacity Attenuator for 4-b MAC Operation
Synthesis of Wideband Linear-Phase FIR Filters with a Piecewise-Polynomial-Sinusoidal Impulse Response
A low-power implantable Pseudo-BJT-based silicon retina with solar cells for artificial retinal prostheses
Using symbolic computer algebra for subexpression factorization and subexpression decomposition in high level synthesis
An efficient VLSI architecture of QPP interleaver/deinterleaver for LTE turbo coding
A design of the new FPGA with data path logic and run time block reconfiguration method
Data Hiding Algorithm for Nuclear Magnetic Resonance Spectroscopy Data based on Complex Graph Fourier Transform
Joint data detection and channel estimation for CPM in frequency-flat fading channel
A Timing-Shared Adaptive Sensing Methodology for Low-Voltage SRAM
Reduced-reference image quality assessment based on entropy differences in DCT domain
Output Column Folding for Cellular-Architecture FPGAs
A 1.8-v high-speed 13-bit pipelined analog to digital converter for digital IF applications
A low-cost masquerade and replay attack detection method for CAN in automobiles
A 20 MHz Fully-balanced Transconductance-C Filter in 2 µm CMOS Technology
Robust face recognition using subface hidden Markov models
A reconfigurable FGMOS based OTA-C filter
Impact of interconnects enhancement on SRAM design beyond 5nm technology node
Tolerance analysis of nonlinear circuits using set-valued functions
A 0.5-2 GHz high frequency selectivity RF front-end with series N-path filter
Integrated charge-control single-inductor dual-output step-up/step-down converter
A Radical-Partitioned Neural Network System Using a Modified Sigmoid Function and a Wight-Dotted Radical Selector for Large-Volume Chinese Characters Recognition VLSI
Reducing the Energy Dissipation of Large Language Models (LLMs) with Approximate Memories
Dynamics of a Logarithmic Transimpedance Amplifier
Modeling Cell Processing Hardware with Action Diagrams
Low power and power aware fractional motion estimation of H.264/AVC for mobile applications
A study of exponential stability for stochastic delayed neural networks
Modeling and simulation of information-embedded multi-converter power systems
An Identification Technique for Noisy ARMA Systems in Correlation Domain
Excess loop delay effects in continuous-time quadrature bandpass sigma-delta modulators
Associative Memory Architecture for Video Compression
QoE-aware resource allocation for integrated surveillance system over 4G mobile networks
Impact of Analog Memories Non-Idealities on the Performance of Foreground Detection Algorithms
Efficient Machine Learning Algorithm for Embedded Tactile Data Processing
An HMM-based speech recognition IC
Direct and Catalyst-Free Growth of Vertically-Stacked Graphene-Based Structures for Enhanced Drug Sensing
Preprocessing based solution for the vanishing gradient problem in recurrent neural networks
Resolution variant visual cryptography for street view of Google Maps
Symmetric intra block copy in video coding
On chip Gaussian processing for high resolution CMOS image sensors
A 12T SRAM in-Memory Computing differential current architecture for CNN implementations
Adaptive step-size digital controller for switching frequency auto-tuning
Design of 1 V switched-current cells in standard CMOS process
Adversarial Perturbation Attacks on GLRT-Based Detectors
Reconfigurable clock polarity assignment for peak current reduction of clock-gated circuits
JPEG based image compression with adaptive resolution conversion system
AMBA AHB bus potocol checker with efficient debugging mechanism
A CMOS image sensor for focal plane decomposition
On the use of joint diagonalization in blind signal processing
Low-power "Smart" CMOS image sensors
Correlation-Aware Recovery of Compressible and Localized Signals
Muliplier-free IIR filter realizations based on mixed radix number systems
High performance 3D CMP design with stacked hybrid memory architecture in the dark silicon era using a convex optimization model
Analysis of Second-Order Modes of Linear Continuous-Time Systems under Positive-Real Transformations
A Discrete Wavelet Transform-Based Voice Activity Detection and Noise Classification with Sub-Band Selection
6.5 mW CMOS low noise amplifier at 1.9 GHz
Design of Low-Voltage Bandgap Reference Circuits in Multi-Gate CMOS Technologies
MicroViT: A Vision Transformer with Low Complexity Self Attention for Edge Device
RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect
Reconfigurable Linear Feedback Register Design, Analysis & Applications
Fuzzy reasoning for the design of CNN-based image processing systems
A Bayesian skin/non-skin color classifier using non-parametric density estimation
Performance evaluation of H.264 video over ad hoc networks based on dual mode IEEE 802.11B/G and EDCA MAC architecture
Compact descriptors for mobile visual search and MPEG CDVS standardization
Improved Nauta transconductor for wideband intermediate-frequency gm-C filter
Accelerated state-variable modeling of synchronous machine-converter systems
Enhancing IoT Security with a Hardware Accelerated Machine Learning Model coupling Autoencoder and Long-Short-Term-Memory for Anomaly Detection
Neuro-inspired system for real-time vision sensor tilt correction
New method of on-sensor A/D conversion
Image multi-noise removal by wavelet-based Bayesian estimator
Verilog-a modeling of Silicon Photo-Multipliers
A Power-Efficient 10-MHz Bandwidth Active-RC CTDSM with a Charge-Recycled Highly-Linear 5-Level SC DAC
Novel integratable notch filter implementation for 100 dB image rejection
Fully integrated low-noise-amplifier with high quality factor L-C filter for 1.8 GHz wireless applications
Low Energy Heterogeneous Computing with Multiple RISC-V and CGRA Cores
A fault tolerant cache system of automotive vision processor complying with ISO26262
Adaptive Low/High Voltage Swing CMOS Driver for On-Chip Interconnects
Efficient BIST schemes for RNS datapaths
Compact Modeling of Reaction-Diffusion-Advection Mechanisms for the Virtual Prototyping of Lab-on-Chip
A Resistorless Precision Curvature-Compensated Bandgap Voltage Reference Based on the VGO Extraction Technique
A Novel Low-Complexity Rayleigh Fader for Real-Time Channel Modeling
Classification of brain MRI using the LH and HL wavelet transform sub-bands
Parallel algorithm for hardware implementation of inverse halftoning
Active polyphase filter analysis
Enhancing Stability in CRPs: A Novel Parallel Scan-Chain PUF Design Considering Aging Effects
Optimal signal discrimination in a Low signal-to-noise ratio environment
Multi Voltage High Performance Bidirectional Buffer in a Low Voltage CMOS process
Use of a continuation method for analyzing startup circuits
A 99.8-dB SNDR 10kHz-BW Second-Order DT Delta-Sigma Modulator with Single OTA and Enhanced Noise-Coupling
An Efficient Hardware Design of Prime Field Modular Inversion/Division for Public Key Cryptography
Strong Crypto for RFID Tags - A Comparison of Low-Power Hardware Implementations
A Decoding Strategy Using Graph Partitioning for Continuous-Speech Recognition
Neuromorphic visual saliency implementation using stochastic computation
High throughput area-efficient SoC-based forward/inverse integer transforms for H.264/AVC
Adaptive Lagrange Multiplier Selection for Intra-Frame Video Coding
A Nanowatt Area-Efficient 16-Channel Bandpass Filterbank with Floating Active Capacitance Multiplier for Acoustic Signal Processing
Analysis of the dynamic SFDR property of high-accuracy current-steering D/A converters
On distributions of multiple access interference for spread spectrum communication systems using M-phase spreading sequences of Markov chains
Micromachined piezoresistive tactile sensor array fabricated by bulk-etched MUMPs process
High-throughput hardware-efficient soft-input soft-output MIMO detector for iterative receivers
High-Speed Trace Detection DROIC for 15μm-Pitch Cryogenic Infrared FPAs
Direct gradient-based reinforcement learning
High-speed and low-power design of parallel turbo decoder
ZVS operating frequency versus duty ratio of class E amplifier with nonlinear shunt capacitance
A High-Resolution Non-Volatile Analog Memory Cell
A half rate CDR with DCD cleaning up and quadrature clock calibration for 20Gbps 60GHz communication in 65nm CMOS
10b 150MS/s 0.4mm 2 45nm CMOS ADC based on process-insensitive amplifiers
New four-phase generation circuits for low-voltage charge pumps
A high-efficiency CMOS charge pump circuit
A camera based closed loop control system for keyhole welding processes: Algorithm comparison
Adaptive projected subgradient method and its applications to robust signal processing