yusuke1997/dblp-id-title huggingface dataset:
A General Purpose Single-Slope MEMS Capacitive Sensors Interface Circuit For IoT Applications
A low-power current-reuse analog front-end for multi-channel neural signal recording
A CMOS cyclic folding A/D converter with a new compact layout technique
Tracking energy efficiency of near-threshold design using process variation control techniques
Digital compensation of DC-DC converter voltage ripple for Switched-Capacitor Power Amplifiers
Parametric analysis of helical resonators for resonant wireless power transmission links
A Method to Reduce the Design Complexity of Nanophotonic Interconnects
A Necessary and Sufficient Condition to Generate Representative Clip for Edge-Constrained Clustering of Layout Pattern Classification Problem
20th IEEE Interregional NEWCAS Conference, NEWCAS 2022, Quebec City, QC, Canada, June 19-22, 2022
DAC waveform effects in CT incremental ΣΔ ADCs for biosensor applications
Modelling and Analysis of FPGA-based MPSoC System with Multiple DNN Accelerators
A 60 GHz wideband Variable Gain Amplifier in 130nm SiGe BiCMOS for dielectric spectroscopy
Sensitivity Analysis of Memory Bandwidth on Column-superposed Versatile Linear CGRA
µW Pre-processing Unit for Virtual Sensors Based on Tri-axial Smart Accelerometers
DPDK and MKL; Enabling technologies for near deterministic cloud-based signal processing
A 0.6V-supply bandgap reference in 65 nm CMOS
19th IEEE International New Circuits and Systems Conference, NEWCAS 2021, Toulon, France, June 13-16, 2021
Channel aware receiver front end for low power 2.4 GHz Wireless Sensor Network: A system level analysis
Residue-weighted number conversion for moduli set {22 n - 1, 2 2n+1 - 1, 2 n } using signed-digit number
A 0.5-V 180-nm CMOS Switched-Capacitor Temperature Sensor with 319 nJ/measurement
A 62-dB SNDR second-order gated ring oscillator TDC with two-stage dynamic D-type flipflops as a quantization noise propagator
Markov Modeling of Video Coding Prediction Residue for Transform Hardware Power Analysis
A versatile quaternion multiplier based on sparse-iteration 4D CORDIC
Towards Current-Mode Analog Implementation of Deep Neural Network Functions
An ultra-low power charge-pump PLL with high temperature stability in 130 nm CMOS
A CMOS image sensor with low-complexity video compression for wireless sensor networks
A high PSRR, ultra-low power 1.2V curvature corrected Bandgap reference for wearable EEG application
Impulse signal generator based on current-mode excitation and transmission line resonator
Fractal dimension and high order statistics of spectral energy distribution as features for pathology detection in brain MR images
A modified RNS-to-binary converter scheme for {2 2n+1 - 1, 2 2n+1 , 2 2n - 1} moduli set
Efficient Scheduling, Mapping and Memory Bandwidth Allocation for Safety-Critical Systems
A Rigorous Analysis on Quadrature Single-Ended Ring Oscillators
Autofocus performance realization using automatic control approach
An 11.2nW, 0.45V PVT-tolerant Pulse-width Modulated Temperature Sensor in 65 nm CMOS
Circulator-Based RF Energy Harvester with Wide Input Power Dynamic Range
Modeling Surface Recombination with Enhanced Devices Network for Optoelectronics
A new oscillator-based Random Number Generator
Attack on a chaos-based "true" random bit generator
0.18-µm CMOS driver optimization for maximum data rate under power and area constraints
mm-Wave Through-Load Switch for in-situ Vector Network Analyzer on a 55-nm BiCMOS Technology
On the performance of a hybrid memristor/MOS π-attenuator circuit
Practical considerations for parameterized model order reduction of MEMS devices
Flexible Electrodes for the Electroanalysis of Neurotransmitters
A versatile low-power ciphering and integrity protection unit for LTE-advanced mobile devices
Using Optimized Butterworth-Based ΣΔ Bitstreams for the Testing of High-Resolution Data Converters
Identifying signal correlations using discrete event simulation
A low power RC time constant auto-tuning circuit for RC-integrators in high linearity continuous-time delta sigma modulators
A method for determining the response of adaptive multiple reset wide dynamic range pixels
A fully-synthesizable 0.6V digital LDO with dual-loop control using digital standard cells
Low-energy CMOS common-drain power amplifier for short-range applications
A Noise-Cancelling Harmonic Selection Receiver Using an N-Path Filter for 5G Applications
Substrate Coupling in a Fully Integrated Three-State High Voltage Inverter
Capacitive Cancellation in Compact Integrated Multi-GHz Differential Passive Baseband Filters
An Ultra Low-power Low-offset Double-tail Comparator
A tunable and reconfigurable active filter based on distributed structure concept
A 2.6GHz subharmonically injection-locked PLL with low-spur and wide-lock-range injection
Monitoring SRAM BTI degradation by current-based tracking technique
Nonlinear adaptive channel equalization using genetic algorithms
An ultra-low-voltage CMOS mixer using switched-transconductance, current-reuse and dynamic-threshold-voltage gain-boosting techniques
Design of a Power Management Circuit for an Opto-Electro Stimulator
CMOS voltage regulator for RF energy harvester
Using deep learning approaches to overcome limited dataset issues within semiconductor domain
Wideband mechanical energy harvester based on piezoelectric longitudinal mode
Digital Compensation of Timing-Skew Mismatches in TI-ADCs by Modulation and Source Separation
Multi-channel random demodulation for hardware efficient compressive sensing
Low-power high-speed wireless transceivers and antennas for large-scale neural implants
A 20 μW, 50 mV, Fully-Integrated Cross-Coupled Oscillator for On-Body IoT Applications
Siamese Convolutional Neural Network and Few-Shot Learning for Embedded Gesture Recognition
An UWB transmitter with power cycling and support for multiple modulation schemes
Cloud-based orthognathic surgical planning platform
NeuroECM: A Physics-Informed Neural Network Fusion Model for Equivalent Circuit Model of Li-Ion Battery
Interpreting and Reducing Variables in Analog Circuit Sizing Models with Explainable AI
Performance evaluation of FinFET-based FPGA cluster under threshold voltage variation
Characteristics optimization of stochastic ADC and its automatic generation system
Finite GBW compensation technique for CT ΔΣ modulators with differentiator based ELD compensation
1 st -Order Error-Feedback Sampling-Rate Reconfigurable Noise-Shaping SAR ADC for Multi-Channel CMOS Front-End ASICs for Space Applications
A 20kHz 87.2dB SNDR 12.1µW NS SAR ADC Based on Quantization-Error-Matched RLSB-First Algorithm
A low power wideband differential transimpedance amplifier for optical receivers in 0.18-μm CMOS
An RF Power-Harvesting Chipset Featuring 24dB Power Dynamic Range for Wireless Neural-Recording Headstage
Circularly Polarized In-Band Full-Duplex Antenna Array for Ka-Band Inter-CubeSat Links
An effective method to use GPU for rectangle packing
A 77.1dB/108.9dB SNDR dual-mode delta-sigma modulator
An Active Quenching Circuit for a Native 3D SPAD Pixel in a 28 nm CMOS FDSOI Technology
A digital blind background calibration algorithm for pipelined ADC
Fully Parallel, Flexible, and Conflict-Free Interleaver Design using Processing in Memory
Input-Layer Neuron Implementation Using Delta-Sigma Modulators
A Low Power Ultra-Wideband RF Receiver Front-End using a Differential N-Path Notch Filter
Area-Aware Design of Static CMOS Complex Gates
A size sensitivity method for interactive MOS circuit sizing
FPGA implementation of SVPWM
An Efficient MPPT Algorithm for Bistable PEH Associated with SEH and pSSHI
The design and implementation of DTMOS biased all PMOS rectifier for RF energy harvesting
When AI Turns Malicious: Unethical Use of LLMs for Hardware Design
Locking Decision Tree with State Permutation Obfuscation: Software Implementation
An Asynchronous Single-Inductor Multi-Input Multi-Output DC-DC Converter for Ambient Energy Harvesting with 94.8% Peak Efficiency
Estimating the Unknown Parameters of a Random Number Generator Based on a Chaotic Jerk System
Radio Receivers based on Spin-Torque Diodes as Energy Detectors
Design of a Reconfigurable Activation Function for All-Optical Neural Networks
A probabilistically analysable cache implementation on FPGA
Remote powering realization for smart orthopedic implants
Robust BER estimator for DBPSK modulation
A fixed frequency sampling method for wireless sensors power consumption estimation
High-efficiency LED Driver for Short Fluorophores Lifetime Biosensing Applications
Improving placement algorithms by using visualization tools
Phase noise measurement on IF analog signals using standard digital ATE resources
Modeling and characterization of CP-PLL phase noise in presence of dead zone
Confidence Estimation and Boosting for Dynamic-Comparator Transient-Noise Analysis
Heterogeneous Distributed SRAM Configuration for Energy-Efficient Deep CNN Accelerators
Variable Time-Step 2.5-15 GHz Phase Modulator with Pre-Distortion for Outphasing Transmitters
A comprehensive study on the power-sensitivity trade-off in TRF receivers
Broadband RF Front-End Featuring a Reconfigurable Q-Enhanced Filter for Upper Mid-Band 6G Receivers
Improved Dynamic Comparator With Adaptive Delay Line for the Latch Conduction and Regenerative Feedback Assisted FIA
A Low-Complex Compressive Sensing Based Thermal Sensor Placement for Multicore Systems
A High-Speed Charge-Injection based Double Tail Latch for Decision Feedback Equalizer (DFE)
Class φ2 ZVS regulation applied to L-Piezo inverter
Design of an STT-MTJ based true random number generator using digitally controlled probability-locked loop
Bitwise ELD Compensation under Integrator Nonidealities in ΔΣ Modulators
A Reconfigurable Power System-in-Package Module using GaN HEMTs and IC Bare Dies on LTCC Substrate: Design - Implementation - Experiment and Future Directions
Wireless Capsule Endoscopic Image Enhancement Method Based on Histogram Correction and Unsharp Masking in Wavelet Domain
Statistical Model Checking based Analysis of Fault Trees and Power Consumption to Enhance Autonomous Systems Reliability
WSN power management with battery capacity estimation
A Logic-Compatible 2T Gain-Cell eDRAM in 40-nm CMOS Process
Improving Pin Accessibility of Standard Cells under Power/Ground Stripes
Optimization of a pruned 2-D Digital Predistortion Model Structure for Power Amplifiers Linearization
A new method for kTC noise analysis in periodic passive switched-capacitor networks
TI-ADCs SFDR requirement analysis
Single-switch inductorless power management circuit for electrostatic vibration energy harvesters
Fine-grained power-gating scheme of a nonvolatile logic-in-memory circuit for low-power motion-vector extraction
Enhancing Semi-Supervised Learners via Similarity-Based Self-Supervised Models
Battery-Less Face Recognition at the Extreme Edge
Maximizing the Power-Efficiency of the Approximate Pruned Modified Rounded DCT Exploiting Approximate Adder Compressors
An Energy-Efficient Design Strategy for Dickson Charge Pumps with Linear Distributed Capacitance
Linear Power Amplifiers for Sub-6GHz Mobile Applications : Progress and Trends
Symbolic nodal analysis of analog integrated circuits using pathological elements
Analytical comparison between passive loop filter topologies for frequency synthesizer PLLs
Design of a wideband 1.5GHz to 3GHz class EF2 power amplifier
Hardware aware modeling of mixed-signal spiking neural network
A Dual-Output Picowatt Hybrid Voltage Reference with Digital Trimming Technique
A hybrid arithmetic transform for precision analysis of floating-point polynomial specifications
A current-output DAC for low-power low-noise log-domain ΔΣ modulators
High-Level Availability Analysis of FPGA-Based Time-Sensitive Networks
Baseband TIA Design Using Inversion Coefficient MOSFET Model in CMOS 28nm
A MEMS Electrothermal Actuator Designed for a DC Switch Aimed at Power Switching Applications and High Voltage Resilience
Dual Lifetime Referencing for Accurate CO2 Sensing: An Experimental in vitro Validation
High speed serial interface transceiver controller based on JESD204B
A Pipelined Speed Enhancement Technique for CDAC-Threshold Configuring SAR ADC
A 100MHz, 1.2V, ±1V peak-to-peak output, double-bus single ended-to-differential switched-capacitor amplifier for multi-column CMOS image sensors
Improved alias rejection using interleaved CIC decimation filter
DoA Estimation Using Reconfigurable Antennas in Millimiter-Wave Frequency 5G Systems
A low-power, 9-Bit, 1.2 ps resolution two-step time-to-digital converter in 65 nm CMOS
Highly stable, dual-port, sub-threshold 7T SRAM cell for ultra-low power application
Design and FPGA-based multi-channel, low phase-jitter ADPLL for audio data converter
Sub-10nW, 73dB Gain, Inverter-Based Digital OTA with C-Muller Input Stage and Novel CMFB for Enhanced Performance in IoT Applications
Design of Switched-Capacitor AC-DC Voltage Down-Converters for Micro-Watt Electrostatic Vibration Energy Harvesting
Evaluation of multicore systems soft error reliability using virtual platforms
Passive voltage level shifters for analog signaling
A fully integrated 5.78 GHz array of two differential oscillators coupled through a MOS transistor network
Designing of an algebraic signature analyzer for mixed-signal systems
A Computationally Efficient Predistortion and Segment Thresholding for Distributed PA Arrays
An analog front-end employing 87 dB SNDR stochastic SAR-ADC for a biomedical sensor
Recognition of blowing sound types for real-time implementation in mobile devices
Data-driven Processing Element for Sparse Convolutional Neural Networks
A 10 MS/s 12-bit Cryogenic SAR ADC in 22nm FD SOI for Quantum Computing
Neuromorphic-Enabled Security for IoT
N-Path Mixer with Wide Rejection Including the 7 th Harmonic for Low Power Multi-standard Receivers
Transconductance CMOS inverter based AC coupling amplifier
An adaptive pre-emphasis technique with opposite directional training
Implantable Systems - perspective review
Analysis and optimization of noise response for low-noise CMOS image sensors
A new enhanced PSPICE implementation of the equivalent circuit model of SiPM detectors
Towards GaN500-based High Temperature ICs: Characterization and Modeling up to 600°C
Digital predistortion for RF power amplifiers: State of the art and advanced approaches
Design and Experimental Evaluation of 60 GHz Self-compensating Bond-wire Interconnect
Dickson Charge Pump: Design Strategy for Optimum Efficiency
A power-efficient 14-bit 250MS/s pipelined ADC
A 3.7 V to 200 V highly integrated DC-DC converter with 70.4% efficiency for portable electrostatic MEMS applications
Fully integrated radio over fiber downlink for distributed multi-antenna systems in 65 nm CMOS
Soft-decision LCC Decoder Architecture with n=4 for RS(255, 239)
Design and Modeling of ADPLL with sliding-window for wide range frequency tracking
ISI Sensitivity of PAM Signaling for Very High-Speed Short-Reach Copper Links
Blind Digital Post-Distortion Technique for Nonlinear Receiver
Using LCSS algorithm for circuit level verification of analog designs
Virtual prototyping for biosystems: A spicy challenge
A Low-Voltage Submicrowatt, High-Speed CMOS Dynamic Comparator
Power Consumption Estimation of Digital Predistortion based on Spiking Neural Networks
Premature edge breakdown prevention techniques in CMOS APD fabrication
Activated Current Sensing Circuit for Resistive Neuromorphic Networks
A programmable DSP front-end for all-digital 4G transmitters
Single-Branch NMOS-Only Self-Cascoded Voltage Reference Operating Down to 0.28-V Supply
FPGA design of high throughput LDPC decoder based on imprecise Offset Min-Sum decoding
CMOS Amplifier Design Based on Extended $g_{m}/I_{D}$ Methodology
A Miniaturized, Low-Noise Magnetic Tunnel Junction (MTJ)-Based Gyroscope for High-Precision Rotation Sensing
A parallel decimal adder with carry correction during binary accumulation
An improved compact model of the electrical behaviour of the 5-contact vertical hall-effect device
Far-field UHF remotely powered front-end for patient monitoring with wearable antenna
VCO design in SOI technologies
Efficient power management circuit for RF energy harvesting with 74.27% efficiency at 623nW available power
A Spur-free Dynamic Element Matching Scheme for Bandpass DACs
A Surface-Micromachined Levitating MEMS Speaker
Ultra-high sensitivity, low-power dual chopper signal conditioning circuit for integrated sensors
A new discriminator for a low-power capacitor-less FSK demodulator for biomedical implants
A distributed synchronization of all-digital PLLs network for clock generation in synchronous SOCs
A spectro reflectance camera for in vivo human blood evaluation
A 0.8 V Low-Power 3rd order Sigma-Delta Modulator in 22 nm FDSOI CMOS Process for Sensor Interfaces
Interconnect design tradeoffs for silicon and glass interposers
A power-efficient wide-range signal level-shifter
Finite State Automata Design using 1T1R ReRAM Crossbar
CMOS 3D Hall probe for magnetic field measurement in MRI scanner
NB-IoT High Linear Doherty Amplifier with Active Balun
MIMO Techniques in a Visible Light Communication (VLC) Link with Imager
A Low-Power Phase Frequency Detector Using SRAM Cells in 22nm FD-SOI
Thermal cooling system development for LabPET II scanners by forced convection flow
Analysis of Circuit Non-Idealities in Asynchronous Delta Sigma Modulator
Transconductance/drain current based distortion analysis for analog CMOS integrated circuits
An Energy Efficient SAR ADC Architecture with DAC Separation
Optimized operation and temperature dependence of a direct light-to-time converter
Design and validation of a six-antenna WPT system with tracking capabilites for biomedical devices
Miniature antenna for breast tumor detection
Two-Fold Noise-Cancelling Low-Noise Amplifier in 28-nm CMOS
Evaluation of hybrid MRAM/CMOS cells for reconfigurable computing
Frequency and noise characterization for baseband signal processing on neuromorphic circuits
Power conversion and integrated circuit architecture for high voltage piezoelectric energy harvesting
A 2D Gaussian smoothing kernel mapped to heterogeneous platforms
High-Swing, Power-efficient, Current-Mode Hybrid Circuit Topologies for Simultaneous Bidirectional Communication
RFSoC Implementation of Runtime Reconfigurable Numerologies for 5G New Radio
A Logic Cell Design and routing Methodology Specific to VNWFET
Quick Compact Model Development Through Slow Transient Simulation: An Alternative Approach to Table Models for Emerging Nanodevices
A 0.3 nJ/bit super-regenerative pulse UWB receiver with track and detection
A 30MHz 28dBm-IIP3 3.2mW fully-differential Sallen-Key 4 th -order filter with out-of-band zeros cancellation
Robust Fractional Order Notch Filter for Estimating Accurate RS Features from ECG Signals with Muscle Contraction Noise
Multi-Phase Hybrid Boost Converter with High Conduction Loss Reduction and Fast Dynamic Response for Automotive Applications
Low-Power Event-Driven Spectrogram Extractor for Multiple Keyword Spotting: A proof of concept
On design of memory retention LDO regulator
Doherty Power Amplifier with Compact Load Modulation Network for 5G Applications
Efficient Hardware Implementation of Stochastic Computing with Hybrid Techniques
New design of transient-noise detection circuit with SCR device for system-level ESD protection
A Closed-Loop Ear Wearable EEG Measurement Device with Realtime Electrode Skin Impedance Measurement
Integrated Streak Camera with on Chip Analog Averaging for Low Light Level Imaging
New design of an ultra low power CDR architecture using FDSOI 28 nm technology
Run-time Instruction Replication for permanent and soft error mitigation in VLIW processors
A 550-μW, 2.4-GHz ZigBee/BLE Receiver Front End for IoT applications in 180-nm CMOS
Highly Integrated and Ultra-Compact Rectenna with Wireless Powering for Implantable Vascular Devices
An encoder/decoder with throughput over Gigabits/sec for rate-compatible LDPC codes with wide code rates
DCIM Compiler - Physical Design Generator
Cycle-slipping pull-in range of bang-bang PLLs
MoNA: Mobile Neural Architecture with Reconfigurable Parallel Dimensions
A concurrent transmitter in CMOS 28nm FDSOI technology based on Walsh sequences generator
An Accuracy-Area Tradeoff for Mixed-Signal Computation in Programmable Smart Image Sensors
Demodulation of aggregated RF signals with a unique Rx chain
Fault Attacks on Cryptographic Circuits
Fractional-Order Asymptotical Phase Shifter with Flat Magnitude Response
IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013, Paris, France, June 16-19, 2013
An Asynchronous Winner-Takes-All Arbitration Architecture for Tsetlin Machine Acceleration
A Compact, Low-Phase Noise Fractional-N PLL for Global Navigation Receiver
Battery-free Bluetooth Low Energy Wireless Sensor Powered by Radiative Wireless Power Transfer
Sub-nanosecond gated photon counting for high spatial resolution CMOS imagers
COTS-based modules for far-field radio frequency energy harvesting at 900MHz and 2.4GHz
Temperature compensation using least mean squares for fast settling all-digital phase-locked loop
A 0.3-V Energy-Efficient Low-Noise CMOS OTA for Portable Bioelectric Signal Acquisition Systems
Physically-Derived 3-Box Power Amplifier Model
Using Meta-heuristic Optimization to Extract Bio-impedance Parameters from an Oscillator Circuit
Scalable serial-configuration scheme for MTJ/MOS-hybrid variation-resilient VLSI system
Activity-Adaptive Architectures for Energy-Efficient Scalable Neural Recording Microsystems: A Review of Current and Future Directions
Adaptive UHF RFID analog front end for communication range improvement
A New Design Methodology to Improve the Input-referred Noise of Analog Front-end Circuits
Symbolic time-varying root-locus analysis for oscillator design
FIR Feedback in Continuous- Time Incremental Sigma-Delta ADCs
OxRAM-based non volatile flip-flop in 28nm FDSOI
Investigation of Single-Event Upsets in Radiation Hardened RRAM Memory Cells
A 2.41 GHz ISM receiver using an IQ VCO-mixer
Critical Comparison of Sequential and Non-sequential Modes Usage for the Design of a Czerny-Turner Spectrometer
Automatic Timing ECO Using Stage-based Path Delay Prediction
A Deeply Pipelined, Highly Parallel and Flexible LDPC Decoder
Exploring 0.3V Inverter Based OTA Designs with NOR3-Based Common Mode Feedback
Inductorless low power wideband LNA in 130 nm CMOS
Synchronous Electric Charge Extraction for multiple piezoelectric energy harvesters
Low complex Hardware Architecture Design Methodology for Cubic Spline Interpolation Technique for Assistive Technologies
A Modular System-level Testbench for 6G Beamforming Applications with Near Circuit-Level Fidelity
Analog-to-information converter design for low-power acquisition of astrophysical signals
User experience-based mechanism for preserving energy in graphics-intensive applications
A 1.99-ns 0.5-pJ Wide Frequency Range Level Shifter With Closed-Loop Negative Feedback
HLS-based Accelerated Simulation of Large Scale Cyber-Physical Systems on FPGAs
An IP interface design compiler with SystemC based input specifications
Preliminary Results from a 49-Channel Neural Recording ASIC with Embedded Spike Compression in 28 nm CMOS
A Fast Interface Circuit Using Multiple Signal Paths for High Bandwidth Hall Sensors
A Novel Analog-Front-End Circuit of the Touch System for Display Panel
Scalability and logic functionalities of TA-MRAMs
An adaptive magnetically coupled wireless power transmission system
Power Reduction in CNN Pooling Layers with a Preliminary Partial Computation Strategy
Tunable CMOS delay gate with reduced impact of fabrication mismatch on timing parameters
Self-Calibrating Digital-to-Time Converter in CMOS for Advanced Control in Smart Gate Drivers
Incorporation of Chopping in Continuous Time K-Delta-1-Sigma Modulator
A novel tunable impedance transmission line for mm-waves applications
A miniaturized autonomous microsystem for hydrogen gas sensing applications
Energy efficient diagnostic grade mobile ECG monitoring
System modelling of an integrated hysteretic controlled DC-DC converter
A Novel Offset and 1/f Noise Compensated Single-Slope ADC with Reduced Hardware Effort
Enhancing a HEVC interpolation filter hardware architecture with efficient adder compressors