yusuke1997/dblp-id-title huggingface dataset:
A low-power parasitic-insensitive switched-capacitor integrator for Delta-Sigma ADCs
Phase-locked loop architecture for enhanced voltage-controlled oscillator phase-noise suppression
Ultra-low power 90nm 6T SRAM cell for wireless sensor network applications
An Incomplete Settling Technique for Pipelined Analog-to-Digital Converters
A 1.8V CMOS, 80-200MHz continuous-time 4th order 0.05° equiripple linear phase filter with automatic tuning system
HD and IMD Prediction Techniques for Active Filters
A low-power subscriber line interface circuit in a high-voltage CMOS technology
A frequency hopping synthesizer IC for IF and RF applications
Design space exploration using hierarchical composition of performance models
Controlling chaos in DC/DC converters using optimal resonant parametric perturbation
Beyond SPICE
A Two-Stage CMOS OTA with Load-Pole Cancellation
Integrated optical computing: system-on-chip for surface plasmon resonance imaging
A rational subdivision scheme using cosine-modulated wavelets
A Novel Constant Current Control Strategy with Seamless Switching between CC and CV
High-order lowpass and bandpass elliptic log-domain ladder filters
Boosting as a dimensionality reduction tool for audio classification
Fast algorithms for signal subspace estimation with applications to DOA estimation
A subthreshold SRAM with embedded data-aware write-assist and adaptive data-aware keeper
Legalization Framework with Design Rule Constraints Enhanced by Monte-Carlo-Based Cell Priority Optimization
Frequency Fluctuations in CMOS-MEMS Oscillators: Towards the Thermomechanical Limit
A model based comparison of BiFeO3 device applicability in neuromorphic hardware
Integrated MEMS structures and CMOS circuits for bioelectronic interface with single cells
Lossless wavelet image coding using layered coefficient partitioning
Quantifying Input and Output Spike Statistics of a Winner-Take-All Network in a Vision System
A User-Friendly Fast and Accurate Simulation Framework for Non-Ideal Factors in Computing-in-Memory Architecture
Low-power methodology issues in digital circuit design
Pattern recognition with memristor networks
Reference Sharing Ultra Wideband Communication System
Security Framework for Cloud Control Systems Against False Data Injection Attacks
Design of a Fast Sequential Decoding Algorithm Based on Dynamic Searching Strategy
Design of Fractional Delay FIR Filter using Radial Basis Function
Efficient Highly-Parallel Decoder Architecture for Quasi-Cyclic Low-Density Parity-Check Codes
Multiple failure survivability in WDM networks with p-cycles
Virtual self-timed blocks for systems-on-chip
Linear networks and systems polynomially depending on parameters: Behaviour of the solutions for large and small values
Real-time transmission of stereo images over the access grid
Delay extraction from frequency domain data for causal macro-modeling of passive networks
SiGe Class-E Power Amplifier with Envelope Tracking for Mobile WiMAX/Wibro Applications
Time-Domain Model of Transmission Lines with Arbitrary Initial Potential and Current Distributions for Transient Analysis
Behavioural modeling and simulation of a switched-current phase locked loop
Line-based distributed coding scheme for onboard lossless compression of high-resolution stereo images
The Design of New Low-Voltage CMOS VHF Continuous-Time Lowpass Biquaud Filters
A high-speed residue-to-binary converter and a scheme for its VLSI implementation
Techniques for modelling and training multimedia expressive talking heads
Video coding with pixel-aligned directional adaptive interpolation filters
A method for verifying deadlock freedom and liveness of petri nets
Blind multiuser detection for DS-CDMA systems: a neural network approach
Analog CMOS current mode neural primitives
A novel low-complexity method for parallel multiplierless implementation of digital FIR filters
A telemetry and interface circuit for piezoelectric sensors
A CMOS smart focal plane for infra-red imagers
Broadband Class-EM Power Amplifier with Double Reactance Compensation Technique
Nonlinear signal processing vs. Kalman filtering
Integration of Plane Mode with Multiple Predictor Sets in Intra Prediction for video coding
Structural testing of pipelined analog to digital converters
Object-oriented representation, analysis, and scheduling of signal transition graphs
Novel Si integrated inductor and transformer structures for RF IC design
Bandwidth-enhancement gm-C filter with independent ωO and Q tuning mechanisms in both topology and control loops
An E-nose haar wavelet preprocessing circuit for spiking neural network classification
On accelerating slicing floorplan design with boundary constraints
Live demonstration: A frequency-based system for wireless electrical stimulation of iEAPs
Fast algorithm and common structure design of recursive analysis and synthesis quadrature mirror filterbanks for digital radio mondiale
A floating-gate technology for digital CMOS processes
A note on the dichotomy of limit sets for cooperative CNNs with delays
Tracking multiple point targets using genetic interacting multiple model based algorithm
Creating implicit homotopy methods using Hardware Description Languages
Joint Quality-temporal (Q-T) Bit Allocation for H.264/SVC
1.8 V-100 MHz CMOS programmable gain amplifier
Minimax Design of M-D Interpolated FIR Filters using Convex-Concave Procedure
Automated Teeth Extraction from Dental Panoramic X-Ray Images using Genetic Algorithm
Real-Time and Accurate State-of-Charge Estimation Methodology using Dual Square Root Unscented Kalman Filter
A Moving Sound Source Tracking based on Two Successive Algorithms
A low-power temperature-compensated CMOS peaking current reference in subthreshold region
A generalized study of the weighted least-squares measure for the selection of the regularization parameter in inverse problems
Least-squares trilinear interpolation for digital video coding
Wearable Cardiovascular Monitoring System Design Using Human Body Communication
On dynamic range limitations of CMOS current conveyors
Fast Finite Field Orthogonal Transform without length constraint
Synchronization in systems coupled via complex networks
An Energy Efficient JPEG Encoder with Neural Network Based Approximation and Near-Threshold Computing
Convergent transfer subgraph characterization and computation
Built-in self-test mode in a multi-path feedforward compensated operational amplifier
A protocol and memory manager for on-chip communication
An O(n) Residue Number System to Mixed Radix Conversion Technique
A very wide-band 14 bit, 1 GS/s track-and-hold amplifier
Similarity-Aware Fast Low-Rank Decomposition Framework for Vision Transformers
Fast automatic gain control employing two compensation loop for high throughput MIMO-OFDM receivers
A Time-interleaved Sampling Delay Circuit for IR UWB Receivers
Performance comparison of approximation algorithms for the minimum weight vertex cover problem
Floating-gate EEPROM cell: threshold voltage sensibility to geometry
Area and Time Efficient Cellular Non-linear Networks
Near-aperiodic dot-diffused block truncation coding
On Modelling the Frequency Components of Speech with Norm-Invariant Joint Densities
Power-aware slack distribution for hierarchical VLSI design
Exploiting negative quantum capacitance of carbon nanotube FETs for low power applications
A Fast Learning Algorithm for Gabor Transform Extraction
CROSSCUT: A Multi-Core Neuromorphic Accelerator Improving Resource-Utilization
ViT Coupled Efficient CMOS Image Sensor with Sparse Acquisition and Patch Selection
A Privacy-aware Quantilisation Approach for Efficient Edge Deep Learning Accelerator
Phase noise in bipolar and CMOS VCO's - an analytical comparison
Design of Multi-Directional Multi-Scroll Chaotic Attractors Based on Fractional Differential Systems
Identifiability of Multichannel Linear Systems Driven by Colored Inputs and Its Application to Blidn Signal Separation
High dynamic range, arbitrated address event representation digital imager
A low distortion wideband active-RC filter for a multicarrier base station transmitter
Fine tuning the GALE edge detection method
Building memristive neurons and synapses
On the behaviour of passive guard-rings in lightly doped substrates
Optimization of clock-gating structures for low-leakage high-performance applications
Hardware Efficient Reconfigurable Logic-in-Memory Circuit Based Neural Network Computing
A transformer-based low phase noise and widely tuned CMOS quadrature VCO
Digitally assisted multi-Bit ΣΔ modulator
A new audiovisual emotion recognition system using entropy-estimation-based multimodal information fusion
On Buck-Boost Converter Power Inductor Matching
An adaptive 16/64 kHz, 9-bit SAR ADC with peak-aligned sampling for neural spike recording
Distributed state estimation for sensor networks with randomly occurring sensor saturations
Design of a Sleep Modulation System with FPGA-Accelerated Deep Learning for Closed-loop Stage-Specific In-Phase Auditory Stimulation
EA-Based Refactoring of Mapped Logic Circuits
A Monolithic GaN Power Stage with Low Propagation Delay and High Reliability Level Shifting for High Frequency Power Converter
Harvesting a clock from a GSM signal for the wake-up of a wireless sensor network
Improving the scalability of checkpoint recovery for networks-on-chip
Optimization of Distributed Parameter Systems with a Combined Statisitcal-Deterministic Method
2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012
A neural model for sonar-based navigation in obstacle fields
A Convolutional Code for On-chip Interconnect Crosstalk Reduction
A 4-Kb low power 4-T SRAM design with negative word-line gate drive
Sampled-data operational-amplifier with ultra-low supply voltage and sub µW power consumption
Advanced instrument controller ASIC
Electrical characteristics of novel ESD protection devices for I/O and power clamp
Optimal Design of a Decoupling Network Using Variants of Particle Swarm Optimization Algorithm
Transient Variations in Emerging SOI Technologies: Modeling and Impact on Analog/Mixed-Signal Circuits
On the Effectiveness of Reducing Large Linear Networks with Many Ports
Noise reduction system based on frequency domain adaptive filter using modified DFT pair
Design of two-dimensional recursive filters by using a novel genetic algorithm
Delay approximation for synchronous filter topologies
A 0.6ps jitter 2-16 GHz 130nm CMOS frequency synthesizer for broadband applications
Support vector regression based adaptive power system stabilizer
From n-scroll to n-scroll attractors: A general structure based on Chua's circuit framework
An Accurate Modelling of CMOS Folded Cascode Op-Amp with Negative Transconductance
Efficient implementation of secondary synchronization symbol detection in 3GPP LTE
pH sensing threads with CMOS readout for Smart Bandages
Perceived visual quality metric based on error spread and contrast
Energy efficient design for subthreshold supply voltage operation
Area-efficient Reed-Solomon Decoder Design for 10-100 Gb/s Applications
An Adaptive Neural Spike Detector with Threshold-lock Loop
On primitive factorizations for n-D polynomial matrices
Efficient time-domain simulation of continuous-time Delta-Sigma A/D converters using analytical integration
High-Precision Stochastic State-Space Digital Filters Based on Minimum Roundoff Noise Structure
An ultra-low-power SAR ADC with an area-efficient DAC architecture
Computation of Boolean matrix chain products in 3D ReRAM
Multi layer based rate control algorithm for HEVC
Verification of arithmetic datapath designs using word-level approach - A case study
Narrowband interference reduction in UWB systems based on spreading sequence spectrum shaping
An ASIC Implementation of Security Scheme for Body Area Networks
Adaptive filters with nonlinear RLS algorithm in impulse noise
The Design of CMOS Transconductor for High Frequency Continuous-Time Filter Applications
Fault prediction and modelling in transport networks
Localization of wide-band signals via extended Kalman filter
A novel decimal-to-decimal logarithmic converter
A low-energy low-voltage asynchronous 8051 microcontroller core
Real-time decoding of brain activity by embedded Spiking Neural Networks using OxRAM synapses
Combinatorial Optimization in Hopfield Networks with Noise and Diagonal Perturbations
100MHz, 6th order, leap-frog gm-C high Q bandpass filter and on-chip tuning scheme
Design and FPGA Realization of QUBO hardware accelerator for MAX-CUT problem
An improved method for blind separation of complex-valued signals via joint diagonalization
A low-power low-noise amplifier in 0.35µm SOI CMOS technology
The wordlength determination problem of linear time invariant systems with multiple outputs - a geometric programming approach
Decomposed Parametric Form of the State Model of a Piecewise-Linear System
Emotion Recognition Using Novel Speech Signal Features
Simulation of the nano electronic single-electron transistor and the nanoelectronic C-NOT single-electron gate
Multi-mode impedance synthesis for subscriber line applications
Combining ISA extensions and subsetting for improved ASIP performance and cost
A new level-up shifter for high speed and wide range interface in ultra deep sub-micron
Synthesis of Coupling Capacitance Based Hidden State Transitions for Sequential Logic Locking
Snowflake: An efficient hardware accelerator for convolutional neural networks
Analog and mixed signal modelling with SystemC-AMS
New dominant point detection for image recognition
A 0.96pJ/SOP, 30.23K-neuron/mm 2 Heterogeneous Neuromorphic Chip With Fullerene-like Interconnection Topology for Edge-AI Computing
Quantization offsets for video coding
Efficient Double-tail Dynamic Comparator Circuit for High-performance Analog-to-Digital Data Converters
Compress Compound Images in H.264/MPEG-4 AVC by Fully Exploiting Spatial Correlation
Index assignment for transmitting vector quantized LSF parameters over binary Markov channels
A 14-bit 1-GS/s SiGe Bootstrap Sampler for High Resolution ADC with 250-MHz Input
System on chip FPGA design of an FM demodulator using a Kalman band-pass sigma-delta architecture
A Branch Selection Multi-symbol High throughput CABAC Decoder Architecture for H.264/AVC
A Low Jitter Arbitrary-input Pulsewidth Control Loop with Wide Duty Cycle Adjustment
A robust audio watermarking scheme
Analysis and Design of Bias-Current-Free Hybrid Phase-Locked Loops with Multi-Phase Time-Interleaved Phase Detector
Research on Strategy of the Stability Control System of Dual-Motor Drive Electric Vehicle
A unifying group of global asymptotical stability of neural networks with delay
A new model architecture for customer software integration
An Analog-assisted Fast-transient Digital LDO with a Charge-pump-based Fine Loop Achieving 0.14-mV Output Voltage Ripples
Perceptually optimized error resilient transcoding using attention-based intra refresh
The Perceptually Transparent Coding for Image
NEAR: A Novel Energy Aware Replacement Policy for STT-MRAM LLCs
CleanUMamba: A Compact Mamba Network for Speech Denoising using Channel Pruning
A Time-Delay Differential-Algebraic Phasor Formulation of the Large Power System Dynamics
Implementation of Fast Bit-Serial Lattice Wave Digital Filters
Interconnection of autonomous error-tolerant cells
Recover image details from LDR photographs
Systolic counters with unique zero state
A Pipelined Memristive Neural Network Analog-to-Digital Converter
A 2 W BTL single-chip class-D power amplifier with very high efficiency for audio applications
Power and signal integrity improvement in ultra high-speed current mode logic
Fully integrated 9 GHz CMOS VCO with very low phase noise
Solution of the Missing Cure Problem by Artificial Neural Network
A wide-band current-mode OTA-based analog multiplier-divider
Video compression using 3D multiscale recurrent patterns
A New CMOS 3.1-11.7 GHz Low Power LNA for Ultra-Wideband Wireless Applications
New Power Gating Structure with Low Voltage Fluctuations by Bulk Controller in Transition Mode
Voltage Elevator using a MEMS Resonator
Use of dynamic element matching in a multi-path sigma-delta modulator
OTA Based Fractional-Order Oscillator With Controlled Phase Difference
Characteristics and modeling of a broadband transmission-line transformer
Frequency-interleaving technique for high-speed A/D conversion
A novel analog-digital flash converter architecture based on capacitive threshold gates
A compact pico-second in-situ sensor using programmable ring oscillators for advanced on chip variation characterization in 28nm HKMG
Fault tolerant design of signed digit based FIR filters
A Novel Method to Predict Both, the Upper Bound on the Number and the Stability of DC Operating Points of Transistor Circuits
Towards tamper detection and classification with robust watermarks
Minimizing the memory requirement for continuous flow FFT implementation: continuous flow mixed mode FFT (CFMM-FFT)
Stability Predictions for High-Order SigmaDelta Modulators Based on Quasilinear Modeling
A 0.2 pJ/bit, Energy-Efficient, Half-Rate Hybrid Circuit Topology at 6-Gb/s in 1.2V, 65 nm CMOS
A Low Leakage SRAM Bitcell Design Based on MOS-Type Graphene Nano-Ribbon FET
Integrated BiCMOS IF-Modules for Mobile Telecommunication Applications
Noisy autoregressive system identification by the ramp cepstrum of one-sided autocorrelation function
A PEDOT: PSS/SWCNT-Coated Screen Printed Immunosensor for Histamine Detection in Food Samples
Robustness of stability regions of nonlinear circuits and systems under parameter variation
A multi-band multi-standard RF front-end IEEE 802.16a for IEEE 802.16a and IEEE 802.11 a/b/g applications
Behavioral modeling and simulation of high-speed analog-to-digital converters using SystemC
A simple voltage reference using transistor with ZTC point and PTAT current source
The So-called Current-feedback Operational Amplifier - Technological Breakthrough of Engineering Curiosity?
A 266-3750 MHz Wide-Range Adaptive Phase-Rotator-Based All Digital DLL for LPDDR5 Controllers
A 17.5-Gb/s transceiver with a MaxEye-based autonomous adaptation
A new level converter for low-power applications
Direct Analysis of Multiphase Switched-Current Networks Using Signal-Flow Graphs
A practical design method for prototyping self-timed processors using FPGAs
Beamforming using passive nested arrays of sensors
Census transform-based static caption detection for frame rate up-conversion
Amplitude modulation based on time-varying forced function of second-order oscillator circuit
A novel control technique to eliminate output-voltage-ripple in switched-capacitor DC-DC converters
Prediction of core losses on a three-phase transformer using neural networks
Multi-ReRAM Synapses for Artificial Neural Network Training
Efficient Resource-Aware Neural Architecture Search with Dynamic Adaptive Network Sampling
Highly-linear, current-feedback resistive source-degenerated MOS transconductor
A deflection criterion for time-interleaved analog-to-digital converters
A robust quasi-Newton adaptive filtering algorithm for impulse noise suppression
SC Circuits: The State of the Art Compared to SI Techniques
Blind IQ error compensation in a direct conversion receiver for DVB-T
Approximate SRAM-Based Memory System for Intra-Frame Prediction in VVC Encoders
A High Performance Dual-Wordline RRAM Macro with Replica Bitline Delay Control Circuit
Correcting unsynchronized zoom in 3D video
An Adaptive Analog Front End for a Flexible PPG Sensor Patch with Self-Determined Motion Related DC Drift Removal
Efficient implementation of modular multiplication by constants applied to RNS reverse converters
Signal-adapted directional lifting scheme for image compression
Image compressive sensing using overlapped block projection and reconstruction
An ASIC Interface for CMUTs-based Biosensors with High Voltage Boosting and Oscillator
A Robust Parallel Delta-Sigma A/D Converter Architecture
Design considerations of STCB OTA in CMOS 65nm with large capacitive loads
Interconnect model generation tool
IBMG: interpretable behavioral model generator for nonlinear analog circuits via canonical form functions and genetic programming
An Automated Approach to Compare Bit Serial and Bit Parallel In-Memory Computing for DNNs
Design of Active RLC Integrated Filters with Application in the GHz Range
Performance Analysis and Optimal Structuring of Subchannels for Discrete Multitone Transceivers
A Current-Injection-Based Flying Capacitor Balancing Circuit for Three-Level DC-DC Converter
Statistical Analysis of Mapping Technique for Timing Error Correction in Current-Steering DACs
Schur stability of interval bivariate polynomials
A Self-Bias Rectifier with 27.6% PCE at -30dBm for RF Energy Harvesting
Automotive Sensor Infrastructure - Challenges and Opportunities
Convergence Suppression and Divergence Facilitation: New Approach to Prune Hidden Layer and Weights of Feedforward Neural Networks
Analysis of power supply noise attenuation in a PTAT current source
Three-Phase Motor Driver with Overcurrent Protection Function
Mobility overlap-removal based leakage power aware scheduling in high-level synthesis
Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis
Decoding Energy Estimation of an HEVC Hardware Decoder
An 1 V rail-rail low-power CMOS op-amp
Maximum crosstalk in a transmission line system with linear time-invariant terminal networks
A novel VLSI architecture for VBSME in MPEG-4 AVC/H.264
Symmetry-breaking bifurcation in load resonant dc-dc converters
Low-power short-channel single-ended current-steered CMOS logic-gate for mixed-signal systems
An improved weighted least-squares design of FIR digital filters with variable fractional delay
Basins of attraction for periodic solutions of discretized sliding mode control systems
A new quantized DCT and its implementation on multimedia processor
Alternative Architectures for the 2-D DCT Algorithm
Adaptive tile depth filter for the depth buffer bandwidth minimization in the low power graphics systems
Predictive Successive Approximation ADC
An investigation on the parameters affecting total harmonic distortion in class D amplifiers
Improving the Statistical Properties of Number Sequences Produced by Pseudorandom Generators derived from the Rényi Chaotic Map
Level shifter design for voltage stacking
A 0.54-mW duty controlled RSSI with current reusing technique for human body communication
A new algorithm for computing the overall network reliability
An algorithm for the verification of timing diagrams realizability
AES architectures for minimum-energy operation and silicon demonstration in 65nm with lowest energy per encryption
An Architecture-driven Approach for the Fitting Problem in an Application-specific EPLD
Novel applications of row-semi-indefinite networks
Switched Capacitor DC-DC Converter for Miniaturised Wearable Systems
CIMR-V: An End-to-End SRAM-based CIM Accelerator with RISC-V for AI Edge Device
Compatible probability measures of the outputs of template-based speaker identification classifiers for data fusion
Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder
Designing and packaging technology of Renesas SIP
0.18µ CMOS Gm-C digitally tuned filter for telecom receivers
A new watermarking system for joint ownership verification
A Low Power Fully Intergrated RF Transceiver for Medical Implant Communication
Cyber-physical management for heterogeneously integrated 3D thousand-core on-chip microprocessor
XbarSim: An educational simulation tool for memristive crossbar-based circuits
Multiple Sampling and Pixel-Wise Accumulation in CMOS Capacitive Sensor Array System for Real-Time Droplet Analysis
A Feedback Control Circuit Design Technique to Suppress Power Noise in High Speed Output Driver
FIR-RAKE receiver for TD-SCDMA mobile terminals
Load flow based distribution system short-circuit algorithm incorporating distributed synchronous generators
Neural network ultrasonographic diagnosis system of cirrhosis using DWT for preprocessing
Picoseconds measurement of internal waveforms in integrated circuits using sampling force probing. II. Applications, capabilities, and limitations
Fast vehicle detection based on feature and real-time prediction
A spur-free fractional-N ΣΔ PLL for GSM applications: linear model and simulations