yusuke1997/dblp-id-title huggingface dataset:
Vehicle image classification via expectation-maximization algorithm
Graphene based GHz flexible nanoelectronics and radio receiver systems (Invited)
Deep learning neural networks optimization using hardware cost penalty
Energy-Efficient Ising Machines Using Capacitance-Coupled Latches for MaxCut Solving
Power optimization of CMOS LC VCOs
A Genetic Rhombus Pattern Search for Block Motion Estimation
Rise time analysis of MOBILE circuit
Coupled Physarum-Inspired Memristor Oscillators for Neuron-like Operations
Cascaded double-stage configuration for high-performance broadband amplification in CMOS
Controlling Chaotic Motions in Chua's Circuit via Tunnels
Optimal joint rate and power allocation in a multicell multimedia CDMA network
Buffer implementation for Proteo network-on-chip
Design and Implementation of Parallel-IDT Surface Acoustic Waves (SAW) Low Loss RF Filters
LCMOS: Light-powered standard CMOS circuits
Using the CS decomposition to compute the 8-point DCT
A computationally-efficient PWM technique for digital class-D amplifiers
Noise-robust automatic speech recognition using mainlobe-resilient time-frequency quantile-based noise estimation
An efficient algorithm of performing range analysis for fixed-point arithmetic circuits based on SAT checking
A 12-bit, 2.5-bit/cycle, 1 MS/s two-stage cyclic ADC, for high-speed CMOS Image sensors
A wide-range dual-modulus prescaler using a novel SCL biasing technique
Noncausal image modeling with applications to image restoration
Multiuser scheduling for downlink in multi-antenna wireless systems
Quantitative modelling and comparison of communication schemes to guarantee quality-of-service in networks-on-chip
A Tool for Fast Mismatch Analysis of Analog Circuits
Automatic data path extraction in large-scale register-transfer level designs
Extracting a polynomial ac FET model with thermal couplings from S-parameter measurements
A Comparative Study of RF-QAM and Conventional Transmitter Architectures
Optimization of bipolar and tetrapolar impedance biosensors
Improved Chroma From Luma Intra Prediction Mode Beyond AV1
A low-complexity fully scalable interleaver/address generator based on a novel property of QPP interleavers
A 5mW batteryless start-up boost charger for wireless power transfer
A 3-D Reconfigurable RRAM Crossbar Inference Engine
A modular sensor microsystem utilizing a universal interface circuit
A novel representation method for electromyogram (EMG) signal with predefined signature and envelope functional bank
A Compact Full Pipeline Architecture of SM3 Algorithm with High throughput and High Efficiency
A 36nW Ultra-Wideband Wake-Up Receiver with -86dBm Sensitivity and Addressing Capabilities
Florida Wireless Implantable Recording Electrodes (FWIRE) for Brain Machine Interfaces
Input Evoked Nonlinearities in Silicon Dendritic Circuits
Some properties of the z-domain continued fraction expansions of 1-D discrete reactance functions
Deployment of visual sensor networks using a graph-based approach
Digital filtering for power amplifiers linearization
Efficient algorithms for planar embedding of graphs with constraints in placing specified vertices on face boundaries
An energy efficient antenna selection for large scale green MIMO systems
CMOS Integrated LC RF Bandpass Filter with Transformer-Coupled Q-Enhancement and Optimized Linearity
A 12-bit 1-MS/s 2-bit/cycle Asynchronous SAR ADC for MEMS Inertial Sensors Readout
Towards a sub-1 V CMOS voltage reference
Programmable Floating Gate FPAA Switches Are Not Dead Weight
Compensation of SNR Degradation Caused by Nonlinearity of the Phase Interpolator in a Frequency-Domain Echo Canceller
MOS Active Attenuators for Analog ICs and their Applications to FInite Gain Amplifiers
Prospects for dynamic transmission circuit ratings
Extending SystemC to support mixed discrete-continuous system modeling and simulation
A low power BPSK demodulator for wireless implantable biomedical devices
An analytical fault model for direct current lines
An efficient test vector compression technique based on block merging
Image sensor with focal plane polarization sensitivity
Computing with Coupled Oscillators: Theory, Devices, and Applications
On the Comparison of Optimum Least-Squares and Computationally Efficient DFT-Based Adaptive Block Filters
Minimax Design of 2-D Complex-Coefficient FIR Filters with Low Group Delay using Semidefinite Programming
A voltage scaling 0.25-1.8 V delta-sigma modulator with inverter-opamp self-configuring amplifier
Statistical Image Modeling with the Magnitude Probability Density Function of Complex Wavelet Coefficients
Improving Content-Aware Video Streaming in Congested Networks with In-Network Computing
Design of piece-wise maps for spread spectrum communication using genetic programming
FLAG: Formula-LLM-Based Auto-Generator for Baseband Hardware
Real-time processing of noisy RF pulses
Practical methods for verifying removal of Trojan stable operating points
Amorphous Silicon Single Photon Avalanche Diode Integrated with Memristor for Short Term Memory Based Rapid Passive Quenching
An integrated patch-clamp amplifier for high-throughput planar patch-clamp systems
On the Geometrical Structure of Network Equations
Algebraic representation of error bounds for describing function using Groebner base [nonlinear circuit analysis example]
Analog frequency response measurement in mixed-signal systems
A 0.9V-VDD sub-nW resistor-less duty-cycled CMOS voltage reference in 65nm for IoT
Zebra: Memory Bandwidth Reduction for CNN Accelerators with Zero Block Regularization of Activation Maps
Design of MOS current mode logic gates - computing the limits of voltage swing and bias current
A class of active learning control
A Highly Reliable Physical Unclonable Function Based on 2T Voltage Reference and Diode-Clamped Comparator
Generalized alpha-VSH polynomials and stability of delta-operator based 2D discrete-time systems
Public-key encryption based on Chebyshev maps
A 2048 complex point FFT processor using a novel data scaling approach
Macroscopic broadband loss characteristics of power transformer winding extracted by Vector Fitting Method
New low-power low-voltage differential class-AB OTA for SC circuits
Systematic synthesis method for analogue circuits. Part I. Notation and synthesis toolbox
On oscillatory dynamics of small-RNAs-mediated two-gene regulatory networks
A Waveront Array for URV Decomposition Updating
Output noise of generalized high-order allpole OTA-C filters
An Anti-Aliasing Filter with a Programmable Bandwidth of 10-500MHz for Supply Modulator
Potential of chaos communication over noisy channels - channel coding using chaotic piecewise linear maps
A Universal Method for Hierarchical Object Recognition based on Low-Power Vision Sensors
A Morphological Fingerprint Minutiae Annotation Algorithm for Deep Learning Datasets
Physically unclonable function using RTN-induced delay fluctuation in ring oscillators
A mixed-signal calibration technique for low-voltage CMOS 1.5-bit/stage pipeline data converters
Live Demonstration: Portable Bowel Sound Idenfication System
On the Development of a Low-Cost Photosynthetically Active Radiation (PAR) Sensor
High Swing Pulse-Amplitude Modulation of Transmission Line Links for On-Chip Communication
Establishment of Technology for Constructing Sensor Networks to Support Safe and Secure Areas in Collaboration with the Local Government
Feedforward reversed nested Miller compensation techniques for three-stage amplifiers
New results on multidimensional filter banks and wavelets
VOTED - Versal Optimization Toolkit for Education and Heterogeneous Systems Development
Properties of smoothing with time gating
Design techniques for low-voltage VHF BiCMOS transconductance-filters with automatic tuning
A GIDL free tunneling gate driver for a low power non-volatile memory array
Robust consensus-based droop control for multiple power converters in isolated micro-grids
A novel expression for L2 sensitivity evaluation in state-space digital filters and its minimization
How to design battery-assisted photovoltaic switched-inductor CMOS charger-supplies
Implementation of compact VLSI FitzHugh-Nagumo neurons
On the existence of stable equilibrium points in cellular neural networks
A fully-differential input amplifier with band-pass filter for biosensors
Presetting pulse-based flip-flop
XFeed PUF: A Secure and Efficient Delay-based Strong PUF Using Cross-Feed Connections
A new CMOS voltage reference scheme based on Vth-difference principle
Disparity-compensated inter-layer motion prediction using standardized HEVC extensions
Weighted Kirchhoff index of a resistance network and generalization of Foster's theorem
Binary Taylor diagrams: an efficient implementation of Taylor expansion diagrams
An evolvable predictor for lossless image compression
Floating-Point Roundoff Noise Analysis of 2-D State-Space Digital Filters
Low-power dual-active class-AB buffer amplifier with self-biasing network for LCD column drivers
ICT-Based Didactic Strategies to Build Knowledge Models in Electronics in Higher Education
Consensus in networked multi-agent systems via model predictive control with horizon one
Efficient Real-Time Fine-Grained Action Recognition over a Progressive and Hierarchical Classification Framework
A Segmented SAR/SS ADC with Digital Error Correction and Programmable Resolution for Column-Parallel Sensor Arrays
Analog complex wavelet filters
Design and parametric analysis of a wearable dual-photoplethysmograph based system for pulse wave velocity detection
Memristor-based hardware and algorithms for higher-order Hopfield optimization solver outperforming quadratic Ising machines
VSA: Reconfigurable Vectorwise Spiking Neural Network Accelerator
A neural network approach for human emotion recognition in speech
A new, delay-line-discriminator-based, hybrid RF/digital phase noise cancellation technique
A low-cost digital simulator for performance evaluation of computer relays
A Low-Power Sample-and-Hold Programmable Voltage Reference Based on Ripple Monitoring
A New Nonlinear Optimization Algorithm for Asymmetric FIR Digital Filters
A Chopper Instrumentation Amplifier with Amplifier Slicing Technique for Offset Reduction
Area-Time Analysis of Carry Lookahead Adders Using Enhanced Multiple Output Domino Logic
A low power read-out circuit with frequency accuracy of 0.2% for capacitive and resistive sensors
Performance improvement in a binary phase comparator type PLL frequency synthesizer
Design of a frequency tuning circuit used in IFLF filters
Multi-server optimal bandwidth monitoring for QoS based multimedia delivery
Iterative characterisation approach using realistic excitation signals for linearisation of transmitters
A 5-bit 1.25GS/s 4.7mW delay-based pipelined ADC in 65nm CMOS
Power-line communications using DWMT modulation
Power Linear DACs (PLDACs) for Configuration and Control of Silicon Photonic Integrated Circuits
Ultra-low power transmitter
Optical fiber IF signal transmission with two parallel LEDs
Analytical approach for compensation of the D/A conversion effect
Explicit formula for generalized half-band maximally flat diamond-shaped filters
New LC oscillator topology in CMOS 0.18µm technology
Compact N-Way Doherty Power Combiners for mm-wave 5G Transmitters
Emulating massively parallel non-Boolean operators on FPGA
Automatic detection of fade-in and fade-out in video sequences
A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inference
Fast block motion estimation with early acceptance technique in H.264/JVT
Converter design for fuel cells enhanced with cooperation of lithium batteries and supercapacitors
Application of Halftoning Algorithms to Location Dependent Sensor Placement
USCA: A Unified Systolic Convolution Array Architecture for Accelerating Sparse Neural Network
Incremental Node Extraction Algorithms for Incremental Layout System
Zero-forcing equalizability of FIR and IIR multi-channel systems with and without perfect measurements
Discrete time-varying delayed systems for secure communication
Multi-View RGB-D Based 3D Point Cloud Face Model Reconstruction System
A novel optimization method based on opinion formation in complex networks
A low-power ΣΔ ADC optimized for GSM/EDGE standard in 65-nm CMOS
Effective Search with Hopping Chaos for Hopfield Neural Networks Solving QAP
Logic synthesis method for FPGAs with embedded memory blocks
Live demonstration: Neuro-inspired system for realtime vision tilt correction
A 14-bit differential-ramp single-slope column-level ADC for 640×512 uncooled infrared imager
Algorithms for computating principal and minor invariant subspaces of large matrices
Auto-generated strokes for motion segmentation
All digital phase-locked loop using active inductor oscillator and novel locking algorithm
A Current-Mode FDNR Circuit Element using Capacitive Gyrators
Exact BER of transmitter antenna selection/receiver-MRC over spatially correlated Nakagami-fading channels
An alternative DFT methodology to test high-resolution Sigma Delta modulators
A modular digital VLSI architecture for stereo depth estimation in industrial applications
Network topology estimation through synchronization: A case study on quantum dot CNN
A Semi-Folded Decoding Architecture for Flexible Codeword Length Configuration of Polar Codes
Modeling power consumption for DVFS policies
Compact and Accurate MOST Model for Analog Circuit Hand Calculations
On the design of IIR digital filter using linearized equation systems
Towards a True Current Operational Amplifier
93.8% Current Efficiency and 0.672 ns Transient Response Reconfigurable LDO for Wireless Sensor Network Systems
Analysis and Application of Dual Series Resonances for Low Phase Noise K-Band VCO Design in 0.18-μm CMOS Technology
A Chaos-Modulated Dual Oscillator-Based Truly Random Number Generator
BP decimation filter for IF-sampling merged with BP ΣΔ-modulator
Method and Architecture Design for Motion Compensated Frame Interpolation in High-definition Video Processing
Cellular neural networks with second-order cells and their pattern forming properties
Systematic design of continuous-time ΣΔ modulator with VCO-based quantizer
Low-power fine-tuning switched-resistor reconfigurable filter
A Highly Efficient Power Model for Correlation Power Analysis (CPA) of Pipelined Advanced Encryption Standard (AES)
Reconfigurable two-dimensional pipeline FFT processor in OFDM cognitive radio systems
An interval algorithm for finding all solutions of nonlinear resistive circuits
Applications of clone circuits to issues in physical-design
Partial random walk for large linear network analysis
A 28nm 64Kb SRAM based Inference-Training Tri-Mode Computing-in-Memory Macro
Digital microfluidic system: A new design for heterogeneous sample based integration of multiple DMFBs
Ultra low voltage supply VCO with improved linearity
Low-cost implementation of a super-resolution algorithm for real-time video applications
A new noise reduction system based on ALE and noise reconstruction filter
A Single-slope 80MS/s ADC using Two-Step Time-to-Digital Conversion
A noise-shaping SC sine-wave oscillator
Impact of Parasitic Wire Resistance on Accuracy and Size of Resistive Crossbars
Uncovering interaction patterns of multi-agent collective motion via complex network analysis
A 108fs rms 0.45mW 100MS/s 1.25MHz bandwidth multi-bit ΔΣ time-to-digital converter with dynamic element matching
A 23.8-bit ENOB, ±5V Input Range Readout Circuit for High Precision Sensor Applications with 173.7dB-FoM
Microsystem controller for sensor network control and data correction
Capacitive coupling based transient negative bit-line voltage (Tran-NBL) scheme for improving write-ability of SRAM design in nanometer technologies
A 15000 Tuning Range Scalable Feed-Forward Oscillator with 0.05mm 2 Area in CMOS Standard-Cell Format
A 28 nm 8.2-11.1 GHz Class-C Digitally Controlled Oscillator with 40 kHz Tuning Resolution
Three novel improved CMOS capacitance scaling schemes
An HEVC multi-size DCT hardware with constant throughput and supporting heterogeneous CUs
Centralized State Sensing using Sensor Array on Wearable Device
Finding minimum interconnect sub-arrays in reconfigurable VLSI arrays
Implementing Efficient Balanced Networks with Mixed-Signal Spike-Based Learning Circuits
General test framework for straight-line detection by Hough transforms
Live Demonstration: VVC Intra-Coding Visualizer
Efficient computation of dominators in multiple-output circuit graphs
Locking range analysis for injection-locked frequency dividers
Low-Power Collision Avoidance Memristive Circuit for Swarms of Miniature Robots
Bayesian Detection and MMSE Frequency Estimation of Sinusoidal Signals via Adaptive Importance Sampling
An RF sub-sampling mixer, PGA and Sigma Delta ADC for conversion at 900 MHz
Carrier Phase Recovery of 64 GBd Optical 16-QAM Using Extensive Parallelization on an FPGA
ANSA: A New Neural Net Based Scheduling Algorithm for High Level Synthesis
A Reconfigurable Depth-Wise Convolution Module for Heterogeneously Quantized DNNs
Bandpass $\Delta \Sigma$ Modulators with FIR Feedback
Ultralow-voltage floating-gate analog multiplier with tunable linearity
Velocity-Tuned Oscillators for NeuroSLAM and Spatial Navigation
Error spectrum shaping in state-space digital filters with L 2 -scaling constraints
A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time
Second generation of high dynamic range, arbitrated digital imager
Cellular nonlinear network-based signal prediction in epilepsy: Method comparison
Time-Domain Modeling of Switched-Capacitor Converters with Periodic Inputs
Improving symbolic analysis in CMOS analog integrated circuits
DPLL with hybrid ΔΣ phase/frequency detector
DSP based Cancellation of the AFE Nonlinear Echo for 10GBASE-T Transceivers
Design of Maximum-Efficiency Integrated Voltage Doubler
Capacitor scaling for low-power design of cyclic analog-to-digital converters
Design and Implementation of an Approximate Softmax Layer for Deep Neural Networks
X-to-K Band 6-bit Bidirectional Common Chain SiGe BiCMOS for Multi-Band Arrays
On the search for a "universal" active element
Integrating high-level sensor features via STDP for bio-inspired navigation
A Remote FPGA Laboratory as a Cloud Microservice
Scalable Video Streaming over Mobile WiMAX
Object-based transcoding for scalable quality of service
An Area-Efficient and Robust Memristive LUT Based on the Enhanced Scouting Logic Cells
An area-efficient on-chip temperature sensor with nonlinearity compensation using injection-locked oscillator (ILO)
A high speed differential to single-ended amplifier for instrumentation applications
Homotopy-enhanced power flow methods for general distribution networks with distributed generators
The emergence of stable cooperators in heterogeneous networked systems
Hybrid DFSF-BP equalization for ATSC DTV receivers
Classes of stochastically switched (blinking) systems
Low power Convolutional Neural Networks on a chip
Depth-projected determination for adaptive search range in motion estimation for HEVC
A High Contrast Video Inverse Tone Mapping Operator for High Dynamic Range Applications
Harmonic ring oscillator time-to-digital converter
An efficient algorithm for finding multiple DC solutions based on Spice oriented Newton homotopy method
Enhancement of comparator operation speed by using negative-differential-resistance devices
Design of CMOS CML circuits for high-speed broadband communications
A high throughput ASIC design for IPv6 routing lookup system
Sensitivity and uniformity of a 0.18µm CMOS temporal contrast pixel array
A simple and robust super-regenerative oscillator for the 2.4 GHz ISM band
A phase locked loop with a mixed mode loop filter for clock/data recovery in optical disc drives
Generation of equivalent circuits by FTFN relocation
An SRAM-Based Digital Compute-in-Memory Macro with Dual-Bit Input Data Sparsification and Restructuring for Energy-Efficient MAC
5.8Gb/s 16: 1 Multiplexer and 1: 16 Demultiplexer Using 1.2µm BiCMOS
Complexity Reduction of H.263 to H.264 Transcoder with Fast Mode Decision
A Neural Implant ASIC for the Restoration of Balance in Individuals with Vestibular Dysfunction
Nonideal Current Loop Weakens Transient Synchronization Stability of Grid-Following Converter
Low-Power Continuous Wavelet Transform Employing Stochastic Computing
Design of Fast Large Fan-In CMOS Multiplexers Accounting for Interconnects
Performance evaluation of a low power optical wireless link for biomedical data transfer
An All-Passive Emulated Ripple Control Technique for Constant-On-Time Buck Converters in CCM
Spin-transfer torque magnetic memory as a stochastic memristive synapse
Design and test strategy underlying a low-voltage analog-baseband IC for 802.11a/b/g WLAN SiP receivers
Dynamics of Time-Domain Power-Elastic Circuits for Pervasive Machine Learning
Broadband dielectric spectroscopy CMOS readout circuit for molecular sensing
Fast adaptive identification of autoregressive signals subject to noise
A Cauchy distribution based video watermark detection for H.264/AVC in DCT domain
Algorithms for fast arithmetic transform
A ratioless and biasless static CMOS level shifter
Low-sensitivity current-mode active-RC filters using impedance tapering
A High-Speed 8-bit Single-Channel SAR ADC with Tailored Bit Intervals
Design considerations in sliding-mode controlled parallel-connected inverters
On Derivation of Most Probable Modes for Intra Prediction in Video Coding
No Redundant Error-correcting Scheme using Chaotic Dynamics for Noncoherent Chaos Communications
Low Cost Heterogeneous ARIA S-Box Implementation for CPA-Resistance
A 14-28 Gb/s Reference-less Baud-rate CDR with Integrator-based Stochastic Phase and Frequency Detector
Linearity enhancement of multibit Delta-Sigma modulators using pseudo data-weighted averaging
High-speed EBCOT with dual context-modeling coding architecture for JPEG2000
13-bit 205 MS/s time-interleaved pipelined ADC with digital background calibration
Three-phase single-stage AC-DC converters
Design and Implementation of Fast Transient Response Buck Converter with New Current-Mode Controlled Techniques
Learning spatio-temporal patterns in the presence of input noise using phase-change memristors
M 2 APix: A Bio-Inspired Auto-Adaptive Visual Sensor for Robust Ground Height Estimation
Input port reduction for efficient substrate extraction in large scale IC's
Improved bandwidth, low voltage log domain building blocks
Fast mode decision for KTA software
Arbitrary convex and concave rectilinear block packing based on corner block list
Combined mechanical and circuit nonlinearities in electrostatic vibration energy harvesters
An ASIC design for 3D depth control of full HD resolution stereoscopic video
A fast band matching technique for impedance extraction
A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic
A Comparison of Iterative Methods for the Solution of Nonlinear WDFs with Non-Lossless Junctions
A 500-MS/s 13-Bit SAR-Assisted Time-Interleaved Digital-Slope ADC
A 12Gbps all digital low power SerDes transceiver for on-chip networking
Performing Stochastic Computation Deterministically
An energy-efficient subthreshold level shifter with a wide input voltage range
Characterization of ADCs Using a Non-Iterative Procedure
Compact power-efficient CMOS exponential voltage-to-voltage converter
A 1-μA-Quiescent-Current Capacitor-Less LDO Regulator with Adaptive Embedded Slew-Rate Enhancement Circuit
Switched capacitor quasi-adiabatic clocks
A delay generation technique for fast-locking frequency synthesizers
Is physics-based liveness detection truly possible with a single image?
A tool for automatic design of analog circuits based on gm/I D methodology
Minimum-jitter design of bang-bang PLLs in the presence of 1/f 2 and 1/f 3 DCO noise
Live demonstration: Automated data acquisition and digital curation platform for enhancing research precision, productivity and reproducibility
SoC FPAA IC, PCB, and tool demonstration
Live Demonstration: A High-frame-rate and Energy-efficient SIFT Feature Extraction Accelerator Based SoC Design for AMR Applications
Design of experiments in CAD: context and new data sets for ISCAS'99
Semi-supervised Trojan Nets Classification Using Anomaly Detection Based on SCOAP Features
Cooperative Robust Parallel Operation of Electric Drive Shaft Systems