yusuke1997/dblp-id-title huggingface dataset:
A 60-GHz CMOS Balanced Power Amplifier with Miniaturized Quadrature Hybrids Achieving 19.0-dBm Output Power and 24.4% Peak PAE
A flexible multi-standard I/O interface for chip-to-chip links in 65 nm CMOS
LFSR based hybrid pattern scheme achieving low power dissipation and high fault coverage
A High-Speed NTT-Based Polynomial Multiplication Accelerator with Vector Extension of RISC-V for Saber Algorithm
Battery aware tasks allocating algorithm for multi-battery operated system
Analysis-by-synthesis method for whisper-speech reconstruction
Sub-Threshold Delay-Locked Loop with Piecewise Linearization and Time-Mode Proportional-Integral Locking
Modified quadratic discrimination function for non-normal distribution and its application in speech emotion recognition
Stability analysis of power transmission of offshore wind farms fed to onshore power grids using a multi-terminal VSC-HVDC system
Fractional Fourier transform based auditory feature for language identification
An Improved SVD-Based Watermarking Technique for Image and Document Authentication
A 0.1V Input Energy Harvesting Charge Pump with Dynamic Gate Biasing and Capacitance Scaling
Design of 5.5GHz LC oscillator using distributed grid of N-well in P-substrate inductor
An O(qlogq) log-domain decoder for non-binary LDPC over GF(q)
Timing error prediction based adaptive voltage scaling for dynamic variation tolerance
A Low-Complexity Mixed-Radix FFT Rotator Architecture
A Simple Synthesis Technique of PWM Signal
Mixed-level modeling for network on chip infrastructure in SoC design
A Wide Input-Range Sigma Delta Modulator for Applications to Spread-Spectrum Clock Generator
Automatic Tongue Image Segmentation Based on Thresholding and an Improved Level Set Model
A fast transient LDO based on dual loop FVF with high PSRR
A Random Number Generator Based on Metastability of Oscillators
ADC linearity test signal generation algorithm
A design of CMOS bandgap reference with low thermal drift and low offset
A cross decision feedback gsc-based capon multiuser receiver for space-time block coded CDMA systems
0.6-V, Sub-nW, second-order lowpass filters using flipped voltage followers
Design of high-performance transform and quantization circuit for unified video CODEC
A moving binary search SAR-ADC for low power biomedical data acquisition system
High Level Synthesis with Multiple supply Voltages for Energy and Combined Peak Power Minimization
Development of three-phase to single-phase matrix converter for improvement of three-phase voltage unbalance in distribution system
Designing of a neuron MOS current mirror with a transimpedance amplifier
On the design of band-pass quadrature ΣΔ modulators
Differential OPAMP with Inherent Common-Mode Control and Self-Biased Cascodes in 120nm CMOS
Load Share Controller IC and Its Control Strategy Design
An 8-b 8-GS/s Time-Interleaved SAR ADC With Foreground Offset Calibration in 28nm CMOS
Buffer size minimization method considering mix-clock domains and discontinuous data access
DTC-Assisted All-Digital Phase-Locked Loop Exploiting Hybrid Time/Voltage Phase Digitization
Pooled zero vector coding for enhanced compression of motion vectors
Design of linear phase with unequal length paraunitary filter banks with suboptimal coding gain
Multirate Filters: An Overview
An Energy-Efficient Approximate Floating-Point Multipliers for Wireless Communications
Half-wave Class DE Low dv/dt rectifier
High accuracy binary logarithmic conversion using range mapping for DSP applications
Optically Reconfigurable Gate Array VLSI That Can Support a Perfect Parallel Configuration
Design of discrete coefficient frequency-response-masking FIR digital filters
Cost-Effective Hardware Sharing Architectures of Fast 8×8 and 4×4 Integer Transforms for H.264/AVC
Hardware Attack and Assurance with Machine Learning: A Security Threat to Circuits and Systems
Star-type architecture with low transmission latency for a 2D mesh NOC
A scalable distributed memory architecture for Network on Chip
Depth extraction using adaptive blur channel selection for dual aperture camera
Hardware-Efficient Parallel FIR Filter Structure Based on Modified Cook-Toom Algorithm
Weighted interpolation using supplementary filter
A 1.6GHz Downconverter Mixer in 0.25µm CMOS
A CMOS Digitally Controlled RF Variable Gain Amplifier
Versatile high input impedance voltage-mode three-inputs universal biquadratic filter
A digital IF based UHF RFID reader transmitter
Architectural benefits and design challenges for three-dimensional integrated circuits
A Mm-Wave 5G Broadband Power Amplifier with Subthreshold Adaptive Biasing Network in 22 nm FD-SOI CMOS
Low-noise readout circuits with a response time acceleration technique for high output impedance sensors
A dual-exposure in-pixel charge subtraction CTIA CMOS image sensor for centroid measurement in star trackers
A 28nm 64.5TOPS/W Sparse Transformer Accelerator with Partial Product-based Speculation and Sparsity-Adaptive Computation
A dualband impedance transformer realized by fractional-order inductor and capacitor
An on-chip soft-start technique of current-mode DC-DC converter for biomedical applications
A compact multi-mode CORDIC with Global-Shifting-Sum (GSS) method
Progressive audio scrambling via wavelet transform
Current Sensing Completion Detection for high speed and area efficient arithmetic
A comparative analysis of integration schemes for UMTS and WLAN networks
Ultra low voltage current mirror op amp and its applications
A Low-Power Technique Based on Charge Injection and Current-Saving Methods for Match-Line Sensing in Content-Addressable Memories
A topological comparison of PWM and hysteresis controls in switching audio amplifiers
A 20 GHz 8-bit All-N-Transistor Logic CLA Using 16-nm FinFET Technology
A Light-Weight Timing Resilient Scheme for Near-Threshold Efficient Digital ICs
Automatic Detection and Segmentation of Text in Low Quality Thai Sign Images
A Fast 1.9 GHz Fractional-N/Integer Frequency Synthesizer with a Self-tuning Algorithm
Routability-driven partitioning-based IO assignment for flip-chip designs
Efficient IFFT design using mapping method
A 0.6-V subthreshold-leakage supressed CMOS fully differential switched-capacitor amplifier
Study of Music Effect on Mental Stress Relief Based on Heart Rate Variability
High efficiency power management system for solar energy harvesting applications
Analysis of coupled inductors for low-ripple fast-response buck converter
On the optimization of FPGA area depending on target applications
Markov Chain Monte Carlo Super-resolution Image Reconstruction With Artifacts Suppression
A novel WSN based intelligent training system for children's sensory integration
Live Demonstration: An AIoT Wearable ECG Patch with Cloud Platform for Cardiac Disease Detection
Cell loss analysis of self-similar traffic in ATM network
Wide rear vehicle recognition using a fisheye lens camera image
A Grouped Fast Fourier Transform Algorithm Design For Selective Transformed Outputs
Stochastic TDC architecture with self-calibration
Area Recovery by Abutted Cell Placement: Can Fillers be Killers? An Eye-opening Viewpoint!
Merged-Cascaded Systolic Array for VLSI Implementation of Discrete Wavelet Transform
Copper Coin Over Thermal VIA in PCB for Thermal Management of 12W
Comparative study of power-gating architectures for nonvolatile SRAM cells based on spintronics technology
A Quantization Model Based on a Floating-point Computing-in-Memory Architecture
Efficient structures for time delay estimation in time-varying environments
Efficient bit-rate estimation technique for CABAC
Current-mode Universal Filter with Four Inputs and One Output using CDTAs
Optimized Design of Extrapolated Impulse Response FIR Filters with Raised-Cosine Windows
Current-mode multiphase sinusoidal oscillator using current-controlled current differencing transconductance amplifiers
Investigation of Heart Rate Changes before and during/after Smoking Events in Free Living Conditions
Clustering phenomena considering the density of coupled chaotic circuits networks
Low-Power PMIC with Two Hybrid Converters for TEG Application
Post-placement Thermal Via Planning for 3D Integrated Circuit
A Fast-Response BUCK Converter with Adaptive Detect and Transient Enhancement Techniques
Correlation-graph-based temperature sensor allocation for thermal-aware network-on-chip systems
Gait recognition using occluded data
On using the cyclically-coupled QC-LDPC codes in future SSDs
Correcting Sign Calculation Errors in Configurable Approximations
An FPGA-Based Region-Growing Video Segmentation System with Boundary-Scan-Only LSI Architecture
Robust and Energy-efficient Hardware Architectures for DIZY Stream Cipher
A 10-bit SAR ADC with two redundant decisions and splitted-MSB-cap DAC array
A new regularized transform-domain NLMS adaptive filtering algorithm
An application of DSP to automatic PMD compensation in optical fiber communication systems
Calibration of the Nauta structure differential OTA
Sliding mode control for trajectory tracking on mobile manipulators
An Innovative Write Circuitry for Enhancing a 3nm L1 Cache Performance Across Wide DVFS Range
Efficient method for face region quality enhancement in low bit rate video coding
A CMOS Dual-Band Voltage Controlled Oscillator
The research of broadband MIMO millimeter wave transceiver system: Design and test
A 40-GHz phase-locked loop front-end for 60-GHz transceivers in 65nm CMOS
A current-mode wheatstone bridge employing only single DO-CDTA
A Determination Method for Initial Values of Coplanar Camera Calibration Parameters
A Sub-1ppm/°C high-order curvature-compensated bandgap reference
Design of simple and high speed VLSI core for the protection of mass storages
Memristive LSTM network hardware architecture for time-series predictive modeling problems
An Efficient Accelerator of the Squaring for the Verifiable Delay Function Over a Class Group
An ultrahigh-speed full adder using resonant-tunneling logic gates
Wide-band Circular Slot Antenna Beam Switching Directions Using Machine Learning Algorithms
Classification of rice grains using fuzzy artmap neural network
An ultra-low-power sensor interface built around a reconfigurable incremental sigma-delta modulator for sensor networks employing electromagnetic backscatter
A Multi-Context FPGA Using a Floating-Gate-MOS Functional Pass-Gate and Its CAD Environment
Frequency-Selective Limiting Using Automatic Gain Control of Stagger-Tuned N-Path Filters
Development of a Web navigation guide system based on the hypertext probabilistic grammar
A1RL: Approximate 1-Row-LUT-Based Low-Power Signed Multipliers for DSP and Machine Learning Applications on FPGAs
Robust Scalable Video Transmission using Object-Oriented Unequal Loss Protection over Internet
Dynamic secondary arc analysis and simulation research under different line model
An Adaptive Low-Power Control Scheme for On-Chip Network Applications
A Novel Voltage-Controlled Oscillator Linearized by a Resistorless Dynamic-Degeneration Technique
A Low-Power Reconfigurable Mixed-Radix FFT/IFFT Processor
A multiscale retinex based on wavelet transformation
An extension of ROI-based scalability for progressive transmission in JPEG2000 coding
A low-complexity fast-locking digital PLL with multi-output bang-bang phase detector
Scalable and parallel codec architectures for the DVB-S2 FEC system
Challenges in testing TSV-based 3D stacked ICs: Test flows, test contents, and test access
Low Power Multiplier Designs Based on Improved Column Bypassing Schemes
Dynamic wordlength calibration to reduce power dissipation in wireless OFDM systems
An FPGA architecture for real-time polyphase 2D FIR double-trapezoidal plane-wave filters
A novel structure for 2nd order digital filters
The study of effects of acupuncture at SJ9 (Sidu) point on heart rate variability
Cauchy based Rate-Distortion Optimization Model for H.264 Rate Control
An energy-efficient successive approximation register analog to digital converter in 180nm
Development of a Wireless Sensor Network System for Power Constrained Applications
Electrical-level synthesis of pipeline ADCs
Random Number Generator Based on Miniature Microbial Fuel Cells
Cordic architecture for Hough Transform applications
A 3.5/7.0/14-Gb/s multi-rate clock and data recovery circuit with a multi-mode rotational binary phase detector
Fast point operation architecture for Elliptic Curve Cryptography
Automated malaria parasite detection in thin blood films: - A hybrid illumination and color constancy insensitive, morphological approach
Implementation evaluation of scan-based attack against a Trivium cipher circuit
A high throughput Gaussian noise generator
A 2-clock-cycle Naïve Bayes classifier for dynamic branch prediction in pipelined RISC microprocessors
Design issues and optimization in DisplayPort link layer implementation
Implementation of wireless MPEG2 transmission system using IEEE 802.11b PHY
Unscented Kalman Filter and Particle Filter for Chaotic Synchronization
FPGA-based real-time lane detection for advanced driver assistance systems
Area-efficient check node unit architecture for single block-row quasi-cyclic LDPC codes
Characteristic of interference color in rock forming mineral images
A 25MHz sign and magnitude converter for analog current mode iterative decoders
A Reconfigurable Decoder for Standard-Compatible LDPC Codes and Polar Codes
Copyright protection of images using human visual masking on DCT-based watermarking
Numerical free-disposal-hull data-envelopment analysis of potential CMOS-successor technologies
Systolic-array 3D wave-digital beam filters
Hardware Architecture of Improved Tomlinson-Harashima Precoding for Downlink MC-CDMA
FPGA Implementation of Inversion in Galois Field Over GF(2m) with FLT and ITA Using Quad Blocks
Design of a 843MHz 35µW SAW oscillator using device and circuit co-design technique
A Game Theory Model for Multi Robot Cooperation in Industry 4.0 Scenarios
Effects of CNT diameter variability on a CNFET-based SRAM
Harnessing Hybrid Clock Tree Topology to Boost PPA in Highly Utilized Designs
4K SHD Real-Time Video Streaming System With JPEG 2000 Parallel Codec
Energy-efficient hybrid adder design by using inexact lower bits adder
SSPE: A Device-edge SNN Inference Artificial Intelligence Processor in Supporting Smart Computing
Modified MMSE DMC and Edge Reserving Concealment for Improving H.264 Error Resilience
A faster algorithm of minimizing AND-EXOR expressions
Global Interconnect Analysis and Optimization for Nanometer Scale VLSI
An Efficient Realization of the Decision Feedback Equalizer using Block Floating Point Arithmetic
An electronically controllable dual-mode universal biquad filter using only single CCCCTA
A Low-power 4-T SAM Design for OFDM Demodulators in DVB Receiversers
Adjustable low consumption circuit for monitorization of power source voltages in a SoC
Jitter generation and capture using phase-domain sigma-delta encoding
A wideband CMOS LNA-mixer for cognitive radio receiver
Compressive imaging by generalized total variation minimization
An SNR-aware inter-symbol data-mapping precoding scheme for single-carrier systems
Experimental Cryptanalysis of A Chaos-Based Random Number Generator
A Low-Power Low-Voltage Amplifier for Heart Rate Sensor
Inductively coupled wireless power transfer with class-DE power amplifier
Time Skew Calibration for Time-Interleaved Analog-to-Digital Converters
A 40.68MHz Active Rectifier with Hybrid Delay Compensation Scheme
A Low-Power Low-Noise Dynamic Comparator With Latch-Embedding Floating Amplifier
A low-power sense amplifier for adiabatic memory using memristor
An Approximate-Computing-Based Adaptive Equalizer for Polarization Mode Dispersion
A Dual-Channel 6b 1GS/s 0.18um CMOS ADC for Ultra Wide-Band Communication Systems
Negative ESD robustness of a novel anti-ESD TGFPTD SOI LDMOS
Low leakage mask vertical control TCAM for network router
A study on gas sensors using a SAW device
Audio mixer with Automatic Gain Controller for software based Multipoint Control Unit
Symbolic Circuit Reduction for Multistage Amplifier Macromodeling
Nonlinear and Decision-Oriented Signal Processing for OFDM-Based Wireless Communications
The Inverse Matrix for the Conversion Between Standard and Normal Bases
Ultra Low Power Weak Inversion Current Steered Digital to Analog Converter
Adjustable energy control with ICBRM technique
A high throughput in-loop de-blocking filter supporting H.264/AVC BP/MP/HP video coding
A Switched-Voltage High-Accuracy Sample/Hold Circuit
Characterization and computation of Steiner wiring based on Elmore's delay model
Moving Drones for Wireless Coverage in a Three-Dimensional Grid Analyzed via Game Theory
A low phase noise and large tuning range 2.4GHz LC voltage-controlled oscillator
A 5Gb/s adaptive equalizer using filter switching
A low-complexity high-performance wear-leveling algorithm for flash memory system design
5 GHz phase locked loop with auto band selection
Low-power, lightweight and reliability-enhanced current starved inverter based RO PUFs
High-speed low-power Single-Stage latched-comparator with improved gain and kickback noise rejection
An On-Off Keying LC Oscillator-Based Acoustic Transmitter with Fast Turn-On and Turn-Off Time
Design of Dynamically Assignmentable TAM Width for Testing Core-Based SOCs
IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002
All Digital Minimum Energy Point Detection for Ultra Low Power CMOS Circuits
A Resolution- and Rate- Scalable Image Subband Coding Scheme with Backward Coding of Wavelet Trees
A measurement method for reflection coefficient of anechoic chamber using standing wave techniques
Two-stage current-mode multiphase voltage doubler based on PWM control
Design optimization considering guiding template feasibility and redundant via insertion for directed self-assembly
High frequency ring oscillator using capacitor based level shift circuits
Design of a standing wave oscillator based PLL
Impacts of Inductance on the Figures of Merit to Optimize Global Interconnect
TCAM-PUF with improved reliability and uniqueness for security improvement
Read margin analysis in an ReRAM crossbar array
An Adjustable Hybrid SC-BP Polar Decoder
Reference-Free Dual-Mode Cell-to-Cell Sensing for Area-Efficient Resistive Memory
A low-voltage low-power CMOS time-domain temperature sensor accurate to within [-0.1, +0.5] °C From -40 °C To 125 °C
"Fusion, Interaction, and Training": Cultivating Innovative Leading Talents
FPGA-based architectures of finite radon transform for medical image de-noising
An efficient DAC and interstage gain error calibration technique for multi-bit pipelined ADCs
A SIMD-accelerated software rendering pipeline for 3D graphics processing
DELTRON: Neuromorphic architectures for delay based learning
On three-dimensional layout of pyramid networks
Numerical analysis of current measurement error due to localized vibration effects on reciprocal fiber optic polarimetric current sensor
A virtual character recognition system based on optical detection of red light and its embedded implementation
Simultaneous Analysis of Capacitive Coupling and Leakage Noise in Nanometer Scale Circuits
Profiling-based task graph extraction on multiprocessor system-on-chip
A fast correlation based background digital calibration for pipelined ADCs
Current reference with temperature compensation for low power applications
Electrocardiogram Analysis with Adaptive Feature Selection and Support Vector Machines
Digital Background Correction for Channel Mismatch and Third-Order Nonlinearity of TI-ADCs with VCOs
A 1.2 μW, 1.7 μV rms ECG Acquisition IC with Low-Noise Amplifier and Full-Digital Heartbeat Detector
Implementation of MPEG-2 AAC on 16-bit Fixed-Point DSP
High-efficiency multiple 4×4 and 8×8 inverse transform design with a cost-effective unified architecture for multistandard video decoders
A New Choice of Influence Function for Robust Multiuser Detection in Non-Gaussian Channels
Sliced polar codes
Contrast enhancement using multiple mapping functions for power reduction in OLED display
Implementation of a Symbolic Circuit Simulator for Topological Network Analysis
Teaching Practice Platform and Innovation Course Construction for Postgraduate Majoring in Electronics Information
Design of fractional delay FIR filter using discrete cosine transform
A frequency-based fast block type decision algorithm for intra prediction in H.264/AVC high profile
Design and implementation of dynamic Word-Line pulse write margin monitor for SRAM
Auto white balance system using adaptive color samples for mobile devices
A DC-offset-compensated, CT/DT hybrid filter with process-insensitive cutoff and low in-band group-delay variation for WLAN receivers
Radar echo envelope extraction using Teager energy operator and wavelet transform
A subspace approach for restoring image corrupted by white noise
A 772μJ/frame ImageNet Feature Extractor Accelerator on HD Images at 30FPS
DWDM Demultiplexer Using Compound Optical Ring Resonator with Fiber Bragg Grating
Interoperable physical design database between OpenAccess and Milkyway
Low Power Combinational Multipliers using Data-driven Signal Gating
A second-order gate delay modeling method with an efficient sensitivity analysis
System Design of Implantable Micro-stimulator for Medical Treatments
3D-Modeling Dataset Augmentation for Underwater AUV Real-time Manipulations
The vector control inverter for a PV motor drive system implemented by a single chip DSP controller ADMC331
Design of Relaxation Digital-to-Analog Converters for Internet of Things Applications in 40nm CMOS
An efficient hierarchical approach for general floorplan area minimization
A 18.8 GHz Noise Circulating VCO With Implicit Noise Filter for Quantum Computing
Area-Efficient Scheduling Scheme Based FFT Processor for Various OFDM Systems
Dynamic TDM virtual circuit implementation for NoC
IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2023, Hyderabad, India, November 19-22, 2023
Parallel visualization of multiple translucent isosurfaces
Constructing Better Partial Sums Based on Energy-Maximum Criterion for Fast Encoding of VQ
Better Security Estimates for Approximate, IoT-Friendly R-LWE Cryptosystems
Q-band bandpass filter designs in heterodyne receiver for radio astronomy
Architecture design of low-power and low-cost CAVLC decoder for H.264/AVC
Multiplierless two-stage comb structure with an improved magnitude characteristic
Adaptive blind system identification for speech dereverberation using a priori estimates
Hardware development for pervasive healthcare systems: Current status and future directions
On a piecewise linear enclosure method of continuous functions of many variables
BER characteristic of optical-OFDM using OCI
Electromigration-aware rectilinear Steiner tree construction for analog circuits
Simultaneous wafer bonding type selection and layer assignment for TSV count minimization
A Low-Cost 70Mbps Optical Detector Design For Optocoupler Application
High Precision Hysteresis Controlled MPPT Circuit for Vibration Energy Harvesting
Elimination of echoes from voice communication
FPGA implementation of edge detection for Sobel operator in eight directions
Image Denoising Algorithms for DoFP Polarization Image Sensors with Non-Gaussian Noises
Live Demonstration: Low Power and Real-Time Obstacle Avoidance System with CMOS Image Sensor and Spiking Neural Network
Area and throughput trade-offs in design of arithmetic encoder for JPEG2000
Transmit/Receive beamformer design and resource allocation in multiuser MIMO-OFDM systems
Low voltage, high performance first and third generation current conveyor in 0.18μm CMOS
Implementation of reconfigurable SHA-2 hardware core
Fully Integrated High-Voltage Level Shifts and Drivers for Buck Converters
A low power and compact physical unclonable function based on the cascode current mirrors
Reduced-Complexity Concurrent Systolic Implementation of the Discrete Sine Transform
Identification algorithm of nonminimum phase system based on t-distribution assumption
Combined CAVLC Decoder and Inverse Quantizer for Efficient H.264/AVC Decoding
Maximum Power Point Tracking (MPPT) via Weightless Swarm Algorithm (WSA) on cloudy days
Design and implementation of emission filter for soft modem on TM9320C50 DSP chip