yusuke1997/dblp-id-title huggingface dataset:
A new multiplierless correlator for timing synchronization in IEEE 802.11a WLANs
A RRAM-Based Associative Memory Cell
Comprehensive Low Power Adiabatic Circuit Design with Resonant Power Clocking
A 64-channel Time-multiplexed Neural Recording IC with Dual Positive Feedback Loop ZIN-Boosting
Wide temperature spectrum low leakage dynamic circuit technique for sub-65nm CMOS technologies
Untrimmed CMOS Nano-Ampere Current Reference with Curvature-Compensation Scheme
Advanced neural implants using thin-film polymers
Design of Low-Power, 1GS/s Throughput FFT Processor for MIMO-OFDM UWB Communication System
Inductorless, powerl-proportional, optical receiver front-end in TSMC 90 nm
Hierarchical Techniques for Symbolic Analysis of Large Electronic Circuits
Modeling and verification of high-speed wired links with Verilog-AMS
A cost-effective media processor for embedded applications [audio decoder example]
Signaling capacity of FR4 PCB traces for chip-to-chip communication
An Image Augmentation Method for Quality Assessment Database
On the invariance of second-order modes under frequency transformation in 2-D separable denominator digital filters
High efficiency wide bandwidth power supplies for GSM and EDGE RF power amplifiers
CMOS mixed signal SoC for low-side current sensing
A temperature compensated digitally trimmable on-chip IC oscillator with low voltage inhibit capability
A 0.13µm CMOS T/R switch design for ultrawideband wireless applications
Face hallucination using deep collaborative representation for local and non-local patches
A novel non-uniform distributed amplifier
An Intelligent Image-Based Force Sensing System Development to Assist Robot-Arm Surgery
Parabolic Synthesis Methodology Implemented on the Sine Function
A 2.6mW 2fps QVGA CMOS one-chip wireless camera with digital image transmission function for capsule endoscopes
A Time-frequency Domain Formant Frequency Estimation Scheme for Noisy Speech Signals
Two-dimensional digital filtering using constant-I/O systolic arrays
CMOS Implementation of Wide Frequency Bandwidth Resonator's Q-Factor Measurement Circuit
Approximate Computation of Signal Characteristics of On-chip RC Interconnect Trees
An algorithm for ARMA model parameter estimation from noisy observations
Shift-accumulator ALU centric JPEG2000 5/3 lifting based discrete wavelet transform architecture
A system-level design for foreground and background identification in 3D scenes
A Low-Noise High-G Closed-Loop Capacitive Accelerometer Using DC-Blocking Technique for Reduction of Power Dissipation
Highly Parallel VLSI Architectures for Linear Convolution
Small-Signal Analysis of Nonideal Switched-Capacitor Circuits
Electrical characteristics of multi-layer power distribution grids
An 8-stage time delay integration CMOS image sensor with on-chip polarization pixels
Current mode realization of ear-type multisensors
Channel decoder architecture of OFDM based DMB system
Publish-subscribe programming for a NoC-based multiprocessor system-on-chip
A novel low-power input-independent MOS AC/DC charge pump
Radio-triggered solar and RF power scavenging and management for ultra low power wireless medical applications
A Family of Compact Trim-Free CMOS Nano-Ampere Current References
Adaptive microphone array with noise statistics updates
Synchronization Phenomena of Chaotic Circuit Networks with Distributed Hub Including Positive and Negative Coupling
Two-sensor noise robust ASR with missing frames for Aurora2 task
Homoclinic orbits and the persistence of the saddle connection bifurcation in the large power system
Minimization of power dissipation of analog channel-select filter and Nyquist-rate A/D converter in UTRA/FDD
Learning Based Estimation of Video Coding Distortion
Parallel-processing VLSI architecture for mixed integer linear programming
Current-Mode Phase-Locked Loops with Low Supply Voltage Sensitivity
A Wireless Power Management Unit with a Novel Self-Tuned LDO for System-On-Chip Sensors
A coefficient segmentation algorithm for low power implementation of FIR filters
An argument-principle based stability criterion and application to the design of IIR digital filters
Fast sensory motor control based on event-based hybrid neuromorphic-procedural system
UCViT: Hardware-Friendly Vision Transformer via Unified Compression
A Fuzzy C-means Clustering Placement Algorithm
Two-Stage Energy Efficiency Optimization of Switched-Capacitor Converters for IoT Systems
Self-induced oscillations in coupled fluxgate magnetometer: a novel approach to operating the magnetic sensors
A simple threshold nonlinearity for blind separation of sub-Gaussian signals
Semi-blind channel estimation of MIMO-OFDM systems with pulse shaping
Image encryption using the reciprocal-orthogonal parametric transform
Fast motion estimation using UESA, threshold-half-stop and adaptive partial sum scan from gradient magnitude
PMU-based estimation of dynamic state Jacobian matrix
Variable multi-output passive digital filters
A power divider using linear electric probes coupling inside conducting cylindrical cavity
Cryogenic Circuit Performance Prediction Using Design-Oriented Model (SEKV) On 22nm FDSOI
Frequency and Phase Synchronization of Dispersed Generation AC System with Renewable DC through Passivity-Based Control
FPGA designs of parallel high performance GF(2 233 ) multipliers
Enumerating Optimal Quantum Circuits using Spectral Classification
Impacts of different shapes of through-silicon-via core on 3D IC performance
Optimal design of digital IIR filters by model-fitting frequency response data
Constant-g m constant-slew-rate high-bandwidth low-voltage rail-to-rail CMOS input stage for VLSI cell libraries
High-performance low-power AND and Sense-Amp address decoders with selective precharging
Multi-template approach to artificial locomotion control
N TH order circular symmetry pattern and hexagonal tesselation: two new layout techniques cancelling nonlinear gradient
Tiled Interleaving for Multi-Level 2-D Discrete Wavelet Transform
Two programmable BCH soft decoders for high rate codes with large word length
Simple polar-loop transmitter for dual-mode Bluetooth
Video activity detection using compressed domain motion trajectories for H.264 videos
Experimental evaluation and validation of a BIST algorithm for characterization of A/D converter performance
Robust front-end design for ultra wideband systems
Acquisition of multiband signals with minimum sub-Nyquist sampling
Deterministic Policy Gradient based Reinforcement Learning for Current Control of Hybrid Active Power Filter
Study of near consensus complex social networks using eigen theory
Diversity gain's influence on MIMO's detection
A generalized direct-form II transposed structure for IIR filter implementation with minimal roundoff noise gain
NAME: NoC-based Accelerators Mapping Exploration for High Performance DNN Inference
Epilepsy Seizure Detection and Prediction using an Approximate Spiking Convolutional Transformer
Embedded Frame Compression for Energy-Efficient Computer Vision Systems
Modified K-nearest neighbour filters for simple implementation
An IQ Image Cancellation Method for Digital-Intensive Transmitters
A Fully Programmable Analog Window Comparator
An Optimized VLSI Implementation of an IEEE 802.11n/ac/ax LDPC Decoder
A fast decomposition of banded symmetric Toeplitz matrices for parallel processing
Small signal simulation of resonant converters
Statistical analysis of the time-delay digital tanlock loop in the presence of Gaussian noise
A Transcranial Alternating Current Stimulator for Neural Entrainment
A Low-power High-speed Ultra Wideband Pulse Radio System
Power Management Integrated Circuit for Electrostatic Kinetic Energy Harvesters
Mixed-logic Dynamical System Modeling of SigmaDelta-modulators and its Application to Stability Analysis
A Low-Power Heart Rate Sensor with Adaptive Heartbeat Locked Loop
An OTA with Series-Cascode-Miller Compensation and Anti-Pole-Splitting for a 360-MHz BW Low-Distortion TIA in Sub-6G Broadband RF Receivers
Role of diversity in taming chaos in driven memristive arrays
Parallel bus systems using code-division multiple access technique
Generation of accurate on-chip time-constants using a monolithic CMOS PLL with hybrid analog and digital control
Effects of parasitic admittances in active synthesis of current-mode circuits
Does Video Compression Impact Tracking Accuracy?
A coefficient memory addressing scheme for VLSI implementation of FFT processors
A Latency-Aware Task Offloading in Mobile Edge Computing Network for Distributed Elevated LiDAR
Using a Chaotic Cipher to Encrypt Ethernet Traffic
A New BiCMOS Technique for Very Fast Discrete-Time Signal Processing
Fuzzy neural network classification design using support vector machine
A 0.7pJ/bit 2Gbps self-synchronous serial link receiver using gated-ring oscillator for inductive coupling communication
A wideband digital frequency synthesizer
A monolithic CMOS VCO for wireless LAN applications
3-D thermal simulation with dynamic power profiles
A segmented thermometer coded DAC with deterministic dynamic element matching for high resolution ADC test
Analysis and performance evaluation of area-efficient true random bit generators on FPGAs
10Gbps Decision Feedback Equalizer with Dynamic Lookahead Decision Loop
Topology and Parameter Optimization of High-Order Δ-Σ Modulators Towards Superior Efficiency and Stability with Multi-Agent Reinforcement Learning
Image guided label map propagation in video sequences
"The flipped voltage follower"-based low voltage fully differential CMOS sample-and-hold circuit
Blind I/Q imbalance compensation in OFDM receivers based on adaptive I/Q signal decorrelation
System-on-a-chip (SoC) model of a micropump
Thermal noise analysis of multi-input SC-integrators for delta-sigma modulator design
Efficient coefficient partitioning for decomposed DA-based inner-product computation
Towards a Uniform Architecture for the Efficient Implementation of 2D and 3D Deconvolutional Neural Networks on FPGAs
A switched-capacitor dendritic arbor for low-power neuromorphic applications
Multi-grid methods for power grid simulation
Multipurpose Chip for Physiological Measurements
Enhancing Cross-Modal Understanding for Audio Visual Scene-Aware Dialog Through Contrastive Learning
A versatile speech enhancement system based on perceptual wavelet denoising
On finite precision implementation of low density parity check codes decoder
A Loss-Compensated 5-Bit Ka-Band Digital Phase Shifter with Low RMS Phase/Gain Error Over Wide Temperature Ranges
A Low Power Integrate-and-Fire Neuron Circuit Using an a-IGZO-based Thin-Film Transistor with an Inverter Transition Point Programming Method
System identification -based reduced-code testing for pipeline ADCs' linearity test
A New Multilevel Codebook Searching Algorithm for Vector Quantization
A CMOS neural oscillator using negative resistance
Algorithm/architecture co-design of the generalized sampling theorem based de-interlacer [video signal processing]
A linear dependent rate-quantization model for scalable video enhancement layer encoding
Dictionaries for matching pursuits video coding
Subexpression encoded extrapolated impulse response FIR filter with perfect residual compensation
Lifting based discrete wavelet transform architecture for JPEG2000
Automated two stage detection and analyzer system in multipartitioned Digital Microfluidic Biochips
Fine-grained Relationship Alignment Network for Video-Text Retrieval
CMOS mixer design with micromachined input matching circuits for wireless applications
Structural Health Monitoring System using Active Ultrasonic Nodes Powered by Optical Fiber
Task-binding based branch-and-bound algorithm for NoC mapping
A High-speed Low-power Deep Neural Network on an FPGA based on the Nested RNS: Applied to an Object Detector
CMOS-nano-bio interface array for cardiac and neuro technology
A self-learning multiple-class classifier using multi-dimensional quasi-Gaussian analog circuits
Low-voltage CMOS syllabic-companding log domain filter
Design of Wideband CMOS Current-Mode Operational Amplifiers
Implementation of AES S-Boxes using combinational logic
Monolithic chaotic communications system
Certain Facts about Kohonen's LVQ1 Algorithm
Waveform speech coding using multiscale recurrent patterns
Modeling hot-electrons effects in silicon-on-sapphire MOSFETs
Efficient per-carrier channel equalizer for filter bank based multicarrier systems
High Throughput Architecture for High Performance NoC
A Diode-Based D-2D DAC Architecture with Leakage Current Compensation for Ultra-low Power Application
A Neural Network for the Scheduling Problem in High Level Synthesis
SNR performance of an adaptive sigma delta modulator
An energy-efficient level shifter for low-power applications
A higher order transform domain filter exploiting non-local spatial correlation for video coding
A low-voltage CMOS phase shifter as a resistive sensor transducer
Ridge Regression and Iterative Hard-Thresholding Guided Interpolation from Noisy Samples by Prolate Spheroidal Wave Functions
A novel low voltage Subtracting BandGap Reference with temperature coefficient of 2.2 ppm/°
Near-field dual-use antenna for magnetic-field based communication and electrical-field based distance sensing in mm3-class sensor node
On the implementation of RTD based CNNs
Fault-Tolerant Neural Architectures: The Use of Rotated Operands
A second generation time-to-first-spike pixel with asynchronous self power-off
A Programmable Low-Power, Low-Noise Front-End Channel in 0.35- µm CMOS for CdZnTe Detectors
A CMOS analog continuous-time FIR filter for 1Gbps cable equalizer
A 0.8V 4.3mW sub-harmonic mixer for ultra-wideband systems
Live Demonstration: In-Vehicle Auditory Signal Evaluation Platform in A Driving Simulator
Optimal PAM Order for Wireline Communication
Symbolic active-RC circuit synthesis by admittance matrix expansion
A 14V-output adaptive-off-time boost converter with quasi-fixed-frequency in full loading range
Dynamic partial reconfigurable FFT/IFFT pruning for OFDM based Cognitive radio
An accurate current source with on-chip self-calibration circuits for low-voltage differential transmitter drivers
A Strategy for Soft Error Reduction in Multi Core Designs
MonoSparse-CAM: Efficient Tree Model Processing via Monotonicity and Sparsity in CAMs
A Fast Converging Correlation-Based Background Timing Skew Calibration Technique by Digital Windowing for Time-Interleaved ADCs
A 40Gb/s All-Digital Adaptive Noise-Suppression Feed-Forward Filter and Adaptive Decision Feedback Equalizer with 40 parallelisms for 2-PAM Systems
An Efficient Accurate Frequency Estimation Method for 2D Signals by Sampling three 1D Slices
Generative Image Inpainting Based on Wavelet Transform Attention Model
Live demonstration: Intelligent ubiquitous sensor network for sound acquisition
CMOS-based current-controlled DDCC and its applications
Lower bounds on the MSE in N th order mulit-bit multi-loop sigma delta modulation with DC inputs
Modeling and characterization of CNT-based TSV for high frequency applications
SRAM Voltage and Current Sense Amplifiers in sub-32nm Double-gate CMOS Insensitive to Process Variations and Transistor Mismatch
A 10-bit, 2.5-V, 40 M sample/s, pipelined analog-to-digital converter in 0.6-um CMOS
Reduction of background computations in adaptive block-matching motion estimation
A Flexible and High-Precision Activation Function Unit Based on Equi-Error Partitioning Algorithm
Artificial bandwidth extension of telephony speech by data hiding
Transparent side channel trigger mechanism on analog circuits with PAAST hardware Trojans
A power planning model for implantable stimulators
Adaptive bias simulated evolution algorithm for placement
ITERTL: An Iterative Framework for Fine-tuning LLMs for RTL Code Generation
A low complexity H.263 to H.264 transcoder
Design and optimization of a 94GHz rotary traveling wave oscillator for mm-wave applications
Dual-channel pulse-width-modulation ASIC for isolated bio-signal recording front-end
Biological learning modeled in an adaptive floating-gate system
Normal Optical Flow chip
A polynomial method for blind identification of MIMO channels
L-band 180° passive phase shifter employing auto-transformer in an SOS process
ARIAN: A Scalable Method for Adding aRbItrAry Numbers on Modern Processors
Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits
A CMOS class-E Power Amplifiers with Power Control
Observability of network-delayed multi-converter power systems
Ground penetrating radar utilizing compressive sampling and OFDM techniques
Partial encryption by randomized zig-zag scanning for video encoding
VLSI architecture and design for high performance adaptive video scaling
A nonlinear model of air-gapped ferrite-core inductors for SMPS applications
Analysis and effects of retransmission mechanisms on data network performance
A 0.5 V fully differential gate-input operational transconductance amplifier with intrinsic common-mode rejection
A Robust Hybrid CT/DT 0-2 MASH DSM with Passive Noise-Shaping SAR ADC
A study on an ASIC design technique for digital protective relays
1.5-V square-root domain first-order filter with multiple operating points
Weak inversion performance of CMOS and DCVSPG logic families in sub-300 mV range
FDSOI versus BULK CMOS at 28 nm node which technology for ultra-low power design?
Test pattern generation for multiple stuck-at faults not covered by test patterns for single faults
A Local Feature-based Human Motion Recognition Framework
Accelerating Convolutional Neural Network Inference Based on a Reconfigurable Sliced Systolic Array
Memristor circuit for artificial synaptic weighting of pulse inputs
A Stent Graft Occlusion Detection : Pressure Sensing Implant Device with Inductive Power and Data Telemetry
Consensus in Multi-Agent System under Aperiodic Denial-of-Service Attacks
Joint adaptive step-size and zero-attractor parameters for l 0 -NLMS algorithm
Video summarization by spatial-temporal graph optimization
Automatic white balancing using standard deviation of RGB components
Current mode circuits for programmable neural networks
Novel multiplierless wide-band CIC compensator
High Utilization Energy-Aware Real-Time Inference Deep Convolutional Neural Network Accelerator
An architecture of F(2 2N ) multiplier for elliptic curves cryptosystem
MHYNESYS II: Multi-stage hybrid Network on chip synthesis for Next Generation 3D IC Manycore
Low Power PVT-Aware Transistor Sizing and Approximate Design Generation for Standard Cells Using Swarm Intelligence
Ultra-low-energy adiabatic dynamic logic circuits using nanoelectromechanical switches
On-chip high-voltage SPAD bias generation using a dual-mode, closed-loop charge pump
A ±0.6 dB, 256-μW Digital-Intensive RSSI with 80-dB Dynamic-Range in 65-nm CMOS
DNA sequencing via electron tunneling
Noise Optimization of a Resistively-Driven Ring Oscillator for VCO-Based ADCs
Fast video transcoding architectures for networked multimedia applications
A programmable VHF CMOS read-channel continuous-time filter with on-chip tuning
Four-Quadrant CMOS/BiCMOS Multipliers Using Linear-Region MOS Transistors
Extended Cantor Arrays with Hole-Free Fourth-Order Difference Co-Arrays
Improved hard-decision decoding LDPC Codec IP design
Live Demonstration: An Automated Test Bench for an 130nm SC DC-DC Converter
A 18-22GHz, 13.2mW, 0.22mm 2 , 5 bit VGA with 15.5dB linear in dB gain control in 130nm SiGe for Satcom on the Move (SOTM) applications
Phase noise and accuracy in quadrature oscillators
A new adaptive equalizer for carrierless amplitude and phase (CAP) receivers
Softransceiver transmit origin offset compensation: Digital to the rescue of RF-CMOS
Digital receiver architectures for the IEEE 802.15.4 standard
An efficient countermeasure against power attacks for ECC over GF(p)
The Design of CMOS 13.56-MHz High Efficiency 1×/3× 1.99V/6.29V Active Rectifier for Implantable Neuromodulation Systems
Fast recursive adaptation for nonlinear filters
Comparative review of NoCs in the context of ASICs and FPGAs
Recent Developments and Future Trends of Multirate Analog-digital Systems
A 1.35-ppm/°C Temperature Coefficient, 86-dB PSR Voltage Reference With 1-mA Load Driving Capability
Adaptive color filter array demosaicing with artifact suppression
A parameterizable digital-approximated 2D Gaussian smoothing filter for edge detection in noisy image
A New Faster Method for Calculating the Resolution Coefficient of CMOS Latches: Design of an Optimum Latch
Hierarchical exploration and selection of transistor-topologies for analog circuit design
A CNN implementation of a hysteresis chaos generator
A mixed-signal platform dedicated to power system dynamic computation
Phase noise in a back-gate biased low-voltage VCO
A 6 GHz, 1.8 V, divide-by-2 circuit implemented in silicon bipolar technology
Design of residue-to-binary converter for a new 5-moduli superset residue number system
New algorithm for blind adaptive equalization based on constant modulus criterion
Statistical properties of chaotic sequences generated by Jacobian elliptic Chebyshev rational maps
Design of a body-effect reduced-source follower and its application to linearization technique
Analytic approach to or transformations for FET circuit synthesis. Part II. Nullator-norator re-pairing and cloning
RecNet: Deep Learning-Based OFDM Receiver with Semi-Blind Channel Estimation
An infinite-skew tolerant delay locked loop
Methodology Towards Sub-ppm Testing of Analog and Mixed-Signal ICs for Cyber-Physical Systems
LVDS interface for AER links with burst mode operation capability
Live Demonstration: Real-time Multi-modal Hearing Assistive Technology Prototype
A 340nW/Channel Neural Recording Analog Front-End using Replica-Biasing LNAs to Tolerate 200mVpp Interfere from 350mV Power Supply
Design considerations and experimental results of continuously-tuned reconfigurable CMOS LNAs
Synthesis of Reliable Application Specific Heterogeneous Multiprocessors
General analysis on the impact of phase-skew in time-interleaved ADCs
Modeling of random channel parameter variations in MOS transistors
Multilayer Neural Network Structures as Volterra Filter
Undersampled LC bandpass Sigma Delta modulators with feedback FIRDACs
A power-efficient scan tree design by exploring the Q'-D connection
Evaluation of interconnect fabrics for an embedded MPSoC in 28 nm FD-SOI
On-Chip Adaptation for Reducing Mismatch in Analog Non-Volatile Device Based Neural Networks
A novel wireless ring-shaped multi-site pulse oximeter
Noise-tolerant XOR-based conditional keeper for high fan-in dynamic circuits
Settling time and noise optimization of a three-stage operational transconductance amplifier
Dynamic IR drop estimation at gate level with standard library information
Absolute responcse error bounds for floating point digital filters in state space representation
Determination of Circular Arc Length and Midpoint by Hough Transform
In tegration of carbon nanostructures on CMOS for lab-on-a-chip sensing
Transmit/receive beamformer design and power control in MIMO MC-CDMA systems
Power noise in 14, 10, and 7 nm FinFET CMOS technologies
The noise and spur delusion in fractional-N frequency synthesizer design
A CMOS Analog Front-End for Tunnelling Magnetoresistive Spintronic Sensing Systems
Translating Neuromorphic CNN Visual Models to the Analogic Visual Microprocessors
HEALSound: Healthcare Education And Labeling for Cardiopulmonary Sounds
A speech recognizer with selectable model parameters
State of the art in optical interconnect technology
Effectivity of standby-energy reduction techniques for deep sub-micron CMOS
A Biphasic Integrate-and-fire System
A New Strategy for Test Pattern Generation in Sequential Circuits
Identification of chains of events leading to catastrophic failures of power systems
Time-domain constraints for the design of FRM-based cosine-modulated and modified DFT filter banks with a large number of bands and zero intersymbol interference
Vertically Stacked CMOS-Compatible Photodiodes for Scanning Electron Microscopy
Power management controller for automotive MCU applications in 90nm CMOS technology
Low power parallel multiplier with column bypassing
Optimizing Weight Mapping and Data Flow for Convolutional Neural Networks on RRAM Based Processing-In-Memory Architecture