yusuke1997/dblp-id-title huggingface dataset:
Integer discrete Fourier transform and its extension to integer trigonometric transforms
An efficient memory compression scheme for 8 k FFT in a DVB-T receiver and the corresponding error model
A Compact and Accurate Temperature-Dependent Model for CMOS Circuit Delay
An inductorless wideband low noise amplifier with current reuse and linearity enhancement
MetaCirc: A Meta-learning Approach for Statistical Leakage Estimation Improvement in Digital Circuits
Design and verification of an all-digital on-chip process variation sensor
Quadrature mismatch-shaping
Zonal load estimation studies in radial power distribution networks
Efficient multiview image compression using quadtree disparity estimation
An improved NLMS algorithm for channel equalization
Face segmentation in head-and-shoulder video sequences based on facial saliency map
THD+Noise Estimation in Class-D Amplifiers
A 1.7-GHz wide-band CMOS LC-VCO with 7-Bit coarse control
A Low-power Class-AB BiCMOS Opamp Using "Pseudo-pnp" Transistors
Comparison of the horizontal and the vertical common subexpression elimination methods for realizing digital filters
Adaptive Quantization Method for CNN with Computational-Complexity-Aware Regularization
A Novel Adaptive Prefix Interval Scheme for MIMO OFDM Systems
A low-noise interface for MEMS vibration gyroscope based on a novel power-efficient C/V conversion structure
Passive-Integrated Two-Port-Quasi-Reflectionless RF Bandpass Filters With Beyond-3-dB-Bandwidth Flat Group Delay
Approximate stationary density of the nonlinear dynamical systems excited with white noise
A novel current scaling active pixel sensor with correlated double sampling readout circuit for real time medical x-ray imaging
A statistic based time skew calibration method for time-interleaved ADCs
A Programmable-Gain Floating Inverter Low-Noise Amplifier for Ultrasound Imaging Analog Frontends
Virtual Collaborative Environment for Support of Teamwork-based Education of Analog IC Design
Noninvasive Glucose Measurement by Microwave Biosensor with Accuracy Enhancement
Mem-adaptive computing - Part I: Theory
Minimum cost implementation of full VCR functionality in MPEG video streaming
A High-Performance OTA with Hybrid of Inverter-Based OTA and Nauta OTA for High Speed Applications
6.61MHz to 317MHz nth-order current-mode low-pass and high-pass OTA-only-without-C filter
On the input output behavior of the Hilbert transform
A novel sampling process and pulse generator for a low distortion digital pulse-width modulator for digital class D amplifiers
A 400 MHz, 8-Bit, 1.75-ps Resolution Pipelined-Two-Step Time-to-Digital Converter with Dynamic Time Amplification
Analysis of video filtering on the cell processor
Model Optimization Method Based on Vertical Federated Learning
Off-chip learning for hardware hand-sign recognition system
A Novel Analysis Procedure for Class E Oscillator
Analysis of delay mismatching of digital circuits caused by common environmental fluctuations
Latency-Tolerant Virtual Cluster Architecture for VLIW DSP
A Ka-Band Quadrature-Hybrid LNA-PS with Gm- Boosting Technique in 40-nm CMOS
A Wide-Range Progammable High-Speed CMOS Frequency Divider
A new adder scheme with reduced P, G signal generations using redundant binary number system
A Low-Power Level-Crossing Analog-to-Spike Converter Intended for Neuromorphic Biomedical Applications
Examining characteristics of an observability formulation for nonlinear power systems
An empirical model of UWB large-scale signal fading in neocortical research
Digital halftoning with optimized dither array
A Dual-Loop Digital LDO Regulator with Asynchronous-Flash Binary Coarse Tuning
Optimized Implementation of Neuromorphic HATS Algorithm on FPGA
An ultra-low power predistortion-based FHSS transmitter
Time-of-flight chip in standard CMOS technology with in-pixel adaptive number of accumulations
Direction finding of wideband signals via spatial-temporal processing in wireless communications
Implementation and Prototyping of a Complex Multi-project System-on-a-chip
Ultra-low power current-based PUF
Pipelined adder graph optimization for high speed multiple constant multiplication
IEEE International Symposium on Circuits and Systems, ISCAS 2024, Singapore, May 19-22, 2024
A PVT-tracking metastability detector for asynchronous ADCs
An improved recycling folded cascode amplifier with gain boosting and phase margin enhancement
Transmitter Architecture for Faster-than-Nyquist Signaling Systems
A Digitally Controlled Oscillator in a 65-nm CMOS process for SoC clock generation
A comparison of two alternative architectures of digital ratioed compressor design for inner product processing
Data Dependent Optimization of ROM Structures
Structured LDPCcodes with low error floor based on PEG tanner graphs
Order of N Complexity Transform Domain Adaptive Filters
A low power high speed accumulator for DDFS applications
Effective write-reduction method for MLC non-volatile memory
An efficient block motion estimation algorithm on multimedia processors
A Graph Partitioning Problem for Multiple-chip Design
Dynamic rate control in multipoint video transcoding
Power Optimized Comparator Selecting Method For Stochastic ADC
Effect of traffic localization on energy dissipation in NoC-based interconnect
Two-step junction-splitting SAR analog-to-digital converter
Reducing Energy of DRAM/Flash Memory System by OS-controlled Data Refresh
TLM2.0 based timing accurate modeling method for complex NoC systems
A scalable hardware/software co-design for elliptic curve cryptography on PicoBlaze microcontroller
Characterization of processing errors on analog fully-programmable cellular sensor-processor arrays
A New Thinning Algorithm for Arabic Character Using Self-Organizing Neural Network
A compact adaptive equalizer IC for HIPERLAN system
Voltage-clamped class E amplifier with transmission-line transformer
Convergence analysis of a CORDIC-based gradient adaptive lattice filter
Live Demonstration: Tactile Events from Off-The-Shelf Sensors in a Robotic Skin
New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise
Design of a spike event coded RGT microphone for neuromorphic auditory systems
The performance and robust implementation of a blind CMOE receiver for MC-CDMA systems
A Proposed AVS Decoder Configuration in the Reconfigurable Video Coding Framework
Design of Very Low Noise 4.2GHz Clapp VCOs
On the determination of adjusted OPF solutions
Analysis of even-order terms in memoryless and quasi-memoryless polynomial baseband models
Charge-domain FIR sampler with programmable filtering coefficients
Modeling of RLC interconnect lines
Code synchronization and path delay estimation for a CDMA system using long code masking
CNN-based algorithm for drusen identification
Asynchronous biphasic pulse signal coding and its CMOS realization
Design of reliable interface system for eddy current displacement sensors in vacuum environments1
A New Mixer Circuit Using a Gate-Controlled LPNP BJT
Signal recovery in PDM optical communication systems employing independent component analysis
A New CMOS Current-Sensing Complementary Pass-Transistor Logic (CSCPTL) for High-Speed Low-Voltage Applications
High-performance FIR generation based on a timing-driven architecture and component selection method
An eye detection technique for clock and data recovery applications
A Processor Core for 32 kbit/s G.726 ADPCM Codecs
Hardware Implementation of Convolutional Neural Network for High-Precision Machining at the Sensor Edge
An ASIC for SMTP Intrusion Prevention System
A CMOS laser driver with independently adjustable DC and modulation currents for data rates up to 2.5 Gb/s
A new 2-D 8×8 DCT/IDT core design using group distributed arithmetic
A novel technique for optimization over the canonical signed-digit number space using genetic algorithms
Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method
Power aware learning for class AB analogue VLSI neural network
Empirical comparison of analog and digital auditory preprocessing for automatic speech recognition
Towards efficient and concurrent FFTs implementation on Intel Xeon/MIC clusters for LTE and HPC
An Asynchronous-Logic Masked Advanced Encryption Standard (AES) Accelerator and its Side-Channel Attack Evaluations
Linear vt-based temperature sensors with low process sensitivity and improved power supply headroom
Current Feedback Amplifiers Based Sinusoidal Oscillators
Constant time O(1) contextual and variational contrast enhancement with integral histogram
A CMOS differential logic for low-power and high-speed applications
ASP 12: Forum - Analog Electronics - a European Speciality?
A perceptual based contrast enhancement metric using AdaBoost
Hardware-software co-design of an embedded power management module with adaptive on-chip power processing schemes
A Low-power wireless multi-channel surface EMG sensor with simplified ADPCM data compression
Challenges in circuits for visual prostheses
A Transformer-Based Deep Learning Model for Sleep Apnea Detection and Application on RingConn Smart Ring
A dual-mode wavelet based R-wave detector using single-V t for leakage reduction [cardiac pacemaker applications]
PLT versus KLT [transforms]
An alias-locked loop frequency synthesis architecture
Clustering Feature Extraction of Chaotic Circuits with Learning on Coupling Weights
Quantized LDPC decoder design for binary symmetric channels
On Error Bounds for Neural Network Approximation
Design of a SiGe low-noise amplifier for 3.1-10.6 GHz ultra-wideband radio
Design of Digital IIR Integrator using Discrete Hartley Transform Interpolation Method
A sufficient condition for 1D CNNs with antisymmetric templates to perform connected component detection
Mode dependent deblocking filter for video coding
Noise-induced Breakdown of Stochastic Resonant Behavior of van der Pol Oscillators Coupled by Time-varying Resistor
The Jacobian elliptic Chebyshev rational maps can generate sequences of i.i.d. random variables
High-Accuracy and Low-Complexity Fixed-Point Inverse Discrete Cosine Transform Based on AAN's Fast Algortihm
Controlling switching systems: a bifurcation approach
Low-power Frequency Selective Filtering
Live Demonstration: Real-Time Multi-Hand Segmentation on Exhibition
Dielectric analysis of changes in electric properties of leukemic cells through travelling and negative dielectrophoresis with 2-D electrodes
iWavePro: An improved framework for iWave++
Formatted text document data hiding robust to printing, copying and scanning
A BiCMOS Tunable Shaper for Detectors of Elementary Particles
On the correlation of non-jittered and chaotically-jittered PWM signals carrying maximum information
A Temperature-stable 60-dB programmable-gain amplifier in 0.13-µm CMOS
Design of a 6 th -order Continuous-time Bandpass Delta-Sigma Modulator with 250 MHz IF, 25 MHz Bandwidth, and over 75 dB SNDR
A chip-to-chip clock-deskewing circuit for 3-D ICs
MATSORT: Fast and Efficient Approximate Matrix Sorting Algorithm for DNN Applications
Back-Gate Coupling Technique for Phase Error Correction in PLL-Based Quadrature VCOs
An asynchronous ADC with reconfigurable analog pre-processing
Novel high positive and negative pumping circuits for low supply voltage
Modelling of a High-Misalignment Tolerant WPT System for Dynamic Charge with a Long Secondary Pad
Time-mode techniques for fast-locking phase-locked loops
Isotropic Quadratic Filter Design Using the Discrete Cosine Transform
Novel D 2 T control for single-switch dual-output switching power converters
The circuit design of multiple-valued logic voltage-mode adders
Electronic technique and system for non-contact reading of temperature sensors based on piezoelectric MEMS resonators
An orthogonal feature preserving filter
H-Watch: An Open, Connected Platform for AI-Enhanced COVID19 Infection Symptoms Monitoring and Contact Tracing
A Low Complexity SVM Classifier for EEG Based Gesture Recognition using Stochastic Computing
Acoustic noise reduction for speech communication: (second-order gradient microphone)
Simultaneous task allocation, scheduling and voltage assignment for multiple-processors-core systems using mixed integer nonlinear programming
A feature-based approach to fast H.264 intra/inter mode decision
Network partitioning and GA heuristic crossover for NoC application mapping
Automated Design of Sigma-Delta Modulators with FIR Feedback
A compact resistorless 1.5-V CMOS current reference with 16.5-ppm/°C temperature coefficient
Polytopic Control of a PV-Fed SEPIC DC-DC Converter
Optimizing user expectations for video semantic filtering and abstraction
Low-cost, low-power and high-throughput BCH decoder for NAND Flash Memory
Systolic VLSI realization of a novel iterative division algorithm over GF(2m): a high-speed, low-complexity design
A Novel Methodology for Obstructive Sleep Apnea Detection from ECG using Deep Learning Approach
Piezo-powered floating gate injector for self-powered fatigue monitoring in biomechanical implants
Live demonstration: Real-time image processing on ASPA2 vision system
Minimum-adder integer multipliers using carry-save adders
System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint
Sliding orbits and double spiral bifurcation diagrams in power electronic DC/DC converters
A 1-volt, high PSRR, CMOS bandgap voltage reference
Collaborative Routing Architecture for FPGA
Multipath performance of FM-DCSK chaotic communications system
Case study of cost and performance trade-off analysis for mixed-signal integration in system-on-chip
A power-driven multiplication instruction-set design method for ASIPs
Design rules for Quantum-dot Cellular Automata
Balancing Steiner minimum trees and shortest-path trees in the rectilinear plane
GPS offset estimation and correction using satellite constellation information
Minimal activity mixed-signal VLSI architecture for real-time linear transforms in video
Discrete-time cellular neural network for thinning: A compound synthesis
An effective generator-allocating method to enhance the robustness of power grid
A data traffic efficient H.264 deblocking IP
A low power 1-MHz continuous-time ΣΔM Using a passive loop filter designed with a genetic algorithm tool
Multiobjective optimization with an asymptotically uniform coverage of Pareto front
All-Digital Open-Loop 2 nd -order Pulse Shaping Filter VCO-based ADC
Performance Measurements in a Manufacturing Communication System
A Parasitic Resistance Extraction Tool Leveraged by Image Processing
On the correlation of TCP traffic in backbone networks
A novel multiscroll chaotic system and its realization
Lab-on-CMOS capacitance sensor array for real-time cell viability measurements with I2C readout
An Active Approach to Solving the Stereo Matching Problem using Event-Based Sensors
An efficient split-radix FFT algorithm
The structure determination for the time-optimal system design algorithm
Low Power, Dual Mode Bluetooth 5.1/Bluetooth Low Energy Receiver Design
A Memory-Efficient Accelerator for DNA Sequence Alignment with Two-Piece Affine Gap Tracebacks
Design of a Precision, Self-Powered Time-Keeping Device using Coupled Fowler-Nordheim Tunneling
Spatiotemporal Chaos in Four Chaotic Circuits Coupled by One Resistor
Design of High-Performance and Compact CAM for Supporting Data-Intensive Applications
A 51.2 fps Real-Time 3DGS-SLAM Accelerator using Diagonal Feeding with Symmetric Alpha Reuse and Voxel-based 3D Gaussian Cache Management
FPGA Bitstream Fault Injection Attack and Countermeasures on the Sampling Counter in CRYSTALS Kyber
Design of robust H ∞ Filters for markovian jump systems with time-varying delays and parametric uncertainties
Contingency constrained optimal power flow solutions in complex network power grids
A PN triangle generation unit for fast and simple tessellation hardware
A framework for visual fog computing
A radiation-hardened DLL with fine resolution and DCC for DDR2 memory interface in 0.13 μm CMOS
Adaptive Pulse Program Scheme to Improve the Vth Distribution for 3D NAND Flash
Image processing and vision techniques for smart vehicles
Optimal filter design for signal estimation based on linear time-variant system theory
Computationally controllable integer, half, and quarter-pel motion estimator for MPEG-4 Advanced Simple Profile
Efficient Neural Networks with Spatial Wise Sparsity Using Unified Importance Map
Module placement with pre-placed modules using the corner block list representation
The design of two-channel perfect reconstruction FIR triplet wavelet filter banks using semidefinite programming
Power-precision scalable latch memories
Efficient Layered New Bit-Flipping QC-MDPC Decoder for BIKE Post-Quantum Cryptography
Reducing Switching Activity by Test Slice Difference Technique for Test Volume Compression
SRAM oriented memory sense amplifier design in 0.18 μm CMOS technology
Accurate detection of out-of-control variations from digital camera devices
An 8-qubit quantum-circuit processor
Efficient VLSI Design of a Reverse RNS Converter for New Flexible 4-Moduli Set (2 p+k , 2 p +1, 2 p -1, 2 2p +1)
A Stack-Based In-Pixel Storage Circuit for SPAD Photon Counting
A low voltage CMOS multiplier for high frequency equalization
Energy Efficient Collaborative Beamforming in Wireless Sensor Networks
Derivative-Free-Optimization-based Bifurcation Point Detection Method without Parameter Tuning
Analysis and Design of Constant-Slope Voltage-to-Time Converters
An adaptive edge-preserving artifacts removal filter for video post-processing
A Low-Power Sparse Deep Learning Accelerator with Optimized Data Reuse
Comparison of Decimation and Interpolation Methods in Case of Multiple Repeated RGB-YCbCr Colour Image Format Conversions
Design of IIR integrators using Newton-Cotes quadrature rule and fractional sample delay
Design Considerations for Integrated, High-Voltage DC-DC Converters
Systematic Design For Multistage Feed-forward Op-amp For High-Speed Continuous-Time ∑Δ ADCs
Combining RC-Interconnect Effects with Nonlinear MOS Macromodels
Design Space Exploration for PCA Implementation of Embedded Learning in FPGAs
HESSPROP: Mitigating Memristive DNN Weight Mapping Errors with Hessian Backpropagation
Efficient multi-prime RSA immune against hardware fault attack
Task graph transformation to aid system synthesis
A Portable Electrochemical Impedance Spectroscopy Lab-on-chip System for Biosensing Applications
Bifurcation analysis in dual-input buck converter in hybrid power system
Fast-switching analog PLL with finite-impulse response
Fault location in automated distribution network
Accurate and reusable macromodeling technique using a fuzzy-logic approach
A efficient placement and global routing algorithm for hierarchical FPGAs
One chip-low power digital-TCXO with sub-ppm accuracy
Measuring and Compensating for Process Mismatch-induced, Reference Spurs in Phase-locked Loops using a Sub-sampled DSP
Live Demonstration: Revealing the Secret Parameters of an FPGA-Based "True" Random Number Generator
System on Chip Testbed for Deep Neuromorphic Neural Networks
Spatial-temporal Patterns in Hardware Oriented Oscillatory CNN Architectures
Efficient radix conversions for classes of radices
Median-based filters with prediction error processing for video restoration
Design of a Seizure Detector Using Single Channel EEG Signal
Neuromorphic Audio Dataset for Predictive Maintenance in Peristaltic Pumps
Realisation techniques for primitive operator infinite impulse response digital filters
A new marker-based watershed algorithm
A hybrid watermarking scheme for sequential functions
An Ultra-low-power True Single-phase Clocking Flip-flop with Improved Hold time Variation using Logic Structure Reduction Scheme
ASPA: Focal Plane digital processor array with asynchronous processing capabilities
Canny edge based image expansion
Enhancing PUF reliability by machine learning
Anti-windup dual-loop control of DFIG under unbalanced voltage conditions
A reconfigurable IC for wireless monitoring of chemical or electrical neural activity
Deep Feature Compression with Collaborative Coding of Image Texture
A robust method for equalizer design based on the impulse response symmetry
Validation analysis and test flow optimization of VLSI chip
Constant-Power Constant-Voltage Charging Protocol Based on a Four-Phase Interleaved Buck Converter for Electric Vehicle Batteries
A preamble-aided symbol and frequency synchronization scheme for OFDM systems
Performance of submicron CMOS devices and gates with substrate biasing
Perceptual-based coding mode decision
Color object segmentation with eigen-based fuzzy C-means
A high-throughput and memory efficient 2D discrete wavelet transform hardware architecture for JPEG2000 standard
Margin normalization and propagation in analog VLSI
Shadow watermark embedding system
A 2MS/s, 11.22 ENOB, 3.2 V pp-d SAR ADC with improved DNL and offset calculation
Biosensing IoT Platform for Water Management in Vineyards
A novel particle swarm optimization for high-level synthesis of digital filters
An Analog Circuit Technique to Improve a Geophone Frequency Response for Application as Vibration Sensors
Carrier frequency synchronization for mobile television receivers
An algorithm computing submatrices of the n-th Kronecker power matrix
A cognitive radio receiver front-end IC based on spread spectrum sensing technique
Identification of Frame-Rate Up-Conversion Based on Spatial-Temporal Edge and Occlusion with Convolutional Neural Network
Stacked Ring Oscillator Design for Broadband Memory Testing from 3MHz to 3.7GHz
Equivalent Net Abstraction and Firing Sequence Preservation
A charge-based ultra-low power continuous-time ADC for data driven neural spike processing
Worst-case tolerance analysis of non-linear systems using evolutionary algorithms
Secure Implementation of TEL-compatible Flip-Flops using a Standard-Cell Approach
Concentrator access networks for programmable logic cores on SoCs
Exploiting spike-based dynamics in a silicon cochlea for speaker identification
VLSI implementation of a low complexity 4×4 MIMO sphere decoder with table enumeration
A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision
A DNN Based Speech Enhancement Approach to Noise Robust Acoustic-to-Articulatory Inversion
Integrated inductors over MOSFETs - experimental results of a three dimensional integrated structure
A high-speed Reed-Solomon decoder for correction of both errors and erasures
Linear phase FIR-filter in lattice structure
A multiple access technique for differential chaos shift keying
Transfer Function Design for Delta-Sigma Converters
Energy Storage System with Dual Power Inverters for Islanding Operation of Microgrid
Active subset selection approach to nonlinear modeling of ECG data
MASH delta-sigma modulators for wideband and multi-standard applications
Modeling the Perceptual Impact of Viewport Adaptation for Immersive Video
Modelling, analysis and control of multi-agent systems: A brief overview
IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022
Systematic design of double-sampling Sigma Delta ADC's with modified NTF
Extracting a planar spanning subgraph of a terminal-vertex graph by solving the independent set problem
Live Demonstration: A Polarization-Based Interference-Tolerant Visible Light Communication Link
Convergence analysis of continuous-time systems based on feedforward neural networks
Efficient macroblock pipeline structure in high definition AVS video encoder VLSI architecture
CMOS receiver with equalizer and CDR for short-reach optical communications
A Real-Time Lossless Data Compression Technology for Remote-Sensing and Other Applications
Low-Voltage CMOS Single Ended and Fully Differential Amplifier with Programmable Gain
A cell selection strategy for low power applications
Precise RSSI with High Process Variation Tolerance
RF gain control in direct conversion receivers
0.7 V supply self-biased nanoWatt MOS-only threshold voltage monitor
Deep Learning Based Source Direction Estimation with Magnitude-only Array Measurements
Design of an insulation device using phosphotransfer systems
Low voltage CMOS bandgap references with temperature compensated reference current output
A Steerable DC-1 GHz all-pass filter-Sum RF space-time 2-D beam filter in 65 nm CMOS