yusuke1997/dblp-id-title huggingface dataset:
Non-iterative high speed division computation based on Mitchell logarithmic method
Base Conversion RNS using Hybrid Barret-Karatsuba-Based Modulus Prime Cores for Homomorphic Multiplication
SPI interface, mux-based synchronizer and DSP unit for a MEMS-based accelerometer
Noise reduction filters based on pointwise MAP for CT images
An Integrated Bidirectional Multi-Channel Opto-Electro Arbitrary Waveform Stimulator for Treating Motor Neurone Disease
A divide-and-conquer 2.5-D floorplanning algorithm based on statistical wirelength estimation
Low cost and latency embedded 3D graphics reciprocation
Averaging method analysis of a new mutual synchronization method from living organism
Efficient Nested Key Equation Solver for Short Generalized Integrated Interleaved BCH Codes
A Spike-Based Saccadic Recognition System
A High Linearity Driver with Embedded Interleaved Track-and-Hold Array for High-Speed ADC
Implementation of the IPFE Algorithm for Synthesis of High Order Recursive Filters
Generalized Linear Canonical Transform with Higher Order Phase
An exact BIBO stability condition for Bode-type variable-amplitude digital equalizers
Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design
A Double-Issue Java Processor Design for Embedded Applications
A 6.4pJ/Bit Strong Physical Unclonable Function Based on Multiple-Stage Amplifier Chain
A NMR Optimized Bitrate Transcoder for MPEG-2/4 LC-AAC
A 1/10 DTC Range Reduction Technique in a Fractional-N MDLL Using a Reference Triggered Ring Oscillator
Low-complexity hybrid beam-tracking algorithms and architectures for mmWave MIMO systems
A 1.08-Gb/s Burst-mode Clock and Data Recovery Circuit using the Jitter Reduction Technique
FPGA implementation of a large-number multiplier for fully homomorphic encryption
Floating Point Addition Errors and their Effect on the Roundoff Noise in Digital Signal Processing
Reduced memory architecture for CORDIC-based FFT
A new error resilient coding scheme for JPEG image transmission based on data embedding and vector quantization
ICAR: independent component analysis using redundancies
A 1600 by 1200, 300 mW, 40 fps multi-spectral imager for near-infrared fluorescence image-guided surgery
Floating gate analog memory for parameter and variable storage in a learning silicon neuron
Synthesis of asynchronous QDI circuits using synchronous coding specifications
Investigation of inductors for digital Si-CMOS technologies
A perceptually optimized watermarking scheme for color visual information
A 0.8 V, 360 nW Gm-C biquad based on FGMOS transistors [biquadratic filter]
A Bandpass Continuous-time SigmaDelta Modulator using a Parallel-DAC to Reduce Jitter Sensitivity
Adaptive negative cycle detection in dynamic graphs
Low complexity FFT/IFFT processor for high-speed OFDM system using efficient multiplier scheduling
Area Efficient Bus Encoding Technique for Minimizing Simultaneous Switching Noise (SSN)
Generalized Linear-Phase Lapped Orthogonal Transforms
State-dependent sensory processing in networks of VLSI spiking neurons
Video error concealment techniques using progressive interpolation and boundary matching algorithm
A 1-3.2 GHz 0.6 mW/GHz Duty-Cycle-Corrector Using Bangbang Duty-Cyle-Detector
On the acquisition time for serial and parallel code search in UWB impulse radio
Prolonged transposed polynomial-based filters for decimation
Active Pulse-Clamp Stimulation for Rapid Recovery, Charge-Balanced Neural Stimulation
Adaptive Upscaling Filter Selection with Wiener Filter Compression Techniques in Reference Picture Resampling
Fast single frame super-resolution using scale-invariant self-similarity
Scaling analysis of yield optimization considering supply and threshold voltage variations
A 1.8V p(seudo)SRAM using standard 140nm DRAM technology with self adapting clocked standby operation
Sub-faults identification for collapsing in diagnosis
High-speed image processing with AER-based components
An analog signal interface with constant performance for SoCs
A simple technique for near-lossless coding of color images
A novel ACS scheme for area-efficient Viterbi decoders
A theoretical study of the statistical and spectral properties of polar transmitter signals
Portable Memristive Biosensing System as Effective Point-of-Care Device for Cancer Diagnostics
Hardware implementation of a real-time tone mapping algorithm based on a mantissa-exponent representation
Edge-weighted Graph Neural Networks for Post-placement Interconnect Capacitance Estimation of Analog Circuits
A flexible receiver using ΔΣ modulation
NBSSN: A Neuromorphic Binary Single-Spike Neural Network for Efficient Edge Intelligence
Improving the error correction capability of arithmetic coding by forecasting forbidden symbols
A Crosstalk-Harnessed Signaling Enhancement that Eliminates Common-Mode Encoding
Embedded image coding using quincunx directional filter bank
Linear range extensible Phase Frequency Detector and Charge Pump for fast frequency acquisition
Multilevel flash memory on-chip error correction based on trellis coded modulation
Maximum weight matching-based algorithms for k-edge-connectivity augmentation of a graph
An Anti-Overcharged High-dV/dt-Immunity Capacitive Level Shifter with Dynamic Discharge Control for Half-Bridge GaN Driver
Efficient memory access methods for framebuffer-less video processing applications
A real-time segmentation scheme for continuous color images
An ultra-low-voltage active rectifier for energy harvesting applications
A high isolation linear folded mixer for WiFi applications
Holographic memory reconfigurable VLSI
Double-bounded homotopy for analysing nonlinear resistive circuits
Architectural approaches to reduce leakage energy in caches
A wirelessly powered high-speed transceiver for high-density bidirectional neural interfaces
A fractional-N frequency synthesizer for cellular and short range multi-standard wireless receiver
Pulse generator design for UWB IR communication systems
A novel low-voltage finite-gain compensation technique for high-speed reset- and switched-opamp circuits
Construction of linearly transformed planar BDD by Walsh coefficients
A customized lattice reduction multiprocessor for MIMO detection
Asymmetric, space-variant point spread function model for a spherical lens optical system
A Floating-Point SRAM-based CIM Macro with Asynchronous Normalization and Parallel Sorting Alignment
A SoC design for portable 2-dimension oximeter image system
Design and Testing of a 32-kHz Frequency Divider Chain Operating at VDD = 76 mV
HUXIN: In-Memory Crossbar Core for Integration of Biologically Inspired Stochastic Neuron Models
Multirate-cascade sigma-delta (MC-SD) modulators
Delta-Rule-based Weight Calibration Method for Low-Power SNN System
A diffusive electro-equivalent Li-ion battery model
Ultra-high speed atomic force microscopy: Video-rate and beyond
Intelligent ubiquitous sensor network for sound acquisition
High Speed Operational Amplifier using a-InGaZnO TFTs with Negative Capacitance
Edge-Based Temporal Fusion Transformer for Multi-Horizon Blood Glucose Prediction
An Analog High-Speed Wide-Range Programmable Monostable Multivibrator
A 51-dB SNDR DCO-based TDC using two-stage second-order noise shaping
Three-phase power flow for FRIENDS network
A Dual Mode All NMOS 7-T Temperature Sensor and Voltage Reference for Biomedical Applications
Accurate Fashion Style Estimation with a Novel Training Set and Removal of Unnecessary Pixels
Fundamental Feature Extraction of the Battery Charge Phase from Product Data
Blind Quality Assessment of Light Field Images via Fourier Channel Attention and Multi-Scale Fusion
A Generic Foreground Calibration Algorithm For ADCs with Nonlinear Impairments
Subthreshold current mode matrix determinant computation for analog signal processing
Fourier Phase Retrieval With Diffusion Priors Guided by Failure Detection
Optimal quantization noise management in wideband fractional-N PLLs
Architectural Exploration of Hybrid Neural Decoders for Neuromorphic Implantable BMI
Programmable LSB-first and MSB-first modular multipliers for ECC in GF(2 m )
Fully integrated passive UHF RFID transponder IC with a sensitivity of -12 dBm
VLSI model of the bat lateral superior olive for azimuthal echolocation
Image denoising via Graph regularized K-SVD
Least squares solution of nearly square overdetermined sparse linear systems
High-speed add-compare-select units using locally self-resetting CMOS
Analysis of the Effect of PFD Sampling on Charge-Pump PLL Stability
Channel estimation for a new high performance MIMO STC-OFDM WLAN system
An Analog-digital Adaptive Echo Canceller for Hybrids
Programming algorithms for multilevel phase-change memory
A new chaotic key-based design for image encryption and decryption
Image coding using directional VQ of wavelet coefficients
Pipelined Recursive Digital Filters: Clustered Look-Ahead and Scattered Look-Ahead Techniques
A micropower front-end interface for differential-capacitive sensor systems
Nano-electronic circuits as quantum bits
Robust and discriminative image authentication based on standard model feature
A high gain ultra-wideband low noise amplifier with 802.11a interference rejection
Asynchronous Circuits as an Enabler of Scalable and Programmable Metasurfaces
Clock Distribution Design in VLSI Circuits. An Overview
A constructive approach for threshold logic circuit synthesis
Optimality of principal component filter banks for discrete multitone communication systems
Implementation of MCML universal logic gate for 10 GHz-range in 0.13 µm CMOS technology
Two implementation methods of a 1024-bit RSA cryptoprocessor based on modified Montgomery algorithm
Machine Learning Framework Using Complex Network Features to Predict Wire-length
FPGA-Par: An Efficient Algorithm for Elegant Partitioning in Multi-FPGA Systems
Fabrication process for a microfluidic valve
Multimicrophone speech dereverberation using spatiotemporal and spectral processing
Bit-Slicing FPGA Accelerator for Quantized Neural Networks
Testing a polynomial for zeros inside the unit-circle over the ring of Gaussian integers
Role of Undergraduate Summer Research in Improving Retention of Engineering Students
Noise reduction methods for chaotic communication schemes
An Algorithm for Finding Equitable Clusters in Multi-Layer Networks
Analysis of the oscillation problem in tri-flops
An efficient architecture for independent component analysis
Design of class-E power amplifier with nonlinear components by using extended impedance method
Leveraging QDI Robustness to Simplify the Design of IoT Circuits
An interactive and secure user authentication scheme for mobile devices
A Low-Noise 320×240 Digital ROIC for SiGe Microbolometers with a Fast Converging Offset Calibration Technique
1-D and 2-D switching strategies achieving near optimal INL for thermometer-coded current steering DACs
Impact of Modular Multilevel Converters Impedances on the AC/DC Power System Stability
Design for Variability in CMOS Logic Circuits: Uncommitted Motif Arrays (UMAs)
Generalized sidelobe cancellers with leakage constraints
A 0.5 V-1.4 V supply-independent frequency-based analog-to-digital converter with fast start-up time for wireless sensor networks
A technique for DC-offset removal and carrier phase error compensation in integrated wireless receivers
High Energy Efficiency Spatial Parallel Stochastic Computing for Precision Scalable Neural Processing Unit
Five-Stage, Power Efficient, Dual Rail, 100MHz, 10dB Programmable Gain Amplifier with Down-Stepping Functions in 28nm CMOS
Solar and thermal energy harvesting with a wearable jacket
Distributed Flow Control and Buffer Management for Wireless Network-on-Chip
A straightforward design of mismatch-shaped multi-bit ΔΣ D/A systems
A radio-controlled receiver for clocks/watches and alarm applications
Improved offline calibration for DAC mismatch in low OSR ΣΔ ADCs with distributed feedback
Deterministic and low power BIST based on scan slice overlapping
A novel refractometer architecture
A CMOS Current-Mode PWM Technique for Analog Neural Network Implementations
MPEG-2 4: 2: 2@HL encoder chip set
An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter
A 0.6V 12-Bit Binary-Scaled Redundant SAR ADC with 83dB SFDR
Modeling and fabrication of an RF MEMS variable capacitor with a fractal geometry
Synthesis of multiple-input translinear element networks
The design of peak constrained least squares FIR filters with low complexity finite precision coefficients
Design of a Hybrid High Resolution Digital PWM for a Smart Power Point-of-Load Power Converter
High-speed/low-power 1-D DWT architectures with high efficiency
Configurable low noise readout front-end for gaseous detectors in 130nm CMOS technology
Evolutionary graph generation system with transmigration capability for arithmetic circuit design
Neural Network Classifiers and Principal Component Analysis for Blind Signal to Noise Ratio Estimation of Speech Signals
ConvNets experiments on SpiNNaker
Redesigning commercial floating-gate memory for analog computing applications
A study of time window selection for electric power distribution system analysis
A passive resonant clocking network for distribution of a 2.5-GHz clock in a flash ADC
Efficiency based design flow for fully-integrated class C RF power amplifiers in nanometric CMOS
Live Demonstration: A prototype of Analog/Digital-mixed Neural Networks for reconfigurable learning
Unified Analysis, Modeling, and Simulation of Chopping Artifacts in Continuous-Time Delta-Sigma Modulators
Modified SRCMOS cell for high-throughput wave-pipelined arithmetic units
Constructive Estimates of the Pull-In Range for Synchronization Circuit Described by Integro-Differential Equations
A high-speed level shifting technique and its application in high-voltage, synchronous DC-DC converters with quasi-ZVS
A new kernel Kalman filter algorithm for estimating time-varying nonlinear systems
Conditions for the existence and uniqueness of DC solutions of networks containing nonlinear opamps with ideal model
A 13.56-MHz Wireless Power Transfer Transmitter with Impedance Compression Network for Biomedical Applications
Assessment of driver's driving performance and alertness using EEG-based fuzzy neural networks
A Hybrid BJT/Subthreshold MOSFET-Based Voltage Reference with a sub 1ppm/℃ Temperature Coefficient
A phase-frequency detector and a charge pump design for PLL applications
Minimax design of stable IIR filters with sparse coefficients
Bifurcation phenomena observed from two-variable spiking neuron integrated circuit
Flame monitoring with an AER color vision sensor
Context-adaptive fast motion estimation of HEVC
A Mixed-signal Computing-in-Memory Solver for Integer Constrained Least Square Problems
An all-digital on-chip silicon oscillator with automatic VT range selection relative modeling
The unified discrete Fourier-Hartley transforms: theory and structure
VLSI architecture design of layer-based bilateral and median filtering for 4k2k videos at 30fps
Coping with saturating projection stages in RMPI-based Compressive Sensing
A CMOS Wideband Linear Current Attenuator with Electronically Variable Gain
A 19-bit Range and 4.5-ps Resolution Fully-Synthesizable Time-to-Digital Converter with Quad-Edge Offset Cancellation
High-CMRR, Operational Transconductance Amplifier for Low-Voltage Applications Based on a Degenerative Current TRAM
A 20-Gb/s, 2.4 pJ/bit, Fully Integrated Optical Receiver with a Baud-Rate Clock and Data Recovery
Transient Noise Analysis for Comparator-Based Switched-Capacitor Circuits
Macroblock level hybrid temporal-spatial prediction for H.264/AVC
Verification of Medication Dispensing Using the Attentive Computer Vision Approach
A high-speed computational method of fuzzy inference system for embedded systems
An On-Chip Delta-Time-to-Voltage Converter for Real-Time Measurement of Clock Jitter
Power factor correction circuit with ZVT for all switches
Digital energy detection for OOK demodulation in ultra-low power radios
Efficient view synthesis based error concealment method for multiview video plus depth
Visual masking estimation based on structural uncertainty
Generation of Multi-Polarity Arithmetic Transform from Reduced Representation of Boolean Functions
A Proposal for Multiplierless RLS Adaptive Filters with Implementation Complexity Constraint
Quadrature VCOs Based on Coupled PLLs
Design Criteria for Real-time Processing of HW Gabor Filters in Visual Search
A Novel Design Methodology of the On-Chip Power Distribution Network Enhancing the Performance and Suppressing EMI of the SoC
A higher order curvature corrected 2 ppm/°C CMOS voltage reference circuit
A super-regenerative pulsed UWB receiver combined with injection-locking
Photocurrent dependent response of a SPAD biased by a charge pump
Continuous time delta-sigma modulator with an embedded passive low pass filter
Super-resolution reconstruction for Kinect 3D data
Multi-Bit CNT TSV for 3-D ICs
Quadrature relaxation oscillator with FoM of -165 dBc/Hz
A 47μW 204MHz AlN Contour-Mode MEMS based tunable oscillator in 65nm CMOS
Maximum-Period PRNGs Derived From A Piecewise Linear One-Dimensional Map
On synthesis of a reactance network having the step response described by a sinusoid with a given envelope
Single op-amp proportional-integral compensator with antiwindup
Live Demonstration: A Portable Microsensor Fusion System with Real-Time Measurement for On-Site Beverage Tasting
Integrator swing reduction in feedback compensated Sigma-Delta modulators
Multidimensional raster-scanned LC-ladder wave-digital filter hardware for directional filtering in space-time
Gain-Cell Embedded DRAMs: Modeling and Design Space
Backward predictive congestion control notification in ATM networks using neural network prediction
Modified Discrete Fourier Transforms for fast convolution and adaptive filtering
Improved Frame Level MAD Prediction and Bit Allocation Scheme for H.264/AVC Rate Control
A compact multi-chip-module implementation of a multi-precision neural network classifier
Development and Evaluation of an IoT-Driven Auto-Infusion System with Advanced Monitoring and Alarm Functionalities
A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching
A Technique to Improve the Convergency Speed of Relaxation-based Simulations in Tightly Coupled Circuits
Complexity reduction for frequency-response masking filters using cyclotomic polynomial prefilters
A Low-Power Hardware Architecture for On-Line Supervised Learning in Multi-Layer Spiking Neural Networks
Quadrisectioning Based Placement with a Normalized Mean Field Neural Network
A μW-level Multi-channel Calibration-free Spike Detector with High Accuracy based on Stationary Wavelet Transform and Teager Energy Operators
Supercritical stability in a sonar receiver circuit
Modeling the faulty behaviour of digital designs using a feed forward neural network approach
CNN wave based computation for robot navigation on ACE16K
An 8-bit 200 MSPS CMOS A/D converter for analog interface module of TFT-LCD driver
A serial link transceiver for USB2 high-speed mode
Development of Advanced Parallel MVMO-SH for Voltage Control in Distribution Systems
A novel segmentation scheme for DTC-based ΔΣ fractional-N PLL
Current-mode universal biquad circuit using MO-OTAs and DO-CCII
Distortion analysis of nonlinear networks based on SPICE-oriented harmonic balance method
Compact integrated transconductance amplifier circuit for temporal differentiation
Feasible transition path generation for EFSM-based system testing
Multiplier-less IIR filter synthesis algorithms to trade-off the delay and the number of adders
Segmentation-based scale-invariant nonlocal means super resolution
Conformal-mapping model for estimating the resistance of polygonal inductors
A 4 th Order CIFB High Dynamic Range Sigma-Delta Modulator with Multi-level Quantizer and Intrinsically Linear Capacitive DACs
A high-performance elliptic curve cryptographic processor over GF(p) with SPA resistance
A new order-reduction method of interconnect networks characterized by sampled data via orthogonal least square algorithm
Efficient module 2 n +1 multiplication schemes for IDEA
An Integrated Low Power Temperature Sensor for Food Monitoring Applications
Electrical protection selectivity in auxiliary DC installations in power plants and substations
Powering smart wearable systems with flexible solar energy harvesting
Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion
An adaptive wireless powering and data telemetry system for optic nerve stimulation
Enhanced Compensation for Voltage Regulators Based on Three-Stage CMOS Operational Amplifiers for Large Capacitive Loads
Noise voltage analysis of spiral inductor for on-chip buck converter design
A >150dB dynamic range, enhanced input swing, high precision current mirror in 180nm CMOS technology
A low energy VLSI design of random block interleaver for 3GPP turbo decoding
Design exploration with an application-specific instruction-set processor for ELA deinterlacing
Challenge of MTJ/MOS-hybrid logic-in-memory architecture for nonvolatile VLSI processor
Design considerations for digital circuits using organic thin film transistors on a flexible substrate
Convergence and steady-state analysis of the cost function adaptation algorithms for data echo cancellation
A Variable Gain Phase Shifter Based on Hybrid Control Scheme
FIR Filter with Symmetric Non-Equal Coefficients for CT Delta-Sigma Modulators
Efficient VLSI implementation of N/N integer division
Accelerating volume rendering using an on-chip SRAM occupancy map
Minimization of BDDs using linear transformations based on evolutionary techniques
An analog-to-digital converter with dynamic window for optimal rational number approximation
A Switched-Mode Time-Sharing Solution for Piezoelectric Energy Harvesting and Vibration Sensing
Time domain response and sensitivity of periodically switched nonlinear circuits
Power supply variation effects on timing characteristics of clocked registers
Novel High Frequency Antenna Sensor to Detect On-Line Partial Discharge Signals
Multiple single pixel dim target detection in infrared image sequence
Design and implementation of a novel algorithm for general purpose median filtering on FPGAs
Skew-symmetry in the equivalent representation problem of a time-varying multiport inductor
A fast hypergraph minimum cut algorithm
Energy profile of a microcontroller for neural prosthetic application
Small congestion embedding of separable graphs into grids of the same size
Improved cell core for a mixed-mode polynomial CNN
Accurate Onset Detection Algorithm using Feature-Layer-Based Deep Learning Architecture
Visual attention-based watermarking
A hybrid analog/digital Spike-Timing Dependent Plasticity learning circuit for neuromorphic VLSI multi-neuron architectures
A Learning Approach for Single-frame Face Super-resolution
Synchronously triggered GALS design templates leveraging QDI asynchronous interfaces
A 128×128 floating gate imager with self-adapting fixed pattern noise reduction
An efficient approach for hierarchical submodule extraction
HyNITA: A Neuromorphic Inference and Training Accelerator for Hybrid ANN-SNN Fusion Models
Design of a fully-static differential low-power CMOS flip-flop
Improving redundancy addition and removal using unreachable states for sequential circuits
Implementation of a parallel turbo decoder with dividable interleaver
Design and implementation of a fully reconfigurable chipless RFID tag using Inkjet printing technology
On the use of discrete wavelet transform for robust scalable speech coding
Novel mixed-signal based short-range leakage canceler for FMCW radar transceiver MMICs
A versatile CMOS low-noise analog front-end stage for solid state detector interfaces
Real-time multi-view rendering architecture for autostereoscopic displays
A zero-time-overhead asynchronous four-phase controller
A Neuromodulation-based Spiking Neural Network using ReRAM Array
Amplitude Death in Coupled Oscillatory Systems Inspired by Brain Networks with Different Frequency
Poisson distributed noise generation for spiking neural applications
Hybrid digital-analog scheme for video transmission over wireless
A 96-channel ASIC for sEMG Fatigue Monitoring with Compressed Sensing for Data Reduction