yusuke1997/dblp-id-title huggingface dataset:
Using ANNs to Predict Frequency Spectrum Occupancy in Cognitive-Radio Receivers
Learning to Sense Sustainably: RL-Based Control for Solar-Powered IoT Nodes
Performance evaluation of state-of-the-art CNN architectures for the on-board processing of remotely sensed images
Analysis and Deployment of Applications Acceleration Environment for Xilinx Hardware-Accelerated Platforms
An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications
On the Use of Built-In Temperature Sensors to Monitor Aging in RF Circuits
Efficient Elliptic Curve Cryptoprocessor for enabling TLS protocol in low-cost reconfigurable SoCs
Efficient Neural Architectures for Acoustic Monitoring of Livestock
Designing bioimpedance based sensors for cell cultures test
Dermatologic Hyperspectral Imaging System for Skin Cancer Diagnosis Assistance
Design Guidelines for β-Multiplier Current Reference Circuits
Efficient Simulation of Faults in Networked Cyber-Physical Systems
Functional printing for main distortion points in cured composite parts
A CMOS Low Frequency Analog RFID Front-End for the IoT
Design for Calibratability of a N-Integer Low-Frequency Phase-Locked Loop
Real-Time EEG Acquisition System for FPGA-based BCI
Any-Radix Efficient Fully-Parallel Implementation of the Fast Fourier Transform on FPGAs
Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation
Reliability and Accelerated Testing of 14nm FinFET Ring Oscillators
Energy-Aware Adaptative Supercapacitor Storage System for Multi-Harvesting Solutions
Design of a SoC Architecture for the Edge Computing of NILM Techniques
Data Synchronization in Non-Uniform Latency Custom DSP Designs
An ultra-low power deep sub-micron fast start-up circuit with added line regulation
Towards efficient hardware digital twins of lithium-ion batteries
Hardware architecture for integrate-and-fire signal reconstruction on FPGA
A Small-Area Current-Mode Input ΣΔ Modulator for Under-the-Sensors ADC Arrays
A Very Low SEF Neural Amplifier by Utilizing a High Swing Current-Reuse Amplifier
A Monolithic GaN shift register with reduced power consumption
Digital-to-analog converters based on Time-Interleaved Sigma-Delta Modulation with Analog Multiplexing
A GaN switched-capacitor PWM generator for a current-mode control of switching power converters
Design of ULV ULP LNAs Exploiting FBB in FDSOI 28nm Technology
A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK
Engineering UGR-VCMTCF RRAM Model for Adjusting to TiN/Ti/HfO2/W Devices
Design of a Ring-Amplifier Robust Against PVT Variations in Deep-Nanoscale FinFET CMOS
EDAC implementation on a data lossless compressor compliant with the CCSDS 121.0-B-3 standard
Window Polarization in PCA-based Analysis of Non-Invasive Fetal ECG recordings
Integrated Cuk Inverter for Single-Phase Grid-Tied Photovoltaic System
A 365mV, 13nW CMOS-only energy harvested reference voltage for RFID applications in 40nm technology
Investigation of Conductivity Changes in Memristors under Massive Pulsed Characterization
Towards GPU Accelerated HyperSpectral Depth Estimation in Medical Applications
FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems
Design Method of Analog Sigmoid Function and its Approximate Derivative
Design and Characterization of Non-planar 3D-printed Passive UHF-RFID Tag
Microarchitectural Isolation Guarantees Through Execution Based Signatures
Approximate arithmetic aware training for stochastic computing neural networks
Design of Switched-Capacitor AC-DC Voltage-Down Converters Driven by Highly Resistive Energy Transducers
An Interconnect-Centric Approach to the Flexible Partitioning and Isolation of Many-Core Accelerators for Fog Computing
Run-Time management of energy-performance trade-off in Optical Network-on-Chip
Ethernet Emulation over PCIe for RISC-V Software Development Vehicles
High-Rate Acquisition System for an Infrared LPS
40th Conference on Design of Circuits and Integrated Systems, DCIS 2025, Santander, Spain, November 26-28, 2025
Asynchronous Controller Design and Simulation Using Signal Transition Graphs
FPGA Implementation of Random Vector Functional Link Networks based on Elementary Cellular Automata
Evaluation of Software Inter-Processor Synchronization Methods for the Zynq-UltraScale+ Architecture
Study of foveation mechanisms in Dynamic Vision Sensors
Performance Analysis of Convolution Function for IA Edge Computing Acceleration Using a 32-bit RISC-V CPU Implementation
A 16bit 50kHz 177dB-FOMS Calibration-Free Bootstrapping-Free SC Delta-Sigma Modulator IP Block for Low-Power High-Resolution ADCs
A Three-Stage Operational Transconductance Amplifier in TFT Flexible-Substrate Process
A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature From 4 to 9 GHz
Cloud-Edge Continuum Infrastructure for Reconfigurable Multi-Accelerator Systems
Assessing the Effectiveness of the Test of Power Devices at the Board Level
Steady-State Design Equations of Cross-Coupled Charge Pumps and Application to 28 nm FDSOI Technology
38th Conference on Design of Circuits and Integrated Systems, DCIS 2023, Málaga, Spain, November 15-17, 2023
Synchronizing NTP Referenced SCADA Systems Interconnected by High-availability Networks
An Academic RISC-V Silicon Implementation Based on Open-Source Components
On the Fitting and Improvement of RRAM Stanford-Based Model Parameters Using TiN/Ti/HfO2/W Experimental Data
CMOS Micropower Current-Mode Sinh-Domain Filter with Multidecade Tuning
Characterizing Hyperspectral Data Layouts: Performance and Energy Efficiency in Embedded GPUs for PCA-based Dimensionality Reduction
An Open-Source FPGA Platform for Shared-Memory Heterogeneous Many-Core Architecture Exploration
Exploiting the ambipolarity in emerging transistors for high-frequency applications
Test mode selection and data I/O by means of a new Scan-based interface
Multilevel host-compiled simulation framework for ROS-based UAV services using ArduCopter
A Wide Range Current Sensing Technique for Integrated DC-DC Converters
A Variable and Extended Precision (VRP) Accelerator and its 22 nm SoC Implementation
Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring
BiDSRS: Resource Efficient Real Time Bidirectional Super Resolution System for FPGAs
Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms
Exploring Dual-Frequency Implementation for Semi-Passive RFID Tags
Algorithm-Architecture Optimization for Linear and Quadratic Regression on Reconfigurable Platforms
SRAM Performance Sensor
Ultra-Narrow Current Pulses Measurement Using a Cost-Effective Instrumentation System
Evaluation and Comparison of Physical Unclonable Functions suitable for FPGA Implementation
Event Storms in IEC 61499 Applications
Hardware Accelerator for Ethanol Detection in Water Media based on Machine Learning Techniques
Tropical Pruning Strategies for ANN optimization in IoT
Evaluation of the Versal Intelligent Engines for Digital Signal Processing Basic Core Units
Design of GFET-based active modulators leveraging device performance reproducibility conditions
Design Flow to Evaluate the Performance of Ring Oscillator PUFs on FPGAs
Embedded System for Distance Measurement and Surface Discrimination Applications
Reliability Emphasized MTJ/CMOS Hybrid Circuit Towards Ultra-Low Power
CMOS VCSEL driver dedicated for sub-nanosecond laser pulses generation in SPAD-based time-of-flight rangefinder
Speeding up FPGA Prototyping on Space Programs with HLS Workflow. Use Case: Video Compression On-board Satellites
A Smart Dental Prosthesis to Restore Dental Proprioceptivity
Security-oriented Code-based Architectures for Mitigating Fault Attacks
High Resolution Current Measurement Using TMR Sensors
Stochastic Computing-based on-chip Training Circuitry for Reservoir Computing Systems
An enhanced Verilog-A compact model for bipolar RRAMs including transient thermal effects and series resistance
AI-based estimation of embedded software execution cycles in host-compiled simulation
Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
Design of SoC FPGA based controller to reduce shadow effects in photovoltaic installations
Weak and Strong SRAM cells analysis in embedded memories for PUF applications
SoC Architecture for Acquisition and Processing of EMG Signals
Hyperspectral Images Acquisition: an Efficient Capture and Processing Stitching Procedure for Medical Environments
Improved Modified Zeta Inverter for Single-Phase Grid-Tied System
RISC-V processors design: a methodology for cores development
1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration
A 65 nm CMOS Battery-Less RFID Tag Featuring Short Range Communication with Commodity WiFi
SACA: System-level Analog CIM Accelerators Simulation Framework: Accurate Simulation of Non-Ideal Components
A 4 × 4 K-Best Spatial Modulation MIMO Detection for Visible Light Communication Systems
AISAD: A User-Friedly AI-Assisted MATLAB Tool for the High-Level Design of ΣΔ Modulators
An integrated 10MHz 3 States Buck converter for fast transient response in 180nm CMOS
High-Speed 512x512 18 μm-Pitch Array CMOS Backplane for GaN-based Microdisplay
Systematic Design Method of Passive Ladder Filters using a Generalised Variable
An Open-Source VLBI Digital Backend for Low-Cost FPGA-based SoCs
A 5.2-GS/s 8-Parallel 1024-Point MDC FFT
Periodic structures based on two-dimensional materials: application to phase shifters
Low-Voltage CMOS Bulk-Driven Buffer With Bootstrapping Technique for Gain Enhancement and THD-Noise Reduction
A Hardware Architecture for Frequency-Domain Image Processing Based on Split-Radix 2-4 FFT
Single-Stage Class-AB Non-Linear Current Mirror OTA
Power Oriented Hardware-Software Codesign for a Planetary Exploration Multisensor Instrument
Aerial-Ground Collaborative Pathfinding with HLSTL using FPGAs
Autonomous self-powered potentiostat architecture for biomedical wearable applications
Three-Stage Low Dropout Regulator with Enhanced Transient Response and Regulation Performance
Low noise, high efficiency, segmented LCD drivers for ultra-low power applications in 22 nm FD-SOI
Exploring the Performance-Energy Optimization Space of a Bridge Between 3D-Stacked Electronic and Optical Networks-on-Chip
Making Digital N-Path Mixers
Simulation of serial RRAM cell based on a Verilog-A compact model
XXXV Conference on Design of Circuits and Integrated Systems, DCIS 2020, Segovia, Spain, November 18-20, 2020
Two examples of approximate arithmetic to reduce hardware complexity and power consumption
A Compact Double-Exponential Circuit for Single Event Transient Emulation
Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
Conference on Design of Circuits and Integrated Systems, DCIS 2018, Lyon, France, November 14-16, 2018
A Memristor-based Quaternary Memory with Adaptive Noise Tolerance
Design and Layout Considerations of a D-Band SiGe LNA for Radiometric Applications
A Framework for Automated CGRA Design Space Exploration with Genetic Algorithm Optimization
Voltage Multiplier Topologies Comparison for UHF RFID Applications
Vector-Based Mismatch Shaping circuit for a low IF Multibit Σ∆ ADC
Analysis and methodology for enabling DNN inference in an IoT edge environment in depth completion tasks
Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA
Customizing the CVA6 RISC-V Core to Integrate Posit and Quire Instructions
Electrodermal Activity Smart Sensor Integration in a Wearable Affective Computing System
A MQTT-based infrastructure to support Cooperative Online Learning Activities
Design considerations and architectures for 250 GHz LNAs in SiGe technology
Devices and circuits for HF applications based on 2D materials
Resolution Enhancement of VCO-based ADCs by Passive Interpolation and Phase Injection
Evaluating the use of Hyperspectral Imaging as Complementary Blood Sample Tests
Energy-Efficient Symmetrical Cascode OTA in a 130 nm CMOS Process
Can Hyperspectral Images be used to detect Brain tumor pixels and their malignant phenotypes?
Runtime reconfigurable system for decommissioned satellite identification and capture
Design and Simulation of Peripheral Driving Circuitry for Computational ReRAM
Time-Domain Coding for Resource-Efficient Deep Neural Networks
Parasitic Capacitance Cancellation and SNR Improvement for Capacitance-to-Digital Converters based on a Switched-Capacitor Feedback
Electric Vehicle Emulator for Study as a Distributed Energy Resource
A Comparison of Frequency-to-Digital Conversion Architectures in VCO-ADCs Built with Standard Cells
FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP
FrailWear: A Wearable IoT Device for Daily Activity Monitoring of Elderly Patients
A physically based SPICE model for RRAMs including RTN
On the Importance of Physical Model Parameters for PUF Performance: A Case Study on BFO Memristors
A Built-In CMOS Temperature Sensor for On-Chip Thermal Monitoring from 0°C to 100°C with a 0.137°C of Innacuracy
Temperature Compensated D-Band SiGe LNA with Supply Current Monitoring for Self-Healing Radiometers
Performance-oriented Implementation of Hilbert Filters on FPGAs
Stochastic Computing co-processing elements for Evolving Autonomous Data Partitioning
Approximate Wireless Networks-on-Chip
RISC-V for Genome Data Analysis: Opportunities and Challenges
XXXIV Conference on Design of Circuits and Integrated Systems, DCIS 2019, Bilbao, Spain, November 20-22, 2019
Design Space Exploration in Heterogeneous Platforms Using OpenMP
Design of Integrated Control Circuits for mm-Wave Phased Arrays in 55-nm BiCMOS
A library-based tool to translate high level DNN models into hierarchical VHDL descriptions
Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection
Artificial Vision on Edge IoT Devices: A Practical Case for 3D Data Classification
Improvement of Active-Input Current Mirrors Using Adaptive Biasing Technique
Benchmarking of nanometer technologies for DPA-resilient DPL-based cryptocircuits
Energy Transition in Smart Cities: STARDUST Project
Implementing a CNN in FPGA Programmable Logic for NILM Application
Configurable Ultra-High-Throughput QRD FPGA Accelerators for Small Matrices
10 mA Precision Contactless Current Sensing Using Low-Cost Hall-Effect Devices
HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation
DVINO: A RISC-V Vector Processor Implemented in 65nm Technology
Enhancing Storage Capabilities of Oscillatory Neural Networks as Associative Memory
A Verilog-A superconducting qubit model for co-simulation with control and readout systems in the Cadence Analog Environment
A 12.8-GS/s 32-Parallel 1 Million-Point FFT
Time-Sensitive Networking to meet Hard-real Time Boundaries on Edge Intelligence Applications
STDP Design Trade-offs for FPGA-Based Spiking Neural Networks
High-Speed and Energy-Efficient Ring-Oscillator for Analog-to-Digital Conversion
Low Phase-Noise CMOS Quadrature Oscillator based on (N × 4)-stage Self-Timed Ring
High power and high bandwidth CMOS driver for hybrid interconnected GaN microdisplay
Deploying Neural Networks on RISC-V with VPU
TMOS-based contactless temperature sensor for low-power applications
peRISCVcope: A Tiny Teaching-Oriented RISC-V Interpreter
A Lightweight AES Peripheral for RISC-V Cores and IoT Applications
SACA: System-level Analog CIM Accelerators Simulation Framework: Architecture and Cycle-accurate System-to-device Simulator
A Current-Attenuator for Performing Read Operation in Memristor-Based Spiking Neural Networks
Review of Bandgap Voltage Reference Architectures for Long-Range Passive RFID Applications
SoC FPGA-based Multichannel Data Acquisition System with Linux-Baremetal AMP for Applications in the Field of Astrophysics
Finite Precision Analysis of FPGA-based Architecture for FBMC Transmultiplexers in Broadband PLC
RRAM Crossbar Arrays for Storage Class Memory Applications: Throughput and Density Considerations
The influence of virtualization on real-time systems' interrupts in embedded SoC platforms
The PLATINO Experience: A LoRa-based Network of Energy-Harvesting Devices for Smart Farming
A 65nm Current and Voltage Reference with Improved Line Regulation for Implantable Biosensors
Optimal UAV movement control for farming area scanning using hyperspectral pushbroom sensors
Quantum dot location relevance into SET-FET circuits based on FinFET devices
Evaluating the OpenAMP framework in real-time embedded SoC platforms
Design of a CMOS Transmitter Chain for Satellite on the Move Communications
Electronic control board for student Rocket
Approximate Circuits Versus Quantization for Energy Efficient Deep Neural Networks
Low-power EEGNet-based Brain-Computer Interface implemented on an Arduino Nano 33 Sense
Hierarchical Modeling of 868MHz Wake-up Radio in OMNeT++
UML-Based Design Flow for Systems with Neural Networks
SET and SEU Hardened Clock Gating Cell
Towards a Smart Earring for Continuous Heart Rate and Audio Monitoring
Using Current to Drive Two SDC Memristors Connected in Series and in Anti-Series
Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification
A Lightweight Analog RFID Front-End for Interfacing Sensors
BTI-Aware Cell Characterization based on Neural Network
Statistics-based Classification Approach for Hyperspectral Dermatologic Data Processing
Electromagnetic Fault Injection Attack Methodology against AES Hardware Implementation
A Serial Low-Switching FFT Architecture Specifically Tailored for Low Power Consumption
System Dependability in Edge Computing Wearable Devices
Timing requirements on multi-processing and reconfigurable embedded systems with multiple environments
Instrumentation Evaluation for Hyperspectral Microscopy Targeting Enhanced Medical Histology
Developing an AI IoT application with open software on a RISC-V SoC
Fast and efficient FPGA prototype system for embedded control algorithms in electric traction
A Switching-Mode Power Recycling System for a Radio-Frequency Outphasing Transmitter
A 65 nm CMOS Ultra-Low-Quiescent-Current On-Chip PMIC for Energy-Limited Harvesting Systems
Design and Implementation of the Alpha Mission Satellite Payload for Space Radiation Measurement
Low-Power CMOS Amplifiers for Wideband Impedance Spectroscopy Applications
Load Optimized Gate Driving for Charge Pumps
HW/SW implementation of RSA digital signature on a RISC-V-based System-on-Chip
Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher
Python and SIMETRIX/SIMPLIS based automated platform for the DC-DC Converter with current mode control
Compact System for Stimulation and Recording of Field Potentials from Cardiac Tissue Preparations
Demonstration of a NEMS Comb Drive for the Use of High Speed, High Efficiency Analog Multiplications
Impact of MACsec security on TSN traffic
Flexible Deep-pipelined FPGA-based Accelerator for Spiking Neural Networks
Design of a Fully Integrated CMOS-PMUT System
Novel Methodology for Alzheimer's Disease Biomarker Identification in Plasma using Hyperspectral Microscopy
3D Printed 5-Order Butterworth Passive Filter with Conical Inductors for RF Broadband Applications
Toward Fear Detection using Affect Recognition
Simulated Leakage Power Analysis Attack of the Trivium Stream Cipher
Low Entropy Masking Protection Scheme for Ascon Cipher to Counteract Side-Channel Attacks
A 72-bin in-pixel mixed-signal TDC for SPAD-based fluorescence lifetime measurements
Designing DNNs for a trade-off between robustness and processing performance in embedded devices *
Exploiting Correlation in Stochastic Computing based Deep Neural Networks
A 13.92-ENOB 762ksps Bottom Sampling Capacitive SAR ADC for Medical Applications
Ring Oscillator Circuits in Flexible aIGZO Technology for Biosignal Acquisition
Single Event Upset Tolerant TRNG Design and Its Tests Under Radiation
Accelerating the Development of NTRU Algorithm on Embedded Systems
Automatic code generation from UML for data memory optimization in microcontrollers
SerOpt: Transistor Sizing Algorithm and Optimization Utility for Minimizing Soft Error Rate
A 28 μW timing circuit for a 60 μm 2 HV-CMOS pixel
A GaN-Based DC-DC Modular Switched Inductor Converter for Shading/Mismatch Mitigation in Bifacial Photovoltaic Systems
Reduction of Parity Overhead in a Subset of Orthogonal Latin Square Codes
Design and development of an IoT device provided with a voice interface to improve treatment adherence in polymedicated patients
Simple Single Particle Model for Interpreting Fast Charge Results in Intercalation Batteries
System Architectures for Electronically Foveated Dynamic Vision Sensor
A Novel Low-Power Subthreshold Voltage Reference Circuit with Enhanced PSRR
Processor Optimization of an Energy-Efficient NDIR CO2 Wireless Sensor Node
A Security Comparison between AES-128 and AES-256 FPGA implementations against DPA attacks
Comparative Analysis of Full Adders Based on DTMOS Schmitt-Trigger Standard Cells Operating at Sub-100 mV Supply Voltage
A low power approach to body position estimation for HF patient monitoring by an ankle positioned Inertial Measurement Unit (IMU)
A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
Mismatch and Offset Calibration in Redundant SAR ADC
A spectral imaging system for precision agriculture: From its inception till a pre-commercial prototype
Distributed power amplifier in GaN technology with tapered drain lines
Assessing Test Procedure Effectiveness for Power Devices
Integrated Electrode-Based Systems for Stem-Cell Stimulation
SRAM-cells Reproducibility Metrics for Physical Unclonable Function Applications
Hardware coprocessor integration with NEORV32: characterization for efficient implementation of RISC-V-based AI SoCs
Trade-offs and Limitations in Energy-Efficient Inverter-based CMOS Amplifiers
The Self-Oscillating Dickson Charge Pump
3D printed compact 2-way Wilkison power divider/combiner for RF applications
On licenses for [Open] Hardware
Smart Charging Station with Photovoltaic and Energy Storage for Supplying Electric Buses
Data flow analysis from UML/MARTE models based on binary traces
Round-off noise estimation of fixed-point algorithms using Modified Affine Arithmetic and Legendre Polynomials
Deep Packet Inspection Through Virtual Platforms using System-On-Chip FPGAs
From RTL Liveness Assertions to Cost-Effective Hardware Checkers
A Triboelectric Energy Harvesting Autonomous System for Internet-of-Things Applications
Switched Capacitors Charge Pump with half-floating Topology for a high-efficient Solar Energy Harvester
Analog/Mixed-Signal Standard Cell Based Approach for Automated Circuit Generation of Neural Network Accelerators
Applying Model Checking in the Verification of a Clock Masking Unit
Video Action Recognition in SoC FPGAs Driven by Neural Architecture Search
CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
Evolution of the Performance of Pipelined FFT Architectures Through the Years
Behavioral modeling of multilevel HfO2-based memristors for neuromorphic circuit simulation
Data Relevance-Aware Dynamic Sensing Technique with Battery Lifetime Guarantee for Wireless Sensor Nodes
Embedded Emotion Recognition within Cyber-Physical Systems using Physiological Signals
Evaluation of a Reduced Precision Redundancy FFT Design
Data Conversion in Area-Constrained Applications: the Wireless Network-on-Chip Case
Real-time iris image quality evaluation implemented in Ultrascale MPSoC
MRAM: from STT to SOT, for security and memory
A 300 mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications
Adaptive Single-Event Latch-up Protector for Space Applications
Acceleration of a Compute-Intensive Algorithm for Power Electronic Converter Control Using Versal AI Engines
Accelerating Video Analytic Processing on Edge Intelligence
A metamodel-based adaptive sampling approach for efficient failure region characterization of integrated circuits
Iterative Method for Performance Prediction Improvement of Integrated Circuits