yusuke1997/dblp-id-title huggingface dataset:
Digital RF Processing Techniques for Device Mismatch Tolerant Transmitters in Nanometer-Scale CMOS
Low-complexity layered iterative hard-reliability-based majority-logic decoder for non-binary quasi-cyclic LDPC codes
A 2-MHz Bi-directional Wireless Transceiver System for Implantable Glucose Sensors
A BiCMOS ENG amplifier with high SIR output
On a design of crossroad switches for low-power on-chip communication architectures
A maximum power transfer theorem for DC linear two-ports
Live demonstration: A portable multi-channel potentiostat for real-time amperometric measurement of multi-electrode sensor arrays
Oversampling sigma-delta modulator stabilized by two local nonlinear feedback loop techniques
Massively parallel processing of signals in dense microphone arrays
A novel adaptive pre-distorter using LS estimation of SSPA non-linearity in mobile OFDM systems
Ultra-low voltage nano-scale embedded RAMs
Jitter-resistant Capacitor Based Sine-Shaped DAC for Continuous-Time Sigma-Delta modulators
Low bandwidth decoder framework for H.264/AVC scalable extension
Live Demonstration: A Pulmonary Conditions Monitor Based on Electrical Impedance Tomography Measurement
An analog on-chip learning circuit architecture of the weight perturbation algorithm
New strategies in removing non-coherency from signals with large distortion to noise ratios
Codebook Generation and Search Algorithm for Vector Quantization Using Arbitrary Hyperplanes
A non-coherent FSK-OOK UWB impulse radio transmitter for clock-less synchronization
Binarized Weight Neural-Network Inspired Ultra-Low Power Speech Recognition Processor with Time-Domain Based Digital-Analog Mixed Approximate Computing
On the potential of correlated materials in the design of spin-based cross-point memories (Invited)
Recent advances in bridging time series and complex networks
LPerceptual Quality Assessment of AI Generated Content Videos: a Dataset and Benchmark
An Inductor-Less RF Transmitter Using Harmonic-Rejection Edge Combiner with -40 dBc HD3 and -52 dBc HD5 for Low-Power Biomedical Applications
Time domain analysis of analog filters in MATLAB environment
Impact of bias schemes on Doherty power amplifiers
Geometric-mean interpolation for logarithmic number systems
A universal analytic charge injection model
Multiple-clock multiple-edge-triggered multiple-bit flip-flops for two-phase handshaking asynchronous circuits
Interfacing multiple processors in a system-on-chip video encoder
Upper-Triangulization of Non-Symmetric Matrices Using Sanger's Type Learning Systems
Design of low error CSD fixed-width multiplier
Adaptive Screen Content Image Enhancement Strategy using Layer-based Segmentation
Multicarrier QAM modulator
Generation of disjoint cubes for multiple-valued functions
CPSnB: Compressing and Processing Spatial Similarity near Memory Bank for DNNs
Blind closed form parameters estimation for hybrid sources
Approximate Frequency Response Models for RLC Power Grids
Improving Security of Logic Encryption in Presence of Design-for-Testability Infrastructure
ASIC hardware implementations for 512-bit hash function Whirlpool
Combinational fault simulation in sequential circuits
Process variation dimension reduction based on SVD
Enhancement of data transmission in OFDM-WLAN system using transmit diversity
An efficient transistor optimizer for custom circuits
Dynamic performance analysis of 3-level integrated buck converters
Design of orthogonal coded excitation for synthetic aperture imaging in ultrasound systems
A beamforming method in UWB pulse array based on neural network
A memristor-based random modulator for compressive sensing systems
A complete system-level behavioural model for IEEE 802.15.4 Wireless Sensor Network simulations
Fine-grained pipelining for multiple constant multiplications
Switch bootstrapping technique for voltage doublers and double charge pumps
Using HLS for Designing a Parametric Optical Flow Hierarchical Algorithm in FPGAs
A rate and distortion analysis for H.264/AVC video coding
A new multipath amplifier design technique for enhancing gain without sacrificing bandwidth
Exploring Delay/Area Trade-Offs of an LDI Filter Using a Natural Based Algorithm
A Multi-constraint and Multi-objective Allocation Model for Emergency Rescue in IoT Environment
Online Estimation of State-of-Charge, State-of-Health and Temperature of Supercapacitor
Google's PageRank and the Pedagogy of Linear Dynamic Systems
A 4-bit 5 GS/s flash A/D converter in 0.18µm CMOS
Minimum-norm realization of 2D recursive filters: a quasiconvex programming approach
Design of superscalar processor with multi-bank register file
Normal flow measurement visual motion sensor
A 7.9μA 4-bit 4Msps successive approximation phase-domain ADC for GFSK demodulator
Low-sensitivity SAB band-pass active-RC filter using impedance tapering
Offline and Time-variant EVD-based Closed-loop Digital Predistortion Design for Sub-THz Power Amplifier Array in Basedband Transmitter
A 1.5 V high gain CMOS mixer for 2.4-GHz applications
Linearity enhancement techniques for MOSFET-only SC circuits
A Multi-Input Multi-Output Recursive Least Squares Algorithm with Applications to LORAN-C Transmitter
Design of a 25-Gb/s PAM-4 VCSEL Diode Driver with an Equalizer in 90-nm CMOS Technology
Layered decoding for non-binary LDPC codes
Out-of-loop rate control for video codec hardware/software co-design
Modeling and verification of cache coherence protocols
A low-power CMOS neural amplifier with amplitude measurements for spike sorting
A Unified Hardware Architecture for Convolutions and Deconvolutions in CNN
Split-Gate Logic circuits for multi-threshold technologies
A Discrete-Time Equivalent System Approach to the Periodic Response of Nonlinear Autonomous Circuits
One-Wire Frequency-Division Multiplexing Multi-Channel Biopotential Active Electrode with Harmonic Cancellation
Simplifying Neural Networks via Look up Tables and Product of Sums Matrix Factorizations
Hardware and Energy Efficiency Evaluation of NIST Lightweight Cryptography Standardization Finalists
Sigma - Delta inspired control technique for the improvement of MEMS reliability
Device Non-Ideality Effects and Architecture-Aware Training in RRAM In-Memory Computing Modules
Power analysis of link level and end-to-end data protection in networks on chip
Performance of the pulse pair method with an optimal lag value for frequency estimation in fading channels
A 1.1µW 2.1µVRMS input noise chopper-stabilized amplifier for bio-medical applications
Dynamic delay variation behaviour of RNS multiply-add architectures
A Pipelined-SAR ADC with a Compensation-Free Two-Stage Amplifier
A Highly Scalable, Time-Based Capless Low-Dropout Regulator using Master-Slave Domino Control
A study of the robustness of the M-Max NLMS adaptive algorithm
MPQA: Mixed-Precision Quantization Accelerator for CNN Inference
New CMOS balanced output transconductor and application to GM-C biquad filter
Design and modeling of PLL-based clock and data recovery circuits with periodically embedded clock encoding for intra-panel interfaces
SC FIR Interpolation Filters using Parallel Cyclic Networks
Input common-mode feedback technique for very low voltage CMOS amplifiers
Novel real-time system design for floating-point sub-Nyquist multi-coset signal blind reconstruction
A 3.3 V tunable current-mode square-root domain biquad
An efficient 13.56 MHz active back-telemetry rectifier in standard CMOS technology
A low-ripple voltage tripler
Multirate approximately linear-phase IIR filter structures for arbitrary bandwidths
Simulation for the optimal placement of decoupling capacitors on printed circuit board
Co-designing Trusted Execution Environment and Model Encryption for Secure High-Performance DNN Inference on FPGAs
Improving classification of video shots using information-theoretic co-clustering
A Clock-Tuned Discrete-Time Negative Capacitor Implemented Using Analog Samplers
A fully analog memristor-based neural network with online gradient training
A 160nW, 56dB SFDR, 109dBOhm, Bidirectional 4uA Max. Input - Differential Output Amplifier with Nested Noise Reduction
Obfuscation of FSMs for Secure Outsourcing of Neural Network Inference onto FPGAs
Modified Pulse Train Control Based Parallel Connected Buck Converters
A Design of Input-Decimaiton Technique for Recursive DFT/IDFT Algorithm
Translation invariant combined denoising algorithm
Image restoration by inhomogeneous G-M field modeling and adaptive Kalman filtering
Stability analysis of a sigma delta modulator
An approach for improving the speed of content addressable memories
Improving Low-Dropout Regulator Frequency Stability by Exploiting the Equivalent Series Resistor and Featuring an Adaptive Biasing Strategy
Complex Oscillation Based Test of Analog Filters
Object tracking in video pictures based on image segmentation and pattern matching
Event-driven deep neural network hardware system for sensor fusion
The Misadjustment of the Cascaded LMS Prediction Filter
Modular neural networks for solving high complexity tasks
Evaluation of stride permutation networks
A low-power DC-7-GHz SOI CMOS distributed amplifier
A 9.62 mW LMV Cell for mm-Wave Applications
A 32 × 32 four layer reaction-diffusion CNN chip
Real Time Solution of Laplace equation using Analog VLSI Circuits
Design of networked visual monitoring systems
Fault location of single-phase transmission lines by Laguerre function
A method of evaluating the effects of signal quantization at arbitrary locations in recursive digital filters
Design considerations and experimental evaluation of a syllabic companding audio frequency filter
Multi-objective design strategy for high-level low power design of DSP systems
ToF Image Sensor with Pulse-Frequency-Modulation Pixel for In-Pixel Code Discrimination
Active Student Engagement in STEM Fields to Improve Retention and Graduation Rates
Efficient Power Macromodeling Technique for IP-Based Digital System
A Design of Current-mode Analog Circuits for Fuzzy Inference Hardware Systems
Insufficiently marked siphon of Petri nets - extension of token-free siphon
Low Power Hybrid Residual Amplifier and Comparator Design based on Complementary Parametric Amplifier
A fast self-convergent flash-memory programming scheme for MV and analog data storage
Increasing the SAT Attack Resiliency of In-Cone Logic Locking
A criterion-based image segmentation method with a genetic algorithm
Globally Wireless Locally Wired (GloWiLoW): A Clock Distribution Network for Many-Core Systems
A Dual-Mode CMOS Image Sensor Based on in-Pixel Frame Differencing
A new look-up table-based multiplier/squarer design for cryptosystems over GF(2 m )
Two new VHF tunable CMOS low-voltage linear transconductors and their application to HF GM-C filter design
A merged window comparator based relaxation oscillator with low temperature coefficient
A novel region merging based image segmentation approach for automatic object extraction
A Resource-Optimized VLSI Architecture for Patient-Specific Seizure Detection using Frontal-Lobe EEG
Synthesis and Pipelining of Ladder Wave Digital Filters in Digital Domain
2.4GHz ZigBee radio architecture with fast frequency offset cancellation loop
PyCO: A parallel genetic algorithm optimization tool for analog circuits
Probability distribution of the switching intervals in chaotic pulse streams-a comparative study
A low-power method adding continuous variable gain to amplifiers
Securing pressure measurements using SensorPUFs
Partial rerouting algorithm for reconfigurable VLSI arrays
A novel double sampled chopper stabilised integrator for switched capacitor Sigma-Delta modulators
A portable lab-on-chip platform for magnetic beads density measuring
An integrated method for implementing online fault detection in NoC-based MPSoCs
A digital calibration for a 16-bit, 400-MHz current-steering DAC
A new RSA encryption architecture and hardware implementation based on optimized Montgomery multiplication
Efficient metric sorting schemes for successive cancellation list decoding of polar codes
Fun examples for teaching linear and nonlinear circuits
LayoutCopilot: LLM-Empowered Analog Layout Design towards Enhanced Human-Machine Interaction
A novel overlapping coil structure for dual band telemetry system
Weighted Viterbi decoding for MIMO-OFDM systems with linear precoding
Configurable MCPW based inductor for mm-wave circuits and systems
High-Throughput Data Compressor Designs Using Content Addressable Memory
A 0.4V 4.8μW 16MHz CMOS crystal oscillator achieving 74-fold startup-time reduction using momentary detuning
An optimized CMOS pseudo-active-pixel-sensor structure for low-dark-current imager applications
A monolithic 1.25 Gbits/sec CMOS clock/data recovery circuit for fibre channel transceiver
On the two-dimensional orthogonal drawing of series-parallel graphs
Current-mode multi-path excess loop delay compensation for GHz sampling CT ΣΔ ADCs
User selectable feature support for an embedded processor
DSP implementation of a low-complexity algorithm for real-time automated vessel detection in images of the fundus of the human retina
A two-channel training algorithm for hidden Markov model to identify visual speech elements
Hard Thresholding based Stochastic Algorithm for Distributed Sparse Recovery
Leak Detection and Location Pinpointing in Water Pipeline Systems Using a Wireless Sensor Network
What Can a Remote Access Hardware Trojan do to a Network-on-Chip?
White Noise Spectra Obtained in a Phase-Locked Loop Operating Like a Josephson Junction
Video transport over ad-hoc networks using multiple paths
Two-stage Large Capacitive Load Amplifier with Embedded Capacitor-multiplier Compensation
Real time UWB radar imaging using single chip transceivers
A note on the square summability of 2-D first-order digital filter transfer functions
A Novel Terminal Aided Synchronization Scheme for Intelligent Transportation Systems with Vehicle-to-Anything (V2X) Communications
Noise Analysis Problems and Techniques for RF Electronic Circuits and Optical Fiber Communication Systems
An all-digital clock generator firm-core based on differential fine-tuned delay for reusable microprocessor cores
Fixed-length Golomb-Rice coding by quantization level estimation
A new hardware design and FPGA implementation for Internet routing towards IP over WDM and terabit routers
Public-Key Cryptography on the Top of a Needle
Mechanical and Electrical Energy Buffer-release Mechanisms for Motion-powered IoT Applications
A class of novel blind source extraction algorithms based on a linear predictor
A Low-Power Yet High-Speed Configurable Adder for Approximate Computing
Analysis of hysteresis cellular automata
A nano-scale 2×VDD I/O buffer with encoded PV compensation technique
Fast Voltage-Based MPPT Control for High Gain Switched Inductor DC-DC Boost Converters
Hierarchical fast mode decision algorithm for intra prediction in HEVC
Multi-Level Adaptive Fuzzy Filter for Mixed Noise Removal
On rigorous study of Poincare maps defined by piecewise linear systems [electronic circuit example]
Analysis of Incremental Exponential Stability for Switched Nonlinear Systems
A spiking silicon central pattern generator with floating gate synapses [robot control applications]
A 16-bit low-power microcontroller with monolithic MEMS-LC clocking
Impact of Dataset Characteristics on Optimal Model Selection: A Comparative Analysis of Simulated and Real-World Data
A Fixed-frequency hysteretic controlled buck DC-DC converter with improved load regulation
Ceramic Fiber Interconnects Beyond 1000°C Enabled by Automatic Gain Compensated Millimeter-Wave CMOS Transceivers
Efficient music representation with content adaptive dictionaries
A High Accuracy Constant-On-Time Buck Converter with Spur-Free On-Time Generator
PointNet-Based Jitter Decomposition on Point Cloud of Jitter Histogram
A 3 to 6 GHz Highly Linear I-Channel Receiver with over +3.0 dBm In-Band P1dB and 200 MHz Baseband Bandwidth Suitable for 5G Wireless and Cognitive Radio Applications
A 0.8V 6.4µW compact mixed-signal front-end for neural implants
A Non-conventional Sum-and-Max based Neural Network layer for Low Power Classification
A 2-tap 40-Gb/s 4-PAM transmitter with level selection based pre-emphasis
Design and evaluation of an approximate Wallace-Booth multiplier
Live Demonstration: Embedded a Low Area 32-bit AES for Image Encryption/Decryption Application
Single-triggered hardware Trojan identification based on gate-level circuit structural characteristics
Transcoding for progressive fine granularity scalable vide coding
On tunable switch-mode reactive networks: A gyrator-based resonator emulation
Improving Energy Efficiency of Convolutional Neural Networks on Multi-core Architectures through Run-time Reconfiguration
A 900 MHz Charge Recovery Comparator With 40 fJ per Conversion
A switched-current ratio-independent algorithmic D/A converter
3D IC design of a fully integrated four-phase buck converter
A low power ultra-wideband CMOS LNA for 3.1-10.6-GHz wireless receivers
A method for searching multiple local optimal solutions of nonlinear optimization problems
Data Acquisition for Ultramicroband Bovine Respitory Disease Electrochemical Immunosensors
Energy efficient pseudo-cache architecture through fine-grained reconfigurability
A stochastic model for correlated signal sources based on higher-order statistics
Chaos preservation through continuous chaotic pulse position modulation
A framework of scalable layered access control for multimedia
Time amplifiers based on phase accumulation
SNNIM: A 10T-SRAM based Spiking-Neural-Network-In-Memory architecture with capacitance computation
A 8.7mW 5-Gb/s clock and data recovery circuit with 0.18-µm CMOS
A Power Optimized Base-Band Circuitry for the Low-IF Receivers
Application of wavelet transform to steady-state approximation of power electronics waveforms
A new compact low-power high slew rate class AB CMOS buffer
Implementation of Binary Stochastic STDP Learning Using Chalcogenide-Based Memristive Devices
A cross-coupled substrate integrated waveguide filter for 28 GHz millimeter wave communications
Generalized shuffle-exchange digraphs: Hamiltonian properties
An Inductor-coupling Resonated CMOS Low Noise Amplifier for 3.1-10.6GHz Ultra-wideband System
A 4Gb/s half-rate DFE with switched-cap and IIR summation for data correction
Implementation of multi-standard video decoding algorithms on a coarse-grained reconfigurable multimedia processor
A Dickson Hybrid Boost Converter With On-Chip Cold-Start for Thermoelectric Energy Harvesting
A new fully integrated CMOS phase-locked loop with low jitter and fast lock time
Sub-channel equalizer design based on geometric interpolation for FBMC/OQAM systems
Real-time free viewpoint synthesis using three-camera disparity estimation hardware
Bandwidth enhancement of multi-stage amplifiers using active feedback
Difference Model Approach for the Transient Simulation of Transmission Lines
Fast transient response capacitor-free linear voltage regulator in 65nm CMOS
A 7μΑ 1.6ppm/ °C bandgap design realizable in CMOS process
A Pre-RTL Simulator for Neural Networks
A Dynamic-Adjusting Threshold-Voltage Scheme for FinFETs low power designs
A character size optimization technique for throughput enhancement of character projection lithography
Accuracy-preserving Layer Normalization Approximations for Efficient Transformer Hardware Accelerators
Biologically self-assembled memristive circuit elements
A 0.18-µm CMOS 1-Gb/s serial link transceiver by using PWM and PAM techniques
An efficient hybrid arbitrarily-shaped object coding technique
HDC8192: A General Purpose Mixed-Signal CMOS Architecture for Massively Parallel Hyperdimensional Computing
Mobile media communication, processing, and analysis: A review of recent advances
Automatic localization of human eyes in complex background
Video Scene Detection by Link-constrained Affinity-propagation
NIMBLE: A Neuromorphic Learning Scheme and Memristor Based Computing-in-Memory Engine for EMG Based Hand Gesture Recognition
Design of an integrated potentiostat circuit for CMOS bio sensor chips
Switched-Current Ladder Band-Pas Filters
Improvements on layout of garment patterns for efficient fabric consumption
Implementation of a Global Clocking Scheme for ULP Radio Networks
Reusing Leakage Current for Improved Energy Efficiency of Multi-Voltage Systems
Automatic video region-of-interest determination based on user attention model
An Efficient Frequency Domain Vision Pipeline From RAW Images to Backend Tasks
High-Throughput Design for a Multi-Size DCT-II Targeting the AV1 Encoder
Stability analysis and control of bifurcations of parallel connected DC/DC converters using the monodromy matrix
An ultralow-power CMOS transconductor design with wide input linear range for biomedical applications
CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs
A new contention resolution algorithm for the design of minimal logic depth multiplierless filters
Noise analysis of a current-mode read circuit for sensing magnetic tunnel junction resistance
A comprehensive optimization methodology for designing charge pump voltage multipliers
Using SDL a tool for system simulations
Sparse FIR filter design via partial L1 optimization
An Area-Efficient Word-Line Pitch-Aligned 8T SRAM Compatible Digital-to-Analog Converter
Performance analysis of adaptive filter structures based on subband decomposition
A 0.5 μm 2 2-T Thin-Oxide OTP Antifuse with Reliability Enhanced by Auto Shut-off Program Logic for Low-Power Applications
Accelerating convolutional neural network with FFT on tiny cores
Information exchanges in quantum arrays due to spatial diversity
Waveform Relaxation Synthesis of Distributed-Lumped Network Characteristic Models
A Self-Powered P-SSHI Active Rectifier With Energy-Efficient Adaptive Switch Control for Piezoelectric Energy Harvesting
Bifurcation behavior in a two-loop DC-DC quadratic boost converter
Bridging Fatty Liver Disease and Traditional Chinese Medicine: A Complex Network Approach
Physiological signal denoising with variational mode decomposition and weighted reconstruction after DWT thresholding
A Study of Delay-Dependent Stabilization for Discrete-Time Systems with Time Delays
A Systematic Methodology for Time-multiplexing Algorithms on a Reconfigurable System-on-Chip
Design of self-biased fully differential receiver and crosstalk cancellation for capacitive coupled vertical interconnects in 3DICs
Approximation of multiple constant multiplications using minimum look-up tables on FPGA
Is SystemC-AMS an appropriate "promoter" for the modeling and simulation of bio-compatible systems?
A Fast Transitioning Power Supply Modulator of Stepped Envelope Tracking for 5G/6G Millimeter-wave Applications in 65nm CMOS
Simulation of the multipath performance of FM-DCSK digital communications using chaos
The ultimate IoT application: A cyber-physical system for ambient assisted living
Linear time-varying filter with variable bandwidth
A standard target decoder model for MPEG-4 FlexMux streams
Jitter simulation and measurement of an all-digital clock generator with dynamic frequency counting loop
A multi-channel EEG system featuring single-wire data aggregation via FM-FDM techniques
Parametric estimation of nonlinear systems through sequences designed using DNA computation
TPDICE and Sim Based 4-Node-Upset Completely Hardened Latch Design for Highly Robust Computing in Harsh Radiation
An Energy Efficient RF Backscatter Modulator for IoT Applications
Using www.sigma-delta.de to rapidly obtain ELD compensated CT ΣΔ modulators
Network Analysis of Chaotic Dynamics in Fixed-Precision Digital Domain
Neuromorphic Energy Efficient Stress Detection System using Spiking Neural Network
Monolithic tunable capacitors for RF applications
A novel analog-to-residue conversion scheme based on clock overlapping technique
A structure of cascading multi-bit modulators without dynamic element matching or digital correction
A Fast and Accurate Automatic Matching Network Designed for Ultra Low Power Medical Applications
Full quiescent current enhancement technique for improving transient response on the output-capacitorless Low-Dropout regulator
A Low-Power High-PSRR CMOS Voltage Reference with Active-Feedback Frequency Compensation for IoT Applications
Fully On-Chip Charge Pump-based Boost Converter in 65-nm CMOS for Single Solar Cell Powered IC