yusuke1997/dblp-id-title huggingface dataset:
Compact modular expandable analog defuzzifiers using multiple input floating gate transistor transconductance multipliers
Takagi-Sugeno fuzzy model to approximate MOSFET capacitance for VRM applications
Rapid design space exploration for multi parametric optimization of VLSI designs
Aging Gracefully with Approximation
Reducing Indirect Programming Mismatch Due to Oxide-traps using Dual-channel Floating-gate Transistors
Optimal reconfiguration instant in ΣΔ Modulators
Domain distributed intelligent processing for information fuselets
Efficient and Robust Path Tracing Algorithm for DC Convergence Problem
Analog CMOS implementation of a neuromorphic oscillator with current-mode low-pass filters
Contrast Detection in Event-Streams from Dynamic Vision Sensors with Fixational Eye Movements
A 1 MPixel CCD image sensor with aluminum nanowire polarization filter
A Wide Range 2-to-2048 Division Ratio Frequency Divider Using 40-nm CMOS Process
Scalable interconnection networks for partial column array processor architectures
An automated design flow from linguistic models to piecewise polynomial digital circuits
Reducing Latency in a Converted Spiking Video Segmentation Network
Switched-capacitor Converter Configuration with Low EMI Emission Obtained by Interleaving and its Large-signal Modeling
Minimum redundancy MIMO radars
Co-optimized training of models with synaptic delays for digital neuromorphic accelerators
Analysis of power consumption in LC oscillators based on the inversion coefficient
Identification of electric circuits: problems and methods of solution accuracy enhancement
A 1 mW 10-bit 500KSPS SAR A/D converter
An optimization-based low-power voltage scaling technique using multiple supply voltages
Design of a 64-bit Low-energy High-performance Adder using Dynamic Feedthrough Logic
Broadband Matching of an RLC Load by Optimal Chebyshev Gain Functions
Sparsity-Aware Clamping Readout Scheme for High Parallelism and Low Power Nonvolatile Computing-in-Memory Based on Resistive Memory
International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France
Object-based on-line video summarization for internet of video things
A Digital-Serial VLSI Architecture for Delayed LMS Adaptive FIR Filttering
A novel 4T asymmetric single-ended SRAM cell in sub-32 nm double gate technology
Drift-Invariant Detection for Multilevel Phase-Change Memory
Interior Point Methods for Placement
Neural dynamics in reconfigurable silicon
Energy storage and Gramians of ladder filter realisations
Low-cost Technique for Measuring Clock Duty Cycle on FPGAs
MOS fully analog reinforcement neural network chip
A physical approach to mismatch modelling and parameter correlations
Low-Voltage Wilson Current Mirrors in CMOS
Complex Network of Chaotic Circuits with Memristors Switching Oscillation States
Face Aging on Realistic Photos by Generative Adversarial Networks
A 1.8 GHz-2.4 GHz SAW-Less Reconfigurable Receiver Frontend RFIC in 65nm CMOS RF SOI
Edge-based image synthesis model and its application to image coding
Architecture and Memory Requirements for Stand-Alone and Hierarchical MPEG2 HDTV-Decoders with Synchronous DRAMs
A novel adaptive algorithm applied to a class of redundant representation vector quantizers for waveform and model based coding
Heterogeneous neurons and plastic synapses in a reconfigurable cortical neural network IC
Real-time image compression based on wavelet vector quantization, algorithm and VLSI architecture
Modular graphing technique for small-signal low-frequency characterizations of PWM DC/DC regulators
Enabling Adaptive and Enhanced Acoustic Sensing using Nonlinear Dynamics
A 200-pA Under-Voltage Lockout Circuit for Ultra-Low Power Applications
Hurwitz-Schur stability test of interval bivariate polynomials
Architecture design and VLSI hardware implementation of image encryption/decryption system using re-configurable 2D Von Neumann cellular automata
A precise CMOS mismatch model for analog design from weak to strong inversion
A 12-bit 75 MS/s Asynchronous SAR ADC with Gain-Boosting Dynamic Comparator
An Alorithmic Analog-to-Digital Converter with low Ratio-and Gain-Sensitivities and 4N-Clock Conversion Cycle
A Dual-band Voltage-controlled Oscillator for SONET OC-768 Application
Efficient implementation for cosine-modulated filter banks using the frequency response masking approach
Applications of solid-state memristors in tunable filters
Pulse Duty Cycle Neural Processing Element Applied to Autotracking Model
An efficient method for parametric yield gradient estimation
Crossbar switch matrix for floating-gate programming over large current ranges
A novel fast, low-power and high-performance XOR-XNOR cell
Generalizations of Oja's Learning Rule to Non-Symmetric Matrices
REcache: Efficient Sustainable Energy Management Circuits and Policies for Computing Systems
Combined matched filter and polynomial-based interpolator for symbol synchronization in digital receivers
The performance of simplified CGM-BOPA in noisy environment [adaptive processing]
A heuristic algorithm SDS for scheduling with timed Petri nets
An All-Digital High-Resolution Programmable Time-Difference Amplifier Based on Time Latch
A high compliance CMOS current source for low voltage applications
Behavior of Phase-Inversion Waves on Coupled Van der Pol Oscillators as a Torus
Fast compressive sensing reconstruction algorithm on FPGA using Orthogonal Matching Pursuit
Image quality and lifetime co-optimization in wireless multi-camera systems
A Time Domain differential CMOS Temperature Sensor with Reduced Supply Sensitivity
A 200mA-Load 0.62fs-FOM Active-Capacitor-Assisted Dual-loop Output Capacitorless Low-Dropout Regulator in Standard 65nm CMOS
Live Demonstration: Vision-Based Real-Time Fall Detection System on Embedded System
Cascaded-parallel adaptive notch filter based on orthogonal decomposition
Minimizing process-induced skew using delay tuning
NIZCache: Energy-efficient Non-uniform Cache Architecture for Chip-multiprocessors Based on Invalid and Zero Lines
VLSI implementation of a low-complexity LLL lattice reduction algorithm for MIMO detection
A new map estimator for wavelet domain image denoising using vector-based hidden Markov model
Live Demonstration: Low-Power and High-Speed Deep FPGA Inference Engines for Weed Classification at the Edge
Reduced-dimension multiuser detection based on grouping users and reducing effective length of spread spectrum code in CDMA systems
Intelligent Camera Cloud Computing
Multi-Layer Perceptron including glial pulse and switching between learning and non-learning
A 10T SRAM Cell with Enhanced Read Sensing Margin and Weak NMOS Keeper for Large Signal Sensing to Improve VDDMIN
On Establishing the Bounds for Binary Scaled Coefficients of Fifth & Seventh Order Polyphase Half-Band Filters
Matrix pencil based realizable reduction for distributed interconnects
Dynamic memory-based physically unclonable function for the generation of unique identifiers and true random numbers
Power reduction through iterative gate sizing and voltage scaling
Improved harmonic analysis of RC-active phase shift oscillators
A 60 GHz Frequency Synthesizer in 0.13 μm SiGe BiCMOS for Biomedical Implant Applications
A lower bound on general minimal resource interval scheduling with arbitrary component selection
A 0.3mm 2 10-b 100MS/s pipelined ADC using Nauta structure op-amps in 180nm CMOS
Analytical figure of merit evaluation of RNMC networks for low-power three-stage OTAs
Improved Parallel-IDMA Architecture with Low-Complexity Elementary Signal Estimators
Frequency and Phase Tuning of Continuous-Time Integrated Filters using Common-Mode Signals
A 480 μW 2 GHz ultra low power dual-modulus prescaler in 0.25 μm standard CMOS
Service Restoration of Power Distribution Systems Incorporating Load Curtailment
Revisit sequential logic obfuscation: Attacks and defenses
An Automatic PCB Imposition Method based on Reinforcement Learning
A low-voltage low sensitivity sinusoidal VCO for DPLL realizations
Reducing electrical power dissipation in computational imaging systems through special-purpose optics
High-dynamic-range decibel-linear IF variable-gain amplifier with temperature compensation for WCDMA applications
Ultra-low bandwidth video streaming using a neuromorphic, scene-driven image sensor
Design of Miniaturized On-Chip Bandpass Filters using Inverting-Coupled Structure for Millimter-Wave Applications
A routability and performance driven technology mapping algorithm for LUT based FPGA designs
Optimization of backside micromachined CMOS inductors for RF applications
On-line machine learning accelerator on digital RRAM-crossbar
1.8 V low voltage pseudo-differential input operational amplifier
A Verification Algorithm for Logic Circuits with Internal Variables
A 0.5V Programmable Voltage Reference with Integrated Differential-Pair Trimming achieving 28.1ppm/°C Temperature Coefficient
Exact analysis of second order bandpass delta-sigma modulator with sinusoidal inputs
Equivalent Impedance Analysis and Compensation of Full-Wave Bridge Rectifier under High-Frequency Operation with Extended Impedance Method
A scalable MPEG-4 video codec architecture for IMT-2000 multimedia applications
Design of Analogue Synapse Circuits using Non-Volatile a-Si:H Memory Devices
Introducing an Electrochemical Impedance Spectroscopy Methodology based on Volterra Filters
High-linearity low-voltage self-cascode class AB CMOS current output stage
A Unified Algorithm for Estimation and Scheduling in Data Path Synthesis
A low-power 64-point FFT/IFFT design for IEEE 802.11a WLAN application
A General Purpose, Broadband Transimpedance Amplifier
Ising machine based on charge re-distribution
Performance analysis of differential chaotic shift keying communications in MIMO systems
A chaotic network based on intermittently coupled capacitors
Experimental and Theoretical Analysis of Stateful Logic in Passive and Active Crossbar Arrays for Computation-in-Memory
Video Service Function Chaining with a Real-time Packet Reordering Circuit
New Algorithms in Piecewise Linear Resistive Simulation
The Wavelet Scalar Quantization Compression Standard for Digital Fingerprint Images
A CMOS time amplifier for Femto-second resolution timing measurement
A generalised conductance-based silicon neuron for large-scale spiking neural networks
A monolithic isolation amplifier in silicon-on-insulator CMOS
Side-Channel Trojan Insertion - a Practical Foundry-Side Attack via ECO
Pleasures, Perils and Pitfalls of Symbolic Analysis
High Linearity Front-End Circuit for RF Sampling ADCs with Nonlinear Junction Capacitor Cancellation
Compact, low-power pulse generator sphenoid implant for minimally invasive electrical stimulation of deep brain regions
A low-jitter video clock recovery circuit
2 GHz 8-bit CMOS ROM-less direct digital frequency synthesizer
An integrated patch-clamp amplifier in silicon-on-sapphire CMOS
Modeling and minimization of power consumption in charge pump circuits
An Inductorless 6-GHz Variable Gain Differential Transimpedance Amplifier in 0.18-μm SiGe BiCMOS
Movement of small amplitude parts in a coupled chaotic system
An efficient BIST method for testing of embedded SRAMs
Retinal approaching object detector model implementation and validation
Modified Hebbian learning rule for single layer learning
A Mixed-Signal Spatio-Temporal Signal Classifier for On-Sensor Spike Sorting
Output impedance requirements for DACs
A Half-Bridge GaN Driver with Real-Time Digital Calibration for VGS Ringing Regulation and Slew-Rate Optimization in 180nm BCD
A low-power noise scalable instrumentation amplifier for fetal monitoring applications
An Experimental Study of Voltage, Current, and Charge Controlled Stimulation Front-End Circuitry
ADC resolution enhancement by an analog decorrelator
ESDInspector: a new layout-level ESD protection circuitry design verification tool using a smart-parametric checking mechanism
A current-steering DAC-based CMOS ultra-wideband transmitter with bi-phase modulation
Employment of Graphene Nanomaterial in Optimizing Thermal Responses in IGBT Devices
On nD polynomial matrix factorizations
Low Quantization Error Readout Circuit with Fully Charge-Domain Calculation for Computation-in-Memory Deep Neural Network
A SPICE model for single electronics
Advances in superresolution using L-curve
A novel channel estimation and tracking method for wireless OFDM systems based on pilots and Kalman filtering
Low-Power High-Speed Continuous-Time Sigma-Delta Modulators
Capacitor bank design for wide tuning range LC VCOs: 850MHz-7.1GHz (157%)
High-Speed Serial AER on FPGA
A Cross-Coupled Pair Regeneration Based dB-Linear Programable Gain Amplifier with THD Enhancement
A 50-MHz Bandwidth and 50.6-dBm OOB-IIP3 Transimpedance Amplifier Based on a Three-Stage Pseudo-Differential OTA
Polyphase IIR filter banks for subband adaptive echo cancellation applications
Wide swing signal amplification by SC voltage doubling
Pinning control of scale-free complex networks
Learning Based Hybrid No-Reference Video Quality Assessment of Compressed Videos
Improved k-best sphere decoding algorithms for MIMO systems
A 2-Tap Macro-Pixel-Based Indirect ToF CMOS Image Sensor for Multi-Frequency Demodulation
An N th order central symmetrical layout pattern for nonlinear gradients cancellation
Low-IF complex filter with transconductance networks
High efficiency cross-coupled doubler with no reversion loss
A CMOS current-controlled oscillator and its applications
Multi-rate segmented time-interleaved current steering DAC with unity-elements sharing
High-performance BiCMOS output buffer design strategies
Error-Resilient Reconfigurable Boosting Extreme Learning Machine for ECG Telemonitoring Systems
Simple and accurate single event charge collection macro modeling for circuit simulation
Closing the loop between analog design and test
An integrated reconfigurable switched-capacitor DC-DC converter with a dual-loop adaptive gain-pulse control
Optimising bandwidth over deep sub-micron interconnect
Prototype design and implementation of a load-balanced Birkhoff-von Neumann switch
Statistical dynamics of associative memory for higher order neural networks
High speed array of oscillator-based truly binary random number generators
Dependence of LC VCO oscillation frequency on bias current
Sampled-data poles and zeros of buck and boost converters
Execution time comparison of lifting-based 2D wavelet transforms implementations on a VLIW DSP
A Millimeter-Wave Input-Reflectionless Amplifier in 45-nm SOI CMOS Technology
Design of an ultra-low-power current source
Randomized carrier PWM with exponential frequency mapping
New graph transformation schemes in graph-based memory allocation method for an indirect addressing DSP
New materials for memristive switching
Visual Question Answering using Explicit Visual Attention
Linear phase IIR filter bank design by LMI based H infinity optimization
Performance analysis and architecture evaluation of MPEG-4 video codec system
An Active Resonant Circuit with the Dynamic Resonant Period Control Technique for Fast Zero Voltage Switching in GaN-Based Active Clamp Flyback Converters
A 1-GHz low-power transposition memory using new pulse-clocked D flip-flops
Live demonstration: Retinal ganglion cell software and FPGA implementation for object detection and tracking
A detection method of nasalised vowels based on an acoustic parameter derived from phase spectrum
Multi-valued logic function implementation with novel current-mode logic gates
A Fully Integrated PSD-LPF for Bioimpedance Spectroscopy Applications
DPE-CIM: Compute-In-Memory Accelerator using Dynamic Posit Encoding and Speculative Alignment
Adjustable hysteresis CMOS Schmitt triggers
A new adaptive Kalman filter-based subspace tracking algorithm and its application to DOA estimation
SAW-less GNSS front-end amplifier with 80.4-dB GSM blocker suppression using CMOS directional coupler notch filter
A hybrid encoding scheme for efficient single-cycle range matching in content addressable memory
A novel software architecture for computer-aided analysis of circuits with uncertain parameters
Reconstruction from incompatible nonuniform band filter bank
MDE: Modality Discrimination Enhancement for Multi-modal Recommendation
A single OpAmp 2 nd -Order ΔΣ ADC with a double integrating quantizer
A Reconfigurable CMOS-Memristor Active Inductor
A Speed Planner Approach Based On Bézier Curves Using Vehicle Dynamic Constrains and Passengers Comfort
Feedforward control with reference voltage modulation
Design of 2-dimensional perfect reconstruction filter banks for arbitrary sampling lattices
A high throughput VLSI design with hybrid memory architecture for H.264/AVC CABAC decoder
Power Dissipation in Deep Submicron CMOS Digital Circuits
Hierarchical temporal dependent rate-distortion optimization for low-delay coding
Pipeline tracking and event classification for an automatic inspection vision system
A 0.45V CMOS relaxation oscillator with ±2.5% frequency stability from -55°C to 125°C
A Novel Closed Contour Extractor, Principle and Algorithm
Holistic approaches to memory solutions for the Autonomous Driving Era
A low power CMOS sigma-delta readout circuit for heterogeneously integrated chemoresistive micro-/nano- sensor arrays
A gm-C Ramp Generator for Voltage Feedforward Control of DC-DC Switching Regulators
Dynamic textures indexing and retrieval based on intrinsic properties
High performance and low power completion detection circuit
Effects of LO Phase and Amplitude Imbalances and Phase Noise on M-QAM Transceiver Performance
Human emotion recognition using a deformable 3D facial expression model
Advanced safety test solution for automotive SoC based on In-System-Test architecture
Finding all solutions of piecewise-linear resistive circuits using the dual simplex method
Analog-to-Digital Conversion using Self-Averaging Analog Hadamard Networks
Stepsize control in NLMS acoustic echo cancellation using a neural network
Peak-to-average power ratio reduction of an OFDM signal using data permutation with embedded side information
A tunable transmission line phase shifter (TTPS)
An image fusion based visible watermarking algorithm
Simulation of Temperature Profiles due to Joule Heating in Microfluidic Systems
A fast-serial finite field multiplier without increasing the number of registers
Peer group filtering and perceptual color image quantization
A highly linear OTA-free VCO-based 1-1 MASH ΔΣ ADC
VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter
Stochastic noise analysis of neural interface front end
A high-Q and wide-dynamic-range CMOS IF bandpass filter for monolithic receivers
A High-Density RRAM-Based Ising Machine with Analog In-Memory Operation for Solving Combinatorial Optimization Problems
A low power pipelined analog-to-digital converter using series sampling capacitors
A robust pitch estimation approach for colored noise-corrupted speech
An improved link price algorithm for Internet flow control
Exact data retrieval of associative memory based on cross talk formulation
Microgrid dynamics characterization using the automated state model generation algorithm
A 16 × 16 pixel silicon on sapphire CMOS photosensor array with a digital interface for adaptive wavefront correction
Noise-tolerant dynamic circuit design
A 64-84 GHz CMOS LNA with Excellent Gain Flatness for Wideband mmW Applications
A Hardware Architecture for Efficient Adaptive Threshold-Based Sampling using Weyl's Discrepancy
A novel neural network-based linearization and auto-compensation technique for sensors
A current-mode flash ADC for low-power continuous-time sigma delta modulators
A high-speed low-latency digit-serial hybrid adder
An area-efficient truncated inversionless Berlekamp-Massey architecture for Reed-Solomon decoders
Direct blind deconvolution of multiuser-multichannel systems
Accelerating 3D Convolutional Neural Networks Using 3D Fast Fourier Transform
Prosthetic Hand with Biomimetic Tactile Sensing and Force Feedback
On pilot pattern design for PSAM-OFDM system
A Multi-Feedback Design for LC Bandpass Delta-Sigma Modulators
Memristor-Based Pass Gate for FPGA Programmable Routing Switch
An analogue micropower log-domain silicon circuit for the Hodgkin and Huxley nerve axon
Output transition time modeling of CMOS structures
A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic Endoscopy
A Multi-Range Duty Cycle Correction Circuit for Multi-Standard Transceivers in 7 nm FinFET
Fully digital AER convolution chip for vision processing
An analogue implementation of the beta cell insulin release model
A 1.25mW 0.8-28.2GHz charge pump PLL with 0.82ps RMS jitter in all-digital 40nm CMOS
A 5-V 555-μW 0.8-μm CMOS MEMS capacitive sensor interface using correlated level shifting
A low-power subsample-based image compression algorithm for capsule endoscopy
Search of Optimal Solutions in Multi-Level Neural Networks
A 1-V, 10-bit rail-to-rail successive approximation analog-to-digital converter in standard 0.18 um CMOS technology
A self-sustaining integrated CMOS regulator for solar and UHF RFID energy harvesting systems
Accurate Modeling of Drain Current Derivatives of MESFET/HEMT Devices for Intermodulation Analysis
Automatic Determination of Scene Changes in MPEG Compressed Video
An Area-Efficient Rectifier with Threshold Voltage Cancellation for Intra-Body Power Transfer
A Memristor Circuit Implementing Tunable Stochastic Distributions for Bayesian Inference and Monte Carlo Sampling
Back propagation learning of neural networks with chaotically-selected affordable neurons
Some properties of sequences generated by Chebyshev polynomials modulo 2 k
Discrete-time modeling and simulation of vehicle audio systems
Robust and high-quality time-domain audio watermarking subject to psychoacoustic masking
A 1-V UHF low noise amplifier for ultralow-power applications
A low power VLSI architecture of SOVA-based turbo-code decoder using scarce state transition scheme
A Power Grids Electromigration Analysis with Via Array Using Current-Tracing Model
Fast learning algorithms for new L2 SVM based on active set iteration method
Towards a legged chip
Plasticity-Enhanced Domain-Wall MTJ Neural Networks for Energy-Efficient Online Learning
Multi-chains encoding scheme in low-cost ATE
Non-Linearity Cancellation of Gm-C Based DSM
The low stress voltage balance charging circuit for series connected batteries based on buck-boost topology
Reservoir optimization in recurrent neural networks using kronecker kernels
Measurement and Analysis of System Parameter Effects on Noise in EEG Systems
High-speed bipolar MUX modeling and design
An improved frequency compensation techinique for low power, low voltage CMOS amplifiers [techinique read technique]
Optimum wire tapering for minimum power dissipation in RLC interconnects
HEBGS: Homomorphic Encryption-based Background Subtraction Using a Fast-Converging Numerical Method
FPGA based Deterministic Latency Image Acquisition and Processing System for Automated Driving Systems
On the Design of High Switching Frequency DC-DC Buck Converter Power Stages for Automotive Post-Regulated Applications
CMOS Gyrator-C Active Transformers
Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration
Design of sharp FIR filters with prescribed group delay
Quali-Informatics in the Society with Yotta Scale Data
Small-signal duty cycle to inductor current transfer function for boost PWM DC-DC converter in continuous conduction mode
Energy harvesting using symmetrical electrostatic generators
A multi-frequency NDT system for imaging and detection of cracks
A 1 V 65 nm CMOS Reconfigurable Time Interleaved High Pass SigmaDelta ADC
Spurious tone free digital delta-sigma modulator design for DC inputs
Reduction of Loop Delay for Digital Symbol Timing Recovery Systems using Asynchronous Equalization
A family of arbitrary lenght modulated orthonormal wavelets
A temperature and process compensation circuit for resistive-based in-memory computing arrays
Fast-switching adaptive bandwidth frequency synthesizer using a loop filter with switched zero-resistor array
Live Demonstration: Bio-inspired implementation of a sparse-learning spike-based hippocampus memory model
Improving the Accuracy of Analog-Based In-Memory Computing Accelerators Post-Training