yusuke1997/dblp-id-title huggingface dataset:
Probabilistic accuracy bounds for fault-tolerant computations that discard tasks
Performance impact and interplay of SSD parallelism through advanced commands, allocation strategy and data granularity
Compiler support for efficient processing of XML datasets
A Nested Partitioning Algorithm for Adaptive Meshes on Heterogeneous Clusters
Compiler Cache Optimizations for Banded Matrix Problems
Way-combining directory: an adaptive and scalable low-cost coherence directory
Author retrospective for characterizing processor architectures for programmable network interfaces
Optimal bucket algorithms for large MPI collectives on torus interconnects
ghZCCL: Advancing GPU-aware Collective Communications with Homomorphic Compression
StructILU: Dependency-Preserving Incomplete LU with Hierarchical Parallelism for Structured Grid PDEs on GPUs
Noise Aware Scheduling in Data Centers
Bounding on the Gain of Optimizing Data Layout in Vector Processors
mOS: an architecture for extreme-scale operating systems
μSteal: a theory-backed framework for preemptive work and resource stealing in mixed-criticality microservices
Dense dynamic blocks: optimizing SpMM for processors with vector and matrix units using machine learning techniques
Adaptive multi-level cache allocation in distributed storage architectures
PLANAR: a programmable accelerator for near-memory data rearrangement
PERKS: a Locality-Optimized Execution Model for Iterative Memory-bound GPU Applications
Fault-tolerant wormhole routing in tori
RadiK: Scalable and Optimized GPU-Parallel Radix Top-K Selection
A Methodology for Specifying Data Distribution Using Only Standard Object-Oriented Features
Automatic data mapping for distributed-memory parallel computers
Improving the computational intensity of unstructured mesh applications
Portable and efficient factorization algorithms on the IBM 3090/VF
Scaling physics and material science applications on a massively parallel Blue Gene/L system
zFENCE: Data-less Coherence for Efficient Fences
Representation-transparent matrix algorithms with scalable performance
Hierarchical algorithms and architectures for parallel scientific computing
Proceedings of the 38th ACM International Conference on Supercomputing, ICS 2024, Kyoto, Japan, June 4-7, 2024
Improving Data Cache Performance by Pre-Executing Instructions Under a Cache Miss
The composite binary cube - a family of interconnection networks for multiprocessors
Author retrospective for adaptive reduction parallelization techniques
Analysis-driven Engineering of Comparison-based Sorting Algorithms on GPUs
Cloak: tolerating non-volatile cache read latency
Load balancing n-body simulations with highly non-uniform density
Array expansion
CprFS: a user-level file system to support consistent file states for checkpoint and restart
SecureME: a hardware-software approach to full system security
Scheduling reductions
Fast scan algorithms on graphics processors
Parallel Transposition of Sparse Data Structures
Designing multi-socket systems using silicon photonics
Memory Organization in Multi-Channel Optical Networks: NUMA and COMA Revisited
Scaling large-data computations on multi-GPU accelerators
PARADISE: An Advanced Featured Parallel File System
The CODE 2.0 graphical parallel programming language
The Portable Parallel Implementation of Two Novel Mathematical Biology Algorithms in ZPL
Synchronization using counting semaphores
Optical link and processor clustering in the Delft parallel processor
Quantifying performance benefits of overlap using MPI-2 in a seismic modeling application
ICS '22: 2022 International Conference on Supercomputing, Virtual Event, June 28 - 30, 2022
Dependence Driven Execution for Multiprogrammed Multiprocessor
The "Bussing Freeway" a technological breakthrough
Coarse-grained Speculative Execution in Shared-memory Multiprocessors
Challenges on the road to exascale computing
Sandslash: a two-level framework for efficient graph pattern mining
Use Only What You Need: Judicious Parallelism For File Transfers in High Performance Networks
ICS '21: 2021 International Conference on Supercomputing, Virtual Event, USA, June 14-17, 2021
Supercomputer performance evaluation and the Perfect Benchmarks
Disk layout optimization for reducing energy consumption
A unified framework for nonlinear dependence testing and symbolic analysis
Automatically adapting programs for mixed-precision floating-point computation
Efficient remote block-level I/O over an RDMA-capable NIC
The Mapping of Applications to Multiple Bus and Banyan Interconnected Multiprocessor Systems: A Case Study
Fault tolerant preconditioned conjugate gradient for sparse linear system solution
Experiments with an ocean circulation model on CEDAR
Data forwarding through in-memory precomputation threads
Back-end assignment schemes for clustered multithreaded processors
Tuned and wildly asynchronous stencil kernels for hybrid CPU/GPU systems
EpiFast: a fast algorithm for large scale realistic epidemic simulations on distributed memory systems
Sparse matrix-vector multiply on the HICAMP architecture
Upper Time Bounds for Executing PRAM-Programs on the LogP-Machine
DREAM: Device-Driven Efficient Access to Virtual Memory
Benchmarking a vector-processor prototype based on multithreaded streaming/FIFO vector (MSFV) architecture
PIM-CARE: A Compiler-Assisted Dynamic Resource Allocation Framework for Real-world DRAM PIM
A Scalar Architecture for Pseudo Vector Processing Based on Slide-Windowed Registers
Proteus: Achieving High-Performance Processing-Using-DRAM with Dynamic Bit-Precision, Adaptive Data Representation, and Flexible Arithmetic
A data-centric optimization framework for machine learning
Intererence analysis tools for parallelizing programs with recursive data structures
Hardware/software cooperative caching for hybrid DRAM/NVM memory architectures
On the potential of tolerant region reuse for multimedia applications
Performance characteristics of openMP constructs, and application benchmarks on a large symmetric multiprocessor
Vector Optimization vs. Vectorization
Accurate Computation of the Logarithm of Modified Bessel Functions on GPUs
One stone two birds: synchronization relaxation and redundancy removal in GPU-CPU translation
Pandore: a system to manage data distribution
A compiler method for the parallel execution of irregular reductions in scalable shared memory multiprocessors
SemCache++: Semantics-Aware Caching for Efficient Multi-GPU Offloading
Building Fuel Powered Supercomputing Data Center at Low Cost
Automatic thread distribution for nested parallelism in OpenMP
A query language for understanding component interactions in production systems
Application scaling under shared virtual memory on a cluster of SMPs
Automatic analysis of speedup of MPI applications
TensorSVM: accelerating kernel machines with tensor engine
Phasers: a unified deadlock-free construct for collective and point-to-point synchronization
Compilation techniques for block-cyclic distributions
PIE: Enabling Fast and Scalable Incremental Evolving Graph Analytics on Persistent Memory
The Broker Queue: A Fast, Linearizable FIFO Queue for Fine-Granular Work Distribution on the GPU
A scalable, object-oriented finite element solver for partial differential equations on multicomputers
Enhanced UGAL Routing Schemes for Dragonfly Networks
Solving general sparse linear systems using conjugate gradient-type methods
Active disk meets flash: a case for intelligent SSDs
DIMPLES: Distributed Influence Maximization for Pandemic pLanning on Exascale Systems
Overview of a high-performance programmable pipeline structure
An efficient message-passing scheduler based on guided self scheduling
Design of a large-scale storage-class RRAM system
Data mining on the cell broadband engine
Multiple-transform pipelines for image coding
The Importance of Synchronization Structure in Parallel Program Optimization
Timely offloading of result-data in HPC centers
Bandwidth-optimal all-to-all exchanges in fat tree networks
Computer aided hand tuning (CAHT): "applying case-based reasoning to performance tuning"
Optimizing computation-communication overlap in asynchronous task-based programs
Automatic fence insertion for shared memory multiprocessing
CSB-RNN: a faster-than-realtime RNN acceleration framework with compressed structured blocks
Parallel automated wire-routing with a number of competing processors
POSC - a partitioning and optimizing SISAL compiler
An evaluation of directory protocols for medium-scale shared-memory multiprocessors
Measuring the Effectiveness of Automatic Parallelization in SUIF
PowerHerd: dynamic satisfaction of peak power constraints in interconnection networks
Exploiting Private Local Memories to Reduce the Opportunity Cost of Accelerator Integration
Combining static and dynamic scheduling on distributed-memory multiprocessors
A MATLAB to Fortran 90 Translator and Its Effectiveness
SYprox: Combining Host and Device Perforation with Mixed Precision Approximation on Heterogeneous Architectures
Executing irregular scientific applications on stream architectures
CVP: an energy-efficient indirect branch prediction with compiler-guided value pattern
MSC / NASTRAN on AMDAHL Vector Processors; Adaptation and Performance
Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks
cuMBIR: An Efficient Framework for Low-dose X-ray CT Image Reconstruction on GPUs
Hardware-driven Prefetching for Pointer Data References
Efficient SIMD and MIMD parallelization of hash-based aggregation by conflict mitigation
The elephant and the mice: the role of non-strict fine-grain synchronization for modern many-core architectures
Synthesizing transformations for locality enhancement of imperfectly-nested loop nests
A Supercomputing Performance Evaluation Plan
A symmetric transformation for 3-body potential molecular dynamics using force-decomposition in a heterogeneous distributed environment
Frequent subtree mining on the automata processor: challenges and opportunities
Exascaling Your Library: Will Your Implementation Meet Your Expectations?
Iteration Space Slicing and Its Application to Communication Optimization
Power-aware dynamic placement of HPC applications
Conservative row activation to improve memory power efficiency
Performance evaluation and prediction for parallel algorithms on the BBN GP1000
Future high performance computers
On storage schemes for parallel array access
Empirical Study of Latency Hiding on a Fine-Grain Parallel Processor
A Risc-Type Structural Design of the Hermes Multiprocessor Kernel
Supercomputer workload decomposition and analysis
Dynamic remote memory acquisition for parallel data mining on ATM-connected PC cluster
A scheme to extract run-time parallelism form sequential loops
The pool of subsectors cache design
Optimizing Collective I/O Performance on Parallel Computers: A Multisystem Study
Proactive fault tolerance for HPC with Xen virtualization
A Performance Study of Out-of-order Vector Architectures and Short Registers
SFU-Driven Transparent Approximation Acceleration on GPUs
A unified semantic approach for the vectorization and parallelization of generalized reductions
Efficient high performance collective communication for the cell blade
HALO: A Hierarchical Memory Access Locality Modeling Technique For Memory System Explorations
Sequential description and parallel execution language DFCII dataflow supercomputers
Exploiting Vector Code Semantics for Efficient Data Cache Prefetching
Multicoloring with lots of colors
Author's retrospective for array privatization for parallel execution of loops
Soft Error Resilience at Near-Zero Cost
Eliminating Redundant Barrier Synchronizations in Rule-Based Programs
QoSMT: supporting precise performance control for simultaneous multithreading architecture
A high performance multi-perspective vision studio
Tile Size and Loop Order Selection using Machine Learning for Multi-/Many-Core Architectures
Compiler and runtime support for irregularly coupled regular meshes
gZCCL: Compression-Accelerated Collective Communication Framework for GPU Clusters
Optimul: An optional interconnect for multiprocessor systems
Creating artificial global history to improve branch prediction accuracy
Tile size selection of affine programs for GPGPUs using polyhedral cross-compilation
The doconsider loop
Using GPUs to compute large out-of-card FFTs
Streaming Task Parallelism
Author retrospective for PYRROS: static task scheduling and code generation for message passing multiprocessors
Interactive program improvement via EAVE: an expert adviser for vectorization
How to unleash array optimizations on code using recursive data structures
An analysis model on nonblocking multirate broadcast networks
Synchronization Hardware for Networks of Workstations: Performance vs. Cost
Performance portable back-projection algorithms on CPUs: agnostic data locality and vectorization optimizations
Expressing graph algorithms using generalized active messages
Author retrospective AEGIS: architecture for tamper-evident and tamper-resistant processing
PPFS: a High Performance Portable Parallel File System
Selective predicate prediction for out-of-order processors
A network of cellular automata for a landslide simulation
Runtime-Guided Mitigation of Manufacturing Variability in Power-Constrained Multi-Socket NUMA Nodes
Shared Virtual Memory: Its Design and Performance Implications for Diverse Applications
Compiler and Run-Time Support for Semi-Structured Applications
Affinity-based cluster assignment for unrolled loops
CB-SpMV: A Data Aggregating and Balance Algorithm for for Cache-Friendly Block-Based SpMV on GPUs
Optimization of array accesses by collective loop transformations
A stencil compiler for short-vector SIMD architectures
A graph based approach for MPI deadlock detection
Optimizing locality for ODE solvers
Resource Widening Versus Replication: Limits and Performance-cost Trade-off
RICH: implementing reductions in the cache hierarchy
Parallel Compiled Event Driven VHDL Simulation
SRC: information retrieval as a persistent parallel service on supercomputer infrastructure
MOB forms: a class of multilevel block algorithms for dense linear algebra operations
Dynamic and static load scheduling performance on a NUMA shared memory multiprocessor
Automated Analysis of Time Series Data to Understand Parallel Program Behaviors
Another approach to backfilled jobs: applying virtual malleability to expired windows
Lightweight reference affinity analysis
The impact of data dependence analysis on compilation and program parallelization
SparseLNR: accelerating sparse tensor computations using loop nest restructuring
Performance analysis of the CM-2, a massively parallel SIMD computer
Parallel sparse LU factorization on second-class message passing platforms
pSNOW: A Tool to Evaluate Architectural Issues for NOW Environments
Locality of sampling and diversity in parallel system workloads
Reducing the complexity of the issue logic
Persistent Memory Objects on the Cheap
SARVAVID: A Domain Specific Language for Developing Scalable Computational Genomics Applications
The connection machines CM-1 and CM-2: solving nonlinear network problems
A performance-conserving approach for reducing peak power consumption in server systems
Predicate prediction for efficient out-of-order execution
High performance support of parallel virtual file system (PVFS2) over Quadrics
A transformational approach to compiling Sisal for distributed memory architectures
ClickTrain: efficient and accurate end-to-end deep learning training via fine-grained architecture-preserving pruning
Twisted data layout
Vector Architectures: Past, Present and Future
A synthesis of memory mechanisms for distributed architectures
Three-dimensional simulation of semiconductor devices on supercomputers
Scalable analysis of multicore data reuse and sharing
Optimal Tile Size Adjustment in Compiling General DOACROSS Loop Nests
TurboTiling: Leveraging Prefetching to Boost Performance of Tiled Codes
Making nested parallel transactions practical using lightweight hardware support
GAPS: GPU-acceleration of PDE solvers for wave simulation
Hardware spatial forwarding for widely shared data
A high-speed message-driven communication architecture
On optimizing distributed non-negative Tucker decomposition
Revisiting Temporal Blocking Stencil Optimizations
Preserving time in large-scale communication traces
An optimal upper bound on the minimal completion time in distributed supercomputing
System noise, OS clock ticks, and fine-grained parallel applications
Current trends in computer architectures: multi-cores, many-cores and special-cores
Parallelization and performance of 3D ultrasound imaging beamforming algorithms on modern clusters
On exact data dependence analysis
Towards 100 gbit/s ethernet: multicore-based parallel communication protocol design
P-Code: a new RAID-6 code with optimal properties
A comparison of parallel processing on Cray X-MP AND IBM 3090 VF multiprocessors
Ymir: A Scheduler for Foundation Model Fine-tuning Workloads in Datacenters
Design space exploration of caches using compressed traces
End-to-end performance modeling of distributed GPU applications
A global resource-constrained parallelization technique
Array privatization for parallel execution of loops
Parallel Implementation of the Lanczos Method for Sparse Matrices: Analysis of Data Distributions
A parallel algorithm for sparse symbolic LU factorization without pivoting on out-of-core matrices
GRAP: Group-level Resource Allocation Policy for Reconfigurable Dragonfly Network in HPC
Implementing Wilson-Dirac operator on the cell broadband engine
Exploiting uniform vector instructions for GPGPU performance, energy efficiency, and opportunistic reliability enhancement
Increasing cache capacity through word filtering
Dynamic task set partitioning based on balancing memory requirements to reduce power consumption
Schur complement preconditioned conjugate gradient methods for spline collocation equations
DyVer: Dynamic Version Handling for Array Databases
Amon: A Parallel Slice Algorithm for Wire Routing
Experiences with data dependence abstractions
Tolerating data access latency with register preloading
Parallelisation of the SDEM distinct element stress analysis code on the KSR-1
An adaptive cross-architecture combination method for graph traversal
Accelerating DNNs inference with predictive layer fusion
IA-SpGEMM: an input-aware auto-tuning framework for parallel sparse matrix-matrix multiplication
Graptor: efficient pull and push style vectorized graph processing
VLSI Arrays with Reconfigurable Buses
Manchester data-flow: a progress report
MDR: performance model driven runtime for heterogeneous parallel platforms
Rate-based QoS techniques for cache/memory in CMP platforms
Using platform-independent data locality analysis to predict cache performance on abstract hardware platforms
COMPASS: A Framework for Automated Performance Modeling and Prediction
Dynamic scheduling for efficient hierarchical sparse matrix operations on the GPU
Parallel I/O for scientific applications on heterogeneous clusters: a resource-utilization approach
Compile-time detection of race conditions in a parallel program
Analysis of dynamic power management on multi-core processors
Adagio: making DVS practical for complex HPC applications
Exploiting Heterogeneous Parallelism in the Presence of Communication Delays
Dependence of multi-dimensional array references
Dynamic Load Balancing for Compressible Multiphase Turbulence
QuakeTM: parallelizing a complex sequential application using transactional memory
Evaluation of compiler optimizations for Fortran D on MIMD distributed memory machines
A performance analysis framework for exploiting GPU microarchitectural capability
Predictive coordination of multiple on-chip resources for chip multiprocessors
Cooperative checkpointing: a robust approach to large-scale systems reliability
Replichard: Towards Tradeoff between Consistency and Performance for Metadata
MIMD-Parallelization for SUPENUM
CSR5: An Efficient Storage Format for Cross-Platform Sparse Matrix-Vector Multiplication
Binary translation and architecture convergence issues for IBM system/390
Performance analysis of distributed applications using automatic classification of communication inefficiencies
Coherence-Free Multiview: Enabling Reference-Discerning Data Placement on GPU
Barrier-Aware Warp Scheduling for Throughput Processors
Beyond time complexity: data movement complexity analysis for matrix multiplication
SMARTS: exploiting temporal locality and parallelism through vertical execution
Optimizing irregular shared-memory applications for clusters
A low-cost mixed-mode parallel processor architecture for embedded systems
Author retrospective for design tradeoffs for tiled CMP on-chip networks
MP-PIPE: a massively parallel protein-protein interaction prediction engine
Arnoldi-Tchebychev for large scale matrices and its vectorization
Processor Autonomy on SIMD Architectures
V-Combiner: speeding-up iterative graph processing on a shared-memory platform with vertex merging
ThundeRiNG: generating multiple independent random number sequences on FPGAs
Shared virtual memory with automatic update support
Vector performance analysis of the NEC SX-2
Parcel: project for the automatic restructuring and concurrent evaluation of LISP
Composing Algorithmic Skeletons to Express High-Performance Scientific Applications
PB-LRU: a self-tuning power aware storage cache replacement algorithm for conserving disk energy
Automated cache optimizations using CME driven diagnosis
BMQSim: Overcoming Memory Constraints in Quantum Circuit Simulation with a High-Fidelity Compression Framework
The next-generation supercomputer project and a plan for the advanced institute for computational science
Enhancing memory level parallelism via recovery-free value prediction
The LINPACK Benchmark: An Explanation
Block value based insertion policy for high performance last-level caches
Limited area numerical weather forecasting on a massively parallel computer
CEAZ: accelerating parallel I/O via hardware-algorithm co-designed adaptive lossy compression
Strip mining on SIMD architectures
Supercomputing operating systems: a naive view from over the fence
Enabling Reconfigurable HPC through MPI-based Inter-FPGA Communication
Differentiating Set Intersections in Maximal Clique Enumeration by Function and Subproblem Size
DIV: An Index & Value compression method for SpMV on large matrices
A Victim Cache for Vector Registers
Memorage: emerging persistent RAM based malleable main memory and storage architecture
Fast and Fair Training for Deep Learning in Heterogeneous GPU Clusters
Reusing Data Reorganization for Efficient SIMD Parallelization of Adaptive Irregular Applications
cuRipples: influence maximization on multi-GPU systems
A framework for incremental extensible compiler construction
Proceedings of the 8th international conference on Supercomputing, ICS 1994, Manchester, UK, July 11-15, 1994
GPU merge path: a GPU merging algorithm
An approach to communication-efficient data redistribution
Ray tracing on a connection machine
Keynote: Wireless networks... what does the future have in store?
ConCo: Optimizing Compilation of Concurrent Tensor Programs on Shared GPU
A massively parallel domain decomposition method for large-scale DFT electronic structure calculations
A general algorithm for data dependence analysis
Vectorization and parallelization of irregular problems via graph coloring
An Autonomous Parallelization of Transformer Model Inference on Heterogeneous Edge Devices
SDC: a software defined cache for efficient data indexing
File Archive Activity in a Supercomputing Environment
Proxima: accelerating the integration of machine learning in atomistic simulations
ParInt: A Software Package for Parallel Integration
Efficient, out-of-memory sparse MTTKRP on massively parallel architectures
Reduction of operating system jitter caused by page reclaim
Queueing performance analysis of co-scheduling in a pool of processors environment
Kernel-level Scheduling for the Nano-threads Programming Model
D-Rex: Heterogeneity-Aware Reliability Framework and Adaptive Algorithms for Distributed Storage
Data Forwarding in Scalable Shared-Memory Multiprocessors
A quantitative architectural evaluation of synchronization algorithms and disciplines on ccNUMA systems: the case of the SGI Origin2000