yusuke1997/dblp-id-title huggingface dataset:
Design Considerations for Insulator Metal Transition based Artificial Neurons
IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017
Predictive LSB-First Successive Approximation for SAR Analog-to-Digital Converters
A novel clock and data recovery scheme for 10Gbps source synchronous receiver in 65nm CMOS
Novel microscale memristor with uniqueness property for securing communications
8T XNOR-SRAM based Parallel Compute-in-Memory for Deep Neural Network Accelerator
A Low Output Voltage Ripple Fully-Integrated Switched-Capacitor DC-DC Converter
Efficient Functional Locking of Behavioral IPs
Wireless radar devices for smart human-computer interaction
Dynamic Averager Based Sub-1V Bandgap Voltage Reference
SLED: Sequential Logic Encryption Using Dynamic Keys
DECO: Dynamic Energy-aware Compression and Optimization for In-Memory Neural Networks
Analysis of the interface barriers between nano metal particles and semiconductors substrates
Energy Efficient and Adaptive Analog IC Design for Delay-Based Reservoir Computing
Design of Load-Independent Class-E Inverter with MOSFET Parasitic Capacitances
Energy-efficient terahertz electronics using multi-functional electromagnetism and high-parallelism architecture
A 1 GS/s, 31 MHz BW, 76.3 dB dynamic range, 34 mW CT-ΔΣ ADC with 1.5 cycle quantizer delay and improved STF
Rapid quantification system for zinc in blood serum
A 24-GHz low-cost continuous beam steering phased array for indoor smart radar
Predictive Storage Management for Cloud-Based Video Streaming Using ML ARIMA Model
Vibration Energy Harvesting IC Design with Incorporation of Two Maximum Power Point Tracking Methods
Automated Design of Sigma-Delta Converters: From Know-How to AI-assisted Optimization
Surrogate-based Optimization-aided Design for Low Power Analog Circuits
A singular point detection and localization of power quality disturbance using filter bank and the residuals of adaptive filter
Adaptive signal processing techniques for extracting fetal electrocardiograms from noninvasive measurements
Novel buck converter architectures for large step-down conversion ratio
Data-transition adaptive decision feedback equalizer for 2/4PAM serial links
A variable-bandwidth, power-scalable optical receiver front-end in 65 nm
Analysis and design of CMOS resettable C-elements
An Energy-Efficient Low-Noise Complementary Parametric Amplifier Achieving 0.89 NEF
Digital cubic interpolation and synchronization for RF receiver using power-gated ADC
A closed-form approach for contiguous and non-contiguous harmonic elimination with application to a three-level switching waveform
A low power high resolution time to digital converter for ADPLL application
Design of an OOK IR-UWB front-end for biomedical devices
A novel optimization framework for the design of gilbert cell mixers
IR-UWB BPK transmitter optimized for maximum distance of transmission
A novel readout circuit for on-sensor multispectral classification
Reasonable Sense of Direction: Making Course Recommendations Understandable with LLMs
Bayesian inference using spintronic technology: A proposal for an MRAM-based stochastic logic gate
Design and Measurement of a 24.5-mW, 33-mWh, 1.8-V-Output Solar Energy Harvester for Bluetooth Sensor Nodes
A Highly Digital Integrated Switching LDO with Less 1 mV Output Ripple and 1.2 A Load Current
Selecting the Fastest Settling-Time Filter in PDM-based DACs used for Dynamic Calibration Applications
Analysis and application of seasonal ARIMA model in Energy Demand Forecasting: A case study of small scale agricultural load
Single Ended and Differential Passive RF Impedance Tuners for 2.4 GHz ISM Band Applications
A cancellation technique for output-dependent delay differences in high-accuracy DACs
A 1.5 mW, 28 GHz Noise-Cancelling LNA in 65-nm CMOS
Digital Twin Based Fault-Tolerance Framework for RRAM Based Neural Computing Systems
Low-power content-addressable memory design using a double match-line (DML) architecture
Measuring arc dynamics using a slab coupled optical sensor (SCOS)
Quadrature Control-Bounded ADCs
Design of SIW Filter Based on the Equivalent De-embedding Technique and Inverse Neural Network
PPO-based Reinforcement Learning for UAV Navigation in Urban Environments
Impact of Uncertainty and Correlations on Mapping of Embedded Systems
An active interference cancellation technique with harmonic rejection for a broadband channelizer
An Ultra Wideband Transmitter for 0.1 to 12 GHz Software Defined Radios
RLC-oscillator with smooth transition from sinusoidal to relaxation oscillations
Designing low-delay maximally flat integer-order FIR digital differentiators with equiripple stopband
Front Moving Object Behavior Prediction System Exploiting Deep Learning Technology for ADAS Applications
A smart transduction system with PVTA compensation for sensing applications
A Portable CMOS Based pH Sensor
An 83% efficiency, 0.6V to 1V output switched-capacitor DC-DC converter for micro-watt power applications
A high-performance FPGA-based LDPC decoder for solid-state drives
Baby Sock to Monitor Newboms to Detect Risk for Neonatal Compromise
An Inaccuracy of ±0.5 °C Digital Temperature Sensor From -40°C to 125°C With Curvature Correction
Windowed Integration Sampling in Bio-Signal Front-End Design
FPGA-Based Hardware-in-the-Loop Real-Time Simulation Implementation
A design technique overview on broadband RF ESD protection circuit designs
A Two-Step SAR Capacitance-to-Digital Converter
Testing and Tuning of RRAM-Based DNNs: A Machine Learning-Assisted Approach
A pH Sensing System with Security Enhanced Cryptographic System
A 60 GHz and 2.08 mW Active Quasi-Circulator in 22 nm FDSOI Technology
A Reading Method for 2T2R RRAM Arrays Coding their Multiple States
Traffic Sign Recognition Based on Multilayer Perceptron Using DWT and DCT
Security Analysis of Capsule Network Inference using Horizontal Collaboration
First results from a time domain impedance probe for measuring plasma properties in the ionosphere
Regulation Control Design Techniques for Integrated Switched Capacitor Voltage Regulators
Calibration and equalization methods for mismatch errors in a high frequency two-channel time-interleaved ADC
Charge recovery implementation of an analog comparator: Initial results
Precision medicine and FPGA technology: Challenges and opportunities
On-chip digital calibration for automatic input impedance boosting during biopotential measurements
A bandgap circuit with a temperature coefficient adjustment block
A Broadband Active Balun with Inductor-Less Active Peaking and Imbalance Correction
Reliable ultra-low voltage cache with variation-tolerance
Ultra Low Voltage Variable Gain Cherry-Hooper Amplifier with 1MHz Constant Bandwidth, 1.7µW Power Dissipation and ±0.2V Supply
Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC with 85.1 dB DR and 91 dB SFDR
Design of the internal DAC in SAR ADCs
A Compact Untrimmed 48ppm/°C All MOS Current Reference Circuit
A hardware Trojan embedded in the Inverse Widlar reference generator
Simplifying Cole-impedance extraction from the current-excited step response
Field programmable switched capacitor voltage converter
A Tunable Morris-Lecar Spiking Neuron in CMOS
Memorial Contributions of Graham Jullien to Emerging Residue Number System Technologies During the Evolution of Digital Signal Processing and Computer Arithmetic
Heat transfer simulations for pulsed laser annealing of silicon thin film
Variable fractional digital delay filter on reconfigurable hardware
A Wavelet Domain Implementation of Sparse Representation Method for Face Recognition
Modular Extended Range Divider For Multi Band Phase Locked Loop
Electrically-Tunable Stochasticity for Spin-based Neuromorphic Circuits: Self-Adjusting to Variation
A Baseline Comparison of Linear and Exponential Charge Pumps
End-to-End Neural Network for Autonomous Steering using LiDAR Point Cloud Data
Automated characterization of reverse recovery parameters in high speed LDMOS devices
A compressive sensing information aware analog front end for IoT sensors using adaptive clocking techniques
A High-Performance Digitally Programmable FVF-Based LDO for Efficient Power Management in Driving Distributed Loads Using a Shared Power Grid
A chopper capacitive feedback instrumentation amplifier with input impedance boosting technique
Genetic Algorithm approach for sinhala speech recognition
Remote calibration of wireless power harvest
Adaptive DDS-PLL Beamsteering Architecture based on Real-Time Angle-of-Arrival Estimation
Technique for generating timing skew resistant time-interleaved signals
A Reconfigurable Bandpass Filter with Ferroelectric Devices for Intracardiac Electrograms Monitoring
ADC Quantization with Overlapping Metastability Zones and Dual Reference Calibration
Microcontroller-based Electrochemical Impedance Spectroscopy for wearable health monitoring systems
Wave digital emulation of a double barrier memristive device
A biophysical model of cortical glutamate excitation of medium spiny neurons in the dorsal lateral striatum
Voltage source based voltage-to-time converter
Improving the Accuracy of Diabetic Retinopathy Severity Classification with Transfer Learning
An ultra-low frequency ring oscillator with programmable tracking using a phase-locked loop
Low-Power and Area-Efficient Fully On-Chip ECG Motion Artifact Removal Circuitry utilizing Band Pass Filter based R-peak Detection Scheme
Optimization of Artificial Port Reflectances for Wave Digital Filters with Topology-Related Delay-Free Loops
A large-scale FPAA enabling adaptive floating-gate circuits
Design of a Weighted Average Chaotic System for Robust Chaotic Operation
An approach for multi-task and multi-application mapping onto NoC-based MPSoC
Jitter-Based True Random Number Generator with Dynamic Selection Bit Reconfiguration
Development of effective information-hiding method for embedded systems
Microcontroller-based real-time alveolar breath sampling system
Toward better layout design in ASTRAN CAD tool by using an efficient transistor folding
Video-Audio Emotion Recognition Based on Feature Fusion Deep Learning Method
Fully digital 1-D, 2-D and 3-D multiscroll chaos as hardware pseudo random number generators
A Simple Extreme Learning Machine Model for Detecting Heart Arrhythmia in The Electrocardiography Signal
An efficient implementation of deep convolutional neural networks on a mobile coprocessor
A time-mode LDI-based resonator for a band-pass ΔΣ TDC
A Correlation-based Timing Skew Calibration Strategy Using a Time-Interleaved Reference ADC
A Signal Source Chip at 140GHz and 160GHz for Radar Applications in a SiGe Bipolar Technology
Characterization of RNS multiply-add units for power efficient DSP
An open-loop 28GHz 16-phase clock generator in 28nm CMOS
Integrated Analog Computers as Domain-Specific Accelerators: A Tutorial Review
VCO-based Feature Extraction Architecture for Low Power Speech Recognition Applications
New Low-Voltage CMOS Differential Difference Amplifier (DDA) and an Application Example
Extending a CPU Cache for Efficient IPv6 Lookup
An RFID based autonomous indoor tour guide robot
A 0.23 mW, On-Chip, self-calibrating RF amplitude detector in 65 nm CMOS
A framework for teaching robotic control using a novel visual programming language
Analysis of the oscillation frequency and waveform amplitude for a high-frequency differential ring oscillator
A Low Phase Noise Cross-Coupled VCO for X-Band Applications in 0.13µm SiGe BiCMOS Technology
FPGA emulation of a spike-based, stochastic system for real-time image dewarping
A new scalable fault tolerant routing algorithm for networks-on-chip
A linear CMOS balanced output transconductor using double differential pair with source degeneration and adaptive biasing
Time-Mode All-Digital Delta-Sigma Time-to-Digital Converter with Process Uncertainty Calibration
Scalable Low-Complexity Implementation of Constant Matrix Multiplication Circuits
A Generalized Multi-Level Structure for High-Precision Binary Decoders
A high-accuracy differential-capacitance-to-time converter for capacitive sensors
Application Driven Rapid Synthesis for Analog BIST Components
Emerging Relaxation and DDPM D/A Converters: Overview and Perspectives
Digital circuit design for robust ultra-low-power cell library using optimum fingers
Estimation of gait stability based on accelerometer signals
Visual Analysis of Leaky Integrate-and-Fire Spiking Neuron Models and Circuits
A High Speed Dynamic StrongARM Latch Comparator
A wideband class E PA with more than 40% PAE and over 800 MHz bandwidth
Design-for-Error-Detection in Implementations of Cryptographic Nonlinear Substitution Boxes Benchmarked on ASIC
A Phase Normalization Scheme for Angle of Arrival based Bluetooth Indoor Localization
A one Zener diode, one memristor crossbar architecture for a write-time-based PUF
A framework to quantify FPGA design hardness against radiation-induced single event effects
Novel implementation of full adder based scaling in Residue Number Systems
Cough Event Prediction based on Spectral Features and SVM and KNN Machine learning using Triaxial Accelerometer data from Multiple body positions
Split Manufacturing Based Secure Hardware Design by BEOL Signal Selection In High Level Synthesis
Evaluation of Heat Pump Performance: Regional Facility Data Comparison of Cost & Carbon
Thermally controlled vanadium dioxide thin film microwave devices
Building a surface atlas of hippocampal subfields from MRI scans using FreeSurfer, FIRST and SPHARM
Switched-gain feedback amplifiers
HEVC Interpolation Filter Architecture Using Hybrid Encoding Arithmetic Operators
A Current-Mode Photon Counting Circuit for Long- Range LiDAR Applications
A High Slew Rate, Low Power, Compact Operational Amplifier Based on the Super-Class AB Recycling Folded Cascode
Advanced Packaging, Heterogeneous Integration, and Foundry 2.0
A reconfigurable hardware platform implementation for software defined radio using dynamic partial reconfiguration on Xilinx Zynq FPGA
A 311 nW Integrated Neural Amplifier and Spike Enhancement Filter Achieving 98.99% Spike Detection Sensitivity
16-Bit Clocked Adiabatic Logic (CAL) logarithmic signal processor
Can Hardware Performance Counters Detect Adversarial Inputs?
A linearized current-controlled oscillator for ultra-low power wideband and cognitive radios
Fourier-based transmission line ultra-wideband Wilkinson power divider for EARS applications
Reversible watermarking without underflow and overflow problems
Modelling of charge and selfdischarge responses of supercpacitors
Improving accuracy in FFT-based cyclic convolution
A 30-39 GHz 3.1-3.4 NF 6.6 dBm IIP3 CMOS Low-Noise Amplifier with Post-Linearization Technique
Real-time and event-triggered object detection, recognition, and tracking
Novel CMOS active inductor for tunable RF circuits
Rank modulation hardware for flash memories
An Energy-Efficient Analog-to-Pulse Encoding for Short-Range High-Density Wireless Telemetry
All-Digital ∆Σ TDC with Current-Starved Bi-Directional Gated Delay Line Time Integrator
Design and implementation of a 9W, 0.3-3.7 GHz linear power amplifier using GaN HEMT
Development and evaluation of the "Stego-panel IV" Invisible information lighting display
Process variation aware dynamic power management in multicore systems with extended range voltage/frequency scaling
New Operational Transconductance Amplifiers using current boosting
Ternary Device using Graphene Memcapacitor for Post Binary Era
A transmission line circuit-oriented approach for miniaturization of a log-periodic dipole array (LPDA) antenna
STDP Based Online Learning for a Current-Controlled Memristive Synapse
Pulse restoration in inductive-coupled link with antenna transformer
PASSIOT: A pareto-optimal multi-objective optimization approach for synthesis of analog circuits using sobol' indices-based engine
Stability and design of hysteretic current-mode single-inductor multiple-output power supplies
An adaptive dynamic-element PTA method for solving nonlinear DC operating point of transistor circuits
Magnetic Bead Characterization, Implementation and Control for the Extraction of Nucleic Acids from Patient Biofluid Samples in Point of Need Microfluidic Devices
An investigation into the effect of carrier generators on power supply noise in PWM Class D amplifiers
A 1.2 V 1.0-GS/s 8-bit Voltage-Buffer-Free Folding and interpolating ADC
A low-power, programmable analog event detector for resource-constrained sensing systems
Least Square Based Jitter Decomposition Algorithm for a PAM4 link
Reconfigurable analog signal processing for wireless sensor networks
Distinguished keynote speaker I
Dynamic Security Management of Systems on Chip via Embedded FPGA in 22nm CMOS Technology
GPU accelerated coverage path planning optimized for accuracy in robotic inspection applications
Circuits with mixed mode oscillations in VHDL-AMS
Designing high order low delay maximally flat FIR digital differentiators with equiripple stopband
Time-Based Optical Receiver Featuring a Linear Current-to-Time Conversion with Equalization
A Compact and Accurate MOS-based Temperature Sensor for Thermal Management
Deep Reinforcement Learning with Different Rewards for Scheduling in High-Performance Computing Systems
Observation of chaotic behavior in automatic tuning loops for continuous-time filters
CMOS-Memristor Hybrid Design of A Neuromorphic Crossbar Array with Integrated Inference and Training
Multi-Probability Hash-based Random Number Generator for Post-Quantum Cryptography
A 97.9% Peak Efficiency 9 V Output Three-Switch Hybrid Buck-Boost Power Stage Using 5 V CMOS
Wandering Notification System for Caregivers of People with Dementia
Spectrum-Efficient Communication Over Copper Using Hybrid Amplitude and Spatial Signaling
On recent advances in synthetic biology to enable programming bacteria for biosensing applications
Image noise level estimation by searching for smooth patches with discrete cosine transform
High voltage charge pump with triple well diodes in a 0.13 µm bulk CMOS process
Configurable FPGA-Based Outlier Detection for Time Series Data
Beyond-one-cycle loop delay CT ΔΣ modulators with proper rational NTF synthesis and time-interleaved quantizers
Low-cost parallel FFT processors with conflict-free ROM-based twiddle factor generator for DVB-T2 applications
A low-power hybrid ADC architecture for high-speed medium-resolution applications
A Tunable Bandstop Filter Based on Source Follower
Adaptive control of indoor temperature in a building using a desirable reference temperature profile
Don't cares based dynamic test vector compaction in SAT-ATPG
Energy-Efficient Analog Frond-End Design for Ultrasound Imaging Applications
Time-efficient and TSV-aware 3D gated clock tree synthesis based on self-tuning spectral clustering
Analysis of l2-sensitivity for two-dimensional state-space digital filters by taking into account 0 and ±1 elements
Single Wire Debug Interface
A 3D model of quadrupole dielectrophoresis levitation
Efficient design methodology for Application Specific Integrated Algorithm Systems (ASIAS)
A Disturb Free Read Port 8T SRAM Bitcell Circuit Design with Virtual Ground Scheme
Event-Based Frequency Detection Methods for Determining Wingbeat Frequencies of Honey Bees
Passive Duplexers for 5G mm-Wave Applications
Utilization of exponentiated amplitude spectrum for speech enhancement in highly noisy environments
New Reverse converters for the four-moduli set {2 n , 2 n -1, 2 n +1, 2 n-1 -1} for n even
Virtual reality navigation simulation for users who are blind
Incremental Delta Sigma Modulation with Dynamic Weighted Integration
An Open-Source Test-Bench for Autonomous Ultrasound Imaging
Digital watermarking of color images utilizing mobile platforms
An N-Shaped I-V Characteristic Circuit with a Mem-impedance Feature
Majority voter: Signal probability, reliability and error bound characteristics
Study of a cosmic ray impact on combinatorial logic circuits of an 8bit SAR ADC in 65nm CMOS technology
AI-Enhanced Codesign of Neuromorphic Circuits
AMemImp: Novel Analog Memimpedance Device and Circuits for MAC Unit
Advanced SEU and MBU Vulnerability Assessment of Deep Neural Networks in Air-to-Air Collision Avoidance Systems via SAT-Based Techniques
ASIC Oriented Comparative Analysis Of Biologically Inspired Neuron Models
Analysis of digital predistortion architectures for direct digital-to-RF transmitter systems
A Current-Density-Enhanced 12V-to-1.2V/10A, AOT-Controlled, 4-Phase Series-Capacitor Buck Converter with Embedded Current Balancing
Transform Domain Two Dimensional and diagonal Modular Principal Component Analysis for facial recognition employing different windowing techniques
A 12-bit 20-MS/s SAR ADC with improved internal clock generator and SAR controller
A new segmentation-based GPU-accelerated sparse matrix-vector multiplication
Characterization of Mathematical Modeling of Control at Undergraduate Level Using Unity Software
Multiplatform Spectrum Sensing Prototype
Dual directional coupler design with transformers
A High-Precision Single-Ended-Current-to-Differential-Voltage Converter for Reconfigurable Neural Recording Front-Ends
Zero-rotation-based nonrecursive comb structure
A 10-MHz Current-Mode Fixed-Frequency Hysteretic Controlled DC-DC Converter With Fast Transient Response
An ultra-low power interface CMOS IC design for biosensor applications
An efficient and scalable hardware architecture for singular value decomposition towards massive MIMO communications
Slim LSTM NETWORKS: LSTM_6 and LSTM_C6
A 0.1-1.5GHz dual-mode Class-AB/Class-F power amplifier in 65nm CMOS
A robust 2×2 CMOS receiver array for meter-scale point-to-point OOK VLC links
A 40V current sensing circuit with fast on/off transition for high-voltage power management
On-device STDP and synaptic normalization for neuromemristive spiking neural network
Design and simulation of a novel mechanically-stacked solar cell
NCL+: Return-to-one Null Convention Logic
A fully-synchronous offset-insensitive level-crossing analog-to-digital converter
Cellular neural networks: Implementation of a segmentation algorithm on a Bio-inspired hardware processor
A novel wide temperature range bandgap reference
A digital predistortion technique based on a NARX network to linearize GaN class F power amplifiers
A novel self-calibration scheme for 12-bit 50MS/s SAR ADC
Leakage and delay analysis in FinFET array multiplier circuits
Passive sensors for flexible hybrid-printed electronics' systems: An IC designer view
A retina-inspired robust on-focal-plane multi-band edge-detection scheme for CMOS image sensors
Analytical Design of Elliptically-Shaped 2D Recursive Filters
Three-Junction Bandgap Circuit with Sub 1 ppm/°C Temperature Coefficient
Machine Learning Model Based Digital Hardware System Design for Detection of Sleep Apnea Among Neonatal Infants
A mm-Wave push-push voltage controlled oscillator with double-tuned LC load
Low Power Neural Network Accelerators Using Collaborative Weight Tuning and Shared Shift-Add optimization
Design Techniques for Zero Steady-State Output Ripple in Digital Low Dropout Regulators
Mitigation of Distribution Voltage Violations Using Single-Phase Residential Static VAr Compensators
A 0.25V 97.8fJ/c.-s. 86.5dB SNDR SC ΔΣ modulator in 0.13µm CMOS
Implementation of parallel operations over streams in extensible processing platforms
Signal conditioning circuit with ultra-high sensitivity and ultra-low power consumption for MEMS
Experimental operation of time-mode building blocks using a time-mode switched-delay unit
A programmable sustaining amplifier for reconfigurable MEMS-referenced oscillators
Algorithm and VLSI architecture of channel estimation impaired by impulsive noise in PLC
Fast Algorithm with Palette Mode Skipping and Splitting Early Termination for HEVC Screen Content Coding
An input pole tuned switching equalization scheme for high-speed serial links
A Low-Power ECG Readout Circuit Integrated with Machine Learning Based ECG Heartbeat Classifier
An audio self-recovery scheme that is robust to discordant size content replacement attack
M-Path Non-Maximally Decimated Analysis Channelizer Implemented with 3M/4 Resampling Commutator
A Hardware-in-the-Loop Simulator for mmWave Massive MIMO Using PYNQ Framework
Robust Continuous-Time MASH Delta Sigma Modulator