yusuke1997/dblp-id-title huggingface dataset:
A 1.2V-5V High Efficiency CMOS Charge Pump for Non-Volatile Memories
A 4.1 GHz Dual Modulus Prescaler Using the E-TSPC Technique and Double Data Throughput Structures
Multiobjective path planning on uneven terrains based on NAMOA
Realization of an analog current-mode 2D DCT
Multimedia data encryption via random rotation in partitioned bit streams
A new noise reduction method using linear prediction error filter and adaptive digital filter
An efficient wavelet-VQ method for image coding
Robust Digital Filters Part 1 - Minimax FIR Filters
A two-stage low complexity face recognition system for face images with alignment errors
A Low-Voltage, Bulk-Driven MOSFET Current Mirror for CMOS Technology
Stability analysis of power circuit comprising virtual inductance
Signal detection by using higher order statistics
Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC
Dynamics of the MEMS Pulsed Digital Oscillator with Multiple Delays in the Feedback Loop
A class of directional filter banks [image processing applications]
Fluxgate magnetic sensors with a readout strategy based on residence times measurements
Synchronizing coupled oscillators in polygonal networks with frustration
A new algorithm for QAM signal classification in AWGN channels
The implementation of object-based shot boundary detection using edge tracing and tracking
A 15.2 TOPS/W CNN Accelerator with Similar Feature Skipping for Face Recognition in Mobile Devices
Design of the Basic Building Block of a High-Speed Flexible and Modular Pipelined ADC
Post-floorplanning power optimization for MSV-driven application specific NoC design
Energy Efficiency Tradeoffs for Sub-THz Multi-User MIMO Base Station Receivers
Content-aware write reduction mechanism of phase-change RAM based Frame Store in H.264 Video codec system
A Fast DCT Processor, Based on Special Purpose CORDIC Rotators
Very low voltage power conversion
Fully integrated UWB impulse transmitter and 402-to-405MHz super-regenerative receiver for medical implant devices
Overcoming burst packet loss in peer-to-peer live streaming systems
Negative Label Guided Discriminative Canonical Correlation Analysis for Semi-Supervised and Semi-Paired Learning
Stability of a Circuit with Parasitic Capacitances
Instruction-based high-efficient synchronization in a many-core Network-on-Chip processor
An Analog VLSI Velocity Sensor
An FPGA based Walsh Hadamard transforms
System for thermal measurement of pulse-transit-time
Robust low power design in nano-CMOS technologies
A DPA-Resistant Asynchronous-Logic NoC Router with Dual-Supply-Voltage-Scaling for Multicore Cryptographic Applications
A Programmable CMOS Dielectrophoresis Array Chip with 128 × 128 Electrodes for Cell Manipulation
A Low-Power Single-Phase Split-Controlled Flip-Flop With No Redundant Switching
Minimum jitter adaptive decision feedback equalizer for 4PAM serial links
A Digital-Control Buck Converter with Dual Pulse-Skipping Modes for Internet of Things
A Quadrature Hybrid Transimpedance-Amplifier-Based Mixer-First Receiver
Hardware security assurance in emerging IoT applications
Unbiased parameter identification for noisy autoregressive signals
Design of 1mWCMOS OOK super-regenerative receiver for 402-405MHz medical applications
Performance bounds on the constant modulus error surface
Enhancing Fundamental Energy Limits of Field-Coupled Nanocomputing Circuits
A Large-Area LTPS-TFT-Based Bi-directional Biomedical Interface with Process-Invariant In-pixel Biopotential-to-Digital Converters
Pulse-based feature extraction for hardware-efficient neural recording systems
An MSB truncation scheme for low-power video processors
Reduced Z-datapath Cordic Rotator
A low complexity adaptive interpolated FIR echo canceller
A 28 GHz 8-Bit Calibration-Free LO-Path Phase Shifter using Transformer-Based Vector Summing Topology in 40 nm CMOS
State dependent statistical timing model for voltage scaled circuits
Face segmentation based on Hue-Cr components and morphological technique
A double-talk resistant echo cancellation based on iterative maximal-length correlation
A BiCMOS Universal Membership Function Circuit with Fully Independant, Adjustable Parameters
Efficient Accelerator for Dilated and Transposed Convolution with Decomposition
Modeling skin effect with reduced decoupled R-L circuits
A Systematic Approach for Ladder Based Switched-Current Filter Design
Spatio-temporal compressed sensing for real-time wireless EEG monitoring
A 350μW Sign-Bit architecture for multi-parameter estimation during OFDM acquisition in 65nm CMOS
A Lightweight and Efficient BRAM-free NTT Unit for Crystals-Dilithium
Adaptive notch filtering using multi-rate frequency-sampling band-pass filters
Parallel Turbo decoding
High-throughput GCM VLSI Architecture for IEEE 802.1ae Applications
Nonlinear dynamics of first-order DPLL with frequency-modulated input
An In-Pixel Gain Amplifier Based Event-Driven Physical Unclonable Function for CMOS Dynamic Vision Sensors
A low-cost multi-phase 3A buck converter with improved ripple cancellation for wide supply range
An FPGA Based System for Interfacing with Crossbar Arrays
Noise Effects on Performance of Signal Detection in an Analog VLSI Resonate-And Fire Neuron
A Silicon-on-Sapphire Low-Voltage Temperature Sensor for Energy Scavengers
On-Chip I/O ESD Protection for GaN-on-SOI Integrated Circuits
Adaptive feature selection for digital camera source identification
A neural network for convex optimization
Deep Neural Network Based Cell Segmentation for Lab-on-CMOS Systems using Realtime Microscopy
A regulated charge pump for injecting floating-gate transistors
A low voltage CMOS rectifier for wirelessly powered devices
Lossless Compression of Seismic Signals Using Least Square Frequency Domain Pole-Zero Modeling
Thermal-aware floorplanning and layout generation of MOSFET power stages
Design of Hardware Trojans and its Impact on CPS Systems: A Comprehensive Survey
Closed-form model for dual-gate ambipolar CNTFET circuit design
A cost-effective and high-precision architecture for CORDIC-based adaptive lattice filters
Fast-Transient DC-DC Converter using an Amplitude-Limited Error Amplifier with a Rapid Error-Signal Control
Design of a digital IP for 3D-IC die-to-die clock synchronization
Analog IP design flow for SoC applications
The effect of parameter mismatches in RF VCO
Statistical Characterization and Modeling of Analog Functional Blocks
Rethinking Fourier's legacy in signals and systems education
Setting and Validating Precision Requirements in the Digital VLSI Implementation of a Neural Defect-Identifier for Machined Objects
A Multi-Feature Nonlinear-SVM Seizure Detection Algorithm with Patient-Specific Channel Selection and Feature Customization
Adaptive block-size transform based just-noticeable difference profile for videos
DDL-based calibration techniques for timing errors in current-steering DACs
A 0.9-Nyquist-Band Digital Timing Mismatch Correction for Time-Interleaved ADCs Achieving Delay Tuning Range of 0.12-Sample-Period
Integrated polarization-analyzing CMOS image sensor
Design of a high-speed RSA encryption processor with built-in table for residue calculation of redundant binary numbers
An Approach for Tuning High-Q Continuous-Time Bandpass Filters
Miniaturized Solid-State Battery-Based DC-DC Switched Converter
Bank-partition and Multi-fetch Scheme for Floating-point Special Function units in Multi-core Systems
An integrated time register and arithmetic circuit with combined operation for time-domain signal processing
A High-Gain Low-Offset Baseband Design for Multi-Standard Navigation Receivers
Vehicle Lateral Stability Controller Design for Critical Running Conditions using NMPC Based on Vehicle Dynamics Safety Envelope
Real-time, high-speed video decompression using a frame- and event-based DAVIS sensor
A heuristic solution to the optimisation of flutter control in compression systems (and to some more binary quadratic programming problems) via ΔΣ modulation circuits
Congestion-Aware Dynamic Elevator Assignment for Partially Connected 3D-NoCs
A voltage feedback charge compensation technique for split DAC architecture in SAR ADCs
Self-Aligned Open-Loop Multiphase Generator
Use Multilayer Perceptron in Calibrating Multistage Non-linearity of Split Pipelined-ADC
Low-cost global MPPT scheme for Photovoltaic systems under partially shaded conditions
Power conversion efficiency of class-E power amplifier outside nominal operation
Variable-rate video codec using frame adaptive finite-state vector quantization
MOSFET-only Mixer/IIR filter with gain using parametric amplification
Critical data length for period estimation
A parallel search algorithm for CLNS addition optimization
An improved technique to increase noise-tolerance in dynamic digital circuits
A fuzzy neural classifier for pattern classification
A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes
A novel low-power physical design methodology for MTCMOS
Vectorization of the Sphere Detection Algorithm
3D Shape Acquisition System Dedicated to a Visual Intracortical Stimulator
MPEG4 compressed video over the Internet
A 1.2 V 490 μW Sub-GHz UWB CMOS LNA with Current Reuse Negative Feedback
Weighted noise subtraction and adaptive soft-thresholding approach to speech enhancement
A Modified Sorted-QR Decomposition Algorithm for Parallel Processing in MIMO Detection
Low power register file architecture for application specific DSPs
Periodic steady-state solutions of nonlinear circuits based on a differentiation matrix
Efficient middleware for network evaluation and optimization in Wireless Sensor Network design
An automatic acoustic bathroom monitoring system
An ultra-wideband receiving antenna array
Fast-transient-response high-PSR low-dropout regulator based on ultra-fast error amplifier and unity-gain buffer for portable applications
The Detection of Attentive Mental State Using a Mixed Neural Network Model
Fastest: a tool for a complete and efficient statistical evaluation of analog circuits
An 8-bit QVGA AMOLED driver IC with a polynomial interpolation DAC
The Nonlinear Class-E Amplifier: A Case Study of Harmonic Balance Applied to Switched Circuits
SiGe circuits for high bit-rate optical transmission systems
Memory Organization for Energy-Efficient Learning and Inference in Digital Neuromorphic Accelerators
Configuring silicon neural networks using genetic algorithms
Multi-server optimal bandwidth monitoring for collaborative distributed retrieval
Enhanced spatial error concealment with directional entropy based interpolation switching
Single underwater image enhancement with a new optical model
Determination of radix numbers of the Booth algorithm for the optimized programmable FIR architecture
Motion field interpolation for frame rate conversion
A high-resolution Time-to-Digital Converter based on parallel delay elements
Abstracting Single Event Transient characteristics variations due to input patterns and fan-out
Unfolding of Petri nets with semilinear reachability set
Optimum MIMO transmit-receiver design in presence of interference
Signal Shaping at Interface of Wireless Power Harvesting and AC Computational Logic
On Unanimity of Nonlinear Systems with Coupling over Coopetition Networks
Side information extrapolation with temporal and spatial consistency
Computation-Performance Optimization of Convolutional Neural Networks with Redundant Kernel Removal
On the Modelling of a CMOS Magnetic Sensor
Analysis and architecture design for high performance JPEG2000 coprocessor
Design of two-channels FIR filterbanks with rational sampling factors using the FRM technique
A charge-pump based 0.35µm CMOS RF switch driver for multi-standard operations
A low complexity FEC design for DAB
A novel analysis method of bus signal transmission and a proposal for high-speed low-power bus circuit
Spectral Structure Analysis of FFT-based Digital Predistortion for Wideband 5G Applications
CT PUF: Configurable Tristate PUF against Machine Learning Attacks
Characterization of adhesive wafer bonded CMUTs realized from BCB based sealed cavity
Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew
Energy-efficient resonant BFSK MICS transmitter with fast-settling dual-loop adaptive frequency locking
A Low Power Current Mode PUF Based on Winner-Take-All Scheme
A 199 μW, 82.9% Efficiency Current Driver with Active Common-Mode Reduction for Impedance-Based Tactile Sensors
Design of Multiphase Class-G SCPA with Enhanced Efficiency
Live Demonstration: An HF Capacitive Wireless Power Transfer to a Quad-Rotor Drone
Robust synchronization technique for chaotic symbolic dynamics modulation
Non-Inverting Class-AB CMOS Output Stage for Driving High-Capacitive Loads
Design of a low-jitter wideband frequency synthesizer for 802.11ad wireless OFDM systems using a frequency sixtupler
Optimal Slope Ranking: An Approximate Computing Approach for Circuit Pruning
Design of an Assisted GPS Receiver and its Performance Analysis
A 0.18µm CMOS 10Gb/s 1: 4 DEMUX using replica-bias circuits for optical receiver
Live demonstration: A pulsar signal receiver system for navigation
Systematic methodology for applying Mason's signal flow graph to analysis of feedback circuits
A 120 fps 1080p resolution block-based feature extraction architecture implementation for real-time action recognition
Trigger-wave collision detecting asynchronous cellular logic array for fast image skeletonization
Active Control of μLED Arrays for Optogenetic Stimulation
Realtime feature extraction using MAX-like convolutional network for human posture recognition
Implementation of switching circuit models as transfer functions
Anticipatory access pipeline design for phased cache
Current tuneable CMOS transconductor for filtering applications
A low-power group-based VLD design
Low-power design of Reed-Solomon encoders
A new common subexpression elimination algorithm for implementing low complexity FIR filters in software defined radio receivers
A texture-based tamper detection scheme by fragile watermark
A piecewise constant switched chaotic circuit with rect-rippling return maps
Exact Deteministic and Stochastic Analysis of Multirate Systems with Application to Fractional Sampling Rate Alteration
A look-ahead method for pan and zoom detection in video sequences using block-based motion vectors in polar coordinates
A New Nonlinear Algorithm for the Removal of Impulse Noise from Highly Corrupted Images
Comparison of Millimeter Wave Quadrature-VCOs for 28GHz 5G Applications
High Sensitivity Near-zero Power Wakeup Receiver for Backscattering RF Tags
A multi-bit FIR filtering technique for two-point modulators with dedicated digital high-pass modulation path
Architectures for MIMO-OFDM simplified decision directed channel estimation
A high-speed PRBS generator using flip-flops employing feedback for distributed equalization
Motion Detection Circuits for a Time-To-Travel Algorithm
Linear and bi-linear interpolation circuits using selector logics and their evaluations
Synchronization in Complex Hybrid Networks
High Sample Rate Architectures for Block Adaptive Filters
Evaluation of an improved input current shaper used as power factor corrector in electronic ballast
A robust DC current generation and measurement technique for deep submicron circuits
Accurate analytical delay modeling of CMOS clock buffers considering power supply variations
On Dynamics of a Learning Associative Memory
Area-efficient capacitor-less LDR with enhanced transient response for SoC in 65-nm CMOS
Towards Autonomous Intra-Cortical Brain Machine Interfaces: Applying Bandit Algorithms for Online Reinforcement Learning
Accelerated Filtering and in situ Verification for Energy-Optimized Genome Read Mapping
Modeling SAT-Attack Search Complexity
A cascaded continuous-time Sigma Delta modulator with 80 dB dynamic range
Is there life after bit error rate or before?
A 12-Bit Synchronous-SAR ADC for IoT Applications
Efficient data structures for density estimation for large high-dimensional data
Efficient output-pruning of the 2-D FFT algorithm
A placement management circuit for efficient realtime hardware reuse on FPGAs targeting reliable autonomous systems
Power Complementary and Linear Phase Filter Banks
Brand-Aware Fashion Clothing Search using CNN Feature Encoding and Re-ranking
Live demonstration: FPAA Demonstration Controlled through Android-Based Device
The effect of switch resistance on pipelined ADC MDAC settling time
WL under-driving scheme with decremental step voltage and incremental step time for high-capacity NAND flash memory
A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique
A nonlinear observability formulation for power systems incorporating generator dynamics
Result on the approximation of multivariable functions - Generalization of a theorem of Walsh
Exploiting application locality to design fast, low power, low complexity neural classifiers
A High-Throughput Hardware Implementation of SHA-256 Algorithm
Securing IoT Monitoring Device using PUF and Physical Layer Authentication
A Flexible Embedded SRAM IP Compiler
Design on new tracking circuit of I/O buffer in 0.13µm cell library for mixed-voltage application
On global dynamic behavior of weakly connected cellular nonlinear networks
Reverse tracing of forward state metric in Log-Map and MAX-Log-MAP decoders
Novel Generic Two-Amplifier Oscillator Structures
Bessel-Butterworth transitional filters
Improved bus-shift coding for low-power I/O
Fast inversion in GF(2m) with polynomial basis using optimal addition chains
Body effect compensated switch for low voltage switched-capacitor circuits
A Computationally Efficient Wideband Direction-of-Arrival Estimation Method for L-Shaped Microphone Arrays
A quasi-digital pressure/touch sensor prototype for orbital targets contact event monitoring
An array based technique for routing messages in distributed double loop networks
A radix-3 SAR analog-to-digital converter
Efficient Digital Beamforming for Satellite Payloads Using a 2D FFT-Based Parallel Architecture
Accelerating AdaBoost algorithm using GPU for multi-object recognition
PLATO P: PLA Timing Optimization by Partitioning
Analysis of Internet topology data
Prefix Sequence: Optimization of Parallel Prefix Adders using Simulated Annealing
Dynamic throughput estimation for wireless multimedia transmission
Versatile resistive switching in niobium oxide
Demonstration of latency reduction in electrical interconnections using optical fanout
Active noise control system without secondary path model
A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications
Application of the Piecewise Ellipsoidal Approximation Technique to Design Centering
Adaptive PLL-free Optical Coherent Receiver for Joint Polarization Tracking and Equalization in Phase-Shift-Keying for Next-generation Optical Communication
SPICE implementation of nonuniform frequency-dependent transmission lines
Constant current charging in series-series compensated non-radiative wireless power link
VLSI architecture based on packet data transfer scheme and its application
Development of a Hyper-Parallel Optical Fuzzy-Neural Network Using Images
Frequency compensation of high-speed, low-voltage CMOS multistage amplifiers
Improving the stability of on-chip automatic tuning loops for continuous-time filters with an analog adaptive controller
Timing error correction techniques for voltage-scalable on-chip memories
A reconfigurable A/D converter for 4G wireless systems
A boost-switched capacitor-inverter with a multilevel waveform
An ElectroStatic Discharge Algorithm for Electric Vehicle Li Ion Battery Parameters Estimation
Methodology and technology for virtual component driven hardware/software co-design on the system-level
Baseline resistance cancellation circuit for high resolution thiolate-monolayer-protected gold nanoparticle vapor sensor arrays
Decomposition and recognition of a multi-channel audio source using matching pursuit algorithm
Spatiotemporal pattern formation in the ACE16k CNN chip
Optimizing finite state machines for system-on-chip communication
A theoretical investigation on exact blind channel and input sequence estimation
Potential and pitfalls of silicon photonics computing and interconnect
A hybrid comparator for high resolution SAR ADC
Optimized and Reconfigurable Hardware Design for ASCON AEAD and Hash Standards
Short-Range Quality-Factor Modulation (SquirM) for Low Power High Speed Inductive Data Transfer
A new low-voltage CMOS unity-gain buffer
Classification of synchronized states in CNNs with higher order cells
A low-power 10-bit continuous-time CMOS Sigma Delta A/D converter
A scalable encryption method allowing backward compatibility with JPEG2000 images
An Integration and Time-Sampling based Readout Circuit with Current Compensation for Parallel MAC operations in RRAM Arrays
Propagating analog signals through a fully digital network on an electronic system prototyping platform
An improved coarse synchronization scheme in 3GPP LTE downlink OFDM systems
On the New Analytical Design of Efficient Inductive Links with Maximum Biomedical Wireless Power Transfer Capability and Area Controllability
Separator-based Graph Embedding into Higher-dimensional Grids with Small Congestion
Millimeter-wave CMOS device modeling and simulation
Temporal Consistent Oil Painting Video Stylization
Low quiescent current variable output digital controlled voltage regulator
Low-noise CMOS Fluorescence Sensor
A fixed point exponential function accelerator for a neuromorphic many-core system
Averaging Dynamic Element Matching Architectures for R-2R Digital-to-Analog Converters
Minimum energy point tracking for sub-threshold digital CMOS circuits using an in-situ energy sensor
A comparative overview of two transimpedance amplifiers for biosensing applications
Rail-to-rail CMOS complementary input stage with alternating active differential pairs
Research on Stepsize Control in the BDF Method for Solving Differential Algebraic Equations
Development of a Near Lossless Image Compression Technique Using Mixed Transforms
Hardware Architecture of a Parallel Pattern Matching Engine
Time-Domain Analysis of Optimum Bias Point in Inverse Class-F Power Amplifiers
Channel characterization for implant to body surface communication
Realization of 3-D Separable-denominator Digital Filters with Very Low l2-Sensitivity
A novel visual object tracking algorithm using multiple spatial context models and Bayesian Kalman filter
A multi-hypothesis decoder for multiple description video coding
Fault Diagnosis for Hybrid AC/DC Power System Based on Convolutional Neural Network with Transfer Learning
A novel image compression algorithm by using Log-Exp transform
Improved design of digital 1-D and 2-D notch filters using general feedback structure
RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards
A configurable CMOS memory platform for 3D-integrated memristors
A new switch-mode noise-constrained transform domain NLMS adaptive filtering algorithm
Reed-Solomon behavioral virtual component for communication systems
Two-rules-based boundary layer fuzzy controller for DC to DC switching regulators
CanFind-a semantic image indexing and retrieval system
A novel method for discrete fractional Fourier transform computation
3-D floorplanning algorithm to minimize thermal interactions
IIR digital filter design by partial second-order factorization and iterative WLS approach
Matrix Decomposition Based Low-Complexity FIR Filter: Further Results
A Lossless Neural Recording SoC for Epilepsy Monitoring with up to 84.9-dB Dynamic Range and Rail-to-Rail Stimulation Artifact Tolerance
A New VLSI 2-D Fourfold-rotational-symmetry Filter Architecture Design
A Class of Fully-Differential Basic Building Blocks Based on Unity-Gain Differnence Feedback
A High Accuracy Predictive Logarithmic Motion Estimation Algorithm for Video Coding
Effective Filtering of Requantization Error in Dual Quantized CTDSM using FIR DAC
An alternative approach to the design and synthesis of higher-order Bode-type variable-amplitude wave-digital equalizers
Thermopyle-based contactless temperature sensors for low-power applications
A New High Throughput and Area Efficient SHA-3 Implementation