yusuke1997/dblp-id-title huggingface dataset:
Dynamic Multi-Context Reconfiguration Scheme for Reconfigurable Parallel Image Processing System with Three Dimensional Structure
Synchron-Duplex-Rechner
Performance-Energy Trade-off in CMPs with Per-Core DVFS
Intelligent Vehicle Handling: Steering and Body Postures While Cornering
Towards Integration of User Interaction and Context Event Processing in Intelligent Living Environments
Perception-influenced Animation
A Very Fast and Quasi-accurate Power-State-Based System-Level Power Modeling Methodology
Object-oriented Software Architecture for Distributed Systems
Shrinking L1 Instruction Caches to Improve Energy-Delay in SMT Embedded Processors
Comparison of Dependency Measures for the Detection of Mutual Influences in Organic Computing Systems
SAMoA: An experimental platform for Situation-Aware Mobile Assistance
A metric for the energy-efficiency of dynamically reconfigurable systems
Towards Self-organising Smart Camera Systems
Lightweight Hardware Synchronization for Avoiding Buffer Overflows in Network-on-Chips
Eine Methode zur Untersuchung von Programmen bezüglich eines Betriebssystems mit virtuellem Speicher - Anwendung zur Vorhersage des Programmverhaltens
Constructive AIG optimization through functional composition
Der assoziative Universalprozessor AM 3 : Architektur, Befehlssatz und objekt-orientiertes Programmierinterface
Dual-IS: Instruction Set Modality for Efficient Instruction Level Parallelism
Adaptive Content Distribution Network for Live and On-Demand Streaming
Architecture of Computing Systems - ARCS 2009, 22nd International Conference, Delft, The Netherlands, March 10-13, 2009. Proceedings
Probabilistische Sensorbewertung für autonome mobile Roboter
Portabilität zu welchem Preis? Experimentelle Untersuchungen an einer Linda-Implementierung
Prozessorintegration und Speicheranbindung dynamisch rekonfigurierbarer Funktionseinheiten
Deploying Hardware Locks to Improve Performance and Energy Efficiency of Hardware Transactional Memory
A System Model for Flexible Multi-objective Adaptation Planning in Hybrid Self-Adaptive and Self-Organizing Systems
SoCWire: A Robust and Fault Tolerant Network-on-Chip Approach for a Dynamic Reconfigurable System-on-Chip in FPGAs
Mapping List Algorithms on Parallel Systems
Systematischer Entwurf eines 32-Bit Mikroprozessors als Ausbildungsaufgabe
Self-Stabilizing Microprocessor - Analyzing and Overcoming Soft-Errors (Extended Abstract)
Architecture and Modelling of a Fault-tolerant Workstation Cluster
ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany
Interrupt-Oganisation bei Realzeit-Datenverarbeitunsanlagen
Towards a Priority-Based Task Distribution Strategy for an Artificial Hormone System
Towards Actor-oriented Programming on PGAS-based Multicore Architectures
A Dynamic Scheduling and Placement Algorithm for Reconfigurable Hardware
Cellular Location Determination - Reliability and Trustworthiness of GSM Location Data
Emergent Behaviour in Collaborative Indoor Localisation: An Example of Self-organisation in Ubiquitous Sensing Systems
A Synchronous Multicast Application for Asymmetric Intra-campus Networks: Definition, Analysis and Evaluation
CASCADE: Congestion Aware Switchable Cycle Adaptive Deflection Router
STAFF: State Transition Applied Fast Flash Translation Layer
Performance Parameters for Parallel Machines
Direct Backtracking: An Advanced Adaptation Algorithm for Pervasive Applications
Fault Localization in NoCs by Timed Heartbeats
The Value of Handhelds in Smart Environments
Optimizing Stencil Application on Multi-thread GPU Architecture Using Stream Programming Model
EVASCAN: Methodik zur Evaluierung, Analyse und zum Test von Echtzeitsystemen und Echtzeitbetriebssystemen
Autonomous Learning of Load and Traffic Patterns to Improve Cluster Utilization
Exploring Model Quantization in GenAI-Based Image Inpainting and Detection of Arable Plants
An Enhanced DMA Controller in SIMD Processors for Video Applications
Finite-State Modeling, Analysis and Testing of System Vulnerabilities
A Video Monitoring Application forWireless Sensor Networks using IEEE 802.15.4
Survey on Evaluation of Context Provisioning Middleware
Verlässlichkeit bei Wiederverwendung von IT-Komponenten - zum Stand der Normungsaktivitäten
An Instruction to Accelerate Software Caches
Firefly Flashing Synchronization as Inspiration for Self-synchronization of Walking Robot Gait Patterns Using a Decentralized Robot Control Architecture
FPGA-Based Network-Attached Accelerators - An Environmental Life Cycle Perspective
A Vision for Deep Reinforcement Learning with a Classifier System
Adaptive Cache Structures
A Quantitative Comparison of PRAM based Emulated Shared Memory Architectures to Current Multicore CPUs and GPUs
Architektur und Betrieb von Rechensystemen, 8. GI-NTG-Fachtagung, Karlsruhe, 26.-28. März 1984, Proceedings
Efficient Memory Allocations on a Many-Core Accelerator
Möglichkeiten und Verfahren zur schnellen Datenbank-Recovery bei einzelnen zerstörten Datenbankblöcken
Arithmetic Unit for Computations in GF(p) with the Left-Shifting Multiplicative Inverse Algorithm
Überlegungen beim Entwurf eines mikroprogrammmierten Kleinrechners
Utilizing Fault Tolerance for Achieving QoS in Ad-hoc Networks
Protected Functions: User Space Privileged Function Calls
Ein mathematisches Modell zur Bestimmung der Ausnutzung und des Durchsatzes eines Betriebsmittelvergabesystems
Ibis: a Java-centric Programming Environment for Computational Grids
Ein Rechnerkonzept mit assoziativem Arbeitsspeicher - Prinzip und Organisation
Process-Level Simulation Testbed for Assessing Field Robot Swarms
Architecture of Computing Systems - ARCS 2006, 19th International Conference, Frankfurt/Main, Germany, March 13-16, 2006, Proceedings
Ein Orientierungsdienst im Informationsverarbeitungsverbund
OpenVADL: An Open Source Implementation of the Vienna Architecture Description Language
Hybrid parallelization of a seeded region growing segmentation of brain images for a GPU cluster
An Efficient Frequency Scaling Approach for Energy-Aware Embedded Real-Time Systems
A Virtually Shared Memory Model with Customized Coherency
The Decentralized Non-Blocking RelaX Commit Protocol
Transistor Sizing Analysis of Regular Fabrics
BCH 2-Bit and 3-Bit Error Correction with Fast Multi-Bit Error Detection
A Hybrid Transport/Control Operation Triggered Architecture
Unify: Uncertainty Incorporated Federated Learning for Object Detection
Dynamic Multimodal Cyclist Behaviour Modelling: From Representation Insights to Federated Collaboration
Flexible Hardware Support for Interworking Systems
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
Heterogenous Data Fusion via a Probabilistic Latent-Variable Model
Architecture of Computing Systems - ARCS 2008, 21st International Conference, Dresden, Germany, February 25-28, 2008, Proceedings
Configuration Caching in Adaptive Computing Systems Using Association Rule Mining (ARM)
Receive-Side Notification for Enhanced RDMA in FPGA Based Networks
A Processor Architecture with Effective Memory System for Sort-Last Parallel Rendering
OpenCL-Based 6D-Vision on Heterogeneous System on Chips
A Context Aware and Self-improving Monitoring System for Field Vegetables
Design Guidelines towards Compact Litho-Friendly Regular cells
Hardware/Software Co-designed Security Extensions for Embedded Devices
Reducing NoC and Memory Contention for Manycores
Autonomic Management Architecture for Flexible Grid Services Deployment Based on Policies
Architektur von Rechensystemen, Arbeitsteilige Systemarchitekturen: Konzepte, Lösungen, Anwendungen, Trends - Vorträge der 14. ITG/GI-Fachtagung ARCS '97, 8.-11. September 1997, Rostock, Germany
Exploiting Thermal Coupling Information in MPSoC Dynamic Thermal Management
Ultra-Fast Downloading of Partial Bitstreams through Ethernet
ARCS '10 - 23th International Conference on Architecture of Computing Systens 2010, Workshop Proceedings, February 22-23, 2010, Hannover, Germany
Parallelverarbeitung und modularer Systemaufbau
Keynote: Communicating Cars: A Case for Ubiquitous Computing in the Automotive Domain
A Hierarchical Distributed Control for Power and Performances Optimization of Embedded Systems
Dynamic Scheduling of Pipelined Functional Units in Coarse-Grained Reconfigurable Array Elements
Parallelization Approaches for Hardware Accelerators - Loop Unrolling Versus Loop Partitioning
Experiences with String Matching on the Fermi Architecture
Lastverteilung in eng gekoppelten Mehrrechnersystemen mit beschränkter Nachbarschaft
Testing Safety Techniques by Injection of Systematically Selected Errors
A Language for Concurrent Processing based on Petri Nets
Partial Configuration Design and Implementation Challenges on Xilinx Virtex FPGAs
Performance Gain of a Data Flow Oriented ISA as Replacement for Java Bytecode
Grid Virtualization Engine: Providing Virtual Resources for Grid Infrastructure
Multiple devices under MPICH
Some aspects of the STARLET project
Architecture of Computing Systems - ARCS 2017 - 30th International Conference, Vienna, Austria, April 3-6, 2017, Proceedings
A Generic Network Interface Architecture for a Networked Processor Array (NePA)
FPGA Implementation of Cellular Automata Compared to Software Implementation
Parallel Computation of High Voltage Apparatus on Different Architectures
Inter-warp Instruction Temporal Locality in Deep-Multithreaded GPUs
Customized Placement for High Performance Embedded Processor Caches
Konfigurationsmanagement in verteilten Betriebssystemen
HLS Enabled Partially Reconfigurable Module Implementation
Hardware-Messungen und ihre Anwendungen auf die Ermittlung von Befehlsstatstiken
Adaptive and Scalable Predictive Page Policies for High Core-Count Server CPUs
Redundant Execution on Heterogeneous Multi-cores Utilizing Transactional Memory
An Organic Computing System for Automated Testing
Physiological Data in Future Livinig Environments
A Tool for measuring and Monitoring Distributed Systems During Operation
Reusable Design of Inter-chip Communication Interfaces for Next Generation of Adaptive Computing Systems
Entwicklung eines Parallelrechner-Modells ausgehend vom Entwurf paralleler Programme
Lastmodellierung mit stochastischen Graphen zur Verbesserung paralleler Programme auf Multiprozessoren mit Fallstudie
Rechnergestütztes Krankenhauskommunikations- und Steuerungssystem: Verfügbarkeits- und Leistungsanforderungen
Das SUPRENUM-System: Architektur, Software und Anwendungen (eingeladener Vortrag)
Investigating Transactional Memory for High Performance Embedded Systems
"Companion" - eine multimediale, webbasierte Lehr- und Lernumgebung
Evaluating Sampling Based Hotspot Detection
Distributed Modular Toolbox for Multi-modal Context Recognition
A Block Device Driver for Parallel and Fault-tolerant Storage
On the Combination of Assertions and Virtual Prototyping for the Design of Safety-Critical Systems
FPGA-based Crossbar Switch Uses Partial Reconfiguration
Der>S<puter: Ein dynamisch rekonfigurierbares Mikroarchitekturmodell zur Erreichung des maximalen Instruktionsparallelitätsgrades
Key Microarchitectural Innovations for Future Microprocessors
A CAM-Free Exascalable HPC Router for Low-Energy Communications
Independent Kernel/Process Checkpointing on Non-Volatile Main Memory for Quick Kernel Rejuvenation
Bluetooth and Short Range Wireless Data Networks - the promise of ubiquitous data access
Distributed Energy Measurements in WSN Testbeds with a Sensor Node Management Device (SNMD)
Dynamic Reconfiguration of FlexRay Schedules for Response Time Reduction in Asynchronous Fault-Tolerant Networks
Dependability Evaluation of Real-Time Network Interfaces
COMMA: A Communications Methodology for Dynamic Module-based Reconfiguration of FPGAs
Der Einfluss; eines Pufferspeichers auf die Operationsgeschwindigkeit kommerzieller Datenverarbeitungsanlagen
DB-Sharing vs. DB-Distribution, die Frage nach dem Systemkonzept künftiger DB/DC-Systeme
Input Tools as a Basis for Communicating Processes
The Design of a Subprocessor with Dynamic Microprogramming with MIMOLA
Vorschläge für die Organisation einer flexiblen Multiprozessoranlage
Zur Wirksamkeit von "Look-Ahead"
Energy Management for Embedded Multithreaded Processors with Integrated EDF Scheduling
Analyzing Safety-Critical Systems Using Extended Fault Trees
Grundzüge eines Vorschlags zur Erweiterung des KDCS-TAS-Kerns für die verteilte Transaktionsverarbeitung
Producer-Consumer: The Programming Model for Future Many-Core Processors
Hybrid Resource Discovery Mechanism in Ad Hoc Grid Using Structured Overlay
Architektur und Betrieb vpn Rechensystemen, 10. GI/ITG-Fachtagung, 9.-11. März 1988, Paderborn, Germany, Proceedings
Software Functional Fault Injector for SDDS
Data Paths in Wearable Communication Networks
Microprocessor Features a la Carte (eingeladener Vortrag)
Exploring ILP and TLP on a Polymorphic VLIW Processor
Adaptive Cache Infrastructure: Supporting Dynamic Program Changes following Dynamic Program Behavior
Towards a Reliability-aware Design Flow for Kahn Process Networks on NoC-based Multiprocessors
Prototyping an Energy Harvesting Wireless Sensor Network Application Using HarvWSNet
Forecasting Technological Innovation
An Architecture for Solving the Eigenvalue Problem on Embedded FPGAs
Prozessorarchitekturen für J2K
Component-Based Hardware-Software Co-design
Towards Autonomic Networking Using Overlay Routing Techniques
Architektur von Rechensystemen, Systemarchitektur auf dem Weg ins 3. Jahrtausend: Neue Strukturen, Konzepte, Verfahren und Bewertungsmethoden - Vorträge der 15. GI/ITG-Fachtagung ARCS '99 und der APS'99 (Arbeitsplatzrechensysteme), 4.-7. Oktober 1999, Jena, Germany
Design of Gate Array Circuits Using Evolutionary Algorithms
Die mehrfädige Prozessorarchitektur Rhamma
Compiler-Assisted Selection of a Software Transactional Memory System
Workshops zur Architektur von Rechensystemen - Vorträge Workshops im Rahmen der 15. GI/ITG-Fachtagung ARCS '99, 4.-7. Oktober 1999, Jena, Germany
Simultaneous Speculation Scheduling - A Technique for Speculative Dual Path Execution
Probleme bei der vertikalen Verlagerung auf einem Großrechner
A Scheduling Approach for Efficient Utilization of Hardware-Driven Frequency Scaling
Content addressing in data bases by special peripheral hardware: a proposal called "Suchrechner"
π-Red + - ein codeausführendes Reduktionssystem zur Transformation von Programmen eines angewandten λ-Kalküls
Static Extraction of Memory Access Profiles for Multi-core Interference Analysis of Real-Time Tasks
A Low Noise Unikernel for Extrem-Scale Systems
HPC Performance Domains on Multi-core Processors with Virtualization
Multiprocessors and other parallel systems - an introduction and overview
Integrated Tool Chain for Recording, Handling, and Utilizing Large, Multimodal Context Data Sets for Context Recognition Systems
An Approach for Performance Estimation of Hybrid Systems with FPGAs and GPUs as Coprocessors
Kreuzkatalytische Netzwerke als Wirtschaftsprinzip
Scaling Logic Locking Schemes to Multi-module Hardware Designs
Mahler: Sketch-Based Model-Driven Virtual Prototyping
Achieving scalability for job centric monitoring in a distributed infrastructure
A Y-Chart Based Tool for Reconfigurable System Design
Context-Aware Annotations for Distributed Mobile Applications
Classification-Based Improvement of Application Robustness and Quality of Service in Probabilistic Computer Systems
nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models
Fault Tolerant and Adaptive Path Planning for Mobile Robots Based on Health Signals
Design Space Exploration of Hybrid Ultra Low Power Branch Predictors
A Novel Universal Sequencer Hardware
Struktur einer Rechenanlage mit der Fähigkeit zu adapativem Verhalten
Workload Modeling for Computer Networks
ECC Memory for Fault Tolerant RISC-V Processors
Superlinear Scalability in Parallel Computing and Multi-robot Systems: Shared Resources, Collaboration, and Network Topology
3D DRAM and PCMs in Processor Memory Hierarchy
Towards Power Consumption Reduction by User Behavior Monitoring at Application level
Work Stealing Strategies for Parallel Stream Processing in Soft Real-Time Systems
Software-Messungen von Prgorammparametern unter MASTER
Experimental Generation of Configurable Circuits for Rotationally Symmetric Functions
Comparison of GPU and FPGA Implementation of SVM Algorithm for Fast Image Segmentation
Der Einfluß der Registerstruktur eines Zentralprozessors auf dessen Operationsgeschwindigkeit
Architecture of Computing Systems - ARCS 2015 - 28th International Conference, Porto, Portugal, March 24-27, 2015, Proceedings
ARCS 2006 - 19th International Conference on Architecture of Computing Systems, Workshops Proceedings, March 16, 2006, Frankfurt am Main, Germany
Prototyping and Application Development Framework for Dynamically Reconfigurable DSP Architectures
An FPGA Dynamically Reconfigurable Framework for Modular Robotics
Reducing Data Center Resource Over-Provisioning Through Dynamic Load Management for Virtualized Network Functions
Using Dynamic Task Level Redundancy for OpenMP Fault Tolerance
From Structured to Unstructured: A Comparative Analysis of Computer Vision and Graph Models in Solving Mesh-Based PDEs
Integrating Context Awareness with SOA: Case Studies for Serviceoriented and Context-based Architectures
How Efficient are Creatures with Time-shuffled Behaviors?
Verteilte Systeme - Eine noch zu nutzende Chance
The Power of Training: How Different Neural Network Setups Influence the Energy Demand
RECAST: An Evaluation Framework for Coarse-Grain Reconfigurable Architectures
Satellite Onboard Data Reduction Using a Risc-V Core Inside an RTG4-Based Data Processing Pipeline
Autonomes mehrstufiges Busverbindungsnetz für einen Multirechner
Monitoring in der Prozessrechentechnik
Separable 2D Convolution with Polymorphic Register Files
Variability Aware Sub-Wavelength Lithography Characterization for Robust SRAM Design
Fault tolerant multiplication based on convolution
LIRAC: Using Live Range Information to Optimize Memory Access
BPAFrame Phase 2 - a Framework for Workflow Management
Model-based Testing of Autonomous Systems based on Coloured Petri Nets
Anonymous-CPABE: Privacy Preserved Content Disclosure for Data Sharing in Cloud
An Embedded GC Module with Support for Multiple Mutators and Weak References
Improving Resource Discovery in the Arigatoni Overlay Network
Kombinatorische Beschreibung und Lösung von Organisationsproblemen
Universal Configurable Machine (UCM): Reconfigurable Computing, basierend auf grobkörnigen Blockstrukturen
Unstructured Membership Management for Byzantine Fault Tolerance in Clouds
Parametric Architecture for Function Calculation Improvement
APL*DS - Ein Programmsystem zur Spezifikation und Simulation von Computerhardware auf der Registertransferebene
Towards a General Approach to Mobile Profile Based Distributed Grouping
A Garbage Collection Technique for Embedded Multithreaded Multicore Processors
Parallelization Strategies to Speed-Up Computations for Terrain Analysis on Multi-Core Processors
Modelling of Parameters in Supercomputer Workloads
Hierarchical Dependability Models Based on Markov Chains
Entwurf und Validierung virtueller Prototypen heterogener eingebetteter Systeme in einer Workstation-Umgebung
An Or-Parallel Logic Programming Machine for Non-shared Memory Architectures
Self-organizing Software Components in Distributed Systems
Remote Service Call (RCS): An Network Operating System Kernel for Heterogeneous Distributed Systems
Ein mehrfädiger Java-Mikrocontroller für eingebettete Systeme
Enforcement of Architectural Safety Guards to Deter Malicious Code Attacks through Buffer Overflow Vulnerabilities
A Dynamic Instruction Scratchpad Memory for Embedded Processors Managed by Hardware
Synchronous Reactive Fine Grain Tasks Management for Homogeneous Many-Core Architectures
Engineering and Mastering Interwoven Systems
Einbindung einer intelligenten Massenspeicher-Schnittstelle in Unix
Expressing validity estimates in smart sensor applications
PowWow : Power Optimized Hardware/Software Framework for Wireless Motes
Reconfigurable RISC - A New Approach for Space-Efficient Superscalar Microprocessor Architecture
Pulse coupled neural networks with adaptive synapses for image segmentation
I/O-efficient approximation of graph diameters by parallel cluster growing - a first experimental study
Implementation and Evaluation of a Parallel-External Algorithm for Cycle Structure Computation on a PC-Cluster
Zertifizierung Sicherheitskritischer Softwarebasierter Systeme
Extending the MVC Design Pattern towards a Task-Oriented Development Approach for Pervasive Computing Applications
Parallelism and Retargetability in the ILDJIT Dynamic Compiler
A High-Throughput System Architecture for Deep Packet Filtering in Network Intrusion Prevention
Exploiting Bit-level Parallelism in GPGPUs: a Case Study on KeeLoq Exhaustive Search Attacks
Distribution in the BirliX Operating System
MESI-Based Cache Coherence for Hard Real-Time Multicore Systems
Anforderungen an zukünftige Strukturen von Betriebssystemen am Beispiel der Weiterentwicklung des BS2000
A Priority-Driven, Consistency-Preserving Strategy for the Relocation Problem of Replicated Files
Splitting Double Precision FPUs for Single Precision Interval Arithmetic
Clans & Chiefs
Analyse von Betriebssystem- Modellen für Rechnersysteme mit Multiprogramming and Paging
Deriving Dependability Measures of Measurements Recorded in a Matrix
Entwurf eines Betriebssystems mit Selfchecking-Eigenschaften
A Hybrid NoC Enabling Fail-Operational and Hard Real-Time Communication in MPSoC
A Comparison of Parallel Programming Models of Network Processors
Validation of a Protocol for Application Layer Services
Comparison of a Binary Signed-Digit Adder with Conventional Binary Adder Circuits on Layout Level
Hyperreconfigurable Architectures as Flexible Control Systems
Impact of power management on temperature and reliability evolution for an embedded many-core architecture
A BAW based Transceiver used as Wake-Up Receiver
Design Principles for Synthesizable Processor Cores
Mehrprozessor-Datenbanksysteme - Ein Überblick über die wichtigsten Entwurfsprobleme
Parallelrechner und physikalische Experimente
Nutzung neuer Speicherarchitekturen in Hochleistungs-Transaktionssystemen
9th Workshop on Parallel Systems and Algorithms (PASA) held at the 21st Conference on the Architecture of Computing Systems (ARCS), February 26th, 2008, in Dresden, Germany
Support of Reflective Mobile Agents in a Smart Office Environment
Rendezvous Layer Protocols for Bluetooth-Enabled Smart Devices
A Synthesizable Temperature Sensor on FPGA Using DSP-Slices for Reduced Calibration Overhead and Improved Stability
An Observer/Controller Architecture for Adaptive Reconfigurable Stacks
Application Characterization for Wireless Network Power Management
Autonomous Ship Collision Avoidance Trained on Observational Data
CPM: A Cross-Layer Framework to Efficiently Support Distributed Resources Management
Connection Structures - a Component of Parallel Programming Languages
Exploring the ARM Coherent Mesh Network Topology
Hardware APIs: A Software-Centric Approach for Automated Derivation of MPSoC Hardware Structures Based on Static Code Analysis
Feedback-Guided Dataset Shaping for Automated Downstream Task Optimization
Automatische Codegenerierung für Protokolle in der ISO-Syntax ASN.1
Open the Black Box: Self-Explainability of AI in Autonomous Marine Systems
Estimation of End-to-End Packet Error Rates for NoC Multicasts
An Efficient Multi Quantile Regression Network with Ad Hoc Prevention of Quantile Crossing
How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT
Fehlerbehebung, Sicherung und Nebenläufigkeit in Verteilten Systemen
Multilevel Sensor Node Simulation within a TLM-like Network Simulation Framework
Wiederverwendungsgerechte Codegenerierung von FEC-Applikationen für dynamisch rekonfigurierbare Systeme
A Code-Based Analytical Approach for Using Separate Device Coprocessors in Computing Systems
Detecting Context in Distributed Sensor Networks by Using Smart Context-Aware Packets
A Parallel Fault-tolerant Routing Algorithm for Real-Time Media Transmission
Architektur von Rechensystemen, Tagungsband, 11. ITG/GI-Fachtagung, 7.-9. März 1990, München, Germany