yusuke1997/dblp-id-title huggingface dataset:
A 65nm CMOS wide-band LNA with continuously tunable gain from 0dB to 24dB
An Ultra-Low Power Sigma-Delta Neuron Circuit
Transformer-Combining Digital PA with Efficiency Peaking at 0, -6, and -12 dB Backoff in 32nm CMOS
On dynamic behavior of weakly connected cellular neural networks
System-level analysis of mesh-based hybrid optical-electronic network-on-chip
A novel decoder architecture for error resilient JPEG2000 applications based on MQ arithmetic
Ferroelectric Tunneling Junctions for Edge Computing
Extended results for minimum-adder constant integer multipliers
Design and optimization of a high PSRR CMOS bandgap voltage reference
Reconstruction of Sequences from Nonuniform Samples
Medical image classification using birth-and-death MCMC
Design of a switch for network on chip applications
Improved DASH for Cross-Random-Access Prediction Structure in Video Coding
A new area-efficient 4-PAM 10 Gb/s CMOS serial link transmitter
Directional Variance: A measure to find the directionality in a given image segment
An Ultra-Low-Power Analog-Digital Hybrid CNN Face Recognition Processor Integrated with a CIS for Always-on Mobile Devices
Performance improvement of the H.264/AVC deblocking filter using SIMD instructions
Study of Multisolution Quadratic Load Flow Problems and Applied Newton-Raphson Like Methods
An MMT Module for 4K/120fps Temporally Scalable Video
A low-voltage CMOS class-AB operational amplifier
Built-in self-test and fault diagnosis for lookup table FPGAs
Causal IIR perfect reconstruction subband coding
Reducing multiplier energy by data-driven voltage variation
Concept of frequency-transconductance tuning of bipolar voltage-controlled oscillators
A fully integrated CMOS magnetic current monitor
Joint time delay and pitch estimation for speaker localization
A reconfigurable superimposed 2D-mesh array for channel equalization
A 200Mbps 0.02nJ/b dual-mode inductive coupling transceiver for cm-range interconnection
Design of an RGBW color VGA rolling and global shutter dynamic and active-pixel vision sensor
Wide dynamic range, 0.8 to 6 GHz LNA in 45 nm digital SOI CMOS
A new high gain low voltage 1.45 GHz CMOS mixer
An area- and power-efficient FIFO with error-reduced data compression for image/video processing
Biosensor Integrated with Transducer to Detect the Glucose
High-speed D/A Conversion with Linear Phase Sin x/x Compensation
Digitally tuned bandpass sigma delta modulator for wireless communications
2D feedback system design: the tracking and disturbance rejection problems
A compact CMOS UWB LNA using tunable active inductors for WLAN interference rejection
Memristor cellular automata for image pattern recognition and clinical applications
Symbolic Dynamics based Method for Rigorous Study of the Existence of Short Cycles for Chaotic Systems
Ternary max-min algebra for representation of reversible logic functions
A 1.5V, wide-input range, high-bandwidth, CMOS four-quadrant analog multiplier
Smart Pet Clothing for Monitoring of Health and Mood
Quantitative comparison of commercial CCD and custom-designed CMOS camera for biological applications
HDR-ARtiSt: High dynamic range advanced real-time imaging system
Efficient Quantization and Multi-Precision Design of Arithmetic Components for Deep Learning
Low-Complexity AES Architectures Resilient to Power Analysis Attacks
Dynamic Characteristics of a Digital Transducer
Delta operator based 2-D filter design using symmetry constraints
A New Statistical Approach for Glitch Estimation in Combinational Circuits
Time-based Memristor Crossbar Array Programming for Stochastic Computing Parallel Sequence Generation
On the equivalence and factorization of multivariate polynomial matrices
Fast buffer delay estimation considering time-dependent dielectric breakdown
On the Design of Active GaAs Multipliers
Effective shot boundary classification using video spatial-temporal information
An operating point elimination technique for weak-inversion log-domain filters with multiple operating points
Application of critical support vector machine to time series prediction
A novel rail-to-rail differential voltage-to-frequency converter for portable sensing systems
Modular Reduction without Precomputational Phase
Demonstration of spike timing dependent plasticity in CBRAM devices with silicon neurons
Floating-gate based tunable CMOS low-voltage linear transconductor and its application to HF g m -C filter design
A measure for the missed error detection probability for optimizing the forbidden symbol configuration in joint source-channel arithmetic codes
A compact layout technique to minimize high frequency switching effects in high speed circuits
A Nonlinear Macromodel for CMOS OTAs
A parallel hardware architecture for fast integral image computing
A theoretical and empirical error analysis of mobile 3D data acquisition system
A 15uW, 12 ppm/ ° C Curvature Compensated Bandgap in 0.85V Supply
Overlap-Save Commutators for High-Speed Streaming Data Filtering
Context based compression of FASTQ data
Robust Built-in Defect-Detection for Low Drop-Out Regulators using Digital Mismatch Injection
TCP-friendly assured forwarding (AF) video service in DiffServ networks
Communication by Chaotic Signals: The Inverse System Approach
Computing the transfer function for second-order 2D systems
Adaptive IIR notch filter with controlled bandwidth for narrow-band interference suppression in DS CDMA system
Exact hierarchical symbolic analysis of large analog networks using a general interconnection template
Sub-sequence video coding for improved temporal scalability
Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme
Hybrid GRAND Sphere Decoding: Accelerated GRAND for Low-Rate Codes
Analysis of Sub-Sampling PLL False Lock and Lock-in Range Estimation
Fast and Accurate Detection of Audio Adversarial Examples
Decoupled Multi-teacher Knowledge Distillation based on Entropy
Linear input range extension for low-voltage operational transconductance amplifiers in Gm-C filters
Signal Generation Techniques in CMOS for Millimeter-Wave and Terahertz Applications
ECG Cancellation for Surface Electromyography Measurement Using Independent Component Analysis
Forum: Wave-pipelining: Is it Practical?
A Compact Frequency Comb Generator for Large-Format Superconducting Microwave Kinetic Inductance Detectors
Minimax design of FIR filters with low group delay using enhanced sequential quadratic programming
Breaking the Trade-off Between Input Impedance and Mixer Paths in Sub-Harmonic N-Path Mixer-First RF Front-end
A mesh based motion tracking architecture
Flash Based In-Memory Multiply-Accumulate Realisation: A Theoretical Study
Statistically Optimal Null Filters for Processing Short Record Length Signals
A hybrid NEO-based spike detection algorithm for implantable brain-IC interface applications
FPGA Implementation for Large Scale Reservoir Computing based on Chaotic Boltzmann Machine
Live Demonstration: A 1280 by 720 by 3, 250 mW, 24 fps Hexachromatic Imager for Near-Infrared Fluorescence Image-Guided Surgery
A mixed-signal EEG interface circuit for use in first year electronics courses
A 40µW 915MHz Receiver with Sub-Passive Third-Harmonic Mixer Achieving -88dBm Sensitivity and Multi-Channel Selection
Highly linear continuous-time MASH ΔΣ ADC with dual VCO-based quantizers
Bifurcation control in an underactuated pendulum
An Active-Perturbation Method to Estimate Online Inertia and Damping in Electric Power Systems
A 1.2V 10-bit 5 MS/s CMOS cyclic ADC
Fast Basis Selection and Instantaneous Frequency Tracking for Audio Signal Analysis and Synthesis
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013
A 50Gb/s PAM-4 Optical Receiver with Si-Photonic PD and Linear TIA in 40nm CMOS
FleXilicon: a reconfigurable architecture for multimedia and wireless communications
Learn to segment attention object from low DoF image
Chaos Synchronization of High-Dimensional Dynamical Systems
APCPU: Adaptive-Pooling Compression Processing Unit for Energy-Efficient DNNs Processing
Interferer Induced Jitter Reduction in Bandpass CT ΣΔ Modulators for Receiver Applications
Analysis of jitter peaking and jitter accumulation in re-circulating delay-locked loops
Successive approximation FIR filter design
CMOS 2.4-GHz receiver front end with area-efficient inductors and digitally calibrated 90° delay network
A Novel Capacitor Placement Strategy in ASCCOT: Automatic Layouter for Switched Capacitor Circuits
Low-Power Complex Multiplier Pin Assignment Based on Spatial and Temporal Signal Properties
Analysis of DC-DC converters containing a transformer
QC-LDPC Decoding Architecture based on Stride Scheduling
Energy-optimal dynamic voltage scaling for sporadic tasks
A high-voltage-enabled recycling folded cascode OpAmp for nanoscale CMOS technologies
Use of the Remez algorithm for designing FIR filters utilizing the frequency-response masking approach
Disturbance Rejection With Rakeness-based Compressed Sensing: Method and Application to Baseline/Powerline Mitigation in ECGs
Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training
Area-efficient dynamic thermal management unit using MDLL with shared DLL scheme for many-core processors
A multicarrier QAM modulator for WCDMA basestation
On the optimal choice of integration time-step for raster simulation of a CNN for gray level image processing
Delay analysis of sub-path on fabricated chips by several path-delay tests
A high performance CAVLC encoder design for MPEG-4 AVC/H.264 video coding applications
Mixed-Precision Quantization and Parallel Implementation of Multispectral Riemannian Classification for Brain-Machine Interfaces
RF Wireless Power Transfer for EIT Neonate Lung Function Monitoring
Fast multi-frame motion estimation for H.264 and its applications to complexity-aware streaming
High robustness energy- and area-efficient dynamic-voltage-scaling 4-phase 4-rail asynchronous-logic Network-on-Chip (ANoC)
An Efficient Deep Learning System for Epileptic Seizure Prediction
Realisation of asymmetrical complex filters in log-domain
Investigating power system stability limits
A microsystem for magnetic immunoassay towards protein toxins detection
A chaotic CMOS true-random analog/digital white noise generator
Current-mode leapfrog ladder filters using CDBAs
Using local information for the reliable removal of noise from the output of the LoG edge detector
Accelerate Three-Dimensional Generative Adversarial Networks Using Fast Algorithm
Real-time multi-board architecture for analog spiking neural networks
Low-voltage CMOS analog four quadrant multiplier based on flipped voltage followers
Ultra-low Power Current Mode Distance Calculation Circuit for K-Means Clustering
A High-Accuracy and Fast-Correction Quadrature Signal Corrector Using an Adaptive Delay Gain Controller for Memory Interfaces
Approximate Multiplier Mapping for Unfairness Mitigation in Energy-Efficient DNNs
A 24 GHz dual-modulus prescaler in 90nm CMOS
Adaptive decision-feedback equalization for band-limited high-speed serial links
2V/3 Bias Scheme with Enhanced Dynamic Read Performances for 3-D Cross Point PCM
Hierarchical Bayer-pattern based background subtraction for low resource devices
Analysis and implementation of a DC-DC step-down converter for low output-voltage and high output-current applications
A Non-uniform Sampling Technique for A/D Conversion
A temperature insensitive continuous time ΔpH to digital converter
Field programmable Gm-C array for wide frequency range bandpass filter applications
A Multibit Delta-Sigma D/A Converter Using a Charge Integrating Sub-Converter
A Fourth-order, Audio-bandwidth, 87.5-dB SNDR SigmaDelta Modulator for MEMS Microphones
Complex Chebyshev approximation for IIR digital filters
On the Formal Derivaiton of a Systolic Array for Recursive Least Squares Estimation
Object tracking method using back-projection of multiple color histogram models
Improved Lorentzian Greedy Iterative Algorithm Based on Bi-directional Support Estimation for Compressed Sensing
Calculating transfer functions of CT sigma-delta modulators with arbitrary DAC waveforms
The Wide Input Range Automatic-Threshold Control Circuit for High Definition Digital Audio Interface
VBR video delivery under constrained resources using motion-aware optimal frame selection
Switching activity in bit-serial constant-coefficient multipliers
VLSI implementation of color interpolation in color difference spaces
Analog CMOS high-frequency continuous wavelet transform circuit
Asymmetric-Kernel CNN Based Fast CTU Partition for HEVC Intra Coding
Arbitrarily shaped video object coding by wavelet
Ultra-High Compression of Twiddle Factor ROMs in Multi-Core DSP for FMCW Radars
Three-decade programmable fully differential linear OTA
Incremental GMMSD2 with applications to feature extraction
HXNOR-PBNN: A Scalable and Parallel Spintronics Synaptic Architecture for Probabilistic Binary Neural Networks
A 250M-2.5GHz Two-Stage Duty-Cycle Corrector with 10%-90% Correction Range and 3-Cycle Correction Latency for Mitigating Aging Effects
Accurate estimation of optical flow for fully automated tracking of moving-objects within video streams
Single-stage AC/DC Boost-forward Converter with High Power Factor, Regulated Bus and Output Voltages
A Rectifier-free Piezoelectric Energy Harvester Circuit
Gibbs sampling with low-power spiking digital neurons
A Novel Low-Complexity Attention-Driven Composite Model for Speech Enhancement
Optimal weighted median filters under structural constraints
Nonlinearity-induced spurious tones and noise in digitally-assisted frequency synthesizers
Error concealment for 3D video transmission
Baseball event detection using game-specific feature sets and rules
High performance single clock cycle CMOS comparator
An FPGA-based approach for parameter estimation in spiking neural networks
A switched-capacitor degenerated, scalable gm-C filter-bank for acoustic front-ends
Visualizing the Laplace domain
A 12.4 ENOB Incremental A/D Converter for High-Linearity Sensors Read-Out Applications
Algebraic representation of bifurcations in global parameter space with Gröbner bases
A Ratio-independent and Gain-insensitive Algorithmic Analog-to-digital Converter
Effect of synaptic charge convergence on path planning over a neural network
Live Demonstration: Generating FPGA Fingerprints Utilizing Full-Chip Characterization with Ring-Oscillator PUFs
A signed integer programmable power-of-two scaler for {2 n -1, 2 n , 2 n +1} RNS
Low Power Digital Clock Multipliers for Battery-Operated Internet of Things (IoT) Devices
Dynamic Optimizations in GPU Using Roofline Model
On the sensitivity of BDDs with respect to path-related objective functions
Class-AB single-stage OpAmp for low-power switched-capacitor circuits
64Gb/s NRZ/PAM4 Burst-Mode Optical Receiver Frontend with Gain Control, Offset Correction and Gain Decoupled from Bandwidth
Unifying results in CNN theory using delta operator
Methods of quantum error correction
A fragile watermark error detection scheme for JVT
Dynamics of a Simple Hysteresis Network
A Hardware-Efficient Post-Processing Algorithm for Motion Compensated Frame Rate Up-Conversion
Floorplan-aware hierarchical NoC topology with GALS interfaces
Analog current-mode implementation of a one-cycle integrated controller for switching power converters
Quality improvement technique for JPEG images with fractal image coding
An optical and potential dual-image CMOS sensor for on-chip neural and DNA imaging applications
A process, voltage, and temperature compensated CMOS constant current reference
A novel 5GHz RF power detector
A 4.5-Track Standard Cell Library with Buried Power Rails in 7nm Node
A 0.5V rate-resolution scalable SAR ADC with 63.7dB SFDR
Fast word-level power models for synthesis of FPGA-based arithmetic
Band to Band Tunneling-Based Low Power and Low Area Tunable Spike Delay Element
A MUSIC-like Blind Co-channel Signals Separation Algorithm and its Performance Analysis
A two-class information concealing system based on compressed sensing
A Versatile In-Ear Biosensing System for Continuous Brain and Health Monitoring
Peak-to-average power-ratio reduction for OFDM systems based on method of conditional probability and coordinate descent optimization
An inductorless 3-5 GHz band-pass filter with tunable center frequency in 90 nm CMOS
A novel concept for stateless random bit generators in cryptographic applications
Linearity test for high resolution DACs using low-accuracy DDEM flash ADCs
Neural Network Approaches to fast and Low Rate Vector Quantization
A new RNS scaler for {2 n - 1, 2 n , 2 n + 1}
Fast pole filtering for speaker recognition
Algorithm for parallel inverse halftoning using partitioning of Look-Up Table (LUT)
A novel 3-tap adaptive feed forward equalizer for high speed wireline receivers
Identification and elimination of second-order nonlinear distortion of loudspeaker systems using Volterra filter
Terrain Classification with a Reservoir-Based Network of Spiking Neurons
A design methodology for power-efficient continuous-time Sigma-Delta A/D converters
The analytic expression of the output spectrum of ΔΣ ADCs with nonlinear binary-weighted DACs and Gaussian input signals
High-PSR bias circuitry for NTSC sync separation
On envelope-tracking for SOA amplification of multicarrier signals
A bias-scalable current-mode analog support vector machine based on margin propagation
Robustness Analysis of Power Grids Against Cascading Failures Based on a Multi-Objective Algorithm
Timing-constrained yield-driven wire sizing for critical area minimization
FPGA Implementation of LDPC Decoders Based on Joint Row-column Decoding Algorithm
An adaptive macroblock-group coding algorithm for progressive and interlaced video
Accurate Detection of Demosaicing Regularity from Output Images
A high accuracy-low complexity model for CMOS delays
High-dynamic-range parallel multi-scale retinex enhancement with spatially-adaptive prior
Region-of-Interest video coding by fuzzy control for H.263+ standard
Adaptive interference suppression with power control for CDMA systems
SeLiNet: Sentiment enriched Lightweight Network for Emotion Recognition in Images
A highly linear CMOS current-controlled oscillator using a novel frequency detector
Non-traditional irregular interconnects for massive scale SoC
Silicon implementation of an MMSE-based soft demapper for MIMO-BICM
Variability-aware design of subthreshold devices
Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration
An Improved method for the design of variable fractional-delay IIR digital filters
A 87.8% Peak Efficiency SIDO Energy Harvesting System with Emergency Power Supply Mode and Hybrid Zero-Current Detector
Coefficient Inaccuracy Effects in Recursive Analog Sampled-data Filters
A 22-nm Surface Code Decoder Using Greedy Algorithm
Learning EEG-based Spectral-spatial Patterns for Attention Level Measurement
Fractal based image coding the sharp edge treatment
Fast Mode Decision and Motion Estimation for AVS
Properties and relations of ternary linearly independent transforms [multivalued logic applications]
Online Determination of Time Intervals for Statically Secure Distribution System Control
A complementary SiGe HBT on SOI low dropout voltage regulator utilizing a nulling resistor
A novel wideband DOA estimation technique based on harmonic source model for a uniform linear array
Strengthening Critical Power Network Branches for Cascading Failure Mitigation
Analysis and design of a loss-free resistor based on a boost converter in PWM operation
Routing chip based on a modified trie for ATM, IP and Ethernet
Determining the oscillation of differential VCOs
The electrothermal model of the linear power supplies
Some Local Stability Properties of an Autonomous Long Short-Term Memory Neural Network Model
Variable Step-Size LMS Algorithm: New Developments and Experiments
The Use of Demand Modelling for Community Energy Analysis
Topological bifurcations in networks of proximity Kuramoto oscillators
Digital processing of signals produced by voltage-controlled-oscillator-based continuous-time ADCs
Discrete z-domain analysis of high order phase locked loops
Optimization for packet routing using chaotic dynamics
On optimization of filter banks with denoising applications
A parameterized low power design for the variable-length discrete Fourier transform using dynamic pipelining
Reducing configuration contexts for coarse-grained reconfigurable architecture
A structure of JPEG XT encoder considering effect of quantization error
Optimized inpainting-based macroblock prediction in video compression
Enabling Efficient Mapping of XMG-Synthesized Networks to Spintronic Hardware
A 32-μW Programmable Crystal-less Event-driven Receiver for Miniaturized Biomedical Implants
Mathematical formulation of general M-D filtering by using a single building block and its novel word-parallel realization
Co-optimization of FFT and FIR in a delayless acoustic echo canceller implementation
Behavioral modeling of direct sampling mixer
A CMOS front-end architecture for hard-disk drive read-channel equalizer
Building hamiltonian networks using the cycles laplacian of the underlying graph
ASIC Solution for the Directional Intra Prediction of the AV1 Encoder Targeting UHD 4K Videos
A Two-Staged Adaptive Successive Cancellation List Decoding for Polar Codes
A tuning procedure for the electric networks of PEM systems
Performance optimization for motion compensated 2D wavelet video compression techniques
Performance evaluation of 1-bit CMOS adder cells
Applications of operational transconductance amplifier in power system analog emulation
MTCMOS with outer feedback (MTOF) flip-flops
A 0.8-3.5 GHz Shared TDC-Based Fast-Lock All-Digital DLL with a Built-in DCC
Capacitor array structure and switching control scheme to reduce capacitor mismatch effects for SAR analog-to-digital converters
Continuous-time Common-mode Feedback Networks for Fully-differential Amplifiers: a Comparative Study
Low Power Inductor-less Pulse UWB Transceiver
Low-power implementation of FIR filters within an adaptive reconfigurable architecture
Relationship between Haar wavelet and Reed-Muller spectra
A Wide Frequency Tuning Range Active-inductor Voltage-controlled Oscillator for Ultra Wideband Applications
A micropower log domain FGMOS filter
Parallel implementation of computing-intensive decoding algorithms of H.264 on reconfigurable SoC
A circuit-connection-based multihop wireless infrastructure for local communities
Down-sampling based embedded compression in video systems
A footprint-constrained efficiency roadmap for on-chip switched-capacitor DC-DC converters
Towards Improving Memory Access in Large-Scale NoC-based Systems
Fusing EO and LiDAR for SAR Image Translation with Multi-Modal Generative Adversarial Networks
Compressed symmetric tables for accurate function approximation of reciprocals
Content-Adaptive Wavelet-Based Scalable Video Coding
Research on A Novel Synthesizing Technology of Fast-edge Pulse with variable Amplitude
A programmable dual hysteretic window comparator
Wearable RF Sensing and Imaging System for Non-invasive Vascular Dementia Detection
A biophysically based dendrite model using programmable floating-gate devices
A Ku-Band SiGe Phased-Array Transceiver with 6-Bit Phase and Attenuation Control
Model Reverse-Engineering Attack using Correlation Power Analysis against Systolic Array Based Neural Network Accelerator
Band-pass SigmaDelta architectures with single and two parallel paths
Spiking Neural Network Accelerator Architecture for Differential-Time Representation using Learned Encoding
A 0.8-V Fully Differential Amplifier with 80-dB DC Gain and 8-GHz GBW in 22-nm FDSOI CMOS Technology
New low-power low-voltage high-CMRR CMOS instrumentation amplifier
A Charge-Redistribution Multi-Bit Stochastic-Resonance ADC Enhancing SNDR for Weak Input Signal
Intrinsically stable adaptive recursive filters
Analog VLSI Neuromorphic Systems
Full-range cellular neural networks and differential variational inequalities
Hardware implementation of convolutional STDP for on-line visual feature learning
2-D Wideband DOA Estimation with Circular Arrays Based on the Difference Co-Array Concept
A best-first tree-searching approach for ML decoding in MIMO system