yusuke1997/dblp-id-title huggingface dataset:
Hardware Implementation of Lossless Adaptive and Scalable Hyperspectral Data Compression for Space
Analyzing the Resilience to SEUs of an Image Data Compression Core in a COTS SRAM FPGA
A New High-Level Reconfigurable Lossless Image Compression System for Space Applications
Comparison of the Uniform and Non-Uniform Cellular Automata-Based Approach to the Development of Combinational Circuits
FPGA implementation of an efficient high-throughput sphere decoder for MIMO systems based on the smallest singular value threshold
Software defined radios for small satellites
SpaceFibre: Adaptive high-speed data-link for future spacecraft onboard data handling
Dynamically adaptive and reliable approximate computing using light-weight error analysis
Exploratory study about the use of new reconfigurable FPGAs in space
Methodology and reconfigurable architecture for effective placement of variable-size hardware tasks
FPGA implementation of K-means algorithm for bioinformatics application: An accelerated approach to clustering Microarray data
Fault diagnosis for MEMS INS using unscented Kalman filter enhanced by Gaussian process adaptation
HTPCP: GNSS-R multi-channel cross-correlation waveforms post-processing solution for GOLD-RTR instrument
Reconfigurable Parallel Computing Architecture for On-Board Data Processing
On-Board Vision Processing for Small UAVs: Time to Rethink Strategy
A Self-Tuning Analog Proportional-Integral-Derivative (PID) Controller
An efficient MIMO-OFDM radix-2 Single-Path Delay Feedback FFT implementation on FPGA
Security and Complexity Bounds of SUC-Based Physical Identity
Low overhead soft error detection and correction scheme for reconfigurable pipelined data paths
Evolutionary algorithms that use runtime migration of detector processes to reduce latency in event-based systems
Space Wireless Sensor Networks for planetary exploration: Node and network architectures
Investigation of Reconfigurability for the Digital Backend of Ultra Wideband Receiver
A framework to model self-adaptive Computing Systems
Modular And Self-Adaptable (MASA) strategy for building robots
On enhancing the reliability of internal configuration controllers in FPGAs
Demonstrating Controlled Change for Autonomous Space Vehicles
Fault-recovery Non-FPGA-based Adaptable Computing System Design
Quality of Service in NoC for Reconfigurable Space Applications
Improving Key Distribution forWireless Sensor Networks
Embedded high-speed Model Predictive Controller on a FPGA
Embedded Linux for concurrent dynamic partially reconfigurable FPGA systems
A low power memory cell design for SEU protection against radiation effects
Synergistic Reconfiguration of Adaptive Precision Chemical Classifiers
Adaptive phase synchronization in distributed digital arrays
A Low-Complexity Self-Calibrating Adaptive Quadrature Receiver
HPDP: Architecture and design flow: High performance data processor
A Dynamically Reconfigurable Hardware Co-Processor for a Multi-Standard Wireless MAC Processor
Defect Tolerance of an Optically Reconfigurable Gate Array with a One-time Writable Volume Holographic Memory
Bio-inspired fault tolerant wireless communication system
LabVIEW™: A graphical system design environment for adaptive hardware/software systems
Real-time estimates of differential signal phase for spaceborne systems using FPGAs
Evaluation of a New Platform For Image Filter Evolution
Fragile IP Watermarking Techniques
An adaptive algorithm for reconfigurable analog-to-digital converters
AIDI: An adaptive image denoising FPGA-based IP-core for real-time applications
Data Requirements from Evolvable Sensor Networks for Homeland Security Problems
Adaptive Interference Rejection Filtering in On-Board Direct-Sequence / Spread-Spectrum Transponder for TT&C Applications: Analysis, Simulation & Breadboard Test Results
AES Embedded Hardware Implementation
Non-FPGA-based Field-programmable Self-repairable (FPSR) Microarchitecture
Parameter Modelling Approach with Potential Applications for Self-Test of Biosensors
Stochastic Adaptation to Environmental Changes Supported by Endocrine System Principles
Enabling Technologies for Distributed Picosatellite Missions in LEO
DWT Based Adaptive Threshold Determination in Embolic Signal Detection
Bio-inspired bit slice processors with self-test and self-repair mechanisms
Systolic Array Based Adaptive Beamformer Modeling in SystemC Environment
An adaptive system architecture for mitigating asymmetric cryptography weaknesses on TPMs
Hardware requirements of communication-centric machine learning algorithms
Indirect Reinforcement Learning for Autonomous Power Configuration and Control in Wireless Networks
An adaptive communications module for on-board computers of satellites
Competitive Coding Scheme based on 2D Log-Gabor filter for Palm Vein Recognition
An evolutionary approach for gray-level image zooming
Online Evolution for a High-Speed Image Recognition System Implemented On a Virtex-II Pro FPGA
Addressing the Metric Challenge: Evolved versus Traditional Fault Tolerant Circuits
UNITRONICS: A novel bio-inspired fault tolerant cellular system
H.264/AVC In-Loop De-Blocking Filter Targeting a Dynamically Reconfigurable Instruction Cell Based Architecture
Programming an FPGA-based Super Computer Using a C-to-VHDL Compiler: DIME-C
Profiling the fault tolerance for the adaptive Protein Processing Associative Memory
An Adaptive Heuristic Filter for Acceleration
2018 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2018, Edinburgh, United Kingdom, August 6-9, 2018
MORA - An Architecture and Programming Model for a Resource Efficient Coarse Grained Reconfigurable Processor
Direct Reinforcement Learning for Autonomous Power Configuration and Control in Wireless Networks
Region adaptive digital image watermarking system using DWT-SVD algorithm
Bio-inspired self-test for evolvable fault tolerant hardware systems
Integration of the self-healing eDNA architecture in a liquid crystal waveguide-based Fourier Transform Spectrometer
Architecture verification of the SoCWire NoC approach for safe dynamic partial reconfiguration in space applications
FPGA implementation of a lossy compression algorithm for hyperspectral images with a high-level synthesis tool
Investigation of Sample Sizes and Correlation in Multi-Cluster Feature Distributions for an Efficient Encryption System
The FPGA High-Performance Computing Alliance Parallel Toolkit
A compact realization of an n-bit quantum carry skip adder circuit with optimal delay
Finite State Machine IP Watermarking: A Tutorial
Keynote address II: Exploiting dynamic hardware reconfigurability for efficiency, performance, and reliability
Evolutionary Algorithms in Unreliable Memory
Expanding the un-usable area strategy for improved utilization of reconfigurable FPGAs
Hardware Implementation of a Bio-plausible Neuron Model for Evolution and Growth of Spiking Neural Networks on FPGA
Self-Scaling Stream Processing: A Bio-Inspired Approach to Resource Allocation through Dynamic Task Replication
A dynamic partial reconfiguration design for camera systems
Hybrid CMOS/nanodevice circuits for high throughput pattern matching applications
Design and integration of an adaptive controller for a Fourier Transform Spectrometer
Acceleration of Karhunen-Loève transform for System-on-Chip platforms
Keynote address III: Recovery of function in major spinal cord injury using learning-guided spinal stimulation
2011 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2011, San Diego, California, USA, June 6-9, 2011
Keynote address I: SpaceCube: A family of reconfigurable hybrid on-board science data processors
Adaptive multicore scheduling for the LTE uplink
Prokaryotic Bio-Inspired System
Power-aware multi-objective evolvable hardware system on an FPGA
Use of a multi-objective fitness function to improve cartesian genetic programming circuits
evolFIR: Evolving redundancy-free FIR structures
Nominal-Yield-Area Tradeoff in Automatic Synthesis of Analog Circuits: A Genetic Programming Approach Using Immune-Inspired Operators
Adatpive Precision Neural Networks for Image Classification
SDVM R - managing heterogeneity in space and time on multicore SoCs
Adaptive Sub-Threshold Test Circuit
Adaptive Segmentation Technique For Object-Base MPEG-4 System
Weather Classification: A new multi-class dataset, data augmentation approach and comprehensive evaluations of Convolutional Neural Networks
Investigating the Use of Autoencoders for Gait-based Person Recognition
Evolutionary Design of Digital Circuits: Where Are Current Limits?
Automated Integration and Communication Synthesis of Reconfigurable MPSoC Platform
Error-detecting/correcting-code-based self-checked/corrected/timed circuits
Lessons in Implementing Bio-inspired Algorithms on Wireless Sensor Networks
On-Chip Thermal Balancing using Dynamic Structural Adaptation of FPGA-Based Multi-task SoPCs for Space-Borne Applications
A High-throughput Fine-grained Rate Adaptive Transmission Scheme for A LEO Satellite Communication System
A fast Reconfigurable 2D HW core architecture on FPGAs for evolvable Self-Adaptive Systems
Gate-Level Evolutionary Development Using Cellular Automata
Modeling Gate-Level Abstraction Hierarchy Using Graph Convolutional Neural Networks to Predict Functional De-Rating Factors
Autonomic management of missions and reconfigurations in FPGA-based embedded system
Towards 3D Architectures: A Comparative Study on Cellular GAs Dimensionality
Distributed Adaptability and Mobility in Space Based Wireless Pico-Satellite Sensor Networks
Reconfigurable Analog VLSI circuits for robot path planning
Energy efficient frame-level redundancy scrubbing technique for SRAM-based FPGAs
Mersenne Twister Random Number Generation on FPGA, CPU and GPU
NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2019, Colchester, UK, July 22-24, 2019
Dynamic Routing on the Ubichip: Toward Synaptogenetic Neural Networks
2014 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2014, Leicester, United Kingdom, July 14-17, 2014
Ensuring data integrity via ICmetrics based security infrastructure
Trading off power and fault-tolerance in real-time embedded systems
Improved fault-tolerance through dynamic modular redundancy (DMR) on the RISA FPGA platform
A 400 Mrad radiation-hardened optoelectronic embedded system with a silver-halide holographic memory
An Engineering Approach to Solving HPC Problems using FPGAs
On self-adaptive resource allocation through reinforcement learning
Electro-Magnetic Launchers on the Moon : A Feasibility Study
Statistical Lossless Compression of Space Imagery and General Data in a Reconfigurable Architecture
Conditional Acknowledge Synchronisation in Asynchronous Interconnect Switch Design
Automated Antenna Design Using Normalized Steady State Genetic Algorithm
Etissue: A bio-inspired match-based reconfigurable hardware architecture supporting hierarchical self-healing and self-evolution
SystemC-based Reconfigurable IP Modelling for System-on-Chip Design
A Bio-Inspired Agent Framework for Hardware Accelerated Distributed Pervasive Applications
A low-cost fault tolerant solution targeting to commercial FPGA devices
Airborne demonstration of FPGA implementation of Fast Lossless hyperspectral data compression system
Multiobjective Optimal Design of MEMS-Based Reconfigurable and Evolvable Sensor Networks for Space Applications
Self-adaptive pattern formation with battery-powered robot swarms
Toward generic and adaptive avionic test systems
On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition
Balancing exploration and exploitation in an adaptive three-dimensional cellular genetic algorithm via a probabilistic selection operator
Adaptable Architectures for Signal Processing Applications
Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), August 5-8, 2007, University of Edinburgh, Scotland, United Kingdom
Evolutionary design and optimization of Wavelet Transforms for image compression in embedded systems
An Adaptive Fault-Tolerant Memory System for FPGA-based Architectures in the Space Environment
Analysis of SEU effects in partially reconfigurable SoPCs
Adaptive Feedback Supported Communication for IoT and Space Applications
Evolvable Hardware Applied to Nanotechnology
Adaptive attitude control of a microsatellite during payload deployment
EvoCaches: Application-specific Adaptation of Cache Mappings
Synthesis of Voltage Follower with Only CMOS Transistors Using Evolutionary Methods
Clone-Resistant Joint-Identity Technique for Securing Fleet Management Systems
Ant Colony Optimization for mapping, scheduling and placing in reconfigurable systems
Image filter evolution on the Xilinx Zynq Platform
A modular FPGA-based implementation of the Unscented Kalman Filter
iBoard: A highly-capable, high-performance, reconfigurable FPGA-based building block for flight instrument digital electronics
Application of an adaptive digital controller for medium power satellite DC/DC converter
PERPLEXUS: Pervasive Computing Framework for Modeling Complex Virtually-Unbounded Systems
Self-Reconfigurable Analog Arrays: Off-The Shelf Adaptive Electronics for Space Applications
On the Trellis Structures of Geometric Augmented Product Codes
An Adaptive FPGA-Based Mechatronic Control System Supporting Partial Reconfiguration of Controller Functionalities
On Convergence of Development Costs and Cost Models for Complex Spaceflight Instrument Electronics
Using Relocatable Bitstreams for Fault Tolerance
Novel PCA based pixel-level multi-focus image fusion algorithm
An Adaptive Energy Efficient Transmission Protocol in Wireless Ad-hoc Network
Read back scrubbing for SRAM FPGAs in a data processing unit for space instruments
Evaluation methodology for complex non-deterministic functions: A case study in metaheuristic optimization of caches
High performance Intra-task parallelization of Multiple Sequence Alignments on CUDA-compatible GPUs
eDNA: A Bio-Inspired Reconfigurable Hardware Cell Architecture Supporting Self-organisation and Self-healing
Polymorphic FIR Filters with Backup Mode Enabling Power Savings
Automated thresholding for low-complexity corner detection
Broadband FPGA payload processing in a harsh radiation environment
Dynamic Fault Tolerance Through Resource Pooling
Pruning Self-Organizing Maps for Cellular Hardware Architectures
An FPGA based on-board processor platform for space application
A workload-aware neuromorphic controller for dynamic power and thermal management
New Methodology for Reducing Sensor and Readout Electronics Circuitry Noise in Digital Domain
Implementation of Finite State Machines on a Reconfigurable Device
Hardware Accelerators for Evolving Building Block Modules for Artificial Brains
Synchronous Digital Implementation of the AER Communication Scheme for Emulating Large-Scale Spiking Neural Networks Models
Xilinx tools facilitate development of FPGA applications for IEC61508
A Configurable IP for Mode Decision of H.264/AVC Encoder
Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support
A Generic On-Chip Debugger for Wireless Sensor Networks
MOVES: A Modular Framework for Hardware Evolution
A novel high-performance fault-tolerant ICAP controller
Formal modelling of a robust Wireless Sensor Network routing protocol
Selective Triple Modular Redundancy for Single Event Upset (SEU) Mitigation
Reliability bound and channel capacity of IBS-based fuzzy embedders
Partial Bitstream 2-D Core Relocation for Reconfigurable Architectures
An online task placement algorithm based on maximum empty rectangles in dynamic partial reconfigurable systems
Self-healing strategy for transient fault cell reutilization of embryonic array circuit
ABLUR: An FPGA-based adaptive deblurring core for real-time applications
SEU fault classification by fault injection for an FPGA in the space instrument SOPHI
Towards Fluent Sensor Networks: A Scalable and Robust Self-Deployment Approach
A Power Efficient Path Key Establishment Algorithm for Wireless Sensor Networks
Ultrasonic Levitation with Software-Defined FPGAs and Electronically Phased Arrays
Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance
Analysis of error detection schemes: Toolchain support and hardware/software implications
An Efficient Technique for Preventing Single Event Disruptions in Synchronous and Reconfigurable Architectures
Design Concepts for a Dynamically ReconfigurableWireless Sensor Node
A heterogeneous SoC architecture with embedded virtual FPGA cores and runtime Core Fusion
NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009, San Francisco, California, USA, July 29 - August 1, 2009
Approximate TMR for selective error mitigation in FPGAs based on testability analysis
An FPGA Implemented Processor Architecture with Adaptive Resolution
Adaptive radiation pattern optimization for antenna arrays by phase perturbations using particle swarm optimization
Keynote address I: Tensegrity engineering: Integrating the design of structure, control, and signal processing
A Flexible Bit-Stream Level Evolvable Hardware Platform Based on FPGA
Hierarchical Built-in Self-testing and FPGA Based Healing Methodology for System-on-a-Chip
Evolving Redundant Structures for Reliable Circuits - Lessons Learned
Online fault detection for Networks-on-Chip interconnect
Calibrating a predictive cache emulator for SoC design
Addressing Future Space Challenges using Reconfigurable Instruction Cell Based Architectures
Self-Organizing and Scalable Shape Formation for a Swarm of Pico Satellites
Kaolin: A system-level AADL tool for FPGA design reuse, upgrade and migration
A fault-tolerant ICAP controller with a selective-area soft error mitigation engine
500 Mrad total-ionizing-dose tolerance of a holographic memory on an optical FPGA
Adaptive mechanisms for component-based real-time systems
First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 15-18 June 2006, Istanbul, Turkey
Dynamically Adapted Low-Energy Fault Tolerant Processors
New voter design enabling hot redundancy for asynchronous network nodes
An Automatic Technique to Synthesize Avionics Architecture
OTERA: Online test strategies for reliable reconfigurable architectures - Invited paper for the AHS-2012 special session "Dependability by reconfigurable hardware"
A Power-Aware Algorithm for the Design of Reconfigurable Hardware during High Level Placement
Design and Analysis of Novel Interconnects with Network-on-Chip LVDS Transmitter for Low Delay
Hardware Support Vector Machine (SVM) for satellite on-board applications
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
On the optimal reconfiguration times for TMR circuits on SRAM based FPGAs
Worst case error rate predictions and mitigation schemes for Virtex-4 FPGAs on solar orbiter
Analysis of Reconfiguration Options for a Reconfigurable Polymorphic Circuit
Suppression of constant modulus interference in multimode transceivers using an adaptive nonlinear circuit
An adaptive SIW filter using vertically-orientated fluidic material perturbations
Dynamic Reconfiguration of Mixed-Domain Embedded Systems for Applications with Variable Performance Requirements
NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2008, Noordwijk, The Netherlands, June 22-25, 2008
Distributed Computing in Reconfigurable Picosatellite Networks
Adaptive hyperspectral image compression using the KLT and integer KLT algorithms
Holographic scrubbing technique for a programmable gate array
Hybrid Communication Medium for Adaptive SoC Architectures
A run time adaptive architecture to trade-off performance for fault tolerance applied to a DVB on-board processor
A Novel Sampling Scheme for Efficient Analog to Digital Conversion
Resource optimization and deadlock prevention while generating streaming architectures from ordinary programs
FPGA Implementation of Cellular Automata Spaces Using a CAM Based Cellular Architecture
Self-Reconfigurable Analog Array Integrated Circuit Architecture for Space Applications
State-Space Based Analytical Modelling for Real-Time Fault Recovery and Self-Repair with Applications to Biosensors
Towards a generic and adaptive System-on-Chip controller for space exploration instrumentation
2017 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2017, Pasadena, CA, USA, July 24-27, 2017
On DESTINY instrument electrical and electronics subsystem framework
Invited talk II: Why does life start, what does it do, where will it be, and how might we find it?
Protecting Fingerprint Data Using Watermarking
Implementation of an IEEE802.11a Transmitter Module for a Reconfigurable System-on-a-Chip Design
Advanced sensor fault detection and isolation for electro-mechanical flight actuators
Decentralized run-time recovery mechanism for transient and permanent hardware faults for space-borne FPGA-based computing systems
On Quaternary 1-of-4 ID Generator Circuits
A multicellular architecture towards low-cost satellite reliability
A Honeycomb Development Architecture for Robust Fault-Tolerant Design
A framework for adaptive reconfigurable space-borne computing platforms for run-time self-recovery from transient and permanent hardware faults
Debug Support for Hybrid SoCs
A FPGA Simulation Using Asexual Genetic Algorithms for Integrated Self-Repair
Mixtrinsic Multi-Objective Reconfiguration of Evolvable Sensor Electronics
A Background Mismatch Calibration For Capacitive Digitial-To-Analog Converters RTERS
ALT-DVS: Dynamic Voltage Scaling with Awareness of Leakage and Temperature for Real-Time Systems
A Novel Self-Organizing Hybrid Network Protocol for Wireless Sensor Networks
RR4DSN: Reconfigurable Receiver for Deepwater Sensor Nodes
Reconfigurable platforms for Data Processing on scientific space instruments
A Large Scale Adaptable Multiplier for Cryptographic Applications
A Double or Triple Module Redundancy Model Exploiting Dynamic Reconfigurations
Enabling FPGAs for future deep space exploration missions: Improving fault-tolerance and computation density with R3TOS
A Multi-cellular Developmental Representation for Evolution of Adaptive Spiking Neural Microcircuits in an FPGA
A Substrate Integrated Fluidic Compensation Mechanism for Deformable Antennas
A Reconfigurable Arithmetic Data-path Based On Regular Interconnection
Unifying manycore and FPGA processing with the RUSH architecture
ESPACENET: A Framework of Evolvable and Reconfigurable Sensor Networks for Aerospace-Based Monitoring and Diagnostics
The Novel Stochastic Bernstein Method of Functional Approximation
Wideband Dielectric Resonator Antenna with Reconfigurable Radiation Pattern
A fully configurable and scalable neural coprocessor IP for SoC implementations of machine learning applications
Design and Development of a New Tactile Stimulator
An FPGA-Based Web Server for High Performance Biological Sequence Alignment
Design of an analog field programmable RC oscillator using a floating gate PFET
Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control
Dynamic parallel reconfiguration for self-adaptive hardware architectures
BRAM implementation of a single-event upset sensor for adaptive single-event effect mitigation in reconfigurable FPGAs
Autonomous Configuration Method for Real-Time Location Systems
Fault-tolerant communication in invasive networks on chip
Adapting the SpaceCube v2.0 data processing system for mission-unique application requirements
Wireless intra-spacecraft communication: The benefits and the challenges
Scalable design of a programmable NMR voter with inputs' state descriptor and self-checking capability
Keynote address II: Human space flight - From Mars to the stars
Hardware-based parallel firefly algorithm for embedded applications
Adaptive Formation Control and Bio-inspired Optimization of a Cluster-based Satellite Wireless Sensor Network
Evolving Hardware with Self-reconfigurable connectivity in Xilinx FPGAs
Power Driven Reconfigurable Complex Continuous Wavelet Transform
Method to self-repairing reconfiguration strategy selection of embryonic cellular array on reliability analysis
GEZGIN & GEZGIN-2: Adaptive Real-Time Image Processing Subsystems for Earth Observing Small Satellites
A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems