yusuke1997/dblp-id-title huggingface dataset:
Enhanced Partial Distortion Sorting Fast Motion Estimation Algorithm for Low-Power Applications
Development of a CMOS Imaging Device for Functional Imaging Inside the Mouse Brain
BIST approach for testing configurable logic and memory resources in FPGAs
Lossless video coding using wavelet packet and subband domain motion estimation
A Convex Optimization-Based Object-Level Rate Control Algorithm for MPEG-4 Video Object Coding
A DLL-based Body Bias Generator for Minimum Energy Operation with Independent P-well and N-well Bias
A comparison of second-order sigma-delta modulator between switched-capacitor and switched-current techniques
A very-high output impedance current mirror for very-low voltage biomedical analog circuits
Feasible implementation of a prediction algorithm for the game of roulette
Analysis of color space and similarity measure impact on stereo block matching
Current-mode echo cancellation for full-duplex chip-to-chip data communication
A Transient-Enhanced Dual-Loop Low-Dropout Linear Regulator in 65-nm SOI CMOS With <1-μs Settling Time for 5G Applications
Rigorous analysis of Arnold tongues in a manifold piecewise-linear circuit
A high background light subtraction circuit for long range time-of-flight cameras
DIET-PIM: Dynamic Importance-based Early Termination for Energy-Efficient Processing-in-Memory Accelerator
A low-voltage high-linearity low noise amplifier for wireless body area networks
Low-cost vector map assisted navigation strategy for autonomous vehicle
Quadratic phase coupling analysis for infrasound vehicle detection
Load regulation cancellation based on adaptive body bias for STC-LDOs
A lightweight Max-Pooling method and architecture for Deep Spiking Convolutional Neural Networks
Implementation and Comparative Analysis of Flexible Micro-Heater Circuits for Lab-on-a-chip Applications
An Active Feedback Coefficient Tuning Technique for Compensating Time-Constant Variations in Continuous-Time Delta-Sigma Modulators
Novel and flexible Complex Coefficient Linear phase IIR filters for communications
3D Shape Acquisition and Arbitrary View Image Generation from Monocular Image Based on Primitive Decomposition
A 1V CMOS active pixel sensor with enhanced dynamic range
A Novel 16-bit CMOS Digitally Controlled Oscillator
Sensitivity enhancement using a nonlinear resonator
WAMS based dynamic state estimator during power system transient process
Decreasing end-effector deformation of the flexible manipulator through local motion planning
A Current Reuse Wideband LNA with Complementary Noise and Distortion Cancellation for Ultrasound Imaging Applications
A dual-mode scheduling algorithm for task graphs with data parallelism
Semi-Blind Time Domain Equalization for MIMO-OFDM Systems
A 27-29.5GHz 6-Bit Phase Shifter with 0.67 -1.5 degrees RMS Phase Error in 65nm CMOS
Energy Efficient DSHE based Analogue Multiply Accumulate Computing Crossbar Architecture
Capacitive recombination calibration method to improve the performance of SAR ADC
Development of special-purpose computer based on Virtex-7 FPGA for high-speed digital holography
Noise Analysis and Simulation of Chopper Amplifier
IoT and Blockchain: Technologies, Challenges, and Applications
On a Piecewise Linear Function Approximation for Quantum Computation
Pixel-based pipeline hardware architecture for high-performance Haar-like feature extraction
The thermal-aware floorplanning for 3D ICs using Carbon Nanotube
VLSI Implementation of a 600-Mbps MIMO-OFDM Wireless Communication System
A 7.8 fJ/conversion-step 9-bit 400-MS/s single-channel SAR ADC with fast control logic
SDR Based Multi-Mode DBF for micro-satellite SAR
Implementation of an AMBA-Compliant IP for H.264 Transform and Quantization
An improved universal CMOS current-mode analog function synthesizer: Performance analysis
The Design and Miniaturization of 6-15 GHz Lumped-Element Wilkinson Power Divider Based on GaAs IPD Technology
A 1-V CDS bandgap reference without on-chip resistors
Mean square error analysis of the PG algorithm for adaptive IIR notch filter with constrained poles and zeros using power spectral density method
Digitally-controlled Gm-C bandpass filter
On maximizing tree reliability based on minimum diameter spanning tree
Efficient Implementation of the Fast Filter Bank For Critically Decimated Systems
High frame rate VGA CMOS image sensor using two-step single slope ADCs
A CMOS Current-Reused Transceiver with Stacked LNA and Mixer for WPAN
An ultra-low power CMOS subthreshold voltage reference without requiring resistors or BJTs
An algorithm of hardware unit generation for processor core synthesis with packed SIMD type instructions
Efficient decoder design for high-throughput LDPC decoding
Multiple-output neuron MOS current mirror with bias circuit suitable for Digital-to-Analog converter
Jitter compensation technique for continuous-time sigma-delta modulator
A High-voltage Tolerant and Current-accurate Neural Stimulator Based on A Low-voltage CMOS Process
On the Properties And Design of Stable IIR Transfer Functions Generated Using Fibonnaci Numbers
A Wireless Data and Power Transfer-Enabled MCU for Shape-Configurable Chiplet-Based Computers
Reduced-latency scheduling scheme for min-max non-binary LDPC decoding
A 1.25Gbps all-digital clock and data recovery circuit with binary frequency acquisition
Fast intra prediction algorithm with transform domain edge detection for HEVC
An ultra-low voltage comparator with improved comparison time and reduced offset voltage
Novel immitance inverters
A Simulink-to-FPGA Co-Design of Encryption Module
A 8-b 1GS/s 2b/cycle SAR ADC in 28-nm CMOS
Compact microstrip square-loop dual-mode bandpass filter design with wideband response
IQ imbalance compensation: A semi-blind method for OFDM systems in fast fading channels
A new wideband, high-linear passive Sample and Hold structure suitable for high-speed, high-resolution ADCs
KKT-condition based study on DVFS for heterogeneous task set
60 GHz 130-nm CMOS second harmonic power amplifiers
Design and Implementation of Doppler Centroid Estimation with Quality Index for Real-Time SAR Imaging
A System for Standard Cell Routability Checking and Placement Routability Improvements
A 0.18µm CMOS Gaussian Monocycle Pulse Circuit Design for UWB
LOKI: A Secure FPGA Prototyping of IoT IP with Lightweight Logic Locking
Face detection architecture design using hybrid skin color detection and cascade of classifiers
Impact of capacitors' leakage current dispersion and a simple approach to improve
Relaxed Half-Stochastic Iterative Decoding for Rate Compatible Modulation
Practical Implementation of Sliding Mode Control for Boost Converter
Impact of on-chip interconnects on vertical signal propagation in 3D ICs
A Semi-Analytical Approach to Design a Fractional Order Proportional-Integral-Derivative (FOPID) Controller for a TITO Coupled Tank System
Accurate, high-speed simulation of transient response and frequency characteristics of switching converters
An Efficient Variable-Gain Homotopy Method for Finding DC Operating Points of Transistor Circuits
A RISC-V SoC for Mobile Payment Based on Visible Light Communication
A six-order wideband bandpass sigma-delta modulator
Comparative performance analysis of a streamlined iteration cancellation technique for MIMO-OFDM systems with memoryless nonlinearity
Readability improvement for time frequency analysis of pathological speech
Low Power and High Speed Designs of CIC Filter for Sigma-Delta ADCs
Optimization of fuzzy-neural structure through genetic algorithms and its application in artificial odor recognition-system
Low-Power Exponential V-I Converter Using Composite PMOS Transistors
A BJT-Based Temperature Sensor Achieving an Inaccuracy of ±0.3°C (3σ) and a 6.605 pJ∙K 2 Resolution FoM in 28-nm CMOS
A reconfigurable aperture coupled microstrip patch antenna with beam steering capability on silicon
Arbitrary convex and concave rectilinear block packing based on O-Tree representation
An architectural extension to the media core processor for HDTV applications
Design and analysis of an interleave controlled series buck converter with low load current ripple
Adjustable Fractional-Delay FIR Filters Using the Farrow Structure and Multirate Techniques
Weighted least-squares design of IIR all-pass filters using a Lyapunov error criterion
Design and VLSI Architecture of a Channel Equalizer Based on Adaptive Modulation for IEEE 802.11a WLAN
Design of table-based function evaluators with reduced memory size Using a bottom-up non-uniform segmentation method
Development of active RFID system using zigbee standard with non beacon mode
Implementation of Multipoint Video Conference in Software
Principles of designing an algorithm for acoustic room multichannel simulation
Error Concealment Using Digital Watermarking
Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture
A low-hardware-overhead, high-energy-efficiency, and end-to-end CNN-based feature extraction accelerator for mobile visual SLAM
TNSS: Two-Nibble Sparsity-Aware Stride-Decomposing Acceleration for Convolutional Neural Networks
A Novel Input Stage Based on DTMOS for Low-Voltage Low-Noise Operational Amplifier
Nanowatt High Order Analog Fully-Differential Bandpass Filter with Passive Switched-Capacitor Circuits
A hybrid architecture for efficient FPGA-based implementation of multilayer neural network
Wide current range and high compliance-voltage bulk-driven current mirrors: Simple and cascode
A High Gain Range Low Gain Step dB-Linear Programmable Gain Amplifier with Parallel Complementary Switching Current Method
Fourier Series Analysis for Nonlinearities Due to the Power Supply Noise in Open-Loop Class D Amplifiers
tinyRadar for Gesture Recognition: A Low-power System for Edge Computing
A design of bandwidth adaptive multimedia gateway for scalable video coding
Design of Time Domain Equalizers Incorporating Radio Frequency Interference Suppression
Stacked Active Loads For Low Power, High Speed GaAs Digital Circuits (SALFL)
Scalable interpolation architecture for soft-decision Reed-Solomon decoding
Continuous Time Delta-Sigma Modulators with Arbitrary DAC Waveforms
A low-voltage high-gain wide-bandwidth class-AB differential difference amplifier
A MSB-biased self-organizing feature map for still color image compression
A Fully Pipelined Multiplierless Architecture for 2D Convolution with Quadrant Symmetric Kernels
A 55nm 32Mb Digital Flash CIM Using Compressed LUT Multiplier and Low Power WL Voltage Trimming Scheme for AI Edge Inference
Current controlled CCTA based- novel grounded capacitance multiplier with temperature compensation
Full-hardware triple modular and penta-modular redundancies using a high frequency majority voting operation
2019 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2019, Bangkok, Thailand, November 11-14, 2019
Scaling NVMs in Event-Driven Architectures for Edge Inference
A High-Speed Low-Complexity VLSI SISO Architecture
A Fast-Transient Response Capacitor-Less FVF-LDO in 22-nm CMOS Technology
Improved MESFET/pHEMT Models and Their Comprehensive Comparison With Standard Ones
A design method for skew tolerant latch design
Design of computational circuit for calculation of parallel phase-shifting digital holography
RRAM Computing-in-Memory Using Transient Charge Transferring for Low-Power and Small-Latency AI Edge Inference
Chua Circuit Based Reconfigurable Computing System
Acceleration of Depth Intra Coding for 3D-HEVC by Efficient Early Termination Algorithm
Over complementary MOS logic for don't care conditions
2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki, Japan, November 17-20, 2014
High-resolution DPWM generator for digitally controlled DC-DC converters
A 10-b, 500 MSPS current steering CMOS DAC with a switching current cell and high SFDR value
Engery-Efficient Double-Edge Triggered Flip-Flop Design
A Simplified PWM Controller for Wireless Power Receiver Using a 3-Mode Reconfigurable Resonant Regulating Rectifier
A yield and reliability enhancement framework for image processing applications
Pilot based LMMSE channel estimation for Multi-User MIMO- OFDM systems with power delay profile
Power dissipation analysis of memristor for low power integrated circuit applications
High-performance inverse transform circuit based on butterfly architecture for H.264 high profile decoder
A high-throughput interpolator for fractional motion estimation in high efficient video coding (HEVC) systems
Design and implementation of the configuration circuit for FDP FPGA
On-board effective inductance measurement
Optimization of control switch for energy harvest circuit using electrostatic charges
Fuzzy-ART based image compression for hardware implementation
Sensor factors influencing photoplethysmography
MAGIC-Based Nonvolatile Binary Counters
Design of SRAM cell using Voltage Lowering and Stacking Techniques for Low Power Applications
Estimation of oscillation parameters for power grids
3D Digital Compute-in-Memory Benchmark with A5 CFET Technology
A comprehensive comparative analysis of FinFET and Trigate device, SRAM and logic circuits
A two-pass video encoder by fixed lagrange multipliers
Design of an EEPROM in RFID tag: Employing mapped EPC and IPv6 address
Optimal discrete wavelet transform (DWT) features for face recognition
Low-Complexity Parallel Syndrome Computation for BCH Decoders Based on Cyclotomic FFT
Genetic algorithm to select features for fuzzy ARTMAP classification of evoked EEG
Applied of look up table controller based of FLC (fuzzy logic controller) in non-linear system AFM (atomic force microscopy)/PSTM (photon scanning tunnel microscope)
A Bandgap Reference Using a Novel Soft Self-start Bias Circuit
A 20 GHz power detector with 176 mV/dB conversion gain
A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips
30-300mV input, ultra-low power, self-startup DC-DC boost converter for energy harvesting system
LEAM: A Low-Area and Efficient Accelerator of Matrix-Vector Multiplication for Homomorphic Encryption
Deep Learning Based Portable Respiratory Sound Classification System
A Methodology for Automatic Hardware Synthesis of Multiplier-less Digital Filters with Prescribed Output Accuracy
A folded-cascode OP Amp with a dynamic switching bias circuit
Pareto based Multi-objective Mapping IP Cores onto NoC Architectures
Interference measurement and analysis of full-duplex wireless system in 60 GHz band
True Random Number Generator Implemented in ReRAM Crossbar Based on Static Stochasticity of ReRAMs
A 2.4-GHz/5-GHz Low Power Pulse Swallow Counter in 0.18-µm CMOS Technology
Wideband double-UT RFID tag antenna design
Design considerations of a low-noise receiver front-end and its spiral coil for portable NMR screening
Process Compensated Diagnostic Circuit For Impending Fault Detection In SRAM Write Drivers
Design and evaluation of high performance microprocessor with reconfigurable on-chip memory
A 160-Gb/s 0.37-pJ/bit PAM4 Optical Receiver in 28-nm CMOS
2-Level Miller Detection-Based High Side Gate Driver Design for Power MOSFETs
Real-Time Implementation of a Particle Filter with Integrated Voice Activity Detector for Acoustic Speaker Tracking
Optimal Network Analysis in Hierarchical Power Quad-Grids
Intergrated control system of multi-channel audio signals for serial transmission
A temperature-stabilized voltage reference utilizing MOS body effect
Design of High-speed, Low-power FIR Filters with Fine-grained Cost Metrics
Exploiting Chaos for Computation
Design of an Area Efficient High-Speed Color FDWT Processor
A nonlinearity error calibration technique based on an opamp distortion modeling
A Compact Bulk-Driven Four-Quadrant Analog Multiplier in Weak Inversion
The Multiple Point Global Lanczos Method for MIMO Interconnect Model-Order Reductions
Integrated All-GaN Driver for Non-isolated Resonant Converters
An analog CMOS rank-order extractor with O(N) complexity using maximum/winner-take-all circuit
A Karnaugh Map Approximate Adder With Intrinsic Error Compensation
Manufacturability-aware mask assignment in multiple patterning lithography
A 2.5Gb/s oversampling clock and data recovery circuit with frequency calibration technique
A Novel Architecture with Nullified Parasitic Capacitance for Accurate FuSa Detection
Compact Modeling of MOSFETs Channel Noise for Low-Noise RF ICs Design
Single-input and three-output current-mode biquadratic filters using multiple-output OMAs
Reducing temporal redundancy in MJPEG using Zipfian estimation techniques
Speech enhancement for nonstationary noise environment
Hybrid Dual-Operating-Mode PWM Based Sliding Mode Controllers for DC-DC Converters
A precise bandgap reference with intrinsic compensation for current-mirror mismatch
Live demonstration: MorFPGA duo platform with dual-camera support
A New Method for Designing Constrained Causal Stable IIR Variable Digital Filters
Ultrasonic and infrared repelling device for controlling the population of rat in paddy field
A Wideband CMOS Power Amplifier with Integrated Digital Linearizer and Tunable Transformer
Analysis of non-ideal effects and electrochemical impedance spectroscopy of arrayed flexible NiO-based pH sensor
A 0.8V SOP-based cascade multibit delta-sigma modulator for wideband applications
A minimum-path mapping algorithm for 2D mesh Network on Chip architecture
Design of a health management system with physiological signal acquisition
Soft-error tolerant TCAMs for high-reliability packet classifications
DC-DC converter with continuous-time feed-forward Sigma-Delta modulator control
Linear Incentive Contract for Principal-agent Problem with Asymmetric Information and Moral Hazard
Lightweight Binary Neural Networks for Edge Devices
Implementation of low power FFT structure using a method based on conditionally coded blocks
Active ESD protection design against cross-power-domain ESD stresses in CMOS integrated circuits
A system-level non-linear behavioral modeling of pulling and pushing mechanisms in PLLs
A 0.9V, 3.1-10.6 GHz CMOS LNA with high gain and wideband input match in 90 nm CMOS process
Treatment effect of acupuncture and electric stimulation on chronic constipation patients
An Automated Design Platform for ReRAM-based DNN Accelerators with Hardware-Software Co-exploration
Low-cost designs of rectangular to polar coordinate converters for digital communication
A 72-nW 440-mV Time Register Using Stacked-NMOS-Switched Gated Delay Cell in Biomedical Applications
From MOSFETs to Ambipolar Transistors: A Static DeFET Inverter Cell for SOI
A 47-dB linear CMOS variable gain amplifier using current squaring technique
Intelligent home management in the smart grids
A design platform for analog device size sensitivity analysis and visualization
Design and performance evaluation of a 2D-mesh Network on Chip prototype using FPGA
On The Realization of Active MURC Filter wth a Single Pole Amplifier
Analysis of Complex Behaviors on Memristor - Based Bonhöeffer van der Pol Oscillator
CMOS Image Sensor Data-Readout Method for Convolutional Operations with Processing Near Sensor Architecture
A design of cyclic filter banks
Memory binding and layer assignment for high-level synthesis of 3D ICs
A Method for the Correction of N-Ports Scattering Parameters Measurement
A Bit-Serial Variable-Accuracy FFT Processor For Energy-Harvesting Systems
Axial Resolution Enhacement of Light-Sheet Microscopy via two Light-Sheets
CDTA-based current limiters and applications
Segmented fractal dimension measurement of 1-D signals: a wavelet based method
Single Amplifier Sigma Delta Modulator With Input Feedforward
Engineering ASAP7 PDK with Buried Power Rail and Backside Metal Technologies
A Micro-phase Difference Measurement Circuit Using 4-bit Input Stage
A Voltage Swing Robust Pseudo-Resistor Structure for Biomedical Front-end Amplifier
Current controlled fully balanced current conveyor
Secure scan design using improved random order and its evaluations
Effective communication in ad hoc network of mobile users group
An efficient decoding method of sequence-pair
A 0.5-nW 29ppm/°C Voltage Reference Circuit
Reduction of Motion Artifact in PPG signal with CDS-LMS Filter
Analysis of a compact BCC transceiver based on PLL FSK modulator/demodulator
Efficient successive cancellation decoder for polar codes based on frozen bits
Low latency check node unit architecture for nonbinary LDPC decoding
Current-sensing technique for current-mode DC-DC buck converter with offset-voltage compensation
Energy efficient lossless image compression with prediction-based transform
Incorporating area-time flexibility to a binary signed-digit adder
Design of Low-Frequency Low-Pass Filters for Biomedical Applications
Design and evaluation of a 4×4 MIMO-OFDM transceiver for gigabit indoor wireless communications
A fast bootstrapped switch for high-speed high-resolution A/D converter
A -34dBm sensitivity battery-less wake-up receiver with digital decoder
A 0.5V 6-bit scalable phase interpolator
Utilization of Process and Supply Voltage Random Variations for Random Bit Generation
Design of split-radix FFT pruning for OFDM based cognitive radio system
A Standalone Printing USB Host Device Prototype
Analysis of an interrupted circuit with fast-slow bifurcation
Triple-Band RF Energy Harvesting System Using TDM Combiner Drawing 1.5 μW in 22nm FDSOI Technology
A Comparison of Pipelined RAG-n and DA FPGA-based Multiplierless Filters
Low-power dual-precision table-based function evaluation supporting dynamic precision changes
Harmonic and IMD frequency components affecting nonlinear distortion with feed back in MOSFET amplifiers
A new image coding quality assessment
A Genetic Algorithm Employing Correlative Roulette Selection for Optimization of FRM Digital Filters over CSD Multiplier Coefficient Space
Revising algorithm for nonnegative matrix factorization based on minimizing quasi-L1 norm
An improved method for a set-pair routing problem by SAT
Complexity reduction algorithm for region-of-interest based H.264 encoding
Design of passive UHF RFID tag in 130nm CMOS technology
A sample-time error calibration technique in time-interleaved ADCs with correlation-based detection and voltage-controlled compensation
A Reconfigurable Active-RC Filter with Variable Gain and An RC-Reused Tuning Circuit
VCO with 8-shaped Transformer Coupled Transmission-Line
Lossless interpolation optimization for H.264 decoder
Toward Structurally Safe Design-for-Trust Techniques
A study on acoustic beam steering with parametric loudspeaker based on individual delay-filtering for carrier and sideband waves
Fast assessment of regional voltage stability based on WAMS
The VLSI Design of Motion Adaptive De-interlacing with Horizontal and Vertical Motions Detection
Effect of substrate contacts on reducing crosstalk noise between TSVs
Design and development of a low cost EMG signal acquisition system using surface EMG electrode
FHEDGE: Encrypted Inference on Lightweight Edge Devices
Reconfigurable execution core for high performance DSP applications
Unambiguous tracking techniques for Galileo BOC(1, 1) signals
Channel estimation and detection for multibeam satellite communications
Cellular neural networks with effect from friend having most different values and its friends
A 28GHz Current-mode Outphasing Power Amplifier with 23.3dBm Psat and 44.2% PAE in 40nm CMOS
The next hop selection of distance vector by local centrality measure
Multiplexer & Memory Efficient Bit-Reversal Algorithms
Translinear Loop Principle and Identification of the Translinear Loops
Design of quarter-wavelength resonator filters with coupling controllable paths
High-Density and Fast-Configuration Non-Volatile Look-Up Table Based on NAND-Like Spintronic Memory
Area-efficient parallel-prefix Ling adders
Hybrid dynamic thermal management method with model predictive control
2-16 GHz Phase Shifter With Continuous 435° Phase-Control in 130 nm CMOS
Redesign modern IP router chips in a 3D technology
Outage probability of the overlapped carriers allocation scheme with imperfect power control in DS-CDMA
High-efficient queue-based spin locks for Network-on-Chip processors
Scalable video coding using allpass-based wavelet filters
A 5-b 1-GS/s binary-search ADC in 90nm CMOS
A Third-Order CIFF Noise-Shaping SAR ADC with Nonbinary Split-Capacitor DAC