yusuke1997/dblp-id-title huggingface dataset:
Implementation of Neuro-Fuzzy System based image edge detection
On the functional test of Branch Prediction Units based on Branch History Table
Parallel harmonic balance
Fast-transient, light-load efficient DC-DC converter using an auxiliary D-LDO
Power and energy reduction of racetrack-based caches by exploiting shared shift operations
An ASIC array architecture for the DITPOS algorithm
Power-aware and cost-efficient state encoding in non-volatile memory based FPGAs
Intelligent embedded and real-time ANN-based motor control for multi-rotor unmanned aircraft systems
Opportunities for integrating early-vision computation algorithms and VLSI technology to the development of smart sensors
A 0.2-to-2MHz BW, 50-to-86dB SNDR, 16-to-22mW flexible 4 th -order ΣΔ modulator with DC-to-44MHz tunable center frequency in 1.2-V 90-nm CMOS
Towards Robust Process Design Kits with a Scalable DevOps Quality Assurance Platform
Logic with Unipolar Memristors - Circuits and Design Methodology
Accelerating Large Kernel Convolutions with Nested Winograd Transformation
Design and Characterization of NULL Convention Arithmetic Logic Units
DynaCache: A Checkpoint Aware Reconfigurable Cache for Intermittently Powered Computing Systems
A Reconfigurable Fault Tolerant Module Approach to the Reliability Enhancement for Mesh Connected Processor Arrays
A New Power Efficient Fully Differential Low-Voltage Two Stage OP-AMP Architecture
100 Gbit/s authenticated encryption based on quantum key distribution
LeAF: A low-overhead asymmetric frequency controller for NoC router interconnects
SESAM extension for fast MPSoC architectural exploration and dynamic streaming applications
Improving DPA Resistance of Quasi Delay Insensitive Circuits Using Randomly Time-shifted Acknowledgment Signals
Soft Error Immune with Enhanced Critical Charge SIC14T SRAM Cell for Avionics Applications
Sleepy Keeper: a New Approach to Low-leakage Power VLSI Design
Efficient adaptive switch design for charge pumps in micro-scale energy harvesting
Architecture and implementation of real-time 3D stereo vision on a Xilinx FPGA
Current Mask Generation: an Analog Circuit to Thwart DPA Attacks
The Impact of Logic Synthesis and Technology Mapping on Logic Locking Security
Towards Generic Power/EM Side-Channel Attacks: Memory Leakage on General-Purpose Computers
PFT - A low overhead predictability enhancement technique for non-preemptive NoCs
Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs
A 86 nA and sub-1 V CMOS voltage reference without resistors and special devices
A 47nW, 0.7-3.6V wide Supply Range, Resistor Based Temperature Sensor for IoT Applications
Towards Reliable In-Memory Computing: From Emerging Devices to Post-von-Neumann Architectures
Fine Grain Precision Scaling for Datapath Approximations in Digital Signal Processing Systems
CongestionNet: Routing Congestion Prediction Using Deep Graph Neural Networks
A General Purpose Network Solving System
Exploration of Sequential Depth by Evolutionary Algorithms
Adapting the columns of storage components for lower static energy dissipation
Quantum Computing-Assisted Channel Estimation for Massive MIMO mmWave Systems
Characterization of chip-to-chip wireless interconnections based on capacitive coupling
Fast Fixed-Point Optimization of DSP Algorithms
Workspace and Methodology Management in the Octtools Environment
Automatic protocol configuration in single-channel low-power dynamic signaling for IoT devices
A Low Area Overhead Packet-switched Network on Chip: Architecture and Prototyping
Embedded and Real-Time Anomalous Command Classification in Unmanned Ground Vehicle Operations
Continuous authentication of UAV flight command data using behaviometrics
On-chip Pseudorandom Testing for Linear and Nonlinear MEMS
Dynamic Reconfigurable Architecture Exploration based on Parameterized Reconfigurable Processor Model
Logic synthesis and testability of D-reducible functions
Quantitative Optimization and Early Cost Estimation of Low-Power Hierarchical-Architecture SRAMs Based on Accurate Cost Models
Design and Mitigation Techniques of Radiation Induced SEEs on Open-Source Embedded Static RAMs
Design of low-complexity and high-speed digital Finite Impulse Response filters
A New Macro-cell Generation Strategy for three metal layer CMOS Technologies
Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings
Application of Scan-Based DFT Methodology for Detecting Static and Timing Failures in VLSI Components
Challenges Towards Hardware Acceleration of the Deformable Shape Tracking Application
Network interface to synchronize multiple packets on NoC-based Systems-on-Chip
A time interleaved DAC sharing SAR Pipeline ADC for ultra-low power camera front ends
Self similarity and interval arithmetic based leakage optimization in RTL datapaths
A new method for retiming multi-functional processing units
Spatial EM jamming: A countermeasure against EM Analysis?
A CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs
Security Assessment of Heterogeneous SoC-FPGA: On the Practicality of Cache Timing Attacks
Models for Full-Chip Power Dissipation in Field Programmable Gate Arrays and the Impact of Subthreshold Leakage Current
A Genetic Algorithm for Restricted Cases of the Rectilinear Steiner Problem with Obstacles
10Mbps human body communication SoC for BAN
A Hybrid Cache HW/SW Stack for Optimizing Neural Network Runtime, Power and Endurance
Uniform carbon nanotube diameter and nanoarray pitch for VLSI of 16nm P-channel MOSFETs
Practical Side-Channel and Fault Attacks on Lattice-Based Cryptography
Optimization Tools for ConvNets on the Edge
Fully adaptive multicore architectures through statically-directed dynamic execution reconfigurations
Early bird sampling: A short-paths free error detection-correction strategy for data-driven VOS
Smart camera SoC system for interactive real-time real-brush based digital painting systems
On the Comparison of Different Number Systems in the Implementation of Complex FIR Filters
Reducing test time for 3D-ICs by improved utilization of test elevators
Analog Compute in Memory and Breaking Digital Number Representations
Proceedings of the International Conference on VLSI, VLSI '03, June 23 - 26, 2003, Las Vegas, Nevada, USA
Reconfigurable Rectifier for RF Energy Harvesting System at WiFi-6 Frequency Band for 2.5 V
In Quest for Fast and Secure SoC
High Level Synthesis Acceleration of Change Detection in Multi-Temporal High Resolution Sentinel-2 Satellite Images
Methodology for early estimation of hierarchical routing resources in 3D FPGAs
A Novel Current Comparator Enabling Large RRAM Crossbars for BNNs and PUFs
Electromagnetic analysis, deciphering and reverse engineering of integrated circuits (E-MATA HARI)
Design optimization of polyphase digital down converters for extremely high frequency wireless communications
MSL: A High-Level Language for Parameterized Analog and Mixed Signal Layout Generators
Molecular Electronics - Devices and Circuits Technology
Enhanced Diagnosis of Failing Bits in Memory Built-in Self-Test
A Flexible ASIC for Time-Domain Decision-Directed Channel Estimation in MIMO-OFDM Systems
Communication-aware middleware-based design-space exploration for Networked Embedded Systems
Accelerating 3D scene analysis for autonomous driving on embedded AI computing platforms
Are coarse grain reconfigurable architectures suitable for cryptography?
Design of a Reconfigurable Optical Computing Architecture Using Phase Change Material
Approximation Workflow for Energy-Efficient Comparators in Decision Tree Applications
A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4
Hardware Implementation and Evaluation of an Information Processing Factory
Reliable ReRAM-based Logic Operations for Computing in Memory
Power-aware SoC test optimization through dynamic voltage and frequency scaling
Adaptive Random Forests for Energy-Efficient Inference on Microcontrollers
A 6.35Mbps 1024-bit RSA crypto coprocessor in a 0.18um CMOS technology
Architecture and 28 nm CMOS Design of a 1886 MBin/sec Context-Adaptive Binary Arithmetic Coder (CABAC) Encoder
Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography
Reconfigurable forward homography estimation system for real-time applications
A VLSI circuit for on-line polynominal computing: Application to exponential, trigonometric and hyperbolic functions
Fast Instruction Memory Hierarchy Power Exploration for Embedded Systems
Fine-grained adaptive CMP cache sharing through access history exploitation
AES design space exploration new line for scan attack resiliency
Speeding up Online Placement for XILINX FPGAs by Reducing Configuration Overhead
Testing the Divergence Stack Memory on GPGPUs: A Modular in-Field Test Strategy
A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication
Dynamic Models for Substrate Coupling in Mixed-Mode Systems
3D NoC using through silicon Via: An asynchronous implementation
Control electronics integration toward endoscopic capsule robot performing legged locomotion and illumination
On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling
Architecture-Compiler Co-design for ReRAM-Based Multi-core CIM Architectures
Processors as SoC building blocks
A Novel full Automatic Layout Generation Strategy for Static CMOS Circuits
Timing attack on NEMS relay based design of AES
Aging-aware caches with graceful degradation of performance
A Lifting-Based Discrete Wavelet Transform and Discrete Wavelet Packet Processor with Support for Higher Order Wavelet Filters
Design of nonvolatile processors and applications
Electromagnetic analysis and fault injection onto secure circuits
Integrated Soft Error Resilience and Self-Test
Restricting writes for energy-efficient hybrid cache in multi-core architectures
On Efficient Behavioral Modeling to Accurately Predict Supply Noise Effects of PLL Designs in Real Systems
Continuity in Security: Leveraging LLM for Translating Security Properties Across Hardware Designs
Design and characterisation of a Physically Unclonable Function on FPGA using second-order compensated measurement
Opportunistic circuit-switching for energy efficient on-chip networks
VLSI models of network-on-chip interconnect
A multiple valued logic approach for the synthesis of garbled circuits
Online digital compensation Method for AMR sensors
FPGA-Based High-Speed Authenticated Encryption System
Analog-to-digital converters power dissipation limits of CBSC-based pipelined
Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint
A subthreshold digital maximum power point tracker for micropower piezoelectric energy harvesting applications
Design of Latch based Configurable Ring Oscillator PUF Targeting Secure FPGA
Effect of Power Optimizations on Soft Error Rate
Frequency Synthesizers for 5G Applications
JAIP-MP: A Four-Core Java Application Processor for Embedded Systems
SystemC AMS behavioral modeling of a CMOS video sensor
Approximate Matrix Inversion for Linear Pre-coders in Massive MIMO
High Performance System Architecture of an Associative Computing Engine Optimised for Search Algorithms
Full custom design of a three-stage amplifier with 5500MHz·pF/mW Performance in 0.18 mum CMO S
Universal Methodology to Handle Differential Pairs during Pin Assignment
Processor Testing Using an ADL Description and Genetic Algorithms
Efficient Power Management Strategy of FPGAs Using a Novel Placement Technique
A graph-coloring approach to the allocation and tasks scheduling for reconfigurable architectures
A physical design study of fabscalar-generated superscalar cores
Directed Convergence Heuristic: A fast & novel approach to Steiner Tree Construction
Prediction horizon vs. efficiency of optimal dynamic thermal control policies in HPC nodes
An Integrated Model Bridging the Gap between Technology and Economy
Input/Output Design for VLSI Array Architectures
Open-Source EDA: If We Build It, Who Will Come?
High-level timing analysis of concurrent applications on MPSoC platforms using memory-aware trace-driven simulations
Probabilistic amp; Statistical Design - the Wave of the Future
Systematic Embedded Development and Implementation Techniques on Intel Myriad VPUs
Comparing Transformation Schemes for VLSI Array Processor Design - A Case Study
On the development of diagnostic test programs for VLIW processors
Exact BDD Minimization for Path-Related Objective Functions
A Low-Voltage Low-Power Digital-Audio Sigma-Delta Modulator in 0.18-µm CMOS
On the synthesis of attack tolerant cryptographic hardware
A Temperature-Aware Placement and Routing Algorithm Targeting 3D FPGAs
Self-dependent equivalent circuit modeling of electrostatic comb transducers for integrated MEMS
Zero-Trust Communication between Chips
Implementation and analysis of hotspot mitigation in mesh NoCs by cost-effective deflection routing technique
CLEO-CoDe: Exploiting Constrained Decoding for Cross-Layer Energy Optimization in Heterogeneous Embedded Systems
RIBiT: Reduced Intra-flit Bit Transitions for Bufferless NoC
Dynamic power management for multicores: Case study using the intel SCC
A CMOS 4-bit Digitally Programmable Phase Shifter for the K-band
Automated functional coverage directed for complex digital systems
ReRAM-based In-Memory Computation of Galois Field arithmetic
SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors
Transparent acceleration of data dependent instructions for general purpose processors
A Sigma-Delta Modulator Development Environment for Fractional-N Frequency Synthesis
High-speed Binary Signed-Digit RNS adder with posibit and negabit encoding
An ULP Self-Supplied Brain Interface Circuit
Device Modeling and Circuit Design for Scalable Beyond-CMOS Computing
P 2 M-DeTrack: Processing-in-Pixel-in-Memory for Energy-efficient and Real-Time Multi-Object Detection and Tracking
X-MAGIC: Enhancing PIM Using Input Overwriting Capabilities
Power-efficient and slew-aware three dimensional gated clock tree synthesis
Hardware Considerations for Selection Networks
Exploring the Capabilities of Reconfigurable Hardware for OFDM-based WLANs
Automatic Interfacing of Synchronous Modules to an Asynchronous Environment
Mapping Spiking Neural Networks on Multi-core Neuromorphic Platforms: Problem Formulation and Performance Analysis
Physical-based modeling and fast simulation of wireline links
An Area-Efficient Timing Closure Technique for FPGAs Using Shannon's Expansion
Size of Quantum Versus Deterministic Finite Automata
Evaluating the Impact of Process Variability and Radiation Effects on Different Transistor Arrangements
Rectification of Arithmetic Circuits with Craig Interpolants in Finite Fields
Neuromorphic building blocks for adaptable cortical feature maps
SANSCrypt: Sporadic-Authentication-Based Sequential Logic Encryption
A VHDL based approach for fast and accurate energy consumption estimations
Positive realization of reduced RLCM nets
Deriving Bit-Serial Circuits in Ruby
Low-Overhead Early-Stopping Policies for Efficient Random Forests Inference on Microcontrollers
A minimum-latency block-serial architecture of a decoder for IEEE 802.11n LDPC codes
Circuit-Level Techniques to Mitigate Process Variability and Soft Errors in FinFET Designs
Universal Reed-Solomon Decoder Using Hardware/Software Co-Design Method
How to Compare Analog Results
Substrate Effect on Low-frequency Noise of synaptic RRAM devices
Performance Analysis of Greedy and Auction-Based Resource Allocation Algorithms in Ubiquitous Computing Environments
Online periodic test mechanism for homogeneous many-core processors
Design and Verification of Lazy and Hybrid Implementations of the SELF Protocol
PEACH: A Novel Architecture for Probabilistic Combinational Equivalence Checking
Suppression of on-chip power supply noise generated by a 64-bit static logic ALU block
Exploiting Program Slicing and Instruction Clusterization to Identify the Cause of Faulty Temporal Behaviours at System Level
A high-speed high-resolution low-phase noise oscillator using self-timed rings
NEATRouter: A New Method for 2D Global Routing
Flare reduction in EUV Lithography by perturbation of wire segments
Analog layer extensions for analog/mixed-signal assertion languages
Efficient handling of the fault space in functional safety analysis utilizing formal methods
Compute-In-Place Serial FeRAM: Enhancing Performance, Efficiency and Adaptability in Critical Embedded Systems
Power dissipation effects on 28nm FPGA-based System on Chips neutron sensitivity
Energy-Efficient SNN Implementation Using RRAM-Based Computation In-Memory (CIM)
An Object-Oriented, Capability-Based Architecture
A Bandwidth-Aware Authentication Scheme for Packet-Integrity Attack Detection on Trojan Infected NoC
Robust design of sub-threshold flip-flop cells for wireless sensor network
Designing Low Power Direct Digital Frequency Synthesizers
Mapping of CNNs on multi-core RRAM-based CIM architectures
Using asymmetric layer repair capability to reduce the cost of yield enhancement in 3D stacked memories
The chaos router chip: design and implementation of an adaptive router
SoC FPGA Acceleration for Semantic Segmentation of Clouds in Satellite Images
Personal Communicators: A better way to stay in touch
VLSI 91, Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration, Edinburgh, Scotland, 20-22 August, 1991
Towards Energy Efficient DNN accelerator via Sparsified Gradual Knowledge Distillation
Realizing a security aware triple modular redundancy scheme for robust integrated circuits
SEBSW-2: SEcret-Key Block Cipher SWitcher
ReRAM Based In-Memory Computation of Single Bit Error Correcting BCH Code
A Flow-Oriented Approach to the Placement of Boolean Networks
SAT-Based Data-Flow Mapping Onto Array Processor
An Instruction Set Architecture for Secure, Low-Power, Dynamic IoT Communication
Synchronous duty cycle correction circuit
Analysis and testing on delays with two time frames
Compact interconnect approach for networks of neural cliques using 3D technology
A Circuit-Level SPICE Modeling Strategy for the Simulation of Behavioral Variability in ReRAM
A low power high performance CMOS voltage-mode quaternary full adder
Hierarchical statistical analysis of performance variation for continuous-time delta-sigma modulators
System and Procesor Design Effort Estimation
Design Automation for Side Channel Resistant Lightweight Cryptography
A passive equalizer and its design methodology for global interconnects in VLSIs
Learning Analytics on federated remote laboratories: Tips and techniques
A field experiment with an animated intelligent tutor in Portugal
Intelligent student profiling for predicting e-Assessment outcomes
Integrating Personalized Educational Concepts for Enhancing Communication Skills Through the Strengthening of Related Microskills: A Case Study at University of Rome "Sapienza"
Understanding of the Nature of Engineering: Examining the Gap Between Engineering Experts and Pre-Service Teachers
Increasing Engagement in a Network Security Management Course through Gamification
Robotics tips and tricks for inclusion and integration of students
Concepts of the international manufacturing remote lab (MINTReLab): Combination of a MOOC and a remote lab for a manufacturing technology online course
Design Process of Extended Reality Educational Resources in Engineering: A Comparison of Three Cases in Latin American Universities
Work in Progress: Novel Didactic Training Platform for Transistor Devices and Applications
Innovative System Design for Remote Air Traffic Control Simulation Training
Correspondence between KOLBAS experiential learning and rigor-relevance framework
Individual Students Interest and Argumentative Skills Improvement Using Social Media and AJA Strategy
Implementation of Research-based Experiential Learning for Electrical Engineering Master's Students during Covid-19 Pandemic
A Holistic Approach to Assess Learning Outcome Attainment Levels for Engineering Programs
Development of an Aiding Tool for Classroom Action Research in Pre-Service Teacher Education
Impersonating Chatbots in a Code Review Exercise to Teach Software Engineering Best Practices
Bootstrapping serious games to assess learning through analytics
Work in progress: Combining active learning methods in engineering education
Pictoch: A Block-based Programming Learning Environment through Pictogram Content Creation
Language Expression Technicality in Technical Report Writing for Technology Major Non-Native Students
Selection and evaluation of mobile mathematical learning applications
Building excellence in engineering education in India
A closer look to STEM education across continents: insights from a multicultural panel discussion
3D AutoSysLab prototype
Detailed Comparison of Instructor and Student-based Assessment in Project Based Learning
RECoNE: A Remote Environment for Computer Networks Education
Investigating the Situation of Brazilian Undergraduate Students during the COVID-19 Pandemic
Automatic assessment system for large groups using Information and Communication Technologies
A learning approach to circuitry problems using MATLAB and PSPICE
EduApp: A Collaborative Application for Mobile Devices to Support the Educational Process in Greek Secondary Education
Incorporating the iPad in the mathematics classroom
Universal IT Support Design for Engineering Education
Desktop VR systems - A distance learning method and technology
Gamification in MOOCs: A review of the state of the art
Practicing Abstraction Skills Through Diagrammatic Reasoning Over CAFÉ 2.0
Knowledge Generation in Higher Education Institutions
"Yo quiero ser científica" a creative way to inspire girls in science
Technology Assessment as a Field of Professional Competency of Technoscience Society Engineers
Short experimental ceramic projects to incentivate mechanical engineering students
Using collegiate competitions to provide an enhanced engineering education: A case study
"Beautiful Patterns 2019" MIT and Tecnologico de Monterrey high-impact IT/K12-STEM transnational initiative for young women students
Teacher perceptions of training and intention to use robotics
An Exploration of the Efficacy of Project-based Assessment as a Tool to Promote Basic Research Skills at Undergraduate Level in South African Rural Universities
Effects of Class Modality Switches in Teaching Introductory Programming to Humanities Students
Comparing computational thinking development assessment scores with software complexity metrics
Factors Influencing Faculty Use of Active Learning Strategies in Engineering and Computing: A Study in a Peruvian University
Throwing the baby out with the bathwater? The role of fundamentals in 21 st century engineering education
Enhancement of IT student projects using 3D technology
IoT as an Introduction to Computer Science and Engineering: A Case for NodeMCU in STEM-C Education
Learning with computer games or teacher: How it influences the learning experience and outcomes at primary school
Crowdsourcing-Based Learning: the Effective Smart Pedagogy for STEM Education
Game-based learning efficiency - study results of using the computerised board game "Architectural Jewels of Lublin"
Integrating Soft Skills into English Language Teaching in Englineering Education
The Effect of Computer Self-Efficacy on Entrepreneurial Aspirations of Students
Analytics for Supporting Teaching Success in Higher Education: A Systematic Review
An Interactive STEAM Educational Approach via a Combination of Programming, Information & Communication Network and Arts: PICAPICA-Z
The employer perspective on employability
Recent trends in online mutimedia education for heterogeneous end-user devices based on Scalable Video Coding
Mockup didatic set for students development in automotive electronic
Virtual and Augmented Reality for Digital Medicine - Design and Implementation of a Hybrid, Interdisciplinary Course for Engineering and Medical Students
Lifting the constraints - Closing the skills gap with authentic student projects
The Impact of Chatbots on Students' Reflective Thinking in Introductory Programming Course
EOLES course the first accredited on-line degree course in electronics and optics for embedded systems