yusuke1997/dblp-id-title huggingface dataset:
An efficient method for integer factorization
Motion artifact reduction from PPG signals during intense exercise using filtered X-LMS
An adaptable foveating vision chip
Objective quality assessment for compressed video
Interference reduction in nerve cuff electrode recordings-a new approach
The Design and Implementation of a Highly Efficient Motion Estimation Engine for HEVC Systems
A 216 μW, 87% Accurate Cow Behavior Classifying Decision Tree on FPGA with Interpolated Arctan2
Novel Low Voltage Current-mirror Sense Amplifier based Flip-Flop with Reduced Delay Time
Programmable voltage-output, floating-gate digital-analog converter
Considerations on the control design of DC-link based inverters in grid-connected photovoltaic systems
A Fully-Digital 2-MB/sec CMOS Data Separator
Observation of high-frequency analog/RF electrical circuit characteristics by on-chip thermal measurements
A Quantitative Analysis of Catastrophic Forgetting in Quantized Spiking Neural Networks
10-bit programmable voltage-output digital-analog converter
A Dual-Quantization Multi-Bit Sigma Delta Analog/Digital Converter
Recovering Accuracy of RRAM-based CIM for Binarized Neural Network via Chip-in-the-loop Training
An Approach to Bridging the Gap Between Discrete-Time and Continuous-Time Coupled Systems
Efficient Message Passing Architecture for High Throughput LDPC Decoder
Towards Optimizing Physical Reservoir Computing: A Hybrid PCPO-ESN Framework for Time Series Forecasting
A visually-lossless data hiding method based on histogram modification
On the topographic equivalence between voltage mode and current mode ranked order filters for array processors
Estimation of the Switching Activity in Shift-and-add based Computations
Stage-combined belief propagation decoding of polar codes
Probability updating-based adaptive hybrid coding (PUAHC)
An Energy-efficient Dual Sampling SAR ADC with Reduced Capacitive DAC
A fast chip-scale power estimation method for large and complex LSIs based on hierarchical analysis
Video-Active RAM: A processor-in-memory architecture for video coding applications
A 1-V CMOS log-domain integrator
A compact and low power bandpass amplifier for low bandwidth signal applications in 65-nm CMOS
A Ready-to-Use RTL Generator for Systolic Tensor Arrays and Analysis Using Open-Source EDA Tools
On-chip debug support for embedded Systems-on-Chip
List based soft-decision MIMO detection by the MCTS algorithm
Data-driven human motion synthesis based on angular momentum analysis
Synthesis scheme for low power designs with multiple supply voltages by tabu search
Implantable MEMS Accelerometer Microphone for Cochlear Prosthesis
An analogue multilayer perceptron circuit with on-chip training
A High Accuracy Multiple-Command Speech Recognition ASIC Based on Configurable One-Dimension Convolutional Neural Network
Assessment of parameter extraction methods for integrated inductor design and model validation
Quantifying the contact memory in temporal human interactions
FMO slice group maps using spatial and temporal indicators for H.264 wireless video transmission
Stability, controllability and observability of 2-D continuous-discrete systems
Towards a High Accuracy Wearable Hand Gesture Recognition System Using EIT
SaLIC: Saliency-Enhanced Learned Image Compression for Balanced Quality
Combined packet and TDM circuit switching NoCs with novel connection configuration mechanism
Robust response control with linear inequality matrix constraints for adaptive beamformer
Predictive equalizer design for DVB-T system
Low voltage high current gain CMOS digitally controlled fully differential CCII [variable gain amplifier application example]
JPEG2000 for digital cinema
Requirements and Challenges for Modelling Redox-based Memristive Devices
Fractional polynomials and nD systems
Cost-efficient CMOS RF tunable bandpass filter with active inductor-less biquads
A Low-complexity and Reconfigurable Design for Nonlinear Function Approximation in Transformers
A Stream Hardware Architecture for Keypoint Matching Based on a Speculative Approach
Cost-oriented design of a 14-bit current steering DAC macrocell
Characterization of Charge-Trap-Transistor (CTT) Threshold Voltage Degradation and Differential-Pair-Based Memory Design
Time delay circuits: A quality criterion for delay variations versus frequency
Low phase noise on-chip oscillator for implantable biomedical applications
Injection Locking of Ring Oscillators with Digitally Controlled Delay Modulation
A new non-iterative model for switching window computation with crosstalk noise
JPEG image steganalysis utilizing both intrablock and interblock correlations
RectBoost: Start-Up Boosting for Rectenna Using an Adaptive Matching Network
A 10Gbps CDR based on phase interpolator for source synchronous receiver in 65nm CMOS
Dither incorporated deterministic dynamic element matching for high resolution ADC test using extremely low resolution DACs
Low-voltage continuous-time CMOS current amplifier with dynamic biasing
A data embedding scheme for H.263 compatible video coding
Parallel, memory access schemes for H.263 encoder
A single-slope based low-noise ADC with input-signal-dependent multiple sampling scheme for CMOS image sensors
Effective retargeting for image coding
Energy dissipation modeling of lossy transmission lines driven by CMOS inverters
Adiabatic capacitive logic: A paradigm for low-power logic
A 15-bit two-step sigma-delta ADC with embedded compression for image sensor array
Convergence of Adaptive Algorithms with Order Statistic Based Gradient Estimates
Fully programmable bias current generator with 24 bit resolution per bias
Further results on complex Chebyshev FIR filter design using a multiple exchange algorithm
A High-Resolution Oscillator Based Resistance-to-Digital Converter with Non-Linearity Canceling Feedback by ΔΣ Modulated Variable Resistor
Complexity Comparison of Linear-Phase Mth-Band and General FIR Filters
FGS-based video streaming test-bed for MPEG 21 universal multimedia access with digital item adaptation
Low variation current source for 90nm CMOS
Differential Fowler-Nordheim Tunneling Dynamical System for Attojoule Sensing and Recording
A Power-Efficient Current Generator with Common Mode Signal Autozero Feedback for Bioimpedance Measurement Applications
LARE: A Linear Approximate Reinforcement Learning Based Adaptive Routing for Network-on-Chips
TAAC: Task Allocation Meets Approximate Computing for Internet of Things
A preamplifier for the front-end readout system of particles tracking in secondary electron detectors
Low power implementation of an n-tone Sigma Delta converter
The linear time-varying approach applied to a first-order dynamic translinear filter
Low-frequency bifurcation behaviors of PFC converter
An approach to thermal placement in power electronics using neural networks
Live Demonstration: Crowdsourcing Cardiopulmonary Sound Labeling via Gamified Interactive Learning (HEALSound)
Dimensioning and comparison of common compensation topologies for IPT systems
Cost-efficient decimal adder design in Quantum-dot cellular automata
Post-processing of data generated by a chaotic pipelined ADC for the robust generation of perfectly random bitstreams
A solution for minimizing phase noise in low-power resonator-based oscillators
Low voltage four-quadrant analog multiplier using square-root circuit based on CMOS pair
Managing inductive coupling in wide signal busses
An integrated linear RF power detector
Minimum mean square error quantizers with uncorrelated input and quantization noise
Efficiency of the transformer version of class E half-ware low dv D /dt rectifier
Learning characteristics of adaptive fault tolerant filters in the presence of transient errors
Recent advances in optical Reservoir Computing
Exploring the Global Dynamics of Networks Trained through Equilibrium Propagation
λ Domain based optimal bit allocation for scalable high efficiency video coding
A 10-bit 500-MS/s 124-mW Subranging Folding ADC in 0.13 µm CMOS
An 800 kS/s 1.83 fJ/conv. 12b ADC via Voltage Successive Approximation and Gated Cyclic Vernier Time Digitization
Efficient Neural Compression with Inference-time Decoding
A physiological valence/arousal model from musical rhythm to heart rhythm
Minimizing switching activity in input word by offset and its low power applications for FIR filters
A 0.6V Digital-intensive Pulse Injection 32-kHz Crystal Oscillator Using Stacked Logic Gates
A new electric encoder position estimator based on the Chinese Remainder Theorem for the CMG performance improvements
Low-Cost Remarked Counterfeit IC Detection using LDO Regulators
A new method of semi-symbolic network analysis
Design of variable fractional delay FIR filter using symmetry
Digital Twin of eGastronomic Things: A Case Study for Ice Cream Machines
A 50-MHz BiCMOS quadrature charge sampler and complex bandpass SC filter for narrowband applications
Live Demonstration: Performance Evaluation of Electrical Impedance Tomography Systems using a Color-Coded Full Reference SNR Method
A new memristor based on NiTi smart alloys
Analysis of digital gain error compensation in continuous-time cascaded sigma-delta modulators
A 36pW CMOS Voltage Reference With Independent TC and Output Level Calibration for Miniature Low-Power Systems
A fourth-order CMOS bandpass amplifier with high linearity and high image rejection for GSM receivers
A single chip 200 MHz digital correlation system for laser spectroscopy with 512 correlation channels
Analytical expression of HD3 due to non-linear MOS switch in MOSFET-C sample and hold circuits
A Robust Affine Projection Algorithm with Feedback Compensation of the Condition Number
A study on MOSFET rectifiers maximum output voltage for RF power harvesting circuits
A Cartesian Feedback Feedforward Transmitter
On sparsity issues in compressive sensing based speech enhancement
Polyhedric approximation and tracking for bounded-error models
Spectral aliasing effects of PWM signals with time-quantized switching instants
A novel CFAR intrusion detection method using chaotic stochastic resonance
A high linear low flicker noise 25% duty cycle LO I/Q mixer for a FM radio receiver
MEMS-based all-digital frequency synthesis for ultralow-power radio for WBAN and WSN applications
A High-Accuracy and Low-Resource Design for Nonlinear Functions in AI Accelerators
Software radio based re-configurable correlator/FIR filter for CDMA/TDMA receiver
A new semi-analytic approach for class-E resonant DC-DC converter design
Novel Sorting Netowrk-Based Architectures for Rank Order Filters
Implementations of Adaptive IIR Filters with Lowest Complexity
Assertion-based verification of industrial WLAN system
A Study on Convergence of Competitive CNNs
High-voltage-tolerant power supply in a low-voltage CMOS technology
Wireless Sensor Network and Irrigation System to Monitor Wheat Growth under Drought Stress
Higher-order DWA in bandpass delta-sigma modulators and its implementation
Wide Range Gain Programmable Class AB Current Mirrors for Low Supply Operation
Comparison of Symbolic Approximation and Macromodelling Techniques for Statistical Design of Analog Integrated Circuits
Live demonstration: Real-time chemical imaging of ionic solutions using an ISFET array
Strategies for on-chip sub-nanosecond signal capture and timing measurements
28-nm 1T-1MTJ 8Mb 64 I/O STT-MRAM with symmetric 3-section reference structure and cross-coupled sensing amplifier
Small-Signal Circuit Model for Synchronous Buck DC/DC Converter featuring ZVS at Low-Side
A dual-mode VCO based low-power synthesizer with optimized automatic frequency calibration for software-defined radio
Flexible Hybrid Electronics: Review and Challenges
Building synchronizable and robust networks
Hardware Implementation of High-Performance Polynomial Multiplication for KEM Saber
Bit-Serial Dual Basis Systolic Multipliers for GF 2 m
Enhancing SAT-Attack Resiliency and Cost-Effectiveness of Reconfigurable-Logic-Based Circuit Obfuscation
Effect of mismatch on a ranked-order extractor array [image processing applications]
A 4-bit Integer-Only Neural Network Quantization Method Based on Shift Batch Normalization
Investigation of BTI reliability for monolithic 3D 6T SRAM with ultra-thin-body GeOI MOSFETs
Photo-voltaic power converter with a simple maximum-power-point-tracker
Power Oscillator Design: Class E
A 0.22 pJ/step subsampling ADC with fast input-tracking sampling and simplified opamp sharing
Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation
An ensemble average approach to remove adverse effects on power spectral estimation due to sampling jitters
A Novel Generic Low Latency Hybrid Architecture for Parallel Pipelined Radix-2 k Feed Forward FFT
The joint detect and decoding approach for MIMO systems with turbo codes
Addressing crosstalk issue in on-chip carbon nanotube interconnects using negative capacitance
Optimization of the integrator output swing in low-voltage sigma-delta modulators
ECC Processor with Low Die Size for RFID Applications
Movement recognition and strain lecture algorithm for fracture monitoring system
Slew rate induced distortion in switched-resistor integrators
Yet another analog 2D Gaussian convolver
Enhanced multiple Huffman table (MHT) encryption scheme using key hopping
Oscillation-based DFT for second-order OTA-C filters
Analytical passive mixer power gain models
A direct-sequence spread-spectrum super-regenerative receiver
Compact Yet Highly Accurate Printed Classifiers Using Sequential Support Vector Machine Circuits
Bias current generators with wide dynamic range
Current Feedback Opamp Limitations: A State-of-the-art Review
An ultra low power UHF RFID tag front-end for EPCglobal Gen2 with novel clock-free decoder
A fast AGC method for multimode zero-IF/sliding-IF WPAN/BAN receivers
Blind SIMO channel estimation for CPM using the Laurent approximation
Synthesis of multiple-input translinear element log-domain filters
Residual sampling clocking offset estimation and compensation for FBMC-OQAM baseband receiver in the 60 GHz band
A 20-Gb/s 1.27pJ/b low-power optical receiver front-end in 65nm CMOS
Four-channel SiGe transimpedance amplifier array for parallel optical interconnects
High level hardware/software communication estimation in shared memory architecture
A Power-Efficient, Wide-Frequency-Range Impedance Measurement IC Using Frequency-Shift Technique
On passivity of delayed Markovian jump systems subject to parametric uncertainties
Image quality assessment by using neural networks
Radial distribution power flow studies in a remotely distributed environment
Operational Region of Novel Multi-Coil Series-Series Compensation inWireless Power Transfer System for Electric Vehicle Applications
Associative Dynamics of Competitive Cellular Neural Network
Placement and Routing by Overlapping and Merging QCA Gates
A Precision Output Conductance Model for Analog CMOS Circuit Simulations
Trapping region for the double scroll attractor
Multi-scale 3D-CNN for Alzheimer's Disease Classification
Topology identification of an uncertain general complex dynamical network
A multidimensional transfer function model for frequency dependent transmission lines
New cost-effective VLSI implementation of multiplierless FIR filter using common subexpression elimination
A 9-nW on-chip constant subthreshold CMOS transconductance bias with fine-tuning
A Computational Efficient Architecture for Extremely Sparse Stereo Network
Exploring logic architectures suitable for TFETs devices
A canonical form for discrete-time systems defined over  +
A GaN Driver with Almost Constant dv/dt during Miller Plateau for V-I Overlap Loss Reduction
Investigating Distinct Intensity Levels in Electrotactile Machine-to-Human Communication
High-speed implementation of analysis/synthesis filter banks
Low-Power Low-Data-rate Wireless PPM Receiver Based on 13-Bits Barker Coded SAW Correlator with Scalable Data-rate and Sensitivity
A wireless multichannel optogenetic headstage with on-the-fly spike detection
Resistive Feedback LNA design using a 7-parameter design-oriented model for advanced technologies
PSumSim: A Simulator for Partial-Sum Quantization in Analog Matrix-Vector Multipliers
Sensitivity Analysis for Minimization of Input Data Dimension for Feedforward Neural Network
Low-power distributed arithmetic architectures using nonuniform memory partitioning
Inductorless Bandpass Noise-Shaping Continuous-Time Pipelined ADC Architectures
Spiking analog VLSI neuron assemblies as constraint satisfaction problem solvers
Chroma Coding Efficiency Improvement with Context Adaptive Lagrange Multiplier (CALM)
Exploiting a Blink of Measurement Saturation Towards Hardware-Efficient Compressed Sensing Encoder Design
A CMOS bandgap reference circuit for sub-1-V operation without using extra low-threshold-voltage device
Voltage Divider for Self-Limited Analog State Programing of Memristors
Methodology for the Design of Signed-digit DSP Processors
Analog Computing: from Fundamentals to Applications
Hybrid CMOS/Memristor Front-End for Multiunit Activity Processing
A method for finding the DC solution regions in piecewise-linear networks
Leaky LMS: A Detailed Analysis
Context-based Arithmetic Coding Reexamined for DCT Video Compression
Managing substrate and interconnect noise from high performance repeater insertion in a mixed-signal environment
An on-chip para-C calibration architecture for successive approximation ADC
Resistance impact by long connections on electrical behavior of integrated Memristive Biosensors
A new active learning method based on uncertainty sampling and redundancy alleviation strategy
A comprehensive comparison of superior triple-threshold-voltage 7-transistor, 8-transistor, and 9-transistor SRAM cells
A 60-GHz low-noise variable-gain amplifier in a 130-nm BiCMOS technology for sixport applications
Accounting for Memristor I-V Non-Linearity in Low Power Memristive Amplifiers
Image-driven simplification with single viewpoint
Multiband room effect simulator for 5.1-channel sound system
Realization of lattice-form separable-denominator 2D adaptive filters
Extended fast fixed order RLS adaptive filters
Global stability of a recurrent neural network for solving pseudomonotone variational inequalities
Predicting Complex Chaotic Time Series via Complex Valued MLPs
An improved bandgap reference with high power supply rejection
Overview of quality assessment for visual signals and newly emerged trends
Post-optimization design centering for RF integrated circuits
An EMG Gesture Recognition System with Flexible High-Density Sensors and Brain-Inspired High-Dimensional Classifier
Electrical isolation and fanout in intra-chip optical interconnects
Combined RF Phase Extraction and Digitalization
A study of encoding and decoding techniques for syndrome-based video coding
Sine-shaping mixer for continuous-time ΣΔ ADCs
IVCA: Inter-relation-aware Video Complexity Analyzer
Characterization of a high dynamic range lab-on-CMOS capacitance sensor array
SVD-based approximations of bivariate functions
A new non-local video denoising scheme using low-rank representation and total variation regularization
Hardware-Friendly Coding Unit Decision Scheme for HEVC
Direct recursive structures for computing radix-r two-dimensional DCT
Cause Analysis Method of Entropy Loss in Physically Unclonable Functions
Apples and Oranges? Assessing Image Quality over Content Recognition
GNRFET-Based DC-DC Converters for Low Power Data Management in ULSI System, a Feasibility Study
TAGAN: Texture and Attention Guided Generative Adversarial Network for Image Super Resolution
Understanding complexity in multiphysics systems-on-a-chip: Modern approaches for design
Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264
Efficient coarse frequency synchronizer using serial correlator for DVB-S2
Stochastic Modeling to Accelerate Approximate Operators Simulation
Dynamical Organization of Cooperation on Homogeneous Networked System
A fast algorithm to reduce 2-dimensional assignment problems to 1-dimensional assignment problems for FPGA-based fault simulation
Power Grid Analysis of Dynamic Power Cutoff Technology
A 6-10-GHz ultra-wideband tunable LNA
Low-Quiescent Current Class-AB CMOS LDO Voltage Regulator
FPGA-based Hardware Software Co-design to Accelerate Brain Tumour Segmentation
A low power analog voltage similarity circuit
A dependent switched capacitor A/D converter for Farey series approximation
A multiplication-accumulation computation unit with optimized compressors and minimized switching activities
Network-on-chip-centric approach to interleaving in high throughput channel decoders
Design of a Power-aware Digital Image Rejection Receiver
Experimental gigabit multidrop serial backplane for high speed digital systems
Design of a shared-stage charge pump circuit for multi-anode microbial fuel cells
Static Error Analysis and Optimization of Faithfully Truncated Adders for Area-Power Efficient FIR Designs
An efficient matrix iterative algorithm for the WLS design of 2-D FIR filters
An efficient dual-interpolator architecture for sub-pixel motion estimation
Fault Simulation of an OTA Biquadratic Filter
Adaptive Variable Switching Frequency Digital Controller Algorithm to Optimize Efficiency
An accurate behavioral model of phase detectors for clock recovery circuits
Memory-based low density parity check code decoder architecture using loosely coupled two data-flows
Designing Efficient Online Testable Reversible Adders With New Reversible Gate
3.125 Gb/s power efficient line driver with 2-level pre-emphasis and 2 kV HBM ESD protection
A sub-100nA power management system for wireless structure health monitoring applications
Noise reduction system using modified DFT pair
Decentralized Coordinate-Descent Data Detection and Precoding for Massive MU-MIMO
An Optimized Compression Strategy for Compressor-Based Approximate Multiplier
System Design Using Wave-Pipelining: A CMOS VLSI Vector Unit
A sub-word-parallel Galois field multiply-accumulate unit for digital signal processors
A low cost 2-D inverse discrete cosine transform design for image compression
A sectored receiver for infrared wireless networks
VHF/UHF High-Q Bandpass Tunable Filters Design Using CMOS Inverter-Based Transresistnace Amplifiers
Analyzing Multi-player Equalizer Strategy in Iterated Threshold Public Goods Game
A Feasible FPGA Weightless Neural Accelerator
Statistical modeling of MOS transistor mismatch based on the parameters' autocorrelation function
Image classification by cellular nonlinear networks
Double Broadband Matching of a Lowpass Generator and a Lowpass Load by Equal Minima Gain Functions
Analysis and Design of Adaptive Self-Trimming Technique for A/D Converters
A 1 mW low phase-noise relaxation oscillator
SUNet: Swin Transformer UNet for Image Denoising
A novel algorithm of spatial scalability for scrambled video
Designs of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell
Extremely low supply voltage circuits based on quasi-floating gate supply voltage boosting
A 1.6 nS, 16µW, 30V Gm-C integrator for offset voltage monitoring in neural stimulators
Optimizing CMOS Amplifier Design Directly in SPICE without the Need for Additional Mathematical Models
The Design of the Baseband Processor of a Non-coherent UWB Receiver
Automatic video diagnosing method using embedded crypto-watermarks
Screen image quality assessment incorporating structural degradation measurement
CMOS 3-T digital pixel sensor with in-pixel shared comparator
Electro-Thermal Analysis of IC's
A low power 6T-4C non-volatile memory using charge sharing and non-precharge techniques
Face Inpainting by Feature Guidance
Linearity efficiency factor and power-efficient operational transconductance amplifier in subthreshold operation
Design of Class-DE Amplifier with Linear and Nonlinear Shunt Capacitances for 25 % Duty Ratio
Exploring operation parallelism vs. ion movement in ion-trapped QCCD architectures
Class AB two stage and folded cascode OpAmps based on a squaring circuit
A CMOS 10 Gb/s clock and data recovery circuit with a novel adjustable K pd phase detector
CMOS-Free Magnetic Domain Wall Leaky Integrate-and-Fire Neurons with Intrinsic Lateral Inhibition