yusuke1997/dblp-id-title huggingface dataset:
Approximate process-parameter dependent symbolic calculation of harmonic distortion in log-domain: the lossy integrator case-study
Effective AM-PM Cancellation with Body Bias for 5G CMOS Power Amplifier Design in 22nm FD-SOI
Transforming 1-D even-length filterbanks into 2-D filterbanks
Robust Defect Detection for Phase-Locked Loops using All-Digital Built-In Self-Test (BIST) Circuitry
Tunable matching networks for future MEMS-based transceivers
Modeling of cascading failures in cyber-coupled power systems
A high-speed four-parallel radix-2 4 FFT/IFFT processor for UWB applications
A fast and stable explicit integration method by matrix exponential operator for large scale circuit simulation
Minimum redundancy linear sparse subarrays for direction of arrival estimation without ambiguity
Versatile capabilities of digitally controlled integrated dc-dc converters
Pulse shaping and SIR-energy trade-off in chaos-based asynchronous DS-CDMA
A low-complexity parametric transform for image compression
Two-Dimensional Sequential Array Architectures: Design for Testability Approaches
Fast-convolution implementation of filter bank multicarrier waveform processing
An 82 dB CMOS continuous-time complex bandpass sigma-delta ADC for GSM/EDGE
Signal, noise and interference power analysis in MRT-based Massive MIMO systems
High performance VLSI architecture for the modified SORT-N algorithm
UWB LNAs for Ground Penetrating Radar
An In-Loop Filter Based on Low-Complexity CNN using Residuals in Intra Video Coding
Current mode DC-DC buck converters with optimal fast-transient control
Efficient in situ error detection enabling diverse path coverage
Direct-form SC filters with low frequency response sensitivity to the transfer function coefficients
86 dB DR Cross-Coupled Time-Interleaved xx ADC for Audio Signal Band with 322 µA Current Consumption
Qualitative SPICE modeling accounting for volatile dynamics of TiO2 memristors
TSV-based on-chip inductive coupling communications
Efficient Intra Prediction in H.264 Based on Intensity Gradient Approach
Live Demonstration: Real-Time Implementation of Proto-Object Based Visual Saliency Model
The Cauchy-Floquet factorization by successive Riccati transformations
Fuzzy Associative Database for multiple planar object recognition
Routing resources consumption on M-arch and X-arch
A 52mW 0.56mm 2 1.2V 12b 120MS/s SHA-Free dual-channel Nyquist ADC based on mid-code calibration
PSCNN: A 885.86 TOPS/W Programmable SRAM-based Computing-In-Memory Processor for Keyword Spotting
An efficient methodology to evaluate nanoscale circuit fault-tolerance performance based on belief propagation
Accurate CMOS implementation of PWL CNN neuron activations
Facial expression mapping based on elastic and muscle-distribution-based models
A Low-power ASK Demodulator for Wireless Power and Data Transfer Systems Supporting Ultra-low Modulation Depth of 0.03%
Coaxial aperture electrical sensor and its application-a tutorial overview
Live Demonstration: IoT micronode with optical ID transmission capability operated by optical energy harvesting
Circuit-Size Reduction for Parallel Chien Search using Minimal Polynomial Degree Reduction
Enhancing the ability of NAS-RIF algorithm for blind image deconvolution
Augmented Reality Circuit Learning
Frequency-response-masking technique incorporating extrapolated impulse response band-edge shaping filter
Digital built-in self-test of CMOS analog iterative decoders
A fast deep learning system using GPU
A single bit memory per pixel time domain DPS using multi-reset integration scheme
Single-stage single-switch AC-DC power factor correction converter with low output voltage (3.3 V)
Concurrent Switch-Level Timing Simulation Based on Waveform Relaxation
A load-balancing readout method for large event-based PWM imaging arrays
High linear digitally programmable gain amplifier
Feedforward neural networks with improved insensitivity abilities
Stability Testing of 2D Filters Based on Tschebyscheff Polynomials and Generalized Eigenvalues
Quantiser Gain in Nth-Order Sigma-Delta Modulator Linear Models: Its Determination Based on Constant Output Power Criterion
The continuous-discrete interface - What does this really mean? Modelling and simulation issues
An Energy-Efficient Daily Surveillance System with DVS-CIS Sensor Fusion and Event-based NPU Triggering
Information Fusion via Deep Cross-Modal Factor Analysis
New dual-quantization multibit sigma-delta modulators with digital noise-shaping
Boosted-PCA for binary classification problems
On the Responsible Subjects of Self-Driving Cars under the SAE System: An Improvement Scheme
New CNN based Algorithms for the Full Penetration Hole Extraction in Laser Welding Processes
Systematic configuration and automatic tuning of neuromorphic systems
Performance evaluation of Secure Remote Password protocol
A Pipelined Adaptive Differential Vector Quantizer for Low-power Speech Coding Applications
Simplification of stochastic fastest NLMS algorithm
Design of self-powered wireless system-on-a-chip sensor nodes for hostile environments
Nonlinear secondary-path effects on the transient behavior of the multiple-error FXLMS algorithm
An embedded vision system based on an analog VLSI vision sensor [robot vision applications]
A robust method for wideband signal separation
Realization of an analog model of memristor based on light dependent resistor
Effect of shield insertion on reducing crosstalk noise between coupled interconnects
An Open-Source $4 \times 8$ Coarse-Grained Reconfigurable Array Using SkyWater 130 nm Technology and Agile Hardware Design Flow
A 1.5-7.5GHz low power low noise amplifier (LNA) design using subthreshold technique for Wireless Sensor Network (WSN) application
One-cycle control of converters operating in DCM
PMTJ Temperature Sensor Utilizing VCMA
Event-Driven Configurable Module with Refractory Mechanism for ConvNets on FPGA
Learning in Neuro/Fuzzy Analog Chips
Smart copying-a new approach to reconstruction of audio signals
Rotation-invariant hand posture classification with a convexity defect histogram
Design of a practical scheme for ultra wideband communication
Differentiable VMAF: A trainable metric for optimizing video compression codec
Positive-Feedback Source-Coupled Logic: a delay model
A partial parallel algorithm and architecture for arithmetic encoder in JPEG2000
Silicon retina for autofocus
High-Throughput Binary Arithmetic Encoder using Multiple-Bypass Bins Processing for HEVC CABAC
Organic molecules and composites with applications in micro and nanoelectronic systems
Via placement for minimum interconnect delay in three-dimensional (3D) circuits
MEMS acoustic sensors for totally implantable hearing aid systems
Chaotic optimization for quadratic assignment problems
Response of maximally flat lowpass filters to polynomial signals
Interactive broadcast digital television. The OpenTV platform versus the MPEG-4 standard framework
Multiresolution analysis of time-variant electrical networks
Efficient implementation of complex exponentially-modulated filter banks
Quasi-analytical spectrum of PWM signals with dead-time for multiple sinusoidal input
Live demonstration: Material detection via an integrated polarization imager
A 33 × 25 µm 2 low-power range finder
Constraint two-path polyphase IIR filter design using downhill simplex algorithm
Comparative genomic analysis using statistically optimal null filters
Modified polynomial selection architecture for low-complexity chase decoding of Reed-Solomon codes
Coordinate descent iterations in pseudo affine projection algorithm
VLSI Implementations of the Cryptographic Hash Functions MD6 and ïrRUPT
A design method for single phase Z-source inverter
A time-to-digital-converter-based CMOS smart temperature sensor
Impedance-to-digital Converter for Sensor Array Microsystems
A low noise CMOS amplifier for ENG signals
High-efficiency power amplifier for wireless sensor networks
A VLSI design of singular value decomposition processor used in real-time ICA computation for multi-channel EEG system
SiGe 77GHz Automotive Radar Technology
High-speed low-power logic gates using floating gates
Register-based reordering networks for matrix transpose
An Asynchronous Peak Finding Approach for Neuromorphic Depth Sensing in Flash LiDAR
Improved hybrid coding scheme for intra 4×4 residual block produced by H.264/AVC
A new structure of lifting wavelet for reducing rounding error
Integrated balun design for dual-band WLAN a/b/g applications
On rigorous integration of piece-wise linear continuous systems
A True Time Delay Element using Cascaded Variable Bandwidth All Pass Filters
Analysis and Performance Evaluation of a Digital Carrier Synchronizer for Modem Applications
Low-voltage analog current detector supporting at-speed BIST
A maximum total leakage current estimation method
Hotspot Prediction of Network-on-Chip for Neuromorphic Processor with Liquid State Machine
A Lightweight PUF-based Secure Group Key Agreement Protocol for Wireless Sensor Networks
Generic virtual filesystems for reconfigurable devices
A compact direct digital frequency synthesis architecture
A low-voltage/low-power second-order ΣΔ modulator with signal adaptive control architecture
Yield optimization with correlated design parameters and non-symmetrical marginal distributions
Distributed video coding with 3D recursive search block matching
On-chip and inter-chip networks for modeling large-scale neural systems
A fast and low power CMOS sensor for optical tracking
The Mahalanobis Distance Hough Transform with Extended Kalman Filter Refinement
A time-to-digital converter based AFC for wideband frequency synthesizer
SDP for multi-criterion QMF bank design
Area reduction techniques for deep-brain probes with electronic depth control
A parameterized power-aware IP core generator for the 2-D 8×8 DCT/IDCT
OFDM-Based Beam-Oriented Digital Predistortion for Massive MIMO
A compact low power mixed-signal equalizer for gigabit Ethernet applications
A design of a streaming system for interactive television broadcast
A low-power wide-dynamic-range readout IC for breath analyzer system
Robust design with virtual tests of mixed-signal circuits in VHDL-AMS
A design method for parallel recursive least square adaptive Volterra filter
Flexible hardware architectures for curve-based cryptography
ECHO: A novel method for the multiplierless design of constant array vector multiplication
Current Mode On-Chip Interconnect using Level-Encoded Two-Phase Dual-Rail Encoding
A topology-based method for identifying flip-flop graphs in BJT circuits
A 3.3 Volt High-Frequency Capacitorless Electronically-Tunable Log-Domain Oscillator
A two-level hybrid select logic for wide-issue superscalar processors
A Low Phase Noise Ring Oscillator with Miller Capacitance Cancellation
Worst Case Design of Digital Integrated Circuits
Rate-distortion optimization for fast hierarchical B-picture transcoding
A 486k S/s CMOS time-domain smart temperature sensor with -0.85°C/0.78°C voltage-calibrated error
Continuous-time adaptive-analog coaxial cable equalizer in 0.5 um CMOS
Stability of Rotary Traveling Wave Oscillators under process variations and NBTI
Blue-Noise Sigma-Delta Modulator: Improving Substrate Noise and Nonlinear Amplifier Gain Effects
Phase measurement and adjustment of digital signals using random sampling technique
A new solution method for linear equation using the gradient method
A new blind-block reciprocal parametric transform
Bifurcations in a silicon neuron
A reconfigurable architecture for scanning biosequence databases
An application level synthesis methodology for embedded systems
A low voltage low output impedance CMOS bandgap voltage reference
Unified Quadratic Programming Approach For 3-D Mixed Mode Placement
A synchronized variable frequency clock scheme in chip multiprocessors
Tracking loop for IR-UWB communications in IEEE 802.15 multi-path channels
N-phase synchronization of asymmetric attractors in a ring of coupled chaotic circuits
An advanced S3I sigma-delta modulator with reduced distortion
Discretization-free design of variable fractional-delay FIR filters
Vector Nonlinear Data Depended Filters
Annealing robust Walsh function networks for modeling with outliers and digital implementation
A methodology for design, modeling, and analysis of networks-on-chip
Live demonstration: Wearable electronics for a smart garment aiding rehabilitation
A model for the distortion due to switch on-resistance in sample-and-hold circuits
Comparison of two schemes for continuous-time sub-volt op-amp operation
Identification of important nodes in artificial bio-molecular networks
An Improved Wavelet-Fractal Coder
Antidictionary-Based Cardiac Arrhythmia Classification For Smart ECG sensors
Pseudo-Differential Time-to-Amplitude Converter for LGAD Based Particle Detectors
ESD design rule checker
CIT-CTPlacer: An Analytical RDL Chiplet-Terminal Co-Placement Algorithm for Large-Scale 2.5D IC
A 12-Bit 2-GS/s Pipelined ADC Front-End Stage with Aperture Error Tuning and Split MDAC
An area-efficient architecture for Reed-Solomon decoder using the inversionless decomposed Euclidean algorithm
Predicting Defibrillation Outcome in Ventricular Fibrillation using ECG with Neural Network Algorithm
Variable-output charge-pump for piezoelectric and electrostatic tunable RF filters
Load cell response correction using analog adaptive techniques
RF Energy Harvesting and Management for Near-Zero Power Passive Devices
An Implementation of Karatsuba-based Montgomery Modular Multiplication with Only Half-size Additions
Pixel parallel vessel tree extraction for a personal authentication system
1S1R-Based Stable Learning through Single-Spike-Encoded Spike-Timing-Dependent Plasticity
Optimization of Real-Time VLSI Architectures for Distributed Arithmetic-Based Algorithms: Application to HDTV Filters
Energy-Efficient Read-Out IC for High-Precision DC Measurement System with Instrumentation Amplifier Power Reduction Technique
Voltage mode driver for low power transmission of high speed serial AER Links
Dual sense amplified bit lines (DSABL) architecture for low-power SRAM design
Massive MIMO Signal Detection using SRAM-based In-Memory Computing
VLSI architecture for the efficient computation of line spectral frequencies
Adaptive beamforming using uniform concentric circular arrays with frequency invariant characteristics
Active bandpass filter using transformer feedback in 0.18-µm CMOS for 802.11a wireless LAN
A CMOS Expansion/Contraction Motion Sensor with a Retinal Processing Circuit for Z-motion Detection Applications
Function Evaluation in Symbolic Analysis
Live Demonstration: SoC Design of Lightweight Cryptography for Real-Time Monitoring System
Adaptive Clock Gating Technique for Low Power IP Core in SoC Design
An Optimized Controlled Current Source for Cancer Detection using Bioimpedance Spectroscopy
Novel low complexity lattice filters with overflow property close to the normalized lattice
Data Hiding For Binary Images Authentication By Considering A Larger Neighborhood
Sufficient Conditions for 1-D CNNs with Opposite-Sign Templates to Perform Connected Component Detection
Performance analysis of differential chaos shift-keying over an m-distributed fading channel
A Low Power BFSK Super-Regenerative Transceiver
A Simultaneous Placement and Global Routing Algorithm for FPGAs
An indirect approach to synthesis of noise shaping IIR filters in ΔΣ modulators
PODEA: Power delivery efficient analysis with realizable model reduction
Energy-efficient and high throughput sparse distributed memory architecture
Fibonacci P-Code Method for Generalized Stack Filtering
Mantissa-Aware Floating-Point Eight-Term Fused Dot Product Unit
Digitally-enhanced 2nd-order DeltaSigma modulator with unity-gain signal transfer function
Optimal shielding insertion for inductive noise avoidance
A 0.13µm CMOS delay cell for 40 Gb/s FFE equalization
Net Fishing Localization: Performance of TDOA-based Positioning Technique in Underwater Acoustic Channels Using Chirp Signals
Algorithm and implementation of an associative memory for oriented edge detection using improved clustered neural networks
Collaborative error control method for sequential logic circuits
Analysis of class-D ZVS inverter with asymmetrical duty-cycle control for wireless power transfer applications
Nominal and tolerance design of closed-loop controllers for DC-DC voltage regulators
New self-calibration algorithm for programmable multi-core memristor-CMOS chip for neuromorphic computing
Second-order analog filter sections with independently tunable center frequency and bandwidth
Temporal multithreading architecture design for a Java processor
A New Method for Source Number Estimation in the Presence of Unknown Nonuniform Noise
Weighted-to-residue and residue-to-weighted converters with three-moduli (2 n -1, 2 n , 2 n +1) signed-digit architectures
An Expandable Chip Desing for Gray-scale Morphological Operations
Separate type switched-capacitor (SC) AC-DC converter
Voting base online sequential extreme learning machine for multi-class classification
PRIM: Hybrid Array-Compressor Multipliers with Carry Disregard and OR-based Approximation
Novel sub-1V CMOS domino dynamic logic circuit using a direct bootstrap (DB) technique for low-voltage CMOS VLSI
A modular VLIW Processor
A reconfigurable pipelined data converter
FPGA based-IC design for inverter with vector modulation technique
Live Demonstration: Low-Power Low-Cost Cyber-Physical System for Bird Monitoring
On metric sorting for successive cancellation list decoding of polar codes
A piezoelectric energy harvesting interface circuit using one-shot pulse transformer boost converter based on water bucket fountain strategy
Time-frequency signal subspace fitting method for direction-of-arrival estimation
Epigenetic-IC: A fully integrated sensing platform for epigenetic reaction monitoring
A sixth-order 4-2 SMASH CIFF complex bandpass ΔΣ modulator with delaying digital input feedforward
Analysis of an Adaptive Filter-bank for Harmonic Measurement and Estimation
Embedded system for monitoring the comfort in public transportation
A qualitative analysis of a complementary differential LC injection-locked frequency divider based on direct injection
An Algorithm for Solving the Equations of Monotone Nonlinear Resistive Networks
A CMOS linear tunable transconductor for continuous-time tunable Gm-C filters
Reconfiguration of cascade Sigma Delta modulators for multistandard GSM/Bluetooth/UMTS/WLAN transceivers
Online malware defense using attack behavior model
A 19nW, near-threshold to I/O voltage level shifter in 28nm FD-SOI using 1.8V/28Å device for IoT Systems
Harmonic distortion in three-stage nested-Miller-compensated amplifiers
An ultrasonic filterbank with spiking neurons
A Sub-1V-Read Flash Memory in a Standard 130nm CMOS Process
Design of High-Performance Voltage Regulators Based on Frequency-Dependent Feedback Factor
Sense amplifier with offset mismatch calibration for sub 1-V DRAM core operation
A/D Alleviator: Reducing Analog-to-Digital Conversions in Compute-In-Memory with Augmented Analog Accumulation
Hardware-Efficient and Low Sensing-Time VLSI-Architecture of MED Based Spectrum Sensor for Cognitive Radio
Soft error hardening for logic-level designs
DRAB-LOCUS: An Area-Efficient AES Architecture for Hardware Accelerator Co-Location on FPGAs
FPGA realization of an OFDM frame synchronization design for dispersive channels
AMS and RF design for reliability methodology
Local resource management of distributed sensor networks via static output feedback control
Time Domain Sequential Locking for Increased Security
Hexagonal multi-beam analog RF aperture array
Optimized Zero Placement within Noise Coupling Transfer Functions for Oversampled ADCs
A black-box approach for generating surrogate data for an amorphous-core inductor working up to magnetic saturation
A robust continuous-time multi-dithering technique for laser communications using adaptive optics
Lower Bounds on Power Consumption of Clock Generators for ADCs
Asynchronous MMC based parallel SA schemes for multiobjective standard cell placement
1V 4.49nW/Pixel Retinal Prosthesis Chip with Light-to-Stimulus Duration Converter
A monolithic low power pulsed optical encoder
A model-based hybrid evolutionary algorithm for fast yield-inclusive design space exploration of analog circuits
A Power Efficient SAR Algorithm for High Resolution ADCs
Design of complex polyphase IIR multi-flattop filters
Light-Weight Cipher Based on Hybrid CMOS/STT-MRAM: Power/Area Analysis
Accurate Emulation of Memristive Crossbar Arrays for In-Memory Computing
Low-complexity Reconfigurable Complex Constant Multiplication for FFTs
To GPU synchronize or not GPU synchronize?
Boosted sensing for enhanced read stability in STT-MRAMs
A system-on-chip featuring variable bus architecture and enhanced video coprocessors for MPEG-4 multimedia applications
Least squares design of the class of triplet halfband filter banks
Complexity-constrained rate-distortion optimization for h.264/avc video coding
Improved total variation based image compressive sensing recovery by nonlocal regularization
0.18 μm CMOS process photodiode memory
Q-GA: a modified genetic algorithm for the design of phase equalizers
A rail-to-rail, constant-G m , 1-volt CMOS opamp
Toward joint approximate inference of visual quantities on cellular processor arrays
A VCO-based EPR Sensor Featuring a Large 400 µm Coil to Enhance MW B1 Homogeneity and Concentration Sensitivity
I/Q-Sharing Switched-Capacitor Power Amplifier with Baseband Harmonic-Rejection and Wilkinson Combiner
A system-on-a-chip for MPEG-4 multimedia stream processing and communication
New metrics for architectural level power performance evaluation
Nonlinearity analysis of R-2R ladder-based current-steering digital to analog converter
Flexible Transversal Continuous-Time Linear Equalizer Operating up to 25Gb/s in 28nm CMOS
Experimental confirmation of n-scroll hyperchaotic attractors
Pilot-aided designs of memoryless block equalizers with minimum redundancy
New results on exhaustive search algorithm for motion estimation using adaptive partial distortion search and successive elimination algorithm
On the Effect of Comparator Hysteresis in Interpolative Delta Sigma Modulators
Domino free 4-path time-interleaved second order sigma-delta modulator
Fast and memory efficient VLSI architecture for output probability computations of HMM-based recognition systems
The EcoChip: A Wireless Multi-Sensor Platform for Comprehensive Environmental Monitoring
Non van-Neumann Anomaly Detection in Multi-Channel Time-Series using Charge Trap Transistor Crossbars
Bifurcation in standalone photovoltaic-battery hybrid power systems
A post-processing algorithm using histogram-driven anisotropic diffusion
Two bit-level pipelined viterbi decoder for high-performance UWB applications
CMOS analog current-mode multiplier based on the advanced compact MOSFET model
Advancing In-Home Gait Monitoring: A Feasibility Study of Upper Limb Swing Analysis Using FMCW Radar
Design of sparse FIR filters using linear programming
Pipelining technique for energy-aware datapaths
A low-voltage CMOS low-dropout regulator with novel capacitor-multiplier frequency compensation
Estimation of fast fading channel in impulse noise environment
Quantum circuit design of 8×8 discrete cosine transform using its fast computation flow graph
An MCMC based Efficient Parameter Selection Model for x265 Encoder
Identification of road signs using a new ridgelet network
Causal Information Prediction for Analog Circuit Design Using Variable Selection Methods Based on Machine Learning
Circuit Techniques for Reducing Low Frequency Noise in Optical MEMS Position and Inertial Sensors
Synergistic Calibration of Noisy Thermal Sensors Using Smoothing Filter-Based Kalman Predictor
A tunable multi-band/multi-standard receiver front-end supporting LTE
An Adaptive Zero Voltage Switching Control Circuit Suitable for Quasi-Resonance Converter
FPGA implementation of channel estimation for MIMO-OFDM
Accurate delay model and experimental verification for current/voltage mode on-chip interconnects
Binary Access Memory: An optimized lookup table for successive approximation applications
Zero-LEINR: Zero-Reference Low-light Image Enhancement with Intrinsic Noise Reduction