yusuke1997/dblp-id-title huggingface dataset:
A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS
Demonstration of Recovery Annealing on 7-Bits per Cell 3D Flash Memory at Cryogenic Operation for Bit Cost Scalability and Sustainability
Ultrahigh Bias Stability of ALD In2O3 FETs Enabled by High Temperature O2 Annealing
A 2048-channel, 125μW/ch DAC Controlling a 9, 216-element Optical Phased Array Coherent Solid-State LiDAR
A 12nm 137 TOPS/W Digital Compute-In-Memory using Foundry 8T SRAM Bitcell supporting 16 Kernel Weight Sets for AI Edge Applications
Strategy for 3D Ferroelectric Transistor: Critical Surface Orientation Dependence of HfZrOx on Si
A 90-μW Penny-Sized 1.2-gram Wireless EEG Recorder with 12-Channel FDMA Transmitter for Month-Long Continuous Mental Health Monitoring
A Wireless Sensor-Brain Interface System for Tracking and Guiding Animal Behaviors Through Goal-Directed Closed-loop Neuromodulation
Integration of epitaxial monolayer MX₂ channels on 300mm wafers via Collective-Die-To-Wafer (CoD2W) transfer
A 6.78 MHz Wireless Power and Data Transfer System Achieving Simultaneous 52.6% End-to-End Efficiency and 4.0 Mb/s Forward Data Delivery with Interference-Free Rectifier
Fully Integrated 2x2 MIMO Real Simultaneous Dual Band WiFi CMOS Power Amplifiers With a Single Inductor Multiple Output Supply Modulation Technique
Towards DTCO in High Temperature GaN-on-Si Technology: Arithmetic Logic Unit at 300 °C and CAD Framework up to 500 °C
A 3nm Fin-FET 19.87-Mbit/mm 2 2RW Pseudo Dual-Port 6T SRAM with High-R Wire Tracking and Sequential Access Aware Dynamic Power Reduction
A 1.1μs 1.56Gb/s/mm 2 Cost-Efficient Large-List SCL Polar Decoder Using Fully-Reusable LLR Buffers in 28nm CMOS Technology
A Monolithic 5.7A/mm 2 91% Peak Efficiency Scalable Multi-Stage Modular Switched Capacitor Voltage Regulator with Self-Timed Deadtime and Safe Startup for 3D-ICs
Towards low damage and fab-compatible top-contacts in MX2 transistors using a combined synchronous pulse atomic layer etch and wet-chemical etch approach
A 60fps9.9nJ/frame·pixel CMOS Image Sensor with On-Chip Pixel-wise Conversion Gain Modulation for Per-frame Adaptive DCG-HDR Imaging
Highly Reliable 40nm Embedded Dual-Interface-Switching RRAM Technology for Display Driver IC Applications
A 14nm 128Mb eMRAM Implemented with 17.88Mb/mm 2 at 0.60V for Auto-G1 Applications
A 5.6µW 10-Keyword End-to-End Keyword Spotting System Using Passive-Averaging SAR ADC and Sign-Exponent-Only Layer Fusion with 92.7% Accuracy
A 5.2 Gb/s 3 mm Air-Gap 4.7 pJ/bit Capacitively-Coupled Transceiver for Giant Video Walls Enabled by a Dual-Edge Tracking Clock and Data Recovery Loop
Record Transconductance in Leff~30 nm Self-Aligned Replacement Gate ETSOI nFETs Using Low EOT Negative Capacitance HfO2-ZrO2 Superlattice Gate Stack
A 336 x 240 Backside-Illuminated 3D-Stacked 7μm SPAD for LiDAR Sensor with PDE 28% at 940nm and under 0.4% Depth Accuracy Up to 10m
96.48% Peak-Efficiency Continuous-Current Step-Up Battery Charger (CC-SUBC) with Dual Energy-Harvesting Sources for Automotive Application
16-layer 3D Vertical RRAM with Low Read Latency (18ns), High Nonlinearity (>5000) and Ultra-low Leakage Current (~pA) Self-Selective Cells
Imager with Dynamic LSB Adaptation and Ratiometric Readout for Low-Bit Depth 5-μW Peak Power in Purely-Harvested Systems
Highly Scalable Vertical Bypass RRAM (VB-RRAM) for 3D V -NAND Memory
A 2.5mW 12MHz-BW 69dB SNDR Passive Bandpass ΔΣ ADC with Highpass Noise-Shaping SAR Quantizers
Replacement Metal Gate Process Extendible Beyond 2-nm Node with Superior Gate Conductivity
A Fingertip-Mimicking 12×16 200μm-Resolution e-skin Taxel Readout Chip with per-Taxel Spiking Readout and Embedded Receptive Field Processing
How Harsh is Space?-Equations That Connect Space and Ground VLSI
218Kauth/s, 3nJ/auth SCA/ML-Resistant Privacy-Preserving Mutual Authentication Accelerator with a Crypto-Double-Coupled PUF in 4nm class CMOS
A 0.297-pJ/bit 50.4-Gb/s/wire Inverter-Based Short-Reach Simultaneous Bidirectional Transceiver for Die-to-Die Interface in 5nm CMOS
A 286nW, 103V High Voltage Generator and Multiplexer for Electrostatic Actuation in Programmable Matter
How Fault-Tolerant Quantum Computing Benefits from Cryo-CMOS Technology
A 100×80 CMOS Flash LiDAR Sensor with 0.0011mm 2 In-Pixel Histogramming TDC Based on Analog Counter and Self-Calibrated Single-Slope ADC
A Wireless Neural Stimulator IC for Cortical Visual Prosthesis
A 5GHz Fractional-N PLL with 97fsrms Jitter and -255.3dB FoM
High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories
Quantum Computing from Hype to Game Changer
World's First GAA 3nm Foundry platform Technology (SF3) with Novel Multi-Bridge-Channel-FET (MBCFET™) Process
A High Output Power 1V Charge Pump and Power Switch for Configurable, In-Field-Programmable Metal eFuse on Intel 4 Logic Technology
A 28-GHz Fully-Passive Retro-Reflective Phased-Array Backscattering Transceiver for 5G Network with 24-GHz Beam-Steered Wireless Power Transfer
A Metal Dual Work-Function Gate (MDWG) for the Continuous Scaling of DRAM Cell Transistors
Package - System Thermal Modeling and New Material
NanoWattch: A Self-Powered 3-nW RISC-V SoC Operable from 160mV Photovoltaic Input with Integrated Temperature Sensing and Adaptive Performance Scaling
First Fire-free, Low-voltage (~1.2 V), and Low Off-current (~3 nA) SiOxTey Selectors
A 50Gb/s DAC-Based Multicarrier Polar Transmitter in 22nm FinFET
A 26.4mW, 18.6MS/s Image Reconstruction Processor for IoT Compressive Sensing
A 28nm Approximate / Binary 6T CAM for Sequence Alignment
A 2.35 Gb/s/mm 2 (7440, 6696) NB-LDPC Decoder over GF(32) using Memory-Reduced Column-Wise Trellis Min-Max Algorithm in 28nm CMOS Technology
Wafer Level Pixelation of Colloidal Quantum Dot Image Sensors
Ultra-high Tunneling Electroresistance Ratio (2 × 10 4 ) & Endurance (10 8 ) in Oxide Semiconductor-Hafnia Self-rectifying (1.5 × 10 3 ) Ferroelectric Tunnel Junction
A 0.4mm 3 Battery-Less Crystal-Less Neural-Recording SoC Achieving 1.6cm Backscattering Range with 2mm×2mm On-Chip Antenna
An OLED Display Driver IC Embedding -63dB CMR, 80mV/nA Sensitivity, 390pA Detectable, and Column-Parallel Pixel Current Readout for Real-Time Non-Uniformity Compensation
An Area-Efficient True Single-Phase Clocked and Conditional Capture Flip-Flop for Ultra-Low-Power Operations in 7nm Fin-FET Process
A Monolithic Amorphous-Selenium/CMOS Small-Pixel-Effect-Enhanced X-Ray-Energy-Discriminating Quantum-Counting Pixel for Biomedical Imaging
Hot-Carrier-Degradation Characterization for Accurate End-of-Life Prediction with 3nm GAA Logic Technology Featuring Multi-Bridge-Channel FET
First Demonstration of BEOL-Compatible MFMIS Fe-FETs with 3D Multi-Fin Floating Gate: In-situ ALD-deposited MFM, LCH of 50 nm, > 2×10 9 Endurance, and 58.3% Area Saving
A 0.56mW 63.6dB SNDR 250MS/s SAR ADC in 8nm FinFET
A 50μW Ring-Type Complementary Inverse-Class-D Oscillator with 191.4dBc/Hz FoM and 205.6dBc/Hz FoMA
ANP-G: A 28nm 1.04pJ/SOP Sub-mm2 Spiking and Back-propagation Hybrid Neural Network Asynchronous Olfactory Processor Enabling Few-shot Class-incremental On-chip Learning
23, 000-Exposures/s 360fps-Readout Software-Defined Image Sensor with Motion-Adaptive Spatially Varying Imaging Speed
A 90.9kS/s, 0.7nJ/conversion Hybrid Temperature Sensor in 4nm-class CMOS
A 14nm 128Mb Embedded MRAM Macro achieved the Best Figure-Of-Merit with 80MHz Read operation and 18.1Mb/mm² implementation at 0.64V
NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnCFE to Break Great Memory Wall with 10 ns of PGM-pulse, 10 10 Cycles of Endurance, and Decade Lifetime at 103 °C
On the Reliability of High-Performance Dual Gate (DG) W-Doped In2O3 FET
First Demonstration of 1-bit Erase in Vertical NAND Flash Memory
Onyx: A 12nm 756 GOPS/W Coarse-Grained Reconfigurable Array for Accelerating Dense and Sparse Applications
A 3.36 µm-pitch SPAD photon-counting image sensor using clustered multi-cycle clocked recharging technique with intermediate most-significant-bit readout
38.4-pW, 0.14-mm 2 Body-Driven Temperature-to-Digital Converter and Voltage Reference with 0.6-1.6-V Unregulated Supply for Battery-Less Systems
A 16-channel Active-Matrix Mini-LED Driver with an USI-B for EMI noise reduction
A 24-OSR to Simplify Anti-Aliasing Filter 2MHz-BW 83dB-DR 3rd-order DT-DSM using FIA-Based Integrator and Noise-Shaping SAR Combined Digital Noise-Coupling Quantizer
A 0.75V 0.016mm 2 12ENOB 7nm CMOS cyclic ADC with 1.5bit passive amplification stage and dynamic capacitance scaling
Photonics-Electronics Convergence Technology to Accelerate IOWN
Voltage Scaling-Agnostic Counteraction of Side-Channel Neural Net Reverse Engineering via Machine Learning Compensation and Multi-Level Shuffling
A Fully Dynamic 1 st -Order Δ-ΔΣ Modulator with a 468mV pp Input Range for Electrical Impedance Tomography Systems
A 7GHz High-Bandwidth 1R-1RW SRAM for Arm HPC Processor in 3nm Technology
Monolithic Complementary Field Effect Transistors (CFET) Demonstrated using Middle Dielectric Isolation and Stacked Contacts
A 25.78125Gbps Bi-directional Transceiver with Framed-Pulsewidth Modulation (FPWM) for Extended Reach Optical Links in 28nm CMOS
A 19.8W/29.6W Hybrid Step-Up/Down DC-DC Converter with 97.2% Peak Efficiency for 1-Cell/2-Cell Battery Charger Applications
4F 2 Stackable Polysilicon Channel Access Device for Ultra-Dense NVDRAM
NetFlex: A 22nm Multi-Chiplet Perception Accelerator in High-Density Fan-Out Wafer-Level Packaging
Integration of Si-Interposer and High Density MIM Capacitor on 2.5D Foveros Face-to-Face Architecture
A 71.5-dB SNDR 475-MS/s Ringamp-Based Pipelined SAR ADC with On-Chip Bit-Weight Calibration
A 5nm 60GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 34dB SNDR up to 32GHz
A Class-D Piezoelectric Speaker Driver Using A Quadrature Feedback Chopping Scheme achieving 29dB Large-Signal THD+N Improvement
A 720 nW Current Sensor with 0-to-15 V Input Common-Mode Range and ±0.5% Gain Error from -40 to 85 °C
High Density Embedded 3D Stackable Via RRAM in Advanced MCU Applications
A 2.54μJ∙ppm 2 -FOMS Supply- and Temperature-Independent Time-Locked ΔΣ Capacitance-to-Digital Converter in 0.18-μm CMOS
A Nanosheet Oxide Semiconductor FET Using ALD InGaOx Channel and InSnOx Electrode with Normally-off Operation, High Mobility and Reliability for 3D Integrated Devices
A 40nm Analog-Input ADC-Free Compute-in-Memory RRAM Macro with Pulse-Width Modulation between Sub-arrays
A 507 GMACs/J 256-Core Domain Adaptive Systolic-Array-Processor for Wireless Communication and Linear-Algebra Kernels in 12nm FINFET
2D Materials in the BEOL
A 709.3 TOPS/W Event-Driven Smart Vision SoC with High-Linearity and Reconfigurable MRAM PIM
Extremely High-κ Hf0.2Zr0.8O2 Gate Stacks Integrated into Ge0.95Si0.05 Nanowire and Nanosheet nFETs Featuring Respective Record Ion per Footprint of 9200μA/μm and Record Ion per Stack of 360μA at VOV=VDS=0.5V
A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm Technology
A 4.1W/mm² Peak Power Density and 77% Peak Efficiency Fully Integrated DC-DC Converter based on Electromagnetically Coupled Class-D LC Oscillators and a Resonant LC Flying Impedance in 22nm FDSOI CMOS
A Wideband CMOS NMR Spectrometer for Multinuclear Molecular Fingerprinting
Bit-Cost-Scalable 3D DRAM Architecture and Unit Cell First Demonstrated with Integrated Gate-Around and Channel-Around IGZO FETs
A Wireless Neurostimulator Using Body-Coupled Link for Multisite Stimulation in Freely Behaving Animals
Scalable Embedded Multi-Die Active Bridge (S-EMAB) Chips with Integrated LDOs for Low-Cost Programmable 2.5D/3.5D Packaging Technology
A Reconfigurable Analog FIR Filter Achieving -70dB Rejection with Sharp Transition for Narrowband Receivers
Room Temperature Cu-Cu Direct Bonding Using Wetting/Passivation Scheme for 3D Integration and Packaging
A 52.01 TFLOPS/W Diffusion Model Processor with Inter-Time-Step Convolution-Attention-Redundancy Elimination and Bipolar Floating-Point Multiplication
Write-enhanced Single-ended 11T SRAM Enabling Single Bitcell Reconfigurable Compute-in-Memory Employing Complementary FETs
300 mm Wafer-scale In-situ CVD Growth Achieving 5.1×10 -10 Ω-cm 2 P-Type Contact Resistivity: Record 2.5×10 21 cm -3 Active Doping and Demonstration on Highly-Scaled 3D Structures
FeRAM Recovery up to 200 Periods with Accumulated Endurance 1012 Cycles and an Applicable Array Circuit toward Unlimited eNVM Operations
Empowering Local Differential Privacy: A 5718 TOPS/W Analog PUF-Based In-Memory Encryption Macro for Dynamic Edge Security
BEOL Compatible Ferroelectric Routers for Run-time Reconfigurable Compute-in-Memory Accelerators
Single Metal BCAT Breakthrough to Open a New Era of 12 nm DRAM and Beyond
A Low-Voltage Area-Efficient TSV I/O for HBM with Data Rate up to 15Gb/s Featuring Overlapped Multiplexing Driver, ISI Compensators and QEC
3D Reservoir Computing with High Area Efficiency (5.12 TOPS/mm 2 ) Implemented by 3D Dynamic Memristor Array for Temporal Signal Processing
A 1-to-112Gb/s DSP-Based Wireline Transceiver with a Flexible Clocking Scheme in 5nm FinFET
A 15.4ppm/ ○ C GaN-based Voltage Reference with Process-Variation-Immunity and High PSR for EV Power Systems
A 12-bit 10GS/s 16-Channel Time-Interleaved ADC with a Digital Processing Timing-Skew Background Calibration in 5nm FinFET
A 5.7kfps Fast Neural Electrical Impedance Tomography IC Based on Incremental Zoom Structure with Baseline Cancellation for Peripheral Nerve Monitoring Systems
A 512×512 SPAD Laser Speckle Autocorrelation Imager in Stacked 65/40nm CMOS
A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Transformer Combined FIR FIlter
A 6nW 30.8kHz Relaxation Oscillator with Sampling Bias-Free RC Circuit and Dynamic Power Scaling in a 12nm FinFET
A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC with Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET
Fully-Digital Broadband Calibration-Less Impedance Monitor for Probe Insertion Detection against Power Analysis Attacks
A 20Gb/s/pin Single-Ended PAM-4 Transceiver with Pre/Post-Channel Switching Jitter Compensation and DQS-Driven Biasing for Low-Power Memory Interfaces
A Shared-Inductor Structure-Reconfigurable Regulating Rectifier (SR-RR) Enabling 6.78-MHz AC-DC Rectification and 1-MHz DC-DC Energy Recycling
A 44.3mW 62.4fps Hyperspectral Image Processor for MAV Remote Sensing
Highly Reliable and Manufacturable MRAM embedded in 14nm FinFET node
Searching for Nonlinearity: Scaling Limits in NAND Flash
A 65nm 60mW Dual-Loop Adaptive Digital Beamformer with Optimized Sidelobe Cancellation and On-Chip DOA Estimation for mm-Wave Applications
A 3nm 256Mb SRAM in FinFET Technology with New Array Banking Architecture and Write-Assist Circuitry Scheme for High-Density and Low-VMIN Applications
Structural Reliability and Performance Analysis of Backside PDN
Cost-Effective LLM Accelerator Using Processing in Memory Technology
An On-Chip Current-Sink-Free Adaptive-Timing Power Impedance Measurement (PIM) Unit for 3D-IC in 5nm FinFET Technology
A 0.024mm² 84.2dB-SNDR 1MHz-BW 3 rd -Order VCO-Based CTDSM with NS-SAR Quantizer (NSQ VCO CTDSM)
Low-capacitance Ultrathin InGaAs Membrane Photodetector on Si Slot Waveguide towards Receiver-less System
A 40-Gb/s/pin Low-Voltage POD Single-Ended PAM-4 Transceiver with Timing Calibrated Reset-less Slicer and Bidirectional T-Coil for GDDR7 Application
Dyamond: A 1T1C DRAM In-memory Computing Accelerator with Compact MAC-SIMD and Adaptive Column Addition Dataflow
Scaling-CIM: An eDRAM-based In-Memory-Computing Accelerator with Dynamic-Scaling ADC for SQNR-Boosting and Layer-wise Adaptive Bit-Truncation
A Subcellular-Resolution Multimodal CMOS Biosensor Array with 16K Ion-Selective Pixels for Real-Time Monitoring Potassium Dynamics
A 7.2inch 5.5Mpixel 600mW SPAD X-Ray Detector with 116.7 dB Dynamic Range
Comprehensive Feasibility Study of Single FIN Transistors for Scaling Both Switching Energy and Device Footprint
A Novel Method for Extracting Asymmetric Source and Drain Resistance in IGZO Vertical Channel Transistors
Nearly Ideal Subthreshold Swing and Delay Reduction of Stacked Nanosheets Using Ultrathin Bodies
Self-Heating in iN8-iN2 CMOS Logic Cells: Thermal Impact of Architecture (FinFET, Nanosheet, Forksheet and CFET) and Scaling Boosters
High Performance 5G Mobile SOC Productization with 4nm EUV Fin-FET Technology
A 3V 15b 157μW Cryo-CMOS DAC for Multiplexed Spin-Qubit Biasing
Building high performance transistors on carbon nanotube channel
A 3.3GHz 1024X640 Multi-Bank Single-Port SRAM with Frequency Enhancing Techniques and 0.55V-1.35V Wide Voltage Range Operation in 3nm FinFET for HPC Applications
Reliable Sub-nanosecond MRAM with Double Spin-torque Magnetic Tunnel Junctions
An Automotive ASIL-D Safety Mechanism in ADC and DAC for Communication Application
A 90.7% 4-W 3P4S Hybrid Switching Converter Using Adaptive VCF Rebalancing Technique and Switching Node Dual-Edge tdead Modulation for Extreme 48V/1V Direct DC-DC Conversion
Field Plate and Package Optimization for GaN Devices and Systems
A 39-GHz CMOS Bi-Directional Doherty Phased-Array Beamformer Using Shared-LUT DPD with Inter-Element Mismatch Compensation Technique for 5G Base-Station
First Monolithic Integration of Group IV Waveguide Photodetectors and Modulators on 300 mm Si Substrates for 2-μm Wavelength Optoelectronic Integrated Circuit
A 200-Gb/s PAM-4 Transmitter with 1.6-Vppd Output Swing and Clock Skew Correction in 12-nm FinFET
A Monolithic Low-ILEAK Cross-Coupled GaN Driver with ΔΦ-Reduced EMI-Rejecter for 21.51dBµV-EMI-Reduction and 1/10x filter-capacitor
A Bit-Serial Computing Accelerator for Solving Coupled Partial Differential Equations
An 8-bit 20.7 TOPS/W Multi-Level Cell ReRAM-based Compute Engine
A 4.0GHz UHS Pseudo Two-port SRAM with BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4nm FinFET Technology
In-Memory Approximate Computing Architecture Based on 3D-NAND Flash Memories
First Si-Waveguide-Integrated InGaAs/InAlAs Avalanche Photodiodes on SOI Platform
Comprehensive 300 mm process for Silicon spin qubits with modular integration
On the PBTI Reliability of Low EOT Negative Capacitance 1.8 nm HfO2-ZrO2 Superlattice Gate Stack on Lg=90 nm nFETs
PPAC of sheet-based CFET configurations for 4 track design with 16nm metal pitch
SP-PIM: A 22.41TFLOPS/W, 8.81Epochs/Sec Super-Pipelined Processing-In-Memory Accelerator with Local Error Prediction for On-Device Learning
A 184nW, 121µg/√Hz Noise Floor Triaxial MEMS Accelerometer with Integrated CMOS Readout Circuit and Variation-Compensated High Voltage MEMS Biasing
First Observation of Time Exponent Variations under Positive bias Stress on a-IGZO Transistors Utilizing Ultrafast On-the-Fly Technique with 1 μs Delay
Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories
On the Extreme Scaling of Transistors with Monolayer MOS2 Channel
A 4.6pJ/b 64Gb/s Transceiver Enabling PCIe 6.0 and CXL 3.0 in Intel 3 CMOS Technology
Ongoing Evolution of DRAM Scaling via Third Dimension -Vertically Stacked DRAM -
A 6.5nW, -73.5dBm Sensitivity, Cryptographic Wake-Up Receiver with a PUF-based OTP and Temperature-Insensitive Code Recovery
A 0.0014 mm 2 , 1.18 TΩ Segmented Duty-Cycled Resistor Replacing Pseudo-Resistor for Neural Recording Interface Circuits
Lg = 130 nm GAA MBCFETs with three-level stacked In0.53Ga0.47As nanosheets
A Fully Integrated 230 VRMS-to-12 VDC AC-DC Converter Achieving 9 mW/mm 2
A Scalable mK Cryo-CMOS Demultiplexer Chip for Voltage Biasing and High-Speed Control of Silicon Qubit Gates
First demonstration of Two Metal Level Semi-damascene Interconnects with Fully Self-aligned Vias at 18MP
Cold-FeFET as Embedded Non-Volatile Memory with Unlimited Cycling Endurance
2.4GHz, Double-Buffered, 4kb Standard-Cell-Based Register File with Low-Power Mixed-Frequency Clocking for Machine Learning Accelerators
A Single-Clock-Phase Sense Amplifier Architecture with 9x Smaller Clock-to-Q Delay Compared to the StrongARM & 6.3dB Lower Noise Compared to Double-Tail
A 28GHz 4-Stream Time-Division MIMO Phased-Array Receiver Utilizing Nyquist-Rate Fast Beam Switching for 5G and Beyond
A 246-fJ/b 13.3-Tb/s/mm Single-Ended Current-Mode Transceiver with Crosstalk Cancellation for Shield-Less Short-Reach Interconnect
A Smart Contact Lens System with 433MHz Wireless Power and Data Transfer at a Modulation Index Down to 0.02%
Multi-Chiplet Heterogeneous Integration Packaging for Semiconductor System Scaling
First Radio-Frequency Circuits Fabricated in Top-Tier of a Full 3D Sequential Integration Process at mmW for 5G Applications
High Performance 5 nm Si Nanowire FETs with a Record Small SS = 2.3 mV/dec and High Transconductance at 5.5 K Enabled by Dopant Segregated Silicide Source/Drain
Record Performance in GAA 2D NMOS and PMOS Using Monolayer MoS2 and WSe2 with Scaled Contact and Gate Length
A Wireless, Mechanically Flexible, 25μm-Thick, 65, 536-Channel Subdural Surface Recording and Stimulating Microelectrode Array with Integrated Antennas
Mechanical Stress Effects on Dielectric Leakage and Interconnection Integrity in 3D NAND Flash Memory
A 2.4-to-4.2GHz 440.2fsrms-Integrated-Jitter 4.3mW Ring-Oscillator-Based PLL Using a Switched-Capacitor-Bias-Based Sampling PD in 4nm FinFET CMOS
Novel Strategies for Highly Uniform and Reliable Cell Characteristics of 8th Generation 1Tb 3D-NAND Flash Memory
A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm 2 bit density with 3.2Gbps interface and 205MB/s program throughput
A 0.32pJ/b 90Gbps PAM4 Optical Receiver Front-End with Automatic Gain Control in 12nm CMOS FinFET
A 22nm 54.94TFLOPS/W Transformer Fine-Tuning Processor with Exponent-Stationary Re-Computing, Aggressive Linear Fitting, and Logarithmic Domain Multiplicating
Engineering HZO by Flat Amorphous TiN with 0.3nm Roughness Achieving Uniform c-Axis Alignment, Record High Breakdown Field (~10nm HZO), and Record Final 2Pr of 56 μC/cm 2 with Endurance > 4E12
4-Layer Wafer on Wafer Stacking Demonstration with Face to Face/Face to Back Stacked Flexibility Using Hybrid Bond/TSV-Middle for Various 3D Integration
First Demonstration of Superconducting Nb Contact on Heavily-Doped Group IV Semiconductor
A 12-nm 0.62-1.61 mW Ultra-Low Power Digital CIM-based Deep-Learning System for End-to-End Always-on Vision
A 0.7 mm 2 Power Management Unit for Implantable Electroceutical Device with a 91.4 % Peak Efficiency Buck-based Hybrid Step-up and -down MISIMO Converter
A Mixed-signal 3D Footstep Planning SoC for Motion Control of Humanoid Robots with Embedded Zero-Moment-Point based Gait Scheduler and Neural Inverse Kinematics
A 5.8W, 0.00086% THD+N, 118dB PSRR Class-D Audio Amplifier with Passive Output Common-Mode Compensation Technique for Wide Output Power Range
First Demonstration of a-IGZO GAA Nanosheet FETs Featuring Achievable SS=61mV/dec, Ioff<10 -7 μA/μm, DIBL =44mV/V, Positive VT, and Process Temp. of 300 °C
Highly Sensitive Multimodal CMOS Antifouling Sensor Array with Multi-Use Electrodes for Single-Cell-Level Profiling of Biophysical and Biochemical Parameters
Computing-in-Memory with SuperFlash® memBrain™ Technology
A 56-Gb/s 17-mW NRZ Receiver in 0.018 mm 2
Backside Power Distribution for Nanosheet Technologies Beyond 2nm
Positive Bias Stress Measurement Guideline and Band Analysis for Evaluating Instability of Oxide Semiconductor Transistors
An 8-core RISC-V Processor with Compute near Last Level Cache in Intel 4 CMOS
8-Layer 3D Vertical Ru/AlOxNy/TiN RRAM with Mega-Ω Level LRS for Low Power and Ultrahigh-density Memory
High-Resolution and Compact Integrated FMCW-LiDAR Chip with 128 Channels of Slow Light Grating Antennas
A 64-Gb/s Reference-Less PAM4 CDR with Asymmetrical Linear Phase Detector Soring 231.5-fsrms Clock Jitter and 0.21-pJ/bit Energy Efficiency in 40-nm CMOS
1200x84-pixels 30fps 64cc Solid-State LiDAR RX with an HV/LV transistors Hybrid Active-Quenching-SPAD Array and Background Digital PT Compensation
Scaled contact length with low contact resistance in monolayer 2D channel transistors
Interfacial-Layer Design for Hf1-xZrxO2-Based FTJ Devices: From Atom to Array
DRAM-Peri FinFET - A Thermally-Stable High-Performance Advanced CMOS RMG Platform with Mo-Based pWFM for sub-10nm DRAM