yusuke1997/dblp-id-title huggingface dataset:
Characterization of endothelial cells using electrochemical impedance spectroscopy
An Automated System for Checking Lithography Friendliness of Standard Cells
A 3-D Maximum Power Point Tracking Technique for Energy Harvesting System Based on Hill-Climbing Algorithm
A floorplan-driven high-level synthesis algorithm with operation chainings using chaining enumeration
Improved Robust Multiuser Detection in Non-Gaussian Channels Using a New M-Estimator and Spatiotemporal Chaotic Spreading Sequences
An architecture of photo core transform in HD photo coding system for embedded systems of various bandwidths
Design strategy for 2-phase switched capacitor charge pump
Implementation of intelligent home appliances based on IoT
Wavelet Packet Transform for Scalable Audio Encoder
A Low Noise TIA with Continuous Time-Gain Compensation for Ultrasound Transducers
The Flight Motion Measurement of Yamawaki on Horizontal Bar
Combining unspecified test data bit filling methods and run length based codes to estimate compression, power and area overhead
A performance monitoring tool suite for 3D graphics SoC application
Accelerating residue-to-binary conversion of very high cardinality moduli set for fully homomorphic encryption
Low Voltage High-Performance Class-AB FGMOS Buffer
Robustness file copy up into cloud storage service
Application of novel architectures for Modulation Recognition
High Linearity BJT-Based Time-Domain CMOS Temperature Sensor
Three-Phase Boost-Converter Based PMIC for Thermal Electric Generator Application
A 0.5 to 2GHz Blocker-Tolerant Receiver Achieving 29dBm OOB-IIP3 and 3.2 to 6dB NF Using Bottom-Plate Switched-Capacitor Technique
A Power-Aware ECG Transmission Framework with Server Aided Lossless Compression
Current-mode gigabit optical receivers in submicron CMOS technologies
Generation of Fixed Polarity Arithmetic Spectra for Ternary Functions
Stability and Compensation Technique for a CMOS Amperometric Potentiostat Circuit for Redox Sensors
Area-time-power efficient VLSI design for residue-to-binary converter based on moduli set (2 n , 2 n+1 -1, 2 n -1)
High Performance Context Adaptive Variable Length Coding Encoder for MPEG-4 AVC/H.264 Video Coding
A 7.4 μW Temperature Detecting Circuit for Battery Monitoring System
Single-channel blind separation of Two QPSK signals using per-survivor processing
A Streaming Transformer Accelerator with Efficient On-Chip Normalization
An improvement of frequency performance in a power system optimization via controller parameter design using genetic algorithm
An Isolated ZVS DC/DC Converter with Diode-connected MOSFET in Rectifier
An Efficient Algorithm for DPA-resistent RSA
A Low-Noise Fully-Differential Bandgap Reference for Low-Power High-Precision ADCs
Rapid Acquisition of Ultra-Wideband Signals in Multipath Environments
A Recursive Digital Filter Design using Global Optimization Technique
Low-Power Crosstalk Avoidance Encoding for On-Chip Data Buses
A Second-Order Noise Shaping SAR ADC with Fully Passive Integrators and Pole Optimization
Towards Safe and Efficient Analog Circuit Design: Active Learning for Feasibility Region Exploration
A Linear LDO Regulator with Modified NMCF Frequency Compensation Independent of Off-chip Capacitor and ESR
A 0.8V folded-cascode low noise amplifier for multi-band applications
Design of an efficient active noise cancellation circuit for in-ear headphones
Low-Power Consumption Inference of ECG Signals Using Differential Logic Networks
Integrating bio-sensing functions on CMOS chips
Multirate Filter Bank-based Conversion of Image Resolution
A $2.8μA, sub-$1μs Output-Capacitorless LDO with Transient Detecting Control Technique
Scalable Synthesis of 3-D Crossbars for Flow-based Computing
Fast Motion Estimation Algorithm by Finite-State Side Match for H.264 Video Coding Standard
An architectural design of a multimedia over IP (MoIP) terminal
PSoC implementing vehicle auxiliary vacuum brake system with Kalman filter
A High-Time-Resolution Time-to-Digital Converter Using Coupled Ring Oscillator with Phase Averaging
A hybrid state estimation scheme for power systems
Signal and noise separation in medical diagnostic system based on independent component analysis
A High Throughput and Configurable Pseudo-random Number Extension Generator for Lattice-based Post-quantum Cryptography
From Software to Hardware - A Novel TLM Auto-Generating Method
A Pre-Emphasis Pulse Generator Insensitive to Process Variation for Driving Large Memory and Panel Display Arrays with Minimal Delay Time
A Turbo-BLAST method with Non-Linear MMSE Detector for MIMO-OFDM systems
Automatic indexing system for atmospheric laser radar data
Motion Vector Estimation and Adatptive Refinement for the MPEG-4 to H.264/AVC Video Transcoder
A general model of a kind of parallel manipulator for active control based on KANE's dynamics
Low-Complexity Deep Neural Networks for Image Object Classification and Detection
A 32-Gb/s 3.53-mW/Gb/s Adaptive Receiver AFE Employing a Hybrid CTLE, Edge-DFE and Merged Data-DFE/CDR in 65-nm CMOS
A real-time correlational combination algorithm to improve SNR for multi-channel neural recordings
FPGA Prototyping of Spatio-temporal 2D IIR Broadband Beam Plane-wave Filters
High-Precision Open-Loop Time Amplifier Using Current Regulator
Recognition of odor mixture using fuzzy-LVQ neural networks with matrix similarity analysis
Closed-loop transfer functions and frequency-point spectrum simulation of CCM buck converters
Non-binary SAR ADC with digital error correction for low power applications
Adaptive ZCDPLL for Quadrature-Quadrature PSK Carrier Recovery
Area/Delay Efficient Recoding Methods for Parallel CORDIC Rotations
Process simulation of Trench Gate and Plate and Trench Drain SOI NLIGBT with TCAD tools
A Frequency Compensation Technique for Variable Output Low Dropout Regulators
RF energy harvester with peak power conversion efficiency tracking
A 0.004-mm 2 O.7-V 31.654-μW BPSK Demodulator Incorporating Dual-Path Loop Self-Biased PLL
Modeling of Sneaky Hardware Trojan Using Spin-orbit Torque Assisted Magnetic Tunnel Junction for High Speed Digital Circuits
Low power 32-bit UniRISC with Power Block Manager
An LUT-Based Multiplier Array for Systolic Array-Based Convolutional Neural Network Accelerator
Proposal and Validation of Annealing-processor-calculation Method Using Error-diffusion Rounded Interaction Matrix
Improvement of learning performance of multi-layer perceptron by two different pulse glial networks
Multidimensional Parameters Estimation of Array Signal Based on Steering Vector
A 88.6%-Efficient Multi-Input Capacitive-Based Energy Combiner with Adaptive Path Control for WSN-IoT Applications
Multi-stage lattice-reduction-aided MIMO detector using reverse-order LLL algorithm
A PVT-Robust Closed-Loop Dynamic Amplifier Using Three-Stage Floating Inverter Amplifier
Low Power BDD-based Synthesis Using Dual Rail Static DCVSPG Logic
Optimization of area and power in multi-mode power gating scheme for static memory elements
Highly Linear and Efficient AlGaAs/GaAs HBT Power Amplifier with Integrated Linearizer
Hardware efficient frequency estimator based on data-aided algorithm for digital video broadcasting system
A design of a cost-effective look-up table for RGB-to-RGBW conversion
The influence of VHF-LISN component and ferrite position to the common mode current on emission measurement according to CISPR 22
An Area-Power-Efficient AFE with NS-SAR ADC For High-Frequency Ultrasound Applications
A decision-directed receiver for CDMA MIMO systems over multipath fading channel
A One-Dimensional Technique for Embedding Data in A JPEG Color Image
Edge information based fast selection algorithm for intra prediction of HEVC
New architectures for low-power delta-sigma analog-to-digital converter
Integrated circuits design for neural recording sensor interface
VLSI design of an interference canceller for QPSK OFDM-IDMA systems
Pipelined Parallel Architectures for High Throughput Turbo Decoding
DOA estimation for low-cost array antenna system based on GROUSE and EM algorithms
A 60V Input Integrated 3-to-1 Dual Inductor Hybrid Dickson Converter
Low-Power Implementation of a High-Throughput Multi-core AES Encryption Architecture
Efficient Implementation of Parallel Annealing Method with Heisenberg Model
Multi-access memory architecture for image applications with multiple interested regions
Security Path Verification Through Joint Information Flow Analysis
Live demonstration: Hardware-software co-verification for very large scale SoC using synopsys HAPS platform
A proposed FPGA-based parallel architecture for matrix multiplication
Achieving < 1% Precision Clocking Solution with External-R under Practical Constraints
On Finding a Solution in the Core of a Multicommodity Flow Game on a Spider
In-situ timing monitoring methods for variation-resilient designs
Controlled slew rate enhancement circuit for error amplifier in high frequency DC-DC converters
A compact DSP architecture for digital audio
Multiple-patterning lithography-aware routing for standard cell layout synthesis
Design method for monolithic DC-DC converters based on the losses optimization of the power stage
Low voltage high performance current conveyors and their applications as current sensors
Total Harmonic Distortion Adjustment Method and Circuit for LED AC Direct Driver IC
LEGO-based VLSI design and implementation of polar codes encoder architecture with radix-2 processing engines
Interactive Analog IC Layout Tool with Real-time Parasitic-aware Automatic Routing Assistance
A Fast Algorithm and Its Architecture for Motion Estimation in MPEG-4 AVC/H.264 Video Coding
Analysis of Switched-RC N-path filters with Finite Switch Resistance and Switched $G_{m}-C$ filters using the Adjoint Network
Novel Label Flipping Dataset Poisoning Attack Against ML-Based HT Detection Systems
Parasitic capacitance modeling for multilevel interconnects
Multi-bandwidth analog filter design for SDR
Low-complexity shift-LDPC decoder for high-speed communication systems
Improving communication rate of visible light communication system using high-speed camera
A Harmonic Reduction Scheme in SPWM
A simple switched-capacitor algorithmic digital-to-analog converter using sample/hold and divider
Design of analog mixer for RF frontend
Custom instruction search for application specific instruction-set processor using guided simulated annealing
Forward Modeling Assisted Digital Predistortion Method for Hybrid Beamforming Transmitters with a Single PA Feedback
Chest compression depth measurement using IRUWB for CPR (cardiopulmonary resuscitation)
Implementation of a resource-constrained ECC processor with power analysis countermeasure
Switching performance analysis in RF MEMS capacitive shunt switches by geometric parameters trade-offs
A multi-channel narrowband active noise control system with simultaneous online secondary- and feedback-path modeling
An Inductive Power Transfer System With Adjustable Compensation Network For Implantable Medical Devices
Store, Supply, Extract and Recycle: A Boost/Buck Reconfigurable Converter for Thermal Energy Harvesting
A public key signature for authentication in telephone
Design of 3-4GHz Tunable Low Noise LC-QVCO for IEEE 802.11a WLAN Application
Scale Invariant Super-Resolutions Methods with Application to InSAR Images
Power plant construction project safety management evaluation with fuzzy neural network model
A novel pipeline architecture for H.264/AVC CABAC decoder
A novel capacitively-coupled instrumentation amplifier employing chopping and auto-zeroing
The Intermittent Fault Diagnosis of Analog Circuits Based on EMD-CrossFormer
Sub-Sampling Phase-Locked Loop with Ultra-mini Dead Zone For Locking Time Reduction
A Heart Rate Measurement System Based on Ballistocardiogram for Smart Furniture
A simple method for finding all characteristic curves of piecewise-linear resistive circuits using an integer programming solver
Low-latency VLSI architecture of a 3-input floating-point adder
An efficient architecture for adaptive progressive thresholding
A Two-stage Training Framework for Hardware Constraints of Computing-in-Memory Architecture
Synchronizing hyperchaos using a scalar signal: a unified framework for systems with one or several non-linearities
Dolphin Recognition with Adaptive Hybrid Saliency Detection for Deep Learning Based on DenseNet Recognition
Emerging technology about GPGPU
Analysis of a Single-Frequency Multi-Channel Ambient RF Energy Harvesting in CMOS Technology
A reconfigurable seamless-transition DC-DC Converter With lossless current-sensing technique
Lower-norm criterion based background noise estimation for simple observation model
Transistor Sizing for Parameter Obfuscation of Analog Circuits Using Satisfiability Modulo Theory
Design of a Low Power Architecture for CABAC Encoder in H.264
Reconfigurable baseband processing platform for communication systems
A Centralized Multi-String PV System Control with Multi-Dimensional MPPT Control
An electrically small meander line antenna for wireless applications
UVeriESD: An ESD verification tool for SoC design
Digitally-assisted gain calibration strategy for open-loop residue amplifiers in pipeline ADCs
A low jitter DLL-based pulsewidth control loop with wide duty cycle adjustment
A 0.9-2.2GHz wide-band low-noise amplifier design
Conveyor-based Cauer filters
Closed-form design of FIR frequency selective filter using discrete sine transform
Low-complexity architecture of CFO and IQI compensation in MIMO-OFDM systems
Deep Texture-Depth-Based Attention for Face Recognition on IoT Devices
Topology-related effects of Gated-Vdd and Gated-Vss techniques on full-adder leakage and delay at 65nm and 45 nm
Modeling a Digital Hearing Instrument for Developing and Evaluating Adaptive Feedback Cancellation Algorithms
High pitch source isolation using complex cepstrum in the autocorrelation domain
Analysis and Design of High Performance, Low Power Multiple Ports Register Files
Measurement on snapback holding voltage of high-voltage LDMOS for latch-up consideration
Characterization of structures maskless-etched by low-energy FIB
Digital Phase Estimation through an I/Q Approach for Angle of Arrival Full-Hardware Localization
Experimental studies on a micromanipulator for micro/nano manipulation
A CABAC Encoding Core with Dynamic Pipeline for H.264/AVC Main Profile
On-Chip Supply Voltage Measurement Technique
Width and Timing-Constrained Wire Sizing for Critical Area Minimization
Low-Power Bus Transform Coding for Multilevel Signals
Stereoscopic video generation from monoscopic compressed moving videos
FGMOS based wide range low voltage current mirror and its applications
Multi-Vth FinFET sequential circuits with independent-gate bias and work-function engineering for reduced power consumption
Blind MIMO direct chaotic communication system identification via higher-order statistic
MPEG video encoding based on assigning a high information priority to the focused region
Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique
Weighted peak ratio for estimating stereo confidence level using color similarity
A low-power sub-threshold CMOS continuous-time active-filter with reduced in-band noise for WiMAX applications
Live demonstration: MINDS - Meshed and internet networked devices system for smart home: Track selection: Embedded systems
A Constant-Power Inductive-Coupling Transmitter Using Auxiliary Driving Technique in 65nm SOTB CMOS for Low-Power Supply-Sensing Biosensing Platform toward Healthcare IoTs
A study on characteristic and reliability of fabricated microfluidic three electrodes sensor based on randle-sevcik equation
Asymmetric dual-gate multi-fin keeper bias options and optimization for low power and robust FinFET domino logic
A Reconfigurable Neural Recording Front-End IC for Multimodal Operation
Efficient fast filter bank with a reduced delay
Design and Optimization of Inductive Coils for 2FSK-based Power and Data Transmission for Biomedical Implants
Impact of HALO structure on threshold voltage and leakage current in 45nm NMOS device
A design for testability of non-volatile memory reliability test for automotive embedded processor
Sequence-Pair Based Compaction under Equi-Length Constraint
A Readout Circuit for Tactile Sensor with Crosstalk Suppression and Non-Uniformity Compensation
A Low-Complexity Codebook Design for Large-Scale SCMA
A new statistical timing analyzer propagating delay and slew distributions simultaneously
A 124-dB double-gain-boosted cascode amplifier with 92% rail-to-rail output swing
Machine Learning Classification Methods using Data of 3-axis Acceleration Sensors equipped with Wireless Communication Means for Locating Wooden House Structural Damage
TPE: Trajectory Path Encoding for Anonymous Routing Algorithm in NoC-based Systems
Thermal-aware router-sharing architecture for 3D Network-on-Chip designs
Online Continues Vietnamese Handwritten Character Recognition Based on Microsoft Handwritten Character Recognition Library
Current mode track and hold circuit with 50MS/sec speed and 8-bit resolution
A two-level learning hierarchy for constructing incremental projection generalizing neural networks
Signal estimation method for folding ADCs in wideband multistandard SWR receivers
A Low-power 7-b 33-Msamples/s Switched-current Pipelined ADC for Motor Control
Study on a detection algorithm for MIMO systems
Sparse LMS with segment zero attractors for adaptive estimation of sparse signals
Flexible LDPC decoder architecture for high-throughput applications
A 6-bit 2.704Gsps DAC for DS-CDMA UWB
A bus arbitration scheme for HDTV decoder SoC
An Area-Efficient Design for Modular Inversion in GF(2m)
Memory allocation method for indirect addressing with an index register
Review of Solar Energy Harvesting for IoT Applications
A low-cost continuous flow parallel memory-based FFT processor for Ultra-Wideband (UWB) applications
A New Class AB Current-Mode Circuit for Low-Voltage Applications
Design of a 1.8V on-chip voltage generator for applications in low voltage transceiver
Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection
A Certain SA Solver TOSA for Global Placement
An improved I/O buffer correlation methodology between silicon and the SPICE model
A flexible 12-bit self-calibrated quad-core current-steering DAC
ReRAM Device and Circuit Co-Design Challenges in Nano-scale CMOS Technology
Function-based memory partitioning on low power digital signal processor for cochlear implants
A study on bicycle crash risk based on GPS trajectories collected from bidirectional traffic
Linearization of table-based MOSFET Model parameters for nonlinear quantification
A write-reducing and error-correcting code generation method for non-volatile memories
Automated essay content analysis based on Concept Indexing with Fuzzy C-means clustering
Reducing power consumption of instruction ROMs by exploiting instruction frequency
Evaluation of High-Frequency Leakage Current from Air-Core Transcutaneous Energy Transmission System by Comparison of Circuit Measurements and Simulations
Lightweight and Efficient Hardware Implementation for Saber Using NTT Multiplication
Implementation of a Training Computer Program for Circuit Analysis in the Time Domain
A Low-latency Multi-format Carrier Phase Recovery Hardware for Coherent Optical Communication
A unified {2 n -1, 2 n , 2 n +1} RNS scaler with dual scaling constants
Effect of tiredness on voice signals using neural network systems
A unified GDB-based source-transaction level SW/HW co-debugging
On the Number of 3-D IC Floorplan Configurations and a Solution Perturbation Method with Good Convergence
A 500-MHz 32-bit DETFF-based Shift Register Utilizing 40-nm CMOS Technology
A Fast-Lock-In ADPLL with High-Resolution and Low-Power DCO for SoC Applications
Rotational Weighted Averaged Template Matching for Intra Prediction
Error Bound Analysis of Chip-to-Chip Communication Based on Spectrum Shaping
A Cryogenic Voltage Regulator with Integrated Voltage Reference in 22 nm FDSOI Technology
A robust online secondary-path filter active noise control system for noisy inputs and impulsive noises in sparse systems
A 120dB all CMOS variable gain amplifier based on new exponential equation
An energy-efficient baseband transmitter design for implantable biotelemetry applications
A High-Performance Symmetric Hybrid Form Design for High-Order FIR Filters
A low power relaxation oscillator with process insensitive auto-calibration scheme
An 8B/10B encoder with a modified coding table
The reconfigurable membership function circuit using analog bipolar electronics
A low-power single-ended 11-bit SA-ADC with 1 V supply voltage and 2 V input voltage range for CMOS image sensors
Fast modular multiplication using Booth recoding based on signed-digit number arithmetic
On output reorder buffer design of bit reversed pipelined continuous data FFT architecture
Live demonstration: AHB based digital filter for low power mobile healthcare system
On the use of multi-tone for the measurement of noise power ratio distortion in RF circuits
The PnP Web Tag: A plug-and-play programming model for connecting IoT devices to the web of things
Double-mode oscillation in chaotic circuits coupled by a time-varying resistor
Live demonstration: A 128-channel spike sorting processor featuring 0.175 μW and 0.0033 mm 2 per Channel in 65-nm CMOS
Feature Point Tracking for Car Speed Measurement
A 104.76-TOPS/W, Spike-Based Convolutional Neural Network Accelerator with Reduced On-Chip Memory Data Flow and Operation Unit Skipping
High Power CMOS Power Amplifier for WCDMA
A SystemC content addressable memory power estimation tool for early design verification
On the convergence analysis of the transform domain normalized LMS and related M-estimate algorithms
A 900 MHz 1.2 V CMOS mixer with high linearity
A design of sub-band generator for MB-OFDM UWB application in 0.13 μm RF CMOS process
Digital Baseband Architecture and Simulated Low-IF FSK Receiver Performance
A novel hardware-oriented decoding algorithm for non-binary LDPC codes
On the impact of transceiver impairments to cognitive DF relay networks
The problem of non-zero initial conditions in filters of the constant component
Digital Network Echo Cancellation Using Genetic Algorithm and Combined GA-LMS Method
Feedback error learning control using adaptive fuzzy network to control one linear actuator hopping robot
A Power-Efficient and Safe Neural Stimulator Using Ultra-High Frequency Current Pulses for Nerve Conduction Block
FPGA-based Implementation of a Real-Time Distance Evaluation Algorithm for Wireless Localization Systems
Performance improvement of 40 Gbit/s optical soliton transmission system by employing all-optically regenerative repeater using nonlinear optical loop mirror
Disjoint Cubes Generation Algorithm for Multiple-Valued Functions
A high speed current-mode median filter for real-time signal processing
Nanoholes microscopy
An efficient quasi LMS/Newton adaptive algorithm for stereophonic acoustic echo cancellation
Gram-Schmidt-based QR decomposition for MIMO detection: VLSI implementation and comparison
A search algorithm of bifurcation point in an impact oscillator with periodic threshold
An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips
Intelligent applications design in automotive infortainment systems
Sensitivity Analysis of Uniform and Nonuniform Transmission Lines
Timing driven force-directed floorplanning with incremental static timing analyzer
A 720-mVpp 224-Gb/s PAM4 Optical Receiver with Multiple Peaking Techniques in 130-nm SiGe BiCMOS
Hardware design of histograms of oriented gradients based on local binary pattern and binarization
VLSI implementation of universal random number generator
3~5 GHz Cascoded UWB Power Amplifier
The Analysis of Phase-jitter Variance in the Third-order CPPLL Frequency Synthesizer
Low Voltage Analogue Multiplier
Analysis of voltage imbalance in Double Differential Pairs LC Oscillator
IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012, Kaohsiung, Taiwan, December 2-5, 2012
A Total Unimodularity Based Branch-and-Bound Method for Integer Programming
An ANT network bi-directional wireless homecare system
A 22 mW CMOS Receiver Frontend Using Active-Feedback Baseband and Passive-Voltage Mixers Embedded in Current Mirrors