yusuke1997/dblp-id-title huggingface dataset:
Floorplan Area Optimization Using Network Analogous Approach
A self-synchronized RF-interconnect for 3-dimensional integrated circuits
A digital circuit design of hyperbolic tangent sigmoid function for neural networks
Further results on the global asymptotic stability of neural networks
Improved lifetime routing for Wireless Sensor Networks
Character Recognition by Neural Networks with Single-Layer Training and Rejection Mechanism
A new visit to an old problem in switched-capacitor converters
A Reconfigurable Dual-Band Bidirectional Image Rejection Mixer for 5G FR2 Applications
Design of a Low Jitter Multi-Phase Realigned PLL in submicronic CMOS technology
Event-Driven Inference with Spiking Neural Networks Enhanced by Non-Volatile Analog Spin-Orbit Torque Devices
A 5-Gb/s 1/8-rate CMOS clock and data recovery circuit
Design of a 32-bit squarer - exploiting addition redundancy
O 3 NMS: An Out-Of-Order-Based Low-Latency Accelerator for Non-Maximum Suppression
Development of a Cinfinty-Continuous Small-Signal Model for a MOS Transistor
Synchronization of networks of non-identical Chua circuits: Analysis and experiments
Low Voltage SC Circuit Design with Low-V t MOSFETs
A 1V 56.07dB SNDR 10MHz Bandwidth Digital Slope ADC Based on Preset Bidirectional-Shifting Technique
An End-to-End SoC for Brain-Inspired CNN-SNN Hybrid Applications
Implementation of PSK demodulator for digital BS/CS broadcasting system
Memory-reduced MAP decoding for double-binary convolutional Turbo code
Stability Analysis of Incremental ΣΔ Modulators using Mixed-Logic Dynamical Systems and Optimal Control Theory
An Automated Algorithm to Generate Stream Programs
A New Block Adaptive Filtering Algorithm for Decision-Feedback Equalization of Multipath Fading Channels
Enabling highly energy efficient WSN through PLL-free, fast wakeup radios
On-chip current flattening circuit with dynamic voltage scaling
Double-sampled cascaded sigma-delta modulator topologies for low oversampling ratios
Persistence of saddle-node bifurcations for general nonlinear systems under unmodeled dynamics and applications
ACHS Optimizations on 3D Interconnect Arrangements
Wearable mobile sensor and communication platform for the in-situ monitoring of lower limb health in amputees
Sparsity Through Spiking Convolutional Neural Network for Audio Classification at the Edge
Blind PSNR estimation using shifted blocks for JPEG images
A pseudo-class-AB telescopic-cascode operational amplifier
A Low-latency Carrier Phase Recovery Hardware for Coherent Optical Communication
Integrated low-ripple-voltage fast-response switched-capacitor power converter with interleaving regulation scheme
A new single-stage AC-DC converter for medical implant devices
Analysis of self mixing of transmitter interference in WCDMA receivers
Fourth-order structures for multiplierless realizations of bandpass and bandstop digital filters transformed from all-pole lowpass filters
An ADPLL circuit using a DDPS for genlock applications
Behavioral synthesis with SystemC and PSL assertions for interface specification
A blind identification technique for noisy ARMA systems
5G Millimeter-Wave Phased-Array Transceiver: System Considerations and Circuit Implementations
Rapid prototyping of the Goertzel algorithm for hardware acceleration of exon prediction
Single ended rail-to-rail CMOS OTA based variable-frequency ring-oscillator
Generalized subspace distance for set-to-set image classification
An enhanced ISI shaping technique for multi-bit ΔΣ DACs
High Frequency Performance of Current-Mode Precision Full Wave Rectifiers
On Jury's test for 2-D stability of discrete-time systems and its simplification by telepolation
Robust beamformer design by power minimization and its unconstrained partitioned implementation
Power analysis detectable watermarks for protecting intellectual property
Companding Baseband Switched Capacitor Filters and ADCs for WLAN Applications
Folded VLSI Architectures for Discrete Wavelet Transforms
A Novel Method in Compensating Random Perturbations in Eigen-Based Subspace Method
Minimum Variance Spectral Estimation-Based Time Frequency Analysis for Nonstationary Time-Series
A One-time Self Calibration Technique for Open-loop FIA in Noise Shaping SAR Achieving Ultra Gain PVT-robustness
Transmultiplexer Filter Banks with Extremely Low Crosstalk and Intersymbol Interference
Contention reduced/conditional discharge flip-flops for level conversion in CVS systems
DPAcc: An FPGA-based Differential Privacy Acceleration Framework
A high speed IC Random Number Generator based on phase noise in ring oscillators
Cache replacement and server selection for video proxy across wireless Internet
An Efficient VLSI Implementation of Vector-Radix 2-D DCT using Mesh-Connected 2-D Array
Convergence Analysis of a Subband Adaptive Filter Structure
The separability, reducibility and controllability of RLCM networks over F(z)
Semi-Supervised Artificial Neural Networks towards Analog IC Placement Recommender
Multiplier-less implementation of linear phase cosine modulated filter banks with composite channel number
A 281-nW 43.3 fJ/conversion-step 8-ENOB 25-kS/s asynchronous SAR ADC in 65nm CMOS for biomedical applications
An FPGA-based kNN Seach Accelerator for point cloud registration
Phase-locked loop architecture for adaptive jitter optimization
Improving storage of patterns in recurrent neural networks: Clone-based model and architecture
Epidemic spreading in multiplex networks with Markov and memory based inter-layer dynamics
Design considerations for variable-rate digital signal processing
Linear switched-capacitor circuit theorems
Stabilizing the transconductance in CMOS transconductors for application in gm-C filters
Dropping method for rectangle packing problem
Towards Semantically Scalable Image Coding using Semantic Map
A 10 Gb/s low-power serdes receiver based on a hybrid speculative/SAR digitization technique
Lumped element based Doherty power amplifier topology in CMOS process
A zero-mask one-time programmable memory array for RFID applications
Adaptive channel estimation using the GOBA algorithm for turbo codes in Rayleigh flat-fading channels
A High-Voltage Cascode-Connected Three-Level Pulse-Generator for Bio-Medical Ultrasound Applications
Batteryless electrostatic energy harvester and control system
A 14~18 GHz Compact Double-Pole Triple-Throw Switch Based Multi-Phase Integrated 6-bit Passive Phase Shifter
Grade of service Euclidean Steiner minimum trees
Live Demonstration: SweatSenser Dx: A Wearable Device for Combinatorial Detection of Glucose and Cortisol in Human Sweat
A Calibration Technique for P-SSHI-Phi Interface for Piezoelectric Energy Harvesting
Effect of mismatch on the reliability of binary-programmable CNNs
Linear programming design of semi-digital FIR filter and ΣΔ modulator for VDSL2 transmitter
Recovery of compressed videos using forward and backward anisotropic diffusion
A fast CAM-based image matching system on FPGA
Analysis and Prevention of Coupling-Dependent Data Flipping in Series-Series Resonant Wireless Power Transfer Systems
Computationally efficient clustering of power supplies in heterogeneous real time systems
Implementation of high order recursive filters as sub-filters
A low-power dynamic comparator with digital calibration for reduced offset mismatch
1-bit Digital Tuning of Continuous-time Filter by the Use of Unstable Sigma-delta Modulation
Limits to performance spread tuning using adaptive voltage and body biasing
MatPIM: Accelerating Matrix Operations with Memristive Stateful Logic
A/D and D/A converters by spike-interval modulation of simple spiking neurons
Output-dependent delay cancellation technique for high-accuracy current-steering DACs
Embedded cores using built-in mechanisms
A Study of Asymptotic Stability for Delayed Recurrent Neural Networks
Real-time visual play-break detection in sport events using a context descriptor
Liquid state machine based pattern recognition on FPGA with firing-activity dependent power gating and approximate computing
Zero current detection technique for fast transient response in buck DC-DC converters
Generic sensing hardware and real-time reconstruction for structured analog signals
Limit of the accuracy of parameter estimation for two molecules moving in close proximity
Modeling and simulation of electrochemical metallization memory cells
Clock jitter estimation in noise
Live demonstration: Event-driven real-time spoken digit recognition system
An efficient modeling approach for substrate noise coupling analysis
Three classes of IIR complementary filter pairs with an adjustable crossover frequency
PCFBCD: An Innovative Approach to Accelerating Collaborative Filtering
Live Demonstration: A 5-DC-parameter MOSFET model for circuit design and simulation using open-source EDA tools
International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan
Stress-dependent MOSFET Model Valid in All Operating Regions For Use in Circuit Simulations
Effects of resistive loading on unity gain frequency of two-stage CMOS operational amplifiers
An optically powered, free space optical communications receiver
Efficient video motion estimation using dual-cross search algorithms
Master Stability Function for networks of Chua's circuits with static and dynamic couplings
Complexity and memory efficient GOP structures supporting VCR functionalities in H.264/AVC
Experimental verification of 3-D hysteresis multi-scroll chaotic attractors
A Homotopy Continuation Mapping for the Steiglitz-McBride Adaptive Algorithm
Global asymptotic stability for a class of nonsymmetric neural networks
Static divided word matching line for low-power Content Addressable Memory design
A 1 MHz voltage multiplier design
Low-power multiplexer decomposition by suppressing propagation of signal transitions
Improved reversible integer transform
QC-CNN: Highly Quantized Compressive CNN for Efficient Ventricular Arrhythmia Detection in Implantable Cardioverter Defibrillators
Automatic Image-to-Color Point Cloud Cross-modal Registration Based on Graph Neural Networks and Iterative Reprojection
A low-overhead dynamic watermarking scheme on scan design for easy authentication
A 28nm programmable and low power ultra-HD video codec engine
A 0.19-V minimum input low energy level shifter for extremely low-voltage VLSIs
28/39 GHz Dual-Band GaN Power Amplifier Design
A Fully-on-chip Wideband Low Noise Amplifier for Radio Telescope Applications
Synthesis for symmetric weight matrices of neural networks
Concurrent data transmission through PSTN by CDMA
GRASPE: Accurate Post-Synthesis Power Estimation from RTL using Graph Representation Learning
Efficient four-stage frequency compensation for low-voltage amplifiers
Achievement of preassigned spectra in the synthesis of band-pass constant-envelope signals by rapidly hopping through discrete frequencies
Effect of Finite Word-Length on SQNR, Area and Power for Real-Valued Serial FFT
0.5V wavelet filters using current mirrors
Comparator Design and Calibration for Flash ADCs within Two-Step ADC Architectures
A Flash-FPGA based Rodent Control System for Closed-loop Optogenetic Control of Epilepsy
Built-In self-repair for divided word line memory
High-speed and low complexity carrier recovery for DP-QPSK transmission
A new 1.5V linear transconductor with high output impedance in a large bandwidth
Translation and scale invariant recognition of handwritten Tamil characters using a hierarchical neural network
Decision feedback IBI mitigation in OFDM systems
Design metrics for RTL level estimation of delay variability due to intradie (random) variations
Clock-jitter induced distortion in high speed CMOS switched-current segmented digital-to-analog converters
Directional cyclostationary feature detectors using 2-D IIR RF spiral-antenna beam digital filters
Adaptive Informative Semantic Knowledge Transfer for Knowledge Distillation
On the functional failure and switching time analysis of the MOBILE circuit [monostable-bistable logic element]
Globally asynchronous locally synchronous architecture for large high-performance ASICs
VLSI Implementation of Very-High-Order FIR Filters
Optimization of Gabor Features for Text-Independent Speaker Identification
Partitioning and synthesis for hybrid architecture simulators
A Randomized Modulation scheme for filterless digital Class D audio amplifiers
VLSI Implementation of a Wavelet Image Compression Technique Using Replicated Coding/Decoding Cells
A dense 45nm half-differential SRAM with lower minimum operating voltage
High-performance face detection with CPU-FPGA acceleration
An on-chip metastability measurement circuit to characterize synchronization behavior in 65nm
High-performance low-power magnetic tunnel junction based non-volatile flip-flop
Modeling of a floating-gate EEPROM cell using a charge sheet approach including variable tunneling capacitance and polysilicon gate depletion effect
A memory-reduced log-MAP kernel for turbo decoder
A Compact SHA256 Accelerator in 22nm for Energy Bounded Use-Cases with 8.2GHash/J
High throughput constant envelope pre-coder for massive MIMO systems
Bidirectional telemetry for implantable systems
Using genetic algorithms for reliability calculations of complex power systems
An efficient probabilistic method for logic circuits using real delay gate model
Circuit Cost Reduction for Online STDP using NIPIN Selector as Timekeeping Device in RRAM Synapse
A Novel Low-Complexity Joint Coding and Decoding Algorithm for NB-LDPC Codes
A 6.3nJ/op low energy 160-bit modulo-multiplier for elliptic curve cryptography processor
A 6μW/MHz charge buffer with 7fF input capacitance in 65nm CMOS for non-contact electropotential sensing
A CMOS front-end circuit for integrated fluxgate magnetic sensors
Memristor-based Offset Cancellation Technique in Analog Crossbars
Scalable VLSI architecture for K-best lattice decoders
A 46.1 fps Global Matching Optical Flow Estimation Processor for Action Recognition in Mobile Devices
A very flexible BiCMOS low-voltage high-performance source follower
High Performance Graphics on a SIMD Linear Processor Array
An Efficient Sparse-Aware Summation Optimization Strategy for DNN Accelerator
General First and Second Order Current-Mode Building Blocks
On the Inherent Harmonie Distortion of First-order Sigma-Delta Modulators
Minipix: focal plane temporal frequency image processor
Live Demonstration: A Low-cost Wearable Continuous Monitoring Platform for Dengue
High order 1-bit digital sigma delta modulation for on chip analogue signal sources
Delay macromodeling and estimation for RTL
A 1.6-GS/s 8b Flash-SAR Time-Interleaved ADC with Top-Plate Residue Based Gain Calibration
Floorplan-aware decoupling capacitance budgeting on equivalent circuit model
A 1-MHz Relaxation Oscillator Core Employing a Self-Compensating Chopped Comparator Pair
A 2 V 5th-order fully-differential CMOS Gm-C filter for wideband communication
A low-voltage and stable phase compensation technique to realize an 99 dB, 650 MHz and 1.8 V three-stage Amplifier
An Area-Efficient Ultra-Low-Power Time-Domain Feature Extractor for Edge Keyword Spotting
Energy expenditure estimation with wearable accelerometers
The implementation of generalized minimum distance decoding for Reed Solomon codes
A Digital Technique for Calibrating and Correcting Nonlinearities in Current-Steering DACs
A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier Operating over Seven Decades of Current
An Analog-to-Information VGA Image Sensor Architecture for Support Vector Machine on Compressive Measurements
Glitch-conscious low-power design of arithmetic circuits
New Current-mode Precision Rectifiers
SEAMS - a SystemC environment with analog and mixed-signal extensions
Live demonstration: Wireless sensor network for snail pest detection
A CNOT-gate implementation for information transfer by the phonon bus
Parallel modular multiplication with application to VLSI RSA implementation
Suggestions for a biologically inspired spiking retina using order-based coding
Constrained active contours for boundary refinement in interactive image segmentation
Fault tolerant mesh based Network-on-Chip architecture
New AFC algorithm for a fully-digital MDPSK DS/CDMA receiver
Bounded state space particle filter for network sensors
A High Performance General Purpose Multi-Point Signal Router
Linear Prediction Based Semi-Blind Channel Estimation for MIMO-OFDM System
Image based approach with k-mean clustering for the compression of human motion sequences
A least-squares design of nonrecursive filters satisfying prescribed magnitude and phase specifications
A multilevel modulation scheme for high-speed wireless infrared communications
On design of robust ℋ∞ filters for uncertain Markovian stochastic systems
Circuit Partitioning Using a Tabu Search Approach
RNS encoding based folding ADC
A variable bandwidth amplifier for a dual-mode low-power ΔΣ modulator in cardiac pacemaker system
A multithreaded multimedia processor merging on-chip multiprocessors and distributed vector pipelines
2D-DCT on FPGA by polynomial transformation in two-dimensions
Analysis and implementation of wireless power transfer system with phase and supply modulation control
Electrostatic vibration energy harvester with piezoelectric start-up generator
A 5-D IIR depth-velocity filter for enhancing objects moving on linear-trajectories in light field videos
An ISM 2.4 GHz low-IF receiver frontend
Methodology for Efficient Reconfigurable Architecture of Generative Neural Network
50-MHz-Bandwidth $850-\mu \mathrm{W}$-Power 60-dB-SNR Analog Amplifier with Complex Conjugated Poles
Composing better pictures in MDC: A multi-target total variational approach
Wavelet based detection of moving tree branches and leaves in video
A 600MS/s 10-bit SAR ADC with unit via-based delta-length C-DAC in 22nm FDSOI
Modeling and Analysis of Waferscale Switching Network with Multiple System Faults
A high-speed 2-D transform architecture with unique kernel for multi-standard video applications
Performance of digital discrete-time implementations of non-Foster circuit elements
Hierarchical symbolic sensitivity computation with applications to large amplifier circuit design
MPEG-4 video error detection by using data hiding techniques
Synchronization and anti-synchronization of Chua's oscillators via a piecewise linear coupling circuit
A tunable bandpass ΔΣ modulator using double sampling
A Robust Radio Frequency Identification System Enhanced with Spread Spectrum Technique
A novel content-adaptive interpolation
Elastic Grid Based Analysis of Motion Field for Object-Motion Detection in Airborne Video Flows
Unstructured Weight Pruning in Variability-Aware Memristive Crossbar Neural Networks
Motion-compensated frame interpolation scheme for H.263 codec
A novel low-voltage cross-coupled passive sampling branch for reset- and switched-opamp circuits
Bubble or Not: An Analysis of Ethereum ERC721 and ERC1155 Non-fungible Token Ecosystem
A Dynamic Quality-scalable H.264 Video Encoder
Low-power circuit advantages of the scaled accumulation FET
Classification of power system faults using wavelet transforms and probabilistic neural networks
Parallel scalable hardware architecture for hard Raptor decoder
Enhanced sgRNA On-Target Cleavage Efficacy Prediction using Conditional GANs
2D motion sensor with programmable feature extraction
A combined transmitting coil design for high efficiency WPT of endoscopic capsule
The impact of clock gating schemes on the power dissipation of synthesizable register files
Hardware-Aware Pruning of DNNs using LFSR-Generated Pseudo-Random Indices
A Novel Approach for Designing Continuous-Time Filters based on CCII
A single-chip audio system with delta-sigma DAC and class-D amplifier
Logarithmic programmable preamplifier dedicated to ultrasonic receivers
Efficient data output from the inner of large size cellular array
FPCIM: A Fully-Parallel Robust ReRAM CIM Processor for Edge AI Devices
A 1.6-Gb/s CMOS Phase-Frequency Locked Loop for Timing Recovery
Efficient digit-serial normal basis multipliers over GF(2 m )
Preprocessing technique for accelerating reconfiguration of degradable VLSI arrays
Analysis of bifurcation in switched dynamical systems with periodically moving borders: application to power converters
Traffic Redundancy in Blockchain Systems: The Impact of Logical and Physical Network Structures
Low-power log-MAP turbo decoding based on reduced metric memory access
On the probability density function of the derotated phase of complex wavelet coefficients
Multimode crystal oscillator for power management unit with digitally controlled AGC loop in 0.18μm CMOS technology
Fast and Lightweight Automatic Modulation Recognition using Spiking Neural Network
Hybrid Algorithm for the Computation of the Matrix Polynomial using a Fractal Number System
Multisource Clock Tree Synthesis Through Sink Clustering and Fast Clock Latency Prediction
Efficient coding unit size selection for HEVC downsizing transcoding
Leveraging Lightweight Neural Networks and Catastrophic Forgetting Mitigation for a Two-Wheeled Self-Balancing Robot
Global variable localization and transformation for hardware synthesis from high-level programming language description
Single-Walled Carbon Nanotube-Coated Flexible and Soft Screen-Printed Electrochemical Biosensor for Ochratoxin a Detection
Binary Single-Dimensional Convolutional Neural Network for Seizure Prediction
Triple Binary SAR Control in Distributive Digital Low Dropout Regulators for 3.6ns Fast Transient Response and 0.4mV Low Output Voltage Ripple
A novel system architecture for real-time low-level vision
Compressed sensing for DOA estimation with fewer receivers than sensors
Prospectives on the Use of ChatGPT in Education: Pros and Cons With a Classical Approach
Polyphase representation of multirate Volterra filters
Unity IDF correction for AC to DC converter based on modulation strategy
IN-service video quality monitoring
A single-ended to differential capacitive sensor interface circuit designed in CMOS technology
A digitally programmable IIR switched-capacitor filter for CMOS technology
Live demonstration: On the distance estimation of moving targets with a Stereo-Vision AER system
GERALT: Real-time Detection of Evasion Attacks in Deep Learning Systems
An All Analog Temporal Power-supply Trojan to Subvert ECG Biometric Authentication
Analog Switched-Capacitor Circuits for Solving the Schrödinger Equation
Ultra low power NEMFET based logic
A Parallel Face Detection System Implemented on FPGA
Exploration of a PIM Design Configuration for Energy-Efficient Task Offloading
RGBD-based Hardware Friendly Head Pose Estimation System via Convolutional attention module
An algorithm for symbolic and numeric architecture determination in a knowledge-based analog-to-digital converter synthesis environment using fuzzy membership functions
An 89 μW MICS/ISM band receiver for ultra-low-power applications
Towards closing the energy gap between HOG and CNN features for embedded vision (Invited paper)
A Reinforcement Learning-Based Retraining-Free Pruning for Encoder-Based Language Models
Multi-level Latent Fusion in Learning-based Image Coding
Analysis of timing jitter in ring oscillators due to power supply noise
A Reconfigurable Multimodal Sensor Interface IC Based on Direct-Conversion ΔΣ Modulator Structure
A 7 milliwatt 1GBPS CMOS optical receiver for through wafer communication
Instantaneous pitch estimation of noisy speech signal with multivariate SST
Requirement driven low-power LC and ring oscillator design
High SNR capacitive sensing transducer
4T Gain-Cell with internal-feedback for ultra-low retention power at scaled CMOS nodes
Visual location of license plates by vector quantization
Efficient passive transmission line macromodeling algorithm using method of characteristics
Learning temporal correlations in biologically-inspired aVLSI
Power Reduction of On-Chip Serial Links
WL-VC SRAM: a low leakage memory circuit for deep sub-micron design
Two-dimensional signal gating for low-power array multiplier design
An FPGA Implementation of An Event-Driven Unsupervised Feature Extraction Algorithm for Pattern Recognition
Interconnect Stack Parameter Optimization Using Genetic Algorithm
A Subthreshold 10T SRAM Cell with Enhanced Read and Write Operations
High-performance architecture for Elliptic Curve Cryptography over binary field