yusuke1997/dblp-id-title huggingface dataset:
Super-Regenerative Receiver for OFDM Communication
Using VCO-OTA TIAs to Break the Gain, Linearity and Power Consumption Trade-offs in Passive Mixer based Direct-Conversion Receivers
ASIC implementation architecture for pulse shaping FIR filters in 3G mobile communications
A 825 MHz 2.83 µW -70 dBm Sensitivity Wake-up Receiver with Resonant Noise Matching
Design of a 70-MHz IF 10-MHz bandwidth bandpass ΣΔ modulator for WCDMA applications
The SAW resonators on LiNb03 for mass-sensing applications
Continuous-time CMOS adaptive asynchronous ΣΔ modulator approximating low-ƒs low-inband-error on-chip wideband power amplifier
Power-delay tradeoffs in residue number system
Clock recovery in high-speed multilevel serial links
An Efficient Design Method for Optimal Weighted Median Filtering
Estimating Node Voltages in Bipolar Circuits Using Linear Programming
Automatic localization of craniofacial landmarks for assisted cephalometry
Distributed video coding based on adaptive binning
A simple energy efficient transceiver for IEEE 802.15.4
An Adaptive Step-size Order Statistic Time Domain Equaliser for Discrete Multitone Systems
RAM-based programmable stack filter implementation
Process tolerant design of N-tone Sigma-Delta converters
Concurrent Effect of Redundancy and Switching Algorithms in SAR ADCs
128 × 128 Pixel CMOS Event Camera With Multi-Bit Temporal Difference Event Generation
Tunable Nonlinear Transmission Lines with Switched Varactors
Thresholded samplers for UWB impulse radar
Am object-based approach to plenoptic videos
Optimization of workload scheduling for multimedia cloud computing
A fast-settling high linearity auto gain control for broadband OFDM-based PLC system
A High Speed True Random Number Generator with Cellular Automata with Random Memory
A PVT-Aware Voltage Scaling Method for Energy Efficient FPGAs
Aging in CMOS RF Linear Power Amplifiers: Experimental Comparison and Modeling
Application of radiation mode in desired sound field generation using loudspeaker array
"Swimming pool"-like distributed architecture for clock generation in large many-core SoC
An 8 Channel Patient Specific Neuromorphic Processor for the Early Screening of Autistic Children through Emotion Detection
A CMOS Wideband Linear Low-Noise Amplifier Using Dual Capacitor-Cross-Coupled Configurations
Overview of carbon-based circuits and systems
Area and Throughput Aware Comparator Networks Optimization for Parallel Data Processing on FPGA
Error concealment protection for loss resilient bitplane-coded video communications
A fully integrated 0.5-7 Hz CMOS bandpass amplifier
Gait Analysis for Human Identification through Manifold Learning and HMM
Biologically Plausible Speech Recognition using Spike-based Phase Locking Cues
Asymmetry half bridge soft-switching PFC converter with direct energy transfer
Pole frequency and pass-band gain tunable novel fully-differential current-mode all-pass filter
DTS: A Tree Based Representation for 3D-Block Packing
Frame compatible format fast encoder with stereo matching
A Back-Gate-Input Clocked Comparator with Improved Speed and Reduced Noise in 22-nm SOI CMOS
6.8 mW 2.5 Gb/s and 42.5 mW 5 Gb/s 1: 8 CMOS demultiplexers
Edge detection using histogram equalization and multi-filtering process
CMOS pixel-level ADC with change detection
A New Variable Step-size Algorithm using Genetic-Type Search
A Passive Noise-Shaping SAR ADC with Energy-Efficient Switching Method
CNN-Based Bi-Prediction Utilizing Spatial Information for Video Coding
An Angle-Insensitive Time-Interleaved 4-Channels 138dB Dynamic Range Light Sensor with Flicker Detection for Smart Lighting Application
Higher radix Kogge-Stone parallel prefix adder architectures
A frequency-based signature gas identification circuit for SnO2 gas sensors
A 2.67 mJ/frame Video Mamba Accelerator with Importance-aware Redundancy Elimination and SSM Computing Reformulation
To exploit uncertainty masking for adaptive image rendering
VersaTile Convolutional Neural Network Mapping on FPGAs
Real-time clustering algorithm that adapts to dynamic changes in neural recordings
Hash function based on chaotic neural networks
Multi-Objective Look-Ahead Power Dispatch with Renewables: The User Preference Enabling Method and Theory
Direction finding and multipath mitigation using single antenna
Design of an efficient OFDM burst synchronization scheme
A neural system for radiation discrimination in nuclear fusion applications
Fuzzy filters for noisy image filtering
Live Demonstration: Versatile Emulation of Spiking Neural Networks on an Accelerated Neuromorphic Substrate
Need for large local FPGA-accessible memories in the integration of bio-inspired applications into embedded systems
A design flow for linear-phase fixed-point FIR filters: from the NPRM specifications to a VHDL code
Low-bit motion estimation with edge enhanced images for lowpower MPEG encoder
Enhanced delta-based layered decoding of WiMAX QC-LDPC codes
A 15-bit CMOS cyclic A/D converter with correlated double sampling
Efficient design of sparse FIR filters with optimized filter length
A 3-V 1-GHz Low-Noise Bandpass Amplifier
Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory
A 5-bit 1.5GSps calibration-less binary search ADC using threshold reconfigurable comparators
A design framework for FPGA-based dynamically reconfigurable digital controllers
CMOS Electrochemical Imaging Arrays for the Detection and Classification of Microorganisms
A Node Expansion Method for Current-mode Synthesis
Low-power parallel tree architecture for full search block-matching motion estimation
Hardware-efficient image enhancement with bilateral tone adjustment
Analog layout retargeting with process-variation-aware rule-based OPC
Properties of fastest LIA transform matrices and their spectra
The approximation of arbitrary complex filter responses
A 50% Ripple Reduction Hybrid Multiphase Interleaving SC Converter with Bottom-Plate Charge Sharing
Synthesis of constant power loads using switching converters under sliding mode control
High-order linear transformation MOSFET-C filters using operational transresistance amplifiers
A Low-Power and Wide-Locking-Range Injection-Locked Frequency Divider by Three with Dual-Injection Divide-by-Two Technique
Efficient estimation of a sequence of frequencies for M-ary CPFSK demodulation
Revealing the Secret Parameters of an FPGA-Based "True" Random Number Generator
A Metastability Inference and Avoidance Technique for Near-Threshold-Voltage Network-on-Chip
Measuring harmonics by an improved FFT-based algorithm with considering frequency variations
Implementation details of mid-level vision on the Embedded Vision Engine (EVE)
A power reduction method for off-chip interconnects
A 1.2 GHz CMOS quadrature self-oscillating mixer
Extending the POWER Architecture with Transprecision Co-Processors
View-dependent transmission of 3-D normal meshes
A mathematical programming approach to designing MOS current-mode logic circuits
Lab-on-CMOS: A multi-modal CMOS sensor platform towards personalized DNA sequencing
The PBF of One Weight Weighted Median Filters
A 23μW digitally controlled pMUT interface circuit for Doppler ultrasound Imaging
An uncoded BER comparison between DFE-SCCP and OFDM using a convex analysis framework
A fully balanced programmable sample-hold amplifier for low-voltage applications
A new low complexity iterative equalization architecture for high-speed receivers on highly dispersive channels: Decision feedforward equalizer (DFFE)
A five-transistor bandpass filter element
Dual-threshold-voltage configurable circuits with three-independent-gate silicon nanowire FETs
A systematic approach to CMOS low noise amplifier design for ultrawideband applications
A Current Mode Analog Circuits for Tent Maps Using Piecewise Linear Functions
A systematic technique for designing prototype filters for perfect reconstruction cosine modulated and modified DFT filter banks
New Dyadic Transform for Image Compression
RF current mode class-D power amplifiers under periodic and non-periodic switching conditions
Design of a PSWF impulse response filter for UWB systems
A novel 2D filter design methodology
A compact NIR fluorescence imaging system with goggle display for intraoperative guidance
A Bipolar-Input Bipolar-Output DC-DC Converter for Thermoelectric Energy Harvesting
Spike-Based Plasticity Circuits for Always-on On-Line Learning in Neuromorphic Systems
An area-efficient versatile Reed-Solomon decoder for ADSL
A Voltage Swing Self-Adjustable Match-Line Sensing Scheme for Content-Addressable Memories
1.7 GHz bipolar optoelectronic receiver using conventional 0.8 μm BiCMOS process
Real time signal reconstruction from spikes on a digital signal processor
A Novel Active Pixel Sensor Architecture with In-Pixel Chopping and Switched Biasing to Reduce the Low-Frequency Noise
A multi-gigabit CMOS data recovery circuit using an analog parallel sampling technique
Voting based weighted online sequential extreme learning machine for imbalance multi-class classification
An Integrated Framework of Design Optimization and Space Minimization for DSP applications
A new technique for noise-tolerant pipelined dynamic digital circuits
0.25pA/Bit Ultra-Low-Leakage 6T Single-Port SRAM on 22nm Bulk Process for IoT Applications
Time diversity approach for intra-chip RF/wireless interconnect systems
Statistical analysis of switched linear networks
Revisiting the Absolutely Minimal Realization for Two-dimensional Digital Filters
A novel quasi-static channel enhancing technique for body channel communication
A continuous-time varactor-based temperature compensation circuit for floating-gate multipliers and inner-product circuits
CMOS dynamic linking networks for real-time human face tracking
Automated Quantization Range Mapping for DAC/ADC Non-linearity in Computing-In-Memory
A novel family of low-voltage very low power super class AB OTAs with significantly enhanced slew rate and bandwidth
Performance limits of planar and multi-layer integrated inductors
A novel interleaving algorithm for robust video transmission
A Time-Delay-Integration CMOS image sensor with pipelined charge transfer architecture
A 2D systems approach to iterative learning control based on nonlinear adaptive control techniques
A 46 TOPS/W In-/Near-Memory Computing Processor for Large Language Model with Extended Sparse Attention
Linear compact CMOS OTA with multidecade tuning, -62dB IM3, -75dB SFDR, constant input range and two independent degrees of freedom for gain adjustment
23-mW 50-MS/s 10-bit Pipeline A/D converter with Nonlinear LMS Foreground Calibration
Highly linear variable gain amplifiers with programmable temperature compensation for CDMA wireless applications
Analysis and Simulation of Negative Capacitance Independent Multi-Gate FinFETs
Instance-level Timing Learning and Prediction at Placement using Res-UNet Network
Stability analysis for switched systems with continuous-time and discrete-time subsystems: a Lie algebraic approach
Detection of Trichinella Larvae using a Microfluidic-Based Flow-Through Nematode Filter
A novel high-rate hybrid window ADC design for monolithic digitally-controlled DC-DC converters
Performance and network power evaluation of tightly mixed SRAM NUCA for 3D Multi-core Network on Chips
Live Demonstration: A Tracking System Based on a Real-Time Bio-Inspired Optical Flow Sensor
Low-Complexity Ultra Wideband Communications
Signal Routing with Temporal Constraints
Pulse-Stream Circuits for On-Chip Learning in Analogue VLSI Neural Networks
Teaching ΔΣ modulators with PyDSM and scientific Python
Harnessing GPU Acceleration for Exact DNA Sequence Matching via the KMP Algorithm
A behavioural approach to the pole/zero structure of nD linear systems
Attaining Thermal Integrity in Nanometer Chips
A New Advanced RNMC Technique with Dual-active Current and Voltage Buffers for Low-power High-load Three-stage Amplifiers
Dynamic calibration of current-steering DAC
A 0.21V 40nm NAND-ROM for IoT Sensing Systems with Long Standby Periods
Performance Analysis of Compressive Diffusion Normalized LMS Algorithm with Link Noises
Phase jitter dynamics of first-order digital phase-locked loops with frequency-modulated input
A multiplexed biosensor based on biomolecular nanowires
The design of a 14 GHz I/Q ring oscillator in 0.18 μm CMOS
A memory controller that reduces latency of cached SDRAM
Closed-loop electrophysiology: Past, present and future perspectives and applications
Breaking the SNR wall of spectrum sensing in cognitive radio by using the chaotic stochastic resonance
Optimized bit extraction of SVC exploiting linear error model
Partial encryption of compressed images employing FPGA
Supply noise insensitive ring VCO with on-chip adaptive bias-current and voltage-swing control
MISNet: Multi-Resolution Level Feature Interpolating Ultralight-Weight Residual Image Super Resolution Network
An ultra low power pH-monitoring IC with a duty-cycling wireless FM-transmitter
Automatic extraction of moving objects using multiple features and multiple frames
Virtual Hardware and the Limits of Computational Speed-up
A self-testing method for the pipelined A/D converter
Adaptive fine granularity scalable coding for video streaming
A mutator-based meminductor emulator circuit
Compact FALCON FFT/NTT Accelerator for Post-Quantum Cryptography
Low memory cost bilateral filtering using stripe-based sliding integral histogram
A Low Voltage CMOS Bandgap Reference without using an Opamp
Efficient approaches to design a reversible floating point divider
Receiver-based congestion control mechanism for Internet video transmission
General iterative heuristics for VLSI multiobjective partitioning
Implementation of Gabor feature extraction algorithm for electrocardiogram on FPGA
Realizing high throughput transforms of H.264/AVC
The impact of 3-dimensional integration on the design of arithmetic units
FM/PWM control scheme on class DE inverter for keeping high power conversion efficiency
Jump Conditions for Second-Order Trajectory Sensitivities at Events
An Efficient Gradient Boosting Approach for PVT Aware Estimation of Leakage Power and Propagation Delay in CMOS/FinFET Digital Cells
FPGA-Powered 4K120p HEVC Intra Encoder
Top-level activity-driven clock tree synthesis with clock skew variation considered
Associative computation circuits for real-time processing of satellite communications and image pattern classification
PAPS-OVQA: Projection-Aware Patch Sampling for Omnidirectional Video Quality Assessment
Breakdown Point Analysis of a New M-Estimator for Robust Multiuser Detection in Non-Gaussian Channels
A modular RC-active network for vibration damping in piezo-electro-mechanical beams
Explicit energy evaluation in RLC tree circuits with ramp inputs
A 3.84 GHz 32 fs RMS Jitter Over-Sampling PLL with High-Gain Cross-Switching Phase Detector
Towards Low-Power High-Performance Content-Addressable Memory: A Robust Precharge-Free Approach
Integrated vision sensor for detecting boundary crossings
A Low Power Temperature-Compensated Common-Mode Voltage Detector for Dynamic Amplifiers
Analytic derivation of the performance degradation in recursive implementation of sliding-DFT with the twiddle factors of finite-bit precision
A linear time algorithm for computing hexagonal Steiner minimum trees for terminals on the boundary of a regular hexagon
Wearable Glasses for Retinal Pigmentiosa Based on Optogenetics
An AR prefiltering approach to adaptive equalization
LiDAR Point Cloud Upsampling with Mamba Architecture
Recursive block-matching principle for error concealment algorithm
A novel algorithm for mobile station location estimation with none line of sight error using robust least M-estimation
Sinusoidal signal generation for production testing and BIST applications
The implementation of a transient DC-link boost based digital amplifier for eliminating pulse-dropping distortion
Monocular Semantic Mapping Based on 3D Cuboids Tracking
Non-interleaving architecture for hardware implementation of modular multiplication
Bit-depth Expansion by Contour Region Reconstruction
Inversion of unimodular Matrices via State-Space Approach
A current-controlled oscillator coarse-steering acquisition-aid for high frequency SOI CMOS PLL circuits
Data Fusion Framework for Sand Detection in Pipelines
An Annealing Processor based on 1k-Spin Fully-Connected Ising Model for Combinatorial Optimization Problems
Ultra-Fast Error Correction and Detection for Low-Latency Storage Applications with Emerging Memories
Low-cost configurable ring oscillator PUF with improved uniqueness
Passive Third Order Continuous-Time ΔΣ Modulator with Q Enhancement Technique
An all-digital PLL with cascaded dynamic phase average loop for wide multiplication range applications
A 3.3 V 1 GHz low-latency pipelined Booth multiplier with new Manchester carry-pass adder
FPGA-based strong PUF with increased uniqueness and entropy properties
Configurable two-dimensional linear feedback shifter registers for deterministic and random patterns [logic BIST]
A lab-on-chip approach for monitoring the electrochemical activity of biorealistic cell cultures
Matched median filters for binary pulse compression
Kung-Fu: An Energy-Efficient Compute-In-Memory Approach for Neural Network Inference Using Multi-Level Binary Computing Fusion
A UWB mixer with a balanced wide band active balun using crossing centertaped inductor
Indirect programming of floating-gate transistors
Distinguishing Falsification of Human Faces from True Faces based on Optical Flow Information
A fast Reed-Solomon Product-Code decoder without redundant computations
A Neural Stimulator with 11.4 V Voltage-Compliance Realized in a $0.18-\mu\mathrm{m}$ 3.3 V CMOS Technology
A novel floating gate circuit family with subthreshold voltage swing for ultra-low power operation
Line-frequency instability of three-phase PFC power supplies connecting to non-ideal power grid
Minimum Roundoff Noise Realization for Variable IIR Digital Filters Based on M-D Polynomial Approximation
Performance model for inter-chip communication considering inductive cross-talk and cost
Adaptive Digital Pre-Emphasis for PLL-Based FMCW Modulators
Neuromorphic Recurrent Spiking Neural Networks for EMG Gesture Classification and Low Power Implementation on Loihi
Hybrid order detection algorithm for V-BLAST system employing adaptive modulation
Band Pass NS-DEM for SAR Pipeline ADCs
An empirical and statistical comparison of state-of-the-art sigma-delta modulators
Power-aware through-silicon-via minimization by partitioning finite state machine with datapath
Multi-level low swing voltage values for low power design applications
A Machine Hearing System for Binaural Sound Localization based on Instantaneous Correlation
Wireless esophageal catheter dedicated to respiratory diseases diagnostic
Fast Reconfiguration Experiments of an Optically Differential Reconfigurable Gate Array with Nine Configuration Contexts
A Bio-Inspired Adaptive Retinal Processing Neuron with Multiplexed Spiking Outputs
Automatic Model Refinement of GmC Integrators for High-level Simulation of Continuous-time Sigma-Delta Modulators
Analog sensing front-end system for harmonic signal classification
An Undersampling Digital Microphone
A 19μW, 100kbps Impulse Radio transceiver for body-area-networks
A Dual VCO Based L5/S Band PLL with Extended Range Divider for IRNSS Application
STT-MRAM write energy minimization via area optimization under dynamic voltage Scaling
A single Op-Amp 0+2 sigma-delta modulator
A gray-code current-mode ADC for mixed-mode cellular computer
A common grounded Z-source buck-boost converter
Transcutaneous capacitive wireless power transfer (C-WPT) for biomedical implants
Memory exploration for low power embedded systems
An Offset and 1/f-Noise Compensated Current-to-Digital Conversion for Active Pixels in MEA Applications
A 6.78-MHz Soft-Switching Push-Pull Amplifier Achieving 60.9-%-Efficiency Wireless Power Transfer for Medical Implant Applications
Active filter synthesis based on tuneable log-domain lossy integrators
Video noise reduction in the wavelet domain using temporal decorrelation and adaptive thresholding
Live Demonstration: FPGA-Based CNN Accelerator with Filter-Wise-Optimized Bit Precision
Live demonstration - An adaptable prosthetic socket: Regulating independent air bladders through closed-loop control
Interlaced pilot channel estimation in MIMO-OFDM systems
Nanomechanical Relay-based Switchblock For FPGA Interconnect
ASIP-based control system for LED matrix display
Application of Fast Orthogonal Search for the Design of RBFNN
Systematic design flow for dynamic data management in visual texture decoder of MPEG-4
Modeling and Simulation of Hybrid Control Systems by Global Petri Nets
Class DE current driven low di/dt rectifier
An analytical 3-D placement that reserves routing space
A High-Gain and Low-Noise Mixer with Hybrid $G_{m}$-Boosting for 5G FR2 Applications
A new electrothermal dynamic macromodel of the power Darlington transistor for SPICE
Progressive image reconstruction via cellular neural networks
VLSI implementation of a wide-band sonar receiver
A hydrogel-based implantable wireless CMOS glucose sensor SoC
A 5s-time-constant temperature-stable integrator for a tuneable PID controller in LOC applications
Optimal error feedback and realization for roundoff noise minimization in linear discrete-time systems with full-order state observer feedback
High-Speed and Low-Complexity Parallel Long BCH Encoder
Optimization of partially-mixed-polarity Reed-Muller expansions
A dual pixel-type imager for imaging and motion centroid localization
NeuroBetaMed: A re-configurable wavelet-based event detection circuit for in vitro biological signals
A stability test for continuous-discrete bivariate polynomials
Improving FM-GAN through Mixup Manifold Regularization
Educational Framework for Power Side-Channel Attacks on Neural Networks in Embedded Systems
MDFT Filter Banks with Perfect Reconstruction
A distortion corrected passive RC noise shaping ADC for biomedical applications
A Segmented Data-Weighted-Averaging Technique
An AVPG for SOC design verification with port order fault model
Integrated 1.2 um CMOS photodiodes, transimpedance amplifier, 12 bits A/D converter, and DSP interface for microinstrument applications
A new optimization model for VLSI placement algorithms
A low-jitter frequency synthesizer with dynamic phase interpolation for high-speed Ethernet
Fast iterative method package for high frequency circuits analysis
Memory address allocation method for a indirect addressing DSP with consideration of modification in local computational order
Constrained multiple kernel tracking for human limbs
Protecting DSP circuits through obfuscation
Saliency Detection with Multi-Contextual Models and Spatially Coherent Loss Function
A load-adaptive, low switching-noise data output buffer
A novel fast motion estimation algorithm using fixed subsampling pattern and multiple local winners search
Surveillance face hallucination via variable selection and manifold learning
Design of FIR filters with exceptional passband and stopband smoothness using a new transitional window
Design considerations in bandgap references over process variations
The Euclidean direction search algorithm for adaptive filtering
An exploration-based binding and scheduling technique for synthesis of digital blocks for mixed-signal applications
A study of identifibility for blind source separation via non-orthogonal joint diagonalization
A Low-power People Counting System based on a
A 860.8-nW Low-Power Continuous-Time Delta-Sigma Modulator With Switched Resistors for Sensor Applications
A Programmable, Highly Linear and PVT-Insensitive ISFET Array for PoC Diagnosis
A Two-step Linear-Exponential Incremental ADC with Slope Extended Counting
A novel scheme of implementing high speed AWGN communication channel emulators in FPGAs
Retiming and Clock Skew for Synchronous Systems
A new method for efficient time-domain simulation of power electronic circuits
Continuation method in multitone harmonic balance
MiNL: Micro-Images based Neural Representation for Light Fields
EOG segmentation using fast algorithms
Development of adaptive QRS detection rules based on center differentiation method for clinical application
A Replica Driverless Common/Differential Mode Hybrid for Full-Duplex Signaling in Serial Links