yusuke1997/dblp-id-title huggingface dataset:
A 32-channel MCU-based feature extraction and classification for scalable on-node spike sorting
Low-power design technique for flash A/D converters based on reduction of the number of comparators
Reliable and low-power clock distribution using pre- and post-silicon delay adaptation in high-level synthesis
An Accurate Algorithm for Fast Frequency Warping
Low power demodulators with phase quantization for a zero-IF Bluetooth receiver
Low-power ripple-free chopper amplifier with correlated double sampling de-chopping
A new self-reference sensing scheme for TLC MRAM
A new pipelined digit serial-parallel multiplier
Stochastic cycle period analysis in timed circuits
A digitally controlled PLL for digital SOCs
Live demonstration: Efficient event-driven approach using synchrony processing for hardware spiking neural networks
99% High accuracy knee voltage detection for primary-side control in flyback converter
Persistence of equilibria under weight variation of feedback continuous-time neural network
Steady-state analysis of strongly nonlinear Oscillators By Means of Runge-Kutta Methods
A 10-bit algorithmic A/D converter for cytosensor application
Design and FPGA Implementation of a Light-Weight Calibration-Friendly Eye Gaze Tracking Algorithm
L 2 gain analysis for switched symmetric systems with time delay under arbitrary switching
Floating-point Quasi-Maximum Accuracy Arithmetics for Digital Signal Processing
Nomographs and classical filter sensitivity optimization
A 1.6GHz Ultra-Low Phase Noise GaAs HBT PLL for Anti-Radiation Applications
Bipolar Circuits for Readout of an Integrated Silicon Color Sensor
Unified selectable fixed-coefficient recursive structures for computing DCT, IMDCT and subband synthesis filtering
A new software tool to model measured RF-data with optimum circuit topology
A Wave Digital Kalman Filter Approach for Fault Detection in DC Grids: A Case Study
A low-power high-SFDR CMOS direct digital frequency synthesizer
Equivalence of two discretization schemes in a simple sliding mode control system
A Differential-Mode Current Sensor And Its Application To A LDO Regulator
Contactless inter-tier communication for heterogeneous 3-D ICs
A Compact 140nW/input Winner-Take-All Circuit for Spiking Neural Networks
Kvazaar HEVC encoder for efficient intra coding
On the Complexity of Three-Dimensional Channel Routing (Extended Abstract)
A High-performance RNS LSTM block
VLSI implementation of an 855 Mbps high performance soft-output K-Best MIMO detector
A Fully Integrated Digitally Programmable Pulse Shaping 6.0-8.5 GHz UWB IR Transmitter Front-End for Energy Harvesting Applications
Accelerating Stereo Matching on Mutlicore ARM Platform
An FPGA-Based Reconfigurable Accelerator for Convolution-Transformer Hybrid EfficientViT
A novel low-power and high-speed dual-modulus prescaler based on extended true single-phase clock logic
Towards Battery-Less Internet of Bodies: Energy Harvester with Reconfigurable Stages Enabled by Galvanic Body-Coupled Powering for Bio-Implants
Evidence updating in a heterogeneous sensor environment
Integrated synchronous electric charge extraction system for piezoelectric energy harvesters
Self-Organizing Map with Weighted Connections avoiding false-neighbor effects
Multiple fault diagnosis of analog circuits by locating ambiguity groups of test equation
Variational Analog Integrated Circuit Design via Symbolic Sensitivity Analysis
Broadband High-Efficiency Watt-Level Millimeter-Wave GaN Power Amplifier for Potential Robust and Cost-Effective 5G RF Front-End Design
An unsupervised Gaussian cluster formation technique as a Bussgang blind deconvolution algorithm
Optimal Body Biasing for Minimum Leakage Power in Standby Mode
Non-linear Filtering in Reproducing Kernel Hilbert Spaces for Noise-robust Speaker Verification
Tangible User Interface Everywhere Based on Imperceptible Structured Light
Radiation-Hardened Design of TCAM for Single-Event Upset Tolerance
On the hardware design for DES cipher in tamper resistant devices against differential fault analysis
Energy-efficient asynchronous delay element with wide controllability
A consideration on the blind channel estimation based on IIR type model
Neuromorphic selective attention systems
Tightly integrated deep learning and symbolic programming on a single neuromorphic chip
Prediction-based macroblock mode mapping for video coding
Programmable Metasurfaces: State of the Art and Prospects
Optimized Random Forest Classifier for Drone Pilot Identification
Auditory filter bank inversion
Vibration and Thermal Energy Harvesting System for Automobiles with Impedance Matching and Wake-up
Adaptive pre-interpolation filter for motion-compensated prediction
Interconnect layout macromodelling and simulation in high speed circuits
An Energy-Efficient Convolution Unit for Depthwise Separable Convolutional Neural Networks
The design and implementation of DCT/IDCT chip with novel architecture
The toroidal neural networks
2xVDD-tolerant crystal oscillator circuit realized with 1xVDD CMOS devices without gate-oxide reliability issue
Analysis of Spurious Emission and In-Band Phase Noise of an All Digital Phase Locked Loop for RF Synthesis using a Frequency Discriminator
On the theory and design of a class of perfect-reconstruction nonuniform cosine-modulated filter-banks
Large-Signal Stability of PWM Switching Regulators
A simple approach for the implementation of CMOS amplifiers with constant bandwidth independent of gain
An Energy-Efficient Configurable Coprocessor Based on 1-D CNN for ECG Anomaly Detection
Characterization of laser-induced photoexcitation effect on a surrounding CMOS ring oscillator
End-to-End Prediction of Sodium Concentration from Uncalibrated Sodium ISFETs
A CMOS realization of double-scroll chaotic circuit and its application to random number generation
An Energy-Efficient Level Shifter Using Time Borrowing Technique for Ultra Wide Voltage Conversion from Sub-200mV to 3.0V
Uncorrelated Multilinear Geometry Preserving Projections for Multimodal Biometrics Recognition
Spurious tones in digital delta sigma modulators with pseudorandom dither
Phase shifts and linear dependencies
On a modified structure for cosine-modulated filter banks using the frequency-response masking approach
High-level design environment for massive parallel VLSI-implementations of statistical signal- and image processing models
Duty Cycle Distortion in Half-rate Nyquist DACs with Limited Output Bandwidth
Performances of RF PA classes in LINC systems
A 4T4R Compact Wide-Band Low Power UWB Beamfoming Transceiver for Efficiency and Sensitivity Improvement
m3D: A Multidimensional Dynamic Configurable Router
A novel DHT-based FFT/IFFT processor for ADSL transceivers
A Bayesian Model Order Determination Rule for Harmonic Signals
DOA estimation of coherent signals for uniform linear arrays with mutual coupling
A fully-differential adaptive equalizer using the spectrum-balancing technique
Objective Quality Assessment of Full-Scene Resampling-based Coding for VVC Standard
Optimizing an amplifier by a many-objective algorithm based on R2 indicator
Adaptive segmentation of electroencephalographic data using a nonlinear energy operator
Impulse based scheme for crystal-less ULP radios
A Spatial Schur Type LS Algorithm and Its Pyramid Systolic Array Implementation
A neural network method for adaptive noise cancellation
A sub-1V bandgap reference circuit using subthreshold current
Single Miller compensation using inverting current buffer for multi-stage amplifiers
An adaptive down-sampling based video coding with hybrid super-resolution method
A Piezoelectric Biologically Plausible Spiking Neuron
An averaging method for a committee of special-orthogonal-group machines
Integrated Foreground Calibration for a High Speed Time Interleaved SAR Converter
Sliding-Window Digital Fountain Codes for Streaming of Multimedia Contents
A 16-channel low-noise programmable system for the recording of neural signals
Glitch-aware output switching activity from word-level statistics
A new multi-valued static random access memory (MVSRAM) with hybrid circuit consisting of single-electron (SE) and MOSFET
FPGA implementation of low latency scalable Elliptic Curve Cryptosystem processor in GF(2 m )
Design and Application of an Approximate 2-D Convolver with Error Compensation
A Bandpass Subsampled Delta-Sigma Modulator for Narrowband Cellular Mobile Communications
Speed: Fast and Efficient Timing Driven Placement
Stability analysis for Cohen-Grossberg neural networks with time-varying delays
A 3.11 μ W 40 n V/ ✓Hz Instrumentation Amplifier for Bio-Impedance Sensors Exploiting Positive-Feedback-Assisted Gain Boosting
An Ultra-Miniaturised CMOS Clock and Data Recovery System for Wireless ASK Transmission
Efficient VHDL Implementation of an Upscaling Function for Real Time Video Applications
Statistical modeling of gate-delay variation with consideration of intra-gate variability
Generation of n-scroll chaos using nonlinear transconductors
A Fully Integrated, Custom End-to-End PPG Sensing System for Ultra-Low Power Wearables
Halfbex: A RISC-V Microarchitecture with Narrow Data Path for Improved Energy Efficiency
Exploring early design tradeoffs in 3DIC
Ultra miniature offset cancelled bandgap reference with ±0.534% inaccuracy from -10°C to 110°C
An embedded wavelet-based quadtree interframe coding algorithm
A trajectory-based methodology for systematically computing multiple optimal solutions of general nonlinear programming problems
Power-scalable multi-mode reconfigurable continuous-time lowpass/quadrature bandpass sigma-delta modulator for zero/low-IF receivers
A novel subcircuit extraction algorithm by recursive identification scheme
Calibration technique for SAR analog-to-digital converters
Selective Binarization based Architecture Design Methodology for Resource-constrained Computation of Deep Neural Networks
On complete stability of three-cell CNNs with opposite-sign templates
An adaptive speed function of level set method for moving object extraction
AMS-HD: Acute Mountain Sickness Detection with Hyperdimensional Computing
On the ESD Protection for 10V-Compliant Neural Stimulator in 65nm CMOS Technology
An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits
The design of arbitrary-band multi-path polyphase IIR filters
Compass tilt compensation algorithm using CORDIC
A High PSR Voltage Reference for DC-to-DC Converter Applications
Approximate SOT-MRAM for Neural Network Acceleration with Superior Read Performance
A 2.3nW Gate-Leakage Based Sub-Bandgap Voltage Reference with Line Sensitivity of 0.0066%/V from -40°C to 150°C for Low-Power IoT Systems
Verilog-A modeling of SPAD statistical phenomena
Frame-parallel design strategy for high definition B-frame H.264/AVC encoder
360-Degree Intra Coding Mode for Equirectangular Projection Format Videos
Time Window Selection via Online Risk Assessment for Power Distribution System Analysis
Coupling-Dependent Data Flipping in Wireless Power and Data Transfer System
Structured and tiled-based pruning of Deep Learning models targeting FPGA implementations
A Programmable Switched-Capacitor Filter
A PAM-4 10S/12S line coding scheme with equi-probable levels
A 0.001mm 2 100µW on-chip temperature sensor with ±1.95 °C (3σ) Inaccuracy in 32nm SOI CMOS
An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays
Efficient partitioning technique on multiple cores based on optimal scheduling and mapping algorithm
Roundoff Noise Analysis of State-Space Digital Filters Implemented on Floating-Point Digital Signal Processors
A scalable DCO design for portable ADPLL designs
The template optimization of discrete time CNN for image compression and reconstruction
Multi-Stage MCTF Coding Efficiency Analysis with Directed-Tree Model
Accelerating 3D Printing Process Using an Extended Ant Colony Optimization Algorithm
Fingerprint recognition using wavelet features
A high temperature wideband low noise amplifier for downhole applications
Low-power multiplier with static decision for input manipulation
Spectrum management of pulse transmission by high-cut filter line
A reliable true random number generator based on novel chaotic ring oscillator
Modeling a new RTL semantics in C++
Robust semi-regular mesh representation of 3D dynamic objects
Robust design of hybrid filter bank A/D converters using second order cone programming
A wirelessly monitoring system design for Total Hip Replacement surgery
A CycleGAN Accelerator for Unsupervised Learning on Mobile Devices
High-gain and high-bandwidth rail-to-rail operational amplifier with slew rate boost circuit
Parametric model order reduction technique for design optimization
A robot swarm as a cellular multicore processor
GlobalDepth: Global-Aware Attention Model for Unsupervised Monocular Depth Estimation
CORDIC Framework for Quaternion-based Joint Angle Computation to Classify Arm Movements
SWANN - A Program for Analysis of Switched Analog Nonlinear Networks
Frame adaptive ROI for photoplethysmography signal extraction from fingertip video captured by smartphone
A Wide-Range Capacitance-to-Frequency Readout Circuit using Pulse-Width Detection and Delay-Line-Based Feedback Control Loop
An Energy-Autonomous and Battery-Free Resistive Sensor using a Time-Domain to Digital Conversion with Bluetooth Low Energy connectivity
High-voltage drive and I/O interfaces in a 0.35µm CMOS process
Cross-layer design for QoS wireless communications
Extract LUT Logics from a Downloaded Bitstream Data in FPGA
Unequal error protection for MIMO systems with a hybrid structure
Macroblock-Based Adaptive In-Scale Prediction for Scalable Video Coding
Matrix inverse-free algorithms for the general eigenvalue problem
Attention-Based Bidirectional LSTM-CNN Model for Remaining Useful Life Estimation
Low-complexity content-adaptive Lagrange multiplier decision for SSIM-based RD-optimized video coding
Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis
A novel technique to measure data retention voltage of large SRAM arrays
Block-wise adaptive modulation for OFDM WLAN systems
Optimized Hardware Architecture for Respiration Rate Classification using Quadratic SVM and mmWave Radar Sensor
A new cryptographic system and its VLSI implementation
Passive complex bandpass filter using lossy and loose coupling transformers
A cost-effective reconfigurable accelerator for platform-based SOC design
Digital Inverse Timing Generator with Wide Dynamic Range
A Trusted Inference Mechanism for Edge Computing Based on Post-Quantum Encryption
Improved solar PV cell Matlab simulation model and comparison
An Efficient Convolution Core Architecture for Privacy-Preserving Deep Learning
A wide-band digitally controlled ring oscillator
Neuronal ion-channel dynamics in silicon
Design of modular field programmable analog array hardware for analysis of large power systems
Experiences scaffolding a computer engineering project course to improve student outcomes
On spectral factorization in two-dimensions
Chopper-stabilized Sigma-delta Modulator
Reducing Signal Swing Overheads to Only 8% in Background 3 rd -Order Inter-Stage Gain Error Calibration for Pipeline ADCs
Weak-MAC: Arithmetic Relaxation for Dynamic Energy-Accuracy Scaling in ConvNets
Collaborative Decoder-side Motion Vector Refinement for Video Coding
An Ultrasonically Powered Optogenetic Microstimulators with Power-Efficient Active Rectifier and Charge Reuse Capability
Analysis of propagation delay in 3 - D stacked DRAM
Interaction among voltage controlling devices and voltage control effect identification
An MCML four-bit ripple-carry adder design in 1 GHz range
Chaotic oscillator configuration using a frequency dependent negative resistor
Self-tuned regenerative amplification and the hopf bifurcation
Perceptual rate distortion optimization for block mode selection in hybrid video coding
Hierarchical extraction of a spanning planar subgraph maintaining clockwise directedness of cycles
A simple and cost effective video encoder with memory-reducing CAVLC
Robust Logistic Principal Component Regression for classification of data in presence of outliers
Innovative power gating for leakage reduction
Segmented sine wave digital-to-analog converters for frequency synthesizer
On discretizing linear passive controllers
A Novel Transfer Learning-Based Approach for Screening Pre-Existing Heart Diseases Using Synchronized ECG Signals and Heart Sounds
Design and optimization of a CMOS front-end for magnetoresistive sensor based biomolecular recognition detection
Pulse shaping with bireciprocal wave digital lattice filters
Optimizing an Analog Neuron Circuit Design for Nonlinear Function Approximation
A New Design of All-pass IIR Filters based Two-channel Quadrature Mirror Filter Bank
A new formulation of fast diminished-one multioperand modulo 2 n /+1 adder
Energy-efficient adaptive signal decomposition: the silicon and biological cochlea
A Multi-hysteresis VCCS and its Application to Multi-scroll Chaotic Oscillators
A mixed analog-digital hybrid for speech enhancement purposes
Floating-gate devices: they are not just for digital memories any more
An Energy-Scalable Margin Propagation-Based Analog VLSI Support Vector Machine
A Low-voltage CMOS Op Amp with a Rail-to-rail Constant-g m Input Stage and a Class AB Rail-to-rail Output Stage
A Gb/s one-fourth-rate CMOS CDR circuit without external reference clock
Aging Aware Retraining for Memristor-based Neuromorphic Computing
A novel stereovision algorithm for obstacles detection based on U-V-disparity approach
A forward body bias generator for digital CMOS circuits with supply voltage scaling
Direct Fabrication and Performance Evaluation of InGaZnO Thin-Film Electronics on a Flexible Polyurethane Substrate
Single Channel Blind Source Separation Using Dual Extended Kalman Filter
A vibration-powered Bluetooth wireless sensor node with running PFC power conditioning
CMOS current-mode PWL implementation using MAX and MIN operators
Towards Task-aware Signal Compression for Efficient Continuous Health Monitoring
A Spatial Calibrated and Colour Corrected Light Field Outdoor Video Dataset from a $5 \times 5$ Dense Camera Array
Realization of a CNN Universal Chip in CMOS Technolgy
ASIC Implementation of a Pre-Trained Neural Network for ECG Feature Extraction
Fine-grain DVFS and AVFS techniques for complex SoC design: An overview of architectural solutions through technology nodes
A New Set of Complementary Subband Filters with Sharp Band Characteristics
Equivalent rise time for resonance in power/ground noise estimation
Galileo L1 Civil Receiver Tracking Loops' Architecture
Oscillation monitoring from ambient PMU measurements by Frequency Domain Decomposition
A Configurable CMOS Multiplier/Divider for Analog VLSI
Numeric Data Augmentation using Structural Constraint Wasserstein Generative Adversarial Networks
M-channel lifting structure for unimodular filter bank
An efficient model for performance analysis of asynchronous pipeline design methods
Smoothing rate control for multiple video streams using game theory
An efficient architecture for real-time content-based arithmetic coding
Improved parameter estimation of linear systems with noisy data
A read-out strategy and circuit design for high frequency MEMS resonators
Modeling and parameter extraction technique for high-voltage MOS device
An electrically adjustable distributed pulse shaping filter for 40 Gbit/s optical links
A CMOS Bio-Chip combining pH Sensing, Temperature Regulation and Electric Field Generation for DNA Detection and Manipulation
A Novel Memory Architecture to Achieve Minimal Rounding/Truncation Errors for N Dimensional Image Transformation
SC biquad filter with hybrid utilization of OpAmp and comparator-based circuit
Partial LUT size analysis in distributed arithmetic FIR Filters on FPGAs
A Gain Boosted N-Path Filter with Improved Out of Band Rejection
Live demonstration: Smartwatch implementation of an advanced insulin bolus calculator for diabetes
An Efficient Prony's Method for Time-varying Power System Harmonic Estimation
A 6-bit 2.5GSample/s Flash ADC using Immanent C2MOS Comparator in 0.18um CMOS
Cross-Regulation-Suppression control scheme for CCM Single-Inductor-Dual-Output buck converter with ordered-power-distributive control
Application of Fast DC Analysis to Partitioning Hypergraphs
Perceptual multiview video coding using synthesized Just Noticeable Distortion maps
Ultra low power RF section of a passive microwave RFID transponder in 0.35µm BiCMOS
A forward step for adaptive synchronization in directed complex networks
On synthesis of pulse-transforming linear networks
Hardware efficient fast parallel FIR filter structures based on iterated short convolution
A Pseudo-random Number Generator for Multi-Sequence Generation with Programmable Statistics
Experimental Results of an Analog Current-Mode ART1 Chip
Autowaves in single layer CNNs
Real-Time Road Segmentation Using LiDAR Data Processing on an FPGA
A novel CMOS current mode fully differential tanh (x) implementation
Novel systolic array architecture for the decorrelator using conjugate gradient for least squares algorithm
Fast mode decision for spatial scalable video coding
Real-Time Implementation Concerns for Lossless Waveform Compression
Minimizing Energy of DNN Training with Adaptive Bit-Width and Voltage Scaling
Analysis and optimization of CMOS LNA noise performance with channel resistance
Improved design criteria of gain-boosted CMOS OTA with high speed optimizations
Low-power Q-enhancement for parallel LC tanks
Effects of image smoothing on the reliability of motion estimation
A simplified algorithm of JPEG2000 rate control for VLSI implementation
An Accurate Digital Inductor Current Sensor for Current-Ripple-Based DC-DC Converters
Generated Compressed Domain Images to the Rescue: Cross Distillation from Compressed Domain to Pixel Domain
Exact Synthesis of Boolean Functions in Majority-of-Five Forms
Constrained Kalman filter for improving Kinect based measurements
Cost effective high voltage driver for large channel count optical MEMS switch applications
A Current-Mode DTCNN Universal Chip
Energy-Adaptive Lightweight Hardware Security Module using Partial Dynamic Reconfiguration for Energy Limited Internet of Things Applications
Energy Efficiency Enhancement Of Parallelized Implementation of NIST Lightweight Cryptography Standardization Finalists
A RF map-based localization algorithm for indoor environments
A 65MHZ switching rate, two-stage interleaved synchronous buck converter with fully integrated output filter
Exploring Error Correction Circuits on RISC-V based Systems for Space Applications
A Simple Neural Learning Algorithm for Total Least-Squares Adaptive Filtering
Nonlinear image reconstruction in block-based compressive imaging
A new network-based algorithm for multi-camera abnormal activity detection
Sub-10nm Standard Cell Library Design Methodology for On-Grid Pin Accesses
Grouped multiuser diversity in multiuser MIMO systems exploiting spatial multiplexing
Switching activity estimation for shift-and-add based constant multipliers
Close-proximity, real-time thermoacoustic sensors: Design, characterization, and testing
Spike-based VITE control with dynamic vision sensor applied to an arm robot
GALS Based Shared Test Architecture for Embedded Memories
High-linear class AB transconductor for high-frequency applications
Dynamically Reconfigurable Approximate Multiplier for Precision Control
Joint compensation of IQ-imbalance and carrier phase synchronization errors in communication receivers
Reducing computations in MPEG2 video decoder
A programmable multi-GNSS baseband receiver
A Novel Tunable UWB Pulse Design for Narrowband Interference Suppression Implemented in BiCMOS Technology
A Semiparallel Full-Adder in IMPLY Logic
A Process Scalable Architecture for Low Noise Figure Sub-Sampling Mixer-First RF Front-End
Focal plane image segmentation using locally interconnected spiking pixel architecture
High frame rate screen video coding for screen sharing applications
A pipeline architecture for traffic sign classification on an FPGA
A low power single ended input differential output low noise amplifier for L1/L2 band
A Class of Zero Wasted Area Floorplan for VLSI Design
Calibration and matching of floating gate devices