yusuke1997/dblp-id-title huggingface dataset:
Column-wise ROIC design with on-chip calibration for photoresistive image sensor
Ultra-wideband impulse radio based on pulse compression technique
New analytical approach to evaluate harmonic distortion in nonlinear feedback amplifiers
A switching noise vision of the optimization techniques for low-power synthesis
Design optimization of staggered amplifier for wide-band applications
Design-space exploration of ultra-low power CMOS logic gates in a 28 nm FD-SOI technology
Code compression for ARM7 embedded systems
A novel technique for studying chaos using an electronic circuit based on op-amps
Parameter properties of electronic and biological circuits and systems
A low power analog RAM implementation for in-probe beamforming in ultrasound imaging
Time-division chopper amplifier suitable for acquisition of plural biological signals
Feasibility study of codebook generation applying complex systems
Impact of guard ring layout on the stacked low-voltage PMOS for high-voltage ESD protection
Analysis of periodic solutions of discretized single input sliding mode control systems
High performance DT-CNN camera device design on ACTEL IGLOO low power FPGA
Nonlinearities: Your worst enemies...? ... Your best friends!
Single and two-stage OTAs for high-speed CMOS pipelined ADCs
Study of nonlinear dynamics of LDPC decoders
Prediction of Coulomb blockade in arbitrary environments
Motion correction of thermographic images in neurosurgery
Spatial Context Tree Weighting for Physical Unclonable Functions
Ultra low voltage and high speed CMOS carry generate circuits
Efficient construction and implementation of short LDPC codes for wireless sensor networks
Memristor-based linear feedback shift register based on material implication logic
A study on power consumption of modified noise-shaper architectures for ΣΔ DACs
Dual-Band Single-Layered Modified E-shaped Patch Antenna for RF Energy Harvesting Systems
Exploration of tradeoffs in the design of integer cosine transforms for image compression
Absolute stability of 2nd order discrete-time single variable lur'e systems
Architecture for model-based UHF RFID system design verification
Implementation of Fractional-order Model of Nickel-Cadmium Cell using Current Feedback Operational Amplifiers
Design of bio-inspired network models for spatio-temporal pattern identification
Design trade-offs in ultra-low-power CMOS and STSCL digital systems
Low power secure CSSAL bit-parallel multiplier over GF(2 4 ) in 0.18μm CMOS technology
18th European Conference on Circuit Theory and Design, ECCTD 2007, Seville, Spain, August 26-30, 2007
A novel dual-loop multi-phase frequency synthesizer
Analysis of a charge redistribution SAR ADC with partially thermometer coded DAC
Regional image correspondence matching method for SIMD processing
Highly-accurate propagation delay analytical model of an RC-circuit with a ramp input
On the Performance Improvement of OTA in Sub-Threshold Region with Dual Supply
On the multistage design of optimal-NTF ΔΣ modulators - The case of fractional synthesizers
Low-sensitivity design and implementation of allpass based fractional delay digital filters
Instruction Extension of an Open Source RV32IMC Core for NTRU Cryptosystem
Accurate design of a MOS-based resistive network for time-controlled diffusion filtering
On practical aspects of optimal FSD filter design using extracted window method
Memristor circuit investigation through a new tutorial toolbox
Real time vision by FPGA implemented CNNs
Clocked semi-floating-gate ultra low-voltage current multiplier
A mixed-mode conditioning circuit designed for adaptive smart sensing
Functional chaining mechanism allowing definable models of electronic devices
A new linear readout circuit for a CMOS image sensor
High-speed explicit nonlinear model predictive control
On-chip spectral test for high-speed ADCs by ΣΔ technique
A VLSI implementation of logarithmic and exponential functions using a novel parabolic synthesis methodology compared to the CORDIC algorithm
A low voltage, high speed current mode sample and hold for high precision applications
Per-pixel integration time controlled image sensor
Improvement of watermark detection process based on Bayesian estimation
EDA for RF and analog front-ends in the 4G era: Challenges and solutions
Nonlinear effects of RF interference in SC circuits
A configurable IC to contol, readout, and calibrate an array of biosensors
A 70dB SFDR CMOS transconductor
A single chip solution for text-to-speech synthesis
A new approach to analysis and simulation of single and coupled low-loss interconnects
Complex behavior in memristor circuits based on static nonlinear two-ports and dynamic bipole
Background removal in dental panoramic X-ray images by the A-Trous multiresolution transform
Very high-speed carry computation based on mixed dynamic/transmission-gate Full Adders
A CMOS front end for a laser rangefinder with resonance-based timing discrimination
Hardware property checker for run-time Hardware Trojan detection
A path towards average-case silicon via asynchronous resilient bundled-data design
Frequency control schemes for single-ended ring oscillators
Current-steering D/A converter based on triple tail cell
Reliability schemes for nano-communications
Input common-mode voltage behaviour of CMOS bulk-driven differential stages
High frequency chaos oscillators with applications
Computation of positive stable realizations for linear continuous-time systems
Offset elimination in ΣΔ analog to digital converters by ƒs/2 modulation
Compact low-voltage rail-to-rail bulk-driven CMOS opamp for scaled technologies
Optimized cellular neural network universal machine emulation on FPGA
Finding spanning trees and Hamiltonian circuits in an un-oriented graph an algebraic approach
A lightweight digital system for the probabilistic characterization of true random bit generators
A Matlab tool for analysis of switch-mode power supplies
Reflectance data model with mixed lumped and distributed elements for wireless communication systems
Design of a 1.8V 8-bit 500MSPS folding-interpolation CMOS A/D converter with a folder averaging technique
SOI pixel detector based on CMOS time-compression charge-injection
Bluetooth Baseband power analysis with PKtool
A fully integrated audio amplifier in flexible a-IGZO TFT technology for printed piezoelectric loudspeakers
Limit cycles in Digital Bang-Bang PLLs
Figures of merit for class AB input stages
Reliability of polynomial I DS -V GS -V DS model fitted using harmonic-balance simulation
Measurement-based equivalent circuit model for ferrite beads
Improved fast encoding method of vector quantization based on dynamic element reordering for codewords
Design strategies for integrated high voltage charge pumps
Impact of NMOS/PMOS imbalance in Ultra-Low Voltage CMOS standard cells
A CNN for biomedical image processing
Development of a fast readout chip in deep submicron technology for pixel hybrid detectors
Applications of Programmable Microwave Function Array (PROMFA)
Design of digital all-pass filters with equal-ripple group delay frequency response
Low-voltage low-power 200MHz variable gain amplifier in CMOS 0.35μm
Analysis of an adaptive algorithm for feedback cancellation in hearing aids for sinusoidal signals
Optimization of AIQ representations for low complexity wavelet transforms
Combined simplex-trust-region optimization algorithm for automated IC design
Low cost error recovery in Delay-Intolerant Wireless Sensor Networks
Lyapunov exponent of EEG signal for epileptic seizure characterization
FPGA-implementation of a holographic pattern-matching algorithm
A large signal non quasi static model of printed organic TFTs and simulation of CMOS circuits
NERO mastering 300k CNN cells
A Low-Power Wide Supply Range Delay-Line Based IC for Amperometric Measurement
Miniaturized electrochemical cells for sensing applications: Silicon device containing three planar microelectrodes for electrochemical sensing
An area and power efficient discrete-time chaos generator circuit
A Front Line algorithm for error estimation in data sets with nonuniform sampling distribution
Implementation of an asynchronous cellular logic network as a co-processor for a general-purpose massively parallel array
Sliding mode control of a high voltage DC-DC buck converter
Utilization of distortion contribution analysis
Finding all solutions of piecewise-linear resistive circuits using integer programming
Very Low Voltage CMOS Two-stage Amplifier
Area-optimized sub-fF offset trimming circuit for capacitive MEMS interfaces
Harmonic balance, Melnikov method and nonlinear oscillators under resonant perturbation
A high-speed swing reduced driver suitable for current-steering digital-to-analog converters
Comparison between chua-yang and hyperbolic CNNs
Double-gate FinFET process variation aware 10T SRAM cell topology design and analysis
Single Miller capacitor frequency compensation with nulling resistor for three-stage amplifiers
Ultra low-power MEMS-based radio for wireless sensor networks
3-D spatio-temporal Gabor-type filter implementations with Time-Derivative Cellular Neural Networks
Low voltage LC-ladder Gm-C low-pass filters with 42-215 MHz tunable range
Design and analysis of a low-power highly linear mixer
Visual homing: Experimental results on an autonomous robot
Sub-band adaptive filtering for acoustic echo cancellation
A 65 nm standard cell library for ultra low-power applications
Behavioral models of basic mixed-mode circuits: practical issues and application
CMOS latch based on a class-AB transconductor
Design of low-noise switched-capacitor low-pass filters with adaptive configuration
Design of new CMOS current mode min and max circuits for FLC chip applications
Density related operational limit in the limiter phase of Wendelstein 7-X
Designing two-channel nonuniform-division FIR filter banks with variable notches
PWL approximation of the Hindmarsh-Rose neuron model in view of its circuit implementation
On-chip high-Q bandpass filtering using N-phase current driven passive mixers
Does shear stress change the way in which Au nanoparticles affect endothelial cell viability?
Online AMS frontend reconfiguration for sensor network applications
Observation of spontaneous bursting spike patterns in simple three memristor circuits
A 6-bit bias-less pipelined ADC with open-loop amplifiers
A plasma discharge fast control system for large fusion reactors
A study on the best wavelet filter bank problem in the wavelet-based image watermarking
Recognition of isolated words corrupted by impulsive noise
A new high speed, low power adder; using hybrid analog-digital circuits
CMOS circuit implementation of a coupled phase oscillator system using pulse modulation approach
Some more robustness conditions for the invariant density of a class of 1D maps under additive noise
Improved Noise Wave Model of Microwave FETs based on Artificial Neural Networks
Surfing front-end architectures for ultrasound imaging systems
Generalized indirect S-parameter measurement method of n-ports circuit using T-parameter of (m, n)-ports fixture
An automatic tool to design CNN-UM programs
A nonuniform quantizer for hardware implementation of neural networks
Sequential clustering by loopy belief propagation
An improved, very long time-constant CMOS integrator for use in implantable neuroprosthetic devices
One-dimensional discrete-time dynamical systems circuit using floating-gate MOS peaking current sink/source
Design of current-mode class 1 frequency-agile filter employing CDTAs
Hall-effect circuits and architectures for non-volatile system design
Image filtering by reduced kernels exploiting kernel structure and focal-plane averaging
Beamforming system for 3G and 4G wireless LAN applications
Optimized frequency compensation topology for low-power three-stage OTAs
On chip implementation of a pixel-parallel approach for retinal vessel tree extraction
Comments on the effectiveness of the Szabo and Kolumban solution to false lock in sampling PLL frequency synthesizer
The synthesis of noise transfer functions for bandpass delta-sigma modulators with tunable center frequency
A simple variable λ resistive network implementation
A 1.8 MHz MEMS-based oscillator with synchronous amplitude limiter
Banknote recognition for visually impaired
On the Integration of Physically Unclonable Functions into ARM TrustZone Security Technology
Bifurcation in mutually coupled three neurons with inhibitory synapses
An automatic layout method for timing pulse generator of small LCD driver
Design of a bioimpedance measurement system using direct carrier compensation
Impact of non-idealities on passive polyphase filter performance
A low power capacitance to pulse width converter for integrated sensors
Analysis of local activity in reaction-diffusion networks: EEG signals in epilepsy
Dynamic translinear nonlinear energy operator
Production test of an RF receiver chain based on ATM combining RF BIST and machine learning algorithm
Efficient Implementation of Memristor Cellular Nonlinear Networks using Stochastic Computing
On the bifurcation properties of a class of differentiable mappings
A readout system for inductive position sensors
Space-dependent binary image processing within a 64x64 mixed-mode array processor
19th European Conference on Circuit Theory and Design, ECCTD 2009, Antalya, Turkey, August 23-27, 2009
Classification of parallel DC/DC converters part II: Comparisons and experimental verifications
Towards a hardware realization of time-frequency source separation of speech
A design approach for networks of Self-Sampled All-Digital Phase-Locked Loops
Analysis to optimize sensitivity of RF energy harvester with voltage boost circuit
Heteroclinic bifurcation in memristor oscillators
Bifurcation analysis in a hybrid time delay system
Memristive CNN for trajectory recognition
Steady-state visually evoked EEG signal processing with tuneable continuous-time bandpass sigma-delta modulators
Complex adaptive notch filters for frequency estimation of three-phase power systems
Simplified workfunction predistorter noise analysis
An MDAC architecture with low sensitivity to finite opamp gain
Single electron transistor based chua type chaotic circuit: A SPICE assisted proof
Locally adaptive image sensing with the 64x64 cell MIPA4k mixed-mode image processor array
Clustering algorithms for circuit partitioning and placement problems
Model order reduction by state vector selection (SVS) approach
Transfer characteristics and bandwidth limitation in a linear-drift memristor model
Determination of edge of chaos in hysteresis CNN model with memristor synapses
The Devil's Staircase as a method of comparing injection-locked frequency divider topologies
Symbolic hybrid analysis of nonlinear analog circuits
The spatial Cauchy problem for a dissipative infinite quantum waveguide supporting a single propagating mode
Design of sparse lowpass differentiator using iterative hard thresholding method
Chaos-based high-EMC spread-spectrum clock generator
Krylov-subspace based model order reduction for field-circuit coupled systems
Automated diagnostic system using graph clustering algorithm and fuzzy logic method
Analyses of motion and acceleration sensors using printed spiral inductors by a simulator and actual circuit experiments
Novel Baseband Analog Beamforming through Resistive DACs and Sigma Delta Modulators
A 0.037mm 2 1GSps 12b self-calibrated 40nm CMOS DAC cell with SFDR>60dB up to 200MHz and IM3 < - 60dB up to 350MHz
Statistical analysis of CMOS current reference
A neuromorphic approach to auditory pattern recognition in cricket phonotaxis
Class-AB current conveyors based on the FVF
Practical limitations to the implementation of resistive grid filtering in Cellular Neural Networks
LDO compensation strategy based on current buffer/amplifiers
3D multi-layer vision architecture for surveillance and reconnaissance applications
Compact tone-behavior model for Delta-Sigma modulators
Variational computing based images denoising methods by using cellular neural networks
Insect inspired spatial-temporal cellular processing for feature-action learning
High Speed Galois Fields GF(2 m ) Multipliers
A low-voltage class-AB linear transconductance based on floating-gate MOS technology
Pixel interlacing to trade off the resolution of a cellular processor array against more registers
Layout-aware Pareto fronts of electronic circuits
A performance comparison study of programmable platforms: FPAA and FPGA implementation of COOK communication system
Modelling supercapacitors leakage behaviour using a fractional-order model
An intraoperative imaging system for neurosurgical thermography
A BIST scheme for operational amplifier by checking the stable output of transient response
Sensitivity of monomolecular reaction networks: Signed flux-response to reaction rate perturbations
Floating voltage-controlled current sources for electrical impedance tomography
New carrier generation techniques and their influence on bit energy in UWB radio
Methodology for mismatch reduction in time-interleaved ADCs
SEMBA: A SEM based acquisition technique for fast invasive Hardware Trojan detection
Hardware efficient fixed-point VLSI architecture for 2D Kurtotic FastICA
Strategies for finding a bandwidth-optimal topology for impedance matching
About quantization of audio signals for wildlife intruder detection systems
Design of a low-power quadrature LC-VCO in 65 nm CMOS
Analog CMOS processor for early vision processing with highly reduced power consumption
SI-biquad based on direct-form digital filters
Reliable and efficient phase noise simulation of mixed-mode integer-N Phase-Locked Loops
Implementation of a visible watermarking in a secure still digital camera using VLSI design
Optimised Montgomery domain inversion on FPGA
A compact low-voltage first-order temperature-compensated CMOS current reference
Current-mode SITO filter using a single active component
An 8-b cascaded folding A/D converter with a new fully differential source follower
A chaotic time-delay system based digital RNG and integrated autonomous test suite
An efficient FPGA implementation of a DT-CNN for small image gray-scale pre-processing
Focused calibration for advanced RF test with embedded RF detectors
OTA-C realization of PI λ brake and throttle controllers for autonomous vehicles
Analysis and experimental verification of a fractional-order Hartley oscillator
New applications and technology scaling driving next generation A/D converters
An efficient inverse ANN modeling approach using prior knowledge input with difference method
Numerical investigation of energy dissipation in Quantum Cellular Automaton circuits
Oscillators - A simple introduction
Novel topologies of cascade ΣΔ modulators for low-voltage wideband applications
Super class AB transconductor with slew-rate enhancement using QFG MOS techniques
A new CMOS exponential circuit with extended linear output range
A parallelized distance transformation architecture for FPGAs
Using ADZT for a signal reconstruction
A single package transceiver for quad band EGPRS (GSM/GPRS/EDGE) class 12 applications
A thermal management system for lithium-ion battery in mobile systems
On the generation of pseudo-random sequences exploiting digitized chaotic systems
Constrained ICA for functional magnetic resonance imaging
Piecewise-polynomial modeling for analog circuit performance metrics
Using Taylor predictor to improve stabilization of steady state in third-order chaotic system
Lossless video coding using bi-directional 3D prediction optimized for each frame
Higher order dynamic element matching by shortened tree-structure in delta-sigma modulators
Optimization procedure of class E amplifiers using SPICE
Stability analysis of complete two-stage power-factor-correction power supplies
On the steady state behaviour of an n th -order class of nonlinear mappings
A tunable multi-band CMOS LNA for mobile WiMAX
Design of efficient CMOS rectifiers for integrated piezo-MEMS energy-harvesting power management systems
Kuramoto-like model of noisy oscillators
Novel method of sensitivity evaluation in hybrid circuits with nonuniform distributed parts
Design tradeoffs in N-path GmC integrators for direct delta-sigma receivers
Forced chaos generator with switched CMOS active inductance
A digital cellular-based system for retinal vessel-tree extraction
A novel CMOS temperature control system for resistive gas sensor arrays
LMS-based calibration of pipelined ADCs including linear and nonlinear errors
A new algorithm for high speed speech and audio coding
Frequency/time block preconditioners for harmonic balance jacobians
A new current-mode square-root-domain notch filter
Role of glycocalyx in attenuation of shear stress on endothelial cells: From in vivo experiments to microfluidic circuits
Lossless image coding by cellular neural networks with minimum coding rate learning
Cascaded lossless commensurate line synthesis
An evolutionary optimization kernel using a dynamic GA-SVM model applied to analog IC design
Overview of instrumentation and control in the neutral beam test facility
Nonlinearities in frequency dividers
Compact MOS-RC voltage-mode fractional-order oscillator design
Effective (Spur-Free) dithering of digital delta-sigma modulators with pseudorandom dither
A construction method of optimum integer-to-integer transform based on an error propagation model
Stabilization of coupled reaction-diffusion CNN
Loop filter design and optimization for quadrature delta-sigma converters
CNN-UM based transversely isotropic elastic wave propagation simulation
New wave profiles in viscoelastic burgers' RTD-based cellular neural networks model
Particle filter applied to polynomial chaotic maps
Delay estimation and measurement circuit for a high-speed CMOS clocked comparator
Crosstalk reduction in printed circuit boards using irregularly-spaced vias in a guard trace over a slotted ground plane
A high voltage current sense amplifier with extended input common mode range based on a low voltage operational amplifier cell
Design of a sub-1-V nanopower CMOS current reference
2017 European Conference on Circuit Theory and Design, ECCTD 2017, Catania, Italy, September 4-6, 2017
Low error bit width reduction for structural adders of FIR filters
Chaotic motion generation with applications to liquid mixing
On the variable step size gear integration method: Sudden time step variations induce inaccuracy
A method for compensating the D/A converter frequency response distortion in OFDM system
Bandwidth-to-area comparison of through silicon vias and inductive links for 3-D ICs
A novel and systematic implementation of thermometer-coded current-mode DAC
From fan-out wafer to fan-out panel level packaging
A compact sub-1V class AB operational amplifier for low-voltage switched-capacitor circuits
A novel design optimization framework for regulated cascode transimpedance amplifiers
Contact-based fault injections and power analysis on RFID tags
A consideration on the condition number of extremely ill-conditioned matrices
Highly reliable harmony search algorithm
Clocking and WTA design of a continuous time Hopfield net with parasitic capacitances
Power-efficient dynamic-biased CCII
A reconfigurable CMOS VCO with an automatic amplitude controller for multi-band RF front-ends
Circuit models for small signal performance of nanodevices based on two-state quantum systems
Systematic synthesis of operational amplifier circuits by admittance matrix expansion
Feedthrough cancellation in a class E amplified polar transmitter
New highly-accurate CMOS source-degenerated based V-I converter with positive feedback
On-line estimation of the integral non-linear errors in analogue-to-digital converters without histogram evaluation
Architectural mitigation for high performance energy measurement
A seamless representation for coupling transistor sizing with nanometric CMOS layout generation
Using high pass sigma-delta modulation for Class-S power amplifiers
Efficient global sensitivity analysis method for models of systems with functional outputs
A high-throughput spur-free hybrid nested bus-splitting/HK-MASH digital delta-sigma modulator
The Argo NOC: Combining TDM and GALS
Second-order OTA-C filters using a single OTA
Improving POF Quality in Multi Objective Optimization of Analog ICs via Deep Learning