yusuke1997/dblp-id-title huggingface dataset:
Some Transmission Time Analysis for the Parallel Asynchronous Communication Scheme
Efficient Algorithmic Circuit Verification Using Indexed BDDs
Synthesis for Testability by Sequential Redundancy Removal Using Retiming
A Divide-And-Conquer Approach to Test Generation for Large Synchronous Sequential Circuits
On Concurrent Error Detection, Location, and Correction of FFT Networks
Fault Identification Algorithmic: A New Formal Approach
Digest of Papers: FTCS-22, The Twenty-Second Annual International Symposium on Fault-Tolerant Computing, Boston, Massachusetts, USA, July 8-10, 1992
Systematic Incorporation of Efficient Fault Tolerance in Systems of Cooperating Parallel Programs
Performability of a token bus network under transient fault conditions
A Proposal for Error-Tolerating Codes
A fast timing verification method based on the independence of units
CATCH-compiler-assisted techniques for checkpointing
Scheduling Message Processing for Reducing Rollback Propagation
Experimental Evaluation of the Fail-Silent Behaviour in Programs with Consistency Checks
Advanced automatic test pattern generation techniques for path delay faults
On the Design of Constant Weight Codes for VLSI Systems
Incremental Messages: Micro-Kernel Services for Flexible and Efficient Management of Replicated Data
Durable Memory RS/6000 System Design
Distributed Reconfiguration and Recovery in the Advanced Architecture On-Board Processor
Algorithm Based Fault Tolerance versus Result-Checking for Matrix Computations
Reliability analysis of non repairable systems using stochastic Petri nets
Optimal Self-Recovering Microarchitecture Synthesis
Design and Synthesis for Testability of Synchronous Sequential Circuits Based on Strong-Connectivity
A theoretical investigation of generalized voters for redundant systems
Fault Tolerance Experiments of the "Hiten" Onboard Space Computer
Hardware-Efficient and Highly-Reconfigurable 4- and 2-Track: Fault-Tolerant Designs for Mesh-Connected Multicomputers
A Survivable Avionics System for Space Applications
CHAOS art : support for real-time atomic transactions
Unidirectional Error Control Codes
Application Transparent Fault Management in Fault Tolerant Match
GEMINI-a logic system for fault diagnosis based on set functions
A Recoverable Distributed Shared Memory Integrating Coherence and Recoverability
Checkpoint/Rollback in a Distributed System Using Coarse-Grained Dataflow
Comparison of Hybrid Modular Redundant Multiprocessor Systems with respect to Performabilitites
A Synthesis Tool for Fault-Tolerant Finite State Machines
Interval Availability Distribution Computation
Active Replication in Delta-4
On Codeword Testing of Two-Rail and Parity TSC Checkers
A Study of Throughput Degradation Following Single Node Failure in a Data Sharing System
Signature analysers based on additive cellular automata
Architectural Timing Verification and Test for Super Scalar Processors
Defects and reliability analysis of large software systems: field experience
Evaluation of Software Dependability Based on Stability Test Data
Uniformization and Exponential Transformation: Techniques for Fast Simulation of Highly Dependable Non-Markovian Systems
The Delta-4 extra performance architecture (XPA)
A novel concurrent error detection scheme for FFT networks
Multiple Fault Analysis Using a Fault Dropping Technique
Fault-Tolerant Clock Synchronization for Distributed Systems Using Continuous Synchronization Messages
Evaluation of error detection schemes using fault injection by heavy-ion radiation
Using Virtual Links for Reliable Information Retrieval Across Point-to-Point Networks
A generalized theory of fail-safe systems
Modelling the influence of unreliable software in distributed computer systems
Fault Diagnosis Using State Information
Minimum fault coverage in reconfigurable arrays
BALLAST: a methodology for partial scan design
Strong Partitioning Protocol for a Multiprocessor VME System
The design of random-testable sequential circuits
Nonblocking and Orphan-Free Message Logging Protocols
Using certification trails to achieve software fault tolerance
Fault Tolerant Neural Networks in Optimization Problems
Identifying the cause of detected errors
An implementation and analysis of a concurrent built-in self-test technique
Fault-Injection-Based Testing of Fault-Tolerant Algorithms in Message-Passing Parallel Computers
Randomized Distributed Agreement Revisited
Towards Totally Self-Checking Delay-Insensitive Systems
Unordered Error-Correcting Codes and their Applications
Dependability Assessment of a Computerized Nuclear Protection System
Wear-Out Simulation Environment for VLSI Designs
Evaluation of Checkpoint Mechanisms for Massively Parallel Machines
Designing Concurrent Checking Sorting Networks
Time-Triggered Architecture for Safety-Related Distributed Real-Time Systems in Transportation Systems
Some new EC/AUED codes
Single b -Bit Byte Error Correcting and Double Bit Error Detecting Codes for High-Speed Memory Systems
General linear codes for fault-tolerant matrix operations on processor arrays
Modeling and Analysis of System Dependability Using the System Availability Estimator
Characterizing a Lumping Heuristic for a Markov Network Reliability Model
Cache-aided rollback error recovery (CARER) algorithm for shared-memory multiprocessor systems
The Impact of Fault Expansion on the Interval Estimate for Fault Detection Coverage
Unidirectional 9-bit byte error detecting codes for computer memory systems
A New Diagnosis Approach for Short Faults in Interconnects
Design of Static CMOS Self-Checking Circuits using Built-In Current Sensing
Adaptive Voting for Faulty (VFF) Node Scheme for Distributed Self-Diagnosis
Easily testable PLA-based finite state machines
Proving Correctness of a Controller Algorithm for the RAID Level 5 System
SURF-2: A Program for Dependability Evaluation of Complex Hardware and Software Systems
VLSI Implementation of a Self-Checking Self-Exercising Memory System
Effects of transient gate-level faults on program behavior
A reconvergent fanout analysis for efficient exact fault simulation of combinational circuits
Test Pattern Generation for Path Delay Faults in Synchronous Sequential Circuits Using Multiple Fast Clocks and Multiple Observations Times
A Class of Error Locating Codes for Byte-Organized Memory Systems
Feasibility and Effectiveness of the Algorithm for Overhead Reduction in Analog Checkers
Hierarchical design and analysis of fault-tolerant multiprocessor systems using concurrent error detection
Reliability Modeling of Hard Real-Time Systems
Closure and Convergence: A Formulation of Fault-Tolerant Computing
Synthesis of Multi-Level Combinational Circuits for Complete Robust Path Delay Fault Testability
Fault-Tolerance of Spaceborne Semiconductor Mass Memories
Design of fault-tolerant clocks with realistic failure assumptions
Design and Analysis of Software Reconfiguration Strategies for Hypercube Multicomputers under Multiple Faults
Estimation of maximum currents for fault tolerant design of power distribution systems in integrated circuits
Concurrent Error-Detection and Modular Fault-tolerance in a 32-bit Processing Core for Embedded Space Flight Applications
The UCLA Mirror Processor: A Building Block for Self-Checking Self-Repring Computing Nodes
Experimental Evaluation of Computer-Based Railway Control Systems
Stable Memory in Substation Automation: A Case Study
Programmable Space Compaction for BIST
On Finding an Optimal Combination of Error Detection Mechanisms Based on Results of Fault Injection Experiments
Design of Multiprocessor Systems for Concurrent Error Detection and Fault Diagnosis
Efficient Service of Rediscovered Software Problems
The Design and Architecture of the Microsoft Cluster Service - A Practical Approach to High-Availability and Scalability
Optimal Broadcasting in Faulty Hypercubes
System Level Diagnosis: Combining Detection and Location
Design of Fully Exercised SFS/SCD Logic Networks
Rare Events in Stochastic Dynamical Systems and Failures in Ultra-Reliable Reactive Programs
The Variation of Software Survival Time for Different Operational Input Profiles
Fault-tolerant BIBD networks
Estimates of MTTF and optimal number of spares of fault-tolerant processor arrays
Pattern Sensitive Fault Testing of RAMs with Bullt-in ECC
Specifying Fault Tolerance within Stark's Formalism
The transformation approach to the modeling and evaluation of the reliability and availability growth
From Dependable Computing Systems to Computing for Integrated Dependable Systems? (Panel)
Cache management in a tightly coupled fault tolerant multiprocessor
Efficient Multiple Unidirectional Byte Error-Detecting Codes for Computer Memory Systems
Efficient Failure Recovery in Multi-Disk Multimedia Servers
Optimum Detector/Corrector for Fault-Tolerant Linear Processing
Latent Design Faults in the Development of Multiflow's TRACE/200
TFT: A Software System for Application-Transparent Fault Tolerance
The Redundancy Mechanisms of the Ariane 5 Operational Control Center
Generation of Error Set that Emulates Software Faults Based on Field Data
Toward Accessibility Enhancement of Dependability Modeling Techniques and Tools
Characterization and design of sequentially t-diagnosable systems
The Performance of Two-phase Commit Protocols in the Presence of Site Failures
Redundancy Management Software Services for Seawolf Ship Control System
A unified built-in-test scheme: UBIST
Challenges of Building a Dependable National Information Infrastructure (Panel)
Challenges in Designing Fault-Tolerant Systems
The implementation and application of micro rollback in fault-tolerant VLSI systems
Techniques for building dependable distributed systems: multi-version software testing
Reconfiguration and Transient Recovery in State Machine Architectures
Reliable design of high-speed cache and control store memories
Avoiding the Babbling-Idiot Failure in a Time-Triggered Communication System
Pseudo-exhaustive test and segmentation: formal definitions and extended fault coverage results
Three-valued neural networks for test generation
Relaxing Consistency in Recoverable Distributed Shared Memory
Fault-Tolerant Communications Processing
Incorporating Testability Considerations in High-Level Systhesis
Efficient Memory Access Checking
SACEM: A Fault Tolerant System for Train Speed Control
A system for supporting multi-language versions for software fault tolerance
Design, Implementation, and Evaluation of Highly Available Distributed Call Processing Systems
Interactive Consistency Algorithms based on Voting and Error-correcting Codes
Use of Protocol Validation and Verification Techniques in the Design of a Fault-Tolerant Computer Architecture
PREACHES - Portable Recovery and Checkpointing in Heterogeneous Systems
On the provision of backward error recovery in production programming languages
Verification of a Safety-Critical Railway Interlocking System with Real-Time Constraints
Behavioral Synthesis of Testable Designs
Stopping Rules for the Operational Testing of Safety-Critical Software
Reduced Overhead Logging for Rollback Recovery in Distributed Shared Memory
Optimal Structural Diagnosis of Wiring Networks
Chip Test Optimization Using Defect Clustering Information
Implementing the Swiss Exchange Trading System
Development of a Benchmark to Measure System Robustness
A Fault-Tolerant Algorithm for Decentralized On-line Quorum Adaptation
Self-Checking and Fail-Safe LSIs by Intra-Chip Redundancy
On the Reconfiguration of Memory Arrays Containing Clustered Faults
Algorithm-Based Fault Location and Recovery for Matrix Computations
A probabilistic method for fault diagnosis of multiprocessor systems
Reliability analysis and comparison of two fail-op/fail-op/fail-safe architectures
A Formally Verified Algorithm for Interactive Consistency Under a Hybrid Fault Model
Fault Recovery Mechanism for Multiprocessor Servers
SoRel: A Tool for Reliability Growth Analysis and Prediction From Statistical Failure Data
Fail-softness evaluation in multiple-bus local computer networks
Experimental Assessment of Parallel Systems
FT-NFS: An Efficient Fault-Tolerant NFS Server Designed for Off-the-Shelf Workstations
Fault Tolerance Via N-Modular Software Redundancy
On the Effectiveness of Residue Code Checking for Parallel Two's Complement Multipliers
Multiple Signature Analysis: A Framework for Built-In Self-Diagnostic
Practical Problems in the Design of Fault-Tolerant Hardware
An Approach towards Benchmarking of Fault-Tolerant Commercial Systems
Optimal Recovery Point Insertion for High-Level Synthesis of Recoverable Microarchitectures
Masking asymmetric line faults using semi-distance codes
Digest of Papers: FTCS-28, The Twenty-Eigth Annual International Symposium on Fault-Tolerant Computing, Munich, Germany, June 23-25, 1998
Discriminating Fault Rate and Persistency to Improve Fault Treatment
The DSPNexpress 2.000 Performance and Dependability Modeling Environment
Modeling and Testing a Critical Fault-Tolerant Multi-Process System
Diagnostic reasoning in digital systems
Modeling of fault-tolerant techniques in hierarchical systems
Detection and Discrimination of Injected Network Faults
A dependence graph-based approach to the design of algorithm-based fault tolerant systems
Development of a Fault Tolerant Computer System for the HERMES Space Shuttle
Approaches to Design of Temporary Blackout Handling Capabilities and an Evaluation with a Real-Time Tightly Coupled Network Testbed
Spare Processor Allocation for Fault Tolerance in Torus-Based Multicomputers
An analytical model for computing hypercube availability
Fault-Tolerant Memory Design in the IBM Application System/400
On the performance of software testing using multiple versions
On-line Error Monitoring for Several Data Structures
Experimental Evaluation of the Fail-Silent Behaviour in Computers Without Error Masking
An economical scan design for sequential logic test generation
EXOP (Extended Operation): A New Logical Fault Model for Digital Circuits
Design Decisions for the FTM : A General Purpose Fault Tolerant Machine
Fault-Tolerance Testing in the Advanced Automation System
Burst and Unidirectional Error Detecting Codes
A Columbus' Egg Idea for CAN Media Redundancy
A software based approach to achieving optimal performance for signature control flow checking
Integrating Checkpointing with Transaction Processing
A SEC-BED-DED Code with Byte Plus Bit Error Detection
Optimal Replica Control Protocols Exhibit Symmetric Operation Availabilities
Wafer Testing with Pairwise Comparisons
Gracefully Degradable Disk Arrays
Optimal multiple syndrome probabilistic diagnosis
Dependable onboard computer systems with a new method-stepwise negotiating voting
On the design of robust testable CMOS combinational logic circuits
The Systematic Improvement of Fault Tolerance in the Rio File Cache
Agreeing on who is present and who is absent in a synchronous distributed system
Language constructs for timed atomic commitment
FIAT-fault injection based automated testing environment
Functional Test Generation for Pipelined Computer Implementations
The IBM S/390 Sysplex Timer
A Systematic and Comprehensive Tool for Software Reliability Modeling and Measurement
Impact of Behavioral Learning on the Compilation of Sequential Circuit Tests
Performability-Driven Adaptive Fault Tolerance
Performance and Reliability Evaluation of Passive Replication Schemes in Application Level Fault Tolerance
Partial Scan beyond Cycle Cutting
State Space Generation for Degradable Multiprocessor Systems
Reducing Test Application Time for Full Scan Embedded Cores
Wrapping Windows NT Software for Robustness
Protecting Processing Elements in Communication Satellites
Construction and Analysis of Fault-Secure Multiprocessor Schedules
VERIFY: Evaluation of Reliability Using VHDL-Models with Embedded Fault Descriptions
A Multiple Copy Approach for Delivering Messages Under Deadline Constraints
Approaches for the repair of VLSI/WSI RRAMs by row/column deletion
Portable Checkpointing for Heterogenous Architectures
Probabilistic Diagnosis Algorithms Tailored to System Topology
Experimental Study of Internet Stability and Backbone Failures
The Delta-4 approach to dependability in open distributed computing systems
Concurrent Error Detection and Fault-Tolerance in Linear Digital State Variable Systems
Highly Available Cluster: A Case Study
Replication and Allocation of Task Modules in Distributed Real-Time Systems
Signature Analysis with Modified Linear Feedback Shift Registers (M-LFSRs)
Approaches to implementation of a repairable distributed recovery block scheme
Vision for High-Availability of the Global Infrastructure (Panel)
Distance agreement protocols
The Design Concepts and Operational Results of Fault-tolerant Computer Systems for the Shinkansen Train Control
Algorithmic Synthesis of High Level Tests for Data Path Designs
Managing Dependencies - A Key Problem in Fault-Tolerant Distributed Algorithms
Reliabilities of two fault-tolerant interconnection networks
Branch Recovery with Compiler-Assisted Multiple Instruction Retry
Fault Tolerance in Concurrent Object-Oriented Software Through Coordinated Error Recovery
Scheduling with Rollback Constraints in High-Level Synthesis of Self-Recovering ASICs
Distributed probabilistic fault diagnosis for multiprocessor systems
A strongly fault-secure and strongly code-disjoint realization of combinational circuits
Evaluation of Deterministic Fault Injection for Fault-Tolerant Protocol Testing
Do Commercial MPPs Need Fault Tolerance? (Panel)
Probabilistic Checkpointing
Design Fault Tolerance in Operating Systems Based on a Standarization Project
Volatile logging in n-fault-tolerant distributed systems
A new approach of test confidence estimation
Training Techniques to Obtain Fault-Tolerant Neural Networks
Multiple Fault Diagnosis in Sequential Circuits Using Sensitizing Sequence Pairs
An Adaptive Distributed System-Level Diagnosis Algorithm and Its Implementation
An iterative technique for calculating aliasing probability of linear feedback signature registers
Fault-intolerance of reconfigurable systolic arrays
PODS revisited-a study of software failure behaviour
Group, Majority, and Strict Agreement in Timed Asynchronous Distributed Systems
An efficient multi-dimensional grids reconfiguration algorithm on hypercube
A Cache Protocol for Error Detection and Recovery in Fault-Tolerant Computing Systems
Analysis of workload influence on dependability
Automatic Design of Optimal Concurrent Fault Detector for Linear Analog Systems
A Lightweight Solution to Uniform Atomic Broadcast for Asynchronous Systems
Reliable design of large crosspoint switching networks
LOCSTEP: A Logic Simulation Based Test Generation Procedure
Tolerating Failures in the Bag-of-Tasks Programming Paradigm
F-T in telecommunications networks: state, perspectives, trends
Winckp: A Transparent Checkpointing and Rollback Recovery Tool for Windows NT Applications
Improving System Reliability with Automatic Fault Tree Generation
Systematic Validation of Pipeline Interlock for Superscalar Microarchitectures
Clock synchronization in MAFT
Fast simulation of dependability models with general failure, repair and maintenance processes
The connectivity of hypergraph and the design of fault-tolerant multibus systems
A Case for Fault-Tolerant Memory for Transaction Processing
Fault Injection for the Formal Testing of Fault Tolerance
Exploiting Data Flow Information in Algorithm-Based Fault Tolerance
Digest of Papers: FTCS-27, The Twenty-Seventh Annual International Symposium on Fault-Tolerant Computing, Seattle, Washington, USA, June 24-27, 1997
G4: A Fault-Tolerant CMOS Mainframe
Effects of Resource Utilization Monitoring in Fault Recovery
Modelling correlated transient failures in fault-tolerant systems
Design Process for High-Availability Systems
A large scale second generation experiment in multi-version software: description and early results
Experimental Evaluation of Failure-Detection Schemes in Real-time Communication Networks
Hardware assisted recovery from transient errors in redundant processing systems
Renegotiable Quality of Service - A New Scheme for Fault Tolerance in Wireless Networks
Testing with Correlated Test Vectors
Early Delivery Totally Ordered Multicast in Asynchronous Environments
Concurrent Error Detection in Self-Timed VLSI
Optimal Resiliency against Mobile Faults
A BDD - based Algorithm for Computation of Exact Fault Detection Probabilities
An Analysis of Communication Induced Checkpointing
Fault tolerant concurrent C: a tool for writing fault tolerant distributed programs
Identifying Software Problems Using Symptoms
Byte unidirectional error correcting codes
Automatic Verifying Approach for Product Specification using FTA
COTS Hardware and Software in High-Availability Systems (Panel)
The t/(n-1)-Diagnosability and Its Applications to Fault Tolerance
Theory and Practice of Sequential Machine Testing and Testability
Diagnosos of Processor Arrays
Load Sharing in Hypercube Multicomputers in the Presence of Node Failures
Fault-Tolerant Communication Algorithms in Toroidal Networks
Software Defects and their Impact on System Availability: A Study of Field Failures in Operating Systems
An Execution Service for a Partitionable Low Bandwidth Network
Formal verification of programs with exceptions
A Hierarchical Approach for Dependability Analysis of a Commercial Cache-Based RAID Storage Architecture
An on-line error-detectable array divider with a redundant binary representation and a residue code
Connectivity and Fault Tolerance of Multiple-Bus Systems
Optimal control of latent fault accumulation
Evaluating the Effectiveness of Fault Tolerance in Replicated Database Management Systems
Concurrent Error Detection/Correction in the HAL MMU Chip
Faults, Symptoms, and Software Fault Tolerance in the Tandem GUARDIAN90 Operating System
Multiple stuck-at fault testability of self-testing checkers
Proceedings of the Eighteenth International Symposium on Fault-Tolerant Computing, FTCS 1988, Tokyo, Japan, 27-30 June, 1988
Reliability Modeling of Large Fault-Tolerant Systems
Identification of Test Cases Using a Formal Approach
Combining Software-Implemented and Simulation-Based Fault Injection into a Single Fault Injection Method
The Role of Formal Methods in the Requirements Analysis of Safety-Critical Systems: A Train Set Example
Efficient Fault-Tolerant Mesh and Hypercube Architectures
Computational complexity of controllability/observability problems for combinational circuits
Supporting Nondeterministic Execution in Fault-Tolerant Systems
The design of fast totally self-checking Berger code checkers based on Berger code partitioning
Implicit Signature Checking
Improving Software Robustness with Dependability Cases
RIDDLE: a foundation for test generation on a high level design description
A recursive procedure for optimally designing a hybrid fault diagnosable system
Fault injection for dependability validation of fault-tolerant computing systems
Cyber Threats (Panel)
On the modelling and testing of recovery block structures
On self-diagnosable multiprocessor systems: diagnosis by the comparison approach
Why Optimistic Message Logging Has Not Been Used In Telecommunications Systems
Design, Implementation and Performance Evaluation of a CORBA Group Communication Service
Implementation of High Availability Mechanisms in the Air Traffic Control SIR-S System
Componentwise Decomposition for an Efficient Reliability Computation of Systems with Repairable Components
An Experimental Study on Software Structural Testing: Deterministic versus Random Input Generation
Progressive Retry for Software Error Recovery in Distributed Systems
Impact of reconfiguration logic on the optimization of defect-tolerant integrated circuits
Using passive replicates in Delta-4 to provide dependable distributed computing
Fault-Tolerance for Off-The-Shelf Applications and Hardware
A posteriori Agreement for Fault-Tolerant Clock Synchronization on Broadcast Networks
On Latching Probability of Particle Induced Transients in Combinational Networks
Dynamic Reconfiguration of CSP Programs for Fault Tolerance
A sequential circuit test generation using threshold-value simulation
Failure Mode Assumptions and Assumption Coverage
Microarchitectural Synthesis of ICs with Embedded Concurrent Fault Isolation
Transis: A Communication Subsystem for High Availability