yusuke1997/dblp-id-title huggingface dataset:
An adaptive acceleration structure for screen-space ray tracing
Anti-Aliased Line Drawing on a Distributed Cell Store System
Multiresolution Rendering With Displacement Mapping
Real-Time Bump Map Synthesis
Adaptive Texture Maps
Fast Footprint MlPmapping
Characterization of Static 3D Graphics Workloads
Silicon Compilers for Graphics Hardware Design?
A Vector-like Architecture for Raster Graphics
GI-Cube: An Architecture for Volumetric Global Illumination and Rendering
CFU: multi-purpose configurable filtering unit for mobile multimedia applications on graphics hardware
Representing Appearance and Pre-filtering Subpixel Data in Sparse Voxel Octrees
Low Latency Photon Mapping Using Block Hashing
Vertex-based Anisotropic Texturing
A Hardware Processing Unit for Point Sets
An incremental rendering VM
Adaptive Image Space Shading for Motion and Defocus Blur
VHDL Based Design of Graphics ASICs
Real-time stochastic rasterization on conventional GPU architectures
The Visual Vulnerability Spectrum: Characterizing Architectural Vulnerability for Graphics Hardware
An Advanced 3D Frame Buffer Memory Controller
The Sussex Multimedia Frame Buffer
Quasi-Linear Depth Buffers With Variable Resolution
MSBVH: An Efficient Acceleration Data Structure for Ray Traced Motion Blur
A Digital Rights Enabled Graphics Processing System
Display Hardware for Boolean Expression Models
Real-time Local Displacement using Dynamic GPU Memory Management
Accelerated single ray tracing for wide vector units
A directionally adaptive edge anti-aliasing filter
View-independent Environment Maps
Analytical motion blur rasterization with compression
Watertight ray traversal with reduced precision
Efficient BVH Construction via Approximate Agglomerative Clustering
High Quality Normal Map Compression
VIRIM: A Massively Parallel Processor for Real-Time Volume Visualization in Medicine
CSG Hidden Surface Algorithms for VLSI Hardware Systems
A flexible simulation framework for graphics architectures
Display Architecture for VLSI-based Graphics Workstations
Two-level Pipelining of Systolic Array Graphics Engines
Real-Time Architecture for High Resolution Volume Visualization
On the energy complexity of Algorithms realized in CMOS, a Graphics Example
Stochastic rasterization using time-continuous triangles
Scaling of 3D game engine workloads on modern multi-GPU systems
An Improved Z-Buffer CSG Rendering Algorithm
GVDB: raytracing sparse voxel database structures on the GPU
An Architecture for Ray - Bezier Patch Intersection
An Architecture For Rapid Stereoscopic Image Generation
Selective and adaptive supersampling for real-time ray tracing
Efficient Rendering of Spatial Bi-directional Reflectance Distribution Functions
Efficient depth peeling via bucket sort
Deep g-buffers for stable global illumination approximation
Parallel view-dependent tessellation of Catmull-Clark subdivision surfaces
Practical logarithmic rasterization for low-error shadow maps
A parallel algorithm for construction of uniform grids
Hardware Support for Non-photorealistic Rendering
Wide BVH Traversal with a Short Stack
Efficient incoherent ray traversal on GPUs through compressed wide BVHs
Real-Time High-Resolution Sparse Voxelization with Application to Image-Based Modeling
Reconstructing Solids from Tomographic Scans - The PARCUM II System
Design Principles of Hardware-based Phong Shading and Bump Mapping
GPU-accelerated high-quality hidden surface removal
VLSI Chip for Ray Tracing Bicubic Patches
Exploiting Budan-Fourier and Vincent's theorems for ray tracing 3D Bézier curves
Filtering distributions of normals for shading antialiasing
Hemispherical Projection for Progressive Radiosity Calculation on Massively Parallel Architectures
Unsolved Problems and Opportunities for High-quality, High-performance 3D Graphics on a PC Platform
VLSI Drawing Processor Utilizing Multiple Parallel Scan-Line Processors
Latency- and Hazard-Free Volume Memory Ar­ chitecture for Direct Volume Rendering
Data-parallel rasterization of micropolygons with defocus and motion blur
Temporally Dense Ray Tracing
Non-Uniform Fractional Tessellation
Experience with a Difference Engine for Graphics
Adaptively layered statistical volumetric obscurance
A 33MHz 16. Bit Gradient Calculator for Real-Time Volume Imaging
The Graphics Unit of the INTEL I80860
A pel-based Volume Rendering Accelerator
Real Time Phong Shading
An effective hardware architecture for bump mapping using angular operation
Efficient partitioning of fragment shaders for multiple-output hardware
Architectural Implications of Hardware-Accelerated Bucket Rendering on the PC
Parallel Subpixel Scanconversion
Deferred adaptive compute shading
A Chinese-Character and Graphics Workstation
A Generalised Parallel Architecture for Image Based Algorithms
Towards Interactive Bump Mapping with Anisotropic Shift-Variant BRDFs
Parallel Fixed Point Digital Differential Analyzer
A hardware-friendly bilateral solver for real-time virtual reality video
Interactive Rendering of Giga-Particle Fluid Simulations
EGGH94: Eurographics Workshop on Graphics Hardware 1994
Embedded function composition
Realistic Soft Shadows by Penumbra-Wedges Blending
Precision Selection for Energy-Effi cient Pixel Shaders
Scalable Ambient Obscurance
A Real-Time Raster Scan Display for 3-D Graphics
A Breadth-First Approach To Efficient Mesh Traversal
Rapid Simplifi cation of Multi-Attribute Meshes
Detecting aliasing artifacts in image sequences using deep neural networks
An Efficient Massively Parallel Rasterization Scheme For a High Performance Graphics System
High-Performance Delaunay Triangulation for Many-Core Computers
High-Performance Graphics 2013, Anaheim, California, USA, July 19-21, 2013. Proceedings
Simple Models of the Impact of Overlap in Bucket Rendering
Advances in Computer Graphics Hardware IV (Eurographics'89 Workshop)
B-KD Trees for Hardware Accelerated Ray Tracing of Dynamic Scenes
Perception of highlight disparity at a distance in consumer head-mounted displays
High-Performance Rendering of Realistic Cumulus Clouds Using Pre-computed Lighting
A Virtual Memory System Organization for Bit-Mapped Graphics Displays
Automatic shader level of detail
A fast, massively parallel solver for large, irregular pairwise Markov random fields
Quadratic Bezier Triangles As Drawing Primitives
Adaptive Transparency
A Multi-Processor Workstation with a Logic-Enhanced Distributed Frame Buffer
Interactive stable ray tracing
Parallel SAH k-D tree construction
A Parallel-Pipelined Multiprocessor System for the Radiosity Method
Parallel Texture Caching
Efficient ray traced soft shadows using multi-frusta tracing
Hexagonal storage scheme for interleaved frame buffers and textures
Tiled Polygon Traversal Using Half-Plane Edge Functions
A Hardware Algorithm for Fast Realistic Image Synthesis
Streaming G-Buffer Compression for Multi-Sample Anti-Aliasing
KD-tree acceleration structures for a GPU raytracer
Theory and Analysis of Higher-Order Motion Blur Rasterization
Transputer-based Parallel Ray Tracing System Using Demand Data Transfer
Exploiting Local Orientation Similarity for Efficient Ray Traversal of Hair and Fur
Improved two-level BVHs using partial re-braiding
Hybrid Sort-First and Sort-Last Parallel Rendering with a Cluster of PCs
Proceedings of the 2002 ACM SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware, Saarbrücken, Germany, September 2-3, 2002
Timeline scheduling for out-of-core ray batching
Some Practical Aspects of Rendering
EGGH96: Eurographics Workshop on Graphics Hardware 1996
Compiling high performance recursive filters
Masked software occlusion culling
Effective static bin patterns for sort-middle rendering
Clustered Deferred and Forward Shading
Ray Tracing Rational B-Spline Patches in VLSI
AnySL: efficient and portable shading for ray tracing
An Inexpensive Bounding Representation for Offsets of Quadratic Curves
On Dynamic Load Balancing on Graphics Processors
3D Graphics for Consumer Applications: How Realistic Does it Have to Be?
Accelerating real-time shading with reverse reprojection caching
Approximation Techniques for High Performance Texture Mapping
High-Quality Parallel Depth-of-Field Using Line Samples
Pseudorandom Number Generation on the GPU
A Fast and Stable Feature-Aware Motion Blur Filter
PixelPie: Maximal Poisson-disk Sampling with Rasterization
All-Pairs Shortest-Paths for Large Graphs on the GPU
New Algorithms for Computer Graphics
Super Resolution Volume Rendering Hardware
Interactive Volume Rendering on Standard PC Graphics Hardware Using Multi-Textures and Multi-Stage Rasterization
Proceedings of the 2000 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, Interlaken, Switzerland, August 21-22, 2000
EGGH93: Eurographics Workshop on Graphics Hardware 1993
Design of a Fast Voxel Processor for Parallel Volume Visualization
Content-Addressable Memories for Quadtree-Based Images
Proceedings of the 1999 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, Los Angeles, CA, USA, August 8-9, 1999
A Dedicated Graphics Processor SIGHT-2
Parallelization and Hardware Support for Ray Tracing
A Scalable Architecture for Volume Rendering
Looking at Workstation Architectures from the Viewpoint of Interaction
Space Partitioning for Mapping Radiosity Computations onto a Pipelined Parallel Architecture (II)
Voxelized Shadow Volumes
kANN on the GPU with Shifted Sorting
Stochastic Lightcuts
IMAGINE - The IMAGe engINE
Watertight Tessellation using Forward Differencing
PixelView: a view-independent graphics rendering architecture
Large data visualization on distributed memory multi-GPU clusters
EGGH92: Eurographics Workshop on Graphics Hardware 1992
A Distributed Frame Buffer within a Window-Oriented High Performance Graphics System
Comparison of Two Floating Point Arithmetic Units for a Precomputer in a Graphics System for Real Time Simulation
Dependency Graph Scheduling in a Volumetric Ray Tracing Architecture
Hardware Acceleration of Texture Mapping
Tracy: A Debugger and System Analyzer for Cross-Platform Graphics Development
Architecture considerations for tracing incoherent rays
A low-power handheld GPU using logarithmic arithmetic and triple DVFS power domains
The RACE II Engine for Real-Time Volume Rendering
Megakernels Considered Harmful: Wavefront Path Tracing on GPUs
A lazy object-space shading architecture with decoupled sampling
On the Design of a Real-Time Volume Rendering Engine
A Survey of Simulator Requirements
Prefiltered Antialiased Lines Using Half-Plane Distance Functions
Triangle Scan Conversion using 2D Homogeneous Coordinates
Towards a Taxonomy for Display Processors
Randomized Selection on the GPU
Efficient Video Decoding on GPUs by Point Based Rendering
A fast, energy-efficient z-comparator
New advances in Neuro -Visual Simulation and Symbolic extraction for Real World Computing, 3D Image Analysis and 3D object Digitization
TAYRA - A 3D Graphics Raster Processor
The AIDA Display Processor System Architecture
Load Balancing for Multi-Projector Rendering Systems
Texture compression using low-frequency signal modulation
TRIANGLECASTER Extensions To 3BTexturing Units For Accelerated Volume Rendering
Building a Full Scale VLSI-Based Volume Visualization System
Simpler and Faster HLBVH with Work Queues
Display Memory Access Issues and Anti-Aliasing with a Virtual Reality Graphics Controller
Correlation-aware semi-analytic visibility for antialiased rendering
XInPosse: Structural Simulation for Graphics Hardware
A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications
Hardware for Superior Texture Performance
Squeeze: numerical-precision-optimized volume rendering
Dual streaming for hardware-accelerated ray tracing
Distributed Texture Memory in a Multi-GPU Environment
Direct Visualization of Quadrics
Screen-Space Far-Field Ambient Obscurance
Hardware Supported Bump Mapping: A Step towards Ingber Quality Real-Time Rendering
Mio: fast multipass partitioning via priority-based instruction scheduling
Bounding volume hierarchy optimization through agglomerative treelet restructuring
Grid-free out-of-core voxelization to sparse voxel octrees on GPU
Morphological antialiasing
Optimal Depth Buffer for Low-Cost Graphics Hardware
Task management for irregular-parallel workloads on the GPU
Tracking Graphics State For Networked Rendering
Z3: An Economical Hardware Technique for High-Quality Antialiasing and Transparency
A Difference Engine for Image Reconstruction
Layered Reflective Shadow Maps for Voxel-based Indirect Illumination
Codesign Of Graphics Hardware Accelerators
Depth Complexity in Object-Parallel Graphics Architectures
Hardware implementation of micropolygon rasterization with motion and defocus blur
Designing a half toning coprocessor
Maximizing Parallelism in the Construction of BVHs, Octrees, and k-d Trees
EM-Cube: An Architecture for Low-Cost Real-Time Volume Rendering
Proceedings of High Performance Graphics, HPG 2016, Dublin, Ireland, June 20-22, 2016
Fast Parallel Construction of High-Quality Bounding Volume Hierarchies
Morton integrals for high speed geometry simplification
Scan primitives for GPU computing
The Multimedia Video Processor (MVP)
PS: Polygon Streams - A Distributed Architecture for Incremental Computation Applied to Graphics
A VLSI Architecture for Anti-Aliasing
i PACKMAN: high-quality, low-complexity texture compression for mobile phones
Primitive Processing and Advanced Shading Architecture for Embedded Space
Edge-avoiding À-Trous wavelet transform for fast global illumination filtering
Proceedings of the Conference on High-Performance Graphics, HPG 2018, Vancouver, Canada, August 10-12, 2018
Stream compaction for deferred shading
Parallel Patch?based Texture Synthesis
The Role of Power Dissipation and Locality of Reference in the Specification of High Performance Graphics Algorithms
Hardware Support for Adaptive Subdivision Surface Rendering
Accommodating Memory Latency In A Low-cost Rasterizer
SVGPU: real time 3D rendering to vector graphics formats
Texture compression of light maps using smooth profile functions
A hardware architecture for multi-resolution volume rendering
A Low-Cost Memory Architecture For PCI-Based Interactive Ray Casting
SSLPV: Subsurface Light Propagation Volumes
Gouraud Bump Mapping
Single Chip Hardware Support for Rasterization and Texture Mapping
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on High Performance Graphics 2011, Vancouver, Canada, August 5-7, 2011
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Symposium on Graphics Hardware 2005, Los Angeles, California, USA, July 30-31, 2005
Reducing Latency on PixelFlow
An Architecture for a High Performance Rendering Engine
A hardware redundancy and recovery mechanism for reliable scientific computation on graphics processors
A hierarchical shadow volume algorithm
A Distributed Data Model for Raytracing
PAVLOV: A Programmable Architecture for Volume Processing
Split-plane shadow volumes
A Multipurpose Hardware Shader
Understanding the efficiency of GPU algorithms for matrix-matrix multiplication
Hardware Support for the Display and Manipulation of Binary Voxel Models
Testing Geometric Primitive Shaders
Exploring and expanding the continuum of OIT algorithms
GPU-Accelerated Deep Shadow Maps for Direct Volume Rendering
Tight frame normal map compression
An array based design for Real-Time Volume Rendering
High-Performance Graphics 2014, Lyon, France, 2014. Proceedings
Non-linearly quantized moment shadow maps
SGRT: A Mobile GPU Architecture for Real-Time Ray Tracing
High Quality Rendering Using the Talisman Architecture
Imperfect Voxelized Shadow Volumes
The Flipping Cube: A Device for Rotating 3D Rasters
High-Performance Graphics 2019 - Short Papers, Strasbourg, France, July 8-10, 2019
Algorithms for Division Free Perspective Correct Rendering
ETC2: texture compression using invalid combinations
Real time volumetric shadows using polygonal light volumes
A hardware-aware debugger for the OpenGL shading language
Efficient Divide-And-Conquer Ray Tracing using Ray Sampling
High-Performance Software Rasterization on GPUs
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on Graphics Hardware 2007, San Diego, California, USA, August 4-5, 2007
Proceedings of the 2001 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, Los Angeles, CA, USA, August 12-13, 2001
Floating-Point Buffer Compression in a Unified Codec Architecture
The HERO Algorithm for Ray-Tracing Octrees
Photon splatting using a view-sample cluster hierarchy
3D graphics LSI core for mobile phone "Z3D"
SaarCOR - A Hardware Architecture for Ray Tracing
The Setup for Triangle Rasterization
GPU random numbers via the tiny encryption algorithm
Lazy Incremental Computation for Efficient Scene Graph Rendering
An Architecture for High-Performance 2-D Image Display
Viewing and Rendering Processor for a Volume Visualization System
Cube-4 Implementations on the Teramac Custom Computing Machine
Fast minimum spanning tree for large graphs on the GPU
VoxelCache: a cache-based memory architecture for volume graphics
Efficient stackless hierarchy traversal on GPUs with backtracking in constant time
Correct Shading of Regularized CSG Solids Using a Depth-Interval Buffer
An optimized soft shadow volume algorithm with real-time performance
Register Efficient Memory Allocator for GPUs
Proceedings of the 1998 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, Lisbon, Portugal, August 31 - September 1, 1998
Depth Buffer Compression for Stochastic Motion Blur Rasterization
Optimal Static 2-Dimensional Screen Subdivision for Parallel Rasterization Architectures
An Extended Volume Visualization System for Arbitrary Parallel Projection
Design of an On-Chip Reflectance Map
Silhouette maps for improved texture magnification
A hardware architecture for video rate smooth shading of Volume data
Cellular Architectures and Algorithms for Image Synthesis
Prefetching in a Texture Cache Architecture
The Alchemy Screen-Space Ambient Obscurance Algorithm
Hardware-compatible vertex compression using quantization and simplification
Spatial splits in bounding volume hierarchies
Mesh color textures
Lightcut interpolation
A Ray-Slice-Sweep Volume Rendering Engine
Modified noise for evaluation on graphics hardware
The ImageSwitcher: A Proposed System Architecture Designed to Reduce VR Lag
Polygon Rendering on a Stream Architecture
An efficient denoising algorithm for global illumination
Non-interleaved Deferred Shading of Interleaved Sample Patterns
A VLSI Design for Fast Vector Normalization
Dynamic Many-Light Sampling for Real-Time Ray Tracing
Understanding the efficiency of ray traversal on GPUs
Accelerating shadow rays using volumetric occluders and modified kd-tree traversal
Reduced Precision for Hardware Ray Tracing in GPUs
An Efficient Parallel Ray Tracing Scheme for Highly Parallel Architectures
Graphics Algorithms on Field Programmable Function Arrays
Hardware Outline Character Rasterization
HLBVH: hierarchical LBVH construction for real-time ray tracing of dynamic geometry
Towards a 3-D Graphics Workstation
Efficient Partitioning of Fragment Shaders for Multipass Rendering on Programmable Graphics Hardware
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on High Performance Graphics 2009, New Orleans, Louisiana, USA, August 1-3, 2009
A Practical and Efficient Approach for Correct Z-Pass Stencil Shadow Volumes
Real-Time Ray Tracing on Head-Mounted-Displays for Advanced Visualization of Sheet Metal Stamping Defects
High-Quality Volume Rendering Using Texture Mapping Hardware
Bandwidth-efficient BVH layout for incremental hardware traversal
An Architecture for Interactive Raster Graphics
GPU Accelerated Pathfinding
Hidden contours on a frame-buffer
The Triangle Shading Engine
Patch Textures: Hardware Implementation of Mesh Colors
Hardware-Accelerated Free-Form Deformation
Reorder buffer: an energy-efficient multithreading architecture for hardware MIMD ray traversal
Perlin Noise Pixel Shaders
Realizing OpenGL: Two Implementations of One Architecture
Adaptive Hierarchical Visibility in a Tiled Architecture
Mesh mutation in programmable graphics hardware
Resample Hardware for 3D Graphics
Efficient ray tracing of subdivision surfaces using tessellation caching
Algorithm and VLSI Architecture for Real-Time 1080p60 Video Retargeting
Proceedings of the 21st ACM SIGGRAPH/EUROGRAPHICS symposium on Graphics hardware, Vienna, Austria, September 3-4, 2006
Compressed Lossless Texture Representation and Caching
A Parallel Implementation of Bidirectional Ray Tracing on Transputer-based System
Design and Novel Uses of Higher-Dimensional Rasterization
The F-Buffer: A Rasterization-Order FIFO Buffer for Multi-Pass Rendering
A Display Controller for an Object-level Frame Store System
Proceedings of the EUROGRAPHICS/ACM SIGGRAPH Conference on Graphics Hardware 2008, Sarajevo, Bosnia and Herzegovina, 2008
A real-time FPGA-based architecture for a Reinhard-like tone mapping operator
Extended Morton codes for high performance bounding volume hierarchy construction
An Energy and Bandwidth Efficient Ray Tracing Architecture
Quadtree Relief Mapping
Proceedings of the 1997 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, Los Angeles, CA, USA, August 3-4, 1997
Hardware-based simulation and collision detection for large particle systems
R-Buffer: A Pointerless A-Buffer Hardware Architecture
Proceedings of High Performance Graphics, HPG 2017, Los Angeles, CA, USA, July 28 - 30, 2017
Lossless Compression of Already Compressed Textures
Optimal automatic multi-pass shader partitioning by dynamic programming
The Ray Engine
A Cellular Architecture for Ray Tracing
Hierarchical Stochastic Motion Blur Rasterization
STBVH: a spatial-temporal BVH for efficient multi-segment motion blur
Fast Volumetric Deformation On General Purpose Hardware
Physically-Based Visual Simulation on Graphics Hardware
A Massively Parallel Approach for the Design of a Raytracing Oriented Architecture
Infinite resolution textures
A 2nd generation autostereoscopic 3-D display
High-Quality Pre-lntegrated Volume Rendering Using Hardware-Accelerated Pixel Shading
Minimum Triangle Separation for Correct Z-Buffer Occlusion
Towards Real-Time Photorealistic Rendering: Challenges and Solutions
A VLSI Design Strategy for Graphics
A quadrilateral rendering primitive
Advances in Computer Graphics Hardware III (Eurographics'88 Workshop)
Brook GLES Pi: democratising accelerator programming
Vectorized production path tracing
SRDH: Specializing BVH Construction and Traversal Order Using Representative Shadow Ray Sets
Image space gathering
An O(log N ) Parallel Time Exact Hidden-Line Algorithm
A VLSI Architecture for Image Composition
IMEM: An Intelligent Memory for Bump- and Reflection-Mapping
Generic mesh refinement on GPU
Incremental and Hierarchical Hilbert Order Edge Equation Polygon Rasterization
ASICs for a High Performance IVIulti Processor Systemfor Photo-realistic Image Synthesis
The voxblt Engine: A Voxel Frame Buffer Processor
Reducing Aliasing Artifacts through Resampling
M-Buffer: A Flexible MISD Architecture for AdvancedGraphics
A Two-Dimensional Frame Buffer Processor
Object partitioning considered harmful: space subdivision for BVHs
An Improved Shading Cache for Modern GPUs
Faster incoherent rays: Multi-BVH ray stream tracing
Fast ANN for High-Quality Collaborative Filtering
Memory Access Patterns of Occlusion-Compatible 3D Image Warping
Interactive Rendering of Atmospheric Scattering Effects Using Graphics Hardware
Moment transparency
Fast maximal Poisson-disk sampling by randomized tiling
Performance Issues of a Distributed Frame Buffer on a Multicomputer
High-Quality Unstructured Volume Rendering on the PC Platform
A reconfigurable architecture for load-balanced rendering
Comparing Reyes and OpenGL on a Stream Architecture
A Multiple Application Graphics Integrated Circuit - MAGIC II
Proceedings of the 7th Conference on High-Performance Graphics, HPG 2015, Los Angeles, California, USA, August 7-9, 2015
CPU-style SIMD ray traversal on GPUs
An Integrated Highly Parallel Architecture for Image Reconstruction
Coarse Pixel Shading
Proceedings of the 2003 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, San Diego, California, USA, July 26-27, 2003
Efficient Depth Buffer Compression
Active Thread Compaction for GPU Path Tracing
Comparison of projection methods for rendering virtual reality