yusuke1997/dblp-id-title huggingface dataset:
Avoiding Synchronization to Accelerate a CFD Solver in GPU
Evaluating Performance of Deterministic Algorithms on a Multicore Processor of a Public Cloud
Non-uniform Partitioning for Collaborative Execution on Heterogeneous Architectures
Stack-Tagged Dataflow
An Introduction to DF-Threads and their Execution Model
XPySom: High-Performance Self-Organizing Maps
Using Support Vector Machines to Learn How to Compile a Method
SLURM Support for Remote GPU Virtualization: Implementation and Performance Study
GPU-NB: A Fast CUDA-Based Implementation of Naïve Bayes
A Comparative Analysis of Load Balancing Algorithms Applied to a Weather Forecast Model
A Machine Learning Approach for Performance Prediction and Scheduling on Heterogeneous CPUs
Analyzing Power Decisions in Data Center Powered by Renewable Sources
Energy Savings via Dead Sub-Block Prediction
GerpavGrid: using the Grid to maintain the city road system
Accelerating Deep Neural Network Training for Action Recognition on a Cluster of GPUs
A Code Compression Method to Cope with Security Hardware Overheads
Extending Summation Precision for Network Reduction Operations
A Cluster-based Strategy for Scheduling Task on Heterogeneous Processors
Task Scheduling in Sucuri Dataflow Library
Exploring Energy-Consistency Trade-Offs in Cassandra Cloud Storage System
Analyzing Real Cluster Data for Formulating Allocation Algorithms in Cloud Platforms
Automatic Selection of Sparse Triangular Linear System Solvers on GPUs through Machine Learning Techniques
33rd International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2021 Workshops, Belo Horizonte, Brazil, October 26-29, 2021
Node Level Primitives for Parallel Exact Inference
Analyzing Performance Improvements and Energy Savings in Infiniband Architecture using Network Compression
Benchmarking GPUs with a Parallel Lattice-Boltzmann Code
FlowCert : Probabilistic Certification for Peer-to-Peer Computations
Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP)
A Flexible Specification Model based on XML for Parallel Applications
Multi-GPU Accelerating Strategies of Ant Colony Optimization Algorithms Using Rank Based and Strong Elitist Versions
On the Evaluation of Contention-Aware List Schedulers on Multicore Cluster
Performance Improvements of Parallel Applications thanks to MPI-4.0 Hints
Intelligent Colocation of Workloads for Enhanced Server Efficiency
Exploiting Concurrent GPU Operations for Efficient Work Stealing on Multi-GPUs
Designing High Performance Heterogeneous Broadcast for Streaming Applications on GPU Clusters
Managing Power Demand and Load Imbalance to Save Energy on Systems with Heterogeneous CPU Speeds
On Simulated Annealing for the Scheduling of Parallel Applications
Parallel Implementation of a Lagrangian Stochastic Model for Pollution Dispersion
Convergence of HPC and Big Data in extreme-scale data analysis through the DCEx programming model
JANUS: A Simple and Efficient Speculative Defense using Reinforcement Learning
Beyond CPU Frequency Scaling for a Fine-grained Energy Control of HPC Systems
Efficiency and Scalability of Multi-lane Capsule Networks (MLCN)
Exploring Data Streaming to Improve 3D FFT Implementation on Multiple GPUs
Controlling Garbage Collection and Request Admission to Improve Performance of FaaS Applications
Characterizing Anomalies of a Multicore ARMv7 Cluster with Parallel N-Body Simulations
An Advanced Filtering TLB for Low Power Consumption
Scalable Thread Scheduling in Asymmetric Multicores for Power Efficiency
Characterizing the Impact of Job Execution on the Occurrence of Memory Failures on a Petascale HPC System
S-Clflush: Securing Against Flush-based Cache Timing Side-Channel Attacks
Phase-Based Data Placement Scheme for Heterogeneous Memory Systems
MLNoC: A Machine Learning Based Approach to NoC Design
Deep Learning on Large-Scale Muticore Clusters
The Dynamic Block Remapping Cache
Compressed Cache Layout Aware Prefetching
SPARC16: A New Compression Approach for the SPARC Architecture
Applying CUDA Architecture to Accelerate Full Search Block Matching Algorithm for High Performance Motion Estimation in Video Encoding
Distributed Checkpointing in Dataflow with Static Scheduling
PY-PITS: A Scalable Python Runtime System for the Computation of Partially Idempotent Tasks
Leveraging OmpSs to Exploit Hardware Accelerators
Convolution Operators for Deep Learning Inference on the Fujitsu A64FX Processor
HiTS: A High Throughput Memory Scheduling Scheme to Mitigate Denial-of-Service Attacks in Multi-core Systems
Performance and Energy Consumption Evaluation of Embedded Applications: A Method Based on Platform's Behavioral Model
Transactional WaveCache: Towards Speculative and Out-of-Order DataFlow Execution of Memory Operations
A Performance Evaluation of a Quorum-Based State-Machine Replication Algorithm For Computing Grids
Performance Issues of Bandwidth Reservations for Grid Computing
On-chip Parallel Photonic Reservoir Computing using Multiple Delay Lines
Approximate Memory with Protected Static Allocation
Network-Aware Energy-Efficient Virtual Machine Management in Distributed Cloud Infrastructures with On-Site Photovoltaic Production
Performance Modeling of MARE2DEM's Adaptive Mesh Refinement for Makespan Estimation
Exploring Heterogeneous Mobile Architectures with a High-Level Programming Model
Irregular Grid Raycasting Implementation on the Cell Broadband Engine
Predicting the Reliability Behavior of HPC Applications
Partitioning Convolutional Neural Networks for Inference on Constrained Internet-of-Things Devices
An Exploratory Study of Deep Learning for Predicting Computational Tasks Behavior in HPC Systems
HyperSpace: Distributed Bayesian Hyperparameter Optimization
Implementing Declarative Parallel Bottom-Avoiding Choice
25th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2013, Porto de Galinhas, Pernambuco, Brazil, October 23-26, 2013
On the Worst Case of Scheduling with Task Replication on Computational Grids
Impact of Version Management for Transactional Memories on Phase-Change Memories
A Scalable Parallel Deduplication Algorithm
Reconfigurable Optical Interconnection System Supporting Concurrent Application-Specific Parallel Computing
Cloud Workload Prediction and Generation Models
Partitioning GPUs for Improved Scalability
Performance Improvement of the Parallel Lattice Boltzmann Method Through Blocked Data Distributions
A Parallel Algorithm for the Facility Location Problem Applied to Oil and Gas Logistics
Leveraging Optimization Methods for Dynamically Assisted Control-Flow Integrity Mechanisms
Minimally-Skewed-Associative Caches
Load Balancing on Stateful Clustered Web Servers
Automatic Scan Parallelization in OpenMP
A BSP/CGM Algorithm for Computing Euler Tours in Graphs
A Practical Approach For Workload-Aware Data Movement in Disaggregated Memory Systems
The Case for Flexible ISAs: Unleashing Hardware and Software
An MPI-Parallel Algorithm for Static and Dynamic Top-k Harmonic Centrality
Cluster-Based Static Scheduling: Theory and Practice
Towards Performance Portability of an Oil and Gas Application on Heterogeneous Architectures
Watershed reengineering: Making Streams Programmable
Functional Approximation and Approximate Parallelization with the ACCEPT compiler
Automatic Insertion of Copy Annotation in Data-Parallel Programs
Architecture of Oscillatory Neural Network for Image Segmentation
Designing a Parallel Memory-Aware Lattice Boltzmann Algorithm on Manycore Systems
Dynamic Load Balancing in PC Clusters: An Application to a Multi-Physics Model
Kanga: A Skeleton-Based Generic Interface for Parallel Programming
Exploratory Analysis of Raw Data Files through Dataflows
High-Level Service Connectors for Component-Based High Performance Computing
A Framework for Exploiting Adaptation in Highly Heterogeneous Distributed Processing
Analyzing C++ Stream Parallelism in Shared-Memory when Porting to Flink and Storm
Runtime System Support for Running Applications with Dynamic and Asynchronous Task Parallelism in Software DSM Systems
Ring Pipelined Algorithm for the Algebraic Path Problem on the CELL Broadband Engine
From Java to FPGA: An Experience with the Intel HARP System
i-MIRROR: A Software Managed Die-Stacked DRAM-Based Memory Subsystem
The eDRAM based L3-Cache of the BlueGene/L Supercomputer Processor Node
Improving In-memory Column-Store Database Predicate Evaluation Performance on Multi-core Systems
Attaining Strictly Increasing and Precise Time Count in Energy-Efficient Computer Systems
STEER: Asymmetry-aware Energy Efficient Task Scheduler for Cluster-based Multicore Architectures
Performance Optimization for SpMV on Multi-GPU Systems Using Threads and Multiple Streams
Evaluating the Impact of Memory Allocation and Swap for Vertical Memory Elasticity in VMs
A Hybrid Parallel Algorithm for the Auction Algorithm in Multicore Systems
Dynasor: A Dynamic Memory Layout for Accelerating Sparse MTTKRP for Tensor Decomposition on Multi-core CPU
Runtime Procedure for Energy Savings in Applications with Point-to-Point Communications
Flying Memcache: Lessons Learned from Different Acceleration Strategies
On Modelling Multicore Clusters
High-Performance and Area-Efficient Reduction Circuits on FPGAs
Empirical, Analytical Study of Hardware-Based Page Swap in Hybrid Main Memory System
A Cache Replacement Policy Using Adaptive Insertion and Re-reference Prediction
Analysis and Optimization of Engines for Dynamically Typed Languages
A Scalable Dissemination Service for the ISAM Architecture
A Clock Synchronization Strategy for Minimizing Clock Variance at Runtime in High-End Computing Environments
Towards a Lock-Free, Fixed Size and Persistent Hash Map Design
14th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2002), 28-30 October 2002, Vitoria, Espirito Santo, Brazil
An Adaptive Mechanism for Fair Sharing of Storage Resources
e-Science and its application: Life Sciences and Finance
Multicore Performance Engineering of Sparse Triangular Solves Using a Modified Roofline Model
Simultaneous Evaluation of Multiple I/O Strategies
A Methodology for Developing High Fidelity Communication Models for Large-Scale Applications Targeted on Multicore Systems
A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation
Efficiently Handling Memory Accesses to Improve QoS in Multicore Systems under Real-Time Constraints
Unifying Router Power Gating with Data Placement for Energy-Efficient NoC
Employing Simulation to Facilitate the Design of Dynamic Binary Translators
Outline of a Thick Control Flow Architecture
Towards a GPU Abstraction for Lua
Performance Analysis of DECK Collective Communication Service
Critical-Path and Priority based Algorithms for Scheduling Workflows with Parameter Sweep Tasks on Global Grids
CSHARP: Coherence and SHaring Aware Cache Replacement Policies for Parallel Applications
Reducing Compiler-Inserted Instrumentation in Unified-Parallel-C Code Generation
Shelf schedules for independent moldable tasks to minimize the energy consumption
35th IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2023, Porto Alegre, Brazil, October 17-20, 2023
AIR: A Light-Weight Yet High-Performance Dataflow Engine based on Asynchronous Iterative Routing
International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2022, Bordeaux, France, November 2-5, 2022
Re-evaluation of Atomic Operations and Graph Coloring for Unstructured Finite Volume GPU Simulations
Improving Server Performance on Transaction Processing Workloads by Enhanced Data Placement
Video Processing on GPU: Analysis of Data Transfer Overhead
Multi-Profile Instruction Based Compression
A Bag-of-Tasks Scheduler Tolerant to Temporal Failures in Clouds
Dynamic Teams in OpenMP
Parallel Pairwise Correlation Computation on Intel Xeon Phi Clusters
Design and Evaluation of Data Access Prediction Strategies in SDSM Systems
Towards a Single-Host Many-GPU System
Many SVDs on GPU for Image Mosaic Assemble
A Power-Efficient Co-designed Out-of-Order Processor
An Efficient 2D Router Architecture for Extending the Performance of Inhomogeneous 3D NoC-Based Multi-Core Architectures
On the Dark Silicon Automatic Evaluation on Multicore Processors
Performance Prediction of GPU-Based Deep Learning Applications
Using Skip Graphs for Increased NUMA Locality
A User-Level Scheduling Framework for BoT Applications on Private Clouds
JAMPI: A C++ Parallel Programming Interface Allowing the Implementation of Custom and Generic Scheduling Mechanisms
Reverse Time Migration with Lossy and Lossless Wavefield Compression
Performance Characterization of Modern Databases on Out-of-Order CPUs
An Unsupervised Learning Approach for I/O Behavior Characterization
Trimming the ISA to Optimize Area and EDP in Heterogeneous CMPs
Assessing Energy Efficiency of Fault Tolerance Protocols for HPC Systems
Compiling Files in Parallel: A Study with GCC
Improving the Discovery and Clustering of Three-Dimensional Protein Patterns with OpenMP
Synchronization-Free Automatic Parallelization for Arbitrarily Nested Affine Loops
Feedback-Driven Restructuring of Multi-threaded Applications for NUCA Cache Performance in CMPs
Opening the Black Box: Performance Estimation during Code Generation for GPUs
Efficient Online 4D Magnetic Resonance Imaging
LALP: A Novel Language to Program Custom FPGA-Based Architectures
Assessing the Performance of an Architecture-Aware Optimization Tool for Neural Networks
DACHash: A Dynamic, Cache-Aware and Concurrent Hash Table on GPUs
Comparing Performance of C Compilers Optimizations on Different Multicore Architectures
Sparse Fast Fourier Transform on GPUs and Multi-core CPUs
A Scalable Algorithm for Simulating the Structural Plasticity of the Brain
Value Reuse Potential in ARM Architectures
HPSM: A Programming Framework for Multi-CPU and Multi-GPU Systems
Efficient Cyclic Weighted Reference Counting
Watt Watcher: Fine-Grained Power Estimation for Emerging Workloads
Exploiting Phase-Change Memory in Cooperative Caches
Virtual-Machine-based Intrusion Detection on File-aware Block Level Storage
A Fault-Tolerance Protocol for Parallel Applications with Communication Imbalance
Low Overhead Instruction-Cache Modeling Using Instruction Reuse Profiles
DeepWave: A Software Stack for Parallelizing Deep Learning Models Used in Geophysics
Value Predictors for Reuse through Speculation on Traces
Performance Analysis Issues for Parallel Implementations of Propagation Algorithm
Serialization Management for Best-Effort Hardware Transactional Memory
Sharing Resources for Performance and Energy Optimization of Concurrent Streaming Applications
Hiding Communication Delays in Clustered Microarchitectures
Flexible Error Protection for Energy Efficient Reliable Architectures
Energy Efficient Seismic Wave Propagation Simulation on a Low-Power Manycore Processor
Exploiting Limited Access Distance for Kernel Fusion Across the Stages of Explicit One-Step Methods on GPUs
The ChipCflow: A Tool to Generate Hardware Accelerators Using a Static Dataflow Machine Designed for a FPGA
A Batch Task Migration Approach for Decentralized Global Rescheduling
Energy-efficient online resource provisioning for cloud-edge platforms via multi-armed bandits
Data Coherence Analysis and Optimization for Heterogeneous Computing
Composite Confidence Estimators for Enhanced Speculation Control
CoBaS: Introducing a Component Based Scheduling Framework
A Home Ledger Approach for IoT Enabled Devices
A Parallelization of a Simulated Annealing Approach for 0-1 Multidimensional Knapsack Problem Using GPGPU
Enabling Dual-Core Mode in BlueGene/L: Challenges and Solutions
Towards Pervasive Containerization of HPC Job Schedulers
Replicating the Performance Evaluation of an N-Body Application on a Manycore Accelerator
An Evaluation of Processor Co-allocation for Different System Configurations and Job Structures
Graph Partitioning with the Party Library: Helpful-Sets in Practice
Offloading the Training of an I/O Access Pattern Detector to the Cloud
2-D Discrete Wavelet Transform Using GPU
Performance Comparison of a Parallel Recommender Algorithm Across Three Hadoop-Based Frameworks
Homomorphic evaluation of large look-up tables for inference on human genome data in the cloud
Resource-Management Study in HPC Runtime-Stacking Context
Performance and Energy Efficient Hardware-Based Scheduler for Symmetric/Asymmetric CMPs
CHAOS-MCAPI: An Optimized Mechanism to Support Multicore Parallel Programming
Scaling and Optimizing the Gysela Code on a Cluster of Many-Core Processors
Exploring Power Budget Scheduling Opportunities and Tradeoffs for AMR-Based Applications
Dynamic Reconfiguration of Data Parallel Programs
Predicting the Performance Impact of Increasing Memory Bandwidth for Scientific Workflows
Tuning Mechanism for Two-Level Cache Hierarchy Intended for Instruction Caches and Low Energy Consumption
Mixed and Multi-Precision SpMV for GPUs with Row-wise Precision Selection
MOPSO Applied to Architecture Tuning with Unified Second-Level Cache for Energy and Performance Optimization
Rapid Development of Error-Free Architectural Simulators Using Dynamic Runtime Testing
Strategies to Improve the Performance of a Geophysics Model for Different Manycore Systems
RACB: Resource Aware Cache Bypass on GPUs
Multi-level Parallelism in the Computational Modeling of the Heart
Prof5: A RISC-V profiler tool
Cloud-based OpenMP Parallelization Using a MapReduce Runtime
OpenMP-based Parallel Algorithms for Solving Kronecker Descriptors
A Segmented Bloom Filter Algorithm for Efficient Predictors
Asynchronous Communication in Java over Infiniband and DECK
Exploiting Parallelism in Linear Algebra Kernels through Dataflow Execution
A Software Transactional Memory System for an Asymmetric Processor Architecture
Evaluation of an OPENMP Parallelization of Lucas-Kanade on a NUMA-Manycore
Edge Computing versus Cloud Computing: Impact on Retinal Image Pre-processing
DeVAS: Decoupled Virtual Address Spaces
Fusion of Calling Sites
Sparsity-aware Power Gating for Tensor Cores
A Study of Power-Performance Modeling Using a Domain-Specific Language
Computing seismic attributes with deep-learning models
MDACCER: Modified Distributed Assessment of the Closeness CEntrality Ranking in Complex Networks for Massively Parallel Environments
Design and evaluation of associative processing kernels
A Metadata Cluster Based on OSD+ Devices
On the Performance of Code Block Segmentation for LTE-Advanced: An In-Depth Analysis
OmpTracing: Easy Profiling of OpenMP Programs
Thread Footprint Analysis for the Design of Multithreaded Applications and Multicore Systems
To Protect or Not To Protect: Probability-Aware Selective Protection for Sparse Iterative Solvers
A Systematic Literature Review of I/O Optimization in HPC and Cloud Computing Environments
A Source-to-Source NUMA Profiling Approach
Combining a Shared-Memory High Performance Computer and a Heterogeneous Cluster for the Simulation of Light Interaction with Human Skin
A Performance and Energy Study of GPU-Resident Preconditioners for Conjugate Gradient Solvers: In the Context of Existing and Novel Approaches
Converting Space Shared Resources into Intermittent Resources for use in Bag-of-Tasks Grids
Optimized Transactional Data Structure Approach to Concurrency Control for In-Memory Databases
Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned
Predicting GPU Performance from CPU Runs Using Machine Learning
Accelerating Curvature Estimate in 3D Seismic Data Using GPGPU
Improving Parallel Execution Time of Sorting on Heterogeneous Clusters
MAGC: A Mapping Approach for GPU Clusters
A New Parallel Schema for Branch-and-Bound Algorithms Using GPGPU
ArchC: A SystemC-Based Architecture Description Language
Automatic Ray-Tracer Cloud Offloading in OPENMP
Detecting Malicious Manipulation in Grid Environments
Intra-Clustering: Accelerating On-chip Communication for Data Parallel Architectures
Towards a Dataflow Runtime Environment for Edge, Fog and In-Situ Computing
Analyzing HPC Monitoring Data With a View Towards Efficient Resource Utilization
Automatic Constraint Partitioning to Speed Up CLP Execution
Watershed: A High Performance Distributed Stream Processing System
Effect of Network Topology on the Performance of ADMM-Based SVMs
Characterizing the Performance of Data Management Systems on Hyper-Threaded Architectures
Interactive Ray Tracing Using a SIMD Reconfigurable Architecture
A Dataflow Implementation of Region Growing Method for Cracks Segmentation
Comparison of Genomes Using High-Performance Parallel Computing
Chained In-Order/Out-of-Order DoubleCore Architecture
Data Parallelism for Belief Propagation in Factor Graphs
Memory Affinity for Hierarchical Shared Memory Multiprocessors
Scalability Analysis of Signatures in Transactional Memory Systems
26th IEEE International Symposium on Computer Architecture and High Performance Computing Workshop, SBAC-PAD Workshop 2014, Paris, France, October 22-24, 2014
Efficient Pathfinding Co-Processors for FPGAs
HPC Performance and Energy-Efficiency of Xen, KVM and VMware Hypervisors
gem5-ndp: Near-Data Processing Architecture Simulation From Low Level Caches to DRAM
Bit-Parallel Approximate Pattern Matching on the Xeon Phi Coprocessor
Remote Data Service Installation on a Grid-enabled Java Platform
High-Performance Low-Memory Lowering: GEMM-based Algorithms for DNN Convolution
Scalable Many-Field Packet Classification on Multi-core Processors
Cooperation of Neighboring PEs in Clustered Architectures
Scalable GPU Communication with Code Generation on Stencil Applications
32nd IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2020, Porto, Portugal, September 9-11, 2020
Impact of Version Management on Transactional Memories' Performance
Optimized Parallel Label Propagation Based Community Detection on the Intel(R) Xeon Phi(TM) Architecture
Finite Difference Simulations of the Navier-Stokes Equations Using Parallel Distributed Computing
Mapping Pipelined Applications with Replication to Increase Throughput and Reliability
Optimizations for Compiled Simulation Using Instruction Type Information
28th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2016, Los Angeles, CA, USA, October 26-28, 2016
The Experience in Designing and Building the High Performance Cluster Netuno
Parallelizing Information Set Generation for Game Tree Search Applications
Impact of Serial Scaling of Multi-threaded Programs in Many-Core Era
Polyhedral Dataflow Programming: A Case Study
Dealing with Reduction Operations Using Transactional Memory
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference
I/O Performance Evaluation on Multicore Clusters with Atmospheric Model Environment
High Level Power and Energy Exploration Using ArchC
Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance
A Communication Protocol for Fog Computing Based on Network Coding Applied to Wireless Sensors
Managing the Execution of Large Scale MPI Applications on Computational Grids
Exploiting Data Compression to Mitigate Aging in GPU Register Files
A Parallel Engine for Graphical Interactive Molecular Dynamics Simulations
An Analytical Model on the Execution of Transactional Memory
2017 International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PAD Workshops, Campinas, Brazil, October 17-20, 2017
Complex Branch Profiling for Dynamic Conditional Execution
PSU: A Framework for Dynamic Software Updates in Multi-threaded C-Language Programs
30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018, Lyon, France, September 24-27, 2018
CLAP-Bot: a framework for automatic optimization of high-performance elastic applications on the Clouds
MR-Advisor: A Comprehensive Tuning Tool for Advising HPC Users to Accelerate MapReduce Applications on Supercomputers
BIGhybrid - A Toolkit for Simulating MapReduce in Hybrid Infrastructures
Performance Evaluation of Optimized Implementations of Finite Difference Method for Wave Propagation Problems on GPU Architecture