yusuke1997/dblp-id-title huggingface dataset:
Development of a Mathematical Subroutine Library for Fujitsu Vector Parallel Processors
Chunking parallel loops in the presence of synchronization
NumaPerf: predictive NUMA profiling
Microservers: a new memory semantics for massively parallel computing
An operation stacking framework for large ensemble computations
FAZ: A flexible auto-tuned modular error-bounded compression framework for scientific data
Simulation and Analysis Engine for Scale-Out Workloads
Overcoming single-thread performance hurdles in the core fusion reconfigurable multicore architecture
An Efficient and Scalable Approach to Build Co-occurrence Matrix for DNN's Embedding Layer
Task-graph scheduling extensions for efficient synchronization and communication
High-Performance, Low-Complexity Deadlock Avoidance for Arbitrary Topologies/Routings
Optimizing strategies for telescoping languages: procedure strength reduction and procedure vectorization
Software trace cache
Throughput computing
Thread-cooperative, bit-parallel computation of levenshtein distance on GPU
Table size reduction for data value predictors by exploiting narrow width values
High Performance Design for HDFS with Byte-Addressability of NVM and RDMA
Active buffering plus compressed migration: an integrated solution to parallel simulations' data transport needs
A Case for Granularity Aware Page Migration
A programming system for xeon phis with runtime SIMD parallelization
Efficient exact K-nearest neighbor graph construction for billion-scale datasets using GPUs with tensor cores
The energy efficiency of CMP vs. SMT for multimedia workloads
Scaling Large-scale GNN Training to Thousands of Processors on CPU-based Supercomputers
Author retrospective for analytical cache models with applications to cache partitioning
Underprovisioning the Grid Power Infrastructure for Green Datacenters
A comprehensive approach to parallel data flow analysis
Mechanisms and policies for supporting fine-grained cycle stealing
Low-overhead call path profiling of unmodified, optimized code
Eliminating redundancies in sum-of-product array computations
Author retrospective for increasing the instruction fetch rate via multiple branch prediction and a branch address cache
Pushing the Limits of GPU Lossy Compression: A Hierarchical Delta Approach
Analyzing the performance of message passing MIMD Hypercubes: a study with the Intel iPSC/860
Techniques for Empirical Testing of Parallel Random Number Generators
Exploiting cache affinity in software cache coherence
Cache Miss Equations: An Analytical Representation of Cache Misses
Eliminating synchronization bottlenecks in object-based programs using adaptive replication
Evaluating operating system vulnerability to memory errors
Cost-effectively offering private buffers in SoCs and CMPs
Coordinating processor and main memory for efficientserver power control
On the Processing Time of a Parallel Linear System Solver
Multiple sub-row buffers in DRAM: unlocking performance and energy improvement opportunities
Supercomputer development in Europe
Partitioning sparse deep neural networks for scalable training and inference
miNI: reducing network interface memory requirements with dynamic handle lookup
Characterization and identification of HPC applications at leadership computing facility
Origami: Folding Warps for Energy Efficient GPUs
G-Charm: an adaptive runtime system for message-driven parallel applications on hybrid systems
Transparent caching with strong consistency in dynamic content web sites
Scaling data race detection for partitioned global address space programs
Low-power, low-complexity instruction issue using compiler assistance
Performance Study on Optimal Processor Assignment in Parallel Relational Databases
Node-based memory management for scalable NUMA architectures
Scalable, fault tolerant membership for MPI tasks on HPC systems
Evaluation of compiler generated parallel programs on three multicomputers
An end-to-end analysis of file system features on sparse virtual disks
The EM-4 Under Implicit Parallelism
Run-Time Methods for Parallelizing Partially Parallel Loops
Adaptive paging for a multifrontal solver
Active Access: A Mechanism for High-Performance Distributed Data-Centric Computations
Tag-Split Cache for Efficient GPGPU Cache Utilization
Evaluating automatic parallelization for efficient execution on shared-memory multiprocessors
What is worth learning from parallel workloads?: a user and session based analysis
Holistic run-time parallelism management for time and energy efficiency
CodeSeer: input-dependent code variants selection via machine learning
BitGNN: Unleashing the Performance Potential of Binary Graph Neural Networks on GPUs
DSGEN: concolic testing GPU implementations of concurrent dynamic data structures
CACHET: an adaptive cache coherence protocol for distributed shared-memory systems
A new speculation technique to optimize floating-point performance while preserving bit-by-bit reproducibility
A systolic array processor for biological information signal processing
High-speed processing schemes for summation type and iteration type vector instructions on Hitachi supercomputer S-820 system
Dynamic parallelization of single-threaded binary programs using speculative slicing
Apricot: an optimizing compiler and productivity tool for x86-compatible many-core coprocessors
Directive-Based, High-Level Programming and Optimizations for High-Performance Computing with FPGAs
Compilation Techniques for Sparse Matrix Computations
Dynamic Load Balancing for Adaptive Meshes Using Symmetric Broadcast Networks
A graphical tool for driving the parallel computation of pseudosprectra
OhHelp: a scalable domain-decomposing dynamic load balancing for particle-in-cell simulations
Scheduling for Cyber-Physical Systems with Heterogeneous Processing Units under Real-World Constraints
Author retrospective for a global resource-constrained parallelization technique
Exploiting Dynamic Reuse Probability to Manage Shared Last-level Caches in CPU-GPU Heterogeneous Processors
Auto-Healer: Self-Healing Hardware for Perception Stage Faults in Autonomous Driving Systems
Fast and scalable list ranking on the GPU
Implementation of Sparta, a Highly Parallel Circuit Simulator by the Preconditioned Jacobi Method, on a Distributed Memory Machine
Indemics: an interactive data intensive framework for high performance epidemic simulation
Scheduling Tasks with Mixed Timing Constraints in GPU-Powered Real-Time Systems
Reducing data communication overhead for DOACROSS loop nests
Result checking in global computing systems
Multiprocessing algorithms for global spectral numerical weather prediction
An analysis of the impact of MPI overlap and independent progress
A scalable low power issue queue for large instruction window processors
Performance Embeddings: A Similarity-Based Transfer Tuning Approach to Performance Optimization
A heterogeneously segmented cache architecture for a packet forwarding engine
An Efficient 2D Fusion Method for High-Performance Two-Stage Eigensolvers on Modern Heterogeneous Architectures
FASTEN: Fast GPU-accelerated Segmented Matrix Multiplication for Heterogenous Graph Neural Networks
Building blocks for an exa-scale operating system
A High-Performance Parallel Database Architecture
EXPERT: expedited simulation exploiting program behavior repetition
Requirements for optimal execution ofL oops with tests
Author's retrospective for biomedical image analysis on a cooperative cluster of gpus and multicores
Adaptive Strassen's matrix multiplication
Optimizing large-scale plasma simulations on persistent memory-based heterogeneous memory with effective data placement across memory hierarchy
The future of supercomputing
Biomedical image analysis on a cooperative cluster of GPUs and multicores
Page Migration for Hardware Memory Disaggregation Across a Network
Coupling prefix caching and collective downloads for remote dataset access
Accelerating cache coherence mechanism with speculation
IA-Chol: Input-Aware Cholesky Decomposition on CPU and GPU
DeepHiR: improving high-radix router throughput with deep hybrid memory buffer microarchitecture
DR-CircuitGNN: Training Acceleration of Heterogeneous Circuit Graph Neural Network on GPUs
Snoopie: A Multi-GPU Communication Profiler and Visualizer
A Dataflow Language with Object-based Extension and its Implementation on a Commercially Available Parallel Machine
Improving Single-Process Performance with Multithreaded Processors
Runtime-Guided Management of Stacked DRAM Memories in Task Parallel Programs
An automatic input-sensitive approach for heterogeneous task partitioning
Understanding the impact of threshold voltage on MLC flash memory performance and reliability
SRC: facilitating efficient parallelization of information storage and retrieval on large data sets
MPI collective communications on the blue gene/p supercomputer: algorithms and optimizations
SRC: FenixOS - a research operating system focused on high scalability and reliability
Access Patterns: A Useful Concept in Vector Programming
Supercomputing and transputers
Wafer-Scale Fast Fourier Transforms
Multipath Execution: Opportunities and Limits
ICS '20: 2020 International Conference on Supercomputing, Barcelona Spain, June, 2020
The power 775 architecture at scale
Evaluating support for global address space languages on the Cray X1
Author retrospective for array expansion, array shrinking, or there and back again
A voxel-based parallel collision detection algorithm
Fast distributed bandits for online recommendation systems
On the perfect accuracy of an approximate subscript analysis test
A decomposition method with minimal communication volume for parallelization of multi-dimensional FFTs
A dynamic application-driven data communication strategy
Exact Side Effects for Interprocedural Dependence Analysis
GRACIA: a software environment for graphical specification, automatic configuration and animation of parallel programs
DaCache: Memory Divergence-Aware GPU Cache Management
Proceedings of the 2016 International Conference on Supercomputing, ICS 2016, Istanbul, Turkey, June 1-3, 2016
A dominating set model for broadcast in all-port wormhole-routed 2D mesh networks
Evaluating the Communication Performance of MPPs Using Synthetic Sparse Matrix Multiplication Workloads
Analysis of scalability of parallel algorithms and architectures: a survey
Tools for Performance Evaluation of Parallel Machines
PAME: precision-aware multi-exit DNN serving for reducing latencies of batched inferences
Evaluation of the memory page migration influence in the system performance: the case of the SGI O2000
Author retrospective for cooperative cache partitioning for chip multiprocessors
A Parallel Graph Partitioning Algorithm for a Message-Passing Multiprocessor
V-OpenCL: a method to use remote GPGPU
Energy conservation techniques for disk array-based servers
Author retrospective for optimizing matrix multiply using PHiPAC: a portable high-performance ANSI C coding methodology
Loop optimization for horizontal microcoded machines
Implementing virtual memory in a vector processor with software restart markers
Scalable fine-grained call path tracing
Programming data parallel algorithms on distributed memory using Kali
Fairness-oriented OS Scheduling Support for Multicore Systems
A comparative study of modulo scheduling techniques
Prefetching Techniques for Near-memory Throughput Processors
Janus2: an FPGA-based supercomputer for spin glass simulations
Classifying load and store instructions for memory renaming
Parallelizing and optimizing sparse tensor computations
Thread-Level Speculation on a CMP can be energy efficient
STAR-MPI: self tuned adaptive routines for MPI collective operations
Toward accelerated stencil computation by adapting tensor core unit on GPU
Thread fork/join techniques for multi-level parallelism exploitation in NUMA multiprocessors
An infrastructure for scalable and portable parallel programs for computational chemistry
Clustering performance data efficiently at massive scales
An algorithm for the generalized singular value decomposition on massively parallel computers
Performance Prediction of Parallel Processing Systems: The PAMELA Methodology
alpha-coral: a multigrain, multithreaded processor architecture
Static and Dynamic Evaluation of Data Dependence Analysis
WCCV: improving the vectorization of IF-statements with warp-coherent conditions
Proceedings of the 32nd International Conference on Supercomputing, ICS 2018, Beijing, China, June 12-15, 2018
Tuning applications for efficient GPU offloading to in-memory processing
Automatic SIMD vectorization of fast fourier transforms for the larrabee and AVX instruction sets
A comparison of MPI, SHMEM and cache-coherent shared address space programming models on the SGI Origin2000
ParaLearn : a massively parallel, scalable system for learning interaction networks on FPGAs
Performance Analysis of Multi-Buffered Packet-Switching Networks in Multiprocessor Systems
Dynamic Control of Performance Monitoring on Large Scale Parallel Systems
A Cost-Effective Dueling Framework for Set-Associative Cache Indexing
SRC: enabling petascale data analysis for scientific applications through data reorganization
Run-Time Compilation for Parallel Sparse Matrix Computations
Athena: high-performance sparse tensor contraction sequence on heterogeneous memory
Supercomputing out of recycled garbage: preliminary experience with Piranha
Author retrospective for the dual data cache
Lightweight Huffman Coding for Efficient GPU Compression
NPBench: a benchmarking suite for high-performance NumPy
Combining thread level speculation helper threads and runahead execution
Sensitivity analysis for automatic parallelization on multi-cores
CMAX: A Fortran Translator for the Connection Machine System
One-to-one mapping of process graphs onto a hypercube
Poster: implications of merging phases on scalability of multi-core architectures
Time and space optimization for processing groups of multi-dimensional scientific queries
Can the earth simulator change the way humans think?
Low overhead and context sensitive profiling of CPU-accelerated applications
Characteristics of workloads used in high performance and technical computing
Criticality-Aware Dynamic Task Scheduling for Heterogeneous Architectures
Congestion avoidance on manycore high performance computing systems
CUPL: a compile-time uncoalesced memory access pattern locator for CUDA
Towards shared memory consistency models for GPUs
High quality real-time image-to-mesh conversion for finite element simulations
Compiler and runtime support for out-of-core HPF programs
Think globally, search locally
GraCFL: A Holistically Designed Vertex-Centric Graph System for CFL Reachability
Preconditioning parallel multisplittings for solving linear systems of equations
Compiling performance models from parallel programs
Analysis of Local Enumeration and Storage Schemes in HPF
Challenges and opportunities in autonomic computing
A Global Perspective on Supercomputer Power Provisioning: Case Studies from United States and Europe
Parallel Direct Solution of Large Sparse Systems in Finite Element Computations
Demystifying Cache Policies for Photo Stores at Scale: A Tencent Case Study
The deep computing messaging framework: generalized scalable message passing on the blue gene/P supercomputer
Fine Grain Parallel Communication on General Purpose LANs
Controlling cache utilization of HPC applications
Comparative study of page-based and segment-based software DSM through compiler optimization
Demonstrating the scalability of a molecular dynamics application on a Petaflop computer
Speculative Execution via Address Prediction and Data Prefetching
Implicit java array bounds checking on 64-bit architecture
HMComp: Extending Near-Memory Capacity using Compression in Hybrid Memory
SemCache: semantics-aware caching for efficient GPU offloading
An Overview of the PTRAN Analysis System for Multiprocessing
Understanding the interconnection network of SpiNNaker
RTT-UAF: Reuse Time Tracking for Use-After-Free Detection
Eliminating Conflict Misses for High Performance Architectures
Stencil Computation with Vector Outer Product
Automatic re-scheduling of dependencies in a RPC-based grid
Characterizing the impact of soft errors on iterative methods in scientific computing
A locality sensitive multi-module cache with explicit management
Computing outside the box
Evaluating the impact of memory system performance on software prefetching and locality optimizations
Parallel program behavioral study on a shared-memory multiprocessor
A Systolic Array Structure for Matrix Multiplication in the Residue Number System
Static reuse distances for locality-based optimizations in MATLAB
Dynamically linked MSHRs for adaptive miss handling in GPUs
SPIRIT: a framework for creating distributed recursive tree applications
SRC: soft error detection and recovery for high performance linpack
Fast Multiplication in Binary Fields on GPUs via Register Cache
A Parallel Iterative Linear System Solver with Dynamic Load Balancing
Distributed-memory parallel algorithms for sparse times tall-skinny-dense matrix multiplication
Parallel programs and background load: efficiency studies with the PAR-Bench system
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31 - June 04, 2011
Active memory operations
GraphGrind: addressing load imbalance of graph partitioning
Efficient hierarchical online-autotuning: a case study on polyhedral accelerator mapping
Work distribution in parallel programs for distributed memory multiprocessors
Towards Lightweight and Swift Storage Resource Management in Big Data Cloud Era
Selecting long atomic traces for high coverage
The Gould NP1 system interconnecting
Proceedings of the 19th Annual International Conference on Supercomputing, ICS 2005, Cambridge, Massachusetts, USA, June 20-22, 2005
An improvement of I/O function for auxiliary storage: parallel I/O for a large scale supercomputing
Generating new general compiler optimization settings
A Massively Parallel Optimizer for Expression Evaluation
Speculative Execution Model with Duplication
libPRISM: an intelligent adaptation of prefetch and SMT levels
KrakenOnMem: a memristor-augmented HW/SW framework for taxonomic profiling
Idiom Recognition in the Polaris Parallelizing Compiler
Parallel Matrix Factorizations on a Shared Memory MIMD Computer
Cost-optimal parallel B-spline interpolations
Micro-analysis of the titans's operating pipe
Automatically Scalable Computation
Fast Parallel Algorithms for Processing of Joins
Parallel Contraction Hierarchies Can Be Efficient and Scalable
A Technique for Compiling Execution Graph Expressions for Restricted and Parallelism in Logic Programs
On the communication complexity of 3D FFTs and its implications for Exascale
OPTNET: A Cost-effective Optical Network for Multiprocessors
A Micro-Vectorprocessor Architecture: Performance Modeling and Benchmarking
Design and Rationale for MUPPET: A Programming Environment for Message Based Multiprocessors
DASX: Hardware Accelerator for Software Data Structures
SB-Fetch: synchronization aware hardware prefetching for chip multiprocessors
A case for use-level dynamic page migration
Towards automatic translation of OpenMP to MPI
Sensitivity analysis of knapsack-based task scheduling on the grid
Identifying and (automatically) remedying performance problems in CPU/GPU applications
Sparse Code Generation for Imperfectly Nested Loops with Dependences
Automatic construct selection and variable classification in OpenMP
High-level Management of Communication Schedules in HPF-like Languages
PaCMap: Topology Mapping of Unstructured Communication Patterns onto Non-contiguous Allocations
Performance Analysis of Four SIMD Machines
Mapping Performance Data for High-Level and Data Views of Parallel Program Performance
A New Guaranteed Heuristic for the Software Pipelining Problem
GPU snapshot: checkpoint offloading for GPU-dense systems
Performance driven data cache prefetching in a dynamic software optimization system
Accelerating BWA-MEM Read Mapping on GPUs
Pearl: Automatic Code Optimization Using Deep Reinforcement Learning
Automatic generation and tuning of MPI collective communication routines
A space-efficient parallel garbage compaction algorithm
SparsePIM: An Efficient HBM-Based PIM Architecture for Sparse Matrix-Vector Multiplications
FLASH: FPGA-Accelerated Smart Switches with GCN Case Study
A communication-avoiding 3D sparse triangular solver
Parallel algorithms for mining frequent structural motifs in scientific data
Parallel algorithms for solution of tridiagonal systems on multicomputers
HARNESS: Holistic Resource Management for Diversely Scaled Edge Cloud Systems
An Interprocedural Framework for Placement of Asynchronous I/O Operations
Inter-loop optimization in RAJA using loop chains
Unified on-chip memory allocation for SIMT architecture
Register requirements of pipelined processors
Efficient Server Consolidation through a balanced mix of Transformer-based and Conventional Applications
Leveraging cache coherence in active memory systems
Reducing branch misprediction penalties via dynamic control independence detection
Design tradeoffs for tiled CMP on-chip networks
Understanding the Idiosyncrasies of Emerging BlueField DPUs
Three-dimensional numerical simulations of the czochralski bulk flow on a CRAY X-MP multiprocessor architecture
A scalable communication layer for multi-dimensional hyper crossbar network using multiple gigabit ethernet
Minimizing Coherence Errors via Dynamic Decoupling
DTail: a flexible approach to DRAM refresh management
Profile-guided I/O partitioning
Parallel Construction of Multidimensional Binary Search Trees
SRC: OpenSHMEM library development
Inter-procedural stacked register allocation for itanium® like architecture
Overhead of a decentralized gossip algorithm on the performance of HPC applications
HYPHA: a framework based on separation of parallelisms to accelerate persistent homology matrix reduction
A graphic parallelizing environment for user-compiler interaction
Hybrid approach for data-flow analysis of MPI programs
PALMOS: A Transparent, Multi-tasking Acceleration Layer for Parallel Heterogeneous Systems
HOMR: a hybrid approach to exploit maximum overlapping in MapReduce over high performance interconnects
Proceedings of the ACM International Conference on Supercomputing, ICS 2019, Phoenix, AZ, USA, June 26-28, 2019
2014 International Conference on Supercomputing, ICS'14, Muenchen, Germany, June 10-13, 2014
Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity
LITE: a low-cost practical inter-operable GPU TEE
Improving Java performance using hardware translation
Exploiting heterogeneous parallelism on a multithreaded multiprocessor
Compiler techniques for data partitioning of sequentially iterated parallel loops
Supporting storage configuration for I/O intensive workflows
Scalable algorithms for global snapshots in distributed systems
Scalable Instruction-Level Parallelism Through Tree-Instructions
Inter-reference gap distribution replacement: an improved replacement algorithm for set-associative caches
A software coherence scheme with the assistance of directories
HPF Compiler for the AP1000
On the automatic parallelization of subscripted subscript patterns using array property analysis
Carpool: a bufferless on-chip network supporting adaptive multicast and hotspot alleviation
21st century computer architecture keynote at 2014 international conference on supercomputing (ICS)
A european perspective on supercomputing
GreenMM: energy efficient GPU matrix multiplication through undervolting
An empirically tuned 2D and 3D FFT library on CUDA GPU
Revealing applications' access pattern in collective I/O for cache management
ASAP: automatic synthesis of area-efficient and precision-aware CGRAs
Stepping towards noiseless Linux environment
Developing Architecture Adaptive Algorithms Using Simulation with MISS-PVM for Performance Prediction
The RAMDISK storage accelerator: a method of accelerating I/O performance on HPC systems using RAMDISKs
Optimized unrolling of nested loops
Boosting superpage utilization with the shadow memory and the partial-subblock TLB
Proceedings of the 4th International Workshop on Runtime and Operating Systems for Supercomputers, ROSS 2014, Munich, Germany, June 10, 2014