yusuke1997/dblp-id-title huggingface dataset:
Lifetime and Buffer-Size Optimization for RF Powered Wireless Sensor Networks
Towards Increasing the Reusability of the Wireless Sensor Network Protocols
Wireless Sensor Network for in situ Soil Moisture Monitoring
Lightweight Authentication Protocols based on Rotations and the LPN Problem
Current and Position Sensor Fault Detection and Isolation for Driving Motor of In-wheel Independent Drive Electric Vehicle
SALATA: A Web Application for Visualizing Sensor Information in Farm Fields
Sensor-data Analytics in Cyber Physical Systems - From Husserl to Data Mining
Research on Payload Aggregation of Packets in WSNs
Internet of Entities (IoE): A Blockchain-based Distributed Paradigm for Data Exchange between Wireless-based Devices
An Algorithm for Extended Dynamic Range Video in Embedded Systems
Sound Localization using Compressive Sensing
Smart Device Prototype for Automated Emergency Calls - Using SIP and TTS to Reach Legacy Emergency Services
Energy/Latency Trade-offs in Geographic Routing for Ultrawideband Wireless Sensor Networks
Scene Understanding in Emergency Applications: Challenges and Lessons Learnt
Human Presence Detection using Radio Irregularity in Wireless Networks - Human Detection in Energy Aware Residential Networks
papagenoX: Generation of Electronics and Logic for Embedded Systems from Application Software
Reliability Comparison of Routing Protocols for WSNs in Wide Agriculture Scenarios by Means of ?L Index
Peer Synchronization Method for Wireless Sensor Networks using Heterogeneous Bluetooth Sensor Nodes
Intellectus - Intelligent Sensor Motes in Wireless Sensor Network
Using a Token Approach for the MAC Layer of Linear Sensor Networks - Impact of the Redundancy on the Throughput
Performance Improvement in Beacon-enabled LR-WPAN-based Wireless Sensor Networks
Underwater Wireless Sensor Networks: A Review
Evaluation of RSS-based Position Tracking using WSNs for Resource Localization in an Indoor Construction Environment
High-precision Indoor Positioning Systems - Challenges and Research Directions
Software Defined Systems: Integrating the Cyber World with the Internet of Things by Leveraging on Network Intelligence
Convergecast Algorithms for Wake-up Transceivers
Smart Fabrication of Robotic Systems - A Project with University Students
Comparison between Channel Hopping and Channel Adaptation for Industrial Wireless Sensor Networks
Key Establishment and Trustful Communication for the Internet of Things
Energy Efficient Sensor Network Configuration for Covering Points of Interest
Semantic Multi-sensor Data Processing for Smart Environments
Controlling Chaotic Instabilities in Brillouin Fiber Sensor based on Neural Networks
Coexistence of Different Wireless Sensor Networks - MAC Protocol Interference between X-MAC and Low Power Probing
Solar Energy Harvesting Solution for the Wireless Sensor Platform the UWASA Node
A Proposal for Network Coding with the IEEE 802.15.6 Standard
Data Link Layer Effect over Swarm Underwater Network Performance
TSCH Slotframe Optimization Using Differential Evolution Algorithm for Heterogeneous Sensor Networks
Detection of Honeybee Disease: Varrosis using a Semiconductor Gas Sensor Array
Dynamic Transmission Range based on Packet Reception Ratio and Density in VANETs
Design and Evaluation of a High Throughput Seismic Sensor Network - Tools for Planning, Deployment and Assessment
Proceedings of the 6th International Conference on Sensor Networks (SENSORNETS 2017), Porto, Portugal, February 19-21, 2017
Mobility Assisted Coverage Restoration Scheme in Wireless Sensor Networks
Semantic Approach to WMO Codes
On-site Sensor Noise Evaluation and Detectability in Low Cost Accelerometers
Satellite Observation of Bare Soils for Their Average Diurnal Albedo Approximation
A Wireless Low-power System for Digital Identification of Examinees (Including Covid-19 Checks)
The Intelligent Container - A Cognitive Sensor Net for Fruit Logistics
Infrared Photoelectric Sensor Network Applied to Remote Arthropod Insects' Surveillance
Machine Learning in Digital Twin Edge Networks
Sensor Networks based on Optical Waveguide Sensors
An Architecture for Seamless Configuration, Deployment, and Management of Wireless Sensor-actuator Networks
Snowflake: An Adaptive Energy and Delay Efficient Scheme for Source Location Privacy in Wireless Sensor Networks
Performance Evaluation of Routing Schemes in Wireless Sensor Networks for Train Monitoring
Benchmark Datasets for Fault Detection and Classification in Sensor Data
Analysis of Processing Architectures for Wireless Sensor Networks
A Near Optimal Algorithm for Lifetime Optimization in Wireless Sensor Networks
Combinatorial Approach for Geographic Routing with Delivery Guarantees
Browsing the Sensor Web - Pervasive Access for Wide-area Wireless Sensor Networks
Surface Light Barriers
Linoc: A Prototyping Platform for Capacitive and Passive Electrical Field Sensing
Classification of Human Activities Indoors using Microclimate Sensors and Semiconductor Gas Sensors
Impact of Temperature Variations on the Reliability of LoRa - An Experimental Evaluation
Platform-integrated Sensors and Personalized Sensing in Smart Buildings
Redundant Distributed Data Storage - Experimentation with the SensLab Testbed
A Self-duty-cycled Digital Baseband for Energy-enhanced Wake-up Receivers
Multiple Gas Sensors System for Environmental and Air Quality Assessments - A Way to Perform Environmental Monitoring in Smart Cities
A Low-Cost Sensors Study Measuring Exposure to Particulate Matter in Mobility Situations
MultiSense: A Highly Reliable Wearable-free Human Fall Detection Systems
Integration of FIWARE and IoT based Named Data Networking (IoT-NDN)
Maximizing the Relevant Diversity of Social Swarming Information
The Automagic Box of Beauty - A Prototypical Smart Device as Use Case Example for User-centered Decision Support via the Hub-of-all-Things
Evaluation of Range-based Methods for Localization in Grain Storages
Pervasive Sensing and Computing for Healthcare Applications
Experimental Synthesis of Routing Protocols and Synthetic Mobility Modeling for MANET
Design of an Energy-efficient Hybrid UWB-RF Indoor Distance Estimation System
SENSORNETS 2015 - Proceedings of the 4th International Conference on Sensor Networks, ESEO, Angers, Loire Valley, France, 11-13 February, 2015
Embedded & Interconnected Devices - Converting the Physical World into an Information System
PAIoT Network: A Unique Regional IoT Network for Very Different Applications
A User Configurable Metric for Clustering in Wireless Sensor Networks
Distributed Clone Detection in Mobile Sensor Networks
AIRWISE - An Airborne Wireless Sensor Network for Ambient Air Pollution Monitoring
SCLD-ATP: Symmetric Coherent Link Degree, Adaptive Transmission Power Control for Wireless Sensor Networks
Sensor Localization using Signal Receiving Probability and Procrustes Analysis
Tunable Transmission Power to Improve 2D RSSI Based Localization Algorithm
Possible Uses for Animal Tracking and Sensor Data
Guidelines and Challenges Towards the Implementation of Intelligent Sensing Techniques in a Water Quality Prediction Application
System based Code Evaluation Criteria for CDM Applications in Sensor and Data Transmission Systems
Bayesian Multi-sensor Data Fusion for Target Identification - Applications in Naval and Ground based Command and Control Systems
A Relational Database and Key-value Store Combined Mechanism for Massive Heterogeneous Sensor Data Management
A Social-based Strategy for Memory Management in Sensor Networks
Event Classification from Sensor Data using Spectral Analysis in Robotic Finishing Processes
Portable Sensing of Organic Vapours based on a Single Semiconductor Sensor
The Impact of Diverse Execution Strategies on Incremental Code Updates for Wireless Sensor Networks
Design of an Unstructured and Free Geo-Coordinates Information Brokerage System for Sensor Networks using Directional Random Walks
A Minimal Cost, Soil Moisture Measurement System - Logging Wenner Array Resistivity with a Microcontroller for Less than 10 Euros
Security and Privacy Challenges for the Internet of Things
Real-Time Encoding/Decoding for Pairwise Communication Over an Unreliable Sensor Network
Towards Energy-efficient Collision-free Data Aggregation Scheduling in Wireless Sensor Networks with Multiple Sinks
A Tiny Laboratory under the Skin
SDN, NFV and the 5G Eco-system at the Service of IoT
Synthesis of Pd@ZnO Core-shell Nanoparticles with Different Size and Their Gas Sensing Properties
Uncertainty in Trilateration - Is RSSI-based Range Estimation Accurate Enough for Animal Tracking?
Modified RSSI Fingerprinting Algorithm with Reliability Factor for Wi-Fi based Indoor Navigation System
Compensation of the Antenna Polarization Misalignment in the RSSI Estimation
MASHCA: Monitoring and Hydro Climatological Analysis of the Urban Microclimate of Latacunga
A Smartphone-based Posture Measurement System for Physical Therapy Applications - Synchronization of Multiple Devices via Bluetooth Network
Application of Virtual Travel for Alzheimer's Disease
Optimization Techniques for Routing Design Problems over Wireless Sensor Networks: A Short Tutorial
Classification of Air Quality Inside Car Cabin using Sensor System
Using Embedded Sensors in Smartphones to Monitor and Detect Early Symptoms of Exercise-induced Asthma
Impact of Time Slot Adjustment on a Multi-hop and Multi-channel Solution for Dynamic WSN Topologies
A Concept for an Ultra-low Power Sensor Network - Detecting and Monitoring Disaster Events in Underground Metro Systems
Data Quality Issues in Environmental Sensing with Smartphones
A Comparative Performance Evaluation of Distributed Collision-free MAC Protocols for Underwater Sensor Networks
On the Effect of Sensing-holes in PIR-based Occupancy Detection Systems
A Model-based Approach for Self-healing IoT Systems - Position Paper
Using Learned Indexes to Improve Time Series Indexing Performance on Embedded Sensor Devices
Detecting Tunnels for Border Security based on Fiber Optical Distributed Acoustic Sensor Data using DBSCAN
Radio-Interferometric Object Trajectory Estimation
TandemStack - A Flexible and Customizable Sensor Node Platform for Low Power Applications
Mobile Drone Computing
SENSORNETS 2012 - Proceedings of the 1st International Conference on Sensor Networks, Rome, Italy, 24-26 February, 2012
Design of a Reconfigurable Multimodal Wearable Sensor Network (RMWSN) for Human Health and Ambience Monitoring
Towards Distortion-tolerant Radio-interferometric Object Tracking
Mutual Exclusion in Cyber-physical Systems
A New Kernel for Outlier Detection in WSNs Minimizing MISE
A flexible simulation methodology and tool for nanoarray-based architectures
On-Chip Transparent Wire Pipelining
Circuit implementation of a 600 MHz superscalar RISC microprocessor
Puppet: Energy Efficient Task Mapping For Storage-Less and Converter-Less Solar-Powered Non-Volatile Sensor Nodes
Formal Verification of the HAL S1 System Cache Coherence Protocol
ImprLM: An Improved Logarithmic Multiplier Design Approach via Iterative Linear-Compensation and Modified Dynamic Segment
Design Methodology of Regular Logic Bricks for Robust Integrated Circuits
Clustering-based revision debug in regression verification
Efficient exact and heuristic minimization of hazard-free logic
Minimizing Thermal Variation in Heterogeneous HPC Systems with FPGA Nodes
On the Coverage of Delay Faults in Scan Designs with Multiple Scan Chains
Static Test Compaction for Multiple Full-Scan Circuits
Fast MOS circuit simulation with a direct equation solver
The salvage cache: A fault-tolerant cache architecture for next-generation memory technologies
A Design Approach for Fine-grained Run-Time Power Gating using Locally Extracted Sleep Signals
Chameleon: Adaptive energy-efficient heterogeneous network-on-chip
A Selective Temporal and Aggressive Spatial Cache System Based on Time Interval
1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings
T2: A Highly Accurate and Energy Efficient Stride Prefetcher
NVDL-Cache: Narrow-Width Value Aware Variable Delay Low-Power Data Cache
Global and Local Attention-Based Inception U-Net for Static IR Drop Prediction
GIM: Versatile GNN Acceleration with Reconfigurable Processing-in-Memory
On Test Application Time and Defect Detection Capabilities of Test Sets for Scan Designs
Pre-layout Physical Connectivity Prediction with Application in Clustering-Based Placement
Imbalance-Aware Scheduler for Fast and Secure Ring ORAM Data Retrieval
Accurate Diagnosis of Multiple Faults
Complex Operator Synthesis
SCP: Synergistic cache compression and prefetching
Early resolution of address translation in cache design
Monitoring Temperature in FPGA based SoCs
A Self-Timed Divider Using RSD Number System
Pull-off buffer: Borrowing cache space to avoid deadlock for fault-tolerant NoC routing
Pipelined Multiplicative Division with IEEE Rounding
Critic: a knowledge-based program for critiquing circuit designs
A Flexible Design Methodology for Analog Test Wrappers in Mixed-Signal SOCs
Test architecture of the Motorola 68040
Applied statistical inference for system design and management
Synthesis of Asynchronous State Machines Using A Local Clock
Machine learning classifiers using stochastic logic
Theorem proving: not an esoteric diversion, but the unifying framework for industrial verification
Analysis of Shared Memory Misses and Reference Patterns
The Specialization of General Purpose Processor Architecture Elements for Programmable Digital Signal Processors
28th International Conference on Computer Design, ICCD 2010, 3-6 October 2010, Amsterdam, The Netherlands, Proceedings
Gate Sizing and V{t} Assignment for Active-Mode Leakage Power Reduction
Transcend Adversarial Examples: Diversified Adversarial Attacks to Test Deep Learning Model
Behavioral Synthesis for Easy Testability in Data Path Allocation
Quipu: High-performance simulation of quantum circuits using stabilizer frames
LightNorm: Area and Energy-Efficient Batch Normalization Hardware for On-Device DNN Training
An efficient systolic array for the discrete cosine transform based on prime-factor decomposition
A novel message switch for highly parallel systems
MPU: A N-Tuple Matching Processor
Adaptive ML-KEM: A Configurable HW-SW Architecture for Post-Quantum Cryptography
Digital calibration of RF transceivers for I-Q imbalances and nonlinearity
Design of a 20 MHz 64-tap transversal filter
FlexIO: A Scalable IO Chiplet Architecture with Flexible Memory Controller Mapping
TLV-HGNN: Thinking Like a Vertex for Memory-Efficient HGNN Inference
Distributed voting for fault-tolerant nanoscale systems
A Technique for Identifying RTL and Gate-Level Correspondences
Register Locking in an Asynchronous Microprocessor
Implementation and Evaluation of On-Chip Network Architectures
Design and Test - The Next Problems
Practical completion detection for 2-of-N delay-insensitive codes
A 2-Way Thrashing-Avoidance Cache (TAC): An Efficient Instruction Cache Scheme for Object-Oriented Languages
An Advanced Instruction Folding Mechanism for a Stackless Java Processor
Limits of backplane bus design
Modeling and Simulation of Design Errors
ParaCkpt: Heterogeneous Multi-Path Checkpointing Mechanism for Training Deep Learning Models
Methods and Algorithms for Converting IC Designs Between Incompatible Design Systems
On Combining Pinpoint Test Set Relaxation and Run-Length Codes for Reducing Test Data Volume
Understanding performance, power and energy behavior in asymmetric multiprocessors
Advanced Wiring RC Timing Design Techniques for Logic LSIs in Gigahertz Era and Beyond
CAGE: A Contention-Aware Game-Theoretic Model for Heterogeneous Resource Assignment
Sharing-Aware Efficient Private Caching in Many-Core Server Processors
GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors
Performance Evaluation of Configurable Hardware Features on the AMD-K5
WILD: A workload-based learning model to predict dynamic delay of functional units
Arithmetic Transforms for Verifying Compositions of Sequential Datapaths
Dynamic Reordering of Hgh Latency Transactions Using a Modified a Micropipeline
Cache allocation for fixed-priority real-time scheduling on multi-core platforms
Exploiting natural redundancy in visual information
Communication Sensitive Rotation Scheduling
A hierarchical approach towards system level static timing verification of SoCs
RECAST: Boosting Tag Line Buffer Coverage in Low-Power High-Level Caches "for Free"
Power Fluctuation Minimization During Behavioral Synthesis using ILP-Based Datapath Scheduling
FPGA-SPICE: A simulation-based power estimation framework for FPGAs
22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings
Efficient state assignment framework for asynchronous state graphs
A New Modulo 2 a + 1 Multiplier
How many logic levels does floating-point addition require?
Enhancing Transformer Inference Efficiency on FPGA Through Fully Fusion and Integer-Only Quantization Techniques
High speed VLSI logic simulation using bitwise operations and parallel processing
OpenDesign: An Open User-Configurable Project Environment for Collaborative Design and Execution on the Internet
Architectural Support for Run-Time Validation of Control Flow Transfer
GCC: Optimizing Space Efficiency and Read Latency of SSDs with Workload-Aware Garbage Collection Aided Compression
Automatic Synthesis of Composable Sequential Quantum Boolean Circuits
Software and Hardware Techniques for Reducing the Impact of Quantization Errors in Memristor Crossbar Arrays
New compact representation of multiple-valued functions, relations, and non-deterministic state machines
M2S-CGM: A Detailed Architectural Simulator for Coherent CPU-GPU Systems
PROPHID: A Heterogeneous Multi-Processor Architecture for Multimedia
Efficient Finite State Machine Encoding for Defending Against Laser Fault Injection Attacks
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Beyond Superscalar Using FPGAs
Enabling resonant clock distribution with scaled on-chip magnetic inductors
HPMA-Saber: High-Performance Polynomial Multiplication Accelerator for KEM Saber
Concurrent Error Detection in High Speed Carry-free Division Using Alternative Input Data
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic variability management in mobile multicore processors under lifetime constraints
Differential Routing of MCMs - CIF: The Ideal Bifurcation Medium
Flipping Modules to Minimize Maximum Wire Length
A Provable Near-Optimal Algorithm for the Channel Pin Assignment Problem
Threads vs. caches: Modeling the behavior of parallel workloads
A class of fault-tolerant cellular permutation networks
Multi-accelerator system development with the ShrinkFit acceleration framework
FitFuzz: Depth-Oriented Coverage-Guided Fuzzing via Fitness-Based Seed Scheduling
Fetch Halting on Critical Load Misses
ZNSKV: Reducing Data Migration in LSMT-Based KV Stores on ZNS SSDs
Adaptive TDMA bus allocation and elastic scheduling: A unified approach for enhancing robustness in multi-core RT systems
nOS: A nano-sized distributed operating system for many-core embedded systems
M5 based EDGE architecture modeling
BIRD: A Lightweight and Adaptive Compressor for Communication-Efficient Distributed Learning Using Tensor-wise Bi-Random Sampling
Algorithmic and Architectural Design Methodology for Particle Filters in Hardware
Design for hierarchical testability of RTL circuits obtained by behavioral synthesis
Exploring well configurations for voltage level converter design in 28 nm UTBB FDSOI technology
IasRT: Interference-Aware and SLO-Driven GPU Scheduling for Real-Time DNN Inference
Hardware/Software Partitioning of Multirate System Using Static Scheduling Theory
Object-Caching for Performance in Object-Oriented Systems
Small Footprint 6T-SRAM Design with MIV-Transistor Utilization in M3D-IC Technology
Architectural features of the i860(TM)-microprocessor RISC core and on-chip caches
Layout-Aware RF Circuit Synthesis Driven by Worst Case Parasitic Corners
A novel TSV probing technique with adhesive test interposer
Exploring Scalable Data Allocation and Parallel Computing on NoC-Based Embedded Many Cores
Phase-based passive stereovision systems dedicated to cortical visual stimulators
To model check or not to model check
FastLanes: An FPGA accelerated GPU microarchitecture simulator
BLPP: Improving the Performance of GPGPUs with Heterogeneous Memory through Bandwidth- and Latency-Aware Page Placement
Defect Tolerant SRAM Based FPGAs
Performance Driven Optimization of Network Length in Physical Placement
Optimization of Quantum Read-Only Memory Circuits
Towards cool and reliable digital systems: RT level CED techniques with runtime adaptability
A Superscalar RISC Processor with 160 FPRs for Large Scale Scientific Processing
A Pattern Generation Technique for Maximizing Power Supply Currents
Reusing cached schedules in an out-of-order processor with in-order issue logic
Dynamically Optimized Synchronous Communication for Low Power System on Chip Designs
Parallel decomposition of multipliers modulo (2 n ±1)
Arithmetic Pattern Generators for Built-In Self-Test
Crosstalk modeling to predict channel delay in Network-on-Chips
Efficient Place and Route for Pipeline Reconfigurable Architectures
Evaluating voltage islands in CMPs under process variations
Do Not Forget: Exploiting Stability-Plasticity Dilemma to Expedite Unsupervised SNN Training for Neuromorphic Processors
Improved Techniques for MCM Layer Assignment
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Efficient Thermal Simulation for Run-Time Temperature Tracking and Management
Trends in Computer-Based Systems Engineering
Accelerated SAT-based Scheduling of Control/Data Flow Graphs
A stochastic reconfigurable architecture for fault-tolerant computation with sequential logic
Design of sufficiently strongly self-checking embedded checkers for systematic and separable codes
Hermes: Architecting a top-performing fault-tolerant routing algorithm for Networks-on-Chips
Space Cutting Approaches for Repairing Memories
Test Path Generation and Test Scheduling for Self-Testable Designs
Thermal-Aware Clustered Microarchitectures
ASIC Accelerator in 28 nm for the Post-Quantum Digital Signature Scheme XMSS
Acquiring an exhaustive, continuous and real-time trace from SoCs
Speculative Computation for Coprocessor Synthesis
HF-LDPC: HLS-friendly QC-LDPC FPGA Decoder with High Throughput and Flexibility
A fast floor planning algorithm for architectural evaluation
Formal Modeling and Verification of NAND Flash Memory Supporting Advanced Operations
A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors
Compiler-Assisted Threshold Implementation against Power Analysis Attacks
ChaoSen: Security Enhancement of Image Sensor through in-Sensor Chaotic Computing
MxSICO: a silicon compiler for mixed analog digital circuits
Fault tolerant Four-State Logic by using Self-Healing Cells
DHeLlam: General-Purpose, Automatic Micro-Batch Co-Execution for Distributed LLM Training
A testable PLA design with low overhead and ease of test generation
Execute on Clear (EoC): Enhancing Security for Unsafe Speculative Instructions by Precise Identification and Safe Execution
VaLLR: Threshold Voltage Distribution Aware LLR Optimization to Improve LDPC Decoding Performance for 3D TLC NAND Flash
Exploring the state dependent SET sensitivity of asynchronous logic - The muller-pipeline example
Reducing the Latency and Area Cost of Core Swapping through Shared Helper Engines
Efficient Verification of Symmetric Concurrent Systems
Performance simulator based on hardware resources constraints for ion trap quantum computer
Module Generation for AND/XOR Fields (XPLAs)
Energy-Efficient Color Approximation for Digital LCD Interfaces
Analysis and Characterization of Ultra Low Power Branch Predictors
Sustainable Acceleration of Generative AI Neural Network Models with Silicon Photonics
XDMA: A Distributed, Extensible DMA Architecture for Layout-Flexible Data Movements in Heterogeneous Multi-Accelerator SoCs