yusuke1997/dblp-id-title huggingface dataset:
Predictive Integrators with Thermal Noise Cancellation
A Time-domain Blind Source Separation by the Newton Method
A 1.5 v high-speed class AB operational amplifier for high-resolution high-speed pipelined A/D converters
Thwarting Fault Attacks against Lightweight Cryptography using SIMD Instructions
Design of a cellular nonlinear network for analogue simulation of reaction-diffusion PDEs
A Low-Noise, High-Input-Impedance Pre-Amplifier for Piezoelectric MEMS Microphone
A farrow-structure-based multi-mode transmultiplexer
Directionally weighted color interpolation for digital cameras
A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow
Linear-in-dB Variable Gain Amplifier with PWL exponential gain control
A 7 bit 800MS/S SAR ADC with background offset calibration
An error diffusion technique with reduced directional hysteresis
Live Demonstration: Wireless Device for Pulse Wave Velocity Evaluation
Analog CMOS four-quadrant multiplier and divider
Existence, uniqueness and convergence properties of a linear optimization technique for two-dimensional signal and system modeling with rational functions
A Low Energy FFT/IFFT Processor for Hearing Aids
A variable step-size multichannel equalization algorithm exploiting sparseness measure for room acoustics
An active wave computing based path finding approach for 3-D environment
A 1Gbps-10 Gbps multi-standard auto-calibrated all digital phase interpolator in 14nm CMOS
Joint space-multipath-Doppler RAKE receiving in DS-CDMA systems over time-selective fading channels
Generalized arbitrary resizing for video transcoding
Ultra-low-power UWB for sensor network applications
A Hierarchical Compilation Method for Programmable Analog-to-Digital Converter Arrays
A Quantized Training Method to Enhance Accuracy of ReRAM-based Neuromorphic Systems
An active damping method for stabilization of cascaded connected two stage converter systems with constant power loads in DC microgrids
Numerical sine and cosine synthesis using a complex multiplier
Linearly precoded ST-OFDM systems in the presence of ISI
Combating digital noise in high speed ULSI circuits using binary BCH encoding
A fast and energy efficient binary-to-pseudo CSD converter
Usable speech measures and their fusion
A Systems View of a Neuromorphic VLSI Echolocation System
Detection of Denial of Service Attacks in Communication Networks
A 12-bit Current-Steering DAC with Calibration by Combination Selection
Hardware implementation of a centroid-based localization algorithm for mobile sensor networks
Design of Wireless In-Wheel Motor Drive with S/CP Compensation
A new hybrid circuit topology for simultaneous bidirectional signaling over on-chip interconnects
A second-order differential system for orthonormal optimization
Efficient Self-Adaptive Pseudo-Resistor with Rapid Settling and High Linearity for Neurorecording Front-End Circuits
vMOS-based sorters for multiplier implementations
Minimum-Cost Bounded-Skew Clock Routing
A New Approach to the Design of Three-Channel Perfect-Reconstruction Linear-Phase FIR Filter Banks
A fast bitplane combination algorithm for bitplane coded scalable image/video
A 0.6pJ/b 3Gb/s/ch transceiver in 0.18 µm CMOS for 10mm on-chip interconnects
Electronics design, assembly and reliability for high temperature applications
An Approximate Memory Architecture for a Reduction of Refresh Power Consumption in Deep Learning Applications
Detecting hard faults with combined approximate forward/backward symbolic techniques
A Two-Way Power-Combining 60GHz CMOS Power Amplifier with 22.0% PAE and 19.4dBm Psat in 65nm Bulk CMOS
Implementation aspects of a novel speech packet loss concealment method
Face detection from color images by iterative thresholding on skin probability maps
Unsupervised Analysis of Human Behavior based on Manifold Learning
A SAR ADC with energy-efficient DAC and tri-level switching scheme
Minimum crosstalk channel routing with dogleg
Nonlinear Dynamics in a Distributed Circuit
Group learning using contrast NMF : Application to functional and structural MRI of schizophrenia
A Low-Complexity Method to Address Process Variability in True Random Number Generators based on Digital Nonlinear Oscillators
A fast algorithm for routability testing
The Urbanek Black Box Arc Model in Passive Resonance Circuit Breakers for HVDC Applications
SPS: A Subjective Perception Score for Text-to-Image Synthesis
A subsampling bandpass SigmaDelta modulator with lumped and distributed resonators
A 19.7 TFLOPS/W Multiply-less Logarithmic Floating-Point CIM Architecture with Error-Reduced Compensated Approximate Adder
Clock jitter noise spectra in continuous-time delta-sigma modulators
Emergence of leadership in complex networks and human groups
An Oversampled Modulator for A/D Conversion with Minimized Analog Content
Efficient video transcoding between H.263 and H.264/AVC standards
A Hierarchical Design of an Application-specific Instruction Set Processor for High-throughput FFT
A low power MPEG I/II layer 3 audio decoder
Multi-level Attention Fusion for Multimodal Driving Maneuver Recognition
Low Power ASIP Architecture Optimization based on Target Application Profiling
Low-voltage gm-enhanced CMOS differential pairs using positive feedback
On-chip Principal Component Analysis with a Mean Pre-estimation Method for Spike Sorting
Algorithm for peak to average power ratio reduction operating at symbol rate
High-speed and wide-tuning-range LC frequency dividers
On Multiple Transition Branch Hidden Markov Models
Adaptive VC Partitioning for NoCs in GPGPUs
Probabilistic load-dependent cascading failure with limited component interactions
Bit-flipping LDPC under noise conditions and its application to physically unclonable functions
Planar inductors with interleaved conductors for integrated power applications
One-pass computation-aware motion estimation with adaptive search strategy
A new watermarking scheme on scan chain ordering for hard IP protection
A Wideband High PSRR Capacitor-Less LDO with Adaptive DC Level Shift and Bulk-Driven Feed-Forward Techniques in 28nm CMOS
Diminishment and Enlargement of Binary Pictures Using Slightly Space Variant Cellular Neural Network Architecture
Experimental study of impulsive synchronization
Synthesis of checker EFSMs from timing diagram specifications
Assessing the Vulnerability of Cyber-Coupled Power Systems to Component Failures
An Enhanced Dual-path DeltaSigma Analog-to-digital Converter
A high-speed domino CMOS full adder driven by a new unified-BiCMOS inverter
Low-Complexity and Low-Power Receiver for Solar-Cell-Based Optical Communications
Neural Modeling & Identification of Nonlinear Systems
Thunderstorm tracking system using neural networks and measured electric fields from few field mills
Genetic algorithm optimisation for evanescent mode waveguide filter design
Bandwidth enhancement of passive filters at mm-wave frequencies using effective negative group index (NGI) structures
Texture-assisted Kinect depth inpainting
Turning liabilities into assets: Exploiting deep submicron CMOS technology to design secure embedded circuits
VLSI design of dual-mode Viterbi/turbo decoder for 3GPP
A low dynamic power and low leakage power CMOS square-root circuit
Accelerating Vector Operations by Utilizing Reconfigurable Coprocessor Architectures
Matrix completion problems in multidimensional systems
Adaptive Smart Imager for Pulse Structured Light Vision
Analysis of a simple hysteresis network and its application for an effective associative memory
Quantitative evaluation of reliability and performance for STT-MRAM
Calibration of Capacitor Mismatch and Static Comparator Offset in SAR ADC with Digital Redundancy
Fogging-Effect-Aware Mixed-Signal IC Placement with Reinforcement Learning
Autonomous SoC for Neural Local Field Potential Recording in mm-Scale Wireless Implants
Efficient anti-aliasing algorithm for computer generated images
A multi-modal and tunable Radial-Basis-Funtion circuit with supply and temperature compensation
Fine-grain layered multicast based on hierarchical bandwidth inference congestion control
An adaptive projection pursuit filter for separating stationary interferences from nonstationary signals
Analysis of a hysteretic oscillator through a mixed time-frequency domain approach
Towards a Universal Methodology for Performance Evaluation of Electrical Impedance Tomography Systems using Full Reference SNR
Load adaptive multi-channel distribution and arbitration in unequal RF interconnected WiNoC
A Reconfigurable Approach for Deconvolutional Network Acceleration with Fast Algorithm
Observed hybrid oscillations in an electrical distribution system
Live Demonstration of Matlab Toolbox for Complex Ladder Filter Realizations
Rejection of narrow-band interference in BPSK demodulation using adaptive IIR notch filter
A real-time image denoising chip
Live demonstration: A CMOS-based lab-on-chip array for combined magnetic manipulation and opto-chemical sensing
On the functionality of RTD MOBILE circuits - A geometric approach
Mismatch effect analyses in CMOS tapered buffers
System-level verification on high-level synthesis of dataflow graph
Time Domain Based Modeling of Lossy Coupled Transmission Lines by Approximation of Transfer Functions
Identifying Influential Nodes in Complex Networks via Semi-Local Centrality
Design of a reference voltage buffer for a 10-bit 50 MS/s SAR ADC in 65 nm CMOS
A limited hardware resources efficient motion estimation algorithm
A 54dB-DR 1-GHz-bandwidth continuous-time low-pass filter with in-band noise reduction
A two-step radio receiver architecture fully embedded into a charge-sharing SAR ADC
A giga-hertz CMOS digital controlled oscillator
Modeling and Synthesis of Hardware-Software Morphing
Motion image sensor with on-chip adaptation and Programmable Filtering
A compact representation of a quantum controlled ternary barrel shifter
Enhanced direct mode coding for bi-predictive pictures
Design consideration for lowering sensitivity to out of band interference of negative feedback amplifiers
Design method for optimal step size matrix of the affine projection algorithm using semidefinite programming
Switching activity analysis and power estimation for multiple constant multiplier block of FIR filters
A Method for Improving the Efficiency of Simulating Large Electronic Circuits
A High-throughput Impedance Measurement IC with Baseline-Canceling Peak Detector
Efficient computation of transient responses of frequency-dependent nonlinearly loaded transmission lines
A tool for emulating neuromorphic architectures with memristive models and devices
Maximum likelihood disjunctive decomposition to reduced multirooted DAG for FIR filter design
Strict avalanche criterion in Boolean functions-a spectral approach
A CMOS Rail-to-Rail Linear VI-Converter
Wave propagation in oscillators coupled by time-varying resistor with timing mismatch
Live Demonstration: MIPA4k: A 64×64 Cell Mixed-mode Image Processor Array
Synthesis of RF CMOS Low Noise Amplifiers
Bulk carbon nanotube as thermal sensing and electronic circuit elements
A 7 nW, 1 kHz, -40-170°C Relaxation Oscillator with Switch-Leakage Compensation for Low-Power High-Temperature IoT Systems
A robust PRML read channel with digital timing recovery for multi-format optical disc
Novel Linearizaiton Circuit for BiCMOS Transconductors Used in High Frequency OTA-C Filters
Error spectrum shaping in closed-loop systems with state-estimate feedback controller
OTFS for Joint Radar and Communication: Algorithms, Prototypes, and Experiments
Browser-friendly hybrid codec for compound image compression
Fast integer linear programming based models for VLSI global routing
Development of Low-power and High-accuracy Wireless EEG Transmission System Using Compressed Sensing with an EEG Basis
Bootstrapped low-voltage analog switches
Energy-balancing strategies for wireless sensor networks
Simulation-based comparison of CNT-FETs and G-FETs from a circuit designer's perspective
Energy efficient on-chip power delivery with run-time voltage regulator clustering
Suspicious object detection using fuzzy-color histogram
BACF-Net: An Attention-Convolution Fusion Architecture for Learned Image Compression
FARMER: An Online-Learning Driven Methodology for Workload Consolidation on Large FPGAs
Integration of Thermal Inkjet into Over-Molded Substrates for Lab-on-CMOS Pumping Applications
Interference rejection in delay line based quadrature band-pass ΣΔ modulators
A 1.83 μW, 0.78 μVrms input referred noise neural recording front end
A 12.9-38.6-GHz CMOS LNA With Triple-Coupled Transformer-Based Input Matching Technique
Defining Analog Standard Cell Libraries for Mixed-Signal Computing Enabled through Educational Directions
A 2.4-GHz low complexity polar transmitter using dynamic biasing for IEEE 802.15.6
A Question Embedding-based Method to Enrich Features for Knowledge Base Question Answering
PMAC++: Incremental MAC Scheme Adaptable to Lightweight Block Ciphers
A Self-Test Approach Using Accumulators as Test Pattern Generators
Technology remapping for engineering change with wirelength consideration
A CMOS potentiostatic glucose monitoring system for VACNF amperometric biosensors
Sensory Particles with Optical Telemetry
Detecting and compressing dissolve regions in video sequences with a DVI multimedia image compression algorithm
Cost-Efficient SIMD ASIP Architecture for Mobile Touchscreen Controllers
A K-Band VCO Employing High Active Q-factor Defected Ground Structure Resonator in 0.18pm CMOS Technology
Robust high-pass and notch Gm-(grounded) C biquads: how many different topologies are there?
On the Design of a Jitter-Tolerant Synchronisation Subsystem for Optical Fibre PPM
High Speed FIR-Filter Architectures with Scalable Sample Rates
Nonuniform amplitude division for ABLMS equalisation
Improve GPGPU Front-end Efficiency Via Inter-Warp Instruction Sharing
Data-Free Learning for Lightweight Multi-Weather Image Restoration
Spike based learning with weak multi-level static memory
An ISM band CMOS integrated transceiver design for wireless telemetry system
Sensitivity and error reduction by component swapping in switched-current filters
Nonlinear Modeling and Voltage-Mode Control of DC-DC Boost Converter for CCM
The plenoptic videos: capturing, rendering and compression
Low power quantizer design in CT Delta Sigma modulators
Adaptive time delay estimation for sinusoidal signal
A Practical CMOS Companding Sinh Lossy Integrator
Scan based process parameter estimation through path-delay inequalities
A 2 V 2.4 GHz fully integrated CMOS LNA
FPGA implementation of digital filters synthesized using the frequency-response masking technique
A nonlinear equalizer based on estimation of RBF's centers
A 16-channel 24-V 1.8-mA power efficiency enhanced neural/muscular stimulator with exponentially decaying stimulation current
Exploring circuit robustness to power supply variation in low-voltage latch and register-based digital systems
A low-cost low-power non-volatile memory for RFID applications
Fast and robust differential flipflops and their extension to multi-input threshold gates
Regionally Adaptive Filtering for Asymmetric Stereoscopic Video Coding
An Energy Efficient System for Touch Modality Classification in Electronic Skin Applications
Design of reliable 2×VDD and 3×VDD series-parallel charge pumps in nanoscale CMOS
Sensing by growing antennas: A novel approach for designing passive RFID based biosensors
Structural analysis of a one-port formed by a resistively coupled nonlinear ring
A low voltage dual gate integrated CMOS mixer for 2.4GHz band applications
Characterization of Transistor Mismatch for Statistical CAD of Submicron CMOS Analog Circuits
A High throughput CABAC Encoder for Ultra High Resolution Video
Reference curves of the pantograph impedance in DC railway systems
A Nyquist-rate 128 GS/s 6-Bit 64x Time-Interleaved SAR ADC in 22nm FD-SOI
Detection of calcifications in digitized mammograms using wavelet packet analysis
Super-resolution from observations with variable zooming ratios
HSCIM: A High Security Compute-In-Memory Architecture with PUF based on TST-MRAM
Exponential periodicity of neural networks with delays
Extending the Transmission-Element Model for Mechanical Systems
Online adaptive data acquisition enabling ultra-low power real-world EEG
Efficient Comparison and Swap on Fully Homomorphic Encrypted Data
2-D bifurcation diagram of an oscillator based on PWL hysteresis
A new approach for computing canonical correlations and coordinates
Post-compensation of RF non-linearity in mobile OFDM systems by estimation of memory-less polynomial
Optimization techniques for cosine-modulated filter banks based on the frequency-response masking approach
Piezo-transducer's shape design as a pre-processing tool in guided wave inspections
Handover Management through Reconfigurable Intelligent Surfaces for VLC under Blockage Conditions
Pros and Cons of ST and SIG FinFET Inverters for Low Power Designs
Online Density Estimation Over High-Dimensional Data Streams
A1-GS/s 7-bit 3-then-1 bit/cycle SAR ADC with A Reconfigurable Reference-Embedded Comparator
A reliable 5V OTA in 3.3V CMOS technology
Realization of a floating-point A/D converter
Multiplier-free structures for exact generation of natural powers of integers
A Novel Approach for Fast and Accurate Mean Error Distance Computation in Approximate Adders
Partition SRAM and RRAM based synaptic arrays for neuro-inspired computing
Reduction of Test Power and Data Volume in BIST Scheme based on Scan Slice Overlapping
A hybrid DBNS processor for DSP computation
Super-resolution imaging with occlusion removal using a camera array
A quantized pulse coupled oscillator for slow clocking of peer-to-peer networks
Low-complexity SIMO buck-boost DC-DC converter for gigascale systems
Targeting ultra-low power consumption with non-uniform sampling and filtering
Performance evaluation of optimal DMT transceivers for ADSL application
Two-pass ℓp-regularized least-squares algorithm for compressive sensing
Improved differential coefficients-based low power FIR filters. Part I. Fundamentals
Performance evaluation of DCT and wavelet transform for LSI
Pattern emergence in strange attractors by directions of mappings
Compressive sensing recovery from non-ideally quantized measurements
A New Cost Function Allowing Parallel Processing of Adaptive Filters
Flip-Around Level-Shifting For Switched-Capacitor Amplifiers to Improve the Closed-Loop Settling of Floating-Inverter Amplifiers
Three-Input Ciphertext Multiplication for Homomorphic Encryption
An DFII based structure for 2-D separable-denominator digital filters with very low L 2 -sensitivity measure
Compensation technique for optimized efficiency and voltage controllability of IPT systems
Digital Self-Healing using Smart Sensing Technique for IQ Mismatch and LO Leakage against Non-Flat Path Response in mmWave Communication System
Level Shifters for Charge Constrained Applications
Hardware combinatorial optimization problems solver by hysteresis neural networks
Mitigating Catastrophic Forgetting in Deep Transfer Learning for Fingerprinting Indoor Positioning
A novel reconfigurable alias interference cancellation technique for A-to-D conversion
Improved Background Algorithms for Pipeline ADC Full Calibration
An RF Energy Harvester with MPPT Operating Across a Wide Range of Available Input Power
Characterization of Stacked PV Cell Configurations in a Deep N-Well 65nm CMOS Technology
A 10-bit 400-MS/s 170 mW 4-times interleaved A/D converter in 0.35µm BiCMOS
The Design of High Performance Low Cost BiCMOS Op-amps in a Predominantly CMOS Technology
High-speed tunable fractional-delay allpass filter structure
An on-chip waveform capturing technique pursuing minimum cost of integration
Optimal Coupling Pattern of Cyber-Physical Systems
A broadband indirect-feedback power-to-current LNA
Live Demonstration: An Application for Layout Resilience Analysis of Silicon Dangling Bond Logic
Low power enhancements for parallel algorithms
High voltage tolerant output buffer design for mixed voltage interfaces
Layered access control schemes on watermarked scalable media
On-chip digital inductor current sensor for monolithic digitally controlled DC-DC Converters
Quadrature direct digital frequency synthesis using fine-grain angle rotation
Comparative Study for Different Loop-Filter Architectures of 2x Time-Interleaved CT DSM
An improved ROM compression technique for direct digital frequency synthesizers
Frame Rate Up-conversion with Edge-weighted Motion Estimation and Trilateral Interpolation
On optimal bit loading for multitone ADSL
Gain/bandwidth programmable PA control loop for GMS/GPRS quad-band applications
Fade-in and fade-out detection in video sequences using histograms
91.282% Efficiency SIDO Buck-Buck Converter with Separate Positive and Negative Output Voltage in 40 nm CMOS Process
MLAE2: Metareasoning for Latency-Aware Energy-Efficient Autonomous Nano-Drones
A cost-effective histogram test-based algorithm for digital calibration of high-precision pipelined ADCs
Winner-take-all class AB input stage: a novel concept for low-voltage power-efficient class AB amplifiers
Utilizing sub-threshold technology for the creation of secure circuits
Frequency Synthesis Based on A Novel Differential Locking Mechanism
2T2M memristor-based memory cell for higher stability RRAM modules
Crosslink insertion for minimizing OCV clock skew
NoC monitoring: impact on the design flow
Resistive switching in organic memory devices for flexible applications
A 13 Bit 100 MS/s SAR ADC with 74.57 dB SNDR in 14-nm CMOS FinFET
A High-Speed Pipelined Degree-Computationless Modified Euclidean Algorithm Architecture for Reed-Solomon Decoders
Synthesis of Subband Hybrid Filter Banks ADCs with finite word-length coefficients using adaptive equalization
A 600mV 3.6mW 68dB DR 4th Order Analog Base Band Filter for WLAN Receivers
Transistor-level programmable MOS analog IC with body biasing
Data assimilation approach to analysing systems of ordinary differential equations
A novel DA-based architecture for efficient computation of inner-product of variable vectors
On-Line Voltage Stability Monitoring
An Ultra-Low Power Time-Domain based SNN Processor for ECG Classification
A neuromorphic VLSI grid cell system
Comparison of On-die Global Clock Distribution Methods for Parallel Serial Links
Chaos glial network connected to Multi-Layer Perceptron for Solving Two-Spiral Problem
Predictive control algorithm for phase-locked loops
Implementation of the transposed Farrow structure
SSMA: A Memory-Efficient Accelerator for State Space Model in the Mamba
Synchronization of bounded piecewise smooth systems
CMOS Cantilever-based Oscillator for Attogram Mass Sensing
Computerized Logo Synthesis with Wavelets-Enhanced Adversarial Learning
Equalizing data-path for processing speed determination in block level pipelining
A 1.2-V 1.35-μW all MOS temperature sensor for wireless sensor networks
A 1/1.12-inch $1.4\mu\mathrm{m}$-Pitch 50Mpixel 65/28nm Stacked CMOS Image Sensor using Mulitple Sampling
A VLSI architecture of a K-best lattice decoding algorithm for MIMO channels
Voltage Gain Enhancement by Conductance Cancellation in GaAs MESFET Opamps
Wireless Power Transfer for Smart Knee Implants
A 100dB dynamic range high-speed dual-line optical transient sensor with asynchronous readout
A tunable inductance topology to realize frequency tunable matching networks and amplifiers
INL based dynamic performance estimation for ADC BIST
Spurs-free single-bit-output frequency synthesizers for fully-digital RF transmitters
View synthesis prediction using skip and merge candidates for HEVC-based 3D video coding
A MPEG-7-aided segmentation tool for content-based video coding
Multi-Level Analog Computing-In-Memory FeFET-based Unit Cell for Deep Learning
A 360 V high voltage reconfigurable charge pump in 0.8 μm CMOS for optical MEMS applications
A neural architecture for the parameter extraction of high frequency devices [MMICs]
A neural network approach for solving the path planning problem
An 11-bit 20-MSample/s pipelined ADC with OTA bias current regulation to optimize power dissipation
Towards the Multi-Gigabit Ethernet for the Automotive Industry
A 10-bit asynchronous SAR ADC with scalable conversion time in 0.18μm CMOS