yusuke1997/dblp-id-title huggingface dataset:
TG-in-DRAM: A Transmission Gate based Full Adder using Multi-row Activation for enhanced Throughput in CIM Architectures
Delay-line-based signal processing ASIC for velocity selective nerve recording
A novel inter-area oscillation damping design based on wide area measurements
Synthesis of optimal OTA-C filter structures with arbitrary transmission zeros via MINLP
Baseband receiver design for 3GPP Long Term Evolution downlink OFDMA systems under fast-fading channels
On-chip ESD protection design for radio-frequency power amplifier with large-swing-tolerance consideration
Pipelined Computing-in-Memory Macro with Computation-Memory Aware Technique
On-site Data Storage via Website or LineBOT
Voltage averaging technique for improving the resolution of two-capacitor DAC
A novel basic unit level rate control algorithm and architecture for H.264/AVC video encoders
Simultaneous layer-aware and region-aware partitioning for 3D IC
Hopfield neural networks with problem perturbing noise
A novel hybrid Matched Filter structure for IEEE 802.22 standard
A 76nW, 4kS/s 10-bit SAR ADC with offset cancellation for biomedical applications
0.8 V GPS band CMOS VCO with 29% Tuning Range
Bangla triphone HMM based word recognition
A location map-free visible and reversible watermarking method with authentication ability
Generalized matrix method for efficient residue to decimal conversion
Low-power counter for column-parallel CMOS image sensors
Continuous wave (CW) sub-Terahertz (sub-THz) detection by Plasma Wave in High Electron Mobility Transistor (HEMT)
Decentralized coordinated robust adaptive control for AC/DC interconnected power systems based on WAMS
A Self-coupled DT MASH ΔΣ Modulator with High Tolerance to Noise Leakage
Impact of circuit nonidealities on the implementation of switched-capacitor resonators
A Dynamic JPEG CODEC with Adaptive Quantization Table for Frame Storage Compression
High-Performance Low-Power Full-Swing Full Adder Cores with Output Driving Capability
High-performance 3D-SRAM architecture design
A low-power, reconfigurable smart sensor system for EEG acquisition and classification
Accurate and low-cost DOA estimation method using array covariance matrix elements
Symmetry Development for Implementing Odd-Order Lagrange-Type Variable Fractional-Delay Filters
A Low Voltage CMOS Current Comparator with Offset Compensation
Design of a green mode PWM control IC
An Implantable SOC Chip for Micro-stimulating and Neural Signal Recording
Efficient modulation on the performance of coherent receivers for pseudo-chaotic TH-UWB system
Effect of articulatory Δ and ΔΔ parameters on multilayer neural network based speech recognition
A Robust Anti-collusion Coding in Digital Fingerprinting System
Sub-path delay estimation for reconvergent path
Total Dose and Single Event Effects on 16 Mbit Standalone Spin-Transfer Torque MRAM with 45 nm CMOS Technology
A new ZCT precoded OFDM system with pulse shaping: PAPR analysis
A mobile intelligent sphygmogram analyzer
Using Unstable SRAM Bits for Physical Unclonable Function Applications on Off-The-Shelf SRAM
Novel High Speed and Low Power Single and Double Edge-Triggered Flip-Flops
A 18.9dB conversion gain folded mixer for WiMAX system
An FPGA implemented 24-bit audio DAC with 1-bit sigma-delta modulator
A comparative study of a low doppler shift in a carrier tracking loop for GPS
A 2V 3.8µW Fully-Integrated Clocked AC-DC Charge Pump with 0.5V 500Ω Vibration Energy Harvester
Graph Saliency Network: Using Graph Convolution Network on Saliency Detection
Should We Code Differently When Using Approximate Circuits?
Simplification of Exclusive-or Sum-of-Products Expressions Through Function Transformation
An 8 Gbps, 4: 1 transition-aware self-toggling multiplexer
D2D-GPT: Leveraging Incremental Learning GPT for Seamless Design Rule Conversion Across EDA Tools
Two-step windowing technique for wide range motion estimation
A generalized eigenvalue decomposition processor for multi-user MIMO precoding
Car recognition using Gabor filter feature extraction
A realization of digital filter banks for reconstruction of uniformly sampled signals from nonuniform samples
A unified flagged prefix constant addition-subtraction scheme for design of area and power efficient binary floating-point and constant integer arithmetic circuits
Dynamic output-feedback control for descriptor Markovian jump T-S fuzzy systems with model uncertainty
Deep Neural Network based on Genetic Algorithm and Ensemble Methods for Regional Solar Power Forecasting in Thailand
Process and Design Considerations for Spin Orbit Torque MRAM
Implementation of a H.264 decoder with Template-based Communication Refinement
Research of Phase-Inversion Symmetric Modulation Based on DSB Communication System
On-Chip True-Random Bit Generator Through a Robust Tent-Based Chaotic Map
Some charactistical aspects of MarkRead-a software package for automatic mark data entry
A Highly-Efficient Power Amplifier for V-band Inter-Satellite Link Applications
An area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction
A High-Impedance 3-MOSFET Pseudo-Resistor for Instrumentation Amplifiers of Biomedical Sensors
Multi-direction search algorithm for block motion estimation in H.264 encoder
Subword Parallel Architecture for Connected Component Labeling and Morphological Operations
An ultra-low-power variable-accuracy bit-serial FFT butterfly processing element for IoT sensors
Fourier-Domain OCT Imaging Processor with Improved Memory Efficiency
A Low-Power Approximate Multiplier with Sign-Focus Compressor and Error Compensation
Unconstrained IIR filter design method using argument principle based stability criterion
On an Efficient Closed Form Expression to Estimate the Crosstalk Noise in the Circuit with Multiple Wires
A Low Power Sample-and-Hold Circuit with Improved Dynamic Bias for Pipelined ADC
2PADCL: Two Phase drive Adiabatic Dynamic CMOS Logic
A switch IC implemented by four depletion-mode field effect transistors for dual-band GSM switch diplexer module
Design of Matrix Filter Using Discrete Cosine Transform and Path Graph
Accelearation of Full-Search Algorithm on SIMD Architectures by Using Eight-Bit Partial Sums of Four Luminance Values
A Hybrid Method for Signal Probability Estimation with Combinational Circuits
A Novel Constant-pulse Scheme for Synchronous Half-bridge Converter Module
A CMOS Transimpedance Amplifier Accommodating Wide CPD and Input Bias Range for Chaos Lidar
High-Speed and Low-Complexity Modular Reduction Design for CRYSTALS-Kyber
Electrochromic display driving scheme for high dynamic range image capture
Dual Mode Architecture for Deblocking Filtering in H.264/AVC Video Coding
Comparison of Filter Bank Based Multicarrier Systems with OFDM
A Deep Learning Modeling Attack Method for MISR-APUF Protection Structures
How to Construct a Resonable Teaching Quality Assurance System in Universities
Energy Efficient Bootstrapped Driver for a Particle Detector in 180 nm SOI Technology
A Differential RF Front-end CMOS Transformer Matching for Ambient RF Energy Harvesting Systems
Power Efficient Hardware Fingerprint: Exploiting Process-Variations in A Quasi-Planar 14nm FinFET
A Low-cost Electrical System with High Compliance of Supply Voltage for Deep Brain Stimulation on Rats
A decoupling-controlled STATCOM for power quality improvement of impact loads
An Efficient On-Chip Storage Solution for CNN Accelerator Based on Self-tuning and Co-scheduling
Real-time deblocking filter for MPEG-4 systems
Noise and linearity analysis for a 1.9 GHz CMOS LNA
A Novel Low-Power Shift-Register Controller for Digital Low-Dropout Regulators
LD-MDCT Quantization Algorithm Optimization and FPGA Realization Using DUTSQ and SFDP Techniques
Progressive Technique for Rate Distortion Optimization in JPEG2000
A Comparative Analysis of SiC MOSFET Performance in a Traction Inverter
A low cost real-time intelligent taximeter sensor
A Robust Correlation Method for Solving Permutation Problem in Frequency Domain Blind Source Separation of Speech Signals
Patterns Detection and Recognition in Visual Aided System for Prosthesis Pose Estimation during Total Hip Replacement Surgery
Electronic Shelf Label System based on public illuminating network
Image enhancement using DCT-based matrix homomorphic filtering method
Design of Low-Power 6T Adiabatic PUF Circuit
A New Multiscale Line Detection Approach for Aerial Image with Complex Scene
A modularized 3D heterogeneous system integration platform
Simplifying HOG arithmetic for speedy hardware realization
A 12-bit 20-MS/s SAR ADC With Fast-Binary-Window DAC Switching in 180nm CMOS
Chip size estimation based on wiring area
Pragmatic EDA Flow Runtime Prediction with Machine Learning and Automatic Outlier Removal
Unequal-arm Adaptive Rood Pattern Search with Early Terminations For Fast Block-matching Motion Estimation on H.264
Propagation Delay Minimization on RLC-Based Bus with Repeater Insertion
40-nm 2×VDD Digital Output Buffer Design With DDR4-Compliant Slew Rate
Low-complexity systolic multiplier over GF(2 m ) using weakly dual basis
An Efficient Standard Cell Design Methodology by Exploiting Body Biasing and Poly Biasing in FDSOI for NTV Regime
Efficient hardware architecture of deterministic MPA decoder for SCMA
Multiplier-less and compact FPGA implementation of Mihalas-Niebur neuron
Study on assessment model of event-type power disturbances
Sensitivity of FinFET Adders to PVT Variations and Sleep Transistor as a Mitigation Strategy
Simplified forced convergence decoding algorithm for low power LDPC decoders
Design of Novel Systolic Array based NTT for CRYSTALS-Kyber scheme
A Dynamic Approximation Processor Based on Out-of-Order RISC-V in 28-nm CMOS
Revealing the Unknown Parameters of a Microcomputer-Based Random Number Generator
Improving the artificial odor and gas source localization system using the semiconductor gas sensor based on RF communication
Digital signal processing in electrical capacitance tomography
Implementation of web-based system for building damage assessment on online network: Case studies of Typhoon MAN-YI (1318) and Typhoon WIPHA (1326) in Japan
Gramian-Preserving Frequency Transformation for State-Space Digital Filters
SoC Design of Speaker Connection System by Efficient Cosimulation
A Calibration Scheme for Nonlinearity of the SAR-Pipelined ADCs Based on a Shared Neural Network
Noise Reduction of Segmented Images by Spatio-Temporal Morphological Operations
Embedded hybrid LDO topologies for digital load circuits
Multi-Chips High-Speed and High-Voltage Amplifier
Sufficient conditions for non-negative impulse response of arbitrary-order systems
A fully-differential subthreshold SRAM cell with auto-compensation
Design of a Low-Power LNIA-ADC Interface Circuit in 22nm FDSOI for a Thermopile Sensor in Biomedical Application
High-order delta-sigma modulator with switched-current feedback memory cell
A 90nm CMOS wide-band voltage-controlled ring oscillator for digital TV-tuner
Weighted adders with selector logics for super-resolution and its FPGA-based evaluation
PIM architecture exploration for HMC
A hierarchical standard cell placement method based on a new cluster placement model
A new gradient-based algorithm using variable step-size technique and its application [adaptive IIR notch filter]
A low voltage floating resistor having positive and negative resistance values
An extreme learning machine approach for training Time Variant Neural Networks
License Plate Localization of Moving Vehicles in Complex Scene
A 50-Gb/s NRZ Receiver Targeting Low-Latency Multi-Chip Module Optical I/O in 45-nm SOI CMOS
A note on the energy-aware mapping for NoCs
Large Network of Wide- Range Analog Voltage Observers for Debug & Testability
Inverse dynamics of 3-RRRT parallel manipulator
Processor frequency assignment in three-dimensional MPSoCs under thermal constraints by polynomial programming
Real-Time Zero-Phase Digital Filter Using Recurrent Neural Network
A post-processing scan-chain watermarking scheme for VLSI intellectual property protection
Synthesis of Delay Equalized Time-Varying Butterworth Filters
A high performance four-parallel 128/64-point radix-2 4 FFT/IFFT processor for MIMO-OFDM systems
A Robust Overdesign Prevention Circuit Technique Under Widely Varying Ambient Conditions
Power-flow simulation with visualization function based on IEEE common data format
Wire density driven top-down global placement for CMP variation control
SEED masking implementations against power analysis attacks
Gate speed improvement at minimal power dissipation
Body-bootstrapped-buffer circuit for CMOS static power reduction
Design of high voltage digital-to-analog converter for electrical stimulator
Stability analysis of a generalised 2D digital Roesser type systems via lagrange method
High-performance floating-point VLSI architecture of lifting-based forward and inverse wavelet transforms
Prospects and Challenges of Handling Power Bus Modeling and Supply Noise in Package-Chip C0-design Approach
A CMOS adiabatic inverter operating with a single clock power supply to reduce non-adiabatic loss
Calibration of Low-Cost Particle Sensors by Using Machine-Learning Method
Analysis of time delay effects on wide area damping control
A 1-V DTMOS-Based fully differential telescopic OTA
Ku band voltage controlled oscillator on SiGe
Combined MPSoC Task Mapping and Memory Optimization for Low-Power
An Improved Multi-Objective Optimization Framework for Soft-Error Immune Circuits
Efficient protocol converter generation for system integration
Reduced-Dimension Single Data Set Detection Algorithms
Symbolic analysis of the Tau Cell log-domain filter using affine MOSFET models
Image Enhancement Algorithm for Hexagonal Cellular Neural Networks
High-Efficiency Wilkinson-Power-Combining Class-EF Amplifier with Lumped-Element Load Network
A Clustering ILP Model for Fast Instruction Selection in Embedded Applicated Specific Processor Design
Configuration representation of a link-type self-reconfigurable mobile robot
A new method of multichannel loudness compensation for hearing aids
Optimal register assignment with minimum-delay compensation for latch-based design
Independent Tunable-Q Current-mode OTA-C Universal Filter
Fully-differential inverter-based OTA with improved composite transistors
Predicting Beam Switching Directions in Ultra Wideband Spiral Antennas Using Machine Learning Algorithms
A BiCMOS Low Voltage Low Distortion Class AB Amplifier
New architecture for envelope-tracking power amplifier for base station
Real-Time Estimation of Respiratory Rate Using Contactless FMCW Radar with Adaptive Filtering for Various Breathing Patterns
A 12-bit CMOS Current Steering D/A Converter for Embedded Systems
A New Thermal-Conscious System-Level Methodology for Energy-Efficient Processor Voltage Selection
Analytical design of arbitrary oriented asteroidal 2-D FIR filters
Equiripple FIR triple narrow band filters
The design and algorithm mapping of a heterogeneous multi-core processor for SDR
Autoencoder-Based Anomaly Detection for Time Series Data in Complex Systems
A 32dBm OOB-IIP3 BW-Extended 5G-NR Receiver with 4 th -Order Gain-Boosted N-Path LNA
Optical front-end receiver configuration for 30 GHz millimeter-wave signal Radio over Fiber system
A self-timing switch-driving register by precharge-evaluate logic for high-speed SAR ADCs
Enhanced tuneable coupled inductor for ultra-wide variable centre frequency LC filters
A new VLSI 2-D diagonal-symmetry filter architecture design
Ternary In-Memory MAC Accelerator With Dual-6T SRAM Cell for Deep Neural Networks
Two-dimensional placement method based on divide-and-replacement
A Resource-Efficient Weight Quantization and Mapping Method for Crossbar Arrays in ReRAM-based Computing-in-Memory Systems
Utilizing register transfer level false paths for circuit optimization with a logic synthesis tool
Physics-based Modeling and Simulation of Dual Material Gate(DMG) LDMOS
A systematic methodology for design and analysis of approximate array multipliers
A 500-MS/s 9-Bit Time-Domain ADC Using a Nonbinary Successive Approximation TDC
Dalvik bytecode acceleration using Fetch/Decode Hardware Extension with hybrid Execution
Stress Evolution Analysis of EM-Induced Void Growth for Multi-Segment Interconnect Wires
Adaptive Cholesky based MMSE equalizer in GSM
GRS: A General RISC-V SIMD Vector Acceleration Processor for Artificial Intelligence Applications
Adaptive Prediction, Context Modeling, and Entropy Coding Methods for CALIC Lossless Image Compression
Prototype Filter Design for a Cosine-Modulated Filterbank Transmultiplexer
Secure and Tamper-resilient Distributed Ledger for Data Aggregation in Autonomous Vehicles
A novel 6.5 pJ/pulse impulse radio pulse generator for RFID tags
Secure wireless communications using secret sharing and vector coding
A Switched-Capacitor Cross-Correlation-Based Time-of-Flight Design for Pulsed Chaos Lidar Systems
Design of IP Media Server for Voice Conference Application
The high-resolution multi-tone signal generators
Efficient time varying frequency tracking using recursive estimation
A High-Speed and Low-Complexity Architecture for Softmax Function in Deep Learning
A Fast Watermarking System for H.264/AVC Video
CAN compression using signal rearrangement
The evolution and developing tendency of DAC design methods
Frontalization with Adaptive Exponentially-Weighted Average Ensemble Rule for Deep Learning Based Facial Expression Recognition
Low-jitter PLL by interpolate compensation
0.7-6 GHz Programable Gain Push-Pull Driver PA Based on Dual-Loop Biases
MC flow graphs with hybrid nodes
Unified Signed-Digit Number Adder for RSA and ECC Public-key Cryptosystems
Linear Precoding For MIMO STC-OFDM And Blind Channel Estimation
A pipelined SAR ADC with loading-separating technique in 90-nm CMOS technology
DCT Sign Only Correlation and Its Application to Image Registration
A low-power RF front-end of passive UHF RFID transponders
Support vector machines based on Lyapunov exponents in power load forecasting model
An Improved Soft-Input CAVLC Decoder for Mobile Communication Applications
Improved Angle Freeman Chain Code Using Improved Adaptive Arithmetic Coding
Non-blind audio-watermarking using compression-expansion of signals
A 250.3μW Versatile Sound Feature Extractor Using 1024-point FFT 64-ch LogMel Filter in 40nm CMOS
Increasing the energy efficiency of WSNs using algebraic soft-decision reed-solomon decoders
A new offset cancelled latch comparator for high-speed, low-power ADCs
A cellular-automaton-type image extraction algorithm and its implementation using an FPGA
A new family of robust sequential partial update least mean M-estimate adaptive filtering algorithms
Generation of Panoramic Image from Aerial Video utilizing JP2K Wavelet for River Surveillance
High density bit-serial FPGA with LUT embedding shift register function
Analysis and Design of High-Speed and Low-Distortion Bootstrapped Switches
Efficient hole filling and depth enhancement based on texture image and depth map consistency
Study on Complex Behavior in Phase-Shifting Full-Bridge ZVS Converter
DeAr: A framework for power-efficient and flexible embedded digital signal processor design
Theoretical and Experimental Analysis of Traveling Salesman Walk Problem
A smart domestic refrigerator with energy efficiency improvement
The research of chaotic communication on condition of limited channel bandwidth
Novel March Test Algorithm Optimization Strategy for Improving Unlinked Faults Detection
Super-resolution image by curve fitting in the threshold decomposition domain
Space-Time Decision-Directed Equalizer for SIMO Systems based on Affine Projection Algorithm
Omnidirection image restoration based on spherical perspective projection
Importance of Multi-parameter SAT Attack Exploration for Integrated Circuit Security
On accuracy of averaging for switched converters
Design and modeling of MEMS resonator for magnetic field sensing using hybrid actuation technique
A 0.6-V power efficient digital LDO with 99.7% current efficiency utilizing load current aware clock modulation for fast transient response
0.8-µW CMOS bulk-driven linear operational transconductance amplifier in 0.35-µm technology
A Reliable and Economical Test Method for Semiconductor Device Aging
A design of low complex log likelihood ratio for MIMO decoder using the bit shift
Study on Single Event Burnout Effect for 18V LDMOS Based on 0.18µm Process Technology
A Circuit Implementation Method for Memristor Crossbar with On-chip Training
TSV-aware 3-D IC structural planning with irregular die-size
Improvement and evaluation of the wireless ad hoc network protocol FORP for inter-vehicle communications
Linear programmable gain amplifier using reconfiguration local-feedback transconductors
Complexity Based Fast Coding Mode Decision for MPEG-2 / H.264 Video Transcoding
An offset self-correction sample and hold circuit for precise applications in low voltage CMOS
A multi-rate SerDes transceiver for IEEE 1394b applications
Efficient Dilution of a Fluid from its Related Arbitrary Stock Solutions using MEDA Biochips
Resource monitoring for cluster computing with application to parallel motion estimation
A 12-bit 200-kS/s SAR ADC with hybrid RC DAC
Dynamical systems design of nonlinear oscillators using phase reduction approach
Multi-Gb/s multi-mode LDPC decoder architecture for IEEE 802.11ad standard
A wireless energy link for endoscopy with end-fire helix emitter and Load-Adaptive power converter
Analog filters design in VLC analog front-end receiver for reducing indoor ambient light noise
Low Power Low Noise and High Sensitivity FSK/OOK Wake-Up Receiver
Implementation of topological circuit reduction
Synchronization Issues in OFDM Systems
System approximation via GA-based fuzzy model
Footstep Recognition with Psyco-acoustics Parameter
A low power consumption, high speed Op-amp for a 10-bit 100MSPS parallel pipeline ADC
A 4-bit 1.356 Gsps ADC Using Current Processing Method
Design of Hermite Polynomial Graph Filter and Its Application to Sensor Network Data Denoising
A full current-mode sense amplifier for low-power SRAM applications
Synchronization and power integrity issues in 3-D ICs
Design of UWB waveforms for narrowband interferences suppression
A Novel Systematic Approach for Synthesizing Multiplication-Free Highly-Selective FIR Half-Band Decimators and Interpolators
A top-down, mixed-level design methodology for CT BP ΔΣ modulator using verilog-A
Design of Integrated Circuit Hard Defect Location System Based on Thermal Laser Stimulation
Lossless EEG Compression Algorithm Based on Semi-Supervised Learning for VLSI Implementation
Energy analysis of bipartition architecture for pipelined circuits
The irradiation effect of DC-DC power converter under X-ray
Enhancing Finite State Machine Design Automation with Large Language Models and Prompt Engineering Techniques
Programmable fuzzy logic controller circuit on CPLD chip
Design and Hardware Implementation of a STT-MRAM Based SoC Architecture for Smart Card Chip
An Energy-Efficient Mixed-Bit ReRAM-based Computing-in-Memory CNN Accelerator with Fully Parallel Readout
Investigation of synchronization for social network with local bridge via coupled Rulkov maps
The affine transform and feature fusion for robust speaker identification in the presence of speech coding distortion
A Vector Pair Based DWA Algorithm for Linearity Enhancement of CDACs in the NS-SAR ADC
Travelling route of mobile surveillance camera
A Chip-Area-Efficient Subthreshold CMOS Voltage Reference with High PSRR Based on Compensated ΔVGS of NMOS Transistors
Sub-1V capacitor-free low-power-consumption LDO with digital controlled loop
An ultra-low power multi-tunable triangle wave generator with frequency and amplitude control
Texture-based fast CU size decision algorithm for HEVC intra coding
ABB Assisted Area Efficient Vernier Delay Line Time-to-Digital Converter for Low Voltage Applications
Efficient Techniques for Extending Service Time for Memristor-based Neural Networks
Reliability Improvement of a Distribution System Using PV Grid Connected System with Tie Switch
Ternary Systolic Array Architecture for Matrix Multiplication in CNFET-Memristor Technology
Low Complexity High Quality Fractional Motion Estimation Algorithm and Architecture Design for H.264/AVC
A low-power bio-sensor interface with wide measurement range