yusuke1997/dblp-id-title huggingface dataset:
Structured Neural Network with Low Complexity for MIMO Detection
Effects of Varying Message Precision in Digit-Online LDPC Decoders
Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2009, October 7-9, 2009, Tampere, Finland
A Modified Serial Commutator Architecture for Real-Valued Fast Fourier Transform
Dynamic Channel Flow Control of Networks-on-Chip Systems for High Buffer Efficiency
Propagation of LLR Saturation and Quantization Error in LDPC Min-Sum Iterative Decoding
Automated derivation of NoC Communication Specifications from Application Constraints
Wavelet Based Lossless Video Compression Using Motion Compensated Temporal Filtering
A Low Cost Packet Detector in OFDM-Based Ultra-Wideband Systems
Stride History Image: A New Feature Representation for Pedestrian Identification
Low-Power Saturated Arithmetic and its Application in VLSI Architectures for OFDM Modems
Scalable Hardware Architecture for Invertible Logic with Sparse Hamiltonian Matrices
Odd type DCT/DST for video coding: Relationships and low-complexity implementations
Efficient self-correction scheme for static non-idealities in nano-scale quadrature digital RF transmitters
Distributed Memory Allocation Technique for Synchronous Dataflow Graphs
Source Enumeration in Large Arrays Based on Moments of Eigenvalues in Sample Starved Conditions
On the Narrowband Interference Cancellation Scheme in OFDM Communication Systems in Frequency Selective Fading Channels
Architectural support for the orchestration of fine-grained multiprocessing for portable streaming applications
Architecture Design of Convolutional Neural Networks for Face Detection on an FPGA Platform
Reconfıgurable and selectively-adaptive signal processing for multi-mode wireless communication
Architectural Study of HOG Feature Extraction Processor for Real-Time Object Detection
PRESS/HOLD/RELEASE Ultrasonic Gestures and Low Complexity Recognition Based on TCN
New Min-Sum Decoders Based on Deep Learning for Polar Codes
Mobile Positioning System Based on Virtual Base Station Transform and Convex Optimization
Low-power pre-decoding based viterbi decoder for tail-biting convolutional codes
Systematic Luby Transform Codes and Their Soft Decoding
Energy-efficient vision on the PULP platform for ultra-low power parallel computing
Reconfigurable 3D Edge Sensing System of Carbon Nanotube Sensing and Silicon CMOS from a Commercial Manufacturing Facilities
A novel circulant approximation method for frequency domain LMMSE equalization
Stochastic BP Polar Decoding and Architecture with Efficient Re-Randomization and Directive Register
Low-Overhead Run-Time Scheduling for Fine-Grained Acceleration of Signal Processing Systems
A modified gradient descent bit flipping decoding scheme for LDPC codes
Low complexity belief propagation polar code decoder
Complexity Estimation for Load Balancing of 360-Degree Intra Versatile Video Coding
Compressed sensing based MR image reconstruction from multiple partial K-space scans
Gearbox Fault Diagnosis Using Power Spectral Analysis
Adaptive resource scheduling for energy efficient QRD processor with DVFS
Rainbow Artifacts from Electromagnetic Signal Injection Attacks on Image Sensors
Multi-level modulation soft-decision demapper for DVB-S2
A Robust Band-Tracking Packet Detector (BT-PD) in OFDM-Based Ultra-Wideband Systems
An Efficient Parallel Architecture for Resource-Shareable Reed-Solomon Encoder
A Channel-Adaptive Early Termination strategy for LDPC decoders
Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2006, Proceedings, October 2-4, 2006, Banff, Alberta, Canada
Montgomery Modular Multiplication Algorithm on Multi-Core Systems
An on-off receiver array for low-power scaling of mmWave massive MIMO
Sparse-Clustered Network with Selective Decoding for Internet Traffic Classification
Understanding the Energy vs. Adversarial Robustness Trade-Off in Deep Neural Networks
Design and Deployment of Mobile Air Quality Monitoring System Using Node-RED and MQTT
An implementation of turbo equalization using cyclic prefix in LTE downlink system
Efficient interpolration architecture for soft-decision Reed-Solomon decoding by applying slow-down
Accelerating integer-based fully homomorphic encryption using Comba multiplication
GrateTile: Efficient Sparse Tensor Tiling for CNN Processing
Implementation of Low-Latency Signal Processing and Data Shuffling for TDD Massive MIMO Systems
Video decoder reconfigurations and AVS extensions in the new MPEG reconfigurable video coding framework
Efficient ordering schemes for sphere decoder
Efficient image reconstruction using partial 2D Fourier transform
Efficient Model Evidence Computation in Tree-structured Factor Graphs
FPGA Implementation of Pipelined Architecture for Optical Imaging Distortion Correction
A Dedicated Approach to Explore Design Space for Hardware Architecture of Turbo Decoders
On The Identification of Snow Movements on Roads
A shuffled iterative bit-interleaved coded modulation receiver for the DVB-T2 standard: Design, implementation and FPGA prototyping
Robust Packet Detector based Automatic Gain Control Algorithm for OFDM-based Ultra-WideBand systems
Reliable compressive sensing (CS)-based multi-user detection with power-based Zadoff-Chu sequence design
A 100MHz real-time tone mapping processor with integrated photographic and gradient compression in 0.13 mum technology
Energy Efficient Turbo Decoder with Reduced State Metric Quantization
Reduced complexity ADMM-based schedules for LP decoding of LDPC convolutional codes
Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2008, October 8-10, 2008, Washington, D.C. Metro Area, USA
Multilevel Linc System Design for Power Efficiency Enhancement
Bearing Finding and Array Error Correction in Noncooperative Passive Detection
An Efficient Polynomial Multiplier Architecture for the Bootstrapping Algorithm in a Fully Homomorphic Encryption Scheme
Design Space Exploration of DSP Applications Based on Behavioral Description Models
Nanopore DNA Sequencing Channel Modeling
An early block type decision method for intra prediction in H.264/AVC
A Reduced-Complexity, Scalable Implementation of Low Density Parity Check (LDPC) Decoder
Effect of computation offload on performance and energy consumption of mobile face recognition
Coding method for embedding audio in video stream
A design of oil debris monitoring and sensing system
ComplexBeat: Breathing Rate Estimation from Complex CSI
Implementation of a Two-Dimensional FFT/IFFT Processor for Real-Time High-Resolution Synthetic Aperture Radar Imaging
Two-parallel concatenated BCH super-FEC architecture for 100-GB/S optical communications
Two-dimensional Parity-based Concurrent Error Detection Method for AES Algorithm against Differential Fault Attack and its VLSI Implementation
Stochastic implementation of the disparity energy model for depth perception
2017 IEEE International Workshop on Signal Processing Systems, SiPS 2017, Lorient, France, October 3-5, 2017
Real-Time Estimation of Direction of Arrival of Speech Source using Three Microphones
DynExit: A Dynamic Early-Exit Strategy for Deep Residual Networks
Parallelization of AdaBoost algorithm on multi-core processors
A Unified and Flexible Eigen-Solver for Rank-Deficient Matrix in MIMO Precoding/Beamforming Applications
Tensor Decomposition for fNIRS-Based Purchase Intention Decoding in Neuromarketing
Communication and Computation Reduction for Split Learning using Asynchronous Training
Tail-biting code: A modification to staircase code for high-speed networking
Cramér-Rao Bound for Direct Position Estimation in OFDM Based Cellular Systems
Error correction for multi-level NAND flash memory using Reed-Solomon codes
Vision Recognition System by Using Chaotic Search
Epileptic Seizure Detection using Deep Convolutional Autoencoder
Energy-Efficient Target Recognition using ReRAM Crossbars for Enabling On-Device Intelligence
A discriminative spectral-temporal feature set for motor imagery classification
A comparison of CABAC throughput for HEVC/H.265 VS. AVC/H.264
A High-Throughput Hardware Accelerator for Lempel-Ziv 4 Compression Algorithm
A digit-serial architecture for inversion and multiplication in GF(2 M )
Trade-off analysis of decoding algorithms and architectures for multi-standard LDPC decoder
Physical unclonable functions with improved robustness based on polar codes
TokenMIMO: Tokenizer-Enhanced Transformer for MIMO Algorithm Prediction
A hybrid codebook background model for background subtraction
A Low-Complexity Massive MIMO Detection Algorithm Based on Matrix Partition
Secrecy Rate Maximization in MIMO RIS-Aided Wireless Communications: A Hardware Accelerator Implementation for Reflection Optimization
A new FPGA-based postprocessor architecture for channel mismatch correction of time interleaved ADCS
Adaptive frame recovery based on motion activity
Pipelined ALU for Signal Processing to Implement Interval Arithmetic
Steepest Descent Method Based Soft-Output Detection for Massive MIMO Uplink
A Computational-Efficient Deformable Convolution Network Accelerator via Hardware and Algorithm Co-Optimization
Dynamic Hyperdimensional Computing for Improving Accuracy-Energy Efficiency Trade-Offs
Sampling and Exploration Strategies for Multi-Agent Seismic Imaging Using 3D Full Waveform Inversion
Highly utilized merge mode estimation for a hardware-based HEVC encoder
Optimal fixedl-point fast fourier transform
Mixed Precision ℓ1 Solver for Compressive Depth Reconstruction: An ADMM Case Study
Max-log demapper architecture design for DVB-T2 rotated QAM constellations
An efficient Gaussian random number architecture for MIMO channel emulators
New Identical Radix-2^k Fast Fourier Transform Algorithms
Let's Roll: A Synthetic and Real Dataset for Pedestrian Detection Across Different Shutter Types
Symbol-based successive cancellation list decoder for polar codes
Pixel enlargement in high-speed camera image acquisition based on 3D sparse representations
When Less is More: Low-Bit Quantization for Robust DOA Estimation under Non-Uniform Noise
A Novel Fast High Resolution Music Algorithm
Semi-Blind Channel Estimation for OFDM using Least Squares
Performance Optimization of a Multimedia Player on a Mobile CPU Platform
Evaluation of different audio features for musical genre classification
Model-Based Deep Learning for Underdetermined DOA Estimation Exploiting High-Order Difference Co-Arrays
A Dual-Stage, Ultra-Low-Power Acoustic Event Detection System
Symbol Detection Using an Integrate-and-Fire Time Encoding Receiver
Reduced-complexity SVD with adjustable accuracy for precoding in large-scale MIMO systems
Extraction of Fetal ECG from Maternal Abdominal Record in the 3 rd Trimester of Gestation using R-R Interval Windowing Technique
Parameterized core functional dataflow graphs and their application to design and implementation of wireless communication systems
Incremental Learning Through Fusion of Discrete Anomaly Models from Odometry Signals in Autonomous Agent Navigation
Low Complexity 3D Ultrasound Imaging Using Synthetic Aperture Sequential Beamforming
Deep Convolutional Neural Network on iOS Mobile Devices
CRN-based design methodology for synchronous sequential logic
Efficient mapping of advanced signal processing algorithms on multi-processor architectures
Reducing processor energy consumption by compiler optimization
ViPSN-OMS: A Battery-free Occupancy Monitoring System Using A Time-of-flight Sensor
Multi-mode Study of Deep Learning Applications in Acoustic Signal Processing
A contention-free memory subsystem for 5G Turbo decoder with flexible degree of parallelism
Low complexity iterative joint detection, decoding, and channel estimation for wireless MIMO system
Variational Bayes for Robust Radar Single Object Tracking
Frame Expansion Based Peak to Average Power Ratio Reduction in MIMO OFDM Systems
Coarse-grained reconfigurable stream processor for distributed smart cameras
A signal denoising technique based on wavelets modulus maxima lines and a self-scalable grid classifier
Mapping Systolic Arrays onto 3D Circuit Structures: Accelerating Convolutional Neural Network Inference
An area-efficient symbol deinterleaver architecture for DVB-T
Optimal Output Quantization of Binary Input AWGN Channel for Belief-Propagation Decoding of LDPC Codes
Fast prediction unit selection for HEVC fractional pel motion estimation design
An Optimal Adaptive M-PSK Carrier Phase Detector Suitable for Fixed-Point Hardware Implementation within FPGAs and ASICs
Signal processing challenges for emerging digital intensive and digitally assisted transceivers with deeply scaled technology (Invited)
Adaptive Techniques for a Fast Frequency Domain Motion Estimation
NMCu-CNN: A Scalable Near-Memory Computing Co-Processor on a RISC-V MCU in 22 nm FDSOI
Bayesian Optimization for Simultaneous Deconvolution of Room Impulse Responses
Instrumentation-driven framework for validation of dataflow applications
Obtaining an optimal set of head-related transfer functions with a small amount of measurements
Signal Processing Based Implantable Microsystems for Intracortical Therapeutic Purposes
Methodology for the hardware/software co-design of dataflow programs
Novel frame rate up-conversion algorithm based on prediction and recursive search
Beat Frequency Estimation for Tokamak Plasma Signals Using Microwave Reflectometry
Comparison of Principal Component Analysis and Partial Least Square Discriminant Analysis in the Classification of EEG signals
A formal design methodology for synthesizing a clock signal with an arbitrary duty cycle of M/N
Transformer PUF : A Highly Flexible Configurable RO PUF Based on FPGA
Channel shortening and equalization based on information rate maximization for evolved GSM/EDGE
Two-Step Aprroach for Coarse Time Synchronization and Frequency Offset Estimation for IEEE 802.16D Systems
Design of Iterative Hybrid Beamforming for Multi-User mmWave Massive MIMO Systems
High level analysis of trade-offs across different partitioning schemes for wireless applications
Coefficient Conversion for Transform Domain VC-1 TO H.264 Transcoding
Multi-mode sub-Nyquist rate digital-to-analog conversion for direct waveform synthesis
Design of High Speed Cavlc Decoder for H.264/AVC
Leveraging Transprecision Computing for Machine Vision Applications at the Edge
A 40-NM 54-MW 3×-real-time VLSI processor for 60-kWord continuous speech recognition
Design of an ASIP LDPC Decoder Compliant with Digital Communication Standards
A Joint Estimator of SNR and Mobile Speed in Wireless Communications
Improved analytical delay models for coupled interconnects
OpenCL embedded profile prototype in mobile device
A New Inter-View Prediction Method for Multi-View Video Coding
2015 IEEE Workshop on Signal Processing Systems, SiPS 2015, Hangzhou, China, October 14-16, 2015
Low Complexity List Updating Circuits for List Sphere Decoders
DE-DPCTnet: Deep Encoder Dual-path Convolutional Transformer Network for Multi-channel Speech Separation
Matched-Filtering-Based Wideband DOA Estimation for the Active Sensing Scenario
Low-complexity high-speed 4-D TCM decoder
SimSDP, a Rapid Prototyping tool for Radio Astronomy: From NenuFAR Experiments to SKAO-Scale Simulation
Limiting Flexibility in Multiplication over GF(2m): A Design Methodology
Visual Hand Gesture Segmentation Using Signer Model for Real-Time Human-Computer Interaction Application
DRAQ: Deep Reinforcement Learning-based Automated Quantization for MIMO Detection
Analysis of belief propagation for hardware realization
Spectrum Sensing Using Cyclostationary Spectrum Density for Cognitive Radios
FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data
Low Complexity Implementations of Sum-Product Algorithm for Decoding Low-Density Parity-Check Codes
Programming strategies to improve energy efficiency and reliability of ReRAM memory systems
Efficient approximate ML decoding units for polar list decoders
A high parallel macro block level layered LDPC decoding architecture based on dedicated matrix reordering
Flexible product code-based ECC schemes for MLC NAND Flash memories
Efficient realization of a cal video decoder on a mobile terminal (position paper)
Reversible data hiding scheme with high embedding capacity using semi-indicator-free strategy
Kvazaar 4K HEVC intra encoder on FPGA accelerated airframe server
Hardware efficiency versus error probability in unreliable computation
ACO-based fault-aware routing algorithm for Network-on-Chip systems
A new image quality metric based on MIx-Scale transform
Design of an interlayer deblocking filter architecture for H.264/SVC based on a novel sample-level filtering order
Efficient reconfigurable architecture for MIMD streaming execution using permutation network
Motion aware transmission power control scheme in wireless body area network
Obtaining Minimum Depth Sum of Products from Multiple Constant Multiplication
Energy efficient norm-and-correlation-based antenna selection algorithm in spatially correlated massive multi-user MIMO systems
Design and implementation of a high data rate MICS digital baseband transmitter
Architecting an LTE base station with graphics processing units
LDPC decoder architecture for DVB-S2 and DVB-S2X standards
SVD-Aided, Iteratively Detected Spatial Division Multiplexing Using Long-Range Channel Prediction
Low-Latency Sorter Architecture for Polar Codes Successive-Cancellation-List Decoding
Compressive Estimation of Wideband mmW Channel using Analog True-Time-Delay Array
A comparative study of pre-image techniques: The kernel autoregressive case
Symbol Error Probability Analysis of an FFH/MFSK Receiver with Noise-Normalization Combining in a Fading Channel with Partial-Band Jamming
Scheduling of dataflow models within the Reconfigurable Video Coding framework
OneAI - Novel Multipurpose Deep Learning Algorithms for UWB Wireless Networks
The SGC: A simple architecture for gathering statistics in communication links
Reduced-memory high-throughput fast-SSC polar code decoder architecture
New hardware Cryptosystem based chaos for the secure real-time of embedded applications
Joint Stochastic Decoding of LDPC Codes and Partial-Response Channels
Optimizing Halide for Digital Signal Processors
SIMD processor based implementation of recursive filtering equations
A new method for 3D city map generation
FPGA-Based Hybrid Beamforming under Quantization and Phase Resolution Constraints
A New Non-Binary Response Generation Scheme from Physical Unclonable Functions
High Speed Look-Ahead LMS Detector for MIMO Systems
FPGA Implementation of Adaptive Filters based on GSFAP using Log Arithmetic
Low-power implementation of a high-throughput LDPC decoder for IEEE 802.11N standard
Box Decoding: A Low-Complexity Algorithm for MIMO Detection
Fault Tolerance of Quantized Unitary Precoders
Semantic Segmentation via Enhancing Context Information by Fusing Multiple High-Level Features
On the Use of Audio Fingerprinting Features for Speech Enhancement with Generative Adversarial Network
A Novel Real-Time Implementation for Network Echo Cancellation System
Extended Abstract: Deep Learning of the Physical Layer for BICM Systems
Fast Multi-Hypothesis Motion Compensated Filter for Video Denoising
Error Reduction on Automatic Segmentation in Microarray Image
Performance Analysis of a New Transmission Scheme for Multi-Relay Channels
Chinese Sign Language Classification Based on Millimeter-wave Radar Multimodal Data Fusion
A computationally efficient MUSIC algorithm for linear COLD array
Time sliding window for the detection of CCSK frames
Energy-adaptive performance management for self-sustained signal processing systems
Compact Saliency Model and Architectures for Image Sensors
Multi-core multi-node parallelization of the radio interferometric imaging pipeline DDFacet
Configuration through Optimization for In-Memory Computing Hardware and Simulators
Performance and Computational Complexity of the Future Video Coding
CAC CODEC designs based on numeral systems
Neural Dynamic Successive Cancellation Flip Decoding of Polar Codes
Interference suppression with physical-layer network coding and MIMO for multi-way channels
A hardware architecture for accelerating neuromorphic vision algorithms
Achieving Maximum Possible Download Speed on ADSL Systems
Low-Latency Parallel Row-Layered Min-sum MDPC Decoder for McEliece Cryptosystem
Application of multi-comparational algorithms to classification of acoustic emission signals generated by partial discharges
Short Codes with Near-ML Universal Decoding: Are Random Codes Good Enough?
Reconfigurable Neural Synaptic Plasticity-Based Stochastic Deep Neural Network Computing
Generalized Graph Connections for Dataflow Modeling of DSP Applications
TouchSpeaker, a Multi-Sensor Context-Aware Application for Mobile Devices
Construction of Ambience Bases from Weighing Matrices with Application in Spatial Audio Coding
A soft-output parallel stack algorithm for MIMO detection
Learning sparse representation for dynamic gesture recogniton
Low-power adder design techniques for noise-tolerant applications
Wireless fading communication system performance evaluations via SIRP and SDP methods
Analysing the performance of divide-and-conquer sequential matrix diagonalisation for large broadband sensor arrays
A Fast HDR Image TMO based on a Simplified Eye Sensitivity Model
Efficient Check Node Processing Architectures for Non-binary LDPC Decoding Using Power Representation
Spatial-Phase Manipulated Waveforms for Physical Layer Security via Movable Antenna Arrays
Hardware-Efficient Twiddle Factor Generator for Mixed Radix-2/3/4/5 FFTs
Energy-efficient XOR gate with embedded level conversion for serial-link encoding
Configuration and Representation of Large-Scale Dataflow Graphs using the Dataflow Interchange Format
Coherent Image Herding of Inhomogeneous Motion Compensation for Synthetic Transmit Aperture in Ultrasound Image
Efficient Dynamic Optimisation Heuristics for Dataflow Pipelines
Low Complexity Single Channel ICA Architecture Design Methodology for Pervasive Healthcare Applications
Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling
Earliest-deadline first scheduling of multiple independent dataflow graphs
Nonlinear Functions in Learned Iterative Shrinkage-Thresholding Algorithm for Sparse Signal Recovery
Spatial Covariance Matrix Reconstruction Based DOA Estimation in HADS-MIMO with Unknown Mutual Coupling
A Low-Latency and Low-Complexity Hardware Architecture for CTC Beam Search Decoding
Designing a low-power wireless sensor node rASIP architecture
Blind detection of polar codes
FISBLIM: A FIve-Step BLInd Metric for quality assessment of multiply distorted images
Structured sparse ternary weight coding of deep neural networks for efficient hardware implementations
Improved polar decoder based on deep learning
A highly parallel Turbo Product Code decoder without interleaving resource
Leveraging Structured Pruning of Convolutional Neural Networks
A reduction of circuit size of digital direct-driven speaker architecture using segmented pulse shaping technique
Discriminative Focus of Attention for Real-Time Object Detection in Video
Efficient fixed-point refinement of DSP dataflow systems
2012 IEEE Workshop on Signal Processing Systems, Quebec City, QC, Canada, October 17-19, 2012
Iterative Joint Source Channel Decoding of Error Correction Arithmetic Codes
Fast depth decision with enlarged coding block sizes for HEVC intra coding of 4K ultra-HD video
Parallelization of Kvazaar HEVC intra encoder for multi-core processors
A method for using sub-Nyquist sampling for ultra low-power positioning systems
Redundancy Analysis for Variable Length Coding
Reconfigurable Media Coding: A New Specification Model for Multimedia Coders
Shifted Window Based Filtering for Alleviating Blocking Artifacts
Validation of bitstream syntax and synthesis of parsers in the MPEG Reconfigurable Video Coding framework
Electromechanical Metamaterials Enhanced Self-powered Sensing Systems
Deep Neural Networks Characterization Framework for Efficient Implementation on Embedded Systems
Hartley Stochastic Computing For Convolutional Neural Networks
Enhanced Linear R-Q Model Based Rate Control for H.264/AVC Using Context-Adaptive Parameter Estimation