yusuke1997/dblp-id-title huggingface dataset:
Thread-Aware Area-Efficient High-Level Synthesis Compiler for Embedded Devices
Automatic parallelization of fine-grained meta-functions on a chip multiprocessor
Practical memory checking with Dr. Memory
Automatically Reducing Repetitive Synchronization with a Just-in-Time Compiler for Java
Automatic speculative DOALL for clusters
Type freezing: exploiting attribute type monomorphism in tracing JIT compilers
TEST: A Tracer for Extracting Speculative Thread
Corporate Sponsors
Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors
Optimizing the flash-RAM energy trade-off in deeply embedded systems
A Compiler Scheme for Reusing Intermediate Computation Results
C-for-Metal: High Performance Simd Programming on Intel GPUs
Proceedings of the 23rd ACM/IEEE International Symposium on Code Generation and Optimization, CGO 2025, Las Vegas, NV, USA, March 1-5, 2025
IntelliGen: Instruction-Level Auto-tuning for Tensor Program with Monotonic Memory Optimization
Hiding Program Slices for Software Security
BCIBench: a benchmarking suite for EEG-based brain computer interface
Lifting Code Generation of Cardiac Physiology Simulation to Novel Compiler Technology
Automated just-in-time compiler tuning
Non-affine Extensions to Polyhedral Code Generation
Exploring the Performance Potential of Itanium® Processors with ILP-based Scheduling
D'Artagnan: An Embedded DSL Framework for Distributed Embedded Systems
Reducing Memory Ordering Overheads in Software Transactional Memory
Speculative Register Promotion Using Advanced Load Address Table (ALAT)
On the Complexity of Register Coalescing
Warm-Up Simulation Methodology for HW/SW Co-Designed Processors
Extending LLVM for Lightweight SPMD Vectorization: Using SIMD and Vector Instructions Easily from Any Language
Code Optimization for Code Compression
OptiScope: Performance Accountability for Optimizing Compilers
Weaver: A Retargetable Compiler Framework for FPQA Quantum Architectures
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Perfdiff: a framework for performance difference analysis in a virtual machine environment
Using machines to learn method-specific compilation strategies
Loop Optimization using Hierarchical Compilation and Kernel Decomposition
Proceedings of the 21st ACM/IEEE International Symposium on Code Generation and Optimization, CGO 2023, Montréal, QC, Canada, 25 February 2023- 1 March 2023
Security Signature Inference for JavaScript-based Browser Addons
Skadu: Efficient vector shadow memories for poly-scopic program analysis
Exploiting Dynamic Parallelism to Efficiently Support Irregular Nested Loops on GPUs
An Optimization-Driven Incremental Inline Substitution Algorithm for Just-in-Time Compilers
Cole: compiler optimization level exploration
Towards a Domain-Extensible Compiler: Optimizing an Image Processing Pipeline on Mobile CPUs
Compiling for vector-thread architectures
A fast and low-overhead technique to secure programs against integer overflows
Synthesis of Sorting Kernels
An efficient software transactional memory using commit-time invalidation
Language and compiler support for auto-tuning variable-accuracy algorithms
Minimizing the cost of iterative compilation with active learning
Improving Native-Image Startup Performance
Taming warp divergence
Building Intrusion-Tolerant Secure Software
A Progressive Register Allocator for Irregular Architectures
Transforming Query Sequences for High-Throughput B+ Tree Processing on Many-Core Processors
A Fast and Precise Static Loop Analysis Based on Abstract Interpretation, Program Slicing and Polytope Models
Performance is dead, long live performance!
Adaptive Online Context-Sensitive Inlining
COLAB: a collaborative multi-factor scheduler for asymmetric multicore processors
Revamping Sampling-Based PGO with Context-Sensitivity and Pseudo-instrumentation
Proceedings of the First International Workshop on Code Optimisation for Multi and Many Cores, COSMIC@CGO 2013, Shenzhen, China, February 24, 2013
PIMFlow: Compiler and Runtime Support for CNN Models on Processing-in-Memory DRAM
Reasoning about the Node.js Event Loop using Async Graphs
Accelerating LLMs using an Efficient GEMM Library and Target-Aware Optimizations on Real-World PIM Devices
ANGHABENCH: A Suite with One Million Compilable C Benchmarks for Code-Size Reduction
SkipFlow: Improving the Precision of Points-to Analysis using Primitive Values and Predicate Edges
EasyView: Bringing Performance Profiles into Integrated Development Environments
Automatic construction of inlining heuristics using machine learning
Clairvoyance: look-ahead compile-time scheduling
StructSlim: a lightweight profiler to guide structure splitting
Automatic Generation of High-Performance Trace Compressors
Understanding Tradeoffs in Software Transactional Memory
M3V: Multi-modal Multi-view Context Embedding for Repair Operator Prediction
Portable and transparent software managed scheduling on accelerators for fair resource sharing
An Infrastructure for Adaptive Dynamic Optimization
Automatically exploiting cross-invocation parallelism using runtime information
Atomicity violation checker for task parallel programs
Scalable conditional induction variables (CIV) analysis
Object Versioning for Flow-Sensitive Pointer Analysis
Parallaft: Runtime-Based CPU Fault Tolerance via Heterogeneous Parallelism
Automatic Parallelization of Irregular x86-64 Loops
Improving Quasi-Dynamic Schedules through Region Slip
Representing Data Collections in an SSA Form
Stream Compilation for Real-Time Embedded Multicore Systems
Parameterized tiling revisited
Fast liveness checking for ssa-form programs
Synthesizing programs that expose performance bottlenecks
Hydra: Automatic algorithm exploration from linear algebra equations
Translating Traditional SIMD Instructions to Vector Length Agnostic Architectures
A Game-Based Framework to Compare Program Classifiers and Evaders
Optimizing ordered graph algorithms with GraphIt
The generalized matrix chain algorithm
MIC acceleration of short-range molecular dynamics simulations
Conflict-free vectorization of associative irregular applications with recent SIMD architectural advances
Acceldroid: Co-designed acceleration of Android bytecode
BIRD: Binary Interpretation using Runtime Disassembly
Performance of Runtime Optimization on BLAST
AutoPA: automatically generating active driver from original passive driver code
A Programmable Hardware Path Profiler
Iterative Optimization in the Polyhedral Model: Part I, One-Dimensional Time
Kernel Fusion/Decomposition for Automatic GPU-Offloading
Fine-Grained Pipeline Parallelization for Network Function Programs
Exploiting mixed SIMD parallelism by reducing data reorganization overhead
Light-weight bounds checking
Decoupled software pipelining creates parallelization opportunities
An Evaluation of Misaligned Data Access Handling Mechanisms in Dynamic Binary Translation Systems
Unveiling and Vanquishing Goroutine Leaks in Enterprise Microservices: A Dynamic Analysis Approach
High performance stencil code generation with lift
DeadSpy: a tool to pinpoint program inefficiencies
Acculock: Accurate and efficient detection of data races
Spice: speculative parallel iteration chunk execution
Why So Many?: A Brief Tour of Haskell DSLs for Parallel Programming
PolyTOPS: Reconfigurable and Flexible Polyhedral Scheduler
ATMem: adaptive data placement in graph applications on heterogeneous memories
Specialized Dynamic Optimizations for High-Performance Energy-Efficient Microarchitecture
Seamless Compiler Integration of Variable Precision Floating-Point Arithmetic
Evaluating Indirect Branch Handling Mechanisms in Software Dynamic Translation Systems
Efficient Execution of OpenMP on GPUs
Experiences Building an MLIR-Based SYCL Compiler
Jumbo: Run-Time Code Generation for Java and Its Applications
Resilient decentralized Android application repackaging detection using logic bombs
There are at least two sides to every heterogeneous system
May-happen-in-parallel analysis with static vector clocks
Fluidic Kernels: Cooperative Execution of OpenCL Programs on Multiple Heterogeneous Devices
Loop Parallelization using Dynamic Commutativity Analysis
PreScaler: an efficient system-aware precision scaling framework on heterogeneous systems
An adaptive task creation strategy for work-stealing scheduling
Automatic speculative parallelization of loops using polyhedral dependence analysis
Optimizing GPU Deep Learning Operators with Polyhedral Scheduling Constraint Injection
Compiler-directed Data Partitioning for Multicluster Processors
Practical Path Profiling for Dynamic Optimizers
Performance upper bound analysis and optimization of SGEMM on Fermi and Kepler GPUs
Workload Reduction for Multi-input Feedback-Directed Optimization
Proceedings of the 1st International Workshop on Real World Domain Specific Languages, RWDSL@CGO 2016, Barcelona, Spain, March 12, 2016
Convergence and scalarization for data-parallel architectures
Pinpointing data locality problems using data-centric analysis
Targeted Path Profiling: Lower Overhead Path Profiling for Staged Dynamic Optimization Systems
Trace-based affine reconstruction of codes
Optimizing Translation Out of SSA Using Renaming Constraints
Minimizing communication in rate-optimal software pipelining for stream programs
Multi-target Compiler for the Deployment of Machine Learning Models
Run-Time Support for Optimizations Based on Escape Analysis
Hansl: a DSL for econometrics
Automatic creation of tile size selection models
Improving data access efficiency by using a tagless access buffer (TAB)
Smart, adaptive mapping of parallelism in the presence of external workload
Just-In-Time Software Pipelining
Bridging Control-Centric and Data-Centric Optimization
A HW/SW co-designed heterogeneous multi-core virtual machine for energy-efficient general purpose computing
Hardware-Aware Automatic Code-Transformation to Support Compilers in Exploiting the Multi-Level Parallel Potential of Modern CPUs
Proteus: Portable Runtime Optimization of GPU Kernel Execution with Just-in-Time Compilation
Prediction and trace compression of data access addresses through nested loop recognition
SRTuner: Effective Compiler Optimization Customization by Exposing Synergistic Relations
Software-Controlled Operand-Gating
Latent Idiom Recognition for a Minimalist Functional Array Language Using Equality Saturation
Super-Node SLP: Optimized Vectorization for Code Sequences Containing Operators and Their Inverse Elements
Optimization for the Intel® Itanium ®Architectur Register Stack
Perflint: A Context Sensitive Performance Advisor for C++ Programs
CGO '20: 18th ACM/IEEE International Symposium on Code Generation and Optimization, San Diego, CA, USA, February, 2020
Retargeting and Respecializing GPU Workloads for Performance Portability
AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators
EasyTracker: A Python Library for Controlling and Inspecting Program Execution
To Pack or Not to Pack: A Generalized Packing Analysis and Transformation
Dynamic Trace Selection Using Performance Monitoring Hardware Sampling
Symbolic range analysis of pointers
Whole-function vectorization
Proceedings of the 2016 International Symposium on Code Generation and Optimization, CGO 2016, Barcelona, Spain, March 12-18, 2016
WatchdogLite: Hardware-Accelerated Compiler-Based Pointer Checking
A parallel abstract interpreter for JavaScript
DEFIne: A Fluent Interface DSL for Deep Learning Applications
Transparent Debugging of Dynamically Optimized Code
BOLT: A Practical Binary Optimizer for Data Centers and Beyond
Umbra: efficient and scalable memory shadowing
A space- and energy-efficient code Compression/Decompression technique for coarse-grained reconfigurable architectures
Proceedings of the 2018 International Symposium on Code Generation and Optimization, CGO 2018, Vösendorf / Vienna, Austria, February 24-28, 2018
Link-time optimization for power efficiency in a tagless instruction cache
Constructing Virtual Architectures on a Tiled Processor
PALMED: Throughput Characterization for Superscalar Architectures
Using Dynamic Binary Translation to Fuse Dependent Instructions
Automatic generation of high-performance quantized machine learning kernels
Proceedings of the 2015 International Workshop on Code Optimisation for Multi and Many Cores, COSMIC@CGO 2015, San Francisco Bay Area, CA, USA, February 8, 2015
PinADX: an interface for customizable debugging with dynamic instrumentation
The Basic Building Blocks of Parallel Tasks
Quantifying and Reducing Execution Variance in STM via Model Driven Commit Optimization
Practical Structure Layout Optimization and Advice
Dynamic compilation of data-parallel kernels for vector processors
Calibro: Compilation-Assisted Linking-Time Binary Code Outlining for Code Size Reduction in Android Applications
Optimizing binary translation of dynamically generated code
Procedural Abstraction with Reverse Prefix Trees
Auto-generation and auto-tuning of 3D stencil codes on GPU clusters
HALO: post-link heap-layout optimisation
LLM-Vectorizer: LLM-Based Verified Loop Vectorizer
Transforming loop chains via macro dataflow graphs
A Self-Repairing Prefetcher in an Event-Driven Dynamic Optimization Framework
Tackling the Matrix Multiplication Micro-Kernel Generation with Exo
A compiler for cyber-physical digital microfluidic biochips
A Framework for Fine-Grained Synchronization of Dependent GPU Kernels
Characterizing data organization effects on heterogeneous memory architectures
Multicores from the Compiler's Perspective: A Blessing or a Curse?
Cage: Hardware-Accelerated Safe WebAssembly
SLaDe: A Portable Small Language Model Decompiler for Optimized Assembly
Code Generation from Formal Models for Automatic RTOS Portability
Local Scheduling Techniques for Memory Coherence in a Clustered VLIW Processor with a Distributed Data Cache
International Symposium on Code Generation and Optimization - Title Page
Proceedings of the CGO 2011, The 9th International Symposium on Code Generation and Optimization, Chamonix, France, April 2-6, 2011
Re-constructing high-level information for language-specific binary re-optimization
Optimizing Sorting with Genetic Algorithms
Phase-Aware Remote Profiling
Linear scan register allocation on SSA form
3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 20-23 March 2005, San Jose, CA, USA
Visual Instance Inlining and Specialization: Building Domain-Specific Diagrams from Reusable Types
Query-directed adaptive heap cloning for optimizing compilers
Opening polyhedral compiler's black box
A Tool for Performance Analysis of GPU-Accelerated Applications
Hidp: A hierarchical data parallel language
Sparse flow-sensitive pointer analysis for multithreaded programs
Graph-Based Procedural Abstraction
DrPy: Pinpointing Inefficient Memory Usage in Multi-Layer Python Applications
Dynamic and Adaptive Calling Context Encoding
CompilerGym: Robust, Performant Compiler Optimization Environments for AI Research
Local memory-aware kernel perforation
Getting in control of your control flow with control-data isolation
Intel's Array Building Blocks: A retargetable, dynamic compiler and embedded language
Single Assignment Compiler, Single Assignment Architecture: Future Gated Single Assignment Form*; Static Single Assignment with Congruence Classes
Optimistic loop optimization
Efficient and accurate data dependence profiling using software signatures
Parsimony: Enabling SIMD/Vector Programming in Standard Compiler Flows
Enabling Near Real-Time NLU-Driven Natural Language Programming through Dynamic Grammar Graph-Based Translation
Virtual Machine Learning: Thinking like a Computer Architect
Model-Based Framework: An Approach for Profit-Driven Optimization
Pointer disambiguation via strict inequalities
JITSPMM: Just-in-Time Instruction Generation for Accelerated Sparse Matrix-Matrix Multiplication
A Code Generator for High-Performance Tensor Contractions on GPUs
Dominance-based duplication simulation (DBDS): code duplication to enable compiler optimizations
Static Reference Analysis for GUI Objects in Android Software
IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2019, Washington, DC, USA, February 16-20, 2019
MAO - An extensible micro-architectural optimizer
Profiling over Adaptive Ranges
12th Annual IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2014, Orlando, FL, USA, February 15-19, 2014
What we talk about when we talk about pcap expressions
Partial Escape Analysis and Scalar Replacement for Java
FastFlip: Compositional SDC Resiliency Analysis
Predicting Unroll Factors Using Supervised Classification
The design and implementation of the wolfram language compiler
Cycle-based Model to Evaluate Consistency Protocols within a Multi-protocol Compilation Tool-chain
White-Box Program Tuning
Communication-Sensitive Static Dataflow for Parallel Message Passing Applications
Prius: a runtime for hybrid computing
Level by level: making flow- and context-sensitive pointer analysis scalable for millions of lines of code
Dynamic Binary Translation for Accumulator-Oriented Architectures
Schnauzer: scalable profiling for likely security bug sites
The Accuracy of Initial Prediction in Two-Phase Dynamic Binary Translators
Gadgets Splicing: Dynamic Binary Transformation for Precise Rewriting
Dynamic Profiling and Trace Cache Generation
Space-Efficient 64-bit Java Objects through Selective Typed Virtual Addressing
CuAsmRL: Optimizing GPU SASS Schedules via Deep Reinforcement Learning
VEGA: Automatically Generating Compiler Backends using a Pre-trained Transformer Model
Fifth International Symposium on Code Generation and Optimization (CGO 2007), 11-14 March 2007, San Jose, California, USA
Have abstraction and eat performance, too: optimized heterogeneous computing with parallel patterns
MemorySanitizer: fast detector of uninitialized memory use in C++
NRG-loops: adjusting power from within applications
Structure Layout Optimization for Multithreaded Programs
Progressive Raising in Multi-level IR
Contention aware execution: online contention detection and response
Exploiting statistical correlations for proactive prediction of program behaviors
Phi-Predication for Light-Weight If-Conversion
CUrator: An Efficient LLM Execution Engine with Optimized Integration of CUDA Libraries
Seer: Predictive Runtime Kernel Selection for Irregular Problems
Compiling Graph Applications for GPU s with GraphIt
Teapot: Efficiently Uncovering Spectre Gadgets in COTS Binaries
Coupling On-Line and Off-Line Profile Information to Improve Program Performance
Data and Computation Transformations for Brook Streaming Applications on Multiprocessors
Static Identification of Delinquent Loads
Scalable concurrency debugging with distributed graph processing
Effective fault localization based on minimum debugging frontier set
Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications
CogniCrypt GEN : generating code for the secure usage of crypto APIs
SYZYGY - A Framework for Scalable Cross-Module IPO
Proceedings of the 2nd International Workshop on Real World Domain Specific Languages, RWDSL@CGO 2017, Austin, TX, USA, February 4, 2017
SCHEMATIC: Compile-Time Checkpoint Placement and Memory Allocation for Intermittent Systems
Microarchitecture Sensitive Empirical Models for Compiler Optimizations
A Tensor Algebra Compiler for Sparse Differentiation
CollectionSwitch: a framework for efficient and dynamic collection selection
Incremental whole program optimization and compilation
GraphIt to CUDA Compiler in 2021 LOC: A Case for High-Performance DSL Implementation via Staging with BuilDSL
One Automaton to Rule Them All: Beyond Multiple Regular Expressions Execution
Fast dynamic binary rewriting to support thread migration in shared-ISA asymmetric multicores
Formalizing the concurrency semantics of an LLVM fragment
NOELLE Offers Empowering LLVM Extensions
A polynomial spilling heuristic: Layered allocation
Locality-aware mapping and scheduling for multicores
Prioritizing constraint evaluation for efficient points-to analysis
Extending Path Profiling across Loop Backedges and Procedure Boundaries
Compiling Functions onto Digital Microfluidics
Efficient Mapping of Irregular C++ Applications to Integrated GPUs
Enhancing Performance Through Control-Flow Unmerging and Loop Unrolling on GPUs
Interactive debugging of concurrent programs under relaxed memory models
An Efficient Polynomial Multiplication Derived Implementation of Convolution in Neural Networks
Dependence-Based Code Transformation for Coarse-Grained Parallelism
Energy efficient data access techniques
Testing static analyses for precision and soundness
Locus: A System and a Language for Program Optimization
Branch-on-random
Solving PBQP-Based Register Allocation using Deep Reinforcement Learning
Combining Models and Guided Empirical Search to Optimize for Multiple Levels of the Memory Hierarchy
Code Generation for In-Place Stencils
Software prefetching for indirect memory accesses
Tensor Algebra Compilation with Workspaces
A Dimension Abstraction Approach to Vectorization in Matlab
A System-Level Dynamic Binary Translator Using Automatically-Learned Translation Rules
Pipa: pipelined profiling and analysis on multi-core systems
Compilation Techniques for Real-Time Java Programs
Speculative parallelization of partial reduction variables
Synthesizing an instruction selection rule library from semantic specifications
Energy-Aware Tile Size Selection for Affine Programs on GPUs
Enhancing Deployment-Time Predictive Model Robustness for Code Analysis and Optimization
Latency-tolerant software pipelining in a production compiler
Code Generation for Cryptographic Kernels using Multi-word Modular Arithmetic on GPU
PyTorch 2.0: The Journey to Bringing Compiler Technologies to the Core of PyTorch (Keynote)
Removing checks in dynamically typed languages through efficient profiling
Vulkan Vision: Ray Tracing Workload Characterization using Automatic Graphics Instrumentation
Optimizing Dynamic Binary Translation for SIMD Instructions
Exposing Memory Access Regularities Using Object-Relative Memory Profiling
Pin or Fuse? Exploiting Scratchpad Memory to Reduce Off-Chip Data Transfer in DNN Accelerators
dsmodels: A Little Language for Dynamical Systems
Near-optimal instruction selection on dags
An automatic code overlaying technique for multicores with explicitly-managed memory hierarchies
Phase guided profiling for fast cache modeling
Two-Level Dictionary Code Compression: A New Scheme to Improve Instruction Code Density of Embedded Applications
Bandwidth Bandit: Quantitative characterization of memory contention
TwinKernels: an execution model to improve GPU hardware scheduling at compile time
Fine-Tuning Data Structures for Query Processing
Accelerating Deep Neural Networks on Mobile Multicore NPUs
NeuroVectorizer: end-to-end vectorization with deep reinforcement learning
Proceedings of the CGO 2009, The Seventh International Symposium on Code Generation and Optimization, Seattle, Washington, USA, March 22-25, 2009
Shadow Profiling: Hiding Instrumentation Costs with Parallelism
Optimizing Memory Accesses For Spatial Computation
TapeFlow: Streaming Gradient Tapes in Automatic Differentiation
Synthesis of Quantum Simulators by Compilation
PinPlay: a framework for deterministic replay and reproducible analysis of parallel programs
Optimization Opportunities Created by Global Data Reordering
Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language
Wave Propagation and Deep Propagation for Pointer Analysis
Heterogeneous Clustered VLIW Microarchitectures
SuperPin: Parallelizing Dynamic Instrumentation for Real-Time Performance
HELIX-UP: relaxing program semantics to unleash parallelization
A Case Study on RNA-RNA Interaction Application Implementation using AlphaZ
Phase-aware optimization in approximate computing
ThinLTO: scalable and incremental LTO
Stack Filtering: Elevating Precision and Efficiency in Rust Pointer Analysis
Automating efficient variable-grained resiliency for low-power IoT systems
DialEgg: Dialect-Agnostic MLIR Optimizer using Equality Saturation with Egglog
Automatic generation of fast BLAS3-GEMM: a portable compiler approach
Automatic Synthesis of Specialized Hash Functions