yusuke1997/dblp-id-title huggingface dataset:
Live Demonstration: Exploiting Body-Biasing for Static Corner Trimming and Maximum Energy Efficiency Operation in 22nm FDX Technology
A polynomial-time algorithm for the design of multiplierless linear-phase FIR filters with low hardware cost
An Economic Uniqueness-Improved Reliable Reconfigurable RO PUF for IoT Security
BiometricNet: Deep Learning based Biometric Identification using Wrist-Worn PPG
2D quaternion Fourier spectral analysis and its applications
Application of static synchronous series compensator (SSSC) to stabilization of frequency oscillations in an interconnected power system
Selective Clock Gating Based on Comprehensive Power Saving Analysis
Three-layer symmetrical and asymmetrical associative memories for image applications
An Efficient Multicast Addressing Encoding Scheme for Multi-Core Neuromorphic Processors
A low-power variable length decoder based on successive decoding of shoft codewords
A calibration method for PLLs based on transient response
Floating-gate CMOS differential analog inverter for ultra low-voltage applications
Adaptive reweighted compressed sensing for image compression
Design Trade-Offs for Neural Stimulators Optimization
A Photoacoustic Receiver System-on-Chip with a Novel Correlation Detection Technique Based on Early-and-Late Tracking
FIR filter design based on total least squares error criterion
A Second Order Delta-Sigma Frequency Discriminator with Fractional-N Divider and Multi-Bit Quantizer
Spintronic Device-Structure for Low-Energy XOR Logic using Domain Wall Motion
High resolution spectrum estimation methods for signal analysis in power electronics and systems
A time-domain technique for computation of noise spectral density in switched capacitor circuits
Model identification of Time-Varying Diffusive Systems
Spectrum filtering with FRM for robust speech recognition
Applications of nonlinear prediction methods to the Internet traffic
A High-Speed Capacitor Less LDO with Multi-Loop Fast Feedback and Bandwidth Enhancement Control
Information-Theoretic Perspective to Thermal Covert Channels
Early Impacts on Retention and Curriculum After Introducing A First-Year Experience Course
A Low Latency NN-Based Cyclic Jacobi EVD Processor for DOA Estimation in Radar System
Remote dynamically reconfigurable platform using NetFPGA
Live Demonstration: 4-DoF Parallax Tolerant Light Field Stitching
Two-dimensional LMS adaptive linear phase filters
The Optimization of Aging-aware 8T SRAM for FPGA Configuration Memory
A low-power and high-speed quaternary interconnection link using efficient converters
A low-power low-noise bioamplifier for multielectrode neural recording systems
Spectra of Graphs with Circulant Blocks and their Applications
Benefit of linearizing power amplifiers in multi-port amplifier subsystems
An ultra low power frequency synthesizer based on multiphase fractional frequency divider
Minimizing Noise Via Shield and Repeater Insertion
Fast three step intra prediction algorithm for 4×4 blocks in H.264
Modeling Retention Errors on Modern 3D-Flash Products
A 3D Integrated Feature-Extracting Image Sensor
Behavior modelling for LC tank based oscillators
Live demonstration: A low-power broad-bandwidth noise cancellation VLSI circuit design for in-ear headphones
A low latency fault tolerant transmission mechanism for Network-on-Chip
Area-efficient fast scheduling schemes for MVC prediction architecture
PG-CAS: Patterned-Ground Co-Planar Capacitive Asymmetry Sensing for mm-Range EM Side-Channel Attack Probe Detection
RF power control in GSM systems for constant and non constant envelope modulation schemes
A method based on a genetic algorithm to find PWL approximations of multivariate nonlinear functions
DC offset estimation for on-off keying based ultra-low power non-coherent receivers
A Necessary Condition for Linear Phase in Two Dimensional Perfect Reconstruction QMF Banks
A Modified Bat Algorithm with Reduced Search Space Exploration for MPPT under Dynamic Partial Shading Conditions
A 0.35µm CMOS voltage derivative sensor with sign and inflection outputs
Low-power Sliding Correlation CMOS UWB Pulsed Radar Receiver for Motion Detection
Hyperspectral image coding with LVQ-SPECK
A Low-Power Lock-in Amplifier Suitable for Implementation on a Programmable System on-Chip
A survey of path search algorithms for VLSI detailed routing
FPGA design of low-complexity joint channel estimation and data detection for large SIMO wireless systems
A low-power 5.4 kHz CMOS gm-C bandpass filter with on-chip center frequency tuning
Efficient memory architecture for JPEG2000 entropy codec
Integrated mixed-signal optoelectronic system-on-a-chip sensor
2-V 900-MHz quadrature coupled LC oscillators with improved amplitude and phase matchings
A Method for Out-of-Distribution Detection in Encrypted Mobile Traffic Classification
More Effective Power Network Prototyping by Analytical and Centroid Learning
A motion compensation system with a high efficiency reference frame pre-fetch scheme for QFHD H.264/AVC decoding
A low-power systolic array-based adaptive Viterbi decoder and its FPGA implementation
Assessing the Performance of Stateful Logic in 1-Selector-1-RRAM Crossbar Arrays
On the three-dimensional orthogonal drawing of series-parallel graphs (extended abstract)
Iterated conditional modes for inverse halftoning
Implementation of application-specific DSP for OFDM systems
A 10-Gbps, 8-PAM parallel interface with crosstalk cancellation for future hard disk drive channel ICs
On-line power system stability screening of practical power system models using TEPCO-BCU
VHDL-AMS modeling and simulation of a passive pixel sensor in a-Si: H technology for medical imaging
Realization with minimal weighted pole and zero sensitivity subject to ℓ2-scaling constraints for recursive digital filters
Multi-clock domain analysis and modeling of all-digital frequency synthesizers
A method to reduce number of division operations for perspective texture warping
A novel application of the fast simulated diffusion algorithm for dynamical parameter identification of brushless motor drive systems
An FPGA implementation of 3D numerical simulations on a 2D SIMD array processor
Stacking integration methodologies in 3D IC for 3D ultrasound image processing application: A stochastic flash ADC design case study
A Radiation Hard Sense Circuit for Spin Transfer Torque Random Access Memory
A low-power ESD-protected 24GHz receiver front-end with π-type input matching network
An 8-bit 2-GSample/s analog-to-digital converter in 0.5µm SiGe technology
A low power delayed-clocks generation and distribution system
Few-shot Class-agnostic Counting with Occlusion Augmentation and Localization
DWT domain multi-matcher on-line signature verification system
High-efficiency microwave BJT power amplifier simulation
MulMapper: Towards an Automated FPGA-Based CNN Processor Generator Based on a Dynamic Design Space Exploration
Highly linear 100 MHz CMOS programmable gain amplifiers
Wave propagation based analytical model for distributed on-chip RLC interconnects
An efficient mixed-signal architecture for minimum output energy blind multiuser detection
A power-efficient 1.056 GS/s resolution-switchable 5-bit/6-bit flash ADC for UWB applications
High-efficiency CMOS rectifier for fully integrated mW wireless power transfer
An LSI for VDD-hopping and MPEG4 system based on the chip
A multiobjective service restoration method for power distribution systems
Behavior of a 1-bit 2nd-order Sigma-Delta-modulator under wideband excitation
A High-Resolution Digital Phase Interpolator Based CDR with a Half-Rate Hybrid Phase Detector
Generating voltage drop aware current budgets for RC power grids
Petri-Net Methods for Reasoning in Real-Time Control Systems
Design of a novel low-power 4th-order 1.7 GHz CMOS frequency synthesizer for DCS-1800
An 18 GHz low noise high linearity active mixer in SiGe
Reducing quantization noise with recursive Sigma Delta modulators
A hardware-efficient FIR architecture with input-data and tap folding
A high-gain offset-compensated differential amplifier
A low power carry select adder with reduced area
A Two-Stage Decimation Filter Design Technique for Oversampling Delta-Sigma A/D Converters
Low-power current mode logic for improved DPA-resistance in embedded systems
Analyzing distortion in ASDMs with loop delay
State-space formulation of n-variable bilinear transformation for n-D systems
A Dual-Threshold FPGA Routing Design for Subthreshold Leakage Reduction
Block BSS Method for Extracting Pulse Wave Under Noisy Environment
Reconfigurable Wireless Power Transfer Systems for Distance Adaptation
A robust adaptive estimator of rate for cardiac arrhythmia detection
High-speed position detector using new row-parallel architecture for fast collision prevention system
Variability Tolerance Analysis of Memristive Wave Cellular Automata
An evaluation of a hybrid-logarithmic number system DCT/IDCT algorithm [image compression applications]
De-synchronization of a point-of-sales digital-logic controller
Offset compensation using unbalanced polarization
A 43.2 μW 2.4 GHz 64-QAM Pseudo-Backscatter Modulator Based on Integrated Directional Coupler
On-the-fly tone mapping for backward-compatible high dynamic range image/video compression
A Digital PLL with Finite Impulse Responses
Scaling and operation characteristics of HfOx based vertical RRAM for 3D cross-point architecture
Power and Accuracy Optimization for Luminescent Transcutaneous Oxygen Measurements
5V-only, standard 0.5μm CMOS programmable and adaptive floating-gate circuits and arrays using CMOS charge pumps
An RF-to-DC energy harvester for co-integration in a low-power 2.4 GHz transceiver frontend
Calculation of intermodulation distortion in CMOS transconductance stage
A Hybrid Decoder Configuration of MPEG-4 and AVS in Reconfigurable Video Coding Framework
Frame based signal compression using method of optimal directions (MOD)
Multidimensional Parallel Processing Methods for Rational Sampling Lattice Alteration
Experimental Performance Evaluation of Bi-directional Converter for High Power Application
Frequency response of nonlinear networks using curve tracing algorithm
A novel tuning technique for distributed voltage controlled oscillators
A PCA Acceleration Algorithm For WiFi Sensing And Its Hardware Implementation
Stacked, standing wave detectors in 3D SOI-CMOS
Modeling Interconnections with Nonlinear Discontinuities
A quadrature oscillator for LTE/LTE-A standards with an improved quadrature-mode stability
Statistical delay calculation with vector synthesis model
A high-gain, low-noise CMOS amplifier for sampled bio-potential recording
HYPERLOCK: In-Memory Hyperdimensional Encryption in Memristor Crossbar Array
Automatic Dynamic Mixed-Mode Simulation Through Network Reconfiguration
Performance Improvement of the Memory Hierarchy of RISC Systems by Applications of 3-D Technology
RadixBoost: A hardware acceleration structure for scalable radix sort on graphic processors
Characterization of an Associative Memory Chip in 28 nm CMOS Technology
Design of a reliable RRAM-based PUF for compact hardware security primitives
Analysis of soft synchronous commutations in switching converters
Decision-directed Adaptive Wavelet Image Coding with Diretional Decomposition
Hiding watermark in watermark [image watermarking]
PHMNet: A Deep Super Resolution Network using Parallel and Hierarchical Multi-Scale Residual Blocks
A very efficient single-iteration oldest-out data sorter
A curvature-compensation technique based on the difference of Si and SiGe junction voltages for bandgap voltage circuits
Optimal Minimax Two-Dimensional FIR Design Using a Multiple Simplex Exchange
Power system network topology identification with MLD transform and tabu search
A 1.97 TFLOPS/W Configurable SRAM-Based Floating-Point Computation-in-Memory Macro for Energy-Efficient AI Chips
Providing flexibility in a convolutional encoder
Maximizing channel capacity in FSK modulation systems
Characterizing nonlinear load harmonics using fractal analysis
A Wearable EEG Amplifier Using a Novel Teraohm Low-Distortion Tunable Hybrid Pseudo-Resistor
Improving Optical Flow Inference for Video Colorization
Last Passage Time Models Applied to Phase Noise of Ring Oscillators used in some PAN (Personal Area Network) Wireless Standards
A CMOS coupled nonlinear oscillator array
The Design of Symmetric Square-Root Pulse-Shaping Filters for Transmitters and Receivers
Low Power LDO with Fast Load Transient Response based on Quick Response Circuit
Combining clustering and partitioning in quadratic placement
Channel estimation and synchronization with sub-Nyquist sampling and application to ultra-wideband systems
Stability analysis for impulsive neural networks with variable delays
3.8 mW electrocardiogram (ECG) filtered electrical impedance tomography IC using I/Q homodyne architecture for breast cancer diagnosis
The design of high-speed pipelined analog-to-digital converters using voltage-mode sampling and current mode processing techniques
A Flexible-Window Filtering Technique for Interference Suppression in SpO2 Monitoring
High-speed Electro-optic Analogue to Digital Converters
A 24.3-to-44.8 GHz Reconfigurable Dual-Band T/R Front-End with An Implicit Switch-based Antenna Interface Supporting 600MSym/s 64QAM
Exact inversion with a boost DC/AC power converter
An adaptive approach for contextual audio denoising using local Fisher information
Combined echo and noise cancellation based on Gauss-Seidel pseudo affine projection algorithm
k-edge-connectivity augmentation problem with upper bounds on edge multiplicity
True Correlated Double Sampling and Comparator Design for Time-based Image Sensors
Sigma-delta learning for super-resolution independent component analysis
A Low Area Overhead Design for High-Performance General-Synchronous Circuits with Speculative Execution
Optimal strategy for mapping spiking neural networks onto manycore neuromorphic processors
An ECG chopper amplifier achieving 0.92 NEF and 0.85 PEF with AC-coupled inverter-stacking for noise efficiency enhancement
Towards Ultra-Low Power Consumption VAD Architectures with Mixed Signal Circuits
Adaptive Probability Estimation Techniques for Context Adaptive Arithmetic Coding
Detection and Interpolation of Replacement Noise in Motion Picture Sequences Using 3D Autoregressive Nodelling
Vertex cache of programmable geometry processor for mobile multimedia application
A cost-effective approach for ubiquitous broadband access based on hybrid PLC-VLC system
Two-switch flyback-forward PWM DC-DC converter with reduced switch voltage stress
Can We Securely Use Approximate Computing?
Single chip stereo imager
Mismatch Compensation in ISFET Arrays using a Parasitic Programmable Gate
Improved Electromyography Signal Modeling for Myopathy Detection
A programmable bandpass array using floating-gate elements
Ab initio modeling of resistive switching mechanism in binary metal oxides
A hybrid morphology processing units architecture for real-time video segmentation systems
Mapping atoms to nonlinear Chua's circuits
Error control integration scheme for reliable NoC
Analytical Investigation of Pattern Formation in an M-CNN with Locally Active NbOx Memristors
A high precision, output-capacitor-free low-dropout regulator for system-on-chip design
A true low-voltage CMOS class AB current mirror
An all-digital power management unit with 90% power efficiency and ns-order voltage transition time for DVS operation in low power sensing SoC applications
On methods for ordering sparse matrices in circuit simulation
Latency-optimized stochastic LDPC decoder for high-throughput applications
A combined two's complement and floating-point comparator
0.5V 32nW Inverter-Based Gm-C Filter for Bio-Signal Processing
Automatic within-pair-skew compensation for 6.25 Gbps differential links using wide-bandwidth delay units
An open-source based DSP with enhanced multimedia-processing capacity for embedded applications
Temperature performance of sub-1V ultra-low power current sources
An FMDLL based dual-loop frequency synthesizer for 5 GHz WLAN applications
A new level restoration circuit for multi-valued logic
900-nW 876-MHz -79-dBm Pulse-Driven MEMS Oscillator based Sub-Sampling OOK/FSK WuRX
Design procedure based on VHDL language transformations
A fast adaptive guided filtering algorithm for light field depth interpolation
Evaluation of SRAM V min shift induced by random telegraph noise (RTN): physical understanding and prediction method
A 12-bit SAR ADC Utilizing Background Capacitor Calibration with LLM-LMS Algorithm
A 1-V fully integrated CMOS frequency synthesizer for 5-GHz WLAN
High-throughput sorted MMSE QR decomposition for MIMO detection
Efficient multiplication architecture over truncated polynomial ring for NTRUEncrypt system
An efficient memory-based FFT architecture
Photodetected Power Maximization of Photonically Generated Impulse Radio Ultrawide Band Signals
Bandgap Voltage VGO Extraction with Two-Temperature Trimming for Designing Sub-ppm/°C Voltage References
A zone-programmed EEPROM with real-time write monitoring for analog data storage
Area-Efficient FPGA Architectures for Multidimensional DCT using Approximate Transforms and Computing
Analysis of Transmission Lines Nonlinear Loaded Using Galerkin Method
A time-interleaved switched-capacitor band-pass delta-sigma modulator
Multirate-multibit sigma-delta modulators
A self-biased low voltage, low power, CMOS transconductor stage
Least-squares estimation of the common acoustical poles in room acoustics and head related transfer functions
Parameter estimation for image/video transcoding
A 1.8 Gb/s fully integrated optical receiver for OOK visible light communication in 0.35 μm CMOS
FPGA Implementation of a Memory-Efficient Hough Parameter Space for the Detection of Lines
A 0.3-V, nW-power Bulk-Driven Rail-to-Rail 4-Stage OTA in a 180 nm CMOS technology
A 28nm FD-SOI standard cell 0.6-1.2V open-loop frequency multiplier for low power SoC clocking
Sigma delta feedback DAC architectures for high accuracy and extremely low charge transfer
Pseudo-N-path cells for switched-current signal processing
Tuneable linear transconductance cell for Gm-C filter applications
A 5.80 ns, 22.77 fJ, Energy Efficient Level Shifter Using Auto Switch Logic
A low-power distributed wide-band LNA in 0.18µm CMOS
A continuous-time noise-shaping modulator for logarithmic A/D conversion
An Optically Triggered Monolithic Sample and Hold Circuit Using GaAs MESFET Technology
Reducing the analog-digital productivity gap using time-mode signal processing
A maximum entropy Kalman filter for signal reconstruction
Self-organized cortical map formation by guiding connections
A Multi-Rate Hybrid DT/CT Mash ΔΣ Modulator with High Tolerance to Noise Leakage
Derivation of the buck-boost PWM DC-DC converter circuit topology
An IF stage design for an ASK-based wireless telemetry system
Maximising Parallel Memory Access for Low Latency FPGA Designs
An 11.5 nW broadband wake-up RF receiver with -60 dBm sensitivity at 50 MHz
Dynamic-Window DAC Switching in SAR ADCs and its Mismatch Modelling for High Peak-to-Average Ratio Input Signals
A Methodology for Standard Cell Design for QCA
A low-voltage, analog power-law function generator
An RF power harvesting system with input-tuning for long-range RFID tags
Analysis and design for text readability increase in quad-structure RGBW color EPD
Fuzzy power control with weighting function in DS-CDMA cellular mobile communication system
CMOS capacitive sensor array for continuous adherent cell growth monitoring
Design and Analysis of a Low-Power Ternary SRAM
Timing optimization of interconnect by simultaneous net-ordering, wire sizing and spacing
A high temperature variable gain amplifier based on GaN HEMT devices for downhole communications
Design of a tunable fully differential GHz range Gm-C lowpass filter in 0.18µm CMOS for DS-CDMA UWB transceivers
Edge-Aware Autoencoder Design for Real-Time Mixture-of-Experts Image Compression
Tapeout class: Taking students from schematic to silicon in one semester
Physical computing circuit with no clock to establish Gaussian pyramid of SIFT algorithm
Multilayer molybdenum disulfide (MoS2) based tunnel transistor
Fully adaptive pinning control of complex networks
Texture classification using joint statistical representation in space-frequency domain with local quantized patterns
Behavioral Blocks Model for Complexity-Reduced Modeling of RF Power Amplifiers
A New Frequency-Domain LMS Adaptive Filter with Reduced-Sized FFT's
VCO-ADCs with a Quadrature Band-Pass Noise-Transfer-Function
Optimization of Structural Adders in Fixed Coefficient Transposed Direct Form FIR Filters
Compound noise analysis in digital circuits using blind source separation
Generalized semi-blind channel estimator for TCM-OFDM system
Design, Analysis and Implementation of Integrated Micro-Thermal Control Systems
Design and Control of An Integrated 3-Level Boost Converter under DCM Operation
On the design of single-inductor multiple-output DC-DC buck converters
Scan Chain Fault Diagnosis with Fault Dictionaries
Design of One-cycle Control Power Factor Correction IC with Unipolar Supply Voltage
A novel closed-form azimuth/elevation angle and polarization estimation technique using only electric dipole triads or only magnetic loop triads with arbitrary unknown spacings
Parasitic extraction: current state of the art and future trends
Decomposition of drain-current variation into gain-factor and threshold voltage variations
An 8-bit, 1.8 V, 20 MSample/s analog-to-digital converter using low gain opamps
A VLC/FLC data partitioning scheme for MPEG-4
Analysis of oscillator amplitude control, and its application to automatic tuning of quality factor for active LC filters
Multiple description motion compensation video coding with leaky prediction
A 10 Gb/s adaptive cable equalizer using phase detection technique in 0.13µm CMOS technology
A high frequency read-out channel for bio-impedance measurement
A Multi-phase Shared Bus Structure for the Fast Fourier Transform
Using moderate inversion to optimize voltage gain, thermal noise, and settling time in two-stage CMOS amplifiers
DERMIS: Toward a Fully-Integrated Large-Area High-Resolution Tactile Slip Sensing Solution
Power characteristics of Networks on Chip
Calculation of the isocline for the fixed point with a specified argument of complex multipliers
Least-squares adaptation of affine combinations of multiple adaptive filters
Electronic time stretching for fast digitization
Picoseconds measurement of internal waveforms in integrated circuits using sampling force probing. I. Principle and demonstration
Flexible Mixed-mode and Mixed-level Simulation
A 13-bit 1-MS/s SAR ADC With Rotation-Based Mismatch Error Cancellation
A fast motion estimation algorithm and low-power 0.13-um CMOS motion estimation circuits
Joint estimation and compensation for front-end imperfection in MB-OFDM UWB systems
A new pipelined adaptive DFE architecture with improved convergence rate
Current-Steering DAC Calibration Using Q-Learning
A 10-MHz 5-V On-chip 6-layer Multi-level Digital Transformer Using T18HVG2 Process
An Improved Heuristic Function for A∗-Based Path Search in Detailed Routing
A 2.5GHz ADPLL with PVT-insensitive ΔΣ dithered time-to-digital conversion by utilizing an ADDLL
A high-speed four-channel integrated optical receiver array using SiGe HBT technology
Combining Circuit Theory and Numerical Field Calculations in Designing Mini-Mechatronic Systems
Low Matchline Voltage Swing Content-Addressable Memory Cell
4-Channel asynchronous bio-potential recording system
A method for computing the stability margin of two-dimensional continuous systems based on Hermite matrices
Multirate SC and SI Filter System Design by XFILT
Keyframe selection for motion capture using motion activity analysis
Analysis and synthesis of a class of neural networks with sparse interconnections
Exploiting time resolution in nanometre CMOS data converters
Debug support for embedded processor reuse
A systematic algorithm for the design of multiplierless FIR filters
A sub-mW spectrum sensing architecture for portable IEEE 802.22 cognitive radio applications
Non-local extension of total variation regularization for image restoration
Live Demonstration: Using ANNs to Predict the Evolution of Spectrum Occupancy