yusuke1997/dblp-id-title huggingface dataset:
Optimizing the number of parallel channels and the stage resolution in time interleaved pipeline A/D converters
Single amplifier bi-quadratic filter topologies in transimpedance configuration
Linearity and NF Tradeoff in Input-Matched N-Path Mixer-First Receivers with Shunt-Feedback TIAs
GSM/EDGE evolution, based on 8-PSK
An Asynchronous RISC-V Processor Utilizing a Chisel-Based Desynchronization Flow
A Wideband Delay-Tunable Fully Differential Allpass Filter in 65-nm CMOS Technology
A digitally programmable on-chip RC-oscillator in 0.25µm CMOS logic process
Compact substrate models for efficient noise coupling and signal isolation analysis
A 100.2-dB SNDR Active-Passive Continuous-Time ΔΣ Modulator With Calibrated Negative-R
A stimulator output stage with capacitor reduction and failure-checking techniques
Beneficial Role of Noise in Hf-based Memristors
Generation and properties of fastest transform matrices over GF(2)
Digital tuning of continuous-time high-Q filters
Adaptive transmitting coil array for optimal power transfer in deeply implanted medical devices
Robustness of Power Grids Based on a Probability Model of Node Failures
Discrete utterance recognition based on nonlinear model identification with single layer neural networks
Linear amplifiers architectures with very high gain-bandwidth product
An efficient block-based interpreter for MPEG-4 structured audio
Dental caries lesions detection using deformable templates
Statistical schedule length analysis in asynchronous datapath synthesis
Fractional-Rate FM-to-Digital Delta-Sigma-Converters
Subband signal processing for hearing aids
Convergent micro-pipelines: a versatile operator for mixed asynchronous-synchronous computations
A robust wideband array beamformer using fan filter
A novel hybrid pass logic with static CMOS output drive full-adder cell
A Digital In-Analogue Out Logic Gate Based on Metal-Oxide Memristor Devices
Algorithm-Hardware Co-Design for Wearable BCIs: An Evolution from Linear Algebra to Transformers
Determination of pitch of noisy speech using dominant harmonic frequency
A hybrid-readout and dynamic-resolution motion detection image sensor for object tracking
An accurate low-voltage analog memory-cell with built-in multiplication
Adjacent-State monitoring based fine-grained power-gating scheme for a low-power asynchronous pipelined system
Is it Possible to achieve a Teraflop/s on a chip? From High Performance Algorithms to Architectures
Evaluation of substrate noise in CMOS and low-noise logic cells
Analog layout density uniformity improvement using interconnect widening and dummy fill insertion
Thresholding-based online algorithms of complexity comparable to sparse LMS methods
Design of a multi-channel high-sensitivity electrochemical interface IC based on organic electrochemical transistors (OECT)
A calibration-free 13-bit 0.9 V differential SAR-ADC with hybrid DAC and dithering
Correlated jitter sampling for jitter cancellation in pipelined TDC
A hardware-based predictive motion estimation algorithm
Memristive Synaptic Circuits for Deep Convolutional Neural Networks
Flexible integer DCT architectures for HEVC
Analysis of multi-memristor circuits
Adaptive Video De-interlacing Algorithm by Motion Characteristic Detection
A switched-capacitor DAC with analog mismatch correction
Pre-Calculating Ising Memory: Low Cost Method to Enhance Traditional Memory with Ising Ability
Formal Verification For Cyclic Quantum Walk Circuits
HPSW-CIM: A Novel ReRAM-Based Computing-in-Memory Architecture with Constant-Term Circuit for Full Parallel Hybrid-Precision-Signed-Weight MAC Operation
A 1Gb/s Optical Transceiver Array Chipset for Automotive Wired Interconnects
Defect detection in web inspection using fuzzy fusion of texture features
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
Neural MCA for robust beamforming
Digitally tuneable on-chip resistor in CMOS for high-speed data transmission
A modified two-step SOVA-based turbo decoder with a fixed scaling factor
Residual Network-Based Supervised Learning of Remotely Sensed Fall Incidents using Ultra-Wideband Radar
Incorporation of input glitches into power macromodeling
Parallel HD Encoding on CELL
State tracking in power systems using DFT-Prony's method
A Fully Integrated 2.4GHz CMOS Frequency Synthesizer Using a Ring-Based VCO with Inductive Peaking
Scheduling of DSP data flow graphs onto multiprocessors for maximum throughput
An IC for closed-loop control of a micromotor with an electrostatically levitated rotor
Low power synthesis of sum-of-product computation in DSP algorithms
Margins of Stability of Inner-current Loop of Peak Current-mode Controlled PWM dc-dc Converters
An improved scalar quantization-based digital video watermarking scheme for H.264/AVC
Geometry Transform of Intra-frames in ECM
A 0.4V 0.5fJ/cycle TSPC Flip-Flop in 65nm LP CMOS with Retention Mode Controlled by Clock-Gating Cells
Comparison of sEMG bit-stream modulators for cross-correlation based muscle fatigue estimation
A 220nW Neural Amplifier for Multi-channel Neural Recording Systems
A genetic algorithm approach for fractional delay FIR filters
A hybrid OFDM body coupled communication transceiver for binaural hearing aids in 65nm CMOS
Transcutaneous electrical nerve stimulation system for improvement of flight orientation in a VR-based motion environment
VLSI architecture for data-reduced steering matrix feedback in MIMO systems
An 800G Integrated Silicon-Photonic Transmitter based on 16-Channel Mach-Zehnder Modulator and Co-Designed 5.35pJ/bit CMOS Drivers
Comparison of low-power biopotential processors for on-the-fly spike detection
A 409mV, Sub-10nW Power-on Reset Circuit Using Adaptive Accuracy Adjustment for Low Voltage Applications
A formal approach to the slack driven scheduling problem in high-level synthesis
Microscopic image classification via ℂWT-based covariance descriptors using Kullback-Leibler distance
SHEPWM Class-D Amplifier with a Reconfigurable Gate Driver Integrated Circuit
An RNS architecture of an F p elliptic curve point multiplier
Low-power delay test architecture for pre-bond test
Metamorphic Edge Processor Simulation Framework Using Flexible Runtime Partial Replacement of Software-Embedded Verilog RTL Models
Accurate Transformation-based Timing Analysis for RC Non-tree Circuits
Mixed-signal test automation: Are we there yet?
A high-voltage, energy-efficient, 4-electrode output stage for implantable neural stimulator
Introducing Complex Oscillation Based Test: an application example targeting Analog to Digital Converters
Area-efficient TFM-based stochastic decoder design for non-binary LDPC codes
Ultra-Low-Power Low-Frequency CMOS Integrated Oscillators for Energy-Efficient IoT Devices
Applications of the Piecewise Ellipsoidal Approximation to the Design of Nonlinear Circuits
Symbol Timing Recovery in Digital Subscriber Loops in the Presence of Residual Echo & Impulsive Noise
Toward a Highly Scalable Smart System for Small Animal Body Sensing and Tracking using an Inductive Multi-Resonator Array
Image Quality vs Performance in Super-Resolution for SAR Ship classification
Exact realization of large DT-CNNs on limited-sized CNN circuits
A hardware-like high-level language based environment for 3D graphics architecture exploration
A network of relaxation oscillators based on intermittently coupled capacitors
Analysis of Internet Topologies: A Historical View
MTJ based temperature compensated beta multiplier Voltage Reference
A reflectance-based computer aided modelling tool for high speed/high frequency communication systems
A practical FEC code rate decision scheme based on joint source-channel distortion model
A 0.38 pj/bit 1.24 nW chip-to-chip serial link for ultra-low power systems
High Read Stability and Low Leakage Cache Memory Cell
Hardware friendly vector quantization algorithm
Optical sensor integrated CNN for real-time computational applications
Recovery of Multiband Signals Using Finite Samples
A Low-noise Monolithic CMOS Bio-potential Detector
High-isolation Stacked RF Switch using dc-lift and Feedforward Cancellation Techniques in Standard 65 nm CMOS
Pipelined parallel architecture for high throughput MAP detectors
Amplitude and Phase Estimation of Backscatter Tag-to-Tag Channel
A Ka-Band FMCW PLL Synthesizer with 8.5-GHz Bandwidth for High-Precision High-Resolution Sub-mmWave Radar Sensing
On Design of Analogue Multipliers using Gallium Arsenide MESFETs
An Offset Compensated CMOS Current-Feedback Operational-Amplifier
A 10-12 GHz Embedded Multi-Band LC Notch Filter Low-Noise Amplifier With High Anti-Interference
Zero skew differential clock distribution network
On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits
On non-Linear Multi-FET Analysis
Further Generalization of Higher Order Elements: State Characterization and Synthesis
12.5-Gb/s analog front-end of an optical transceiver in 0.13-μm CMOS
A hybrid-type test pattern generating mechanism
Light-Controlled Photometer with Optoelectronic CMOS Biochip for Quantitative PSA Detection
Design of customized functional units for the VLIW-based multi-threading processor core targeted at multimedia applications
A low-power decimation filter for a sigma-delta converter based on a power-optimized sinc filter
A novel digital IIR filter design strategy - Structure-based discrete coefficient filters
Fast motion estimation algorithm and low-power CMOS motion estimation array LSI for MPEG-2 encoding
A Highly Efficient Fully Integrated Active Rectifier for Ultrasonic Wireless Power Transfer
Large time-step integration method for modeling of oscillating circuits
Per-Element Decompostion in Distortion Analysis
A Design-Oriented Characterization Framework for Decentralized, Distributed, Autonomous Systems: The Nano-Satellite Swarm Case
Low-Power Time-to-digital and Digital-to-time Converters for Novel Implementation of Telecommunication Building Blocks
High-Voltage DMOS Integrated Circuits with Floating Gate Protection Technique
Character recognition using neural based feature extractor and classifier
Reduction of blocking artifacts by a modeled lowpass filter output
Mostly Passive Δ - Σ ADC with a-IGZO TFTs for Flexible Electronics
Multi-channel mixed-signal noise source with applications to stochastic equalization
Rail-to-rail OTA using a pair of single channel type MOSFETs
An implementation of the circuit multiobjective optimization with the weighted sum strategy and goal attainment method
Discrete pdf estimation in the presence of noise
A Programmable Online/Off-line Built-in Self-test Scheme for RAMs with ECC
Efficient VLSI architectures for the biorthogonal wavelet transform by filter bank and lifting scheme
2-MITE Product-of-Power-Law Networks
Auditory cortical spectral shape analysis in analog VLSI
A new zero-optimization scheme for noise-coupled ΔΣ ADCs
A 16-channel neural stimulator with DAC sharing scheme for visual prostheses
Phase sampling: a new approach to the design of LF direct digital frequency synthesizers
Mitigating Asynchronous QDI Drawbacks on MAC Operators with Approximate Multipliers
Low noise amplifier design for ultra-wideband radio
Asynchronous Threshold Voltage Defined Logic Family Resistant to LLSI Attacks
Broadband Tapered Microstrip Line-to-SIW Transition for C/X-Band Applications
Frequency estimation of three-phase power systems using complex adaptive notch filters
PAM-4/6/8 Performance and Power Analysis for Next Generation 224Gbit/s Links
Position-Based CMOS Charge Qubits for Scalable Quantum Processors at 4K
Low-sensitivity active-RC filters using impedance tapering of symmetrical bridged-T and twin-T networks
Signal Transmission through a Chain of Chua's Circuits
Optimal packet length with energy efficiency for wireless sensor networks
A novel technique integrating buffer insertion into timing driven placement
Analog front-end RX design for UWB impulse radio in 90nm CMOS
Your Demands Deserve More Bits: Referring Semantic Image Compression at Ultra-low Bitrate
Adaptive filter implementation using switched-current technique
A dual-mode weight storage analog neural network platform for on-chip applications
Revisiting the sifting integral: an interesting special case
An Examination of Feedback Bridging Faults in Digital CMOS Circuits
A numerical design approach for single amplifier, Active-RC Butterworth filter of order 5
A single-to-differential LNA topology with robust output gain-phase balancing against balun imbalance
Parallelizing video transcoding using Map-Reduce-based cloud computing
On the Optimal Current Followers for Wide-Swing Current-Efficient Amplifiers
Resonate and fire dynamics in Complex Oscillation Based Test of analog filters
Vortex-based spin transfer oscillator compact model for IC design
Genetic Algorithm with virus infection for finding approximate solution
Digital image sharpening using fractional derivative and mach band effect
Current mode elementary motion perception neural cell
A method to reduce power consumption in pipelined A/D converters
Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver
Efficient subquadratic parallel multiplier based on modified SPB of GF(2 m )
Cryptosystems based on space-discretization of chaotic maps
Analysis of output ripple in multi-phase clocked charge pumps
The Bilateral Wavelet Pyramid (BWP): A Novel Image Representation
The M-PIRE MPEG-4 codec DSP and its macroblock engine
A Novel Framework for Procedural Construction of Parallel Prefix Adders
Channel equalization and timing recovery technique for chaotic communications systems
Laconic Neuromorphic Vision
An RF memristor model and memristive single-pole double-throw switches
An Area-efficient Unified Transform Architecture for VVC
Complexity modeling of H.264/AVC CAVLC/UVLC entropy decoders
A programmable processor for cryptography
Analog signal-interference narrow-band bandpass filters with hybrid transmission-line/SAW-resonator transversal filtering sections
An efficient approach for in-place scheduling of path metric update in Viterbi decoders
Computing Parametric LQRs For Polytopic Discrete-Time Systems
A scalable 20 ×20 fully asynchronous SPAD-based imaging sensor with AER readout
Live demonstration: Simulator-like exploration of cortical network architectures with a mixed-signal VLSI system
A new low power transconductor for Gm-C filters
A Mode-I/Mode-III UWB LNA with programmable gain and 20 dB WLAN blocker rejection in 130nm CMOS
CMOS digital retina chip with multi-bit neurons for image coding
A high performance low power dynamic PLA with conditional evaluation scheme
Self-synchronized audio watermark in DWT domain
An Efficient Correction Method of Wide-angle Lens Distortion for Surveillance Systems
Relevance feedback using random subspace method
Low-power logarithmic number system addition/subtraction and their impact on digital filters
Efficient video compression methods for a lightweight tele-immersive video chat system
A symmetric miniature 3D inductor
Tunable transimpedance amplifiers with constant bandwidth for optical communications
Live demonstration: A FSK-OOK ultra wideband impulse radio system with spontaneous clock and data recovery
On-chip integration of thermoelectric energy harvesting in 3D ICs
Continuous-time CMOS quantizer for ultra-wideband applications
Joint detection and decoding for MIMO systems with polar codes
Educational project on the design of interface circuit for a Pirani pressure sensor
More AddNet: A deeper insight into DNNs using FPGA-optimized multipliers
Detecting filopodia with wavelets
AES as stream cipher on a small FPGA
An Energy-Efficient Differential Frame Convolutional Accelerator with on-Chip Fusion Storage Architecture and Pixel-Level Pipeline Data Flow
Voltage scaling and repeater insertion for high-throughput low-power interconnects
An invariance transformation technique for interpreting images obtained from unknown operational conditions
Radio Pulsar Signal Generator
Electrical and optical on-chip interconnects in scaled microprocessors
Digitally-Controlled Analogue Signal Processing and Conversion Techniques Employing a Logarithmic Building Block
Behavioral Testing of Cellular Neural Networks
DFD based scene segmentation for H.263 video sequences
Process compensated CMOS temperature sensor for microprocessor application
SQNR-based Layer-wise Mixed-Precision Schemes with Computational Complexity Consideration
2D Enhanced Intra Prediction (2DEIP) for High Definition Image/Video Coding
Robust and Energy-Efficient PPG-Based Heart-Rate Monitoring
Bias-adaptive cross-coupled CMOS MAGFET pair for bipolar magnetic field detection
SR-NCL: An Area-/Energy Efficient Resilient NCL Architecture based on Selective Redundancy
A QCQP design method of the symmetric pulse-shaping filters against receiver timing jitter
Accurate spectral testing of analog-to-digital converters with frequency drift using phase correction and averaging
Fabrication, characterization and modeling of flexible electronic components based on CNT networks
A PVT-robust current-mode passive mixer with source-degenerated transconductance amplifier
A General Approach to Design VLSI Arrays for the Multi-dimensional Discrete Hartley Transform
Design of signal-adapted nonuniform filter banks using tree structure
Via-programmable expanded universal logic gate in MCML for structured ASIC applications: circuit design
Exponential-enhanced characteristic of MOS transistors and its application to log-domain circuits
A Novel Hybrid Synchronization of Two Coupled Complex Networks
HDMI transmitter in 32nM technology using 28Å MOS
A CMOS transconductor with 90 dB SFDR and low sensitivity to mismatch
SVA checker generator for FPGA-based verification platform
Novel Charge-Metering Stimulus Amplifier for Biomimetic Implantable Prosthesis
Storage Enhancement Techniques for Digital Memory Based, Analog Computational Engines
Bifurcation analysis of a power-factor-correction boost converter: uncovering fast-scale instability
Improvement of Power Flow Analysis based on Currents' Physical Component (CPC) Theory
An all-digital programmable digitally-controlled-oscillator (DCO) for digital wireless applications
Multi-Bit Incremental Converters with Optimal Power Consumption and Mismatch Error
A DECT/Bluetooth multi-standard front-end with adaptive image rejection in 0.18µm CMOS
Interface with Opamp Output-Impedance Calibration Technique for a Large Integrated 2-D Resistive Sensor Array
A new iterative WLS Chebyshev approximation method for the design of two-dimensional FIR digital filters
Memristors-based Ternary Content Addressable Memory (mTCAM)
Pulse-based interface circuits for SPR sensing systems [analyte concentration measurement]
High-accuracy instrumentation amplifier for low voltage low power CMOS smart sensors
BitPruning: Learning Bitlengths for Aggressive and Accurate Quantization
Real-time FPGA-based Anomaly Detection for Radio Frequency Signals
An interval first-order method for robustness analysis
Designs of analog and digital comparators with FGMOS
Log-domain channel-select filters for multistandard wireless receivers
Block-based image steganalysis: Algorithm and performance evaluation
Slant transform watermarking for textured images
An energy-efficient heterogeneous dual-core processor for Internet of Things
On-chip ESD protection circuit design with novel substrate-triggered SCR device in sub-quarter-micron CMOS process
Improved automatic differentiation method for efficient model compiler
A RISC Controller with Customisation Facility for Flexible System Integration
An improved heuristic algorithm FEIDEQ for the maximum legal firing sequence problem of Petri nets
Intraframe Bitrate Prediction Method for H.264/AVC
4 th -Order 84dB-DR CMOS-90nm low-pass filter for WLAN receivers
An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications
Non-negative matrix factorization in bioinformatics: Towards understanding biological processes
Pedestrian Detection with an Ensemble of Localized Features
Link adaptation and receiver design for enhanced General Packet Radio Services wireless networks
CMOS digitally programmable cell for high frequency amplification and filtering
On Perfect-Reconstruction Allpass-Based Cosine-Modulated IIR Filter Banks
Co-processor architecture for MPEG-4 main profile visual compositing
An Efficient NTT-Based Polynomial Multiplication Architecture for BFV Homomorphic Encryption
An ultra-low-power extended counting ADC For large scale sensor arrays
A continuous-time field programmable analog array (FPAA) consisting of digitally reconfigurable G M -cells
Phoneme Recognition System Based on a Modified TDNN Using Self-Organizing Clustering Network
Design of multiplierless programmable linear phase narrowband-bandpass FIR filters
Blind separation of statistically independent signals with mixed sub-Gaussian and super-Gaussian probability distributions
Interval calculation of EM algorithm for GMM parameter estimation
Conjectural variation based learning of generator's behavior in electricity market
Exploring Hierarchical Machine Learning for Hardware-Limited Multi-Class Inference on Compressed Measurements
Robust signal recovery approach for compressive sensing using unconstrained optimization
A Heterogeneous Cluster with Reconfigurable Accelerator for Energy Efficient Near-Sensor Data Analytics
Logic synthesis for PLA with 2-input logic elements
Enhancing Common Subexpression Elimination Algorithms
ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I 2 S DSP for Flexible Data Acquisition from Microphone Arrays
Power dependence of feedback amplifiers on opamp architecture
Calibration and Correction of Timing Mismatch Error in Two-Channel Time-Interleaved DACs
A Series Stacked FinFET Structure for Digital Low Dropout Regulators with Minimum Energy Point Technique for 37.5% Energy Reduction in Cortex M0 Processor
Low power decoder design for QC-LDPC codes
An Energy-Efficient Graphene-based Spiking Neural Network Architecture for Pattern Recognition
An FPGA-based aperiodic modulation strategy for EMI suppression in quasi-Z-source DC-DC converters
Two-dimensional recursive adaptive filtering
Immitance data modelling via linear interpolation techniques
On design of reduced-order ℋ2 filters for discrete repetitive processes
A 1.5V low noise figure mixer for 3.5GHz WiMAX systems
Detecting global spatial-temporal events: saccadic suppression
Implementation of Linear Discriminant Classifier in 130nm Silicon Process
Online Prediction of Core Body Temperature from Sweat Wearable Printed Sensors Using Recurrent Neural Network
Data-Aware Partial ECC with Data Modulation of ReRAM with Non-volatile In-memory Computing for Image Recognition with Deep Neural Network
An inductorless linear optical receiver for 20Gbaud/s (40Gb/s) PAM-4 modulation using 28nm CMOS
Nonlinear function generation using oversampled ΣΔ-modulators
Image Completion with Generation of Rotated Patterns and Efficient Matching
Thousand and One Improvements on Current Operational Amplifiers
Real-Time Motion Artifact Removal in fNIRS with Denoising Autoencoder at the Edge
An Interference-Resilient 31× 15 Touch-Screen Panel Read-Out IC Based on Chirp Spread Spectrum and Pseudo Random Orthogonal Sequences
An Impedance Method for Stability Analysis of Power Systems with Large Penetration of Inverter Based Resources
Equalization of OFDM systems in time-varying channels using frequency domain redundancy
CMOS transimpedance amplifier for biosensor signal acquisition
Reed-Muller descriptions of symmetric functions
Performance analysis of optimized carbon nanotube interconnect
Artificial-Intelligence-Driven RF Carrier Aggregation Filter For 6G Application
VLSI decoder architecture for embedded zerotree wavelet algorithm
Delta-Sigma Analog-to-Digital Conversion via Time-Mode Signal Processing
Wide-band length-6 cubic interpolator
Error correction block based ARQ protocol for wireless digital video transmission
Priority-Aware Scheduling under Shared-Resource Contention on Chip Multicore Processors
Surprising simplification of the Jacobian of dode switching circuits
An inter-carrier interference suppression scheme for OFDM systems in time-varying fading channels
A new method in FIR filter design