yusuke1997/dblp-id-title huggingface dataset:
An estimation method of closed frequencies
Edge Detection on the Bayer Pattern
Intensity/saturation enhancement based on differential gray-levels histogram equalization
Effects of PV Grid-Connected System Location on a Distribution System
A 1.0 volt thermal noise-canceling CMOS transimpedance-based amplifier
Adaptive search order determination for effective early termination in the N-step search algorithm
Uniform DFT Filter Bank with Finite Precision Prototype Filters
A Non-Overlapping Frequency Aid Technique for Fractional-N Digital Bang-Bang PLLs
Low complexity and quasi-linear phase IIR filters design based on iterative convex optimization
A variable parameter improved proportionate normalized LMS algorithm
Lessening zero sequence effects in dynamic voltage restorers
An OMNeT++ based Network-on-Chip simulator for embedded systems
A New Error Correction Scheme for Physical Unclonable Function
Self-adjusting mechanism to dynamically suppress the effect of PVT variations on clock skew
A fully digital feedback equalizer for MDFE read channel
A Multilayer Perceptron Training Accelerator using Systolic Array
A low flicker noise, highly linear, direct conversion receiver for 5GHz wireless LAN
A 12 dBm, 0.1-12 GHz Compact Power Mixer based Ultra-Wideband Transmitter
An optimization scheme for quadtree-structured prediction and residual encoding in HEVC
Convolutional Neural Network and Attention Mechanism for Bone Age Prediction
0.6 - 3.6 GHz wideband operation with high phase resolution On-Chip Network Analyzer
On Comparing Side-channel Properties of AES and ChaCha20 on Microcontrollers
Up to 13.7% Increase in Throughput of RISC V SoC Using Timing Speculative Razor SRAM
Timing-driven multi-layer Steiner tree construction with obstacle avoidance
Overview of radiation effects and design constraints off fully custom SMPS
The Dyadic Curvelet Transform for Multiscale Topological Complex Networks
Recursive robust variable loading mvdr beamforming in impulsive noise environment
A 10/30MHz PWM buck converter with an accuracy-improved ramp generator
A high speed single photon counting module
A rapid prototyping embedded system platform and its HW/SW communication interface generation and verification
Live demonstration: CAN FD controller for in-vehicle network
Generalized Bandpass Sampling with Complex FIR Filtering
A dual-rail voltage supply for battery powered portable devices
Multi domain features for speaker independent word recognition
Low power delay locked loop with all digital controlled SAR delay cell
An adaptive interpolation scheme for inter-layer prediction
Inductance of Different Profiles of Through Glass Vias based on magnetic flux density
Asynchronous AHB bus interface designs in a multiple-clock-domain graphics system
An ANN Majority Logic Gate (MLG) using Single Electron Nano-Devices
Analysis of two-phase on-chip step-down switched capacitor power converters
Efficient cell characterization for SSTA
Printed circuit board routing and package layout codesign
Blind channel estimation for MIMO-OFDM systems with repeated time-domain symbols
Algorithmic ADC using current mode without DAC
Redundant transformations for BIST testability metrics-based data path allocation
Introduction of a pseudo-6th ISDN splitter with bandstop topology
A 2.6-GHz I/O Buffer for DDR4 & DDR5 SDRAMs in 16-nm FinFET CMOS Process
Digraph Filter Design Based on Directed Laplacian Matrix and Least Squares Method
Low-complexity lattice reduction architecture using interpolation-based QR decomposition for MIMO-OFDM systems
Low-cost variable-length FFT processor for DVB-T/H applications
Multi-Standard Delta-Sigma Decimation Filter Design
CMOS image sensor with shared in-pixel amplifier and calibration facility
A 12-GHz high output power amplifier using 0.18µm SiGe BiCMOS for low power applications
On-Chip-Network cryptosystem: A high throughput and high security architecture
A Wideband Large Dynamic Range Logarithmic RF Power Detector With 50 mV Input Offset Cancellation Range
Parallel motion estimation on SMP system and cluster of SMPs
On the design of a power conversion circuit
A 63 nW, 250 Hz, 70 dB-DR, Subthreshold CMOS Follower-Based LPF for ECG Detection
A CAM/WTA-Based High Speed and Low Power Longest Prefix Matching Circuit Design
High-speed low-power bootstrapped level converter for dual supply systems
Rectanna design for energy harvesting
A Circuit Design of Discretized Chaotic Maps with Two Iterations for Speeding up S-box Generation
A CMOS Temperature Sensor With Single-Point Calibration for Retinal Prosthesis
A 9-bit, 1.08ps resolution two-step time-to-digital converter in 65 nm CMOS for time-mode ADC
High-speed CMOS ramp generator using proteretic comparator
New design for output power improvement of a 20GHz push-push FET DRO
Frequency-invariant pattern synthesis for conformal array with space-time-polarization weighting
Fast sweeping methods for checking passivity of descriptor systems
A Discrete STFT Processor for Real-time Spectrum Analysis
A 0.5V 65nm-CMOS single phase clocked bootstrapped switch with rise time accelerator
Weighted Capacitor Digital-to-Analog Converter adopting extensive charge sharing scheme
High-voltage tolerant switch configuration using standard 3.3-V 0.5-μm silicon-on-sapphire CMOS transistors
Design of sparse arrays with high sidelobe rejection
Design Exploration of In-Situ Error Correction for Multi-Bit Computation-in-Memory Circuits
A 300-GHz Wideband Injection Locked Frequency Quadrupler in 250-nm InP DHBT Technology
Digital to Pulse Converter for Analog in Memory Compute Applications
Simple design of equiripple square root pulse shaping filter
A tight-binding model of the benzene-molecular system
ECC processor over the Koblitz curves with τ-NAF Converter and Square-Square-Add Algorithm
A high speed tracking quantizer for Continuous-Time multi-bit sigma delta modulators
Interceptive side channel attack on AES-128 wireless communications for IoT applications
Live Demo: Sensor network system for rainwater grid: APCCAS track selection: System and networks for safe and secure life
Application-specific design system for 8-bit embedded micro-controller
Channel compensation technology in differential GSV-SVM speaker verification system
A low bandwidth integer motion estimation module for MPEG-2 to H.264 transcoding
The Design of Anti-collision Mechanism of UHF RFID System based on CDMA
Phase Hits Insensitive CSRO
A 4-Channel Neural Stimulation IC Design with Charge Balancing and Exponential Current Output
ARIELLE: AR-based Independent and Experiential Language Learner on the Edge
A reduced jitter-sensitivity clock generation technique for continuous-time ΣΔ modulators
A 4K×2K@60fps Multi-format Multi-function Display Processor for High Perceptual Quality
Building a real-time multiple H.264 video streaming system based on intel IPP
Separation of Individual Noise Sources from Compound Noise Measurements in Digital Circuits
Computation sharing multiplier using redundant binary arithmetic
Physical Design of RISC-V based System-on-Chip using OpenLane
Frequency Synthesizer for Wireless Applications using TDTL
Charge-Pump-Circuit Implementation for Increasing Sink Current in Low-Volage CMOS Retinal-Prosthesis Chips
The design and transport latency analysis of a locality-aware network on chip architecture
Accurate Road Detection from Satellite Images Using Modified U-net
Integrated controller for a 100 MHz DC-DC switching converter
A pixel-level ADC with improved performance trade-off for high-speed CMOS imagers
State-observer-based approach for identification and monitoring of complex dynamical networks
Unknown response masking with minimized observable response loss and mask data
Filterbank Framework for Multicarrier Systems with Improved Subcarrier Separation
A synchronous buck-boost converter on a Silicon-On-Sapphire 0.5µm process
A PCI166-compatible 3×VDD-tolerant mixed-voltage I/O buffer
Low compute complexity BU-based rate control algorithm for H.264/AVC encoder
Performance evaluation of single carrier transmission using frequency domain equalization
A simple and ultra-low power capacitive pressure micro-sensor sensing system design
Comparative analysis of switching performance of transistors in SOS process for RF applications
Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform
PMU standard of China
Improvements of quasi-cyclic low-density parity-check codes based on hybrid structures of BIBD's schemes
Performance Analysis of Non-Profiled Side Channel Attacks Based on Convolutional Neural Networks
Optimizing Computational Efficiency: A Novel Approach through XOR-logic Operation in In-Memory Computing
A comparative analysis on binary and multiple-unary weighted power stage design for digital LDO
An architecture for stereo image matching
Chaos propagation in a ring of coupled circuits generating chaotic and three-periodic attractors
Low delay-variation sub-/near-threshold asynchronous-to-synchronous interface controller for GALS Network-on-Chips
A 1.04 mm 2 , low-power front-end circuit of receiver in 0.18μm CMOS for IEEE 802.11a application
Modeling malware propagation in complex networks based on cellular automata
Auto tuning valve positioner on process control training (PCT) based on PC
Stochastic model of image signals for charged particle detector
A design of a synthesis filter bank with fractional scalability factors
LC-Voltage-Controlled-Oscillator-Based Biosensor in 180-nm CMOS Process Targeting β-Dispersion for Detecting Exosomes
Chip to chip communications for terabit transmission rates
Charging the capacitor via a (Memory) resistor
A novel approach to eliminate zero-sequence harmonics current
High Efficient Architecture of Polynomial Multiplier with Variable Parameter Based on 2KNTT
Energy-and-performance efficient differential domino logic cell libraries for QDI-model-based asynchronous circuits
Implementation of the Gamma Line System Similar to Non-linear Gamma Curve with 2bit Error(LSB)
Effect of multipath fading on the Erlang capacity of imperfect power control in cellular CDMA system
Optimizing the efficiency of DC-DC converters with an analog variable-frequency controller
A semi-monotonic routing method for fanin type Ball Grid Array packages
Live demonstration: IEEE802.11 wireless LAN system verification platform
Hand-held non-invasive NIR device for early stage breast cancer pre-screening
Design of Clocked Transmission Gate Adiabatic Logic Circuit Based on the 3ECEAC
Effect of traffic generation patterns on traffic performance of complex networks
Power saving mobile monitoring system on architectures
New tap-coupling technique for improving skirt characteristics of a λ/4 resonator bandpass filter by placement of attenuation poles
Study of mutual injection pulling in a 5-GHz, 0.18-μm CMOS cascaded PLL
An image estimation method by header information in JPEG 2000 codestreams and its application to image identification
Memory-Efficient Accelerating Schedule for LDPC Decoder
A tunable SC bandpass delta-sigma modulator for multi-standard applications
A New Approach for DAC Non-linearity Compensation in Continuous Time Delta Sigma Modulators
A low kick back noise latched comparator for high speed folding and interpolating ADC
Study of High Voltage Deep Brain Stimulation
Multiple-Loop Analysis and Design for Fast-Transient Capacitor-less LDO with Dual-Path Compensation and Zero-Pole placement in 65-nm CMOS
Effect of Control Delay on Small Signal Model for Buck Converter with Constant on Time Control
A timing driven approach for crosstalk minimization in gridded channel routing
Capacity analysis of forward-link in DS-CDMA cellular system with power control
A 1V low-power CMOS resistance-to-frequency converter using hybrid transconductor for IoT
A 0.006-mm 2 6-to-20-Gb/s NRZ Bang-Bang Clock and Data Recovery Circuit With Dual-Path Loop
An FPGA Implementation of Array LDPC Decoder
An efficient Elastic Net method for edge linking of images
WLAN Location Determination Systems
Adaptive digital filter for gradient magnetic fields measurement in MR tomography
A newly high-speed equalizer for QAM signals
Novel Gate Tracking and N-well Control Circuit for $2\times \text{VDD}$ Tolerant I/O Buffer
Power Consumption in Handheld Computers
Optimizing N-Degree Union Problems in Graph Data Processing for Enhancing the Efficiency of Dynamic Graphs
Live demonstration: A battery smart sensor for smart grid
A High-Throughout Real-Time Prewitt Operator on Embedded NEON+ARM System
Synchronization in complex networks by coupled parametrically excited oscillators with parameter mismatch
Kernel-stopped parallel turbo decoding for HomePlug Green PHY systems
A new battery management system for li-ion battery packs
A 480 Mbps MB-OFDM-based UWB baseband inner transceiver
An Approximate Adder with Reduced Error and Optimized Design Metrics
Asynchronous Time-domain Amperometric Sensor Interface For a Wide Range of Cdl
Digital image sharpening using Riesz fractional order derivative and discrete hartley transform
Digital Audio Broadcasting System Modeling and Hardware Implementation
Stochastic estimation trip frequency of sensitive equipment due to voltage sag
Vehicle tracking by fusing multiple cues in structured environments using particle filter
A 3-5GHz amplitude and spectrum tunable impulse radio UWB transmitter
ABC Classification in Spare Parts for Inventory Management using Ensemble Techniques
Low power, variable resolution pipelined analog to Digital converter with sub flash architecture
Multi-spurious suppression for microstrip dual-mode bandpass filter using triple U-shaped defected ground structure
Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System
A Self-Biased Subthreshold CMOS Voltage Reference with Temperature Compensation Circuit for IoT Self-Powered Sensor Applications
Dynamic mapping method for static and dynamic performance improvement on current-steering digital-to-analog converter
Efficient pre-clipping and clipping algorithms for 3D graphics geometry computation
Design of a 10 kVA HTS transformer prototype
Controllability Gramian for Optimal Placement of Power System Stabilizers in Power Systems
CMOS Temperature Sensor Integrated with High-Speed 10-bit Differential SAR ADC
2.4 GHz High IIP3 and Low-Noise Down-conversion Mixer
Design of AND and NAND Logic Gate Using NDR-BASED Circuit Suitable for CMOS Process
A Transient-Enhanced Capacitor-Less LDO With 30-MHz Bandwidth and High Slew Rate
Insect Classification Using Spatial Pyramid Pooling and Convolution Neural Network
Patch-based finger encoding for hand posture recogntion
A study on footstep detection in outdoor environment using Itakura-Saito distance
Sequential Linear-Dynamic Programming for Reliability Control in Wind Energy Conversion Systems
Step shift: A fast image segmentation algorithm and its hardware implementation for next-generation sequencing fluorescence data
CAN Intrusion Detection System Based on Data Augmentation and Improved Bi-LSTM
Implementation of a personal health monitoring system in cardiology application
Memory size reduction for LDPC layered decoders
An Energy-Efficient and High-Accuracy Spiking Neural Network Utilizing Asynchronous CORDIC for On-FPGA STDP Learning
A Low-Noise Neural Signal Amplifier Achieving 1.6 NEF and 2.56 PEF for Brain-Machine Interface
A novel schmitt trigger with low temperature coeficient
Area efficient current steering DAC using current tuning
An approach to all modes of nonlinear oscillations in three-phase circuits by computer algebra system
Bit-Serial Digital Filter Implementation using a Custom C Compiler
Human tracking system for automatic video surveillance with particle filters
1MS/s low power successive approximations register ADC for 67-fJ/conversion-step
AMVP prediction algorithm for adaptive parallel improvement of HEVC
A sub-1 volt CMOS bandgap reference with high power supply rejection
A low-voltage low power square-root domain filter
A Novel Hardware Architecture for Low Power and Rapid Testing of VLSI Circuits
On the Design of Cosine-Modulated Filter Banks Using Recurrent Frequency-Response Masking
An Efficient Design-for-testability Scheme for 2-D Transform in H.264 Advanced Video Coders
Predictive Mode Searching Policy for H.264/AVC Intra Prediction
A low jitter burst-mode clock and data recovery circuit with two symmetric VCO's
A 0.3-μA Quiescent Current Output Capacitor-Less LDO with Dynamic Slew Rate Enhance Buffer
Model-Based Design Methodology for Non-Inverting Buck-Boost Converter with Enhanced Duty Overlap Control and DVS
A Reconfigurable Satlin/Sigmoid/Gaussian/Triangular Basis Functions Computation Circuit
Settling Time Reduction in a Phase-Locked Loop using Pre-emphasis
Efficient DFV-aware flip-flops
A Low-Power Fully-Differential Chopper-Stabilized LNIA in 22nm FD-SOI for MEMS-based Thermopile Sensors
Design of off-chip capacitor-free CMOS low-dropout voltage regulator
PUF-based Lightweight Authentication for Binarized Neural Networks
A CMOS Differential Difference Amplifier with Reduced Nonlinearity Error of Interpolation for Interpolating ADCs
Memory-Oriented Structural Pruning for Anomalous Sound Detection System on Microcontrollers
Adaptive Damped Jacobi Detector and Architecture for Massive MIMO Uplink
Channel fluctuation measurement for image sensor based I2V-VLC, V2I-VLC, and V2V-VLC
Application of Multi-ported CAM for Parallel Coding
Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method
An Analysis of THD in Class D Amplifiers
A low-voltage fully differential CMOS high-speed track-and-hold circuit
A multi-tap inductor based 2.0-4.1 GHz wideband LC-oscillator
A Novel Hybrid Approach of Color Image Segmentation
A 60GHz on-chip antenna in standard CMOS silicon Technology
A Novel Low Voltage DCVSL Circuit Design based on Wilson Current Mirror
A two-stage pipelined passive charge-sharing SAR ADC
Efficient content based image retrieval through sector histogram
A Unified Reconfigurable Datapath for 5G Compatible LDPC Decoding
A 14b Calibration-Free Pipelined SAR ADC Using a Single-Stage Gain Boost FIA
An IA-Brush interactive painting system
Current-Mode Converters with Adjustable-Slope Compensating Ramp
Multiple-Symbol Parallel CAVLC Decoder for H.264/AVC
Performance of MB-OWDM UWB signals in wireless communications
An integrated low power one-pin crystal oscillator
A Fast Bit-Interleaving RSA Cryptosystem Based on Radix-4 Cellular-Array Modular Multiplier
Video Vehicle Detection Algorithm based on Virtual-Line Group
Replacement of Register with Delay Element for Reducing the Area of Pipelined Circuits
A precision low-power mismatch-compensated sample-and-hold circuit for biomedical applications
A 60µW 10Mb/s fully digital FSK demodulator for power-jitter efficient medical BAN
Designing Asymmetric 2.4 GHz RF Oscillator for improving Signal Integrity by Design of Experiments
On the Configurable Multiprocessor SoC Platform with Crossbar Switch
Low Power Multiplier with Bypassing and Tree Strucuture
Low-voltage high-speed PWM signal generations based on relaxation oscillator
High linear transconductor for multiband CMOS receiver
Fixed Polarity Arithmetic Expansions Calculation from Disjoint Cubes Representation of Ternary Functions
A hybrid NoC architecture utilizing packet transmission priority control method
Revisit to Floating-Point Division Algorithm Based on Taylor-Series Expansion
Key-sensitivity improvement of block cipher systems based on nonlinear feedback shift registers
Power and jitter optimized VCO design using an on-chip supply noise monitoring circuit
A 0.9 V Adaptive Sampling Rate Differential Level Crossing-SAR ADC for Biomedical Signal Acquisition System
Delay variation tolerant clock scheduling for semi-synchronous circuits
Instantaneous electric power's behavior of phase waves and phase-inversion waves on coupled van der Pol oscillators as a ladder
A new methodology for low delay real-time videophone software architecture design
Controlled placement and routing techniques to improve timing balance of WDDL designs in Mesh-based FPGA
A 9T subthreshold SRAM bitcell with data-independent bitline leakage for improved bitline swing and variation tolerance
A high-energy-efficiency link scheme for closed-loop medical monitoring and intervention
Interconnect thermal simulation with higher order spatial accuracy
Low Power FIR Filter Realization Using Minimal Difference Coefficients: Part II - Algorithm
Efficient Hardware Implementation for H.264/AVC Motion Estimation
Fine-grain Sleep Transistor Placement Considering Leakage Feedback Gate
A 0.5-V 2.5-GHz high-gain low-power regenerative amplifier based on Colpitts oscillator topology in 65-nm CMOS
Efficient designs of flaoting-point CORDIC rotation and vectoring operations
Change Point Detection for Time Series Data in Complex Systems
Broadband fully silicon integrated differential balun and LNA for space applications
A MATLAB program for Volterra distortion analysis in CMOS switched source follower
Transient analysis of hybrid system composed of linear lumped elements and frequency dependent lossy transmission lines with distributed sources [VLSI interconnects]
Design of Real and Complex Linear-Phase IIR Modified QMF Banks
New approaches to interconnect macromodeling with explicit delay extraction
Toward A Real-Time Elliptic Curve Cryptography-Based Facial Security System
Using saddle points for subpixel feature detection in camera calibration targets
Type-4 2-D Diagonal and Four-Fold Rotational Symmetry Digital Filter Architectures
A DSP implementation of a voice transcoder for VoIP gateways
A GALS Design with Opposite-Phase Local Clock Assignment for Power Supply Noise Reduction
Multiplier energy reduction through bypassing of partial products
Simplistically universal lossless image coding using integer wavelet transforms and space filling curves
Design of ultra low power stream data receiver based on UHF passive RFID tag system
A 1-V 2.5-mW Transient-Improved Current-Steering DAC using Charge-Removal-Replacement Technique
Multilevel phase change memory cell model
High-Resolution PPM for Time-Based Architectures
An FPGA Based Accelerator of the Bi-Directional Wavefront Algorithm for Pairwise Sequence Alignment
GNSS Precise Positioning Determinations Using Smartphones
A comparative study of hysteretic voltage-mode buck converters for high switching frequency and high accuracy
Secure Control Logic Design for Dual Key Logic Locking
Results on Exactness Properties of the HP-ALF for Inequality Constraints
Design of powers-of-two coefficient FIR filters with minimum arithmetic complexity
Inverse Tangent Based Adaptive IIR Notch Filter
A sub-1V low dropout regulator with improved transient performance for low power digital systems
"Truth from Practice, Learning beyond Teaching" Exploration in Teaching Analog Integrated Circuit
Key Features Selection of Power System Operation Via Improved Clustering Algorithm
A new modulo-N based digital clock synthesizer with an adjustable duty-cycle
Lazy Reduction and Multi-Precision Division Based on Modular Reductions
Highly optimized intra prediction architecture for high resolution application
Non-repetitive encoding with increased degree-1 encoding symbols for LT codes
IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006
Fault tolerance of simplified parallel power converters with current sharing function
A chaos-based image encryption ASIC using reconfigurable logic
New current attenuator circuit in the current mode FFT LSI for OFDM
VESTA: A Versatile SNN-Based Transformer Accelerator with Unified PEs for Multiple Computational Layers
A concurrent low-area dual band 0.9/2.4 GHz LNA in 0.13µm RF CMOS technology for multi-band wireless receiver
Effectiveness of Synchronization and Cooperative Behavior of Multiple Robots based on Swarm AI
A Low-Voltage 2.4GHz VCO with 3D Helical Inductors
A Wireless Power Design with High PCE and Fast Transient Response over a Large Loading Range for Multi-channel Neural Stimulators
An optimal control strategy for power capacity based on railway power static conditioner
Fusion methods for boosting performance of speaker identification systems
The Calculation of the Voltage Distribution in Transformer Windings under VFTO Based on FDTD Method
A low-power switched-capacitor humidity sensor interface