yusuke1997/dblp-id-title huggingface dataset:
Efficient End-to-End 6-Dof Grasp Detection Framework for Edge Devices with Hierarchical Heatmaps and Feature Propagation
H.26L-based fine granularity scalable video coding
Low power 2.4 GHz quadrature generation for body area network applications
Analysis and design of cellular neural networks, through a space-time spectral approach
A Framework for the Design and Simulation of Embedded Vision Applications Based on OpenVX and ROS
28nm Implementation Aspects of a 0.9V 75MHz 4 th -Order Rauch Analog Filter
Design and Simulation of Nonlinear Switched Capacitor Autonomous Circuits Containing Nonlinear Active Resistor
Live Demonstration: A Programmable A/D Converter Array with Interactive Compiler
Prediction of Subharmonic Oscillation in a PV-fed Quadratic Boost Converter with Nonlinear Inductors
Synchronization in networks of Rössler oscillators with long-range interactions
Power-efficient focal-plane image representation for extraction of enriched Viola-Jones features
A nonparametric framework for quantifying generative inference on neuromorphic systems
Enabling Machine Learning for Power Modeling via Artificial Netlist Generation
Nonvolatile logic and memory devices based on spintronics
A GPU implementation of the Montgomery multiplication algorithm for elliptic curve cryptography
Skip-ST: Anomaly Detection for Medical Images Using Student-Teacher Network with Skip Connections
A Current-Mode Floating-Bridge Technique for Closed-Loop ΣΔ Readout of Wheatstone Bridge Sensors
Density Estimation-based Effective Sampling Strategy for Neural Rendering
New output stage for low supply voltage, high-performance CMOS current mirrors
Generation and properties of new fastest linearly independent transforms over GF(2) with reordering
A novel motion detection pointing device Using a binary CMOS image sensor
A 30GHz 155Mbit/s self-calibrating direct transmitter
Compact Hamming-Comparator-based rank order filter for digital VLSI and FPGA implementations
High-speed adaptive RF phased array
A split transconductor high-speed SAR ADC
Linearization of CMOS LNA's via optimum gate biasing
A Single-Channel 18.5 GS/s 5-bit Flash ADC using a Body-Biased Comparator Architecture in 22nm FD-SOI
New block-based motion estimation for sequences with illumination variation and its application to video mosaicking
Optimization of CMOS MEMS microwave power sensors
Simple implementations of homotopy algorithms for finding DC solutions of nonlinear circuits
Towards Defining an Efficient and Expandable File Format for AI-Generated Contents
A low distortion, current feedback, programmable gain amplifier
A -72 dB @ 2 MHz IM3 CMOS tunable pseudo-differential transconductor
CMOS high-linear wide-dynamic range RF on-chip filters using Q-enhanced LC filters
tinyRadar: mmWave Radar based Human Activity Classification for Edge Computing
Coded excitation, motion and signal-to-noise ratio
Design and modeling of an inductive coupling wireless power transfer using printed spirals on medical hydrocolloid dressings
A novel low-power high-speed rail-to-rail class-B buffer amplifier for LCD output drivers
Simple noise formulas for MOS analog design
New narrowband active noise control systems with significantly less computational requirements
M 2 CA: Modular Memristive Crossbar Arrays
A SAW-less 0.5-2.5 GHz receiver front-end with 80 dB 3 rd order harmonic rejection ratio
Frequency Behaviour of FeFET-Based Ultra-Low-Power Coupled Oscillator Neurons
An Inkjet-Printed Paper-Based Flexible Sensor for Pressure Mapping Applications
A variation tolerant driving technique for all-digital self-timed 3-level signaling high-speed SerDes transceivers for on-chip networks
Logic Circuit and Memory Design for In-Memory Computing Applications using Bipolar RRAMs
Energy-Efficient RAR3 Password Recovery with Dual-Granularity Data Path Strategy
Duty Cycle Correction Circuit and Its Application for High Speed Random Number Generation
A Programmable and Adaptive Dead-Time Controller for Low-Offset Output Generation for Cryo-Cooler Drive Applications
Performance analysis of adaptive IIR notch filters based on least mean p-power error criterion
On modeling, analysis and design of piecewise linear control systems
High performance prime field multiplication for GPU
Analysis and Comparison of Distortion of Miller and Feed-Forward Opamps in Negative Feedback
"Intermittent" chaos and subharmonics in switching power supplies
Content-based video copy detection with video signature
Effectiveness of the Bio-Inspired Firefly Algorithm in Adaptive Signal Processing for Nonlinear Systems
Controlling bifurcation and chaos in Internet congestion control model
Analysis of Timing Jitter in CMOS Ring Oscillators
A Low power 10bit 500kS/s delta-modulated SAR ADC (DMSAR ADC) for implantable medical devices
A Memory-Based Continuous-Flow FFT Processor with a Conflict-Free In-Place Addressing Scheme Supporting Composite Power Points
A minimum transmission power AM-MIMO system
Design of a DSP-based 24 bit digital audio equalizer for automotive applications
A stenographic framework for dual authentication and compression of high resolution imagery
Asynchronous symbol timing recovery with adaptive interpolation filter for high data-rate digital mobile radio
Tracking by nonuniform amplitude division based LMS algorithm for time varying channels
FPGA implementation of heterogeneous multicore platform with SIMD/MIMD custom accelerators
Design of Perfect Reconstruction QMF Banks by a Null-Space Projection Method
Distributed Body Sensor Network System Based on Stretchable Conductive Wires and Wearable Sensors for Motion Detection
Lossless/lossy coding gain to evaluate coding performance of the lossless/lossy wavelet
Application of Relaxation-Based Technique to ADI-FDTD Method and Its Estimation
On the relevancy of the perfect reconstruction property when minimizing the mean square error in FIR MIMO filter systems
Inductive interconnect width optimization for low power
Elimination of Mutual Couplings in Discrete Element Networks Arising from the Modeling of High Speed Digital Interconnections
An enhanced hexagonal search algorithm for block motion estimation
Optical network-on-chip reconfigurable model for multi-level analysis
A new method for the design of stable IIR 2-D digital filters using sequential semidefinite programming
A 2.5-V 4-µW Low-Power Delta-Sigma Modulator for Implantable Cardiac Pacemaker with Periodic Bias Current Reduction Technique
Deconvolution based criteria for parameter estimation of multidimensional non-Gaussian signal models using noisy data
Robust DC-DC Converter using a-InGaZnO TFTs for Self-Contained Electronics
Design space exploration of low-phase-noise LC-VCO using multiple-divide technique
Single variable symmetry conditions in Boolean functions through Reed-Muller transform
A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links
Low-cost dithering generator for accurate ADC linearity test
Optimum threshold-voltage tuning for low-power, high-performance microprocessor
Single image super-resolution using hybrid patch search and local self-similarity
Accelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture
Local self-similarity based backprojection for image upscaling
Integration System as Adaptive Control System
A Spike-Event-Based Neuromorphic Processor with Enhanced On-Chip STDP Learning in 28nm CMOS
Effect of Time Constant on Speech Enhancement in Hearing Aids Based on Auditory Neural Feedback
PACENet: Energy efficient acceleration for convolutional network on embedded platform
Fast variable block-size motion estimation algorithm based on merge and slit procedures for H.264/MPEG-4 AVC
Bayesian Contrastive Learning with Manifold Regularization for Self-Supervised Skeleton Based Action Recognition
Design methodology for Sigma-Delta modulators based on a genetic algorithm using hybrid cost functions
A Digitally Assisted Baseband Filter with 9MHz Bandwidth and 0.3 dB IQ Mismatch for a WLAN Receiver Chain
A monolithic 2.45 GHz, 0.56 W power amplifier with 45% PAE at 2.4 V in standard 25 GHz f T Si-bipolar
A Hyperdimensional Computing Architecture with 4.4x Energy Efficiency in 65nm CMOS
A Digital Jitter Compensation Technique for Analog-to-Digital Converters
Incremental Delta-Sigma ADC with Reduced Conversion Cycles via Quantization-Skip
Segmentation based design of serial parallel multipliers
Floating Gate Charge-Sharing: a Novel Circuit for Analog Trimming
Epileptic seizure detection in grouped multi-channel EEG signal using ICA and wavelet transform
A Digital Driving Technique for an 8-bit QVGA AMOLED using Delta-sigma Modulation
FIR filters for systems with input clock jitter
Ultra-fast hysteretic single-inductor-dual-output boost regulator with predictable noise spectrum and minimized cross-regulation
Prototype rotation based assisted image analysis for 3D vision system
Irreversible bit erasures in binary multipliers
A sideband-suppressed low-power synthesizer for 14-band dual-carrier MB-OFDM UWB transceivers
A Power Side-Channel Attack on Flash ADC
Classification of Trojan Nets Based on SCOAP Values using Supervised Learning
Convergence analysis of an oversampled subband adaptive filtering structure with local errors
Impact of Control Signal Non-Idealties on Two-Phase Charge Pumps
An Energy Efficient Delay Element with Self-shutoff Logic and Delay Extension
16 Gbps, 19.6mW Ultralow-Power-Consumption Continuous-phase Frequency-shift-keying Transmitter in 65 nm CMOS technology
A power-aware IP core generator for the one-dimensional discrete Fourier transform
Bit stream processing for Delta-Sigma FM-to-digital converters
A 1-V 2.4-GHz CMOS LNA with source degeneration as image-rejection notch filter
Color image coding based on the colorization algorithm using multiple resolution images
A dual mode decision feedback equalizer employing the conjugate gradient algorithm
Low-power implementation of polyphase filters in Quadratic Residue Number system
Various impulsive synchronous patterns from mutually coupled ISC chaotic oscillators
On the Stability and Configuration of Sigma Data Modulators
Individual optimization of FOV for vertices and side PDs of Angle Diversity Receiver for Underwater Visible Light Communication
A mini-invasive multi-function biomedical pressure measurement system ASIC
A Multiplier Structure Based on a Novel Real-time CSD Recoding
Bio-inspired computing with resistive memories - models, architectures and applications
Detection of on-chip temperature gradient using a 1.5V low power CMOS temperature sensor
Further results on blind equalization and estimation of SIMO time-varying channels
Circuit realization of spectral transforms in Fibonacci interconnection topologies
Design of Optimal Dynamic Range Integrated Mixer-Filter Systems
High-side NMOS power switch and bootstrap driver for high-frequency fully-integrated converters with enhanced efficiency
Local competitive signals for an unsupervised competitive neural network
A low latency bi-directional serial-parallel multiplier architecture
Testing complementary pass-transistor logic circuits
Module placement with pre-placed modules using the B*-tree representation
Double Edge Triggered Devices: Speed and Power Considerations
Fractional-N Sub-Sampling PLL Using a Calibrated Delay Line for Phase Noise Cancellation
A novel BP-based image retrieval system
A 1S1R Model with the Monte Carlo Function for Subthreshold Sensing Operation
Distributed video coding using wavelet
High-speed 8/16/32-point DCT Architecture Using Fixed-rotation Adaptive CORDIC
A compact biquadratic g m -C filter structure for low-voltage and high frequency applications
Lip Synchronization in 3-D Model Based Coding for Video-Conferencing
IC Implementation of Switched-Capacitor Chaotic Neuron
A radix-2 n vector inner product
A 12-Bit 100MS/s SAR ADC with Digital Error Correction and High-Speed LMS-Based Background Calibration
Artificial immune system based methods for spam filtering
High order MEMS models for system design
Algebraic integer based 8×8 2-D DCT architecture for digital video processing
Multi-objective optimization of minority-3 functions for ultra-low voltage supplies
Efficient Image Compression through Extreme Image Rescaling
Fully-additive printed electronics: Process Development Kit
A New CMOS BPSK Modulator with Optimal Transaction Bandwidth Control
A 5GHz to 6GHz integrated differential LNA
A novel low-cost high-performance VLSI architecture for MPEG-4 AVC/H.264 CAVLC decoding
A new integrated approach to the design of low-complexity FIR filters
A Low Power Domino with Differential-Controlled-Keeper
Optimization of area in digit-serial Multiple Constant Multiplications at gate-level
A Low-footprint FFT Accelerator for a RISC-V-based Multi-core DSP in FMCW Radars
A Fully-Parallel Reconfigurable Spiking Neural Network Accelerator with Structured Sparse Connections
A ΔΣ-cyclic hybrid ADC for parallel readout sensor applications
A spectro-temporal algorithm for pitch frequency estimation from noisy observations
A Class of Cosine-Modulated Filter Banks with Multiple Prototype Filters
Effects of Coupling Patterns on Functionality and Robustness of Cyber-Coupled Power Systems
Modeling of MOS transistors based on genetic algorithm and simulated annealing
Time-frequency analysis in power measurement using complex wavelets
Design and Fabrication of Ink-Jet Printed Logic Gates using SWCNT-FET for Flexible Circuit Applications
Radios for the brain? a practical micropower sensing and algorithm architecture for neurostimulators
Encoded finite-state machines for non-concurrent error detection and identification
Reduced binary tree FIR Filters
A 120dB Programmable-Range On-Chip Pulse Generator for Characterizing Ferroelectric Devices
A Wideband Envelope Detector with Low Ripple and High Detection Speed
A compact reconfigurable mixed-signal implementation of synaptic plasticity in spiking neurons
Control-to-output and duty ratio-to-inductor current transfer functions of peak current-mode controlled dc-dc PWM buck converter in CCM
Resonant dc/dc Converter with Class E Inverter and Class E Synchronous Rectifier Using Thinned-Out Method
An adaptive WOS filtering algorithm without using threshold decomposition
Accurate spectral testing of the signals with amplitude drift
A direct digital RF amplitude modulator
Tracking analysis of an adaptive IIR notch filter using gradient-based algorithm
60 GHz SiGe-BiCMOS Radio for OFDM Transmission
A single stage single switch power factor correction converter
A Fully Integrated W-Band Four-Channel Silicon-Based Radiometer Array in 65-nm CMOS
Calculating Distortion Levels in Sampled-Data Circuits Using SPICE
Optimal path finding with space variant metric weights via multilayer CNN-UM
Real Time Tree Row Volume Estimation for Efficient Application of Phytosanitary Products in Fruit Trees
Wavelet-Based Learned Scalable Video Coding
Saliency detection from joint embedding of spatial and color cues
A new QR-decomposition based recursive frequency estimator for multiple sinusoids in impulsive noise environment
Filters Derived from the Addtion or Subtraction of Two m-D All-Pass Filters
Analysis and design of three-state controlled transition mode for a buck-boost converter with efficiency and stability enhancement
Design of 2-Dimensional Digital Filters Using 2-D All-Pass Building Blocks
Reduced-size ultra-wideband true-time-delay beam-forming receivers
Steady State Analysis of Crystal Oscillator Circuits Using a Self-consistent Carleman Linearization
Design of 4 × 4 MIMO-OFDMA receiver with precode codebook search for 3GPP-LTE
Equivalence classes of circuit mutants for experimental design
Loop delay compensation in bandpass continuous-time Sigma Delta modulators without additional feedback coefficients
Analog Softmax with Wide Input Current Range for In-Memory Computing
Optimal reactive power dispatch with fuzzy variables
A 2Gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications
Modelling and optimization of on-chip spiral inductor in S-parameter domain
Integrated systems for high-fidelity sensing and manipulation of brain neurochemistry
Performance Evaluation of Convolutive Blind Source Separation of Mixtures of Unequal-Level Speech Signals
A 10-bit 1 MS/s 3-step ADC with bitstream-based sub-DAC and sub-ADC calibration
Design trade-offs of integrated polygonal inductors for DC-DC power converters
A Fuzzy-logic based Tool for Topology Selection in Analog Synthesis
Roundoff error analysis of the pipelined ADPCM coder
An Asymptotic Estimate of the Numbers of Rectangular Drawings or Floorplans
Recent trends in fuzzy control of electrical drives: an industry point of view
Image deringing using quadtree based block-shift filtering
A New One-pass Complexity-Scalable Computation-control Method for Video Coding
A novel multiplexer based truncated array multiplier
A 115mW 12-bit 50 MSPS pipelined ADC
Energy-efficient magnetic circuits based on nanoelectronic devices
Real time multiple objects tracking based on a bio-inspired processing cascade architecture
Rank-order Filtering Algorithms: A Comparison of VLSI Implementations
An integrated electronic ballast for small wattage high intensity discharge lamps
Auxiliary Noise Power Scheduling Based on Gradient of Error Power for Pre-inverse Active Noise Control
A novel method of synthesizing reversible logic
An Intracortical Wireless Bidirectional Brain-Computer Interface with High Data Density
Wave Digital Modeling of Circuits with a Single Variable-µ Pentode based on Neural Networks
Semi-symbolic modeling and simulation of circuits and systems
Improved 6.7GHz CMOS VCO delay cell with up to seven octave tuning range
Modelling of a 100 kW-85 kHz Three-Phase System for Static Wireless Charging and Comparison with a Classical Single-Phase System
Robust DNA Image Storage Decoding with Residual CNN
Prioritized Reference Decision for Efficient Motion Vector Coding
A SAW-less dual-band RF front-end for IR-UWB receiver in 65nm CMOS
An implantable I-UWB transceiver architecture with power carrier synchronization
A current-mode 6-9GHz UWB transmitter with output power flattening technique
SEM2GDS: A Deep-Learning Based Framework To Detect Malicious Modifications In IC Layout
Approximation algorithms for the rectilinear Steiner tree problem with obstacles
A programmable mutual capacitance sensing circuit for a large-sized touch panel
Low cost and high efficiency BIST scheme with 2-level LFSR and ATPT
A charge limiting and redistribution method for delay line locking in multi-output clock generation
Realizing higher-order nonlinear Wiener adaptive systems [Wiener filter example]
FPGA implementation of controller-datapath pair in custom image processor design
Machine Learning for SRAM Stability Analysis
A 1.5V CMOS Balanced Differential Switched-Capacitor Filter with Internal Clock Boosters
Rate-distortion optimized block classification and bit allocation in screen video compression
Performance analysis of flagged prefix adders with logical effort
Enhanced CNN Performance without Retraining Via Weight Approximation and Data Reuse
Characterizing fast-scale instability in a buck-based switching amplifier for wideband tracking
Content-based scalable sports video retrieval system
Fast control grid point estimation for mesh based motion estimation
DLPrPPG: Development and Design of Deep Learning Platform for Remote Photoplethysmography
HeMPS - a Framework for NoC-based MPSoC Generation
Analogue interpolation based direct digital frequency synthesis
Autonomous UAV Navigation: A DDPG-Based Deep Reinforcement Learning Approach
Common-mode termination requirements in concurrent dual-band push-pull power amplifiers
High-Efficiency Charge Pumps with No Reversion Loss by Utilizing Gate Voltage Boosting Technique
A new class of integrated CMOS rectifiers with improved PVT-compensated efficiency
A CMOS Image Sensor with Column-Parallel Cyclic-SAR ADC
Resonance properties of Chebyshev chaotic sequences
Underwater Optical Wireless Data and Power Transfer System for Internet of Underwater Things
A Comparative Analysis of Time-Domain and Digital-Domain Hardware Accelerators for Neural Networks
A heuristic method for constructing hexagonal Steiner minimal trees for routing in VLSI
Charge-based MOS correlated double sampling comparator and folding circuit
Deep Learning Based Gait Analysis for Contactless Dementia Detection System from Video Camera
Modeling nanoelectronic CNN cells: CMOS, SETs and QCAs
Base-layer motion estimation with limited enhancement-layer search window for hardware H.264/SVC encoder
Asymptotical optimality of DFT based DMT transceivers
A 12V-Input 1.8V-0.8V-Output Multiple-Output Hybrid Buck DC-DC Converter with a Shared Flying Capacitor
Single Image Dehazing using a Novel Histogram Tranformation Network
Stability and Mismatch Robustness of a Leakage Current Cancellation Technique
Learning to Recognise Words Using Visually Grounded Speech
Efficient Noise Analysis Methods for Large Non-ideal SC and SI Circuits
Canonical Realisation of Ladder Based Transconductor-capacitor Filters
Technology Enabling Circuits and Systems for the Internet-of-Things: An Overview
Data Matrix Code Recognition Using the Eye-RIS Vision System
Graph & network theory and cellular mobile communications
Improving Optimal Binarization with Update On-the-fly in G-PCC Entropy Coding: Probability Initialization and Adaptive Bounds Setting for Context Models
Ultra-low standby-currents for deep sub-micron VLSI CMOS circuits: smart series switch
VLSI friendly computation reduction scheme in H.264/AVC motion estimation
Multi-objective directional sensor placement for wireless sensor networks
Energy-efficient scheduling on multi-context FPGAs
The Active-R Filter Technique Applied to Current-Feedback Op-Amps
Gradient Local Binary Pattern Layer to Initialize the Convolutional Neural Networks
Mismatch Compensation of CMOS Current Mirrors using Floating-gate Transistors
UbiMoE: A Ubiquitous Mixture-of-Experts Vision Transformer Accelerator With Hybrid Computation Pattern on FPGA
Live demonstration: Feature extraction system using restricted Boltzmann machines on FPGA
Image information splitting framework with importance sampling for robust transmission
Efficient nuclei segmentation based on spectral graph partitioning
High-Q Coupled-Coil Power-Combining Technique for Fully Integrated CMOS Power Amplifier
On the theory and design of a class of recombination nonuniform filter banks with low-delay FIR and IIR filters
An Edge AI Accelerator Design Based on HDC Model for Real-time EEG-based Emotion Recognition System with RISC-V FPGA Platform
EAMUSE: An Extended Algorithm for Multiple Sources Extraction
A frequency domain equalizer for WLAN 802.11g single-carrier transmission mode
A Wireless Biosensor Node for Real-Time Crop Monitoring in Precision Agriculture
Techniques for Area-time Efficient Image Rotation
Effective Low-Pass Filter Function Due to the Use of a Comb Filter and Virtual Oversampling
Generalized fastest linearly independent arithmetic transforms
Low cost efficient architecture for H.264 motion estimation
A novel predictive global motion estimation for video coding
Motion adaptive de-interlacing by horizontal motion detection and enhanced ELA processing
Restoration of noise corrupted images using new 2-D window families
A novel homotopy-based algorithm for the closest unstable equilibrium point method in nonlinear stability analysis
A 2-approximation algorithm FSA+1 to (lambda+1)-edge-connect a specified set of vertices in a lambda-edge-connected graph
Live demonstration: Multiple-timescale plasticity in a neuromorphic system
Design and Implementation of Optical Fiber-based Visible Light Communication System
Frequency analysis of wireless accelerometer and EMG sensors data: Towards discrimination of normal and asymmetric walking pattern
Locally connected oscillatory networks acting as fully connected oscillatory networks
A new cost model for high-level power optimization and its application
Sampling of Quadrature-Phase Quantities
A new initialization technique for asynchronous circuits
An optimal tone reproduction curve operator for the display of high dynamic range images
A linear-control wide-band CMOS attenuator
Finite Word-length Effects on Arithmetic Codes