yusuke1997/dblp-id-title huggingface dataset:
Diversity-Preserving Robust Watermarking for Diffusion Model Generated Images
VLSI-efficient implementation of full adder-based median filter
Direct digital frequency synthesizer with multi-stage linear interpolation
Comparison of a 17 b multiplier in Dual-rail domino and in Dual-rail D 3 L (D 4 L) logic styles
Built-In Self Test (BIST) Design of High-Speed Carry-Free Dividers
A novel learning algorithm for global synchronization of oscillatory neural networks
A Fully-Integrated Half-Bridge GaN Driver for Bidirectional Power Transfer
On the use of pseudo-coevolutionary genetic algorithms with adaptive migration for design of power electronics regulators
A switched-MOSFET filter for application in hearing aid devices
Edge FPGA-based Onsite Neural Network Training
A 2GHz On-Chip-Oscilloscope with High Accuracy Pulse Width Detection for Auto-Peak-Power Controller & Peak-Current Detector in Voltage-Mode DToF Driver
Variable sampling window flip-flop for low-power application
Image Representation and Deep Inception-Attention for File-type and Malware Classification
A 13bit 200MS/S pipeline ADC with current-mode MDACs
Realizations of CMOS Fully Differential Current Followers/Amplifiers
A transform, lighting and setup ASIC for surface splatting
Enhanced Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation
Linear sparse array synthesis via convex optimization
A multiplier-free fixed-task digital CNN array for video segmentation system
Broadband Lossless Monolithic Microwave Floating Active Inductor
Improved formulations for fast polynomial transform
A novel and efficient timing-driven global router for standard cell layout design based on critical network concept
A smart bi-directional telemetry unit for retinal prosthetic device
A 65nm 100MS/s-400MS/s Multi-Column SAR/SS ADC with Reconfigurable 2-8 Bit Resolution for Optical and In-memory Computing
Automatic detection of region of interest and center point of left ventricle using watershed segmentation
Multiple layer parallel motion estimation on GPU for High Efficiency Video Coding (HEVC)
IC design of an analog tunable crossover network
Input Correlated Swap-Sampling Technique for Input Driver Power Reduction in a 12b 25MS/s SAR ADC
A mixed-signal adaptive filter for level-crossing analog-to-digital converter
An auto-tuning structure for continuous time sigma-delta AD converter and high precision filters
A Fault Resistant AES via Input-Output Differential Tables with DPA Awareness
Subband decomposition oriented multirate electrical power network digital simulation
On the impact of traffic statistics on quality of service for networks on chip
A high throughput H.264/AVC intra-frame encoding loop architecture for HD1080p
A Novel Active Decoupling Capacitor Design in 90nm CMOS
Activity-driven, event-based vision sensors
Cost-effective co-verification using RTL-accurate C models
A low-noise nonlinear feedback technique for compensating offset in analog multipliers
Estimating Key Parameters in the EKV MOST Model for Analogue Desgin and Simulation
A hybrid GA for the design of multiplication-free frequency response masking filters [FIR digital filters]
A dynamic analysis of a latched CMOS comparator
A Novel Low Power Hybrid Loop Filter for Continuous-time Sigma-delta Modulators
On the design of digital broadband beamformer for uniform circular array with frequency invariant characteristics
A computational technique and a VLSI architecture for digital pulse shaping in OFDM modems
PVT-invariant single-to-differential data converter with minimum skew and duty-ratio distortion
Modeling the effects of BJT base currents on the dynamics of a log-domain filter
A method to quantify the dependence of spur heights on offset current in a CP-PLL
Fault Tolerant Signal Processing for Masking Transient Errors in VLSI Signal Processors
MEMS optical position sensor for sun tracking
Graph Coloring Using Coupled Oscillator-Based Dynamical Systems
Design of a Low Latency 40 Gb/s Flow-Based Traffic Manager Using High-Level Synthesis
Digital correction for improved spectral response in signal generation systems
Design of enhancement current-balanced logic for mixed-signal ICs
Hardness and Texture Recognition based on PVDF Sensors and Embedded Machine Learning: A case study on Hannes prosthetic hand
Multimode digital SMPS controller IC for low-power management
On the Intrinsic Linearity Limitations of Single-Bit Delta Sigma Modulators
Robust 7-nm SRAM design on a predictive PDK
Background digital error correction technique for pipelined analog-digital converters
A robust multichannel speech enhancement method based on decorrelation
Adaptive Pinning Synchronization of A General Complex Dynamical Network
On the Timing Uncertainty in Delay-Line-based Time Measurement Applications Targeting FPGAs
Estimating loads in distribution feeders using a state estimator algorithm with additional adjustment of transformers loading factors
Mismatch-induced tradeoffs and scalability of mixed-signal vision chips
High-Speed, High-Reslution Analogue-To-Digital Conversion Using a Hybrid Electro-Optic Approach
Error protection for JPEG2000 encoded images and its evaluation over OFDM channel
Robustness of Sub-22nm multigate devices against physical variability
A complete neuromorphic solution to outdoor navigation and path planning
Proportionate affine projection algorithms from a basis pursuit perspective
An efficient orthogonal pulse set generator for high-speed sub-GHz UWB communications
Link and energy adaptive UWB-based embedded sensing with renewable energy
A silicon based fdNIRS system with integrated tDCS on chip for non-invasive closed-loop neuro stimulation
Enhanced Multiple-Output Programmable Current Pulse Generator
Reminiscence: 60 Years of teaching within 84 years of life
High Speed and Area-Efficient Multiply Accumulate (MAC) Unit for Digital Signal Prossing Applications
Ultra-Low Leakage ESD Protection Achieving 10.5 fA Leakage
Synthesis of reconfigurable multiplier blocks: part I - fundamentals
Active noise cancellation of motion artifacts in pulse oximetry using isobestic wavelength light source
Gain mismatch-balanced I/Q down-conversion mixer for UWB
Contactless testing of on-chip oscillator operation
Low-power Spike-based Wearable Analytics on RRAM Crossbars
High-Pass Sigma-Delta Modulator with Operational Amplifier Sharing and Noise-Coupling Technique for Biomedical Signal Acquisition
Pipeline architecture for DCT/IDCT
A performance-aware IP core design for multimode transform coding using scalable-DA algorithm
System-Level Design for Partially Reconfigurable Hardware
Low-lighting video enhancement using constrained spatial-temporal model for real-time mobile communication
Channel Sensing Based Distance Estimation in Backscattering RF Tag Networks
Enhanced Image Trans-coding Using Reversible Data Hiding
APCer: An Agile Physical Compiler for Multi-Port Register File
A 39 µW body channel communication wake-up receiver with injection-locking ring-oscillator for wireless body area network
A 27-GHz low-power push-push LC VCO with wide tuning range in 65nm CMOS
Log-likelihood ratio algorithm for rate compatible modulation
700MHz RF transceiver of base station for 802.16e
Exact channel routing using symbolic representation
Exact Stimuli Minimization for Simulation-Based Verification
Blindly evaluating stereoscopic image quality with free-energy principle
Color reproduction for digital imaging systems
Omni-Directional Transistors: Enabling Tensile-Force-Resilient Operation for Flexible Circuits and Systems
Quasi-parallel multi-path detection architecture using floating-gate-MOS-based CDMA matched filters
Video-on-demand server system design with random early migration
A 162nW, 0.845pJ/step Resistance-to-Digital Converter for Miniature Battery-Powered Sensing Systems
Symbol and carrier frequency offset synchronization for IEEE802.16e
Generalized correlation-delay-shift-keying scheme for noncoherent chaos-based communication systems
Frequency driven repeater insertion for deep submicron
Multi-Incentive Delay-Based (MID) PUF
Optimized FPGA-implementation of quadrature DDS
Simplified Hardware Implementation of Memoryless Dot Product for Neural Network Inference
Ultra-low-power control systems for electrostatic energy harvesters
A High In-Bnad Linearity Gain-Boosted N-path Filter with BW-Extended
A low-voltage translinear second-order quadrature oscillator
On-line signature verification using a nonstationary autoregressive model representation
Fine registration of 3D point clouds with iterative closest point using an RGB-D camera
An asynchronous delta-sigma converter implementation
Parallelism to reduce power consumption on FPGA spatiotemporal image processing
Fingertip Laser Diode System Enables Both Time-Domain and Frequency-Domain Photoacoustic Imaging
Chaos in delay locked loop
The effect of mismatch and disturbances on the quadrature relation of a cross-coupled relaxation oscillator
A low power low latency comparator for ramp ADC in CMOS imagers
QuickTrace: An Efficient Contour Tracing Algorithm for Defect Robustness Simulation of Silicon Dangling Bond Logic
Hardware accelerators for recurrent neural networks on FPGA
Critical Charge Characterization for Soft Error Rate Modeling in 90nm SRAM
A Flash LiDAR with SA-Based Pulse Position Modulation for Multi-user Interference Cancellation
Effect of nonlinearity in the CMFB circuit that uses the differential-difference amplifier
A low-voltage adaptive switched-current SDM for bio-acquisition microsystems
Energy-efficiency bounds for noise-tolerant dynamic circuits
New CMOS Logarithmic A/D Converters Employing Pipeline and Algorithmic Architectures
Spatiotemporal segmentation and tracking of objects in color image sequences
Simultaneous bidirectional signaling with adaptive pre-emphasis
High-performance systolic arrays for band matrix multiplication
Design of IIR digital allpass filters using least pth phase error criterion
A low complexity architecture for binary image erosion and dilation using structuring element decomposition
Minimum Structural Transformation in Parallel Prefix Adders and its Application to Search-Based Optimization
Accelerated-Detection of Regeneration in Swing-Limited Comparators used in Slope ADCs
A novel approach to perform reversible addition/subtraction operations using deoxyribonucleic acid
Compact Analytical Description of Digital Radio-Frequency Pulse-Width Modulated Signals
High-DR frame-free PWM imaging with asynchronous AER intensity encoding and focal-plane temporal redundancy suppression
A Speed-Enhanced Asynchronous SAR Control Logic Based on Two-Phase Handshake Architecture
A Wideband Linear GaN-on-SiC Power Amplifier using Harmonic-Tuning Technique for 5G NewRadio FR2 Applications
Avoiding unnecessary frame memory access and multi-frame motion estimation computation in H.264/AVC
Global exponential stability of generalized neural networks with time-varying delays
A New Clock-Feedthrough Cancellation Method for Second Generation Switched-Current Circuits
A Wide Bandwidth Sige Broadband Amplifier for 100 Gb/s Ethernet Applications
Power-area-DR-frequency-selectivity tradeoffs in weakly nonlinear active filters
A CMOS current-mode squarer/rectifier circuit
Fast convergence transversal adaptive filtering algorithm for impulsive environment based on T distribution assumption
Low-power EEG monitor based on compressed sensing with compressed domain noise rejection
MRAM crossbar based configurable logic block
Efficient Color Space Conversion using Custom Instruction in a RISC Processor
High performance implementation of Neural Networks by networks on chip with 5-port 2-virtual channels
Fast Spectrum Computation for Logic Functions using Binary Decision Diagrams
Reconfigurable memory bus systems using multi-Gbps/pin CDMA I/O transceivers
BCS: A Binary Cuckoo Search algorithm for feature selection
An 11 Bit Sub-Ranging SAR ADC with Input Signal Range of Twice Supply Voltage
Fast transient digitally controlled buck regulator with inductor current slew-rate boost
Fully-Differential Universal Frequency Filter with Dual-Parameter Control of the Pole Frequency and Quality Factor
An Event-Driven Compressive Neuromorphic System for Cardiac Arrhythmia Detection
Analog Design Optimization : A Case Study
1V rail-to-rail constant Gm amplifier with common-mode elimination technique
Reconfigurable CMOS Image Sensor Design with Built-in Correlated Double Sampling
Switched-capacitor based implantable low-power wireless microstimulating systems
Single Digital Predistortion Technique for Phased Array Linearization
A Low-Power 12-Phase Single Capacitively Coupled Ring VCO for Wideband N-Path Systems
Design considerations for a CMOS Lab-on-Chip microheater array to facilitate the in vitro thermal stimulation of neurons
GDS2SEM: Diffusion-based Layout-to-SEM Post-Fabrication Emulation for IC Validation
NES-DM: Representative Attention-based CNN Network for Medical Image Classification
OTA-Free MASH 2-2 Noise Shaping SAR ADC: System and Design Considerations
A stream register file unit for reconfigurable processors
Global asymptotic stability of a class of neural networks with time varying delays
Motion Artefact Removal using Single Beat Classification of Photoplethysmographic Signals
Education of Digital and Analog Circuits supported by computer algebra system
Digital Filter Design Optimization using Partial Cost Functions
In-pixel voltage-controlled ring-oscillator for phase interpolation in ToF image sensors
Feature windowing-based Thai text-dependent speaker identification using MLP with backpropagation algorithm
Modeling and exploration of a reconfigurable architecture for digital holographic imaging
A fast method for islanding analysis in power system grids
On the accuracy improvement of low-power orientation filters using IMU and MARG sensor arrays
The Use of Symbolic-numerical Methods for Electronic Circuit Analysis
Optimizing the compaction gain in a class of IIR filters
Region-based relevance feedback in image retrieval
New calibration technique for current-steering DACs
A CMOS micro-power wideband data/power transfer system for biomedical implants
POPPINS: A Population-Based Digital Spiking Neuromorphic Processor with Integer Quadratic Integrate-and-Fire Neurons
Coding and interworking for videotelephony
A structurally stable realization for Jacobi elliptic functions
A wide-input linear range sub-threshold transconductor for sub-Hz filtering
Design of Reactive Resonant Shielding for Multi-EnerCage-HC System
An Adaptive Low Rank Algorithm for Semispherical Antenna Arrays
Mixed Energy-Domain Multipoles and Multiports
Area and power optimization of FPRM function based circuits
An 102dB DR Current Mode Readout Frontend with Level-Crossing Based Ambient Light Monitoring and DC Cancellation
Analog and digital approaches for an energy efficient low complexity channel decoder
Anime Character Recognition using Intermediate Features Aggregation
How is that complex network complex?
On a Fundamental Upper Limit for the Open-Circuit Resistance Measurable between any Two Terminals of a Positive Resistance Network
FPGA based single cycle, reconfigurable router for NoC applications
Combinational Logic Design in Synthetic Biology
A temperature-independent PUF with a configurable duty cycle of CMOS ring oscillators
Multidimensional filter banks design by direct optimization
Stimulation and recording of neural tissue, closing the loop on the artifact
A novel clock-pulse-width calibration technique for charge redistribution DACs
A CMOS differential-difference amplifier with class-AB input stages featuring wide differential-mode input range
A 65-nm CMOS burst-mode CDR based on a GVCO with symmetric loops
A multi-level static memory cell
Live Demonstration: An Embedded Environmental Control Micro-chamber System for RRAM Memristor Characterisation
Continuous-time sigma-delta modulator incorporating semi-digital FIR filters
A superregenerative receiver for phase and frequency modulated carriers
A flexible multiplication unit for an FPGA logic block
A 1.85fW/bit ultra low leakage 10T SRAM with speed compensation scheme
Empirical evaluation of timing and power in resonant clock distribution
A 760μW 4 th order butterworth FGMOS Gm-C filter with enhanced linearity
Energy efficient signaling in DSM CMOS technology
Low power design of a multi-mode transceiver
A 12.5 Gbps CMOS input sampler for serial link receiver front end
A Machine Learning Smartphone-based Sensing for Driver Behavior Classification
Optimized learning rate for energy waste minimization in a background subtraction based surveillance system
Phase Synchronization in Injection-'Un'locking Oscillator Arrays
Convergence analysis of a new subband adaptive structure with critical sampling
RF Rectifier Absolute Figure of Merit Based on Relative Comparison with Reference Rectifier
Neural network based ECG anomaly detection on FPGA and trade-off analysis
Coding- and Energy-Efficient FME Hardware Design
Investigating speaker features from very short speech records
A Mostly-Online CAS Teaching Experience
A Dolph-Chebyshev approach to the synthesis of array patterns for uniform circular arrays
Timing skew insensitive switching for double sampled circuits
VLSI realization of four-port ear-type transmission lattice filter
Graphics processor unit (GPU) acceleration of finite-difference time-domain (FDTD) algorithm
Ultra-Low Standby Power SRAM with Adaptive Data-Retention-Voltage-Regulating Scheme
A C-less ASK demodulator for implantable neural interfacing chips
3D-Stacked Integrated Circuits: How Fine Should System Partitioning Be?
Design of a low-voltage, low-power, wide-tuning integrated oscillator
Programmable CMOS Analog Function Synthesis
Sampling Rate Reduction for Wearable Heart Rate Variability Monitoring
Techniques for efficient DCT/IDCT implementation on generic GPU
Kernel Least Mean Square Based on the Sparse Nyström Method
Rapid Emulation of Approximate DNN Accelerators
A 3.0V 12b 120 Msample/s CMOS pipelined ADC
Design of an efficient FFT processor for DAB system
Low power scheduling method using multiple supply voltages
Efficient rate control for MPEG-2 to H.264/AVC transcoding
Analog front end design for tags in backscatter-based tag-to-tag communication networks
A Spatial-Temporal Weighted Method for Asymmetrically Distorted Stereo Video Quality Assessment
A Method to Reduce the Effect of the Switching Noise in Analog-Mixed Circuits
Adaptive TDTL with enhanced performance using sample sensing technique
On power allocation for generalized cyclic-prefix based channel-equalizers
A buck-boost converter controlled by periodic inputs
Design and implementation of an 11-bit 50-MS/s split SAR ADC in 65 nm CMOS
Observer-based approach for synchronization of a time-delayed, Chua's circuit
Analog Circuits to Accelerate the Relaxation Process in the Equilibrium Propagation Algorithm
A Content-adaptive Fast Multiple Reference Frames Motion Estimation in H.264
A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement
One-Hot Residue Coding for High-Speed Non-Uniform Pseudo-Random Test Pattern Generation
20.1-mW 8-Gbps UWB-IR millimeter-wave transmitter using an OOK pulse modulator based on CMOS inverters
A design of controllable
SpFlow: Memory-Driven Data Flow Optimization for Sparse Matrix-Matrix Multiplication
Multiple-pulse dynamic stability and failure analysis of low-voltage 6T-SRAM bitcells in 28nm UTBB-FDSOI
A priority based output arbiter for NoC router
Fully differential floating-gate programmable OTAs with novel common-mode feedback
Decoupling technique and crosstalk analysis for coupled RLC interconnects
GF(2 n ) Montgomery multiplication using Polynomial Residue Arithmetic
Human respiratory feature extraction on an UWB radar signal processing platform
A novel switched-current phase locked loop
A single-ended disturb-free 5T loadless SRAM with leakage sensor and read delay compensation using 40 nm CMOS process
An Efficient Hardware Architecture for DNN Training by Exploiting Triple Sparsity
SFCN: Spoon Fully Convolutional Networks for Pulse Localization
Single-Layer CNN Simulator
Folded Cascode OTA with 5540 MHzpF/mA FoM
An Optimal Design of Fuzzy (m, n) Rank Order Filtering with Hard Decision Neural Learning
A 3V-125 MHz CMOS Continuous-time Filter
Chaotic Signals Generated by Digital Filter Overflow
Depth map enhancement based on Z-displacement of objects
Efficient low-power design and implementation of IQ-imbalance compensator using early termination
Decoding a Family of Dense Codes using the Sum-Product Algorithm
Guided Wave Based Acoustic Communications in Structural Health Monitoring Systems in the Presence of Structural Defects
Oscillatorless clock multiplication
Continuous-Time Delta-Sigma Modulator with Time Domain Noise Coupling
Concurrent faulty clock detection for crypto circuits against clock glitch based DFA
A sequence independent power-on-reset circuit for multi-voltage systems
Population fitness probability for effectively terminating the evolution operations of a genetic algorithm
Graph-based model for implementing sequential circuits
Soak Your PCB: a Design Activity for Hands-On Learning of the Electrochemical Interface Impedance
Parallel Pseudo-Exhaustive Testing of Array Multipliers with Data-Controlled Segmentation
A serial communication infrastructure for multi-chip address event systems
A CMOS-MEMS magnetic thin-film inductor for radio frequency and intermediate frequency filter circuits
Counteracting power analysis attack using Static Single-ended Logic
Live Demonstration of Reconstruction Filtering for Bone-Conducted Speech in High Noise
A non-coherent IR-UWB receiver for high sensitivity short distance estimation
The effects of scaling on the performance of small-signal MOS amplifiers: a physics-based simulation study
A new digital background calibration technique for pipelined ADC
A coprocessor architecture implementing the MPEG-4 visual core profile for mobile multimedia applications
Pulse extraction: a digital power spectrum estimation method for adaptation of Gbps equalizers
Scalable module-based architecture for MPEG-4 BMA motion estimation
Transfer functions of second-order digital filters with two equal second-order modes
NoC router using STT-MRAM based hybrid buffers with error correction and limited flit retransmission
Design of spread spectrum sequences using chaotic dynamical systems with Lebesgue spectrum
A Current-Mode Control Li-Ion Battery Charger with Trickle-Current Mode and Built-In Aging Detection
Minimizing ESOP Expressions for Fully Homomorphic Encryption
A Lightweight Spiking GAN Model for Memristor-centric Silicon Circuit with On-chip Reinforcement Adversarial Learning
High Order Entropy-Constrained Residual VQ for Lossless Compression of Images
On the clustering coefficients of temporal networks and epidemic dynamics
17 Gb/s VCSEL driver using double-pulse asymmetric emphasis technique in 90-nm CMOS for optical interconnection
Filter families with minimum time-bandwidth products
Nonlinear blind separation using an RBF network model
Global Asymptotic Stability of Recurrent Neural Networks with Time Varying Delays
A low-voltage supply optoelectronic detector-receiver in a commercial silicon-based process
Image watermarking using the complex Hadamard transform
A psychiatric patients tracking system
On improving the accuracy of a wavelet based identifier to classify CDMA signal and GSM signal
A Technique to Improve Convergence Speed of the LMS Algorithm
Configurable direct-conversion / superheterodyne baseband down-link channel for W-CDMA applications
Architecture of a hardware module for MPEG-4 shape decoding
A new optimization approach for the automatic design of SigmaDelta-modulators
Overclocking datapath for latency-error tradeoff
Analytic, Rational Approximation of square root of s
A partial redundant fault-secure high-level synthesis algorithm for RDR architectures
UWB waveform generator for digital CMOS radar
A constant-g m rail-to-rail op amp input stage using dynamic current scaling technique
Multi-View Fusion Neural Network with Application in the Manufacturing Industry
Analysis of short distance optoelectronic link architectures
On-Chip Embedded Instruments Data Fusion and Life-Time Prognostics of Dependable VLSI-SoCs using Machine-Learning