yusuke1997/dblp-id-title huggingface dataset:
Frequency-Response Masking Approach for Design of Intermediate Frequency Filters in CDMA and Wideband GSM Modules
Investigation of parameter tolerance on digitally controlled DC-DC converter with pole-zero-cancellation technique
A monolithic 2 nd -order boundary controller for buck converter with fast transient response
An IP generator for quasi-cyclic LDPC convolutional code decoders
Frequency synchronization for OFDM systems over doubly-selective channels
Power system transient instability detection algorithm based on real time measurement
Hierarchical Decision-making of Multi-sensor System for State Estimation of Machining Process
Design of a memory-based VLC decoder for portable video applications
A Spur-Free Low-Complexity Hybrid Nested Bus-Splitting/SP-MASH Digital Delta-Sigma Modulator
Electrostatic discharge (ESD) protection of RF integrated circuits
Preamplifier effect on the performance of distributed active mixer
Connected-component stereo aggregation
Transformed-based mode decision algorithm for H.264/AVC intraprediction
An Alternate Approach for Developing Higher Radix FFT Algorithms
FIR filter design on Flexible Engine/Generic ALU array and its dedicated synthesis algorithm
A new M-estimator for performance analysis of cellular digital mobile radio systems including diversity technique
Image restoration of noisy images using Tchebichef moments
Study on coverage in Wireless Sensor Network using grid based strategy and Particle Swarm Optimization
An Energy-Efficient Time-Domain Binary Neural Network Accelerator with Error-Detection in 28nm CMOS
A Wide Dynamic Range Four-Quadrant CMOS Analog Multiplier Using Active Feedback
A 12-bit 1 GS/s Current Steering DAC with the Appointed and Thermometer Coding Scheme
A Double Cross-Coupled Delay Cell for High-Frequency Differential Ring VCOs
Envelope detection based workload prediction for partial decoding scheme
Mutators simulating memcapacitors and meminductors
Visualization of radiated emission sources on a wire using far field amplitude data
Analysis of CMOS low-dropout regulator - Power-supply rejection ratio
Accurate Estimation of Buffered Interconnect Delay Based on Virtual Buffering and Multi-Level Cluster Tree Techniques
FPGA Implementation of A Hybrid Decoder for STT-MRAM
Design of turbo decoder based on Min-Sum decoding algorithm of LDPC code
A Fully Integrated 3 to 5 GHz CMOS Mixer with Active Balun for UWB Receiver
Dilated Residual Convolutional Neural Networks for Low-Dose CT Image Denoising
Bit-level retiming of high-speed digital recursive filters
A dynamic search range algorithm for H.264/AVC full-search motion estimation
Lightweight Hardware Implementation of R-LWE Lattice-Based Cryptography
A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs
Frequency Transformations of IIR Filters with Filter Bank Applications
4-bit Flash Analog to Digital Converter design using CMOS-LTE Comparator
Dynamically reconfigurable architecture for multi-rate compatible regular LDPC decoding
An alternative approach to interpolated array processing for uniform circular arrays
A Probabilistic Prediction Based Fixed-Width Booth Multiplier
FPGA-Based Design of a Pulsed-OFDM System
The Synergetic Effects of Total Ionizing Dose and High Temperature on 180 nm DSOI Technology
A Novel FFT Processor for OFDM UWB Systems
Partition methodology for the final adder in a tree-structure parallel multiplier generator
A layered QC-LDPC decoder architecture for high speed communication system
Retinal vessel segmentation using histogram matching
Quantum Efficiency Enhancement in Si Avalanche Photodiodes in the NIR Regime via Surface Texturing Towards Autonomous Driving Applications
Dynamic current limitation circuit for white LED driver
Timing variation-aware high level synthesis: Current results and research challenges
Robust farfield wideband beamformer design using worst-case performance optimization
Exploiting Reference Frame History in H.264/AVC Motion Estimation
A 97 fJ/Conversion Neuron-ADC with Reconfigurable Sampling and Static Power Reduction
A Transient-Enhanced Digital Low-Dropout Regulator with Bisection Method Tuning
Race logic synthesis for a multithreaded HDL/ESL simulator for SoC designs
Design and FPGA implementation of a FMCW radar baseband processor
An Impedance Measurement of Intravesical Urine Volume Appropriate to Seated Posture
Patient classification based on pre-hospital heart rate variability
Application of multi-armed bandit algorithms for channel sensing in cognitive radio
A Reconfigurable Multi-Modulus Modulo Multiplier
Some Recent Developments in the Design of Biopotential Amplifiers for ENG Recording Systems
An ultra-low power and offset-insensitive CMOS subthreshold voltage reference
An Active-RC Complex Filter with Mixed Signal Tuning System for Low-IF Receiver
Experimental evaluation of an integrated traction inverter used on an electric vehicle platform
A critical net reshape-router for high-performance VLSI layout design
A pipelined asynchronous 8051 soft-core implemented with Balsa
A low offset rail-to-rail 12b 2MS/s 0.18μm CMOS cyclic ADC
Phase shift compensation on active vibration isolation system using adaptive signal processing
Transistor Realization of Reversible TSG Gate and Reversible Adder Architectures
A digital LDO with transient enhancement and limit cycle oscillation reduction
Design and manufacture power pre-amplifier module for transmitter of ground station at S-band
A 30.6-41.5uW 10-bit Column Parallel Single-Slope ADC with Minimum Voltage Feedback for CMOS Image Sensors
A 0.18µm CMOS Receiver with Decision-feedback Equalization for Backplane Applications
Common mode voltage to differential mode voltage conversion characteristics of shielded transformer in VHF band
A VLSI Design of High Speed Bit-level Viterbi Decoder
Overview and comparison of OpenCL and CUDA technology for GPGPU
Wide-common-mode-range and high-CMRR CMOS OTA operable in both weak and strong inversion regions
Exploiting Node Level Algorithm Diversity for Distributed Compressed Sensing
A Combined Residual Frequency and Sampling Clock Offset Estimation for OFDM Systems
Generalized Steady-State Analysis on Developed Series of Cascade Boost Converters
A Booth-based Digital Compute-in-Memory Marco for Processing Transformer Model
Information accuracy versus jointly sensing nodes in wireless sensor networks
Localization and time synchronization in wireless sensor networks: A unified approach
A new algorithm for ESD protection device extraction based on subgraph isomorphism
A post-processing algorithm for reducing strong error effects in NAND flash memory
A configurable IP core for inverse quantized discrete cosine and integer transforms with arbitrary accuracy
A 0.18-µm CMOS UWB Low Noise Amplifier for Full-Band (3.1-10.6GHz) Application
On-chip tunable low pass filter with improved stopband using new cross coupled topology
Low Complexity Architecture for Multiplicative Inversion in GF(2m)
Variational Circuit Simulator based on a Unified Methodology using Arithmetic over Taylor Polynomials
Look-up Table Based Chaotic Encryption of Audio Files
Wirelength driven I/O buffer placement for flip-chip with timing-constrained
Novel Adaptive Rood Path Searches with Small Motion Prejudgments for Fast Block Motion Estimation
Image-based compression, prioritized transmission and progressive rendering of circular light fields (CLFS) for ancient Chinese artifacts
Improved HSI color space without gamut problem
Lateral silicon nanowire based standard cell design for higher performance
Technical program co-chairs' message
Start-up analysis for differential ring oscillator with even number of stages
Fast frequency tracking algorithm for OFDM applications
Improving robustness of power systems via optimal link switch-off
Global Convergence Analysis of Delayed Bidirectional Associative Memory Neural Networks
Nonlinear decoupled control of back-to-back voltage source converter
An FPGA implementation of a DWT with 5/3 filter using semi-programmable hardware
Fourth-Order Discrete-Time Variable Centre Frequency Bandpass Sigma-Delta Modulator
Real-Time Hardware Implementation of 3D Sound Synthesis
FPGA implementation for image object detection system on NoCs
Simulation of Gap Structure Optical Waveguide with Phase Change Materials
Optimizing High Speed Flip-Flop Using Genetic Algorithm
A Bio-Inspired CMOS Circuit for the Excitation and Inhibition of Neuronal Oscillators
CAWPR: Contention Aware Write Preemptive Management Policy for Hybrid Last Level Caches
Open Top Socketed Evaluation Board for Bench Test and Fault Localization on GaAs RF Device
A Low Power Reference Voltage Buffer and High Density Unit capacitor in a 12b 200MS/s SAR ADC
Fast Object Detection on the Road
An NoC-based evaluation platform for safety-critical automotive applications
A 1.8V 12-bit 230-MS/s pipeline ADC in 0.18μm CMOS technology
Delay estimation method for correlated net delay variations
Design and Characterization of Quantum Cellular Automata (QCA) Based Optimized Circuits for Emerging Technologies
What are the samples for learning efficient routing heuristics? [MCM routing]
Early Detection on the Condition of Pancreas Organ as the Cause of Diabetes Mellitus by Real Time Iris Image Processing
FPGA-based embedded system design
A Miniaturized, Power-Efficent Stimulator Output Stage Based on the Bridge Rectifier Circuit
Software optimization of MPEG audio layer-III for a 32 bit RISC processor
Delta operator based design of 1-D and 2-D filters: An overview
A 0.9V 10GHz 71µW Static D Flip-flop by using FinFET Devices
Capacitance Measurement of Running Hardware Devices and its Application to Malicious Modification Detection
A 500MHz, 0.5% THD With 400mVpp Linear Transimpedance Amplifier (TIA) for Analog Optical and In-memory Computing Applications
Efficient Implementation of AES IP
Memristor crossbar circuits of unconventional computing for low-power IoT devices
Pseudocube-based expressions to enhance testability
The Setup of Artifical Neural Network Model for Estimating the Insulator Pollution Degree
Evaluation of disaster level caused by power quality problems
Block-based belief propagation with in-place message updating for stereo vision
Design and application of wide-range variable fractional delay filter
A Subsample-based Motion Estimation for Quality-Stationary Video Coding
Panning sorter: A minimal-size architecture for hardware implementation of 2D Data Sorting Coprocessors
Single DC/AC CCFL Inverter for Large Size LCD TV with Burst Control
MVDR based adaptive beamformer design and its FPGA implementation for ultrasonic imaging
A Highly Accurate Machine Learning Approach to Modelling PVT Variation Aware Leakage Power in FinFET Digital Circuits
A robust iterative inverse filtering approach for speech dereverberation in presence of disturbances
Cellular design for a dense RFID reader environment
A Development and Validation Platform for Communication SOC Design
A High Accuracy Opamp-less Interface Circuit for 2-D Cross-Point Resistive Sensor Array with Switch Resistance Calibration
Efficient CORDIC Architectures for FFT Based All Digital Resonator Frequency Estimation
CMOS-memristor dendrite threshold circuits
Comparison of two SiGe 2-stage E-band power amplifier architectures
The design of a new wideband and low-power CMOS active polyphase filter for low-IF receiver applications
An efficient background extraction and object segmentation algorithm for realtime applications
Identification of gait asymmetry using wireless gyroscopes
Low power 0.18µm CMOS ultra wideband inductor-less LNA design for UWB receiver
Low Precision Floating Point Spectral Feature Extraction Engine for Closed-Loop Neuromodulation
Image spatial diffusion on GPUs
Design and implementation of a low complexity lossless video codec
An AOT-COT Dual-Mode Three-Level Buck Converter With Wide Load and Input Ranges
Multi-Precision Table-Addition Designs for Computing Nonlinear Functions in Deep Neural Networks
Application of artificial neural networks for classification of colonoscopic images
Intrinsic capacitance extraction and estimation for system-on-chip power delivery development
A low-area 10b column driver with resistor-resistor-string DAC for mobile active-matrix LCDs
Synchronization phenomena of picewise constant oscillators coupled by hysteresis element
Narrow-Band FM Multi-Tone FSK Modem: TMS320C6000 Based Testbed Implementation and Performance Analysis
Efficient Algorithms for Hardware/Software Partitioning to Minimize Hardware Area
Mitigation of Narrowband Interference in SC Transmission with Filter Bank Equalization
A Stochastic RMS Jitter Monitoring Circuit for Clock Generators using Central Limit Theorem
Texture classification based on statistical steganographic techniques
An Efficient FPGA Accelerator Optimized for High Throughput Sparse CNN Inference
An Efficient Sparse CNN Architecture with Index-based Kernel Transformation
Design of low-dropout regulator using a-InGaZnO thin-film transistors
HTS inductive magnetic energy storage with power control technology
Hardware Design of Transaction Device based on Contact and Contactless Smart Card
On the Use of Lyapunov Functions for the Design of Complex FIR Digital Filters
A 9.87 nW 1 kS/s 8.7 ENOB SAR ADC for implantable epileptic seizure detection microsystems
Matrix Inversion on Reconfigurable Hardware using Binary-coded z-path CORDIC
Fast Responsive Framework for Optimal Power Flow Analysis in Power System
LVQ neural network SoC adaptable to different on-chip learning and recognition applications
Multiple-valued SRAM with FG-MOSFETs
A Study on Accuracy Improvement of Small Object Detection Using Deep Neural Networks
An effective rewiring strategy for optimizing traffic performance of communication networks
Intelligent Vehicle Collision-Avoidance System with Deep Learning
A 62nW, 920MHz Wake-up Receiver with Automatic Offset Calibration Technique
0.7 V Monolithic CMOS LNA for 802.11 A/B WLAN Application
A 4-Vppd160-Gb/s PAM-4 Optical Modulator Driver with All-Pass Filter-Based Dynamic Bias and 2- Tap FFE in 130-nm BiCMOS
A 25-GHz differential LC-VCO in 90-nm CMOS
Design and implementation of co-design toolset for tcore processor
Detecting Speech Deepfakes through Improved Speech Features and Cost Functions
Two low-voltage fully differential MOSFET-C voltage-controlled oscillators for frequency tuning
Accurate Bit-Error-Rate estimation for efficient high speed I/O testing
Wavelet Packet Decomposition-Based Fuzzy Clustering Algorithm for Gene Expression Data
A 6.78 MHz High-Efficiency Wireless Power Transfer Transmitter With Adaptive Dead-Time Control and Transistor-Width Switching for Implantable Medical Devices
A multimedia game development system with an intelligent mobile and embedded platform
A 10-bit Current-Steering DAC for Urinary Bladder Volume Measurement
Behavioral modeling for operational amplifier in sigma-delta modulators with Verilog-A
Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning Technique
On-line writer recognition for Thai numeral
An Energy-Efficient Readout Circuit Based on Incremental Delta-Sigma ADC with Decimation Filter for CMOS Image Sensors
PPTWO: Push-Pull cell based Traveling Wave Oscillator
Towards an Efficient Simulation of Multi-Language Descriptions of Heterogeneous Systems
A 23.9 ppm/°C Bandgap Reference Circuit with Wide Temperature Range Using Subthreshold PVT Detector
Design of Adaptive Deblocking Filter for H.264/AVC Decoder SOC
Realization of fingerprint identification module on DSP board
Analytic Solution of Amplitude Controlled Digital Oscillator Using Multi-Time Variables Technique
Water Level Detection for River Surveillance utilizing JP2K Wavelet Transform
A 2.5-GHz 2×VDD 16-nm FinFET Digital Output Buffer with Slew Rate and Duty Cycle Self-Adjustment
Optimizing GPU Data Center Power
Edge-based moving object tracking algorithm for an embedded system
A BER-Modulated Inductive-Coupling Transceiver Using Dynamic Intermediate Interference Control Technique for Low-Power Communication
Dynamic MAS reallocation module for WiMedia MAC
Area-Efficient Finite Field Multiplication in $\text{GF} (2^{n})$ Using Single-Electron Transistors
Optically Reconfigurable Gate Arrays vs. ASICs
A fully digital modulator/demodulator for Power Line Communication (PLC)
Design of a 1.8V 10bit 300MSPS CMOS digital-to-analog converter with a novel deglitching circuit and inverse thermometer decoder
Design, simulation, modeling and characterization of micromachined microcantilever using coventorware software
An Eight-Channel Analog Front-End Circuitry for the Application of Neural Signal Sensing
Chaos Synchronization Using A Robust Sliding Mode Observer By Transmitting A Scalar Signal
Implementation of FFT Using Low-Precision Floating Point for Rapid High Precision MEMS Readouts
Efficient SOR-based detection and architecture for large-scale MIMO uplink
Histogram of Oriented Gradients Feature Extraction Without Normalization
Logic Locking for Hardware Security Using Voltage-Gated Spin-orbit Torque Magnetic Tunnel Junction
3D Autonomous Navigation of UAVs: An Energy-Efficient and Collision-Free Deep Reinforcement Learning Approach
Multi-modal Asymmetric Autoencoders for Massive Photo Collection Applications
Testing the Quality of Magnetic Gradient Fields for Studying Self-Diffusion Processes in Biological Specimens by Magnetic Resonance Methods
Peeling algorithm for custom instruction identification
An improved source follower with wide swing and low output impedance
A 12-bit 150-MSample/s current-steering DAC
High performance adaptive routing for Network-on-Chip systems with express highway mechanism
IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2024, Taipei, Taiwan, November 7-9, 2024
A 22-nm FDSOI 8T SRAM Based Time-Domain CIM for Energy-Efficient DNN Accelerators
A Bit-Segmented Adder Chain based Symmetric Transpose Two-Block FIR Design for High-Speed Signal Processing
A Disturb-Free 10T SRAM Cell with High Read Stability and Write Ability for Ultra-Low Voltage Operations
Design architecture of generic DFT/DCT 1D and 2D engine controlled by SW instructions
FPGA-Based Batik Classification Using Quantization Aware Training of MobileNet and Data-flow Implementation
A sinusoidal oscillator using translinear current conveyors
Random Number Generator Based on Skew-tent Map and Chaotic Sampling
Interface IC for breath analyzer with four three-electrode metal-oxide gas sensors and a humidity sensor
Genetic Algorithm based Approximants for Discrete Time Systems: A Computer-Aided Approach
Design and analysis of the Current Reuse Technique and Folded Cascode Power Constrained Simultaneous Noise and Input Matching LNAs with distributed and lumped parasitic
A high-speed truly random number generator based on an autonomous chaotic oscillator
A novel configurable no dead-zone digital phase detector design
Design of SEL Self-Recovery Hardness for 90nm COTS Devices Using R-C-S Network with DC-DC Converter
Novel voltage- and current-mode filter design
Analog low-voltage current-mode implementation of digital logic gates
Achieving near-MLD performance with soft information-set decoders implemented in FPGAs
A DC-2.5GHz voltage variable attenuator in 0.18-μm CMOS technology
A front-end circuit with 16-channel 12-bit 100-kSps RC-hybrid SAR ADC for industrial monitoring application
Two Novel Phase-Frequency Detectors
On-glass operational amplifier using solution-processed a-IGZO TFTs
A 1-6 GHz, Sub-mW Self-Aligned Quadrature Phase Clock Generator in 1.2 V, 65 nm CMOS
High Throughput Hardware Acceleration for Image Generation using HLS
High-Performance Implementation of Adaptive IQ Mismatch Compensator in Direct-Conversion Transceiver
Effects of exercise on the second derivative photoplethysmography(PPG) waveform
A Lightweight Post-Processing Method for Voltage-Controlled MTJ based True Random Number Generator
Traffic analysis of a mobile cellular system based on a scale-free user network and a power-law-distributed mobility model
Low-Voltage Bandgap Reference Circuit in 28nm CMOS
A MATE-GDBF Algorithm for Irregular Punctured LDPC Codes and Its Decoder Implementation
Even-order Distortion Rejection Technique for Self-homodyne OFDM Systems
A new power efficient current-mode 4-PAM transmitter interface for off-chip interconnect
A high performance vertical Si nanowire CMOS for ultra high density circuits
Advances in Global Optimization: Novel Function Transformation Approaches
Recognition of Musical Instruments
Hierarchical DNN with Heterogeneous Computing Enabled High-Performance DNA Sequencing
IEEE Asia Pacific Conference on Circuit and Systems, APCCAS 2022, Shenzhen, China, November 11-13, 2022
Burst-pulse control of microstimulator for bladder controller
Self-contained built-in-self-test/repair transceivers for interconnects in 3DICs
A high-performance current-mode precision full-wave rectifier based on BiCMOS-CCCDBAs
A modified discrete recurrent neural network as vector detector
CMRR enhancement technique for IA using three IAs for bio-medical sensor applications
Live Demonstration: A Soft Mist Inhaler with Sound and Motion Sensors for Improving Drug Usage Efficiency
A personal identification method based on finger's outline
IEEE Asia Pacific Conference on Circuit and Systems, APCCAS 2021, Penang, Malaysia, November 22-26, 2021
A 1-V 90dB DR audio stereo DAC with embedding headphone driver
An asynchronous fixed-coefficient FIR filter implemented with flexible a-Si TFT technology
Self-tuning PSM controller based on state machine
Low Cost LSTM Implementation based on Stochastic Computing for Channel State Information Prediction
Compact spin transfer torque non-volatile flip flop design for power-gating architecture
Clock-gated and low-power standard cell library for ISFET Two-Point Calibration processor chip
Analytical Modeling of Process Variability in Subthreshold Regime for Ultra Low Power Applications
Machine Learning based Adaptation for CTLE of Serial Links
A 2-D Systolic Array for High-Throughput Computation of 2-D Discrete Fourier Transform
Live demonstration: An FPGA based hardware compression accelerator for Hadoop system
Fast Picture and Macroblock Level Adaptive Frame/Field Coding for H.264
A Fully Differential 11mW 10-bit 200MS/s Sample and Hold in 0.25µm BiCMOS Technology
A Real-time Boat Surveillance System Using GPRS
A highly linear open-loop high-speed CMOS sample-and-hold
A 100μW AC-DC Boost Converter for Electromagnetic Energy Harvesting With 0.2 VPeak Self-starting Voltage and 85% Efficiency
Single-phase power-gating adiabatic flip-flops
Conflict-free FFT circuit using loop architecture by 5-bank memory system
Fast and Low-Complexity Decoding Algorithm and Architecture for Quadruple-Error-Correcting RS codes
A CDFG generating method from C program for LSI design
Sub-block combination fractional motion estimation algorithms for H.264/AVC
On power and performance tradeoff of L2 cache compression
Highly-linear CMOS OTA with compensation of mobility reduction
A Self-Grouping and Table-Merging Algorithm for VLC-Based Video Decoding System
Frame Based Error Concealment in H.264/AVC by Refined Motion Prediction
A pseudo-differential comparator-based pipelined ADC with common mode feedforward technique
Electronically tunable multiple-input single-output voltage-mode multifunction filter employing simple CMOS OTAs
Recent progress in silicon-based millimeter-wave power amplifier
A low-power remotely-programmable MCU for implantable medical devices
Low Power FIR Filter Realization using Minimal Difference Coefficients: Part I - Complexity Analysis
Visualization tool for transient stability monitoring of bulk power systems based on DSR
Mixed error correction scheme and its design optimization for soft-error tolerant datapaths
A Single-Input Multi-Output Piezoelectric Energy Harvesting System Combining with P-SSHI and Cold Startup Circuit
Automated Optimization for FPGA-Based Sonar Object Recognition Systems
CAM puzzle: A power model and function-based circuit segment method of Content Addressable Memory
Modelling and analysis of signal flow platform implementation into retinal cell pathway
Fast Permutation Architecture on Encrypted Data for Secure Neural Network Inference
Codeblock-Based Concealment Scheme for JPEG2000 Images in Lossy Packet Networks