yusuke1997/dblp-id-title huggingface dataset:
Interconnect peak current reduction for wavelet array processor using self-timed signaling
A low latency feature extraction accelerator with reduced internal memory
An Event-Driven Multi-Input Multi-Output Buck­Boost Converter with Adaptive MPPT for Wide Power Range RF Energy Harvesting
Energy optimization of tapered buffers for CMOS on-chip switching power converters
A modular wireless sensor platform and its applications
Details preservation inspired blind quality metric of tone mapping methods
Boundary properties of the BCU method for power system transient stability assessment
An RNS barrett modular multiplication architecture
Analysis of a Modified Current Switching Cell for High-Speed Digital-to-Analog Converters
Naturalizing Neuromorphic Vision Event Streams Using Generative Adversarial Networks
A current-mode continuous-time Sigma-Delta modulator with delayed return-to-zero feedback
Two-stage Adaptive Compressive Sensing and Reconstruction for Terahertz Single-Pixel Imaging
Scaled simplicial approximation for the inversion of Gaussian RBF expansions
Neuromorphic readout integrated circuits and related spike-based image processing
Low Fixed Pattern Noise Current-mode Imager Using Velocity Saturated Readout Transistors
Design of an ultra-low power SA-ADC with medium/high resolution and speed
Fuzzy vector filters for microarray image enhancement
Reconfigurable Precision INT4-8/FP8 Digital Compute-in-Memory Macro for AI Acceleration
An 8-Bit, 100-MHz low glitch interpolation DAC
HP422-MoCHA: A H.264/AVC High Profile motion compensation architecture for HDTV
Project-Based Course in Electronic Engineering Education
Improved channel estimation over frequency-flat and rapid fading channels
An asynchronous data recovery/retransmission technique with foreground DLL calibration
Range and DOA Estimation of Near-field Sources via the Fourth-order Statistics
Symbolic small-signal analysis (SSA) tool
Symbolic Precompilation of Piecewise-linear Behavioral Models for Efficient Simulation of Dual Time Scale Systems
3D machine vision in IoT for factory and building automation (Invited)
Real-Time Application of Biology-Inspired Neural Networks Using and Emulator with Dedicated Communication Hardware
Triangular systolic array with reduced latency for QR-decomposition of complex matrices
Effectiveness of artificial neural network with time-varying coupling system
RNS reverse converters based on the new Chinese Remainder Theorem I
RISCALAR: A Cycle-Approximate, Parametrisable RISC-V Microarchitecture Explorer & Simulator
Exploiting don't cares to minimize *BMDs
Frame layer bit allocation for video transcoding
A 1V, -26dBm sensitive auto configurable mixed converter mode RF energy harvesting with wide input range
Fast VVC Intra Encoding for Video Coding for Machines
Constant-Time BCH Error-Correcting Code
Design Considerations for Future RF Circuits
New complex-arithmetic heterodyne filter
Nonlinear Dynamics of Chaotic Double-Loop Sigma Delta Modulation
Accurate modeling of low actuation voltage RFMEMS switches using artificial neural networks
A 256×256 separable transform CMOS imager
A High Efficiency Frequency-Modulated 1/2X Switched Capacitor DC-DC Converter with Wide Load Range
Analysis of Coexistence Phenomena in Piecewise-Constant Oscillators Coupled by Hysteresis Elements
Knowledge Distillation Based on Positive-Unlabeled Classification and Attention Mechanism
A new switched-capacitor dc-dc converter with improved line and load regulations
A Trim Bit One Time Programmable EPROM with Aggressively Reduced Area, Enhanced Functionality, and Extra Features
A constructive procedure for optimizing the placement of macrocells
Design and Characterization of an Integrated Optical Switch Driver Circuit
70 MHz CMOS gm-C IF filter
Compact image compression using simplicial and ART neural systems with mixed signal implementations
A compact spatially configurable differential input stage for a field programmable interconnection network
Coupling Effects in Networks of Cyclic Negative Feedback Systems
Live Demonstration: Compressive Subsampling for High-Speed Large-Area Tactile Sensing
Steady-state behavior of class E amplifier outside designed conditions
Memory Cache Based Motion Compensation Architecture for HDTV H.264/AVC Decoder
An efficient method for multiple measurement placement in power networks
A Systematic Method for Approximate Circuit Design Using Feature Selection
A circuit to model an Ionic Polymer-Metal Composite as actuator
Graphene FET evaluation for RF and mmWave circuit applications
A discrete fractional Fourier transform based on orthonormalized McClellan-Parks eigenvectors
A comparison of graph coloring heuristics for register allocation based on coalescing in interval graphs
Reconfigurable Multi-Access Pattern Vector Memory for Real-Time ORB Feature Extraction
ViSTRA3: Video Coding with Deep Parameter Adaptation and Post Processing
Optimization of VLSI Allocation
Time-Based Error Extraction for Multilevel Receivers
Angular decompositions for the discrete fractional signal transforms
A Class-D output bridge with dynamic dead-time, small delay and reduced EMI
Unsupervised Learning-Based Inner Control Loop Design for Uncertain Grid-Tied VSC Model
Parameter Tracking of the Poly-Phase Structure Adaptive Filtering Algorithm
A continuous flow mixed-radix FFT architecture with an in-place algorithm
A hybrid multi-tanh bulk-driven input stage OTA for Low-THD biomedical Gm-C applications
Ultra-Compressed Three-Error-Correcting BCH Decoder
Synthesis of 3D clock tree with pre-bond testability
Design and characterization of symmetric multi-tap transformers
Analog decoding of trellis coded modulation for multi-level flash memories
A novel CMOS fully differential inductorless RF bandpass filter
A 35-GHz TX and RX CMOS Front-Ends for Ka-Band FMCW Phased-Array Radar Transceivers
DCim++: a C++ library for object oriented hardware design and distributed simulation
Soil Moisture Assessment with a Waveguide Spectrometer
Document Classification using Nonnegative Matrix Factorization and Underapproximation
High-efficiency electronic transformer for low-voltage halogen lamp
Temporal Power Redistribution as a Countermeasure against Side-Channel Attacks
Fractional-N Injection-Locked Ring Oscillator Based on Two Points, Varying Strength Injection
Learning in linear and nonlinear multirate digital systems by signal flow graphs
Dynamic scheduling of multiple video objects for MPEG-4 encoding with user interactions
A system-of-systems based equipment for thermo-mechanical testing of advanced high power modules
A Robust Synchronized 2N2P LC Oscillator with a Shut-down Mode for Adiabatic Logic Circuits
A 75kb SRAM in 65nm CMOS for In-Memory Computing Based Neuromorphic Image Denoising
Pulse width and position modulation for fully digital audio amplifier
Complex networks from time series: Capturing dynamics
An analog front-end speech processor using the ratio spectrum
GHz programmable dual-modulus prescaler for multi-standard wireless applications
An ISFET Pixel with Integrated Trapped Charge Compensation using Temperature Feedback
A compact CPU architecture for sensor signal processing
Design of a chaotic generator using two CNN cells having non-integer order
High-constancy offset generator robust to CDAC nonlinearity for SEIR-based ADC BIST
On cDNA microarray spot localization
Synchronizing chaotic Colpitts circuits adaptively with parameter mismatches and channel distortions
On Time-Domain Deconvolution and the Computation of the Cepstrum
Novel multilevel converter for power factor correction
A low-power 4-b 2.5 Gsample/s pipelined flash analog-to-digital converter using differential comparator and DCVSPG encoder
Composite memristance of parallel and serial memristor circuits
Quantization noise reduction using multiphase PLLs
Fast non-orthogonal wavelet transforms and reconstructions for detonation detection
Low-voltage class AB two-step sampling switched-currents
Recurrent neural networks: overview and perspectives
LTPS-TFT-Based In-Sensor Compression with Spatiotemporal Differencing Optimization
Algorithms for analog VLSI 2D stack generation and block merging
A pixel-based depth estimation algorithm and its hardware implementation for 4-D light field data
Testability of path history memories with register-exchange architecture used in Viterbi-decoders
Synthesis of sigma delta modulators employing continuous time delays
An improved peak-to-average-power ratio reduction algorithm for multicarrier communications
Mismatch reduction through dendritic nonlinearities in a 2D silicon dendritic neuron array
A flexible and efficient sharp filter bank architecture for variable bandwidth systems
A low-noise switched-capacitor interface for a capacitive micro-accelerometer
Synthesizing data paths with arithmetic self-test
A space-time decorrelating rake receiver for DS-CDMA communications over fast fading channels
Multi-channel DVB-T transmitter design based on the SW/HW co-design method
Load-store reordering for low-power multimedia data transfers
HERIC Based PV Inverter Using Partial Sinewave Tracking Dual Mode Control
A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion
The elegant geometry of fourier analysis
An output-capacitor-free adaptively biased LDO regulator with robust frequency compensation in 0.13μm CMOS for SoC application
A signal processor for Gaussian message passing
Practical Reverse Engineering of Secret Sboxes by Side-Channel Analysis
Novel method to compensate for resistor non-linearities and its application to the integration of analog functions on system-on-a-chip ICs
Saliency detection using a central stimuli sensitivity based model
Design methodology for inductive power transfer systems targeting high power implantable devices
A preliminary study on impact analysis of grid-connected PV systems considering additional transformer installations
An efficient VLSI/FPGA architecture for combining an analysis filterbank following a synthesis filterbank
High-Speed Power-Efficient Coarse-Grained Convolver Architecture using Depth-First Compression Scheme
BN-254 Based Multi-Core, Multi-Pairing Crypto-Processor for Functional Encryption
Electrostatic Control and Entanglement of CMOS Position-Based Qubits
Three learning methods for reasoning-based synthesis of novel analog circuits
A 1.9 mW 250 MHz Bandwidth Continuous-Time ΣΔ Modulator for Ultra-Wideband Applications
Stability Analysis of the Second Order Sigma-Delta Modulator
Multiframe image super-resolution using quasi-newton algorithms
Robust near-threshold inverter with improved performance for ultra-low power applications
A general method for deriving output resistances of serial fixed type switched-capacitor power supplies
Mirror, mirror, on the wall...is the new release any different at all? [BDDs]
A Motion Sensor with On-Chip Pixel Rendering Module for Optical Flow Gradient Extraction
A closed-form phase noise solution for an ideal LC oscillator
Efficient Simulation of Harmonic Distortion in Discrete-time Circuits
Performance modeling of resonant tunneling based RAMs
Reconfigurable FET Approximate Computing-based Accelerator for Deep Learning Applications
FRM-Based FIR Filters with Minimum Coefficient Sensitivities
Live Demonstration: Intelligent Voice Wake-up Human-Following Robot
A 9.45-ENOB 3.84-MS/s Ping-Pong Interleaving SAR ADC with Integrated Buffers and SPI for 96-Channel Neural Signal Acquisition
Improvement on ESD Robustness of Lateral DMOS in High-voltage CMOS ICs by Body Current Injection
Toward the integration of microsystems supply
Autonomous predistortion calibration of an RF power amplifier
A 32.8mW 60fps cortical vision processor for spatio-temporal action recognition
Mixed-signal implementation of a nonlinear decoder for delta-sigma encoded stream
Computation reduction in cascaded DCT-domain video downscaling transcoding
RBF network based on genetic algorithm optimization for nonlinear time series prediction
An Efficient Weighted Overlap-add Structure for Wideband Frequency Spectrum Analysis with Narrow Resolution Bandwidth
Time-dependency of the threshold voltage in memristive devices
Drift Correction Algorithms for Lifetime-based Transcutaneous Oxygen Measurements
Derivation of the Equivalent Input Noise of Multiplicative Distributed Amplifiers for Wideband Optical Receiver Applications
1T1R In-Memory Compute for Winner Takes All Application in Kohonen Neural Networks
A Pseudo-Boolean Encoding Method for Rectilinear Steiner Arborescence in VLSI Routing
Localized Statistical 3D Thermal Analysis Considering Electro-Thermal Coupling
Multitask Person Re-Identification using Homoscedastic Uncertainty Learning
The new nADPCMB⟂MLT coding scheme: from non linear fullband toward non linear subband prediction coding of speech signal
A 3.5-Gb/s CMOS burst-mode laser driver with automatic power control using single power supply
Advanced Block Partitioning Methods Beyond VVC
A design strategy for a 1-V rail-to-rail input/output CMOS opamp
A Drive Circuit for Piezoelectric Devices with Low Harmonics Content
A VLSI architecture of a piecewise RBF decision feedback channel equalizer
A physical experimental study of the fractional harmonic oscillator
Jitter in high-speed serial and parallel links
Live demonstration: A dynamically adaptable image processing application running in an FPGA-based WSN platform
Crosstalk avoidance code for direct pass-through architecture
Gradient flow bearing estimation with blind identification of multiple signals and interference
Initiability: A Measure of Sequential Testability
Efficient SVM-based hotspot detection using spectral clustering
An experimental study on multi-island structures for single-electron tunneling based threshold logic
Improving the Efficiency of CMOS Image Sensors through In-Sensor Selective Attention
An associative-processor-based mixed signal system for robust grayscale image recognition
Maximum principles for node voltages and branch currents in transfinite resistive networks
Dual Active-Capacitive-Feedback Compensation for Area-Efficient Three-Stage Amplifiers
A monotonic digital calibration technique for pipelined data converters
Stability Analysis of MMC/MTDC Systems Considering DC-Link Dynamics
Sort-scan predictive vector quantization on multispectral satellite images
Flexible resizing algorithms for video transcoding
Modelling NEM relays for digital circuit applications
Integrating a hippocampus memory model into a neuromorphic robotic-arm for trajectory navigation
Periodic Steady-State Analysis of Oscillators with a Specified Oscillation Frequency
How to teach memristors in EE undergraduate courses
Fully-integrated, power-efficient regulator and bandgap circuits for wireless-powered biomedical applications
A variable-offset phase detector for phased-array applications
A new controlled gain phase-locked loop technique
Image segmentation with improved watershed algorithm and its FPGA implementation
Optimal Visual Sensor Planning
A study of synchronization of complex networks via pinning control
A Partially Binarized and Fixed Neural Network Based Calibrator for SAR-Pipelined ADCs Achieving 95.0-dB SFDR
A 0.4V 0.08fJ/cycle retentive True-Single-Phase-Clock 18T Flip-Flop in 28nm FDSOI CMOS
Area-efficient STT/CMOS non-volatile flip-flop
Live Demonstration: A Miniaturized Two-Axis Low Latency and Low-Power Sun Sensor for Attitude Determination of Sounding Rockets
Sensitivity analysis of low-complexity vector quantizers for focal-plane image compression
A comparative analysis of direct-sequence spread-spectrum super-regenerative architectures
A 400 MHz delta-sigma modulator for bandpass IF digitization around 100 MHz with excess loop delay compensation
A robust statistics based adaptive lattice-ladder filter in impulsive noise
Single-channel speech enhancement based on frequency domain ALE
Two VLSI Design Advances in Arithmetic Coding
3v High-frequency Current-mode Filters
VLSI CMOS low-voltage log companding filters
Multidimensional Speech Feature Extraction for Depression Detection using MDCF-Net
In Vitro Epileptic Seizure Prediction Microsystem
Effects of two new features of approximate entropy and sample entropy on cardiac arrest prediction
The design of an in-line accelerometer-based inclination sensing system
Fault Detection in Linear Bipolar ICs: Comparative Results Between Power Supply Current and Output Voltage Measurements
CMOS analog iterative decoders using margin propagation circuits
An Efficient Joint Source-Channel Coding for Wavelet Based Scalable Video
A Residual-Remainder Coupled Unlimited Sampling Framework for High Dynamic Range Signal Conversion
HIBI-based multiprocessor SoC on FPGA
Limits to a correct operation in RTD-based ternary inverters
Correlation-Based Calibration for Nonlinearity Mismatches in Dual-Channel TIADCs
A 890fJ/bit UWB transmitter for SOC integration in high bit-rate transcutaneous bio-implants
A Fast Line Segment Detector Using Approximate Computing
Adaptive beamformer for hands-free communication system in noisy environments
Multi-band combined LNA and mixer
A Novel Graph Algorithm for Circuit Recognition
Macroblock-Level Adaptive Scan Scheme for Discrete Cosine Transform Coefficients
Multilayer RF Dual-Band Bandpass Filters With Quasi-Flat Group-Delay Behavior and Multiple Stopband Transmission Zeros
A High-Speed and Low-Power Voltage Controlled Oscillator in 0.18-µm CMOS Process
On joint synchronization of clock offset and skew for Wireless Sensor Networks under exponential delay
Analytic limitations on sigma-delta modulator performance
Load estimation in radial electric power distribution networks using limited measurements
High fan-in differential current mirror logic
An embedded 12-bit 80MS/s A/D/A interface for power-line communications in 0.13µm pure digital CMOS technology
Determination of voltage source values in modern biasing techniques of analog circuits
A 1.52 uJ/classification patient-specific seizure classification processor using Linear SVM
Generation of multi-scroll chaos using second-order linear systems with hysteresis
Optimization of 3-phase spreading sequences of Markov chains
An Efficient Hardware Volume Renderer for Convolutional Neural Radiance Fields
Exploiting Resiliency for Kernel-Wise CNN Approximation Enabled by Adaptive Hardware Design
Local memory and logic arrangement for ultra-low power array processors
An efficient parallel resampling structure based on iterated short convolution algorithm
Multi-Attractor and Transient Stability of Islanded Microgrid
Fast Partitioning Decision Scheme for Versatile Video Coding Intra-Frame Prediction
A Novel Conversion Method for Spiking Neural Network using Median Quantization
A spatial variance approach to target tracking with sensor arrays
Partitioning and Retiming of Multi-Dimensional Systems
Dynamical networks with on-off stochastic connections: Beyond fast switching
A 20 TOp/s/W Binary Neural Network Accelerator
Function-Call Network Reliability of Kernel in Android Operating System
A 10-bit 200-kS/s 1.76-μW SAR ADC with Hybrid CAP-MOS DAC for Energy-Limited Applications
A 1.5V 12-b 40 MSamples/s CMOS pipelined ADC
A systematic approach for analyzing fast addition algorithms using counter tree diagrams
Towards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs
Enhancing Memory Capacity of Reservoir Computing with Delayed Input and Efficient Hardware Implementation with Shift Registers
A Current-Reuse Gm-C Complex Filter with Independent Tuning Capability
MPEG-Pro, an authoring system for MPEG-4
Adaptive super-exponential algorithms for blind deconvolution of MIMO systems
Logic-on-logic partitioning techniques for 3-dimensional integrated circuits
A Low-Noise 0.001Hz-lkHz Sample-Level Duty-Cycling Neural Recording System-on-Chip
A 2.44 Tops/W Heterogeneous DCNN Inference/Training Processor for Embedded System
Low complexity decimation filter for multi-standard digital receivers
Two-layered neighborhood tabu search for multi-objective distribution network expansion planning
Timing yield estimation using statistical static timing analysis
A scan design method based on two complementary connection styles to minimize test power
Minimum augmentation to bi-connect specified vertices of a graph with upper bounds on vertex-degree
Lossy transformation technique applied to the synthesis of multidimensional lossless filters
Phase noise and amplitude issues of a wide-band VCO utilizing a switched tuning resonator
CustomFit: Customizing Task-Optimized and Size-Specific Subnets from a Single Base Network During Runtime
A 0.473 μJ/class Seizure Detection Processor with LSVM Classifier and LPF-Based Feature Extraction
A Programmable Video Signal Multi-processor for HDTV Signals
A monolithic CMOS automatic biasing system for 40GHz multistage HEMT
A Double-Balanced N-Phase Passive 3 × Sub-Harmonic Down-Conversion Mixer
Learning-Based Fast VVC Affine Motion Estimation
Series Synchronized Triple Bias-Flip (S-S3BF) Interface Circuit for Piezoelectric Energy Harvesting
Joint quantization and diffusion for compressed sensing measurements of natural images
A Type-II Analog PLL with Time-Domain Processing
Asynchronous-QDI 2D IIR digital filter circuits
H.265/HEVC encoder optimization with parallel-efficient algorithm and QP-based early termination
A one-shot projection method for interconnects with process variations
Assessment of NPR MDFT filter banks for subband coding and data transmission
A method of 3D face recognition based on principal component analysis algorithm
A Two-Way Current-Combining W-band Power Amplifier Achieving 17.4-dBm Output Power with 19.4% PAE in 65-nm Bulk CMOS
Predictive Switched-Capacitor Track-and-Hold Amplifier with Improved Linearity
LC resonant clock resource minimization using compensation capacitance
An efficient algorithm for the formulation of state equations and output equations for networks with ideal switches
Stability and Dynamics of Power Systems with Regulated Converters
Live demonstration: A wearable EIT system using active electrodes for monitoring respiration
A 0.45 pJ/bit 20 Gb/s/Wire Parallel Die-to-Die Interface with Rotary Traveling Wave Oscillators
A directional extension of the JPEG image codec
A bivariate fractal interpolation surface with an individual vertical scaling factor
Control signal sharing of asynchronous circuits using datapath delay information
Estimating Circuit Nonidealities of Continuous-Time Multibit Delta-Sigma Modulators
A VCO-based Analog-to-digital Converter with Second-order Sigma-Delta Noise Shaping
An algorithmic ADC with greater than rail-to-rail input range and near-Vt supply
Enhanced level shifter for multi-voltage operation
A new CNN IC for stereo visual system
Asynchronous FPGA architecture with distributed control
Bidirectional current conveyer with chopper stabilization and dynamic element matching
A 3.6 TOPS/W Hybrid FP-FXP Deep Learning Processor with Outlier Compensation for Image-to-Image Application
A fully-digital spectrum shaping signaling for serial-data transceiver with crosstalk and ISI reduction property in multi-drop memory interfaces
A Systematic Comparison of D-Band Power Amplifiers Using MOM- and MOS-Neutralization Capacitors in 22nm FDSOI CMOS
Model order selection for estimation of Common Acoustical Poles
A K-Band CMOS High-gain Power Amplifier Using Transformer-feedback Cascode Topology
A 105-dB SFDR 16-bit SAR ADC with a Window Capacitor Calibration Scheme
Fast model searching and combining for example learning-based super-resolution
Reducing the number of variable movements in exact BDD minimization
Buffer optimization based on critical path analysis of a dataflow program design
Handset detector architectures for DS-CDMA wireless systems
A digital calibration technique for wide-band CT MASH ΣΔ ADCs with relaxed filter requirements
Analysis of limit cycles in a PI digitally controlled buck converter
Guaranteeing spike arrival time in multiboard & multichip spiking neural networks
Simultaneous monitoring of anesthetics and therapeutic compounds with a portable multichannel potentiostat
The effect of atomic layer deposition temperature on switching properties of HfOx resistive RAM devices
Image compression using the spatial-orientation tree