yusuke1997/dblp-id-title huggingface dataset:
A New Approach for the Design of CMOS Voltage Buffers for Switched-capacitor and gm-C Filters
Road Segmentation using CNN and Distributed LSTM
Implementation of a Labeling Algorithm based on Contour Tracing with Feature Extraction
Depletion Based Digital and Analogue Circuits with n-Channel IGZO Thin Film Transistors
A Smart Frequency Presetting Technique for Fast Lock-in LC-PLL Frequency Synthesizer
A pipelined analog-to-digital converter using incomplete-settling-without-slewing technique
Live Demonstration: Real-Time Spoken Digit Recognition using the DeltaRNN Accelerator
A novel BMNoC configuration algorithm utilizing communication volume and locality among cores
Analysis of the misadjustment of BP network and an improved algorithm
A frequency-folded ADC architecture with digital LO synthesis
A new direct design technique for ALP recursive digital filters
Hardware-oriented optimization and block-level architecture design for MPEG-4 FGS encoder
Jitter equalization for binary baseband communication
A novel autocorrelation-based timing mismatch C alibration strategy in Time-Interleaved ADCs
A 0.2V 492nW VCO-based OTA with 60kHz UGB and 207 μVrms noise
An FPGA processor for real-time, fixed-point refinement of CDVS keypoints
Dual Square Root Unscented Kalman Filter based Single Channel Blind Source Separation Methodology
A low spur fractional-N frequency synthesizer architecture
Design of a sample-and-hold analog front end for a 56Gb/s PAM-4 receiver using 65nm CMOS
Efficient channel shortening for higher order modulation: Algorithm and architecture
Triplet Confidence for Robust Out-of-vocabulary Keyword Spotting
SCANSA: A Computer Program for the Statistical Analysis of Switched Capacitor Networks
Design of an implantable stimulator ASIC with self-adapting supply
A CMOS Low Dropout Voltage Regulator Suitable for Low-Power SoC Applications
Homodyne dual six-port network analyzer and associated calibration technique for millimeter wave measurements
A chaotic motion controller for camera networks
A Multi-Loop Slew-Rate Enhanced NMOS LDO Handling 1A Load Current Step with Fast Transient
A new classification of neuron models for random inputs on bifurcation structures
Implementation of novel sampling and reconstruction circuits in digital radios
A Receiver with Adiabatic and Harmonically Enriched Double-Frequency N-Path Drive
Path planning on the TrueNorth neurosynaptic system
Nonlinear digital filters for beautifying facial images in multimedia systems
A row-parallel cyclic-line-access edge detection CMOS image sensor employing global thresholding operation
A systematic approach to the synthesis of square-root domain systems
A differential 0.13µm CMOS active inductor for high-frequency phase shifters
Batch Normalization Processor Design for Convolution Neural Network Training and Inference
A novel approach to the design and synthesis of general-order Bode-type variable-amplitude active-RC equalizers
Digital interferer suppression and jitter reduction in continuous-time bandpass ΣΔ modulators
Instrumentation of YSZ oxygen sensor calibration in liquid lead-bismuth eutectic
Reconfigurable Concurrent Dual-Band Low Noise Amplifier with Dynamic Output Load Network for Software Defined Radio
Fully pipelined DCT/IDCT/Hadamard unified transform architecture for HEVC Codec
Co-verification as risk management: minimizing the risk of incorporating a new processor in your next embedded system design
A Single Chip High Data Rate QPSK Demodulator
Adaptive processing applied to the design of highly digital analog interfaces
A 1.37 μW, 1.68 μVrms ECG AFE with Embedded DC-Servo Loop, Digital Calibration Unit and Three-State Ripple Reduction Loop
The noise immunity of dynamic digital circuits with technology scaling
An On-chip Sensor Placement Strategy For Mitigation Framework Against Voltage-Drop Attack
An entropy-based algorithm to reduce area overhead for bipartition-codec architecture
Live Demonstration: Null Beamforming to Self in Cooperative MIMO for Full-Duplex System
High CMRR, Second Generation Current-mode Instrumentation Amplifiers
A WLS algorithm for the design of low-delay quadrature mirror filter banks
High Efficiency Architecture of ESCOT with Word-Level Pass Concurrent Context Modeling Scheme for SVC
MorphoNet: A Deep Image Super Resolution Network Using Hierarchical and Morphological Feature Generating Residual Blocks
Static force measurement by piezoelectric sensors
VLSI implementation of high speed wave digital filters based on a restricted coefficient set
Controlled Single-Phase-Shift Modulation Method for a Fully Integrated Dual Active Bridge Converter
In-vivo tests of an inductively powered miniaturized neural stimulator
Spiral waves in bio-inspired oscillatory media
An Investigation of Phase Noise of a Fractional-N PLL in the Course of FMCW Chirp Generation
Linear Phase IIR Filters Composed of Two Parallel Allpass Sections
Efficient approximation algorithms for the maximum weight matching problem
Battery-aware dynamic voltage scaling in multiprocessor embedded system
MPEG-4 AAC audio decoding on a 24-bit fixed-point dual-DSP architecture
Embedding gray level images
A Real Time and Low Cost Hardware Architecture for Video Abstraction System
An efficient thermal energy harvesting and power management for μWatt wearable BioChips
Assessing Perturbations to Neural Spiking Response Dynamics Caused By Electrical Microstimulation
Analysis and hardware architecture for global motion estimation in MPEG-4 Advanced Simple Profile
On-line calibration of offset and gain mismatch in time-interleaved ADC using a sampled-data chaotic bit-stream
DP-FFN: Block-Based Dynamic Pooling for Accelerating Feed-Forward Layers in Transformers
A 213GHz - 228GHz, -91dB/Hz phase noise triple push oscillator in 65nm CMOS
Logic Value Assignment Contribution to Testability Analysis
Bio-inspired acoustic sensor with gain adaptation enhancing dynamic range and onset detection
An efficient synthesis method for ternary reversible logic
An Intelligent Stethoscope with ECG and Heart Sound Synchronous Display
A practical load-optimized VCO design for low-jitter 5 V 500 MHz digital phase-locked loop
Compact chopper-stabilized neural amplifier with low-distortion high-pass filter in 0.13µm CMOS
Efficient bit-serial systolic array for division over GF(2 m )
Open-Source, End-to-End Auditable Tapeout of Hardware Cryptography Module
Maximizing Side Channel Attack-Resistance and Energy-Efficiency of the STTL Combining Multi-Vt Transistors with Current and Capacitance Balancing
Two-Dimensional Calibration for Fixed-Pattern Noise Reduction of Thermal Images
An area-efficient, pulse-based interconnect
Fast Intra Mode Decision Method Based on Outliers of DCT Coefficients and Neighboring Block Information for H.265/HEVC
Buck PWM DC-DC converter with reference-voltage-modulation feedforward control
Improved fast encoding method for vector quantization based on subvector technique
An Efficient Memory Architecture for Motion Estimation Processor Design
Analysis of subthreshold swing in multichannel tunneling carbon nanotube field effect transistor (MT-CNTFET)
Hardware Efficient Accelerator for Spiking Transformer With Reconfigurable Parallel Time Step Computing
Printed organic TFT sensor tags
High-speed modular multiplication design for public-key cryptosystems
A direct-capacitive feedback ISFET interface for pH reaction monitoring
Averaging circuit for switching power converter control: a CMOS current-mode integrated implementation
A Threshold Voltage Tracking Circuit providing upto 20dB improvement in IIP2 of Single-ended Passive Mixers
An Optimizing Search based Algorithm for FIR Filtering with Noisy Input-output Data
A new compact neuron-bipolar cellular neural network structure with adjustable neighborhood layers and high integration level
Design Toolbox for sub-Nanoampere CMOS Programmable Voltage References
Hierarchical Multicast Network-On-Chip for Scalable Reconfigurable Neuromorphic Systems
A quadrature sinusoidal oscillator with phase-preserving linear frequency control and independent static amplitude control
A high-performance low-power static differential double edge-triggered flip-flop
A parallel LSI architecture for LDPC decoder improving message-passing schedule
Real time blood image processing application for malaria diagnosis using mobile phones
A novel approach to the linearization of the differential transconductors
A Memory Efficient Lock-Free Circular Queue
Dynamic model of on-chip inverting capacitive charge pumps with charge reusing
A New Class of Data Transmission Filters
Match enhancement in SAR ADCs by algorithmic unit capacitor assignment
On Fault Modeling and Fault Tolerance of Antifuse Based FPGAs
Stochastic Functional Verification of DNN Design through Progressive Virtual Dataset Generation
VLSI architecture design and implementation for BLOWFISH block cipher with secure modes of operation
CMOS Ring Oscillator Ising Machine Using Sub-harmonic Injection Locking
On optimal IFIR filter design
Fast and improved seam carving with strip partition and neighboring probability constraints
A Mixed-Signal Compute-in-Memory Architecture for Solving All-to-All Connected MAXCUT Problems with Sub-µs Time-to-Solution
A mixed-mode delay-locked loop for wide-range operation and multiphase outputs
Modified Reduced Constellation PLL for Higher Order QAM
Streaming phishing scam detection method on Ethereum
A 15.5 dB, wide signal swing, dynamic amplifier using a common-mode voltage detection technique
A 120GHz Receiver with $1/f$ Noise Mitigation Technique for Near-Field IoT
Silicon on sapphire CMOS architectures for interferometric array readout
An implantable CMOS signal conditioning system for recording nerve signals with cuff electrodes
Distortion cancellation via polyphase multipath circuits
A current steering CMOS folding amplifier
Design and Analysis of a Family of pW-Level Sub-1V CMOS VRGs by Stacking a Current-Source Transistor and a Resistive-Load Transistor
Linear-enhanced V to I converters based on MOS resistive source degeneration
Group Delay Analysis of Switched Circuits
Evaluating performance of manycore processors with various granularities considering yield and lifetime reliability
Fixed-outline floorplanning with constraints through instance augmentation
Analysis of phase-waves in coupled oscillators as a ladder
Resonant DC/DC converter with class E oscillator
Discrete-time H∞ control of PWM inverters: Experimental results complying with IEC 62040-3
Block-Level Power Net Routing of Analog Circuit Using Reinforcement Learning
Fabrication and electrical characteristics of memristors with TiO2/TiO2+x active layers
The Good, the Bad and the Ugly: Current Feedback - Technical Contributions and Limitations
Low power, high linearity multi-mode downconversion mixer for SDR
Energy-Efficient CMOS Memristive Synapses for Mixed-Signal Neuromorphic System-on-a-Chip
Practical results and finite difference method to analyze the electric and magnetic field coupling between power transmission line and pipeline
An on-chip delay measurements module for nanostructures characterization
Area-efficient parallel decoder architecture for high rate QC-LDPC codes
Design considerations for an automotive sensor interface Sigma-Delta modulator
Distortion analysis of 30Gsample/s CMOS switched source follower
Performance-aware Lightweight Dynamic Early-Exit-based Gait Authentication
Fully current controllable AM/FM modulator and quadrature sinusoidal oscillator based on CCCIIs
Equalizer and Crosstalk Compensation Filters for DFT Polyphase Transmultiplexer Filter Banks
Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine
Powder-based fabrication techniques for single-wall carbon nanotube circuits
A fixed-frequency auto-buck-boost SIMO DC-DC converter with duty-cycle redistribution and duty-predicted current control
A Three-Phase, One-Tap High Background Light Subtraction Time-of-Flight Camera
A 10b 1.25GS/s Residue Post-Amplified Pipelined-SAR ADC with Supply-and-Temperature Stabilized Open-Loop Residue Amplifier
A unique and robust single slice FPGA identification generator
An area-efficient high-accuracy prediction-based CABAC decoder architecture for H.264/AVC
Reduced-complexity interpolation-based QR decomposition using partial layer mapping
Deep Neural Network Interlayer Feature Map Compression Based on Least-Squares Fitting
A lOMb/s 4ns jitter direct conversion low Modulation Index FSK demodulator for low-energy body sensor network
Dynamic stereo vision system for real-time tracking
Big biomedical image processing hardware acceleration: A case study for K-means and image filtering
Energy function based neural networks UPFC for transient stability enhancement of network-preserving power systems
A low-complexity power-efficient signaling scheme for chip-to-chip communication
Direction-of-arrival estimation using sparse variable projection optimization
Improved content adaptive update weight control in motion-compensated temporal filtering
Comprehensive performance and robustness analysis of 2D turn models for network-on-chips
Blind carrier frequency offset estimation for OFDM systems by probability density function
Novel Transmission-Line Collection Systems for Photovoltaic Power
A BPSK demodulator circuit using an anti-parallel synchronization loop
A System Integrating Speech Interaction and Vision Sensing Applying in Smart Home Scenario
CMOS charge pumps using cross-coupled charge transfer switches with improved voltage pumping gain and low gate-oxide stress for low-voltage memory circuits
A digital reverse current self-calibration technique in 90% high efficiency rectified power supply for near field communication through magnetic field induction
A 1280 by 720 by 3, 12-Band Multispectral Imager for Dual Near-Infrared Fluorophore Differentiation
Hybrid large-area systems: Challenges in interfacing
Enhancing ML model accuracy for Digital VLSI circuits using diffusion models: A study on synthetic data generation
A Wideband High Efficiency Ka-Band MMIC Power Amplifier for 5G Wireless Communications
Toward Accurate Analysis of Channel Charge Injection in SAR ADCs' Capacitive DACs
An improvement of convergence of FFT-based numerical inversion of Laplace transforms
Optimizing throughput for limited receiver circuit power
Mitigating the Problem of Inrush Current in a Digital Sliding Mode Controlled Boost Converter Taking into Account Load and Inductor Nonlinearities and Propagation Delay in the Feedback Loop
NS3K: A 3nm Nanosheet FET Library for VLSI Prediction in Advanced Nodes
Skew-tolerant high-speed (STHS) domino logic
Fast lossless multi-resolution motion estimation for scalable wavelet video coding
A Fast-Transient-Response Fully-Integrated Digital LDO with Adaptive Current Step Size Control
Dynamics of high-frequency CMOS dividers
Mismatch Analysis of DDCC Rectifier for 2.4GHz-band high-sensitive RF Energy Harvesting System
Spike Events Processing for Vision Systems
Live Demonstration: Light Energy Harvesting System with an On-Chip Solar Cell and Cold Start-Up
Towards development of a CUEP method for Network-preserving power system models
Low-complexity Interpolation Architecture for Soft-decision Reed-Solomon Decoding
Tree-structured IIR/FIR octave-band filter banks with very low-complexity analysis filters
A 2.4pJ/bit ASK demodulator with 100% modulation rate for 13.56MHz NFC/RFID applications
Bio-inspired flight control and visual search with CNN technology
SRAM device and cell co-design considerations in a 14nm SOI FinFET technology
Design and Implementation of a Smart Headband for Epileptic Seizure Detection and Its Verification Using Clinical Database
An efficient 175 MHz programmable FIR digital filter
A new temperature-compensated CMOS bandgap reference circuit for portable applications
Custom Low Power Processor for Polar Decoding
Backpropagation-Based Background Compensation of Frequency Interleaved ADC for Coherent Optical Receivers
Blind low rate multiuser detection for multirate multicarrier CDMA systems using antenna array
Accurate Modelling of the Non-Linear Settling Behaviour of Current Memory Circuits
A Reinforcement Learning Based Multi-objective Evolutionary Algorithm for High-level Synthesis Design Space Exploration
An efficient transmission framework of digital multimedia broadcasting (DMB) systems
Sensitivity to Errors in Artificial Neural Networks: a Behavioural Approach
Low-power Clock Reference Circuit for Intermittent Operation of Subthreshold LSIs
Polymath: A Platform for Rapid Application Development of Modular EDA Tools
Low Capture Power Test Generation for Launch-off-Capture Transition Test Based on Don't-Care Filling
A 0.5µm CMOS programmable discrete-time Delta-Sigma modulator with floating gate elements
Emotional speech classification using Gaussian mixture models
An FPGA-based Lightweight Deblocking CNN for Edge Devices
Noise-tolerant switched-capacitor time-delay measurement system for micro-fluidic flow sensing
An Embedded Vision Engine (EVE) for automotive vision processing
Audio watermarking using time-frequency compression expansion
A 422.1 Mpixels/J Tile-based 4K Super Resolution Processor with Variable Bit Compression
Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs
Precoded V-BLAST for ISI MIMO channels
Verification of a Rapidly Multiplexed Circuit for Scalable Action Potential Recording
An Ultra-Dynamic Voltage Scalable (U-DVS) 10T SRAM with bit-interleaving capability
Design of cost-efficient multipliers modulo 2 a -1
High performance error concealment algorithm by motion vector refinement for MPEG-4 video
Pilot-Hopping Sequence Detection Architecture for Grant-Free Random Access using Massive MIMO
An efficient area manipulation architecture for frequency domain encoding process
Fractional order noise identification with application to temperature sensor data
A low voltage second order biquad using pseudo floating-gate transistors
A 50 MHz CMOS Differential Amplifier Channel for a Laser Range Finding Device
Efficient dictionary design for multiscale recurrent pattern image coding
NNASIM: An Efficient Event-Driven Simulator for DNN Accelerators with Accurate Timing and Area Models
Analysis and Optimum Design of the FFB
Low-leakage repeaters for NoC interconnects
Stack-based Ensemble Learning for Performance Indirect Testing of Analog Integrated Circuits
Evaluating noise pulses in RC networks due to capacitive coupling
State-of-the-Art Circuit Techniques for Low-Jitter Phase-Locked Loops: Advanced Performance Benchmark FOM Based on an Extensive Survey
Attitude sensing system design for wireless Micro-Ball endoscopy
Time Frequency Split Zak Transform for Finite Gabor Expansion
Modelling and characterization of dynamic behavior of coupled memristor circuits
A Highly Reliable PPG Authentication System Based on an Improved AI Model with Dynamic Weighted Triplet Loss Function
Efficient Multi-Hypothesis Error Concealment Technique for H.264
A modified high-radix scalable Montgomery multiplier
A Power Efficient HBT Pulse Generator for UWB Radars
Microelectromechanical systems in 3D SOI-CMOS: sensing electronics embedded in mechanical structures
A Multi-Modal Contrastive Learning Framework for Intelligent Fault Diagnosis with Enhanced Time-Frequency Alignment
Dynamic properties of a multiway arbiter
Complexity-effective dynamic range compression for digital hearing aids
A class A/B low power amplifier for wireless sensor networks
Different operational transconductance amplifier topologies for obtaining very small transconductances
FRM based FIR filter design - the WLS approach
ADDA: Almost direct drive architecture for solar high power electrical propulsion in new generation spacecrafts
Fully Integrated Mixed Mode Interface Circuit in 65 nm CMOS for Leukemia Detection and Classification
High-sensitivity memristor-based threshold detection
From Van der Pol to Chua: An introduction to nonlinear dynamics and chaos for second year undergraduates
Noise constraint driven placement for mixed signal designs
A 1.41µW Motion Sensing Front-End for Passive Infrared Sensors
Placement-aware 3D Floorplanning
Pulse and Breathing Motion Artifacts Correction of Intraoperative Thermal Imaging in Neurosurgery
Effect of body biasing on embedded SRAM failure
A Systematic Search Method for Obtaining Multiple Local Optimal Solutions of Nonlinear Programming Problems
Inflection point correction for voltage references
A 2 GOPS quad-mean shift processor with early termination for machine learning applications
Development of Hand-Held Point-of-Care Diagnostic Device for Detection of Multiple Cancer and Cardiac Disease Biomarkers
A Resource-Constrained Spatio-Temporal Super Resolution Model
Low coefficient complexity approximations of the one dimensional discrete cosine transform
Effects of Receiver Input Impedance on Nonlinear Distortion in Full-Duplex Radios
Denoising for Generalized Sidelobe Canceller
Design of a Mesh-Type Systolic Array Architecture for the Fast Computation of the Single Linkage Algorithm
A computational digital-pixel-sensor VLSI featuring block-readout architecture for pixel-parallel rank-order filtering
MemTorch: A Simulation Framework for Deep Memristive Cross-Bar Architectures
Numerical stability properties of passive Runge-Kutta methods
Observability and bad data identfication when using ampere measurements in state estimation
Closed form variable fractional delay using FFT with transition band trade-off
High-Linearity Calibration of Low-Resolution Digital-to-Analog Converters
Improved Recursive Procedures for Envelope-Constrained Filtering
A temperature independent driver for Mach-Zehnder modulators
Truncated Multiple Constant Multiplication with Minimal Number of Full Adders
A parallel architecture for ray-tracing with an embedded intersection algorithm
A blind frequency response mismatch correction algorithm for 4-channel Time-Interleaved ADC
A CMOS image sensor for low light applications
An improved algorithmic ADC clocking scheme
Signal coding and compression based on discrete-time chaos: statistical approaches
Design and implementation of multi-directional grid multi-torus chaotic attractors
A High-Speed High-Resolution Low-Distortion CMOS Bootstrapped Switch
Ground bounce calculation due to simultaneous switching in deep sub-micron integrated circuits
Live demonstration: Gesture-based remote control using stereo pair of dynamic vision sensors
Feedforward Neural Networks for Estimating IC Parametric Yield and Device Characterization
A Step-Up Charge Pump with High Integration and Full-Coverage Voltage Conversion Ratio
Robust channel estimation and multiuser detection for MC-CDMA systems under narrowband interference
A 13.8 TOPS/W Polynomial Implicit Neural Representation Accelerator with Tile Similarity Exploitation and LUT-based Matrix Multiplication Reformation
DAPSK-OFDM transmissions for high date-rate digital mobile radio
A 550MHz-B and width 40dB-Gain Range Analog Baseband with Dynamic PVT Compensation Achieving 26.1 dBm OIP3 in 28-nm CMOS
Low-voltage self-oscillating class E electronic ballast for fluorescent lamps
SPICE modeling of memristors
A novel fast algorithm for intra mode decision in H.264/AVC encoders
Area Efficient 2 n × Switched Capacitor Charge Pump
2D angle and array response estimation with arbitrary array configuration
Enhancing SNR in the Audio Band through Cross-Coupled Source Follower for Piezoelectric Microphones
Leveraging ReRAM Crossbar for Octave Convolution in Deep Neural Networks
Impedance modeling of DFIG-wind turbine system
Predicting Cancer Drug Response Using an Adapted Deep Neural Network Model
A locally adaptive subsampling algorithm for software based motion estimation
Fast and low-power processor front-end with reduced rename logic circuit complexity
Mean firing rate spike representations for speech recognition
Multiphysiological Shallow Neural Network-Based Mental Stress Detection System for Wearable Environment
A Wide Dynamic Range Read-out System For Resistive Switching Technology
Square-Root Recursive Prediction Error Algorithm for Perceptron-Based Adaptive Equalization Over Frequency Selective Fading Channel
Synthesis of Fixed Point Low Roundoff Noise Digital Filters with no Limit Cycle
Reflection removal based on single light field capture