yusuke1997/dblp-id-title huggingface dataset:
22.3 A 0.42THz Coherent TX-RX System Achieving 10dBm EIRP and 27dB NF in 40nm CMOS for Phase-Contrast Imaging
33.6 A Millimetric Batteryless Biosensing and Stimulating Implant with Magnetoelectric Power Transfer and 0.9pJ/b PWM Backscatter
A 4nm 16Gb/s/pin Single-Ended PAM4 Parallel Transceiver with Switching-Jitter Compensation and Transmitter Optimization
A 12V-Input 1V-1.8V-Output 94.7%-Peak-Efficiency 685A/cm 3 -Current-Density Hybrid DC-DC Converter with a Charge Converging Phase
A 65nm CMOS CT ΔΣ Modulator with 81dB DR and 8MHz BW Auto-Tuned by Pulse Injection
19.1 Optical Phased-Array FMCW LiDAR with On-Chip Calibration
2.5 A 16nm 5.7TOPS CNN Processor Supporting Bi-Directional FPN for Small-Object Detection on High-Resolution Videos
A 0.0025mm 2 bandgap voltage reference for 1.1V supply in standard 0.16μm CMOS
18.4 A 200GS/s 8b 20fJ/c-s Receiver with >60GHz AFE Bandwidth for 800Gb/s Optical Coherent Communications in 5nm FinFET
A 6Gb/s receiver with 32.7dB adaptive DFE-IIR equalization
2.8 A mixed-mode injection frequency-locked loop for self-calibration of injection locking range and phase noise in 0.13µm CMOS
4.4 A 28/37GHz Scalable, Reconfigurable Multi-Layer Hybrid/Digital MIMO Transceiver for TDD/FDD and Full-Duplex Communication
A Single-Inductor 4-Output SoC with Dynamic Droop Allocation and Adaptive Clocking for Enhanced Performance and Energy Efficiency in 65nm CMOS
Session 19 overview: Frequency generation
Trends and Challenges in Optical Communications Front-End
7.7 A 768Gb 3b/cell 3D-floating-gate NAND flash memory
A 0.7W fully integrated 42GHz power amplifier with 10% PAE in 0.13µm SiGe BiCMOS
16.5 A Synthesizable Design-Agnostic Timing Fault Injection Monitor Covering 2MHz to 1.26GHz Clocks in 65nm CMOS
9.4 A 182.3dB FoMs 50MS/s Pipelined-SAR ADC using Cascode Capacitively Degenerated Dynamic Amplifier and MSB Pre-Conversion Technique
32.5 A 2W 53.2%-Peak-Efficiency Multi-Core Isolated DC-DC Converter with Embedded Magnetic-Core Transformer Achieving CISPR-32 Class-B EMI Compliance and <5mV Ripple
16.4 High-Density and Low-Power PUF Designs in 5nm Achieving 23× and 39× BER Reduction After Unstable Bit Detection and Masking
30.3 Organic-transistor-based 2kV ESD-tolerant flexible wet sensor sheet for biomedical applications with wireless power and data transmission using 13.56MHz magnetic resonance
5.1 A 10MHz-bandwidth 4µs-large-signal-settling 6.5nV/√Hz-noise 2µV-offset chopper operational amplifier
A Completely Digital On-Chip Circuit for Local-Random-Variability Measurement
An All-Digital On-Chip Process-Control Monitor for Process-Variability Measurements
A 16GHz, $41\text{kHz}_{\text{rms}}$ Frequency Error, Background-Calibrated, Duty-Cycled FMCW Charge-Pump PLL
9.3 A very-low-noise frequency-translational quadrature-hybrid receiver for carrier aggregation
20.10 A 50nW-to-10mW output power tri-mode digital buck converter with self-tracking zero current detection for photovoltaic energy harvesting
A micropower chopper-correlated double-sampling amplifier with 2µV standard deviation offset and 37nV/√Hz input noise density
3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS
1.2 Three pillars enabling the Internet of Everything: Smart everyday objects, information-centric networks, and automated real-time insights
24.4 A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60%
ES3: Wearable wellness devices: Fashion, health, and informatics
A 280μW dynamic-zoom ADC with 120dB DR and 118dB SNDR in 1kHz BW
A 2.6 inch VGA LCD with Optical Input Function using a 1-Transistor Active-Pixel Sensor
A 1-to-2.5GHz phased-array IC based on gm-RC all-pass time-delay cells
A 16-Channel, 28/39GHz Dual-Polarized 5G FR2 Phased-Array Transceiver IC with a Quad-Stream IF Transceiver Supporting Non-Contiguous Carrier Aggregation up to 1.6GHz BW
A 0.05�?0.05mm2 RFID Chip with Easily Scaled-Down ID-Memory
3.4 A dual-mode transformer-based doherty LTE power amplifier in 40nm CMOS
Session 1 overview: Plenary session
28.4 A 400mVpp 92.3 dB-SNDR 1kHz-BW 2 nd -Order VCO-Based ExG-to-Digital Front-End Using a Multiphase Gated-Inverted Ring-Oscillator Quantizer
A 5.6MB/s 64Gb 4b/Cell NAND Flash memory in 43nm CMOS
Session 8 overview: Wireless power and harvesting: Power management subcommittee
A 1.1V 3.1-to-9.5GHz MB-OFDM UWB transceiver in 90nm CMOS
9.1 A 45nm CMOS RF-to-Bits LTE/WCDMA FDD/TDD 2×2 MIMO base-station transceiver SoC with 200MHz RF bandwidth
8.2 Batteryless Sub-nW Cortex-M0+ processor with dynamic leakage-suppression logic
A 7nm All-Digital Unified Voltage and Frequency Regulator Based on a High-Bandwidth 2-Phase Buck Converter with Package Inductors
What's next in robots? ∼Sensing, processing, networking toward human brain and body
Power Distribution Measurements of the Dual Core PowerPC TM 970MP Microprocessor
A 0.01mm 2 4.6-to-5.6GHz sub-sampling type-I frequency synthesizer with -254dB FOM
TensorCIM: A 28nm 3.7nJ/Gather and 8.3TFLOPS/W FP32 Digital-CIM Tensor Processor for MCM-CIM-Based Beyond-NN Acceleration
3.5mW W-Band Frequency Divider with Wide Locking Range in 90nm CMOS Technology
9.2 A 2.08mW 64.4dB SNDR 400MS/s 12b Pipelined-SAR ADC using Mismatch and PVT Variation Tolerant Dynamically Biased Ring Amplifier in 8nm
7.2: A 2.2pJ/b 212.5Gb/s PAM-4 Transceiver with >46dB Reach in 5nm FinFET
A Time-Division Multiplexed 8-Channel Non-Contact ECG Recording IC with a Common-Mode Interference Tolerance of 20V PP
Multimedia and Parrallel Signal Processors
A 28-nm Bulk-CMOS IC for Full Control of a Superconducting Quantum Processor Unit-Cell
A 30µW Analog Signal Processor ASIC for biomedical signal monitoring
19.4 embedded 1Mb ReRAM in 28nm CMOS with 0.27-to-1V read using swing-sample-and-couple sense amplifier and self-boost-write-termination scheme
An embedded 65nm CMOS low-IF 48MHz-to-1GHz dual tuner for DOCSIS 3.0
A 5GS/s 360MHz-BW 68dB-DR Continuous-Time 1-1-1 Filtering MASH ΔΣ ADC in 40nm CMOS
A 16mW 78dB-SNDR 10MHz-BW CT-ΔΣ ADC using residue-cancelling VCO-based quantizer
27.7 A scalable 1.5-to-6Gb/s 6.2-to-38.1mW LDPC decoder for 60GHz wireless networks in 28nm UTBB FDSOI
16.5 A flexible thin-film pixel array with a charge-to-current gain of 59µA/pC and 0.33% nonlinearity and a cost effective readout circuit for large-area X-ray imaging
22.3 Adaptive reconfigurable voltage/current-mode power management with self-regulation for extended-range inductive power transmission
Session 22 overview: Image sensors: Imagers, MEMS, medical and displays subcommittee
A 92dB dynamic range sub-μVrms-noise 0.8μW/ch neural-recording ADC array with predictive digital autoranging
A fully integrated 8-channel closed-loop neural-prosthetic SoC for real-time epileptic seizure control
Session 8 overview: Low-power digital circuits
18.4 An 11MHz Fully Integrated 5kV Isolated DC-DC Converter Without Cross-Isolation-Barrier Feedback
SE1: What Technologies Will Shape the Future of Computing?
A 170GB/s 16Mb Embedded DRAM with Data-Bus Charge-Recycling
26.9 A 0.038mm2 SAW-less multiband transceiver using an N-Path SC gain loop
EP1: Antiques from the innovations attic
A 56GS/S 6b DAC in 65nm CMOS with 256×6b memory
A 0.27mm 2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS
A 40-to-800MHz Locking Multi-Phase DLL
15.3 A 65nm Uncertainty-Quantifiable Ventricular Arrhythmia Detection Engine with 1.75µJ Per Inference
A 512GOPS Fully-Programmable Digital Image Processor with full HD 1080p Processing Capabilities
An LTE transmitter using a class-A/B power mixer
A 1Tb 3b/cell 3D-Flash Memory with a 29%-Improved-Energy-Efficiency Read Operation and 4.8Gb/s Power-Isolated Low-Tapped-Termination I/Os
Nonvolatile 3D-FPGA with monolithically stacked RRAM-based configuration memory
Two Class-D audio amplifiers with 89/90% efficiency and 0.02/0.03% THD+N consuming less than 1mW of quiescent power
10.2 An FSK plastic waveguide communication link in 40nm CMOS
SE3: Favorite Circuit Design and Testing Mistakes of Starting Engineers
9.4 A 4 th -Order Cascaded-Noise-Shaping SAR ADC with 88dB SNDR Over 100kHz Bandwidth
A 2.95mW/element Ka-band CMOS Phased-Array Receiver Utilizing On-Chip Distributed Radiation Sensors in Low-Earth-Orbit Small Satellite Constellation
22.8 Multi-functional microelectrode array system featuring 59, 760 electrodes, 2048 electrophysiology channels, impedance and neurotransmitter measurement units
A regulation-free sub-0.5V 16/24MHz crystal oscillator for energy-harvesting BLE radios with 14.2nJ startup energy and 31.8pW steady-state power
MISIMO: A multi-input single-inductor multi-output energy harvester employing event-driven MPPT control to achieve 89% peak efficiency and a 60, 000x dynamic range in 28nm FDSOI
A 1.2mW 1.6Vpp-Swing Class-AB 16Ω Headphone Driver Capable of Handling Load Capacitance up to 22nF
12.1 A rational-conversion-ratio switched-capacitor DC-DC converter using negative-output feedback
A 300MB SRAM, 20Tb/s Bandwidth Scalable Heterogenous 2.5D System Inferencing Simultaneous Streams Across 20 Chiplets with Workload-Dependent Configurations
DSPU: A 281.6mW Real-Time Depth Signal Processing Unit for Deep Learning-Based Dense RGB-D Data Acquisition with Depth Fusion and 3D Bounding Box Extraction in Mobile Platforms
32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver
A meter-range UWB transceiver chipset for around-the-head audio streaming
3.3GHz DCO with a frequency resolution of 150Hz for All-digital PLL
Low-skew clock distribution using zero-phase-clock-buffer DLLs
An inverse-class-F CMOS VCO with intrinsic-high-Q 1 st - and 2 nd -harmonic resonances for 1/f 2 -to-1/f 3 phase-noise suppression achieving 196.2dBc/Hz FOM
A High-Density Magnetoresistive Biosensor Array with Drift-Compensation Mechanism
A 1/2.5 inch 8.1Mpixel CMOS Image Sensor for Digital Cameras
19.5 A 3.2GHz digital phase-locked loop with background supply-noise cancellation
A 2.5-5MHz 87% Peak Efficiency 48V-to-1V Integrated Hybrid DC-DC Converter Adopting Ladder SC Network with Capacitor-Assisted Dual-Inductor Filtering
RF Building Blocks
6.5 A 0.5° - Resolution Hybrid Dual-Band Ultrasound Imaging SoC for UAV Applications
An IP2 Improvement Technique for Zero-IF Down-Converters
18.3 An 8b 160GS/s 57GHz Bandwidth Time-Interleaved DAC and Driver-Based Transmitter with Adaptive Calibration for 800Gb/s Coherent Optical Applications in 5nm
A 31.3fJ/conversion-step 70.4dB SNDR 30MS/s 1.2V two-step pipelined ADC in 0.13μm CMOS
A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering 10.8A/mm 2
UWB and mm-Wave Communications Systems
29.9 A 4×4 Distributed Multi-Layer Oscillator Network for Harmonic Injection and THz Beamforming with 14dBm EIRP at 416GHz in a Lensless 65nm CMOS IC
4.1 A 79.7μW Two-Transceiver Direct-RF 7.875GHz UWB Radar SoC in 40nm CMOS
A 0.7e - rms-temporal-readout-noise CMOS image sensor for low-light-level imaging
20.6 A 28GHz efficient linear power amplifier for 5G phased arrays in 28nm bulk CMOS
A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications
6.8 A Real-Time Pixel-Compensated Source-Driver IC with Dual-Slope Error Detection and Multi-Channel Time-Multiplexing Compensator for Compact OLED Displays
27.1 A 3-Axis gyroscope for electronic stability control with continuous self-test
A 130V Triboelectric Energy-Harvesting Interface in .18µm BCD with Scalable Multi-Chip-Stacked Bias-Flip and Daisy-Chained Synchronous Signaling Technique
A 79GHz SiGe-Bipolar Spread-Spectrum TX for Automotive Radar
A Broadband Receive Chain in 65nm CMOS
A 23mW fully integrated GPS receiver with robust interferer rejection in 65nm CMOS
27.1 A 250kHz-BW 93dB-SNDR 4 th -Order Noise-Shaping SAR Using Capacitor Stacking and Dynamic Buffering
14.9 Sub-sampling all-digital fractional-N frequency synthesizer with -111dBc/Hz in-band phase noise and an FOM of -242dB
18.5 A 2.14mW EEG neuro-feedback processor with transcranial electrical stimulation for mental-health management
A 0.2-to-2.0GHz 65nm CMOS receiver without LNA achieving ≫11dBm IIP3 and ≪6.5 dB NF
A DSSS UWB digital PHY/MAC transceiver for wireless ad hoc mesh networks with distributed control
17.6 Fully Integrated CMOS Ferrofluidic Biomolecular Processing Platform with On-Chip Droplet-Based Manipulation, Multiplexing and Sensing
A 5.6GHz 64kB Dual-Read Data Cache for the POWER6TM Processor
6.1 A 1/1.7-inch 20Mpixel Back-illuminated stacked CMOS image sensor for new imaging applications
An In-depth Look at the Intel IPU E2000
A Sub-200mV 6T SRAM in 0.13μm CMOS
An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion
A receiver for LTE Rel-11 and beyond supporting non-contiguous carrier aggregation
A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-Κ Metal-Gate CMOS Technology
A 1.6pJ/bit 96% Stable Chip-ID Generating Circuit using Process Variations
27.6 A 25MHz-BW 75dB-SNDR Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Background Offset Calibration
An 8Tb/s 1pJ/b 0.8mm 2 /Tb/s QDR inductive-coupling interface between 65nm CMOS GPU and 0.1µm DRAM
Retrodirective transponder array with universal on-sheet reference for wireless mobile sensor networks without battery or oscillator
F1: Intelligent energy-efficient systems at the edge of IoT
24.4 Sub-THz Ruler: Spectral Bistability in a 235GHz Self-Injection-Locked Oscillator for Agile and Unambiguous Ranging
20.8 A dual-frequency 0.7-to-1GHz balance network for electrical balance duplexers
A 5mA 0.6μm CMOS Miller-Compensated LDO Regulator with -27dB Worst-Case Power-Supply Rejection Using 60pF of On-Chip Capacitance
A 0.5-to-2.5GHz Multi-Output Fractional Frequency Synthesizer with 90fs Jitter and -106dBc Spurious Tones Based on Digital Spur Cancellation
A microcontroller-based PVT control system for a 65nm 72Mb synchronous SRAM
A 0.8V Intelligent Vision Sensor with Tiny Convolutional Neural Network and Programmable Weights Using Mixed-Mode Processing-in-Sensor Technique for Image Classification
A low-voltage 1Mb FeRAM in 0.13μm CMOS featuring time-to-digital sensing for expanded operating margin in scaled CMOS
20.2 A variable-conversion-ratio 3-phase resonant switched capacitor converter with 85% efficiency at 0.91W/mm 2 using 1.1nH PCB-trace inductors
A 3.2-to-7.3GHz Quadrature Oscillator with Magnetic Tuning
13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization
A 39.1-to-41.6GHz ΔΣ Fractional-N Frequency Synthesizer in 90nm CMOS
An 11b 3.6GS/s time-interleaved SAR ADC in 65nm CMOS
27.8 Fully integrated optical spectrometer with 500-to-830nm range in 65nm CMOS
A 22nm 0.84mm 2 BLE Transceiver With Self IQ-Phase Correction Achieving 39dB Image Rejection and on-Chip Antenna Impedance Tuning
12.1 A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low-VMIN applications
A biomedical multiprocessor SoC for closed-loop neuroprosthetic applications
A micropower battery current sensor with ±0.03% (3σ) inaccuracy from -40 to +85°C
11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge
A Continuous Time ΔΣ ADC for Voice Coding with 92dB DR in 45nm CMOS
Can we rebuild them? bionics beyond 2010
4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode
22.4 A 1GS/s 10b 18.9mW time-interleaved SAR ADC with background timing-skew calibration
Intelligence on Silicon: From Deep-Neural-Network Accelerators to Brain Mimicking AI-SoCs
A 45nm SOI-CMOS dual-PLL processor clock system for multi-protocol I/O
10Gb/s 15mW optical receiver with integrated Germanium photodetector and hybrid inductor peaking in 0.13µm SOI CMOS technology
A 60GHz CMOS VCO Using On-Chip Resonator with Embedded Artificial Dielectric for Size, Loss and Noise Reduction
Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2×10 -12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping
CMOS Mini Nuclear Magnetic Resonance System and its Application for Biomolecular Sensing
An Early Fusion Complementary RADAR-LiDAR TRX in 65nm CMOS Supporting Gear-Shifting Sub-cm Resolution for Smart Sensing and Imaging
A stretchable EMI measurement sheet with 8×8 coil array, 2V organic CMOS decoder, and -70dBm EMI detection circuits in 0.18¼m CMOS
19.3 A 2.4GHz 1.5mW digital MDLL using pulse-width comparator and double injection technique in 28nm CMOS
4.6 A 0.8V, 31ppm/°C, -40dB DC-to-GHz Power-Supply-Rejection Standard-Vth Core-MOS-Only Voltage Reference with a 294µm 2 Area
SHARC: Self-Healing Analog with RRAM and CNFETs
3.6GHz 16-core SPARC SoC processor in 28nm
Single-Chip Qi-Compliant 40W Wireless-Power-Transmission Controller using RMS Coil Current Sensing and Adaptive ZVS for 4dB EMI and up to 1.7% Efficiency Improvements
A 60kb/s-to-10Mb/s 0.37nJ/b Adaptive-Frequency-Hopping Transceiver for Body-Area Network
A 5.4GHz 0.35µm BiCMOS FBAR Resonator Oscillator in Above-IC Technology
A 33Mpixel CMOS imager with multi-functional 3-stage pipeline ADC for 480fps high-speed mode and 120fps low-noise mode
A 1V 600μW 2.1GHz Quadrature VCO Using BAW Resonators
A 112Gb/s Serial Link Transceiver With 3-tap FFE and 18-tap DFE Receiver for up to 43dB Insertion Loss Channel in 7nm FinFET Technology
10.4 A 1.22TOPS and 1.52mW/MHz augmented reality multi-core processor with neural network NoC for HMD applications
27.3 A Sub-1V 14b 5.8nW/Hz BW/Power-Scalable CT Sensor Interface with a Frequency-Controlled Current Source Achieving a 225× Scalable Range
ΔΣ ADCs and Converter Techniques
A Single-Channel 12b 2GS/s PVT-Robust Pipelined ADC with Critically Damped Ring Amplifier and Time-Domain Quantizer
A Clockless ADC/DSP/DAC System with Activity-Dependent Power Dissipation and No Aliasing
A 128-pixel 0.56THz sensing array for real-time near-field imaging in 0.13μm SiGe BiCMOS
A 32.5mW Mixed-Signal Processing-in-Memory-Based k-SAT Solver in 65nm CMOS with 74.0% Solvability for 3D-Variable 126-Clause 3-SAT Problems
25.1 A highly-digital frequency synthesizer using ring-oscillator frequency-to-digital conversion and noise cancellation
A 1.2V 121-Mode CT ΔΣ Modulator for Wireless Receivers in 90nm CMOS
37.6 A 22nm 60.81TFLOPS/W Diffusion Accelerator with Bandwidth-Aware Memory Partition and BL-Segmented Compute-in-Memory for Efficient Multi-Task Content Generation
An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI Devices
20.7 A 13.8µW binaural dual-microphone digital ANSI S1.11 filter bank for hearing aids with zero-short-circuit-current logic in 65nm CMOS
A 650Mb/s-to-8Gb/s referenceless CDR circuit with automatic acquisition of data rate
A 36fps SXGA 3D Display Processor with a Programmable 3D Graphics Rendering Engine
A 7Gb/s 9.3mW 2-Tap Current-Integrating DFE Receiver
26.4 A 0.4-to-1V 1MHz-to-2GHz switched-capacitor adiabatic clock driver achieving 55.6% clock power reduction
31.4 98.7% Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1
Non-Volatile Memories
ES2: Computing architectures paving the path to power efficiency
A 65nm Sub-Vt Microcontroller with Integrated SRAM and Switched-Capacitor DC-DC Converter
A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan
An MLSE receiver for electronic-dispersion compensation of OC-192 fiber links
Session 7 Overview: Imagers and Range Sensors Imagers, Medical, Mems and Displays Subcommittee
A highly digital 0.5-to-4Gb/s 1.9mW/Gb/s serial-link transceiver using current-recycling in 90nm CMOS
A 40nm 60.64TOPS/W ECC-Capable Compute-in-Memory/Digital 2.25MB/768KB RRAM/SRAM System with Embedded Cortex M3 Microprocessor for Edge Recommendation Systems
16.4 A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme
23.7 BROCA: A 52.4-to-559.2mW Mobile Social Agent System-on-Chip with Adaptive Bit-Truncate Unit and Acoustic-Cluster Bit Grouping
A 0.026mm 2 5.3mW 32-to-2000MHz digital fractional-N phase locked-loop using a phase-interpolating phase-to-digital converter
A CMOS Carrier-less UWB Transceiver for WPAN Applications
9.6 A 2.7-to-4.3GHz, 0.16psrms-jitter, -246.8dB-FOM, digital fractional-N sampling PLL in 28nm CMOS
9.8 Receiver with integrated magnetic-free N-path-filter-based non-reciprocal circulator and baseband self-interference cancellation for full-duplex wireless
A Highly Digital 2210μm 2 Resistor-Based Temperature Sensor with a 1-Point Trimmed Inaccuracy of ± 1.3 ° C (3 σ) from -55 ° C to 125 ° C in 65nm CMOS
A fractional-sampling-rate ADC-based CDR with feedforward architecture in 65nm CMOS
A 1.8W 115Gb/s Serial Link for Fully Buffered DIMM with 2.1ns Pass-Through Latency in 90nm CMOS
14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC
A 60GHz 1V + 12.3dBm Transformer-Coupled Wideband PA in 90nm CMOS
17.6 1V 10Gb/s/pin single-ended transceiver with controllable active-inductor-based driver and adaptively calibrated cascade-DFE for post-LPDDR4 interfaces
4.1 14nm 6th-generation Core processor SoC with low power consumption and improved performance
A 0.7V, 2.35% 3σ-Accuracy Bandgap Reference in 12nm CMOS
Phase-Tolerant Latency Control for a Combination 512Mb 2.0Gb/s/pin GDDR3 and 2.5Gb/s/pin GDDR4 SDRAM
4.2 A Tri-Band Dual-Concurrent Wi-Fi 802.11be Transceiver Achieving -46dB TX/RX EVM Floor at 7.1GHz for a 4K-QAM 320MHz Signal
34.3 A 4.75GHz Digital PLL with 45.8fs Integrated-Jitter and 257dB FoM Based on a Voltage-Biased Harmonic-Shaping DCO with Adaptive Common-Mode Resonance Tuning
Power Distribution and Management
6.3 A 40-to-56Gb/s PAM-4 receiver with 10-tap direct decision-feedback equalization in 16nm FinFET
F5: Low-power radios for sensor networks
A 45nm resilient and adaptive microprocessor core for dynamic variation tolerance
A 6V Swing 3.6% THD >40GHz Driver with 4.5× Bandwidth Extension for a 272Gb/s Dual-Polarization 16-QAM Silicon Photonic Transmitter
7.6 A +8dBm BLE/BT transceiver with automatically calibrated integrated RF bandpass filter and -58dBc TX HD2
11.5 A 23.9-to-29.4GHz Digital LC-PLL with a Coupled Frequency Doubler for Wireline Applications in 10nm FinFET
13.3 A 56Gb/s W-band CMOS wireless transceiver
20.2 A 3.09-to-4.04GHz Distributed-Boosting and Harmonic-Impedance-Expanding Multi-Core Oscillator with-138.9dBc/Hz at 1MHz Offset and 195.1dBc/Hz FoM
A 79dB-SNDR 167dB-FoM Bandpass ΔΣ ADC Combining N-Path Filter with Noise-Shaping SAR
A 45nm 8-core enterprise Xeon® processor
24.3 A 28GHz Current-Mode Inverse-Outphasing Transmitter Achieving 40%/31% PA Efficiency at Psat/6dB PBO and Supporting 15Gbit/s 64-QAM for 5G Communication
A 50MS/s 9.9mW pipelined ADC with 58dB SNDR in 0.18µm CMOS using capacitive charge-pumps
A 16.4kPixel 3.08-to-3.86THz Digital Real-Time CMOS Image Sensor with 73dB Dynamic Range
36.1 A 32Gb/s 10.5Tb/s/mm 0.6pJ/b UCIe-Compliant Low-Latency Interface in 3nm Featuring Matched-Delay for Dynamic Clock Gating
A Reconfigurable Series-Parallel Charger for Dual-Battery Applications with 89W 97.7 % Efficiency in Direct Charging Mode
20.3 A 64-QAM 60GHz CMOS transceiver with 4-channel bonding
7.4 A 915MHz asymmetric radio using Q-enhanced amplifier for a fully integrated 3×3×3mm 3 wireless sensor node with 20m non-line-of-sight communication
12.8 A BJT-based CMOS temperature sensor with a 3.6pJ·K 2 -resolution FoM
Over one million TPCC with a 45nm 6-core Xeon® CPU
Electrical funnel: A broadband signal combining method
34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADC
19.6 A 1.9mm-precision 20GS/S real-time sampling receiver using time-extension method for indoor localization
11.3Gb/s CMOS SONET-compliant transceiver for both RZ and NRZ applications
8.9 An On-Cell Monitoring and Balancing System with Near-Field Communicationsfor EV Batteries
33.3 A 125-to-170GHz Power-Efficient Phase Shifter in SiGe BiCMOS with Outphasing Gain and Phase Corrections