yusuke1997/dblp-id-title huggingface dataset:
Compression artifact reduction for low bit-rate images based on non-local similarity and across-resolution coherence
GEMINI: A triple-GEM detector read-out mixed-signal ASIC in 180nm CMOS
Analog front-end for a 3 Gb/s POF receiver
Intra-predictive Transforms for Image Coding
LLC encoded BoW features and softmax regression for microscopic image classification
Necessary and sufficient conditions for one-dimensional discrete-time binary cellular neural networks with both A- and B-templates to be stable
High Precision 16-bit Readout Gas Sensor Interface in 0.13µm CMOS
Compilation Techniques for Spin Qubits in a Shuttling Bus Architecture
Translayer optimized co-design of in-space microwave based wireless power transfer
DTRNG: Low Cost and Robust True Random Number Generator Using DRAM Weak Write Scheme
A GSM speech coder implemented on a customized processor architecture
Live demonstration: A bio-inspired asynchronous pixel event tri-color vision sensor
A design strategy for area efficient high-order high-Q SC filters
Analysis of the effects of fitting errors of DCE-CT signals on perfusion parameters
An interval method for global inequality-constraint optimization problems
Joint optimization of multiple behavioral and implementation properties of digital IIR filter designs
Feature Map Guided Adapter Network for Object Detection in Low-light Conditions
Error analysis of a multi-step prediction based blind equalizer
Error-resilience transcoding using content-aware intra-refresh based on profit tracing
Forum: From 100 Milliwatts/MIPS to 10 Microwatts/MIPS
A 16.6 μW 3.12 MHz RC Relaxation Oscillator with 160.3 dBc/Hz FOM
An efficient data path synthesis algorithm for behavioral-level power optimization
A novel loss compensation technique for broadband CMOS distributed amplifiers
Inductance extraction for general interconnect structures
Using Pulse Width Modulation for Wireless Transmission of Neural Signals in a Multichannel Neural Recording System
Algorithmic s-z transformations for continuous-time to discrete-time filter conversion
Versatile macromodel for the power supply of submicronic CMOS microprocessors based on voltage down DC-DC converter
Complex low-pass filters
A High Performance TIA Design in 40 nm CMOS
Computer-Aided Average-Value Modeling of Fourth-Order PWM DC-DC Converters
On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation
Battery energy storage dispatch analysis within the storage placement problem
Unsupervised Learning Applied to Image Coding
A 1280×1920 Global Shutter CMOS Image Sensor with On-Chip Background Light Cancellation
Blind Quality Assessment of Panoramic Images Based on Multiple Viewport Sequences
Accuracy limitations of pipelined ADCs
Design Of High-Density Iso-Stable Asymmetric Memory Cell With Upto 10X Reduced Leakage
Jitter analysis of bandpass continuous-time ΣΔMs for different feedback DAC shapes
A CMOS PUF Circuit Primitive Based on a Two-Dimensional Nonlinear Dynamical System
The PennBMBI: A general purpose wireless Brain-Machine-Brain Interface system for unrestrained animals
A 5-bit phase-interpolator-based fractional-N frequency divider for digital phase-locked loops
A unified high accuracy behavioral SPICE macromodel of operational amplifiers featuring the frequency, temperature and power supply influences and the Monte Carlo simulation
A 4µA quiescent current output-capacitor-free low-dropout regulator with fully differential input stage
An integrated pseudo-noise code acquisition processor for WCDMA, CDMA2000 and 802.11b systems
The dynamic behavior of multi-dimensional recursive difference equations in floating point arithmetic
Pilot-aided DOA estimation for CDMA communication systems
A hybrid nine-level inverter with series/parallel conversion
High-bandwidth power-scalable 10-bit pipelined ADC using bandwidth-reconfigurable operational amplifier
Lossless implementation of Daubechies 8-tap wavelet transform
Spatial- and temporal-reliability aware design for nano-scale VLSI circuits
A Multi-Solution Learning Algorithm for Fuzzy Rules
Bit-depth expansion by adaptive filter
Image Compression using 2D Dual-tree Discrete Wavelet Transform (DDWT)
A Quad-Output Elastic Switched Capacitor Converter and Per-Core LDO with 87% Power Efficiency and 2.5× Core-Frequency Range Improvement
Live Demonstration: Iontronic Integrated Circuit
Coming Up N3XT, After 2D Scaling of Si CMOS
Network Theorems for Fractional-Order Circuits
A low-power third-order ΔΣ modulator using a single operational amplifier
Advances in non-radiative resonant inductive coupling wireless Power Transfer: A comparison of alternative circuit and system models driven by emergent applications
A 2.9mW Inverter-based Quadrature Phase Clock Generator with ± 0.29° Phase Error
Accurate Extraction of Simplified Symbolic Pole/Zero Expressions for Large Analog IC's
A high-speed low-complexity modified radix-2 5 FFT processor for gigabit WPAN applications
A 100×100 pixels orientation-selective multi-chip vision system
Dual-mode Continuous-Time Quadrature Bandpass ΔΣ modulator with Pseudo-random Quadrature mismatch shaping algorithm for Low-IF receiver application
Run length coding based new approach to automatic image thresholding
Optimum multiplicative watermark detector in contourlet domain using the normal inverse Gaussian distribution
Confession session: Learning from others mistakes
A V t -zero equivalent MOSFET and its applications
Memory reduction ICFO estimation architecture for DVB-T
Fall detection using an address-event temporal contrast vision sensor
Average power sum of the near-end crosstalk couplings after near-end crosstalk cancellation
A 32.4 μW RF front end for 2.4 GHz wake-up receiver
SH-mobile - low power application processor for cellular [3G cellular phones]
Petri net based transformer fault diagnosis
High-Order Associative Learning Based on Memristive Circuits for Efficient Learning
Switching dynamics in finite time in memristor Chua's circuit
Switching activity estimation of finite state machines for low power synthesis
A log-domain implementation of the Izhikevich neuron model
Computationally-efficient iterative decoding for storage system design: Min-Sum refined
Efficient discovery of unknown ads for audio podcast content
A Prototype of a Pulsed Electric Fields Treatment for Solid Foods in Batches
An adaptive optical sensor
SRAM-Based Digital CIM Macro for Linear Interpolation and MAC
A massively scaleable decoder architecture for low-density parity-check codes
Decomposition-Based Model Parameter Extraction
V 2 control of interleaved buck converters
Clustering routing algorithm using game-theoretic techniques for WSNs
Study and implementation of high frequency pulse LED driver with self-oscillating circuit
W-Band Synthesized Modulator and Demodulator with Wideband Performance in 65-nm CMOS
Enhanced Parallel Interference Cancellation using Decorrelator for the base-station receiver
Prediction of protein-coding regions in DNA sequences using a model-based approach
A ns-2 simulator utilizing chaotic maps for network-on-chip traffic analysis
SDLA-based Logarithmic Amplifier Integrated with Magnitude Discriminator and Time Discriminator for Real-Time ESD Event Detection
A 69-Mbps dual tuning 8PSK/QPSK transmitter using injection locking and RF phase modulation
A low-power scan-path architecture
A Novel Method for Global Disparity Vector Estimation in Multiview Video Coding
Low Complexity Rate Control for VC-1 to H.264 Transcoding
An Extremely Low-voltage Floating Gate Artificial Neuron
A mode-mapping and optimized MV conjunction based MGS-scalable SVC to AVC IPPP transcoder
HRC-CIM: Hybrid RRAM-Capacitor Cell based Compute-in-Memory with High Linearity, Parallelism and Energy Efficiency
Efficient core designs based on parameterized macrocells with accurate delay models
A high-throughput DLMS adaptive algorithm
Live Demonstration: A Wearable Torso Shape Detection Belt for Lung Respiration Monitoring
1-V, High Speed, Low Leakage CMOS CML Multiplexer
A novel SST transmitter with mutually decoupled impedance self-calibration and equalization
A Highly Linearized Ka-band Heterodyne Receiver using a Folded Class-AB Inductive Peaking Mixer and Magnetic-Self-Cancellation-Transformer-Based IF Amplifiers
A 0.18µm CMOS SC lowpass filter for Bluetooth channel selection
A design of a low-power, high-accuracy, and constant-Q-tuning continuous-time bandpass filter
On the application of Quanta Imaging acquisition to spiking luminance sensors
Bifurcation phenomena in the Colpitts oscillator: a robustness analysis
Improving CCA via spectral components selection for facial expression recognition
Phase control of triangular stimulus generator for ADC BIST
Active flow identifiers for scalable, QoS scheduling in 10-Gbps network processors
On-chip ID generation for multi-node implantable devices using SA-PUF
Bulk compensated CMOS squaring circuits
A virtually jitter-free fractional-N divider for a Bluetooth radio
Fast Integer Fourier Transform (FIFT) based on lifting matrices
An embedded DSP core for wireless communication
Information embedding in JPEG-2000 compressed images
Least squares approximation-based ROM-free direct digital frequency synthesizer
Minimal ARMA lattice digital filter realization
Designing FIR filters with enhanced Fermat ALUs
An Ultra-low Power Automated Maximum Power Point Tracking Circuit with 99.9% Tracking Efficiency
Secure pseudo-random bit sequence generation using coupled linear congruential generators
On the Convergence Behavior of the Noise-constrained NLMS Algorithm
Towards a High Resolution Multimodal Neuromorphic Eventset
Real-time obstructive sleep apnea detection based on ECG derived respiration signal
A Self-Regulating Negative Charge Pump Using Multi-Phase Clock for Wideband ADCs
A fully parallel CMOS analog median filter
Novel Analysis of Phase Noise in Oscillators
Analytical and experimental study of tuning range limitation in mm-wave CMOS LC-VCOs
Neural Network Based Digital Twin of Three-Phase Inverter
History-based memory mode prediction for improving memory performance
Applications of the virtual cellular machine to many-core processors
Unsupervised classification of digital images using enhanced sensor pattern noise
Noise-shaping modulation in high-Q SC filters
Reduction in spectral peaks of DC-DC converters using chaos-modulated clock
An 81-99 GHz Tripler with Fundamental Cancellation and 3rd Harmonic Enhancement Technique in 40-nm CMOS
System design of a time-controlled broadband piezoelectric energy harvesting interface circuit
CMOS Pass-gate No-race Charge-recycling Logic (CPNCL)
Integrated Linear AC-coupling Circuit for DC-Balanced and Non-Balanced Traffics
Synchronization phenomena in coupled impact oscillator model of rocking robots on a suspension bridge
Traffic dynamics and vulnerability in hypercube communication networks
Floorplanning with performance-based clustering
New orthogonal transform for image compression
Fast wavelet packet basis selection for block-partitioning image coding
New spectral graph theoretic conditions for synchronization in directed complex networks
A 9.4 pJ/bit 432 MHz 16-QAM/MSK transmitter based on edge-combining power amplifier
A Cryogenic High Voltage Analog Switch for Trapped Ion Quantum Computers
A high-voltage DC bias architecture implementation in a 17 Gbps low-power common-cathode VCSEL driver in 80 nm CMOS
Area-efficient R-C DACs with Low-offset Push-pull Output Buffers for a 10-bit LCD Source Driver
A novel FIR filter based on stochastic logic
Optimal Synthesis of MITE Translinear Loops
An Energy-Efficient 1.2V 4-Channel Wireless CMOS Potentiostat for Amperometric Biosensors
Energy Efficient FPGA-Based Binary Transformer Accelerator for Edge Devices
A finite precision LMS algorithm for increased quantization robustness
An improved FPGA implementation of CNN Gabor-type filters
One-dimensional interpolation based channel estimation for mobile DVB-H reception
A family of CMOS latches with 3 stable operating points
Circuit Modeling of rGO-doped Scaffolds for Spinal Cord Regeneration Based on Transient and xAC Analyses
An Efficiency-Enhanced Active Rectifier with Offset-Controlled Comparators for WPT Systems
An analysis on the effect of image activity on lossy coding performance
Depth-aided exemplar-based hole filling for DIBR view synthesis
Combined 2-D transform and quantization architectures for H.264 video coders
A tool for the fast distortion evaluation of non linear amplifiers in broadband transmission systems
A multiple access for unlicensed spectrum
Development of an AA size energy transducer with micro resonators
Genetic algorithm approach for designing arbitrary FIR log filters
An asynchronous parallel neuromorphic ADC architecture
Ultra-Low Voltage 4-to-2 Compressors for Near-Vth Computing
Memristor-based neural circuits
ASIC Design of a Generalized Covariance Matrix Processor for DOA Algorithms
A New Technique For Improving the Security of Chaos Based Cryptosystems
Synthesis of narrowband linear-phase FIR filters with a piecewise-polynomial impulse response
Taking advantage of LVDS input buffers to implement sigma-delta A/D converters in FPGAs
Theory and design of causal stable IIR PR cosine-modulated filter banks
DDA-Net: Deep Distribution-Aware Network for Point Cloud Compression
Prediction-based adaptive transform coefficients scanning for inter-frame video coding
A new low-power high-speed single-clock-cycle binary comparator
A Dual-Sensing CMOS Array for Combined Impedance-pH Detection of DNA with Integrated Electric Field Manipulation
A Low-Power Remote Identification Module for Drones
FPGA implementation of a scheduler supporting parallel dataflow execution
Oscillation mode analysis in power systems based on data acquired by distributed phasor measurement units
New Implementations of Analog FIR and IIR Filters Exhibiting a Potential for Wide Signal Bandwidth and Programmability
Error-tolerant FIR filters based on low-cost residue codes
A near optimal algorithm for image compression using Gabor expansion
A 28Gbps 4×4 switch with low jitter SerDes using area-saving RF model in 0.13µm CMOS technology
Active guard band circuit for substrate noise suppression
A high-speed, low-complexity radix-2 4 FFT processor for MB-OFDM UWB systems
A Blind Calibration Technique to Correct Memory Errors in Amplifier-sharing Pipelined ADCs
Simplified Low-Voltage CMOS Syllabic Companding Log Domain Filter
Blind speech dereverberation using batch and sequential Monte Carlo methods
Robust sparse nonnegative matrix factorization based on maximum correntropy criterion
A 1-nW 95-ppm/°C 260-mV Startup-Less Bandgap-Based Voltage Reference
A 28.5µW All-Analog Voice-Activity Detector
Comparison of RTL Conversion and GL Conversion from Synchronous Circuits to Asynchronous Circuits
Minimum-Cost Load Balancing Document Distribution in Distributed Web Server Systems
A Lattice/Transversal Joint (LTJ) Structure for an Acoustic Echo Canceller
Residue arithmetic for designing multiply-add units in the presence of non-gaussian variation
A PVT resistant coarse-fine time-to-digital converter
On the continuation-path uniqueness of homotopy enhanced power flow method for general distribution networks with distributed generators
2-D IFIR Structures Using Generalized Factorable Filters
Charge Recycling MTCMOS for Low Energy Active/Sleep Mode Transitions
Learning Low-Rank Structured Sparsity in Recurrent Neural Networks
Single-Battery-Powered CMOS/MEMS Respiration Detection Monolithic Chip
Coresidual alias-locked loops
A Single-Inductor Multi-Ratio Resonant Ladder dc-dc Converter Achieving > 80% Efficiency over 0.4-to-1.4V Output Voltage Range
Partial Synchronization in Islanded Microgrid Containing Identical Converters and Ring Network
Minimum adder depth multiple constant multiplication algorithm for low power FIR filters
A novel multipath searcher implementation for WCDMA receivers
Mixed Signal Multiply and Adder Parallel Circuit for Deep Learning Convolution Operations
SC filter for RF down conversion with wideband image rejection
An integrated CMOS current driver using nonlinear feedback for bioimpedance applications
Event-overlapping processing in current waveform simulation
Analysis and implementation of LLC inverters for ozone-driven system with constant-current control
Register PUF with No Power-Up Restrictions
A 65nm CMOS current-mode receiver front-end
Architecture of a multi-slot main memory system for 3.2 Gbps operation
A low-power low-voltage OTA-C sinusoidal oscillator with more than two decades of linear tuning range
Digital camera identification using Colour-Decoupled photo response non-uniformity noise pattern
Pico-Ampere Voltage References for IoT Systems
On the Segmentation of Gigasample Rate Current Steering DACs
Measured Firmware Management for Integrity of Edge Devices
Reducing the Physical Design Cycle by Means of Topological Placement with Hard Timing Restraints
Exploring chaos in Chua's circuit via unstable periodic orbits
A Spiking Neural Network Accelerator based on Ping-Pong Architecture with Sparse Spike and Weight
A Survey on Fuzzy Information Processing Hardware Systems
CAP-HDC: A CAM-Based Processor for Hyperdimensional Computing
Modeling of Transmission Rate Based on Experimental Evaluation on Multi-Rate Wireless LAN for Safe and Secure Life
Lossless implementation of Motion JPEG2000 integrated with invertible deinterlacing
Fast Transforms for Orthogonal Logic
All digital transistor high gain operational amplifier using positive feedback technique
Linux apps-usage-driven power dissipation-aware scheduler
A novel VLSI iterative divider architecture for fast quotient generation
Energy-efficient SATD for beyond HEVC
Effect of DC offset on performance of differentially detected π/4 DQPSK
A 19.1 - 46.5 GHz Broadband Efficient Power Amplifier in 22nm CMOS FD-SOI for mm-Wave 5G
An AC-DC Wind Energy Harvesting Circuit with Extended Input-Voltage Range and 95% Tracking Efficiency
Predicting the Cascading Failure Propagation Path in Complex Networks Based On Attention-LSTM Neural Networks
Spurious modulation on current-mode controlled DC/DC converters: an explanation for intermittent chaotic operation
Digitally enhanced analog circuits: System aspects
Energy-Efficient Serialized Walsh-Hadamard Transform Based Feature-Extraction for Information-Aware Compressive Sensing
An Energy Efficient Functional near Infrared Spectroscopy System Employing Spatial Adaptive Sampling Technique
An energy-based heuristic operator method for resonant power circuit estimation predicting parameter sensitivity
Stability and zeros of a complex polynomial
Millimetre-Wave and Terahertz Antennas and Directional Coupler Enabled by Wafer-Level Packaging Platform with Interposer
Generalized invariant models for the analysis of soft-switching cells
Adaptive parameter estimation for total variation image denoising
Fast linearly independent ternary arithmetic transforms
Efficient Feature Compression for Machines with Global Statistics Preservation
Computation of the Time-Frequency Q-Distribution of Altes
A New Nonlinear DC and Temperature GaAs MESFET Model
An on-chip phase compensation technique in fractional-N frequency synthesis
High-speed simulator including accurate MTJ models for spintronics integrated circuit design
A compact 190µW PLL for clock control and distribution in ultra-large scale ICs
Depth map restoration and upsampling for kinect v2 based on IR-depth consistency and joint adaptive kernel regression
Matrix reordering for efficient list sphere decoding of polar codes
A jitter suppression technique for a 2.48832 Gb/s clock and data recovery circuit
A Sampling Speed Enhancement Technique for Near-Threshold SAR ADCs
A low-complexity composite QR decomposition architecture for MIMO detector
Live Demonstration: An 800 Mhz Gain-Cell Embedded DRAM in 28 nm CMOS Bulk Process for Approximate Computing Applications
A fully integrated dual band transceiver for IEEE 802.11a/b/g/j/n WLAN applications using hybrid up/down conversion architecture
Messaging and spectrum sharing between ad-hoc cognitive radio networks
Practical application of random forests for super-resolution imaging
Two-dimensional lossless two-port for circularly symmetric digital filtering
A fully integrated 1 V 5.8 GHz bipolar LNA
A Parallel Radix-2 k FFT Processor using Single-Port Merged-Bank Memory
A fully-integrated self-tuned transformer based step-up converter
A new bandwidth adaptive non-local kernel regression algorithm for image/video restoration and its GPU realization
Design of a 5-bit Signed SRAM-based In-Memory Computing Cell for Deep Learning Models
An Accelerated Block Searching Approach in A* for Autonomous Mobile Robots
Fully Differential Power-Efficient AB Miller Op-amp for a Wide Range of Capacitive and Resistive Loads
One-bit Dithering in Delta-Sigma Modulator-based D/A Conversion
Feature weighting in visual product recognition
An advance RTL to GDS2 design methodology for 90 nm and below system LSIs to solve timing closure, signal integrity and design for manufacturing
A novel methodology for power delivery network optimization in 3-D ICs using through-silicon-via technology
Rectified-linear and recurrent neural networks built with spin devices
Characterization of silicon field effect transistor sub-THz detectors for imaging systems
A Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording
A 12.7 Bit Accurate and 5.3nJ·µV 2 ·ns Comparator with Dynamic-cum-Body Bias Technique in SOI
The norm constraint IQML beamforming algorithm for wideband and coherent jammers suppression
The FIR filter bank with given analysis filters that minimizes various worst-case measures of error at the same time
Fabrication and Assembly Techniques for Distributed Battery-Free Brain Implants
An implantable 128-channel wireless neural-sensing microsystem using TSV-embedded dissolvable μ-needle array and flexible interposer
A Crosstalk-aware Application Mapping Algorithm for Hybrid Optical Network-on-Chip Architecture
Integrated single-inductor dual-input dual-output boost converter for energy harvesting applications
Pattern representation and recognition with accelerated analog neuromorphic systems
Video Key Object Detection Network via Reinforcement Learning
Architectural support for detection of sleepy eye behavior
A high performance JPEG2000 architecture
Design on LVDS receiver with new delay-selecting technique for UXGA flat panel display applications
XOR-decomposition principle and its use to build a glitch-free maximum-speed arbitrary binary waveform generator and deglitcher
Design of Class-E power VCO in 65nm CMOS technology: Application to RF transmitter architecture
Supervised learning in a two-input analog floating-gate node
On-chip Data Compression Techniques for High-Density Implantable Neural Recording
An object-oriented real-time distributed simulation of cellular phone switching system
A Practical and Design oriented approach to teaching circuits
Enriching an analog platform for analog-to-digital converter design
CMOS Design of Two Winner-Take-All Circuits Using Pulse Duty Cycle Synaptic Weighting
Design of 2-channel linear phase filter bank: a lifting approach
A reconfigurable crossbar switch with adaptive bandwidth control for networks-on-chip
Novel 3D horizontal RRAM architecture with isolation cell structure for sneak current depression
SRC passivation controller implementation using stochastic computing
Image sensor with general spatial processing in a 3D integrated circuit technology
An efficient SNR scalability coding framework hybrid open-close loop FGS coding
DPA Using Phase-Based Waveform Matching against Random-Delay Countermeasure
VLSI implementation of a conductance-based multi-synapse using switched-capacitor circuits
Incremental Encoder Based Position and Velocity Measurements VLSI Chip with Serial Peripheral Interface
Subthreshold Analog Circuit for Computing the Maximum Principal Component of 3-D Data
Low power linear current mode imager with 1.5 transistors per pixel
ReverSearch: Search-based energy-efficient Processing-in-Memory Architecture
Direct Digital Synthesis and Current Mirror Based Software Defined General Purpose Visible Light Communication Transmitter
Efficiency of switched-inductor dc-dc converter ICs across process technologies