yusuke1997/dblp-id-title huggingface dataset:
A 3.3 Volt Electronically Tunable Active Filter Usable to Beyond 1 GHz
Two low-voltage high-speed CMOS frequency-insensitive PWM signal generators based on relaxation oscillator
Purely Spintronic Leaky Integrate-and-Fire Neurons
On adaptive bounded synchronization in Power Network models
A 389μm 2 26.7nW 8-bit 100kS/s SAR ADC with Hybrid C-CI DAC
A topological measurements and RTUs design against a contingency
AquaNeRF: Neural Radiance Fields in Underwater Media with Distractor Removal
Frequency Improvement of Systolic Array-Based CNNs on FPGAs
Decentralized energy-conserving and coverage-preserving protocols for wireless sensor networks
A transmultiplexer-based adaptive filtering structure using a new adaptation scheme
Field test of the world first 200 Mbps PLC modems
Current mirror compensation for transistor mismatch
A statistical approach to localize passive RFIDs
A 12b 60MS/s SHA-less opamp-sharing pipeline A/D with switch-embedded dual input OTAs
Design of 2-D IIR Filters Using a New Digital Spectral Transformation
Wavelet-based digital watermarking with halftoning technique
LQR and Genetic Algorithms: An Effective Duo for Assessing Control Expenditure and Performance in Dynamic Systems
A simple design method of H infinity reduced-order filters for stochastic systems
Statistical modeling of device characteristics with systematic fluctuation
Novel Current-mode Waveform Generator with Independent Frequency and Amplitude Control
Fault-tolerance scheme for an RNS MAC: performance and cost analysis
Bionic Robust Memristor-Based Artificial Nociception System for Robotics
Energy-aware dynamic task mapping for NoC-based MPSoCs
Data hiding in halftone images by conjugate error diffusion
Modeling and control of System of Systems: The Tokamak scenario
Digital controlled analog architecture for DCT and DST using capacitor switching
A Delta-Modulated Analog-to-Digital Conversion Techique for Digital Microsensors
Charge Balance Control for Improving the Load Transient Response on Dynamic Voltage Scaling(DVS) Buck Converter
Analysis of CMOS RF LNAs with ESD protection
Electron counting based high-radix multiplication in single electron tunneling technology
Arithmetic/Logic Blocks for Fine-grained Reconfigurable Units
A 128-GS/s Timing-Robust Sampling Architecture Exploiting Analog FFT
A novel hardware implementation for joint heart rate, respiration rate, and gait analysis applied to body area networks
Exploiting piecewise linear features: multinested and simplicial cellular neural/nonlinear networks
Arabic Text Recognition Using Neural Networks
Unified Characterization Platform for Emerging NVM Technology: Neural Network Application Benchmarking using off-the-Shelf NVM Chips
Vision Guided Crop Detection in Field Robots using FPGA-Based Reconfigurable Computers
Adaptive Harmonic Fractional Fourier Transform
A High Speed 800 Channel Digital Interpolator Network
A Novel Hardware-Efficient Wireless Functional Electrical Stimulation Device Based on Nonlinear Dynamics of Ergodic Cellular Automaton
ANN Inference enabled by Variability Mitigation using 2T-1R Bit Cell-based Design Space Analysis
A Single Chip Implementation of Receive Path Termination for SONET OC-12c and Quadruple SONET OC-3c
Derivation of Complete Family of Multi-Output Configurations Including Voltage-Source-Mode and Current-Source-Mode Converters
Single phase MOS-NDR mobile networks
HWP: a new insight into canonical signed digit
Low-EVM CMOS Transimpedance Amplifier for Intermediate Frequency over Fiber
A Comparison of First and Second Generation Switched-Current Cells
A rule-based robotic control approach to melt-blowing for shaped fabric structures
A model based approach for realizing a safe wireless biotelemetry system
Sparse distributed learning via heterogeneous diffusion adaptive networks
Coded modulation based on higher dimensional chaotic maps
High-Dynamic-Range Image Reconstruction from Pixel-Level Self-Reset ADC Samples
Fault tolerant techniques for TSV-based interconnects in 3-D ICs
Synchronization of mutually coupled LC-oscillators
Integrated low voltage and low power CMOS circuits for optical sensing of diffraction based micromachined microphone
Sharper bounds for the zeros of polynomials
Dual-Output Trans-Impedance Amplifier of Cost-effective CMOS Optical Receiver for Digital Audio Interfaces
A high-speed 2×VDD output buffer with PVT detection using 40-nm CMOS technology
Synthesis of log-domain filter with well-defined operating point
Enabling Pervasive Sensing with RFID: An Ultra Low-Power Digital Core for UHF Transponders
A procedure for the piecewise-linear approximation of the resistive part of a cellular nonlinear network
Nonuniform Sampling of Signals & Applications
An Integrated Switching Power Converter with a Hybrid Pulse-Train/PWM Control
A multi-step approach to the single fault diagnosis of DC-DC switched power converters
Energy detection technique for ultra-low power high sensitivity wake-up receiver
A Capacitance-to-Digits Readout Circuit for Integrated Humidity Sensors for Monitoring the In-Package Humidity of Ultra-Small Medical Implants
A Hybrid Boost Converter with Regulated Flying Capacitor Voltage and Reduced Inductor Current for LED Lighting
An Active Approach for Charge Balancing in Functional Electrical Stimulation
A New Multi-Path Tree-Search FSVQ Architecture for Image/Video Sequence Coding
Algorithm and implementation of signed-binary recoding with asymmetric digit sets for elliptic curve cryptosystems
Isomorphism elimination for the enhancement of genetically generated analog circuits
Integration time optimization for integrating photosensors
Analysis and Design of Wireless Power Transfer System with Asymmetrical Duty-Cycle Controlled Class-D ZVS Inverter
A Simplified Analysis of Threshold Switch Based Neuron Circuits
A 12 Bit, 2V Current-Mode Pipelined A/D Converter Nonlinearity
A multi-chip implementation of cortical orientation hypercolumns
Spintronic/CMOS-Based Thermal Sensors
Reconfigurable blocker-tolerant RF front-end filter with tunable notch for active cancellation of transmitter leakage in FDD receivers
New results on zonal based motion estimation algorithms-advanced predictive diamond zonal search
A novel frequency synthesizer concept for wireless communications
A receive path ΔΣ frequency to digital converter
A 4×4 MIMO Discrete Multitone Wireline Transceiver With Far-End Crosstalk Cancellation For ADC-Based High-Speed Serial Links
A 32Gb/s NRZ Low-Bias DFB Driver with Frequency Boosting for High Efficiency Data Transmission
Robust Linear Estimation using M-Estimation and Weighted L1 Regularization: Model Selection and Recursive Implementation
Investigation of Dynamic Leakage-Suppression Logic Techniques Crossing Different Technology Nodes from 180 nm Bulk CMOS to 7 nm FinFET Plus Process
A quadrature output voltage controlled ring oscillator based on three-stage sub-feedback loops
Low Power CMOS Image Sensors Employing Adaptive Bulk Biasing Control (AB2C) Approach
A new high speed dynamic PLA
LIDAR Based, Tree Row Volume Estimation for Phytosanitary Products Reduction in Fruit Trees Orchards
A CMOS circuit for embedded GHz measurement of digital signal rise time degradation
Generating random benchmark circuits for floorplanning
Implementing a retinal visual language in CNN: a neuromorphic study
A 1 V, 12-bit wideband continuous-time ΣΔ modulator for UMTS applications
TAT transistors on SOT array for mixed analog/digital applications
Stability and stabilisation of 2D discrete linear systems with multiple delays
Hardware architecture for list successive cancellation polar decoder
Resource management of task oriented distributed sensor networks
Self-Supplied Integrable Active High-Efficiency AC-DC Converter for Piezoelectric Energy Scavenging Systems
User-configurable experimental design flows on the web: the ISCAS'99 experiments
Low-power design of variable block-size LDPC decoder using nanometer technology
Fast Frequency Acquisition Phase Frequency Detectors with Prediction-based edge Blocking
A new study on the synthesis of 2-D state-space digital filters with minimum roundoff noise
A Single-Inductor 4-Phase Hybrid Switched-Capacitor Topology for Integrated 48V-to-1V DC-DC Converters
An Ultra-Low Leakage Bitcell Structure with the Feedforward Self-Suppression Scheme for Near-Threshold SRAM
Mismatch compensation of a subthreshold CMOS current normalizer
Nonlinear Analysis of a DC-DC Boost Converter Working as a Maximum Power Point Tracker using Analog-Mixed-Signal Circuit Simulation
A delay-efficient ring-LWE cryptography architecture for biometric security
Binocular visual feedback with CNN sensors
Design Strategy of Off-Resonant Tertiary Coils for Uplink Detection in Biomedical Implants
Pipeline scanning architecture with computation reduction for rectangle pattern matching in real-time traffic sign detection
K-SVD Based Denoising Algorithm for DoFP Polarization Image Sensors
Fixed-step simulation of Continuous-Time SigmaDelta modulators
A least-squares based algorithm for FIR filtering with noisy data
Design on the turn-on efficient power-rail ESD clamp circuit with stacked polysilicon diodes
Video broadcasting over MIMO-OFDM systems
An efficient architecture for color space conversion using Distributed Arithmetic
A Compact Switched-Capacitor Multi-Bit Quantizer for Low-Power High-Resolution Delta-Sigma ADCs
A 99.95% Current Efficient Temperature Invariant All-in-One Reference Circuit on Flexible Substrate
Impact of amplifier bandwidth limitations on gain-boosted N-path receivers
A new reconfigurable modem architecture for 3G multi-standard wireless communication systems
A 30fps stereo matching processor based on belief propagation with disparity-parallel PE array architecture
Privacy-preserving Social Distance Monitoring on Microcontrollers with Low-Resolution Infrared Sensors and CNNs
Non-integer order integration by using neural networks
Ratioed Logic Comparator Based Digital LDO Regulator in 22nm FDSOI
Analog weight buffering strategy for CNN chips
A linear-approximation technique for digitally-calibrated pipelined A/D converters
An instruction set for the efficient implementation of the CORDIC algorithm
Path optimization for terrestrial robots using Homotopy Path Planning Method
Algorithms for the Automatic Design of the Decomposed state Model of an One-Dimensional Piecewise-Linear System
An inductively-tuned quadrature oscillator with extended frequency control range
Transition time bounded low-power clock tree construction
Minimum-cost augmentation to 3-edge-connect all specified vertices in a graph
An SRAM Compute-in-Memory based NTT Accelerator for CRYSTALS-KYBER
High Sensitivity Magnetic Field Sensor Using GMR Materials with Integrated Electronics
Intensity histogram CMOS image sensor for adaptive optics
A Class D Type High Frequency Tuned Power Amplifier with Class E Switching Conditions
A 120dB SNDR audio sigma-delta modulator with an asynchronous SAR quantizer
A 14-b, 125 MSPS digital-to-analog converter and bandgap voltage reference in 0.5 um CMOS
Probabilistic load margins of power systems embedded with wind farms
Dynamic model of PWM zero-voltage-transition DC-DC boost converter
A RISC-V-based Research Platform for Rapid Design Cycle
Lightweight Authentication for Secure IO Communication in NoC-based Many-cores
Wireless video transport using conditional retransmission and low-delay interleaving
Low-latency wireless LAN system using polling-based MAC
A 110nW Always-on Keyword Spotting Chip using Spiking CNN in 40nm CMOS
High-speed depth from focus on a programmable vision chip using a focus tunable lens
Hardware optimization of the perturbation for probabilistic gradient descent bit flipping decoders
Analysis of Multi-Phase Trans-Inductor Voltage Regulator with Fast Transient Response for Large Load Current Applications
A configurable dual moduli multi-operand modulo adder
A technique to transform 6T-SRAM arrays into robust analog PUF with minimal overhead
An Active CMOS NMR Field Probe with Custom Transceiver and ΣΔ Modulator ASICs and an Optical Link
Retinal prosthesis device based on pulse-frequency-modulation vision chip
A Design of Narrow-band Band-pass SCF's Using a Pseudo-2-path Principle and a Capacitor-error-free Voltage Inversion
Multiphase resonant inverters with common resonant circuit
A Performance Driven Layout Compaction Optimization Algorithm for Analog Circuits
Inductorless linearization of low-power active mixers
A novel smoothness-based interpolation algorithm for division of focal plane Polarimeters
Networks-on-chip topology optimization subject to power, delay, and reliability constraints
A curvature compensation technique for bandgap voltage references using adaptive reference temperature
A high-speed variable phase accumulator for an ADPLL architecture
A novel high-voltage 5.5 V resilient, floating and full-scale 3.3 V pulse-triggered level-shifter
A Dual-Band 28/38GHz Cascaded Phase Locked Loop Circuit Design
Integrated active noise control communication headsets
Active threshold compensation circuit for improved performance in cooled CMOS systems
Loop List Scheduler for DSP Algorithms under Resource Consraints
Car Traffic Monitoring Using Discrete Frequency Chirp Bluetooth Radar
A 5.4-GHz 2/3/4-Modulus Fractional Frequency Divider Circuit in 28-nm CMOS
Low-Complexity Real-Time Light Field Compression using 4-D Approximate DCT
A novel sparse adaptive algorithm using wavelets
Optimal offset averaging for flash and folding A/D converters
FDP: fault detection probability function for analog circuits
Analysis of shielded planar circuits by a mixed variational-spectral method
Minimally Invasive Pseudo-continuous Blood Glucose Monitoring: Results from In-Vitro and In-Vivo Testing of the eTac
A methodology for efficient design of analog circuits using an automated simulation based synthesis tool
Enhancing the PE Utilization for Multi-Precision Systolic Array via Optimizing Computation Latency
Low-Power Memristor-Based Computing for Edge-AI Applications
An advanced design method of bursting in Fitzhugh-Nagumo model
A 10-bit SAR ADC With a Low-Kickback-Noise Comparator and a Process-Variation-Independent Capacitive DAC for Biosensing Applications
DTQ-16T: Double Node Upset Tolerant Quadruple SRAM for Space Applications
Fast-Response Paradigm of Si Photodiode Array to Increase the Effective Sensitive Area of Detectors in Wireless Optical Biotelemetry Links
Quality-biased rate allocation for compound image coding with block classification
Embedded image coding using zeroblocks of subband/wavelet coefficients and context modeling
Modified CSD group multiplier design for predetermined coefficient groups
An efficient implementation of linear-phase FIR filters for a rational sampling rate conversion
A Hold Friendly Flip-Flop For Area Recovery
Dynamics of Minimal Power System Model - Invariant Tori and Quasi-Periodic Motions
Implementation of the MPEG-4 advanced audio coding encoder on ADSP-21060 SHARC
A digital background calibration technique for pipelined analog-to-digital converters
Simulatikon of One-Dimensional Euler-Flow by Means of Multidimensional Wave Digital Filters
Radiation hardening design for spin-orbit torque magnetic random access memory
An Adaptive Steganography Scheme for Voice Over IP
Software implementation of Chien search process for strong BCH codes
A low power 4 th order MASH switched-capacitor ΣΔ modulator using ultra incomplete settling
A binary-to-thermometer decoder with built-in redundancy for improved DAC yield
About the performances of the Advanced Encryption Standard in embedded systems with cache memory
A high-performance analog front-end for an intraoral tongue-operated assistive technology
High performance sense amplifier circuit for low power SRAM applications
Look up table (LUT) inverse halftoning
An Optimization-Based Approach to One-Bit Quantization
A Low Power Analogue Compressed Sensing Approach for CMOS ISFET Arrays
Effective Acceleration of Iterative Slack Distribution Process
The optimal MAC layer for low-power UWB is non-coordinated
An approach for estimating mode shape for participation of inter-area oscillation mode
Scratch detection via temporal coherency analysis and removal using edge priority based interpolation
Ring-VCO based low noise and low spur frequency synthesizer
TSCIM: A 28nm Transposed Stochastic CIM Macro for On-Chip Training and Inference
An entropy test for determining whether a MUX PUF is linear or nonlinear
A Lossless Compression Algorithm with Hardware Implementation for Dynamic Vision Sensor
A unified multi-mode MIMO detector with soft-output
Building blocks for large annealed compact neural networks
Ultra Low Voltage Gate Driven Bandpass PGA with Constant Bandwidth
Estimating head's measurements from front-view head and shoulders images
A high throughput limited search trellis decoder for convolutional code decoding
Large scale clock skew scheduling techniques for improved reliability of digital synchronous VLSI circuits
Precise time mode multiplier using digital primitives and passive components
A Fully-Integrated LDO with Two-Stage Cross-Coupled Error Amplifier for High-Speed Communications in 28-nm CMOS
An Adaptive Common-Mode Cancellation Biopotential Amplifier for Two-Electrode Dynamic ECG Recording
Signal and Noise Power Spectra in Superregenerative Oscillators
A novel current steering charge pump with low current mismatch and variation
A Slope-Based Multipath Estimation technique for mitigating short-delay multipath in GNSS receivers
A 400-MS/s 8-b 2-b/cycle SAR ADC with shared interpolator and alternative comparators
Muller C-element based Decoder (MCD): A decoder against transient faults
PUF Modeling Attack using Active Learning
In-memory reconstruction of compressively-sampled signals by nonlinear closed-loop analog circuits
Systematic Generation of Current-Mode Second Order RC Oscillators
Work-function engineering for reduced power and higher integration density: An alternative to sizing for stability in FinFET memory circuits
Design of IIR allpass fractional-delay fractional Hilbert transformer using complex cepstrum
Optimum discrete coefficient realization of FIR filters
A novel representation for repeated placement
Noise-robust automatic speech recognition using a discriminative echo state network
Linear programming design of linear-phase FIR filters with variable bandwidth
Two-stage fully-differential inverter-based self-biased CMOS amplifier with high efficiency
Robust analog circuit design: a set theoretic approach
Path Search for Complicated Functions
Analysis and Current-Mode Implementation of Asymptotically Stable Exponential Bidirectional Associative Memory
Spin-Orbit Torque Nonvolatile Flip-Flop Designs
Reconfigurable FIR filter using distributed arithmetic on FPGAs
Memristor-based cellular nanoscale networks: Theory, circuits, and applications
A random DEM technique with minimal element transition rate for high-speed DACs
A channel estimation scheme for Chinese DTTB system combating long echo and high doppler shift
LSTMs for Keyword Spotting with ReRAM-Based Compute-In-Memory Architectures
A Type-3 FMCW Radar Synthesizer with Wide Frequency Modulation Bandwidth
Spaciotemporal Neural Networks for Shortest Path Optimization
Nanometer MCML gates: models and design considerations
A low power low inaccuracy linearity-compensated temperature sensor for attachable medical devices
A Programmable 3-V CMOS Rail-to-Rail Op Amp with Gain Boosting for Driving Heavy Resistive Loads
Studies on distributed algorithm for network flow optimization problem based on tie-set flow vector space
An overlap-contention free true-single-phase clock dual-edge-triggered flip-flop
Crosstalk-Aware Transmitter Pulse-Shaping for Parallel Chip-to-Chip Links
Architecture of global motion compensation for MPEG-4 advanced simple profile
SDTA: An Efficient Sparse DNN Training Accelerator with Data Hierarchical Pre-fetching and Dynamic Scheduling
Noise constrained power optimization for dual VT domino logic
Impulsive stabilization of periodic solutions of recurrent neural networks with discrete and distributed delays
Tetris-SDK: Efficient Convolution Layer Mapping with Adaptive Windows for Fast In Memory Computing
Chaos as a Design Tactic: Broadening the Capture Range to the Phase-Locked Loop
Real-time Traffic Classification in Encrypted Wireless Communication Network
Multi-standard/multi-band distributed VCO based on the "switched-cells tuning technique" for SDR applications
Finding all characteristic curves of nonlinear resistive circuits using the dual simplex method
Bandpass Signal Generation Using Delta-Sigma Modulation Techniques
A 94.6dB-SNDR 50kHz-BW 1-1-1 MASH ADC Using OTA-FIA Based Integrators
Non-Uniform Interpolation in Integrated Gradients for Low-Latency Explainable-AI
Modeling of an IQ RF-DAC with error-free LO-switching
Chaos control in a memristor based circuit
Control and synchronization of a 4-scroll chaotic system
A high-bandwidth wireless infrared receiver with feedforward offset extractor
Dual-Precision Acceleration of Convolutional Neural Network Computation with Mixed Input and Output Data Reuse
Efficient Circuit Performance Prediction Using Machine Learning: From Schematic to Layout and Silicon Measurement with Minimal Data Input
Load Reduction and Adaptive Pull-Up Strategies for Time Delay Reduction in High-Resolution AER Sensors
An FFT-Based Fault Tolerant FIR Adaptive Filter
An Alternative Analysis of Noise Folding in Fractional-N Synthesizers
Data Rate Enhancement in Ultrasonic Data Telemetry Links: Surpassing Conventional Limits to Achieve Up to 2.2 Mbps Using a 1 MHz Transducer Pair
A dynamic element matching technique for reduced-distortion multibit quantization in delta-sigma ADCs
An event-based VLSI network of integrate-and-fire neurons
FRM Filter Design with Group Delay Constraint Using Second-Order Cone Programming
Scheduling Problems for Robotics in Precision Agriculture
Digital watermarking for color video using a nonlinear filter in detection process
Live demonstration: An associative capacitive network based on nanoscale complementary resistive switches
A novel signaling technique for high-speed wireline backplane transceiver: Four phase-shifted sinusoid symbol (PSS-4)
Multiple-reference temporal error concealment
A FPGA-based RO PUF with LUT-Based Self-Compare Structure and Adaptive Counter Time Period Tuning
A low-voltage positive buck-boost converter using average-current-controlled techniques
Temporal Analysis of Transaction Ego Networks with Different Labels on Ethereum
Is It Time to Include High-Level Synthesis Design in Digital System Education for Undergraduate Computer Engineers?
Double-threshold reversible data hiding
A low-power chopper bandpass amplifier for biopotential sensors
Global optimization of neural network weights using subenergy tunneling function and ripple search
A Machine-Learning Based Microwave Sensing Approach to Food Contaminant Detection
Low power and robust 7T dual-Vt SRAM circuit
A novel methodology for designing high-performance and low-power FPGA interconnection targeting DSP applications
Design framework for JPEG2000 encoding system architecture
A new low-power turbo decoder using HDA-DHDD stopping iteration
A Novel CMOS Envelope Detector Structure
Detection of voice disorders based on wavelet and prosody-related properties
Edge-preserving image decomposition based on guided upper/lower envelops
Analysis of back-end flash in a 1.5b/stage pipelined ADC
TMR Group Coding Method for Optimized SEU and MBU Tolerant Memory Design
Source color laser printer identification using discrete wavelet transform and feature selection algorithms
PN-generators embedded in high performance signal processors
A 3D Implementation of Convolutional Neural Network for Fast Inference
Design of hybrid continuous-time discrete-time delta-sigma modulators
Pulse generator for UWB communication and radar applications with PPM and time hopping possibilities
A novel property of the second-order modes of discrete-time systems under variable transformation
Clustering of matched features and gradient matching for mixed-resolution video super-resolution
Transient simulation of on-chip transmission lines via exact pole extraction
Content-based spam filtering using hybrid generative discriminative learning of both textual and visual features