yusuke1997/dblp-id-title huggingface dataset:
Least-Squares Based Direction-of-Arrival Estimation using Sparse Circular Arrays
Low-energy software Reed-Solomon codecs using specialized finite field datapath and division-free Berlekamp-Massey algorithm
A low-noise amplifier with continuously-tuned input matching frequency and output resonance frequency
SiP integration of intelligent, adaptive, self-sustaining power management solutions for portable applications
Efficient symbol reliability based decoding for QCNB-LDPC codes
A wireless neuroprosthetic for augmenting perception through modulated electrical stimulation of somatosensory cortex
A Class of Order Statistics Learning Vector Quantizers
A VLSI implementation of a calcium-based plasticity learning model
Some applications of bounded error parameter estimation in image compression
Hardware Self-Organizing Map Based on Frequency-Modulated Signal and Digital Frequency-Locked Loop
Robust super-resolution for face images via principle component sparse representation and least squares regression
Search of optimal realization matrix for filter implementation by using a genetic alogrithm
Quantum communication and entanglement
Analyses of intermodulation effects in fractional-N frequency synthesis
On Multiple Fault Detection of Parity Checkers
Programmable threshold voltage using quantum dot transistors for low-power mobile computing
Combined frame- and event-based detection and tracking
Real time low complexity VLSI decoder for prefix coded images
Analysis and Compensation of RF Impairments for Next Generation Multimode GNSS Receivers
A Multibit Left-Shift Modular Inverse Hardware Algorithm and its Implementation
Blind deconvolution by modified Bussgang algorithm
Capacitively averaged multi-phase LC oscillators
A 1 Gpps asynchronous logic OOK IR-UWB transmitter based on master-slave PLL synthesis
A Design Study of Power-Efficient Opamp Topologies for Discrete-Time ∆Σ Modulators
LO Synchronization Scheme via Full-Duplex Transceiver for Distributed Beamforming in Wireless Ad hoc Networks
A 1000fps Programmable Gain CMOS ISFET SoC with Array-Level Offset Compensation for Real Time Ion Imaging
The linear time-varying approach applied to the design of a negative-feedback class-B output amplifier
Impact of Random Dopant Induced Statistical Variability on Inverter Switching Trajectories and Timing Variability
A Digital-Summing Feedforward Sigma-Delta Modulator and its Application to a Cascade ADC
High-Precision Noise-Shaping SAR ADC using KT/C Noise Cancellation within CIFF Path for Brain-Machine Interface Application
A Skeleton-based Dynamic Hand Gesture Recognition for Home Appliance Control System
Ring oscillator based sub-1V leaky integrate-and-fire neuron circuit
High-speed constant-time division module for Elliptic Curve Cryptography based on GF(2 m )
Low power DCT implementation approach for VLSI DSP processors
A Real-Time Edge Detection ASIC Design
Approximations for bit error probabilities in SSMA communication systems using spreading sequences of Markov chains
Broadband High-Efficiency Linear Power Amplifier Design for Millimeter-Wave 5G
Frequency hysteresis phenomena in the frequency switched Chua's circuit
Optimized design of source coupled logic gates in GaAs HEMT technology
On passivity enforcement for macromodels of S-parameter based tabulated subnetworks
TURNUS: A design exploration framework for dataflow system design
Time-referenced single-path multi-bit Sigma-Delta ADC using a VCO based quantizer
Integration of class DE inverter for on-chip DC-DC power supplies
High-Speed Hardware Architecture for Post-Quantum Diffie-Hellman Key Exchange Based on Residue Number System
A 4.21 TFLOPS/W Memory-Efficient LLM Inference Accelerator with Bit-Layered Non-Uniform Quantization
From "MISSION: IMPOSSIBLE" to mission possible: Fully flexible intelligent contact lens for image classification with analog-to-information processing
A thorough analysis of the tank quality factor in LC oscillators with switched capacitor banks
C-log domain filters
Optimum Design of Differential-Mode Input Filters for DC-DC Switching Regulators
A Charge-Based Architecture for Energy-Efficient Vector-Vector Multiplication in 65nm CMOS
2-D adaptive CPWQ filter for image enhancement
A low-voltage low-distortion MOS sampling switch
A 9.4-bit, 28.8-mV range inverter based readout circuit for implantable pressure bridge piezo-resistive sensor
RF robustness enhancement through statistical analysis of chip package co-design
Theoretical expectation value of the capacity of fuzzy polynomial bidirectional hetero-correlator
DC Analysis of Networks Containing Ideal Diodes, using the Decomposed State Model of a One-Dimensional Piecewise-Linear System
A 49-dB Continuous Linear-in-dB IF VGA Technique
Mapping arbitrary mathematical functions and dynamical systems to neuromorphic VLSI circuits for spike-based neural computation
An Efficient Coding Technique for Multi-Transform Image Representation
LUT-based MPGAs for fast turnaround time conversion flow
New time-frequency distribution
Automatic tuning of linearly tunable high-Q filters
Fast Decoupling Capacitor Optimization for Power Delivery Network Based on Model and Data Fusion Method
Exploiting useful skew in gated low voltage clock trees
Multiplier reduction tree with logarithmic logic depth and regular connectivity
A brain-machine interface using dry-contact, low-noise EEG sensors
Low power transformation of datapath architectures with cyclic SFGs
A process compensated gain cell embedded-DRAM for ultra-low-power variation-aware design
A Fast 3D-BSG Algorithm for 3D Packing Problem
Smart Pattern Generation on Programmable Dielectrophoresis Array Chip for Single Particle Manipulation
Closed-loop continuous-time analog filter with almost constant IIP3 over the pass-band
On the Coding Gain of Wavelet Transforms
Reducing Parallel Linear Feedback Shift Register Complexity Through Input Tap Modification
On the Output Impedance of Integrated LNAs
Advanced filter bank based approach for blocker detection in LTE systems
A New Symbolic Program of Package for the Interactive Design of Analog Circuits
A Boolean extraction technique for multiple-level logic optimization
An area efficient fully monolithic hybrid voltage regulator
A concepts inventory for an attractive teaching approach of the mathematics of circuits and systems
Efficient digital filter structures with minimum roundoff noise gain
A Reconfigurable Regulating Rectifier with a Maximum VCR of 3.66 for 402MHz Wireless Power Transfer System
Design of a micro-electrode cell for programmable lab-on-CMOS platform
A Sub-μW 3-10MHz Stacked Oscillator with a Duty-Cycle Calibrated Level Shifter
Electronic Ballast for Multiple LED Lamps with Independent Brightness Control
ERINOKS: EneRgy-Efficient INduction-Based Food Processing for Optimized KitchenS
New architectures for serial-serial multiplication
Fast and robust homotopy path planning method for mobile robotics
Simple activation functions for neural and fuzzy neural networks
Versatile FeFET Voltage-sensing Analog CiM for Fast & Small-area Hyperdimensional Computing
An 8 Mbps data rate transmission by inductive link dedicated to implantable devices
Behaving cyborg locusts for standoff chemical sensing
Mismatch-tolerant, Continuous Time, Gain Enhanced Amplifiers
Live Demonstration: Novel Methods for EEG Visualization and Virtualization
A 25 Gb/s 470 μW active inductor equalizer for ground referenced signaling receivers
A search for a parsimonious basis sequence approximation of time-varying, nonlinear systems
Coefficient decimation approach for realizing reconfigurable finite impulse response filters
Performance Driven Technology Mapper for FPGAs with Complex Logic Block Structures
New differential coefficient coding algorithm for recursive FIR filters
Scalable delta-sigma modulator readout architecture for array-based sensor system
Multiple real-constant multiplication with improved cost model and greedy and optimal searches
Improved Analysis of Current-Steering DACs Using Equivalent Timing Errors
A novel approach to video sequence matching using color and edge features with the modified Hausdorff distance
Frequency-based object orientation and scaling determination
An intrinsic complexity model for the problem of total resistance determination
A new bulk-driven input stage design for sub 1-volt CMOS op-amps
A Three-Level Scoring System for Fast Similarity Evaluation Based on Smith-Waterman Algorithm
Expanded GMC for transient analysis of transmission line networks
Synthesis of Switched-Capacitor Inductance Simulation Circuits
Low-complexity synchronization technique with adaptive mode detection for DVB-H system
A Transconductor-Capacitor Video Filter and Equaliser Design
A set of questions for a concept inventory for a DC Circuits course
A new fault injection method for evaluation of combining SEU and SET effects on circuit reliability
Risk Management - beyond Risk Analysis
Subharmonic entrainment of frequency in nonlinear three-phase circuits with symmetry
A Power Efficient Multi-Bit Accelerator for Memory Prohibitive Deep Neural Networks
A CMOS wide-range temperature sensor with process compensation and second-order calibration for Battery Management Systems
Approximation algorithms for minimum-cost augmentation to k-edge-connect a multigraph
Low-voltage low-power wideband CMOS current conveyors based on the flipped voltage follower
CMOS zero cross-conduction low-power driver and power MOSFETs for integrated synchronous buck converter
Parameters estimation applied to automatic video processing algorithms validation
A fast dynamic 64-bit comparator with small transistor count
Pole-assignment robustness in a ring for structured perturbation systems
Method of Equivalent Currents for the Calculation of Magnetic Fields in Inductors and Magnets with Application to Electronics
A robust global motion estimation scheme for sprite coding
High compression ratio image compression
Mem-Computing CNNs with Bistable-Like Memristors
Design Framework for Ising Machines with Bistable Latch-Based Spins and All-to-All Resistive Coupling
A New Design Method for Solar Energy Harvesting System Based on Neural Network
Towards a Lightweight CRYSTALS-Kyber in FPGAs: an Ultra-lightweight BRAM-free NTT Core
Efficient polynomial multiplier architecture for Ring-LWE based public key cryptosystems
ILP-based scheme for low power scheduling and resource binding
Long-term jitter reduction through supply noise compensation
Approximate QR-based algorithms for recursive nonlinear least squares estimation
A novel millimeter-wave multi-order LC oscillator
REVBiT: REVerse Engineering of BiTstream for LUT Extraction & Logic Identification
An H.264 Spatio-temporal Hierarchical Fast Motion Estimation Algorithm for High-definition Video
A low-power 10-bit multichannel analyzer chip for radiation detection
Variation-tolerant, low-power PN-code acquisition using stochastic sensor NOC
Multiple Glancing at Quality: Benchmark Dataset and Objective Quality Assessment Metric for Low-light Image Enhancement
New Structures for Complex Multipliers and Their Noise Analysis
Discrete Stockwell Transform and Reduced Redundancy Versions from Frame Theory Viewpoint
Limiting Circuits for Rail-To-Rail Output Stages of Low-Voltage Bipolar Operational Amplifiers
INIT: Inpainting Network for Incomplete Text
Coupling-aware minimum delay optimization for domino logic circuits
A 35μW 64 × 64 Pixels Vision Sensor Embedding Local Binary Pattern Code Computation
A High Bandwidth Capacitorless NMOS LDO with Pole-Tracking Scheme and Adaptive FFRC Achieving -65dB PSR across Full Load Range
Analog circuit optimization via a modified Imperialist Competitive Algorithm
Equalization and linearization via linear negative feedback
Autonomous Constant On-Time Buck Converter With Pseudo Inductor Current Sensing for Modern High Performance Computing Devices
A Comprehensive Output Conductance Model Valid in All Regions of Inversion
Image registration method for 2D representation of wireless Micro-Ball endoscopic images
Parallelization techniques for implementing trellis algorithms on graphics processors
Capacitor-Less Buck-Boost Converter Using Integrated Planar Inductor-Capacitor Fabricated with Nanotechnology Processes
TV commercial detection in news program videos
A Scalable and Programmable Architecture for the Continuous Restricted Boltzmann Machine in VLSI
Novel interdigital microstrip bandpass filter with improved spurious response
Modeling and Analysis of Error Feedback Noise-Shaping SAR ADCs
CML ring oscillators: oscillation frequency
A 12-bit 80 Ms/s 110 mW floating analog-to-digital converter
Chebyshev approximation of baseband Volterra series for wideband RF power amplifiers
Timer based scheduling control algorithm in WLAN for real-time services
A low-cost jitter separation and ADC spectral testing method without requiring coherent sampling
AsteRISC: A Size-Optimized RISC-V Core for Design Space Exploration
Dynamic-Reference Based Early Write Termination for Low Energy SOT-MRAM
A power-efficient sizing methodology of SAR ADCs
Constrained eigenfilter design
Periodical nonuniform individually sampled switched-capacitor circuits
The qualitative form of optimum transient test signals for analog circuits derived from control theory methods
High-precision, fast current source for large-area current-programmed a-Si flat panels
A Self-Powered Piezoelectric Energy Harvesting Interface Circuit Based on Adaptive SSHI with Fully Integrated Switch Control
Localized closed-loop temperature control and regulation in hybrid silicon/silicone life science microsystems
An Efficient Hardware Accelerator for Power Grid Simulation
Lower-complexity direct symbol detector for multiuser MC-CDMA system using antenna array without vector channel estimation
Substrate Noise Reduction Based On Noise Aware Cell Design
Distributed Polarimetric SAR Compression with Joint Deblocking Using Side Information
Digital spur mitigation in high-speed block-parallel digital filter realizations
Transferring performance gain from software prefetching to energy reduction
Low-power low-complexity carrier-based UWB transmitter in 90nm CMOS for wireless biomedical radar sensing applications
An integrating wide dynamic range nMOS pixel with a logarithmic reference voltage generator
A fully differential line driver with on-chip calibrated source termination for gigabit and fast Ethernet in a standard 0.13µ CMOS process
A isolated bidirectional interleaved flyback converter for battery backup system application
An alternative method for noisy autoregressive signal estimation
Impact of strain on the design of low-power high-speed circuits
QCA-based nano circuits design [adder design example]
A new 3-phase design exploration methodology for video processor design
Live Demonstration: A Neural Processor for AI Acceleration
A 220 × 128 120 mW 60 frames/s current mode polarization imager for in vivo optical neural recording
Fast Simulation Framework for Subthreshold Circuits
A Robust and Self-Adaptive Clocking Technique for RSFQ Circuits - The Architecture
Op amp tuning for high accuracy deep sub-micron CMOS analog circuits [voltage regulator example]
Towards a smartphone-aided electronic ELISA for real-time electrochemical monitoring
A 0.7µm CMOS anti-aliasing filter for non-oversampled video signal applications
Faster, Higher-Quality Training of Feedforward Neural Network Models
A new reduced-reference image quality assessment using structural degradation model
Constructing high-rate scale-free LDPC codes
Multi-clock pipeline structure for 802.11 a WLAN transceiver
Analysis of Clock Jitter in VCO-ADCs Under Presence of Mismatch and Blocking Signals
A Digital Fuzzy-Logic Controller with a Simple Architecture
A Continuous Respiratory Monitoring System Using Ultrasound Piezo Transducer
A robust edge detector for motion detection
Optimal adaptive diagnosis with spares
Synchronization of the Time-Varying Discrete Biological Networks
Stochastic Learning with Back Propagation
An adaptive center of mass detection system employing a 2-D dynamic element matching algorithm for object tracking
Reconfigurable feeding network for GSM/GPS/3G/WiFi and global LTE applications
282-to-607 TOPS/W, 7T-SRAM Based CiM with Reconfigurable Column SAR ADC for Neural Network Processing
Impact of temperature fluctuations on circuit characteristics in 180nm and 65nm CMOS technologies
A 3bit/cycle 1GS/s 8-bit SAR ADC Employing Asynchronous Ping-Pong Quantization Scheme
Ultra-compact and robust FPGA-based PUF identification generator
Concept for an adaptive digital front-end for multi-mode wireless receivers
A 14-bit 250MS/s digital to analog converter with binary weighted Redundant Signed Digit coding
Energy-Efficient Stochastic Computing for Convolutional Neural Networks by Using Kernel-wise Parallelism
Fault modeling of RF blocks based on noise analysis
An Efficient Training Architecture for Nonlinear Softmax Function in Transformers
The Design of a Low-latency Tensor Decomposition Algorithm and VLSI Architecture
Does Money Laundering on Ethereum Have Traditional Traits?
Battery-Aware Variable Voltage Scheduling on Real-Time Multiprocessor Platforms
A Pattern-Control Digital Microfluidic Bio-Chip for Fast Thermal Cycle in Nucleic Acid Amplification Tests
On the modelling of the 2D wave equation using multidimensional wave digital filters
A split sorting-algorithm for generalized order statistic filters
An interference rejection filter for an ultra-wideband quadrature downconversion autocorrelation receiver
Equivalent relationship and unified indexing of FFT algorithm
Merged Digitally Controlled Oscillator and Time to Digital Converter for TV band ADPLL
A 10-bit linearity current-controlled ring oscillator with rolling regulation for smart sensing
A Graph Theoretic Approach to Feed-Through Pin Assignment
Hybrid CMOS/memristor circuits
Multipurpose watermarking based on curvelet transform
Micro-Architecture Design for Low Overhead Fault Tolerant Network-on-Chip
A 60-nA IQ 96.5% Peak Efficiency Buck Converter with Wide Load Range for Internet of Things
A 90nm CMOS digital PLL based on Vernier-Gated-Ring-Oscillator Time-to-Digital Converter
The effect of noise propagation on phase noise in ring oscillators
A rapid analog amendment framework using the incremental floorplanning technique
High-throughput QR decomposition for MIMO detection in OFDM systems
A continuous-time band-pass Sigma Delta modulator implemented in 0.35µm BiCMOS using transmission lines
A 156pW Gate-Leakage Based Voltage/Current Reference for Low-Power IoT Systems
Integrated Circuit Trimming Technique for Offset Reduction in a Precision CMOS Amplifier
Generalized state-plane analysis of soft-switching DC-DC converters
Multi-algorithm ASIP synthesis and power estimation for DSP applications
Live Demonstration: Real-Time Object Detection & Classification System in IoT with Dynamic Neuromorphic Vision Sensors
On the degree of MIMO systems
A 3D mouse for interacting with virtual objects
Stable and Fair Quantized Notification for 5G Mobile Network
Median filter with varying bandwidth adaptive to unknown smoothness of the signal
Multi-Path Integrate and Fire Circuit for Determination of Tactile Sensations in a Prosthetic Limb
A fully-differential switched capacitor chopper stabilized high-pass filter (mirrored integrator)
A Cluster-Based Neuromorphic ISFET Architecture with Integrated Calibration
Efficient error-cancelling algorithmic ADC
An Approximation Algorithm for the Legal Firing Sequence Problem of Petri Nets
A fully-adjustable dynamic range capacitance sensing circuit in a 0.15µm 3D SOI process
An integrated a-Si TFT demultiplexer for driving gate lines in active-matrix arrays
Adaptive digital compensation in DSP based FM modulators
SSD Failure Prediction Model Based on Multimodal Data Fusion
Biomimetic Spiking Neural Network (SNN) Systems for 'In Vitro' Cells Stimulation
An introductory capstone design course on embedded systems
A Novel Passive Tag with Asymmetric Wireless Link for RFID and WSN Applications
Nonisolated high step-up stacked dc-dc converter based on boost converter elements for high power application
An Ultra Energy Efficient Streaming-based FPGA Accelerator for Lightweight Neural Network
High-Speed Parallel Hardware Architecture for Galois Counter Mode
Locust-inspired vision system on chip architecture for collision detection in automotive applications
An efficient prime factor memory-based FFT processor for LTE systems
A low power register file with asynchronously controlled read-isolation and software-directed write-discarding
A switched-capacitor DSB to SSB converter using a recursive Hilbert transformer with sampling rate reduction
An improved read/write scheme for anchorless NEMS-CMOS non-volatile memory
CINEMA: A Configurable Binary Segmentation Based Arithmetic Module for Mixed-Precision In-Memory Acceleration
A reduction technique of large scale RCG interconnects in complex frequency domain
Blind identification of MIMO channels with periodic precoders
A High-Performance In-Memory Multi-Bit Adder Based on TST-MRAM
A novel lattice structure of M-channel paraunitary filter banks
Wireless video conferencing using multiple description coding
A Charge-Trap-Transistor-Based Fully Analog Machine Learning Inference Engine for Audio Keyword Spotting
An electronic calibration scheme for logarithmic CMOS pixels
A 1.2 V sense amplifier for high-performance embeddable NOR flash memories
A Foreground LSB-Based Capacitor Mismatch Calibration Method in An 18-bit SAR ADC
A Fully Integrated Fail-safe Stimulator Output Stage Dedicated to FES Stimulation
Digital differentiator design using fractional sample delay filter
Cryogenic Dynamic Logic
Fast video coding based on Gaussian model of DCT coefficients
A low-voltage √x floating-gate MOS integrator
Live demonstration: High level software and hardware synthesis of dataflow programs
Integration of energy-recycling logic and wireless power transfer for ultra-low-power implantables
Sync signal processing for asynchronously sampled video signals
Behavioural modelling of analogue faults in VHDL-AMS - a case study
PCM-Trace: Scalable Synaptic Eligibility Traces with Resistivity Drift of Phase-Change Materials
CMOS Integrated Highly Efficient Full Wave Rectifier
EM-based analytical model for estimation of worst-case crosstalk noise
A wafer-scale neuromorphic hardware system for large-scale neural modeling
Statistical Covariance-matching based Blind Channel Estimation for Zero-padding MIMO-OFDM Systems
Parametric average-value modeling of diode rectifier circuits in nodal analysis EMTP-type solution
An Oscillator Based Potentiostat with Switch-Cap Feedback for Current Sensing Applications
Design and Analysis of Latch-Type Comparators for Cryogenic Operations
Silicon bipolar linear power amplifier for WCDMA mobile applications
Application specific stability of 2-D Roesser model realizations
Analysis of Current-Commutating Passive and Active Mixers for mmWave Applications
Nonlinear ICA through low-complexity autoencoders
MC360IQA: The Multi-Channel CNN for Blind 360-Degree Image Quality Assessment
Separation and electrochemical detection platform for portable individual PM2.5 monitoring
A Nonlinear Inductance Model Able to Reproduce Thermal Transient in SMPS Simulations
Direction of arrival estimation for speech sources using fourth order cross cumulants
Fault diagnosis in analog and mixed mode low testability system
Simulating delta-sigma analog-to-digital converters with the Op-Amp nonlinearity using the Newton's method
An incremental analog-to-digital converter with multi-step extended counting for sensor interfaces
Digital filters with hypercomplex coefficients
Algorithm for yield driven correction of layout
Architecture for complex network measures of brain connectivity
Wireless integrated circuit for the acquisition of electrocorticogram signals
A Wireless IC for Wide-Range Neurochemical Monitoring Using Amperometry and Fast-Scan Cyclic Voltammetry
Face clustering in videos using constraint propagation
A broadband 470-862 MHz direct conversion CMOS receiver
High performance current-feedback op-amps
Low thermal error sampling comparator for accurate settling measurements
Waveform Domain Deep Learning Approach for RF Fingerprinting
HSViT: A Hardware and Software Collaborative Design for Vision Transformer via Multi-level Compression