yusuke1997/dblp-id-title huggingface dataset:
Using cosine filters to improve alias rejection in comb decimation filter
A 10-Bit 250-KS/s 1.24-uW SAR ADC for IoT Sensors with Energy-Efficient Comparator
Single slope/SAR column-parallel ADC with mixed-signal error correction
Multi-Site Impedance Measurement System based on MAX30001 Integrated-Circuit
Design and evaluation of Side Channel Attack resistant asynchronous AES Round Function
Margin aware timing test and tuning algorithm for post-silicon skew tuning
Performance evaluation of buffer sharing routers for Network on Chip
Reliability modeling of metal interconnects with time-dependent electrical and thermal stress
On Sensitivity of Bias Operation Point In Transistors with Moderate Inversion
Model-based synthesis for real-time embedded systems
Resistive switching in sol-gel derived microscale memristors
Exact and approximated discrete-time non-linear models of voltage switched CP-PLL
FPGA implementation of a support vector machine classifier for Ultrasonic flaw detection
A Non-autonomous Balanced Chaotic Circuit Based-on A Bipolar Differential-pair
Quasi-Digital Output Low Power CMOS Temperature Sensor
A 60dBO 2.9 GHz 0.18 µm CMOS transimpedance amplifier for a fiber optic receiver application
A Novel Ring Amplifier with Low Common-Mode Voltage Variation and Noise Reduction Using Floating Power Technique
A real-time UEFI functional validation tool with behavior Colored Petri Net model
Architecture of A Novel Low-Cost Hardware Neural Network
Sensor Readout Circuit with Integrated Baseband Modulation for Low Power Backscatter Tags
A time-to-digital converter (TDC) with a 13-bit cyclic time domain successive approximation interpolator with sub-ps-level resolution using current DAC and differential switch
Thermal sensor design for 3D ICs
Analysis and design of PWM-in-PWM-out Class D Amplifiers
Low Power Digital Temperature Sensor Using Modified Inverter Interlaced Cascaded Delay Cell
The effect of power supply ramp time on SRAM PUFs
Tapped-Inductor Buck DC-DC Converter with Complex Load
A Hybrid Random Number Generator Based on MetaStability-Ring Oscillator Linear Feedback Shift Registers (MSRO- LFSR)
Switching characteristics of MgO based self-compliant ReRAM devices
A 150 MHz bandwidth continuous-time ΔΣ modulator in 28 nm CMOS with DAC calibration
Analysis and comparison of two active anti-islanding detection methods
Digitally assisted analog processing unit for MPG based wearable device
Hardware based protection against malwares by PUF based access control mechanism
A four-layer wireless sensor network framework for IoT applications
In-memory area-efficient signal streaming processor design for binary neural networks
Direct Sequential Generation of Optimal Eigenvectors of the Symmetric Kernel of the Discrete Hankel Transform
An enhanced HSPICE macromodel of a PCM cell with threshold switching and recovery behavior
Binormalized data-reusing filtered-reference algorithm for impulsive active noise control
0.7 V supply, 8 nW, 8 ppm/°C resistorless sub-bandgap voltage reference
Review of nanoscale memristor devices as synapses in neuromorphic systems
Power-Efficient Data Modulation for All-Mechanical ULF/VLF Transmitters
Co-design of a TinyLLM using Programmable Logic and Software on an FPGA
Homotopy-based direct current analysis with formal stop criterion
Band-pass continuous-time ΣΔ modulators with widely tunable notch frequency for efficient RF-to-digital conversion
An Error Analysis Model for Floating-Point DFT Algorithms
Calculation of voltage gain transfer functions using Trajectance analysis
Blocker-Tolerant RF-to-Digital Linearization With a Very Nonlinear Auxiliary Path
A 24-mW 65-nm CMOS TI-Flash ADC for multi-standard serial-link receivers
In-pixel ADC concept with HDR hyperbolic compression and CDS
Efficient PAPR Reduction for Discrete Multi-Tone Signalling in High-Speed Wireline Applications
An active rectifier with optimal flip timing for the internal capacitor for piezoelectric vibration energy harvesting
Reliability Optimization Under Severe Uncertainty for NoC Based Architectures Using an Info-Gap Decision Approach
VRT: A Runtime Protection Against Back-Edge Control Flow Integrity Violation
Hysteresis-induced chaotic dynamics in a transmission line model
A Single-Stage RISC-V Processor to Mitigate the Von Neumann Bottleneck
Statistical accuracy analysis of complex floating point multipliers
An ELD tracking compensation technique for active-RC CT ΣΔ modulators
Switched-compensation technique in switched-capacitor circuit for achieving fast settling performance
Data-Triggered Approach for Real-Time Machine Learning in IoT Systems
Design and analysis of 2T-2M Ternary content addressable memories
Fully BEOL-Compatible Switch Boxes Using RRAMs and Thin Film Transistors for Reconfigurable and Secure ICs
Continuous ECG Monitoring with Low-Power Electronics and Energy Harvesting
Comparison of hardware based and software based stress testing of memory IO interface
Principal component analysis-based occupancy detection with ultra wideband radar
Correlation-Based Cryptanalysis of a Ring Oscillator Based Random Number Generator
Synthesis and Design of Floating Inductance Simulators at VHF-Band Using MOS-Only Approach
Improving EDP in wireless NoC-enabled multicore chips via DVFS pruning
An ultra-low-power analog memory system with an adaptive sampling rate
Method for designing integrated charge pumps with maximum conversion efficiency
A 256-point Analog Discrete-Time FFT
Adaptive Fault Tolerance Inherently Included in Bio-Inspired Adaptive Digital Filtering
Toward Biorealistic Silicon Neural Circuits on Reconfigurable Platforms
Low-Power and High-Linearity Inductorless Low-Noise Amplifiers with Active-Shunt-Feedback in 65-nm CMOS Technology
Total Harmonic Distortion and Power Factor Improvement Technique for CRM Flyback PFC Converters
Hardware Implementation of Digital Memcomputing on Small-Size FPGAs
Superconducting Shuttle-flux Shift Buffer for Race Logic
Low pull-in voltage electrostatic MEMS switch using liquid dielectric
Improving Object Localization Resolution using a Wearable Ultrasonic Sensor Array
Energy-Efficient Nonvolatile RISC-V CPU with a Custom Instruction-Controlled Accelerator
Heart sound denoising using computational auditory scene analysis for a wearable stethoscope
Trajectory analysis of endoscopic capsule images: A feasibility study
Hybrid Han-Carlson adder
Impact of Summer Undergraduate Engineering Research on Student Performance Highlighted Through GPA Tracking
A robust normalized variable tap-length normalized fractional LMS algorithm
Near-Linear-Phase IIR Filters Using Gauss-Newton Optimization
A Reconfigurable Monolithic 3D Switched-Capacitor DC-DC Converter with Back-End-of-Line Oxide Channel Transistor
Arterial Viscoelastic Model using Lumped Parameter Circuit With Fractional-Order Capacitor
CCII based KHN fractional order filter
Real-Time Traffic Counting on Resource Constrained Embedded Systems
STG-based detection of power virus inputs in FSM
Rapid Simulation of Photonic Integrated Circuits using Verilog-A Compact Models
A Novel Linear-Logarithmic Active Pixel CMOS Image Sensor with wide dynamic range
X-Band Phased-Array Transmitter Architecture with Power Transfer Optimization Algorithm for Space Solar Power System: A Case Study
A 780-MHz low power transceiver for wireless nodes applications in Internet of Things
Fractional-order oscillator design using unity-gain voltage buffers and OTAs
Frame Recovery Method for Screen to Camera Communication Using CMOS Sensor Camera
New Design for Solar Panel Tracking System Based on Solar Calculations
Design of Low-Voltage and Low-Power Cryogenic CMOS Voltage Reference Circuits
Contemporary and Nascent Techniques for Monitoring of Oxygenation as a Vital Sign
A baseband transceiver for multi-mode and multi-band SoC
Advanced space power technology
Reduced-latency architecture for image smoothing exponential filters
Enhanced vehicle classification via 3D geometries
VAWS: Vulnerability Analysis of Neural Networks using Weight Sensitivity
Challenges and Opportunities in Heterogenous Integration During Design and Process Co-Optimization
Secure public key hardware for IoT applications
Three dimensional robot path planning using a field programmable analog array
LED driver performance analysis for joint visible light communication and illumination
Integrated Potentiostat Design for Neurotransmitter Detection in Wireless Implants
Full CMOS Implementation of Bidirectional Associative Memory Neural Network with Analog Memristive Synapse
A 1µA bandgap-less programmable voltage regulator
A Comparison of Artificial Neural Network(ANN) and Support Vector Machine(SVM) Classifiers for Neural Seizure Detection
On-chip HBD sensor for nanoscale CMOS technology
A 100MS/s 9-bit Companding SAR ADC with On-Chip Input Driver in 65nm CMOS for Multi-Carrier Communications
A Hardware-friendly Quantization and Model Fine Tuning with STEBC for Object Detection
SP-SVPWM IP Core Design for DC-to-AC Conversion
Readout electronic system for particle tracking in secondary electron detectors
Hierarchy-Aware mapping of pipelined applications
Improving video-based resting heart rate estimation: A comparison of two methods
FPGA-based discrete ambiguity function for stochastic linear time-variant channels
Facial recognition employing Transform Domain Mutual Principal Component Analysis
Voltage mode OTA based KHN filter
On Adaptation of Cancelation Path Modeling Filter in Single-Channel Feedback-Type Adaptive Active Noise Control Systems
Analog CMOS-based resistive processing unit for deep neural network training
IIP2 requirements in 4G LTE handset receivers
Reproducibility and field emission characteristics of nanotips fabricated by local electron bombardment
Wideband LNA and multi-standard frequency synthesizer for reconfigurable radio
A microwatt front end and asynchronous ADC for sparse biopotential acquisition
Comparative study on deconvolution function dependencies of RTN/RDF effect estimation errors in analyzing sub-nm-scaled SRAM margins
Design of low power FPGA architecture of image unit for space applications
Design and Optimization of Robust Process Monitors
Secure DS-CDMA spreading codes using fully digital multidimensional multiscroll chaos
Design of a Tunable Astrocyte Neuromorphic Circuitry with Adaptable Fault Tolerance
Optimization of CMOS Voltage Reference with Blended Distribution Estimation Based on Parameter Evolutionary Algorithms
Improving crosstalk resilience with wavelength spacing in photonic crossbar-based network-on-chip architectures
Depth image coding algorithm via the colorization based image coding
Physical design and implementation of POWER8™ (P8) server class processor
A variable step size affine projection algorithm based on the principle of orthogonality
Switched-Inductor Multiple-I/O Power Supplies: MOSFET Selection and Cross Conduction
Kuramoto Model with Hebbian Learning Mimics Spatial Correlations Causing an Optical Illusion
Synthesis and evaluation of SHA-1 algorithm using altera SDK for OpenCL
A low noise CMOS readout front end for MEMs BioPotential sensor applications
A 13.56MHz Wireless Power Transfer System with Dual-Output Regulated Active Rectifier for Implantable Medical Devices
A Fully-Configurable Digital Spiking Neuromorphic Hardware Design with Variable Quantization and Mixed Precision
FTAI: Frequency-based Trojan-Activity Identification Method for 3D Integrated Circuits
A robust calibration and supervised machine learning reliability framework for digitally-assisted self-healing RFICs
Sparse FIR Filter Design using Iterative MOCSA
Design of fractional notch filter with asymmetric slopes and large values of notch magnitude
A Comparison between Class-E DC-DC Design Methodologies for Wireless Power Transfer
Capacitive immunosensor for C-reactive protein quantification
Supervising Communication SoC for Secure Operation Using Machine Learning
Review on Event-Driven Wake-Up Sensors for Ultra-Low Power Time-Domain Design
A Pre-Skewed Bi-Directional Gated Delay Line Bang-Bang Frequency Detector with Applications in 10 Gbps Serial Link Frequency-Locking
Supervisory Circuits for Low-Frequency Monitoring of a Communication SoC
A highly sensitive RF-to-DC power converter with an extended dynamic range
Low Power Approximate Multipliers With Truncated Carry Propagation for LSBs
Implementation of LMS Adaptive Filter Algorithm based on FPGA
Denoising Method for NMR Signals Based on Two Domain Sparse Representation
Fractional-Order LC α L Filter-Based Grid Connected PV Systems
Design of an NFC enabled bio-patch solution
Audio-visual Speaker Diarization: Improved Voice Activity Detection with CNN based Feature Extraction
Wheeled Mobile Robot Modeling for Local Navigation Using System Identification
Implementation of high performance Readout Integrated Circuit
A energy-efficient high speed segmented prequantize and bypass DAC for SAR ADCs
Sub-threshold Current Conveyer for Current-Mode Processing Bio-Analog Front Ends
Analog Re-Use in Mixed Signal Circuits via Analog Time Encoding in Shared Die Tapeouts
A 2-A 6-MHz Hysteretic Buck Converter with an 8-Bit Digital Jitter-Insensitive Frequency Correction Loop using Dual-Sided Hysteretic Band Modulation
10 μW converter for energy harvesting from sedimentary microbial fuel cells
Advancing the state-of-the-art in hardware Trojans design
Power Reduction of Montgomery Multiplication Architectures Using Clock Gating
Efficient AES-GCM for VPNs using FPGAs
Blocker tolerant wideband continuous time sigma-delta modulator for wireless applications
All-digital phased-locked loop with local passive interpolation time-to-digital converter based on a tristate inverter
A Low-Memory Compressive Image Sensor Architecture for Embedded Object Recognition
High-ISO image de-noising using burst filtering
Polynomial Filters with Controllable Overshoot In Their Step Transient Responses
A 6.4 Gb/s data lane design for forwarded clock receiver in 65nm CMOS
A 126.9-132.4GHz wide-locking low-power frequency-quadrupled phase-locked loop in 130nm SiGe BiCMOS
Automated IC Design Flow Using Open-Source Tools and 180 nm PDK
Maximizing output power from solar cells/panels through the development of an integrated voltage regulator/MPPT circuit
Future directions for GaN in 5G and satellite communications
FpSynt: A fixed-point datapath synthesis tool for embedded systems
Contactless detection of faulty TSV in 3D IC via capacitive coupling
Input-aware statistical timing analysis for VLSI delay test and average design
Elementary function approximation using optimized most significant bits of Chebyshev coefficients and truncated multipliers
Mobile ultrasonic signal processing system using Android smartphone
Building Hardware Security Primitives Using Scan-based Design-for-Testability
An In-Situ Sliding Window Approximate Inner-Product Scheme Based on Parallel Distributed Arithmetic for Ultra-Low Power Fault-Tolerant Applications
Behavior Analysis of the Binary Hyperbolic Tangent (Btanh) Algorithm
A bipolar output voltage pulse transformer boost converter with charge pump assisted shunt regulator for thermoelectric energy harvesting
Characterization and model validation of triboelectric nanogenerators using Verilog-A
Embedded FFT hardware algorithm development using automated bi-dimensional scalable folding
Dynamic threshold compensated, low voltage CMOS energy harvesting rectifier for UHF applications
A synchronous LED driver with dynamic level-shifting and simultaneous peak & valley current sensing for high-brightness lighting applications
A low-power 10MHz bandwidth continuous-time ΣΔ ADC with Gm-C filter
Surface-based morphometric analysis of hippocampal subfields in mild cognitive impairment and Alzheimer's disease
A 4 th -Order Programmable Channel Selection Filter for Acoustic and Ultrasonic Applications
A preliminary study of the Coherent Phase Synchronous Oscillator (CPSO) for Phase-Locked Loop (PLL) applications
A PYNQ Evaluation Platform for FPGA Architectures of the Line Hough Transform
Distributed Estimation via Opinion Dynamics
Performance Evaluation of Entropy Based LBP for Face Recognition
A 9-bit 123-MS/s swiched-current pipelined ADC with OP feedback and offset current cancellation
Modified Corrector-Comb-Based Decimator with Improved Passband and Aliasing Rejection
Very High Brightness, High Resolution CMOS Driving Circuit for Microdisplay in Augmented Reality
A Memristive Circuit for Gait Pattern Classification Based on Self-Organized Axon Growth
Allocating Gate Reliability for Circuit Reliability Optimization
Simulatenous glucose sensing and powering of glucometer
Sleep Convention Logic using partially slept function blocks
A novel approximated solution for the Van der Pol oscillator. Application to pulsed oscillations modeling in switched cross-coupled MOS oscillators
A High Linearity ADC Front-End Circuit for Single-Ended Inputs
Power-rail ESD clamp circuit with embedded-trigger SCR device in a 65-nm CMOS process
Flexible Textile Based Electrooculogram Wearable Eye Tracking System for Human-Machine Interface
FPGA-based network-resonance applebaum adaptive arrays for directional spectrum sensing
Extraction of geometrical corners of buildings for infrared imaging sequence
An Efficient Implementation of Radix-4 Integer Division Using Scaling
Digitally Assisted High-Voltage High-Current CMOS Active Rectifier for Implantable Devices
Improved non-restoring division algorithm with dual path calculation
Outage performance analysis of basic receive diversity combining schemes in Nakagami-0.5 fading channel
A Comparative Study of Dynamic Comparators in Low-Voltage SAR ADC
Contributions of Graham Jullien and William Miller to Residue Number System Arithmetic Technology
Fully Analog Baseline Wander Elimination Circuit For Real-Time Ambulatory ECG Recording
Carrier Frequency Offset estimation in the Presence of I/Q Mismatch for Wideband OFDM systems
Generation and distribution of microwave signals by using optoelectronic oscillators
Modeling and Application for Negative-Differential-Conductance Devices with Single-Electron Technology
Unsupervised neuron selection for mitigating catastrophic forgetting in neural networks
CMOS Power-Amplifier Design Perspectives for 6G Wireless Communications
A Low-Power Double-Tail fT-Doubler Comparator in 65-nm CMOS
Square-Wave Modulated Damping in Transimpedance Amplifiers
Behavior profiling of power distribution networks for runtime hardware trojan detection
Memcapacitor based CMOS neural amplifier
A System On Chip design for fast time domain impedance spectroscopy
Accelerating Deterministic and Stochastic Binarized Neural Networks on FPGAs Using OpenCL
DOA estimation and tracking for signals with known waveform via symmetric sparse subarrays
Statistical timing-yield driven scheduling and FU binding in latch-based datapath synthesis
Modified comb nonrecursive structure
Leakage Current Compensation in Large Number of Inactive Synapses in a 130nm CMOS Process
Brain tumor grade classification Using LSTM Neural Networks with Domain Pre-Transforms
QuickNN: Python Toolbox for Training and Optimizing ANN for Hardware Implementation
A study on the phase noise performance of coupled spin torque oscillators
A simple procedure to synthesize input and output matching networks with short stub for class F -1 PAs
Distributed Energy Harvesting and Power Management Units for Self-Powered In-Fabric Sensing Networks
A 10-bit 400 MS/s asynchronous SAR ADC using dual-DAC architecture for speed enhancement
Ventricular Arrhythmia Prediction 3-Hours Ahead of Onset for Long-Term ECG Monitoring
A Novel Defuzzification Method for Type-II Fuzzy Set
CMOS Adaptive Optical Wireless Receiver for Ultra-Low-Power IoT Applications
Single-frame super-resolution using superpixel based dictionary
Convolutional Neural Network-based Model for Lung Sounds Classification
Analysis of Parasitics on CMOS based Memristor Crossbar Array for Neuromorphic Systems
Gain-boosted Complementary Dynamic Residue Amplifier for a 160 MS/s 61 dB SNDR Noise-Shaping SAR ADC
An OTA-C filter in SOI CMOS for UWB application
High-speed multiplierless Frequency Response Masking (FRM) FIR filters with reduced usage of hardware resources
10-GHz current-mode 1 st - and 2 nd -order allpass filters on 130nm CMOS
Pulsed Power Network with Scalable Operating Procedure Based on Potential Gradient
A superscalar processor for a medium-grain reconfigurable hardware
Design and Analysis of Energy Efficient Reversible Logic based Full Adder
Tradeoffs between settling time and jitter in phase locked loops
Semantic Feature Discovery of Trojan Malware using Vector Space Kernels
Inverter using loosely coupled inductors for wireless power transfer
Simulation of switching circuits using transfer functions
A Comparative Analysis of Neuromorphic Neuron Circuits for Enhanced Power Efficiency and Spiking Frequency in 22nm CMOS Technology
A hybrid voltage-mode hysteretic boost converter with high efficiency across a wide load range
Analysis and design based on small-signal equivalent circuit for a lO-GHz ring VCO with 65-nm CMOS
A low-power 28 Gb/s CDR using artificial lc transmission line technique in 65 nm CMOS
Design of a capacitance sensor in 0.18um CMOS technology for biomedical application
Analysis of Package Impedance Effects on the Linearity of Source Series Terminated DACs
Compact and voltage-scalable sensor for accurate thermal sensing in dynamic thermal management
Critical analysis of cut-insertion theorem
Understanding and Comparing the Capabilities of On-Chip Voltage Sensors against Remote Power Attacks on FPGAs
A hardware obfuscation technique for manufacturing a secure 3D IC
A smart capsule for in-body pH and temperature continuous monitoring
Low power, high PVT variation tolerant central pattern generator design for a bio-hybrid micro robot
Pseudo-pseudo-differential circuits
Input-adaptive dual-output power management unit for energy harvesting devices
A 65nm ASIC based 256 NIST prime field ECC processor
Artifacts Removal Techniques for the European iEEG Dataset
A Divider-less Automatic Frequency Calibration for Millimeter-Wave Sub-Sampling Phase-Locked Loops
A multilayer crosstalk avoidance router using restricted maze grids
An Enhanced Visual-Inertial Navigation System Based on Multi-State Constraint Kalman Filter
Bit Error Probability Analysis for OFDM-IM over Faded Shadowing Channel
A Cryogenic 12-bit 2MS/s SAR ADC for Deep Underground Neutrino Experiment (DUNE)
A 3dB NF 0.1-6.6GHz inductorless wideband low-noise amplifier in 0.13µm CMOS
Silicon-integrated electrostatic energy harvesters
Current voltage characteristics of Partially Depleted Silicon on Ferroelectric Insulator Field Effect Transistor (PD-SOFFET)
A Low-power Synthesizable Time-to-Digital Converter using Amplification to Overcome Mismatch
A switched-capacitor voltage regulator for ultra-low power energy harvesting systems
Performance evaluation of FinFET pass-transistor full adders with BSIM-CMG model
Modeling and dynamic cancellation of TX-RX leakage in FDD transceivers
On Low-Leakage CMOS Switches
A 5.2 GHz RF Energy Harvester System Using Reconfigurable Parallel Rectenna
Hierarchical Cluster-Based Cooperative Spectrum Sensing in Cognitive Radio Networks Using Adaptive Threshold
High-speed Sparse Ising Model on FPGA
A very low power 7.9 bit MEMS pressure sensor suitable for batteryless RFID applications
A Novel 22.7 ppm/ 0 C Voltage mode Sub-Bandgap Reference with robust startup nature
High Gain High Efficiency Doherty Amplifiers with Optimized Driver Stages
Realization of All-Optical Sequential circuit using Mach Zehnder Interferometer
Novel 3D Monotonic Characterization of Standard Cell Liberty File Attributes w.r.t ASIC Tool Flow
Technique for frequency transfer over packet networks
Offset compensation in a track and hold circuit
Hardware Trojans in asynchronous FIFO-buffers: From clock domain crossing perspective
Improving alias rejection in comb decimation filters for odd decimation factors
A 0.5V, 5.7ppm/°C Voltage Reference with Subthreshold MOSFET and Piecewise Compensation
A Ling-Enhanced Adder for IEEE-compliant Floating-Point Multiplication
A Comprehensive Nodal/Branch Circuit Analysis Including Fixator-Norator Pairs in Analog Circuits
Internet of Things in computer engineering curricula: Just do it!