yusuke1997/dblp-id-title huggingface dataset:
Self-Forensics Through Case Studies of Small-to-Medium Software Systems
Network Flow Security Baselining
IT-Incidents Management & IT-Forensics - IMF 2007, Conference Proceedings, September 11-13, 2007, Stuttgart, Germany
Introducing Anti-Forensics to SQLite Corpora and Tool Testing
Selective Imaging Revisited
A Case Study on Constructing a Security Event Management System
The Contribution of Tool Testing to the Challenge of Responding to an IT Adversary (Keynote)
Recovery of SQLite Data Using Expired Indexes
Using Observations of Invariant Behaviour to Detect Malicious Agency in Distributed Environments
Incident Response and the Role of External Services (Invited Speech)
IMF 2009, Fifth International Conference on IT Security Incident Management and IT Forensics, Stuttgart, Germany, 15-17 September 2009
mvHash-B - A New Approach for Similarity Preserving Hashing
Information Security Incident Management: Identified Practice in Large Organizations
Automated Resolving of Security Incidents as a Key Mechanism to Fight Massive Infections of Malicious Software
IT-Incidents Management & IT-Forensics - IMF 2006, Conference Proceedings, October, 18th-19th, 2006, Stuttgart
Smart Home Definition and Security Threats
Conception of a Master Course for IT and Media Forensics Part II: Android Forensics
Proposal of a System for Computer-Based Case and Evidence
IT-Incidents Management & IT-Forensics - IMF 2008, Conference Proceedings, September 23-25, 2008, Mannheim, Germany
Live Forensic Acquisition as Alternative to Traditional Forensic Process
Security Aspects of Piecewise Hashing in Computer Forensics
Botnet Statistical Analysis Tool for Limited Resource Computer Emergency Response Team
Forensic Application-Fingerprinting Based on File System Metadata
Visualizing Indicators of Rootkit Infections in Memory Forensics
Forewarned is Forearmed: Indicators for Evaluating Information Security Incident Management
Identifying a Shared Mental Model Among Incident Responders
A Common Process Model for Incident Response and Computer Forensics
Ninth International Conference on IT Security Incident Management & IT Forensics, IMF 2015, Magdeburg, Germany, May 18-20, 2015
What is Essential Data in Digital Forensic Analysis?
Statistical Pattern Recognition Based Content Analysis on Encrypted Network: Traffic for the TeamViewer Application
The Humming Hum: Background Noise as a Carrier of ENF Artifacts in Mobile Device Audio Recordings
Reconstructing People's Lives: A Case Study in Teaching Forensic Computing
Experiences with the NoAH Honeynet Testbed to Detect new Internet Worms
The Security Landscape in a Converged IP World
A Forensic Computing Framework to Fit Any Legal System
Network Forensics of Partial SSL/TLS Encrypted Traffic Classification Using Clustering Algorithms
An energy-efficient custom architecture for the SKA1-low central signal processor
CMH: compression management for improving capacity in the hybrid memory cube
Quantum system architecture for utility scale: Keynote
Optimal On-Line Computation of Stack Distances for MIN and OPT
High performance two-dimensional phase unwrapping on GPUs
Balancing clustering-induced stalls to improve performance in clustered processors
Micro BTB: a high performance and storage efficient last-level branch target buffer for servers
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Platform-independent methodology for partial reconfiguration
How Much is Performance Worth to Users?
Interval-based models for run-time DVFS orchestration in superscalar processors
Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010
Ultra-compact binary neural networks for human activity recognition on RISC-V processors
An area and power efficient on-the-fly LBCS transformation for implantable neuronal signal acquisition systems
Computing Efficiency Improvement for Multi-PEA CGRA with Built-in Control Design
Work in Progress: New Seed Set Selection Method of the Scalable Method for Constructing Phylogenetic Trees
Combining deblurring and denoising for handheld HDR imaging in low light conditions
Automated power gating methodology for dataflow-based reconfigurable systems
A hierachical configuration system for a massively parallel neural hardware platform
B 2 L: a case for buffered and bufferless hybrid NoCs
Vulnerability analysis of Android auto infotainment apps
A study of the effects of machine geometry and mapping on distributed transpose performance
Reliability assessment in embryonics inspired by fault-tolerant quantum computation
Power and performance optimization of voltage/frequency island-based networks-on-chip using reconfigurable synchronous/bi-synchronous FIFOs
Augmenting cache partitioning with thread-aware insertion/promotion policies to manage shared caches
Quantum splines for non-linear approximations
An efficient fault tolerant cloud market mechanism for profit maximization
From Exploit Prediction in the Wild to System-Specific Cyber Security Risk Metrics: Work in Progress
EVOLVE: HPC and cloud enhanced testbed for extracting value from large-scale diverse data
Exposing parallelism and locality in a runtime parallel optimization framework
Proceedings of the First Conference on Computing Frontiers, 2004, Ischia, Italy, April 14-16, 2004
Relational Wide Column Store: a new Big Data paradigm
Hardware support for address mapping in PGAS languages: a UPC case study
Fractal Ledger: A New Approach towards Scalable Blockchain with Graph-Chain Structure
HamPerf: A Hamiltonian-Oriented Approach to Quantum Benchmarking
Repairing return address stack for buffer overflow protection
Improving public datasets markings' quality using unsupervised refinement kernels
Memory efficient parallel matrix multiplication operation for irregular problems
LEGaTO: towards energy-efficient, secure, fault-tolerant toolset for heterogeneous computing
Adaptive entropy coding method for stream-based lossless data compression
Performance and power evaluation of an in-line accelerator
Evaluation of the field-programmable cache: performance and energy consumption
Reuse distance based performance modeling and workload mapping
Scalable Flow Simulations with the Lattice Boltzmann Method
BarrierWatch: characterizing multithreaded workloads across and within program-defined epochs
SIMD support to improve eclipse OpenJ9 performance on the AArch64 platform
Semi-supervised anomaly detection on a Tier-0 HPC system
Scalable simulation of complex network routing policies
Chameleon: a data organization transformation scheme for big data systems
Computational and storage power optimizations for the O-GEHL branch predictor
AraOS: Analyzing the Impact of Virtual Memory Management on Vector Unit Performance
REMPRO: Reconfigurable Modular Processor
"Empty space" computes: the evolution of an unconventional supercomputer
Addressing the challenges of future large-scale many-core architectures
Brain-Inspired Memory Architecture for Sparse Nonlocal and Unstructured Workloads
Fast, efficient, recovering, and irreversible
Position-aware thread-level speculative parallelization for large-scale chip-multiprocessor
Proceedings of the 22nd ACM International Conference on Computing Frontiers: Workshops and Special Sessions, CF 2025, Cagliari, Italy, May 28-30, 2025
First Exascale Flow Simulations of Fission and Fusion Energy Systems
Improving branch prediction accuracy with parallel conservative correctors
Proceedings of the 2008 Workshop on Radiation Effects and Fault Tolerance in Nanometer Technologies, WREFT '08, Ischia, Italy, May 5-7, 2008
Task-parallel Runtime System Optimization Using Static Compiler Analysis
Accelerating memory decryption and authentication with frequent value prediction
Data mining the memory access stream to detect anomalous application behavior
Programmer-directed partial redundancy for resilient HPC
Moving computations from run-time to compile-time: hyper-metaprogramming in practice
Contextual information management using contract: based workflow
Profiling of symmetric-encryption algorithms for a novel biomedical-implant architecture
An information-interconnectivity-based retrieval method for network attached storage
PEACH: a model for performance and energy aware cooperative hybrid computing
Software durability (is software engineering sustainable?)
Dynamic techniques to reduce memory traffic in embedded systems
New applications of quantum algorithms to computer graphics: the quantum random sample consensus algorithm
Learning-based indoor localization for industrial applications
A neuro-fuzzy fan speed controller for dynamic thermal management of multi-core processors
A runtime-adaptive cognitive IoT node for healthcare monitoring
Network stacking considered harmful
The D.A.V.I.D.E. big-data-powered fine-grain power and performance monitoring support
System management software for virtual environments
RCecker: a lightweight rule-based mechanism for backward control-flow integrity
A Novel Robust Core for Detecting Node Failures in FPGA Clusters
ScaffCC: a framework for compilation and analysis of quantum computing programs
BLP: Block-Level Pipelining for GPUs
Accelerating advanced mri reconstructions on gpus
Towards resilient EU HPC systems: a blueprint
Orchestra: adaptively accelerating distributed deep learning in heterogeneous environments
Assessing the Robustness of Real-Time Operating System on Soft Processor against Multiple Bit Upset
Patient-centered cross-enterprise document sharing and dynamic consent framework using consortium blockchain and ciphertext-policy attribute-based encryption
Self organization on a swarm computing fabric: a new way to look at fault tolerance
Taming irregular applications via advanced dynamic parallelism on GPUs
Reversible computation with quantum-dot cellular automata (QCA)
Replication-Based Quantum Annealing Error Mitigation
An intra-task dvfs technique based on statistical analysis of hardware events
Mitigating Cross-Domain SEU Corruption in FPGA-Based AI Accelerators for Space Applications: Invited Paper
Mapping the LU decomposition on a many-core architecture: challenges and solutions
Simple penalty-sensitive replacement policies for caches
Effective HPC Programming via Domain-Specific Abstractions and Compilation
Approximate loop unrolling
SGXKernel: A Library Operating System Optimized for Intel SGX
Reconfigurable hybrid interconnection for static and dynamic scientific applications
Improving the performance of k-means clustering through computation skipping and data locality optimizations
Flexible associativity for DRAM caches
Credit-based dynamic reliability management using online wearout detection
Proceedings of the 21st ACM International Conference on Computing Frontiers, CF 2024, Ischia, Italy, May 7-9, 2024
POSTER: AI-Powered Anomaly Detection for Satellite Telemetry
Skewed caches from a low-power perspective
A first glance at Kilo-instruction based multiprocessors
TaPEr: tackling power emergencies in the dark silicon era by exploiting resource scalability
Combining compiler and runtime IPC predictions to reduce energy in next generation architectures
Efficient architecture design for the AES-128 algorithm on embedded systems
Architectural support of multiple hypervisors over single platform for enhancing cloud computing security
Database hash-join algorithms on multithreaded computer architectures
A significance-driven programming framework for energy-constrained approximate computing
Data access optimization in a processing-in-memory system
MPSoC ECG biochip: a multiprocessor system-on-chip for real-time human heart monitoring and analysis
Energy and Performance Improvements for Convolutional Accelerators Using Lightweight Address Translation Support
CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17 - 22, 2022
Characterizing the performance penalties induced by irregular code using pointer structures and indirection arrays on the intel core 2 architecture
muRISCV-NN: Challenging Zve32x Autovectorization with TinyML Inference Library for RISC-V Vector Extension
CF '21: Computing Frontiers Conference, Virtual Event, Italy, May 11-13, 2021
An Ensemble Model for Diabetes Diagnosis in Large-scale and Imbalanced Dataset
G2A2: Graph Generator with Attributes and Anomalies
MOCL: an efficient openCL implementation for the matrix-2000 architecture
Enabling Software Technologies for Critical COTS-based Spacecraft Systems
Ghost loads: what is the cost of invisible speculation?
PGAS for graph analytics: can one sided communications break the scalability barrier?
Towards greener data centers with storage class memory: minimizing idle power waste through coarse-grain management in fine-grain scale
Current and future research directions in embedded systems: a european perspective
RFiof: an RF approach to I/O-pin and memory controller scalability for off-chip memories
FLEXDP: flexible frequency scaling for energy-delay product optimization of GPU applications
Tile size selection for low-power tile-based architectures
QUENN: QUantization engine for low-power neural networks
ISA mapper: a compute and hardware agnostic deep learning compiler
Deep reinforcement learning empowered multiple UAVs-assisted caching and offloading optimization in D2D wireless networks
Towards a performance-portable FFT library for heterogeneous computing
Fast compiler optimisation evaluation using code-feature based performance prediction
A high-speed AES architecture implementation
Feature-based device selection in heterogeneous computing systems
Quadrilatero: A RISC-V programmable matrix coprocessor for low-power edge applications
A practical framework for real-time diffusion analysis in social media
Noise-adaptive quantum compilation strategies evaluated with application-motivated benchmarks
Efficient and scalable barrier synchronization for many-core CMPs
Scalable topological data analysis for life science applications
A unified evaluation framework for coarse grained reconfigurable array architectures
Predictable performance in SMT processors
Dynamic testing of legacy code resources on the grid
Towards more intelligent adaptive video game agents: a computational intelligence perspective
Data Analytics with NVLink: An SpMV Case Study
Network-on-chip evaluation for a novel neural architecture
Rematerialization-based register allocation through reverse computing
Performance/area efficiency in chip multiprocessors with micro-caches
Design of S-boxes Defined with Cellular Automata Rules
Trace construction using enhanced performance monitoring
Anomaly detection to improve security of big data analytics
Towards automatic program partitioning
Iterative machine learning (IterML) for effective parameter pruning and tuning in accelerators
Reliable hardware architectures for efficient secure hash functions ECHO and fugue
SuperCode: Sustainability PER AI-driven Co-design: Invited Paper
Software-defined massive multicore networking via freespace optical interconnect
An evolutionary framework for automatic and guided discovery of algorithms
Opportunities and challenges in application-tuned circuits and architectures based on nanodevices
Energy efficient biomolecular simulations with FPGA-based reconfigurable computing
DPA on hardware implementations of Ascon and Keyak
Scalable dht-based information service for large-scale grids
DTT: program structure-aware indirect branch optimization via direct-TPC-table in DBT system
Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution
Elastic pipeline: addressing GPU on-chip shared memory bank conflicts
vRTLmod: An LLVM based Open-source Tool to Enable Fault Injection in Verilator RTL Simulations
Quantitative analysis of sequence alignment applications on multiprocessor architectures
Anytime instructions for programmable accuracy floating-point arithmetic
Hardware acceleration of complex machine learning models through modern high-level synthesis
True value: assessing and optimizing the cost of computing at the data center level
POP3: Advancing HPC Performance and Productivity: Invited Paper
BSArc: blacksmith streaming architecture for HPC accelerators
CRESTA: a software focussed approach to exascale co-design
An active data-aware cache consistency protocol for highly-scalable data-shipping DBMS architectures
Democratization of Computing Innovation via a CHIPS-enabled Renaissance in Co-design
MaX - Materials design at the exascale - a EuroHPC Centre of Excellence: Recent selected results: Invited Paper
Optimization strategies for a java virtual machine interpreter on the cell broadband engine
Topology-aware tile mapping for clusters of SMPs
BONSEYES: Platform for Open Development of Systems of Artificial Intelligence: Invited paper
Towards chip-on-chip neuroscience: fast mining of neuronal spike streams using graphics hardware
SAT-MapIt: An Open Source Modulo Scheduling Mapper for Coarse Grain Reconfigurable Architectures
Attention: moving target defense networks, how well are you moving?
Knowledge-based generic intelligent network model
A nano-scale reconfigurable mesh with spin waves
Multi-Tree Network Protocol Enabling System Partitioning for Shape-Changeable Computer System
Scalable K-Nearest Neighbors Implementation using Distributed Embedded Systems
TERAFLUX: exploiting dataflow parallelism in teradevices
Reducing traffic generated by conflict misses in caches
Power modeling on FPGA: a neural model for RT-level power estimation
POSTER: Performance Portability in GPU-Accelerated Spectral Finite Element Fluid Simulations: A Cross-layer Exploration Approach
Fast packet forwarding engine based on software circuits
BandArb: mitigating the effects of thermal and process variations in silicon-photonic network
Adaptive and polymorphic VLIW processor to optimize fault tolerance, energy consumption, and performance
The Legio Fault Resilience Framework: Design and Rationale
Parameterized micro-benchmarking: an auto-tuning approach for complex applications
Application-based early performance evaluation of SGI altix 4700 systems for SGI systems
Heterogeneous energy-efficient cache design in warehouse scale computers
Compiler-directed frequency and voltage scaling for a multiple clock domain microarchitecture
A control-structure splitting optimization for GPGPU
Magic state injection on the rotated surface code
Integrating SystemC-AMS Power Modeling with a RISC-V ISS for Virtual Prototyping of Battery-operated Embedded Devices
Instruction folding in a hardware-translation based java virtual machine
EXACT: explicit dynamic-branch prediction with active updates
Quality Optimization of Resilient Applications under Temperature Constraints
FractalSync: Lightweight Scalable Global Synchronization of Massive Bulk Synchronous Parallel AI Accelerators
Using a hybrid CA based model for a flexible qualitative qubit simulation: fully frustrated josephson junction ladder (JJL) application
Logic Gate Network Inference Acceleration with RISC-V Custom Instruction Set
Memory-miser: a performance-constrained runtime system for power-scalable clusters
TFluxSCC: a case study for exploiting performance in future many-core systems
Verified instruction-level energy consumption measurement for NVIDIA GPUs
Mapping design patterns to cloud patterns to support application portability: a preliminary study
HiLSM: an LSM-based key-value store for hybrid NVM-SSD storage systems
Exploiting temporal locality in drowsy cache policies
Implementation and Performance Evaluation of Bit Manipulation Extension on CVA6 RISC-V
Exploring the potential of context-aware dynamic CPU undervolting
Multiple stream tracker: a new hardware stride prefetcher
Quantifying software vulnerability
An hybrid approach to accelerate a molecular docking application for virtual screening in heterogeneous nodes: POSTER
Towards Fast and Scalable Private Inference
A prefetch-aware memory system for data access patterns in multimedia applications
Using managed communication channels in software components
Spatially fine-grained air quality prediction based on DBU-LSTM
Enhancing Practicality of Memory Compression for GPUs with High-Throughput Simplifications
Quantum computer simulation on HPC
FlexSEE: a Flexible Secure Execution Environment for protecting data-in-use
Thundershot: an open-source autonomous vehicles research platform for embedded heterogeneous MPSoCs
DP 2 : reducing transaction overhead with differential and dual persistency in persistent memory
Hybrid high-performance low-power and ultra-low energy reliable caches
The FitOptiVis ECSEL project: highly efficient distributed embedded image/video processing in cyber-physical systems
Owl: next generation system monitoring
TIGER: topology-aware task assignment approach using ising machines
Matrix register file and extended subwords: two techniques for embedded media processors
Finding the Critical Sampling of Big Datasets
Forest fire detection using spiking neural networks
Two-state, reversible, universal cellular automata in three dimensions
RV-GEMM: Neural Network Inference Acceleration with Near-Memory GEMM Instructions on RISC-V
Speculative supplier identification for reducing power of interconnects in snoopy cache coherence protocols
Low-power appliances for big-data analytics using flash storage and hardware accelerators
Byzantine fault tolerance for centrally coordinated missions with unmanned vehicles
European processor initiative: the industrial cornerstone of EuroHPC for exascale era
Implementing quantum genetic algorithms: a solution based on Grover's algorithm
Automatic instrumentation of dataflow applications using PAPI
Power consumption and reduction in a real, commercial multimedia core
POSTER: V-Seek: Optimizing LLM Reasoning on A Server-Class General-Purpose RISC-V Platform
CoreSymphony architecture
DistSim: A performance model of large-scale hybrid distributed DNN training
Watson-Crick automata and PCFAS with two components: a computational power analogy
Exploring the Performance Limits of Out-of-order Commit
Vectorization of Hybrid Breadth First Search on the Intel Xeon Phi
Hardware Assist for Linux IPC on an FPGA Platform
Quantum computing: a scalable, systems approach
Disease gene identification by walking on multilayer heterogeneous networks
Massively parallel processing on a chip
Scaling up performance of fat nodes for HPC
A computing architecture for physics
Multi-terabit ip lookup using parallel bidirectional pipelines
Concurrent hybrid switching for massively parallel systems-on-chip: the CYBER architecture
Similarity based classification of ADHD using singular value decomposition
Towards building an analytics platform in the cloud
DYCE: A Resilient Shared Memory Paradigm for Heterogenous Distributed Systems without Memory Coherence
Implementation and integration of NTT/INTT accelerator on RISC-V for CRYSTALS-Kyber
Management of container-based genetic algorithm workloads over cloud infrastructure
Enhancing the Robustness of System on FPGA by Routing Isolation
GGPA: A General Graph Processing Architecture with Flexible Execution Paradigm
Scaling up next generation supercomputers
A multi-mode video-stream processor with cyclically reconfigurable architecture
Scheduling for heterogeneous processors in server systems
Cooperative repair based on tree structure for multiple failures in distributed storage systems with regenerating codes
Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chip
Cost-effective medical image reconstruction: from clusters to graphics processing units
Performance optimization by dynamic code transformation
ELDORADO
Getting ready for approximate computing: trading parallelism for accuracy for DSS workloads
On the energy-efficiency of speculative hardware
Relaxed Threshold Implementations
Towards neural architecture-aware exploration of compiler optimizations in a deep learning {graph} compiler
Computing Frontiers Conference, CF'13, Ischia, Italy, May 14 - 16, 2013
The digital divide of computing
Cluster-based topologies for 3D stacked architectures
A runtime system for finite element methods in a partitioned global address space
Seeing Beyond the Order: a LEN5 to Sharpen Edge Microprocessors with Dynamic Scheduling
The limits of software transactional memory (STM): dissecting Haskell STM applications on a many-core environment