yusuke1997/dblp-id-title huggingface dataset:
System-Level, Unified In-band and Out-of-band Dynamic Thermal Control
Multiple Stream Execution on the DART Processor
FAST: A Low-Complexity Algorithm for Efficient Scheduling of DAGs on Parallel Processors
Activity Counter: New Optimization for the Dynamic Scheduling of SIMD Control Flow
An AND-OR Parallel Execution System for Logic Program Evaluation
Efficient Algorithms for Traffic Grooming in SONET/WDM Networks
Exploiting Subgraph Similarities for Efficient Auto-tuning of Tensor Programs
Cloud Fog: Towards High Quality of Experience in Cloud Gaming
Solving Positive Definite Linear Systems on Vector Computers
Debugging Distributed Executions by Using Language Recognition
A Distributed Unification Scheme for Systolic Logic Programs
Random Routing of Tasks in Hypercube Architectures
Parallel Updates of Graph Properties in Logarithmic Time
Characterization and Measurement of Parallelism in Communications Protocol Software
PLP: Protecting Location Privacy Against Correlation-Analysis Attack in Crowdsensing
DRAM Cache Management with Request Granularity for NAND-based SSDs
Object Placement in Parallel Tape Storage Systems
Inorder Skew: A Skewing Scheme for Parallel Tree Memories
Constructing Battery-Aware Virtual Backbones in Sensor Networks
Integer Number Crunching on the Cell Processor
A DFA with Extended Character-Set for Fast Deep Packet Inspection
Adaptive Learning for Concept Drift in Application Performance Modeling
Extremely Low-bit Convolution Optimization for Quantized Neural Network on Modern Computer Architectures
KYKLOS : A Linear Growth Fault-Tolerant Interconnection Network
Graceful Degradation of Fault Tolerant Multistage Interconnection Networks
Comparing the Performance of the DASH and CEDAR Multiprocessors
Register Versioning: A Low-Complexity Implementation of Register Renaming in Out-of-Order Microarchitectures
A Multi-Ring Transputer Network for the Arbitrary Rotation of Raster Images
An Analysis of Parallel Logic Simulation on Several Architectures
Data Prefetching and Data Forwarding in Shared Memory Multiprocessors
A Probabilistic Pipeline Algorithm for K-Selection on the Tree Machine
Viper: A High-Performance I/O Framework for Transparently Updating, Storing, and Transferring Deep Neural Network Models
OSP: Overlapping Computation and Communication in Parameter Server for Fast Machine Learning
System Architecture of a Reconfigurable Multimicroprocessor Research System
Communication Aspects of the Cube Connected Cycles
A Technique for Damping Exponential Behavior in Reactive Object Algorithms with Invalidation
Design and Evaluation of Scalable Switching Fabrics for High-Performance Routers
Hierarchical Bit-Map Directory Schemes on the RDT Interconnection Network for a Massively Parallel Processor JUMP-1
A New Mechanism for Congestion and Deadlock Resolution
Designing Parallel Algorithms from Regular Graphs and Semi-Regular Graphs
GNNDrive: Reducing Memory Contention and I/O Congestion for Disk-based GNN Training
Parallel Program Trace Extrapolation
Analyzing Multiple File Downloading in BitTorrent
A Highly Efficient Design for Reconfiguring the Processor Array in VLSI
Parameterized Schedulability Analysis on Uniform Multiprocessors
Predicting Execution Readiness of MPI Binaries with FEAM, a Framework for Efficient Application Migration
Coherence-Centric Logging and Recovery for Home-Based Software Distributed Shared Memory
Toward Harnessing DOACROSS Parallelism for Multi-GPGPUs
Dynamic Loop Scheduling for Share-Memory Multiprocessors
International Conference on Parallel Processing, ICPP'87, University Park, PA, USA, August 1987
A Novel Approach to Cache Block Reuse Predictions
General Analytic Models for the Performance Analysis of Unique and Redundant Path Interconnection Networks
Experience with a Portable Parallelizing Pascal Compiler
DB-SpGEMM: A Massively Distributed Block-Sparse Matrix-Matrix Multiplication for Linear-Scaling DFT Calculations
MPF: A Portable Message Passing Facility for Shared Memory Multiprocessors
OSP: Boosting Distributed Model Training with 2-stage Synchronization
Hippie: A Data-Paralleled Pipeline Approach to Improve Memory-Efficiency and Scalability for Large DNN Training
B-Log: A Branch and Bound Methodology for the Parallel Execution of Logic Programs
Symbiotic Scheduling for Shared Caches in Multi-core Systems Using Memory Footprint Signature
Probabilistic Best-Fit Multi-dimensional Range Query in Self-Organizing Cloud
Extensions to the C Programming Language for SIMD/MIMD Parallelism
On the Energy Complexity of Parallel Algorithms
NIC-Based Rate Control for Proportional Bandwidth Allocation in Myrinet Clusters
Decisive Path Scheduling: A New List Scheduling Method
Joint Optimization of DNN Partition and Scheduling for Mobile Cloud Computing
Load-Balanced Slim Fly Networks
Hardware Support for Extracting Coarse-Grain Speculative Parallelism in Distributed Shared-Memory Multiprocessors
A Best-Effort Communication Protocol for Real-Time Broadcast Networks
Compile-time Techniques for Processor Allocation in Macro Dataflow Graphs for Multiprocessors
Semi-Online Multi-Machine with Restart Scheduling for Integrated Edge and Cloud Computing Systems
Use of Perfect Hashing in a Paged Memory Management Unit
Slot-Based Multi-Access Protocol for Local Computer Network
Proceedings of the 1992 International Conference on Parallel Processing, University of Michigan, An Arbor, Michigan, USA, August 17-21, 1992. Volume II: Software
Parallel Graph Contraction with Applications to a Reconfigurable Parallel Architecture
On Balanced Synchronous Parallel Computers for AI
Efficient Inter-node MPI Communication Using GPUDirect RDMA for InfiniBand Clusters with NVIDIA GPUs
Quantitative Analysis on Caching Effect of I-Structure Data in Frame-Based Multithreaded Processing
Performance Evaluation of SIMD Processor Architectures Using Pairwise Multiplier Recoding
Runtime Parallel Incremental Scheduling of DAGs
Reducing PE/Memory Traffic in Shared Memory Multiprocessors by the Difference Coding of Addresses
A Parallel Associative Query Set of Algorithms (PASQ-set) and the MULTI-layer Associative Processor Model
Minimizing Data and Synchronization Costs in One-Way Communication
Efficiently Parallelizable Strassen-Based Multiplication of a Matrix by its Transpose
Coprocessor Parallel Architecture for Compilation
Fully-Static Rate-Optimal Scheduling of Iterative Data-Flow Programs via Optimum Unfolding
PREP: Predicting Job Runtime with Job Running Path on Supercomputers
BPA: A Fast Packet Scheduling Algorithm for Real-Time Switched Ethernet Networks
The Two-Dimensional Inverse Omega Network
An Integrated Processor Management Scheme for the Mesh-Connected Multicomputer Systems
Exploiting Partial Operand Knowledge
Compilation of a Functional Language for the Multithreaded Architecture: DAVRID
Mapping Task Trees onto a Linear Array
On the Complexity of Event Ordering for Shared-Memory Parallel Program Executions
Green Multicore-SoC Software-Execution Framework with Timely-Power-Gating Scheme
Solving Dynamic and Irregular Problems on SIMD Architectures with Runtime Support
Macro vs. Micro Dataflow: A Programming Example
DeInfer: A GPU resource allocation algorithm with spatial sharing for near-deterministic inferring tasks
Efficient Parallel Algorithms for String Comparison
Distributed Algorithms for Constructing a Depth-First-Search Tree
NumLock: Towards Optimal Multi-Granularity Locking in Hierarchies
Synchronization Barrier and Related Tools for Shared Memory Parallel Programming
Fast Approximate Subgraph Counting and Enumeration
A Backjumping Search Algorithm for a Distributed Memory Multicomputer
Design of Time-Optimal Hardware-Efficient Divide-and-Conquer Algorithms
Restructuring Programs for High-Speed Computers with Polaris
Fast Leiden Algorithm for Community Detection in Shared Memory Setting
ReSHAPE: A Framework for Dynamic Resizing and Scheduling of Homogeneous Applications in a Parallel Environment
The Distributed Real-Time Control System of a Tokamak Fusion Device
Tolerating Network Failures in System Area Networks
Routing and Diameter Analysis of Diagonal Mesh Networks
Location Consistency: Stepping Beyond the Memory Coherence Barrier
Proceedings of the 1996 International Conference on Parallel Processing Workshop, ICCPW 1996, Bloomingdale, IL, USA, August 12-16, 1996
Scheduling CPU-Intensive Grid Applications Using Partial Information
Path Compression in Forwarding-Based Reliable Mobile Agent Communications
Parallel Designs for Chinese Remainder Conversion
A One's Complement Cache Memory
Programming Regular Grid-Based Weather Simulation Models for Portable and Fast Execution
COMBFT: Conflicting-Order-Match based Byzantine Fault Tolerance Protocol with High Efficiency and Robustness
SEECHIP: A Scalable and Energy-Efficient Chiplet-based GPU Architecture Using Photonic Links
Distributed Object Replication Strategies for a Remote Caching Architecture
Embedding of Multidimensional Meshes on to Faulty Hypercubes
A VLSI-Based Multiprocessor Architecture for Implementing Parallel Algorithms
N-Code: An Optimal RAID-6 MDS Array Code for Load Balancing and High I/O Performance
Scalable Implementations of MPI Atomicity for Concurrent Overlapping I/O
Multiprogramming Performance Degradation: Case Study on a Shared Memory Multiprocesor
MPI-Vector-IO: Parallel I/O and Partitioning for Geospatial Vector Data
Session-Based Adaptive Overload Control for Secure Dynamic Web Applications
Microtasking Recursive, Parallel Programs
Contention Free Embedding of Complete Binary Trees into 3D Meshes in Half and Full-Duplexed Network Models
Function-Parallel Computation in a Data-Parallel Environment
U-Star: A Modular Indirect Star Network Based on (2 X 2) Switches
Producer-Push - A Protocol Enhancement to Page-Based Software Distributed Shared Memory Systems
Reconfiguration of Spanning Trees in Faulty Hypercubes
Implementing and Exploiting Inevitability in Software Transactional Memory
Parallelization of the EM Algorithm for 3D PET Image Reconstruction: Performance Estimation and Analysis
GraBi: Communication-Efficient and Workload-Balanced Partitioning for Bipartite Graphs
Parallel Order-Based Core Maintenance in Dynamic Graphs
Improving the Scaling of an Asynchronous Many-Task Runtime with a Lightweight Communication Engine
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
Exploring the Cost-Availability Tradeoff in P2P Storage Systems
Proceedings of the 53rd International Conference on Parallel Processing, ICPP 2024, Gotland, Sweden, August 12-15, 2024
A Distributed Architecture for the PEPSys Parallel Logic Programming System
Solving Matrix Problems with No Size Restriction on a Systolic Array Processor
An approximate analytical model for asynchronous processes in multiprocessors
Self-Routing and Route Balancing in Connection Networks
Incorporating Fault Tolerance in the Multiscalar Fine-Grain Parallel Processor
Efficient Algorithms for Estimating Atmosperic Parameters for Surface Reflectance Retrieval
Dynamic Load Sharing in the Presence of Information Obsolescence in Distributed Database Environments
A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication
Inter-Iteration Optimization of Parallel EM Algorithm on Message-Passing Multicomputers
Background Compensation and an Active-Camera Motion Tracking Algorithm
Descending Layers Routing: A Deadlock-Free Deterministic Routing using Virtual Channels in System Area Networks with Irregular Topologies
The Tracefile Testbed - A Community Repository for Identifying and Retrieving HPC Performance Data
Fault Tolerance Analysis of Rearrangeable Networks
A Runtime System for Autonomic Rescheduling of MPI Programs
On Performance, Efficiency of VLIW and Superscalar
Scan without a Glance: Towards Content-Free Crowd-Sourced Mobile Video Retrieval System
Performance Extrapolation of Parallel Programs
A Fine-Grain Bit-Parallel, Word-Parallel, Massively-Parallel Associative Processor
A Peer-to-Peer Replica Management Service for High-Throughput Grids
Machine Learning Models to Predict Performance of Computer System Design Alternatives
From Control Flow to Dataflow
Crystal: A Design-Time Resource Partitioning Method for Hybrid Main Memory
Improving MPI Multi-threaded RMA Communication Performance
The Complexity of FFT and Related Butterfly Algorithms on Meshes and Hypermeshes
Distributed Coordination Protocols to Realize Scalable Multimedia Streaming in Peer-to-Peer Overlay Networks
A Scalable, Cost-Effective, and Flexible Disk System Using High-Performance Embedded-Processors
Toward Optimal Repair and Load Balance in Locally Repairable Codes
Performance Penalty by Communication in Multiprocessor Systems
BEEP: Balanced Efficient subgraph Enumeration in Parallel
Computing k-vertex Connectivity on an Interval Graph
Sparse Data Representation for Dense Data-Parallel Computation
Bloom Filter Performance on Graphics Engines
Fine-grain Parallelism Using Multi-core, Cell/BE, and GPU Systems: Accelerating the Phylogenetic Likelihood Function
Bounds on the Size of Test Sets for Sorting and Related Networks
The KAP/S-1 : An Advanced Source-to-Source Vectorizer for the S-1 Mark IIa Supercomputer
Emulating Reconfigurable Arrays for Image Processing Using the MasPar Architecture
DICER: Diligent Cache Partitioning for Efficient Workload Consolidation
Performance Comparision of Two Multiprocessor B-Link Tree Implementations
Proceedings of the 51st International Conference on Parallel Processing, ICPP 2022, Bordeaux, France, 29 August 2022 - 1 September 2022
Evaluation of Loop Grouping Methods Based on Orthogonal Projection Spaces
Cachier: A Tool for Automatically Inserting CICO Annotations
Performance Evaluation of Memory Caches in Multiprocessors
Monte Carlo Neutron Transport on the Alliant FX/8
FAIR-BFL: Flexible and Incentive Redesign for Blockchain-based Federated Learning
An Efficient Deterministic Parallel Algorithm for Adaptive Multidimensional Numerical Integration on GPUs
Fast Spectral Graph Layout on Multicore Platforms
Checkpointing vs. Migration for Post-Petascale Supercomputers
A Scalable Optical Interconnection Network for Fine-Grain Parallel Architectures
Static Data Flow Simulation Study at Ames Research Center
Adaptive load-balancing algorithms using symmetric broadcast networks: performance study on an IBM SP2
HDNH: a read-efficient and write-optimized hashing scheme for hybrid DRAM-NVM memory
PAL: A Language for Parallel Asynchronous Computation
ICPP 2021: 50th International Conference on Parallel Processing, Lemont, IL, USA, August 9 - 12, 2021
Base-m n-cube: High Performance Interconnection Networks for Highly Parallel Computer PRODIGY
Achieving Fair or Differentiated Cache Sharing in Power-Constrained Chip Multiprocessors
Signal Graphs: A Model for Designing Concurrent Logic
Space and Time Efficient Parallel Algorithms and Software for EST Clustering
Embedding Large Binary Trees to Hypercube Multiprocessors
Computing the k-th Eigenvalue of Symmetric H2-Matrices
A Utility-Based Two Level Market Solution for Optimal Resource Allocation in Computational Grid
: A Parallel P-Code for Parallel Pascal and Other High Level Languages
A Database Machine for Very Large Relational Databases
Bridging the Gap Between Parallel File Systems and Local File Systems: A Case Study with PVFS
On the Viability of a Quantitative Model of System Reconfiguration Due to a Fault
A Parallel Programming Language Directed Towards Top-Down Software Development
RMD: A Resemblance and Mergence Based Approach for High Performance Deduplication
Improved Upper and Lower Time Bounds for Parallel Random Access Machines Without Simultaneous Writes
Coordinated Flows in a Formal Multi-Agent System Based on a Modal Algebra
Designing Large Hierarchical Multiprocessor Systems under Processor, Interconnection, and Packaging Advancements
A Reconfigurable Architecture for Digital Time Domain Beamforming
Optimal Granularity of Grid Iteration Problems
A Reputation-Based Mechanism for Dynamic Virtual Organization Formation in Grids
Optimal Parallel External Merging under Hardware Constraints
Maze Routing on a Hypercube Multiprocessor Computer
Fault Tolerant Based Embeddings of Quadtrees into Hypercubes
Coherence, Synchronization and State-sharing in Distributed Shared-memory Applications
Portable Parallel Programming Languages
VIRE: Active RFID-based Localization Using Virtual Reference Elimination
Perfectly Overlapped Sorting on a Linear Array
Mapping Divide-and-Conquer Algorithms to Parallel Architectures
Trace-Driven Simulations of Parallel and Distributed Algorithms in Multiprocessors
On the Impact of Widening Vector Registers on Sequence Alignment
Dynamic Parity Grouping for Improving Write Performance of RAID-5 Disk Arrays
Partitioning Job Structures for SW-Banyan Networks
On Overlapping Partitions
A Performance Debugger for a Language Supporting Data Distribution Primitives
On the Use of Term Rewriting for Performance Ooptimization of Legacy HPC Applications
Behavior of the Butterfly Parallel Processor in the Presence of Memory Hot Spots
Streaming Media Caching Algorithms for Transcoding Proxies
Virtual Subcubes and Job Migration in a Hypercube
A Performance Counter Based Workload Characterization on Blue Gene/P
Improving Priority Enforcement via Non-Work-Conserving Scheduling
Runtime Adaptive Task Inlining on Asynchronous Multitasking Runtime Systems
A Novel Algorithm for Buddy-Subcube Compaction in Hypercubes
LDPP: A Learned Directory Placement Policy in Distributed File Systems
Randomly Optimized Grid Graph for Low-Latency Interconnection Networks
Performance of the Direct Binary n-Cube Network for Multiprocessors
FedClassAvg: Local Representation Learning for Personalized Federated Learning on Heterogeneous Neural Networks
A Flexible Framework for Throttling-Enabled Multicore Management (TEMM)
Fast tree-based algorithms for DBSCAN for low-dimensional data on GPUs
CERES: Container-Based Elastic Resource Management System for Mixed Workloads
An Efficient Heuristic for Application-Specific Routing on Mesh Connected Multicomputers
AdaM: An Adaptive Fine-Grained Scheme for Distributed Metadata Management
An Analysis of Hashing on Parallel and Vector Computers
Increasing Processor Utilization During Parallel Computation Rundown
Refactoring and Optimizing WRF Model on Sunway TaihuLight
Parallel Phase Model: A Programming Model for High-end Parallel Machines with Manycores
Parallelizing Programs with Recursive Data Structures
Complexity Analysis and Performance Evaluation of Matrix Product on Multicore Architectures
Depth First Search and Location Based Localized Routing and QoS Routing in Wireless Networks
Optimizing Distributed Data Structures using Application-Specific Network Interface Software
Coupling Right-Provisioned Cold Storage Data Centers with Deduplication
Energy-Efficient Scheduling Algorithms of Object Retrieval on Indexed Parallel Broadcast Channels
The Design and Evaluation of the Hierarchical Cubic Network
A Distributed Hardware Barrier in an Optical Bus-Based Distributed Shared Memory Multiprocessor
Reflex-Tree: A Biologically Inspired Parallel Architecture for Future Smart Cities
Safe, Fast Sharing of memcached as a Protected Library
A G-Line-Based Network for Fast and Efficient Barrier Synchronization in Many-Core CMPs
Variable-Size Batched LU for Small Matrices and Its Integration into Block-Jacobi Preconditioning
Benchmarking Message Passing Performance using MPI
Performance Analysis of Combining Multistage Interconnection Networks
Parallel Multiple Sequence Alignment Using Speculative Computation
Prefix Computation and Sorting in Dual-Cube
Run-Length Chain Coding and Shape's Moment Computations on Arrays with Reconfigurable Optical Buses
ITIF: Integrated Transformers Inference Framework for Multiple Tenants on GPU
Software-Based Communication Latency Hiding for Commodity Workstation Networks
Generation of Long Sorted Runs on a Unidirectional Array
A Multicast Protocol Based on a Single Logical Ring Using a Virtual Token and Logical Clocks
Organization of an Instruction Scheduling and Token Storage Unit in a Tagged Token Dataflow Machine
Leverage Redundancy in Hardware Transactional Memory to Improve Cache Reliability
Time-Optimal and Conflict-Free Mappings of Uniform Dependence Algorithms into Lower Dimensional Processor Arrays
Improving Short Job Latency Performance in Hybrid Job Schedulers with Dice
Minimizing Node Contention in Multiple Multicast on Wormhole k-ary N-Cube Networks
Omni-sort: A Versatile Data Processing Operation for VLSI
Optimal Algorithms for Labeling Image Components
Memory Access Scheduling Schemes for Systems with Multi-Core Processors
VMMP: A Virtual Machine for the Development of Portable and Efficient Programs for Multiprocessors
ADARNet: Deep Learning Predicts Adaptive Mesh Refinement
An Analysis of the Twisted Cube Topology
ADSTS: Automatic Distributed Storage Tuning System Using Deep Reinforcement Learning
Using Gossip for Dynamic Resource Discovery
Computing Local Sequence Similarities on a Hypercube
Performance of VLSI Engines for Lattice Computations
Optimizing Parallel Programs Using Affinity Regions
Scheduling in Parallel Database Systems
GLAF: A Visual Programming and Auto-tuning Framework for Parallel Computing
Performance Modeling of Parallel Algorithms
CSR: A Cloud-Assisted Speech Recognition Service for Personal Mobile Device
Grover: Looking for Performance Improvement by Disabling Local Memory Usage in OpenCL Kernels
Experimental Validation of a Performance Model for Simple Layered Task Systems
A Hardware Memory Mapping Unit for Efficient Address Computation
Fourth-Order Exhaustive Epistasis Detection for the xPU Era
GRAPH: A Tool for Visualizing Communication and Optimizing Layout in Data-Parallel Programs
A Slicing Algorithm of Concurrency Modeling Based on Petri Nets
Minimal-Distance Routing for Kykios II
Approximate Analysis of Multiprocessing Task Graphs
Dynamic Fault Tolerance with Misrouting in Fat Trees
A Fixed Size Systolic Array for Arbitrarily Large Eigenvalue Problems
Data-Flow Analysis for MPI Programs
L-Turn Routing: An Adaptive Routing in Irregular Networks
Algorithms for Determining Optimal Partitions in Parallel Divide-and-Conquer Computations
Integration of a Highly Scalable, Multi-FPGA-Based Hardware Accelerator in Common Cluster Infrastructures
Efficient Parallel Algorithm for Optimal Three-Sequences Alignment
Cilk vs MPI: Comparing two very different parallel programming styles
Hybrid Multiprocessing in OPTIMUL : A Multiprocessor for Distributed and Shared Memory Multiprocessing with WDM Optical Fiber Interconnections
Schemes for Reducing Communication Latency in Regular Computations on DSM Multiprocessors
Lock-Visor: An Efficient Transitory Co-scheduling for MP Guest
Dead Timestamp Identification in Stampede
CAB: Cache Aware Bi-tier Task-Stealing in Multi-socket Multi-core Architecture
Experience with Two Parallel Programs Solving the Traveling Salesman Problem
Efficient Paralel Algorithms for Geometric Partitioning Problems Through Parallel Range Searching
A Comparative Study of Unification Algorithms For Or-Parallel Execution of Logic Languages
Application-Aware Power Coordination on Power Bounded NUMA Multicore Systems
Distance-Transitive Graphs for Fault-Tolerant Multiprocessor Systems
CAMLB-SpMV: An Efficient Cache-Aware Memory Load-Balancing SpMV on CPU
LiMIC: Support for High-Performance MPI Intra-node Communication on Linux Cluster
Substructure Allocation in Recursive Interconnection Networks
Dependence Analysis and Architecture Design for Bit-Level Algorithms
Re-Routing and Resequencing in Multistage Interconnection Networks
An Analysis of System Balance Requirements for Scientific Applications
DiSTM: A Software Transactional Memory Framework for Clusters
Characterizing the Relation Between Apex-Map Synthetic Probes and Reuse Distance Distributions
Hardware Support for Message Routing in a Distributed Memory Multicomputer
A Smart TCP Socket for Distributed Computing
Implementation and Performance Evaluation of the Parallel Relational Database Server SDC-II
Near-Optimal Dynamic Task Scheduling of Independent Coarse-Grained Tasks onto a Computational Grid
Exception Handling in Multilisp
Unleashing the Scalability Potential of Power-Constrained Data Center in the Microservice Era