yusuke1997/dblp-id-title huggingface dataset:
A Heterogeneous Multi-core Processor Architecture for High Performance Computing
Extending Address Space of IP Networks with Hierarchical Addressing
Early load: Hiding load latency in deep pipeline processor
Static Techniques to Improve Power Efficiency of Branch Predictors
A wire delay scalable stream processor architecture
Dynamic Reallocation of Functional Units in Superscalar Processors
State Reordering for Low Power Combinational Logic
Improving code density of embedded software using a 2-level dictionary code compression architecture
Exploiting Thread-Level Speculative Parallelism with Software Value Prediction
The Challenges of Efficient Code-Generation for Massively Parallel Architectures
Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings
An Authorization Architecture Oriented to Engineering and Scientific Computation in Grid Environments
Power-Efficient Heterogeneous Multicore Technology for Digital Convergence
Power-Efficient Microkernel of Embedded Operating System on Chip
High-Performance Extendable Instruction Set Computing
Heuristic Algorithm for Reducing Mapping Sets of Hardware-Software Partitioning in Reconfigurable System
Scalable Design Framework for JPEG2000 System Architecture
SecureTorrent: A Security Framework for File Swarming
DTuplesHPC: Distributed Tuple Space for Desktop High Performance Computing
The New BCD Subtractor and Its Reversible Logic Implementation
Two Cache Lines Prediction for a Wide-Issue Micro-architecture
Implementation of a precision time protocol over low rate wireless personal area networks
13th Asia-Pacific Computer Systems Architecture Conference, ACSAC 2008, Hsinchu, China, August 4-6, 2008
A Portable Doppler Device Based on a DSP with High- Performance Spectral Estimation and Output
An integrated software processor with autofilling out web forms
The Star-Pyramid Graph: An Attractive Alternative to the Pyramid
Design of a Low-Power Embedded Processor Architecture Using Asynchronous Function Units
The Algorithm and Circuit Design of a 400MHz 16-Bit Hybrid Multiplier
High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption
Semantic Data De-duplication for archival storage systems
Arithmetic Data Value Speculation
Minimizing Power in Hardware/Software Partitioning
On the Reliability of Drowsy Instruction Caches
Heterogeneous file sharing by file-system emulation
Automatic selection of GCC optimization options using a gene weighted genetic algorithm
VLSI Performance Evaluation and Analysis of Systolic and Semisystolic Finite Field Multipliers
On Implementing High Level Concurrency in Java
Toward Architecting and Designing Novel Computers
Functional Unit Chaining: A Runtime Adaptive Architecture for Reducing Bypass Delays
Variable Radix Page Table: A Page Table for Modern Architectures
A Fault-Tolerant Routing Strategy for Fibonacci-Class Cubes
FPGAs for Improved Energy Efficiency in Processor Based Systems
Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays
Laplace Transformation on the FT64 Stream Processor
Stacking them up: a Comparison of Virtual Machines
Implementing an efficient vector instruction set in a chip multi-processor using micro-threaded pipelines
A Compiler Framework for Supporting Speculative Multicore Processors
Efficient Victim Mechanism on Sector Cache Organization
Hardware transactional memory system for parallel programming
Critical-Task Anticipation Scheduling Algorithm for Heterogeneous and Grid Computing
L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy
An Integrated Temporal Partitioning and Mapping Framework for Handling Custom Instructions on a Reconfigurable Functional Unit
Hypercube Communications on Optical Chordal Ring Networks with Chord Length of Three
A Scalable Re-Configurable Processor
Leakage Energy Reduction in Cache Memory by Software Self-invalidation
RAID10L: A high performance RAID10 storage architecture based on logging technique
Processor Architecture for Trustworthy Computers
Matrix-Star Graphs: A New Interconnection Network Based on Matrix Operations
Profile guided optimization for dataflow predication
Advances in Computer Systems Architecture, 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings
A new approach for cycle embedding in faulty hypercubes
FPGA-based Equivalent Simulation Technology (FEST) for clustered stream architecture
Striping Cache: A Global Cache for Striped Network File System
Fast accurate rendering
Cache Leakage Management for Multi-programming Workloads
Biological Sequence Analysis with Hidden Markov Models on an FPGA
A collaborative virtual assembly system based on mobile devices
An Efficient Approach to Energy Saving in Microcontrollers
A Simple Architectural Enhancement for Fast and Flexible Elliptic Curve Cryptography over Binary Finite Fields GF(2 m )
Implementation and Analysis of TCP/IP Offload Engine and RDMA Transfer Mechanisms on an Embedded System
The SawMill Framework for Virtual Memory Diversity
Fault-Tolerant Routing on Complete Josephus Cubes
A Reconfigurable Multi-threaded Architecture Model
A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster
Replica Victim Caching to Improve Reliability of In-Cache Replication
Fault-Free Pairwise Independent Hamiltonian Paths on Faulty Hypercubes
Comparative Evaluation of Adaptive and Deterministic Routing in the OTIS-Hypercube
Power Consumption and Performance Analysis of 3D NoCs
Validating Word-Oriented Processors for Bit and Multi-word Operations
A Switch Wrapper Design for SNA On-Chip-Network
A SWP Specification for Sequential Image Processing Algorithms
Research on Petersen Graphs and Hyper-cubes Connected Interconnection Networks
A Router Architecture to Achieve Link Rate Throughput in Suburban Ad-hoc Networks
A Pipelined Hardware Architecture for Motion Estimation of H.264/AVC
Compile-Time Thread Distinguishment Algorithm on VIM-Based Architecture
The potential of fine-grained value prediction in enhancing the performance of modern parallel machines
FCC-SDP: A Fast Close-Coupled Shared Data Pool for Multi-core DSPs
Challenges and Opportunities on Multi-core Microprocessor
Area-Time Efficient Systolic Architecture for the DCT
A Configurable System-on-Chip Architecture for Embedded Devices
Error Detection for Adaptive Computing Architectures in Spacecraft Applications
A Floating Point Divider Performing IEEE Rounding and Quotient Conversion in Parallel
Optimization and Evaluating of StreamYGX2 on MASA Stream Processor
Fast Address-Space Switching on the StrongARM SA-1100 Processor
Exploiting Single-Usage for Effective Memory Management
Extending FPGA Information Leaks with Trojan Phantom Circuits
A Compiler for Transparent Namespace-Based Access Control for the Zeno Architecture
Seeds of SEED: Building and Verifying Foundationally Isolated Hardware Architectures
Beyond the Bridge: Contention-Based Covert and Side Channel Attacks on Multi-GPU Interconnect
SoK: Hardware Defenses Against Speculative Execution Attacks
International Symposium on Secure and Private Execution Environment Design, SEED 2024, Orlando, FL, USA, May 16-17, 2024
2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), Storrs, CT, USA, September 26-27, 2022
2021 International Symposium on Secure and Private Execution Environment Design (SEED), Washington, DC, USA, September 20-21, 2021
SSE: Security Service Engines to Scale Enclave Parallelism for System Interactive Applications
ENCLYZER: Automated Analysis of Transient Data Leaks on Intel SGX
Maya: Hardware Enhanced Customizable Defenses at the User-Kernel Interface
INTERFACE: An Indirect, Partitioned, Random, Fully-Associative Cache to Avoid Shared Last-Level Cache Attacks
Seeds of SEED: H-CRAM: In-memory Homomorphic Search Accelerator using Spintronic Computational RAM
Eliminating Micro-Architectural Side-Channel Attacks using Near Memory Processing
Data-Out Instruction-In (DOIN!): Leveraging Inclusive Caches to Attack Speculative Delay Schemes
PREDATOR: A Cache Side-Channel Attack Detector Based on Precise Event Monitoring
LOaPP: Improving the Performance of Persistent Memory Objects via Low-Overhead at-Rest PMO Protection
Foreseer: Efficiently Forecasting Malware Event Series with Long Short-Term Memory
Improving the Security and Programmability of Persistent Memory Objects
Performance-Enhanced Integrity Verification for Large Memories
A First Exploration of Fine-Grain Coherence for Integrity Metadata
JAXED: Reverse Engineering DNN Architectures Leveraging JIT GEMM Libraries
Context-Aware Privacy-Optimizing Address Tracing
Pagoda: Towards Binary Code Privacy Protection with SGX-based Execute-Only Memory
Security analysis of confidential-compute instruction set architecture for virtualized workloads
Sequestered Encryption: A Hardware Technique for Comprehensive Data Privacy
Bespoke Cache Enclaves: Fine-Grained and Scalable Isolation from Cache Side-Channels via Flexible Set-Partitioning
Channelizer: Explainable ML Inference for Validating Side-Channel Resistant Systems
Seeds of SEED: New Security Challenges for Persistent Memory
EPI: Efficient Pointer Integrity For Securing Embedded Systems
Seeds of SEED: A Side-Channel Resilient Cache Skewed by a Linear Function over a Galois Field
Accelerating Polynomial Multiplication for Homomorphic Encryption on GPUs
Seeds of SEED: NMT-Stroke: Diverting Neural Machine Translation through Hardware-based Faults
Extending and Defending Attacks on Reset Operations in Quantum Computers
CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure
Establishing Cooperative Computation with Hardware Embassies
VIP-Bench: A Benchmark Suite for Evaluating Privacy-Enhanced Computation Frameworks
Tail Victims in Termination Timing Channel Defenses Beyond Cryptographic Kernels
Cloak & Co-locate: Adversarial Railroading of Resource Sharing-based Attacks on the Cloud
Implementing a Security Architecture for Safety-Critical Railway Infrastructure
Trusted Execution Environments in Embedded and IoT Systems: A CactiLab Perspective
SoK: Opportunities for Accelerating Multi - Party Computation via Trusted Hardware
Protecting On-Chip Data Access Against Timing-Based Side-Channel Attacks on Multicores
Seeds of SEED: Efficient Access Pattern Obfuscation for Untrusted Hybrid Memory System
Track Conventions, Not Attack Signatures: Fortifying X86 ABI and System Call Interfaces to Mitigate Code Reuse Attacks
These Aren't The Caches You're Looking For: Stochastic Channels on Randomized Caches
Do Not Predict - Recompute! How Value Recomputation Can Truly Boost the Performance of Invisible Speculation
Chameleon Cache: Approximating Fully Associative Caches with Random Replacement to Prevent Contention-Based Cache Attacks
Seeds of SEED: Preventing Priority Inversion in Instruction Scheduling to Disrupt Speculative Interference
Confidential Computing - a brave new world
SoK: Confidential Quartet - Comparison of Platforms for Virtualization-Based Confidential Computing
Seeds of SEED: H 2 Cache: Building a Hybrid Randomized Cache Hierarchy for Mitigating Cache Side-Channel Attacks
Seeds of SEED: R-SAW: New Side Channels Exploiting Read Asymmetry in MLC Phase Change Memories
SoK: Limitations of Confidential Computing via TEEs for High-Performance Compute Systems
SoK: A Comparison Study of Arm TrustZone and CCA
Aggregate Encryption Individual Decryption for FPGA Bitstream Protection on Cloud
Seeds of SEED: Characterizing Enclave-level Parallelism in Secure Multicore Processors
Avenger: Punishing the Cross-Core Last-Level Cache Attacker and Not the Victim by Isolating the Attacker
CryptoExamples: Secure, minimal, complete, copyable and tested code examples for Crypto APIs
Evaluation of the ECDSA IHP Hardware Accelerator
Welcome to Mozilla
Can Verification of Cryptographic Libraries be liberated from the von Neumann Style?
Applied post-quantum cryptography for embedded systems
Design and Analysis of Cryptographic Algorithms for Authentication
Challenges in Post-Quantum Security Reductions
Distributed Domain Validation (DDV)
Privacy-Preserving Genomics on a Large Scale
Methodology Design for Dynamic Test Method Generation via Existing Module Tests
Comments On: Constant Time Modular Inversion
When Memory Serves Not So Well - Memory Errors 30 Years Later
SLIDEDroid: A Secure Lightweight Identity for the Android Platform
A Dinosaurs view on Blockchains
Automatic Security Analysis in the Symbolic Model using Tamarin-Prover
Private Function Evalutation with Universal Circuits
Hardware Accelerated Sender Identification for the Controller Area Network
Examining Leakage from Access Counts in ORAM Constructions
Machine Learning Based Sender Identification for Controller Area Network
Chains and Whips - An approach to lighweight MACs
30. Krypto-Tag, Berlin, Germany, March 28-29, 2019
BISON - Instantiating the Whitened Swap-Or-Not Construction
Transputation: Transport Framework for Secure Computation
Horizontal SCA Attack using Machine Learning Algorithms
Securing DNSSEC Keys via Threshold ECDSA From Generic MPC
Towards a central, distributed and secure default cryptography parameter set
Wiretap Coding in the Context of PUFs
ICRC: Instant Certificate Revocation Checking using Blockchain-backed Bloom Filters
Placement of Gates in ECC Designs
31. Krypto-Tag, Berlin, Germany, October 17-18, 2019
Post-Quantum Software Updates
Addressing the Effects of Temperature Variations on Intrinsic Memory-Based Physical Unclonable Functions
DATA - Differential Address Trace Analysis
Anatomy of Commercial IMSI Catchers and Detectors
Security Overview on Secure Encrypted Virtualization
Algebraic Analysis of the Initialization Phase Grain Version 1 using a Degree-Oriented Interpolation Technique
Low-Cost Countermeasure against Horizontal Bus and Address-Bit SCA
Universal Composability: A Comparison of Different Models
Error-Correcting Codes for Lattice-Based Key Exchange
XOR Arbiter PUFs: an Empirical Approach to Input Transformations
Cryptographic Game-style language in EasyCrypt
Optical Fault Injections: Most Often Used Setups
On the Impact of the Sampling Rate on the Success of Horizontal DEMA Attack
ECC Based Secure Authentication Solutions
Introduction to QPSI - Who we are and what we do Hardware
Intelligent Clustering as a Means to Improve K-means Based Horizontal Attacks
Analyzing power consumption of TLS ciphers on an ESP32
Edge computing devices assessment for cryptography and biomedical signal analysis
Using machine learning techniques for hardware performance counter classification and ROP attack detection
Crypto (engineering) at Mozilla
28. Krypto-Tag, Kirchheim bei München, Germany, June 7-8, 2018
Advanced Reconfigurable Physical Unclonable Functions (AR-PUFs) and Their Security Applications
Sponges Resist Leakage: The Case of Authenticated Encryption
HCCA against Montgomery kP Design
Post-quantum security: Power Analysis of NTRUEncrypt
Towards Secure Strong PUFs
Applying Differential Privacy to Machine Learning: Challenges and Potentials
Internet As a Source of Randomness
29. Krypto-Tag, Renningen, Germany, September 6-7, 2018
Towards Quantum-resistant Virtual Private Networks
Insecure Until Proven Updated: Analyzing AMD SEV's Remote Attestation
MCDDPM: Multichannel Conditional Denoising Diffusion Model for Unsupervised Anomaly Detection in Brain MRI
Automatic characterization of masses in mammograms
North Corridor Economic Region: Bio Ecosystem Analysis
Analyzing occupational stress based on inner composition alignment algorithm
Vector analysis on the fault-tolerant abilities of combined analog circuit systems
Drug Design for AMP-Activated Protein Kinase Agonists in Silico
An automated method for microvascular blood flow analysis based on spatiotemporal images
A multi-scale EEGNet for cross-subject RSVP-based BCI system
Remote Sensing Image Colorization Based on Multiscale SEnet GAN
A novel method for adjusting Digital predistortion with Modulation Error Ratio in OFDM System
A Kinect based gesture recognition algorithm using GMM and HMM
Development of transgenic Phalaenopsis resistant to two viral infections
A Strategy for a Six-Way Synthetic Large Power HIFU Therapy System
Minimization of masking in signal detection from Chinese spontaneous reporting databases based on data removal strategy
Facial paralysis modeling based on image morphing
A Flexible Electrode Array for Acute In-Vitro Stimulating on Animal
MRTI-Based Optimization and Real-Time Laser Surgical Control for Cancer Treatment Using Fast Inverse Analysis Techniques
A method of urine detection based on front vision and image recognition
Analysis of Fluid Structure Interaction based on patient-specific internal carotid aneurysm model
Research and implementation of an improved license plate recognition algorithm
Enhancing Plant Recognition in Intelligent Agricultural Irrigation Systems Using Stable Diffusion and Lora Models with CFloss
Design of Intelligent Burglar Alarm System in Laboratory Based on Embedded System
MRI Reconstruction Based on Inverse Scale Space and Contourlet Thresholding
An Augmentable Domain-specific Models for Financial Analysis
Development of forceps robot for surgical operation by biomechanism application
Pseudo synchronization resampling to enhance T wave alternans detection
Small Robotic Assistant for Knee Surgery in Laboratory
Study on 3D reconstruction of the elastin second harmonic generation image
An image patch matching method based on multi-feature fusion
CSRule: Efficient mining of closed strong association rules in the resource effectiveness matrix
A 16-bit carry skip adder designed by reversible logic
Color image retrieval based on the hypergraph and the fusion of two descriptors
Computational modeling analysis for cell growth using Electric Cell-substrate Impedance Sensing (ECIS) based time series data
A Machine Learning Approach to Heart Murmur Detection and Classification
Morphological Changes of Mesenchymal Stem Cells by Cyclic Stretch
Electronic Control System for Laser Tweezers & Scissors Workstation
Voluntary cough detection by internal sound analysis
The determination of maximum velocity from Doppler blood flow spectrum in the stenosed vessels
Functional research on digital cognitive ethology of transcranial direct current stimulation
Recoverable concealed data aggregation for privacy preserving in wireless sensor networks
A systematic approach to adaptive activity modeling and discovery in smart homes
Detection of obsessive compulsive disorder using resting-state functional connectivity data
Speech Visualization based on Robust Self-organizing Map (RSOM) for the Hearing Impaired
Feature selection algorithm for evoked EEG signal due to RGB colors
A mechanism for semantic enhanced integrated product modeling in collaborative design environment
Nonlinear Manifold Feature Extraction Based on Spectral Supervised Canonical Correlation Analysis for Facial Expression Recognition with RRNN
Multi-Class EEG Classification for Brain Computer Interface based on CSP
Polyp detection and radius measurement in small intestine using video capsule endoscopy
Remote heart sound and lung sound monitoring system design based on ZigBee
A fast iterative reconstruction method based on the selective total variation for sparse angular CT
Effect of Oleic Acid on Triglycerides (TG) Accumulation and mRNA Level of PPARalpha and PPARgamma in Goose Primary Hepatocytes
Recognizing the emotion of learners by physiological sensors to improve english learning performance
Using Auditory Noise to Enhance the Fine-Motor of Human's Hand Due to Cross-Modal Stochastic Resonance
Photoacoustic imaging: A potential new tool for diagnosing vasculogenic erectile dysfunction
A Principal Component Analysis Based Microarray Data Bi-Clustering Method
A precise color correction algorithm for stationary video systems
Automatic classification of biomedical texts: Experiments with a hearing loss corpus
IoT platform based on EOG to monitor and control a Smart Home Environment for Patients with Motor Disabilities
Remote three-dimensional reconstruction for medical images based on Browser/Server framework
Time-domain response analysis of non-uniform coupled transmission lines based on the precise integration method
Evaluation of Flight Test Data Quality Based on Rough Set Theory
Feature Extraction for Change Detections Combining The Local Contain Profile and The Sparse Representation Classifier
Information Retrieval Based on Word Semantic Clustering
Region of interest extraction for palmprint and palm vein recognition
The Image Representation of Auricular Points Resistance Mapping
Attention Based Speckle Reduction for Optical Coherence Tomography in Ophthalmology and Dentistry
Research progress of quality control technology and metrological requirements of extracorporeal membrane oxygenation systems
Analysis of Volatile Flavor Compounds in Submerged Cultured Ganoderma Sinense Mycelium by Headspace Gas Chromatography
Control for a class of uncertain underactuated nonlinear systems
A Dual-Loop Capacitor-Less NMOS LDO with Transient Enhancement Based on Voltage Comparison
Finite element analysis of hollow HfO2 microneedles for transdermal drug delivery
Guideline Design of an Active Gene Annotation Corpus for the Purpose of Drug Repurposing
Tamper restoration on DNA sequences based on reversible data hiding
A variable-bit-rate speech coding algorithm based on enhanced mixed excitation linear prediction
Segmentation and Tracking of Coronary Artery Using Graph-Cut in CT Angiographic
A Novel Spatial-Temporal Convolutional Neural Network for Remote Photoplethysmography
The Benefit Analysis of Soil and Water Conservation Measures Through UAV Methodology
Dynamic Changes in Brain Networks of Alzheimer's Disease Based on Co-Activation Patterns
Design of in-shoe plantar pressure monitoring system for daily activity exercise stress assessment
Fusion Based Single Image De-hazing
Automatic Thresholding of Micro-CT Trabecular Bone Images
Automatic Classification of 12-lead ECG Based on Model Fusion
An adaptive vessel closing generator in electrosurgery
A Research on the Automatic Discovery Technology of Network Topology
An advanced scheme with decision tree for the improvement of spectrum sensing efficiency in dynamic network
Functional brain networks related to working memory using phase synchrony analysis
Power-line interference suppression in electrocardiogram using Recurrent Neural Networks
A novel motion sensor with nine degrees of freedom
Using GPU to accelerate suffix array construction
Real-Time, CNN-Based Assistive Device for Visually Impaired People
Immobilization of bovine serum albumin onto spherical polyelectrolyte brushes in aqueous solution
An auto-focusing algorithm for monopulse imaging technique
Length and diameter characterization of short carbon nanotubes by light scattering method
HiCVAE: A Variational Auto-Encoder Framework for Simulating Hi-C Data
Nonlinear Dynamics Techniques for the Detection of the Brain Areas Using MER Signals
No-Reference Stereoscopic Image Quality Assessment by Both Complex Contourlet Domain with Spatial Domain Features
Fusion of Selected Deep CNN and Handcrafted Features for Gastritis Detection from Wireless Capsule Endoscopy Images
Post-stroke asymmetry of muscle contractions for knee flexion and extension during walking
A Heuristic Algorithm for Individual Haplotyping with Minimum Error Correction
The era of Cloud computer: Thru bio-detecting and open-resources to achieve the ubiquitous devices
Segmentation of brain MR images using an adaptively regularized kernel FCM algorithm with spatial constraints
A new automatic method for mass detection in mammography with false positives reduction by supported vector machine
Medical Diagnosis by Complaints of Patients and Machine Learning
A Study on an Improved ResNet Model for Image Classification
An approach of hierarchical concept clustering on Medical Short Text corpus
Face recognition based on dictionary learning with the locality constraints of atoms
Prediction of renal transplant rejection and acute tubular necrosis in renal transplant based on SVM
Computed tomography of transverse mesocolon: Involvement in gastric carcinoma