yusuke1997/dblp-id-title huggingface dataset:
Online Detection and Classification of State Transitions of Multivariate Shock and Vibration Data
Discrete Integrated Circuit Electronics (DICE)
Extracting TCPIP Headers at High Speed for the Anonymized Network Traffic Graph Challenge
Fpga Acceleration for Scalable High-Resolution Opir Target Detection
Accelerating SAR processing on COTS FPGA hardware using C-to-gates design tools
Scalable Lazy-update Multigrid Preconditioners
Hardware Design and Implementation of Classic McEliece Post-Quantum Cryptosystem Based on FPGA
IEEE High Performance Extreme Computing Conference, HPEC 2024, Wakefield, MA, USA, September 23-27, 2024
A High-Performance Curve25519 and Curve448 Unified Elliptic Curve Cryptography Accelerator
Optimized parallel distribution load flow solver on commodity multi-core CPU
Many-target, Many-sensor Ship Tracking and Classification
FAST: A Scalable Subgraph Matching Framework over Large Graphs
MIT SuperCloud portal workspace: Enabling HPC web application deployment
An Improved Izhikevich Neuron Model With Time Delay and Adaptive Parameters for High-Performance Spiking Neural Networks
Homomorphic Encryption Based Secure Sensor Data Processing
Architectural Analysis of Deep Learning on Edge Accelerators
MERCURY: Efficient Subgraph Matching on GPUs with Hybrid Scheduling
Vendor agnostic, high performance, double precision Floating Point division for FPGAs
IEEE High Performance Extreme Computing Conference, HPEC 2022, Waltham, MA, USA, September 19-23, 2022
Performance of a GPU-Based Radar Processor
Privacy-Preserving AI for Document Understanding with Controlled Unclassified Information
Autonomous, independent management of dynamic graphs on GPUs
AIMS: An Adaptive Intelligent Multi-Objective Scheduler Powered by Digital Twins
2021 IEEE High Performance Extreme Computing Conference, HPEC 2021, Waltham, MA, USA, September 20-24, 2021
Scalable Data Generation for Evaluating Mixed-Precision Solvers
Inverse-Deletion BFS - Revisiting Static Graph BFS Traversals with Dynamic Graph Operations
Distributed and Heterogeneous SAR Backprojection with Halide
High Performance Computing Techniques with Power Systems Simulations
WCET analysis of the shared data cache in integrated CPU-GPU architectures
Selective Encryption of Compressed Image Regions on the Edge with Reconfigurable Hardware
3D DRAM based application specific hardware accelerator for SpMV
Design and Performance Evaluation of Optimizations for OpenCL FPGA Kernels
Energy-Efficient Analysis of Synchrophasor Data using the NVIDIA Jetson Nano
Interactive Supercomputing on 40, 000 Cores for Machine Learning and Data Analysis
Denial of Service in CPU-GPU Heterogeneous Architectures
Sorting sixteen numbers
Scalable RMA-based Communication Library Featuring Node-local NVMs
Towards Fast Crash-Consistent Cluster Checkpointing
A Massively Parallel BWP Algorithm for Solving Large-Scale Systems of Nonlinear Equations
Human balance models optimized using a large-scale, parallel architecture with applications to mild traumatic brain injury
Hypervisor performance analysis for real-time workloads
KNN in the Jaccard space
Embedded Processor-In-Memory Architecture for Accelerating Arithmetic Operations
Low Power Computing and Simultaneous Electro-Optical/Radar Data Processing using IBM's NS16e 16-chip Neuromorphic Hardware
Interactive Trillion Packet Anonymized Network Analysis with the GraphBLAS
A multi-tiered optimization framework for heterogeneous computing
A near real-time, parallel and distributed adaptive object detection and retraining framework based on AdaBoost algorithm
Spaceland Embedding of Sparse Stochastic Graphs
Sparse Deep Neural Network Inference Using Different Programming Models
Deluge: Achieving Superior Efficiency, Throughput, and Scalability with Actor Based Streaming on Migrating Threads
Enabling Novel In-Memory Computation Algorithms to Address Next-Generation Throughput Constraints on SWaP- Limited Platforms
Large scale network situational awareness via 3D gaming technology
Measuring the Impact of Spectre and Meltdown
SuperCloud Lite in the Cloud - lightweight, secure, self-service, on-demand mechanisms for creating customizable research computing environments
Havens: Explicit reliable memory regions for HPC applications
HashTag: Fast Lookup in a Persistent Memory File System
Fully Transparent Client-Side Caching for Key-Value Store Applications Using FPGAs
Mitigation of Applied Load Using Machine Learning for Adaptive Motor Control
Benchmarking Thread Block Cluster
Performance Analysis of the Parallel Shared-Memory Sparse Matrix-Vector Multiplication on Unstructured Matrices
A More Portable HeFFTe: Implementing a Fallback Algorithm for Scalable Fourier Transforms
Collaborative (CPU + GPU) Algorithms for Triangle Counting and Truss Decomposition
Investigating Resilience of Loops in HPC Programs: A Semantic Approach with LLMs
Linear Algebra-Based Triangle Counting via Fine-Grained Tasking on Heterogeneous Environments : (Update on Static Graph Challenge)
Real-time streaming intelligence: Integrating graph and NLP analytics
WASP: A Wearable Super-Computing Platform for Distributed Intelligence in Multi-Agent Systems
Hornet: An Efficient Data Structure for Dynamic Sparse Graphs and Matrices on GPUs
Multi-Temporal Analysis and Scaling Relations of 100, 000, 000, 000 Network Packets
Incremental Streaming Graph Partitioning
PERFECT case studies demonstrating order of magnitude reduction in power consumption
Computing structural controllability of linearly-coupled complex networks
Efficient parallel streaming algorithms for large-scale inverse problems
Adaptive Policy Synchronization for Scalable Reinforcement Learning
Challenges Designing for FPGAs Using High-Level Synthesis
A heterogeneous computing system with memristor-based neuromorphic accelerators
Post Quantum Cryptography(PQC) - An overview: (Invited Paper)
Projecting Performance for PIUMA using Down-Scaled Simulation
Message Scheduling for Performant, Many-Core Belief Propagation
Low-overhead hard real-time aware interconnect network router
Embedded second-order cone programming with radar applications
An introduction to an array memory processor for application specific acceleration
Graphulo implementation of server-side sparse matrix multiply in the Accumulo database
A Novel Inference Algorithm for Large Sparse Neural Network using Task Graph Parallelism
The NorthPole Validator: A Cycle-Accurate Simulator for HW/SW Codesign of a Prescheduled Neural Inference Accelerator
Hardware Acceleration of Nonlocal Means-Based Speckle Noise Removal Applied to SAR Imagery
QAOA Parameter Transferability for Maximum Independent Set using Graph Attention Networks
Synthetic Aperture Radar on low power multi-core Digital Signal Processor
ModelGauge: Inference Profiling of Deep-Learning Models
Tangram: Colocating HPC Applications with Oversubscription
Stable Iterative Solvers for Ill-Conditioned Linear Systems and Least Squares
A cloud-based approach to big graphs
Asymmetric Grouped Convolutions for Logarithmic Scale Efficient Convolutional Neural Networks
Distributed triangle counting in the Graphulo matrix math library
DPGS Graph Summarization Preserves Community Structure
Use of CUDA for the Continuous Space Language Model
Property Graphs in Arachne
Improving Performance and Scalability of Algebraic Multigrid through a Specialized MATVEC
MetaCL: Automated "Meta" OpenCL Code Generation for High-Level Synthesis on FPGA
Benchmarking network fabrics for data distributed training of deep neural networks
Update on Static Graph Challenge on GPU
Physics-Informed Neural Networks for Low-Power Real-Time Edge Biosensing Applications
Efficient and scalable computations with sparse tensors
Syndeo: Portable Ray Clusters with Secure Containerization
Towards Combining Error-bounded Lossy Compression and Cryptography for Scientific Data
Evaluating latency and throughput bound acceleration of FPGAs and GPUs for adaptive optics algorithms
Efficient implementation of sparse matrix-sparse vector multiplication for large scale graph analytics
Low Overhead Instruction Latency Characterization for NVIDIA GPGPUs
Advancing AI Challenges for the United States Department of the Air Force *
I-vector speaker and language recognition system on Android
Machine Learning Across Network-Connected FPGAs
Deep Learning-Based Nuclei Segmentation of Cleared Brain Tissue
Enhancing the Performance Portability of Heterogeneous Circuit Analysis Programs
Vertical, Temporal, and Horizontal Scaling of Hierarchical Hypersparse GraphBLAS Matrices
Embedded real-time HD video deblurring
Real-time traffic sign detection using SURF features on FPGA
Analyzing Multi-trillion Edge Graphs on Large GPU Clusters: A Case Study with PageRank
Update on k-truss Decomposition on GPU
Improved Models for Policy-Agent Learning of Compiler Directives in HLS
Computationally Efficient CP Tensor Decomposition Update Framework for Emerging Component Discovery in Streaming Data
Towards Triangle Counting on GPU using Stable Radix binning
Design, Optimization, and Benchmarking of Dense Linear Algebra Algorithms on AMD GPUs
neuro-inspired Enhancing Spiking Graph Convolutional Networks
Miniature radar for mobile devices
Leakage evaluation on power balance countermeasure against side-channel attack on FPGAs
Genetic sequence matching using D4M big data approaches
Scaling and Quality of Modularity Optimization Methods for Graph Clustering
Real-time regex matching with apache spark
Trends in Energy Estimates for Computing in AI/Machine Learning Accelerators, Supercomputers, and Compute-Intensive Applications
Profiling and Optimization of CT Reconstruction on Nvidia Quadro GV100
Polyhedral compilation for energy efficiency
Abstractions considered helpful: A tools architecture for quantum annealers
Benchmarking the graphulo processing framework
Efficient and Flexible 2-D Data Controller for SAR Imaging System
Experiences with VITIS AI for Deep Reinforcement Learning
Re-Introduction of communication-avoiding FMM-accelerated FFTs with GPU acceleration
Indexed Binary Operations in the GraphBLAS
Inference Benchmarking on HPC Systems
Using Monitoring Data to Improve HPC Performance via Network-Data-Driven Allocation
Identifying Execution Anomalies for Data Intensive Workflows Using Lightweight ML Techniques
Optimizing the Visualization Pipeline of a 3-D Monitoring and Management System
A Scalable Quantum Dynamical Approach for Calculating Collisional Molecular Properties
A Fast and Efficient Parallel Algorithm for Pruned Landmark Labeling
Processing Particle Data Flows with SmartNICs
Multithreaded FPGA acceleration of DNA sequence mapping
Multifrontal computations on accelerators
Intel Xeon Optimization for Efficient Media Workload Acceleration
A SoPC based Fixed Point System for Spaceborne SAR Real-Time Imaging Processing
Preconditioned spectral clustering for stochastic block partition streaming graph challenge (Preliminary version at arXiv.)
Fast Triangle Counting
Accelerating big data applications using lightweight virtualization framework on enterprise cloud
A Qualifiable GPU Sharing Approach for AI Workloads in Critical Systems
Biomedical relation extraction using stochastic difference equations
Predicting HPC Job Run time with Realistic Data Using Application Input Parameters
LLMs for Closed-Library Multi-Document Query, Test Generation, and Evaluation
BB-CVXOPT: Basic Block Execution Count Estimation and Extrapolation Using Constrained Convex Optimization
Workload Imbalance in HPC Applications: Effect on Performance of In-Network Processing
Atomic-delayed execution: A concurrent programming model for incomplete graph-based computations
Deployment of Real-Time Network Traffic Analysis Using GraphBLAS Hypersparse Matrices and D4M Associative Arrays
A Multi-GPU Parallel Genetic Algorithm For Large-Scale Vehicle Routing Problems
Enhancing Graph Partitioning with Reinforcement Learning-based Initialization
D4M 2.0 schema: A general purpose high performance schema for the Accumulo database
Differentiable Graph Centrality
A Graph-Based Algorithm for Optimizing GCC Compiler Flag Settings
TriX: Triangle counting at extreme scale
UniPar: A Unified LLM-Based Framework for Parallel and Accelerated Code Translation in HPC
Constructing Optimal Contraction Trees for Tensor Network Quantum Circuit Simulation
Functionality and Security Co-design Environment for Embedded Systems
A Hybrid Classical-Quantum Model for QSAR-Based Biodegradability Prediction
Realizing Forward Defense in the Cyber Domain
Scaling Regime-Aware Forecasting: Distributed Shifting Seasonal Matrix Factorization
A Survey on Hardware Security Techniques Targeting Low-Power SoC Designs
Sparse Deep Neural Network Exact Solutions
Exploring the Impacts of Software Cache Configuration for In-line Compressed Arrays
Fast Graphlet Transform of Sparse Graphs
InfraredGP: Efficient Graph Partitioning via Spectral Graph Neural Networks with Negative Corrections
Multi-modal sensor registration for vehicle perception via deep neural networks
Fast linear algebra-based triangle counting with KokkosKernels
Advantages to modeling relational data using hypergraphs versus graphs
A Hardware Root-of-Trust Design for Low-Power SoC Edge Devices
Productive High-Performance k-Truss Decomposition on GPU Using Linear Algebra
Parallel Quasi-Concave Set Function Optimization for Scalability Even Without Submodularity
A novel fast modular multiplier architecture for 8, 192-bit RSA cryposystem
Sparse matrix partitioning for parallel eigenanalysis of large static and dynamic graphs
GPU accelerated, robust method for voxelization of solid objects
Optimizing simulation speed of FPGA model-based synthesis
Scalability of Streaming on Migrating Threads
Sparse Deep Neural Network Acceleration on HBM-Enabled FPGA Platform
Design and Implementation of a Dynamic Information Flow Tracking Architecture to Secure a RISC-V Core for IoT Applications
An Efficient LP Rounding Scheme for Replica Placement
Hardware-Accelerated Transformer Framework for Real-Time Battery SoH Estimation
Embedded Compute Matrix Processing and FFTs using Floating Point FPGAs
LLM Inference Serving: Survey of Recent Advances and Opportunities
Spatial Temporal Analysis of 40, 000, 000, 000, 000 Internet Darkspace Packets
A fast, energy-efficient abstraction for simultaneous breadth-first searches
Benchmarking Deep Learning Classifiers for SAR Automatic Target Recognition
DBOS Network Sensing: A Web Services Approach to Collaborative Awareness
Garbled Circuits in the Cloud using FPGA Enabled Nodes
Efficient and accurate Word2Vec implementations in GPU and shared-memory multicore architectures
The K-Core Decomposition Algorithm Under the Framework of GraphBLAS
Automated Indexing Of TEM Diffraction Patterns Using Machine Learning
A Framework for Analyzing the Performance of Sparse Matrix and Graph Operations
Fast Large-Scale Algorithm for Electromagnetic Wave Propagation in 3D Media
Energy performance of FPGAs on PERFECT suite kernels
SCoDa: Scalable Community Detection in Data Streams
Training Behavior of Sparse Neural Network Topologies
Towards Just-in-Time Instruction Generation for Accelerated Sparse Matrix-Matrix Multiplication on GPUs
A Survey and Taxonomy of Blockchain-based Payment Channel Networks
Accelerating Dynamic Image Graph Construction on FPGA for Vision GNNs
IEEE High Performance Extreme Computing Conference, HPEC 2013, Waltham, MA, USA, September 10-12, 2013
Accelerating Multi-Agent DDPG on CPU-FPGA Heterogeneous Platform
GPU Accelerated Construction of Time Respecting Data Structure for Temporal Graphs
A quantitative and qualitative analysis of tensor decompositions on spatiotemporal data
Deploying AI Frameworks on Secure HPC Systems with Containers
An Analysis of Energy Requirement for Computer Vision Algorithms
Using a Power Law distribution to describe big data
HyKernel: A Hybrid Selection of One/Two-Phase Kernels for Triangle Counting on GPUs
Reconfigurable Hardware Root-of-Trust for Secure Edge Processing
Big snapshot stitching with scarce overlap
Superstrider associative array architecture: Approved for unlimited unclassified release: SAND2017-7089 C
Benchmarking Heterogeneous HPC Systems Including Reconfigurable Fabrics: Community Aspirations for Ideal Comparisons
Performance Assessment of Hybrid Parallelism for Large-Scale Reservoir Simulation on Multi- and Many-core Architectures
Active Learning Pipeline for Brain Mapping in a High Performance Computing Environment
Scheduler technologies in support of high performance data analysis
GPU-Accelerated, Mixed Precision GMRES(m) with Varied Restarts
Sparse Deep Neural Network Graph Challenge
Edge-Connected Jaccard Similarity for Graph Link Prediction on FPGA
An Ensemble Classifier Based on Feature Selection Using Ant Colony Optimization
A Novel Approach to Cyber Situational Awareness in Embedded Systems
Exploring the Tradeoff Between Reliability and Performance in HPC Systems
Streaming Detection and Classification Performance of a POWER9 Edge Supercomputer
AC922 Data Movement for CORAL
A mechanism to improve the performance of hybrid MPI-OpenMP applications in grid
The BigDAWG polystore system and architecture
MonoCoder: Domain-Specific Code Language Model for HPC Codes and Tasks
A Scalable Inference Pipeline for 3D Axon Tracing Algorithms
Cluster-based 3D reconstruction of aerial video
Optimal GPU Frequency Selection using Multi-Objective Approaches for HPC Systems
IRIS-MEMFLOW: Data Flow-Enabled Portable Memory Orchestration in IRIS Runtime for Diverse Heterogeneity
Triangle Counting with Cyclic Distributions
Automatic Differentiation for Inverse Problems with Applications in Quantum Transport
A top-down scheme of descriptive time series data analysis for healthy life: Introducing a fuzzy amended interaction network
Systems design of cybersecurity in embedded systems
Enhancing the Real-Time Solutions of Parametric Linear Systems on a GPU through Hybrid Coarse-Grained Transprecision Computing
Fast Spectral Graph Partitioning with a Randomized Eigensolver
Parallel motion estimation and GPU-based fast coding unit splitting mechanism for HEVC
IEEE High Performance Extreme Computing Conference, HPEC 2025, Wakefield, MA, USA, September 15-19, 2025
Computing In-Place FFTs with SIMD Lane Slicing
LU, QR, and Cholesky factorizations: Programming model, performance analysis and optimization techniques for the Intel Knights Landing Xeon Phi
Cycle-Stealing in Load-Imbalanced HPC Applications
pc-COP: An Efficient and Configurable 2048-p-Bit Fully-Connected Probabilistic Computing Accelerator for Combinatorial Optimization
LLMs in Crisis Triage: Benchmarking Zero-Shot Classification of Social Media
Serving Machine Learning Inference Using Heterogeneous Hardware
Partition-based Surface Code Compilation
SARComp: High-Performance Algorithms for SAR Processing from FFT Kernels to Matched Filtering
Automating Harmonized System (HS) Code Classification from Unstructured Shipping Manifests using Large Language Models
Enhancing HPC security with a user-based firewall
The Genomic Computing Revolution: Defining the Next Decades of Accelerating Genomics
Systolic Array based FPGA accelerator for Yolov3-tiny
Large Scale Parallelization Using File-Based Communications
Implementing the Jaccard Index on the Migratory Memory-Side Processing Emu Architecture
Truss decomposition on shared-memory parallel systems
Lincoln AI Computing Survey (LAICS) Update
Machine Learning at the Edge Using Neural Network Processor
Augmenting HPC Profilers with Analysis Capabilities
p-YOLOv8: Efficient and Accurate Real-Time Detection of Distracted Driving
Hybrid Approach to HPC Cluster Telemetry and Hardware Log Analytics
Survey and Future Trends for FPGA Cloud Architectures
Accelerating GNN-Based SAR Automatic Target Recognition on HBM-Enabled FPGA
Modeling Data Movement Performance on Heterogeneous Architectures
A clustered manycore processor architecture for embedded and accelerated applications
A Highly Scalable Parallel Design for Data Compression
Graph Algorithms in PGAS: Chapel and UPC++
Real-time lane departure and front collision warning system on an FPGA
Scaling of Evolutionary Search of Algorithm Space to Speed-Up Scientific Image Understanding Workflows
Accelerating Sparse Deep Learning via Multi-Layer Tensor Reordering and Partitioning
Prism: Practical In-Memory Acceleration for Subgraph Matching at Scale
Towards the FAIR Asset Tracking Across Models, Datasets, and Performance Evaluation Scenarios
Fast GPU Graph Contraction by Combining Efficient Shallow Searches and Post-Culling
Multiscale Data Analysis Using Binning, Tensor Decompositions, and Backtracking
Multi-Stage Stochastic Programming for Heavy-Duty Electric Truck Routing Under Public Charging Congestion Uncertainty
Timing-based side-channel attack and mitigation on PCIe connected distributed embedded systems
GraphChallenge.org: Raising the Bar on Graph Analytic Performance
A Time-Aware Sliding Window-Based Hotel Recommendation Framework Using Multi-Stage BERT-MRC
Constant-Memory Graph Coarsening
IEEE High Performance Extreme Computing Conference, HPEC 2023, Boston, MA, USA, September 25-29, 2023
Hierarchical clustering and k-means analysis of HPC application kernels performance characteristics
Enhanced Parallel Simulation for ACAS X Development
OpenCL Performance on the Intel Heterogeneous Architecture Research Platform
Adaptive routing in hexagonal torus interconnection networks
Towards parallel implementation of associative inference for cogent confabulation
Generating massive complex networks with hyperbolic geometry faster in practice
Discovering $k$-Trusses in Large-Scale Networks
Optimized task graph mapping on a many-core neuromorphic supercomputer
Efficient Sparse Matrix-Vector Multiplication on Intel PIUMA Architecture
Fault Tolerance Performance Evaluation of Large-Scale Distributed Storage Systems HDFS and Ceph Case Study
Using RAPIDS AI to Accelerate Graph Data Science Workflows
Driving big data with big compute
Spike-Driven YOLO: Ultra Low-Power Object Detection with Neuromorphic Computing
ANEDA: Adaptable Node Embeddings for Shortest Path Distance Approximation
Deep Gaussian process with multitask and transfer learning for performance optimization
A Fully Adaptive Radau Method for the Efficient Solution of Stiff Ordinary Differential Equations at Low Tolerances
Hardware-efficient compressed sensing encoder designs for WBSNs
Improving the performance of graph analysis through partitioning with sampling
What is Normal? A Big Data Observational Science Model of Anonymized Internet Traffic
Application of Virtual Client for Azure Hardware Qualification
A Deep Q-Learning Approach for GPU Task Scheduling
Accelerating fully homomorphic encryption using GPU
The Robustness of Modern Deep Learning Architectures against Single Event Upset Errors
High-Performance Triangle Counting on GPUs
Evaluating energy efficiency of floating point matrix multiplication on FPGAs
Multilevel Diffusion Based Spectral Graph Clustering
Creating a Dataset for High-Performance Computing Code Translation using LLMs: A Bridge Between OpenMP Fortran and C++
A case study of OpenCL on an Android mobile GPU
Large-scale Sparse Tensor Decomposition Using a Damped Gauss-Newton Method
HARDROID: Transparent Integration of Crypto Accelerators in Android
Accelerating a novel particle-based fluid simulation on the GPU
Interrogating the performance of quantum annealing for the solution of steady-state subsurface flow
Distributed Direction-Optimizing Label Propagation for Community Detection
A Multilevel Approach for Solving Large-Scale QUBO Problems with Noisy Hybrid Quantum Approximate Optimization
A look into a GraphBLAS Entry Point into an LLVM Lowering Pass, with A Precision Formatting Example
Exploiting GPU with 3D Stacked Memory to Boost Performance for Data-Intensive Applications
Ultra Low Latency Hardware Optimised Radix-4 FFT for Optical Wireless FPGA Transceivers Via Hermitian Symmetry Characteristics
Heterogeneous Cache Hierarchy Management for Integrated CPU-GPU Architecture
Designing Algorithms for the EMU Migrating-threads-based Architecture
VF2-PS: Parallel and Scalable Subgraph Monomorphism in Arachne
Overcoming Limitations of GPGPU-Computing in Scientific Applications
An FPGA Decision Tree Classifier to Supervise a Communication SoC
Image Segmentation with Topological Priors
Accelerating NTRU based homomorphic encryption using GPUs