yusuke1997/dblp-id-title huggingface dataset:
Design and Fabrication of 860V SiC Trench MOSFET with Stripe and Rectangular Cells
A Pixel-Parallel Array Processor without Computational Logic for Computational Image Sensors
A Novel Configurable High-precision and Low-cost Circuit Design of Sigmoid and Tanh Activation Function
A Genuine-Equilibrium Monte Carlo Sampling-Based Effective Algorithm for Fully-Connected Ising Models
Fast and Accurate Alignment and Bonding System Based on Advanced Packaging Technology
An Ultra-Low Power Timing Based OOK Modulation CMOS Transmitter Applied in RF-Powered Temperature Sensor Node
A 1.1-V 26.2-ppm/°C Sub-Bandgap Voltage Reference with 6.5-nW Power Consumption Composed of Subthreshold CMOSs and Single BJT
High-Efficiency Class-B/F W-Band Balanced Frequency Sixtupler in GaN HEMT Technology
An Ultra-low Power Consumption Dual-Output Subthreshold CMOS Voltage Reference
The Effect of High Temperature Ion Implantation on the Performance of 1.2kV 4H-SiC MOSFETs
A 11.2-17.5 GHz Continuous Class-F Power Amplifier with Balanced 8-Ways Harmonic Tuning Achieving 30.3dBm Pout and 32% PAE
Invited Paper: Area Efficient Low Power Data Transmission Circuit with Analog Differential Data Selector for CMOS Image Sensor
A 0.81 ppm/°C, 11.7 μA Voltage Mode Bandgap Reference with Vth-based Piecewise Compensation
A 44-52 GHz Reflection-type Phase Shifter with 1.4° Phase Resolution in 28nm CMOS Process
TSV Defects Classification with Machine Learning Approaches
A Low-latency NoC Router Priority Scheme for BFS algorithm
INVITED PAPER: An Energy-Efficient and Reconfigurable DNN Accelerator for Optic-Fiber based Edge Sensing and Computing
A Pseudo 943 million Frames Per Rate High-Speed Camera with Asynchronous Double-Frame Exposure for Motion Estimation
A Fully-integrated 110-GHz Wideband Direct-detection Imaging Unit MMIC Integrating Balanced Power Detector and Log-periodic Antenna
A High Linearity Driver with a Wide Common-Mode Voltage Range in 130-nm BiCMOS
A 62μW CMOS Programmable Gain Amplifier with Reused Current and Resistor-Ladder Achieving 37.8dB Peak Gain and 1.5GHz GBW
An Event-Driven Charge Pump Based OCL-LDO with 410nA IQ and 30ns Recovery Time
An improved QPZD Ids, GV model for 0.1μm AlGaN/GaN HEMTs Process
A Low Supply Sensitivity CMOS Temperature Sensor Using Dynamic-Distributing-Bias Circuit
A 92.7% Peak Efficiency 48/1V DSD Power Converter with 102mV Droop and 1.6µs Settling Time for a 1A/10ns Load Transient
Prediction of Key Metrics of Stacked Nanosheet nFETs using Genetic Algorithm-based Neural Networks
A Compact Frequency Servo SoC with Background Output Power Calibration for Miniaturized Atomic Clocks
Specialized Accelerator for Matrix Operation in Robotic Controllers
A 41-GHz 19.4-dBm PSATCMOS Doherty Power Amplifier for 5G NR Applications
A Reconfigurable Area and Energy Efficient Hardware Accelerator of Five High-order Operators for Vision Sensor Based Robot Systems
Miniaturization of 5G N77 Bandpass Filter with HR-Si IPD Technology
A Reconfigurable CMOS Rectifier for 905-MHz RF Energy Harvester with Omnidirectional Monopole Antenna
A 47K Noise Temperature CMOS S-band LNA for Cryogenic Applications
Edge-type High-speed Intelligent Infrared Pre-processor
A High Accuracy & Low Power EDR Estimation Processor for Wearable Devices
A 100-Gb/s PAM-4 CTLE in 28-nm CMOS with Coarse-Fine Gain Adjustment
HARNS: High-level Architectural Model of RRAM based Computing-in-memory NPU
AttenTPU: Tensor Processor for Attention Mechanism with Fine-Grained Padding
A High Frequency Two-Stage Multilevel Converter with a Wide Output Range
A 28GHz Bi-direction Transceiver with Temperature Compensation
Resonant Gate Driver for High Speed GaN HMET with dV/dt Control
An Analytical Model of Energy Band Considering Drain Doping Effect of TFET With Exponential Barrier
A Split-Ring Resonator with Interdigitated Electrodes Aimed at the Dielectric Characterization of Liquid Mixtures (Invited Paper)
Towards Energy-Efficient Asynchronous Circuit Design with Flip-Flop-to-Latch Replacement
A Calibration-Free Low Spur Multi-Phase Sampling PLL
A 250Mbps 100kV/µs CMTI On-Chip Double-Isolated Transformer-Based Digital Isolator
A Compact 60 GHz LNA with 22.7-dB Gain and 4.4-dB NF in 40nm CMOS
A Current Domain Computing-in-Memory SRAM Macro with Hybrid IAF-SAR ADC for Signal Margin Enhancement
A Four-Channel Clocked-Analog Time-Division Multiplexed LDO with Shared Compensation Capacitor for Thermal-Optic Phase Tuning
A Low-Noise Analog Frontend with Large PD Capacitance Tolerance in 65-nm CMOS for Optical Receivers
Opto-Electronic Monolayer ZnO Memristor Produced via Low Temperature Atomic Layer Deposition
A 24V-to-20V Isolated DC-DC Converter with Negative Output Voltage and Continuous Random Spread-Spectrum Modulation Technique
A Novel Area-Efficient Fast CORDIC for Energy-efficient Adaptive Exponential Integrate and Fire Neuron Design
Highly Linear Receiver Analog Front-end for High-speed Optical Communication
A 11 mV-Undershoot PT Controlled Buck Converter with Adaptive Pulse Train Generator
A 10MHz Buck Converter with Type-III Control and Transient Enhancement Transistor
A 0.61 nJ/bit Scheduled Wake-Up Transmitter for Wireless Body Area Networks Application
A Compact 76-81 GHz Transceiver Front-End for Automotive Radar in 40-nm CMOS
Hardware Resource and Computational Density Efficient CNN Accelerator Design Based on FPGA
A Configurable EEG Procesing Driver Chip for Wireless Wearable Devices
130 GBaud PAM-4 1-to-4 Analog Demultiplexer for Wireline and Optical Receivers in 130-nm SiGe
A Ternary Memristive Logic-in-Memory Design for Fast Data Scan
A 1.76 fj/Conv 1.49µW 12-Bit SAR ADC with Coarse and Fine Quantization for Implantable BCI Applications
A 0.6-8.1 GHz, 2 dB NF inductorless LNTA in 22 nm CMOS with novel bandwidth extension technique
A 39GHz Divide-by-8 LC-Ring ILFD Designed for 5G New Radio n260 Band
Invited Paper: A Memristor-Based Stateful Majority-Inverter Graph Logic and 1-Bit Full Adder for In-Memory Computing Systems
High Energy-Efficient Approximate In-SRAM Computing with Bit-Wise Compressor Configuration and Data-Aware Weight Remapping Method for Neural Network Acceleration
Spice-Compatible Modeling of Double Barrier MTJ for Highly Reliable Circuits
A Low-Power RC Oscillator with Offset and Path Delay Cancellation
An Enhanced 128-bit Asynchronous Authentication and Data Encryption Circuits for loT Sensor Applications
A Design of 16TOPS Efficient GEMM Module in Deep Learning Accelerator
A Fast-Settling Hybrid Adaptive On-Off-Delay Compensation for Series-Series Wireless Power Receivers
A Ka-Band CMOS Switched-Type Phase Shifter with Low Gain Error
Design of Polymer Bonding Scheme and its Application for Triboelectronic Nanogenerator Integration
A Battery-Free Wireless Temperature Sensing Chip for Food Monitoring
A 0.45-V 3.3-µW Resistor-Based Temperature Sensor Achieving 10mK Resolution in 65-nm CMOS
CVD Monolayer tungsten-based PMOS Transistor with high performance at Vds = -1 V
A Fully Differential Ultra-Compact and High Isolation Transformer-Based Wilkinson Power Divider
Novel Split-Gate SiC MOSFETs with Fast Switching Performance
A 22nm Variation-Tolerant Clock Duty-Cycle Controller for Mitigating Aging-Induced Clock Duty-Cycle Distortion with Path Replica
A Portable Accelerator of Proximal Policy Optimization for Robots
A parametric model for a high speed heterogeneous current-steering digital-to-analog converter based on compiled Verilog-A and SPICE
A 20~20 KHz Active Rectifier with Adaptive Delay Time Control and 1000X Frequency Detecting Techniques for Acoustic Wave Energy Harvesting
A Rugged 1200V P-channel LDMOS in Bipolar-CMOS-DMOS Process with Global Potential Control Technology
A 16Gb/s Triple-Mode Driver in 0.18μm CMOS Technology
A 16MHz RC Oscillator with a Frequency Inaccuracy of 24ppm/°C from -40°C to 125°C Adopting Only Positive Temperature Coefficient Resistors
INVITED PAPER: A 21.5-to-37 GHz Series Doherty CMOS Power Amplifier with Distributed Multi-step Impedance Inverting Network Achieving 28.2%/23.2%/13.2% Peak/OP1dB/6dBPBO PAEs
A 0.0048mm 2 0.43-to-1.0V 0.54-to-1.76GHz Bias-Current-Free PLL in 14nm FinFET CMOS
A Nonlinearity-Calibration-Free Reconfigurable ADPLL for General Purpose Frequency Modulation
A 28GBaud High-Swing Linear Mach-Zehnder Modulators Driver for PAM-4 and Coherent Optical Communications
A Compact and Robust 28nm CMOS Temperature Sensor with Machine Learning Assisted Design for DVFS SoC
A 12bit 100fs Resolution Multi-Stage Digital-to-Time Converter with Dynamic Element Matching
A Charge Pump Based 1.5A NMOS LDO with 1.0~6.5V Input Range and 110mV Dropout Voltage
Fourier-LSTM on the Edge: Elevating Genome Sequencing Performance on the Portable Devices
A 250-kHz-BW 15.8-ENOB 2nd-Order Noise-Shaping SAR ADC With Multi-Path-Input Floating Inverter Amplifier
Electro-Magnetic Field Study on Skin Effect Suppression of Metal/Ferromagnet Superlattice Conductors
A statistics-based background capacitor mismatch calibration algorithm for SAR ADC
A 6-18GHz Low-Noise Amplifier Using Noise Canceling Technique in 130-nm CMOS PD-SOI
A Symmetric Multilayer GeSe/GeSeSbTe Ovonic Threshold Switching Selector with Improved Endurance and Stability
Electrostatic Characteristics Analysis of Ferroelectric Tunneling Junctions with Different Structures
A Dipole Antenna with 2-Stage Cross-Coupled Active RBR for 2.45 GHz Energy Harvesting Application
Ultrafast Pulse Signal Detection Based on a Dual-transistor Structure
Machine Learning-assisted Multiobjective Optimization of Tin-based Perovskite Polycrystals
A 28/56 Gb/s NRZ/PAM-4 Dual-Mode Transceiver in 28-nm CMOS
An Ultra-wideband Low Noise Amplifier Design in 0.13-um CMOS Technology
A Single-input Dual-output Three-level Buck Converter for SoC Applications
A 20W Ka-Band Dual-Port Power Amplifier for Communication Satellites
A 0/-5V High-Voltage Driver with Non-Overlapping Inverted Outputs in 65-nm CMOS Technology
An Intelligent Memory Architecture with LPDDR4 Extensions for Edge Generative AI Inference
A Low Frequency Drift LC-DCO with Wide Temperature Range
A Power Management Circuit for Dual Energy Sources Harvesting Self-Powered System
A Biofuel-Cell-based Energy Harvester with 91% Peak Efficiency and Inherent Biosensor
In-MRAM Computing Elements with Single-Step Convolution and Fully Connected for BNN/TNN
Simple-Logic Comparator-Offset Mitigation Technique for Resistor-Based Temperature Sensor in DFLL
A Data Non-destructive IMPLY-based Memristive Semi-parallel Full-Adder for Computing-in-memory Systems
A 0.3-µW, 2.1-µVrms Neural Recording Chopper Amplifier with Low Noise DC-Servo-Loop
Radiation Hardened Design of STT-MRAM with High Recoverability from Double Node Upset
Formation Mechanism of high Ni content (Cu, Ni)6Sn5 in Cu/Sn/Ni microbump for solid state aging
A FinFET Integrated STT-MRAM with Triple Balanced Access Strategy
A 1∼10MHz Cryo-CMOS Analog Baseband Circuit Achieving 50dB Peak Gain for Superconducting Qubit Readout
A Novel Segmented Temperature Monitor for Adaptive MRAM
Using Word Line (WL) Interference to Reduce Refresh Operations on 3D NAND Flash System
A 100mV Input Voltage, Multi-step Self-Startup Boost Converter Achieving 50X Voltage Step-up with Standard 0.18 μm CMOS Process for Energy Harvesting application
Photoresponses and Memory Effects in Optoelectronic Synaptic Devices Based on CdSe Quantum Dots and Poly(3-hexylthiophene)
Hardware Trojans detection based on BP neural network
An Adaptively-controlled High-efficiency Buck Converter with Wide Dynamic Range for IoT Applications
A 0.7-V Clock-gating Cell with Power Gating Technology and 1.56-pA Sleep Power
A High Reliability Sensing Amplifier for Hybrid MTJ/CMOS Circuits
Towards Intelligent-Edge Computing: Application, Architecture, Circuit, and Device Perspective
A fully digital mismatch calibration algorithm for Time-Interleaved ADCs
A Novel Design of Double Gain Boosting Inductor Cascode Amplifier at Near-fmax Frequencies
A 12bit 160MS/s Pipelined SAR ADC with a MOS Self-Biased Cascoded Ring Amplifier
A 25nA IQ, 20mA ILOAD OCL-LDO for Battery-Powered IoT Devices
A Ultra-low-power Wake-up Wireless Transmitter for Bio-luminescence Detection in Ingestible Capsules
Low-Latency FPGA Design and Implementation of Hermitian Matrix Inversion Based on Partitioned Systolic Array for Massive MIMO
An Adaptive AFE Circuit to Minimize the Zero-Flow Error in Transit-Time Ultrasonic Water Flowmeter
AIGaN-Based DUV Micro-PDs and Micro-LEDs: Achieving Superior Emission and Detection Performance Simultaneously
A Wideband LNA with Gm-Boosted and Noise Cancel Technique
Thermal Stress and Impact Factors for the Embedded Silicon Bridge (EMIB) in a Chiplet Package
An Automatic Hardware Generator for CNN Accelerator on FPGA with Efficient Resource Allocation
A 28nm, 4.69TOPS/W Training, 2.34µJ/lmage Inference, on-chip Training Accelerator with Inference-compatible Back Propagation
High-resolution Stereo-vision Depth Processor with Min-pooling Method
A 41μA Direct Frequency Modulation IC for Indoor Voice Broadcast in LF Band with Background Frequency Calibration
W-band Amplifiers in 0.1 μm GaAs
Optical Receiver Front-End for 50G PON in 40nm CMOS
Fully Pipelined Number Theoretic Transform and Reordering Solution for CRYSTALS-Dilithium
Low-Voltage High-Linearity Differential Input Buffer with CurrentAmplifier Feed-Forward Compensation for High-Speed ADCs
A 2.0-to-4.9 ppm/°C Bandgap Voltage Reference with Source-Sink Current Compensation for BMIC
Temperature-Adaptive MRAM Sensing Using Varied Magneto-Resistance
Pulsed Operation on HfO2/Al2O3 RRAM Device as Electronic Dendrite
A Transformer-Based End-to-End Network for Unmanned Aerial Vehicle Aerial Image Object Detection
A Simplified Polynomial Behavioral Model for Linearization of Envelope Tracking Power Amplifier
Pseudo-NMOS Logic Circuits using ITO-Stabilized ZnO TFTs
A Bio-Impedance Measurement Chip Design with AC Current Outputs
A 32×32 Array Terahertz Sensor in 65-nm CMOS Technology
A High-Linearity, Energy-Efficient Switched-Capacitor Computing Circuit for Edge Applications
A 834 pW CMOS Voltage and Current Reference Working from 0°C to 120°C
A 1000 fps Spiking Neural Network Tracking Algorithm for On-Chip Processing of Dynamic Vision Sensor Data
A 56Gb/s De-serializer with PAM-4 CDR for Chiplet Optical-I/O
Compact Modeling and Analysis of a Typical Inter-Chiplet Serial High Speed Link on an Active Interposer
An Ultra-low Power Relaxation Oscillator with Novel Ultra-low Leakage Switch and Temperature-compensated Resistor
An Analog-Assisted Digital LDO with 0.37mV Output Ripple and 5500x Load Current Range in 180nm CMOS
Strain-regulated flexible molecular sensors enabled by 2D PtTe2
A Practical ROI and Object Detection Method for Vision Robot
Analysis of Memristive Quantized Convolutional Neural Network Accelerator with Device Nonideality
Heart Rate Monitoring Using FMCW Radar with Dilated Convolutions and Residual Blocks
EDF schedulability test for the E-TDL time-triggered framework
A digital receiver architecture for RFID readers
Keynote Talks: Requirements on E/E-system architecture for future car concepts - Example eMobility with project RACE
IEEE Fifth International Symposium on Industrial Embedded Systems, SIES 2010, University of Trento, Italy, July 7-9, 2010
Towards implementation of Virtual-Clustered multiprocessor scheduling in Linux
Refactoring an Automotive Embedded Software Stack using the Component-Based Paradigm
SoC-level risk assessment using FMEA approach in system design with SystemC
Binary protection framework for embedded systems
Further analysis on blocking time bounds for partitioned fixed priority multiprocessor scheduling
Automating the design flow for distributed embedded automotive applications: Keeping your time promises, and optimizing costs, too
Multitask implementation of synchronous reactive models with Earliest Deadline First scheduling
Periodic charging scheme for fixed-priority real-time systems with renewable energy
Parameter-Aware Energy Models for Embedded-System Peripherals
Implementation of Discrete Wavelet Transform for Embedded Applications using TMS320VC5510
Network Calculus-based Timing Analysis of AFDX networks with Strict Priority and TSN/BLS Shapers
B-Live - A Home Automation System for Disabled and Elderly People
Formal timing analysis of automatic repeat request for switched real-time networks
Exploration of a digital audio processing platform using a compositional system level performance estimation framework
A Formal Description Technique for Interactive Cockpit Applications Compliant with ARINC Specification 661
Services discovery and composition in Intelligent Environments for mobile devices
A Timed Multitasking Architecture for Distributed Embedded Systems
Schedulability analysis of on-board satellite software based on model-driven and compositionality techniques
Prioritization for real-time embedded systems on dual-core platforms by exploiting the typical- and worst-case execution times
Implementation of an efficient RDMA mechanism tightly coupled with a TCP/IP offload engine
Flexible spin-lock model for resource sharing in multiprocessor real-time systems
A middleware for reliable soft real-time communication over IEEE 802.11 WLANs
The impact of time-triggered communication in automotive embedded systems
Modelling the confidence of timing analysis for time randomised caches
Verification of a CAN bus model in SystemC with functional coverage
Automated Conflict-free distributed implementation of component-based models
Automated Authentication Credential Derivation for the Secured Configuration of IoT Devices
Towards an efficient approach for resource sharing in real-time multiprocessor systems
Minimizing the aperiodic responsiveness in energy harvesting devices
Minimizing expected energy consumption for streaming applications with linear dependencies on chip multiprocessors
Real-time DRAM throughput guarantees for latency sensitive mixed QoS MPSoCs
Scheduler-based Multi-Bank Main Memory Configuration for Energy Reduction
Inter-task WCET computation for a-way instruction caches
Coexistence of Time-Triggered and Event-Triggered Traffic in Switched Full-Duplex Ethernet Networks
A self-adaptive approximate interpolation scheme for dense sensing
Test profiling for usage models by deriving metrics from component-dependency-models
Mixed-criticality systems based on time-triggered ethernet with multiple ring topologies
Towards runtime testing in automotive embedded systems
SOAcom: Designing Service communication in adaptive automotive networks
Optimized software mapping for advanced driver assistance systems
Powerline Communication System for Monitoring and Supervision of Feeder Equipments for MV Substation Automation
A formal approach for the synthesis and implementation of fault-tolerant industrial embedded systems
Modelling bus contention during system early design stages
Generative programming with support for formal verification
Comparison between RT scheduling techniques for Bluetooth Networks in DPCSs
PyoT, a macroprogramming framework for the Internet of Things
Enhancing security in CAN systems using a star coupling router
Efficient Map Overlay for Safety-Critical Embedded Systems
A Protocol Performance Comparison in Modular WSNs for Data Center Server Monitoring
Temperature-aware DVFS-DPM for real-time applications under variable ambient temperature
Efficient FPGA Implementation of Equalizer for Finite Interval Constant Modulus Algorithm
Ad-Astra: Towards A Reliable Edge Runtime Environment for Intelligent Connected Vehicles
14th IEEE International Symposium on Industrial Embedded Systems, SIES 2024, Chengdu, China, October 23-25, 2024
Generation of simulink monitors for control applications from formal requirements
RoboArch: A component-based tool proposal for developing hardware architecture for mobile robots
Improving the tests coverage of a medium voltage protection device using system simulation approaches
Compositional Translation of Simulink Models into Synchronous BIP
Augmenting sensitivity analysis for embedded applications by program level derivation of process parameters
Designing embedded systems with MARTE: A PIM to PSM converter
Design and Implementation of a WirelessHART Simulator for Process Control
Budgeting Processing Graphs Under Restricted Parallelism
Global schedulability analysis of a synchronization protocol based on replenishment-bounded overrun for compositional real-time systems
A driver model based on Linux for TinyOS
LISPARC: Using an architecture description language approach for modelling an adaptive processor microarchitecture
A modular fast simulation framework for stream-oriented MPSoC
Control-flow error detection using combining basic and program-level checking in commodity multi-core architectures
On the control of lossy networks with hold strategy
On the analysis of EDF-VD scheduled mixed-criticality real-time systems
Towards a Hardware Accelerated Obstacle Avoidance System for Mobile Robots using Monocular Vision
Research on Predictive Control Technology and Analysis Method of High-Frequency Ultrasound System in Rehabilitation Scenarios
Splitting tasks for migrating real-time automotive applications to multi-core ECUs
A Formal Framework for the Correct-by-construction and Verification of Distributed Time Triggered Systems
Probabilistic analysis of cache memories and cache memories impacts on multi-core embedded systems
Deadline-Aware Scheduling Policies for Bluetooth Networks in Industrial Communications
EventQueue: An Event based and Priority aware Interprocess Communication for Embedded Systems
Protocols for Active RFID - The Energy Consumption Aspect
Keynote talks
Scheduling parallel real-time tasks using a fixed-priority work-stealing algorithm on multiprocessors
Combining instruction set simulation and WCET analysis for embedded software performance estimation
Fail-operational in safety-related automotive multi-core systems
Analysis of the IEEE 802.15.4 Standard for a Wireless Closed Loop Control System for Heavy Duty Cranes
Co-simulation of embedded systems in a heterogeneous MoC-based modeling framework
WCET analysis methods: Pitfalls and challenges on their trustworthiness
Predictive Fail-Safe Improving the Safety of Industrial Environments through Model-based Analytics on hidden Data Sources
Robustness in real-time systems
Protocol Modelling Semantics for Embedded Systems
Modeling and real-time control of an industrial air multi-compressor system
Control in Multi-Motor Electric Vehicle with a FPGA platform
Hierarchical traffic shaping and frame packing to reduce bandwidth utilization in the AFDX
Estimating Latencies of Task Sequences in Multi-Core Automotive ECUs
Hardware Assisted Full Time Synchronization of EtherCAT Network with Cable Redundancy
Contract-based dynamic task management for mixed-criticality systems
A performance study of Audio Video Bridging in aeronautic Ethernet networks
Assessment of trace-differences in timing analysis for Complex Real-Time Embedded Systems
Robustness in analog systems: Design techniques, methodologies and tools
Simulation Model and Environment for Mixed-Criticality Networked Multi-Core Chips
Spatial prediction of wireless links and its application to the path control of mobile robots
Air Cargo Monitoring: A Robust Tamper Detection and Reliable Communication System
Implementation and empirical comparison of partitioning-based multi-core scheduling
Probabilistic model of AFDX frames reception for end system backlog assessment
Portability analysis of an M-JPEG decoder IP from OpenCores
Embedded Systems in Industrial Applications - Challenges and Trends
Enhancing Reliability in IEEE 802.11 Based Real-Time Networks through Transport Layer Retransmissions
Conformance checking for programmable logic controller programs and specifications
Thread-level speculation as an optimization technique in Web Applications - Initial results
System Level Design with UML: a Unified Approach
FPGA-based generic neural network architecture
NoC Monitoring Hardware Support for Fast NoC Design Space Exploration and Potential NoC Partial Dynamic Reconfiguration
Interval training guidance system with music and wireless group exercise motivations
APractical Sub-Optimal Solution for the Dual Priority Scheduling Problem
Real-Time and Embedded System Verification Based on Formal Requirements