yusuke1997/dblp-id-title huggingface dataset:
A 0.8V 0.8mm 2 bluetooth 5/BLE digital-intensive transceiver with a 2.3mW phase-tracking RX utilizing a hybrid loop filter for interference resilience in 40nm CMOS
A 56.4-to-63.4GHz spurious-free all-digital fractional-N PLL in 65nm CMOS
ES3: High-speed communications on 4 wheels: What's in your next car?
A One-Cycle Lock Time Slew-Rate-Controlled Output Driver
9.8 A 50W 98%-Efficiency High-Power Wireless-Charging System with an Acoustic Noise-Reduced Ask Modulation Technique and Internal Hybrid Voltage-/Current-Mode ASK Demodulation
A CMOS Molecular Electronics Chip for Single-Molecule Biosensing
ES2: Brain-machine interfaces: Integrated circuits talking to neurons
26.7 A 280µW 108dB DR Readout IC with Wireless Capacitive Powering Using a Dual-Output Regulating Rectifier for Implantable PPG Recording
27.3 A 3-axis open-loop gyroscope with demodulation phase error correction
A 900MHz UHF RFID Reader Transceiver IC
16.6 PACTOR: A Variation-Tolerant Probing-Attack Detector for a 2.5Gb/s×4-Channel Chip-to-Chip Interface in 28nm CMOS
A 256-Channel 0.227µJ/class Versatile Brain Activity Classification and Closed-Loop Neuromodulation SoC with 0.004mm 2 -1.51 µW/channel Fast-Settling Highly Multiplexed Mixed-Signal Front-End
A 120Gb/s 16QAM CMOS millimeter-wave wireless transceiver
A 14mW 5Gb/s CMOS TIA with gain-reuse regulated cascode compensation for parallel optical interconnects
An 800MHz to 5GHz Software-Defined Radio Receiver in 90nm CMOS
Session 14 overview: Next-generation processing
A 212Gb/s PAM-4 Retimer with Integrated High-Swing Optical Driver and Chip-to-Module Long Reach Capability of 40dB in 5nm FinFET
An 833MHz Pseudo-Two-Port Embedded DRAM for Graphics Applications
A 1V, Micropower System-on-Chip for Vital-Sign Monitoring in Wireless Body Sensor Networks
A 14mW Fractional-N PLL Modulator with an Enhanced Digital Phase Detector and Frequency Switching Scheme
11.2 A 10.8ps-time-resolution 256×512 image sensor with 2-Tap true-CDS lock-in pixels for fluorescence lifetime imaging
A Self-Calibrated 16GHz Subsampling-PLL-Based 30s Fast Chirp FMCW Modulator with 1.5GHz Bandwidth and 100kHz rms Error
A Fractional-N PLL for SONET-Quality Clock-Syntlhesis Applicationis
Session 15 overview: RF PLLs: RF subcommittee
A multi-format Blu-ray player SoC in 90nm CMOS
Session 15 overview: Mm-Wave and THz techniques: RF subcommittee
A 4.1Tb/s bisection-bandwidth 560Gb/s/W streaming circuit-switched 8×8 mesh network-on-chip in 45nm CMOS
30.2 Digital PWM-driven AMOLED display on flex reducing static power consumption
TD: Proximity Data and Power Transmission
A 500MHz Random Cycle 1.5ns-Latency, SOI Embedded DRAM Macro Featuring a 3T Micro Sense Amplifier
Active 2nd-order intermodulation calibration for direct-conversion receivers
30.3 A SAW-Less NB-IoT RF Transceiver with Hybrid Polar and On-Chip Switching PA Supporting Power Class 3 Multi-Tone Transmission
A 125µw, fully scalable MPEG-2 and H.264/AVC video decoder for mobile applications
A Near-Field Modulation Technique Using Antenna Reflector Switching
6.1 12Mb/s 4×4 Ultrasound MIMO Relay with Wireless Power and Communication for Neural Interfaces
14.3 A 0.55V 1.1mW artificial-intelligence processor with PVT compensation for micro robots
20.5 C-Transformer: A 2.6-18.1μJ/Token Homogeneous DNN-Transformer/Spiking-Transformer Processor with Big-Little Network and Implicit Weight Generation for Large Language Models
A 240W Monolithic Class-D Audio Amplifier Output Stage
A 68.3% Efficiency Reconfigurable 400-/800-mW Capacitive Isolated DC-DC Converter with Common-Mode Transient Immunity and Fast Dynamic Response by Through-Power-Link Hysteretic Control
Subharmonically injection-locked PLLs for ultra-low-noise clock generation
A Differential Series-Resonance CMOS VCO with Pole-Convergence Technique Achieving 202.1 dBc/Hz FoMTA at 10MHz Offset
29.1 A 5mW CT ΔΣ ADC with embedded 2 nd -order active filter and VGA achieving 82dB DR in 2MHz BW
A 45nm 4Gb 3-Dimensional Double-Stacked Multi-Level NAND Flash Memory with Shared Bitline Structure
3.5 A 16-to-40Gb/s quarter-rate NRZ/PAM4 dual-mode transmitter in 14nm CMOS
16.1 Tomahawk5: 51.2Tb/s 5nm Monolithic Switch Chip for AI/ML Networking
3.5 A 4mW 45pT/√Hz Magnetoimpedance-Based ΔΣ Magnetometer with Background Gain Calibration and Short-Time CDS Techniques
A Highly Integrated 60GHz CMOS Front-End Receiver
Dual-Tap Pipelined-Code-Memory Coded-Exposure-Pixel CMOS Image Sensor for Multi-Exposure Single-Frame Computational Imaging
22.2 A 1.7mm 2 inductorless fully integrated flipping-capacitor rectifier (FCR) for piezoelectric energy harvesting with 483% power-extraction enhancement
4.4 A 0.36nW/0.9V 32kHz Crystal Oscillator Using Analog Regulation for Cross-Current Avoidance
A Chopper-Stabilized Amplifier with a Relaxed Fill-In Technique and 22.6pA Input Current
22.3 A 42Gb/s Single-Ended Hybrid-DFE PAM-3 Receiver for GDDR7 Memory Interfaces
An APS-C format 14b digital CMOS image sensor with a dynamic response pixel
A 1.9nJ/b 2.4GHz multistandard (Bluetooth Low Energy/Zigbee/IEEE802.15.6) transceiver for personal/body-area networks
A SiGe quadrature transmitter and receiver chipset for emerging high-frequency applications at 160GHz
An adaptive reconfigurable active voltage doubler/rectifier for extended-range inductive power transmission
Session 20 overview: Flash-memory solutions: Memory subcommittee
A [10°C; 70°C] 640×480 17µm pixel pitch TEC-less IR bolometer imager with below 50mK and below 4V power supply
A 430GHz CMOS Concurrent Transceiver Pixel Array for High Angular Resolution Reflection-Mode Active Imaging
A 250GHz Autodyne FMCW Radar in 55nm BiCMOS with Micrometer Range Resolution
A 1.6mW 300mV-supply 2.4GHz receiver with -94dBm sensitivity for energy-harvesting applications
11.1 Dual-MEMS-resonator temperature-to-digital converter with 40 K resolution and FOM of 0.12pJK2
20.6 Fully Integrated Self-Propelling Microrobot in 180nm CMOS with Sub-GHz Parity-Time-Symmetry On-Chip Energy Harvesting and Traveling Wave Electroosmosis Actuation
A Rail-to-Rail 12MS 91.3dB SNDR 94.1dB DR Two-Step SAR ADC with Integrated Input Buffer Using Predictive Level-Shifting
A 1.1V 150GHz amplifier with 8dB gain and +6dBm saturated output power in standard digital 65nm CMOS using dummy-prefilled microstrip lines
22.6 A 2.2GS/s 7b 27.4mW time-based folding-flash ADC with resistively averaged voltage-to-time amplifiers
2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008
An all-digital PLL using random modulation for SSC generation in 65nm CMOS
A 2Gb/s-throughput CMOS transceiver chipset with in-package antenna for 60GHz short-range wireless communication
Bandwidth and power management of glueless 8-socket SPARC T5 system
A 1.9Gb/s 358mW 16-to-256 State Reconfigurable Viterbi Accelerator in 90nm CMOS
MEGA.mini: A Universal Generative AI Processor with a New Big/Little Core Architecture for NPU
A 512-Pixel 3kHz-Frame-Rate Dual-Shank Lensless Filterless Single-Photon-Avalanche-Diode CMOS Neural Imaging Probe
8.4 Radeon RX 5700 Series: The AMD 7nm Energy-Efficient High-Performance GPUs
SC: Hardware approaches to machine learning and inference
14.2 A 502GOPS and 0.984mW dual-mode ADAS SoC with RNN-FIS engine for intention prediction in automotive black-box system
A noise-immune stylus analog front-end using adjustable frequency modulation and linear-interpolating data reconstruction for both electrically coupled resonance and active styluses
32.2 A 14nm Analog Sampling Fractional-N PLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 80fs Integrated Jitter and 93fs at Near-Integer Channels
2.5 A 0.25pJ/b 0.7V 16Gb/s 3-tap decision-feedback equalizer in 65nm CMOS
9.6 A 1/2.3inch 12.3Mpixel with On-Chip 4.97TOPS/W CNN Processor Back-Illuminated Stacked CMOS Image Sensor
Fully Automated Hardware-Driven Clock-Gating Architecture with Complete Clock Coverage for 5nm Exynos Mobile SoC
A Highly Linear High-Power 802.11ac/ax WLAN SiGe HBT Power Amplifier Using a Compact 2 nd -Harmonic-Shorting Four-Way Transformer and Integrated Thermal Sensors
An implantable 455-active-electrode 52-channel CMOS neural probe
Voltage-boosting wireless power delivery system with fast load tracker by ΔΣ-modulated sub-harmonic resonant switching
Dynamic hit logic with embedded 8Kb SRAM in 45nm SOI for the zEnterprise™ processor
A 36mW/9mW power-scalable DCO in 55nm CMOS for GSM/WCDMA frequency synthesizers
32.7 A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth
7.3 A 1000fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array and self-organizing map neural network
A 2.98pJ/conversion 0.0023mm2 Dynamic Temperature Sensor with Fully On-Chip Corrections
3.2 Zen: A next-generation high-performance ×86 core
A 28nm High-κ metal-gate single-chip communications processor with 1.5GHz dual-core application processor and LTE/HSPA+-capable baseband processor
A -242dB FOM and -75dBc-reference-spur ring-DCO-based all-digital PLL using a fast phase-error correction technique and a low-power optimal-threshold TDC
13.7 A 1Tb Density 3b/Cell 3D-NAND Flash on a 2YY-Tier Technology with a 300MB/s Write Throughput
Brain-inspired computing exploiting carbon nanotube FETs and resistive RAM: Hyperdimensional computing case study
11.6 A 1.46mm 2 Simultaneous Energy-Transferring Single-Inductor Bipolar-Output Converter with a Flying Capacitor for Highly Efficient AMOLED Display in 0.5µm CMOS
2.8 A pulse-position-modulation phase-noise-reduction technique for a 2-to-16GHz injection-locked ring oscillator in 20nm CMOS
29.3 A 40Gb/s PAM-4 transmitter based on a ring-resonator optical DAC in 45nm SOI CMOS
A continuous-mode harmonically tuned 19-to-29.5GHz ultra-linear PA supporting 18Gb/s at 18.4% modulation PAE and 43.5% peak PAE
13.7 A reconfigurable sense amplifier with auto-zero calibration and pre-amplification in 28nm CMOS
3.6 An Amplifier-Less CMOS Potentiostat IC Consuming 3.7nW Power all over 129.5dB Dynamic Range for Electrochemical Biosensing
Zero-order control of boost DC-DC converter with transient enhancement using residual current
5.1 A 1.5μW 0.135pJ·%RH 2 CMOS Humidity Sensor Using Adaptive Range-Shift Zoom CDC and Power-Aware Floating Inverter Amplifier Array
28.4 A Monolithic 12.7W/mm 2 Pmax, 92% Peak-Efficiency CSCR-First Switched-Capacitor DC-DC Converter
6.4 A 1-to-3GHz Co-Channel Blocker Resistant, Spatially and Spectrally Passive MIMO Receiver in 65nm CMOS with +6dBm In-Band/In-Notch B1dB
A 0.13μm 1.5V CMOS I/Q Downconverter with Digital Adaptive IIP2 Calibration
A 3.4Mb/s RFID Front-end for Proximity Applications Based on a Delta-modulator
A High-Density Subthreshold SRAM with Data-Independent Bitline Leakage and Virtual Ground Replica Scheme
29.2 A Cryo-CMOS Controller with Class-DE Driver and DC Magnetic-Field Tuning for Color-Center-Based Quantum Computers
16.7 A 40MHz-BW 76.2dB/78.0dB SNDR/DR Noise-Shaping Nonuniform Sampling ADC with Single Phase-Domain Level Crossing and Embedded Nonuniform Digital Signal Processor in 28nm CMOS
A 28fJ/conv-step CT ΔΣ modulator with 78dB DR and 18MHz BW in 28nm CMOS using a highly digital multibit quantizer
1.78mJ/Frame 373fps 3D GS Processor Based on Shape-Aware Hybrid Architecture Using Earlier Computation Skipping and Gaussian Cache Scheduler
A 3.4mW/element Radiation-Hardened Ka-Band CMOS Phased-Array Receiver Utilizing Magnetic-Tuning Phase Shifter for Small Satellite Constellation
A Linear Uplink WCDMA Modulator with 156dBc/Hz Downlink SNR
23.3 A highly integrated smartphone SoC featuring a 2.5GHz octa-core CPU with advanced high-performance and low-power techniques
A 2.4-to-5.2fJ/conversion-step 10b 0.5-to-4MS/s SAR ADC with charge-average switching DAC in 90nm CMOS
Broadband RF and Radar
Adaptively Clock-Boosted Auto-Ranging Responsive Neurostimulator for Emerging Neuromodulation Applications
5.4 A Dynamic Pseudo 4-Tap CMOS Time-of-Flight Image Sensor with Motion Artifact Suppression and Background Light Cancelling Over 120klux
A 345mW heterogeneous many-core processor with an intelligent inference engine for robust object recognition
A Wireless Strain Sensing Microsystem with External RF Power Source and Two-Channel Data Telemetry Capability
Session 17 overview: TX and RX building blocks
Session 4 overview: Harvesting & wireless power
A 1-Tb, 4b/Cell, 176-Stacked-WL 3D-NAND Flash Memory with Improved Read Latency and a 14.8Gb/mm2 Density
A 225mW 28Gb/s SerDes in 40nm CMOS with 13dB of analog equalization for 100GBASE-LR4 and optical transport lane 4.4 applications
A sub-ns response fully integrated battery-connected switched-capacitor voltage regulator delivering 0.19W/mm 2 at 73% efficiency
7.4 A 256b-wordlength ReRAM-based TCAM with 1ns search-time and 14× improvement in wordlength-energyefficiency-density product using 2.5T1R cell
An on-chip resonant-gate-drive switched-capacitor converter for near-threshold computing achieving 70.2% efficiency at 0.92A/mm 2 current density and 0.4V output
3-to-5GHz 4-channel UWB beamforming transmitter with 1° phase resolution through calibrated vernier delay line in 0.13μm CMOS
A 77GHz 4-Element Phased Array Receiver with On-Chip Dipole Antennas in Silicon
A 40-to-80MHz Sub-4μW/MHz ULV Cortex-M0 MCU SoC in 28nm FDSOI With Dual-Loop Adaptive Back-Bias Generator for 20μs Wake-Up From Deep Fully Retentive Sleep Mode
A 400 × 200 600fps 117.7dB-DR SPAD X-Ray Detector with Seamless Global Shutter and Time-Encoded Extrapolation Counter
A 20/10/5/2.5Gb/s Power-scaling Burst-Mode CDR Circuit Using GVCO/Div2/DFF Tri-mode Cells
34.6 A 47.3-to-58.4GHz Differential Quasi-Class-E Colpitts Oscillator Achieving 198.8dBc/Hz FoMT
A versatile recognition processor employing Haar-like feature and cascaded classifier
A 10Gb/s half-UI IIR-tap transmitter in 40nm CMOS
A 1.5V 200MS/s 13b 25mW DAC with Randomized Nested Background Calibration in 0.13μm CMOS
Advanced transmitters for wireless infrastructure
Interleaving ADC's - exploiting the parallelism
Demonstration of integrated micro-electro-mechanical switch circuits for VLSI applications
21.5 A current-mode wireless power receiver with optimal resonant cycle tracking for implantable systems
14.3 A Push-Pull mm-Wave power amplifier with
124Ms/s pixel-pipelined motion-JPEG 2000 codec without tile memory
A 820GHz SiGe chipset for terahertz active imaging applications
A 5.37mW/Channel Pitch-Matched Ultrasound ASIC with Dynamic-Bit-Shared SAR ADC and 13.2V Charge-Recycling TX in Standard CMOS for Intracardiac Echocardiography
Session 2 overview: Processors: Digital architectures and systems subcommittee
13.2 A 3.7mW-RX 4.4mW-TX fully integrated Bluetooth Low-Energy/IEEE802.15.4/proprietary SoC with an ADPLL-based fast frequency offset compensation in 40nm CMOS
A reconfigurable 28/37GHz hybrid-beamforming MIMO receiver with inter-band carrier aggregation and RF-domain LMS weight adaptation
A 45nm SOI embedded DRAM macro for POWER7TM 32MB on-chip L3 cache
Low-voltage analog and mixed-signal CMOS circuit design
A $\boldsymbol{22\mu \mathrm{W}}$ Peak Power Multimodal Electrochemical Sensor Interface IC for Bioreactor Monitoring
A MIMO WiMAX SoC in 90nm CMOS for 300km/h mobility
A 2kV ESD-Protected 18GHz LNA with 4dB NF in 0.13μm CMOS
21.6 A 1.2cm2 2.4GHz self-oscillating rectifier-antenna achieving -34.5dBm sensitivity for wirelessly powered sensors
3.1 A 121.3dB-DR, 115dB-PSNR, Digital-Input Capacitive-Feedback Class-D Audio Amplifier with Double-Sided Voltage-Boosting (DSVB) Modulation
37.1 IBM Telum II Processor Design-Technology Co-Optimizations for Power, Performance, Area, and Reliability
20.6 Electromagnetic vibration energy harvester interface IC with conduction-angle-controlled maximum-power-point tracking and harvesting efficiencies of up to 90%
A 0.013mm 2 5μW DC-coupled neural signal acquisition IC with 0.5V supply
21.4 A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS
24.7 A 15dBm 12.8%-PAE Compact D-Band Power Amplifier with Two-Way Power Combining in 16nm FinFET CMOS
13.6 A 42Gb/s 60GHz CMOS transceiver for IEEE 802.11ay
2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 2017
A 2.4 GHz 3.6mW 0.35mm 2 Quadrature Front-End RX for ZigBee and WPAN Applications
16.1 A 12b 18GS/s RF Sampling ADC with an Integrated Wideband Track-and-Hold Amplifier and Background Calibration
3D camera based on linear-mode gain-modulated avalanche photodiodes
A ThreshoId-ImpIementation-Based Neural-Network Accelerator Securing Model Parameters and Inputs Against Power Side-Channel Attacks
An 87GHz QPSK transceiver with costas-loop carrier recovery in 65nm CMOS
A 50mW HSDPA Baseband Receiver ASIC with Multimode Digital Front-End
14.2 A 79GHz phase-modulated 4GHz-BW CW radar TX in 28nm CMOS
A 20Gb/s Broadband Transmitter with Auto-Configuration Technique
A 1.1mW 200kS/s incremental ΔΣ ADC with a DR of 91.5dB using integrator slicing for dynamic power reduction
23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme
2.7 A coefficient-error-robust FFE TX with 230% eye-variation improvement without calibration in 65nm CMOS technology
A 1.1ghz charge-recovery logic
19.10 A 4.6GHz 63.3fs rms PLL-XO Co-Design Using a Self-Aligned Pulse-Injection Driver Achieving -255.2dB FoM J Including the XO Power and Noise
1.4 The next generation of networked experiences
A 1.32pW/frame•pixel 1.2V CMOS energy-harvesting and imaging (EHI) APS imager
22.3 A 4-to-11GHz injection-locked quarter-rate clocking for an adaptive 153fJ/b optical receiver in 28nm FDSOI CMOS
32.1 A 180MHz 45.3%-Peak-Efficiency Isolated Converter Using Q-Downsize Class-D Power Amplifier with Inherent Shoot-Through Current Blocking and High Tolerance for Efficiency Despite Frequency Misalignments
A 45nm single-chip application-and-baseband processor using an intermittent operation technique
21.7 A 0.036mbar circadian and cardiac intraocular pressure sensor for smart implantable lens
14.9 A Monolithic 10.5W/mm 2 600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16nm-Class CMOS
6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26pJ/b energy efficiency in 28nm CMOS FDSOI
Session 23 overview: Electrical and optical link innovations
A 50μW biasing feedback loop with 6ms settling time for a MEMS microphone with digital output
A 2.4pJ/b 100Gb/s 3D-integrated PAM-4 Optical Transmitter with Segmented SiP MOSCAP Modulators and a 2-Channel 28nm CMOS Driver
20.3 A 100nA-to-2mA successive-approximation digital LDO with PD compensation and sub-LSB duty control achieving a 15.1ns response time at 0.5V
13.8 A 24dBm 2-to-4.3GHz wideband digital Power Amplifier with built-in AM-PM distortion self-compensation
An Auto-Zero Stabilized Voltage Buffer with a Quiet Chopping Scheme and Constant Input Current
4.2 A 20nm 32-Core 64MB L3 cache SPARC M7 processor
A 0.06mm 2 14nV/√Hz chopper instrumentation amplifier with automatic differential-pair matching
A 93% efficiency reconfigurable switched-capacitor DC-DC converter using on-chip ferroelectric capacitors
A programmable adaptive phase-shifting PLL for clock data compensation under resonant supply noise
A 256×256 40nm/90nm CMOS 3D-Stacked 120dB Dynamic-Range Reconfigurable Time-Resolved SPAD Imager
3D volumetric ultrasound imaging with a 32×32 CMUT array integrated with front-end ICs using flip-chip bonding technology
A Bi-Directional Dual-Path Boost-48V-Buck Hybrid Converter for High-Voltage Power-Transmission Cable in Light-Weight Humanoid Robots
24.5 A 4.5nW wake-up radio with -69dBm sensitivity
Sandwich-RAM: An Energy-Efficient In-Memory BWN Architecture with Pulse-Width Modulation
A 135fsrms-Jitter 0.6-to-7.7GHz LO Generator Using a Single LC-VCO-Based Subsampling PLL and a Ring-Oscillator-Based Sub-Integer-N Frequency Multiplier
A 76dBΩ 1.7GHz 0.18µm CMOS tunable transimpedance amplifier using broadband current pre-amplifier for high frequency lateral micromechanical oscillators
23.1 A 44μW IoT Tag Enabling 1μs Synchronization Accuracy and OFDMA Concurrent Communication with Software-Defined Modulation
21.3 A sub-mm 3 wireless implantable intraocular pressure monitor microsystem
15.3 A 351TOPS/W and 372.4GOPS Compute-in-Memory SRAM Macro in 7nm FinFET CMOS for Machine-Learning Applications
Session 18 overview: SoCs for mobile vision, sensing, and communications: Energy-efficient digital subcommittee
A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices
24.7 A 60nV/√Hz 15-channel digital active electrode system for portable biopotential signal acquisition
15.4 A 0.8V 10b 80kS/s SAR ADC with duty-cycled reference generation
Session 7 overview: Non-volatile memory solutions: Memory subcommittee
A 60GHz Low-Power Six-Port Transceiver for Gigabit Software-Defined Transceiver Applications
A 2.6GHz Dual-Core 64bx86 Microprocessor with DDR2 Memory Support
5.8 A digitally assisted single-point-calibration CMOS bandgap voltage reference with a 3σ inaccuracy of ±0.08% for fuel-gauge applications
A 32nm high-k metal gate application processor with GHz multi-core CPU
A 188fsrms-Jitter and -243d8-FoMjitter 5.2GHz-Ring-DCO-Based Fractional-N Digital PLL with a 1/8 DTC-Range-Reduction Technique Using a Quadruple-Timing-Margin Phase Selector
7.1 A 212.5Gb/s DSP-Based PAM-4 Transceiver with 50dB Loss Compensation for Large AI System Interconnects in 4nm FinFET
A 2.5GHz 32nm 0.35mm 2 3.5dB NF -5dBm P1dB fully differential CMOS push-pull LNA with integrated 34dBm T/R switch and ESD protection
A 0.1pJ/b 5-to-10Gb/s charge-recycling stacked low-power I/O for on-chip signaling in 45nm CMOS SOI
31.1 A 65nm 8.79TOPS/W 23.82mW Mixed-Signal Oscillator-Based NeuroSLAM Accelerator for Applications in Edge Robotics
Session 28 Overview: Biomedical Systems Imagers, Medical, Mems and Displays Subcommittee
10.7 A 185fsrms-integrated-jitter and -245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector
A 2Mb/s Wideband Pulse Transceiver with Direct-Coupled Interface for Human Body Communications
16.5 An 8GS/s time-interleaved SAR ADC with unresolved decision detection achieving -58dBFS noise and 4GHz bandwidth in 28nm CMOS
A 120mm 2 16Gb 4-MLC NAND Flash Memory with 43nm CMOS Technology
A 2TX supply modulator for envelope-tracking power amplifier supporting intra- and inter-band uplink carrier aggregation and power class-2 high-power user equipment
A 3.9mW 25-electrode reconfigured thoracic impedance/ECG SoC with body-channel transponder
A wafer-level heterogeneous technology integration for flexible pseudo-SoC
A 2V Organic Complementary Inverter
A multistandard, multiband SoC with integrated BT, FM, WLAN radios and integrated power amplifier
A 4nm 1.15TB/s HBM3 Interface with Resistor-Tuned Offset-Calibration and In-Situ Margin-Detection
A 2.5GHz 2.2mW/25µW on/off-state power 2psrms-long-term-jitter digital clock multiplier with 3-reference-cycles power-on time
A 256×256 14k range maps/s 3-D range-finding image sensor using row-parallel embedded binary
A Temperature-Compensated Digitally-Controlled Crystal Pierce Oscillator for Wireless Applications
Sapphire Rapids: The Next-Generation Intel Xeon Scalable Processor
11.7 A 240mW 16b 3.2GS/s DAC in 65nm CMOS with
EE1: Student Research Preview
EP3: Innovating on the tapeout treadmill
A 128-Channel 6mW Wireless Neural Recording IC with On-the-Fly Spike Sorting and UWB Tansmitter
2.6 A 5.67mW 9Gb/s DLL-based reference-less CDR with pattern-dependent clock-embedded signaling for intra-panel interface
High-Speed Interconnect for a Multiprocessor Server Using Over 1Tb/s Crossbar
21.7 2pJ/MAC 14b 8×8 linear transform mixed-signal spatial filter in 65nm CMOS with 84dB interference suppression
A 2×32 range-finding sensor array with pixel-inherent suppression of ambient light up to 120klx
F5: Advanced IC design for ultra-low-noise sensing
18.5 A configurable 12-to-237KS/s 12.8mW sparse-approximation engine for mobile ExG data aggregation
LNPU: A 25.3TFLOPS/W Sparse Deep-Neural-Network Learning Processor with Fine-Grained Mixed Precision of FP8-FP16
32.3 An Accurate Secondary-Side Controller with GaN-8ased CGS Isolated Driver Achieving Sub-1% Error On-Chip Sensing