yusuke1997/dblp-id-title huggingface dataset:
Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform
A low complexity Reed-Solomon architecture using the Euclid's algorithm
A Non-trimmed, 7 MHz and 52 ppm/°C Relaxation Oscillator with Loop Errors Compensation from -40°C to 165°C
An investigation of THD of a BTL Class D amplifier
Missing feature speech recognition in a meeting situation with maximum SNR beamforming
Accurate transient response model for automatic synthesis of high-speed operational amplifiers
Optimized numerical mapping scheme for filter-based exon location in DNA using a quasi-Newton algorithm
LSTM-Based Viewpoint Prediction for Multi-Quality Tiled Video Coding in Virtual Reality Streaming
A multi-phase VCO quantizer based adaptive digital LDO in 65nm CMOS technology
Unconstrained regularized ℓp-norm based algorithm for the reconstruction of sparse signals
Very Low Voltage Operational Amplifiers Using Floating Gate MOS Transistor
Extracting nonplanar connections in a terminal-vertex graph
Car-Following Behavior of Coach Bus Based on Naturalistic Driving Experiments in Urban Roads
Smooth transition and ripple reduction in 4-switch non-inverting buck-boost power converter for WCDMA RF power amplifier
A Study on Hybrid Optimization Methods using Lévy Flight and Differential Evolution Mechanisms
Adaptive postprocessors with DCT-based block classifications
Analysis of synchronization phenomenon in coupled oscillator chains
Enhancing the efficiency of cluster voltage scaling technique for low-power application
Low-power 50% duty cycle corrector
Optimal joint source-channel bit allocation for MPEG-4 fine granularity scalable video over OFDM system
Complexity in heterogeneous systems on chips: Dsign and analysis challenges
CMOS VCO-prescaler cell-based design for RF PLL frequency synthesizers
A High-throughput Impedance Measurement IC Using Synchronous Cyclic Integration Technique
A Low Power Low Voltage 16 Bit Audio SigmaDelta Modulator
Rapid signal acquisition for low-rate carrier-based ultra-wideband impulse radio
A new charge balancing scheme for electrical microstimulators based on modulated anodic stimulation pulse width
Programmable voltage-to-current converter with linear voltage control resistor
Modularized chain structure of switched capacitor for cell voltage equalizer with T-connected bi-directional switch
Daily Rainfall Data Construction and Application to Weather Prediction
A general subthreshold MOS translinear theorem
Breaking the Trade-Off between Bandwidth and Close-in Blocker Attenuation in an N-Path Filter
Physics-based memristor models
On a relaxation oscillator with periodic threshold
RED-f routing protocol for complex networks
A low power sub-harmonic injection locked 2×2 mm-wave beamforming receiver array
SRAM design in fully-depleted SOI technology
A Low-complexity Hardware Implementation of Discrete-time Frequency-selective Rayleigh Fading Channels
Electrical Stress-free High Gain and High Swing Analog Buffer Using an Adaptive Biasing Scheme
A hardware generator for multi-point distributed random variables
Multi-purpose systems: A novel dataflow-based generation and mapping strategy
An Area Efficient On-chip Static IR Drop Detector/Evaluator
Optimal adaptive bandwidth monitoring for QoS based retrieval
Vertical Signal Transmission in Three-Dimensional Integrated Circuits by Capacitive Coupling
A mixed-structure delay locked-loop with wide range and fast locking
An Analytic Method to Calculate Emitter Follower Delay Using Trial Functions in Coupled Node Equations
A 24V-to-1V Hybrid Converter With Adaptive Dead Time Control for Point-of-Load Applications
A 5V-to-0.8V Inductor-First 2L2C Multi-Path Hybrid DC-DC Converter
A perfect reconstruction filter bank with irrational down-sampling factors
Data reusable search scan methods for low power motion estimation
A new structure for sound reproduction system
Improving high-level synthesis effectiveness through custom operator identification
A Diversity Controlled Genetic Algorithm for Optimization of FRM Digital Filters over DBNS Multiplier Coefficient Space
Stochastic pulse coded arithmetic
A Compact Current Mode Neuron Circuit with Gaussian Taper Learning Capability
Efficient Data Transfer Techniques and VLSI architecture for DWT-Block Coder Integration of JPEG2000 Encoder
A Multi-band CMOS Low Noise Amplifier for Multi-standard Wireless Receivers
A Quadrature Frequency Synthesizer with 118.7-fs Jitter, 27.94% Locking Range for Multiband 5G mmW Applications
Quadrature generation techniques in CMOS relaxation oscillators
On First-Order Compensation of Timing Mismatch in Two-Channel TIADCs
Proposal for a convergence criterion to the active net in two steps
A 10-b 500MS/s Partially Loop-Unrolled SAR ADC with a Comparator Offset Calibration Technique
An EEG artifact identification embedded system using ICA and multi-instance learning
Power-Loss and Design Space Analyses for Fully-Integrated Switched-Mode DC-DC Converters
On the geodesic paths approach to multichannel signal processing
Exact synthesis of bandpass responses using an isolated cascade connection of same order lowpass and highpass filters
An Open-Source Co-processor for Solving Lotka-Volterra Equations
Addressing Retention and Improving Performance in Gateway Engineering Courses
Influecne of the Drive-Signal Resonant Overtone on Subharmonic Injection-Locking Characteristics
Neighborhood Learning from Noisy Labels for Cross-Modal Retrieval
Adaptive mode and modulation coding switching scheme in MIMO multicasting system
A Self-Powered Pressure Sensor System Based on Triboelectric Energy Harvesting for Knee Implants
GPU implemention of fast Gabor filters
Lifting-based multi-view image coding
A 28nm Energy-Area-Efficient Row-based pipelined Training Accelerator with Mixed FXP4/FP16 for On-Device Transfer Learning
Charge sampling mixer with Delta-Sigma quantized impulse response
The applications of memristor devices in next-generation cortical processor designs
Online Path-Based Test Method for Network-on-Chip
A computer-based system to analyze neuron images
An Adaptive Dead-Time Control Method for Gate Drivers Using Gate Current Measurement Enabling ZVS in High Frequency HV DC-DC Converters
Design of majority logic based approximate arithmetic circuits
A Low-Power Complex Bandpass Gm-C Filter with Dynamic Range Expansion through Adaptive Biasing
A Fast and reliable switching median filter for highly corrupted images by impulse noise
Analysis of Hopf bifurcation in parallel-connected boost converters via averaged models
A novel rate control for H.264
TinyDL: Just-in-time deep learning solution for constrained embedded systems
Combinatorial architectural level power optimization for a class of orthogonal transforms
A Lightweight Peripheral Design for RRAM-based LUTs
A 3-6GHz 5-to-512 Multiplier Adaptive Fast-Locking Self-Biased PLL in 28nm CMOS
A method for the estimation of aperture uncertainty in A-D converters
Testability evaluation for analog linear circuits via transfer function analysis
PBN: Progressive Batch Normalization for DNN Training on Edge Device
A compact stacked-device output driver in low-voltage CMOS Technology
A 1.93 pA/√Hz transimpedance amplifier for 2.5 Gb/s optical communications
Use of state trajectory prediction in hysteresis control for achieving fast transient response of the buck converter
Robust Estimation of Respiratory Rate from Photoplethysmogram with Respiration Quality Analysis
Keyword propagation for image retrieval
Nonlinear prediction of brain electrical activity in epilepsy with a Volterra RLS algorithm
A time-varying Prony method for instantaneous frequency estimation at low SNR
Analog-Digital Approximate DFT with Spatial ∆-Σ LNA Multi-beam RF Apertures
A probability routing strategy based on sine function gravitational centrality for enhancing network traffic capacity
A low power decimation filter architecture for high-speed single-bit sigma-delta modulation
Cascaded Machine Learning Model Based DoS Attacks Detection and Classification in NoC
Design of a QDI asynchronous AER serializer/deserializer link in 180nm for event-based sensors for robotic applications
A Novel Energy-Efficient Continuous-Time Hysteretic VCO-Based Comparator
On-chip spectrum analyzer for built-in testing analog ICs
Chemical and biological sensors for environmental monitoring
Nonvolatile Flash Memories in Silicon-on-sapphire CMOS
An interactive program for automatic network function generation with insights
Error control coding and signal processing for flash memories
Maximizing efficiency through impedance matching from a circuit-centric model of non-radiative resonant wireless power transfer
A 0.18μm CMOS Widely Tunable Low Pass Filter with sub-Hz Cutoff Frequencies
Multiwavelet Filter Banks for Data Compression
Video-based face authentication using appearance models and HMMs
A new CMOS charge pump for low voltage applications
Adaptive droop control with self-adjusted virtual impedance for three-phase inverter under unbalanced conditions
A 4-D chaotic oscillator with a hysteresis 2-port VCCS: the first example of chaotic oscillators consisting of 2-port VCCSs and capacitors
A 8-ns Settling Time Fully Integrated LDO with Dynamic Biasing and Bulk Modulation Techniques in 40nm CMOS
Security Scalability of Arbiter PUF Designs
Deriving accurate ASIC cell fault models for VITAL compliant VHDL simulation
Complexity reduction for the 3D-HEVC depth maps coding
Optimizing Area and Power of MAC Arrays in DNN Accelerators via Overflow-Aware Partial Sum Management
Processing big-data with Memristive Technologies: Splitting the Hyperplane Efficiently
Generalized Resistive DAC Analysis Through Unitized T-Network Element
Negative Capacitance Dual-Threshold Independent Gate FinFETs
Adaptive Multi-Scale Spatiogram (AMS): A Robust and Efficient Descriptor for Complex Visual Environments
Robust layered coding of video for transmission over noisy channels
Power-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wires
Development of a low-power SRAM compiler
Discrete fractional Hadamard transform
Performance benchmark of State-of-the-art Sub-6-GHz wideband LNAs Based on an Extensive Survey
A scalable 7.0-Gb/s multi-lane NRZ transceiver with a 1/10th-rate forwarded clock in 0.13um CMOS
Efficient realization of probabilistic gradient descent bit flipping decoders
Electromigration and Parasitic-Aware ILP Router for Analog and RF Circuits
Effect of MOSFET parasitic capacitances on EER transmitter with class-E amplifier
Blind separation for mixtures of sub-Gaussian and super-Gaussian sources
A 28 Gb/s 2-Tap FFE Source-Series-Terminated Transmitter in 22 nm CMOS FDSOI
Efficient Software Defined Radio Implementations of GNSS Receivers
On Stability and the Lyapunov Equation for n-Dimensional Digital Systems
A Novel Stochastic Polar Architecture for All-Digital Transmission
Unified-pipelined NTT Architecture for Polynomial Multiplication in Lattice-based Cryptosystems
New CMOS fully differential transconductor and its application
An Event Triggered-FOCV MPP Technique with Irradiance Change Detection Block for Next Generation EH-Converters
Multiple Charge Extractions with Bias-Flip Interface Circuit for Piezoelectric Energy Harvesting
Efficient implementation of parallel correlators for code acquisition in DS/CDMA systems
Dynamic and Traffic-Aware Medium Access Control Mechanisms for Wireless NoC Architectures
Stereoscopic learning for disparity estimation
Prediction of traffic in a public safety network
Distortion analysis of the alternative doubly-terminated ladder fully-differential Gm-C filters
A system for chaos generation and its implementation in monolithic form
A highly integrated biomedical multiprocessor SoC design for a wireless bedside monitoring system
Implementation and design investigation of 40 Gbps driver IC for silicon photonics ring-modulator in SiGe 130-nm
Pre-capturing static pulsed flip-flops
A 2.4-GHz CMOS down-conversion doubly balanced mixer with low supply voltage
Live demonstration: Real-time event-driven object recognition on SpiNNaker
Low power decoding of BCH codes
Fully parallel on-chip learning hardware neural network for real-time control
A Single-Inductor Triple-Output Buck-Boost Converter with Output Ripple Control for Wearable Devices
A 700 μW 1GS/s 4-bit folding-flash ADC in 65nm CMOS for wideband wireless communications
Driving cryptosystems with hyperchaotic signals: an approach involving linear observers
A design-oriented single-piece short-channel MOSFET model
Enhancing Synchronizabilities of Power-Law Networks
Sequence-pair based placement with boundary constraints
An Efficient FPGA Implementation of a Simple Lossless Algorithm (SLA) for On-board Satellite Hyperspectral Data Compression
An FPGA-Based Accelerator Enabling Efficient Support for CNNs with Arbitrary Kernel Sizes
Eigenvector Algorithms for Blind Deconvolution of MIMO-IIR Systems
A simple approach to the design of one-dimensional sparse arrays
3881 Gbps/W, 3005 µm AES Core with State Based Clock Gating for IoT applications
Autotuning technique for CMOS current mode capacitive sensor interfaces
High-throughput QC-LDPC decoder with cost-effective early termination scheme for non-volatile memory systems
A 2GHz image-reject receiver in a low IF architecture fabricated in a 0.1µm CMOS technology
Towards optimal CMOS lifetime via unified reliability modeling and multi-objective optimization
Hybrid Continuous-Time/Discrete-Time Cascade SigmaDelta Modulators with Programmable Resonation
A technique to suppress tail current flicker noise in CMOS LC VCOs
An efficient reference-based adaptive antenna impedance matching CMOS circuit
Large tuning band range of high frequency filter for wireless applications
A Highly-Integrated 64-QAM Ku-Band Transceiver in SiGe BiCMOS for 6G Cell-Free MIMO
A Wireless Sensor Node Driving System with Bridgeless Bipolar Boost Rectifier Using Thermoelectric Energy Harvesting
A low-power switched-current algorithmic A/D converter
Towards a Reconfigurable Platform for Studying Networked, Multi-Converter Power Systems
A 15-Gb/s, 0.036 pJ/bit, Half-Rate, Low Power PRBS Generator in 1.2 V, 65 nm CMOS
Application of Ring-Amplifiers for Low-Power Wide-Bandwidth Digital Subsampling ADC-PLL
Set theoretic estimation through triangular noise distribution
Efficient motion-oriented filter banks for video coding
Implementation of low-complexity FIR filters using serial arithmetic
On unbiased parameter estimation of autoregressive signals observed in noise
TSCM: A TCAM-Based Sparse Connection Memory Architecture in Neuromorphic Computing System for Cortical Simulation
A Wide-Range Reference-Less Digital Clock and Data Recovery for Harmonic-Lock-Free Frequency Acquisition
Novel architectures of class AB CMOS mirrors with programmable gain
IIR Digital Filter Design with Novel Stability Criterion Based on Argument Principle
Low-voltage read/write circuit design for transistorless ReRAM crossbar arrays in 180nm CMOS technology
Wire-driven microarchitectural design space exploration
Programmable Refractory Period Implementations in a Mixed-Signal Integrate-And-Fire Neuron
An Irregular Search Window Reuse Scheme for Motion Estimation in MPEG-2 to H.264 Transcoding
Mixed-signal VLSI implementation of the Products of Experts' contrastive divergence learning scheme
A Dataset and Method for Assessing the Quality of Display Devices
Temperature-aware task scheduling heuristics on Network-on-Chips
Boolean verification with fastest LIA transforms
A high wide band PSRR and fast start-up current mode bandgap reference in 130nm CMOS technology
Quick and effective buffered legitimate skew clock routing
Design of a pipelined and expandable sorting architecture with simple control scheme
An Attention Based CNN with Temporal Hierarchical Deployment for AVS3 Inter In-loop Filtering
The performance of visuo-motor coordination changes under force feedback assistance system
A delay line based CMOS time digitizer IC with 13 ps single-shot precision
Comparison of programmable linear resistors based on quasi-floating gate MOSFETs
MedBiSeNet: Efficient Bilateral Segmentation Network for Real-time Medical Image Processing
Constraint modules: An introduction
Perception based binary image watermarking
Ultra-wide-band low noise amplifier using inductive feedback in 90-nm CMOS technology
A 1.27mW 20Gbps 1: 16 DEMUX with a symmetrical-edge-delay sense amplifier
Reinforcement Learning Enabled Routing for High-Performance Networks-on-Chip
A new logic synthesis and optimization procedure
Impulse noise detector using mathematical morphology
Pipelined FPGA design of the Goertzel algorithm for exon prediction
A 3 rd -order Noise Shaped Multistage Open-Loop Current Controlled Oscillator-based ADC with Non-Linearity Compensation
10-channel very low noise ENG amplifier system using CMOS technology
A new diode model formulation for electro-thermal analysis
A very low-voltage, low-power and high resolution sigma-delta modulator for digital audio in 0.25µm CMOS
A dataflow-oriented VLSI architecture for a modified SPIHT algorithm using depth-first search bit stream processing
A 1.8-GHz CMOS VCO tuned by an accumulation-mode MOS varactor
Compressed domain content-based retrieval of MP3 audio example using quantization tree indexing and melody-line tracking method
A study of a suboptimal VLSI architecture for joint source-channel trellis coding
3D human pose tracking based on depth camera and dynamic programming optimization
FPGA-Based Acceleration of Word2vec using OpenCL
Polarity-Coincidence Filter Banks and Nondestructive Evaluation
On the numerical conditioning in orthogonal filters
A 14-bit D/A-converter with digital calibration
A 16x16-bit Static CMOS Wave-Pipelined Multiplier
Identifying Useful Features in Multispectral Images with Deep Learning for Optimizing Wheat Yield Prediction
A technique to deskew differential PCB traces
Genetic algorithm based topology generation for application specific Network-on-Chip
Low power design of H.264 CAVLC decoder
A blind audio watermarking scheme using peak point extraction
Circuit Synthesis of Clock Distribution Networks Based on Non-Zero Clock Skew
Switched-MOSFET technique for programmable filters operating at low-voltage supply
A fully differential low-voltage CMOS high-speed track-and-hold circuit
Dual band LNA/mixer using conjugate matching for implantable biotelemetry
Live demonstration: An implantable wireless multi-channel neural prosthesis for epidural stimulation
Delta-sigma modulation in single neurons
High density VLSI implementation of a bipolar CNN with reduced programmability
An 89dB low-power CMOS Sigma Delta modulator for Bluetooth application
Offset based feedforward amplifier with nonlinearity compensation and P1dB expansion
Sparse FIR filter design based on Genetic Algorithm
Mitigation of Range and Doppler Spoofing Attacks on Indoor FMCW Radars using Dual-Slope FSK-FMCW Waveform
High tuning accuracy design of variable IIR filters as a cascade of identical sub-filters
Bandwidth Enhancement Techniques for Large-Area VLC Receivers
A systematic technique for optimizing one-stage two-filter linear-phase FIR filters for sampling rate conversion
Interference of ESD protection diodes on RF performance in Giga-Hz RF circuits
Compact readout circuits for SPAD arrays
Device technology for body biasing scheme
Highly linear reconfigurable mixer designed for environment-aware receiver
Enhancing scheduling solutions through ant colony optimization
An enhanced light-load efficiency step down regulator with fine step frequency scaling
Mixing domains in signal processing
A Weighted Lattice Structure for 2-D Denominator-Separable Digital Filters
Distributed video codec with spatiotemporal side information
On the Cramér-Rao bound of autoregressive estimation in noise
SiGe HBT X-band and Ka-band switchable dual-band low noise amplifier
A 1/1.33-inch 108Mpixel CMOS Image Sensor with 0.8um unit NONACELL pixels
Input Impedance of Closed-Loop PWM Buck-Boost DC-DC Coinverter for CCM
Design of IIR digital filters in the complex domain by transforming the desired response
A High-Speed ADC for a Multi-Band 5G V2X Wireless Receiver
Secure communications via chaotic synchronization in Chua's circuit and Bonhoeffer-Van der Pol equation: numerical analysis of the errors of the recovered signal
Anchored Input-Output Learning for Electrical Load Demand Forecasting
Signal selective 2-D direction finding for non-Gaussian cyclostationary sources
Synchronization and phase synthesis using PLL neural networks
A quiescent power-aware low-voltage output capacitorless low dropout regulator for SoC applications
An Anti-aliasing Multi-rate SigmaDelta Modulator
A don't-care based image circuit for function verification
A current mode 2.4 GHz direct conversion receiver
Statistical delay modeling of read operation of SRAMs due to channel length variation
Advanced motion information prediction and inheritance in 3D-HEVC
An in-the-loop training method for VLSI neural networks
An Organic Computing architecture for visual microprocessors based on Marching Pixels
An efficient embedded compression algorithm using adjusted binary code method
A design method of low delay lowpass FIR filters with maximally flat characteristics in the passband and the transmission zeros in the stopband
An unsupervised approach to dominant video scene clustering
Masking compressed video connection utilization in ATM networks
Design of a Reverse-Electrowetting Transducer Based Wireless Self-Powered Motion Sensor
The design of low complexity low power pipelined short length Winograd Fourier transforms
Linear programming of voltage-controlled memristors with an anti-serial memristor circuit
High performance circuit techniques for dynamic OR gates
A unifying perspective on phase noise and injection locking
Invariance Checking Based Trojan Detection Method for Three-Dimensional Integrated Circuits
A New RF Radiometer for Absolute Noninvasive Temperature Sensing in Biomedical Applications
A 3rd Order Time Domain Delta Sigma Modulator with Extended-Phase Detection
Reducing Message Logging Overhead for Log-based Recovery
Circuit Implementations Teaching a Junior Level Circuits Course Utilizing the SoC FPAA
Reconfigurable CMOS low noise amplifier for self compensation
A 0.35µm CMOS comparator circuit for high-speed ADC applications
Fully-digital Testability of a High-speed Conversion System
High Dynamic Range Smart Pixel Architecture for Infrared Focal Plane Arrays
The Image and Associated Orientation Signatures
Cascading Failures of Power System with the Consideration of Cyber Attacks
Closed-form design of maximally flat R-regular Mth-band FIR filters
Lumped model identification based on a double multi-valued neural network and frequency response analysis
Lithography-friendly analog layout migration
Multi-Channel FSK Inter/Intra-Chip Communication by Exploiting Field-Confined Slow-Wave Transmission Line
Variable pixel G-neighbor filters
Simulation-based memory dependence checker for CGRA-mapped code verification
A progammable baseband anti-alias filter for a passive-mixer-based, SAW-less, multi-band, multi-mode WEDGE transmitter
Smart Wearable Wristband for EMG based Gesture Recognition Powered by Solar Energy Harvester
Extraction of robust visual phrases using graph mining for image retrieval
A fast CORDIC algorithm based on a novel angle recoding scheme
Application of adaptive order statistic filters in digital image/image sequence filtering
Multi-mode sorted QR decomposition for 4×4 and 8×8 single-user/multi-user MIMO precoding
A two-neuron cross-correlation circuit with a wide and continuous range of time delay
Efficient Over-the-cell Routing Algorithm for General Middle Terminal Model
Switched-Current Filter Models for Frequency Analysis in the Continuous-time Domain
State discontinuity analysis of linear switched systems via energy function optimization
Error-resilient ROI coding using pre- and post-processing for video sequences
Computing during supply voltage switching in DVS enabled real-time processors
Designing system on a chip products using systems engineering tools
A novel fine rate control algorithm with adaptive rounding offset
Phase-tracking loop based on delta-sigma oversampling architecture
A High Efficiency Variable Stage and Frequency Charge Pump for Wide Range ISPP