yusuke1997/dblp-id-title huggingface dataset:
Dynamic loop pipelining in data-driven architectures
Opportunistic named functions in disruption-tolerant emergency networks
REPLICA2Pro: task relocation by bitstream manipulation in virtex-II/Pro FPGAs
Memristors for neural branch prediction: a case study in strict latency and write endurance challenges
Deffe: a data-efficient framework for performance characterization in domain-specific computing
POSTER: A System-level HW/SW Co-simulation Framework for HLS-generated Accelerators
Graph analytics in the exascale era
HRF: a resource allocation scheme for moldable jobs
Freeway: an order-less user-space framework for non-real-time applications
QR-PULP: Streamlining QR Decomposition for RISC-V Parallel Ultra-Low-Power Platforms
Data parallel acceleration of decision support queries using Cell/BE and GPUs
AvesTerra: a framework for global-scale knowledge representation and analytic interoperability
Exact combinational logic synthesis and non-standard circuit design
Cookie-Jar: An Adaptive Re-configurable Framework for Wireless Network Infrastructures
Visual exploration of CO2 emissions in Chinese cities
A predictable communication assist
Tapeout of a RISC-V crypto chip with hardware trojans: a case-study on trojan design and pre-silicon detectability
Scalable Experimental Bounds for Dicke and GHZ States Fidelities
Clever DAE: Compiler Optimizations for Digital Twins at Scale
Effective runtime scalability metric to measure productivity in high performance computing systems
Outlier detection based on sparse coding and neighbor entropy in high-dimensional space
Handling consistent web service recovery in a RESTful way
Distributed queues in shared memory: multicore performance and scalability through quantitative relaxation
nGraph-HE: a graph compiler for deep learning on homomorphically encrypted data
Improving the execution time of global communication operations
Hardware Support for Secure Stream Processing in Cloud Environments
Scaling time warp-based discrete event execution to 104 processors on a Blue Gene supercomputer
Do we need a holistic approach for the design of secure IoT systems?
Architecting more than Moore: wireless plasticity for massive heterogeneous computer architectures (WiPLASH)
Solving Partial Differential Equations on an Analog, Optical Platform. Invited Paper
Accelerating total variation regularization for matrix-valued images on GPUs
Always-on instrumentation for application introspection in HPC
On the role of system software in energy management of neuromorphic computing
Compiling for an indirect vector register architecture
Diolkos: improving ethernet throughput through dynamic port selection
POSTER: Hardware-Aware Software-Based Fault Injection Platform for DNN Accelerators
DaSH: a benchmark suite for hybrid dataflow and shared memory programming models: with comparative evaluation of three hybrid dataflow models
Models for generating locality-tuned traveling threads for a hierarchical multi-level heterogeneous multicore
Green adaptive streaming
Artificial intelligent sensors at the core of cyber-physical-systems: from theory to practical applications
A case for a working-set-based memory hierarchy
Accelerating synchronization communications for high-density blade enclosure
Proceedings of the 22nd ACM International Conference on Computing Frontiers, CF 2025, Cagliari, Italy, May 28-30, 2025
Mesh independent loop fusion for unstructured mesh applications
Advanced Manufacturing Collaboration in a Cloud-based App Marketplace
MSEU-Net: A Multi-Scale Deep Learning Framework for Precise FHR Baseline Determination
Reducing neural architecture search spaces with training-free statistics and computational graph clustering
JANUS: reconfigurable high-performance computing for physics
eProcessor: European, Extendable, Energy-Efficient, Extreme-Scale, Extensible, Processor Ecosystem
Glinda: a framework for accelerating imbalanced applications on heterogeneous platforms
X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller
A case for superconducting accelerators
Hash-based signatures for the internet of things: position paper
High performance, power efficient hardware accelerators: emerging devices, circuits and architecture co-design
The Future of Deep Learning: Challenges & Solutions
Horizon: a multi-abstraction framework for graph analytics
Space-and-time efficient garbage collectors for parallel systems
A communication infrastructure for a million processor machine
AdaptGear: Accelerating GNN Training via Adaptive Subgraph-Level Kernels on GPUs
Ultra-low-latency lightweight DMA for tightly coupled multi-core clusters
STIFF: thermally safe temperature effect inversion aware FinFET based multi-core
Hierarchical synthesis of quantum and reversible architectures
REMOC: efficient request managements for on-chip memories of GPUs
Teaching Digital Logic and Computer Architecture Using Open Source Tools
Specific ergodicity: an informative indicator for invertible computational media
Go green radio astronomy: Approximate Computing Perspective: Opportunities and Challenges: POSTER
Tunable and Portable Extreme-Scale Drug Discovery Platform at Exascale: the LIGATE Approach
Enabling the Proxy Computing Paradigm on DPU-based FPGA Acceleration
Accurate off-line phase classification for HW/SW co-designed processors
uvgKvazaarHW: Open-Source Hardware HEVC Intra Encoder
Increased Flexibility and Reliability for CubeSats through Distributed Telemetry and Control
High-Level Synthesis of Irregular Applications: A Case Study on Influence Maximization
Design of an open-source bridge between non-coherent burst-based and coherent cache-line-based memory systems
A modified HEVC decoder for low power decoding
Dynamic co-management of persistent RAM main memory and storage resources
A docked-aware storage architecture for mobile computing
On generating multicast routes for SpiNNaker
Corrosion Hammer: A Self-Activated Bit-Flip Attack to the Processing-In-Memory Accelerator
Fine-grained address segmentation for attention-based variable-degree prefetching
Optimizing thread throughput for multithreaded workloads on memory constrained CMPs
Mapping applications for high performance on multithreaded, NUMA systems
Reference Life Cycle Assessment of Smart Insoles with Piezoresistive Sensors for Motion Analysis
Near real-time intrusion alert aggregation using concept-based learning
SeTHet - Sending Tuned numbers over DMA onto Heterogeneous clusters: an automated precision tuning story
Assessing transferability of adversarial examples against malware detection classifiers
Large-Scale Plant Classification with Deep Neural Networks
Parallel edge-based sampling for static and dynamic graphs
How AI can change the way we play games
Uncovering CPU load balancing policies with harmony
General floorplan for reversible quantum-dot cellular automata
Algorithmic methodologies for ultra-efficient inexact architectures for sustaining technology scaling
Thermal image-based CNN's for ultra-low power people recognition
Proceedings of the 20th ACM International Conference on Computing Frontiers, CF 2023, Bologna, Italy, May 9-11, 2023
Stream Drive: A Dynamic Dataflow Framework For Clustered Embedded Architectures
Evaluating floating-point multipliers with opto-electrical hybrid circuits
Near threshold cloud processors for dark silicon mitigation: the impact on emerging scale-out workloads
A reconfigurable optical/electrical interconnect architecture for large-scale clusters and datacenters
SmartFusion2 SoC as a security module for the IoT world
NPUFort: a secure architecture of DNN accelerator against model inversion attack
Practical approximate quantum multipliers for NISQ devices
A flexible OS-based approach for characterizing solid-state disk endurance
D 3 AS project: a different approach to the manycore challenges
SoftHV: a HW/SW co-designed processor with horizontal and vertical fusion
PHP-sensor: a prototype method to discover workflow violation and XSS vulnerabilities in PHP web applications
Tolerating correlated failures for generalized Cartesian distributions via bipartite matching
On Learning the Energy Model of an MPSoC for Convex Optimization
Work Stealing in a Shared Virtual-Memory Heterogeneous Environment: A Case Study with Betweenness Centrality
Parallel simulation of orography influence on large-scale atmosphere motion on APEmille
Applying statistical machine learning to multicore voltage & frequency scaling
The SAGE project: a storage centric approach for exascale computing: invited paper
MicroPython as a satellite control language
A practical evaluation of synchronicity in action potentials with noise
On the use of hardware accelerators in QC-MDPC code-based cryptography
High throughput genetic sequence analysis
System integration of tightly-coupled processor arrays using reconfigurable buffer structures
Exact multi-pattern string matching on the cell/b.e. processor
FreeDA : deploying incompatible stock dynamic analyses in production via multi-version execution
Phase-aware System-Side Sampling for HPC
Exploitation of nested thread-level speculative parallelism on multi-core systems
Understanding stencil code performance on multicore architectures
Marching-pixels: a new organic computing paradigm for smart sensor processor arrays
Designing Scalable Distributed Memory Models: A Case Study
MYRTUS: Multi-layer 360° dYnamic orchestration and interopeRable design environmenT for compute-continUum Systems
Evolution of Friendship: a case study of MobiClique
An efficient object detection framework with modified dense connections for small objects optimizations
Extending classical processors to support future large scale quantum accelerators
Identifying potential parallelism via loop-centric profiling
Open-Source Hardware and Agile System-on-Chip Design
SCoEmbeddings: encoding sentiment information into contextualized embeddings for sentiment analysis
Quantum encoded quantum evolutionary algorithm for the design of quantum circuits
A Trace-driven Performance Evaluation of Hash-based Task Placement Algorithms for Cache-enabled Serverless Computing
Workload characterization of a time-series prediction system for spatio-temporal data
Evaluating the potential of multithreaded platforms for irregular scientific computations
ExanaDBT: A Dynamic Compilation System for Transparent Polyhedral Optimizations at Runtime
Novel low-cost aging sensor
Gathering and analyzing identity leaks for a proactive warning of affected users
Make software harder
Improving performance of simple cores by exploiting loop-level parallelism through value prediction and reconfiguration
Enabling FPGAs in the cloud
Machine Learning Application Benchmark
Early Results of Mapping Industrial Applications on Heterogeneous HPC Systems: The OPTIMA Project
Improving the memory behavior of vertical filtering in the discrete wavelet transform
Designing a secure DRAM+NVM hybrid memory module
Proceedings of the 21st ACM International Conference on Computing Frontiers, Workshops and Special Sessions, CF 2024, Ischia, Italy, May 7-9, 2024
Operating system support for mitigating software scalability bottlenecks on asymmetric multicore processors
On the limitations of the chimera graph topology in using analog quantum computers
Mobile agent: based module distribution in heterogeneous networks
RAGuard: A Hardware Based Mechanism for Backward-Edge Control-Flow Integrity
Methodology for the model-driven development of self-managing systems
Nature-inspired techniques for self-organization in dynamic networks
Grid result checking
Sparse MTTKRP Acceleration for Tensor Decomposition on GPU
A Framework for Uniformly Analyze and Mitigate Radiation-effects on FPGAs for Aerospace
Scaling of multi-core quantum architectures: a communications-aware structured gap analysis
Investigating hybrid SSD FTL schemes for Hadoop workloads
A flexible framework for early power and timing comparison of time-multiplexed CGRA kernel executions
Sentiment evaluation of forex news
Exploring latency-power tradeoffs in deep nonvolatile memory hierarchies
Design space for scaling-in general purpose computing within the DDR DRAM hierarchy for map-reduce workloads
Cache miss behavior: is it sqrt(2)?
A programmable processing array architecture supporting dynamic task scheduling and module-level prefetching
Dynamic row activation mechanism for multi-core systems
Novel Data and Processing Approaches for the Development of Hyper-distributed Applications
A capacity-efficient insertion policy for dynamic cache resizing mechanisms
Authentication and privacy preserving message transfer scheme for vehicular ad hoc networks (VANETs)
SuperCoP: a general, correct, and performance-efficient supervised memory system
Load balancing in a changing world: dealing with heterogeneity and performance variability
The U.S. Microelectronics Research Programs and Where They Lower Barriers to Co-Design. Invited Paper
Approximate approximation on a quantum annealer
Dynamic thread assignment on heterogeneous multiprocessor architectures
Efficient cache design for solid-state drives
Exploration of Synthesis Methods from Simulink Models to FPGA for Aerospace Applications
Chip multiprocessing and the cell broadband engine
Scalable memory registration for high performance networks using helper threads
Exploiting processor groups to extend scalability of the GA shared memory programming model
Unleashing Optimization in Dynamic Circuits through Branch Expansion
Flex8: A Flexible Precision Co-design for 8-bit Neural Network
Trading Fault Tolerance for Performance in AN Encoding
Thermodynamical cost of reversible computing
Accelerating Stream Processing Queries with Congestion-aware Scheduling and Real-time Linux Threads
Scaling SST for Extreme Scale System Simulation
A framework for scheduling parallel dbms user-defined programs on an attached high-performance computer
An extreme-scale virtual screening platform for drug discovery
Evaluating multi-core platforms for HPC data-intensive kernels
Supporting sensor orchestration in non-stationary environments
Enhanced GPU-based distributed breadth first search
On-the-fly detection of precise loop nests across procedures on a dynamic binary translation system
Performance Evaluation of Tsunami Evacuation Route Planning on Multiple Annealing Machines
Center for High-Performance Reconfigurable Computing (CHREC): A Ten-Year Odyssey
The boat hull model: enabling performance prediction for parallel computing prior to code development
An efficient cache design for scalable glueless shared-memory multiprocessors
Register Blocking: An Analytical Modelling Approach for Affine Loop Kernels
Variability-tolerant run-time workload allocation for MPSoC energy minimization under real-time constraints
TRAFFIC: Testbed foR Assessing energy eFFiciency In throughput Computing
Optimization and deployment of CNNs at the edge: the ALOHA experience
A privacy-preserving protocol for indoor wi-fi localization
Multi-compilation: capturing interactions among concurrently-executing applications
Yes we CAN!: Towards bringing security to legacy-restricted Controller Area Networks. A review
GRID Based Federated Digital Library
Bounding the effect of partition camping in GPU kernels
Experimental evaluation of an adiabiatic quantum system for combinatorial optimization
Efficient implementation of GPGPU synchronization primitives on CPUs
A limits study of benefits from nanostore-based future data-centric system architectures
pnrXplore: A Visual Data Explorer for CAD and EDA Research
Power and performance optimization at the system level
Fuce: the continuation-based multithreading processor
Quantum parallelism and the exact simulation of physical systems
Open-Source Elastic CGRA Generator
States of matter, information organization and dimensions of expressiveness
A golden age for computing frontiers, a dark age for computing education?
Programmable matter with self-reconfiguring robots
A Unified CPU-GPU Protocol for GNN Training
Software stack for an analog mesh computer: the case of a nanophotonic PDE accelerator
Asteroid: scalable online memory diagnostics
Interactive data science at scale
The Advanced Particle-astrophysics Telescope (APT): Computation in Space
A new placement algorithm for the optimization of fault tolerant circuits on reconfigurable devices
Using Personality Metrics to Improve Cache Interference Management in Multicore Processors
NARS: Neuromorphic Acceleration through Register-Streaming Extensions on RISC-V Cores
BC-AMAT: Considering Blocked Time in Memory System Measurement
A shared-FPU architecture for ultra-low power MPSoCs
Time-sliced quantum circuit partitioning for modular architectures
Autotuning and adaptivity in energy efficient HPC systems: the ANTAREX toolbox
High Performance Coordinate Descent Matrix Factorization for Recommender Systems
Scaling application properties to exascale
A hybrid data model for large-scale analytics
GANFuzz: a GAN-based industrial network protocol fuzzing framework
Advancing Wearable Health and Sports Monitoring Through an Edge-Cloud AI Continuum. Invited Paper
PEARL: Enabling Portable, Productive, and High-Performance Deep Reinforcement Learning using Heterogeneous Platforms
Terminator: a data-level hybrid framework for intellectual property theft detection and prevention
Energy and side-channel security evaluation of near-threshold cryptographic circuits in 28nm FD-SOI technology
On the adoption of PUF for key agreement scheme in Internet of Things
Optimizing memory affinity with a hybrid compiler/OS approach
Energy efficiency of a parallel HEVC software decoder for embedded devices
Cutting-Edge Strategies for Radiation Effect Estimation on Asteroids Space Mission: Invited Paper
Learning, evolution and adaptation in racing games
Overcoming the "Memory Wall" by improved system design exploration and a link to process technology options
FullSparse: A Sparse-Aware GEMM Accelerator with Online Sparsity Prediction
Towards a new tuple-based programming paradigm for expressing and optimizing irregular parallel computations
An MPSoC design approach for multiple use-cases of throughput constrainted applications
Symbiotic scheduling of concurrent GPU kernels for performance and energy optimizations
A framework for predicting trajectories using global and local information
Mont-Blanc: towards energy-efficient HPC systems
Jalapeno: secentralized grid computing using peer-to-peer technology
MFC-DoH: DoH Tunnel Detection Based on the Fusion of MAML and F-CNN
Finding Maximum Cliques on a Quantum Annealer
DCT Learning-Based Hardware Design for Neural Signal Acquisition Systems
Software-managed energy-efficient hybrid DRAM/NVM main memory
Proceedings of the 17th ACM International Conference on Computing Frontiers, CF 2020, Catania, Sicily, Italy, May 11-13, 2020
Accelerating tile low-rank GEMM on sunway architecture: POSTER
Energy-Aware IoT Deployment Planning
Escalation of TRUST analysis in web
Strategies for dynamic memory allocation in hybrid architectures
Enabling Fast System-Level Integration and Prototyping of Accelerator-Rich Platforms
QHDL: a Low-Level Circuit Description Language for Quantum Computing
Protective redundancy overhead reduction using instruction vulnerability factor
Denseflex: A Low Rank Factorization Methodology for Adaptable Dense Layers in DNNs
Scaling trends in adiabatic logic
Free atomic consistency in storage class memory with software based write-aside persistence
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, Como, Italy, May 16-19, 2016
AdaTP: Enhancing Temporal Prefetching with Adaptive Metadata Filtering
Quantum computing simulator on a heterogenous HPC system
Cost-effective soft-error protection for SRAM-based structures in GPGPUs
Design of a spintronic arithmetic and logic unit using magnetic tunnel junctions
Virtual interacting network community: exploiting multi-core architectures to increase security
Hybrid parallel programming with MPI and unified parallel C
Performance characteristics of an adaptive mesh refinement calculation on scalar and vector platforms
When prefetching improves/degrades performance
Digital signatures and signcryption schemes on embedded devices: a trade-off between computation and storage
Efficient stack distance computation for priority replacement policies
High-level synthesis for complex applications: the Bambu approach
RedMulE-FT: A Reconfigurable Fault-Tolerant Matrix Multiplication Engine
VPsec: countering fault attacks in general purpose microprocessors with value prediction
On the maximum function in stochastic computing
Adaptive multi-tier intelligent data manager for Exascale
Embedding principal component analysis for data reduction in structural health monitoring on low-cost IoT gateways
Core monitors: monitoring performance in multicore processors
VALib and SimpleVector: tools for rapid initial research on vector architectures
Proceedings of the 15th ACM International Conference on Computing Frontiers, CF 2018, Ischia, Italy, May 08-10, 2018
Adaptive task duplication using on-line bottleneck detection for streaming applications
NeurDORA: Neural-Aided Decentralized Offloading Based on Resource Auction
A comprehensive analysis of constant-time polynomial inversion for post-quantum cryptosystems
Where's Waldo?: identifying anomalous behavior of data-only attacks using hardware features
ARADA: Adaptive Resource Allocation for Improving Energy Efficiency in Deep Learning Accelerators
Improving Error Resilience Analysis Methodology of Iterative Workloads for Approximate Computing
A Deep Dive into Integration Methodologies in RISC-V
Automated generation of layout and control for quantum circuits
An Open-Hardware Coarse-Grained Reconfigurable Array for Edge Computing
Scheduling dynamic parallelism on accelerators
Optimizing the accuracy of a rocket trajectory simulation by program transformation
Artificial versus spiking neural networks for reinforcement learning in UAV obstacle avoidance
HELICoiD: interdisciplinary and collaborative project for real-time brain cancer detection: Invited Paper
Design and implementation of a stream-based distributedcomputing platform using graphics processing units
Reliability Analysis of Microarchitectural Faults in GPGPU-based HPC Systems
A reconfigurable cache architecture for energy efficiency
BLOB computing
Experimenting with Emerging RISC-V Systems for Decentralised Machine Learning
Converting massive TLP to DLP: a special-purpose processor for molecular orbital computations
SKOPE: a framework for modeling and exploring workload behavior
CnC-Hadoop: a graphical coordination language for distributed multiscale parallelism
BILP-Q: quantum coalition structure generation
Assessing the potential of hybrid hpc systems for scientific applications: a case study
LeakageFreeSpec: Applying the Wiping Approach to Defend Against Transient Execution Attacks
Pruning hardware evaluation space via correlation-driven application similarity analysis
A Lightweight Architecture for Real-Time Neuronal-Spike Classification
Abstracting parallel program specification: a case study on k-means clustering
Power availability provisioning in large data centers
HAGAR: Hashgraph-based Aggregated Communication and Remote Attestation
Energy-aware data prefetching for multi-speed disks
Quantitative analysis of parallelism and data movement properties across the Berkeley computational motifs
A QoS-enabled packet scheduling algorithm for IPSec multi-accelerator based systems
A constrained extremum-seeking control for CPU thermal management
Manycore work stealing
Solution of Backtracking Problems on Tile-Centric AI Accelerators
ERBIUM: a deterministic, concurrent intermediate representation for portable and scalable performance
A flexible approach to efficient resource sharing in virtualized environments
AMTCP: an adaptive multi-path transmission control protocol
Computational Climate Science: Less Moore, More Brain
Proceedings of the 8th Conference on Computing Frontiers, 2011, Ischia, Italy, May 3-5, 2011
T-RecX: Tiny-Resource Efficient Convolutional neural networks with early-eXit
Parallel genomic sequence-search on a massively parallel system
Examining the practical side channel resilience of ARX-boxes
MP net as abstract model of communication for message-passing applications
Moving to memoryland: in-memory computation for existing applications
Morphogenesis as an amorphous computation