yusuke1997/dblp-id-title huggingface dataset:
Generalized multi-polarity Haar transform
A Transient Response Improved Digital LDO with an Approximate CEAG Analog-to-Frequency Domain Converter
Temperature and power measurement of modern dual core processor by infrared thermography
A novel pedagogical method for Integrated Circuit and systems education using the Variational Thermodynamic principle
Multiobjective transshipment point assignment in China express delivery network
A novel scalable parallel architecture for biological neural simulations
A high-speed low-voltage phase detector for clock recovery from NRZ data
Variable-gain up-converter with current reuse for WCDMA wireless transmitters
A 4-7 GHz Broadband Cryogenic GaAs mHEMT LNA with a Flatness Gain Variation of ±1.2 dB
An improved Wigner distribution synthesis method for separation of multiple nonstationary signals
Multi-band OFDM: a new approach for UWB
A novel design technique for very low voltage MOS translinear circuits
Energy-Efficient Pulse-Based Convolution for Near-Sensor Processing
Characterization of Single Event Upsets of Nanoscale FDSOI Circuits Based on the Simulation and Irradiation Results
A VLSI spike-driven dynamic synapse which learns only when necessary
Sharing Multiple Secrets using Visual Cryptography
Subthreshold-leakage suppressed switched capacitor circuit based on super cut-off CMOS (SCCMOS)
A 0.2V 2.3pJ/Cycle 28dB output SNR hybrid Markov random field probabilistic-based circuit for noise immunity and energy efficiency
A Compact 4-Decade Dynamic Range Readout Module for Gamma Spectroscopy and Imaging
Cross-Grade Curriculum Group Based Teaching Experiment System for Innovative Design of IoT Intelligent Dynamic Measurement and Control
Null Beamforming to Self in Cooperative MIMO for Full-Duplex Systems
A new stereo packing format based on checkerboard sub-sampling for efficient stereo video coding
Laplacian model-based inverse quantization for DCT-based image codec system
Blind block synchronization algorithms in cyclic prefix systems
Watermarking based IP core protection
An algebraic principle in blind separation of single source signal
A 10-bit 100-MS/s 50 mW CMOS A/D converter
A 77 GHz Power Amplifier Design with in-Phase Power Combing for 20 dBm Psat in a 40-nm CMOS Technology
Hardware realization of fuzzy adaptive filters for non linear channel equalization
A VLSI implementation of a universal programmable low sensitivity sampled data filter
A highly linear 4GS/s uncalibrated voltage-to-time converter with wide input range
Design and Implementation of Routing Scheme for Wireless Network-on-Chip
A 800-Mb/s 0.89-pJ/b reference-less optical receiver with pulse-position-modulation scheme
Active RC filter with reduced capacitance by current division technique
Transform-domain Partial Prediction Algorithm for Intra Prediction in H.264/AVC
An Active Microchannel Neural Interface with Artifact Reduction
Live Demonstration: Haptic-Enhanced Bioimpedance Needle for Assisting Central Venous Catheterisation
Frame-level data reuse for motion-compensated temporal filtering
Neural Microprobe Device Modelling for Implant Micromotions Failure Mitigation
High-Performance/Low-Area Power-Gating Switch Linear Array for Energy-Efficient LSIs with an Optimum Switch-Timing Control
Performance comparison of LDPC-coded FBMC and CP-OFDM in beyond 3G context
Hardware implementation of the SAFER+ encryption algorithm for the Bluetooth system
Comparison of spike encoding schemes in asynchronous vision sensors: Modeling and design
A 94.8% Peak-Efficiency 3-Level Buck Converter with Fast Flying Capacitor Charging Technique
16-channel single-chip current-mode track-and-hold acquisition system with 100 dB dynamic range
A $2.53 \mu \mathrm{W}/\text{channel}$ Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros
A novel interpolation scheme for quincunx-subsampled images
Study of silicon core coaxial through silicon via for three dimensional integration
Register-based multi-port perfect shuffle networks
Energy efficient memory assignment
Synchronization phenomena in coupled logistic maps involving parametric force
Inductive ESD Protection For Narrow Band and Ultra-Wideband CMOS Low Noise Amplifiers
Fractional delay digital filters
Experimental Results on Power Efficient Single-poly Floating Gate Rectifiers
Iterative system modeling using multigrid techniques
Live Demonstration: A Temperature Sensor with Analog Encryption
3D wavelet video codec and its rate control in ATM network
Topology-Based Exact Synthesis for Majority Inverter Graph
SPAT: FPGA-based Sparsity-Optimized Spiking Neural Network Training Accelerator with Temporal Parallel Dataflow
Novel Stochastic Computing using Amplitude and Frequency Pulse Encoding
Time-of-Flight Pixel with Homodyne Phase Demodulation in Standard CMOS Technology
Decoupling the Multi-Rate Dataflow Execution in Coarse-Grained Reconfigurable Array
Design and Implementation of an Energy-Efficient Detector for Uplink Cell-Free MIMO Networks
Fast timing analysis of plane circuits via two-layer CNN-based modeling
Error-Resilience Transcoding of H.264/AVC Compressed Videos
A novel method of constructing Quasi-Cyclic RS-LDPC codes for 10GBASE-T Ethernet
Energy efficient transconductor for widely programmable analog circuits and systems
A Cascade SVM Approach for Head-shoulder Detection using Histograms of Oriented Gradients
A 8.1/5.4/2.7/1.62 Gb/s receiver for DisplayPort Version 1.3 with automatic bit-rate tracking scheme
Input dependent clock jitter in high speed and high resolution ADCs
Variability analysis of a hybrid CMOS/RS nanoelectronic calibration circuit
Live demonstration: A HMM-based real-time sign language recognition system with multiple depth sensors
Reconstruction of block-sparse signals by using an l2/p-regularized least-squares algorithm
Improved wave-digital approach to numerically integrating the PDES of fluid dynamics
A Low Noise, High Efficiency Two Stage Envelope Modulator Structure for EDGE Polar Modulation
Forecasting of Ramp-Up of Spatial Average Irradiance by Formulation of Cloudy to Fine State Transition
A Spiking Recurrent Neural Network with Phase Change Memory Synapses for Decision Making
Wavelet-transform-based strategy for generating new Chinese fonts
A non-iterative equivalent waveform model for timing analysis in presence of crosstalk
RSSI Amplifier Design for a Feature Extraction Technique to Detect Seizures with Analog Computing
A Wide-Range Low-cost Temperature to Digital Converter Independent of Device Models
Design and Synthesis of a Carry-Free Signed-Digit Decimal Adder
Optimization techniques of AAC decoder on PACDSP VLIW processor
Ground penetrating radar image enhancement using singular value decomposition
Efficient ILP-based variant-grid analog router
Low power 10-transistor full adder design based on degenerate pass transistor logic
Finite-length synthesis filters for non-uniformly time-interleaved analog-to-digital converter
A Flexible FPGA-Based Accelerator for Efficient Inference of Multi-Precision CNNs
Hardware implementation of evolutionary digital filters
Efficient decision feedforward equalizer with parallelizable architecture
A 7-GHz Fast-Lock 2-Step TDC-based All-Digital DLL for Post-DDR4 SDRAMs
Stroboscopic model and bifurcations in TCP/RED
Analytical Design Equations for Class-E Power Amplifiers with Finite DC-Feed Inductance and Switch On-Resistance
A design approach to automatically synthesize ANSI-C assertions during High-Level Synthesis of hardware accelerators
Wavelet-Based Time-Varying Linear System Modeling and Adaptive Filtering
A memory-efficient deblocking filter for H.264/AVC video coding
Heterogeneous systems with reconfigurable neuromorphic computing accelerators
A novel approach for FFT data reordering
New digital quadrature demodulator for real-time hand-held ultrasound medical imaging device
Resolving Unusual Gate Current and Dielectric Breakdown of Solution Processed Carbon Nanotube Thin Film Transistor
A new speech/non-speech classification method using minimal Walsh basis functions
Invariant Sets for General Second-Order Lowpaws Delta-Sigma Modulators with DC Inputs
A 160MHz-to-2GHz low jitter fast lock all-digital DLL with phase tracking technique
Sketching-based high-performance biomedical big data processing accelerator
Towards an ultra low power chemically inspired electronic beta cell for diabetes
A context saving fault tolerant approach for a shared memory many-core architecture
Weighted Sensitivity Minimization Synthesis of 2-D Filter Structures Using the Fornasini-Marchesini Second Model
CMOS DAC-sharing stimulator for neural recording and stimulation arrays
Optimal placement of decoupling capacitors on PCB using Poynting vectors obtained by FDTD method
Symbolic Simulation Enhanced Coverage-Directed Fuzz Testing of RTL Design
A Sigma-Delta Frequency Discriminator Based Synthesizer
Efficient high radix modular multiplication for high-speed computing in re-configurable hardware [cryptographic applications]
Usable speech detection using a context dependent Gaussian mixture model classifier
Versatile graphs for tail-biting convolutional codes
A 41.7 MS/s 2.4 ps-rms-jitter Time Converter With 4-Core Interleaved Analog-Multiplexed Architecture
Matching considerations in I/Q A/D converter pairs
A fault-tolerant, DFA-resistant AES core
GraSS: Graph Neural Networks for Loop Closure Detection with Semantic and Spatial Assistance
CMOS operational transconductance amplifier for PRML read channel applications
A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test
WiVir: Exploiting WiFi-based Virtual Antenna Array for Passive Stationary Human Localization
A CAD tool for benchmarking MOSFET models
A wide pull-in range fast acquisition hardware-sharing two-fold carrier recovery loop
Low-voltage low-sensitivity switched-capacitor bandpass Sigma-Delta modulator
Effect of capacitor nonlinearity on the oscillation frequency of a digitally-controlled oscillator using oppositely-coupled PMOS capacitor pairs
A Tool for Automated Design of Sigma-Delta Modulators Using Statistical Optimization
A complete pipelined MMSE detection architecture in a 4x4 MIMO-OFDM receiver
Restoration method of missing areas in still images using GMRF model
An inductorless frequency divider with 15GHz locking range using 90nm CMOS technology
Low-power and compact NP dynamic CMOS adder with 16nm carbon nanotube transistors
Neuromorphic computing with hybrid memristive/CMOS synapses for real-time learning
Low complexity compensation of frequency dependent I/Q imbalance and carrier frequency offset for direct conversion receivers
Distributed Injection-Locking in Analog Ising Machines to Solve Combinatorial Optimizations
A regular parallel multiplier which utilizes multiple carry-propagate adders
Low Power Integrate and Fire Circuit for Data Conversion
Design of a square-root-raised-cosine FIR filter by a recursive method
A mobile environmental sensing system to manage transportation and urban air quality
Optimization of the PLL based TRNG design using the genetic algorithm
Study on subjective quality assessment of Digital Compound Images
380 MHz Low-power Sharp-rejection Active-RC LPF for IEEE 802.15.4a UWB WPAN
Dynamically Generated Compact Neural Networks for Task Progressive Learning
Functional Verification of ECL Circuits Including Voltage Regulators
A generalized semi-blind channel estimation for pilot-aided OFDM systems
Device Codesign using Reinforcement Learning
A novel frequency compensation technique for low-voltage low-dropout regulator
A cost-efficient delay-fault monitor
Multimodal CNN Fusion Architecture with Multi-Features for Heart Sound Classification
Reliable analysis of settling errors in SC integrators-application to the design of high-speed ΣΔ modulators
The Design of a Reconfigurable Continuous-flow Mixed-radix FFT Processor
Compressed Sensing by Phase Change Memories: Coping with Encoder non-Linearities
CAUNet: Context-Aware U-Net for Speech Enhancement in Time Domain
Isolated Network Model based on Cell for Software Radio System
Demystifying the cost of task migration in distributed memory many-core systems
Review and Analysis of CMOS Current Readout Circuits for Biosensing Applications
A necessary condition for Schur stability of 2D polynomials [digital filters]
An image compression using self-organization with genetic algorithm
Hardware platform of Analog-to-Information converter using Non Uniform Wavelet Bandpass Sampling for RF signal activity detection
An Operational Amplifier Assisted Input Buffer and An Improved Bootstrapped Switch for High-Speed and High-Resolution ADCs
Synchronization scheme in non-coherent demodulator for TDMA digital mobile radio system
Grouped input power sensitive transition an input sequence compaction technique for power estimation
Case study of interconnect analysis for standing wave oscillator design
Low complexity baseband transceiver design for narrow band power line communication
80dB dynamic range 100KHz bandwidth inverter-based ΣΔ ADC for CMOS image sensor
Low power reference voltages for stepwise display drivers
Real-time sensory information processing using the TrueNorth Neurosynaptic System
A Low-cost High-speed Source-synchronous Interconnection Technique for GALS Chip Multiprocessors
High-speed front end for LED-Photodiode based fluorescence lifetime measurement system
Control theory approach to shadowing and possible applications
Non-uniform sampling SC circuits based on noise-shaping feedback coding
A Reprogrammable Low Power Closed-Loop Optogenetic Platform for Freely Moving Animals
High Dynamic Range Interface System for a Micromachined Integrated AC-Power Sensor
Revolving hierarchy in a hypercube distributed system
Symmetry-based analytically closed-form design of variable fractional-delay FIR digital filters
Architectural Synthesis of DSP Applications with Dynamically Reconfigurable Functional Units
On the use of sliding mode control in bidirectional converters
Analog integrated 2-D optical flow sensor with programmable pixels
Modern Architecture Style Transfer for Ruin or Old Buildings
Area-effective FIR filter design for multiplier-less implementation
Lost Motion Vector Recovery Algorithm
On the characterization of limit cycle modes in oversampled data converters
Convergence Analysis of Gradient Adaptive Algorithms for Arbitrary Inputs
Exploring the Relationship between Speech and Skin Conductance for Real-Time Arousal Monitoring
Effect of External Source Impedance on the Input Impedance of Digital Impedance Circuits
Statistical modeling of multimodal neuroimaging data in non-subsampled shearlet domain using the student's t location-scale distribution
Fast time-domain symbolic simulation for synthesis of sigma-delta analog-digital converters
Trajectory deadlock in power system models
A unified probabilistic approach to face detection and tracking
Live Demonstration: Energy-Efficient Data Symbol Detection Via Boosted Learning for Multi-Actuator Data Storage Systems
A New Soft-input Hard-output decoding algorithm for Turbo Product Codes
An implantable mixed analog/digital neural stimulator circuit
High-Temperature Empirical Modeling for the I-V Characteristics of GaN150-Based HEMT
A GA-based routing method with an upper bound constraint
Timing-driven global routing with efficient buffer insertion
A Novel LMS-Based Calibration Scheme for Fractional-N Digital PLLs
New approximate QR-LS algorithms for minimum output energy (MOE) receivers in DS-CDMA communication systems
A neural network approach for fault diagnosis of large-scale analogue circuits
A wideband carrier-recovery system for multilevel QAM signals
An analogic CNN engine board with the 64×64 analog I/O CNN-UM chip
Side channel analysis resistant design flow
A 6.25 MHz BW 8-OSR fifth-order single-stage sigma-delta ADC
Fine-Grained Instruction Placement in Polymorphic Computing Architectures
An improved PDS calculation procedure for hybrid systems
Improving AWE Accuracy Using Multipoint Padé Approximation
A PD Feed-back Rate Control Algorithm for Multiple Video Object Coding
Exponentially tapered H-tree clock distribution networks
Spatial instability in one-way open coupled double-scroll circuits
On the development of a MODEM for data transmission and control of electrical household appliances using the low-voltage power-line
Low-complexity two-rate based multivariate impulse response reconstructor for time-skew error correction in m-channel time-interleaved ADCs
An ultra wideband low complexity circuit transceiver architecture for sensor networks
XbNN: Enabling CNNs on Edge Devices by Approximate On-Chip Dot Product Encoding
IR-UWB transmitters synthesized from standard digital library components
Low power low leakage clock gated static pulsed flip-flop
An Efficient Direct Memory Access (DMA) Controller for Scientific Computing Accelerators
A 0.5-V 1.28-MS/s 10-bit SAR ADC with switching detect logic
Low-Latency Quasi-Synchronous Transmission Technique for Multiple-Clock-Domain IP Modules
Modeling and Simulation of a Thin Film Power Transfer Cell for Medical Devices and Implants
Noise Reduction for Low-power Broadband Filtering
Live demonstration: MNET: A visually rich memristor crossbar simulator
Live Demonstration: Event-based Learning in Spiking Networks on Analog Hardware using JAX
WiMAX/LTE Receiver Front-end in 90nm CMOS
Ultra high frequency integrated circuits using transferred substrate heterojunction bipolar transistors
A Low Phase Noise Quad-Band CMOS VCO with Minimized Gain Variation for GSM/GPRS/EDGE
An I/Q Channel Time-Interleaved Band-Pass Sigma-Delta Modulator for a Low-IF Receiver
Introducing deglitched-feedback plus convergent encoding for straight hardware implementation of asynchronous finite state machines
Class AB Pseudo-Differential CMOS Squarer Circuit
Optimization of RF circuits by expert system monitored genetic computation
Data partition for wavefront parallelization of H.264 video encoder
A 10MHz-BW, 5.6mW, 70dB SNDR ΔΣ ADC using VCO-based integrators with intrinsic DEM
Steady states prediction in nonlinear circuit by wavelet transform
A Cepstrum Chip: Architecture and Implementation
A pattern compaction technique for power estimation based on power sensitivity information
Human behavior recognition from arbitrary views
A Double notch RF filter architecture for SAW-less GPS receivers
Adaptive equalization for filter bank based multicarrier systems
Design of a CMOS Parametric Frequency Divider with 2.4-GHz Output Frequency for RF Systems-on-a-Chip
Third order harmonic cancellation technique for a parametric amplifier
Dynamic computation in a recurrent network of heterogeneous silicon neurons
Joint Capacitive Sensing and Frequency Selection for Fast Medical Tests
A Bespoke Design Approach to Low-Power Printed Microprocessors for Machine Learning Applications
Audio signal processing via harmonic separation using variable Laguerre filters
A calibration technique for a high-resolution flash time-to-digital converter
Fingerprinting Deep Neural Networks - a DeepFool Approach
A low-power minimum distance 1D-search engine using hybrid digital/analog circuit techniques
High speed V.32 trellis encoder/decoder implementation using FPGA
Integrated chemical sensors based on carbon black and polymer films using a standard CMOS process and post-processing
UWB for low data rate applications: technology overview and regulatory aspects
Synthesis and optimization of interfaces between hardware modules with incompatible protocols
High-Accuracy, High-Precision DEM-CCII Amplifiers
Weighted Pulse Decomposition Analysis of Fingertip Photoplethysmogram Signals for Blood Pressure Assessment
Real-time test data acquisition and data processing enabling closed loop control systems for adaptive test
A 1.1 V low-power Sigma-Delta modulator for 14-b 16 kHz A/D conversion
Mixed Gaussian-impulse video noise removal via temporal-spatial decomposition
MIL-STD-1553+: Integrated remote terminal and bus controller at 100-Mb/s data rate
Poisson and Gaussian models for noisy devices
Multiply-Accumulate Enhanced BDD-Based Logic Synthesis on RRAM Crossbars
Effect of Word-length Precision on the Performance of MIMO Systems
Flexible and distributed real-time control on a 4G telecom MPSoC
Synthesis of Current Mode Building Blocks for Fuzzy Logic Control Circuits
Linear transform based motion compensated prediction for luminance intensity changes
Mismatch Compensated Design Techniques under Packaging-Induced Die Stress
A new algorithm for noise PSD matrix estimation in multi-microphone speech enhancement based on recursive smoothing
MVDR beamformer analysis of acoustic vector sensor with single directional interference
Fixed-frequency Pseudo Sliding Mode control for a Buck-Boost DC-DC converter in mobile applications: A comparison with a linear PID controller
On the effect of op-amp finite gain in delta-sigma modulators
Time-effective Fault Diagnosis Algorithms for Analog and Mixed-signal Circuits Using Sparsity-aware Multi-class Relevance Vector Machine
High-speed memory-saving architecture for the embedded block coding in JPEG2000
Effect of Mobile Ionic-charge on CMOS based Ion-sensitive Field-effect Transistors (ISFETs)
SmartFork: Partitioned Multicast Allocation and Switching in Network-on-Chip Routers
Small Area and Low Power Hybrid CMOS-Memristor Based FIFO for NoC
An 8-bit Switched-Resistor Pipeline ADC
Real-time H.263 encoding of QCIF-images on TMS320C6201 fixed point DSP
Quality-aware GSM speech watermarking
Sorting Binary Numbers in Hardware - A Novel Algorithm and its Implementation
Google Colab CAD4U: Hands-On Cloud Laboratories for Digital Design
Resource and Energy Efficient Implementation of ECG Classifier Using Binarized CNN for Edge AI Devices
A 24-bit floating-point audio DSP controller supporting fast exponentiation
Don't care filling for power minimization in VLSI circuit testing
A 50Gb/s repeater and 2 × 50Gb/s 27-1 PRBS generator
EchoWrite-SNN: Acoustic Based Air-Written Shape Recognition Using Spiking Neural Networks
On the Application of Data Weighted Averaging to Noise Shaping SAR ADCs
Frequency division using an injection-locked relaxation oscillator
An all-digital receiver for low power, low bit-rate applications using simultaneous wireless information and power transmission
A Reliable Delay-Based Physical Unclonable Function with Dark-Bit Avoidance
A low-power 2.4-GHz receiver for wireless implantable neural stimulators
Efficient implementation of real-time ECG derived respiration system using cubic spline interpolation
A 83.7% Resource Reduced FPGA-based Wired-Logic DNN Processor by Using Mixed-Precision Module Embedding Into Non-Linear Function LUT
Inductive power transfer system with a rotary transformer for contactless energy transfer on rotating applications
SVM method of estimating density, conditional probability, and conditional density
Robust Recovery of Sparse Signal from Compressed Measurements for Wireless Sensor Networks
A low-light SPAD vision array
A built-in current monitor for testing analog circuit blocks
Efficient network for non-binary QC-LDPC decoder
A high speed direct digital frequency synthesizer using a low power pipelined parallel accumulator
Motion detection using an aVLSI network of spiking neurons
Macromodeling for Nonlinear Distributed Interconnect Networks
A 2.4-GHz reference doubled fractional-N PLL with dual phase detector in 0.13-μm CMOS
A Narrowband RF Front End in 22-nm FD-SOI Featuring a Programmable Low-Noise Amplifier with a Configurable Noise-Power Trade-Off
Investigation of characteristics of tungsten oxide with different work pressures in photoelectrochromic cell
Implementation of nondeterministic finite automata in an autoassociative CAM circuit
An On-chip-trainable Gaussian-kernel Analog Support Vector Machine
Evolution of Pixel Level Snakes towards an efficient hardware implementation
Low complexity H.263 to H.264 video transcoding using motion vector decomposition
An output feedback-based start-up technique with automatic disabling for battery-less energy harvesters
Construction of an (r11, r12, r22)-Tournament from a Score Sequence Pair
K-best MIMO detection VLSI architectures achieving up to 424 Mbps
Underdetermined sparse source separation of convolutive mixtures with observation vector clustering