yusuke1997/dblp-id-title huggingface dataset:
Optimal SDRAM Buffer Allocator for Efficient Reuse of Layer IO in CNNs Inference Framework
A new speech modeling method: SYMPES
Specification and implementation of a cryptocoprocessor for ISDN
Finding all modes of nonlinear oscillations by the Krawczyk-Moore-Jones algorithm
An algorithm for optimal terms allocation for fixed point coefficients of FIR filter
A Spectral Matching Method for Pitch Estimation from Noise-corrupted Speech
Controllability and observability of RLC networks over F(z)
Analog-to-information conversion of sparse and non-white signals: Statistical design of sensing waveforms
On equalization with maximum covariance initialized cascade-correlation learning
Testing high resolution ADCs using deterministic dynamic element matching
Echo target determination using acoustic round trip delay for voice over IP conferences
Distributed application service for Internet information portal
A Spread Spectrum Clock Generator with Spread Ratio Error Reduction Scheme for DisplayPort Main Link
Parallel symbolic sensitivity analysis of large-scale linear analogue circuits
Low complexity image rejection demodulator for bluetooth LE applications
On synchronization phenomena in chaotic systems coupled by transmission line
A low-noise microsensor amplifier with automatic gain control system
1-V continuously tunable CMOS bulk-driven transconductor for Gm-C filters
Offset Cancellation in Incremental ∆Σ ADCs
Improving the Compression Efficiency of Displacement using Morton-ordered Micro-Image in Video-based Dynamic Mesh Coding
Automatic analog layout retargeting for new processes and device sizes
An algorithm GMST for extracting minimal siphon-traps and its application to efficient computation of Petri net invariants
Genetic-based automated synthesis and optimization of MEMS accelerometers with sigma-delta control
A survey of bottom-up behavioral modeling methods for analog circuits
Novel Framework for Enabling Hardware Acceleration in GNU Radio
Redox-Enabled Microscale Opto-Electronically Transduced Electrodes (ReMOTEs)
Wide-Range Variable Dynamics Using Switched-Capacitor Neuromorphs
A 0.5 V, 0.13 nW, 4-Transistor Over Temperature Protection Circuit for SoCs
A 5.3GHz low-phase-noise LC VCO with harmonic filtering resistor
Tracking properties of complex adaptive notch filter for detection of multiple real sinusoids
Nonlinear echo cancellation using an expanded correlation LMS algorithm
New circuits for realization of the 1st and 2nd order all-pass LC filters with a better technological feasibility
Live demonstration: The prototype of real-time image pre-processing system for satellites' remote sensing
A Class of Polynomial Filters with Equal Step-Response Overshoot
Computation by natural systems defined
High-Resolution Plantar Pressure Insole System for Enhanced Lower Body Biomechanical Analysis
A programmable floating-gate bump circuit with variable width
Low-complexity hop timing synchronization in frequency hopping systems
Set-membership filtering strategies for multipulse coding
Complex domain flexible non-linear function for blind signal separation
Influence of frequency compensation on the linearity of negative feedback amplifiers
Improved refinement search for H.263 to H.264/AVC transcoding based on the minimum cost tendency search
A PVT independent subthreshold constant-Gm stage for very low frequency applications
Algorithm-Hardware Co-Design for Ultra-Low-Power Large Language Models
A distributed amplifier based dispersive delay line
Bit-Serial Generalized Median Filters
Application of implantable wireless biomicrosystem for monitoring electrode-nerve impedance of animal after sciatic nerve injury
Comparison of different chaotic maps with application to image watermarking
Watermarks embedded in the permuted image
Explicit Formulas for the Design of Broadband Matching Bandpass Equalizers with Chebyshev Response
Cellular nanoscale network cell with memristors for local implication logic and synapses
An Event-Driven High-Speed Imaging and Trace Detection ROIC for Cryogenic Infrared FPAs
Design of stable minimax IIR digital filters using semidefinite programming
Steady state simulation of electrical circuits
Modulo-Free Architecture for Binary to Residue Transformation with respect to {2m-1, 2m, 2m+1} Moduli Set
Synthesis of Finite State Machines with Magnetic Domain Wall Logic
Estimating the fading coefficient in mobile OFDM systems using state-space model
Self-organizing topological tree
Challenges and limitations of NAND flash memory devices based on floating gates
Tight bounded localization of facial features with color and rotational independence
Chaos, coexisting attractors, and fractal basin boundaries in DC drives with full-bridge converter
A system-theoretic foundation for blind equalization of an FIR MIMO channel system
Amplification circuit and microelectrode array for HL-1 Cardiomyocyte action potential measurement
A hierarchy of input stages for current feedback operational amplifiers
A bit-serial implementation of mode decision algorithm for AVC encoders
Reducing the data switching activity of serialized datastreams
Resource-efficient Face Detector Using 1.5-bit Frame-to-frame Delta Quantization for Image Based Always-on Wake-up Application
Automatic age recommendation system for children's video content
Adaptive general scale interpolation based on similar pixels weighting
Quotient gradient methods for solving constraint satisfaction problems
A ±6ms-accuracy, 0.68mm 2 and 2.21μW QRS detection ASIC
Tap selection based MMSE equalization for high data rate UWB communication systems
MIPA4k: A 64×64 Cell Mixed-mode Image Processor Array
33-200Mbps, 3pJ/Bit True Random Number Generator Based on CT Delta-Sigma Modulator
Efficient VLSI architectures for matrix inversion in soft-input soft-output MMSE MIMO detectors
On the performance of discrete-time hybrid filter banks with coefficient errors and ARMA stochastic process input
On the design of CMFB transceivers for unknown channels
Hierarchical Symbolic Cirucit Analysis of Large-scale Networks on Multi-processor Systems
A Low Voltage, Low Power, BiCMOS, Audio-frequency Voltage Controlled Oscillator with Sinusoidal Ouptut
Overview of a new course on Autonomous Vehicle Systems
Hardware Implementation of Modified Noisy Gradient Descent Bit-Flipping Decoders
A technique to reduce the impact of hysterisys in ΣΔ analog to digital converters
A compatible DCT/IDCT architecture using hardwired distributed arithmetic
Nonlinear ICA solutions for convolutive mixing of PNL mixtures
A Fast and Flexible Accuracy-guaranteed Fractional Bit-widths Optimization Approach
Efficient Complex Matrix Inversion for MIMO Software Defined Radio
A Digital-to-Time Converter with Coupled Phase-Rotating LC Oscillators in 90-nm CMOS Technology
A Very Linear OTA with V-I Conversion based on Quasi-Floating MOS Resistor
PAM4 receiver with adaptive threshold voltage and adaptive decision feedback equalizer
Implantable Galvanic-Coupled Body Channel Communication Transceiver with Serpentine-Interconnection Electrode Pair for Post-Operative Monitoring of Joint Replacement
Adaptive multipath equalization time delay estimation with bias-removal
A different recursive formulation of 2-D digital inverse filter
A 65nm Logic-Compatible Embedded and Flash Memory for In-Memory Computation of Artificial Neural Networks
Efficient Floating-Point Divider based on Hybrid Cubic-Quadratic Goldschmidt Algorithm
A novel fine frequency estimation serial architecture applied in satellite communications
A complementary view on time-varying systems
Learning-based Algorithm for Real Imaging System Enhancement: Acoustic Resolution to Optical Resolution Photoacoustic Microscopy
A novel contribution to the RTD-based threshold logic family
A Novel Input Differential Pair for Improved Linearity Buffer and S/H Amplifier Design
ADM: A New Technique for the Simulation of CMOS Circuit Transients
Parabolic approximation: a new method for phase to amplitude conversion in sine-output direct digital frequency synthesizers
Modeling and Noninvasive Correction of Auditory Disorders with Inverse Artificial Neural Network
Bipolar, wideband, bias current source
Rational cycle decoding algorithm for the first-order delta-sigma modulator
Design optimisation of front-end neural interfaces for spike sorting systems
Efficient view maintenance in wireless networks [mobile database view maintenance applications]
A Second-Order Passive Noise-Shaping SAR ADC With 4× Passive Gain and A Two-Input-Pair Comparator
Compact and low-loss ESD protection design for V-band RF applications in a 65-nm CMOS technology
Design of accurate analog circuits for low voltage low power CMOS systems
New Normalized LMS Algorithms Based on the Kalman Filter
Switched-capacitors versus switched-currents: a theoretical comparison [in CMOS]
FPGA Accelerated Adaptive LDPC-based Quantum Error Correction by Bitwise Pipeline Parallelism
Low power InfomaxICA with compensation strategy for binaural hearing-aid
A method to convert near-perfect into perfect reconstruction FIR prototype filters for modulated filter banks
A wide tuning range, 1 GHz-2.5 GHz DLL-based fractional frequency synthesizer
Instruction level power model of microcontrollers
A general design of mixed IIR-FIR two channel QMF bank
Power system simulation using digital filter structures
Power spectrum of a sigma-delta modulator with hexagonal vector quantization and constant input
Area-time efficient serial-serial multipliers
Interleaved Hybrid Domain Learning for Super-Resolution MRI
Implementation and optimization of 3780-point FFT on multi-core system
Automatic EEG-based Spike Ripples Detection with Multi-band Frequency Analysis
A fast procedure for canonical ambiguity groups determination in nonlinear analog circuits
Fault-tolerant ripple-carry binary adder using partial triple modular redundancy (PTMR)
A programmable coefficient continuous-time A/D Delta-Sigma modulator
Improving EDP in multi-core embedded systems through multidimensional frequency scaling
An efficient 2-D DWT architecture via resource cycling
Investigation of Body Bias Impact in Si/SiGe Heterojunction Line TFETs: A Physical Insight
Comparison of two non-linear constrained algorithms for 3D image restoration
Integrating lumped networks into full wave TLM/FDTD methods using passive discrete circuit models
Video Anomaly Detection Based on Deep Generative Network
A digital self-calibration algorithm for ADCs based on histogram test using low-linearity input signals
Fully Balanced Second Order Active Filter Circuits Having Few Op-amps
A Low Noise 384×288 Uncooled Infrared Imager Based on Phase Difference Modulation
Timing-, Heat- and Area-driven Placement Using Self-organizing Semantic Maps
Random Subsampling based Signal Detection for Spatial Correlated Massive MIMO Channels
Local computation and estimation of wavelet coefficients in the dual-tree complex wavelet transform
Tunable current mirrors for ultra low voltage
Benchmarking Cryogenic Circuits using 5 nm FinFETs for Quantum Processing
A Low-Cost Strategy for Testing Analog Filters
High speed interface for system-on-chip design by self-tested self-synchronization
Live demonstration: Programmable vision chip with neighborhood level parallel processing
A New Strategy for Library-independent Layout Design
DC Offset Performance of Four LMS Adaptive Algorithms
Matching of low-noise amplifiers at high frequencies
A high-speed subranging system with background equalization of the sampling instants
A Digitally Controlled CMOS Receiver with -14 dBm P1dB for 77 GHz Automotive Radar
A novel 20-bit R-2R DAC structure based on ordered element matching
Training Modern Deep Neural Networks for Memory-Fault Robustness
Short Circuit Synchronous Electric Charge Extraction (SC-SECE) Strategy for Wideband Vibration Energy Harvesting
Optimum Highpass Filter in Linear Phase Perfect Reconstruction QMF Bank
Analog Implementation of a Mean Field Detector for Multiple Antenna Systems
Synchronization Via PID Control on Complex Directed Network with Delayed Nodes
Live Demonstration: Hitting a Table Tennis Ball with a Programmable Vision-System-on-Chip
Design of two-dimensional notch filter using bandpass filter and fractional delay filter
Design of variable 2-D digital filters with perfect linear-phase using matrix-array decomposition
An area-efficient differential input ADC with digital common mode rejection
Three-Dimensional Flexible-Module Placement for Stacked Three-Dimensional Integration
A time-to-first spike CMOS imager
A 0.7 μm-Pitch 108 Mpixel Nonacell-Based CMOS Image Sensor with Decision-Feedback Technique
A 34 nA Quiescent Current Switched-Capacitor Step-Down Converter with 1.2V Output Voltage and 0-5μA Load Current
On the second harmonic control requirements in balanced common-emitter BJT low noise amplifier
StreamPoP: Stream programming oriented power-efficient audio DSP
Low-Power Encoder and Compressor Design for Approximate Radix-8 Booth Multiplier
A low-power fractional decimator architecture for an IF-sampling dual-mode receiver
Reinforced Bit Allocation under Task-Driven Semantic Distortion Metrics
CNN-based Partitioning Structure Prediction for VVC Intra Speedup: Bottom-Up-based and Top-Down-based
Dual-loop cross-coupled feedback amplifier for low-IF integrated receiver architecture
Estimating the location of a sound source with a spike-timing localization algorithm
Bit-level optimized FIR filter architectures for high-speed decimation applications
Optimum design of very low distortion class E power amplifiers
A Method for Improving the Wearability of Capsule Positioning System Using Particle Filter
A simple M-dimensional model-based phase unwrapping based on integration by parts
A pre-emphasis circuit design for high speed on-chip global interconnect
Two color asynchronous event photo pixel
Subspace estimation-based constrained optimization method for multipath CDMA channels
The optimum power conversion efficiency and associated gain of an LC CMOS oscillator
A low distortion MOS sampling circuit
A DWT-based encoder architecture for symmetrically extended images
Strange Behavior in Inifinite and Transfinite Networks
RNS Hardware Matrix Multiplier for High Precision Neural Network Acceleration: "RNS TPU"
Investigation of DRAM PUFs reliability under device accelerated aging effects
Non-Recursive System Identification and Fault Detection in LVDC and ELVDC Grids
Rapid and precise instruction set evaluation for application specific processor design
A low power SoC bus with low-leakage and low-swing technique
Emergence of Gabor-Like Receptive Fields in a Recurrent Network of Mixed-Signal Silicon Neurons
Area efficient configurable physical unclonable functions for FPGAs identification
A reconfigurable baseband processor for wireless OFDM synchronization sub-system
TDMA-based communication scheduling in system-on-chip video encoder
A New Architecture for Analog Boundary Scan
Analytical design procedure for resonant inductively coupled wireless power transfer system with class-E 2 DC-DC converter
Ultrasonic bearing estimation using a MEMS microphone array and spatiotemporal filters
A 0.5-to-3GHz Full-Duplex Receiver with 27dB Self-Interference-Cancellation
A Small-Footprint Quasi-Passive 1 st Order ΣΔ Modulator
Output Characteristics of Class E Amplifier With Nonlinear Shunt Capacitance Versus Supply Voltage
A hybrid CMOS APS pixel for wide-dynamic range imaging applications
Distraction-related EEG dynamics in virtual reality driving simulation
An aVLSI recurrent network of spiking neurons with reconfigurable and plastic synapses
3.2 Gbps Output Driver With Dual Low Voltage Modes and Low Power PVT Compensation Circuit
Short-Range Communication for Small Biomedical Implants using Magnetoelectric Effect
A Dithered-Digital-Mixing Background Timing-Skew Calibration Method for Time-Interleaved ADCs
Toward a wireless optical communication link between two small unmanned aerial vehicles
Highly Linear Bipolar Transconductor For Broadband High-Frequency Applications with Improved Input Voltage Swing
A mixed-signal IC for a semi-implantable hearing aid
Experimental verification and benchmark of in-memory principal component analysis by crosspoint arrays of resistive switching memory
New constrained affine-projection adaptive-filtering algorithm
VLSI architecture design for a fast parallel label assignment in binary image
Image Registration Method based on Local High Order Approach
Tradeoff analysis of FPGA based elliptic curve cryptography
Spiking Neural Network Based Region Proposal Networks for Neuromorphic Vision Sensors
Damping improvement through tuning controller limits of a series FACTS device
A Loser-Take-All Error Amplifier for DC Power Supply Control
Self-powered sensing and time-stamping of rare events using CMOS Fowler-Nordheim tunneling timers
TAFNet: A Three-Stream Adaptive Fusion Network for RGB-T Crowd Counting
Performance of DCSK system with blanking circuit for power-line communications
Critical quantization decisions in transform coding and blocking artifacts
A track&hold-mixer for direct-conversion by subsampling
Effect of Stochastically Coupling on Frustrated Triangular Oscillatory Network
A Single-chip 33pJ/pulse 5th-derivative Gaussian based IR-UWB Transmitter in 0.13µm CMOS
Hybrid Write Bias Scheme for Non-Volatile Resistive Crossbar Arrays
An Improved Frame-Level Pipelined Architecture for High Resolution Video Motion Estimation
Dynamic gene regulatory network analysis using Saccharomyces cerevisiae large-scale time-course microarray data
Implementation of a Time-warping AER Mapper
A low power charge-recycling ROM architecture
Allocation of Multiport Memories in ASIC Data Path Synthesis
Optimizing continuous-time filters driven by bang-bang signals
An adaptive silicon synapse
Local visual perceptual clues and its use in videophone rate control
Ultrasonic liver tissues classification by fractal feature vector based on M-band wavelet transform
RL Based Network Accelerator Compiler for Joint Compression Hyper-Parameter Search
A parallel model combination scheme with improved delta parameter compensation
Image compression with interpolation in wavelet-transform domain
Experimental study of leakage-delay trade-off in Germanium pMOSFETs for logic circuits
A 3.3 V CMOS line-driver for serial bus
Design of FIR filters with discrete coefficients: a semidefinite programming relaxation approach
TITAN: Tile Timing-Aware Balancing Algorithm for Speeding Up the 3D-HEVC Intra Coding
Underwater optical image dehazing using guided trigonometric bilateral filtering
A novel ISFET sensor architecture using through-Silicon vias for DNA sequencing
Robust Nighttime Vehicle Detection Based on Foveal Classifiers
Probability metrics to calibrate stochastic chemical kinetics
Bifurcations in frequency controlled load resonant DC-DC converters
Comparison of Three Pre-Amplifier Circuits for Time Readout of SiPM in TOF-PET Detectors
A finite test algorithm for 2D Schur polynomials based on complex Lyapunov equation
Bayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process
Auditory speech processing for scale-shift covariance and its evaluation in automatic speech recognition
Gas classification using binary decision tree classifier
A O.094-mm 2 25-29 GHz Low Power $\text{Class}-\mathrm{F}_{234}$ VCO
Low-complexity proportionate algorithms with sparsity-promoting penalties
Ultra-low Power Subthreshold Flip-flop Design
CMOS low current measurement system for biomedical applications
A reconfigurable fully-integrated 0.18µm CMOS feed forward equalizer IC for 10-Gb/sec backplane links
Training of Artificial Neural Network for Tomographic Reconstruction of Time Varying Object
A new prescaler for fully integrated 5-GHz CMOS frequency synthesizer
Comparison of IIR Filter Structure Complexities Using Multiplier Blocks
System theoretic ideas for construction of ND in (N≥2) causal, stable, perfect reconstruction filter banks
Dual-line distance sensor with on-chip phase generator and suppression of ambient light
Synchrony detection for spike-mediated computation
Analysis of layout density in FinFET standard cells and impact of fin technology
A modelling of ionospheric delay over Chiang Mai province
Design of a Self-Organizing Learning Array system
Resource Redistribution in Internet of Things applications by Compressed Sensing: A Survey
Multiple project wafers for medium-volume IC production
Tunable multiband RF CMOS active filter arrays
FIR filter design with group delay constraint using semidefinite programming
Adaptive channel equalization: A simplified approach using the quantized-LMF algorithm
Algorithm and architecture design for a low-complexity adaptive equalizer
A 21pJ/pulse FCC compliant UWB pulse generator
Silicon neurons that burst when primed
Estimation of Energy Transfer Function Sensitivity using an Energy-Based Heuristic Operator Method
A BiCMOS Dynamic Divider Circuit Using a Restoring Iterative Architecture with Carry Look Ahead for CPU VLSI
Concurrent bit-plane coding architecture for EBCOT in JPEG2000
Wavelet based fingerprint image enhancement
Cellular sensor-processor array based visual collision warning sensor
Evaluation of High Throughput Turbo-Decoder Architectures
Noise-tolerant design and analysis for a low-voltage dynamic full adder cell
A simultaneous TX and RX I/Q imbalance calibration method
Further Improve Excellent Graph-Based FPGA Technology Mapping by Rewiring
Towards an implantable ultra-low power biochemical signal processor for blood and tissue monitoring
A tunable CMOS square-root domain oscillator
A 32×24-bit multiplier-accumulator with advanced rectangular styled Wallace-tree structure
Dynamically Swappable Digit-Serial Multi-Precision Deep Neural Network Accelerator with Early Termination
Process, Voltage, and Temperature-stable Adaptive Duty Cycle based PUF
Effect of Switched-Capacitor CMFB on the Gain of Fully Differential Op-Amp for Design of Integrators
Visual Saliency Prediction for Augmented Reality Videos
A complex charge sampling scheme for complex IF receivers
A $197-\mu\mathrm{W}\ 2.4-GHz$ Third-Harmonic Receiver with Enhanced Out-of-band Rejection for IEEE 802.11ba
Circuit design technologies for high-speed lightwave communications beyond 40 Gbit/s
Derivation algorithm of transfer functions of 2-D continuous-discrete systems
Systematic synthesis method for analogue circuits. Part II. Active-RC circuit synthesis
Low-Order Rational Approximation of Interconnects Using Neural-Network Based Pole-Clustering Techniques
State encoding watermarking for field authentication of sequential circuit intellectual property
High-performance multiplexer-based logic synthesis using pass-transistor logic
Exactly solvable chaotic circuit
An aVLSI programmable axonal delay circuit with spike timing dependent delay adaptation
A Unified Approach to Split Structure Adaptive Filtering
H ∞ control for singularly perturbed sampled data systems
A Compact Array Processor Based on Self-timed Simultaneous Bidirectional Signalling
A 10MHz BW 78dB DR CT ΣΔ modulator with novel switched high linearity VCO-based quantizer
Computing-in-Memory Paradigm Based on STT-MRAM with Synergetic Read/Write-Like Modes
A minimal-gate-count fully digital frequency-tracking oversampling CDR circuit
Using self-organizing maps to control physical robots with omnidirectional drives
Design of a Real-time Multi-individual Boxing Classification System Using Multiple Mode Sensing
Deep Reinforcement Learning for Analog Circuit Sizing
An adaptive network for blind separation of independent signals
A blind technique for total interference rejection
High speed search and memory efficient Huffman coding
Convolutional Three-Stream Network Fusion for Driver Fatigue Detection from Infrared Videos
A phase-adjustable negative phase shifter using a single-shot locking method
Rotation map with a controlling segment and its application to A/D converters
A 100 MHz 9.14-mW 8-Bit Shift Register Using Double-Edge Triggered Flip-Flop
On the use of approximate adders in carry-save multiplier-accumulators
Heuristic assignment-driven scheduling for data-path synthesis
A modeling method of a rule based control system with hierarchical Petri net
Minor and major subspace computation of large matrices
On Multidimensional HARF and SHARF Algorithms
Towards CMOS-based in-vivo NMR spectroscopy and microscopy