yusuke1997/dblp-id-title huggingface dataset:
Performance comparison of Energy and Cyclostationary Spectrum detection in cooperative cognitive radios network
Higher order convergent algorithms with applications to polynomials and matrices
An approach to an efficient reduction of the switching noise in switched-current circuits
Adding selective enhancement in scalable video coding for region-of-interest functionality
Synthesis of reversible logic functions using ternary Max-Min algebra
Capacity analysis of adaptive multiuser frequency-time domain radio resource allocation in OFDMA systems
Fast mode decision by using probabilities from arithmetic coder
An algorithm for calculating correlation coefficients between Elmore interconnect delays
Sorted QR decomposition for high-speed MMSE MIMO detection based wireless communication systems
Fully Synthesizable Dynamic Voltage Comparator across technology nodes and scaled supply voltages
Efficient model reduction of passive electrical networks with a large number of independent sources
Calculation of sign Walsh spectra of Boolean functions from disjoint cubes
An optimization technique for RF buffers with active inductors
A Low-Ripple Resistor-Less Hybrid Loop Filter based PLL in 3nm FinFET
A musical-driven video summarization system using content-aware mechanisms
A dual-pulse-clock double edge triggered flip-flop for low voltage and high speed application
Pulse Stream VLSI Neural Systems: Into Robotics
Methods to eliminate dynamic errors in high-performance SAR A/D converter
A New Probabilistic Gradient Descent Bit Flipping Decoder for LDPC Codes
Synthesis of a current source using a formal design methodology
A Digital and Lightweight Delay-Based Detector against Fault Injection Attacks
An Improved Kernel Clustering Algorithm Used in Computer Network Intrusion Detection
Zero-shot Learning in Performance Prediction of Digital VLSI Circuits
A low noise CMOS preamplifier for femtoampere current detection
Noise-coupled low-power incremental ADCs
Wideband audio compression using wrapped linear prediction and the discrete wavelet transform
Application of genetic programming to edge detector design
Scalable Fault Coverage Estimation of Sequential Circuits without Fault Injection
An SRAM PUF with 2 Independent Bits/Cell in 65nm
Sub-50-mV Static Flip-Flop Consisting of Recursive Stacking Body-Bias Logic Gates for Extremely Low-Voltage VLSIs
Incorporating Design Skills in an Introductory Electric Circuits Laboratory
Condition of generation of oscillations in dynmic system with nonlinear periodical functions
Live Demonstration: A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots
Low power driven re-synthesis algorithm for heterogeneous FPGA under delay constraint
Monte Carlo analysis of resistive networks without a priori probability distributions
A new approach to generate hyperchaotic 3D-scroll attractors in a closed chain of Chua's circuits
Comparison of magnitude and delay sensitivity in IFLF and cascade g m-C filters
A low-power CAM with efficient power and delay trade-off
Monitoring Blood Volume Decomposition State for Traumatic Stress-Induced Hemorrhage via Wearable Sensing and Ensemble Learning
Single-Electron Transistor Based on Cobalt Oxide
Configuring Multiple Boundary Scan Chains for Board Testing
The short-term memory (d.c. response) of the memristor demonstrates the causes of the memristor frequency effect
A Neural Network Approach to Analog Circuit Design Optimization using Nesterov's Accelerated Quasi-Newton Method
A neural network to retrieve atmospheric parameters from infrared high resolution sensor spectra
Pattern formation on the prototype complex-cell CNN-UM chip (CACE1K)
Physical characterization of steady-state temperature profiles in three-dimensional integrated circuits
Low power dual matchline ternary content addressable memory
Injection-Locking Frequency Divider based dual-modulus prescalers with extended locking range
High-level optimization of ΣΔ modulators using multi-objetive evolutionary algorithms
A Wide-band 2-path cross-coupled sigma delta ADC
Comparative analysis of power yield improvement under process variation of sub-threshold flip-flops
Transport Triggered near Memory Accelerator for Deep Learning
A time encoded decimation filter for noise shaped power DACs
On the Impact of I/Q Imbalance in Multi-Carrier Systems for Different Channel Scenarios
Biphasic, energy-efficient, current-controlled stimulation back-end for retinal visual prosthesis
Stable ARMA Graph Filter Design via Partial Second-Order Factorization
ECG baseline wander removal using the LSRLMF-based fixed-point interference canceller
Energy-/Area-Efficient Spintronic ANN-based Digit Recognition via Progressive Modular Redundancy
A CMOS triple-band fractional-N frequency synthesizer for GSM/GPRS/EDGE applications
Bit Error Tolerance of a CIFAR-10 Binarized Convolutional Neural Network Processor
A fast kernel for unifying GF(p) and GF(2 m ) Montgomery multiplications in a scalable pipelined architecture
Audio signal segmentation and classification for scene-cut detection
32-bit Configurable bias current generator with sub-off-current capability
Enhancing dynamic range in differential log-domain filters based on the two-filters approach
Blind correction of gain and timing mismatches for a two-channel time-interleaved analog-to-digital converter: experimental verification
JPEG2000. Part 10. Volumetric data encoding
On the robustness of an analog VLSI implementation of a time encoding machine
Multichannel Potentiostat with Shared Reference Electrode for Simultaneous Multitechnique Measurements in Microfluidic Sensor Arrays
A highly linear mixer with inherent balun using a new technique to remove common mode currents
A High-Voltage Inverting Converter Based on COT Controlled Buck Regulator with On-Chip Ripple Compensation Technique
A Novel Technique for the Design and DCGA Optimization of Guaranteed BIBO Stable Jaumann Digital IF Filters over the CSD Multiplier Coefficient Space
Exploring carbon nanotubes and NiSi nanowires as on-chip interconnections
Regular symmetric arrays for non-symmetric functions
A Harmonic-Canceling Synthesizer using Skew-Circulant-Matrix-Based Coefficient Generator
Process variation immune and energy aware sense amplifiers for resistive non-volatile memories
A HDTV-Suited Architecture for a Fast Full Search Block-Matching Algorithm
On-Chip Output Stage Design for a Continuous Class-F Power Amplifier
Efficient compressive sensing on the shimmer platform for fall detection
A 400-MS/s 12-bit Voltage-Time Hybrid ADC with a Ping-Pong SAR TDC for Speed Enhancement
A 5 GHz Outer-Loop Phase Noise Filter with Delay-Sampling Technique
Photoacoustic Dual-mode Microsensor Based on PMUT Technology
Probabilistic congestion prediction in hierarchical quad-grid model
A CMOS digitally programmable current steering semidigital FIR reconstruction filter
Dynamic sub-cellular behavior study in high content imaging using a multi-threshold approach
A low-power RF front-end for 2.5 GHz receivers
Error analysis for time-interleaved analog channels
A 65nm, 1.15-0.15V, 99.99% Current-efficient Digital Low Dropout Regulator with Asynchronous Non-linear Control for Droop Mitigation
Clock distribution in clock domains with Dual-Edge-Triggered Flip-Flops to improve energy-efficiency
A novel concurrent fault simulation method for mixed-signal circuits
A novel approach to testing LUT-based FPGAs
Gold-Based Nanoparticles for Breast Cancer Diagnosis and Treatment
System Integration of IC chips for Lab-on-CMOS Applications
Improved RF Performance with Buried Power Rail and Contact over Active Gate in Nanosheet FETs
MLConnect: A Machine Learning Based Connection Prediction Framework for Error Correction in Recovered Circuit
An energy-efficient skew compensation technique for high-speed skew-sensitive signaling
Quadrature chaos shift keying
Image search reranking with multi-latent topical graph
Degradation on the performance of MIMO system under a correlated sub-channels condition
A CMOS monolithic implementation of a nonlinear element for arbitrary 1D map generation
A 1.8V 8-bit 250Msample/s Nyquist-rate CMOS pipelined ADC
Deep Learning Based Period Order Detection in Structured Light Three-Dimensional Scanning
Compact ASIC implementation of the ICEBERG block cipher with concurrent error detection
Extracting Weak PUFs from Differential Nonlinearity of Digital-to-Analog Converters
A 2-Then-1 Bit/Cycle Asynchronous SAR ADC with Background Offset Calibration
Multi-level low-complexity coefficient discarding scheme for video encoder
Measuring the Impulse Response of Linear Systems using an Analog Correlator
Non-Delaunay hierarchical mesh-based motion estimation and compensation for Wavelet Video coding
PZT Cantilever for Energy Harvesting and Vibration Sensing
Probabilistic particle modeling of quantum wave propagation with reflection, transmission, and coupling
A design methodology for IP integration
Inertial and vision head tracker sensor fusion using a particle filter for augmented reality systems
Bifurcation Analysis of PV-Fed Quadratic Boost Converter using the Filippov Method
Lightweight and Configurable Synchronizer and Demodulator Design for PDSCH on FPGA
Optimum SPT allocation for multipliers of minimum lifting 2D wavelet transform
A 1.2V, 3.5µW, 20MS/s, 8-bit comparator with dynamic-biasing preamplifier
Word Length Optimization of 2-D Wave Digital Filters with Weighted Quantization Error Variances
Identification and break of positive feedback loops in Trojan States Vulnerable Circuits
A hardware-friendly hierarchical HEVC motion estimation algorithm for UHD applications
Early termination schemes for fast intra mode decision in High Efficiency Video Coding
Tunable word length architecture for low power wireless OFDM demodulator
A noise-tolerant matchline scheme with XOR-based conditional keeper for energy-efficient TCAM
A 0.18-µm CMOS clock and data recovery circuit with reference-less dual loops
Monte-Carlo-based statistical soft error rate (SSER) analysis for the deep sub-micron era
CSI-aided Demapping of Dual-Carrier Modulation for Multiband-OFDM
Switched-capacitor Polyphase Structures for Two-dimensional Analog FIR Filtering
An I/Q-multiplexed and OTA-shared CMOS pipelined ADC with an A-DQS S/H front-end for two-step-channel-select low-IF receiver
On the feasibility of hardware implementation of sub-Nyquist random-sampling based analog-to-information conversion
Accurate fault detection in switched-capacitor filters using structurally allpass building blocks
A design of LUT-array-based PLD and a synthesis approach based on sum of generalized complex terms expression
Application of Return Difference Matrix to Stability Analysis for Multivariable Feedback Networks
Retransmission-based error spreading for layered video streaming over wireless LANs
Analysis and evaluation of harmonic distortion in the tunnel diode oscillator
An enhanced covariance spectrum sensing technique based on stochastic resonance in cognitive radio networks
A joint linearity-efficiency model of radio frequency power amplifiers
A parallel tabu search algorithm for VLSI standard-cell placement
A Two-step Fine-tuning Assisted Layout Sizing Scheme for Analog/RF Circuits
A 0.18µm CMOS 2.1GHz Sub-sampling Receiver Front End with Fully Integrated Second- and Fourth-Order Q-Enhanced Filters
Efficient search and mode prediction algorithms for motion estimation in H.264/AVC
An auto-input-offset removing floating gate pseudo-differential transconductor
A 31.25 MHz bandwidth 52.4 dB SNDR VCO based ADC with on-chip non-linearity correction
Orthonormal high level canonical PWL functions
Trapezoid-to-simple polygon recomposition for resistance extraction
Hardware accelerated convolutional neural networks for synthetic vision systems
A new differential CMOS current pre-amplifier for optical communications
A novel embedded memory architecture for real-time mesh-based motion estimation
Unveiling nonlinear dynamics in resonant inductively coupled wireless power transfer
A novel technique to reduce the metastability of Bang-Bang Phase Frequency Detectors
A fully integrated wireless sensor-brain interface system to restore finger sensation
An analysis of a new access control technique for channel request in wireless communications
A Wireless Electro-Optic Headstage with Digital Signal Processing and Data Compression for Multimodal Electrophysiology and Optogenetic Stimulation
A 210-230GHz SiGe Hybrid Mixing System with Pre-And Post-Driving Amplifiers
A Coherent Spurious Analysis for Sub-THz Frequency Multiplier Chains
Analysis and Design of Ultra-low Power Subthreshold MCML Gates
Wireless neural signal acquisition with single low-power integrated circuit
PWL cores for nonlinear array processing
Symbolic Behavioral Model Generation of Current-mode Analog Circuits
Signal modulus design for blind source separation via algebraic known modulus algorithm: A perturbation perspective
Ambidextrous Virtual Keyboard Design with Finger Gesture Recognition
Leakage-Aware Design of Nanometer SoC
Use of Symbolic Analysis in Analog Circuit Synthesis
A CMOS microchip-based retinal prosthetic device for large numbers of stimulation in wide area
Design of a step-up/step-down SC DC-DC converter with series-connected capacitors
A Micropower Voltage, Current, and Temperature Reference for a Low-Power Capacitive Sensor Interface
The influence of extortion diversity on the evolution of cooperation in scale-free networks
Dynamic Control of Reconfigurable Intelligent Surfaces: An IC-Based MOS Varactor Approach
Automated design of a 13.56 MHz corner-robust efficient differential drive rectifier for 10 μA load
Phase aligned mm-wave injection locked power amplifier
A Hardware-Efficient Dual-Standard VLSI Architecture for MC Interpolation in AVS and H.264
Multiobjective optimization for transistor sizing sub-threshold CMOS logic standard cells
Agreement and consensus problems in groups of autonomous agents with linear dynamics
A novel Physical Unclonable Function using RTN
A MAXMIN resource allocation approach for scalable video delivery over multiuser MIMO-OFDM systems
The technique of pre-scaled integer transform
Process-variation-aware electromagnetic-semiconductor coupled simulation
A current-mode CMOS integrated microsystem for current spinning magnetic hall sensors
Dependent Noise Reduction from an Acoustical Array Combining Microphones and a Piezoelectric Device under Blind Condition
Multiple sequence families with efficient hardware architecture for use in spread spectrum watermarking
SNU-Net: a self-supervised deep learning method for pneumothorax segmentation on chest CT
Electro-thermal study of nano-inductors for integrated low power converters
Effective sensor fusion with event-based sensors and deep network architectures
LCU-level Rate-Distortion Optimization for Versatile Video Coding
Live Demonstration: A real-time event encoder for seizure monitoring on Neuromorphic Hardware
Metrics and Design Considerations on the Energy-delay Tradeoff of Digital Circuits
Using continuation methods to improve convergence of circuits with high impedance nodes
Design of CNFET-based Ternary Conditional Sum Adders using Binary Carry Propagation
Design of state feedback control law for interval systems
A Noise and Spur Reduction Technique for ΔΣ Fractional-N Bang-Bang PLLs with Embedded Phase Domain Filtering
Fast Mode Decision Algorithms for Adaptive GOP Structure in the Scalable Extension of H.264/AVC
Voltage-Gated Spin-Hall Effect Based Magnetic Non-Volatile Flip-Flop for High Speed, Low Power and Compact Cell Area
Threshold Voltage Variation Effects on Aging-Related Hard Failure Rates
Towards signal processing assisted hardware for continuous in-band electrode impedance monitoring (Invited paper)
Ultra-Tiny Neural Network for Compensation of Post-soldering Thermal Drift in MEMS Pressure Sensors
Cross-domain shoe retrieval using a three-level deep feature representation
A Compact Online-Learning Spiking Neuromorphic Biosignal Processor
Noise-reducing loop in multi-bit Sigma-Delta modulators
AO-EDC: An Accuracy-Oriented Error Detection and Correction Scheme for DVFS System Based on Propagation Detection at Half-Path Points
Frequency Compensation Scheme for a Full GaN OpAmp driving 1-nF load
An adaptable prosthetic socket: Regulating independent air bladders through closed-loop control
A Charge Pump that Generates Positive and Negative High Voltages with Low Power-supply Voltage and Low Power Consumption for Non-volatile Memories
Design of digital differentiator based on maximum signal to noise ratio criterion
A wide tuning-range ADFLL for mW-SoCs with dithering-enhanced accuracy in 65 nm CMOS
Analysis and design of a step-down switched-capacitor-based converter for low-power application
On optimum 3-phase spreading sequences of simple Markov chains
Calculating Color Differences of Images via Siamese Neural Network
Real-time phasor measurement for low frequency oscillation in power system
A 5-Transistor Ternary Gain-Cell eDRAM with Parallel Sensing
Hybrid CMOS-RRAM Neurons with Intrinsic Plasticity
Automatic endosomal structure detection and localization in fluorescence microscopic images
Low-power differential photoplethysmographic pulse transit time detector for ambulatory cardiovascular monitoring
Image splicing localization based on blur type inconsistency
Implementation of a cycle by cycle variable speed processor
Multipath Polyphase Circuits and their Application to RF Transceivers
Estimation of the weighted maximum switching activity in combinational CMOS circuits
Two-stage charge sensitive amplifier with self-biased MOS transistor as continuous reset system
Initiation and tracking of dim target via fusion of feature probabilities with CNN-UM
A 145µW 8×8 parallel multiplier based on optimized bypassing architecture
An algorithm for the design of multiplierless approximately linear-phase lattice-wave digital filters
A 127mW SAW-less LTE transmitter with LC-load bootstrapped quadrature voltage modulator in 130nm RFCMOS
FPGA design of approximate semidefinite relaxation for data detection in large MIMO wireless systems
Live demonstration: A wireless force measurement system for total knee arthroplasty
A CMOS image sensor with focal plane SPIHT image compression
Symbolic analysis of large signals in nonlinear systems
Linear prediction of deterministic components in hybrid signal representation
A low power FPGA routing architecture
A silicon retina system that calculates direction of motion
Effect of OP-amp Phase Margin on SC SigmaDelta Modulator Performances
Adaptive spatial prediction in intra coding
Stable condition considering modeling error in the filtered-x LMS algorithm
A new strong inversion 5-parameter transistor mismatch model
A system-level exploration flow for optica network on chip (ONoC) in 3D MPSoC
Optimization of memory banking in embedded multidimensional signal processing applications
A Highly Linear Switched-Capacitor DAC for Multi-Bit Sigma-Delta D/A Applications
Hardware Accelerator for MobileViT Vision Transformer with Reconfigurable Computation
High-efficient hardware design based on enhanced Tschirnhaus transform for solving the LSPs
MADS-based fast FPGA implementation of nonlinear model predictive control
Calculating distortion in active CMOS mixers using Volterra series
Correctly rounded constant integer division via multiply-add
A perturbation theory on statistical quantization effects in fixed-point DSP with non-stationary inputs
A baseball exploration system using spatial pattern recognition
A coupled iterative/direct method for efficient time-domain simulation of nonlinear circuits with power/ground networks
Multi-stage approach for the design of 2-D half-band filters using the frequency response masking technique
Design of Non-Uniformly Spaced Linear Phase FIR Filters Using Mixed Integer Linear Programming
Data Imbalance Handling Approaches for Accurate Statistical Modeling and Yield Analysis of Memory Designs
A new construction algorithm of visual crytography for gray level images
DSVD: a tensor-based image compression and recognition method
SystemC AMS Based Frameworks for Virtual Prototyping of Heterogeneous Systems
PRISM: Energy-Efficient Polymorphic Operation Based on Spin-Orbit Torque Memory for Reconfigurable Computing
Realization of a carbon nanotube based electrochemical fractor
Low-power design of low-voltage current-mode integrators for continuous-time Sigma-Delta modulators
An extended radix-based digital calibration technique for multi-stage ADC
Content-based image retrieval with automated relevance feedback over distributed peer-to-peer network
Minimization of L 2 -sensitivity for state-space digital filters subject to L 2 -scaling constraints
Testing system for measuring and calibrating the transmission power of EDGE mobiles
Analysis and Implementation of Block Least Mean Square Adaptive Filter using Offset Binary Coding
Ultra-Thin Chips with Current-Mode ISFET Array for Continuous Monitoring of Body Fluids pH
Uncertainty modeling of gate delay considering multiple input switching
A CMOS reduced-area SRAM cell
Low-power motion-estimation architecture based on a novel early-jump-out technique
Low-Complexity Linear Feedback Shift Register Architecture For CRC En/Decoding
Application of the principal partition and principal lattice of partitions of a graph to the problem of decomposition of a finite state machine
An Architecture for Intermediate Area-time Complexity Multiplier
A Variable Step Size Algorithm with Generate-and Evaluate Function
Accurate DOA estimation via sparse sensor array
High throughput VLSI architecture for HEVC SAO encoding for ultra HDTV
Level Shifter Architecture for Dynamically Biasing Ultra-Low Voltage Subcircuits of Integrated Systems
Efficient voltage conversion for SRAM low standby power modes
Image sensor with focal plane extraction of polarimetric information
Effect of CNN shape segmentation on MPEG-4 shape bit-rate
Novel programmable built-in current-sensor for analog, digital and mixed-signal circuits
A remotely powered multi frequency RFID sensing tag with integrated impedance measurement interface
Concatenated LDPC-polar codes decoding through belief propagation
Design techniques for a fully differential low voltage low-power flash analog to-digital converter
A Tri-loop Fast-transient Digital LDO with Adaptive-gain Control and Fine-loop Freezer
Inverter-based Models for Current Analysis of CMOS Logic Circuits
A modified identification algorithm for linear systems with noisy input-output data
An EF-CIFF Noise-Shaping SAR ADC with A Joint Dynamic Amplifier, Comparator and Lossless Passive Summer Structure
A Compact and Accuracy-Reconfigurable Univariate RBF Kernel Based on Stochastic Logic
A collision-based model for multi user interference in impulse radio UWB networks
A Time-interleaved Flash-SAR Architecture for High Speed A/D Conversion
A Ku-band FMCW Radar on Chip for Wireless Micro Physiological Signal Monitoring by Interferometry Phase Analysis
A Fast Convergence Median LMS Algorithm
Spectre attack detection with Neutral Network on RISC-V processor
A compact-pixel tri-mode vision sensor
Scan-based attack on the LED block cipher using scan signatures
Direct mode coding for bi-predictive pictures in the JVT standard
Very fast tracking and depth estimation by using focal plane compression sensors
A stereophonic low complexity subband adaptive algorithm
Variable biquadratic digital filter section with simultaneous tuning of the pole and zero frequencies by a single parameter
Low-voltage linear voltage regulator suitable for memories
Directional watermarks in images
A numerical approach to calculate grazing bifurcation points in an impact oscillator with periodic boundaries
Design of high speed bipolar Si/SiGe ICs for optical wide band communications
An academic EDA suite for the full-custom design of mixed-mode integrated circuits
High-Frequency Modeling of Common-Mode and Differential-Mode Impedances in LLC Resonant Converters
Live Demonstration: RF Frame Detection Using YOLOv8 for Spectrum Sensing
Wavelet-based piecewise approximation of steady-state waveforms for power electronics circuits [power converter examples]
A fast-locking all-digital phase locked loop in 90nm CMOS for Gigascale systems
Current-balanced logic for mixed-signal IC's
An H.264/AVC decoder with 4×4-block level pipeline