yusuke1997/dblp-id-title huggingface dataset:
Local Learning in Memristive Neural Networks for Pattern Reconstruction
Obtaining digital gradient signals for analog adaptive filters
The U-function under lossless nonreciprocal imbedding
A high-Q spiral inductor with dual-layer patterned floating shield in a class-B VCO achieving a 190.5-dBc/Hz FoM
Bifurcations and chaos in the turbo decoding algorithm
A register clustering algorithm for low power clock tree synthesis
Applications of binaural processing to surround sound reproduction in large spaces
Multi-standard low-power DDR I/O circuit design in 7nm CMOS process
An extended Petri net III and its applications
Unsupervised Character Recognition with a Simplified FPGA Neuromorphic System
Fully adaptive evaluation of sub-band DFT
Receiver design for CMUT-based super-resolution ultrasound imaging
Design of Magnetic Field Acquisition Probe and Front-End Signal Processing Circuit
Correct diagnosis of almost all faulty units in a multiprocessor system
Low-voltage high-linear and isolation transformer based mixer for direct conversion receiver
Discrete and continuous substrate noise spectrum dependence on digital circuit characteristics
Novel hafnium oxide memristor device: Switching behaviour and size effect
Hierarchical performance optimization for synthesis of linear analog systems
Perspectives from the informational complexity of learning
Improving High School Math Engagement with Circuit and Transistor Examples
Phased tag cache: an efficient low power cache system
Performance of desktop software MPEG-2 TS decoder
An analog-to-digital converter with time-variant window
Point cloud processing using non-volatile memories with circuit and sensor noise
A constructive procedure for multidimensional realization and LFR uncertainty modelling
A 12 Bit 8 GS/s Randomly-Time-Interleaved SAR ADC with Adaptive Mismatch Correction
Saliency detection based on adaptive DoG and distance transform
High performance Viterbi decoder using modified register exchange methods
Compact Lowpass Ladder Filters using Tapped Coils
Automatic Tuning of Time Constants in Single Bit Continuous-time Delta-sigma Modulators
Neuromorphic Information Processing with Nanowire Networks
A Charge Pump for Sub-Sampling Phase-Locked Loops with Virtual Reference Frequency Doubling
An Efficient Global Search Algorithm for Test Generation
Pinning control design for bounded synchronization of complex networks of nonidentical systems
Distributed circuit theory: Reminiscences
1.1-V 200 MS/s 12-bit digitally calibrated pipeline ADC in 40 nm CMOS
Jacket Haar transform
Noise analysis of continuous-time Sigma Delta modulators with switched-capacitor feedback DAC
Low-complexity Multi-purpose IP Core for Quantized Discrete Cosine and Integer Transform
Realization of card-centric framework: a card-centric computer [smart cards]
On-board fault-tolerant SAR processor for spaceborne imaging radar systems
Design, fabrication and modeling of microbeam structures for gas sensor applications in CMOS technology
Fast simulation of interconnects with nonlinear loads using woodbury's formula
CMOS image sensor with analog gamma correction using nonlinear single-slope ADC
Analysis and Design of an 1-20 GHz Track and Hold Circuit
Stepped Frequency Bluetooth Radar for Wireless Sensing Applications
A regularized simultaneous autoregressive model for texture classification
A new adaptive Decision Feedback Equalizer using hexagon eye-opening monitor for multi Gbps data links
Bifurcation and transitional dynamics in three-coupled oscillators with hard type nonlinearity
Energy-efficient soft-output trellis decoder design using trellis quasi-reduction and importance-aware clock skew scheduling
Capacitive effects and memristive switching in three terminal multilayered MoS2 devices
Average lengths of wire routing under M-architecture and X-architecture
A Stepwise Refinement Algorithm for Integrated Floorplanning, Placement and Routing of Hierarchical Designs
Test pattern generation for width compression in BIST
Analyte sampling in paper biosensors powered by graphite-based light absorption
A low power and high speed CMOS Voltage-Controlled Ring Oscillator
A Single Capacitor-Based Offset Reduction Technique for Energy-Efficient Dynamic Comparators
DSP architecture for cochlear implants
Complex network approach to communication network performance analysis
A Distributed Reconfiguration Controller for Linear Array Harvest Problem: Hierarchically Quasi-Normalized Neural Approach
A Closed-Loop Readout Circuit with Voltage Drop Mitigation for Emerging Resistive Technologies
A universal figure of merit for stochastic first order filters
A novel low-voltage low-power class-AB linear transconductor
On Class-Incremental Learning for Fully Binarized Convolutional Neural Networks
A low-voltage latch-adder based tree multiplier
A variable step-size zero attracting proportionate normalized least mean square algorithm
Optimal FOV of Angular Diversity Receiver for Underwater Visible Light Communications
A passive filter aided timing recovery scheme
Analog vector quantization chip for flexible video compression systems
A predictive methodology for accurate substrate parasitic extraction
Scheduling of a Control and Data Flow Graph
Efficient 1D and circular symmetric 2D FIR filters with variable cutoff frequencies using the Farrow structure and multiplier-block
A 550MHz 9.3mW CMOS Frequency Divider
Power optimization design for probabilistic logic circuits
SSCAE: A Neuromorphic SNN Autoencoder for sc-RNA-seq Dimensionality Reduction
Charge-pump based frequency regulator for precision supply generation
UHF energy harvesting system using reconfigurable rectifier for wireless sensor network
IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings
A 5-GHz self-calibrated I/Q clock generator using a quadrature LC-VCO
Fast Intra Mode Decision Using Machine Learning for the Versatile Video Coding Standard
A fully differential CMOS capacitance sensor design, testing and array architecture
Immediate transmission scheme of s-ALOHA with PCT method
Pole deviation analysis for digital systems based on second order perturbation theory [digital filter example]
Feature-Embedded Evolutionary Algorithm for Network Optimization
A Simple Neural Cross-Correlation Engine
BioCMOS LSIs for portable gene-based diagnostic inspection system
Bandgap Reference with Curvature Corrected Compensation using Subthreshold MOSFETs
Inductor-less 10Gb/s CMOS transimpedance amplifier using source-follower regulated cascode and double three-order active feedback
Open ended dynamic ramping simulation of multi-discipline systems
Toward Scalable Laboratories in Signals and Systems: Content, Deployment, and Grading
On consistent initial conditions for circuit DAEs with higher index
Efficient probabilistic sphere decoding architecture
45-nm Planar bulk-CMOS 23-GHz LNAs with high-Q above-IC inductors
A New Robust Adaptive Fading Unscented Kalman Filter for Decentralized Dynamic State Estimation in Power Systems
An Incremental A/C Converter for Accurate Vector Probe Measurements
A wide-linear-range subthreshold CMOS transconductor employing the back-gate effect
Game Theoretic Approach to Extreme Fast Charging Location
A new current-mode incremental signaling scheme with applications to Gb/s parallel links
Design of a TRNG in 600-nm IGZO-TFT FlexICs for Secure IoT Applications
Identifying Critical Elements to Enhance the Power Grid Resilience
High speed eight-parallel mixed-radix FFT Processor for OFDM systems
Race-free state assignments using bipartite graphs
Fault-Tolerant Architectures for Shared Buffer Memory Switch
Compact CMOS circuits for high-speed continuous-time linear weighted voltage addition
Accurately Forecasting the Health of Energy System Assets
Characterizing the Communication Requirements of GNN Accelerators: A Model-Based Approach
A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator
State-of-the-art and future directions of high-performance all-digital frequency synthesis in nanometer CMOS
A low-power geometric mapping co-processor for high-speed graphics application
A receiver for stardard IEEE 1596-1992 scalable coherent interface
A high data-reuse architecture with double-slice processing for full-search block-matching algorithm
A Time-Interleaved 2b/Cycle SAR ADC with Background Offset Calibration
A 1-MHz 7th-order continuous-time lowpass filter using very low distortion CMOS OTAs
Design of a LiDAR point cloud data processing system for power line extraction on FPGA
A programmable OOK impulse radio ultra wideband transmitter with power cycling and spectral agility
A DAC Sharing and Linearization Technique for Time-Interleaved Incremental Delta-Sigma ADCs
The charge pump as a signal amplifier: enabling small-signal gain boosting
Routing-Aware Standard Cell Placement Algorithm Applying Boolean Satisfiability
A Parallel, Multi-Resolution Sensing Technique for Multiple Antenna Cognitive Radios
A New Technique for the Exact Design of High-Quality LDI Jaumann Digital Filters
Nanodevice-based novel computing paradigms and the neuromorphic approach
Low Cost Ternary Content Addressable Memory Based on Early Termination Precharge Scheme
A New Two-stage Method for Restoration of Images Corrupted by Gaussian and Impulse Noises using Local Polynomial Regression and Edge Preserving Regularization
Real-time event detection and its application to surveillance systems
Edge map guided adaptive post-filter for blocking and ringing artifacts removal
Electromagnetic analysis on ring oscillator-based true random number generators
Battery Modeling with Mittag-Leffler Function
Improvement of fuzzy power control for DS-CDMA cellular mobile system having variable number of users
Implementation of hot-carrier reliability simulation in Eldo
Realization of QoS management using negotiation algorithms for multiprocessor NoC
A 2.5MHz, 97%-accuracy on-chip current sensor with dynamically-biased shunt feedback for current-mode switching DC-DC converters
Dynamic Firing on Static Analog/Digital Neuron Circuits with Resistive Synapses for Time-Series Neural Network
CHStone: A benchmark program suite for practical C-based high-level synthesis
A SOT based digital audio coder using reference frame ordering method
A Note of Frequency-domain Characterization of Linear Time-varying Networks
Live Demonstration: Low Power System for Event-Driven Control of Functional Electrical Stimulation
A new cascaded modified CIC-cosine decimation filter
Event-based imaging with active illumination in sensor networks
A Microwatt/Channel Neural Signal Processor for High-Channel-Count Spike Detection and Sorting
Asynchronous, event-driven readout of POSFET devices for tactile sensing
Four Point Probe Electrical Spectroscopy Based System for Plant Monitoring
Architecture and performance characterization of hardware and software implementations of the Crozier frequency estimation algorithm
A Bio-Inspired Neuromorphic Active Vision System Based on Fixational Eye Movements
Adaptive timing for analysis of skew tolerance
Minimax IIR digital filter design using SOCP
Time-Domain-Based Measurement Technique for Pressure Measurement in a Wearable Wireless Sensor Patch
Evaluating on-chip interconnects for low operating frequency silicon neuron arrays
Asynchronous Architecture Design and Implementation of Physical Memory Protection for RISC-V
Live Demonstration: An Aliasing-Free Hybrid Digital-Analog Music Synthesizer Prototype
High Frequency Compensated Current-mode Ladder Filters Using Multiple Output OTAs
Spectral analysis of a novel transient dynamic boost PWM inverter control for power amplifiers
Dark current optimization of 4-transistor pixel topologies in standard CMOS technologies for time-of-flight sensors
Design of 2.87 GHz Frequency Synthesizer with Programmable Sweep for Diamond Color Defect based CMOS Quantum Sensing Applications
Miniaturized CMOS thermal sensor array for temperature gradient measurement in microprocessors
Distributed control of reactive power from photovoltaic inverters
Wavelet transforms dedicated to compress recorded ENGs from multichannel implants: comparative architectural study
Quaternary arithmetic helix transforms based on Kronecker product
Broadband beamfoming using Nested Planar Arrays and 3D FIR frustum filters
Audio Pre-Amplifiers for Digital Electret Microphones in 0.18um CMOS Process
A High Performance and Efficient Method for Enhancing Randomness in Linear Feedback Shift Registers(LFSR)
Offset Rejection in a DC-Coupled Hybrid CMOS/Memristor Neural Front-End
Memory arrangements in turbo decoders using sliding-window BCJR algorithm
An efficient color compensation scheme for skin color segmentation
A 1.2V multi Gb/s/pin memory interface circuits with high linearity and low mismatch
A 14-b 32MS/s Pipelined ADC with Novel Fast-convergence Comprehensive Background Calibration
Power analysis of multiplier blocks
A divide-and-conquer approach to estimating minimum/maximum leakage current
Optimal resynchronization for layered video over wireless channel
Design of a CMOS active electrode IC for wearable electrical impedance tomography systems
Design Strategies for Multi-Channel Low-Noise Recording Systems
A Varying Pulse Width Second Order Derivative Gaussian Pulse Generator for UWB Transceivers in CMOS
Linear-Exponential I-DS ADCs: Analysis, Limitations and Higher Order
Design and properties of polynomial-based fractional delay filters
Hardware Architecture of a Haar Classifier Based Face Detection System Using a Skip Scheme
A 320×240 I-ToF CMOS Image Sensor with 2-Tap 5.6µm Pixel and Mismatch-Nonlinearity Suppression
An opinion disseminating model for market penetration in social networks
An Architecture for Integrated Reliability Simulators Using Analog Hardware Description Languages
Low power implementation of high throughput FIR filters
On using compressed sensing for efficient transmission & storage of electric organ discharge
Modular Realization of Bandstop and Bandpass FIR Digital Filters
2-D Adaptive State-Space Digital Filters using LMS Algorithm
An ICA based approach for blind deconvolution of three-dimensional signals
Synthesis of amplifier transfer function using time-domain response
A 100dB-TCMRR 8-Channel Bio-Potential Front-End with Multi-Channel Common-Mode Replication
A robust self-resetting CMOS 32-bit parallel adder
Multi-reference and multi-block-size motion estimation with flexible mode selection for professional 4: 2: 2 H.264/AVC encoder LSI
A 5-tissue-layer lumped-element based HBC circuit model compatible to IEEE802.15.6
94% Performance improvement by time-shift control (TSC) technique in cloud computing voltage regulator module (VRM)
Supply Line Embedded Communication in Automotive Sensor/Actuator Networks
Comparison of two open-loop adaptive speech enhancement algorithms for digital hearing aids
Efficient content-based CT brain image retrieval by using region shape features
An Energy-Efficient Flexible Capacitive Pressure Sensing System
Generalized Few-Shot 3D Point Cloud Segmentation
Decision feedback equalizer with the blind matched filter estimation
Physical scaling of integrated inductor layout and model and its application to WLAN VCO design at 11GHz and 17GHz
Extended intelligent edge-based line average with its implementation and test method
Rapid C to FPGA Prototyping with Multithreaded Emulation Engine
BiCMOS switched buffers resonator for a 320 MHz 2-path sigma-delta modulator
Hybrid modeling techniques for low OSR cascade continuous-time SigmaDelta modulators
A Machine Learning Approach for Material Classification in MMW Imaging Systems based on Frequency Spectra
All Hardware-Based Two-Layer Perceptron Implemented in Memristor Crossbar Arrays
IIP2 calibration methods for current output mixer in direct-conversion receivers
A wireless sensing platform for battery-free sensors
Initial Condition-Dependent Spur Pattern Induced by Undithered MASH DDSM Divider Controller
Novel Coils Topology Intended for Biomedical Implants with Multiple Carrier Inductive Link
A High-Speed/Low-Power Multiplier Using an Advanced Spurious Power Suppression Technique
A New High-Speed Class-AB Current-Mode Circuit
A Fast Compressed Hardware Architecture for Deep Neural Networks
Transcription of polyphonic signals using fast filter bank
VLSI Implementation of a New Bit-Level Pipelined Architecture for 2-D Allpass Digital Filters
Structured electronic design of high-pass ΣΔ converters and their application to cardiac signal acquisition
Frame Level Quantization Control with Temporal Distortion Propagation Model for Video Coding
Very Low Power Circuit Design: Fundamentals and Limits
DPP-MP: An Area-Efficient Digital Predistortion Model for Quadrature Digital Transmitters
A Mixer-Supported Adaptable Silicon-Integrated Edge Coherent Photoacoustic System-on-Chip for Precise In Vivo Sensing and Enhanced Bio-Imaging
Circuit Bandwidth Requirements for NRZ and PAM4 Signals
High-performance CMOS current feedback operational amplifier
Design techniques for improving intrinsic accuracy of resistor string DACs
Reliable comparison for power amplifiers nonlinear behavioral modeling based on regression trees and random forest
Broadband High-Efficiency Continuous Class-F/F-1 Power Amplifiers with Active Second Harmonic Injection Technique
A compact distance cell for analog classifiers
Performance of a type-based digital predistorter for solid-state power amplifier linearization
A low power 12-Bit ENOB SAR ADC for silicon drift X and gamma ray detector read-out
Rate-Distortion Optimization for depth map coding with distortion estimation of synthesized view
Direct Time-of-Flight TCSPC Analytical Modeling Including Dead-Time Effects
Enhancing the Stability of Broadband Amplifiers Using Third Order Nested Feedback
Process Variation Compensation of a 2.4GHz LNA in 0.18um CMOS Using Digitally Switchable Capacitance
Affine transformations for communication and reconfiguration optimization of loops on CGRAs
Improved SNR, On-Chip Differentially Modulated TISM Signaling in HV DMOS Process for Mutual Capacitance Fingerprint Sensor
A novel Slepian-Wolf decoding algorithm exploiting geometric regularity constraints with anisotropic MRF modeling
An 8b 0.8kS/s configurable VCO-based ADC using oxide TFTs with Inkjet printing interconnection
Traffic congestion analysis in complex networks
A Low Power Current Reused Quadrature VCO for Biomedical Applications
Piecewise Linear Macromodels for Elementary Logic and Fuzzy Circuits
Modelling and implementation of twisted differential on-chip interconnects for crosstalk noise reduction
Ergodic chaos shift keying
A novel method to design wideband power amplifier for wireless communication
Countering the false myth of democracy: Boosting compressed sensing performance with maximum-energy approach
Adaptive thresholding approach for robust voiced/unvoiced classification
Noise Constrained Optimum Selection of Supply Voltage for IoT Applications
Low Noise and High Photodetection Probability SPAD in 180 nm Standard CMOS Technology
A design methodology to achieve low input impedance and non-constant gain-bandwidth product in TIAs for optical communication
The design of a differential CMOS charge pump for high performance phase-locked loops
More than two orders of magnitude leakage current reduction in look-up table for FPGAs
Active array beamforming using the frequency-response masking technique
A VCO-Based Readout ADC for Quasi-Static Sensing Applications in 3-µm Low-Temperature Poly-Silicon Thin-Film Transistor Technology
Efficient Time-Domain In-Memory Computing Based on TST-MRAM
A new Kalman filter-based power spectral density estimation for nonstationary pressure signals
Enabling Technologies in Drug Delivery and Clinical Care
Generation of a class of two-dimensional (2-D) transfer functions yielding variable magnitude and contour characteristics
1993 IEEE International Symposium on Circuits and Systems, ISCAS 1993, Chicago, Illinois, USA, May 3-6, 1993
Exploiting a micro Pirani gauge for multifonction
Application specific instruction-set processor generation for video processing based on loop optimization
Locating stuck faults in analog circuits
A Biopotential Recording IC with <10-ms-Settling Hybrid DC Servo Loop
A novel technique to estimate the statistical properties of Sigma-Delta A/D converters for the investigation of DC stability
High-speed area-efficient recursive DFT/IDFT architectures
Improved logic synthesis for memristive stateful logic using multi-memristor implication
Low-power all-analog circuit for rectangular-type analog joint source channel coding
Complex approximation for FIR filters with equiripple magnitude and phase response
Useful multipliers for low-voltage applications
A flexible method of LUT indexing in digital predistortion linearization of RF power amplifiers
A CAM enabled fast video motion estimation based on locality sensitive signatures
Real-time FPGA Implementation of a Second order Volterra Filter for Ultrasound Nonlinear Imaging
Non-linear library characterization method for FinFET logic cells by L1-minimization
Comparison of Digit-Serial and Bit-Level Designs for Acceleration of Convolutional Neural Network Computation
A low-power multi-tanh OTA with very low harmonic distortion
Dual Band Antenna Equalizer Realized by Utilizing 0.18µm Si-Processing Technology for a Pifa-900
Modern Hopfield-Heuristic Physical Computing Architecture for Diabetes Prediction
Memristive computing- multiplication and correlation
A 30.5-to-31 GHz Sampling PLL With Double-Edge Sampling PD and Implict Common-Mode VCO Scoring 39.69-fs RMS Jitter and -253.6-dB FoM in a 0.047mm 2 Area
Optimization of portable system architecture for real-time 3D graphics
Bare-finger Projector-Camera-Touchpad (PCT) HCI system using color structured light
Mitigating noise effects in volatile nano-metal oxide neural detector
An ultra-low power double-sampled A/D MASH ΣΔ modulator
Multi-scale zerotree entropy coding
10GBase-LX4 optical fiber receiver in a 0.18µm digital CMOS process
A new approach to finite-time tracking of coupled continuous networks
Selective similarity function for VLSI analog signal processing
Precision CMOS current reference with process and temperature compensation
Reconfigurable Clock Distribution Circuitry
Low-power mechanism with power block management
An Improved Algorithm for Boolean Factoring
Using the Miller Theorem to Analyze Two-Stage Miller-Compensated Opamps
Dynamic Memory and Sequential Logic Design using Negative Capacitance FinFETs
Topology-Guided Optimization Methodology for High-Efficiency Power Amplifier Design
Hardware implementation for real-time 3D rendering in 2D-to-3D conversion
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999
Variable increment step based reconfigurable interleaver for multimode communication application
Bio-inspired massively parallel architectures for nanotechnologies
Hybrid Digital/Analog Memristor-based Computing Architecture for Sparse Deep Learning Acceleration
Variability in VLSI Circuits: Sources and Design Considerations
System level design of a spatio-temporal video resampling architecture
A study of complete stability for delayed cellular neural networks
An efficient scheme based on EMPDC graph model in synthesizing fault tolerant FIR filter
System for deposition and characterization of polypyrrole/gold bilayer hinges
A Cholesky decomposition based massive MIMO uplink detector with adaptive interpolation
Applications of tree/link partitioning for moment computations of general lumped RLC networks with resistor loops
A 3.5-GHz Digitally-Controlled Open-Loop Fractional-N Frequency Divider in 28-nm CMOS
Spatial and Channel Dimensions Attention Feature Transfer for Better Convolutional Neural Networks
Adaptive calibration of IIP2 in direct down-conversion mixers with modified LMS algorithm
-99dBc/Hz@10kHz 1MHz-step dual-loop integer-N PLL with anti-mislocking frequency calibration for global navigation satellite system receiver
Wide-Swing Class AB Regulated Cascode Current Mirror
Live demonstration: Behaving cyborg locusts for standoff chemical sensing
Scalable multiview video coding using wavelet
Mixed Mode Circuit Simulator SPLIT2.1 using Dynamic Network Separation and Selective Trace