yusuke1997/dblp-id-title huggingface dataset:
A Model for VLSI Implementation of CNN Image Processing Chips Using Current-mode Techniques
PL-MRO PUF: High Speed Pseudo-LFSR PUF Based on Multiple Ring Oscillators
Analysis of steady-state common-mode response in differential LC-VCOs
Continuous-Time Modeling of Hysteretic DC-DC Converters in CCM
Peak-to-average power-ratio reduction via channel hopping for downlink CDMA systems
Geolocation for partially polarized electromagnetic sources using multiple sparsely and uniformly spaced "spatially stretched vector sensors"
Integrated CMOS Resistance-to-period Converter with Parasitic Capacitance Evaluation
Identification of cut & paste tampering by means of double-JPEG detection and image segmentation
Feed-forward Output Swing Prediction AGC with Parallel-Detect Singular-Store Peak Detector
Low voltage analog synthesizer of orthogonal signals: a current-mode approach
Crosstalk and Power Analysis in Tapered based Composite Cu-CNT TSV in 3D IC
Low Power CMOS Clock Buffer
3D Object-based Scalable Wavelet Video Coding with Boundary Effect Suppression
A 2.4 GHz four port mixer for direct conversion used in telemetering
An efficient Sylvester equation solver for time domain circuit simulation by wavelet collocation method
A power amplifier with minimal efficiency degradation under back-off
Kinect-like depth denoising
A Hilbert curve-based delay fault characterization method for FPGAs
An Area-Efficient Readout Circuit for a High-SNR Triple-Gain LOFIC CMOS Image Sensor
Continuous-time Signal Processing with Time-variant Delay
Efficient computation reduction algorithms for frame rate up-conversion
A 2T P-Channel Logic Flash Cell for Reconfigurable Interconnection in Chiplet-Based Computing-In-Memory Accelerators
Low-latency MAP demapper architecture for coded modulation with iterative decoding
Hybrid sensor network and fusion algorithm for sound source localization
Interface circuitry for CMOS-based monolithic gas sensor arrays
A Cost-Efficient Reversible-Based Reconfigurable Ring Oscillator Physical Unclonable Function
Optimal spreading in multi-user non-coherent binary chaos-shift-keying communication systems
Reconstruction of Complex Dynamical Systems from Time Series using Reservoir Computing
On the number of system separations in power system
MPEG-4 video bitstream structure analysis and its parsing architecture design
Estimation of Switch Statuses for Radical Power Distribution Systems
Minimax design of linear-phase FIR filters with adjustable bandwidths
New pixel-shared design and split-path readout of CMOS image sensor circuits
Heavy haze removal in a learning framework
Jumping Memory for Memristive Reservoir Computing
Signal reconstruction processor design for compressive sensing
A 3GS/s Highly Linear Energy Efficient Constant-Slope Based Voltage-to-Time Converter
Performance analysis of optimum SMI beamformers for spatial interference rejection
Ultra-high ratio dilution microfluidic system for single strand DNA isolation
An Inductor-less Micro Solar Power Management System Design for Energy Harvesting Applications
Unequal packet loss resilience for MPEG-4 video over the Internet
A 73 μW single channel Photoplethysmography-based Blood Pressure Estimation Processor
A CMOS-based Characterisation Platform for Emerging RRAM Technologies
A novel analog layout synthesis tool
Improved discriminant nearest feature space analysis for variable lighting face recognition
Video object detection by model-based tracking
A 120 dB Dynamic Range Logarithmic Multispectral Imager for Near-Infrared Fluorescence Image-Guided Surgery
Denoising Method for Dynamic Vision Sensor Based on Two-Dimensional Event Density
An All-Digital Voltage Droop Detector Utilizing a Multi-Phase Clock assisted Nyquist Counter
Multi-mode message passing switch networks applied for QC-LDPC decoder
Meter placement for load estimation in radial power distribution systems
Behavioral modelling of RF filters in VHDL-AMS for automated architectural and parametric optimization
A low-complexity circuit model of hysteresis
A Self-Biased Charge-Transfer Sense Amplifier
A tutorial overview of filter banks, wavelets and interrelations
Evaluation of the Anonymizability of Complex Networks
Investigating the Robustness of Dynamically Tunable Logic Gates with Tantalum Oxide Memristors
Live demonstration: CMOS capacitive sensor array for real-time analyses of living cells
A Multi-Bit PFD Architecture for ADPLLs with Built-In Jitter Self-Calibration
67.5-fJ Per Access 1-kb SRAM Using 40-nm Logic CMOS Process
Noise properties of ideal memristors
UWB-IR Receiver with Accurate Time-interval-measurement Circuit for Communication/location System
A Subthreshold-Inverter-Based Strong PUF with High Reliability and Energy Efficiency
A novel ternary more, less and equality circuit using recharged semi-floating gate devices
Cellular neural networks for the anticipation of epileptic seizures
A 5th order Volterra study of a 30W LDMOS power amplifier
A low time-complexity, hardware-efficient bit-parallel power-sum circuit for finite fields GF(2M)
Fuzzy-Logic using Unary Bit-Stream Processing
A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior
Noise Analysis of a Solar Cell-Based Receiver for Simultaneous Energy Harvesting and Data Reception
A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter
Use of Multiplier Blocks to Reduce Filter Complexity
FPGA implementation and comparison of AES-GCM and Deoxys authenticated encryption schemes
New approaches to block filtering of images using symmetric convolution and the DST or DCT
A new scene change feature for video transcoding
Transient bit error rate analysis of data recovery systems using jitter models
Current controlled current source model for a PWM dc-dc boost converters operated in discontinuous current mode
Analysis and gain design of an integrated quadrature mixer with improved noise and image rejection
A multiresolution method for singular points detection in fingerprint images
A low-voltage, high linear programmable triode transconductor
A Systolic Graph Partitioning Algorithm for VLSI Design
UWB beamforming architecture for RTLS applications using digital phase-shifters
Mitigation technique for non-linear DC-shift induced by power supply noise in a 28 nm BGR reference
Ultra low leakage synaptic scaling circuits for implementing homeostatic plasticity in neuromorphic architectures
Visual enhancement using sparsity-based image decomposition for low backlight displays
Noise model of indirect-feedback sigma-delta image sensors
A conceptual discussion on relationship between vergence and conjugate eye movements on the viewpoint of system and control engineering
Mobile camera identification using demosaicing features
IC Design for a Two-Mode Buck Converter Optimized for Both Light and Heavy Load
Normal forms of border collisions in high-dimensional nonsmooth maps
Modeling and simulation of micro electromechanical (MEM) beam resonator-based oscillators
Design and implementation of application specific sigma-delta A/D converters
A new detector architecture for optical pickup units in DVD systems
Reduced-rank BEACON algorithm based on joint iterative optimization of adaptive filters
Minimum power broadcast trees for wireless networks: optimizing using the viability lemma
Error-free VLSI architecture for the 2-D Daubechies 4-tap filter using algebraic integers
A low-power low-voltage transceiver architecture suitable for wireless distributed sensors network
A low power 16-bit Booth Leapfrog array multiplier using Dynamic Adders
Efficient design technique for pulse swallow based fractional-N frequency divider
Improving datapathutilization of programmable DSP with composite functional units
A Novel Approach to the Convergence of Unsupervised Learning Algorithms
A Parallel Architecture for Hermitian Decoders: Satisfying Resource and Throughput Constraints
An explorative tile-based technique for automated constraint transformation, placement and routing of high frequency analog filters
Video-based Human Fall Detection in Smart Homes Using Deep Learning
A trapped charge compensation scheme for ISFET based translinear circuits
Opportunties and challenges of tunnel FETs
Characterization and noise analysis of a 12-bit current steering digital-to-analog converter
FPGA-based real-time acoustic camera prototype
System-on-chip design of a four-port ADSL-lite Data DSP
A 0.4 V 6.4 μW 3.3 MHz CMOS Bootstrapped Relaxation Oscillator with ±0.71% Frequency Deviation over -30 to 100 °C for Wearable and Sensing Applications
Error-resilient image coding and transmission over wireless channels
A fuzzy algorithm for navigation of mobile robots in unknown environments
Synthesis of multiple resonance networks
A Buck Converter for 5G NR RF-PA with 400ns Rise- and Fall-Time and Spread Spectrum Switching
A novel approach to L 2 -sensitivity minimization of digital filters subject to L 2 -scaling constraints
Variable neighborhood tabu search for capacitor placement in distribution systems
A Floorplanning Method with Topological Constraint Manipulation
Design of a wideband low power FMCW synthesizer in 65 nm CMOS for radar applications
A Low Power and Low Quantization Noise Digital Sigma-Delta Modulator for Wireless Transmitters
Towards a bio-inspired mixed-signal retinal processor
A Heterogeneous Spiking Neural Network for Computationally Efficient Face Recognition
FinFET cells with different transistor sizing techniques against PVT variations
A model-based rate allocation mechanism for wavelet-based embedded image and video coding
Modeling cascading failure propagation in power systems
Ultra-low Power Radios for Ad-hoc Networks
Digital Block Modeling and Substrate Noise Aware Floorplanning for Mixed Signal SOCs
Low power, current mode circuits for programmable neural network
A 0.18 pJ/Step Time-Domain 1st Order ΔΣ Capacitance-to-Digital Converter in 65-nm CMOS
A fixed transconductance bias technique for CMOS analog integrated circuits
Electronically tunable current-mode universal biquadratic filter using a single CCCFTA
A Playful Energy Harvesting Based Teaching Platform for Physical Computing
A 0.18µm CMOS transceiver design for high-speed backplane data communications
A 167 μW 915 MHz gain-boosted LC VCO
Live demonstration: A CMOS ASIC for precise reading of a Magnetoresistive sensor array for NDT
A fast FPW-based protein concentration measurement system
A Capacitor-Free CMOS Low-Dropout Regulator
A 0.7 - 2.6 GHz high-linearity rf front-end for cognitive radio spectrum sensing
A 4 th -order low-power diode-C-based filter with 12dBm-IIP3 at the cut-off frequency
On the quality assessment of sound signals
Switching and conduction loss analysis of buck converters operating in DCM-only scenarios
A framework of evolutionary graph generation system and its application to circuit synthesis
A 70-to-110 GHz 28-nm CMOS Low Noise Amplifier with 6.1-dB NF Minimum Using Differential Noise Optimization
On Estimation of Nonlinear Systems by Nonparametric Techniques
Speech Bandwidth Extension Aided by Hybrid Model Transform Domain Data Hiding
An analytical model for the slewing behavior of CMOS two-stage operational transconductance amplifiers
NIUGAP: low latency network interface architecture with Gray code for networks-on-chip
A high speed low input current low voltage CMOS current comparator
A Model for MOS Effective Channel Mobility with Emphasis in the Subthreshold and Transition Region
A Class-C Injection-Locked Tripler with 48 dB Sub-Harmonic Suppression and 15 fs Additive RMS Jitter in 0.13μm BiCMOS Process
Subthreshold Leakage Reduction: A Comparative Study of SCL and CMOS Design
A comparison of SVM and asymmetric SIMPLS in emotion recognition from naturalistic dialogues
An Image Discrete Wavelet Transform and the Hardware Implementation
Low-complexity advanced residual prediction design in 3D-HEVC
An Accurate AC Characteristic Table Look-up Model for VLSI Analog Circuits Simulation Applications
A numerical design approach for high speed, differential, resistor-loaded, CMOS amplifiers
Analogue/digital interface and communications aspects in a multi-channel ENG recording asic
Design and implementation of a 1GHz CMOS resonator utilizing surface acoustic wave
Blind decision feedback equalization of time-varying channels with DPSK inputs
A low-power, 20-Gb/s continuous-time adaptive passive equalizer
A high-speed FIR adaptive filter architecture using a modified delayed LMS algorithm
A ring-processor based blind beamformer design for use in wireless sensor networks
Shunt-peaking in MCML gates and its application in the design of a 20 Gb/s half-rate phase detector
Extended counting ADC for 32-channel neural recording headstage for small animals
A New VLSI Architecture of Next-Generation QC-LDPC Decoder for 5G New-Radio Wireless-Communication Standard
Multi-Agent Proximal Policy Optimization Applications in Low-Dropout Regulator Design
Fast exclusion of angular intra prediction modes in HEVC using reference sample variance
A simple approach to ECG Motion Artifacts Reduction by MDWD Coefficients Removal
A Floorplanner driven by Structural & Timing Constraints
A parametric polyphase domain approach to blind calibration of timing mismatches for M-channel time-interleaved ADCs
Area-Efficient Multiplier Designs Using a 3D Nanofabric Process Flow
A novel optical Bi-Cell with integrated readout circuitry
Zero-bias true random number generator using LFSR-based scrambler
Lower bounds for the MSE convergence of APA
Highway Facilities on the Joban Expressway to Contribute to the Reconstruction of the Tohoku Region
Towards Strong AI with Analog Neural Chips
In-Memory Logic Synthesis Methods based on Read Decoupled 8T and Transpose 11T SRAMs
Compact calibration circuit for large neuromorphic arrays
Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method
Hybrid-Grained Pruning and Hardware Acceleration for Convolutional Neural Networks
A 100-context optically reconfigurable gate array
Analysis and modeling of jitter and frequency tolerance in gated oscillator based CDRs
Error resilient methods for real-time MPEG-4 video streaming
Low Offset, High-Resolution Threshold Logic Design in 22nm FDSOI
Developing a Miniature Energy-Harvesting-Powered Edge Device with Multi-Exit Neural Network
Reducing offset errors in MITE systems by precise floating gate programming
Memristor Resistance State Tuning with High-Frequency Periodic Inputs
A new method for segmentation of noisy, low-contrast image sequences
Analysis and Design of a 14-bit SAR ADC using self-calibration DAC
Efficient computation schemes and bit-serial architectures for normalized LMS adaptive filtering in audio applications
Application of dynamic power supply scaling in a low-energy ATM interface
Reconfigurable crossbar switch architecture for network processors
Event-driven stereo vision with orientation filters
Exact and heuristic methods of assignment driven scheduling for data-path synthesis applications
A Low-power Δ-ΔΣ-based Bio-impedance Readout IC with Capacitive-feedback Baseline Cancellation
Broadband matching of an RLC load by equal minima gain functions
Inter-signal timing skew compensation of parallel links with voltage-mode incremental signaling
Application of perturbation methods to the analysis of inter-area oscillations
8×8-Bit multiplier designed with a new wave-pipelining scheme
A Low-Cost Triple-Channel 10-bit 250MHz DAC IP in 65nm CMOS Process
A 136μW Over 800m Range Backscatter-Like UHF Band Transceiver
FPSeg: Flexible Promptable Semantic Segmentation for Edge Devices
A DC-Coupled Neural Recording Analog Front-End with Bi-Level Bulk Modulation-Based EDO Compensation in 40nm Bulk CMOS
Adaptive algorithm for discontinuity preserving image restoration
Run-time mapping of applications on FPGA-based reconfigurable systems
Reduced-Complexity Depth Filtering and Occlusion Suppression using Modulated-Sparse Light Fields
Stability of 2-D distributed processes with time-variant communication delays
A small analog VLSI inner hair cell model
Reconfigurable analog interface for mixed signal SOC
Symbolic passive-RC circuit synthesis by admittance matrix expansion
Circuit for statistical estimation of BER and SNR in telecommunications
A statistical framework for replay detection in soccer video
Redundancy reduction for high-speed fir filter architectures based on carry-save adder trees
Reconstruction of compressively sensed complex-valued terahertz data
Low Variance Adaptation Method for the LMS-Type Adaptive Filters Based on the Gaussian Model
A 365-µW 915-MHz & 2.45-GHz Flexible Mixer-First Discrete-Time-Receiver Front-End
Noise Figure Measurement Using Mixed-Signal BIST
Quasi-active Power Factor Correction using Transformer-assisted Driving Voltage
Silicon neuron dedicated to memristive spiking neural networks
Fusing Frame and Event Vision for High-speed Optical Flow for Edge Application
300mV 50kHz 75.9dB SNDR CT ΔΣ Modulator with Inverter-based Feedforward OTAs
Lossless non-arbitrated address-event coding
Very high-speed BJT buffer for track-and-hold amplifiers with enhanced linearity
Phase-Change Metasurfaces for Dyamic Beam Steering and Beam Shaping in the Infrared
A high throughput context-based adaptive arithmetic codec for JPEG2000
Uncertainty Principle of the Second-order LPFT
Nonsmooth dynamics of electrical systems
Flexible Wideband Radio Transceiver Testing using Non-Uniform Subsampling Demodulation
Analysis of limit cycle stability in a tap-changing transformer
A Methodology for Efficient Space-Time Adapter Design Space Exploration: A Case Study of an Ultra Wide Band Interleaver
Differential 0.35µm CMOS circuits for 622 MHz/933 MHz monolithic clock and data recovery applications
Batch and adaptive Volterra filtering of cubically nonlinear systems with a Gaussian input
A New 2-D Zero Phase Digital Filter Design with Quadrantally Symmetric or Antisymmetric Properties
Adaptive patch matching for motion compensated prediction
A Power-Optimized CMOS Quadrature VCO with Wide-Tuning Range for UWB Receivers
Video shot segmentation using fusion of SVD and mutual information features
RF transformer as a directional coupler with arbitrary load
A SIMULINK Block Set for the High-Level Simulation of Multistandard Radio Receivers
Super High Definition Image Coding Using Successive Approximation Wavelet Vector Quantization
The global Lanczos method for MIMO interconnect order reductions
Polyphase decomposition channelizers for software radios
HyperGS: Efficient Real-Time 3D Gaussian Rendering Processor Through Hierarchical Sorting
An Amplify-and-Forward Architecture for Low Spectral Efficiencies
A Resistorless Low-Power Voltage Reference with Novel Curvature-Compensation Technique
Use of a Variable Wordlength Technique in an OFDM Receiver to Reduce Energy Dissipation
Superpixel-based salient region detection using the wavelet transform
A Universal BIST Methodology for Interconnects
A PVT-Invariant Front-End Ring Amplifier using Self-Stabilization Technique for SAR ADC
An efficient direct 2-D transform coding IP design for MPEG-4 AVC/H.264
Network-on-Interposer Co-Design for Heterogeneous Chiplet-Based Integrated Systems
A novel energy-efficient serializer design method for gigascale systems
Region-based Eigentransformation for Face Image Hallucination
Differentiating network conversation flow for intrusion detection and diagnostics
Live demonstration: A wirelessly powered highly miniaturized neural stimulator
Investigation of Effect of Stray Capacitances in Air-Core Toroidal Transformer at High-Frequency Oscillation Based on Internal Magnetic Flux Density
CMOS current-copying neural stimulator with OTA-sharing
A study on the step size of cascaded adaptive notch filter utilizing allpass filter
Complexity-effective auditory compensation for digital hearing aids
A SAR based calibration scheme for ISFET sensing arrays
Hardware transactional memory on multi-processor FPGA platform
In-NVRAM Unified PUF and TRNG Based on Standard CMOS Technology
Self-correcting Flip-flops for Triple Modular Redundant Logic in a 12-nm Technology
Vision systems based on the 128×128 focal plane cellular visual microprocessor chips
Blood Glucose Prediction in Type 1 Diabetes Using Deep Learning on the Edge
Single Slope ADC with Reset Counting for FeFET-based In-Memory Computing
A parallel deblocking filter based on H.264/AVC video coding standard
A Fully Integrated High-pass Filter for Very Low Frequency Applications
Synthesis of linear-phase selective filters based on maximum of time-domain response
Reference Spur Estimation in Integer-N Loop-based Multi-Output Fractional-N Phase Locked Loops due to Charge Pump Mismatch
Two-stage Method for Specific Audio Retrieval based on MP3 Compression Domain
An adaptive spatial smoothing technique for beamforming in the presence of correlated arrivals
Crosstalk energy reduction by temporal shielding
A framework of spatio-temporal analysis for video surveillance
Live demonstration: A real-time compensated inductive transceiver for wearable MP3 player system on multi-layered planar fashionable circuit board
Low-power analog lock-in amplifier for high-resolution portable sensing systems
A Three-Step Multi-Resolution Time-to-Digital Converter
A CMOS low-power ADC for DVB-T and DVB-H systems
A novel genetic algorithim based on immunity
A variable forgetting factor QRD-based RLS algorithm with bias compensation for system identification with input noise
A fast variable block size motion estimation algorithm with refined search range for a two-layer data reuse scheme
A CMOS Integrated Power Detector for UWB
Rail-to-rail digital to analog converter with shared binary weighted resistive load interpolation
A CMOS high IIP2 mixer for multi-standard receivers
Digitally controlled oscillator gain estimation for RF-DPLLs in 4G LTE polar transmitters
An accurate clustering algorithm for fast protein-profiling using SCICA on MALDI-TOF
A Low-Power Oscillatory Feature Extraction Unit for Implantable Neural Interfaces
Improved speech presence probability estimation based on wavelet denoising
Hardware Implementation of a 16 Channel 0.16 μJ/class Neural Tree for on-chip Seizure Detection
Steady-Stae Analysis of a Second-Order Adaptive IIR Notch Filter Using the Sign Algorithm
A smart vision system-on-a-chip design based on programmable neural processor integrated with active pixel sensor
A Temporal Averaging Technique for Direction of Arrival Estimation in a Multipath Environment
A blink restoration system with contralateral EMG triggered stimulation and real-time software based artifact blanking
AnaLogic Wave Computers-wave-type algorithms: canonical description, computer classes, and computational complexity
Rationale for optical interconnect
Scalable Serial-parallel Multiplier over GF(2 m ) by Hierarchical Pre-reduction and Input Decomposition
Blind equalization of nonlinear digital satellite links with PSK modulation
Energy-efficient neuromorphic computation based on compound spin synapse with stochastic learning
3-state pseudorandom noise (PN) sequence 3-pulse Reference Sharing Ultra Wideband System
Robust Spiking Attractor Networks with a Hard Winner-Take-All Neuron Circuit
An Approach for UIO Generation for FSM Verification and Validation
A VLSI model of range-tuned neurons in the bat echolocation system
Self-Adjusting Deadtime Generator for High-Efficiency High-Voltage Switched-Mode Power Amplifiers
Flexible 2D nanoelectronics from baseband to sub-THz transistors and circuits
On feedback systems built around cut-inserted ideal transformer
Efficient Architectures for Generalized Integrated Interleaved Decoder
Context-dependent audio-visual and temporal features fusion for TV commercial detection
Machine Learning for Monitoring Vocal Health and Performance of Professional Singers
VLSI Design of a 3-bit Constant-Modulus Precoder for Massive MU-MIMO
Compact and Low-Power Under-Voltage Lockout and Thermal-Shutdown Protection Circuits Using a Novel Low-Iq All-in-One Bandgap Comparator
Concurrent algorithm for high-speed point multiplication in elliptic curve cryptography
A steady-state analysis of adaptive notch filters realized with fixed-point arithmetic
Generation of Symmetric Oscillators
. Experimental evidence for amplitude death induced by dynamic coupling: van der Pol oscillators