yusuke1997/dblp-id-title huggingface dataset:
A Closer Look at Data Augmentation Strategies for Finetuning-Based Low/Few-Shot Object Detection
Robustness investigation of the FlexRay system
Scratch Detector - A FPGA Based System for Scratch Detection in Industrial Picture Development
Stochastic delay analysis of a wireless safety-critical avionics network
An EVT-based worst-case Response Time Analysis of complex real-time systems
Effects of Concurrent Access to Embedded Multicore Microcontrollers with Hard Real-Time Demands
System configuration check against security policies in industrial networks
From UML to Petri Nets for non functional Property Verification
HILAC: A framework for Hardware In the Loop simulation and multi-platform Automatic Code Generation of WSN Applications
Certification-cognizant scheduling of tasks with pessimistic frequency specification
A model-based workflow from specification until validation of timing requirements in embedded software systems
Probabilistic Response Time Analysis for Fixed Preemption Point Selection
Designing HIPAOC: High Performance Architecture On Chip
C 3 : configurable CAN FD controller: architecture, design and hardware implementation
Digital hardware projects: A new tool for automated complexity analysis
Modular paging with dynamic TLB partitioning for embedded real-time systems
Integrating PSL properties into SystemC transactional modeling - Application to the verification of a modem SoC
TEODACS : A new vision for testing dependable automotive communication systems
Applying Model Checking to an Automotive Microcontroller Application
Plant control over QoS-enabled packet networks
Deadlock risk assessment in architectural models of real-time systems
Design of a FFT/IFFT module as an IP core suitable for embedded systems
Optimization of Memory-Constrained Hybrid BIST for Testing Core-Based Systems
Modelling and architecture exploration of a medium voltage protection device
Inter-application redundancy elimination in Wireless Sensor Networks with compiler-assisted scheduling
Designing reliable home-automation networks based on unidirectional nodes
Worst-case delay analysis on a real-time heterogeneous network
A methodology for architecture exploration and performance analysis using system level design languages and rapid architecture profiling
Learning-Enabled CPS for Edge-Cloud Computing
Synthesis of diagnostic techniques based on an IEC 61508-aware metamodel
More accurate complex multiplication for embedded processors
Deconstructing bus access control policies for Real-Time multicores
8th IEEE International Symposium on Industrial Embedded Systems, SIES 2013, Porto, Portugal, June 19-21, 2013
Process Oriented Power Management
Real-time for the masses, step 1: Programming API and static priority SRP kernel primitives
Mapping a Pipelined Data Path onto a Network-on-Chip
A framework architecture for student learning in distributed embedded systems
A wait-free queue for multiple enqueuers and multiple dequeuers using local preferences and pragmatic extensions
From modes to patterns: Pattern-based resource management in time-critical applications
Development of an Embedded System for Visual Servoing in an Industrial Scenario
Towards the standardization of plug-and-play devices for model-based designs of embedded systems
An in-vehicle infotainment software architecture based on google android
An energy-aware algorithm exploiting limited preemptive scheduling under fixed priorities
Generation of correct-by-construction code from design models for embedded systems
Process State Machines for Behavioral Modeling of Embedded Systems
Design of a tailor-made memory protection unit for low power microcontrollers
The Rubus component model for resource constrained real-time systems
Mapping CAN-to-ethernet communication channels within virtualized embedded environments
Minimizing stack usage for AUTOSAR/OSEK's restricted fixed-priority preemption threshold support
Mechanisms for guaranteeing data consistency and flow preservation in AUTOSAR software on multi-core platforms
Dynamic budgeting for settling DRAM contention of co-running hard and soft real-time tasks
A Test Tool for FlexRay-based Embedded Systems
Improving model-based verification of embedded systems by analyzing component dependences
Transmission reserve table buffer for CSMA type control networks of embedded systems
Towards an analysis for hierarchies of sporadic servers on Ethernet
Static probabilistic timing analysis in presence of faults
An Open Framework for Detailed Hardware Modeling
Virtual prototyping of heterogeneous dynamic platforms using Open Virtual Platforms
Efficient partitioning of sporadic real-time tasks with shared resources and spin locks
Shared Data Analysis for Multi-Tasking Real-Time System Testing
Contention-aware performance monitoring counte support for real-time MPSoCs
A wireless computational platform for distributed computing based traffic monitoring involving mixed Eulerian-Lagrangian sensing
Towards resource sharing under multiprocessor semi-partitioned scheduling
Modular architecture for real-time contract-based framework
A formal, model-driven design flow for system simulation and multi-core implementation
The utilization bound of non-preemptive rate-monotonic scheduling in Controller Area Networks is 25%
On Adapting Power Estimation Models for Embedded Soft-Core Processors
Fine-grained timing and control flow error checking for hard real-time task execution
MIPP: A microbenchmark suite for performance, power, and energy consumption characterization of GPU architectures
Context Modelling and Partial-Order Reduction: Application to SDL Industrial Embedded Systems
Architecture of an embedded time gateway between PTP and SNTP
Keynote at SIES: Heterogeneous processors in SoC simplifies integration of IEC61508 and ISO26262 functional safety designs. The ZYNQ7000 experience
Wormhole networks properties and their use for optimizing worst case delay analysis of many-cores
Towards preemption control using CPU frequency scaling in sporadic task systems
A Lightweight Model Solution for Aluminum Material Defect Detection at the Edge
A framework based on real-time OS and multi-agents for intelligent autonomous robot competitions
Engineering functional requirements of reactive systems using synchronous languages
Multi-criteria optimization for mapping programs to multi-processors
Embedded FPGA based induction motor monitoring system with speed drive fed using multiple wavelet analysis
An embedded hypervisor for safety-relevant automotive E/E-systems
A kernel-based architecture for safe cooperative vehicular functions
An Energy Saving Criterion for Wireless Sensor Networks with Time Synchronization Requirements
Static probabilistic timing analysis with a permanent fault detection mechanism
Dependency-aware stochastic analysis of chained execution times
Response-time analysis of the flexray dynamic segment under consideration of slot-multiplexing
Verifying programmable logic controllers with abstraction
Automated Bio Cybernetic System: A Lab-on-Chip case study
Modeling uncertainties in safety-critical real-time systems: A probabilistic component-based analysis
Specification-centered robustness
An open framework to deploy heterogeneous wireless testbeds for Cyber-Physical Systems
Case study on combined validation of safety & security requirements
SS01 - Explicit per-task deadline scaling for uniprocessor scheduling of job-level static mixed-criticality systems
Semi-online power estimation for smartphone hardware components
A dynamic priority arbiter for Network-on-Chip
VOSYSVirtualNet: Low-latency Inter-world Network Channel for Mixed-Criticality Systems
When less means more; and more, the-same?
State Design Pattern Implementation of a DSP processor: A case study of TMS5416C
Design of Networked Control Systems (NCSs) on the basis of interplays between Quality of Control and Quality of Service
Valuing the design flexibility of a distributed real-time embedded system
New Response Time Analysis for PWLP on Multiprocessor Mixed-Criticality Systems
Energy efficient mapping of mixed criticality applications on unrelated heterogeneous multicore platforms
Enhancing Real-Time Networked Embedded Systems with End-to-end TSN-5G Networks
Refining assembly code static analysis for the Intel MCS-51 microcontroller
HLshield: a reliability enhancement framework for high-level synthesis
Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements
Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems
Hyper-periodic thermal management for hard real-time systems
Data-Age Analysis and Optimisation for Cause-Effect Chains in Automotive Control Systems
Non-Linear Feedback Control for Energy Efficient On-Chip Streaming Computation
Prioritizing DAGs to Meet Real-Time and Data-Dependency Constraints with Best Efforts
An IDE for component-based design of embedded real-time software
Experience with integration and certification of COTS based embedded system into advanced avionics system
Formalization and completeness of evolving requirements using Contracts
Bandwidth adaptation in hierarchical scheduling using fuzzy controllers
A wireless body sensor network for the prevention and management of asthma
Performance enhancements for embedded software implementation of GNSS navigation algorithms
Offset assignment on controller area network: improved algorithms and computational evaluation
An FPGA Implementation for a Kalman Filter with Application to Mobile Robotics
Testing real-time embedded software using runtime enforcement
A system for synthesizing abstraction-enabled simulators for binary code verification
FPGA based multiple-channel vibration analyzer embedded system for industrial applications in automatic failure detection
Response-time analysis for non-preemptive scheduling in multi-core systems with shared resources
Towards runtime adaptation in real-time, networked embedded systems
Optimized Resource Dimensioning in an embedded CAN-CAN Gateway
Adaptive video-based algorithm for accident detection on highways
Translating Synchronous Petri Nets into PROMELA for Verifying Behavioural Properties
Comparison of service call implementations in an AUTOSAR multi-core OS
A Design Flow for Critical Embedded Systems
Resource sharing under global scheduling with partial processor bandwidth
Monitoring of I/O for safety-critical systems using PCI express advanced error reporting
Hardware architecture specification and constraint-based WCET computation
Towards virtual prototyping of synchronous real-time systems on noc-based MPSoCs
EDF schedulability analysis for an extended Timing Definition Language
Implementing hierarchical scheduling to support multi-mode system
Validation of executable application models mapped onto network-on-chip platforms
Connectivity-aware motion control among autonomous mobile units
Multi-Server Web Industrial Facility Monitoring by Only COTS Browser's Existing Functionality
Periodic thermal management for hard real-time systems
SMT-based synthesis of TTEthernet schedules: A performance study
Exploring alternatives to scale FTT-SE to large networks
Extending response-time analysis for the automatic synthesis of functional graphs into fixed-priority distributed systems
Selecting back off algorithm in active RFID CSMA/CA based medium-access protocols
Communication aware multiprocessor binding for shared memory systems
Wireless connectivity for mobile sensing applications in industrial environments
Measurement-based probabilistic timing analysis: Lessons from an integrated-modular avionics case study
On the scheduling of fork-join parallel/distributed real-time tasks
Usage of the safety-oriented real-time OASIS approach to build deterministic protection relays
A Dynamically Partial-reconfigurable FPGA-based Architecture for Data Processing on Space Solar Telescope
Natural interpretation of UML/MARTE diagrams for system requirements specification
Improving the reliability of WiDom in a single broadcast domain
Concepts for execution time prediction of 3D GPU rendering
Performance evaluation of Chirp Spread Spectrum ranging for indoor embedded navigation systems
An exploratory case study of testing in an automotive electrical system release process
Supporting firm real-time traffic in fault-tolerant real-time systems based on cyclic scheduling - The WICKPro protocol
An LLVM-based hybrid binary translation system
A Complex Protocol Layer as a linux User-Space Process
Multi-ASIP platform synthesis for real-time applications
11th IEEE Symposium on Industrial Embedded Systems, SIES 2016, Krakow, Poland, May 23-25, 2016
Target Independent Thermal Modeling for Embedded Processors
Formal specification and verification of a protocol for consistent diagnosis in real-time embedded systems
Logic synthesis of reconfigurable controllers
FPGA based embedded system for induction motor failure monitoring at the start-up transient vibrations with wavelets
B-UFS: Uniform Resource Metric-Based Periodic Flow Scheduling in 5G-TSN Integrated Network
Minimizing the search space for computing exact worst-case delays of AFDX periodic flows
Design Space Exploration with Evolutionary Multi-Objective Optimisation
Towards adaptive hierarchical scheduling of overloaded real-time systems
Exploring the Differences of FPGAs and Microcontrollers for their Use in Safety-Critical Embedded Applications
Optimal SAT-based scheduler for time-triggered networks-on-a-chip
Network-on-Chip aware scheduling of hard-real-time tasks
Model-driven virtual prototyping for real-time simulation of distributed embedded systems
The Effect of Hardware Platform Selection on Safety-Critical Software in Embedded Systems: Empirical Evaluations
System-Platform Simulation Model Applied to Performance Analysis of Multiprocessor Video Encoding
A statistical response-time analysis of complex real-time embedded systems by using timing traces
Automated FPGA implementations of BIP designs
13th IEEE International Symposium on Industrial Embedded Systems, SIES 2018, Graz, Austria, June 6-8, 2018
Towards transparent parallel/distributed support for real-time embedded applications
Mixed-criticality scheduling upon non-monitored varying-speed processors
Image-based Control of an Autonomous Robot with Omnidirectional Vision
A compositional implementation of Modbus in Protege
Tight temporal bounds for dataflow applications mapped onto shared resources
A Comparison of Linux CAN Drivers and their Applications
Implementation of a bumpless switch in axial magnetic bearings
Hardware runtime verification of embedded software in SoPC
Evaluation of the overheads and latencies of a virtualized RTOS
High Availability in Cyber-physical Systems by Self-determined Virtual Machine Replication
High Level Modeling of a Bluetooth over Ultra Wide Band Device
Probabilistic preemption control using frequency scaling for sporadic real-time tasks
VHDL Observers for Clock Constraint Checking
Fault isolation with intermediate checks of end-to-end checksums in the Time-Triggered System-on-Chip Architecture
Implementation of virtual sensors in body sensor networks with the SPINE framework
Response time analysis of sporadic DAG tasks under partitioned scheduling
Scalable virtual prototyping of distributed embedded control in a modern elevator system
Industrial Embedded Systems (SIES), 2011 6th IEEE International Symposium on, SIES 2011. Vasteras, Sweden, June 15-17, 2011
Embedded soundscape rendering for the visually impaired
Probabilistic schedulability tests for uniprocessor fixed-priority scheduling under soft errors
Shared memory protection for spatial separation in multicore architectures
Scalably distributed SystemC simulation for embedded applications
A Component-Based Architecture for Adaptive Bandwidth Allocation in Wireless Sensor Networks
An innovative frequency hopping management mechanism for Bluetooth-based industrial networks
Application-level fault tolerance in real-time embedded systems
On link harness optimization of embedded Ethernet networks
Adaptation of the DDS Security Standard for Resource-Constrained Sensor Networks
Towards a true energetically sustainable WSN: A case study with prediction-based data collection and a wake-up receiver
NOCDEX: Network on Chip Design Space Exploration Through Direct Execution and Options Selection Through Principal Component Analysis
Could UML and Contract tackle heterogeneity?
A semi-active suspension embedded controller in a FPGA
Data fusion for relative localization of wireless mobile nodes
Accurate Thermal Prediction for NANS (N-App N-Screen) Services on a Smart Phone
Efficient compositing strategies for automotive HMI systems
Secure update Mechanism for Remote Update of FPGA-Based System
Hard Constant Bandwidth Server: Comprehensive formulation and critical scenarios
Proceedings of the 9th IEEE International Symposium on Industrial Embedded Systems, SIES 2014, Pisa, Italy, June 18-20, 2014
On the relation of FIM and Controllability Gramian
Performance evaluation of a java chip-multiprocessor
Sample-drop firmness analysis of TDMA-scheduled control applications
A Real-Time Interface for Agent-Based Control
Towards an Energy Efficient Protocol for Active RFID
Preliminary Evaluation of High-level Synthesis Tools - Xilinx Vivado and PandA Bambu
Performance analysis of master-slave multi-hop switched ethernet networks
A Structure-Aware DAG Scheduling and Allocation on Heterogeneous Multicore Systems
Probabilistic Task Degradation for Deadline Assurance in Mixed-Criticality Systems
Power and performance aware electronic system level design
Improved Implicit-Deadline Elastic Scheduling
A new Profibus-DP interface for CERN's sputter ion pump controllers
Online intra-task device scheduling for hard real-time systems
Programmable temporal isolation through variable-bandwidth servers
Novel Genome Coding of Genetic Algorithms for the System Partitioning Problem
IEEE Second International Symposium on Industrial Embedded Systems, SIES 2007, Hotel Costa da Caparica, Lisbon, Portugal, July 4-6, 2007
Enabling Online Fault Prediction in Adaptive Control: A Model Checker and Controller Co-Designed CPS Solution
On uses of extreme value theory fit for industrial-quality WCET analysis
A greedy heuristic for distributing hard real-time applications on an IMA architecture
FPGA hardware in the loop system for ERTMS-ETCS train equipment testing
Single Chip Control of a Three Level Converter for High Voltage Unity Power Factor Applications
Fault- Tolerance Support for Mobile Robotic Applications
Efficient implementation of eSTREAM ciphers on 8-bit AVR microcontrollers
Faster floating-point square root for integer processors
Software component diagnosis service: architecture description
SWIFTNET: A data acquisition protocol for fast-reactive monitoring applications
Temporal data matching in component based real time systems
Tracking limbs motion using a wireless network of inertial measurement units
Supervised sharing of virtual channels in Networks -on-Chip
Towards Certifiable Software-Implemented Hardware Fault Tolerance
Large drilling machine control code - Parallelisation and WCET speedup
On voting strategies for loosely synchronized dependable real-time systems
Transactional consistency in the automotive environment
Testing of Hybrid Real-time Systems Using FPGA Platform
Error recovery in time-triggered communication systems using servers
Chain-Aware Runnable Scheduling in AUTOSAR: A Case Study in Automotive Systems
Real-time network traffic handling in FASA
Strategies for the interconnection of CAN buses through an Ethernet switch
Task synthesis for latency-sensitive synchronous block diagram
Design and implementation of a suitable core for on-chip long-term verification
Efficient implementation of AUTOSAR components with minimal memory usage
A language for automatic generation of fast instruction-set compiled simulators
Flexible in-vehicle stream processing with distributed automotive control units for engineering and diagnosis
A low cost, low power, high scalability and dependability processor-cluster platform
Analysis of access control policies in networked embedded systems: A case study
Mixed Reality Glasses: Low-Power IoT System for Digital Augmentation of Video Stream in Visual Recognition Applications
On the timing analysis of the dynamic segment of FlexRay
Generalized Execution Time Estimation
Feature Interaction Control on Smartphones
S 2 P: Two-Stage Superpixel Algorithm for Enhanced Lane Detection on Resource Constraint Edges
Adequacy between AUTOSAR OS specification and real-time scheduling theory
Holistic Modelling of an Integrated Renewable Energy System Controller, Enabling Rapid Hardware Prototyping
Implementing slot-based task-splitting multiprocessor scheduling
An improved preemption delay upper bound for floating non-preemptive region
Minimizing Latency and Data Memory Requirement for Real-time Chain-Structured Synchronous Dataflow
Interoperability Between DSRC and LTE for VANETs
A service based estimation method for MPSoC performance modelling
On the unequal bandwidth share in LonWorks control networks
System-level timing feasibility test for cyber-physical automotive systems
L2 Cache Modeling based on address modification for Native Co-Simulation in SystemC
Energy- and latency-aware simulation of battery-operated wireless embedded networks for home automation
Autonomous quadrotor flight using a vision system and accommodating frames misalignment
On the Consensus Mechanisms of Blockchain/DLT for Internet of Things
Efficient algorithms for memory management in embedded vision systems
IEEE Fourth International Symposium on Industrial Embedded Systems, SIES 2009, Ecole Polytechnique Federale de Lausanne, Switzerland, July 8-10, 2009
Building an interactive test development environment for cyclic executive systems
Towards Standardization of MQTT-Alert-based Sensor Networks: Protocol Structures Formalization and Low-End Node Security
Extending Harmless architecture description language for embedded real-time systems validation
Opportunistic hierarchical classification for power optimization in wearable movement monitoring systems
Integrating Linux and the real-time ERIKA OS through the Xen hypervisor
Embedded systems in the application of fog computing - Levee monitoring use case
Profile-Based Optimization for Embedded Java Applications
Virtual scheduling for compositional real-time guarantees
Cetratus: Towards a live patching supported runtime for mixed-criticality safe and secure systems
ATMP: An Adaptive Tolerance-based Mixed-criticality Protocol for Multi-core Systems
TPR: Dead end aware table less position based routing scheme for low power data-centric wireless sensor networks
Testing of a 32-bit High Performance Embedded Microprocessor
Cyber/physical co-design in practice: Case studies in metroII
Analyzing the Timing Characteristics of Task Activations
International Symposium on Industrial Embedded Systems, IES 2006, Antibes Juan-Les-Pins, France, October 18-20, 2006
Energy and Performance Trade-offs between Instruction Reuse and Trivial Computations for Embedded Applications
FPGA-based digital tunable wireless transceiver for the TETRA-TETRAPOL bands
Response time analysis of hard real-time tasks sharing software transactional memory data under fully partitioned scheduling
Evaluation of an Esterel-based hardware/software co-design flow
Synchronization for an optimal real-time scheduling algorithm on multiprocessors
Towards Dynamic Real-Time Latency Bounds in 5G Communication
Soft real-time smartphone ECG processing
Petri nets as supporting formalism within Embedded Systems Co-design
A soft real-time scheduling framework for wireless industrial sensor actuator networks
A System-on-Chip Implementation for Modular Exponentiation Using the Sliding-Window Method with Variable-Length Partitioning
Deconstructing the Wireless Sensor Networks Architecture
IEEE Third International Symposium on Industrial Embedded Systems, SIES 2008, Montpellier / La Grande Motte, France, June 11-13, 2008
A Longest-Path Problem for Evaluating the Worst-Case Packet Delay of Switched Ethernet
Performance Evaluation of FlexRay/CAN Networks Interconnected by a Gateway
Exploration of energy efficient acceleration concepts for the ROHCv2 in LTE handsets
Improving instruction accurate simulation for parallel automotive applications