Abstract-The modelling of large systems of spiking neurons is computationally very demanding in terms of processing power and communication. SpiNNaker-Spiking Neural Network architecture-is a massively parallel computer system designed to provide a cost-effective and flexible simulator for neuroscience experiments. It can model up to a billion neurons and a trillion synapses in biological real time. The basic building block is the SpiNNaker Chip Multiprocessor (CMP), which is a custom-designed globally asynchronous locally synchronous (GALS) system with 18 ARM968 processor nodes residing in synchronous islands, surrounded by a lightweight, packet-switched asynchronous communications infrastructure. In this paper, we review the design requirements for its very demanding target application, the SpiNNaker micro-architecture and its implementation issues. We also evaluate the SpiNNaker CMP, which contains 100 million transistors in a 102-mm die, provides a peak performance of 3.96 GIPS, and has a peak power consumption of 1 W when all processor cores operate at the nominal frequency of 180 MHz. SpiNNaker chips are fully operational and meet their power and performance requirements. Index Terms-Asynchronous interconnect, chip multiprocessor, energy efficiency, globally asynchronous locally synchronous (GALS), network-on-chip, neuromorphic hardware, real-time simulation, spiking neural networks (SNNs).
For instance, a massively parallelized CMP platform incorporating a customized NoC architecture was used to implement spiking neural networks REF .
SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation
IEEE Journal of Solid-State Circuits
IEEE Journal of Solid-State Circuits
Computer Science