The sparse matrix-vector (SpMV) multiplication routine is an important building block used in many iterative algorithms for solving scientific and engineering problems. One of the main challenges of SpMV is its memory-boundedness. Although compression has been proposed previously to improve SpMV performance on CPUs, its use has not been demonstrated on the GPU because of the serial nature of many compression and decompression schemes. In this paper, we introduce a family of bit-representation-optimized (BRO) compression schemes for representing sparse matrices on GPUs. The proposed schemes, BRO-ELL, BRO-COO, and BRO-HYB, perform compression on index data and help to speed up SpMV on GPUs through reduction of memory traffic. Furthermore, we formulate a BRO-aware matrix reordering scheme as a data clustering problem and use it to increase compression ratios. With the proposed schemes, experiments show that average speedups of 1.5× compared to ELLPACK and HYB can be achieved for SpMV on GPUs.
Wai Teng Tang et al. introduce a series of bit-representation-optimized compression schemes for representing sparse matrices on GPUs including BRO-ELL, BRO-COO, BRO-HYB, which perform compression on index data and help to speed up SpMV on GPUs through reduction of memory traffic REF .
Accelerating sparse matrix-vector multiplication on GPUs using bit-representation-optimized schemes
SC '13
Computer Science