Abstract Today's analog/RF design and verification face significant challenges due to circuit complexity, process variations and short market windows. In particular, the influence of technology parameters on circuits, and the issues related to noise modeling and verification still remain a priority for many applications. Noise could be due to unwanted interaction between the circuit elements or it could be inherited from the circuit elements. In addition, manufacturing disparity influence the characteristic behavior of the manufactured circuits. In this paper, we propose a methodology for modeling and verification of analog/RF designs in the presence of noise and process variations. Our approach is based on modeling the designs using stochastic differential equations (SDE) that will allow us to incorporate the statistical nature of noise. We also integrate the device variation due to 0.18µm fabrication process in an SDE based simulation framework for monitoring properties of interest in order to quickly detect errors. Our approach is illustrated on nonlinear Tunnel-Diode and a Colpitts oscillator circuits.
In a similar numerical approach REF , the authors have used SDEs to model the design with thermal noise in additive form and then combine device variation due to the 0.18-μm fabrication process in an assertion-based run-time verification environment.
Using Stochastic Differential Equation for Verification of Noise in Analog / RF Circuits
Journal of Electronic Testing
Computer Science