Increasing focus on multimedia applications has prompted the addition of multimedia extensions to most existing general purpose microprocessors. This added functionality comes primarily with the addition of short SIMD instructions. Unfortunately, access to these instructions is limited to in-line assembly and library calls. Generally, it has been assumed that vector compilers provide the most promising means of exploiting multimedia instructions. Although vectorization technology is well understood, it is inherently complex and fragile. In addition, it is incapable of locating SIMD-style parallelism within a basic block. In this paper we introduce the concept of Superword Level Parallelism (SLP), a n o vel way of viewing parallelism in multimedia and scienti c applications. We believe S L P is fundamentally di erent from the loop level parallelism exploited by traditional vector processing, and therefore demands a new method of extracting it. We h a ve d e v eloped a simple and robust compiler for detecting SLP that targets basic blocks rather than loop nests. As with techniques designed to extract ILP, ours is able to exploit parallelism both across loop iterations and within basic blocks. The result is an algorithm that provides excellent performance in several application domains. In our experiments, dynamic instruction counts were reduced by 46%. Speedups ranged from 1.24 to 6.70.
Among the latter, Superword Level Parallelism (SLP) REF is the most well-known algorithm.
Exploiting superword level parallelism with multimedia instruction sets
PLDI '00
Computer Science