Abstract. This paper provides a theoretical and practical framework for crash-resilient data structures on a machine with persistent (nonvolatile) memory but transient registers and cache. In contrast to certain prior work, but in keeping with "real world" systems, we assume a full-system failure model, in which all transient state (of all processes) is lost on a crash. We introduce the notion of durable linearizability to govern the safety of concurrent objects under this failure model and a corresponding relaxed, bu↵ered variant which ensures that the persistent state in the event of a crash is consistent but not necessarily up to date. At the implementation level, we present a new "memory persistency model," explicit epoch persistency, that builds upon and generalizes prior work. Our model captures both hardware bu↵ering and fully relaxed consistency, and subsumes both existing and proposed instruction set architectures. Using the persistency model, we present an automated transform to convert any linearizable, nonblocking concurrent object into one that is also durably linearizable. We also present a design pattern, analogous to linearization points, for the construction of other, more optimized objects. Finally, we discuss generic optimizations that may improve performance while preserving both safety and liveness.
REF presented a general algorithm to maintain durable linearizability.
Linearizability of Persistent Memory Objects Under a Full-System-Crash Failure Model
DISC
Computer Science