Abstract-In this paper we present the HAsim FPGAaccelerated simulator. HAsim is able to model a sharedmemory multicore system including detailed core pipelines, cache hierarchy, and on-chip network, using a single FPGA. We describe the scaling techniques that make this possible, including novel uses of time-multiplexing in the core pipeline and on-chip network. We compare our timemultiplexed approach to a direct implementation, and present a case study that motivates why high-detail simulations should continue to play a role in the architectural exploration process.
HAsim REF is a FPGA-based simulator that simulates multicore architectures using a highly-detailed processor pipeline, cache hierarchy and detailed on-chip network using a single FPGA.
HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing
2011 IEEE 17th International Symposium on High Performance Computer Architecture
2011 IEEE 17th International Symposium on High Performance Computer Architecture
Computer Science