Several researchers have recognized in recent years that today's workloads require a microarchitecture that can handle singlethreaded code at high performance, and multi-threaded code at high throughput, while consuming no more energy than is necessary. This paper proposes MorphCore, a unique approach to satisfying these competing requirements, by starting with a traditional high performance out-of-order core and making minimal changes that can transform it into a highly-threaded in-order SMT core when necessary. The result is a microarchitecture that outperforms an aggressive 4-way SMT out-of-order core, "medium" out-of-order cores, small in-order cores, and CoreFusion. Compared to a 2-way SMT out-of-order core, MorphCore increases performance by 10% and reduces energy-delay-squared product by 22%.
In MorphCore REF architecture, an adaptive core is created by starting with a traditional high performance out-oforder core and making internal changes to allow it to be transformed into a highly-threaded in-order SMT core when necessary.
MorphCore: An Energy-Efficient Microarchitecture for High Performance ILP and High Throughput TLP
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
Computer Science