This paper introduces a method that enhances the relocatability of partial bitstreams for FPGA run-time reconfiguration. Reconfigurable applications usually employ partial bitstreams which are specific to one target region on the FPGA. Previously, techniques have been proposed that allow relocation between identical regions on the FPGA. However, as FPGAs are becoming increasingly heterogeneous, this approach is often too restrictive. We introduce a method that circumvents the problem of having to find fully identical regions based on compatible subsets of resources, enabling flexible placement of relocatable modules. In a software defined radio prototype with two reconfigurable regions, the number of partial bitstreams is reduced by 50% and the compile time is shortened by 43%.
Becker et al. REF present a method for enhancing the relocability of partial bitstreams for FPGA runtime configuration, with a special focus on heterogeneities.
Enhancing Relocatability of Partial Bitstreams for Run-Time Reconfiguration
15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007)
15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007)
Computer Science