Abstract-This paper is concerned with assessing the impact that scheduling can have on the performance of semiconductor wafer fabrication facilities. The performance measure considered here is the mean throughput time (sometimes called cycle time, turnaround time or manufacturing interval) for a lot of wafers. A variety of input control and sequencing rules are evaluated using a simulation model of a representative but fictitious semiconductor wafer fab. Certain of these scheduling rules are derived by restricting attention to the subset of stations that are heavily utilized, and using a Brownian network model, which approximates a multiclass queueing network model with dynamic control capability. Three versions of the wafer fab model are studied, which differ only by the number of servers present at particular stations. The three versions have one, two and four stations, respectively, which are heavily utilized (near 90-percent utilization). The simulation results indicate that scheduling has a significant impact on average throughput time, with larger improvements coming from discretionary input control than from lot sequencing. The effects that specific sequencing rules have are highly dependent upon both the type of input control used and the number of bottleneck stations in the fab.
Techniques used for job scheduling have a significant impact on the performance of semiconductor wafer fabrication REF .
Scheduling semiconductor wafer fabrication
IEEE Transactions on Semiconductor Manufacturing
Engineering