Abstract-With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor System-On-Chip (MPSoC) architectures have become widespread. These new systems are very complex to design as they must execute multiple complex real-time applications (e.g. video processing, or videogames), while meeting several additional design constraints (e.g. energy consumption or time-to-market). Therefore, mechanisms to efficiently explore the different possible HW-SW design interactions in complete MPSoC systems are in great need. In this paper, we present a new FPGA-based emulation framework that allows designers to rapidly explore a large range of MPSoC design alternatives at the cycle-accurate level. Our results show that the proposed framework is able to extract a number of critical statistics from processing cores, memory and interconnection systems, with a speed-up of three orders of magnitude compared to cycleaccurate MPSoC simulators.
In REF Del Valle et al present an FPGA-based emulation framework for multiprocessor system-on-chip (MPSoC) architectures.
A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework
2006 IFIP International Conference on Very Large Scale Integration
2006 IFIP International Conference on Very Large Scale Integration
Engineering Computer Science