Abstract: We present compiler analyses and optimizations for explicitly parallel programs that communicate through a shared address space. Any type of code motion on explicitly parallel programs requires a new kind of analysis to ensure that operations reordered on one processor cannot be observed by another. The analysis, called cycle analysis, is based on work by Shasha and Snir and checks for cycles among interfering accesses. We improve the accuracy of their analysis by using additional information from synchronization analysis, which handles postwait synchronization, barriers, and locks. We also make the analysis e cient by exploiting the common code image property of SPMD programs. We demonstrate the use of this analysis by optimizing remote access on distributed memory machines by automatically transforming programs written in a conventional shared memory style into a Split-C program, which has primitives for non-blocking memory operations and one-way communication. The optimizations include message pipelining, to allow multiple outstanding remote memory operations, conversion of two-way to one-way communication, and elimination of communication through data re-use. The performance improvements are as high as 20-35% for programs running on a CM-5 multiprocessor using the Split-C language as a global address layer. Even larger bene ts can be expected on machines with higher communication latency relative to processor speed.
Krishnamurthy and Yelick REF studied compiler analysis and optimizations for explicitly parallel programs with a global address space.
Analyses and Optimizations for Shared Address Space Programs
Journal of Parallel and Distributed Computing
Computer Science