Abstract| The scope of most high-level synthesis e orts to date has been at the level of a single behavioral model represented as a control/data-ow graph. The communication between concurrently executing processes and its requirements in terms of timing and resources have largely been neglected. This restriction limits the applicability of most existing approaches for complex system designs. This paper describes a methodology for the synthesis of interfaces in concurrent systems under detailed timing constraints. We model inter-process communication using blocking and nonblocking messages. We show how the relationship between messages over time can be abstracted as a constraint graph that can be extracted and used during synthesis. We describe a novel technique called interface matching that minimizes the interface cost by scheduling each process with respect to timing information of other processes communicating with it. By scheduling the completion of operations, some blocking communication can be converted to non-blocking while ensuring the communication remains valid. To further reduce hardware costs, we describe the synthesis of interfaces on shared physical media. We show how this sharing can be increased through rescheduling and serialization of the communication. In addition to systematically reducing the interface synchronization cost, this approach permits analysis on the timing consistency of inter-process communication.
Filo et al. REF model concurrent inter-process communication using blocking and non-blocking messages with detailed timing constraints and the synthesis aims to increase performance by making as many communications as possible non-blocking.
Interface Optimization for Concurrent Systems under Timing Constraints
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Computer Science