Scratchpad Memory (SPM), a software-controlled on chip memory, has been widely used as an alternative to caches in modern embedded systems due to its energy ef ficiency. To further reduce the energy consumption, non volatile memory (NVM) based hybrid SPM has been pro posed recently. This paper targets the problem of allocating program variables into hybrid SP M based systems. Both an lLP formulation and a graph-coloring based algorithm are proposed. The experiments show that the proposed graph coloring framework achieves both better memory latency and lower energy costs in comparison to previous works. Energy consumption is a crucial issue in the design of embedded systems. On-chip caches typically consume 25% to 45% of the total chip power [15] . Scratchpad Memory (SPM), a software-controlled on-chip memory, is often ap plied for energy efficiency in embedded systems. The work by Banakar et al. [4] demonstrates that SPMs are more effi cient than caches in performance, energy consumption, and area costs. Software techniques for SPMs also guarantee better timing predictability than a cache memory, which is critical in hard real-time systems. Given these advantages, SPMs are used as alternatives to caches in modem embed ded processors such as Motorola M-core MMC22 1 and TI TMS370Cx7x. This paper proposes techniques for allocat ing program variables on hybrid SPMs.  Traditional SPMs are fabricated in pure SRAM. As the number of CMOS transistors increases, leakage power con sumption becomes a critical issue. Non-volatile memories (NVMs), with the features of low leakage power and high density, present a new way of addressing the memory leak age power consumption problem. However, the write oper ations on NVM suffer from considerably higher energy and longer latency. Recently, hybrid SPMs consisting of SRAM and NVM is proposed [8] and smart memory management techniques are needed when NVM is applied. Much work has been done for SPM allocation. Avis sar et al. derive a static allocation approach, in which the allocation of data to SPM is fixed and unchanged through out program execution [3] . With the assumption that the live range of each data object is through the whole pro gram execution, they model the problem as an Integer Lin ear Programming (ILP) problem, and solve it using com mercial packages. Considering dynamic program behavior, Udayakumaran et al. present a dynamic allocation method for global and stack data [17] . Hu et al. propose a novel hy brid SPM architecture consisting of NVM and SRAM, and present a dynamic allocation approach, where the code is partitioned into multiple regions, and for each region a dy namic programming algorithm is used to reallocate the data [8] . Their solution assumes that the live range of each data objects is through the whole program execution, so cannot explore the opportunity that data objects with disjoint live ranges can share the same memory addresses in SPM. The work by Li et al. considers live ranges of variables, and can allocate arrays with non-overlapped live ranges into the same memory address [13] . There is an implicit assumption in their solution that, the cost of access to one memory unit is always better than another memory unit. This assumption is reasonable for the problem of register allocation, where register is always superior to main memory, and for pure SRAM based SPM, where SPM is always superior to off-
REF use a graph-coloring approach to allocate a hybrid SPM containing both an SRAM region and a nonvolatile STT-RAM region.
MGC: Multiple graph-coloring for non-volatile memory based hybrid Scratchpad Memory
2012 16th Workshop on Interaction between Compilers and Computer Architectures (INTERACT)
2012 16th Workshop on Interaction between Compilers and Computer Architectures (INTERACT)
Computer Science