Abstract improving memory perjormance at software level is more effective in reducing the rapidly expanding gap between processor and memory perjormance. Loop transformations (e.g. loop unrolling, loop tiling) and array restructuring optimizations improve the memory performance by increasing the locality of memory accesses. To find the best Optimization parameters at runtime, we need a fast and simple analytical model to predict the memory access cost. Most of the existing models are complex and impractical to be integrated in the runtime tuning systems. In this paper, we propose a simple, fast and reasonably accurate model that is capable ofpredicting the memory access cost based on a wide range of data access pattems that appear in many scientifir applicafions. Immense research effort has been spent on reducing the performance gap between processor and memory. Processor speed continues to increase every year. CPU clock 6equency is doubling every 18 months complying with Moore's Law. On the other hand main memory (DRAM) speeds haven't increased enough to catch up with the processor speed. This performance gap has been increasing for the last 20 years [I31 and the trend appears to continue in the near hture. Cache memories work on the principle of spatial and temporal locality [17]. However, there are many applications that lack locality in accessing the memory. These applications spend a major fraction of execution time waiting for data accesses. Cache memories are exploited better if the cached blocks of data are reused extensively before other cache blocks replace them. Transforming and reordering the memory accesses improve application performance [IO, 71. As loops are the basic blocks, where most of time is spent in applications, various loop optimization techniques have been developed to enhance the memory hierarchy
Loop transformations (e.g., loop unrolling, loop tiling) and array restructuring can improve data access and performance by increasing the locality associated with these memory accesses REF .
Predicting memory-access cost based on data-access patterns
2004 IEEE International Conference on Cluster Computing (IEEE Cat. No.04EX935)
2004 IEEE International Conference on Cluster Computing (IEEE Cat. No.04EX935)
Computer Science