The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Furthermore  Superscalar processors contain complex control logic in order to extract sufficient instruction level parallelism (ILP). Unfortunately, those structures used to perform out-of-order execution consume a large amount of power. This has important implications for future processor technology. The issue logic is one of the main sources of power dissipation in current superscalar processors [11, 10] . It has been estimated that up to 25% of the energy consumed by a processor is in the issue logic [13] . Furthermore, the issue logic is one of the components with the highest power density and is a hot-spot. Reducing its power dissipation is therefore more important than for other structures. There has been much work in developing hardware techniques to reduce the power cost of the issue logic by turning off unused entries and adapting the issue queue size to the available ILP [13, 8, 2] . Unfortunately, there is inevitably a delay in sensing rapid phase changes and adjusting accordingly. This leads to either a loss of IPC due to too small an issue queue or excessive power dissipation due to too large an issue queue. This paper proposes an entirely different approach -software directed issue queue control. In essence, the compiler knows which parts of the program are to be executed in the near future and can resize the queue accordingly. It reduces the number of instructions in the queue without delaying the critical path of the program. Reducing the number of instructions in the issue queue reduces the number of non-ready operands woken up each cycle and hence saves power. Correctly sizing the issue queue reduces the number of non-critical in-flight instructions and so reduces the number of entries needed in the register file. This enables further power savings by simply turning off empty banks. We evaluate the power savings for both the issue queue and the register file in section 5.
Other works have used hardware or software techniques to reduce the number of instructions entering the issue queue, indirectly saving power in the register file REF .
Software directed issue queue power reduction
11th International Symposium on High-Performance Computer Architecture
11th International Symposium on High-Performance Computer Architecture
Computer Science