E mbedded computing applications demand both efficiency and flexibility: The bulk of computation today happens not in desktops, laptops, or data centers, but rather in embedded media devices. More than one billion cell phones are sold each year, and a 3G cell phone performs more operations per second than a typical desktop CPU. Media devices like cell phones, video cameras, and digital televisions perform more computations than all but the fastest supercomputers at power levels orders of magnitude lower than general-purpose desktop and laptop machines. For example, a 3G mobile phone receiver requires 35 to 40 giga operations per second (GOPS) of performance to handle a 14.4-Mbps channel, and researchers estimate the requirements for a 100-Mbps orthogonal frequency-division multiplexing (OFDM) channel at between 210 and 290 GOPS. In contrast, a typical desktop computer system has a peak performance of a few GOPS and sustains far less on most applications. A cell phone's computing challenges are even more impressive when we consider that these performance levels must be achieved in a small handheld package with a maximum power dissipation of about 1W. Simple arithmetic gives a required efficiency of 25 mW/GOP or 25 pJ/op for the 3G receiver and 3-5 pJ/op for the OFDM receiver. Demanding performance and efficiency requirements drive most media devices to perform their computations with hardwired logic in the form of an applicationspecific integrated circuit. A carefully designed ASIC can achieve an efficiency of 5 pJ/op in a 90-nm CMOS technology. 2 In contrast, very efficient embedded processors and DSPs require about 250 pJ/op 3 (50X more energy than an ASIC), and a popular laptop processor requires 20 nJ/op 4 (4,000X more energy than an ASIC). The efficiencies of these programmable processors is simply inadequate for demanding embedded applications-forcing designers to use hardwired logic to keep energy demands within limits. While ASICs meet the energy-efficiency demands of embedded applications, they are difficult to design and inflexible. It takes two years to design a typical ASIC, and the cost is $20 million or more. This high cost places ASIC efficiency out of reach for all but the highest-volume applications. The long design cycle causes ASICs to lag far behind the latest developments in algorithms, modems, and codecs. Inflexibility increases an ASIC's area and complexity. If a system must support several air interfaces, for example, an ASIC implementation instantiates separate hardwired modems for each interface-even though only one will be used at any time. If it meets the efficiency requirement, a programmable processor can use a single hardware resource to implement all the interfaces by running different software. As media applications evolve and become more complex, the problems of ASICs become larger. The Hardwired ASICs-50X more efficient than programmable processors-sacrifice programmability to meet the efficiency requirements of demanding embedded systems. Programmable processors use energy mostly to supply instructions and data to the arithmetic units, and several techniques can reduce instruction-and data-supply energy costs. Using these techniques in the Stanford ELM processor closes the gap with ASICs to within 3X.
ELM REF is a programmable processor design dedicated to both instruction and data supply energy savings.
Efficient Embedded Computing
Computer
Computer
Computer Science