The state of the art in hardware design is the use of hardware description languages such as VHDL (Very High Speed Integrated Circuit Hardware Description Language). The designs given by VHDL programs are re ned up to the point where the physical realization of the new circuit or board can be synthesized automatically. The designs are tested by simulating them and comparing their output to that prescribed by the speci cation. A signi cant part of the design e ort is spent on detecting unacceptable deviations from this speci cation and subsequently localizing the sources of such faults. In this paper, we describe an approach to employ model-based diagnosis for fault detection and localization in very large VHDL programs (several 100.000 lines of code). In order to achieve su cient performance for practical applicability, we have developed a representation that allows a highly abstracted view of programs and faults, but is su ciently detailed to yield substantial reductions in the fault localization costs when compared to the current manpower-intensive approach. The implementation in conjunction with the knowledge representation is designed with openness in mind in order to allow use of the highly optimized simulation tools available. Discrimination between diagnoses is achieved by use of multiple test cases and measurement selection. Test results show su cient performance for practical use.
In REF , model-based diagnosis was applied to detect and locate faults in large VHDL programs.
Model-Based Diagnosis of Hardware Designs
Artif. Intell.
Computer Science