Increasingly popular reuse-based design paradigms create a pressing need for authorship enforcement techniques that protect the intellectual property rights of designers. We develop the first intellectual property protection protocols for embedding design watermarks at the physical design level. We demonstrate that these protocols are transparent with respect to existing industrial tools and design flows, and that they can embed watermarks into real-world industrial designs with very low implementation overhead (as measured by such standard metrics as wirelength, layout area, number of vias, routing congestion and CPU time). On several industrial test cases, we obtain extremely strong, tamper-resistant proofs of authorship for placement and routing solutions. Due to rapidly growing device counts, shortened design cycle times and a compounding "design productivity shortfall" [9] , core-based design and software reuse strategies are widely believed to be the only viable implementation alternatives for the next level of integrated circuits and their system integration. As a result, development of intellectual property protection (IPP) techniques and tools has emerged as a very prominent open research topic. In this work, we develop the first protocols for IPP at the physical design level, using the concept of constraint-based watermarking. As defined in [5], a design watermark is an invisible (Le., imperceptible to human or machine analysis) identification code that is permanently embedded as an integral part within a design. Various criteria for a given watermarking-based IPP technique, as determined by a leading industry organization, include 1121: (i) maintenance of functional correctness, (ii) transparency to existing design flows; (iii) minimal overhead cost; (iv) enforceability; (v) flexibility in providing a spectrom of protection levels; (vi) persistency; (vii) invisibility; and (viii) proportional component protection. In 151, we list other watermarlung desiderata, and describe a canonical approach to watermarking-based IPP where additional constraints encoding the IP author's signature are added into a given design optimization instance. The solution of the optimization instance, in satisfying these constraints (which would be unlikely in a random solution to the original instance), implicitly contains a proof of authorship. The approach described in [5] is transparent to existing design flows in that it relies on preprocessing (of inputs) or Permission to make digital/hard copy of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage, the copyright notice, the title of the publication and its date appear, and notice is given that copying is by permission of ACM, Inc. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. DAC 98, San Francisco, California 01998 ACM 0-89791-964-5/98/06..$5.00 postprocessing (of solutions) with respect to any given design optimization. We center on the physical design phase for several reasons. Physical design is traditionally viewed as a "difficult" domain, where even a small percentage variation in solution quality can make or break a design, and where high-quality solutions are known to have strong structural resemblance to each other [4] . Devising a watermarking technique that can make a solution "unique", without compromising solution quality, is quite challenging in such a domain. With deep-submicron technology, many performance constraints (e.g.. budgeted edge delays consistent with path timing bounds) cannot be considered satisfied until they are satisfied in the physical design. Thus, for example, it is disingenuous to "watermark" a design by constraining timing budgets, without verifying that such constraints are satisfied after physical design. Other trends -IP reuse methodologies, higher perceived valuation of "hard IP", increasing availability of multiple foundry sources, difficulty of performance validation before physical design, changing handoff models, etc. -all point to physical design as an appropriate juncture in the design cycle for w atemarking.. To our knowledge, this work gives the first solution for IPP at the physical design level. For placement, we propose a postprocessing flow that encodes a signature as specified parity (Le., odd-or evenindex) of the cell row within which particular standard cells must be placed. For routing, we propose a preprocessing flow that encodes a signature as upper bounds on the wrong-way wiring used to route particular signal nets.' Using real industrial design examples and commercial layout tools, we demonstrate the effectiveness of both the preprocessing-and the postprocessing-based watermarking. In particular, strong signatures are achieved without compromising any of the standard metrics for solution quality (routability, wirelength, number of vias, CPU time, etc.). We also demonstrate that these signatures are tamper-resistant. We conclude that addressing IP protection at a lower level of abstraction has an advantage: designs inherently have orders of magnitude more components, allowing significantly stronger proofs of authorship as well as lower overhead. We also conclude that the postprocessing approach is not only feasible, but indeed quite attractive for several reasons: (i) it enables watermarking of already existing designs; (ii) it enables direct calculationg of the hardware overhead incurred by IPP;2 and (iii) is may be likelier to find acceptance among designers and managers, since the complete design process is not altered in any way, 'The particular constraints used to encode the watermark affect the strength of the authorship proof as well as metrics of the layout solution. Devising constraint types such that strong signatures can be achieved transparently using existing flows and tools is, in our experience, a very nontrivial task. 'When preprocessing is used, two designs (one without additional signature constraints, and one with) must be realized in order to determine the hardware overhead incurred by IPP. 782
This can be easily accomplished by imposing specific characteristics on the solutions of optimization problems encountered in the design process REF .
Robust IP watermarking methodologies for physical design
Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)
Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)
Computer Science