This paper analyzes the interactions between the protocol stack (TCP/IP or iWARP over 10-Gigabit Ethernet) and its multicore environment. Specifically, for host-based protocols such as TCP/IP, we notice that a significant amount of processing is statically assigned to a single core, resulting in an imbalance of load on the different cores of the system and adversely impacting the performance of many applications. For host-offloaded protocols such as iWARP, on the other hand, the portions of the communication stack that are performed on the host, such as buffering of messages and memory copies, are closely tied with the associated process, and hence do not create such load imbalances. Thus, in this paper, we demonstrate that by intelligently mapping different processes of an application to specific cores, the imbalance created by the TCP/IP protocol stack can be largely countered and application performance significantly improved. At the same time, since the load is a better balanced in host-offloaded protocols such as iWARP, such mapping does not adversely affect their performance, thus keeping the mapping generic enough to be used with multiple protocol stacks.
The interaction between multi-core architectures and 10-Gigabit Ethernet networks is also considered in REF , where it is demonstrated that adequate mappings of the processes of an application among different cores and the NIC can correct the imbalance created by the protocol stack processing, thus minimizing cache misses and improving the overall performance.
An Analysis of 10-Gigabit Ethernet Protocol Stacks in Multicore Environments
15th Annual IEEE Symposium on High-Performance Interconnects (HOTI 2007)
15th Annual IEEE Symposium on High-Performance Interconnects (HOTI 2007)
Computer Science