Abstract. Much research work has been done on formalizing UML diagrams, but less has focused on using this formalization to analyze the dynamic behaviours between formalized components. In this paper we propose using a subset of fUML (Foundational Subset for Executable UML) as a semi-formal language, and formalizing it to the process algebraic specification language CSP, to make use of FDR as a model checker. Our formalization includes modelling the asynchronous communication framework used within fUML. This allows different interpretations of the communications model to be evaluated. To illustrate the approach, we use the modelling of the Tokeneer ID Station specifications into fUML, and formalize them in CSP to check if the model is deadlock free.
Abdelhalim et al. REF present an approach to manually map an fUML models into the process algebraic specification language CSP (Communicating Sequential Processes) and use the FDR (Failures-Divergences Refinement) modelchecker to check if the model is deadlock free.
Formal verification of Tokeneer behaviours modelled in fUML using CSP
ICFEM
Computer Science