Abstract-Alpha, neutron, and heavy-ion single-event measurements were performed on both high-performance and hardened flip-flop designs in a 28-nm bulk CMOS technology. The experimental results agree very well with simulation predictions and confirm that event error rates can be reduced dramatically using effective layout design. Index Terms-Dual-interlocked cell (DICE), Layout design through Error Aware Positioning (LEAP), radhard design methodology, radiation hardening, radiation hardening by design, single-event effect, single-event upsets (SEU), soft error.
Lilja et al. REF performed alpha, neutron and heavy ion single event measures on the hardened Flip-Flop (FF) design in bulk CMOS technology.
Single-Event Performance and Layout Optimization of Flip-Flops in a 28-nm Bulk Technology
IEEE Transactions on Nuclear Science
IEEE Transactions on Nuclear Science
Physics