The current fast-growing Internet traffic is demanding more and more network capacity everyday. The concept of wavelength division multiplexing (WDM) has provided us an opportunity to multiply the network capacity. Current optical switching technologies allow us to rapidly deliver the enormous bandwidth of WDM networks. Photonic packet switching offers high speed, data rate and format transparency, and configurability, which are some of the important characteristics needed in the future networks supporting different forms of data. In this paper we present some of the critical issues involved in designing and implementing all optical packet switched networks. s telecommunications and computer communications continue to converge, the data traffic is gradually exceeding the telephony traffic. This means that many of the existing connection oriented, circuit switched networks will need to be upgraded to support packet switched data traffic. The concept of wavelength division multiplexing (WDM) has provided us an opportunity to multiply the network capacity. Current optical switching technologies allow us to rapidly deliver the enormous bandwidth of WDM networks. Among all the switching schemes, photonic packet switching appears to be a strong candidate because of the high speed, data rate/format transparency and configurability it offers. The goal of this paper is to discuss some of the critical issues involved in designing and implementing photonic packet switched networks. We will first discuss the synchronization issues, then the contention resolution and switching strategies followed by the header and packet format. Finally, we conclude by describing some of the emerging technologies with potential to revolutionize optical packet switching. In general optical packet switched networks can be divided into two categories: slotted (synchronous) and unslotted (asynchronous) networks. When individual photonic switches are combined to form a network, at the input ports of each node packets can arrive at different times. Since the state of the switch fabric can only be reconfigured at discrete times, it is crucial for the network designer to decide whether to have all the packets aligned before entering the switch fabric. In both these cases, bit-level synchronization and fast clock recovery are required for packet header recognition and packet delineation. In a slotted network all the packets have the same size. They are placed together with the header inside a fixed time slot, which has a longer duration than the packet and header to provide guard time. Slotted networks have been extensively studied while optical fiber was being proposed as the buffer in the storeand-forward type contention resolution. In most cases optical buffering is implemented by using fiber loops or delay lines with a fixed propagation delay equal to multiple of the time slot duration. This leads to the requirement that all the input packets arriving at the input ports have the same size and be aligned in phase with local clock reference. (Fig. 1) In an unslotted network the packets may or may not have the same size. Packets arrive and enter the switch without being aligned. Therefore, the packet-by-packet switch action could take place at any point in time. Obviously, in unslotted networks, the chance for contention is larger because the behavior of the packets is more unpredictable and less regulated. On the other hand, unslotted networks are easier and cheaper to build, more robust, and more flexible compared to slotted networks. As shown later in the article, with A 2 careful design of node architecture and protocols according to the network specifications, satisfactory performance can be achieved. Before we delve into the details of synchronization schemes and architectures, it would be insightful to first look at the source for delay variation of packets within the network. The time for a packet to travel through a certain distance of the fiber depends on the fiber length, the chromatic dispersion, and the temperature variation. The proposal of using managed inter-node link delays (to make them equal to integer number of time slots) is not yet reasonably applicable with the current technology. When WDM is used the effect of chromatic dispersion has to be taken into consideration. Chromatic dispersion results in different propagation speed for packets transmitted on different wavelengths, therefore different propagation delays occur. For example, with a typical fiber dispersion of 20 ps/nm/km (where ps is the time unit for delay variation, nm the unit for wavelength difference and km the unit for propagation distance), a wavelength variation of 30 nm (consistent with the typical Erbium Doped Fiber Amplifier 1530 -1560 nm window) and a propagation distance of 100 km, the propagation delay variation would be about 60 ns. If dispersion compensation fibers are used, the above delay variation can be reduced by one order of magnitude The packet propagation speed also varies with temperature, with a typical figure of 40 ps/ 0 C/km. 100 km of fiber under temperature variation range of 0 -25 0 C means a delay variation of 100 ns. The delay variations mentioned above are relatively slow with respect of time; they can be compensated statically instead of dynamically (on a packet-by-packet basis). Delay variations inside the nodes -What happens to each packet depends on the switch fabric and contention resolution scheme. In a slotted network that uses fiber delay lines as optical buffers, a packet can take different paths with unequal lengths within the switch fabric. All the considerations given in delay variations in the inter-node links apply here. It is worth mentioning that the fast time jitter (as compared with the slow delay variation mentioned previously) induced by dispersion between different wavelengths and unequal optical paths varies from packet to packet at the output of the switch, therefore a fast output synchronization interface might be required. Thermal effects are smaller here because it varies more slowly and can be easily controlled within the node.
For packet header recognition and packet delineation in both these categories, bit-level synchronization and fast clock recovery are required REF .
Advances in Photonic Packet Switching: An Overview
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