user: 请显示与下面列出的汇编代码相匹配的C语言实现：

```asm
<bn_mul_add_words>:
  endbr64
  push   %rbp
  mov    %rsp,%rbp
  push   %r12
  push   %rbx
  mov    %rdi,-0x28(%rbp)
  mov    %rsi,-0x30(%rbp)
  mov    %edx,-0x34(%rbp)
  mov    %rcx,-0x40(%rbp)
  movq   $0x0,-0x18(%rbp)
  cmpl   $0x0,-0x34(%rbp)
  jg     L50
  mov    -0x18(%rbp),%rax
  jmp    L52
L39:
  mov    -0x40(%rbp),%rax
  mov    -0x30(%rbp),%rdx
  mulq   (%rdx)
  mov    %rax,%r12
  mov    %rdx,%rbx
  mov    -0x18(%rbp),%rax
  mov    %rax,%rcx
  mov    %rbx,%rdx
  mov    %r12,%rax
  add    %rax,%rcx
  adc    $0x0,%rdx
  mov    %rcx,-0x18(%rbp)
  mov    %rdx,%rbx
  mov    -0x28(%rbp),%rcx
  mov    -0x18(%rbp),%rsi
  mov    -0x28(%rbp),%rdi
  mov    %rbx,%rax
  mov    %rax,%rdx
  add    %rsi,(%rcx)
  adc    $0x0,%rdx
  mov    %rdx,%rax
  mov    %rax,%rbx
  mov    %rbx,-0x18(%rbp)
  mov    -0x30(%rbp),%rax
  lea    0x8(%rax),%rdx
  mov    -0x40(%rbp),%rax
  mulq   (%rdx)
  mov    %rax,%r12
  mov    %rdx,%rbx
  mov    -0x18(%rbp),%rax
  mov    %rax,%rcx
  mov    %rbx,%rdx
  mov    %r12,%rax
  add    %rax,%rcx
  adc    $0x0,%rdx
  mov    %rcx,-0x18(%rbp)
  mov    %rdx,%rbx
  mov    -0x28(%rbp),%rax
  lea    0x8(%rax),%rcx
  mov    -0x18(%rbp),%rsi
  mov    %rbx,%rax
  mov    %rax,%rdx
  add    %rsi,(%rcx)
  adc    $0x0,%rdx
  mov    %rdx,%rax
  mov    %rax,%rbx
  mov    %rbx,-0x18(%rbp)
  mov    -0x30(%rbp),%rax
  lea    0x10(%rax),%rdx
  mov    -0x40(%rbp),%rax
  mulq   (%rdx)
  mov    %rax,%r12
  mov    %rdx,%rbx
  mov    -0x18(%rbp),%rax
  mov    %rax,%rcx
  mov    %rbx,%rdx
  mov    %r12,%rax
  add    %rax,%rcx
  adc    $0x0,%rdx
  mov    %rcx,-0x18(%rbp)
  mov    %rdx,%rbx
  mov    -0x28(%rbp),%rax
  lea    0x10(%rax),%rcx
  mov    -0x18(%rbp),%rsi
  mov    %rbx,%rax
  mov    %rax,%rdx
  add    %rsi,(%rcx)
  adc    $0x0,%rdx
  mov    %rdx,%rax
  mov    %rax,%rbx
  mov    %rbx,-0x18(%rbp)
  mov    -0x30(%rbp),%rax
  lea    0x18(%rax),%rdx
  mov    -0x40(%rbp),%rax
  mulq   (%rdx)
  mov    %rax,%r12
  mov    %rdx,%rbx
  mov    -0x18(%rbp),%rax
  mov    %rax,%rcx
  mov    %rbx,%rdx
  mov    %r12,%rax
  add    %rax,%rcx
  adc    $0x0,%rdx
  mov    %rcx,-0x18(%rbp)
  mov    %rdx,%rbx
  mov    -0x28(%rbp),%rax
  lea    0x18(%rax),%rcx
  mov    -0x18(%rbp),%rsi
  mov    %rbx,%rax
  mov    %rax,%rdx
  add    %rsi,(%rcx)
  adc    $0x0,%rdx
  mov    %rdx,%rax
  mov    %rax,%rbx
  mov    %rbx,-0x18(%rbp)
  addq   $0x20,-0x30(%rbp)
  addq   $0x20,-0x28(%rbp)
  subl   $0x4,-0x34(%rbp)
L50:
  mov    -0x34(%rbp),%eax
  and    $0xfffffffc,%eax
  test   %eax,%eax
  jne    L39
  cmpl   $0x0,-0x34(%rbp)
  je     L61
  mov    -0x40(%rbp),%rax
  mov    -0x30(%rbp),%rdx
  mulq   (%rdx)
  mov    %rax,%r12
  mov    %rdx,%rbx
  mov    -0x18(%rbp),%rax
  mov    %rax,%rcx
  mov    %rbx,%rdx
  mov    %r12,%rax
  add    %rax,%rcx
  adc    $0x0,%rdx
  mov    %rcx,-0x18(%rbp)
  mov    %rdx,%rbx
  mov    -0x28(%rbp),%rcx
  mov    -0x18(%rbp),%rsi
  mov    -0x28(%rbp),%rdi
  mov    %rbx,%rax
  mov    %rax,%rdx
  add    %rsi,(%rcx)
  adc    $0x0,%rdx
  mov    %rdx,%rax
  mov    %rax,%rbx
  mov    %rbx,-0x18(%rbp)
  subl   $0x1,-0x34(%rbp)
  cmpl   $0x0,-0x34(%rbp)
  jne    L38
  mov    -0x18(%rbp),%rax
  jmp    L52
L38:
  mov    -0x30(%rbp),%rax
  lea    0x8(%rax),%rdx
  mov    -0x40(%rbp),%rax
  mulq   (%rdx)
  mov    %rax,%r12
  mov    %rdx,%rbx
  mov    -0x18(%rbp),%rax
  mov    %rax,%rcx
  mov    %rbx,%rdx
  mov    %r12,%rax
  add    %rax,%rcx
  adc    $0x0,%rdx
  mov    %rcx,-0x18(%rbp)
  mov    %rdx,%rbx
  mov    -0x28(%rbp),%rax
  lea    0x8(%rax),%rcx
  mov    -0x18(%rbp),%rsi
  mov    %rbx,%rax
  mov    %rax,%rdx
  add    %rsi,(%rcx)
  adc    $0x0,%rdx
  mov    %rdx,%rax
  mov    %rax,%rbx
  mov    %rbx,-0x18(%rbp)
  subl   $0x1,-0x34(%rbp)
  cmpl   $0x0,-0x34(%rbp)
  jne    L34
  mov    -0x18(%rbp),%rax
  jmp    L52
L34:
  mov    -0x30(%rbp),%rax
  lea    0x10(%rax),%rdx
  mov    -0x40(%rbp),%rax
  mulq   (%rdx)
  mov    %rax,%r12
  mov    %rdx,%rbx
  mov    -0x18(%rbp),%rax
  mov    %rax,%rcx
  mov    %rbx,%rdx
  mov    %r12,%rax
  add    %rax,%rcx
  adc    $0x0,%rdx
  mov    %rcx,-0x18(%rbp)
  mov    %rdx,%rbx
  mov    -0x28(%rbp),%rax
  lea    0x10(%rax),%rcx
  mov    -0x18(%rbp),%rsi
  mov    %rbx,%rax
  mov    %rax,%rdx
  add    %rsi,(%rcx)
  adc    $0x0,%rdx
  mov    %rdx,%rax
  mov    %rax,%rbx
  mov    %rbx,-0x18(%rbp)
  mov    -0x18(%rbp),%rax
  jmp    L52
L61:
  mov    -0x18(%rbp),%rax
L52:
  pop    %rbx
  pop    %r12
  pop    %rbp
  ret
```

assistant: ```c
unsigned long bn_mul_add_words(unsigned long *rp, const unsigned long *ap, int num, unsigned long w) {
  unsigned long c1 = 0;
  if (num <= 0)
    return (c1);
  while (num & ~3) {
    do {
      register unsigned long high, low;
      asm("mulq %3" : "=a"(low), "=d"(high) : "a"(w), "m"(ap[0]) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+r"(c1), "+d"(high) : "a"(low), "g"(0) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+m"(rp[0]), "+d"(high) : "r"(c1), "g"(0) : "cc");
      c1 = high;
    } while (0);
    do {
      register unsigned long high, low;
      asm("mulq %3" : "=a"(low), "=d"(high) : "a"(w), "m"(ap[1]) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+r"(c1), "+d"(high) : "a"(low), "g"(0) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+m"(rp[1]), "+d"(high) : "r"(c1), "g"(0) : "cc");
      c1 = high;
    } while (0);
    do {
      register unsigned long high, low;
      asm("mulq %3" : "=a"(low), "=d"(high) : "a"(w), "m"(ap[2]) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+r"(c1), "+d"(high) : "a"(low), "g"(0) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+m"(rp[2]), "+d"(high) : "r"(c1), "g"(0) : "cc");
      c1 = high;
    } while (0);
    do {
      register unsigned long high, low;
      asm("mulq %3" : "=a"(low), "=d"(high) : "a"(w), "m"(ap[3]) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+r"(c1), "+d"(high) : "a"(low), "g"(0) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+m"(rp[3]), "+d"(high) : "r"(c1), "g"(0) : "cc");
      c1 = high;
    } while (0);
    ap += 4;
    rp += 4;
    num -= 4;
  }
  if (num) {
    do {
      register unsigned long high, low;
      asm("mulq %3" : "=a"(low), "=d"(high) : "a"(w), "m"(ap[0]) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+r"(c1), "+d"(high) : "a"(low), "g"(0) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+m"(rp[0]), "+d"(high) : "r"(c1), "g"(0) : "cc");
      c1 = high;
    } while (0);
    if (--num == 0)
      return c1;
    do {
      register unsigned long high, low;
      asm("mulq %3" : "=a"(low), "=d"(high) : "a"(w), "m"(ap[1]) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+r"(c1), "+d"(high) : "a"(low), "g"(0) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+m"(rp[1]), "+d"(high) : "r"(c1), "g"(0) : "cc");
      c1 = high;
    } while (0);
    if (--num == 0)
      return c1;
    do {
      register unsigned long high, low;
      asm("mulq %3" : "=a"(low), "=d"(high) : "a"(w), "m"(ap[2]) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+r"(c1), "+d"(high) : "a"(low), "g"(0) : "cc");
      asm("addq %2,%0; adcq %3,%1" : "+m"(rp[2]), "+d"(high) : "r"(c1), "g"(0) : "cc");
      c1 = high;
    } while (0);
    return c1;
  }
  return (c1);
}
```