user: Demonstrate the C code that generates the assembly output below:

```asm
<predict_4x4_dc>:
  endbr64
  mov    %r8d,%eax
  xor    %r11d,%r11d
  mov    %esi,%r10d
  mov    %rdx,%rsi
  shr    $0x8,%eax
  mov    %r8d,%eax
  movslq %ecx,%rdx
  push   %rbx
  setne  %r11b
  and    $0x3,%eax
  lea    (%rdx,%rdx,1),%ecx
  or     %eax,%r11d
  xor    %eax,%eax
  lea    (%rdx,%rcx,1),%r9d
  and    $0x30,%r8d
  setne  %al
  add    %eax,%eax
  or     %r11d,%eax
  cmp    $0x2,%eax
  je     L25
  cmp    $0x3,%eax
  je     L3
  cmp    $0x1,%eax
  je     L55
  mov    $0x80808080,%eax
L28:
  movslq %r9d,%r9
  movslq %ecx,%rcx
  pop    %rbx
  mov    %eax,(%rsi,%r9,1)
  mov    %eax,(%rsi,%rcx,1)
  mov    %eax,(%rsi,%rdx,1)
  mov    %eax,(%rsi)
  ret
  nopl   (%rax)
L25:
  lea    -0x1(%r10),%eax
  mov    $0xffffffff,%r8d
  movzbl (%rdi,%r8,1),%r8d
  movzbl (%rdi,%rax,1),%eax
  add    %r8d,%eax
  lea    (%r10,%r10,1),%r8d
  lea    -0x1(%r8),%r11d
  lea    -0x1(%r10,%r8,1),%r8d
  movzbl (%rdi,%r11,1),%r11d
  movzbl (%rdi,%r8,1),%edi
  add    %r11d,%eax
  lea    0x2(%rax,%rdi,1),%eax
  sar    $0x2,%eax
  imul   $0x1010101,%eax,%eax
  jmp    L28
  nopw   0x0(%rax,%rax,1)
L55:
  mov    %r10d,%r8d
  sub    %r10d,%eax
  neg    %r8d
  movzbl (%rdi,%rax,1),%eax
  movzbl (%rdi,%r8,1),%r8d
  add    %r8d,%eax
  mov    $0x2,%r8d
  sub    %r10d,%r8d
  movzbl (%rdi,%r8,1),%r8d
  add    %r8d,%eax
  mov    $0x3,%r8d
  sub    %r10d,%r8d
  movzbl (%rdi,%r8,1),%edi
  lea    0x2(%rax,%rdi,1),%eax
  sar    $0x2,%eax
  imul   $0x1010101,%eax,%eax
  jmp    L28
  cs nopw 0x0(%rax,%rax,1)
L3:
  lea    -0x1(%r10),%r8d
  mov    $0xffffffff,%r11d
  sub    %r10d,%eax
  movzbl (%rdi,%r11,1),%r11d
  movzbl (%rdi,%r8,1),%r8d
  movzbl (%rdi,%rax,1),%eax
  add    %r11d,%r8d
  lea    (%r10,%r10,1),%r11d
  lea    -0x1(%r11),%ebx
  lea    -0x1(%r10,%r11,1),%r11d
  movzbl (%rdi,%rbx,1),%ebx
  movzbl (%rdi,%r11,1),%r11d
  add    %ebx,%r8d
  add    %r11d,%r8d
  mov    %r10d,%r11d
  neg    %r11d
  movzbl (%rdi,%r11,1),%r11d
  add    %r11d,%r8d
  mov    $0x1,%r11d
  sub    %r10d,%r11d
  movzbl (%rdi,%r11,1),%r11d
  add    %r11d,%r8d
  mov    $0x2,%r11d
  sub    %r10d,%r11d
  movzbl (%rdi,%r11,1),%r11d
  add    %r11d,%r8d
  lea    0x4(%r8,%rax,1),%eax
  sar    $0x3,%eax
  imul   $0x1010101,%eax,%eax
  jmp    L28
```

assistant: ```c
void predict_4x4_dc(unsigned char *src, unsigned int src_stride, unsigned char *dst, unsigned int dst_stride, int neighbour) {
  const int dst_row_0 = 0;
  const int dst_row_1 = dst_stride;
  const int dst_row_2 = dst_stride * 2;
  const int dst_row_3 = dst_row_1 + dst_row_2;
  unsigned int dc = 0x80808080;
  int left = (((neighbour >> 4) & 3) != 0);
  int top = ((neighbour >> 8) != 0);
  int imode = neighbour & 3;
  imode |= ((left << 1) | top);
  switch (imode) {
  case 3:
    dc = ((src[-1 + 0 * src_stride] + src[-1 + src_stride] + src[-1 + 2 * src_stride] + src[-1 + 3 * src_stride] + src[0 - src_stride] + src[1 - src_stride] + src[2 - src_stride] + src[3 - src_stride] + 4) >> 3) * 0x01010101;
    break;
  case 2:
    dc = ((src[-1 + 0 * src_stride] + src[-1 + src_stride] + src[-1 + 2 * src_stride] + src[-1 + 3 * src_stride] + 2) >> 2) * 0x01010101;
    break;
  case 1:
    dc = ((src[0 - src_stride] + src[1 - src_stride] + src[2 - src_stride] + src[3 - src_stride] + 2) >> 2) * 0x01010101;
    break;
  default:
    break;
  }
  *(unsigned int *)&dst[dst_row_0] = *(unsigned int *)&dst[dst_row_1] = *(unsigned int *)&dst[dst_row_2] = *(unsigned int *)&dst[dst_row_3] = dc;
}
```