user: What would the C source look like for the assembly code provided here:

```asm
<SysCtlClockSet>:
  endbr64
  push   %rbp
  mov    %rsp,%rbp
  sub    $0x30,%rsp
  mov    %rdi,-0x28(%rbp)
  mov    $0x400fe000,%eax
  mov    (%rax),%rax
  and    $0x70000000,%eax
  test   %rax,%rax
  je     L14
  mov    $0x400fe000,%eax
  mov    (%rax),%rax
  and    $0x70ff0000,%eax
  cmp    $0x10000000,%rax
  jne    L159
L14:
  mov    -0x28(%rbp),%rax
  and    $0x80000000,%eax
  test   %rax,%rax
  jne    L62
L159:
  mov    $0x400fe060,%eax
  mov    (%rax),%rax
  mov    %rax,-0x10(%rbp)
  mov    $0x400fe070,%eax
  mov    (%rax),%rax
  mov    %rax,-0x8(%rbp)
  orq    $0x800,-0x10(%rbp)
  andq   $0xffffffffffbfffff,-0x10(%rbp)
  orq    $0x800,-0x8(%rbp)
  mov    $0x400fe060,%edx
  mov    -0x10(%rbp),%rax
  mov    %rax,(%rdx)
  mov    $0x400fe070,%edx
  mov    -0x8(%rbp),%rax
  mov    %rax,(%rdx)
  mov    -0x10(%rbp),%rax
  and    $0x2,%eax
  test   %rax,%rax
  je     L91
  mov    -0x28(%rbp),%rax
  and    $0x2,%eax
  test   %rax,%rax
  je     L153
L91:
  mov    -0x10(%rbp),%rax
  and    $0x1,%eax
  test   %rax,%rax
  je     L194
  mov    -0x28(%rbp),%rax
  and    $0x1,%eax
  test   %rax,%rax
  jne    L194
L153:
  mov    -0x28(%rbp),%rax
  or     $0xfffffffffffffffc,%rax
  and    %rax,-0x10(%rbp)
  mov    $0x400fe060,%edx
  mov    -0x10(%rbp),%rax
  mov    %rax,(%rdx)
  mov    -0x8(%rbp),%rax
  and    $0x80000000,%eax
  test   %rax,%rax
  je     L24
  mov    -0x8(%rbp),%rax
  and    $0x70,%eax
  cmp    $0x30,%rax
  je     L38
  mov    -0x8(%rbp),%rax
  and    $0x70,%eax
  cmp    $0x70,%rax
  je     L38
L24:
  mov    -0x8(%rbp),%rax
  and    $0x80000000,%eax
  test   %rax,%rax
  jne    L43
  mov    -0x10(%rbp),%rax
  and    $0x30,%eax
  cmp    $0x30,%rax
  jne    L43
L38:
  mov    $0x1000,%edi
  call   <SysCtlDelay@plt>
  jmp    L194
L43:
  mov    $0x80000,%edi
  call   <SysCtlDelay@plt>
L194:
  andq   $0xfffffffffffff80f,-0x10(%rbp)
  mov    -0x28(%rbp),%rax
  and    $0x7f0,%eax
  or     %rax,-0x10(%rbp)
  andq   $0x7fffff8f,-0x8(%rbp)
  mov    -0x28(%rbp),%rax
  and    $0x80000030,%eax
  or     %rax,-0x8(%rbp)
  mov    -0x28(%rbp),%rax
  shl    $0x3,%rax
  and    $0x40,%eax
  or     %rax,-0x8(%rbp)
  mov    $0x400fe060,%edx
  mov    -0x10(%rbp),%rax
  mov    %rax,(%rdx)
  mov    $0x400fe070,%edx
  mov    -0x8(%rbp),%rax
  mov    %rax,(%rdx)
  mov    $0x10,%edi
  call   <SysCtlDelay@plt>
  andq   $0xffffffffffffcfff,-0x10(%rbp)
  mov    -0x28(%rbp),%rax
  and    $0x3000,%eax
  or     %rax,-0x10(%rbp)
  andq   $0xffffffffffffdfff,-0x8(%rbp)
  mov    -0x28(%rbp),%rax
  and    $0x2000,%eax
  or     %rax,-0x8(%rbp)
  mov    $0x400fe058,%eax
  movq   $0x40,(%rax)
  mov    -0x8(%rbp),%rax
  and    $0x80000000,%eax
  test   %rax,%rax
  je     L180
  mov    $0x400fe070,%edx
  mov    -0x8(%rbp),%rax
  mov    %rax,(%rdx)
  mov    $0x400fe060,%edx
  mov    -0x10(%rbp),%rax
  mov    %rax,(%rdx)
  jmp    L69
L180:
  mov    $0x400fe060,%edx
  mov    -0x10(%rbp),%rax
  mov    %rax,(%rdx)
  mov    $0x400fe070,%edx
  mov    -0x8(%rbp),%rax
  mov    %rax,(%rdx)
L69:
  andq   $0xfffffffff83ffffc,-0x10(%rbp)
  mov    -0x28(%rbp),%rax
  and    $0x7c00003,%eax
  or     %rax,-0x10(%rbp)
  andq   $0xffffffffe07fffff,-0x8(%rbp)
  mov    -0x28(%rbp),%rax
  and    $0x1f800000,%eax
  or     %rax,-0x8(%rbp)
  mov    -0x28(%rbp),%rax
  and    $0x40000000,%eax
  test   %rax,%rax
  je     L211
  orq    $0x400000,-0x10(%rbp)
  andq   $0xffffffffffbfffff,-0x8(%rbp)
  mov    -0x28(%rbp),%rax
  and    $0x40400000,%eax
  or     %rax,-0x8(%rbp)
  jmp    L127
L211:
  andq   $0xffffffffbfffffff,-0x8(%rbp)
L127:
  mov    -0x28(%rbp),%rax
  and    $0x800,%eax
  test   %rax,%rax
  jne    L135
  movq   $0x8000,-0x18(%rbp)
  jmp    L126
L92:
  mov    $0x400fe050,%eax
  mov    (%rax),%rax
  and    $0x40,%eax
  test   %rax,%rax
  jne    L40
  subq   $0x1,-0x18(%rbp)
L126:
  cmpq   $0x0,-0x18(%rbp)
  jne    L92
  jmp    L226
L40:
  nop
L226:
  andq   $0xfffffffffffff7ff,-0x10(%rbp)
  andq   $0xfffffffffffff7ff,-0x8(%rbp)
L135:
  mov    $0x400fe060,%edx
  mov    -0x10(%rbp),%rax
  mov    %rax,(%rdx)
  mov    $0x400fe070,%edx
  mov    -0x8(%rbp),%rax
  mov    %rax,(%rdx)
  mov    $0x10,%edi
  call   <SysCtlDelay@plt>
  jmp    L79
L62:
  nop
L79:
  leave
  ret
```

assistant: ```c
void SysCtlClockSet(unsigned long ulConfig) {
  unsigned long ulDelay, ulRCC, ulRCC2;
  if (((((*((volatile unsigned long *)(0x400FE000))) & 0x70000000) == 0x00000000) || (((*((volatile unsigned long *)(0x400FE000))) & (0x70000000 | 0x00FF0000)) == (0x10000000 | 0x00000000))) && (ulConfig & 0x80000000)) {
    return;
  }
  ulRCC = (*((volatile unsigned long *)(0x400FE060)));
  ulRCC2 = (*((volatile unsigned long *)(0x400FE070)));
  ulRCC |= 0x00000800;
  ulRCC &= ~(0x00400000);
  ulRCC2 |= 0x00000800;
  (*((volatile unsigned long *)(0x400FE060))) = ulRCC;
  (*((volatile unsigned long *)(0x400FE070))) = ulRCC2;
  if (((ulRCC & 0x00000002) && !(ulConfig & 0x00000002)) || ((ulRCC & 0x00000001) && !(ulConfig & 0x00000001))) {
    ulRCC &= (~(0x00000002 | 0x00000001) | (ulConfig & (0x00000002 | 0x00000001)));
    (*((volatile unsigned long *)(0x400FE060))) = ulRCC;
    if (((ulRCC2 & 0x80000000) && (((ulRCC2 & 0x00000070) == 0x00000030) || ((ulRCC2 & 0x00000070) == 0x00000070))) || (!(ulRCC2 & 0x80000000) && ((ulRCC & 0x00000030) == 0x00000030))) {
      SysCtlDelay(4096);
    } else {
      SysCtlDelay(524288);
    }
  }
  ulRCC &= ~(0x000007C0 | 0x00000030);
  ulRCC |= ulConfig & (0x000007C0 | 0x00000030);
  ulRCC2 &= ~(0x80000000 | 0x00000070);
  ulRCC2 |= ulConfig & (0x80000000 | 0x00000030);
  ulRCC2 |= (ulConfig & 0x00000008) << 3;
  (*((volatile unsigned long *)(0x400FE060))) = ulRCC;
  (*((volatile unsigned long *)(0x400FE070))) = ulRCC2;
  SysCtlDelay(16);
  ulRCC &= ~(0x00002000 | 0x00001000);
  ulRCC |= ulConfig & (0x00002000 | 0x00001000);
  ulRCC2 &= ~(0x00002000);
  ulRCC2 |= ulConfig & 0x00002000;
  (*((volatile unsigned long *)(0x400FE058))) = 0x00000040;
  if (ulRCC2 & 0x80000000) {
    (*((volatile unsigned long *)(0x400FE070))) = ulRCC2;
    (*((volatile unsigned long *)(0x400FE060))) = ulRCC;
  } else {
    (*((volatile unsigned long *)(0x400FE060))) = ulRCC;
    (*((volatile unsigned long *)(0x400FE070))) = ulRCC2;
  }
  ulRCC &= ~(0x07800000 | 0x00400000 | 0x00000002 | 0x00000001);
  ulRCC |= ulConfig & (0x07800000 | 0x00400000 | 0x00000002 | 0x00000001);
  ulRCC2 &= ~(0x1F800000);
  ulRCC2 |= ulConfig & 0x1F800000;
  if (ulConfig & 0x40000000) {
    ulRCC |= 0x00400000;
    ulRCC2 &= ~(0x00400000);
    ulRCC2 |= ulConfig & (0x40000000 | 0x00400000);
  } else {
    ulRCC2 &= ~(0x40000000);
  }
  if (!(ulConfig & 0x00000800)) {
    for (ulDelay = 32768; ulDelay > 0; ulDelay--) {
      if ((*((volatile unsigned long *)(0x400FE050))) & 0x00000040) {
        break;
      }
    }
    ulRCC &= ~(0x00000800);
    ulRCC2 &= ~(0x00000800);
  }
  (*((volatile unsigned long *)(0x400FE060))) = ulRCC;
  (*((volatile unsigned long *)(0x400FE070))) = ulRCC2;
  SysCtlDelay(16);
}
```