user: Demonstrate the C code that generates the assembly output below:

```asm
<SKP_Silk_schur64>:
  endbr64
  push   %r13
  mov    %rdi,%r13
  push   %r12
  mov    %edx,%r12d
  push   %rbp
  push   %rbx
  sub    $0x98,%rsp
  mov    (%rsi),%eax
  mov    %fs:0x28,%rdx
  mov    %rdx,0x88(%rsp)
  xor    %edx,%edx
  test   %eax,%eax
  jle    L163
  test   %r12d,%r12d
  js     L266
  mov    %rsi,%rax
  lea    0x1(%r12),%ecx
  cmp    $0x2,%r12d
  jle    L17
  movdqu (%rsi),%xmm1
  mov    %ecx,%edx
  shr    $0x2,%edx
  pshufd $0x50,%xmm1,%xmm0
  movaps %xmm0,(%rsp)
  pshufd $0xfa,%xmm1,%xmm0
  movaps %xmm0,0x10(%rsp)
  cmp    $0x1,%edx
  je     L96
  movdqu 0x10(%rsi),%xmm4
  pshufd $0x50,%xmm4,%xmm0
  movaps %xmm0,0x20(%rsp)
  pshufd $0xfa,%xmm4,%xmm0
  movaps %xmm0,0x30(%rsp)
  cmp    $0x2,%edx
  je     L96
  movdqu 0x20(%rsi),%xmm7
  pshufd $0x50,%xmm7,%xmm0
  movaps %xmm0,0x40(%rsp)
  pshufd $0xfa,%xmm7,%xmm0
  movaps %xmm0,0x50(%rsp)
  cmp    $0x3,%edx
  je     L96
  movdqu 0x30(%rsi),%xmm4
  pshufd $0x50,%xmm4,%xmm0
  movaps %xmm0,0x60(%rsp)
  pshufd $0xfa,%xmm4,%xmm0
  movaps %xmm0,0x70(%rsp)
L96:
  mov    %ecx,%edx
  and    $0xfffffffc,%edx
  and    $0x3,%ecx
  je     L276
L83:
  movslq %edx,%rcx
  movd   (%rax,%rcx,4),%xmm3
  lea    0x0(,%rcx,4),%rsi
  pshufd $0xe0,%xmm3,%xmm0
  movq   %xmm0,(%rsp,%rcx,8)
  lea    0x1(%rdx),%ecx
  cmp    %ecx,%r12d
  jl     L225
  movd   0x4(%rax,%rsi,1),%xmm6
  movslq %ecx,%rcx
  add    $0x2,%edx
  pshufd $0xe0,%xmm6,%xmm0
  movq   %xmm0,(%rsp,%rcx,8)
  cmp    %edx,%r12d
  jl     L276
  movd   0x8(%rax,%rsi,1),%xmm0
  movslq %edx,%rdx
  pshufd $0xe0,%xmm0,%xmm0
  movq   %xmm0,(%rsp,%rdx,8)
L276:
  mov    0x4(%rsp),%esi
L216:
  mov    %rsp,%rbx
  nopw   0x0(%rax,%rax,1)
L298:
  mov    0x8(%rbx),%ebp
  mov    $0x1f,%edx
  mov    %ebp,%edi
  neg    %edi
  call   <SKP_DIV32_varQ@plt>
  mov    0x4(%rsp),%esi
  mov    %eax,%edx
  cltq
  sar    $0xe,%edx
  add    $0x1,%edx
  sar    %edx
  mov    %edx,0x0(%r13)
  lea    (%rsi,%rsi,1),%edx
  movslq %edx,%rdx
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %ebp,%edx
  add    %ebp,%ebp
  movslq %ebp,%rbp
  mov    %edx,0x8(%rbx)
  imul   %rax,%rbp
  sar    $0x20,%rbp
  add    %ebp,%esi
  mov    %esi,0x4(%rsp)
  cmp    $0x1,%r12d
  je     L140
  mov    0xc(%rsp),%edi
  mov    0x10(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x10(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0xc(%rsp)
  cmp    $0x2,%r12d
  je     L117
  mov    0x14(%rsp),%edi
  mov    0x18(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x18(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x14(%rsp)
  cmp    $0x3,%r12d
  je     L117
  mov    0x1c(%rsp),%edi
  mov    0x20(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x20(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x1c(%rsp)
  cmp    $0x4,%r12d
  je     L117
  mov    0x24(%rsp),%edi
  mov    0x28(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x28(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x24(%rsp)
  cmp    $0x5,%r12d
  je     L117
  mov    0x2c(%rsp),%edi
  mov    0x30(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x30(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x2c(%rsp)
  cmp    $0x6,%r12d
  je     L117
  mov    0x34(%rsp),%edi
  mov    0x38(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x38(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x34(%rsp)
  cmp    $0x7,%r12d
  je     L117
  mov    0x3c(%rsp),%edi
  mov    0x40(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x40(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x3c(%rsp)
  cmp    $0x8,%r12d
  je     L117
  mov    0x44(%rsp),%edi
  mov    0x48(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x48(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x44(%rsp)
  cmp    $0x9,%r12d
  je     L117
  mov    0x4c(%rsp),%edi
  mov    0x50(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x50(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x4c(%rsp)
  cmp    $0xa,%r12d
  je     L117
  mov    0x54(%rsp),%edi
  mov    0x58(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x58(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x54(%rsp)
  cmp    $0xb,%r12d
  je     L117
  mov    0x5c(%rsp),%edi
  mov    0x60(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x60(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x5c(%rsp)
  cmp    $0xc,%r12d
  je     L117
  mov    0x64(%rsp),%edi
  mov    0x68(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x68(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x64(%rsp)
  cmp    $0xd,%r12d
  je     L117
  mov    0x6c(%rsp),%edi
  mov    0x70(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x70(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x6c(%rsp)
  cmp    $0xe,%r12d
  je     L117
  mov    0x74(%rsp),%edi
  mov    0x78(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x78(%rbx)
  imul   %rax,%rdx
  sar    $0x20,%rdx
  add    %edx,%edi
  mov    %edi,0x74(%rsp)
  cmp    $0xf,%r12d
  je     L117
  mov    0x7c(%rsp),%edi
  mov    0x80(%rbx),%edx
  lea    (%rdi,%rdi,1),%ecx
  movslq %ecx,%rcx
  imul   %rax,%rcx
  sar    $0x20,%rcx
  add    %edx,%ecx
  add    %edx,%edx
  movslq %edx,%rdx
  mov    %ecx,0x80(%rbx)
  imul   %rdx,%rax
  sar    $0x20,%rax
  add    %eax,%edi
  mov    %edi,0x7c(%rsp)
  nopw   0x0(%rax,%rax,1)
L117:
  add    $0x8,%rbx
  add    $0x4,%r13
  sub    $0x1,%r12d
  jmp    L298
L163:
  xor    %esi,%esi
  lea    0x0(,%r12,4),%edx
  call   <memset@plt>
  xor    %esi,%esi
  nopw   0x0(%rax,%rax,1)
L140:
  mov    0x88(%rsp),%rax
  sub    %fs:0x28,%rax
  jne    L279
  add    $0x98,%rsp
  mov    %esi,%eax
  pop    %rbx
  pop    %rbp
  pop    %r12
  pop    %r13
  ret
L266:
  mov    0x4(%rsp),%esi
  jmp    L140
L17:
  xor    %edx,%edx
  jmp    L83
L225:
  mov    0x4(%rsp),%esi
  test   %r12d,%r12d
  jg     L216
  jmp    L140
L279:
  call   <__stack_chk_fail@plt>
```

assistant: ```c
int SKP_Silk_schur64(int rc_Q16[], const int c[], int order) {
  int k, n;
  int C[16 + 1][2];
  int Ctmp1_Q30, Ctmp2_Q30, rc_tmp_Q31;
  if (c[0] <= 0) {
    memset((rc_Q16), (0), (order * sizeof(int)));
    return 0;
  }
  for (k = 0; k < order + 1; k++) {
    C[k][0] = C[k][1] = c[k];
  }
  for (k = 0; k < order; k++) {
    rc_tmp_Q31 = SKP_DIV32_varQ(-C[k + 1][0], C[0][1], 31);
    rc_Q16[k] = ((15) == 1 ? ((rc_tmp_Q31) >> 1) + ((rc_tmp_Q31)&1) : (((rc_tmp_Q31) >> ((15) - 1)) + 1) >> 1);
    for (n = 0; n < order - k; n++) {
      Ctmp1_Q30 = C[n + k + 1][0];
      Ctmp2_Q30 = C[n][1];
      C[n + k + 1][0] = Ctmp1_Q30 + (int)((((long long)((((Ctmp2_Q30) << (1)))) * ((rc_tmp_Q31)))) >> (32));
      C[n][1] = Ctmp2_Q30 + (int)((((long long)((((Ctmp1_Q30) << (1)))) * ((rc_tmp_Q31)))) >> (32));
    }
  }
  return (C[0][1]);
}
```