user: Please show me the C implementation that matches the assembly code listed below:

```asm
<CPU>:
  endbr64
  push   %r15
  push   %r14
  push   %r13
  push   %r12
  push   %rbp
  push   %rbx
  sub    $0x38,%rsp
  mov    %fs:0x28,%rax
  mov    %rax,0x28(%rsp)
  xor    %eax,%eax
  call   <start_PC@plt>
  mov    %eax,0x18(%rsp)
  mov    $0x1,%r13d
  lea    D5(%rip),%r15
  lea    0x18(%rsp),%r14
  jmp    L124
L72:
  mov    $0x15,%edx
  mov    $0x3e00000,%esi
  mov    %ebp,%edi
  call   <decode@plt>
  mov    %eax,%r12d
  mov    $0x10,%edx
  mov    $0x1f0000,%esi
  mov    %ebp,%edi
  call   <decode@plt>
  mov    %eax,0x8(%rsp)
  mov    $0x0,%edx
  mov    $0xffff,%esi
  mov    %ebp,%edi
  call   <decode@plt>
  mov    %eax,%ebp
  cmp    $0x21,%ebx
  jne    L20
  mov    %r12d,%edi
  call   <read_ram@plt>
  mov    %eax,%ebx
  mov    0x8(%rsp),%edi
  call   <read_ram@plt>
  cmp    %eax,%ebx
  jbe    L20
  mov    %ebp,%esi
  mov    %r14,%rdi
  call   <jump_PC@plt>
  jmp    L20
L78:
  mov    $0x0,%edx
  mov    $0x3,%esi
  mov    %ebx,%edi
  call   <decode@plt>
  mov    %eax,%r12d
  mov    $0x2,%edx
  mov    $0x4,%esi
  mov    %ebx,%edi
  call   <decode@plt>
  mov    %eax,%ebp
  mov    $0x3,%edx
  mov    $0x8,%esi
  mov    %ebx,%edi
  call   <decode@plt>
  sub    $0x8,%rsp
  lea    0x28(%rsp),%rax
  push   %rax
  lea    0x34(%rsp),%r9
  lea    0x2c(%rsp),%r8
  mov    %ebp,%ecx
  mov    %r12d,%edx
  mov    0x18(%rsp),%esi
  mov    0x1c(%rsp),%edi
  call   <ALU@plt>
  mov    %eax,0x1c(%rsp)
  add    $0x10,%rsp
L20:
  add    $0x1,%r13d
L124:
  mov    0x18(%rsp),%edx
  mov    %r13d,%esi
  mov    %r15,%rdi
  mov    $0x0,%eax
  call   <printf@plt>
  mov    0x18(%rsp),%ebx
  mov    %r14,%rdi
  call   <increment_PC@plt>
  mov    %ebx,%edi
  call   <fetch_instruction@plt>
  mov    %eax,%ebp
  mov    $0x1a,%edx
  mov    $0xfc000000,%esi
  mov    %eax,%edi
  call   <decode@plt>
  mov    %eax,%ebx
  mov    $0x5,%esi
  mov    %eax,%edi
  call   <get_bit@plt>
  cmp    $0x1,%eax
  je     L72
  mov    $0x4,%esi
  mov    %ebx,%edi
  call   <get_bit@plt>
  mov    %eax,%r12d
  mov    $0x0,%edx
  mov    $0x3ffffff,%esi
  mov    %ebp,%edi
  call   <decode@plt>
  mov    %eax,%ebp
  mov    %eax,%edi
  call   <read_ram@plt>
  mov    %eax,0x8(%rsp)
  test   %r12d,%r12d
  je     L78
  sub    $0x11,%ebx
  cmp    $0xe,%ebx
  ja     L20
  mov    %ebx,%ebx
  lea    D0(%rip),%rcx
  movslq (%rcx,%rbx,4),%rax
  add    %rcx,%rax
  notrack jmp *%rax
  mov    %ebp,0xc(%rsp)
  jmp    L20
  mov    %ebp,%esi
  mov    0xc(%rsp),%edi
  call   <write_ram@plt>
  jmp    L20
  addl   $0x1,0xc(%rsp)
  jmp    L20
  mov    0xc(%rsp),%esi
  lea    D20(%rip),%rdi
  mov    $0x0,%eax
  call   <printf@plt>
  jmp    L20
  mov    %ebp,%esi
  mov    %r14,%rdi
  call   <jump_PC@plt>
  jmp    L20
  mov    0x18(%rsp),%esi
  lea    D14(%rip),%rdi
  mov    $0x0,%eax
  call   <printf@plt>
  mov    0x28(%rsp),%rax
  sub    %fs:0x28,%rax
  jne    L126
  add    $0x38,%rsp
  pop    %rbx
  pop    %rbp
  pop    %r12
  pop    %r13
  pop    %r14
  pop    %r15
  ret
  mov    0x8(%rsp),%eax
  mov    %eax,0xc(%rsp)
  jmp    L20
L126:
  call   <__stack_chk_fail@plt>
```

tool_calls: name: unpack_data
arguments: data_tag: D5
type_infered: string
name: unpack_data
arguments: data_tag: D20
type_infered: string
name: unpack_data
arguments: data_tag: D14
type_infered: string

tool: D5: Instruction Cycle: %d	PC: %d


tool: D20: A_reg: %d


tool: D14: Program halted execution at PC: %d


assistant: ```c
void CPU() {
  unsigned int instruction;
  unsigned int PC;
  unsigned int MAR;
  unsigned int DRR;
  unsigned int A;
  unsigned int inst_bits, inst_mode, Binvert, Ainvert, alu_off_flag, opcode;
  unsigned int address, short_address_one, short_address_two, dest_address;
  int carryOut;
  int overflow;
  int zr;
  unsigned int inst_shift = 26, opcode_shift = 0, Binvert_shift = 2, Ainvert_shift = 3;
  unsigned int mask_instruction = 0xfc000000;
  unsigned int mask_opcode = 0x00000003;
  unsigned int mask_Binvert = 0x00000004;
  unsigned int mask_Ainvert = 0x00000008;
  int long_addr_shift = 0, sh_addr1_shift = 21, sh_addr2_shift = 16, dest_addr_shift = 0;
  unsigned int mask_long_address = 0x03ffffff;
  unsigned int mask_short_address_one = 0x03e00000;
  unsigned int mask_short_address_two = 0x001f0000;
  unsigned int mask_destination_address = 0x0000ffff;
  PC = start_PC();
  int clock_counter = 1;
  while (1) {
    printf("Instruction Cycle: %d\tPC: %d\n", clock_counter, PC);
    MAR = PC;
    increment_PC(&PC);
    instruction = fetch_instruction(MAR);
    inst_bits = decode(instruction, mask_instruction, inst_shift);
    inst_mode = get_bit(inst_bits, 5);
    if (inst_mode == 1) {
      short_address_one = decode(instruction, mask_short_address_one, sh_addr1_shift);
      short_address_two = decode(instruction, mask_short_address_two, sh_addr2_shift);
      dest_address = decode(instruction, mask_destination_address, dest_addr_shift);
      if (inst_bits == 0x21) {
        if (read_ram(short_address_one) > read_ram(short_address_two)) {
          jump_PC(&PC, dest_address);
        }
      }
    } else {
      alu_off_flag = get_bit(inst_bits, 4);
      address = decode(instruction, mask_long_address, long_addr_shift);
      DRR = read_ram(address);
      if (alu_off_flag == 0) {
        opcode = decode(inst_bits, mask_opcode, opcode_shift);
        Binvert = decode(inst_bits, mask_Binvert, Binvert_shift);
        Ainvert = decode(inst_bits, mask_Ainvert, Ainvert_shift);
        A = ALU(A, DRR, opcode, Binvert, &carryOut, &zr, &overflow);
      } else {
        if (inst_bits == 0x11) {
          A = DRR;
        } else if (inst_bits == 0x12) {
          A = address;
        } else if (inst_bits == 0x13) {
          write_ram(A, address);
        } else if (inst_bits == 0x14) {
          A += 1;
        } else if (inst_bits == 0x1c) {
          printf("A_reg: %d\n", A);
        } else if (inst_bits == 0x1d) {
          jump_PC(&PC, address);
        } else if (inst_bits == 0x1f) {
          printf("Program halted execution at PC: %d\n", PC);
          return;
        }
      }
    }
    clock_counter++;
  }
}
```