user: Please show me the C implementation that matches the assembly code listed below:

```asm
<Z80_Index_GetOpcodeCountForInstruction>:
  endbr64
  push   %rbp
  push   %rbx
  sub    $0x8,%rsp
  call   <Z80_RD_MEM@plt>
  cmp    $0xdd,%al
  je     L122
  ja     L85
  mov    $0x4,%edx
  cmp    $0xcb,%al
  jne    L14
L284:
  mov    %edx,%eax
  add    $0x8,%rsp
  pop    %rbx
  pop    %rbp
  ret
L85:
  mov    %eax,%ecx
  and    $0xffffffef,%ecx
  mov    $0x1,%edx
  cmp    $0xed,%cl
  je     L284
L43:
  mov    %eax,%ecx
  and    $0x7,%ecx
  cmp    $0x3,%cl
  je     L245
  cmp    $0x5,%cl
  je     L68
  mov    $0x1,%edx
  cmp    $0x1,%cl
  jne    L284
  test   $0x8,%al
  je     L236
  and    $0xffffffef,%eax
  cmp    $0xe9,%al
  sete   %dl
  movzbl %dl,%edx
  add    $0x1,%edx
  jmp    L284
L14:
  mov    %eax,%edx
  and    $0xffffffc0,%edx
  cmp    $0x80,%dl
  je     L338
  ja     L313
  test   %dl,%dl
  je     L209
  cmp    $0x40,%dl
  jne    L46
  mov    $0x1,%edx
  cmp    $0x76,%al
  je     L284
  mov    %eax,%ebp
  and    $0x7,%ebp
  shr    $0x3,%al
  mov    %eax,%ebx
  and    $0x7,%ebx
  mov    %ebx,%edi
  call   <Diss_Index_IsReg8Bit@plt>
  test   %eax,%eax
  jne    L332
  movzbl %bpl,%edi
  call   <Diss_Index_IsReg8Bit@plt>
  mov    $0x1,%edx
  test   %eax,%eax
  je     L284
L332:
  mov    %ebx,%edi
  call   <Diss_Index_Get8BitRegCount@plt>
  mov    %eax,%ebx
  movzbl %bpl,%edi
  call   <Diss_Index_Get8BitRegCount@plt>
  cmp    %al,%bl
  jae    L352
  movzbl %al,%eax
  lea    0x1(%rax),%edx
  jmp    L284
L46:
  mov    $0x1,%edx
  jmp    L284
L313:
  cmp    $0xc0,%dl
  je     L43
  mov    $0x1,%edx
  jmp    L284
L209:
  mov    %eax,%edx
  and    $0x7,%edx
  cmp    $0x6,%dl
  ja     L29
  movzbl %dl,%edx
  lea    D6(%rip),%rcx
  movslq (%rcx,%rdx,4),%rdx
  add    %rcx,%rdx
  notrack jmp *%rdx
  mov    $0x2,%edx
  test   $0x8,%al
  jne    L284
  shr    $0x4,%al
  movzbl %al,%edi
  call   <Diss_Index_IsRegIndex@plt>
  cmp    $0x1,%eax
  sbb    %edx,%edx
  and    $0xfffffffd,%edx
  add    $0x4,%edx
  jmp    L284
  shr    $0x4,%al
  cmp    $0x2,%al
  sete   %dl
  movzbl %dl,%edx
  lea    0x1(%rdx,%rdx,2),%edx
  jmp    L284
  shr    $0x4,%al
  movzbl %al,%edi
  call   <Diss_Index_IsRegIndex@plt>
  cmp    $0x1,%eax
  mov    $0x1,%edx
  sbb    $0xffffffff,%edx
  jmp    L284
  shr    $0x3,%al
  movzbl %al,%ebx
  mov    %ebx,%edi
  call   <Diss_Index_IsReg8Bit@plt>
  mov    $0x1,%edx
  test   %eax,%eax
  je     L284
  mov    %ebx,%edi
  call   <Diss_Index_Get8BitRegCount@plt>
  movzbl %al,%edx
  add    $0x1,%edx
  jmp    L284
  shr    $0x3,%al
  movzbl %al,%ebx
  mov    %ebx,%edi
  call   <Diss_Index_IsReg8Bit@plt>
  mov    $0x1,%edx
  test   %eax,%eax
  je     L284
  mov    %ebx,%edi
  call   <Diss_Index_Get8BitRegCount@plt>
  movzbl %al,%edx
  add    $0x2,%edx
  jmp    L284
L352:
  movzbl %bl,%edx
  add    $0x1,%edx
  jmp    L284
L338:
  mov    %eax,%ebx
  and    $0x7,%ebx
  mov    %ebx,%edi
  call   <Diss_Index_IsReg8Bit@plt>
  mov    $0x1,%edx
  test   %eax,%eax
  je     L284
  mov    %ebx,%edi
  call   <Diss_Index_Get8BitRegCount@plt>
  movzbl %al,%edx
  add    $0x1,%edx
  jmp    L284
L236:
  shr    $0x4,%al
  mov    %eax,%edi
  and    $0x3,%edi
  call   <Diss_Index_IsRegIndex@plt>
  cmp    $0x1,%eax
  mov    $0x1,%edx
  sbb    $0xffffffff,%edx
  jmp    L284
L245:
  mov    %eax,%edx
  and    $0x30,%edx
  cmp    $0x10,%dl
  sete   %cl
  cmp    $0xc3,%al
  sete   %dl
  or     %edx,%ecx
  xor    $0x1,%ecx
  cmp    $0xe3,%al
  sete   %dl
  movzbl %dl,%edx
  and    %ecx,%edx
  add    $0x1,%edx
  jmp    L284
L68:
  mov    $0x1,%edx
  test   $0x8,%al
  jne    L284
  shr    $0x4,%al
  mov    %eax,%edi
  and    $0x3,%edi
  call   <Diss_Index_IsRegIndex@plt>
  cmp    $0x1,%eax
  mov    $0x1,%edx
  sbb    $0xffffffff,%edx
  jmp    L284
L122:
  mov    $0x1,%edx
  jmp    L284
L29:
  mov    $0x1,%edx
  jmp    L284
```

assistant: ```c
int Z80_Index_GetOpcodeCountForInstruction(int DisAddr) {
  unsigned char Opcode;
  Opcode = Z80_RD_MEM(DisAddr);
  DisAddr++;
  switch (Opcode) {
  case 0x0dd:
  case 0x0fd:
  case 0x0ed:
    return 1;
  case 0x0cb:
    return 4;
  default: {
    switch (Opcode & 0x0c0) {
    case 0x000: {
      switch (Opcode & 0x07) {
      case 1: {
        if ((Opcode & 0x08) != 0) {
          return 2;
        } else {
          if (Diss_Index_IsRegIndex((Opcode >> 4) & 0x03)) {
            return 4;
          }
        }
      } break;
      case 2: {
        switch ((Opcode >> 4) & 0x03) {
        case 2:
          return 4;
        default:
          break;
        }
      } break;
      case 3: {
        if (Diss_Index_IsRegIndex((Opcode >> 4) & 0x03))
          return 2;
      } break;
      case 4:
      case 5: {
        unsigned char OpcodeIndex;
        OpcodeIndex = ((Opcode >> 3) & 0x07);
        if (Diss_Index_IsReg8Bit(OpcodeIndex))
          return Diss_Index_Get8BitRegCount(OpcodeIndex) + 1;
      } break;
      case 6: {
        unsigned char OpcodeIndex;
        OpcodeIndex = (Opcode >> 3) & 0x07;
        if (Diss_Index_IsReg8Bit(OpcodeIndex))
          return Diss_Index_Get8BitRegCount(OpcodeIndex) + 2;
      } break;
      default:
        break;
      }
    } break;
    case 0x040: {
      if (Opcode != 0x076) {
        unsigned char Reg1, Reg2;
        Reg1 = (Opcode >> 3) & 0x07;
        Reg2 = Opcode & 0x07;
        if (Diss_Index_IsReg8Bit(Reg1) || Diss_Index_IsReg8Bit(Reg2)) {
          unsigned char Length1, Length2;
          Length1 = Diss_Index_Get8BitRegCount(Reg1);
          Length2 = Diss_Index_Get8BitRegCount(Reg2);
          if (Length1 < Length2) {
            return Length2 + 1;
          }
          return Length1 + 1;
        }
      }
    } break;
    case 0x080: {
      unsigned char OpcodeIndex;
      OpcodeIndex = (Opcode & 0x07);
      if (Diss_Index_IsReg8Bit(OpcodeIndex))
        return Diss_Index_Get8BitRegCount(OpcodeIndex) + 1;
    } break;
    case 0x0c0: {
      switch (Opcode & 0x07) {
      case 1: {
        if ((Opcode & (1 << 3)) == 0) {
          if (Diss_Index_IsRegIndex((Opcode >> 4) & 0x03))
            return 2;
        } else {
          if ((Opcode == 0x0f9) || (Opcode == 0x0e9))
            return 2;
        }
      } break;
      case 3: {
        if ((Opcode & (3 << 4)) == (1 << 4)) {
        } else if (Opcode == 0x0c3) {
        } else {
          if (Opcode == 0x0e3)
            return 2;
        }
      } break;
      case 5: {
        if ((Opcode & (1 << 3)) == 0) {
          if (Diss_Index_IsRegIndex((Opcode >> 4) & 0x03))
            return 2;
        }
      } break;
      default:
        break;
      }
    } break;
    }
  } break;
  }
  return 1;
}
```