[Android Software/Hacking General [Developers Only]] mikereidis:
HCI/I2C Commands/Opcodes, registers, values

HCI/I2C Opcodes, registers, values.

Most of this information is gleaned from:

- The Linux WL1271 FM Radio source code written by a Nokia employee.

- TI source code for fmapp/fmstack, etc.

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The most important "commands":

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0x137 FM_POWER_MODE: FM Core power up (last byte 0=down, 1=up)

Usage:

# FM_POWER_MODE: FM Core power up

adb shell hcitool cmd 0x3f 0x137 0x01 0x01

# FM_POWER_MODE: FM Core power down

adb shell hcitool cmd 0x3f 0x137 0x01 0x00

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0x133 FM_READ

Examples:

# FM_READ: POWER (Register 0x20)

adb shell hcitool cmd 0x3f 0x133 0x20 0x02 0x00

# FM_READ: RSSI (Register 0x01)

adb shell hcitool cmd 0x3f 0x133 0x01 0x02 0x00

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0x135 FM_WRITE

Examples:

# FM WRITE: POWER: Rx on (This actually seems to be "audio enable" !

adb shell hcitool cmd 0x3f 0x135 0x20 0x02 0x00 0x00 0x02

# FM WRITE: POWER: Rx on plus RDS

adb shell hcitool cmd 0x3f 0x135 0x20 0x02 0x00 0x00 0x03

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The "registers": (some call them opcodes, but they seem to be registers IMO)

0x00 0 WL1273_STEREO_GET FMC_FW_OPCODE_RX_STEREO_GET

0 FM_STEREO_MODE mono (or no signal ?)

1 FM_MONO_MODE stereo signal

0x01 1 WL1273_RSSI_LVL_GET FMC_FW_OPCODE_RX_RSSI_LEVEL_GET

(-128) SCHAR_MIN FM_RX_RSSI_THRESHOLD_MIN See also WL1273_SEARCH_LVL_SET

127 SCHAR_MAX FM_RX_RSSI_THRESHOLD_MAX

0x02 2 WL1273_IF_COUNT_GET FMC_FW_OPCODE_RX_IF_COUNT_GET

# changes: 1, 2, 3, ff, fe, 0

0x03 3 WL1273_FLAG_GET FMC_FW_OPCODE_CMN_FLAG_GET

? = Event masks ?

#define FM_FR_EVENT	(1 << 0)

#define FM_BL_EVENT	(1 << 1)

#define FM_RDS_EVENT	(1 << 2)

#define FM_BBLK_EVENT	(1 << 3)

#define FM_LSYNC_EVENT	(1 << 4)

#define FM_LEV_EVENT	(1 << 5)

#define FM_IFFR_EVENT	(1 << 6)

#define FM_PI_EVENT	(1 << 7)

#define FM_PD_EVENT	(1 << 8)

#define FM_STIC_EVENT	(1 << 9)

#define FM_MAL_EVENT	(1 << 10)

#define FM_POW_ENB_EVENT	(1 << 11)

0x04 4 WL1273_RDS_SYNC_GET FMC_FW_OPCODE_RX_RDS_SYNC_GET

0 WL1273_RDS_NOT_SYNCHRONIZED

1 WL1273_RDS_SYNCHRONIZED

0x05 5 WL1273_RDS_DATA_GET FMC_FW_OPCODE_RX_RDS_DATA_GET

64 FMC_FW_RX_RDS_THRESHOLD (*1 or *3) See also FMC_FW_OPCODE_RX_RDS_MEM_SET_GET

85 FMC_FW_RX_RDS_THRESHOLD_MAX Used as FMC_FW_RX_RDS_THRESHOLD_MAX*RDS_BLOCK_SIZE for mem size.

? Set to 3e 16 ? (15894)

0x06 ? Set to 1 ?

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Codes 6-9 missing

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0x0a 10 WL1273_FREQ_SET FMC_FW_OPCODE_RX_FREQ_SET_GET

base + freq / 50Khz

0 0x000 87500 WL1273_BAND_OTHER_LOW

410 0x19a 108000 WL1273_BAND_OTHER_HIGH

0 0x000 76000 WL1273_BAND_JAPAN_LOW

280 0x118 90000 WL1273_BAND_JAPAN_HIGH

? #define FM_UNDEFINED_FREQ 0xFFFFFFFF

0x0b 11 WL1273_AF_FREQ_SET FMC_FW_OPCODE_RX_AF_FREQ_SET_GET

0x0c 12 WL1273_MOST_MODE_SET FMC_FW_OPCODE_RX_MOST_MODE_SET_GET ! MOST = "MOno/STereo"

0 WL1273_RX_STEREO Stereo according to blend

1 WL1273_RX_MONO Force mono output

0 FM_STEREO_MODE

1 FM_MONO_MODE

0x0d 13 WL1273_MOST_BLEND_SET FMC_FW_OPCODE_RX_MOST_BLEND_SET_GET

0 Switched blend & hysteresis

1 FM_STEREO_SOFT_BLEND Soft blend

Now set to 1 = Soft blend

0x0e 14 WL1273_DEMPH_MODE_SET FMC_FW_OPCODE_RX_DEMPH_MODE_SET_GET

0 FM_RX_EMPHASIS_FILTER_50_USEC

1 FM_RX_EMPHASIS_FILTER_75_USEC

0x0f 15 WL1273_SEARCH_LVL_SET FMC_FW_OPCODE_RX_SEARCH_LVL_SET_GET

7 WL1273_DEFAULT_SEEK_LEVEL

(-128) SCHAR_MIN See also WL1273_RSSI_LVL_GET

127 SCHAR_MAX

0x10 16 WL1273_BAND_SET FMC_FW_OPCODE_RX_BAND_SET_GET

0 WL1273_BAND_OTHER 87.5-108 Mhz North America, Europe, generally rest of world besides Japan

1 WL1273_BAND_JAPAN 76-90 Mhz Japan (perhaps soon US also)

0x11 17 WL1273_MUTE_STATUS_SET FMC_FW_OPCODE_RX_MUTE_STATUS_SET_GET

0 ........ FMC_FW_RX_MUTE_UNMUTE_MODE

bit0 0x01 WL1273_MUTE_SOFT_ENABLE FMC_FW_RX_MUTE_RF_DEP_MODE

bit1 0x02 WL1273_MUTE_AC FMC_FW_RX_MUTE_AC_MUTE_MODE

bit2 0x04 WL1273_MUTE_HARD_LEFT FMC_FW_RX_MUTE_HARD_MUTE_LEFT_MODE

bit3 0x08 WL1273_MUTE_HARD_RIGHT FMC_FW_RX_MUTE_HARD_MUTE_RIGHT_MODE

bit4 0x10 WL1273_MUTE_SOFT_FORCE FMC_FW_RX_MUTE_SOFT_MUTE_FORCE_MODE

Set to one of these:

2 0x02 FM_RX_AC_MUTE_MODE Mute On But enable soft/attenuate ?

0 0x00 FM_RX_UNMUTE_MODE Mute Off

16 0x10 FM_RX_SOFT_MUTE_FORCE_MODE Mute Attenuate

Then optionally logically "OR" ('|') this:

bit0 0x01 FM_RX_RF_DEP_MODE

Optional bits ?

bit2 0x04 FM_RX_HARD_MUTE_LEFT_MODE

bit3 0x08 FM_RX_HARD_MUTE_RIGHT_MODE

? #define FM_MUTE_OFF 0

? #define	FM_MUTE_ON 1

? #define	FM_MUTE_ATTENUATE 2

? #define FM_RX_RF_DEPENDENT_MUTE_ON 1

? #define FM_RX_RF_DEPENDENT_MUTE_OFF 0

0x12 18 WL1273_RDS_PAUSE_LVL_SET FMC_FW_OPCODE_RX_RDS_PAUSE_LVL_SET_GET

? Set to 5 ?

0x13 19 WL1273_RDS_PAUSE_DUR_SET FMC_FW_OPCODE_RX_RDS_PAUSE_DUR_SET_GET

? Set to 0x0c = 12

0x14 20 WL1273_RDS_MEM_SET FMC_FW_OPCODE_RX_RDS_MEM_SET_GET

64 FMC_FW_RX_RDS_THRESHOLD (*1 or *3) See also FMC_FW_OPCODE_RX_RDS_DATA_GET

85 FMC_FW_RX_RDS_THRESHOLD_MAX Used as FMC_FW_RX_RDS_THRESHOLD_MAX*RDS_BLOCK_SIZE for mem size.

Set to 0x55 = 85 = Max Thresh

0x15 21 WL1273_RDS_BLK_B_SET FMC_FW_OPCODE_RX_RDS_BLK_B_SET_GET

0x16 22 WL1273_RDS_MSK_B_SET FMC_FW_OPCODE_RX_RDS_MSK_B_SET_GET

0x17 23 WL1273_RDS_PI_MASK_SET FMC_FW_OPCODE_RX_RDS_PI_MASK_SET_GET

0x18 24 WL1273_RDS_PI_SET FMC_FW_OPCODE_RX_RDS_PI_SET_GET

0x19 25 WL1273_RDS_SYSTEM_SET FMC_FW_OPCODE_RX_RDS_SYSTEM_SET_GET

0 FM_RDS_SYSTEM_RDS

1 FM_RDS_SYSTEM_RBDS

0x1a 26 WL1273_INT_MASK_SET FMC_FW_OPCODE_CMN_INT_MASK_SET_GET

0x1b 27 WL1273_SEARCH_DIR_SET FMC_FW_OPCODE_RX_SEARCH_DIR_SET_GET

0 FM_SEARCH_DIRECTION_DOWN

1 FM_SEARCH_DIRECTION_UP

0x1c 28 WL1273_VOLUME_SET FMC_FW_OPCODE_RX_VOLUME_SET_GET

880 0x370 ........ FMC_FW_RX_FM_GAIN_STEP ? 35 steps ?

0 0x00 ........ FMC_FW_RX_FM_VOLUMN_MIN

30904 0x78b8 WL1273_DEFAULT_VOLUME FMC_FW_RX_FM_VOLUMN_INITIAL_VALUE

61808 0xf170 ........ FMC_FW_RX_FM_VOLUMN_MAX

65535 0xffff WL1273_MAX_VOLUME ........

- #define FM_RX_VOLUME_MIN 0

? #define FM_RX_VOLUME_MAX 70

? #define FM_RX_VOLUME_GAIN_STEP 0x370

0x1d 29 WL1273_AUDIO_ENABLE FMC_FW_OPCODE_RX_AUDIO_ENABLE_SET_GET

bit0 0x01 WL1273_AUDIO_ENABLE_I2S FMC_FW_RX_FM_AUDIO_ENABLE_I2S

bit1 0x02 WL1273_AUDIO_ENABLE_ANALOG FMC_FW_RX_FM_AUDIO_ENABLE_ANALOG

bit0|1 0x03 ........ FMC_FW_RX_FM_AUDIO_ENABLE_I2S_AND_ANALOG

0 ........ FMC_FW_RX_FM_AUDIO_ENABLE_DISABLE

0x1e 30 WL1273_PCM_MODE_SET FMC_FW_OPCODE_CMN_I2S_CLOCK_CONFIG_SET_GET

0 0x00 WL1273_PCM_DEF_MODE ? I2S protocol, left channel first, data width 16 bits

0x1f 31 WL1273_I2S_MODE_CONFIG_SET FMC_FW_OPCODE_CMN_I2S_MODE_CONFIG_SET_GET

0x0145= WL1273_IS2_RATE_48K(0) | IS2_TRI_OPT(0) | IS2_SDOWS_RF(0x0100) |

IS2_SLAVEW(0x0040) | IS2_FORMAT_STD(0) | IS2_WIDTH_50(0x0005)

0 0x0 WL1273_IS2_WIDTH_32

1 0x1 WL1273_IS2_WIDTH_40

2 0x2 WL1273_IS2_WIDTH_22_23

3 0x3 WL1273_IS2_WIDTH_23_22

4 0x4 WL1273_IS2_WIDTH_48

5 0x5 WL1273_IS2_WIDTH_50

6 0x6 WL1273_IS2_WIDTH_60

7 0x7 WL1273_IS2_WIDTH_64

8 0x8 WL1273_IS2_WIDTH_80

9 0x9 WL1273_IS2_WIDTH_96

10 0xa WL1273_IS2_WIDTH_128

bits0-3 0xf WL1273_IS2_WIDTH	0xf Mask

........

0 0x00 WL1273_IS2_FORMAT_STD (0x0 << 4)

16 0x10 WL1273_IS2_FORMAT_LEFT (0x1 << 4)

32 0x20 WL1273_IS2_FORMAT_RIGHT (0x2 << 4)

48 0x30 WL1273_IS2_FORMAT_USER (0x3 << 4)

........

0 0x00 WL1273_IS2_MASTER (0x0 << 6)

64 0x40 WL1273_IS2_SLAVEW (0x1 << 6)

........

0 0x00 WL1273_IS2_TRI_AFTER_SENDING (0x0 << 7)

128 0x80 WL1273_IS2_TRI_ALWAYS_ACTIVE (0x1 << 7)

........

0 0x00 WL1273_IS2_SDOWS_RR (0x0 << 8)

256 0x100 WL1273_IS2_SDOWS_RF (0x1 << 8)

512 0x200 WL1273_IS2_SDOWS_FR (0x2 << 8)

768 0x300 WL1273_IS2_SDOWS_FF (0x3 << 8)

........

0 0x00 WL1273_IS2_TRI_OPT (0x0 << 10)

1024 0x400 WL1273_IS2_TRI_ALWAYS (0x1 << 10)

........

0 0x00 WL1273_IS2_RATE_48K (0x0 << 12)

4096 0x1000 WL1273_IS2_RATE_44_1K (0x1 << 12)

8192 0x2000 WL1273_IS2_RATE_32K (0x2 << 12)

16384 0x4000 WL1273_IS2_RATE_22_05K (0x4 << 12) ?! No 0x3, 0x6-0x7, 0xb-0xe ?

20480 0x5000 WL1273_IS2_RATE_16K (0x5 << 12)

32768 0x8000 WL1273_IS2_RATE_12K (0x8 << 12)

36864 0x9000 WL1273_IS2_RATE_11_025 (0x9 << 12)

40960 0xa000 WL1273_IS2_RATE_8K (0xa << 12)

61440 0xf000 WL1273_IS2_RATE (0xf << 12) Mask

........

0 WL1273_I2S_DEF_MODE WL1273_IS2_WIDTH_32| WL1273_IS2_FORMAT_STD| WL1273_IS2_MASTER| WL1273_IS2_TRI_AFTER_SENDING|

WL1273_IS2_SDOWS_RR| WL1273_IS2_TRI_OPT| WL1273_IS2_RATE_48K

0x20 32 WL1273_POWER_SET FMC_FW_OPCODE_RX_POWER_SET_GET

0 WL1273_POWER_SET_OFF FMC_FW_RX_POWER_SET_FM_AND_RDS_OFF

! 0 just seems to mute output. RSSI still responds and all registers remain set.

bit0 0x01 WL1273_POWER_SET_FM FMC_FW_RX_POWER_SET_FM_ON_RDS_OFF

bit1 0x02 WL1273_POWER_SET_RDS ........

bit0|1 0x03 ........ FMC_FW_RX_POWER_SET_FM_AND_RDS_ON

bit4 0x10 WL1273_POWER_SET_RETENTION ........

0x21 33 WL1273_INTX_CONFIG_SET FMC_FW_OPCODE_CMN_INTX_CONFIG_SET_GET

0x22 34 WL1273_PULL_EN_SET FMC_FW_OPCODE_CMN_PULL_EN_SET_GET

? Set to 0xff = 255 ?

0x23 35 WL1273_HILO_SET FMC_FW_OPCODE_RX_HILO_SET_GET

0 0x0 FM_RX_IFFREQ_TO_HI_SIDE

1 0x1 FM_RX_IFFREQ_TO_LO_SIDE

2 0x2 FM_RX_IFFREQ_HILO_AUTOMATIC

Set to 1 = FM_RX_IFFREQ_TO_LO_SIDE

0x24 36 WL1273_SWITCH2FREF FMC_FW_OPCODE_CMN_SWITCH_2_FREF_SET

0x25 37 WL1273_FREQ_DRIFT_REPORT FMC_FW_OPCODE_CMN_FREQ_DRIFT_REPORT_SET TI fmc_fw_defs.h error defines as 0x24

0x28 40 WL1273_PCE_GET FMC_FW_OPCODE_CMN_PCE_GET

Set to 0x0f = 15

0x29 41 WL1273_FIRM_VER_GET FMC_FW_OPCODE_CMN_FIRM_VER_GET

Set to 2

0x2a 42 WL1273_ASIC_VER_GET FMC_FW_OPCODE_CMN_ASIC_VER_GET

Set to 2

0x2b 43 WL1273_ASIC_ID_GET FMC_FW_OPCODE_CMN_ASIC_ID_GET

Set to 0x1273 = 4723

0x2c 44 WL1273_MAN_ID_GET FMC_FW_OPCODE_CMN_MAN_ID_GET

Set to 0x17 = 23

0x2d 45 WL1273_TUNER_MODE_SET FMC_FW_OPCODE_RX_TUNER_MODE_SET

0 TUNER_MODE_STOP_SEARCH FMC_FW_RX_TUNER_MODE_STOP_SEARCH

1 TUNER_MODE_PRESET FMC_FW_RX_TUNER_MODE_PRESET_MODE

2 TUNER_MODE_AUTO_SEEK FMC_FW_RX_TUNER_MODE_AUTO_SEARCH_MODE (AUTONOMOUS)

3 TUNER_MODE_AF FMC_FW_RX_TUNER_MODE_ALTER_FREQ_JUMP

4 TUNER_MODE_AUTO_SEEK_PI ........

5 TUNER_MODE_AUTO_SEEK_BULK ........

0x2e 46 WL1273_STOP_SEARCH FMC_FW_OPCODE_RX_STOP_SEARCH

0x2f 47 WL1273_RDS_CNTRL_SET FMC_FW_OPCODE_RX_RDS_CNTRL_SET

1 FMC_FW_RX_RDS_FLUSH_FIFO

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Codes 48-51 (0x30-0x33) missing

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0x32 ? Set to 0xC000 = 49152

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0x34 52 WL1273_SOC_INT_TRIGGER

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Code 53 (0x35) missing

Code 54 (0x36) and up are mostly TX, except:

0x57 87 WL1273_RX_ANTENNA_SELECT ........

and the common/CMN values 100-102, 254, 255

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0x36 54 WL1273_TX_AUDIO_INPUT_LEVEL_RANGE_SET

0x37 55 WL1273_CHANL_SET FMC_FW_OPCODE_TX_CHANL_SET_GET

freq / 10Khz

7600 0x1db0 76000 WL1273_BAND_TX_LOW

10800 0x2a30 108000 WL1273_BAND_TX_HIGH

0x38 56 WL1273_SCAN_SPACING_SET FMC_FW_OPCODE_TX_CHANL_BW_SET_GET

1 WL1273_SPACING_50kHz FMC_FW_TX_CHANNEL_BW_50_KHZ

2 WL1273_SPACING_100kHz FMC_FW_TX_CHANNEL_BW_100_KHZ

4 WL1273_SPACING_200kHz FMC_FW_TX_CHANNEL_BW_200_KHZ

Set to 4 = 200 KHz

1 0x1 FM_CHANNEL_SPACING_50KHZ

2 0x2 FM_CHANNEL_SPACING_100KHZ

4 0x4 FM_CHANNEL_SPACING_200KHZ

0x39 57 WL1273_REF_SET ........

0x3a 58 WL1273_POWER_ATT_SET ........

0x3b 59 WL1273_POWER_LEV_SET FMC_FW_OPCODE_TX_POWER_LEVEL_SET_GET

Set to 4

/* Range for TX power level in units for dB/uV */ ! 122-pwr

#define FM_PWR_LVL_LOW	91

#define FM_PWR_LVL_HIGH	122

/* Chip specific default TX power level value */

#define FM_PWR_LVL_DEF	4

0x3c 60 WL1273_AUDIO_DEV_SET ........

0x109 = 265 ?

0x3d 61 WL1273_PILOT_DEV_SET ........

0x1b = 27

0x3e 62 WL1273_RDS_DEV_SET ........

8

0x3f 63 WL1273_AUDIO_IO_SET FMC_FW_OPCODE_TX_AUDIO_IO_SET

0 WL1273_AUDIO_IO_SET_ANALOG FMC_FW_TX_AUDIO_IO_SET_ANALOG

1 WL1273_AUDIO_IO_SET_I2S FMC_FW_TX_AUDIO_IO_SET_I2S

0x40 64 WL1273_PREMPH_SET FMC_FW_OPCODE_TX_PREMPH_SET_GET

0 FM_TX_PREEMPH_50US FM TX Pre-emphasis filter default ?

1 FM_TX_PREEMPH_OFF

2 FM_TX_PREEMPH_75US

0x41 65 TX_BAND_SET !!??

0x42 66 WL1273_MONO_SET FMC_FW_OPCODE_TX_MONO_SET_GET

0 WL1273_TX_MONO

1 WL1273_TX_STEREO

1 by default

0x43 67 WL1273_MPX_LMT_ENABLE

0x44 68 ........ FMC_FW_OPCODE_TX_PI_CODE_SET_GET

0x45 69 WL1273_ECC_SET FMC_FW_OPCODE_TX_RDS_ECC_SET_GET

0x46 70 WL1273_PTY FMC_FW_OPCODE_TX_RDS_PTY_CODE_SET_GET

0x47 71 WL1273_AF FMC_FW_OPCODE_TX_RDS_AF_SET_GET

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Code 72 (0x48) missing

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0x49 73 WL1273_TX_AUDIO_LEVEL_TEST_THRESHOLD ........

0x4a 74 WL1273_DISPLAY_MODE FMC_FW_OPCODE_TX_RDS_PS_DISPLAY_MODE_SET_GET

0 FMC_FW_TX_RDS_PS_DISPLAY_MODE_SCROLL_OFF

1 FMC_FW_TX_RDS_PS_DISPLAY_MODE_SCROLL_ON

0x4d 77 WL1273_RDS_REP_SET FMC_FW_OPCODE_TX_RDS_REPERTOIRE_SET_GET

0x4e 78 WL1273_TA_SET FMC_FW_OPCODE_TX_RDS_TA_SET

0x4f 79 WL1273_TP_SET FMC_FW_OPCODE_TX_RDS_TP_SET

0x50 80 WL1273_DI_SET FMC_FW_OPCODE_TX_RDS_DI_CODES_SET_GET

0x51 81 WL1273_MS_SET FMC_FW_OPCODE_TX_RDS_MUSIC_SPEECH_FLAG_SET_GET

0x52 82 WL1273_PS_SCROLL_SPEED FMC_FW_OPCODE_TX_RDS_PS_SCROLL_SPEED_SET_GET

0x53 83 WL1273_SOC_AUDIO_PATH_SET ........

0x54 84 WL1273_SOC_PCMI_OVERRIDE ........

0x55 85 WL1273_SOC_I2S_OVERRIDE ........

0x56 86 WL1273_I2C_DEV_ADDR_SET ........

default 0x22 = 34 (Nokia: #define RX71_FM_I2C_ADDR 0x22)

0x57 87 WL1273_RX_ANTENNA_SELECT ........

0x58 88 WL1273_REF_ERR_CALIB_PARAM_SET ........

0x0c = 12

0x59 89 WL1273_REF_ERR_CALIB_PERIODICITY_SET ........

0x5a 90 WL1273_POWER_ENB_SET FMC_FW_OPCODE_TX_POWER_ENB_SET

0 FMC_FW_TX_POWER_DISABLE

1 FMC_FW_TX_POWER_ENABLE

0x5b 91 WL1273_PUPD_SET FMC_FW_OPCODE_TX_POWER_UP_DOWN_SET

0 WL1273_PUPD_SET_OFF FMC_FW_TX_POWER_DOWN

bit0 1 WL1273_PUPD_SET_ON FMC_FW_TX_POWER_UP

bit4 0x10 WL1273_PUPD_SET_RETENTION ........

0x5c 92 WL1273_MUTE FMC_FW_OPCODE_TX_MUTE_MODE_SET_GET

0 FMC_FW_TX_UNMUTE

1 FMC_FW_TX_MUTE

0x5d 93 WL1273_PI_SET ........

0x5e 94 WL1273_RDS_DATA_ENB FMC_FW_OPCODE_TX_RDS_DATA_ENB_SET_GET

0 FMC_FW_TX_RDS_ENABLE_STOP

1 FMC_FW_TX_RDS_ENABLE_START

0x5f 95 WL1273_RSSI_BLOCK_SCAN_FREQ_SET ........

0x60 96 WL1273_TX_AUDIO_LEVEL_TEST ........

0x61 97 WL1273_RSSI_BLOCK_SCAN_START ........

0x62 98 WL1273_RDS_CONFIG_DATA_SET FMC_FW_OPCODE_TX_RDS_CONFIG_DATA_SET

0x63 99 WL1273_RDS_DATA_SET FMC_FW_OPCODE_TX_RDS_DATA_SET

0x64 100 WL1273_WRITE_HARDWARE_REG FMC_FW_OPCODE_CMN_HARDWARE_REG_SET_GET

0x65 101 WL1273_CODE_DOWNLOAD FMC_FW_OPCODE_CMN_CODE_DOWNLOAD

0x66 102 WL1273_RESET FMC_FW_OPCODE_CMN_RESET

0x0f00 = 3840

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Code 103 (0x67) missing

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0x68 104 WL1273_READ_FMANT_TUNE_VALUE ........ TX tuning capacitor value

?

/* FM TX antenna impedence values */

#define FM_TX_ANT_IMP_50	0

#define FM_TX_ANT_IMP_200	1

#define FM_TX_ANT_IMP_500	2

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Codes 105-253 (0x69-0xfd) missing

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0xfe 254 WL1273_FM_POWER_MODE ........

0 FMC_FW_RX_FM_POWER_MODE_DISABLE

1 FMC_FW_RX_FM_POWER_MODE_ENABLE

0xff 255 WL1273_FM_INTERRUPT ........

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?

5 WL1273_RSSI_BLOCK_SCAN_DATA_GET RSSI_BLOCK_SCAN_DATA_GET

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/*

Maximum length of data that may be sent in a single RDS data set command

Once FM FW team removes internal limitations, HCI limitations (much

longer) may apply.

In case a longer RDS data should be sent to the chip, it is divided into

multiple chunks, each chunk being up to FMC_FW_TX_MAX_RDS_DATA_SET_LEN

bytes long

*/

#define FMC_FW_TX_MAX_RDS_DATA_SET_LEN ((FMC_UINT)30)

/*

Defines the max length of data that can be written to FM Hardware register

*/

#define FMC_FW_WRITE_HARDWARE_REG_MAX_DATA_LEN ((FMC_UINT)HCI_CMD_PARM_LEN)

? HCI_CMD_PARM_LEN ?

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Event masks:

bit, 2 hex bytes, (1), (2)

0 0x0001 WL1273_FR_EVENT FMC_FW_MASK_FR Tuning Operation Ended

1 0x0002 WL1273_BL_EVENT FMC_FW_MASK_BL Band limit was reached during search

2 0x0004 WL1273_RDS_EVENT FMC_FW_MASK_RDS RDS data threshold reached in FIFO buffer

3 0x0008 WL1273_BBLK_EVENT FMC_FW_MASK_BBLK RDS B block match condition occurred

4 0x0010 WL1273_LSYNC_EVENT FMC_FW_MASK_LSYNC RDS sync was lost

5 0x0020 WL1273_LEV_EVENT FMC_FW_MASK_LEV RSSI level has fallen below the threshold configured by SEARCH_LVL_SET

6 0x0040 WL1273_IFFR_EVENT FMC_FW_MASK_IFFR Received signal frequency is out of range

7 0x0080 WL1273_PI_EVENT FMC_FW_MASK_PI RDS PI match occurred

8 0x0100 WL1273_PD_EVENT FMC_FW_MASK_PD Audio pause detect occurred

9 0x0200 WL1273_STIC_EVENT FMC_FW_MASK_STIC Stereo indication changed

10 0x0400 WL1273_MAL_EVENT FMC_FW_MASK_MAL Hardware malfunction

11 0x0800 WL1273_POW_ENB_EVENT FMC_FW_MASK_POW_ENB Tx Power Enable/Disable

12 0x1000 WL1273_SCAN_OVER_EVENT FMC_FW_MASK_INVALID_PARAM

13 0x2000 WL1273_ERROR_EVENT !! One of the above is wrong !!

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