[Desire General] th3:
I can write some brisk details now if you're sincerely curious but a) contrary to the masses and geeks, I dislike much talk/writ nor am I good at it b) I'm heavily time/attention constrained right now being on the move adjacently. I'll list some basic information:

1. The HTC Desire has more than 5 separate hardware components within it consuming power. Here's a typical dissection of a smartphone; note how many power consuming chips there are additional to the screen: http://www.chipworks.com/nexusone.aspx

The above isn't detailed enough for you to really see how many various ICs are working to make a smartphone. They did a full analysis with an iPhone 4 though so you can see better at the sheer number and size of chips running a smartphone: http://www.chipworks.com/iPhone-4-teardown.aspx

2. Back to the Desire which is very similar to the above in make-up and complexity. Of all of these hardware components, the Samsung OLED screen has the highest, screen-on, average power draw on the Desire (~70-95% of the total device).

3. The Qualcomm Snapdragon QSD8250 chipset (SoC) built on 65nm fabrication, ~60mm^2 die, is also one of these hardware components on this device. Just one.

4. This chipset also has many components to it: http://encoreppc.files.wordpress.com/2009/03/snapdragon.jpg

The Scorpion ARMv7 [edited mistake] based custom Core (application processor i.e. CPU) is only one of them at ~8.9mm^2, shown at the top center left in the above image. The Core itself is tiny, a block diagram of which is as follows: http://i.cmpnet.com/dspdesignline/2007/12/bdtifigure1.gif

Less than 1/6 of the chipset logic. Without cache that is even smaller, below 4mm^2. So the Core region is only one small part of the complete chipset and even smaller part of the whole device in terms of size and power.

5. The frequency change you make using any application only affects this Core portion of the whole chipset and device, and nothing else. Straight away you might conspicuously notice that the maximum gain by tweaking just the Core will be very little compared to what the full device uses of power.

i. DVFS - dynamic voltage frequency scaling - is used to control and maximize power efficiency of this Scorpion Core by default. For each frequency band, there will be an undisclosed voltage set that initiates at the same time. The two work together. DVFS sets frequency/voltage states according to Core load. Voltage (Vdd) is the biggest power enemy and determinant of the Core. It is currently unknown but extremely unlikely that manually forcing a medium-high Core load state to a lower frequency will influence the voltage associated with that Core load. The voltage most likely will stay high as programmed by default, and so the power saved by just dropping the frequency 200-500MHz will be negligible if any. Immeasurable. Capacitance, temperature and voltage^2 are the biggest parameters determining SLP chip power, neither of which you are controlling. Specifically supply voltage is the key, which sub-threshold, reverse bias junction, gate and gate induced drain leakage are very sensitive to. You can find more details on these here:

http://www.synopsys.com/Community/UniversityProgram/CapsuleModule/SoCPowerManagement.pdf

http://venus.ece.ndsu.nodak.edu/~cris/ece470/papers/u_ARM.pdf

ii. I've logged the CPU section power draw and load according to various usages cross-checked between apps like Show CPU usage, Power Tutor, OS Monitor and System intensively. I encourage you to do so too. In PT, you can read the full breakdown in its logging feature as well as frequency at each second and what exactly is using the CPU. In my tests on various ROMs it portrays very clearly that the Core is at 245MHz when you expect it to be in idle, and even under low loads upto around 20-25%. Hence I am not sure what you can even theoretically achieve by setting the same frequency manually ? :P

iii. If your CPU is indeed idle as it should be when you expect it to be, forcing to the low clocks won't help power draw as by default, the Scorpion Core would already be at the lowest frequency/voltage (hence power) band on its own, as explained above. If you want me to explain DVFS workings, just ask.

iv. If however your CPU is not idle as it should be when you expect it to be, and the clocks are fluctuating heavily... then you have another problem elsewhere. Forcing to low clocks will help cut power draw very minimally but it won't resolve the problem causing the fluctuations in the first place and the associated large power increase by voltage/current ramping. In system idle, this is not the normal intended functioning nor behavior (>360MHz).

v. If your CPU is under a consistent medium to heavy load and you wish to save energy, then setting to low clocks will reduce power draw but by a very negligible (sub-0.00xW) when you cannot adjust the various voltages. On the other hand, it will always drastically lower performance.

vi. If your screen is off, and lockscreen enabled, setting any frequency will not have any advantage as the CPU clocks are already shut-off in that state - SRPG mode i.e. clock gated. The CPU clock generation and PLL circuitry in this state has 0 power use already. You can see more details on these workings here:

http://cache.freescale.com/files/dsp/doc/app_note/AN4051.pdf

vii. Hence forcing to lower clocks will not help battery life except in very few, specific, circumstances, and even then, at very small amounts, and, it also implicitly lowers overall performance.

6. No matter what you can do to the Core section in terms of frequency;

i. You won't gain anything more than negligible battery life in best case, high load scenarios (screen on consumes +70%). See for instance thse two research studies:

http://www.usenix.org/events/atc10/tech/full_papers/Carroll.pdf

http://www.cs.ucsb.edu/~xun/papers/reuse-igcc10.pdf

ii. The Snapdragon chipset is very low power to begin with (approx 0.350W loaded, 0.0014W standby) and the frequency you are changing is only of a small component within it - of the Scorpion Core. Other components on this chipset have higher power requirements. Even if you lower the Core frequency, you will not change the vast amount of Core power as there are more than 10 voltage rails on this CPU being powered. The vast majority of static and dynamic Core power is consumed by Core Vcc, Vddgp, Vdda, IO and PLLs on independent voltage planes. There is at minimum a STOP mode for the Core in standby, the LFM (low frequency mode) at ~0.85-0.95v and a HFM (high frequency mode) at ~1.10-1.25v. In standby, the isolated Core power is approx 0.0003W.

7. The maximum mWs you might gain if you keep the CPU in a medium to heavy loaded state forced to the lowest frequency over a full discharge can easily be outdone by 10-20 minutes of screen-off.

8. Any hardware polling and tweaking application (like SetCPU) will itself increase CPU-sys and CPU-usr load, hence increase system power draw.

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- Sent via my HTC Desire -