[Nexus One Android Development] FeraVolt:
Hey Dev! Make those Snapdragons fly!

A little into:

Hello Nexus One brotha's) I'm Fera, ROM/Kernel developer from neighbour SonyXperia X10 forum. I'm 20 years old hungry student, studying electronic engineering in Istanbul. I develop android stuff for 2 years. Why I write here? Because I'd like to help you and share a bit of my experience with you guys. Open Source rules! :highfive: Since my and your device have similar boards (qsd8k), the hacks listed here have to work despite different kernel versions things are pretty same on both devices. My kernel development is HERE. Now..enough for drama, have good music, tighten your belts, sit back and relax - we're going to fly at the speed of light :D..

Hack:

Ok. It's quite simple actually.

Overclocking GPU core itself is not possible at this moment but we can overclock it's bus.

In kernel sources we have acpuclock-8x50.c file. Inside it he will see actual CPU freq. table and misc hw stuff.

Default freq. table for qsd8k is:

{ 0, 19200, ACPU_PLL_TCXO, 0, 0, 0, 0, 14000, 0, 0, 1000},
{ 0, 128000, ACPU_PLL_1, 1, 5, 0, 0, 14000, 2, 0, 1000},
{ 1, 245760, ACPU_PLL_0, 4, 0, 0, 0, 29000, 0, 0, 1000},
{ 1, 384000, ACPU_PLL_3, 0, 0, 0, 0, 58000, 1, 0xA, 1000},
{ 0, 422400, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xB, 1000},
{ 0, 460800, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xC, 1000},
{ 0, 499200, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xD, 1025},
{ 0, 537600, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xE, 1050},
{ 1, 576000, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xF, 1050},
{ 0, 614400, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x10, 1075},
{ 0, 652800, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x11, 1100},
{ 0, 691200, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x12, 1125},
{ 0, 729600, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x13, 1150},
{ 1, 768000, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x14, 1150},
{ 0, 806400, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x15, 1175},
{ 0, 844800, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x16, 1200},
{ 0, 883200, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x17, 1225},
{ 0, 921600, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x18, 1275},
{ 0, 960000, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x19, 1275},
{ 1, 998400, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x1A, 1300},
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},

Little theory lesson:

1/0 - means that this clk ladder is enabled/disabled

998400 - Actual ladder freq. in Khz

ACPU_PLL_3, 0, 0, 0, 0 - AXI/PLL macros, adresses

128000 - AXI freq. in Khz

0/1/2 - Init adresses

0x1A - Step raw code for CPU

1300 - Voltage of freq. step in mV

So what to do. We see that we have 128000 freq. set as 0 (disabled) for global access and reserved for PLL_1 which is adressed to 2. May sound childish, but this actually means that this line is used for Adreno200 clock. We simply change it to 192000Khz. Overclocking to higher values makes devices unstable.

The ready line will be look as:

{ 0, 192000, ACPU_PLL_1, 1, 5, 0, 0, 14000, 2, 0, 1000 },

But it's not all. Now we have to update AXI frequencies.. How do we do that. Search for this function in same file:

unsigned long clk_get_max_axi_khz(void)
{
return 128000;
}
EXPORT_SYMBOL(clk_get_max_axi_khz);

and set it to

192000

.

Now we have to update all CPU freq table with overclocked axi bus values which could be stable.. At this point I spent monthes of testing and finally came up to stable things. I will just paste here my table which also includes CPU undervolt.

Here it is:

{ 0, 19200, ACPU_PLL_TCXO, 0, 0, 0, 0, 14000, 0, 0, 975 },
{ 0, 192000, ACPU_PLL_1, 1, 5, 0, 0, 14000, 2, 0, 975 },
{ 1, 245760, ACPU_PLL_0, 4, 0, 0, 0, 29000, 0, 0, 975 },
{ 1, 384000, ACPU_PLL_3, 0, 0, 0, 0, 58000, 1, 0xA, 975 },
{ 0, 422400, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xB, 975 },
{ 0, 460800, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xC, 975 },
{ 0, 499200, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xD, 975 },
{ 0, 537600, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xE, 975 },
{ 1, 576000, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0xF, 1000 },
{ 0, 614400, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x10, 1025 },
{ 0, 652800, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x11, 1050 },
{ 0, 691200, ACPU_PLL_3, 0, 0, 0, 0, 117000, 1, 0x12, 1075 },
{ 0, 729600, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x13, 1075 },
{ 1, 768000, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x14, 1100 },
{ 0, 806400, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x15, 1175 },
{ 0, 844800, ACPU_PLL_3, 0, 0, 0, 0, 128000, 1, 0x16, 1200 },
{ 0, 883200, ACPU_PLL_3, 0, 0, 0, 0, 160000, 1, 0x17, 1225 },
{ 0, 921600, ACPU_PLL_3, 0, 0, 0, 0, 160000, 1, 0x18, 1275 },
{ 0, 960000, ACPU_PLL_3, 0, 0, 0, 0, 160000, 1, 0x19, 1275 },
{ 1, 998400, ACPU_PLL_3, 0, 0, 0, 0, 160000, 1, 0x1A, 1275 },
{ 0, 1036800, ACPU_PLL_3, 0, 0, 0, 0, 160000, 1, 0x1B, 1300 },
{ 0, 1075200, ACPU_PLL_3, 0, 0, 0, 0, 192000, 1, 0x1C, 1325 },
{ 1, 1113600, ACPU_PLL_3, 0, 0, 0, 0, 192000, 1, 0x1D, 1325 },
{ 0, 1152000, ACPU_PLL_3, 0, 0, 0, 0, 192000, 1, 0x1E, 1325 },
{ 1, 1190400, ACPU_PLL_3, 0, 0, 0, 0, 192000, 1, 0x1F, 1350 },
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },

This is how my table looks after GPU/CPU overclock/undervolt and hard testings. I find theese values solid stable and best at performance. As you may notice, overclocked axi frequency is enabled on higher CPU clock steps. This means that proper axi overclock will be enabled when CPU runs on 1113Mhz and higher, so to enable all this things you have to use overclocked CPU table.

Now open your board-****.c file.

If you use old KGSL drivers, search for struct kgsl_platform_data kgsl_pdata function. In function structure you will see this:

.high_axi_3d = 128000,

Set value to

192000

.

If you use new KGSL drivers then search for struct kgsl_device_platform_data kgsl_3d0_pdata. You will see:

.pwrlevel = {
{
.gpu_freq = 0,
.bus_freq = 128000000,
},

Set value to

192000000

In the end we have undervolted and overclocked (1.2Ghz) CPU and overclocked GPU. Saying again..Overclocking bus higher than 192Khz is realy bad idea..

When you're done, build your kernel with enabled debugging (CONFIG_DEBUG_KERNEL=y) and then add this script to mount debug sysfs dir. in init.d or anywhere else on auostart:

#!/system/bin/sh
### FeraLab ###
mount -t debugfs debugfs /sys/kernel/debug
echo 0 > /sys/kernel/debug/msm_fb/0/vsync_enable

When system runs check out /sys/kernel/debug/clk_rate folder (If you can't see this folder the your init.d support is not working properly..put script somewhere else). You will have to see reports:

gp_clk - 192000000

grp_3d_clk - 256000000

imem_clk - 256000000

Bingo! :silly:

If you like this - feed me :D