[G1 Android Development] uwonsum:
Your response seems fair and well thought out. The theory that because you have to switch state from a lower frequency to higher frequency or vice versa is not as efficient is flawed in many ways. First of all, we are dealing with minute fraction of a second. In essence, you are saying dynamic scaling is not as efficient compared to using a single state. If this were the case, this architecture would not be implemented on every major device out there today especially mobile devices.

Now, to understand why using 528/528 is not the best approach to saving power, you have to understand how Dynamic frequency scaling and Dynamic voltage scaling works, and also that they work in conjunction with one another. Setting this device to only use 528MHz means you are disabling the ability for it to dynamic scale the voltage--this will generate more heat and hence use more power regardless of the amount of instructions being executed by the CPU. If you don't believe me, test it out on your computer. Disable dynamic throttling, leave the system idle, and watch your temperature rise. Those of us who over-clock our systems know this to be fact. Heat is energy transfered :)

If this device is set to 384/384 vs 128/528 (with powersave_bias), You are still able to get the best (better) performance with less power usage with the lather. One, not every instruction requires 384MHz, I can play music just fine with 128MHz. Second, there are instructions that can also be executed at 245MHZ. And third, Idle voltage of 384MHz is higher than that of 128MHz.

So yes, I did considered the fact that usage may differ from device to device.

The good out of this is that we will now have more options--thanks again Cyanogen.

Thanks

Further readings if you still doubt: Power

The switching power dissipated by a chip using static CMOS gates is C·V2·f, where C is the capacitance being switched per clock cycle, V is voltage, and f is the switching frequency,[1] so this part of the power consumption decreases quadratically with voltage. The formula is not exact however, as many modern chips are not implemented using 100% CMOS, but also uses pseudo nMOS gates, domino logic etc. Moreover, there is also a static leakage current, which has become more and more accentuated as feature sizes have become smaller (below 90 nanometres) and threshold levels lower.

Accordingly, dynamic voltage scaling is widely used as part of strategies to manage switching power consumption in battery powered devices such as cell phones and laptop computers. Low voltage modes are used in conjunction with lowered clock frequencies to minimize power consumption associated with components such as CPUs and DSPs; only when significant computational power is needed will the voltage and frequency be raised.

Some peripherals also support low voltage operational modes. For example, low power MMC and SD cards can run at 1.8V as well as at 3.3V, and driver stacks may conserve power by switching to the lower voltage after detecting a card which supports it.

When leakage current is a significant factor in terms of power consumption, chips are often designed so that portions of them can be powered completely off. This is not usually viewed as being dynamic voltage scaling, because it is not transparent to software. When sections of chips can be turned off, as for example on TI OMAP3 processors, drivers and other support software need to support that.