[Miscellaneous Android Development] blahmartinblah:
For comparison, I kept rebooting my phone with the verbose kernel until the SD card worked. No hardware changes - same SD card, same phone. It took 15 reboots for it to work, I kept a count as I captured all of them. Here is the dmesg for the boot cycle where the card was operating:

[ 0.600838] mmc1: no vqmmc regulator found
[ 0.600849] mmc1: no vmmc regulator found
[ 0.601115] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 0 curr_io_level 0
[ 0.601139] mmc1: Received IRQ(253), status=0x2
[ 0.602835] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.602851] mmc1: sdhci_msm_check_power_status: request 2 done
[ 0.613935] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.624983] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 0.624988] mmc1: sdhci_msm_check_power_status: request 8 done
[ 0.630518] mmc1: SDHCI controller on 7864900.sdhci [7864900.sdhci] using 32-bit ADMA
[ 0.680204] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.680211] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 8
[ 0.680226] mmc1: Received IRQ(253), status=0x1
[ 0.680848] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.680866] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.680874] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 4
[ 0.680882] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.680895] mmc1: request to disable clocks
[ 0.684683] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 0.684692] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 1 curr_io_level 4
[ 0.684705] mmc1: Received IRQ(253), status=0x2
[ 0.686433] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.686453] mmc1: sdhci_msm_check_power_status: request 2 done
[ 0.696816] mmc1: request to enable clocks
[ 0.696882] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.707634] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 0.707641] mmc1: sdhci_msm_check_power_status: request 8 done
[ 0.714153] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.716358] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.720213] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.720262] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.722455] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.746004] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:2 ctrl_2:0x0
[ 0.746044] mmc1: sdhci_msm_set_clock: setting clk rate to 50000000
[ 0.747619] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 0.747694] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 0.747710] mmc1: new high speed SDHC card at address aaaa
[ 0.747992] mmcblk1: mmc1:aaaa SL32G 29.7 GiB
[ 0.750492] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:0 ctrl_2:0x0
[ 0.750500] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 8
[ 0.750522] mmc1: Received IRQ(253), status=0x1
[ 0.751137] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.751154] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.751162] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 4
[ 0.751167] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.751173] mmc1: request to disable clocks
[ 2.310972] mmc1: Starting deferred resume
[ 2.312606] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 2.312619] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 1 curr_io_level 4
[ 2.312647] mmc1: Received IRQ(253), status=0x2
[ 2.314484] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 2.314509] mmc1: sdhci_msm_check_power_status: request 2 done
[ 2.325568] mmc1: request to enable clocks
[ 2.325584] mmc1: sdhci_msm_set_clock: setting clk rate to 400000
[ 2.327272] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 2.338376] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 2.338386] mmc1: sdhci_msm_check_power_status: request 8 done
[ 2.343951] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 2.346198] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 2.364377] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:2 ctrl_2:0x0
[ 2.364416] mmc1: sdhci_msm_set_clock: setting clk rate to 50000000
[ 2.366119] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 2.366209] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 2.366259] mmc1: Deferred resume completed
[ 2.567565] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 2.567576] mmc1: request to disable clocks
[ 12.397654] mmc1: request to enable clocks
[ 12.400080] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 12.400116] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 12.400230] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:0 ctrl_2:0x0
[ 12.400240] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 8
[ 12.400266] mmc1: Received IRQ(253), status=0x1
[ 12.401028] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 12.401117] mmc1: sdhci_msm_check_power_status: request 1 done
[ 12.401131] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 4
[ 12.401137] mmc1: sdhci_msm_check_power_status: request 1 done
[ 12.401143] mmc1: request to disable clocks
[ 63.728564] mmc1: Starting deferred resume
[ 63.730739] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 63.730755] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 1 curr_io_level 4
[ 63.730785] mmc1: Received IRQ(253), status=0x2
[ 63.733046] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 63.733072] mmc1: sdhci_msm_check_power_status: request 2 done
[ 63.743914] mmc1: request to enable clocks
[ 63.743929] mmc1: sdhci_msm_set_clock: setting clk rate to 400000
[ 63.745644] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 63.756084] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 63.756096] mmc1: sdhci_msm_check_power_status: request 8 done
[ 63.761864] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 63.764173] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 63.784007] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:2 ctrl_2:0x0
[ 63.784064] mmc1: sdhci_msm_set_clock: setting clk rate to 50000000
[ 63.786206] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 63.786286] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 63.786301] mmc1: Deferred resume completed
[ 65.447590] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 65.447606] mmc1: request to disable clocks
[ 66.693767] mmc1: request to enable clocks
[ 66.696350] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 66.696372] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 66.914050] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 66.914064] mmc1: request to disable clocks
[ 72.098164] mmc1: request to enable clocks
[ 72.100354] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 72.100379] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 72.317828] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 72.317843] mmc1: request to disable clocks
[ 76.535436] mmc1: request to enable clocks
[ 76.537346] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 76.537372] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 76.757620] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 76.757637] mmc1: request to disable clocks
[ 83.175218] mmc1: request to enable clocks
[ 83.178216] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 83.178242] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 83.377588] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 83.377604] mmc1: request to disable clocks