[Miscellaneous Android Development] siljaer:
Yes, it's inconsistent: mine is detected as UHS, [MENTION=722204]blahmartinblah[/MENTION] as HS, yet clock settings are the same. My doubts are:

- is every card capable of both DDR50 and SDR104?

- is SDR104 supported in trunk's CM13 kernel? (possibly no)

- why is my log showing to try 100000000 clock frequency (BTW, shouldn't it be 104000000?) while [MENTION=722204]blahmartinblah[/MENTION]'s log doesn't?

- why fallback to HS mode works once in a dozen times?

---------- Post added at 17:13 ---------- Previous post was at 16:58 ----------[/SIZE

oh, I was forgetting: mine for reference:

[ 0.600964] mmc1: no vqmmc regulator found
[ 0.600976] mmc1: no vmmc regulator found
[ 0.601274] mmc1: clock 0Hz busmode 1 powermode 1 cs 0 Vdd 18 width 0 timing 0
[ 0.601283] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 0 curr_io_level 0
[ 0.601309] mmc1: Received IRQ(253), status=0x2
[ 0.603006] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.603024] mmc1: sdhci_msm_check_power_status: request 2 done
[ 0.614051] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 0.614117] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.625164] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 0.625170] mmc1: sdhci_msm_check_power_status: request 8 done
[ 0.630701] mmc1: SDHCI controller on 7864900.sdhci [7864900.sdhci] using 32-bit ADMA
[ 0.683605] mmc1: clock 0Hz busmode 1 powermode 0 cs 0 Vdd 0 width 0 timing 0
[ 0.683625] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.683632] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 8
[ 0.683646] mmc1: Received IRQ(253), status=0x1
[ 0.684255] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.684273] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.684281] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 4
[ 0.684290] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.684302] mmc1: request to disable clocks
[ 0.686689] mmc1: clock 0Hz busmode 1 powermode 1 cs 0 Vdd 18 width 0 timing 0
[ 0.688021] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 0.688029] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 1 curr_io_level 4
[ 0.688043] mmc1: Received IRQ(253), status=0x2
[ 0.689783] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.689801] mmc1: sdhci_msm_check_power_status: request 2 done
[ 0.700577] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 0.700585] mmc1: request to enable clocks
[ 0.700649] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.711429] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 0.711436] mmc1: sdhci_msm_check_power_status: request 8 done
[ 0.717914] mmc1: clock 400000Hz busmode 1 powermode 2 cs 1 Vdd 18 width 0 timing 0
[ 0.717931] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.720129] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 0.720146] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.721967] mmc1: req failed (CMD5): -110, retrying...
[ 0.722442] mmc1: req failed (CMD5): -110, retrying...
[ 0.722914] mmc1: req failed (CMD5): -110, retrying...
[ 0.723998] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 17 width 0 timing 0
[ 0.724016] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.724057] mmc1: clock 400000Hz busmode 1 powermode 2 cs 1 Vdd 17 width 0 timing 0
[ 0.724074] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.726336] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 17 width 0 timing 0
[ 0.726354] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.752147] mmc1: clock 0Hz busmode 1 powermode 2 cs 0 Vdd 17 width 0 timing 0
[ 0.752167] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.752186] mmc1: sdhci_msm_check_power_status: request 4 curr_pwr_state 2 curr_io_level 8
[ 0.752201] mmc1: Received IRQ(253), status=0x4
[ 0.752371] mmc1: Handled IRQ(253), ret=0, ack=0x4
[ 0.752391] mmc1: sdhci_msm_check_power_status: request 4 done
[ 0.762736] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 17 width 0 timing 0
[ 0.762808] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x8
[ 0.772733] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 17 width 2 timing 0
[ 0.772755] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x8
[ 0.775462] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 17 width 2 timing 7
[ 0.775479] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:7 ctrl_2:0xc
[ 0.775612] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 17 width 2 timing 7
[ 0.775620] mmc1: sdhci_msm_set_clock: setting clk rate to 100000000
[ 0.777217] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:7 ctrl_2:0xc
[ 0.777245] mmc1: new ultra high speed DDR50 SDHC card at address aaaa
[ 0.777545] mmcblk1: mmc1:aaaa SL16G 14.8 GiB
[ 0.789926] mmc1: clk scaling enabled
[ 0.789970] mmc1: clock 0Hz busmode 1 powermode 0 cs 0 Vdd 0 width 0 timing 0
[ 0.789982] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:0 ctrl_2:0x8
[ 0.789989] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 4
[ 0.790005] mmc1: Received IRQ(253), status=0x9
[ 0.790502] mmc1: Handled IRQ(253), ret=0, ack=0x5
[ 0.790520] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.790528] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 8
[ 0.790533] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.790539] mmc1: request to disable clocks
[ 0.987663] mmc1: frequency set to 0 in disable function, this means the clock is already disabled.
[ 2.248253] mmc1: Starting deferred resume
[ 2.248298] mmc1: clock 0Hz busmode 1 powermode 1 cs 0 Vdd 18 width 0 timing 0
[ 2.250077] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 2.250090] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 1 curr_io_level 8
[ 2.250113] mmc1: Received IRQ(253), status=0x2
[ 2.251951] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 2.251981] mmc1: sdhci_msm_check_power_status: request 2 done
[ 2.263062] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 2.263084] mmc1: request to enable clocks
[ 2.263095] mmc1: sdhci_msm_set_clock: setting clk rate to 400000
[ 2.264834] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 2.275946] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 2.275957] mmc1: sdhci_msm_check_power_status: request 8 done
[ 2.281501] mmc1: clock 400000Hz busmode 1 powermode 2 cs 1 Vdd 18 width 0 timing 0
[ 2.281527] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 2.283739] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 2.283764] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 2.315252] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 2
[ 2.315277] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:2 ctrl_2:0x0
[ 2.315320] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 2
[ 2.315329] mmc1: sdhci_msm_set_clock: setting clk rate to 50000000
[ 2.316968] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 2.317057] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 2.317071] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 2.317086] mmc1: clk scaling enabled
[ 2.317090] mmc1: Deferred resume completed
[ 2.517625] mmc1: clock 0Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 2.517647] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 2.517655] mmc1: request to disable clocks
[ 2.519180] mmc1: gated MCI clock
[ 9.740049] msm_camera_config_single_vreg : can't find sub reg name<7>[ 12.337729] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 12.337745] mmc1: request to enable clocks
[ 12.339289] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 12.339316] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 12.339335] mmc1: ungated MCI clock
[ 12.339377] mmc1: clock 0Hz busmode 1 powermode 0 cs 0 Vdd 0 width 0 timing 0
[ 12.339390] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:0 ctrl_2:0x0
[ 12.339398] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 8
[ 12.339426] mmc1: Received IRQ(253), status=0x1
[ 12.340173] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 12.340201] mmc1: sdhci_msm_check_power_status: request 1 done
[ 12.340212] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 4
[ 12.340217] mmc1: sdhci_msm_check_power_status: request 1 done
[ 12.340223] mmc1: request to disable clocks
[ 12.537661] mmc1: frequency set to 0 in disable function, this means the clock is already disabled.