[Miscellaneous Android Development] blahmartinblah:
Hi ottmi, thanks for not giving up :)

Boot 1, the 16Gb Sandisk Ultra UHS Class 1 SD card mounted! See log:

[ 0.675733] mmc1: clock 0Hz busmode 1 powermode 0 cs 0 Vdd 0 width 0 timing 0
[ 0.675752] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.675759] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 8
[ 0.675775] mmc1: Received IRQ(253), status=0x1
[ 0.676386] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.676405] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.676413] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 4
[ 0.676422] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.676434] mmc1: request to disable clocks
[ 0.678804] mmc1: clock 0Hz busmode 1 powermode 1 cs 0 Vdd 18 width 0 timing 0
[ 0.680106] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 0.680113] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 1 curr_io_level 4
[ 0.680130] mmc1: Received IRQ(253), status=0x2
[ 0.681877] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.681894] mmc1: sdhci_msm_check_power_status: request 2 done
[ 0.692333] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 0.692341] mmc1: request to enable clocks
[ 0.692409] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.703301] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 0.703308] mmc1: sdhci_msm_check_power_status: request 8 done
[ 0.709808] mmc1: clock 400000Hz busmode 1 powermode 2 cs 1 Vdd 18 width 0 timing 0
[ 0.709826] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.712022] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 0.712039] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.713862] mmc1: req failed (CMD5): -110, retrying...
[ 0.714337] mmc1: req failed (CMD5): -110, retrying...
[ 0.714811] mmc1: req failed (CMD5): -110, retrying...
[ 0.715907] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 17 width 0 timing 0
[ 0.715924] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.715961] mmc1: mmc_sd_init_card
[ 0.715968] mmc1: clock 400000Hz busmode 1 powermode 2 cs 1 Vdd 17 width 0 timing 0
[ 0.715983] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.718198] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 17 width 0 timing 0
[ 0.718213] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.743921] mmc1-sd: CID 00000000: 53 44 53 03 47 36 31 55 e5 96 a1 80 00 ca 00 cb SDS.G61U........
[ 0.744785] mmc1-sd: CSD 00000000: 32 00 0e 40 00 00 59 5b 80 7f b2 76 00 40 40 0a 2..@..Y[...v.@@.
[ 0.757547] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 17 width 0 timing 2
[ 0.757569] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:2 ctrl_2:0x0
[ 0.757611] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 17 width 0 timing 2
[ 0.757619] mmc1: sdhci_msm_set_clock: setting clk rate to 50000000
[ 0.759506] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 0.759603] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 17 width 2 timing 2
[ 0.759616] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 0.759632] mmc1: new high speed SDHC card at address e624
[ 0.759962] mmcblk1: mmc1:e624 SU16G 14.8 GiB
[ 0.769239] mmc1: clk scaling enabled
[ 0.769287] mmc1: clock 0Hz busmode 1 powermode 0 cs 0 Vdd 0 width 0 timing 0
[ 0.769301] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:0 ctrl_2:0x0
[ 0.769308] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 8
[ 0.769326] mmc1: Received IRQ(253), status=0x1
[ 0.769934] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.769952] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.769961] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 4
[ 0.769967] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.769973] mmc1: request to disable clocks
[ 0.965318] mmc1: frequency set to 0 in disable function, this means the clock is already disabled.
[ 2.366701] mmc1: Starting deferred resume
[ 2.366722] mmc1: clock 0Hz busmode 1 powermode 1 cs 0 Vdd 18 width 0 timing 0
[ 2.368366] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 2.368378] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 1 curr_io_level 4
[ 2.368409] mmc1: Received IRQ(253), status=0x2
[ 2.370243] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 2.370268] mmc1: sdhci_msm_check_power_status: request 2 done
[ 2.381315] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 2.381330] mmc1: request to enable clocks
[ 2.381340] mmc1: sdhci_msm_set_clock: setting clk rate to 400000
[ 2.383050] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 2.394153] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 2.394186] mmc1: sdhci_msm_check_power_status: request 8 done
[ 2.399736] mmc1: mmc_sd_init_card
[ 2.399750] mmc1: clock 400000Hz busmode 1 powermode 2 cs 1 Vdd 18 width 0 timing 0
[ 2.399775] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 2.401994] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 2.402017] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 2.427822] mmc1-sd: CID 00000000: 53 44 53 03 47 36 31 55 e5 96 a1 80 00 ca 00 cb SDS.G61U........
[ 2.428153] mmc1-sd: CSD 00000000: 32 00 0e 40 00 00 59 5b 80 7f b2 76 00 40 40 0a 2..@..Y[...v.@@.
[ 2.434040] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 2
[ 2.434067] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:2 ctrl_2:0x0
[ 2.434108] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 2
[ 2.434117] mmc1: sdhci_msm_set_clock: setting clk rate to 50000000
[ 2.435744] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 2.435824] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 2.435837] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 2.435851] mmc1: clk scaling enabled
[ 2.435855] mmc1: Deferred resume completed
[ 2.635372] mmc1: clock 0Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 2.635392] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 2.635400] mmc1: request to disable clocks
[ 2.637027] mmc1: gated MCI clock
[ 12.465395] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 12.465419] mmc1: request to enable clocks
[ 12.467177] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 12.467201] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 12.467219] mmc1: ungated MCI clock
[ 12.467253] mmc1: clock 0Hz busmode 1 powermode 0 cs 0 Vdd 0 width 0 timing 0
[ 12.467267] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:0 ctrl_2:0x0
[ 12.467275] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 8
[ 12.467302] mmc1: Received IRQ(253), status=0x1
[ 12.468039] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 12.468064] mmc1: sdhci_msm_check_power_status: request 1 done
[ 12.468075] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 4
[ 12.468081] mmc1: sdhci_msm_check_power_status: request 1 done
[ 12.468089] mmc1: request to disable clocks
[ 12.665349] mmc1: frequency set to 0 in disable function, this means the clock is already disabled.
[ 29.600554] mmc1: Starting deferred resume
[ 29.600574] mmc1: clock 0Hz busmode 1 powermode 1 cs 0 Vdd 18 width 0 timing 0
[ 29.602047] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 29.602061] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 1 curr_io_level 4
[ 29.602091] mmc1: Received IRQ(253), status=0x2
[ 29.603969] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 29.604779] mmc1: sdhci_msm_check_power_status: request 2 done
[ 29.615833] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 29.615849] mmc1: request to enable clocks
[ 29.615861] mmc1: sdhci_msm_set_clock: setting clk rate to 400000
[ 29.617427] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 29.628608] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 29.628621] mmc1: sdhci_msm_check_power_status: request 8 done
[ 29.634171] mmc1: mmc_sd_init_card
[ 29.634189] mmc1: clock 400000Hz busmode 1 powermode 2 cs 1 Vdd 18 width 0 timing 0
[ 29.634213] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 29.636447] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 29.636473] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 29.663178] mmc1-sd: CID 00000000: 53 44 53 03 47 36 31 55 e5 96 a1 80 00 ca 00 cb SDS.G61U........
[ 29.663518] mmc1-sd: CSD 00000000: 32 00 0e 40 00 00 59 5b 80 7f b2 76 00 40 40 0a 2..@..Y[...v.@@.
[ 29.670048] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 2
[ 29.670074] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:2 ctrl_2:0x0
[ 29.670115] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 2
[ 29.670124] mmc1: sdhci_msm_set_clock: setting clk rate to 50000000
[ 29.671820] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 29.671905] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 29.671920] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 29.671934] mmc1: clk scaling enabled
[ 29.671938] mmc1: Deferred resume completed
[ 30.355488] mmc1: clock 0Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 30.355510] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 30.355518] mmc1: request to disable clocks
[ 30.358637] mmc1: gated MCI clock
[ 33.175969] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 33.175992] mmc1: request to enable clocks
[ 33.188767] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 33.188798] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 33.188820] mmc1: ungated MCI clock
[ 33.395384] mmc1: clock 0Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 33.395417] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 33.395426] mmc1: request to disable clocks
[ 33.397372] mmc1: gated MCI clock
[ 43.225947] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 43.225963] mmc1: request to enable clocks
[ 43.227904] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 43.227929] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 43.227946] mmc1: ungated MCI clock
[ 43.227989] mmc1: clock 0Hz busmode 1 powermode 0 cs 0 Vdd 0 width 0 timing 0
[ 43.228003] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:0 ctrl_2:0x0
[ 43.228010] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 8
[ 43.228037] mmc1: Received IRQ(253), status=0x1
[ 43.228759] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 43.228780] mmc1: sdhci_msm_check_power_status: request 1 done
[ 43.228789] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 4
[ 43.228795] mmc1: sdhci_msm_check_power_status: request 1 done
[ 43.228801] mmc1: request to disable clocks
[ 43.425414] mmc1: frequency set to 0 in disable function, this means the clock is already disabled.
[ 45.897067] mmc1: Starting deferred resume
[ 45.897086] mmc1: clock 0Hz busmode 1 powermode 1 cs 0 Vdd 18 width 0 timing 0
[ 45.898848] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 45.898864] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 1 curr_io_level 4
[ 45.898893] mmc1: Received IRQ(253), status=0x2
[ 45.900768] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 45.900797] mmc1: sdhci_msm_check_power_status: request 2 done
[ 45.912015] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 45.912034] mmc1: request to enable clocks
[ 45.912046] mmc1: sdhci_msm_set_clock: setting clk rate to 400000
[ 45.914360] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 45.925483] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 45.925497] mmc1: sdhci_msm_check_power_status: request 8 done
[ 45.931354] mmc1: mmc_sd_init_card
[ 45.931371] mmc1: clock 400000Hz busmode 1 powermode 2 cs 1 Vdd 18 width 0 timing 0
[ 45.931399] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 45.933638] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 45.933666] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 45.963769] mmc1-sd: CID 00000000: 53 44 53 03 47 36 31 55 e5 96 a1 80 00 ca 00 cb SDS.G61U........
[ 45.964121] mmc1-sd: CSD 00000000: 32 00 0e 40 00 00 59 5b 80 7f b2 76 00 40 40 0a 2..@..Y[...v.@@.
[ 45.970847] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 2
[ 45.970884] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:2 ctrl_2:0x0
[ 45.970926] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 2
[ 45.970935] mmc1: sdhci_msm_set_clock: setting clk rate to 50000000
[ 45.972476] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 45.972916] mmc1: clock 50000000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 45.972932] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 45.972948] mmc1: clk scaling enabled
[ 45.972952] mmc1: Deferred resume completed
[ 46.185371] mmc1: clock 0Hz busmode 1 powermode 2 cs 0 Vdd 18 width 2 timing 2
[ 46.185393] mmc1: sdhci_msm_set_uhs_signaling-clock:50000000 uhs mode:2 ctrl_2:0x0
[ 46.185401] mmc1: request to disable clocks
[ 46.189018] mmc1: gated MCI clock

For boot 2 and boot 3, the power was shut down on the phone, but the card left in place. The card did not mount on either attempt, and the log is as follows:

[ 0.596108] mmc1: no vqmmc regulator found
[ 0.596120] mmc1: no vmmc regulator found
[ 0.596372] mmc1: clock 0Hz busmode 1 powermode 1 cs 0 Vdd 18 width 0 timing 0
[ 0.596382] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 0 curr_io_level 0
[ 0.596396] mmc1: Received IRQ(253), status=0x2
[ 0.598095] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.598112] mmc1: sdhci_msm_check_power_status: request 2 done
[ 0.609136] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 0.609201] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.620244] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 0.620250] mmc1: sdhci_msm_check_power_status: request 8 done
[ 0.625776] mmc1: SDHCI controller on 7864900.sdhci [7864900.sdhci] using 32-bit ADMA
[ 0.678231] mmc1: clock 0Hz busmode 1 powermode 0 cs 0 Vdd 0 width 0 timing 0
[ 0.678249] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.678256] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 8
[ 0.678270] mmc1: Received IRQ(253), status=0x1
[ 0.678883] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.678901] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.678909] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 4
[ 0.678917] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.678929] mmc1: request to disable clocks
[ 0.681289] mmc1: clock 0Hz busmode 1 powermode 1 cs 0 Vdd 18 width 0 timing 0
[ 0.682791] mmc1: sdhci_msm_enable_controller_clock: enabled controller clock
[ 0.682800] mmc1: sdhci_msm_check_power_status: request 2 curr_pwr_state 1 curr_io_level 4
[ 0.682823] mmc1: Received IRQ(253), status=0x2
[ 0.684529] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.684550] mmc1: sdhci_msm_check_power_status: request 2 done
[ 0.695578] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 0.695585] mmc1: request to enable clocks
[ 0.695652] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.706715] mmc1: sdhci_msm_check_power_status: request 8 curr_pwr_state 2 curr_io_level 8
[ 0.706721] mmc1: sdhci_msm_check_power_status: request 8 done
[ 0.713204] mmc1: clock 400000Hz busmode 1 powermode 2 cs 1 Vdd 18 width 0 timing 0
[ 0.713222] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.715418] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 0.715434] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.717412] mmc1: req failed (CMD5): -110, retrying...
[ 0.717909] mmc1: req failed (CMD5): -110, retrying...
[ 0.718386] mmc1: req failed (CMD5): -110, retrying...
[ 0.720735] mmc1: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 18 width 0 timing 0
[ 0.720751] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.722078] mmc1: clock 0Hz busmode 1 powermode 0 cs 0 Vdd 0 width 0 timing 0
[ 0.722094] mmc1: sdhci_msm_set_uhs_signaling-clock:400000 uhs mode:0 ctrl_2:0x0
[ 0.722101] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 2 curr_io_level 8
[ 0.722116] mmc1: Received IRQ(253), status=0x1
[ 0.722718] mmc1: Handled IRQ(253), ret=0, ack=0x1
[ 0.722740] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.722749] mmc1: sdhci_msm_check_power_status: request 1 curr_pwr_state 1 curr_io_level 4
[ 0.722757] mmc1: sdhci_msm_check_power_status: request 1 done
[ 0.722769] mmc1: request to disable clocks
[ 0.922683] mmc1: frequency set to 0 in disable function, this means the clock is already disabled.