[Android Q&A, Help & Troubleshooting] Angel_666:
Hi! Here is some about panel in this device: Model SHARP-LS055R1SX03. (using in Oculus DK2 btw.).

Kernel lk stuff:

#ifndef _PANEL_SHARP_1440P_DUALDSI_VIDEO_H_
#define _PANEL_SHARP_1440P_DUALDSI_VIDEO_H_
/*---------------------------------------------------------------------------*/
/* HEADER files */
/*---------------------------------------------------------------------------*/
#include "panel.h"

/*---------------------------------------------------------------------------*/
/* Panel configuration
struct panel_config{

char *panel_node_id;
char *panel_controller;
char *panel_compatible;
uint16_t panel_interface; //
uint16_t panel_type;
char *panel_destination;
uint32_t panel_orientation;
// panel_clockrate is deprecated in favor of panel_bitclock_freq
uint32_t panel_clockrate;
uint16_t panel_framerate;
uint16_t panel_channelid;
uint16_t dsi_virtualchannel_id;
uint16_t panel_broadcast_mode;
uint16_t panel_lp11_init;
uint16_t panel_init_delay;
uint16_t dsi_stream;
uint8_t interleave_mode;
uint32_t panel_bitclock_freq;
uint32_t panel_operating_mode;
uint32_t panel_with_enable_gpio;
uint8_t mode_gpio_state;
char *slave_panel_node_id;
}; */
/*---------------------------------------------------------------------------*/
static struct panel_config sharp_1440p_dualdsi_video_panel_data = {
"qcom,mdss_dsi_sharp_1440p_video", "dsi:0:", "qcom,mdss-dsi-panel",
10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 1, 0, 0, 0, 0, 0, 11, 0, 0, //
sharp 1440x2560 panel_operating_mode is 11(0x0b)
"qcom,mdss_dsi_sharp_1440p_video"
};

/*---------------------------------------------------------------------------*/
/* Panel resolution
struct panel_resolution{

uint16_t panel_width; // 1440
uint16_t panel_height; // 2560
uint16_t hfront_porch; //100
uint16_t hback_porch; // 28
uint16_t hpulse_width; //16
uint16_t hsync_skew;
uint16_t vfront_porch; //4
uint16_t vback_porch; // 3
uint16_t vpulse_width; //1
uint16_t hleft_border;
uint16_t hright_border;
uint16_t vtop_border;
uint16_t vbottom_border;
uint16_t hactive_res;
uint16_t vactive_res;
uint16_t invert_data_polarity;
uint16_t invert_vsync_polarity;
uint16_t invert_hsync_polarity;
};
*/
/*---------------------------------------------------------------------------*/
static struct panel_resolution sharp_1440p_dualdsi_video_panel_res = {
1440, 2560, 100, 28, 16, 0, 4, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0
};

/*---------------------------------------------------------------------------*/
/* Panel color information

struct color_info{
uint8_t color_format;
uint8_t color_order;
uint8_t underflow_color;
uint8_t border_color;
uint8_t pixel_packing;
uint8_t pixel_alignment;
};
*/
/*---------------------------------------------------------------------------*/
static struct color_info sharp_1440p_dualdsi_video_color = {
24, 0, 0xff, 0, 0, 0
};

/*---------------------------------------------------------------------------*/
/* Panel on/off command
information */
/*---------------------------------------------------------------------------*/
static char sharp_1440p_dualdsi_video_on_cmd0[] = {
0x02, 0x00, 0x29, 0xC0,
0xb0, 0x00, 0xFF, 0xFF,
};

static char sharp_1440p_dualdsi_video_on_cmd1[] = {
0x02, 0x00, 0x29, 0xC0,
0xd6, 0x01, 0xFF, 0xFF,
};

static char sharp_1440p_dualdsi_video_on_cmd2[] = {
0x02, 0x00, 0x29, 0xC0,
0xb3, 0x18, 0xFF, 0xFF,
};

static char sharp_1440p_dualdsi_video_on_cmd3[] = {
0x02, 0x00, 0x29, 0xC0,
0xb0, 0x03, 0xFF, 0xFF,
};

static char sharp_1440p_dualdsi_video_on_cmd4[] = {
0x29, 0x00, 0x05, 0x80
};

static char sharp_1440p_dualdsi_video_on_cmd5[] = {
0x11, 0x00, 0x05, 0x80
};

static struct mipi_dsi_cmd sharp_1440p_dualdsi_video_on_command[] = {
{0x8, sharp_1440p_dualdsi_video_on_cmd0, 0x10},
{0x8, sharp_1440p_dualdsi_video_on_cmd1, 0x10},
{0x8, sharp_1440p_dualdsi_video_on_cmd2, 0x10},
{0x8, sharp_1440p_dualdsi_video_on_cmd3, 0x10},
{0x4, sharp_1440p_dualdsi_video_on_cmd4, 0xa0},
{0x4, sharp_1440p_dualdsi_video_on_cmd5, 0xa0}
};

#define SHARP_1440P_DUALDSI_VIDEO_ON_COMMAND 6

static char sharp_1440p_dualdsi_videooff_cmd0[] = {
0x28, 0x00, 0x05, 0x80
};

static char sharp_1440p_dualdsi_videooff_cmd1[] = {
0x10, 0x00, 0x05, 0x80
};

static struct mipi_dsi_cmd sharp_1440p_dualdsi_video_off_command[] = {
{0x4, sharp_1440p_dualdsi_videooff_cmd0, 0x78}, //0x32
{0x4, sharp_1440p_dualdsi_videooff_cmd1, 0x78}
};

#define SHARP_1440P_DUALDSI_VIDEO_OFF_COMMAND 2

static struct command_state sharp_1440p_dualdsi_video_state = {
0, 1
};

/*---------------------------------------------------------------------------*/
/* Command mode panel
information */
/*---------------------------------------------------------------------------*/
static struct commandpanel_info sharp_1440p_dualdsi_video_command_panel = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};

/*---------------------------------------------------------------------------*/
/* Video mode panel information
struct videopanel_info {
uint8_t hsync_pulse; //0
uint8_t hfp_power_mode; //0
uint8_t hbp_power_mode; //0
uint8_t hsa_power_mode; //0
uint8_t bllp_eof_power_mode; //1
uint8_t bllp_power_mode; //1
uint8_t traffic_mode; //1
uint8_t dma_delayafter_vsync; //0
uint32_t bllp_eof_power; //0x09 ????
};

*/
/*---------------------------------------------------------------------------*/
static struct videopanel_info sharp_1440p_dualdsi_video_video_panel = {
0, 0, 0, 0, 1, 1, 1, 0, 0x9
};

/*---------------------------------------------------------------------------*/
/* Lane configuration

struct lane_configuration {
uint8_t dsi_lanes;
uint8_t dsi_lanemap;
uint8_t lane0_state;
uint8_t lane1_state;
uint8_t lane2_state;
uint8_t lane3_state;
uint8_t force_clk_lane_hs;
};
*/
/*---------------------------------------------------------------------------*/
static struct lane_configuration sharp_1440p_dualdsi_video_lane_config = {
4, 0, 1, 1, 1, 1, 0
};

/*---------------------------------------------------------------------------*/
/* Panel timing
d5 32 22 00 60 64 26 34 29 03 04 00
*/
/*---------------------------------------------------------------------------*/
static const uint32_t sharp_1440p_dualdsi_video_timings[] = {
0xd5, 0x32, 0x22, 0x00, 0x60, 0x64, 0x26, 0x34, 0x29, 0x03, 0x04, 0x00
};

/*
22 1e 07 08 04 03 04 a0 // DLN timimg-ctrl-4-8
22 1e 07 08 04 03 04 a0
22 1e 07 08 04 03 04 a0
22 1e 07 08 04 03 04 a0
22 18 07 08 04 03 04 a0
*/

static const uint32_t sharp_1440p_dualdsi_thulium_video_timings[] = {
0x22, 0x1e, 0x07, 0x08, 0x04, 0x03, 0x04, 0xa0,
0x22, 0x1e, 0x07, 0x08, 0x04, 0x03, 0x04, 0xa0,
0x22, 0x1e, 0x07, 0x08, 0x04, 0x03, 0x04, 0xa0,
0x22, 0x1e, 0x07, 0x08, 0x04, 0x03, 0x04, 0xa0,
0x22, 0x18, 0x07, 0x08, 0x04, 0x03, 0x04, 0xa0
};

/*
struct panel_timing {
uint8_t dsi_mdp_trigger;
uint8_t dsi_dma_trigger;
uint8_t tclk_post;
uint8_t tclk_pre;
};
*/

static struct panel_timing sharp_1440p_dualdsi_video_timing_info = {
0x0, 0x04, 0x0d, 0x2c
};

/*---------------------------------------------------------------------------*/
/* Panel reset sequence

struct panel_reset_sequence {
uint8_t pin_state[TOTAL_RESET_GPIO_CTRL];
uint32_t sleep[TOTAL_RESET_GPIO_CTRL];
uint8_t pin_direction;
};

*/
/*---------------------------------------------------------------------------*/
static struct panel_reset_sequence sharp_1440p_dualdsi_video_reset_seq = {
{0, 1, 1, }, {5, 20, 1, }, 2 // must 3 items
};

/*---------------------------------------------------------------------------*/
/* Backlight setting

struct backlight {
uint16_t bl_interface_type;
uint16_t bl_min_level;
uint16_t bl_max_level;
uint16_t bl_step;
uint16_t bl_pmic_controltype;
char *bl_pmic_model;
};

*/
/*---------------------------------------------------------------------------*/
static struct backlight sharp_1440p_dualdsi_video_backlight = {
1, 1, 4095, 100, 1, "PMIC_8941" /* BL_WLED */
};

/*
struct labibb_desc {
char amoled_panel; // lcd = 0, amoled = 1
char force_config; // 0 to use default value
uint32_t ibb_min_volt;
uint32_t ibb_max_volt;
uint32_t lab_min_volt;
uint32_t lab_max_volt;
char pwr_up_delay; // ndx to => 1250, 2500, 5000 and 10000 us
char pwr_down_delay; // ndx to => 1250, 2500, 5000 and 10000 us
char ibb_discharge_en;
bool swire_control;
};
*/
static struct labibb_desc sharp_1440p_dualdsi_video_labibb = {
0, 1, 5800000, 5800000, 5800000, 5800000, 3, 3, 1, 0 // lab ibb
set 5.8v to meet data sheet
};

/*
struct dfps_info {
struct dfps_panel_info panel_dfps;
struct dfps_codes_info codes_dfps[DFPS_MAX_FRAME_RATE];
void *dfps_fb_base;
};
*/
/*---------------------------------------------------------------------------*/
/* Dynamic fps supported frequencies by
panel */
/*---------------------------------------------------------------------------*/
static const struct dfps_panel_info sharp_1440p_dualdsi_video_dfps = {
1, 8, {53, 54, 55, 56, 57, 58, 59, 60}
};

/*
struct topology_config {
char *config_name; // matches with kernel cmdline
//
// lm_split: -ve value means that lm_split is not used.
// If lm_split is used then DUAL_PIPE flag will be added.
//
int lm_split[2];
int num_dsc_enc; // how many encoder to use
struct dsc_parameters *dsc;
int use_pingpong_split;
};
*/
/* 2LM + 2CTL */
struct topology_config sharp_1440p_dualdsi_video_config0 = {
"config0", {720, 720}, 0, NULL, false
};

/* 1LM + 1CTL + PP_SPLIT */
struct topology_config sharp_1440p_dualdsi_video_config1 = {
"config1", {-1, -1}, 0, NULL, true // sharp 1440x2560 use
config 1,use_pingpong_split set true
};

#define SHARP_1440P_DUALDSI_VIDEO_SIGNATURE 0x210000

#endif /*_PANEL_SHARP_1440P_DUALDSI_VIDEO_H_*/

dtsi stuff:

&mdss_mdp {
dsi_dual_sharp_1440p_video: qcom,mdss_dsi_sharp_1440p_video {
qcom,mdss-dsi-panel-name = "Dual SHARP 1440p video mode dsi panel";
qcom,mdss-dsi-panel-type = "dsi_video_mode";
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-virtual-channel-id = <0>;
qcom,mdss-dsi-stream = <0>;

qcom,mdss-dsi-panel-width = <720>; //1440x2560 , 720
qcom,mdss-dsi-panel-height = <2560>;
qcom,mdss-dsi-h-front-porch =<100>; // <76>;
qcom,mdss-dsi-h-back-porch = <28>; //<32>;
qcom,mdss-dsi-h-pulse-width =<16>; //<16>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <3>; // ??
qcom,mdss-dsi-v-front-porch = <4>; // ??
qcom,mdss-dsi-v-pulse-width = <1>; //??

qcom,mdss-dsi-bpp = <24>;
qcom,mdss-dsi-underflow-color = <0xff>;
qcom,mdss-dsi-border-color = <0>;
qcom,mdss-dsi-on-command = // check
[
29 01 00 00 01 00 02 b0 00 // unlock command write // byte
0 must use 29
29 01 00 00 01 00 02 d6 01 // byte 0 must use 29
29 01 00 00 01 00 02 b3 18 // byte 0 must use 29, not use 15

29 01 00 00 01 00 02 b0 03 // lock command write // byte 0
must use 29
05 01 00 00 a0 00 02 29 00
05 01 00 00 a0 00 02 11 00 // a0 =160 ms

];
qcom,mdss-dsi-off-command = // check
[
05 01 00 00 78 00 02 28 00
05 01 00 00 78 00 02 10 00
];

qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; // must lp mode
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
qcom,mdss-dsi-h-sync-pulse = <0>; // <1>;
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; //1 //
"burst_mode"; //2
qcom,mdss-dsi-lane-map = "lane_map_0123";
qcom,mdss-dsi-bllp-eof-power-mode;
qcom,mdss-dsi-bllp-power-mode;
qcom,mdss-dsi-lane-0-state;
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,cmd-sync-wait-broadcast; // checked
//new
qcom,mdss-dsi-panel-timings =
[
d5 32 22 00 60 64 26 34 29 03 04 00

];
qcom,mdss-dsi-t-clk-post = <13>; //<0x02>;
qcom,mdss-dsi-t-clk-pre = <44>; ////<0x2a>;

qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-dsi-dma-trigger = "trigger_sw";
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";

qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>;
qcom,mdss-dsi-bl-pmic-bank-select = <0>;

qcom,mdss-dsi-reset-sequence = <0 5>, <1 20>;

qcom,mdss-pan-physical-width-dimension = <71>;
qcom,mdss-pan-physical-height-dimension = <128>;
qcom,mdss-dsi-min-refresh-rate = <53>;
qcom,mdss-dsi-max-refresh-rate = <60>;
qcom,mdss-dsi-pan-enable-dynamic-fps;

qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
qcom,mdss-dsi-panel-status-check-mode = "bta_check";
qcom,mdss-dsi-tx-eot-append;
qcom,esd-check-enabled;

qcom,config-select = <&dsi_dual_sharp_1440p_video_config1>;

dsi_dual_sharp_1440p_video_config0: config0 {
qcom,split-mode = "dualctl-split";
};

dsi_dual_sharp_1440p_video_config1: config1 {
qcom,split-mode = "pingpong-split";
};

};
};

Panel specs: http://www.panelook.com/LS055R1SX03_SHARP_5.5_LCM_parameter_23333.html

Hope that helps!