[Android General] Teleferic:
Overclocking from 1.8GHz and beyond

Hi, I happen to have the same device as you and have successfully clocked it up to 2GHz up from 1.8GHz. I had some time to observe what was going on in the code and it seems that your problem is that you are attempting to jump to a frequency that exceeds the base limits set on the cpu clocks (default is a 2GHz limit).

It also seems that you may not be adding the frequencies to the table correctly because you should have been able to at least reach 1.989 GHz if you tried to jump to 2014500 kHz with the 2GHz limit.

Notice on kernel boot you get the following output:

<6>[ 0.000000] Tegra11: CPU Speedo ID 1, Soc Speedo ID 0
<6>[ 0.000000] Tegra11: CPU Speedo Value 1760, Soc Speedo Value 1199
<6>[ 0.000000] Tegra Revision: A02 SKU: 0x5 CPU Process: 1 Core Process: 1
<6>[ 0.000000] tegra: PLLP fixed rate: 408000000
<6>[ 0.000000] Lowering cpu_lp maximum rate from 816000000 to 696000000
<6>[ 0.000000] Lowering sbus maximum rate from 384000000 to 336000000
<6>[ 0.000000] Lowering vi maximum rate from 425000000 to 408000000
<6>[ 0.000000] Lowering 2d maximum rate from 700000000 to 600000000
<6>[ 0.000000] Lowering 3d maximum rate from 700000000 to 600000000
<6>[ 0.000000] Lowering epp maximum rate from 700000000 to 600000000
<6>[ 0.000000] Lowering msenc maximum rate from 600000000 to 408000000
<6>[ 0.000000] Lowering se maximum rate from 600000000 to 408000000
<6>[ 0.000000] Lowering tsec maximum rate from 600000000 to 408000000
<6>[ 0.000000] Lowering vde maximum rate from 600000000 to 408000000
<6>[ 0.000000] Lowering host1x maximum rate from 384000000 to 336000000
<6>[ 0.000000] Lowering pll_c maximum rate from 1400000000 to 1066000000
<6>[ 0.000000] Lowering pll_c2 maximum rate from 1200000000 to 1066000000
<6>[ 0.000000] Lowering pll_c3 maximum rate from 1200000000 to 1066000000
<6>[ 0.000000] Lowering sdmmc1 maximum rate from 208000000 to 156000000
<6>[ 0.000000] Lowering sdmmc3 maximum rate from 208000000 to 156000000
<6>[ 0.000000] Lowering sdmmc4 maximum rate from 200000000 to 156000000
<6>[ 0.000000] Lowering xusb_falcon_src maximum rate from 350000000 to 336000000
<6>[ 0.000000] Lowering xusb_host_src maximum rate from 120000000 to 112000000
<6>[ 0.000000] Lowering xusb_dev_src maximum rate from 120000000 to 112000000
<6>[ 0.000000] Lowering cpu_g maximum rate from 2100000000 to 2014500000

Notice the "cpu_g maximum rate" from my kernel output, I have set it to 2.1GHz up from the default of 2GHz. This allows me to freely set the desired maximum rate of 2014500000, which it transitions to as it initializes. You should also notice I am using the default cpu and soc ids (CPU Speedo ID 1, Soc Speedo ID 0).

To sum this all up you need to edit these files;

edp.c

Raise edp limits for thermal control for the cpu and soc ids you are using.

tegra11_clocks.c

Raise the base maximum rate on the cpu_g clocks to access higher frequencies.

tegra11_dvfs.c

Add desired frequency steps to the dvfs tables under the desired cpu ids

tegra11_speedo.c

If you altered the default ids used for the cpu clocks you can alter them here or use the cpu ids of different tegra 4 variants (T40T, T40DC, T40X, etc)

So as you can see, the overclocking steps are quite straightforward. It is surprising how easy they have made it really! Also the command line program I used to see what the kernel is saying is called "dmesg". This allows you to see what is happening so you do not waste time debugging the wrong thing. I have posted pictures of confirmed overclocking along with the about device page confirming my device.